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-rw-r--r--Documentation/DocBook/sh.tmpl10
-rw-r--r--Documentation/RCU/stallwarn.txt94
-rw-r--r--Documentation/RCU/torture.txt10
-rw-r--r--Documentation/RCU/trace.txt35
-rw-r--r--Documentation/arm/00-INDEX2
-rw-r--r--Documentation/arm/SPEAr/overview.txt60
-rw-r--r--Documentation/feature-removal-schedule.txt43
-rw-r--r--Documentation/filesystems/proc.txt4
-rw-r--r--Documentation/intel_txt.txt16
-rw-r--r--Documentation/kernel-parameters.txt8
-rw-r--r--Documentation/kprobes.txt10
-rw-r--r--Documentation/rbtree.txt58
-rw-r--r--Documentation/scheduler/sched-design-CFS.txt54
-rw-r--r--Documentation/scheduler/sched-rt-group.txt20
-rw-r--r--Documentation/trace/events.txt3
-rw-r--r--Documentation/trace/ftrace.txt50
-rw-r--r--Documentation/trace/kprobetrace.txt4
-rw-r--r--MAINTAINERS97
-rw-r--r--Makefile2
-rw-r--r--arch/Kconfig20
-rw-r--r--arch/alpha/Kconfig3
-rw-r--r--arch/alpha/include/asm/atomic.h4
-rw-r--r--arch/alpha/include/asm/bitops.h18
-rw-r--r--arch/alpha/kernel/time.c101
-rw-r--r--arch/arm/Kconfig192
-rw-r--r--arch/arm/Makefile12
-rw-r--r--arch/arm/boot/compressed/Makefile1
-rw-r--r--arch/arm/boot/compressed/decompress.c4
-rw-r--r--arch/arm/boot/compressed/piggy.lzma.S6
-rw-r--r--arch/arm/common/Kconfig5
-rw-r--r--arch/arm/common/Makefile4
-rw-r--r--arch/arm/common/clkdev.c7
-rw-r--r--arch/arm/common/icst.c100
-rw-r--r--arch/arm/common/icst307.c161
-rw-r--r--arch/arm/common/icst525.c160
-rw-r--r--arch/arm/common/pl330.c1966
-rw-r--r--arch/arm/common/vic.c107
-rw-r--r--arch/arm/configs/cns3420vb_defconfig831
-rw-r--r--arch/arm/configs/mmp2_defconfig75
-rw-r--r--arch/arm/configs/spear300_defconfig773
-rw-r--r--arch/arm/configs/spear310_defconfig775
-rw-r--r--arch/arm/configs/spear320_defconfig775
-rw-r--r--arch/arm/configs/spear600_defconfig760
-rw-r--r--arch/arm/configs/stamp9g20_defconfig1456
-rw-r--r--arch/arm/include/asm/atomic.h2
-rw-r--r--arch/arm/include/asm/cacheflush.h4
-rw-r--r--arch/arm/include/asm/hardware/arm_timer.h39
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h3
-rw-r--r--arch/arm/include/asm/hardware/icst.h59
-rw-r--r--arch/arm/include/asm/hardware/icst307.h38
-rw-r--r--arch/arm/include/asm/hardware/icst525.h36
-rw-r--r--arch/arm/include/asm/hardware/pl330.h217
-rw-r--r--arch/arm/include/asm/hardware/sp810.h59
-rw-r--r--arch/arm/include/asm/ioctls.h3
-rw-r--r--arch/arm/include/asm/mach/pci.h11
-rw-r--r--arch/arm/include/asm/mach/time.h2
-rw-r--r--arch/arm/include/asm/pci.h15
-rw-r--r--arch/arm/include/asm/perf_event.h17
-rw-r--r--arch/arm/include/asm/pgtable.h2
-rw-r--r--arch/arm/include/asm/pmu.h32
-rw-r--r--arch/arm/include/asm/scatterlist.h20
-rw-r--r--arch/arm/include/asm/smp.h2
-rw-r--r--arch/arm/include/asm/smp_twd.h17
-rw-r--r--arch/arm/include/asm/system.h2
-rw-r--r--arch/arm/include/asm/tlbflush.h29
-rw-r--r--arch/arm/kernel/bios32.c3
-rw-r--r--arch/arm/kernel/dma.c36
-rw-r--r--arch/arm/kernel/perf_event.c928
-rw-r--r--arch/arm/kernel/pmu.c127
-rw-r--r--arch/arm/kernel/smp.c2
-rw-r--r--arch/arm/kernel/smp_twd.c17
-rw-r--r--arch/arm/kernel/time.c70
-rw-r--r--arch/arm/lib/clear_user.S1
-rw-r--r--arch/arm/lib/copy_to_user.S1
-rw-r--r--arch/arm/mach-at91/Kconfig24
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c315
-rw-r--r--arch/arm/mach-at91/include/mach/board.h8
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h4
-rw-r--r--arch/arm/mach-at91/include/mach/system.h7
-rw-r--r--arch/arm/mach-bcmring/arch.c16
-rw-r--r--arch/arm/mach-clps711x/mm.c1
-rw-r--r--arch/arm/mach-cns3xxx/Kconfig12
-rw-r--r--arch/arm/mach-cns3xxx/Makefile2
-rw-r--r--arch/arm/mach-cns3xxx/Makefile.boot3
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c148
-rw-r--r--arch/arm/mach-cns3xxx/core.c249
-rw-r--r--arch/arm/mach-cns3xxx/core.h23
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/cns3xxx.h635
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/debug-macro.S21
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S82
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/hardware.h22
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/io.h17
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/irqs.h24
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/memory.h26
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/system.h29
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/timex.h12
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/uncompress.h55
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/vmalloc.h11
-rw-r--r--arch/arm/mach-cns3xxx/pm.c86
-rw-r--r--arch/arm/mach-davinci/Kconfig2
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c52
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c28
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c18
-rw-r--r--arch/arm/mach-davinci/board-dm355-leopard.c18
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c12
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c60
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c22
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c54
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c20
-rw-r--r--arch/arm/mach-davinci/cdce949.c1
-rw-r--r--arch/arm/mach-davinci/clock.c32
-rw-r--r--arch/arm/mach-davinci/clock.h9
-rw-r--r--arch/arm/mach-davinci/common.c57
-rw-r--r--arch/arm/mach-davinci/cp_intc.c22
-rw-r--r--arch/arm/mach-davinci/da830.c29
-rw-r--r--arch/arm/mach-davinci/da850.c30
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c15
-rw-r--r--arch/arm/mach-davinci/devices.c50
-rw-r--r--arch/arm/mach-davinci/dm355.c21
-rw-r--r--arch/arm/mach-davinci/dm365.c34
-rw-r--r--arch/arm/mach-davinci/dm644x.c21
-rw-r--r--arch/arm/mach-davinci/dm646x.c53
-rw-r--r--arch/arm/mach-davinci/dma.c234
-rw-r--r--arch/arm/mach-davinci/gpio.c160
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h32
-rw-r--r--arch/arm/mach-davinci/include/mach/cp_intc.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/cputype.h8
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h29
-rw-r--r--arch/arm/mach-davinci/include/mach/dm355.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/dm365.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/dm644x.h6
-rw-r--r--arch/arm/mach-davinci/include/mach/dm646x.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio.h72
-rw-r--r--arch/arm/mach-davinci/include/mach/irqs.h97
-rw-r--r--arch/arm/mach-davinci/include/mach/mux.h290
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h55
-rw-r--r--arch/arm/mach-davinci/include/mach/serial.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/system.h5
-rw-r--r--arch/arm/mach-davinci/io.c20
-rw-r--r--arch/arm/mach-davinci/irq.c7
-rw-r--r--arch/arm/mach-davinci/mux.c19
-rw-r--r--arch/arm/mach-davinci/mux.h2
-rw-r--r--arch/arm/mach-davinci/psc.c10
-rw-r--r--arch/arm/mach-davinci/serial.c34
-rw-r--r--arch/arm/mach-davinci/time.c37
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c2
-rw-r--r--arch/arm/mach-ep93xx/clock.c13
-rw-r--r--arch/arm/mach-ep93xx/core.c123
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c4
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h1
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h12
-rw-r--r--arch/arm/mach-ep93xx/micro9.c2
-rw-r--r--arch/arm/mach-ep93xx/simone.c6
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c6
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c2
-rw-r--r--arch/arm/mach-integrator/Kconfig1
-rw-r--r--arch/arm/mach-integrator/Makefile2
-rw-r--r--arch/arm/mach-integrator/common.h2
-rw-r--r--arch/arm/mach-integrator/core.c127
-rw-r--r--arch/arm/mach-integrator/cpu.c53
-rw-r--r--arch/arm/mach-integrator/impd1.c43
-rw-r--r--arch/arm/mach-integrator/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-integrator/include/mach/entry-macro.S1
-rw-r--r--arch/arm/mach-integrator/include/mach/hardware.h17
-rw-r--r--arch/arm/mach-integrator/include/mach/platform.h54
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c166
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c88
-rw-r--r--arch/arm/mach-integrator/leds.c1
-rw-r--r--arch/arm/mach-integrator/pci_v3.c7
-rw-r--r--arch/arm/mach-iop32x/n2100.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c1
-rw-r--r--arch/arm/mach-kirkwood/Kconfig18
-rw-r--r--arch/arm/mach-kirkwood/Makefile3
-rw-r--r--arch/arm/mach-kirkwood/guruplug-setup.c131
-rw-r--r--arch/arm/mach-kirkwood/netxbig_v2-setup.c415
-rw-r--r--arch/arm/mach-mmp/aspenite.c13
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h10
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-mmp2.h187
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h14
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h10
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-smc.h37
-rw-r--r--arch/arm/mach-mmp/include/mach/timex.h4
-rw-r--r--arch/arm/mach-mmp/jasper.c64
-rw-r--r--arch/arm/mach-mmp/mmp2.c52
-rw-r--r--arch/arm/mach-mmp/pxa168.c15
-rw-r--r--arch/arm/mach-msm/Kconfig90
-rw-r--r--arch/arm/mach-msm/Makefile23
-rw-r--r--arch/arm/mach-msm/acpuclock-arm11.c526
-rw-r--r--arch/arm/mach-msm/acpuclock.h32
-rw-r--r--arch/arm/mach-msm/board-halibut.c17
-rw-r--r--arch/arm/mach-msm/board-mahimahi.c87
-rw-r--r--arch/arm/mach-msm/board-msm7x27.c179
-rw-r--r--arch/arm/mach-msm/board-msm7x30.c120
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c94
-rw-r--r--arch/arm/mach-msm/board-sapphire.c118
-rw-r--r--arch/arm/mach-msm/board-trout.c (renamed from arch/arm/mach-msm/board-dream.c)8
-rw-r--r--arch/arm/mach-msm/board-trout.h (renamed from arch/arm/mach-msm/board-dream.h)0
-rw-r--r--arch/arm/mach-msm/clock-7x01a.c126
-rw-r--r--arch/arm/mach-msm/clock-7x30.h168
-rw-r--r--arch/arm/mach-msm/clock-pcom.c131
-rw-r--r--arch/arm/mach-msm/clock-pcom.h153
-rw-r--r--arch/arm/mach-msm/clock.c258
-rw-r--r--arch/arm/mach-msm/clock.h71
-rw-r--r--arch/arm/mach-msm/devices-msm7x00.c (renamed from arch/arm/mach-msm/devices.c)125
-rw-r--r--arch/arm/mach-msm/devices-msm7x30.c128
-rw-r--r--arch/arm/mach-msm/devices-qsd8x50.c92
-rw-r--r--arch/arm/mach-msm/devices.h11
-rw-r--r--arch/arm/mach-msm/dma.c23
-rw-r--r--arch/arm/mach-msm/gpio.c85
-rw-r--r--arch/arm/mach-msm/include/mach/board.h14
-rw-r--r--arch/arm/mach-msm/include/mach/clk.h57
-rw-r--r--arch/arm/mach-msm/include/mach/dma.h32
-rw-r--r--arch/arm/mach-msm/include/mach/gpio.h142
-rw-r--r--arch/arm/mach-msm/include/mach/io.h5
-rw-r--r--arch/arm/mach-msm/include/mach/irqs-7x00.h75
-rw-r--r--arch/arm/mach-msm/include/mach/irqs-7x30.h170
-rw-r--r--arch/arm/mach-msm/include/mach/irqs-8x50.h105
-rw-r--r--arch/arm/mach-msm/include/mach/irqs.h81
-rw-r--r--arch/arm/mach-msm/include/mach/memory.h8
-rw-r--r--arch/arm/mach-msm/include/mach/msm_fb.h147
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x00.h139
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x30.h122
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x50.h147
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h95
-rw-r--r--arch/arm/mach-msm/include/mach/msm_smd.h109
-rw-r--r--arch/arm/mach-msm/include/mach/sirc.h115
-rw-r--r--arch/arm/mach-msm/include/mach/system.h5
-rw-r--r--arch/arm/mach-msm/include/mach/vreg.h2
-rw-r--r--arch/arm/mach-msm/io.c75
-rw-r--r--arch/arm/mach-msm/irq-vic.c365
-rw-r--r--arch/arm/mach-msm/irq.c4
-rw-r--r--arch/arm/mach-msm/last_radio_log.c82
-rw-r--r--arch/arm/mach-msm/proc_comm.c26
-rw-r--r--arch/arm/mach-msm/proc_comm.h105
-rw-r--r--arch/arm/mach-msm/sirc.c177
-rw-r--r--arch/arm/mach-msm/smd.c1046
-rw-r--r--arch/arm/mach-msm/smd_debug.c315
-rw-r--r--arch/arm/mach-msm/smd_private.h403
-rw-r--r--arch/arm/mach-msm/timer.c2
-rw-r--r--arch/arm/mach-msm/vreg.c154
-rw-r--r--arch/arm/mach-nomadik/Kconfig1
-rw-r--r--arch/arm/mach-nomadik/Makefile2
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c10
-rw-r--r--arch/arm/mach-nomadik/clock.c38
-rw-r--r--arch/arm/mach-nomadik/clock.h1
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c83
-rw-r--r--arch/arm/mach-nomadik/include/mach/gpio.h67
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c1
-rw-r--r--arch/arm/mach-omap2/devices.c34
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c1
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c1
-rw-r--r--arch/arm/mach-pxa/Kconfig57
-rw-r--r--arch/arm/mach-pxa/Makefile4
-rw-r--r--arch/arm/mach-pxa/cm-x300.c104
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/corgi.c56
-rw-r--r--arch/arm/mach-pxa/corgi_lcd.c288
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c77
-rw-r--r--arch/arm/mach-pxa/corgi_ssp.c274
-rw-r--r--arch/arm/mach-pxa/csb726.c11
-rw-r--r--arch/arm/mach-pxa/em-x270.c2
-rw-r--r--arch/arm/mach-pxa/generic.c31
-rw-r--r--arch/arm/mach-pxa/include/mach/corgi.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/mmc.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h375
-rw-r--r--arch/arm/mach-pxa/include/mach/ssp.h109
-rw-r--r--arch/arm/mach-pxa/include/mach/tosa.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/vpac270.h42
-rw-r--r--arch/arm/mach-pxa/include/mach/z2.h41
-rw-r--r--arch/arm/mach-pxa/littleton.c3
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c43
-rw-r--r--arch/arm/mach-pxa/mioa701.c2
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c2
-rw-r--r--arch/arm/mach-pxa/palmld.c2
-rw-r--r--arch/arm/mach-pxa/palmt5.c2
-rw-r--r--arch/arm/mach-pxa/palmtc.c2
-rw-r--r--arch/arm/mach-pxa/palmtx.c2
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c2
-rw-r--r--arch/arm/mach-pxa/poodle.c5
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/raumfeld.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl.h23
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c1
-rw-r--r--arch/arm/mach-pxa/spitz.c6
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c28
-rw-r--r--arch/arm/mach-pxa/ssp.c510
-rw-r--r--arch/arm/mach-pxa/stargate2.c5
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-pxa/trizeps4.c2
-rw-r--r--arch/arm/mach-pxa/vpac270.c615
-rw-r--r--arch/arm/mach-pxa/z2.c609
-rw-r--r--arch/arm/mach-pxa/zeus.c2
-rw-r--r--arch/arm/mach-pxa/zylonite.c6
-rw-r--r--arch/arm/mach-realview/Makefile2
-rw-r--r--arch/arm/mach-realview/clock.c64
-rw-r--r--arch/arm/mach-realview/clock.h19
-rw-r--r--arch/arm/mach-realview/core.c194
-rw-r--r--arch/arm/mach-realview/hotplug.c2
-rw-r--r--arch/arm/mach-realview/include/mach/clkdev.h9
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb1176.h1
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pba8.h8
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pbx.h14
-rw-r--r--arch/arm/mach-realview/include/mach/platform.h20
-rw-r--r--arch/arm/mach-realview/realview_eb.c34
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c17
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c34
-rw-r--r--arch/arm/mach-realview/realview_pba8.c17
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1467 files changed, 75750 insertions, 30623 deletions
diff --git a/Documentation/DocBook/sh.tmpl b/Documentation/DocBook/sh.tmpl
index 0c3dc4c69dd1..d858d92cf6d9 100644
--- a/Documentation/DocBook/sh.tmpl
+++ b/Documentation/DocBook/sh.tmpl
@@ -19,13 +19,17 @@
19 </authorgroup> 19 </authorgroup>
20 20
21 <copyright> 21 <copyright>
22 <year>2008</year> 22 <year>2008-2010</year>
23 <holder>Paul Mundt</holder> 23 <holder>Paul Mundt</holder>
24 </copyright> 24 </copyright>
25 <copyright> 25 <copyright>
26 <year>2008</year> 26 <year>2008-2010</year>
27 <holder>Renesas Technology Corp.</holder> 27 <holder>Renesas Technology Corp.</holder>
28 </copyright> 28 </copyright>
29 <copyright>
30 <year>2010</year>
31 <holder>Renesas Electronics Corp.</holder>
32 </copyright>
29 33
30 <legalnotice> 34 <legalnotice>
31 <para> 35 <para>
@@ -77,7 +81,7 @@
77 </chapter> 81 </chapter>
78 <chapter id="clk"> 82 <chapter id="clk">
79 <title>Clock Framework Extensions</title> 83 <title>Clock Framework Extensions</title>
80!Iarch/sh/include/asm/clock.h 84!Iinclude/linux/sh_clk.h
81 </chapter> 85 </chapter>
82 <chapter id="mach"> 86 <chapter id="mach">
83 <title>Machine Specific Interfaces</title> 87 <title>Machine Specific Interfaces</title>
diff --git a/Documentation/RCU/stallwarn.txt b/Documentation/RCU/stallwarn.txt
index 1423d2570d78..44c6dcc93d6d 100644
--- a/Documentation/RCU/stallwarn.txt
+++ b/Documentation/RCU/stallwarn.txt
@@ -3,35 +3,79 @@ Using RCU's CPU Stall Detector
3The CONFIG_RCU_CPU_STALL_DETECTOR kernel config parameter enables 3The CONFIG_RCU_CPU_STALL_DETECTOR kernel config parameter enables
4RCU's CPU stall detector, which detects conditions that unduly delay 4RCU's CPU stall detector, which detects conditions that unduly delay
5RCU grace periods. The stall detector's idea of what constitutes 5RCU grace periods. The stall detector's idea of what constitutes
6"unduly delayed" is controlled by a pair of C preprocessor macros: 6"unduly delayed" is controlled by a set of C preprocessor macros:
7 7
8RCU_SECONDS_TILL_STALL_CHECK 8RCU_SECONDS_TILL_STALL_CHECK
9 9
10 This macro defines the period of time that RCU will wait from 10 This macro defines the period of time that RCU will wait from
11 the beginning of a grace period until it issues an RCU CPU 11 the beginning of a grace period until it issues an RCU CPU
12 stall warning. It is normally ten seconds. 12 stall warning. This time period is normally ten seconds.
13 13
14RCU_SECONDS_TILL_STALL_RECHECK 14RCU_SECONDS_TILL_STALL_RECHECK
15 15
16 This macro defines the period of time that RCU will wait after 16 This macro defines the period of time that RCU will wait after
17 issuing a stall warning until it issues another stall warning. 17 issuing a stall warning until it issues another stall warning
18 It is normally set to thirty seconds. 18 for the same stall. This time period is normally set to thirty
19 seconds.
19 20
20RCU_STALL_RAT_DELAY 21RCU_STALL_RAT_DELAY
21 22
22 The CPU stall detector tries to make the offending CPU rat on itself, 23 The CPU stall detector tries to make the offending CPU print its
23 as this often gives better-quality stack traces. However, if 24 own warnings, as this often gives better-quality stack traces.
24 the offending CPU does not detect its own stall in the number 25 However, if the offending CPU does not detect its own stall in
25 of jiffies specified by RCU_STALL_RAT_DELAY, then other CPUs will 26 the number of jiffies specified by RCU_STALL_RAT_DELAY, then
26 complain. This is normally set to two jiffies. 27 some other CPU will complain. This delay is normally set to
28 two jiffies.
27 29
28The following problems can result in an RCU CPU stall warning: 30When a CPU detects that it is stalling, it will print a message similar
31to the following:
32
33INFO: rcu_sched_state detected stall on CPU 5 (t=2500 jiffies)
34
35This message indicates that CPU 5 detected that it was causing a stall,
36and that the stall was affecting RCU-sched. This message will normally be
37followed by a stack dump of the offending CPU. On TREE_RCU kernel builds,
38RCU and RCU-sched are implemented by the same underlying mechanism,
39while on TREE_PREEMPT_RCU kernel builds, RCU is instead implemented
40by rcu_preempt_state.
41
42On the other hand, if the offending CPU fails to print out a stall-warning
43message quickly enough, some other CPU will print a message similar to
44the following:
45
46INFO: rcu_bh_state detected stalls on CPUs/tasks: { 3 5 } (detected by 2, 2502 jiffies)
47
48This message indicates that CPU 2 detected that CPUs 3 and 5 were both
49causing stalls, and that the stall was affecting RCU-bh. This message
50will normally be followed by stack dumps for each CPU. Please note that
51TREE_PREEMPT_RCU builds can be stalled by tasks as well as by CPUs,
52and that the tasks will be indicated by PID, for example, "P3421".
53It is even possible for a rcu_preempt_state stall to be caused by both
54CPUs -and- tasks, in which case the offending CPUs and tasks will all
55be called out in the list.
56
57Finally, if the grace period ends just as the stall warning starts
58printing, there will be a spurious stall-warning message:
59
60INFO: rcu_bh_state detected stalls on CPUs/tasks: { } (detected by 4, 2502 jiffies)
61
62This is rare, but does happen from time to time in real life.
63
64So your kernel printed an RCU CPU stall warning. The next question is
65"What caused it?" The following problems can result in RCU CPU stall
66warnings:
29 67
30o A CPU looping in an RCU read-side critical section. 68o A CPU looping in an RCU read-side critical section.
31 69
32o A CPU looping with interrupts disabled. 70o A CPU looping with interrupts disabled. This condition can
71 result in RCU-sched and RCU-bh stalls.
33 72
34o A CPU looping with preemption disabled. 73o A CPU looping with preemption disabled. This condition can
74 result in RCU-sched stalls and, if ksoftirqd is in use, RCU-bh
75 stalls.
76
77o A CPU looping with bottom halves disabled. This condition can
78 result in RCU-sched and RCU-bh stalls.
35 79
36o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel 80o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel
37 without invoking schedule(). 81 without invoking schedule().
@@ -39,20 +83,24 @@ o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel
39o A bug in the RCU implementation. 83o A bug in the RCU implementation.
40 84
41o A hardware failure. This is quite unlikely, but has occurred 85o A hardware failure. This is quite unlikely, but has occurred
42 at least once in a former life. A CPU failed in a running system, 86 at least once in real life. A CPU failed in a running system,
43 becoming unresponsive, but not causing an immediate crash. 87 becoming unresponsive, but not causing an immediate crash.
44 This resulted in a series of RCU CPU stall warnings, eventually 88 This resulted in a series of RCU CPU stall warnings, eventually
45 leading the realization that the CPU had failed. 89 leading the realization that the CPU had failed.
46 90
47The RCU, RCU-sched, and RCU-bh implementations have CPU stall warning. 91The RCU, RCU-sched, and RCU-bh implementations have CPU stall
48SRCU does not do so directly, but its calls to synchronize_sched() will 92warning. SRCU does not have its own CPU stall warnings, but its
49result in RCU-sched detecting any CPU stalls that might be occurring. 93calls to synchronize_sched() will result in RCU-sched detecting
50 94RCU-sched-related CPU stalls. Please note that RCU only detects
51To diagnose the cause of the stall, inspect the stack traces. The offending 95CPU stalls when there is a grace period in progress. No grace period,
52function will usually be near the top of the stack. If you have a series 96no CPU stall warnings.
53of stall warnings from a single extended stall, comparing the stack traces 97
54can often help determine where the stall is occurring, which will usually 98To diagnose the cause of the stall, inspect the stack traces.
55be in the function nearest the top of the stack that stays the same from 99The offending function will usually be near the top of the stack.
56trace to trace. 100If you have a series of stall warnings from a single extended stall,
101comparing the stack traces can often help determine where the stall
102is occurring, which will usually be in the function nearest the top of
103that portion of the stack which remains the same from trace to trace.
104If you can reliably trigger the stall, ftrace can be quite helpful.
57 105
58RCU bugs can often be debugged with the help of CONFIG_RCU_TRACE. 106RCU bugs can often be debugged with the help of CONFIG_RCU_TRACE.
diff --git a/Documentation/RCU/torture.txt b/Documentation/RCU/torture.txt
index 0e50bc2aa1e2..5d9016795fd8 100644
--- a/Documentation/RCU/torture.txt
+++ b/Documentation/RCU/torture.txt
@@ -182,16 +182,6 @@ Similarly, sched_expedited RCU provides the following:
182 sched_expedited-torture: Reader Pipe: 12660320201 95875 0 0 0 0 0 0 0 0 0 182 sched_expedited-torture: Reader Pipe: 12660320201 95875 0 0 0 0 0 0 0 0 0
183 sched_expedited-torture: Reader Batch: 12660424885 0 0 0 0 0 0 0 0 0 0 183 sched_expedited-torture: Reader Batch: 12660424885 0 0 0 0 0 0 0 0 0 0
184 sched_expedited-torture: Free-Block Circulation: 1090795 1090795 1090794 1090793 1090792 1090791 1090790 1090789 1090788 1090787 0 184 sched_expedited-torture: Free-Block Circulation: 1090795 1090795 1090794 1090793 1090792 1090791 1090790 1090789 1090788 1090787 0
185 state: -1 / 0:0 3:0 4:0
186
187As before, the first four lines are similar to those for RCU.
188The last line shows the task-migration state. The first number is
189-1 if synchronize_sched_expedited() is idle, -2 if in the process of
190posting wakeups to the migration kthreads, and N when waiting on CPU N.
191Each of the colon-separated fields following the "/" is a CPU:state pair.
192Valid states are "0" for idle, "1" for waiting for quiescent state,
193"2" for passed through quiescent state, and "3" when a race with a
194CPU-hotplug event forces use of the synchronize_sched() primitive.
195 185
196 186
197USAGE 187USAGE
diff --git a/Documentation/RCU/trace.txt b/Documentation/RCU/trace.txt
index 8608fd85e921..efd8cc95c06b 100644
--- a/Documentation/RCU/trace.txt
+++ b/Documentation/RCU/trace.txt
@@ -256,23 +256,23 @@ o Each element of the form "1/1 0:127 ^0" represents one struct
256The output of "cat rcu/rcu_pending" looks as follows: 256The output of "cat rcu/rcu_pending" looks as follows:
257 257
258rcu_sched: 258rcu_sched:
259 0 np=255892 qsp=53936 cbr=0 cng=14417 gpc=10033 gps=24320 nf=6445 nn=146741 259 0 np=255892 qsp=53936 rpq=85 cbr=0 cng=14417 gpc=10033 gps=24320 nf=6445 nn=146741
260 1 np=261224 qsp=54638 cbr=0 cng=25723 gpc=16310 gps=2849 nf=5912 nn=155792 260 1 np=261224 qsp=54638 rpq=33 cbr=0 cng=25723 gpc=16310 gps=2849 nf=5912 nn=155792
261 2 np=237496 qsp=49664 cbr=0 cng=2762 gpc=45478 gps=1762 nf=1201 nn=136629 261 2 np=237496 qsp=49664 rpq=23 cbr=0 cng=2762 gpc=45478 gps=1762 nf=1201 nn=136629
262 3 np=236249 qsp=48766 cbr=0 cng=286 gpc=48049 gps=1218 nf=207 nn=137723 262 3 np=236249 qsp=48766 rpq=98 cbr=0 cng=286 gpc=48049 gps=1218 nf=207 nn=137723
263 4 np=221310 qsp=46850 cbr=0 cng=26 gpc=43161 gps=4634 nf=3529 nn=123110 263 4 np=221310 qsp=46850 rpq=7 cbr=0 cng=26 gpc=43161 gps=4634 nf=3529 nn=123110
264 5 np=237332 qsp=48449 cbr=0 cng=54 gpc=47920 gps=3252 nf=201 nn=137456 264 5 np=237332 qsp=48449 rpq=9 cbr=0 cng=54 gpc=47920 gps=3252 nf=201 nn=137456
265 6 np=219995 qsp=46718 cbr=0 cng=50 gpc=42098 gps=6093 nf=4202 nn=120834 265 6 np=219995 qsp=46718 rpq=12 cbr=0 cng=50 gpc=42098 gps=6093 nf=4202 nn=120834
266 7 np=249893 qsp=49390 cbr=0 cng=72 gpc=38400 gps=17102 nf=41 nn=144888 266 7 np=249893 qsp=49390 rpq=42 cbr=0 cng=72 gpc=38400 gps=17102 nf=41 nn=144888
267rcu_bh: 267rcu_bh:
268 0 np=146741 qsp=1419 cbr=0 cng=6 gpc=0 gps=0 nf=2 nn=145314 268 0 np=146741 qsp=1419 rpq=6 cbr=0 cng=6 gpc=0 gps=0 nf=2 nn=145314
269 1 np=155792 qsp=12597 cbr=0 cng=0 gpc=4 gps=8 nf=3 nn=143180 269 1 np=155792 qsp=12597 rpq=3 cbr=0 cng=0 gpc=4 gps=8 nf=3 nn=143180
270 2 np=136629 qsp=18680 cbr=0 cng=0 gpc=7 gps=6 nf=0 nn=117936 270 2 np=136629 qsp=18680 rpq=1 cbr=0 cng=0 gpc=7 gps=6 nf=0 nn=117936
271 3 np=137723 qsp=2843 cbr=0 cng=0 gpc=10 gps=7 nf=0 nn=134863 271 3 np=137723 qsp=2843 rpq=0 cbr=0 cng=0 gpc=10 gps=7 nf=0 nn=134863
272 4 np=123110 qsp=12433 cbr=0 cng=0 gpc=4 gps=2 nf=0 nn=110671 272 4 np=123110 qsp=12433 rpq=0 cbr=0 cng=0 gpc=4 gps=2 nf=0 nn=110671
273 5 np=137456 qsp=4210 cbr=0 cng=0 gpc=6 gps=5 nf=0 nn=133235 273 5 np=137456 qsp=4210 rpq=1 cbr=0 cng=0 gpc=6 gps=5 nf=0 nn=133235
274 6 np=120834 qsp=9902 cbr=0 cng=0 gpc=6 gps=3 nf=2 nn=110921 274 6 np=120834 qsp=9902 rpq=2 cbr=0 cng=0 gpc=6 gps=3 nf=2 nn=110921
275 7 np=144888 qsp=26336 cbr=0 cng=0 gpc=8 gps=2 nf=0 nn=118542 275 7 np=144888 qsp=26336 rpq=0 cbr=0 cng=0 gpc=8 gps=2 nf=0 nn=118542
276 276
277As always, this is once again split into "rcu_sched" and "rcu_bh" 277As always, this is once again split into "rcu_sched" and "rcu_bh"
278portions, with CONFIG_TREE_PREEMPT_RCU kernels having an additional 278portions, with CONFIG_TREE_PREEMPT_RCU kernels having an additional
@@ -284,6 +284,9 @@ o "np" is the number of times that __rcu_pending() has been invoked
284o "qsp" is the number of times that the RCU was waiting for a 284o "qsp" is the number of times that the RCU was waiting for a
285 quiescent state from this CPU. 285 quiescent state from this CPU.
286 286
287o "rpq" is the number of times that the CPU had passed through
288 a quiescent state, but not yet reported it to RCU.
289
287o "cbr" is the number of times that this CPU had RCU callbacks 290o "cbr" is the number of times that this CPU had RCU callbacks
288 that had passed through a grace period, and were thus ready 291 that had passed through a grace period, and were thus ready
289 to be invoked. 292 to be invoked.
diff --git a/Documentation/arm/00-INDEX b/Documentation/arm/00-INDEX
index 82e418d648d0..7f5fc3ba9c91 100644
--- a/Documentation/arm/00-INDEX
+++ b/Documentation/arm/00-INDEX
@@ -20,6 +20,8 @@ Samsung-S3C24XX
20 - S3C24XX ARM Linux Overview 20 - S3C24XX ARM Linux Overview
21Sharp-LH 21Sharp-LH
22 - Linux on Sharp LH79524 and LH7A40X System On a Chip (SOC) 22 - Linux on Sharp LH79524 and LH7A40X System On a Chip (SOC)
23SPEAr
24 - ST SPEAr platform Linux Overview
23VFP/ 25VFP/
24 - Release notes for Linux Kernel Vector Floating Point support code 26 - Release notes for Linux Kernel Vector Floating Point support code
25empeg/ 27empeg/
diff --git a/Documentation/arm/SPEAr/overview.txt b/Documentation/arm/SPEAr/overview.txt
new file mode 100644
index 000000000000..253a35c6f782
--- /dev/null
+++ b/Documentation/arm/SPEAr/overview.txt
@@ -0,0 +1,60 @@
1 SPEAr ARM Linux Overview
2 ==========================
3
4Introduction
5------------
6
7 SPEAr (Structured Processor Enhanced Architecture).
8 weblink : http://www.st.com/spear
9
10 The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are
11 supported by the 'spear' platform of ARM Linux. Currently SPEAr300,
12 SPEAr310, SPEAr320 and SPEAr600 SOCs are supported. Support for the SPEAr13XX
13 series is in progress.
14
15 Hierarchy in SPEAr is as follows:
16
17 SPEAr (Platform)
18 - SPEAr3XX (3XX SOC series, based on ARM9)
19 - SPEAr300 (SOC)
20 - SPEAr300_EVB (Evaluation Board)
21 - SPEAr310 (SOC)
22 - SPEAr310_EVB (Evaluation Board)
23 - SPEAr320 (SOC)
24 - SPEAr320_EVB (Evaluation Board)
25 - SPEAr6XX (6XX SOC series, based on ARM9)
26 - SPEAr600 (SOC)
27 - SPEAr600_EVB (Evaluation Board)
28 - SPEAr13XX (13XX SOC series, based on ARM CORTEXA9)
29 - SPEAr1300 (SOC)
30
31 Configuration
32 -------------
33
34 A generic configuration is provided for each machine, and can be used as the
35 default by
36 make spear600_defconfig
37 make spear300_defconfig
38 make spear310_defconfig
39 make spear320_defconfig
40
41 Layout
42 ------
43
44 The common files for multiple machine families (SPEAr3XX, SPEAr6XX and
45 SPEAr13XX) are located in the platform code contained in arch/arm/plat-spear
46 with headers in plat/.
47
48 Each machine series have a directory with name arch/arm/mach-spear followed by
49 series name. Like mach-spear3xx, mach-spear6xx and mach-spear13xx.
50
51 Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c and for
52 spear6xx is mach-spear6xx/spear6xx.c. mach-spear* also contain soc/machine
53 specific files, like spear300.c, spear310.c, spear320.c and spear600.c.
54 mach-spear* also contains board specific files for each machine type.
55
56
57 Document Author
58 ---------------
59
60 Viresh Kumar, (c) 2010 ST Microelectronics
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 05df0b7514b6..e7965f4a385a 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -520,29 +520,6 @@ Who: Hans de Goede <hdegoede@redhat.com>
520 520
521---------------------------- 521----------------------------
522 522
523What: corgikbd, spitzkbd, tosakbd driver
524When: 2.6.35
525Files: drivers/input/keyboard/{corgi,spitz,tosa}kbd.c
526Why: We now have a generic GPIO based matrix keyboard driver that
527 are fully capable of handling all the keys on these devices.
528 The original drivers manipulate the GPIO registers directly
529 and so are difficult to maintain.
530Who: Eric Miao <eric.y.miao@gmail.com>
531
532----------------------------
533
534What: corgi_ssp and corgi_ts driver
535When: 2.6.35
536Files: arch/arm/mach-pxa/corgi_ssp.c, drivers/input/touchscreen/corgi_ts.c
537Why: The corgi touchscreen is now deprecated in favour of the generic
538 ads7846.c driver. The noise reduction technique used in corgi_ts.c,
539 that's to wait till vsync before ADC sampling, is also integrated into
540 ads7846 driver now. Provided that the original driver is not generic
541 and is difficult to maintain, it will be removed later.
542Who: Eric Miao <eric.y.miao@gmail.com>
543
544----------------------------
545
546What: capifs 523What: capifs
547When: February 2011 524When: February 2011
548Files: drivers/isdn/capi/capifs.* 525Files: drivers/isdn/capi/capifs.*
@@ -564,6 +541,16 @@ Who: Avi Kivity <avi@redhat.com>
564 541
565---------------------------- 542----------------------------
566 543
544What: xtime, wall_to_monotonic
545When: 2.6.36+
546Files: kernel/time/timekeeping.c include/linux/time.h
547Why: Cleaning up timekeeping internal values. Please use
548 existing timekeeping accessor functions to access
549 the equivalent functionality.
550Who: John Stultz <johnstul@us.ibm.com>
551
552----------------------------
553
567What: KVM kernel-allocated memory slots 554What: KVM kernel-allocated memory slots
568When: July 2010 555When: July 2010
569Why: Since 2.6.25, kvm supports user-allocated memory slots, which are 556Why: Since 2.6.25, kvm supports user-allocated memory slots, which are
@@ -612,3 +599,13 @@ Why: The vtx device nodes have been superseded by vbi device nodes
612 provided by the vtx API, then that functionality should be build 599 provided by the vtx API, then that functionality should be build
613 around the sliced VBI API instead. 600 around the sliced VBI API instead.
614Who: Hans Verkuil <hverkuil@xs4all.nl> 601Who: Hans Verkuil <hverkuil@xs4all.nl>
602
603----------------------------
604
605What: IRQF_DISABLED
606When: 2.6.36
607Why: The flag is a NOOP as we run interrupt handlers with interrupts disabled
608Who: Thomas Gleixner <tglx@linutronix.de>
609
610----------------------------
611
diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt
index 1e359b62c40a..fbce915c9181 100644
--- a/Documentation/filesystems/proc.txt
+++ b/Documentation/filesystems/proc.txt
@@ -565,6 +565,10 @@ The default_smp_affinity mask applies to all non-active IRQs, which are the
565IRQs which have not yet been allocated/activated, and hence which lack a 565IRQs which have not yet been allocated/activated, and hence which lack a
566/proc/irq/[0-9]* directory. 566/proc/irq/[0-9]* directory.
567 567
568The node file on an SMP system shows the node to which the device using the IRQ
569reports itself as being attached. This hardware locality information does not
570include information about any possible driver locality preference.
571
568prof_cpu_mask specifies which CPUs are to be profiled by the system wide 572prof_cpu_mask specifies which CPUs are to be profiled by the system wide
569profiler. Default value is ffffffff (all cpus). 573profiler. Default value is ffffffff (all cpus).
570 574
diff --git a/Documentation/intel_txt.txt b/Documentation/intel_txt.txt
index f40a1f030019..87c8990dbbd9 100644
--- a/Documentation/intel_txt.txt
+++ b/Documentation/intel_txt.txt
@@ -161,13 +161,15 @@ o In order to put a system into any of the sleep states after a TXT
161 has been restored, it will restore the TPM PCRs and then 161 has been restored, it will restore the TPM PCRs and then
162 transfer control back to the kernel's S3 resume vector. 162 transfer control back to the kernel's S3 resume vector.
163 In order to preserve system integrity across S3, the kernel 163 In order to preserve system integrity across S3, the kernel
164 provides tboot with a set of memory ranges (kernel 164 provides tboot with a set of memory ranges (RAM and RESERVED_KERN
165 code/data/bss, S3 resume code, and AP trampoline) that tboot 165 in the e820 table, but not any memory that BIOS might alter over
166 will calculate a MAC (message authentication code) over and then 166 the S3 transition) that tboot will calculate a MAC (message
167 seal with the TPM. On resume and once the measured environment 167 authentication code) over and then seal with the TPM. On resume
168 has been re-established, tboot will re-calculate the MAC and 168 and once the measured environment has been re-established, tboot
169 verify it against the sealed value. Tboot's policy determines 169 will re-calculate the MAC and verify it against the sealed value.
170 what happens if the verification fails. 170 Tboot's policy determines what happens if the verification fails.
171 Note that the c/s 194 of tboot which has the new MAC code supports
172 this.
171 173
172That's pretty much it for TXT support. 174That's pretty much it for TXT support.
173 175
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 839b21b0699a..567b7a8eb878 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -324,6 +324,8 @@ and is between 256 and 4096 characters. It is defined in the file
324 they are unmapped. Otherwise they are 324 they are unmapped. Otherwise they are
325 flushed before they will be reused, which 325 flushed before they will be reused, which
326 is a lot of faster 326 is a lot of faster
327 off - do not initialize any AMD IOMMU found in
328 the system
327 329
328 amijoy.map= [HW,JOY] Amiga joystick support 330 amijoy.map= [HW,JOY] Amiga joystick support
329 Map of devices attached to JOY0DAT and JOY1DAT 331 Map of devices attached to JOY0DAT and JOY1DAT
@@ -784,8 +786,12 @@ and is between 256 and 4096 characters. It is defined in the file
784 as early as possible in order to facilitate early 786 as early as possible in order to facilitate early
785 boot debugging. 787 boot debugging.
786 788
787 ftrace_dump_on_oops 789 ftrace_dump_on_oops[=orig_cpu]
788 [FTRACE] will dump the trace buffers on oops. 790 [FTRACE] will dump the trace buffers on oops.
791 If no parameter is passed, ftrace will dump
792 buffers of all CPUs, but if you pass orig_cpu, it will
793 dump only the buffer of the CPU that triggered the
794 oops.
789 795
790 ftrace_filter=[function-list] 796 ftrace_filter=[function-list]
791 [FTRACE] Limit the functions traced by the function 797 [FTRACE] Limit the functions traced by the function
diff --git a/Documentation/kprobes.txt b/Documentation/kprobes.txt
index 2f9115c0ae62..61c291cddf18 100644
--- a/Documentation/kprobes.txt
+++ b/Documentation/kprobes.txt
@@ -165,8 +165,8 @@ the user entry_handler invocation is also skipped.
165 165
1661.4 How Does Jump Optimization Work? 1661.4 How Does Jump Optimization Work?
167 167
168If you configured your kernel with CONFIG_OPTPROBES=y (currently 168If your kernel is built with CONFIG_OPTPROBES=y (currently this flag
169this option is supported on x86/x86-64, non-preemptive kernel) and 169is automatically set 'y' on x86/x86-64, non-preemptive kernel) and
170the "debug.kprobes_optimization" kernel parameter is set to 1 (see 170the "debug.kprobes_optimization" kernel parameter is set to 1 (see
171sysctl(8)), Kprobes tries to reduce probe-hit overhead by using a jump 171sysctl(8)), Kprobes tries to reduce probe-hit overhead by using a jump
172instruction instead of a breakpoint instruction at each probepoint. 172instruction instead of a breakpoint instruction at each probepoint.
@@ -271,8 +271,6 @@ tweak the kernel's execution path, you need to suppress optimization,
271using one of the following techniques: 271using one of the following techniques:
272- Specify an empty function for the kprobe's post_handler or break_handler. 272- Specify an empty function for the kprobe's post_handler or break_handler.
273 or 273 or
274- Config CONFIG_OPTPROBES=n.
275 or
276- Execute 'sysctl -w debug.kprobes_optimization=n' 274- Execute 'sysctl -w debug.kprobes_optimization=n'
277 275
2782. Architectures Supported 2762. Architectures Supported
@@ -307,10 +305,6 @@ it useful to "Compile the kernel with debug info" (CONFIG_DEBUG_INFO),
307so you can use "objdump -d -l vmlinux" to see the source-to-object 305so you can use "objdump -d -l vmlinux" to see the source-to-object
308code mapping. 306code mapping.
309 307
310If you want to reduce probing overhead, set "Kprobes jump optimization
311support" (CONFIG_OPTPROBES) to "y". You can find this option under the
312"Kprobes" line.
313
3144. API Reference 3084. API Reference
315 309
316The Kprobes API includes a "register" function and an "unregister" 310The Kprobes API includes a "register" function and an "unregister"
diff --git a/Documentation/rbtree.txt b/Documentation/rbtree.txt
index aae8355d3166..221f38be98f4 100644
--- a/Documentation/rbtree.txt
+++ b/Documentation/rbtree.txt
@@ -190,3 +190,61 @@ Example:
190 for (node = rb_first(&mytree); node; node = rb_next(node)) 190 for (node = rb_first(&mytree); node; node = rb_next(node))
191 printk("key=%s\n", rb_entry(node, struct mytype, node)->keystring); 191 printk("key=%s\n", rb_entry(node, struct mytype, node)->keystring);
192 192
193Support for Augmented rbtrees
194-----------------------------
195
196Augmented rbtree is an rbtree with "some" additional data stored in each node.
197This data can be used to augment some new functionality to rbtree.
198Augmented rbtree is an optional feature built on top of basic rbtree
199infrastructure. rbtree user who wants this feature will have an augment
200callback function in rb_root initialized.
201
202This callback function will be called from rbtree core routines whenever
203a node has a change in one or both of its children. It is the responsibility
204of the callback function to recalculate the additional data that is in the
205rb node using new children information. Note that if this new additional
206data affects the parent node's additional data, then callback function has
207to handle it and do the recursive updates.
208
209
210Interval tree is an example of augmented rb tree. Reference -
211"Introduction to Algorithms" by Cormen, Leiserson, Rivest and Stein.
212More details about interval trees:
213
214Classical rbtree has a single key and it cannot be directly used to store
215interval ranges like [lo:hi] and do a quick lookup for any overlap with a new
216lo:hi or to find whether there is an exact match for a new lo:hi.
217
218However, rbtree can be augmented to store such interval ranges in a structured
219way making it possible to do efficient lookup and exact match.
220
221This "extra information" stored in each node is the maximum hi
222(max_hi) value among all the nodes that are its descendents. This
223information can be maintained at each node just be looking at the node
224and its immediate children. And this will be used in O(log n) lookup
225for lowest match (lowest start address among all possible matches)
226with something like:
227
228find_lowest_match(lo, hi, node)
229{
230 lowest_match = NULL;
231 while (node) {
232 if (max_hi(node->left) > lo) {
233 // Lowest overlap if any must be on left side
234 node = node->left;
235 } else if (overlap(lo, hi, node)) {
236 lowest_match = node;
237 break;
238 } else if (lo > node->lo) {
239 // Lowest overlap if any must be on right side
240 node = node->right;
241 } else {
242 break;
243 }
244 }
245 return lowest_match;
246}
247
248Finding exact match will be to first find lowest match and then to follow
249successor nodes looking for exact match, until the start of a node is beyond
250the hi value we are looking for.
diff --git a/Documentation/scheduler/sched-design-CFS.txt b/Documentation/scheduler/sched-design-CFS.txt
index 6f33593e59e2..8239ebbcddce 100644
--- a/Documentation/scheduler/sched-design-CFS.txt
+++ b/Documentation/scheduler/sched-design-CFS.txt
@@ -211,7 +211,7 @@ provide fair CPU time to each such task group. For example, it may be
211desirable to first provide fair CPU time to each user on the system and then to 211desirable to first provide fair CPU time to each user on the system and then to
212each task belonging to a user. 212each task belonging to a user.
213 213
214CONFIG_GROUP_SCHED strives to achieve exactly that. It lets tasks to be 214CONFIG_CGROUP_SCHED strives to achieve exactly that. It lets tasks to be
215grouped and divides CPU time fairly among such groups. 215grouped and divides CPU time fairly among such groups.
216 216
217CONFIG_RT_GROUP_SCHED permits to group real-time (i.e., SCHED_FIFO and 217CONFIG_RT_GROUP_SCHED permits to group real-time (i.e., SCHED_FIFO and
@@ -220,38 +220,11 @@ SCHED_RR) tasks.
220CONFIG_FAIR_GROUP_SCHED permits to group CFS (i.e., SCHED_NORMAL and 220CONFIG_FAIR_GROUP_SCHED permits to group CFS (i.e., SCHED_NORMAL and
221SCHED_BATCH) tasks. 221SCHED_BATCH) tasks.
222 222
223At present, there are two (mutually exclusive) mechanisms to group tasks for 223 These options need CONFIG_CGROUPS to be defined, and let the administrator
224CPU bandwidth control purposes:
225
226 - Based on user id (CONFIG_USER_SCHED)
227
228 With this option, tasks are grouped according to their user id.
229
230 - Based on "cgroup" pseudo filesystem (CONFIG_CGROUP_SCHED)
231
232 This options needs CONFIG_CGROUPS to be defined, and lets the administrator
233 create arbitrary groups of tasks, using the "cgroup" pseudo filesystem. See 224 create arbitrary groups of tasks, using the "cgroup" pseudo filesystem. See
234 Documentation/cgroups/cgroups.txt for more information about this filesystem. 225 Documentation/cgroups/cgroups.txt for more information about this filesystem.
235 226
236Only one of these options to group tasks can be chosen and not both. 227When CONFIG_FAIR_GROUP_SCHED is defined, a "cpu.shares" file is created for each
237
238When CONFIG_USER_SCHED is defined, a directory is created in sysfs for each new
239user and a "cpu_share" file is added in that directory.
240
241 # cd /sys/kernel/uids
242 # cat 512/cpu_share # Display user 512's CPU share
243 1024
244 # echo 2048 > 512/cpu_share # Modify user 512's CPU share
245 # cat 512/cpu_share # Display user 512's CPU share
246 2048
247 #
248
249CPU bandwidth between two users is divided in the ratio of their CPU shares.
250For example: if you would like user "root" to get twice the bandwidth of user
251"guest," then set the cpu_share for both the users such that "root"'s cpu_share
252is twice "guest"'s cpu_share.
253
254When CONFIG_CGROUP_SCHED is defined, a "cpu.shares" file is created for each
255group created using the pseudo filesystem. See example steps below to create 228group created using the pseudo filesystem. See example steps below to create
256task groups and modify their CPU share using the "cgroups" pseudo filesystem. 229task groups and modify their CPU share using the "cgroups" pseudo filesystem.
257 230
@@ -273,24 +246,3 @@ task groups and modify their CPU share using the "cgroups" pseudo filesystem.
273 246
274 # #Launch gmplayer (or your favourite movie player) 247 # #Launch gmplayer (or your favourite movie player)
275 # echo <movie_player_pid> > multimedia/tasks 248 # echo <movie_player_pid> > multimedia/tasks
276
2778. Implementation note: user namespaces
278
279User namespaces are intended to be hierarchical. But they are currently
280only partially implemented. Each of those has ramifications for CFS.
281
282First, since user namespaces are hierarchical, the /sys/kernel/uids
283presentation is inadequate. Eventually we will likely want to use sysfs
284tagging to provide private views of /sys/kernel/uids within each user
285namespace.
286
287Second, the hierarchical nature is intended to support completely
288unprivileged use of user namespaces. So if using user groups, then
289we want the users in a user namespace to be children of the user
290who created it.
291
292That is currently unimplemented. So instead, every user in a new
293user namespace will receive 1024 shares just like any user in the
294initial user namespace. Note that at the moment creation of a new
295user namespace requires each of CAP_SYS_ADMIN, CAP_SETUID, and
296CAP_SETGID.
diff --git a/Documentation/scheduler/sched-rt-group.txt b/Documentation/scheduler/sched-rt-group.txt
index 86eabe6c3419..605b0d40329d 100644
--- a/Documentation/scheduler/sched-rt-group.txt
+++ b/Documentation/scheduler/sched-rt-group.txt
@@ -126,23 +126,12 @@ priority!
1262.3 Basis for grouping tasks 1262.3 Basis for grouping tasks
127---------------------------- 127----------------------------
128 128
129There are two compile-time settings for allocating CPU bandwidth. These are 129Enabling CONFIG_RT_GROUP_SCHED lets you explicitly allocate real
130configured using the "Basis for grouping tasks" multiple choice menu under 130CPU bandwidth to task groups.
131General setup > Group CPU Scheduler:
132
133a. CONFIG_USER_SCHED (aka "Basis for grouping tasks" = "user id")
134
135This lets you use the virtual files under
136"/sys/kernel/uids/<uid>/cpu_rt_runtime_us" to control he CPU time reserved for
137each user .
138
139The other option is:
140
141.o CONFIG_CGROUP_SCHED (aka "Basis for grouping tasks" = "Control groups")
142 131
143This uses the /cgroup virtual file system and 132This uses the /cgroup virtual file system and
144"/cgroup/<cgroup>/cpu.rt_runtime_us" to control the CPU time reserved for each 133"/cgroup/<cgroup>/cpu.rt_runtime_us" to control the CPU time reserved for each
145control group instead. 134control group.
146 135
147For more information on working with control groups, you should read 136For more information on working with control groups, you should read
148Documentation/cgroups/cgroups.txt as well. 137Documentation/cgroups/cgroups.txt as well.
@@ -161,8 +150,7 @@ For now, this can be simplified to just the following (but see Future plans):
161=============== 150===============
162 151
163There is work in progress to make the scheduling period for each group 152There is work in progress to make the scheduling period for each group
164("/sys/kernel/uids/<uid>/cpu_rt_period_us" or 153("/cgroup/<cgroup>/cpu.rt_period_us") configurable as well.
165"/cgroup/<cgroup>/cpu.rt_period_us" respectively) configurable as well.
166 154
167The constraint on the period is that a subgroup must have a smaller or 155The constraint on the period is that a subgroup must have a smaller or
168equal period to its parent. But realistically its not very useful _yet_ 156equal period to its parent. But realistically its not very useful _yet_
diff --git a/Documentation/trace/events.txt b/Documentation/trace/events.txt
index 02ac6ed38b2d..778ddf38b82c 100644
--- a/Documentation/trace/events.txt
+++ b/Documentation/trace/events.txt
@@ -90,7 +90,8 @@ In order to facilitate early boot debugging, use boot option:
90 90
91 trace_event=[event-list] 91 trace_event=[event-list]
92 92
93The format of this boot option is the same as described in section 2.1. 93event-list is a comma separated list of events. See section 2.1 for event
94format.
94 95
953. Defining an event-enabled tracepoint 963. Defining an event-enabled tracepoint
96======================================= 97=======================================
diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt
index 03485bfbd797..557c1edeccaf 100644
--- a/Documentation/trace/ftrace.txt
+++ b/Documentation/trace/ftrace.txt
@@ -155,6 +155,9 @@ of ftrace. Here is a list of some of the key files:
155 to be traced. Echoing names of functions into this file 155 to be traced. Echoing names of functions into this file
156 will limit the trace to only those functions. 156 will limit the trace to only those functions.
157 157
158 This interface also allows for commands to be used. See the
159 "Filter commands" section for more details.
160
158 set_ftrace_notrace: 161 set_ftrace_notrace:
159 162
160 This has an effect opposite to that of 163 This has an effect opposite to that of
@@ -1337,12 +1340,14 @@ ftrace_dump_on_oops must be set. To set ftrace_dump_on_oops, one
1337can either use the sysctl function or set it via the proc system 1340can either use the sysctl function or set it via the proc system
1338interface. 1341interface.
1339 1342
1340 sysctl kernel.ftrace_dump_on_oops=1 1343 sysctl kernel.ftrace_dump_on_oops=n
1341 1344
1342or 1345or
1343 1346
1344 echo 1 > /proc/sys/kernel/ftrace_dump_on_oops 1347 echo n > /proc/sys/kernel/ftrace_dump_on_oops
1345 1348
1349If n = 1, ftrace will dump buffers of all CPUs, if n = 2 ftrace will
1350only dump the buffer of the CPU that triggered the oops.
1346 1351
1347Here's an example of such a dump after a null pointer 1352Here's an example of such a dump after a null pointer
1348dereference in a kernel module: 1353dereference in a kernel module:
@@ -1822,6 +1827,47 @@ this special filter via:
1822 echo > set_graph_function 1827 echo > set_graph_function
1823 1828
1824 1829
1830Filter commands
1831---------------
1832
1833A few commands are supported by the set_ftrace_filter interface.
1834Trace commands have the following format:
1835
1836<function>:<command>:<parameter>
1837
1838The following commands are supported:
1839
1840- mod
1841 This command enables function filtering per module. The
1842 parameter defines the module. For example, if only the write*
1843 functions in the ext3 module are desired, run:
1844
1845 echo 'write*:mod:ext3' > set_ftrace_filter
1846
1847 This command interacts with the filter in the same way as
1848 filtering based on function names. Thus, adding more functions
1849 in a different module is accomplished by appending (>>) to the
1850 filter file. Remove specific module functions by prepending
1851 '!':
1852
1853 echo '!writeback*:mod:ext3' >> set_ftrace_filter
1854
1855- traceon/traceoff
1856 These commands turn tracing on and off when the specified
1857 functions are hit. The parameter determines how many times the
1858 tracing system is turned on and off. If unspecified, there is
1859 no limit. For example, to disable tracing when a schedule bug
1860 is hit the first 5 times, run:
1861
1862 echo '__schedule_bug:traceoff:5' > set_ftrace_filter
1863
1864 These commands are cumulative whether or not they are appended
1865 to set_ftrace_filter. To remove a command, prepend it by '!'
1866 and drop the parameter:
1867
1868 echo '!__schedule_bug:traceoff' > set_ftrace_filter
1869
1870
1825trace_pipe 1871trace_pipe
1826---------- 1872----------
1827 1873
diff --git a/Documentation/trace/kprobetrace.txt b/Documentation/trace/kprobetrace.txt
index a9100b28eb84..ec94748ae65b 100644
--- a/Documentation/trace/kprobetrace.txt
+++ b/Documentation/trace/kprobetrace.txt
@@ -40,7 +40,9 @@ Synopsis of kprobe_events
40 $stack : Fetch stack address. 40 $stack : Fetch stack address.
41 $retval : Fetch return value.(*) 41 $retval : Fetch return value.(*)
42 +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(**) 42 +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(**)
43 NAME=FETCHARG: Set NAME as the argument name of FETCHARG. 43 NAME=FETCHARG : Set NAME as the argument name of FETCHARG.
44 FETCHARG:TYPE : Set TYPE as the type of FETCHARG. Currently, basic types
45 (u8/u16/u32/u64/s8/s16/s32/s64) are supported.
44 46
45 (*) only for return probe. 47 (*) only for return probe.
46 (**) this is useful for fetching a field of data structures. 48 (**) this is useful for fetching a field of data structures.
diff --git a/MAINTAINERS b/MAINTAINERS
index d5b0b1b6dc52..8e019486b006 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -586,6 +586,12 @@ F: drivers/mtd/nand/bcm_umi_bch.c
586F: drivers/mtd/nand/bcm_umi_hamming.c 586F: drivers/mtd/nand/bcm_umi_hamming.c
587F: drivers/mtd/nand/nand_bcm_umi.h 587F: drivers/mtd/nand/nand_bcm_umi.h
588 588
589ARM/CAVIUM NETWORKS CNS3XXX MACHINE SUPPORT
590M: Anton Vorontsov <avorontsov@mvista.com>
591S: Maintained
592F: arch/arm/mach-cns3xxx/
593T: git git://git.infradead.org/users/cbou/linux-cns3xxx.git
594
589ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE 595ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE
590M: Hartley Sweeten <hsweeten@visionengravers.com> 596M: Hartley Sweeten <hsweeten@visionengravers.com>
591M: Ryan Mallon <ryan@bluewatersys.com> 597M: Ryan Mallon <ryan@bluewatersys.com>
@@ -775,11 +781,10 @@ M: Philipp Zabel <philipp.zabel@gmail.com>
775S: Maintained 781S: Maintained
776 782
777ARM/Marvell Loki/Kirkwood/MV78xx0/Orion SOC support 783ARM/Marvell Loki/Kirkwood/MV78xx0/Orion SOC support
778M: Lennert Buytenhek <buytenh@marvell.com> 784M: Lennert Buytenhek <kernel@wantstofly.org>
779M: Nicolas Pitre <nico@marvell.com> 785M: Nicolas Pitre <nico@fluxnic.net>
780L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 786L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
781T: git git://git.marvell.com/orion 787S: Odd Fixes
782S: Maintained
783F: arch/arm/mach-loki/ 788F: arch/arm/mach-loki/
784F: arch/arm/mach-kirkwood/ 789F: arch/arm/mach-kirkwood/
785F: arch/arm/mach-mv78xx0/ 790F: arch/arm/mach-mv78xx0/
@@ -814,6 +819,7 @@ ARM/QUALCOMM MSM MACHINE SUPPORT
814M: David Brown <davidb@codeaurora.org> 819M: David Brown <davidb@codeaurora.org>
815M: Daniel Walker <dwalker@codeaurora.org> 820M: Daniel Walker <dwalker@codeaurora.org>
816M: Bryan Huntsman <bryanh@codeaurora.org> 821M: Bryan Huntsman <bryanh@codeaurora.org>
822L: linux-arm-msm@vger.kernel.org
817F: arch/arm/mach-msm/ 823F: arch/arm/mach-msm/
818F: drivers/video/msm/ 824F: drivers/video/msm/
819F: drivers/mmc/host/msm_sdcc.c 825F: drivers/mmc/host/msm_sdcc.c
@@ -994,6 +1000,20 @@ W: http://www.arm.linux.org.uk/
994S: Maintained 1000S: Maintained
995F: arch/arm/vfp/ 1001F: arch/arm/vfp/
996 1002
1003ARM/VOIPAC PXA270 SUPPORT
1004M: Marek Vasut <marek.vasut@gmail.com>
1005L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1006S: Maintained
1007F: arch/arm/mach-pxa/vpac270.c
1008F: arch/arm/mach-pxa/include/mach-pxa/vpac270.h
1009
1010ARM/ZIPIT Z2 SUPPORT
1011M: Marek Vasut <marek.vasut@gmail.com>
1012L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1013S: Maintained
1014F: arch/arm/mach-pxa/z2.c
1015F: arch/arm/mach-pxa/include/mach-pxa/z2.h
1016
997ASC7621 HARDWARE MONITOR DRIVER 1017ASC7621 HARDWARE MONITOR DRIVER
998M: George Joseph <george.joseph@fairview5.com> 1018M: George Joseph <george.joseph@fairview5.com>
999L: lm-sensors@lm-sensors.org 1019L: lm-sensors@lm-sensors.org
@@ -2953,6 +2973,17 @@ S: Odd Fixes
2953F: Documentation/networking/README.ipw2200 2973F: Documentation/networking/README.ipw2200
2954F: drivers/net/wireless/ipw2x00/ipw2200.* 2974F: drivers/net/wireless/ipw2x00/ipw2200.*
2955 2975
2976INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
2977M: Joseph Cihula <joseph.cihula@intel.com>
2978M: Shane Wang <shane.wang@intel.com>
2979L: tboot-devel@lists.sourceforge.net
2980W: http://tboot.sourceforge.net
2981T: Mercurial http://www.bughost.org/repos.hg/tboot.hg
2982S: Supported
2983F: Documentation/intel_txt.txt
2984F: include/linux/tboot.h
2985F: arch/x86/kernel/tboot.c
2986
2956INTEL WIRELESS WIMAX CONNECTION 2400 2987INTEL WIRELESS WIMAX CONNECTION 2400
2957M: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com> 2988M: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
2958M: linux-wimax@intel.com 2989M: linux-wimax@intel.com
@@ -3624,7 +3655,8 @@ F: drivers/net/wireless/mwl8k.c
3624 3655
3625MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER 3656MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER
3626M: Nicolas Pitre <nico@fluxnic.net> 3657M: Nicolas Pitre <nico@fluxnic.net>
3627S: Maintained 3658S: Odd Fixes
3659F: drivers/mmc/host/mvsdio.*
3628 3660
3629MARVELL YUKON / SYSKONNECT DRIVER 3661MARVELL YUKON / SYSKONNECT DRIVER
3630M: Mirko Lindner <mlindner@syskonnect.de> 3662M: Mirko Lindner <mlindner@syskonnect.de>
@@ -4165,6 +4197,7 @@ OPROFILE
4165M: Robert Richter <robert.richter@amd.com> 4197M: Robert Richter <robert.richter@amd.com>
4166L: oprofile-list@lists.sf.net 4198L: oprofile-list@lists.sf.net
4167S: Maintained 4199S: Maintained
4200F: arch/*/include/asm/oprofile*.h
4168F: arch/*/oprofile/ 4201F: arch/*/oprofile/
4169F: drivers/oprofile/ 4202F: drivers/oprofile/
4170F: include/linux/oprofile.h 4203F: include/linux/oprofile.h
@@ -4353,13 +4386,13 @@ M: Paul Mackerras <paulus@samba.org>
4353M: Ingo Molnar <mingo@elte.hu> 4386M: Ingo Molnar <mingo@elte.hu>
4354M: Arnaldo Carvalho de Melo <acme@redhat.com> 4387M: Arnaldo Carvalho de Melo <acme@redhat.com>
4355S: Supported 4388S: Supported
4356F: kernel/perf_event.c 4389F: kernel/perf_event*.c
4357F: include/linux/perf_event.h 4390F: include/linux/perf_event.h
4358F: arch/*/kernel/perf_event.c 4391F: arch/*/kernel/perf_event*.c
4359F: arch/*/kernel/*/perf_event.c 4392F: arch/*/kernel/*/perf_event*.c
4360F: arch/*/kernel/*/*/perf_event.c 4393F: arch/*/kernel/*/*/perf_event*.c
4361F: arch/*/include/asm/perf_event.h 4394F: arch/*/include/asm/perf_event.h
4362F: arch/*/lib/perf_event.c 4395F: arch/*/lib/perf_event*.c
4363F: arch/*/kernel/perf_callchain.c 4396F: arch/*/kernel/perf_callchain.c
4364F: tools/perf/ 4397F: tools/perf/
4365 4398
@@ -5121,7 +5154,7 @@ F: mm/sl?b.c
5121 5154
5122SMC91x ETHERNET DRIVER 5155SMC91x ETHERNET DRIVER
5123M: Nicolas Pitre <nico@fluxnic.net> 5156M: Nicolas Pitre <nico@fluxnic.net>
5124S: Maintained 5157S: Odd Fixes
5125F: drivers/net/smc91x.* 5158F: drivers/net/smc91x.*
5126 5159
5127SMSC47B397 HARDWARE MONITOR DRIVER 5160SMSC47B397 HARDWARE MONITOR DRIVER
@@ -5252,6 +5285,46 @@ F: drivers/serial/sunsu.c
5252F: drivers/serial/sunzilog.c 5285F: drivers/serial/sunzilog.c
5253F: drivers/serial/sunzilog.h 5286F: drivers/serial/sunzilog.h
5254 5287
5288SPEAR PLATFORM SUPPORT
5289M: Viresh Kumar <viresh.kumar@st.com>
5290W: http://www.st.com/spear
5291S: Maintained
5292F: arch/arm/plat-spear/
5293
5294SPEAR3XX MACHINE SUPPORT
5295M: Viresh Kumar <viresh.kumar@st.com>
5296W: http://www.st.com/spear
5297S: Maintained
5298F: arch/arm/mach-spear3xx/
5299
5300SPEAR6XX MACHINE SUPPORT
5301M: Rajeev Kumar <rajeev-dlh.kumar@st.com>
5302W: http://www.st.com/spear
5303S: Maintained
5304F: arch/arm/mach-spear6xx/
5305
5306SPEAR CLOCK FRAMEWORK SUPPORT
5307M: Viresh Kumar <viresh.kumar@st.com>
5308W: http://www.st.com/spear
5309S: Maintained
5310F: arch/arm/mach-spear*/clock.c
5311F: arch/arm/mach-spear*/include/mach/clkdev.h
5312F: arch/arm/plat-spear/clock.c
5313F: arch/arm/plat-spear/include/plat/clock.h and clkdev.h
5314
5315SPEAR PAD MULTIPLEXING SUPPORT
5316M: Viresh Kumar <viresh.kumar@st.com>
5317W: http://www.st.com/spear
5318S: Maintained
5319F: arch/arm/plat-spear/include/plat/padmux.h
5320F: arch/arm/plat-spear/padmux.c
5321F: arch/arm/mach-spear*/spear*xx.c
5322F: arch/arm/mach-spear*/include/mach/generic.h
5323F: arch/arm/mach-spear3xx/spear3*0.c
5324F: arch/arm/mach-spear3xx/spear3*0_evb.c
5325F: arch/arm/mach-spear6xx/spear600.c
5326F: arch/arm/mach-spear6xx/spear600_evb.c
5327
5255SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER 5328SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER
5256M: Roger Wolff <R.E.Wolff@BitWizard.nl> 5329M: Roger Wolff <R.E.Wolff@BitWizard.nl>
5257S: Supported 5330S: Supported
@@ -5492,7 +5565,7 @@ S: Maintained
5492F: drivers/mmc/host/tmio_mmc.* 5565F: drivers/mmc/host/tmio_mmc.*
5493 5566
5494TMPFS (SHMEM FILESYSTEM) 5567TMPFS (SHMEM FILESYSTEM)
5495M: Hugh Dickins <hugh.dickins@tiscali.co.uk> 5568M: Hugh Dickins <hughd@google.com>
5496L: linux-mm@kvack.org 5569L: linux-mm@kvack.org
5497S: Maintained 5570S: Maintained
5498F: include/linux/shmem_fs.h 5571F: include/linux/shmem_fs.h
diff --git a/Makefile b/Makefile
index 701bc65b3952..ebc8225f7a96 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 2 1VERSION = 2
2PATCHLEVEL = 6 2PATCHLEVEL = 6
3SUBLEVEL = 34 3SUBLEVEL = 34
4EXTRAVERSION = -rc7 4EXTRAVERSION =
5NAME = Sheep on Meth 5NAME = Sheep on Meth
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/arch/Kconfig b/arch/Kconfig
index e5eb1337a537..acda512da2e2 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -42,15 +42,10 @@ config KPROBES
42 If in doubt, say "N". 42 If in doubt, say "N".
43 43
44config OPTPROBES 44config OPTPROBES
45 bool "Kprobes jump optimization support (EXPERIMENTAL)" 45 def_bool y
46 default y 46 depends on KPROBES && HAVE_OPTPROBES
47 depends on KPROBES
48 depends on !PREEMPT 47 depends on !PREEMPT
49 depends on HAVE_OPTPROBES
50 select KALLSYMS_ALL 48 select KALLSYMS_ALL
51 help
52 This option will allow kprobes to optimize breakpoint to
53 a jump for reducing its overhead.
54 49
55config HAVE_EFFICIENT_UNALIGNED_ACCESS 50config HAVE_EFFICIENT_UNALIGNED_ACCESS
56 bool 51 bool
@@ -142,6 +137,17 @@ config HAVE_HW_BREAKPOINT
142 bool 137 bool
143 depends on PERF_EVENTS 138 depends on PERF_EVENTS
144 139
140config HAVE_MIXED_BREAKPOINTS_REGS
141 bool
142 depends on HAVE_HW_BREAKPOINT
143 help
144 Depending on the arch implementation of hardware breakpoints,
145 some of them have separate registers for data and instruction
146 breakpoints addresses, others have mixed registers to store
147 them but define the access type in a control register.
148 Select this option if your arch implements breakpoints under the
149 latter fashion.
150
145config HAVE_USER_RETURN_NOTIFIER 151config HAVE_USER_RETURN_NOTIFIER
146 bool 152 bool
147 153
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 75291fdd379f..b7193986cbf9 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -55,6 +55,9 @@ config ARCH_USES_GETTIMEOFFSET
55 bool 55 bool
56 default y 56 default y
57 57
58config GENERIC_CMOS_UPDATE
59 def_bool y
60
58config ZONE_DMA 61config ZONE_DMA
59 bool 62 bool
60 default y 63 default y
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index 610dff44d94b..e756d04b6cd5 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -17,8 +17,8 @@
17#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) 17#define ATOMIC_INIT(i) ( (atomic_t) { (i) } )
18#define ATOMIC64_INIT(i) ( (atomic64_t) { (i) } ) 18#define ATOMIC64_INIT(i) ( (atomic64_t) { (i) } )
19 19
20#define atomic_read(v) ((v)->counter + 0) 20#define atomic_read(v) (*(volatile int *)&(v)->counter)
21#define atomic64_read(v) ((v)->counter + 0) 21#define atomic64_read(v) (*(volatile long *)&(v)->counter)
22 22
23#define atomic_set(v,i) ((v)->counter = (i)) 23#define atomic_set(v,i) ((v)->counter = (i))
24#define atomic64_set(v,i) ((v)->counter = (i)) 24#define atomic64_set(v,i) ((v)->counter = (i))
diff --git a/arch/alpha/include/asm/bitops.h b/arch/alpha/include/asm/bitops.h
index 15f3ae25c511..296da1d5ed57 100644
--- a/arch/alpha/include/asm/bitops.h
+++ b/arch/alpha/include/asm/bitops.h
@@ -405,29 +405,31 @@ static inline int fls(int x)
405 405
406#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) 406#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
407/* Whee. EV67 can calculate it directly. */ 407/* Whee. EV67 can calculate it directly. */
408static inline unsigned long hweight64(unsigned long w) 408static inline unsigned long __arch_hweight64(unsigned long w)
409{ 409{
410 return __kernel_ctpop(w); 410 return __kernel_ctpop(w);
411} 411}
412 412
413static inline unsigned int hweight32(unsigned int w) 413static inline unsigned int __arch_weight32(unsigned int w)
414{ 414{
415 return hweight64(w); 415 return __arch_hweight64(w);
416} 416}
417 417
418static inline unsigned int hweight16(unsigned int w) 418static inline unsigned int __arch_hweight16(unsigned int w)
419{ 419{
420 return hweight64(w & 0xffff); 420 return __arch_hweight64(w & 0xffff);
421} 421}
422 422
423static inline unsigned int hweight8(unsigned int w) 423static inline unsigned int __arch_hweight8(unsigned int w)
424{ 424{
425 return hweight64(w & 0xff); 425 return __arch_hweight64(w & 0xff);
426} 426}
427#else 427#else
428#include <asm-generic/bitops/hweight.h> 428#include <asm-generic/bitops/arch_hweight.h>
429#endif 429#endif
430 430
431#include <asm-generic/bitops/const_hweight.h>
432
431#endif /* __KERNEL__ */ 433#endif /* __KERNEL__ */
432 434
433#include <asm-generic/bitops/find.h> 435#include <asm-generic/bitops/find.h>
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index 5d0826654c61..5465e932e568 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -75,8 +75,6 @@ static struct {
75 __u32 last_time; 75 __u32 last_time;
76 /* ticks/cycle * 2^48 */ 76 /* ticks/cycle * 2^48 */
77 unsigned long scaled_ticks_per_cycle; 77 unsigned long scaled_ticks_per_cycle;
78 /* last time the CMOS clock got updated */
79 time_t last_rtc_update;
80 /* partial unused tick */ 78 /* partial unused tick */
81 unsigned long partial_tick; 79 unsigned long partial_tick;
82} state; 80} state;
@@ -91,6 +89,52 @@ static inline __u32 rpcc(void)
91 return result; 89 return result;
92} 90}
93 91
92int update_persistent_clock(struct timespec now)
93{
94 return set_rtc_mmss(now.tv_sec);
95}
96
97void read_persistent_clock(struct timespec *ts)
98{
99 unsigned int year, mon, day, hour, min, sec, epoch;
100
101 sec = CMOS_READ(RTC_SECONDS);
102 min = CMOS_READ(RTC_MINUTES);
103 hour = CMOS_READ(RTC_HOURS);
104 day = CMOS_READ(RTC_DAY_OF_MONTH);
105 mon = CMOS_READ(RTC_MONTH);
106 year = CMOS_READ(RTC_YEAR);
107
108 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
109 sec = bcd2bin(sec);
110 min = bcd2bin(min);
111 hour = bcd2bin(hour);
112 day = bcd2bin(day);
113 mon = bcd2bin(mon);
114 year = bcd2bin(year);
115 }
116
117 /* PC-like is standard; used for year >= 70 */
118 epoch = 1900;
119 if (year < 20)
120 epoch = 2000;
121 else if (year >= 20 && year < 48)
122 /* NT epoch */
123 epoch = 1980;
124 else if (year >= 48 && year < 70)
125 /* Digital UNIX epoch */
126 epoch = 1952;
127
128 printk(KERN_INFO "Using epoch = %d\n", epoch);
129
130 if ((year += epoch) < 1970)
131 year += 100;
132
133 ts->tv_sec = mktime(year, mon, day, hour, min, sec);
134}
135
136
137
94/* 138/*
95 * timer_interrupt() needs to keep up the real-time clock, 139 * timer_interrupt() needs to keep up the real-time clock,
96 * as well as call the "do_timer()" routine every clocktick 140 * as well as call the "do_timer()" routine every clocktick
@@ -123,19 +167,6 @@ irqreturn_t timer_interrupt(int irq, void *dev)
123 if (nticks) 167 if (nticks)
124 do_timer(nticks); 168 do_timer(nticks);
125 169
126 /*
127 * If we have an externally synchronized Linux clock, then update
128 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
129 * called as close as possible to 500 ms before the new second starts.
130 */
131 if (ntp_synced()
132 && xtime.tv_sec > state.last_rtc_update + 660
133 && xtime.tv_nsec >= 500000 - ((unsigned) TICK_SIZE) / 2
134 && xtime.tv_nsec <= 500000 + ((unsigned) TICK_SIZE) / 2) {
135 int tmp = set_rtc_mmss(xtime.tv_sec);
136 state.last_rtc_update = xtime.tv_sec - (tmp ? 600 : 0);
137 }
138
139 write_sequnlock(&xtime_lock); 170 write_sequnlock(&xtime_lock);
140 171
141#ifndef CONFIG_SMP 172#ifndef CONFIG_SMP
@@ -304,7 +335,7 @@ rpcc_after_update_in_progress(void)
304void __init 335void __init
305time_init(void) 336time_init(void)
306{ 337{
307 unsigned int year, mon, day, hour, min, sec, cc1, cc2, epoch; 338 unsigned int cc1, cc2;
308 unsigned long cycle_freq, tolerance; 339 unsigned long cycle_freq, tolerance;
309 long diff; 340 long diff;
310 341
@@ -348,43 +379,6 @@ time_init(void)
348 bogomips yet, but this is close on a 500Mhz box. */ 379 bogomips yet, but this is close on a 500Mhz box. */
349 __delay(1000000); 380 __delay(1000000);
350 381
351 sec = CMOS_READ(RTC_SECONDS);
352 min = CMOS_READ(RTC_MINUTES);
353 hour = CMOS_READ(RTC_HOURS);
354 day = CMOS_READ(RTC_DAY_OF_MONTH);
355 mon = CMOS_READ(RTC_MONTH);
356 year = CMOS_READ(RTC_YEAR);
357
358 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
359 sec = bcd2bin(sec);
360 min = bcd2bin(min);
361 hour = bcd2bin(hour);
362 day = bcd2bin(day);
363 mon = bcd2bin(mon);
364 year = bcd2bin(year);
365 }
366
367 /* PC-like is standard; used for year >= 70 */
368 epoch = 1900;
369 if (year < 20)
370 epoch = 2000;
371 else if (year >= 20 && year < 48)
372 /* NT epoch */
373 epoch = 1980;
374 else if (year >= 48 && year < 70)
375 /* Digital UNIX epoch */
376 epoch = 1952;
377
378 printk(KERN_INFO "Using epoch = %d\n", epoch);
379
380 if ((year += epoch) < 1970)
381 year += 100;
382
383 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
384 xtime.tv_nsec = 0;
385
386 wall_to_monotonic.tv_sec -= xtime.tv_sec;
387 wall_to_monotonic.tv_nsec = 0;
388 382
389 if (HZ > (1<<16)) { 383 if (HZ > (1<<16)) {
390 extern void __you_loose (void); 384 extern void __you_loose (void);
@@ -394,7 +388,6 @@ time_init(void)
394 state.last_time = cc1; 388 state.last_time = cc1;
395 state.scaled_ticks_per_cycle 389 state.scaled_ticks_per_cycle
396 = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq; 390 = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq;
397 state.last_rtc_update = 0;
398 state.partial_tick = 0L; 391 state.partial_tick = 0L;
399 392
400 /* Startup the timer source. */ 393 /* Startup the timer source. */
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 92622eb5cc0d..2d70cece2ea2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -13,7 +13,7 @@ config ARM
13 select RTC_LIB 13 select RTC_LIB
14 select SYS_SUPPORTS_APM_EMULATION 14 select SYS_SUPPORTS_APM_EMULATION
15 select GENERIC_ATOMIC64 if (!CPU_32v6K) 15 select GENERIC_ATOMIC64 if (!CPU_32v6K)
16 select HAVE_OPROFILE 16 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
17 select HAVE_ARCH_KGDB 17 select HAVE_ARCH_KGDB
18 select HAVE_KPROBES if (!XIP_KERNEL) 18 select HAVE_KPROBES if (!XIP_KERNEL)
19 select HAVE_KRETPROBES if (HAVE_KPROBES) 19 select HAVE_KRETPROBES if (HAVE_KPROBES)
@@ -21,6 +21,7 @@ config ARM
21 select HAVE_GENERIC_DMA_COHERENT 21 select HAVE_GENERIC_DMA_COHERENT
22 select HAVE_KERNEL_GZIP 22 select HAVE_KERNEL_GZIP
23 select HAVE_KERNEL_LZO 23 select HAVE_KERNEL_LZO
24 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS 25 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC 26 select PERF_USE_VMALLOC
26 help 27 help
@@ -42,6 +43,11 @@ config GENERIC_GPIO
42 43
43config GENERIC_TIME 44config GENERIC_TIME
44 bool 45 bool
46 default y
47
48config ARCH_USES_GETTIMEOFFSET
49 bool
50 default n
45 51
46config GENERIC_CLOCKEVENTS 52config GENERIC_CLOCKEVENTS
47 bool 53 bool
@@ -175,28 +181,6 @@ config ARM_L1_CACHE_SHIFT_6
175 help 181 help
176 Setting ARM L1 cache line size to 64 Bytes. 182 Setting ARM L1 cache line size to 64 Bytes.
177 183
178if OPROFILE
179
180config OPROFILE_ARMV6
181 def_bool y
182 depends on CPU_V6 && !SMP
183 select OPROFILE_ARM11_CORE
184
185config OPROFILE_MPCORE
186 def_bool y
187 depends on CPU_V6 && SMP
188 select OPROFILE_ARM11_CORE
189
190config OPROFILE_ARM11_CORE
191 bool
192
193config OPROFILE_ARMV7
194 def_bool y
195 depends on CPU_V7 && !SMP
196 bool
197
198endif
199
200config VECTORS_BASE 184config VECTORS_BASE
201 hex 185 hex
202 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 186 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
@@ -231,6 +215,7 @@ config ARCH_AAEC2000
231 select CPU_ARM920T 215 select CPU_ARM920T
232 select ARM_AMBA 216 select ARM_AMBA
233 select HAVE_CLK 217 select HAVE_CLK
218 select ARCH_USES_GETTIMEOFFSET
234 help 219 help
235 This enables support for systems based on the Agilent AAEC-2000 220 This enables support for systems based on the Agilent AAEC-2000
236 221
@@ -238,21 +223,22 @@ config ARCH_INTEGRATOR
238 bool "ARM Ltd. Integrator family" 223 bool "ARM Ltd. Integrator family"
239 select ARM_AMBA 224 select ARM_AMBA
240 select ARCH_HAS_CPUFREQ 225 select ARCH_HAS_CPUFREQ
241 select HAVE_CLK
242 select COMMON_CLKDEV 226 select COMMON_CLKDEV
243 select ICST525 227 select ICST
228 select GENERIC_CLOCKEVENTS
229 select PLAT_VERSATILE
244 help 230 help
245 Support for ARM's Integrator platform. 231 Support for ARM's Integrator platform.
246 232
247config ARCH_REALVIEW 233config ARCH_REALVIEW
248 bool "ARM Ltd. RealView family" 234 bool "ARM Ltd. RealView family"
249 select ARM_AMBA 235 select ARM_AMBA
250 select HAVE_CLK
251 select COMMON_CLKDEV 236 select COMMON_CLKDEV
252 select ICST307 237 select ICST
253 select GENERIC_TIME
254 select GENERIC_CLOCKEVENTS 238 select GENERIC_CLOCKEVENTS
255 select ARCH_WANT_OPTIONAL_GPIOLIB 239 select ARCH_WANT_OPTIONAL_GPIOLIB
240 select PLAT_VERSATILE
241 select ARM_TIMER_SP804
256 select GPIO_PL061 if GPIOLIB 242 select GPIO_PL061 if GPIOLIB
257 help 243 help
258 This enables support for ARM Ltd RealView boards. 244 This enables support for ARM Ltd RealView boards.
@@ -261,20 +247,33 @@ config ARCH_VERSATILE
261 bool "ARM Ltd. Versatile family" 247 bool "ARM Ltd. Versatile family"
262 select ARM_AMBA 248 select ARM_AMBA
263 select ARM_VIC 249 select ARM_VIC
264 select HAVE_CLK
265 select COMMON_CLKDEV 250 select COMMON_CLKDEV
266 select ICST307 251 select ICST
267 select GENERIC_TIME
268 select GENERIC_CLOCKEVENTS 252 select GENERIC_CLOCKEVENTS
269 select ARCH_WANT_OPTIONAL_GPIOLIB 253 select ARCH_WANT_OPTIONAL_GPIOLIB
254 select PLAT_VERSATILE
255 select ARM_TIMER_SP804
270 help 256 help
271 This enables support for ARM Ltd Versatile board. 257 This enables support for ARM Ltd Versatile board.
272 258
259config ARCH_VEXPRESS
260 bool "ARM Ltd. Versatile Express family"
261 select ARCH_WANT_OPTIONAL_GPIOLIB
262 select ARM_AMBA
263 select ARM_TIMER_SP804
264 select COMMON_CLKDEV
265 select GENERIC_CLOCKEVENTS
266 select HAVE_CLK
267 select ICST
268 select PLAT_VERSATILE
269 help
270 This enables support for the ARM Ltd Versatile Express boards.
271
273config ARCH_AT91 272config ARCH_AT91
274 bool "Atmel AT91" 273 bool "Atmel AT91"
275 select GENERIC_GPIO
276 select ARCH_REQUIRE_GPIOLIB 274 select ARCH_REQUIRE_GPIOLIB
277 select HAVE_CLK 275 select HAVE_CLK
276 select ARCH_USES_GETTIMEOFFSET
278 help 277 help
279 This enables support for systems based on the Atmel AT91RM9200, 278 This enables support for systems based on the Atmel AT91RM9200,
280 AT91SAM9 and AT91CAP9 processors. 279 AT91SAM9 and AT91CAP9 processors.
@@ -285,7 +284,6 @@ config ARCH_BCMRING
285 select CPU_V6 284 select CPU_V6
286 select ARM_AMBA 285 select ARM_AMBA
287 select COMMON_CLKDEV 286 select COMMON_CLKDEV
288 select GENERIC_TIME
289 select GENERIC_CLOCKEVENTS 287 select GENERIC_CLOCKEVENTS
290 select ARCH_WANT_OPTIONAL_GPIOLIB 288 select ARCH_WANT_OPTIONAL_GPIOLIB
291 help 289 help
@@ -294,14 +292,23 @@ config ARCH_BCMRING
294config ARCH_CLPS711X 292config ARCH_CLPS711X
295 bool "Cirrus Logic CLPS711x/EP721x-based" 293 bool "Cirrus Logic CLPS711x/EP721x-based"
296 select CPU_ARM720T 294 select CPU_ARM720T
295 select ARCH_USES_GETTIMEOFFSET
297 help 296 help
298 Support for Cirrus Logic 711x/721x based boards. 297 Support for Cirrus Logic 711x/721x based boards.
299 298
299config ARCH_CNS3XXX
300 bool "Cavium Networks CNS3XXX family"
301 select CPU_V6
302 select GENERIC_CLOCKEVENTS
303 select ARM_GIC
304 help
305 Support for Cavium Networks CNS3XXX platform.
306
300config ARCH_GEMINI 307config ARCH_GEMINI
301 bool "Cortina Systems Gemini" 308 bool "Cortina Systems Gemini"
302 select CPU_FA526 309 select CPU_FA526
303 select GENERIC_GPIO
304 select ARCH_REQUIRE_GPIOLIB 310 select ARCH_REQUIRE_GPIOLIB
311 select ARCH_USES_GETTIMEOFFSET
305 help 312 help
306 Support for the Cortina Systems Gemini family SoCs 313 Support for the Cortina Systems Gemini family SoCs
307 314
@@ -310,6 +317,7 @@ config ARCH_EBSA110
310 select CPU_SA110 317 select CPU_SA110
311 select ISA 318 select ISA
312 select NO_IOPORT 319 select NO_IOPORT
320 select ARCH_USES_GETTIMEOFFSET
313 help 321 help
314 This is an evaluation board for the StrongARM processor available 322 This is an evaluation board for the StrongARM processor available
315 from Digital. It has limited hardware on-board, including an 323 from Digital. It has limited hardware on-board, including an
@@ -321,11 +329,10 @@ config ARCH_EP93XX
321 select CPU_ARM920T 329 select CPU_ARM920T
322 select ARM_AMBA 330 select ARM_AMBA
323 select ARM_VIC 331 select ARM_VIC
324 select GENERIC_GPIO
325 select HAVE_CLK
326 select COMMON_CLKDEV 332 select COMMON_CLKDEV
327 select ARCH_REQUIRE_GPIOLIB 333 select ARCH_REQUIRE_GPIOLIB
328 select ARCH_HAS_HOLES_MEMORYMODEL 334 select ARCH_HAS_HOLES_MEMORYMODEL
335 select ARCH_USES_GETTIMEOFFSET
329 help 336 help
330 This enables support for the Cirrus EP93xx series of CPUs. 337 This enables support for the Cirrus EP93xx series of CPUs.
331 338
@@ -333,16 +340,15 @@ config ARCH_FOOTBRIDGE
333 bool "FootBridge" 340 bool "FootBridge"
334 select CPU_SA110 341 select CPU_SA110
335 select FOOTBRIDGE 342 select FOOTBRIDGE
343 select ARCH_USES_GETTIMEOFFSET
336 help 344 help
337 Support for systems based on the DC21285 companion chip 345 Support for systems based on the DC21285 companion chip
338 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 346 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
339 347
340config ARCH_MXC 348config ARCH_MXC
341 bool "Freescale MXC/iMX-based" 349 bool "Freescale MXC/iMX-based"
342 select GENERIC_TIME
343 select GENERIC_CLOCKEVENTS 350 select GENERIC_CLOCKEVENTS
344 select ARCH_REQUIRE_GPIOLIB 351 select ARCH_REQUIRE_GPIOLIB
345 select HAVE_CLK
346 select COMMON_CLKDEV 352 select COMMON_CLKDEV
347 help 353 help
348 Support for Freescale MXC/iMX-based family of processors 354 Support for Freescale MXC/iMX-based family of processors
@@ -350,12 +356,9 @@ config ARCH_MXC
350config ARCH_STMP3XXX 356config ARCH_STMP3XXX
351 bool "Freescale STMP3xxx" 357 bool "Freescale STMP3xxx"
352 select CPU_ARM926T 358 select CPU_ARM926T
353 select HAVE_CLK
354 select COMMON_CLKDEV 359 select COMMON_CLKDEV
355 select ARCH_REQUIRE_GPIOLIB 360 select ARCH_REQUIRE_GPIOLIB
356 select GENERIC_TIME
357 select GENERIC_CLOCKEVENTS 361 select GENERIC_CLOCKEVENTS
358 select GENERIC_GPIO
359 select USB_ARCH_HAS_EHCI 362 select USB_ARCH_HAS_EHCI
360 help 363 help
361 Support for systems based on the Freescale 3xxx CPUs. 364 Support for systems based on the Freescale 3xxx CPUs.
@@ -365,7 +368,6 @@ config ARCH_NETX
365 select CPU_ARM926T 368 select CPU_ARM926T
366 select ARM_VIC 369 select ARM_VIC
367 select GENERIC_CLOCKEVENTS 370 select GENERIC_CLOCKEVENTS
368 select GENERIC_TIME
369 help 371 help
370 This enables support for systems based on the Hilscher NetX Soc 372 This enables support for systems based on the Hilscher NetX Soc
371 373
@@ -373,6 +375,7 @@ config ARCH_H720X
373 bool "Hynix HMS720x-based" 375 bool "Hynix HMS720x-based"
374 select CPU_ARM720T 376 select CPU_ARM720T
375 select ISA_DMA_API 377 select ISA_DMA_API
378 select ARCH_USES_GETTIMEOFFSET
376 help 379 help
377 This enables support for systems based on the Hynix HMS720x 380 This enables support for systems based on the Hynix HMS720x
378 381
@@ -393,7 +396,6 @@ config ARCH_IOP32X
393 select CPU_XSCALE 396 select CPU_XSCALE
394 select PLAT_IOP 397 select PLAT_IOP
395 select PCI 398 select PCI
396 select GENERIC_GPIO
397 select ARCH_REQUIRE_GPIOLIB 399 select ARCH_REQUIRE_GPIOLIB
398 help 400 help
399 Support for Intel's 80219 and IOP32X (XScale) family of 401 Support for Intel's 80219 and IOP32X (XScale) family of
@@ -405,7 +407,6 @@ config ARCH_IOP33X
405 select CPU_XSCALE 407 select CPU_XSCALE
406 select PLAT_IOP 408 select PLAT_IOP
407 select PCI 409 select PCI
408 select GENERIC_GPIO
409 select ARCH_REQUIRE_GPIOLIB 410 select ARCH_REQUIRE_GPIOLIB
410 help 411 help
411 Support for Intel's IOP33X (XScale) family of processors. 412 Support for Intel's IOP33X (XScale) family of processors.
@@ -415,6 +416,7 @@ config ARCH_IXP23XX
415 depends on MMU 416 depends on MMU
416 select CPU_XSC3 417 select CPU_XSC3
417 select PCI 418 select PCI
419 select ARCH_USES_GETTIMEOFFSET
418 help 420 help
419 Support for Intel's IXP23xx (XScale) family of processors. 421 Support for Intel's IXP23xx (XScale) family of processors.
420 422
@@ -423,6 +425,7 @@ config ARCH_IXP2000
423 depends on MMU 425 depends on MMU
424 select CPU_XSCALE 426 select CPU_XSCALE
425 select PCI 427 select PCI
428 select ARCH_USES_GETTIMEOFFSET
426 help 429 help
427 Support for Intel's IXP2400/2800 (XScale) family of processors. 430 Support for Intel's IXP2400/2800 (XScale) family of processors.
428 431
@@ -431,7 +434,6 @@ config ARCH_IXP4XX
431 depends on MMU 434 depends on MMU
432 select CPU_XSCALE 435 select CPU_XSCALE
433 select GENERIC_GPIO 436 select GENERIC_GPIO
434 select GENERIC_TIME
435 select GENERIC_CLOCKEVENTS 437 select GENERIC_CLOCKEVENTS
436 select DMABOUNCE if PCI 438 select DMABOUNCE if PCI
437 help 439 help
@@ -441,6 +443,7 @@ config ARCH_L7200
441 bool "LinkUp-L7200" 443 bool "LinkUp-L7200"
442 select CPU_ARM720T 444 select CPU_ARM720T
443 select FIQ 445 select FIQ
446 select ARCH_USES_GETTIMEOFFSET
444 help 447 help
445 Say Y here if you intend to run this kernel on a LinkUp Systems 448 Say Y here if you intend to run this kernel on a LinkUp Systems
446 L7200 Software Development Board which uses an ARM720T processor. 449 L7200 Software Development Board which uses an ARM720T processor.
@@ -454,9 +457,7 @@ config ARCH_L7200
454config ARCH_DOVE 457config ARCH_DOVE
455 bool "Marvell Dove" 458 bool "Marvell Dove"
456 select PCI 459 select PCI
457 select GENERIC_GPIO
458 select ARCH_REQUIRE_GPIOLIB 460 select ARCH_REQUIRE_GPIOLIB
459 select GENERIC_TIME
460 select GENERIC_CLOCKEVENTS 461 select GENERIC_CLOCKEVENTS
461 select PLAT_ORION 462 select PLAT_ORION
462 help 463 help
@@ -466,9 +467,7 @@ config ARCH_KIRKWOOD
466 bool "Marvell Kirkwood" 467 bool "Marvell Kirkwood"
467 select CPU_FEROCEON 468 select CPU_FEROCEON
468 select PCI 469 select PCI
469 select GENERIC_GPIO
470 select ARCH_REQUIRE_GPIOLIB 470 select ARCH_REQUIRE_GPIOLIB
471 select GENERIC_TIME
472 select GENERIC_CLOCKEVENTS 471 select GENERIC_CLOCKEVENTS
473 select PLAT_ORION 472 select PLAT_ORION
474 help 473 help
@@ -478,7 +477,6 @@ config ARCH_KIRKWOOD
478config ARCH_LOKI 477config ARCH_LOKI
479 bool "Marvell Loki (88RC8480)" 478 bool "Marvell Loki (88RC8480)"
480 select CPU_FEROCEON 479 select CPU_FEROCEON
481 select GENERIC_TIME
482 select GENERIC_CLOCKEVENTS 480 select GENERIC_CLOCKEVENTS
483 select PLAT_ORION 481 select PLAT_ORION
484 help 482 help
@@ -488,9 +486,7 @@ config ARCH_MV78XX0
488 bool "Marvell MV78xx0" 486 bool "Marvell MV78xx0"
489 select CPU_FEROCEON 487 select CPU_FEROCEON
490 select PCI 488 select PCI
491 select GENERIC_GPIO
492 select ARCH_REQUIRE_GPIOLIB 489 select ARCH_REQUIRE_GPIOLIB
493 select GENERIC_TIME
494 select GENERIC_CLOCKEVENTS 490 select GENERIC_CLOCKEVENTS
495 select PLAT_ORION 491 select PLAT_ORION
496 help 492 help
@@ -502,9 +498,7 @@ config ARCH_ORION5X
502 depends on MMU 498 depends on MMU
503 select CPU_FEROCEON 499 select CPU_FEROCEON
504 select PCI 500 select PCI
505 select GENERIC_GPIO
506 select ARCH_REQUIRE_GPIOLIB 501 select ARCH_REQUIRE_GPIOLIB
507 select GENERIC_TIME
508 select GENERIC_CLOCKEVENTS 502 select GENERIC_CLOCKEVENTS
509 select PLAT_ORION 503 select PLAT_ORION
510 help 504 help
@@ -515,11 +509,8 @@ config ARCH_ORION5X
515config ARCH_MMP 509config ARCH_MMP
516 bool "Marvell PXA168/910/MMP2" 510 bool "Marvell PXA168/910/MMP2"
517 depends on MMU 511 depends on MMU
518 select GENERIC_GPIO
519 select ARCH_REQUIRE_GPIOLIB 512 select ARCH_REQUIRE_GPIOLIB
520 select HAVE_CLK
521 select COMMON_CLKDEV 513 select COMMON_CLKDEV
522 select GENERIC_TIME
523 select GENERIC_CLOCKEVENTS 514 select GENERIC_CLOCKEVENTS
524 select TICK_ONESHOT 515 select TICK_ONESHOT
525 select PLAT_PXA 516 select PLAT_PXA
@@ -529,8 +520,8 @@ config ARCH_MMP
529config ARCH_KS8695 520config ARCH_KS8695
530 bool "Micrel/Kendin KS8695" 521 bool "Micrel/Kendin KS8695"
531 select CPU_ARM922T 522 select CPU_ARM922T
532 select GENERIC_GPIO 523 select ARCH_REQUIRE_GPIOLIB
533 select ARCH_REQUIRE_GPIOLIB 524 select ARCH_USES_GETTIMEOFFSET
534 help 525 help
535 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 526 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
536 System-on-Chip devices. 527 System-on-Chip devices.
@@ -539,7 +530,6 @@ config ARCH_NS9XXX
539 bool "NetSilicon NS9xxx" 530 bool "NetSilicon NS9xxx"
540 select CPU_ARM926T 531 select CPU_ARM926T
541 select GENERIC_GPIO 532 select GENERIC_GPIO
542 select GENERIC_TIME
543 select GENERIC_CLOCKEVENTS 533 select GENERIC_CLOCKEVENTS
544 select HAVE_CLK 534 select HAVE_CLK
545 help 535 help
@@ -552,10 +542,7 @@ config ARCH_W90X900
552 bool "Nuvoton W90X900 CPU" 542 bool "Nuvoton W90X900 CPU"
553 select CPU_ARM926T 543 select CPU_ARM926T
554 select ARCH_REQUIRE_GPIOLIB 544 select ARCH_REQUIRE_GPIOLIB
555 select GENERIC_GPIO
556 select HAVE_CLK
557 select COMMON_CLKDEV 545 select COMMON_CLKDEV
558 select GENERIC_TIME
559 select GENERIC_CLOCKEVENTS 546 select GENERIC_CLOCKEVENTS
560 help 547 help
561 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 548 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
@@ -569,7 +556,6 @@ config ARCH_W90X900
569config ARCH_NUC93X 556config ARCH_NUC93X
570 bool "Nuvoton NUC93X CPU" 557 bool "Nuvoton NUC93X CPU"
571 select CPU_ARM926T 558 select CPU_ARM926T
572 select HAVE_CLK
573 select COMMON_CLKDEV 559 select COMMON_CLKDEV
574 help 560 help
575 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a 561 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
@@ -578,8 +564,8 @@ config ARCH_NUC93X
578config ARCH_PNX4008 564config ARCH_PNX4008
579 bool "Philips Nexperia PNX4008 Mobile" 565 bool "Philips Nexperia PNX4008 Mobile"
580 select CPU_ARM926T 566 select CPU_ARM926T
581 select HAVE_CLK
582 select COMMON_CLKDEV 567 select COMMON_CLKDEV
568 select ARCH_USES_GETTIMEOFFSET
583 help 569 help
584 This enables support for Philips PNX4008 mobile platform. 570 This enables support for Philips PNX4008 mobile platform.
585 571
@@ -588,11 +574,8 @@ config ARCH_PXA
588 depends on MMU 574 depends on MMU
589 select ARCH_MTD_XIP 575 select ARCH_MTD_XIP
590 select ARCH_HAS_CPUFREQ 576 select ARCH_HAS_CPUFREQ
591 select GENERIC_GPIO
592 select HAVE_CLK
593 select COMMON_CLKDEV 577 select COMMON_CLKDEV
594 select ARCH_REQUIRE_GPIOLIB 578 select ARCH_REQUIRE_GPIOLIB
595 select GENERIC_TIME
596 select GENERIC_CLOCKEVENTS 579 select GENERIC_CLOCKEVENTS
597 select TICK_ONESHOT 580 select TICK_ONESHOT
598 select PLAT_PXA 581 select PLAT_PXA
@@ -601,14 +584,14 @@ config ARCH_PXA
601 584
602config ARCH_MSM 585config ARCH_MSM
603 bool "Qualcomm MSM" 586 bool "Qualcomm MSM"
604 select CPU_V6 587 select HAVE_CLK
605 select GENERIC_TIME
606 select GENERIC_CLOCKEVENTS 588 select GENERIC_CLOCKEVENTS
607 help 589 help
608 Support for Qualcomm MSM7K based systems. This runs on the ARM11 590 Support for Qualcomm MSM/QSD based systems. This runs on the
609 apps processor of the MSM7K and depends on a shared memory 591 apps processor of the MSM/QSD and depends on a shared memory
610 interface to the ARM9 modem processor which runs the baseband stack 592 interface to the modem processor which runs the baseband
611 and controls some vital subsystems (clock and power control, etc). 593 stack and controls some vital subsystems
594 (clock and power control, etc).
612 595
613config ARCH_SHMOBILE 596config ARCH_SHMOBILE
614 bool "Renesas SH-Mobile" 597 bool "Renesas SH-Mobile"
@@ -625,6 +608,7 @@ config ARCH_RPC
625 select ISA_DMA_API 608 select ISA_DMA_API
626 select NO_IOPORT 609 select NO_IOPORT
627 select ARCH_SPARSEMEM_ENABLE 610 select ARCH_SPARSEMEM_ENABLE
611 select ARCH_USES_GETTIMEOFFSET
628 help 612 help
629 On the Acorn Risc-PC, Linux can support the internal IDE disk and 613 On the Acorn Risc-PC, Linux can support the internal IDE disk and
630 CD-ROM interface, serial and parallel port, and the floppy drive. 614 CD-ROM interface, serial and parallel port, and the floppy drive.
@@ -637,8 +621,6 @@ config ARCH_SA1100
637 select ARCH_MTD_XIP 621 select ARCH_MTD_XIP
638 select ARCH_HAS_CPUFREQ 622 select ARCH_HAS_CPUFREQ
639 select CPU_FREQ 623 select CPU_FREQ
640 select GENERIC_GPIO
641 select GENERIC_TIME
642 select GENERIC_CLOCKEVENTS 624 select GENERIC_CLOCKEVENTS
643 select HAVE_CLK 625 select HAVE_CLK
644 select TICK_ONESHOT 626 select TICK_ONESHOT
@@ -647,23 +629,28 @@ config ARCH_SA1100
647 Support for StrongARM 11x0 based boards. 629 Support for StrongARM 11x0 based boards.
648 630
649config ARCH_S3C2410 631config ARCH_S3C2410
650 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443" 632 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
651 select GENERIC_GPIO 633 select GENERIC_GPIO
652 select ARCH_HAS_CPUFREQ 634 select ARCH_HAS_CPUFREQ
653 select HAVE_CLK 635 select HAVE_CLK
636 select ARCH_USES_GETTIMEOFFSET
654 help 637 help
655 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 638 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
656 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 639 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
657 the Samsung SMDK2410 development board (and derivatives). 640 the Samsung SMDK2410 development board (and derivatives).
658 641
642 Note, the S3C2416 and the S3C2450 are so close that they even share
643 the same SoC ID code. This means that there is no seperate machine
644 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
645
659config ARCH_S3C64XX 646config ARCH_S3C64XX
660 bool "Samsung S3C64XX" 647 bool "Samsung S3C64XX"
661 select PLAT_SAMSUNG 648 select PLAT_SAMSUNG
662 select CPU_V6 649 select CPU_V6
663 select GENERIC_GPIO
664 select ARM_VIC 650 select ARM_VIC
665 select HAVE_CLK 651 select HAVE_CLK
666 select NO_IOPORT 652 select NO_IOPORT
653 select ARCH_USES_GETTIMEOFFSET
667 select ARCH_HAS_CPUFREQ 654 select ARCH_HAS_CPUFREQ
668 select ARCH_REQUIRE_GPIOLIB 655 select ARCH_REQUIRE_GPIOLIB
669 select SAMSUNG_CLKSRC 656 select SAMSUNG_CLKSRC
@@ -720,6 +707,7 @@ config ARCH_SHARK
720 select ISA_DMA 707 select ISA_DMA
721 select ZONE_DMA 708 select ZONE_DMA
722 select PCI 709 select PCI
710 select ARCH_USES_GETTIMEOFFSET
723 help 711 help
724 Support for the StrongARM based Digital DNARD machine, also known 712 Support for the StrongARM based Digital DNARD machine, also known
725 as "Shark" (<http://www.shark-linux.de/shark.html>). 713 as "Shark" (<http://www.shark-linux.de/shark.html>).
@@ -729,6 +717,7 @@ config ARCH_LH7A40X
729 select CPU_ARM922T 717 select CPU_ARM922T
730 select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM 718 select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
731 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM 719 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
720 select ARCH_USES_GETTIMEOFFSET
732 help 721 help
733 Say Y here for systems based on one of the Sharp LH7A40X 722 Say Y here for systems based on one of the Sharp LH7A40X
734 System on a Chip processors. These CPUs include an ARM922T 723 System on a Chip processors. These CPUs include an ARM922T
@@ -742,9 +731,7 @@ config ARCH_U300
742 select HAVE_TCM 731 select HAVE_TCM
743 select ARM_AMBA 732 select ARM_AMBA
744 select ARM_VIC 733 select ARM_VIC
745 select GENERIC_TIME
746 select GENERIC_CLOCKEVENTS 734 select GENERIC_CLOCKEVENTS
747 select HAVE_CLK
748 select COMMON_CLKDEV 735 select COMMON_CLKDEV
749 select GENERIC_GPIO 736 select GENERIC_GPIO
750 help 737 help
@@ -754,9 +741,9 @@ config ARCH_U8500
754 bool "ST-Ericsson U8500 Series" 741 bool "ST-Ericsson U8500 Series"
755 select CPU_V7 742 select CPU_V7
756 select ARM_AMBA 743 select ARM_AMBA
757 select GENERIC_TIME
758 select GENERIC_CLOCKEVENTS 744 select GENERIC_CLOCKEVENTS
759 select COMMON_CLKDEV 745 select COMMON_CLKDEV
746 select ARCH_REQUIRE_GPIOLIB
760 help 747 help
761 Support for ST-Ericsson's Ux500 architecture 748 Support for ST-Ericsson's Ux500 architecture
762 749
@@ -765,23 +752,16 @@ config ARCH_NOMADIK
765 select ARM_AMBA 752 select ARM_AMBA
766 select ARM_VIC 753 select ARM_VIC
767 select CPU_ARM926T 754 select CPU_ARM926T
768 select HAVE_CLK
769 select COMMON_CLKDEV 755 select COMMON_CLKDEV
770 select GENERIC_TIME
771 select GENERIC_CLOCKEVENTS 756 select GENERIC_CLOCKEVENTS
772 select GENERIC_GPIO
773 select ARCH_REQUIRE_GPIOLIB 757 select ARCH_REQUIRE_GPIOLIB
774 help 758 help
775 Support for the Nomadik platform by ST-Ericsson 759 Support for the Nomadik platform by ST-Ericsson
776 760
777config ARCH_DAVINCI 761config ARCH_DAVINCI
778 bool "TI DaVinci" 762 bool "TI DaVinci"
779 select CPU_ARM926T
780 select GENERIC_TIME
781 select GENERIC_CLOCKEVENTS 763 select GENERIC_CLOCKEVENTS
782 select GENERIC_GPIO
783 select ARCH_REQUIRE_GPIOLIB 764 select ARCH_REQUIRE_GPIOLIB
784 select HAVE_CLK
785 select ZONE_DMA 765 select ZONE_DMA
786 select HAVE_IDE 766 select HAVE_IDE
787 select COMMON_CLKDEV 767 select COMMON_CLKDEV
@@ -792,16 +772,24 @@ config ARCH_DAVINCI
792 772
793config ARCH_OMAP 773config ARCH_OMAP
794 bool "TI OMAP" 774 bool "TI OMAP"
795 select GENERIC_GPIO
796 select HAVE_CLK 775 select HAVE_CLK
797 select ARCH_REQUIRE_GPIOLIB 776 select ARCH_REQUIRE_GPIOLIB
798 select ARCH_HAS_CPUFREQ 777 select ARCH_HAS_CPUFREQ
799 select GENERIC_TIME
800 select GENERIC_CLOCKEVENTS 778 select GENERIC_CLOCKEVENTS
801 select ARCH_HAS_HOLES_MEMORYMODEL 779 select ARCH_HAS_HOLES_MEMORYMODEL
802 help 780 help
803 Support for TI's OMAP platform (OMAP1 and OMAP2). 781 Support for TI's OMAP platform (OMAP1 and OMAP2).
804 782
783config PLAT_SPEAR
784 bool "ST SPEAr"
785 select ARM_AMBA
786 select ARCH_REQUIRE_GPIOLIB
787 select COMMON_CLKDEV
788 select GENERIC_CLOCKEVENTS
789 select HAVE_CLK
790 help
791 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
792
805endchoice 793endchoice
806 794
807# 795#
@@ -817,6 +805,8 @@ source "arch/arm/mach-bcmring/Kconfig"
817 805
818source "arch/arm/mach-clps711x/Kconfig" 806source "arch/arm/mach-clps711x/Kconfig"
819 807
808source "arch/arm/mach-cns3xxx/Kconfig"
809
820source "arch/arm/mach-davinci/Kconfig" 810source "arch/arm/mach-davinci/Kconfig"
821 811
822source "arch/arm/mach-dove/Kconfig" 812source "arch/arm/mach-dove/Kconfig"
@@ -887,11 +877,13 @@ source "arch/arm/plat-samsung/Kconfig"
887source "arch/arm/plat-s3c24xx/Kconfig" 877source "arch/arm/plat-s3c24xx/Kconfig"
888source "arch/arm/plat-s5p/Kconfig" 878source "arch/arm/plat-s5p/Kconfig"
889source "arch/arm/plat-s5pc1xx/Kconfig" 879source "arch/arm/plat-s5pc1xx/Kconfig"
880source "arch/arm/plat-spear/Kconfig"
890 881
891if ARCH_S3C2410 882if ARCH_S3C2410
892source "arch/arm/mach-s3c2400/Kconfig" 883source "arch/arm/mach-s3c2400/Kconfig"
893source "arch/arm/mach-s3c2410/Kconfig" 884source "arch/arm/mach-s3c2410/Kconfig"
894source "arch/arm/mach-s3c2412/Kconfig" 885source "arch/arm/mach-s3c2412/Kconfig"
886source "arch/arm/mach-s3c2416/Kconfig"
895source "arch/arm/mach-s3c2440/Kconfig" 887source "arch/arm/mach-s3c2440/Kconfig"
896source "arch/arm/mach-s3c2443/Kconfig" 888source "arch/arm/mach-s3c2443/Kconfig"
897endif 889endif
@@ -920,6 +912,8 @@ source "arch/arm/mach-ux500/Kconfig"
920 912
921source "arch/arm/mach-versatile/Kconfig" 913source "arch/arm/mach-versatile/Kconfig"
922 914
915source "arch/arm/mach-vexpress/Kconfig"
916
923source "arch/arm/mach-w90x900/Kconfig" 917source "arch/arm/mach-w90x900/Kconfig"
924 918
925# Definitions to make life easier 919# Definitions to make life easier
@@ -929,7 +923,6 @@ config ARCH_ACORN
929config PLAT_IOP 923config PLAT_IOP
930 bool 924 bool
931 select GENERIC_CLOCKEVENTS 925 select GENERIC_CLOCKEVENTS
932 select GENERIC_TIME
933 926
934config PLAT_ORION 927config PLAT_ORION
935 bool 928 bool
@@ -937,6 +930,12 @@ config PLAT_ORION
937config PLAT_PXA 930config PLAT_PXA
938 bool 931 bool
939 932
933config PLAT_VERSATILE
934 bool
935
936config ARM_TIMER_SP804
937 bool
938
940source arch/arm/mm/Kconfig 939source arch/arm/mm/Kconfig
941 940
942config IWMMXT 941config IWMMXT
@@ -1065,6 +1064,10 @@ config PCI
1065 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1064 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1066 VESA. If you have PCI, say Y, otherwise N. 1065 VESA. If you have PCI, say Y, otherwise N.
1067 1066
1067config PCI_DOMAINS
1068 bool
1069 depends on PCI
1070
1068config PCI_SYSCALL 1071config PCI_SYSCALL
1069 def_bool PCI 1072 def_bool PCI
1070 1073
@@ -1093,10 +1096,11 @@ source "kernel/time/Kconfig"
1093config SMP 1096config SMP
1094 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 1097 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1095 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ 1098 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
1096 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500) 1099 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1100 ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1097 depends on GENERIC_CLOCKEVENTS 1101 depends on GENERIC_CLOCKEVENTS
1098 select USE_GENERIC_SMP_HELPERS 1102 select USE_GENERIC_SMP_HELPERS
1099 select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500) 1103 select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1100 help 1104 help
1101 This enables support for systems with more than one CPU. If you have 1105 This enables support for systems with more than one CPU. If you have
1102 a system with only one CPU, like most personal computers, say N. If 1106 a system with only one CPU, like most personal computers, say N. If
@@ -1277,7 +1281,7 @@ config HIGHPTE
1277 1281
1278config HW_PERF_EVENTS 1282config HW_PERF_EVENTS
1279 bool "Enable hardware performance counter support for perf events" 1283 bool "Enable hardware performance counter support for perf events"
1280 depends on PERF_EVENTS && CPU_HAS_PMU && (CPU_V6 || CPU_V7) 1284 depends on PERF_EVENTS && CPU_HAS_PMU
1281 default y 1285 default y
1282 help 1286 help
1283 Enable hardware performance counter support for perf events. If 1287 Enable hardware performance counter support for perf events. If
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ed820e737a8a..4b857fbe4314 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -110,6 +110,8 @@ CHECKFLAGS += -D__arm__
110head-y := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o 110head-y := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o
111textofs-y := 0x00008000 111textofs-y := 0x00008000
112textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000 112textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
113# We don't want the htc bootloader to corrupt kernel during resume
114textofs-$(CONFIG_PM_H1940) := 0x00108000
113# SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory 115# SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory
114ifeq ($(CONFIG_ARCH_SA1100),y) 116ifeq ($(CONFIG_ARCH_SA1100),y)
115textofs-$(CONFIG_SA1111) := 0x00208000 117textofs-$(CONFIG_SA1111) := 0x00208000
@@ -121,6 +123,7 @@ machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
121machine-$(CONFIG_ARCH_AT91) := at91 123machine-$(CONFIG_ARCH_AT91) := at91
122machine-$(CONFIG_ARCH_BCMRING) := bcmring 124machine-$(CONFIG_ARCH_BCMRING) := bcmring
123machine-$(CONFIG_ARCH_CLPS711X) := clps711x 125machine-$(CONFIG_ARCH_CLPS711X) := clps711x
126machine-$(CONFIG_ARCH_CNS3XXX) := cns3xxx
124machine-$(CONFIG_ARCH_DAVINCI) := davinci 127machine-$(CONFIG_ARCH_DAVINCI) := davinci
125machine-$(CONFIG_ARCH_DOVE) := dove 128machine-$(CONFIG_ARCH_DOVE) := dove
126machine-$(CONFIG_ARCH_EBSA110) := ebsa110 129machine-$(CONFIG_ARCH_EBSA110) := ebsa110
@@ -160,7 +163,7 @@ machine-$(CONFIG_ARCH_PNX4008) := pnx4008
160machine-$(CONFIG_ARCH_PXA) := pxa 163machine-$(CONFIG_ARCH_PXA) := pxa
161machine-$(CONFIG_ARCH_REALVIEW) := realview 164machine-$(CONFIG_ARCH_REALVIEW) := realview
162machine-$(CONFIG_ARCH_RPC) := rpc 165machine-$(CONFIG_ARCH_RPC) := rpc
163machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2443 166machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
164machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 167machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
165machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx 168machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
166machine-$(CONFIG_ARCH_S5P6440) := s5p6440 169machine-$(CONFIG_ARCH_S5P6440) := s5p6440
@@ -175,9 +178,14 @@ machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
175machine-$(CONFIG_ARCH_U300) := u300 178machine-$(CONFIG_ARCH_U300) := u300
176machine-$(CONFIG_ARCH_U8500) := ux500 179machine-$(CONFIG_ARCH_U8500) := ux500
177machine-$(CONFIG_ARCH_VERSATILE) := versatile 180machine-$(CONFIG_ARCH_VERSATILE) := versatile
181machine-$(CONFIG_ARCH_VEXPRESS) := vexpress
178machine-$(CONFIG_ARCH_W90X900) := w90x900 182machine-$(CONFIG_ARCH_W90X900) := w90x900
179machine-$(CONFIG_ARCH_NUC93X) := nuc93x 183machine-$(CONFIG_ARCH_NUC93X) := nuc93x
180machine-$(CONFIG_FOOTBRIDGE) := footbridge 184machine-$(CONFIG_FOOTBRIDGE) := footbridge
185machine-$(CONFIG_MACH_SPEAR300) := spear3xx
186machine-$(CONFIG_MACH_SPEAR310) := spear3xx
187machine-$(CONFIG_MACH_SPEAR320) := spear3xx
188machine-$(CONFIG_MACH_SPEAR600) := spear6xx
181 189
182# Platform directory name. This list is sorted alphanumerically 190# Platform directory name. This list is sorted alphanumerically
183# by CONFIG_* macro name. 191# by CONFIG_* macro name.
@@ -192,6 +200,8 @@ plat-$(CONFIG_PLAT_PXA) := pxa
192plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung 200plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung
193plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung 201plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung
194plat-$(CONFIG_PLAT_S5P) := s5p samsung 202plat-$(CONFIG_PLAT_S5P) := s5p samsung
203plat-$(CONFIG_PLAT_SPEAR) := spear
204plat-$(CONFIG_PLAT_VERSATILE) := versatile
195 205
196ifeq ($(CONFIG_ARCH_EBSA110),y) 206ifeq ($(CONFIG_ARCH_EBSA110),y)
197# This is what happens if you forget the IOCS16 line. 207# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 97c89e7de7d3..53faa9063a03 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -65,6 +65,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
65 65
66suffix_$(CONFIG_KERNEL_GZIP) = gzip 66suffix_$(CONFIG_KERNEL_GZIP) = gzip
67suffix_$(CONFIG_KERNEL_LZO) = lzo 67suffix_$(CONFIG_KERNEL_LZO) = lzo
68suffix_$(CONFIG_KERNEL_LZMA) = lzma
68 69
69targets := vmlinux vmlinux.lds \ 70targets := vmlinux vmlinux.lds \
70 piggy.$(suffix_y) piggy.$(suffix_y).o \ 71 piggy.$(suffix_y) piggy.$(suffix_y).o \
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index 9c097073ce4c..4c72a97bc3e1 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -40,6 +40,10 @@ extern void error(char *);
40#include "../../../../lib/decompress_unlzo.c" 40#include "../../../../lib/decompress_unlzo.c"
41#endif 41#endif
42 42
43#ifdef CONFIG_KERNEL_LZMA
44#include "../../../../lib/decompress_unlzma.c"
45#endif
46
43void do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x)) 47void do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x))
44{ 48{
45 decompress(input, len, NULL, NULL, output, NULL, error); 49 decompress(input, len, NULL, NULL, output, NULL, error);
diff --git a/arch/arm/boot/compressed/piggy.lzma.S b/arch/arm/boot/compressed/piggy.lzma.S
new file mode 100644
index 000000000000..d7e69cffbc0a
--- /dev/null
+++ b/arch/arm/boot/compressed/piggy.lzma.S
@@ -0,0 +1,6 @@
1 .section .piggydata,#alloc
2 .globl input_data
3input_data:
4 .incbin "arch/arm/boot/compressed/piggy.lzma"
5 .globl input_data_end
6input_data_end:
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 4efbb9df0444..0a34c8186924 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -12,10 +12,10 @@ config ARM_VIC_NR
12 The maximum number of VICs available in the system, for 12 The maximum number of VICs available in the system, for
13 power management. 13 power management.
14 14
15config ICST525 15config ICST
16 bool 16 bool
17 17
18config ICST307 18config PL330
19 bool 19 bool
20 20
21config SA1111 21config SA1111
@@ -40,3 +40,4 @@ config SHARP_SCOOP
40 40
41config COMMON_CLKDEV 41config COMMON_CLKDEV
42 bool 42 bool
43 select HAVE_CLK
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 76be7ff2a7ca..e6e8664a9413 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -4,8 +4,8 @@
4 4
5obj-$(CONFIG_ARM_GIC) += gic.o 5obj-$(CONFIG_ARM_GIC) += gic.o
6obj-$(CONFIG_ARM_VIC) += vic.o 6obj-$(CONFIG_ARM_VIC) += vic.o
7obj-$(CONFIG_ICST525) += icst525.o 7obj-$(CONFIG_ICST) += icst.o
8obj-$(CONFIG_ICST307) += icst307.o 8obj-$(CONFIG_PL330) += pl330.o
9obj-$(CONFIG_SA1111) += sa1111.o 9obj-$(CONFIG_SA1111) += sa1111.o
10obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o 10obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
11obj-$(CONFIG_DMABOUNCE) += dmabounce.o 11obj-$(CONFIG_DMABOUNCE) += dmabounce.o
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
index dba4c1da63ed..e2b2bb66e094 100644
--- a/arch/arm/common/clkdev.c
+++ b/arch/arm/common/clkdev.c
@@ -53,12 +53,13 @@ static struct clk *clk_find(const char *dev_id, const char *con_id)
53 continue; 53 continue;
54 match += 1; 54 match += 1;
55 } 55 }
56 if (match == 0)
57 continue;
58 56
59 if (match > best) { 57 if (match > best) {
60 clk = p->clk; 58 clk = p->clk;
61 best = match; 59 if (match != 3)
60 best = match;
61 else
62 break;
62 } 63 }
63 } 64 }
64 return clk; 65 return clk;
diff --git a/arch/arm/common/icst.c b/arch/arm/common/icst.c
new file mode 100644
index 000000000000..9a7f09cff300
--- /dev/null
+++ b/arch/arm/common/icst.c
@@ -0,0 +1,100 @@
1/*
2 * linux/arch/arm/common/icst307.c
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICST307
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 *
14 * This is an almost identical implementation to the ICST525 clock generator.
15 * The s2div and idx2s files are different
16 */
17#include <linux/module.h>
18#include <linux/kernel.h>
19
20#include <asm/hardware/icst.h>
21
22/*
23 * Divisors for each OD setting.
24 */
25const unsigned char icst307_s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 };
26const unsigned char icst525_s2div[8] = { 10, 2, 8, 4, 5, 7, 9, 6 };
27EXPORT_SYMBOL(icst307_s2div);
28EXPORT_SYMBOL(icst525_s2div);
29
30unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco)
31{
32 return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * p->s2div[vco.s]);
33}
34
35EXPORT_SYMBOL(icst_hz);
36
37/*
38 * Ascending divisor S values.
39 */
40const unsigned char icst307_idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 };
41const unsigned char icst525_idx2s[8] = { 1, 3, 4, 7, 5, 2, 6, 0 };
42EXPORT_SYMBOL(icst307_idx2s);
43EXPORT_SYMBOL(icst525_idx2s);
44
45struct icst_vco
46icst_hz_to_vco(const struct icst_params *p, unsigned long freq)
47{
48 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max };
49 unsigned long f;
50 unsigned int i = 0, rd, best = (unsigned int)-1;
51
52 /*
53 * First, find the PLL output divisor such
54 * that the PLL output is within spec.
55 */
56 do {
57 f = freq * p->s2div[p->idx2s[i]];
58
59 if (f > p->vco_min && f <= p->vco_max)
60 break;
61 } while (i < 8);
62
63 if (i >= 8)
64 return vco;
65
66 vco.s = p->idx2s[i];
67
68 /*
69 * Now find the closest divisor combination
70 * which gives a PLL output of 'f'.
71 */
72 for (rd = p->rd_min; rd <= p->rd_max; rd++) {
73 unsigned long fref_div, f_pll;
74 unsigned int vd;
75 int f_diff;
76
77 fref_div = (2 * p->ref) / rd;
78
79 vd = (f + fref_div / 2) / fref_div;
80 if (vd < p->vd_min || vd > p->vd_max)
81 continue;
82
83 f_pll = fref_div * vd;
84 f_diff = f_pll - f;
85 if (f_diff < 0)
86 f_diff = -f_diff;
87
88 if ((unsigned)f_diff < best) {
89 vco.v = vd - 8;
90 vco.r = rd - 2;
91 if (f_diff == 0)
92 break;
93 best = f_diff;
94 }
95 }
96
97 return vco;
98}
99
100EXPORT_SYMBOL(icst_hz_to_vco);
diff --git a/arch/arm/common/icst307.c b/arch/arm/common/icst307.c
deleted file mode 100644
index 6d094c157540..000000000000
--- a/arch/arm/common/icst307.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/*
2 * linux/arch/arm/common/icst307.c
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICST307
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 *
14 * This is an almost identical implementation to the ICST525 clock generator.
15 * The s2div and idx2s files are different
16 */
17#include <linux/module.h>
18#include <linux/kernel.h>
19
20#include <asm/hardware/icst307.h>
21
22/*
23 * Divisors for each OD setting.
24 */
25static unsigned char s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 };
26
27unsigned long icst307_khz(const struct icst307_params *p, struct icst307_vco vco)
28{
29 return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * s2div[vco.s]);
30}
31
32EXPORT_SYMBOL(icst307_khz);
33
34/*
35 * Ascending divisor S values.
36 */
37static unsigned char idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 };
38
39struct icst307_vco
40icst307_khz_to_vco(const struct icst307_params *p, unsigned long freq)
41{
42 struct icst307_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max };
43 unsigned long f;
44 unsigned int i = 0, rd, best = (unsigned int)-1;
45
46 /*
47 * First, find the PLL output divisor such
48 * that the PLL output is within spec.
49 */
50 do {
51 f = freq * s2div[idx2s[i]];
52
53 /*
54 * f must be between 6MHz and 200MHz (3.3 or 5V)
55 */
56 if (f > 6000 && f <= p->vco_max)
57 break;
58 } while (i < ARRAY_SIZE(idx2s));
59
60 if (i >= ARRAY_SIZE(idx2s))
61 return vco;
62
63 vco.s = idx2s[i];
64
65 /*
66 * Now find the closest divisor combination
67 * which gives a PLL output of 'f'.
68 */
69 for (rd = p->rd_min; rd <= p->rd_max; rd++) {
70 unsigned long fref_div, f_pll;
71 unsigned int vd;
72 int f_diff;
73
74 fref_div = (2 * p->ref) / rd;
75
76 vd = (f + fref_div / 2) / fref_div;
77 if (vd < p->vd_min || vd > p->vd_max)
78 continue;
79
80 f_pll = fref_div * vd;
81 f_diff = f_pll - f;
82 if (f_diff < 0)
83 f_diff = -f_diff;
84
85 if ((unsigned)f_diff < best) {
86 vco.v = vd - 8;
87 vco.r = rd - 2;
88 if (f_diff == 0)
89 break;
90 best = f_diff;
91 }
92 }
93
94 return vco;
95}
96
97EXPORT_SYMBOL(icst307_khz_to_vco);
98
99struct icst307_vco
100icst307_ps_to_vco(const struct icst307_params *p, unsigned long period)
101{
102 struct icst307_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max };
103 unsigned long f, ps;
104 unsigned int i = 0, rd, best = (unsigned int)-1;
105
106 ps = 1000000000UL / p->vco_max;
107
108 /*
109 * First, find the PLL output divisor such
110 * that the PLL output is within spec.
111 */
112 do {
113 f = period / s2div[idx2s[i]];
114
115 /*
116 * f must be between 6MHz and 200MHz (3.3 or 5V)
117 */
118 if (f >= ps && f < 1000000000UL / 6000 + 1)
119 break;
120 } while (i < ARRAY_SIZE(idx2s));
121
122 if (i >= ARRAY_SIZE(idx2s))
123 return vco;
124
125 vco.s = idx2s[i];
126
127 ps = 500000000UL / p->ref;
128
129 /*
130 * Now find the closest divisor combination
131 * which gives a PLL output of 'f'.
132 */
133 for (rd = p->rd_min; rd <= p->rd_max; rd++) {
134 unsigned long f_in_div, f_pll;
135 unsigned int vd;
136 int f_diff;
137
138 f_in_div = ps * rd;
139
140 vd = (f_in_div + f / 2) / f;
141 if (vd < p->vd_min || vd > p->vd_max)
142 continue;
143
144 f_pll = (f_in_div + vd / 2) / vd;
145 f_diff = f_pll - f;
146 if (f_diff < 0)
147 f_diff = -f_diff;
148
149 if ((unsigned)f_diff < best) {
150 vco.v = vd - 8;
151 vco.r = rd - 2;
152 if (f_diff == 0)
153 break;
154 best = f_diff;
155 }
156 }
157
158 return vco;
159}
160
161EXPORT_SYMBOL(icst307_ps_to_vco);
diff --git a/arch/arm/common/icst525.c b/arch/arm/common/icst525.c
deleted file mode 100644
index 3d377c5bdef6..000000000000
--- a/arch/arm/common/icst525.c
+++ /dev/null
@@ -1,160 +0,0 @@
1/*
2 * linux/arch/arm/common/icst525.c
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICST525
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 */
14#include <linux/module.h>
15#include <linux/kernel.h>
16
17#include <asm/hardware/icst525.h>
18
19/*
20 * Divisors for each OD setting.
21 */
22static unsigned char s2div[8] = { 10, 2, 8, 4, 5, 7, 9, 6 };
23
24unsigned long icst525_khz(const struct icst525_params *p, struct icst525_vco vco)
25{
26 return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * s2div[vco.s]);
27}
28
29EXPORT_SYMBOL(icst525_khz);
30
31/*
32 * Ascending divisor S values.
33 */
34static unsigned char idx2s[] = { 1, 3, 4, 7, 5, 2, 6, 0 };
35
36struct icst525_vco
37icst525_khz_to_vco(const struct icst525_params *p, unsigned long freq)
38{
39 struct icst525_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max };
40 unsigned long f;
41 unsigned int i = 0, rd, best = (unsigned int)-1;
42
43 /*
44 * First, find the PLL output divisor such
45 * that the PLL output is within spec.
46 */
47 do {
48 f = freq * s2div[idx2s[i]];
49
50 /*
51 * f must be between 10MHz and
52 * 320MHz (5V) or 200MHz (3V)
53 */
54 if (f > 10000 && f <= p->vco_max)
55 break;
56 } while (i < ARRAY_SIZE(idx2s));
57
58 if (i >= ARRAY_SIZE(idx2s))
59 return vco;
60
61 vco.s = idx2s[i];
62
63 /*
64 * Now find the closest divisor combination
65 * which gives a PLL output of 'f'.
66 */
67 for (rd = p->rd_min; rd <= p->rd_max; rd++) {
68 unsigned long fref_div, f_pll;
69 unsigned int vd;
70 int f_diff;
71
72 fref_div = (2 * p->ref) / rd;
73
74 vd = (f + fref_div / 2) / fref_div;
75 if (vd < p->vd_min || vd > p->vd_max)
76 continue;
77
78 f_pll = fref_div * vd;
79 f_diff = f_pll - f;
80 if (f_diff < 0)
81 f_diff = -f_diff;
82
83 if ((unsigned)f_diff < best) {
84 vco.v = vd - 8;
85 vco.r = rd - 2;
86 if (f_diff == 0)
87 break;
88 best = f_diff;
89 }
90 }
91
92 return vco;
93}
94
95EXPORT_SYMBOL(icst525_khz_to_vco);
96
97struct icst525_vco
98icst525_ps_to_vco(const struct icst525_params *p, unsigned long period)
99{
100 struct icst525_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max };
101 unsigned long f, ps;
102 unsigned int i = 0, rd, best = (unsigned int)-1;
103
104 ps = 1000000000UL / p->vco_max;
105
106 /*
107 * First, find the PLL output divisor such
108 * that the PLL output is within spec.
109 */
110 do {
111 f = period / s2div[idx2s[i]];
112
113 /*
114 * f must be between 10MHz and
115 * 320MHz (5V) or 200MHz (3V)
116 */
117 if (f >= ps && f < 100000)
118 break;
119 } while (i < ARRAY_SIZE(idx2s));
120
121 if (i >= ARRAY_SIZE(idx2s))
122 return vco;
123
124 vco.s = idx2s[i];
125
126 ps = 500000000UL / p->ref;
127
128 /*
129 * Now find the closest divisor combination
130 * which gives a PLL output of 'f'.
131 */
132 for (rd = p->rd_min; rd <= p->rd_max; rd++) {
133 unsigned long f_in_div, f_pll;
134 unsigned int vd;
135 int f_diff;
136
137 f_in_div = ps * rd;
138
139 vd = (f_in_div + f / 2) / f;
140 if (vd < p->vd_min || vd > p->vd_max)
141 continue;
142
143 f_pll = (f_in_div + vd / 2) / vd;
144 f_diff = f_pll - f;
145 if (f_diff < 0)
146 f_diff = -f_diff;
147
148 if ((unsigned)f_diff < best) {
149 vco.v = vd - 8;
150 vco.r = rd - 2;
151 if (f_diff == 0)
152 break;
153 best = f_diff;
154 }
155 }
156
157 return vco;
158}
159
160EXPORT_SYMBOL(icst525_ps_to_vco);
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
new file mode 100644
index 000000000000..5ebbab6242a7
--- /dev/null
+++ b/arch/arm/common/pl330.c
@@ -0,0 +1,1966 @@
1/* linux/arch/arm/common/pl330.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/io.h>
27#include <linux/delay.h>
28#include <linux/interrupt.h>
29#include <linux/dma-mapping.h>
30
31#include <asm/hardware/pl330.h>
32
33/* Register and Bit field Definitions */
34#define DS 0x0
35#define DS_ST_STOP 0x0
36#define DS_ST_EXEC 0x1
37#define DS_ST_CMISS 0x2
38#define DS_ST_UPDTPC 0x3
39#define DS_ST_WFE 0x4
40#define DS_ST_ATBRR 0x5
41#define DS_ST_QBUSY 0x6
42#define DS_ST_WFP 0x7
43#define DS_ST_KILL 0x8
44#define DS_ST_CMPLT 0x9
45#define DS_ST_FLTCMP 0xe
46#define DS_ST_FAULT 0xf
47
48#define DPC 0x4
49#define INTEN 0x20
50#define ES 0x24
51#define INTSTATUS 0x28
52#define INTCLR 0x2c
53#define FSM 0x30
54#define FSC 0x34
55#define FTM 0x38
56
57#define _FTC 0x40
58#define FTC(n) (_FTC + (n)*0x4)
59
60#define _CS 0x100
61#define CS(n) (_CS + (n)*0x8)
62#define CS_CNS (1 << 21)
63
64#define _CPC 0x104
65#define CPC(n) (_CPC + (n)*0x8)
66
67#define _SA 0x400
68#define SA(n) (_SA + (n)*0x20)
69
70#define _DA 0x404
71#define DA(n) (_DA + (n)*0x20)
72
73#define _CC 0x408
74#define CC(n) (_CC + (n)*0x20)
75
76#define CC_SRCINC (1 << 0)
77#define CC_DSTINC (1 << 14)
78#define CC_SRCPRI (1 << 8)
79#define CC_DSTPRI (1 << 22)
80#define CC_SRCNS (1 << 9)
81#define CC_DSTNS (1 << 23)
82#define CC_SRCIA (1 << 10)
83#define CC_DSTIA (1 << 24)
84#define CC_SRCBRSTLEN_SHFT 4
85#define CC_DSTBRSTLEN_SHFT 18
86#define CC_SRCBRSTSIZE_SHFT 1
87#define CC_DSTBRSTSIZE_SHFT 15
88#define CC_SRCCCTRL_SHFT 11
89#define CC_SRCCCTRL_MASK 0x7
90#define CC_DSTCCTRL_SHFT 25
91#define CC_DRCCCTRL_MASK 0x7
92#define CC_SWAP_SHFT 28
93
94#define _LC0 0x40c
95#define LC0(n) (_LC0 + (n)*0x20)
96
97#define _LC1 0x410
98#define LC1(n) (_LC1 + (n)*0x20)
99
100#define DBGSTATUS 0xd00
101#define DBG_BUSY (1 << 0)
102
103#define DBGCMD 0xd04
104#define DBGINST0 0xd08
105#define DBGINST1 0xd0c
106
107#define CR0 0xe00
108#define CR1 0xe04
109#define CR2 0xe08
110#define CR3 0xe0c
111#define CR4 0xe10
112#define CRD 0xe14
113
114#define PERIPH_ID 0xfe0
115#define PCELL_ID 0xff0
116
117#define CR0_PERIPH_REQ_SET (1 << 0)
118#define CR0_BOOT_EN_SET (1 << 1)
119#define CR0_BOOT_MAN_NS (1 << 2)
120#define CR0_NUM_CHANS_SHIFT 4
121#define CR0_NUM_CHANS_MASK 0x7
122#define CR0_NUM_PERIPH_SHIFT 12
123#define CR0_NUM_PERIPH_MASK 0x1f
124#define CR0_NUM_EVENTS_SHIFT 17
125#define CR0_NUM_EVENTS_MASK 0x1f
126
127#define CR1_ICACHE_LEN_SHIFT 0
128#define CR1_ICACHE_LEN_MASK 0x7
129#define CR1_NUM_ICACHELINES_SHIFT 4
130#define CR1_NUM_ICACHELINES_MASK 0xf
131
132#define CRD_DATA_WIDTH_SHIFT 0
133#define CRD_DATA_WIDTH_MASK 0x7
134#define CRD_WR_CAP_SHIFT 4
135#define CRD_WR_CAP_MASK 0x7
136#define CRD_WR_Q_DEP_SHIFT 8
137#define CRD_WR_Q_DEP_MASK 0xf
138#define CRD_RD_CAP_SHIFT 12
139#define CRD_RD_CAP_MASK 0x7
140#define CRD_RD_Q_DEP_SHIFT 16
141#define CRD_RD_Q_DEP_MASK 0xf
142#define CRD_DATA_BUFF_SHIFT 20
143#define CRD_DATA_BUFF_MASK 0x3ff
144
145#define PART 0x330
146#define DESIGNER 0x41
147#define REVISION 0x0
148#define INTEG_CFG 0x0
149#define PERIPH_ID_VAL ((PART << 0) | (DESIGNER << 12) \
150 | (REVISION << 20) | (INTEG_CFG << 24))
151
152#define PCELL_ID_VAL 0xb105f00d
153
154#define PL330_STATE_STOPPED (1 << 0)
155#define PL330_STATE_EXECUTING (1 << 1)
156#define PL330_STATE_WFE (1 << 2)
157#define PL330_STATE_FAULTING (1 << 3)
158#define PL330_STATE_COMPLETING (1 << 4)
159#define PL330_STATE_WFP (1 << 5)
160#define PL330_STATE_KILLING (1 << 6)
161#define PL330_STATE_FAULT_COMPLETING (1 << 7)
162#define PL330_STATE_CACHEMISS (1 << 8)
163#define PL330_STATE_UPDTPC (1 << 9)
164#define PL330_STATE_ATBARRIER (1 << 10)
165#define PL330_STATE_QUEUEBUSY (1 << 11)
166#define PL330_STATE_INVALID (1 << 15)
167
168#define PL330_STABLE_STATES (PL330_STATE_STOPPED | PL330_STATE_EXECUTING \
169 | PL330_STATE_WFE | PL330_STATE_FAULTING)
170
171#define CMD_DMAADDH 0x54
172#define CMD_DMAEND 0x00
173#define CMD_DMAFLUSHP 0x35
174#define CMD_DMAGO 0xa0
175#define CMD_DMALD 0x04
176#define CMD_DMALDP 0x25
177#define CMD_DMALP 0x20
178#define CMD_DMALPEND 0x28
179#define CMD_DMAKILL 0x01
180#define CMD_DMAMOV 0xbc
181#define CMD_DMANOP 0x18
182#define CMD_DMARMB 0x12
183#define CMD_DMASEV 0x34
184#define CMD_DMAST 0x08
185#define CMD_DMASTP 0x29
186#define CMD_DMASTZ 0x0c
187#define CMD_DMAWFE 0x36
188#define CMD_DMAWFP 0x30
189#define CMD_DMAWMB 0x13
190
191#define SZ_DMAADDH 3
192#define SZ_DMAEND 1
193#define SZ_DMAFLUSHP 2
194#define SZ_DMALD 1
195#define SZ_DMALDP 2
196#define SZ_DMALP 2
197#define SZ_DMALPEND 2
198#define SZ_DMAKILL 1
199#define SZ_DMAMOV 6
200#define SZ_DMANOP 1
201#define SZ_DMARMB 1
202#define SZ_DMASEV 2
203#define SZ_DMAST 1
204#define SZ_DMASTP 2
205#define SZ_DMASTZ 1
206#define SZ_DMAWFE 2
207#define SZ_DMAWFP 2
208#define SZ_DMAWMB 1
209#define SZ_DMAGO 6
210
211#define BRST_LEN(ccr) ((((ccr) >> CC_SRCBRSTLEN_SHFT) & 0xf) + 1)
212#define BRST_SIZE(ccr) (1 << (((ccr) >> CC_SRCBRSTSIZE_SHFT) & 0x7))
213
214#define BYTE_TO_BURST(b, ccr) ((b) / BRST_SIZE(ccr) / BRST_LEN(ccr))
215#define BURST_TO_BYTE(c, ccr) ((c) * BRST_SIZE(ccr) * BRST_LEN(ccr))
216
217/*
218 * With 256 bytes, we can do more than 2.5MB and 5MB xfers per req
219 * at 1byte/burst for P<->M and M<->M respectively.
220 * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
221 * should be enough for P<->M and M<->M respectively.
222 */
223#define MCODE_BUFF_PER_REQ 256
224
225/*
226 * Mark a _pl330_req as free.
227 * We do it by writing DMAEND as the first instruction
228 * because no valid request is going to have DMAEND as
229 * its first instruction to execute.
230 */
231#define MARK_FREE(req) do { \
232 _emit_END(0, (req)->mc_cpu); \
233 (req)->mc_len = 0; \
234 } while (0)
235
236/* If the _pl330_req is available to the client */
237#define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
238
239/* Use this _only_ to wait on transient states */
240#define UNTIL(t, s) while (!(_state(t) & (s))) cpu_relax();
241
242#ifdef PL330_DEBUG_MCGEN
243static unsigned cmd_line;
244#define PL330_DBGCMD_DUMP(off, x...) do { \
245 printk("%x:", cmd_line); \
246 printk(x); \
247 cmd_line += off; \
248 } while (0)
249#define PL330_DBGMC_START(addr) (cmd_line = addr)
250#else
251#define PL330_DBGCMD_DUMP(off, x...) do {} while (0)
252#define PL330_DBGMC_START(addr) do {} while (0)
253#endif
254
255struct _xfer_spec {
256 u32 ccr;
257 struct pl330_req *r;
258 struct pl330_xfer *x;
259};
260
261enum dmamov_dst {
262 SAR = 0,
263 CCR,
264 DAR,
265};
266
267enum pl330_dst {
268 SRC = 0,
269 DST,
270};
271
272enum pl330_cond {
273 SINGLE,
274 BURST,
275 ALWAYS,
276};
277
278struct _pl330_req {
279 u32 mc_bus;
280 void *mc_cpu;
281 /* Number of bytes taken to setup MC for the req */
282 u32 mc_len;
283 struct pl330_req *r;
284 /* Hook to attach to DMAC's list of reqs with due callback */
285 struct list_head rqd;
286};
287
288/* ToBeDone for tasklet */
289struct _pl330_tbd {
290 bool reset_dmac;
291 bool reset_mngr;
292 u8 reset_chan;
293};
294
295/* A DMAC Thread */
296struct pl330_thread {
297 u8 id;
298 int ev;
299 /* If the channel is not yet acquired by any client */
300 bool free;
301 /* Parent DMAC */
302 struct pl330_dmac *dmac;
303 /* Only two at a time */
304 struct _pl330_req req[2];
305 /* Index of the last submitted request */
306 unsigned lstenq;
307};
308
309enum pl330_dmac_state {
310 UNINIT,
311 INIT,
312 DYING,
313};
314
315/* A DMAC */
316struct pl330_dmac {
317 spinlock_t lock;
318 /* Holds list of reqs with due callbacks */
319 struct list_head req_done;
320 /* Pointer to platform specific stuff */
321 struct pl330_info *pinfo;
322 /* Maximum possible events/irqs */
323 int events[32];
324 /* BUS address of MicroCode buffer */
325 u32 mcode_bus;
326 /* CPU address of MicroCode buffer */
327 void *mcode_cpu;
328 /* List of all Channel threads */
329 struct pl330_thread *channels;
330 /* Pointer to the MANAGER thread */
331 struct pl330_thread *manager;
332 /* To handle bad news in interrupt */
333 struct tasklet_struct tasks;
334 struct _pl330_tbd dmac_tbd;
335 /* State of DMAC operation */
336 enum pl330_dmac_state state;
337};
338
339static inline void _callback(struct pl330_req *r, enum pl330_op_err err)
340{
341 if (r && r->xfer_cb)
342 r->xfer_cb(r->token, err);
343}
344
345static inline bool _queue_empty(struct pl330_thread *thrd)
346{
347 return (IS_FREE(&thrd->req[0]) && IS_FREE(&thrd->req[1]))
348 ? true : false;
349}
350
351static inline bool _queue_full(struct pl330_thread *thrd)
352{
353 return (IS_FREE(&thrd->req[0]) || IS_FREE(&thrd->req[1]))
354 ? false : true;
355}
356
357static inline bool is_manager(struct pl330_thread *thrd)
358{
359 struct pl330_dmac *pl330 = thrd->dmac;
360
361 /* MANAGER is indexed at the end */
362 if (thrd->id == pl330->pinfo->pcfg.num_chan)
363 return true;
364 else
365 return false;
366}
367
368/* If manager of the thread is in Non-Secure mode */
369static inline bool _manager_ns(struct pl330_thread *thrd)
370{
371 struct pl330_dmac *pl330 = thrd->dmac;
372
373 return (pl330->pinfo->pcfg.mode & DMAC_MODE_NS) ? true : false;
374}
375
376static inline u32 get_id(struct pl330_info *pi, u32 off)
377{
378 void __iomem *regs = pi->base;
379 u32 id = 0;
380
381 id |= (readb(regs + off + 0x0) << 0);
382 id |= (readb(regs + off + 0x4) << 8);
383 id |= (readb(regs + off + 0x8) << 16);
384 id |= (readb(regs + off + 0xc) << 24);
385
386 return id;
387}
388
389static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[],
390 enum pl330_dst da, u16 val)
391{
392 if (dry_run)
393 return SZ_DMAADDH;
394
395 buf[0] = CMD_DMAADDH;
396 buf[0] |= (da << 1);
397 *((u16 *)&buf[1]) = val;
398
399 PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n",
400 da == 1 ? "DA" : "SA", val);
401
402 return SZ_DMAADDH;
403}
404
405static inline u32 _emit_END(unsigned dry_run, u8 buf[])
406{
407 if (dry_run)
408 return SZ_DMAEND;
409
410 buf[0] = CMD_DMAEND;
411
412 PL330_DBGCMD_DUMP(SZ_DMAEND, "\tDMAEND\n");
413
414 return SZ_DMAEND;
415}
416
417static inline u32 _emit_FLUSHP(unsigned dry_run, u8 buf[], u8 peri)
418{
419 if (dry_run)
420 return SZ_DMAFLUSHP;
421
422 buf[0] = CMD_DMAFLUSHP;
423
424 peri &= 0x1f;
425 peri <<= 3;
426 buf[1] = peri;
427
428 PL330_DBGCMD_DUMP(SZ_DMAFLUSHP, "\tDMAFLUSHP %u\n", peri >> 3);
429
430 return SZ_DMAFLUSHP;
431}
432
433static inline u32 _emit_LD(unsigned dry_run, u8 buf[], enum pl330_cond cond)
434{
435 if (dry_run)
436 return SZ_DMALD;
437
438 buf[0] = CMD_DMALD;
439
440 if (cond == SINGLE)
441 buf[0] |= (0 << 1) | (1 << 0);
442 else if (cond == BURST)
443 buf[0] |= (1 << 1) | (1 << 0);
444
445 PL330_DBGCMD_DUMP(SZ_DMALD, "\tDMALD%c\n",
446 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'));
447
448 return SZ_DMALD;
449}
450
451static inline u32 _emit_LDP(unsigned dry_run, u8 buf[],
452 enum pl330_cond cond, u8 peri)
453{
454 if (dry_run)
455 return SZ_DMALDP;
456
457 buf[0] = CMD_DMALDP;
458
459 if (cond == BURST)
460 buf[0] |= (1 << 1);
461
462 peri &= 0x1f;
463 peri <<= 3;
464 buf[1] = peri;
465
466 PL330_DBGCMD_DUMP(SZ_DMALDP, "\tDMALDP%c %u\n",
467 cond == SINGLE ? 'S' : 'B', peri >> 3);
468
469 return SZ_DMALDP;
470}
471
472static inline u32 _emit_LP(unsigned dry_run, u8 buf[],
473 unsigned loop, u8 cnt)
474{
475 if (dry_run)
476 return SZ_DMALP;
477
478 buf[0] = CMD_DMALP;
479
480 if (loop)
481 buf[0] |= (1 << 1);
482
483 cnt--; /* DMAC increments by 1 internally */
484 buf[1] = cnt;
485
486 PL330_DBGCMD_DUMP(SZ_DMALP, "\tDMALP_%c %u\n", loop ? '1' : '0', cnt);
487
488 return SZ_DMALP;
489}
490
491struct _arg_LPEND {
492 enum pl330_cond cond;
493 bool forever;
494 unsigned loop;
495 u8 bjump;
496};
497
498static inline u32 _emit_LPEND(unsigned dry_run, u8 buf[],
499 const struct _arg_LPEND *arg)
500{
501 enum pl330_cond cond = arg->cond;
502 bool forever = arg->forever;
503 unsigned loop = arg->loop;
504 u8 bjump = arg->bjump;
505
506 if (dry_run)
507 return SZ_DMALPEND;
508
509 buf[0] = CMD_DMALPEND;
510
511 if (loop)
512 buf[0] |= (1 << 2);
513
514 if (!forever)
515 buf[0] |= (1 << 4);
516
517 if (cond == SINGLE)
518 buf[0] |= (0 << 1) | (1 << 0);
519 else if (cond == BURST)
520 buf[0] |= (1 << 1) | (1 << 0);
521
522 buf[1] = bjump;
523
524 PL330_DBGCMD_DUMP(SZ_DMALPEND, "\tDMALP%s%c_%c bjmpto_%x\n",
525 forever ? "FE" : "END",
526 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'),
527 loop ? '1' : '0',
528 bjump);
529
530 return SZ_DMALPEND;
531}
532
533static inline u32 _emit_KILL(unsigned dry_run, u8 buf[])
534{
535 if (dry_run)
536 return SZ_DMAKILL;
537
538 buf[0] = CMD_DMAKILL;
539
540 return SZ_DMAKILL;
541}
542
543static inline u32 _emit_MOV(unsigned dry_run, u8 buf[],
544 enum dmamov_dst dst, u32 val)
545{
546 if (dry_run)
547 return SZ_DMAMOV;
548
549 buf[0] = CMD_DMAMOV;
550 buf[1] = dst;
551 *((u32 *)&buf[2]) = val;
552
553 PL330_DBGCMD_DUMP(SZ_DMAMOV, "\tDMAMOV %s 0x%x\n",
554 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val);
555
556 return SZ_DMAMOV;
557}
558
559static inline u32 _emit_NOP(unsigned dry_run, u8 buf[])
560{
561 if (dry_run)
562 return SZ_DMANOP;
563
564 buf[0] = CMD_DMANOP;
565
566 PL330_DBGCMD_DUMP(SZ_DMANOP, "\tDMANOP\n");
567
568 return SZ_DMANOP;
569}
570
571static inline u32 _emit_RMB(unsigned dry_run, u8 buf[])
572{
573 if (dry_run)
574 return SZ_DMARMB;
575
576 buf[0] = CMD_DMARMB;
577
578 PL330_DBGCMD_DUMP(SZ_DMARMB, "\tDMARMB\n");
579
580 return SZ_DMARMB;
581}
582
583static inline u32 _emit_SEV(unsigned dry_run, u8 buf[], u8 ev)
584{
585 if (dry_run)
586 return SZ_DMASEV;
587
588 buf[0] = CMD_DMASEV;
589
590 ev &= 0x1f;
591 ev <<= 3;
592 buf[1] = ev;
593
594 PL330_DBGCMD_DUMP(SZ_DMASEV, "\tDMASEV %u\n", ev >> 3);
595
596 return SZ_DMASEV;
597}
598
599static inline u32 _emit_ST(unsigned dry_run, u8 buf[], enum pl330_cond cond)
600{
601 if (dry_run)
602 return SZ_DMAST;
603
604 buf[0] = CMD_DMAST;
605
606 if (cond == SINGLE)
607 buf[0] |= (0 << 1) | (1 << 0);
608 else if (cond == BURST)
609 buf[0] |= (1 << 1) | (1 << 0);
610
611 PL330_DBGCMD_DUMP(SZ_DMAST, "\tDMAST%c\n",
612 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'));
613
614 return SZ_DMAST;
615}
616
617static inline u32 _emit_STP(unsigned dry_run, u8 buf[],
618 enum pl330_cond cond, u8 peri)
619{
620 if (dry_run)
621 return SZ_DMASTP;
622
623 buf[0] = CMD_DMASTP;
624
625 if (cond == BURST)
626 buf[0] |= (1 << 1);
627
628 peri &= 0x1f;
629 peri <<= 3;
630 buf[1] = peri;
631
632 PL330_DBGCMD_DUMP(SZ_DMASTP, "\tDMASTP%c %u\n",
633 cond == SINGLE ? 'S' : 'B', peri >> 3);
634
635 return SZ_DMASTP;
636}
637
638static inline u32 _emit_STZ(unsigned dry_run, u8 buf[])
639{
640 if (dry_run)
641 return SZ_DMASTZ;
642
643 buf[0] = CMD_DMASTZ;
644
645 PL330_DBGCMD_DUMP(SZ_DMASTZ, "\tDMASTZ\n");
646
647 return SZ_DMASTZ;
648}
649
650static inline u32 _emit_WFE(unsigned dry_run, u8 buf[], u8 ev,
651 unsigned invalidate)
652{
653 if (dry_run)
654 return SZ_DMAWFE;
655
656 buf[0] = CMD_DMAWFE;
657
658 ev &= 0x1f;
659 ev <<= 3;
660 buf[1] = ev;
661
662 if (invalidate)
663 buf[1] |= (1 << 1);
664
665 PL330_DBGCMD_DUMP(SZ_DMAWFE, "\tDMAWFE %u%s\n",
666 ev >> 3, invalidate ? ", I" : "");
667
668 return SZ_DMAWFE;
669}
670
671static inline u32 _emit_WFP(unsigned dry_run, u8 buf[],
672 enum pl330_cond cond, u8 peri)
673{
674 if (dry_run)
675 return SZ_DMAWFP;
676
677 buf[0] = CMD_DMAWFP;
678
679 if (cond == SINGLE)
680 buf[0] |= (0 << 1) | (0 << 0);
681 else if (cond == BURST)
682 buf[0] |= (1 << 1) | (0 << 0);
683 else
684 buf[0] |= (0 << 1) | (1 << 0);
685
686 peri &= 0x1f;
687 peri <<= 3;
688 buf[1] = peri;
689
690 PL330_DBGCMD_DUMP(SZ_DMAWFP, "\tDMAWFP%c %u\n",
691 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'P'), peri >> 3);
692
693 return SZ_DMAWFP;
694}
695
696static inline u32 _emit_WMB(unsigned dry_run, u8 buf[])
697{
698 if (dry_run)
699 return SZ_DMAWMB;
700
701 buf[0] = CMD_DMAWMB;
702
703 PL330_DBGCMD_DUMP(SZ_DMAWMB, "\tDMAWMB\n");
704
705 return SZ_DMAWMB;
706}
707
708struct _arg_GO {
709 u8 chan;
710 u32 addr;
711 unsigned ns;
712};
713
714static inline u32 _emit_GO(unsigned dry_run, u8 buf[],
715 const struct _arg_GO *arg)
716{
717 u8 chan = arg->chan;
718 u32 addr = arg->addr;
719 unsigned ns = arg->ns;
720
721 if (dry_run)
722 return SZ_DMAGO;
723
724 buf[0] = CMD_DMAGO;
725 buf[0] |= (ns << 1);
726
727 buf[1] = chan & 0x7;
728
729 *((u32 *)&buf[2]) = addr;
730
731 return SZ_DMAGO;
732}
733
734#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
735
736/* Returns Time-Out */
737static bool _until_dmac_idle(struct pl330_thread *thrd)
738{
739 void __iomem *regs = thrd->dmac->pinfo->base;
740 unsigned long loops = msecs_to_loops(5);
741
742 do {
743 /* Until Manager is Idle */
744 if (!(readl(regs + DBGSTATUS) & DBG_BUSY))
745 break;
746
747 cpu_relax();
748 } while (--loops);
749
750 if (!loops)
751 return true;
752
753 return false;
754}
755
756static inline void _execute_DBGINSN(struct pl330_thread *thrd,
757 u8 insn[], bool as_manager)
758{
759 void __iomem *regs = thrd->dmac->pinfo->base;
760 u32 val;
761
762 val = (insn[0] << 16) | (insn[1] << 24);
763 if (!as_manager) {
764 val |= (1 << 0);
765 val |= (thrd->id << 8); /* Channel Number */
766 }
767 writel(val, regs + DBGINST0);
768
769 val = *((u32 *)&insn[2]);
770 writel(val, regs + DBGINST1);
771
772 /* If timed out due to halted state-machine */
773 if (_until_dmac_idle(thrd)) {
774 dev_err(thrd->dmac->pinfo->dev, "DMAC halted!\n");
775 return;
776 }
777
778 /* Get going */
779 writel(0, regs + DBGCMD);
780}
781
782static inline u32 _state(struct pl330_thread *thrd)
783{
784 void __iomem *regs = thrd->dmac->pinfo->base;
785 u32 val;
786
787 if (is_manager(thrd))
788 val = readl(regs + DS) & 0xf;
789 else
790 val = readl(regs + CS(thrd->id)) & 0xf;
791
792 switch (val) {
793 case DS_ST_STOP:
794 return PL330_STATE_STOPPED;
795 case DS_ST_EXEC:
796 return PL330_STATE_EXECUTING;
797 case DS_ST_CMISS:
798 return PL330_STATE_CACHEMISS;
799 case DS_ST_UPDTPC:
800 return PL330_STATE_UPDTPC;
801 case DS_ST_WFE:
802 return PL330_STATE_WFE;
803 case DS_ST_FAULT:
804 return PL330_STATE_FAULTING;
805 case DS_ST_ATBRR:
806 if (is_manager(thrd))
807 return PL330_STATE_INVALID;
808 else
809 return PL330_STATE_ATBARRIER;
810 case DS_ST_QBUSY:
811 if (is_manager(thrd))
812 return PL330_STATE_INVALID;
813 else
814 return PL330_STATE_QUEUEBUSY;
815 case DS_ST_WFP:
816 if (is_manager(thrd))
817 return PL330_STATE_INVALID;
818 else
819 return PL330_STATE_WFP;
820 case DS_ST_KILL:
821 if (is_manager(thrd))
822 return PL330_STATE_INVALID;
823 else
824 return PL330_STATE_KILLING;
825 case DS_ST_CMPLT:
826 if (is_manager(thrd))
827 return PL330_STATE_INVALID;
828 else
829 return PL330_STATE_COMPLETING;
830 case DS_ST_FLTCMP:
831 if (is_manager(thrd))
832 return PL330_STATE_INVALID;
833 else
834 return PL330_STATE_FAULT_COMPLETING;
835 default:
836 return PL330_STATE_INVALID;
837 }
838}
839
840/* If the request 'req' of thread 'thrd' is currently active */
841static inline bool _req_active(struct pl330_thread *thrd,
842 struct _pl330_req *req)
843{
844 void __iomem *regs = thrd->dmac->pinfo->base;
845 u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
846
847 if (IS_FREE(req))
848 return false;
849
850 return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
851}
852
853/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
854static inline unsigned _thrd_active(struct pl330_thread *thrd)
855{
856 if (_req_active(thrd, &thrd->req[0]))
857 return 1; /* First req active */
858
859 if (_req_active(thrd, &thrd->req[1]))
860 return 2; /* Second req active */
861
862 return 0;
863}
864
865static void _stop(struct pl330_thread *thrd)
866{
867 void __iomem *regs = thrd->dmac->pinfo->base;
868 u8 insn[6] = {0, 0, 0, 0, 0, 0};
869
870 if (_state(thrd) == PL330_STATE_FAULT_COMPLETING)
871 UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
872
873 /* Return if nothing needs to be done */
874 if (_state(thrd) == PL330_STATE_COMPLETING
875 || _state(thrd) == PL330_STATE_KILLING
876 || _state(thrd) == PL330_STATE_STOPPED)
877 return;
878
879 _emit_KILL(0, insn);
880
881 /* Stop generating interrupts for SEV */
882 writel(readl(regs + INTEN) & ~(1 << thrd->ev), regs + INTEN);
883
884 _execute_DBGINSN(thrd, insn, is_manager(thrd));
885}
886
887/* Start doing req 'idx' of thread 'thrd' */
888static bool _trigger(struct pl330_thread *thrd)
889{
890 void __iomem *regs = thrd->dmac->pinfo->base;
891 struct _pl330_req *req;
892 struct pl330_req *r;
893 struct _arg_GO go;
894 unsigned ns;
895 u8 insn[6] = {0, 0, 0, 0, 0, 0};
896
897 /* Return if already ACTIVE */
898 if (_state(thrd) != PL330_STATE_STOPPED)
899 return true;
900
901 if (!IS_FREE(&thrd->req[1 - thrd->lstenq]))
902 req = &thrd->req[1 - thrd->lstenq];
903 else if (!IS_FREE(&thrd->req[thrd->lstenq]))
904 req = &thrd->req[thrd->lstenq];
905 else
906 req = NULL;
907
908 /* Return if no request */
909 if (!req || !req->r)
910 return true;
911
912 r = req->r;
913
914 if (r->cfg)
915 ns = r->cfg->nonsecure ? 1 : 0;
916 else if (readl(regs + CS(thrd->id)) & CS_CNS)
917 ns = 1;
918 else
919 ns = 0;
920
921 /* See 'Abort Sources' point-4 at Page 2-25 */
922 if (_manager_ns(thrd) && !ns)
923 dev_info(thrd->dmac->pinfo->dev, "%s:%d Recipe for ABORT!\n",
924 __func__, __LINE__);
925
926 go.chan = thrd->id;
927 go.addr = req->mc_bus;
928 go.ns = ns;
929 _emit_GO(0, insn, &go);
930
931 /* Set to generate interrupts for SEV */
932 writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN);
933
934 /* Only manager can execute GO */
935 _execute_DBGINSN(thrd, insn, true);
936
937 return true;
938}
939
940static bool _start(struct pl330_thread *thrd)
941{
942 switch (_state(thrd)) {
943 case PL330_STATE_FAULT_COMPLETING:
944 UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
945
946 if (_state(thrd) == PL330_STATE_KILLING)
947 UNTIL(thrd, PL330_STATE_STOPPED)
948
949 case PL330_STATE_FAULTING:
950 _stop(thrd);
951
952 case PL330_STATE_KILLING:
953 case PL330_STATE_COMPLETING:
954 UNTIL(thrd, PL330_STATE_STOPPED)
955
956 case PL330_STATE_STOPPED:
957 return _trigger(thrd);
958
959 case PL330_STATE_WFP:
960 case PL330_STATE_QUEUEBUSY:
961 case PL330_STATE_ATBARRIER:
962 case PL330_STATE_UPDTPC:
963 case PL330_STATE_CACHEMISS:
964 case PL330_STATE_EXECUTING:
965 return true;
966
967 case PL330_STATE_WFE: /* For RESUME, nothing yet */
968 default:
969 return false;
970 }
971}
972
973static inline int _ldst_memtomem(unsigned dry_run, u8 buf[],
974 const struct _xfer_spec *pxs, int cyc)
975{
976 int off = 0;
977
978 while (cyc--) {
979 off += _emit_LD(dry_run, &buf[off], ALWAYS);
980 off += _emit_RMB(dry_run, &buf[off]);
981 off += _emit_ST(dry_run, &buf[off], ALWAYS);
982 off += _emit_WMB(dry_run, &buf[off]);
983 }
984
985 return off;
986}
987
988static inline int _ldst_devtomem(unsigned dry_run, u8 buf[],
989 const struct _xfer_spec *pxs, int cyc)
990{
991 int off = 0;
992
993 while (cyc--) {
994 off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
995 off += _emit_LDP(dry_run, &buf[off], SINGLE, pxs->r->peri);
996 off += _emit_ST(dry_run, &buf[off], ALWAYS);
997 off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
998 }
999
1000 return off;
1001}
1002
1003static inline int _ldst_memtodev(unsigned dry_run, u8 buf[],
1004 const struct _xfer_spec *pxs, int cyc)
1005{
1006 int off = 0;
1007
1008 while (cyc--) {
1009 off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
1010 off += _emit_LD(dry_run, &buf[off], ALWAYS);
1011 off += _emit_STP(dry_run, &buf[off], SINGLE, pxs->r->peri);
1012 off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
1013 }
1014
1015 return off;
1016}
1017
1018static int _bursts(unsigned dry_run, u8 buf[],
1019 const struct _xfer_spec *pxs, int cyc)
1020{
1021 int off = 0;
1022
1023 switch (pxs->r->rqtype) {
1024 case MEMTODEV:
1025 off += _ldst_memtodev(dry_run, &buf[off], pxs, cyc);
1026 break;
1027 case DEVTOMEM:
1028 off += _ldst_devtomem(dry_run, &buf[off], pxs, cyc);
1029 break;
1030 case MEMTOMEM:
1031 off += _ldst_memtomem(dry_run, &buf[off], pxs, cyc);
1032 break;
1033 default:
1034 off += 0x40000000; /* Scare off the Client */
1035 break;
1036 }
1037
1038 return off;
1039}
1040
1041/* Returns bytes consumed and updates bursts */
1042static inline int _loop(unsigned dry_run, u8 buf[],
1043 unsigned long *bursts, const struct _xfer_spec *pxs)
1044{
1045 int cyc, cycmax, szlp, szlpend, szbrst, off;
1046 unsigned lcnt0, lcnt1, ljmp0, ljmp1;
1047 struct _arg_LPEND lpend;
1048
1049 /* Max iterations possibile in DMALP is 256 */
1050 if (*bursts >= 256*256) {
1051 lcnt1 = 256;
1052 lcnt0 = 256;
1053 cyc = *bursts / lcnt1 / lcnt0;
1054 } else if (*bursts > 256) {
1055 lcnt1 = 256;
1056 lcnt0 = *bursts / lcnt1;
1057 cyc = 1;
1058 } else {
1059 lcnt1 = *bursts;
1060 lcnt0 = 0;
1061 cyc = 1;
1062 }
1063
1064 szlp = _emit_LP(1, buf, 0, 0);
1065 szbrst = _bursts(1, buf, pxs, 1);
1066
1067 lpend.cond = ALWAYS;
1068 lpend.forever = false;
1069 lpend.loop = 0;
1070 lpend.bjump = 0;
1071 szlpend = _emit_LPEND(1, buf, &lpend);
1072
1073 if (lcnt0) {
1074 szlp *= 2;
1075 szlpend *= 2;
1076 }
1077
1078 /*
1079 * Max bursts that we can unroll due to limit on the
1080 * size of backward jump that can be encoded in DMALPEND
1081 * which is 8-bits and hence 255
1082 */
1083 cycmax = (255 - (szlp + szlpend)) / szbrst;
1084
1085 cyc = (cycmax < cyc) ? cycmax : cyc;
1086
1087 off = 0;
1088
1089 if (lcnt0) {
1090 off += _emit_LP(dry_run, &buf[off], 0, lcnt0);
1091 ljmp0 = off;
1092 }
1093
1094 off += _emit_LP(dry_run, &buf[off], 1, lcnt1);
1095 ljmp1 = off;
1096
1097 off += _bursts(dry_run, &buf[off], pxs, cyc);
1098
1099 lpend.cond = ALWAYS;
1100 lpend.forever = false;
1101 lpend.loop = 1;
1102 lpend.bjump = off - ljmp1;
1103 off += _emit_LPEND(dry_run, &buf[off], &lpend);
1104
1105 if (lcnt0) {
1106 lpend.cond = ALWAYS;
1107 lpend.forever = false;
1108 lpend.loop = 0;
1109 lpend.bjump = off - ljmp0;
1110 off += _emit_LPEND(dry_run, &buf[off], &lpend);
1111 }
1112
1113 *bursts = lcnt1 * cyc;
1114 if (lcnt0)
1115 *bursts *= lcnt0;
1116
1117 return off;
1118}
1119
1120static inline int _setup_loops(unsigned dry_run, u8 buf[],
1121 const struct _xfer_spec *pxs)
1122{
1123 struct pl330_xfer *x = pxs->x;
1124 u32 ccr = pxs->ccr;
1125 unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr);
1126 int off = 0;
1127
1128 while (bursts) {
1129 c = bursts;
1130 off += _loop(dry_run, &buf[off], &c, pxs);
1131 bursts -= c;
1132 }
1133
1134 return off;
1135}
1136
1137static inline int _setup_xfer(unsigned dry_run, u8 buf[],
1138 const struct _xfer_spec *pxs)
1139{
1140 struct pl330_xfer *x = pxs->x;
1141 int off = 0;
1142
1143 /* DMAMOV SAR, x->src_addr */
1144 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr);
1145 /* DMAMOV DAR, x->dst_addr */
1146 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr);
1147
1148 /* Setup Loop(s) */
1149 off += _setup_loops(dry_run, &buf[off], pxs);
1150
1151 return off;
1152}
1153
1154/*
1155 * A req is a sequence of one or more xfer units.
1156 * Returns the number of bytes taken to setup the MC for the req.
1157 */
1158static int _setup_req(unsigned dry_run, struct pl330_thread *thrd,
1159 unsigned index, struct _xfer_spec *pxs)
1160{
1161 struct _pl330_req *req = &thrd->req[index];
1162 struct pl330_xfer *x;
1163 u8 *buf = req->mc_cpu;
1164 int off = 0;
1165
1166 PL330_DBGMC_START(req->mc_bus);
1167
1168 /* DMAMOV CCR, ccr */
1169 off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr);
1170
1171 x = pxs->r->x;
1172 do {
1173 /* Error if xfer length is not aligned at burst size */
1174 if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr)))
1175 return -EINVAL;
1176
1177 pxs->x = x;
1178 off += _setup_xfer(dry_run, &buf[off], pxs);
1179
1180 x = x->next;
1181 } while (x);
1182
1183 /* DMASEV peripheral/event */
1184 off += _emit_SEV(dry_run, &buf[off], thrd->ev);
1185 /* DMAEND */
1186 off += _emit_END(dry_run, &buf[off]);
1187
1188 return off;
1189}
1190
1191static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
1192{
1193 u32 ccr = 0;
1194
1195 if (rqc->src_inc)
1196 ccr |= CC_SRCINC;
1197
1198 if (rqc->dst_inc)
1199 ccr |= CC_DSTINC;
1200
1201 /* We set same protection levels for Src and DST for now */
1202 if (rqc->privileged)
1203 ccr |= CC_SRCPRI | CC_DSTPRI;
1204 if (rqc->nonsecure)
1205 ccr |= CC_SRCNS | CC_DSTNS;
1206 if (rqc->insnaccess)
1207 ccr |= CC_SRCIA | CC_DSTIA;
1208
1209 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT);
1210 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT);
1211
1212 ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
1213 ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
1214
1215 ccr |= (rqc->dcctl << CC_SRCCCTRL_SHFT);
1216 ccr |= (rqc->scctl << CC_DSTCCTRL_SHFT);
1217
1218 ccr |= (rqc->swap << CC_SWAP_SHFT);
1219
1220 return ccr;
1221}
1222
1223static inline bool _is_valid(u32 ccr)
1224{
1225 enum pl330_dstcachectrl dcctl;
1226 enum pl330_srccachectrl scctl;
1227
1228 dcctl = (ccr >> CC_DSTCCTRL_SHFT) & CC_DRCCCTRL_MASK;
1229 scctl = (ccr >> CC_SRCCCTRL_SHFT) & CC_SRCCCTRL_MASK;
1230
1231 if (dcctl == DINVALID1 || dcctl == DINVALID2
1232 || scctl == SINVALID1 || scctl == SINVALID2)
1233 return false;
1234 else
1235 return true;
1236}
1237
1238/*
1239 * Submit a list of xfers after which the client wants notification.
1240 * Client is not notified after each xfer unit, just once after all
1241 * xfer units are done or some error occurs.
1242 */
1243int pl330_submit_req(void *ch_id, struct pl330_req *r)
1244{
1245 struct pl330_thread *thrd = ch_id;
1246 struct pl330_dmac *pl330;
1247 struct pl330_info *pi;
1248 struct _xfer_spec xs;
1249 unsigned long flags;
1250 void __iomem *regs;
1251 unsigned idx;
1252 u32 ccr;
1253 int ret = 0;
1254
1255 /* No Req or Unacquired Channel or DMAC */
1256 if (!r || !thrd || thrd->free)
1257 return -EINVAL;
1258
1259 pl330 = thrd->dmac;
1260 pi = pl330->pinfo;
1261 regs = pi->base;
1262
1263 if (pl330->state == DYING
1264 || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) {
1265 dev_info(thrd->dmac->pinfo->dev, "%s:%d\n",
1266 __func__, __LINE__);
1267 return -EAGAIN;
1268 }
1269
1270 /* If request for non-existing peripheral */
1271 if (r->rqtype != MEMTOMEM && r->peri >= pi->pcfg.num_peri) {
1272 dev_info(thrd->dmac->pinfo->dev,
1273 "%s:%d Invalid peripheral(%u)!\n",
1274 __func__, __LINE__, r->peri);
1275 return -EINVAL;
1276 }
1277
1278 spin_lock_irqsave(&pl330->lock, flags);
1279
1280 if (_queue_full(thrd)) {
1281 ret = -EAGAIN;
1282 goto xfer_exit;
1283 }
1284
1285 /* Prefer Secure Channel */
1286 if (!_manager_ns(thrd))
1287 r->cfg->nonsecure = 0;
1288 else
1289 r->cfg->nonsecure = 1;
1290
1291 /* Use last settings, if not provided */
1292 if (r->cfg)
1293 ccr = _prepare_ccr(r->cfg);
1294 else
1295 ccr = readl(regs + CC(thrd->id));
1296
1297 /* If this req doesn't have valid xfer settings */
1298 if (!_is_valid(ccr)) {
1299 ret = -EINVAL;
1300 dev_info(thrd->dmac->pinfo->dev, "%s:%d Invalid CCR(%x)!\n",
1301 __func__, __LINE__, ccr);
1302 goto xfer_exit;
1303 }
1304
1305 idx = IS_FREE(&thrd->req[0]) ? 0 : 1;
1306
1307 xs.ccr = ccr;
1308 xs.r = r;
1309
1310 /* First dry run to check if req is acceptable */
1311 ret = _setup_req(1, thrd, idx, &xs);
1312 if (ret < 0)
1313 goto xfer_exit;
1314
1315 if (ret > pi->mcbufsz / 2) {
1316 dev_info(thrd->dmac->pinfo->dev,
1317 "%s:%d Trying increasing mcbufsz\n",
1318 __func__, __LINE__);
1319 ret = -ENOMEM;
1320 goto xfer_exit;
1321 }
1322
1323 /* Hook the request */
1324 thrd->lstenq = idx;
1325 thrd->req[idx].mc_len = _setup_req(0, thrd, idx, &xs);
1326 thrd->req[idx].r = r;
1327
1328 ret = 0;
1329
1330xfer_exit:
1331 spin_unlock_irqrestore(&pl330->lock, flags);
1332
1333 return ret;
1334}
1335EXPORT_SYMBOL(pl330_submit_req);
1336
1337static void pl330_dotask(unsigned long data)
1338{
1339 struct pl330_dmac *pl330 = (struct pl330_dmac *) data;
1340 struct pl330_info *pi = pl330->pinfo;
1341 unsigned long flags;
1342 int i;
1343
1344 spin_lock_irqsave(&pl330->lock, flags);
1345
1346 /* The DMAC itself gone nuts */
1347 if (pl330->dmac_tbd.reset_dmac) {
1348 pl330->state = DYING;
1349 /* Reset the manager too */
1350 pl330->dmac_tbd.reset_mngr = true;
1351 /* Clear the reset flag */
1352 pl330->dmac_tbd.reset_dmac = false;
1353 }
1354
1355 if (pl330->dmac_tbd.reset_mngr) {
1356 _stop(pl330->manager);
1357 /* Reset all channels */
1358 pl330->dmac_tbd.reset_chan = (1 << pi->pcfg.num_chan) - 1;
1359 /* Clear the reset flag */
1360 pl330->dmac_tbd.reset_mngr = false;
1361 }
1362
1363 for (i = 0; i < pi->pcfg.num_chan; i++) {
1364
1365 if (pl330->dmac_tbd.reset_chan & (1 << i)) {
1366 struct pl330_thread *thrd = &pl330->channels[i];
1367 void __iomem *regs = pi->base;
1368 enum pl330_op_err err;
1369
1370 _stop(thrd);
1371
1372 if (readl(regs + FSC) & (1 << thrd->id))
1373 err = PL330_ERR_FAIL;
1374 else
1375 err = PL330_ERR_ABORT;
1376
1377 spin_unlock_irqrestore(&pl330->lock, flags);
1378
1379 _callback(thrd->req[1 - thrd->lstenq].r, err);
1380 _callback(thrd->req[thrd->lstenq].r, err);
1381
1382 spin_lock_irqsave(&pl330->lock, flags);
1383
1384 thrd->req[0].r = NULL;
1385 thrd->req[1].r = NULL;
1386 MARK_FREE(&thrd->req[0]);
1387 MARK_FREE(&thrd->req[1]);
1388
1389 /* Clear the reset flag */
1390 pl330->dmac_tbd.reset_chan &= ~(1 << i);
1391 }
1392 }
1393
1394 spin_unlock_irqrestore(&pl330->lock, flags);
1395
1396 return;
1397}
1398
1399/* Returns 1 if state was updated, 0 otherwise */
1400int pl330_update(const struct pl330_info *pi)
1401{
1402 struct _pl330_req *rqdone;
1403 struct pl330_dmac *pl330;
1404 unsigned long flags;
1405 void __iomem *regs;
1406 u32 val;
1407 int id, ev, ret = 0;
1408
1409 if (!pi || !pi->pl330_data)
1410 return 0;
1411
1412 regs = pi->base;
1413 pl330 = pi->pl330_data;
1414
1415 spin_lock_irqsave(&pl330->lock, flags);
1416
1417 val = readl(regs + FSM) & 0x1;
1418 if (val)
1419 pl330->dmac_tbd.reset_mngr = true;
1420 else
1421 pl330->dmac_tbd.reset_mngr = false;
1422
1423 val = readl(regs + FSC) & ((1 << pi->pcfg.num_chan) - 1);
1424 pl330->dmac_tbd.reset_chan |= val;
1425 if (val) {
1426 int i = 0;
1427 while (i < pi->pcfg.num_chan) {
1428 if (val & (1 << i)) {
1429 dev_info(pi->dev,
1430 "Reset Channel-%d\t CS-%x FTC-%x\n",
1431 i, readl(regs + CS(i)),
1432 readl(regs + FTC(i)));
1433 _stop(&pl330->channels[i]);
1434 }
1435 i++;
1436 }
1437 }
1438
1439 /* Check which event happened i.e, thread notified */
1440 val = readl(regs + ES);
1441 if (pi->pcfg.num_events < 32
1442 && val & ~((1 << pi->pcfg.num_events) - 1)) {
1443 pl330->dmac_tbd.reset_dmac = true;
1444 dev_err(pi->dev, "%s:%d Unexpected!\n", __func__, __LINE__);
1445 ret = 1;
1446 goto updt_exit;
1447 }
1448
1449 for (ev = 0; ev < pi->pcfg.num_events; ev++) {
1450 if (val & (1 << ev)) { /* Event occured */
1451 struct pl330_thread *thrd;
1452 u32 inten = readl(regs + INTEN);
1453 int active;
1454
1455 /* Clear the event */
1456 if (inten & (1 << ev))
1457 writel(1 << ev, regs + INTCLR);
1458
1459 ret = 1;
1460
1461 id = pl330->events[ev];
1462
1463 thrd = &pl330->channels[id];
1464
1465 active = _thrd_active(thrd);
1466 if (!active) /* Aborted */
1467 continue;
1468
1469 active -= 1;
1470
1471 rqdone = &thrd->req[active];
1472 MARK_FREE(rqdone);
1473
1474 /* Get going again ASAP */
1475 _start(thrd);
1476
1477 /* For now, just make a list of callbacks to be done */
1478 list_add_tail(&rqdone->rqd, &pl330->req_done);
1479 }
1480 }
1481
1482 /* Now that we are in no hurry, do the callbacks */
1483 while (!list_empty(&pl330->req_done)) {
1484 rqdone = container_of(pl330->req_done.next,
1485 struct _pl330_req, rqd);
1486
1487 list_del_init(&rqdone->rqd);
1488
1489 spin_unlock_irqrestore(&pl330->lock, flags);
1490 _callback(rqdone->r, PL330_ERR_NONE);
1491 spin_lock_irqsave(&pl330->lock, flags);
1492 }
1493
1494updt_exit:
1495 spin_unlock_irqrestore(&pl330->lock, flags);
1496
1497 if (pl330->dmac_tbd.reset_dmac
1498 || pl330->dmac_tbd.reset_mngr
1499 || pl330->dmac_tbd.reset_chan) {
1500 ret = 1;
1501 tasklet_schedule(&pl330->tasks);
1502 }
1503
1504 return ret;
1505}
1506EXPORT_SYMBOL(pl330_update);
1507
1508int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
1509{
1510 struct pl330_thread *thrd = ch_id;
1511 struct pl330_dmac *pl330;
1512 unsigned long flags;
1513 int ret = 0, active;
1514
1515 if (!thrd || thrd->free || thrd->dmac->state == DYING)
1516 return -EINVAL;
1517
1518 pl330 = thrd->dmac;
1519
1520 spin_lock_irqsave(&pl330->lock, flags);
1521
1522 switch (op) {
1523 case PL330_OP_FLUSH:
1524 /* Make sure the channel is stopped */
1525 _stop(thrd);
1526
1527 thrd->req[0].r = NULL;
1528 thrd->req[1].r = NULL;
1529 MARK_FREE(&thrd->req[0]);
1530 MARK_FREE(&thrd->req[1]);
1531 break;
1532
1533 case PL330_OP_ABORT:
1534 active = _thrd_active(thrd);
1535
1536 /* Make sure the channel is stopped */
1537 _stop(thrd);
1538
1539 /* ABORT is only for the active req */
1540 if (!active)
1541 break;
1542
1543 active--;
1544
1545 thrd->req[active].r = NULL;
1546 MARK_FREE(&thrd->req[active]);
1547
1548 /* Start the next */
1549 case PL330_OP_START:
1550 if (!_start(thrd))
1551 ret = -EIO;
1552 break;
1553
1554 default:
1555 ret = -EINVAL;
1556 }
1557
1558 spin_unlock_irqrestore(&pl330->lock, flags);
1559 return ret;
1560}
1561EXPORT_SYMBOL(pl330_chan_ctrl);
1562
1563int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
1564{
1565 struct pl330_thread *thrd = ch_id;
1566 struct pl330_dmac *pl330;
1567 struct pl330_info *pi;
1568 void __iomem *regs;
1569 int active;
1570 u32 val;
1571
1572 if (!pstatus || !thrd || thrd->free)
1573 return -EINVAL;
1574
1575 pl330 = thrd->dmac;
1576 pi = pl330->pinfo;
1577 regs = pi->base;
1578
1579 /* The client should remove the DMAC and add again */
1580 if (pl330->state == DYING)
1581 pstatus->dmac_halted = true;
1582 else
1583 pstatus->dmac_halted = false;
1584
1585 val = readl(regs + FSC);
1586 if (val & (1 << thrd->id))
1587 pstatus->faulting = true;
1588 else
1589 pstatus->faulting = false;
1590
1591 active = _thrd_active(thrd);
1592
1593 if (!active) {
1594 /* Indicate that the thread is not running */
1595 pstatus->top_req = NULL;
1596 pstatus->wait_req = NULL;
1597 } else {
1598 active--;
1599 pstatus->top_req = thrd->req[active].r;
1600 pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
1601 ? thrd->req[1 - active].r : NULL;
1602 }
1603
1604 pstatus->src_addr = readl(regs + SA(thrd->id));
1605 pstatus->dst_addr = readl(regs + DA(thrd->id));
1606
1607 return 0;
1608}
1609EXPORT_SYMBOL(pl330_chan_status);
1610
1611/* Reserve an event */
1612static inline int _alloc_event(struct pl330_thread *thrd)
1613{
1614 struct pl330_dmac *pl330 = thrd->dmac;
1615 struct pl330_info *pi = pl330->pinfo;
1616 int ev;
1617
1618 for (ev = 0; ev < pi->pcfg.num_events; ev++)
1619 if (pl330->events[ev] == -1) {
1620 pl330->events[ev] = thrd->id;
1621 return ev;
1622 }
1623
1624 return -1;
1625}
1626
1627/* Upon success, returns IdentityToken for the
1628 * allocated channel, NULL otherwise.
1629 */
1630void *pl330_request_channel(const struct pl330_info *pi)
1631{
1632 struct pl330_thread *thrd = NULL;
1633 struct pl330_dmac *pl330;
1634 unsigned long flags;
1635 int chans, i;
1636
1637 if (!pi || !pi->pl330_data)
1638 return NULL;
1639
1640 pl330 = pi->pl330_data;
1641
1642 if (pl330->state == DYING)
1643 return NULL;
1644
1645 chans = pi->pcfg.num_chan;
1646
1647 spin_lock_irqsave(&pl330->lock, flags);
1648
1649 for (i = 0; i < chans; i++) {
1650 thrd = &pl330->channels[i];
1651 if (thrd->free) {
1652 thrd->ev = _alloc_event(thrd);
1653 if (thrd->ev >= 0) {
1654 thrd->free = false;
1655 thrd->lstenq = 1;
1656 thrd->req[0].r = NULL;
1657 MARK_FREE(&thrd->req[0]);
1658 thrd->req[1].r = NULL;
1659 MARK_FREE(&thrd->req[1]);
1660 break;
1661 }
1662 }
1663 thrd = NULL;
1664 }
1665
1666 spin_unlock_irqrestore(&pl330->lock, flags);
1667
1668 return thrd;
1669}
1670EXPORT_SYMBOL(pl330_request_channel);
1671
1672/* Release an event */
1673static inline void _free_event(struct pl330_thread *thrd, int ev)
1674{
1675 struct pl330_dmac *pl330 = thrd->dmac;
1676 struct pl330_info *pi = pl330->pinfo;
1677
1678 /* If the event is valid and was held by the thread */
1679 if (ev >= 0 && ev < pi->pcfg.num_events
1680 && pl330->events[ev] == thrd->id)
1681 pl330->events[ev] = -1;
1682}
1683
1684void pl330_release_channel(void *ch_id)
1685{
1686 struct pl330_thread *thrd = ch_id;
1687 struct pl330_dmac *pl330;
1688 unsigned long flags;
1689
1690 if (!thrd || thrd->free)
1691 return;
1692
1693 _stop(thrd);
1694
1695 _callback(thrd->req[1 - thrd->lstenq].r, PL330_ERR_ABORT);
1696 _callback(thrd->req[thrd->lstenq].r, PL330_ERR_ABORT);
1697
1698 pl330 = thrd->dmac;
1699
1700 spin_lock_irqsave(&pl330->lock, flags);
1701 _free_event(thrd, thrd->ev);
1702 thrd->free = true;
1703 spin_unlock_irqrestore(&pl330->lock, flags);
1704}
1705EXPORT_SYMBOL(pl330_release_channel);
1706
1707/* Initialize the structure for PL330 configuration, that can be used
1708 * by the client driver the make best use of the DMAC
1709 */
1710static void read_dmac_config(struct pl330_info *pi)
1711{
1712 void __iomem *regs = pi->base;
1713 u32 val;
1714
1715 val = readl(regs + CRD) >> CRD_DATA_WIDTH_SHIFT;
1716 val &= CRD_DATA_WIDTH_MASK;
1717 pi->pcfg.data_bus_width = 8 * (1 << val);
1718
1719 val = readl(regs + CRD) >> CRD_DATA_BUFF_SHIFT;
1720 val &= CRD_DATA_BUFF_MASK;
1721 pi->pcfg.data_buf_dep = val + 1;
1722
1723 val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT;
1724 val &= CR0_NUM_CHANS_MASK;
1725 val += 1;
1726 pi->pcfg.num_chan = val;
1727
1728 val = readl(regs + CR0);
1729 if (val & CR0_PERIPH_REQ_SET) {
1730 val = (val >> CR0_NUM_PERIPH_SHIFT) & CR0_NUM_PERIPH_MASK;
1731 val += 1;
1732 pi->pcfg.num_peri = val;
1733 pi->pcfg.peri_ns = readl(regs + CR4);
1734 } else {
1735 pi->pcfg.num_peri = 0;
1736 }
1737
1738 val = readl(regs + CR0);
1739 if (val & CR0_BOOT_MAN_NS)
1740 pi->pcfg.mode |= DMAC_MODE_NS;
1741 else
1742 pi->pcfg.mode &= ~DMAC_MODE_NS;
1743
1744 val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT;
1745 val &= CR0_NUM_EVENTS_MASK;
1746 val += 1;
1747 pi->pcfg.num_events = val;
1748
1749 pi->pcfg.irq_ns = readl(regs + CR3);
1750
1751 pi->pcfg.periph_id = get_id(pi, PERIPH_ID);
1752 pi->pcfg.pcell_id = get_id(pi, PCELL_ID);
1753}
1754
1755static inline void _reset_thread(struct pl330_thread *thrd)
1756{
1757 struct pl330_dmac *pl330 = thrd->dmac;
1758 struct pl330_info *pi = pl330->pinfo;
1759
1760 thrd->req[0].mc_cpu = pl330->mcode_cpu
1761 + (thrd->id * pi->mcbufsz);
1762 thrd->req[0].mc_bus = pl330->mcode_bus
1763 + (thrd->id * pi->mcbufsz);
1764 thrd->req[0].r = NULL;
1765 MARK_FREE(&thrd->req[0]);
1766
1767 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
1768 + pi->mcbufsz / 2;
1769 thrd->req[1].mc_bus = thrd->req[0].mc_bus
1770 + pi->mcbufsz / 2;
1771 thrd->req[1].r = NULL;
1772 MARK_FREE(&thrd->req[1]);
1773}
1774
1775static int dmac_alloc_threads(struct pl330_dmac *pl330)
1776{
1777 struct pl330_info *pi = pl330->pinfo;
1778 int chans = pi->pcfg.num_chan;
1779 struct pl330_thread *thrd;
1780 int i;
1781
1782 /* Allocate 1 Manager and 'chans' Channel threads */
1783 pl330->channels = kzalloc((1 + chans) * sizeof(*thrd),
1784 GFP_KERNEL);
1785 if (!pl330->channels)
1786 return -ENOMEM;
1787
1788 /* Init Channel threads */
1789 for (i = 0; i < chans; i++) {
1790 thrd = &pl330->channels[i];
1791 thrd->id = i;
1792 thrd->dmac = pl330;
1793 _reset_thread(thrd);
1794 thrd->free = true;
1795 }
1796
1797 /* MANAGER is indexed at the end */
1798 thrd = &pl330->channels[chans];
1799 thrd->id = chans;
1800 thrd->dmac = pl330;
1801 thrd->free = false;
1802 pl330->manager = thrd;
1803
1804 return 0;
1805}
1806
1807static int dmac_alloc_resources(struct pl330_dmac *pl330)
1808{
1809 struct pl330_info *pi = pl330->pinfo;
1810 int chans = pi->pcfg.num_chan;
1811 int ret;
1812
1813 /*
1814 * Alloc MicroCode buffer for 'chans' Channel threads.
1815 * A channel's buffer offset is (Channel_Id * MCODE_BUFF_PERCHAN)
1816 */
1817 pl330->mcode_cpu = dma_alloc_coherent(pi->dev,
1818 chans * pi->mcbufsz,
1819 &pl330->mcode_bus, GFP_KERNEL);
1820 if (!pl330->mcode_cpu) {
1821 dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
1822 __func__, __LINE__);
1823 return -ENOMEM;
1824 }
1825
1826 ret = dmac_alloc_threads(pl330);
1827 if (ret) {
1828 dev_err(pi->dev, "%s:%d Can't to create channels for DMAC!\n",
1829 __func__, __LINE__);
1830 dma_free_coherent(pi->dev,
1831 chans * pi->mcbufsz,
1832 pl330->mcode_cpu, pl330->mcode_bus);
1833 return ret;
1834 }
1835
1836 return 0;
1837}
1838
1839int pl330_add(struct pl330_info *pi)
1840{
1841 struct pl330_dmac *pl330;
1842 void __iomem *regs;
1843 int i, ret;
1844
1845 if (!pi || !pi->dev)
1846 return -EINVAL;
1847
1848 /* If already added */
1849 if (pi->pl330_data)
1850 return -EINVAL;
1851
1852 /*
1853 * If the SoC can perform reset on the DMAC, then do it
1854 * before reading its configuration.
1855 */
1856 if (pi->dmac_reset)
1857 pi->dmac_reset(pi);
1858
1859 regs = pi->base;
1860
1861 /* Check if we can handle this DMAC */
1862 if (get_id(pi, PERIPH_ID) != PERIPH_ID_VAL
1863 || get_id(pi, PCELL_ID) != PCELL_ID_VAL) {
1864 dev_err(pi->dev, "PERIPH_ID 0x%x, PCELL_ID 0x%x !\n",
1865 readl(regs + PERIPH_ID), readl(regs + PCELL_ID));
1866 return -EINVAL;
1867 }
1868
1869 /* Read the configuration of the DMAC */
1870 read_dmac_config(pi);
1871
1872 if (pi->pcfg.num_events == 0) {
1873 dev_err(pi->dev, "%s:%d Can't work without events!\n",
1874 __func__, __LINE__);
1875 return -EINVAL;
1876 }
1877
1878 pl330 = kzalloc(sizeof(*pl330), GFP_KERNEL);
1879 if (!pl330) {
1880 dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
1881 __func__, __LINE__);
1882 return -ENOMEM;
1883 }
1884
1885 /* Assign the info structure and private data */
1886 pl330->pinfo = pi;
1887 pi->pl330_data = pl330;
1888
1889 spin_lock_init(&pl330->lock);
1890
1891 INIT_LIST_HEAD(&pl330->req_done);
1892
1893 /* Use default MC buffer size if not provided */
1894 if (!pi->mcbufsz)
1895 pi->mcbufsz = MCODE_BUFF_PER_REQ * 2;
1896
1897 /* Mark all events as free */
1898 for (i = 0; i < pi->pcfg.num_events; i++)
1899 pl330->events[i] = -1;
1900
1901 /* Allocate resources needed by the DMAC */
1902 ret = dmac_alloc_resources(pl330);
1903 if (ret) {
1904 dev_err(pi->dev, "Unable to create channels for DMAC\n");
1905 kfree(pl330);
1906 return ret;
1907 }
1908
1909 tasklet_init(&pl330->tasks, pl330_dotask, (unsigned long) pl330);
1910
1911 pl330->state = INIT;
1912
1913 return 0;
1914}
1915EXPORT_SYMBOL(pl330_add);
1916
1917static int dmac_free_threads(struct pl330_dmac *pl330)
1918{
1919 struct pl330_info *pi = pl330->pinfo;
1920 int chans = pi->pcfg.num_chan;
1921 struct pl330_thread *thrd;
1922 int i;
1923
1924 /* Release Channel threads */
1925 for (i = 0; i < chans; i++) {
1926 thrd = &pl330->channels[i];
1927 pl330_release_channel((void *)thrd);
1928 }
1929
1930 /* Free memory */
1931 kfree(pl330->channels);
1932
1933 return 0;
1934}
1935
1936static void dmac_free_resources(struct pl330_dmac *pl330)
1937{
1938 struct pl330_info *pi = pl330->pinfo;
1939 int chans = pi->pcfg.num_chan;
1940
1941 dmac_free_threads(pl330);
1942
1943 dma_free_coherent(pi->dev, chans * pi->mcbufsz,
1944 pl330->mcode_cpu, pl330->mcode_bus);
1945}
1946
1947void pl330_del(struct pl330_info *pi)
1948{
1949 struct pl330_dmac *pl330;
1950
1951 if (!pi || !pi->pl330_data)
1952 return;
1953
1954 pl330 = pi->pl330_data;
1955
1956 pl330->state = UNINIT;
1957
1958 tasklet_kill(&pl330->tasks);
1959
1960 /* Free DMAC resources */
1961 dmac_free_resources(pl330);
1962
1963 kfree(pl330);
1964 pi->pl330_data = NULL;
1965}
1966EXPORT_SYMBOL(pl330_del);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 1cf999ade4bc..ba65f6eedca6 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -266,13 +266,53 @@ static int vic_set_wake(unsigned int irq, unsigned int on)
266#endif /* CONFIG_PM */ 266#endif /* CONFIG_PM */
267 267
268static struct irq_chip vic_chip = { 268static struct irq_chip vic_chip = {
269 .name = "VIC", 269 .name = "VIC",
270 .ack = vic_ack_irq, 270 .ack = vic_ack_irq,
271 .mask = vic_mask_irq, 271 .mask = vic_mask_irq,
272 .unmask = vic_unmask_irq, 272 .unmask = vic_unmask_irq,
273 .set_wake = vic_set_wake, 273 .set_wake = vic_set_wake,
274}; 274};
275 275
276static void __init vic_disable(void __iomem *base)
277{
278 writel(0, base + VIC_INT_SELECT);
279 writel(0, base + VIC_INT_ENABLE);
280 writel(~0, base + VIC_INT_ENABLE_CLEAR);
281 writel(0, base + VIC_IRQ_STATUS);
282 writel(0, base + VIC_ITCR);
283 writel(~0, base + VIC_INT_SOFT_CLEAR);
284}
285
286static void __init vic_clear_interrupts(void __iomem *base)
287{
288 unsigned int i;
289
290 writel(0, base + VIC_PL190_VECT_ADDR);
291 for (i = 0; i < 19; i++) {
292 unsigned int value;
293
294 value = readl(base + VIC_PL190_VECT_ADDR);
295 writel(value, base + VIC_PL190_VECT_ADDR);
296 }
297}
298
299static void __init vic_set_irq_sources(void __iomem *base,
300 unsigned int irq_start, u32 vic_sources)
301{
302 unsigned int i;
303
304 for (i = 0; i < 32; i++) {
305 if (vic_sources & (1 << i)) {
306 unsigned int irq = irq_start + i;
307
308 set_irq_chip(irq, &vic_chip);
309 set_irq_chip_data(irq, base);
310 set_irq_handler(irq, handle_level_irq);
311 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
312 }
313 }
314}
315
276/* 316/*
277 * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. 317 * The PL190 cell from ARM has been modified by ST to handle 64 interrupts.
278 * The original cell has 32 interrupts, while the modified one has 64, 318 * The original cell has 32 interrupts, while the modified one has 64,
@@ -287,13 +327,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
287 int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; 327 int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;
288 328
289 /* Disable all interrupts initially. */ 329 /* Disable all interrupts initially. */
290 330 vic_disable(base);
291 writel(0, base + VIC_INT_SELECT);
292 writel(0, base + VIC_INT_ENABLE);
293 writel(~0, base + VIC_INT_ENABLE_CLEAR);
294 writel(0, base + VIC_IRQ_STATUS);
295 writel(0, base + VIC_ITCR);
296 writel(~0, base + VIC_INT_SOFT_CLEAR);
297 331
298 /* 332 /*
299 * Make sure we clear all existing interrupts. The vector registers 333 * Make sure we clear all existing interrupts. The vector registers
@@ -302,13 +336,8 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
302 * the second base address, which is 0x20 in the page 336 * the second base address, which is 0x20 in the page
303 */ 337 */
304 if (vic_2nd_block) { 338 if (vic_2nd_block) {
305 writel(0, base + VIC_PL190_VECT_ADDR); 339 vic_clear_interrupts(base);
306 for (i = 0; i < 19; i++) {
307 unsigned int value;
308 340
309 value = readl(base + VIC_PL190_VECT_ADDR);
310 writel(value, base + VIC_PL190_VECT_ADDR);
311 }
312 /* ST has 16 vectors as well, but we don't enable them by now */ 341 /* ST has 16 vectors as well, but we don't enable them by now */
313 for (i = 0; i < 16; i++) { 342 for (i = 0; i < 16; i++) {
314 void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); 343 void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4);
@@ -318,16 +347,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
318 writel(32, base + VIC_PL190_DEF_VECT_ADDR); 347 writel(32, base + VIC_PL190_DEF_VECT_ADDR);
319 } 348 }
320 349
321 for (i = 0; i < 32; i++) { 350 vic_set_irq_sources(base, irq_start, vic_sources);
322 if (vic_sources & (1 << i)) {
323 unsigned int irq = irq_start + i;
324
325 set_irq_chip(irq, &vic_chip);
326 set_irq_chip_data(irq, base);
327 set_irq_handler(irq, handle_level_irq);
328 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
329 }
330 }
331} 351}
332 352
333/** 353/**
@@ -365,37 +385,14 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
365 } 385 }
366 386
367 /* Disable all interrupts initially. */ 387 /* Disable all interrupts initially. */
388 vic_disable(base);
368 389
369 writel(0, base + VIC_INT_SELECT); 390 /* Make sure we clear all existing interrupts */
370 writel(0, base + VIC_INT_ENABLE); 391 vic_clear_interrupts(base);
371 writel(~0, base + VIC_INT_ENABLE_CLEAR);
372 writel(0, base + VIC_IRQ_STATUS);
373 writel(0, base + VIC_ITCR);
374 writel(~0, base + VIC_INT_SOFT_CLEAR);
375
376 /*
377 * Make sure we clear all existing interrupts
378 */
379 writel(0, base + VIC_PL190_VECT_ADDR);
380 for (i = 0; i < 19; i++) {
381 unsigned int value;
382
383 value = readl(base + VIC_PL190_VECT_ADDR);
384 writel(value, base + VIC_PL190_VECT_ADDR);
385 }
386 392
387 vic_init2(base); 393 vic_init2(base);
388 394
389 for (i = 0; i < 32; i++) { 395 vic_set_irq_sources(base, irq_start, vic_sources);
390 if (vic_sources & (1 << i)) {
391 unsigned int irq = irq_start + i;
392
393 set_irq_chip(irq, &vic_chip);
394 set_irq_chip_data(irq, base);
395 set_irq_handler(irq, handle_level_irq);
396 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
397 }
398 }
399 396
400 vic_pm_register(base, irq_start, resume_sources); 397 vic_pm_register(base, irq_start, resume_sources);
401} 398}
diff --git a/arch/arm/configs/cns3420vb_defconfig b/arch/arm/configs/cns3420vb_defconfig
new file mode 100644
index 000000000000..d5c088149e46
--- /dev/null
+++ b/arch/arm/configs/cns3420vb_defconfig
@@ -0,0 +1,831 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34-rc6
4# Sun May 2 21:58:08 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_TIME=y
9CONFIG_GENERIC_CLOCKEVENTS=y
10CONFIG_HAVE_PROC_CPU=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_NEED_DMA_MAP_STATE=y
22CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
23CONFIG_OPROFILE_ARMV6=y
24CONFIG_OPROFILE_ARM11_CORE=y
25CONFIG_VECTORS_BASE=0xffff0000
26CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
27CONFIG_CONSTRUCTORS=y
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION=""
36# CONFIG_LOCALVERSION_AUTO is not set
37CONFIG_HAVE_KERNEL_GZIP=y
38CONFIG_HAVE_KERNEL_LZO=y
39CONFIG_KERNEL_GZIP=y
40# CONFIG_KERNEL_BZIP2 is not set
41# CONFIG_KERNEL_LZMA is not set
42# CONFIG_KERNEL_LZO is not set
43# CONFIG_SWAP is not set
44CONFIG_SYSVIPC=y
45CONFIG_SYSVIPC_SYSCTL=y
46# CONFIG_BSD_PROCESS_ACCT is not set
47
48#
49# RCU Subsystem
50#
51CONFIG_TREE_RCU=y
52# CONFIG_TREE_PREEMPT_RCU is not set
53# CONFIG_TINY_RCU is not set
54# CONFIG_RCU_TRACE is not set
55CONFIG_RCU_FANOUT=32
56# CONFIG_RCU_FANOUT_EXACT is not set
57# CONFIG_TREE_RCU_TRACE is not set
58CONFIG_IKCONFIG=y
59CONFIG_IKCONFIG_PROC=y
60CONFIG_LOG_BUF_SHIFT=14
61CONFIG_CGROUPS=y
62# CONFIG_CGROUP_DEBUG is not set
63# CONFIG_CGROUP_NS is not set
64# CONFIG_CGROUP_FREEZER is not set
65# CONFIG_CGROUP_DEVICE is not set
66# CONFIG_CPUSETS is not set
67# CONFIG_CGROUP_CPUACCT is not set
68# CONFIG_RESOURCE_COUNTERS is not set
69# CONFIG_CGROUP_SCHED is not set
70CONFIG_SYSFS_DEPRECATED=y
71CONFIG_SYSFS_DEPRECATED_V2=y
72CONFIG_RELAY=y
73CONFIG_NAMESPACES=y
74# CONFIG_UTS_NS is not set
75# CONFIG_IPC_NS is not set
76# CONFIG_USER_NS is not set
77# CONFIG_PID_NS is not set
78CONFIG_BLK_DEV_INITRD=y
79CONFIG_INITRAMFS_SOURCE=""
80CONFIG_RD_GZIP=y
81CONFIG_RD_BZIP2=y
82CONFIG_RD_LZMA=y
83CONFIG_RD_LZO=y
84CONFIG_CC_OPTIMIZE_FOR_SIZE=y
85CONFIG_SYSCTL=y
86CONFIG_ANON_INODES=y
87# CONFIG_EMBEDDED is not set
88CONFIG_UID16=y
89CONFIG_SYSCTL_SYSCALL=y
90CONFIG_KALLSYMS=y
91# CONFIG_KALLSYMS_EXTRA_PASS is not set
92CONFIG_HOTPLUG=y
93CONFIG_PRINTK=y
94CONFIG_BUG=y
95CONFIG_ELF_CORE=y
96CONFIG_BASE_FULL=y
97CONFIG_FUTEX=y
98CONFIG_EPOLL=y
99CONFIG_SIGNALFD=y
100CONFIG_TIMERFD=y
101CONFIG_EVENTFD=y
102CONFIG_SHMEM=y
103CONFIG_AIO=y
104CONFIG_HAVE_PERF_EVENTS=y
105CONFIG_PERF_USE_VMALLOC=y
106
107#
108# Kernel Performance Events And Counters
109#
110# CONFIG_PERF_EVENTS is not set
111# CONFIG_PERF_COUNTERS is not set
112CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_COMPAT_BRK=y
114CONFIG_SLAB=y
115# CONFIG_SLUB is not set
116# CONFIG_SLOB is not set
117CONFIG_PROFILING=y
118CONFIG_OPROFILE=m
119CONFIG_HAVE_OPROFILE=y
120# CONFIG_KPROBES is not set
121CONFIG_HAVE_KPROBES=y
122CONFIG_HAVE_KRETPROBES=y
123
124#
125# GCOV-based kernel profiling
126#
127# CONFIG_GCOV_KERNEL is not set
128CONFIG_SLOW_WORK=y
129# CONFIG_SLOW_WORK_DEBUG is not set
130CONFIG_HAVE_GENERIC_DMA_COHERENT=y
131CONFIG_SLABINFO=y
132CONFIG_RT_MUTEXES=y
133CONFIG_BASE_SMALL=0
134CONFIG_MODULES=y
135# CONFIG_MODULE_FORCE_LOAD is not set
136CONFIG_MODULE_UNLOAD=y
137CONFIG_MODULE_FORCE_UNLOAD=y
138CONFIG_MODVERSIONS=y
139# CONFIG_MODULE_SRCVERSION_ALL is not set
140CONFIG_BLOCK=y
141CONFIG_LBDAF=y
142# CONFIG_BLK_DEV_BSG is not set
143# CONFIG_BLK_DEV_INTEGRITY is not set
144
145#
146# IO Schedulers
147#
148CONFIG_IOSCHED_NOOP=y
149CONFIG_IOSCHED_DEADLINE=y
150CONFIG_IOSCHED_CFQ=m
151# CONFIG_CFQ_GROUP_IOSCHED is not set
152CONFIG_DEFAULT_DEADLINE=y
153# CONFIG_DEFAULT_CFQ is not set
154# CONFIG_DEFAULT_NOOP is not set
155CONFIG_DEFAULT_IOSCHED="deadline"
156# CONFIG_INLINE_SPIN_TRYLOCK is not set
157# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
158# CONFIG_INLINE_SPIN_LOCK is not set
159# CONFIG_INLINE_SPIN_LOCK_BH is not set
160# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
161# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
162CONFIG_INLINE_SPIN_UNLOCK=y
163# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
164CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
165# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
166# CONFIG_INLINE_READ_TRYLOCK is not set
167# CONFIG_INLINE_READ_LOCK is not set
168# CONFIG_INLINE_READ_LOCK_BH is not set
169# CONFIG_INLINE_READ_LOCK_IRQ is not set
170# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
171CONFIG_INLINE_READ_UNLOCK=y
172# CONFIG_INLINE_READ_UNLOCK_BH is not set
173CONFIG_INLINE_READ_UNLOCK_IRQ=y
174# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
175# CONFIG_INLINE_WRITE_TRYLOCK is not set
176# CONFIG_INLINE_WRITE_LOCK is not set
177# CONFIG_INLINE_WRITE_LOCK_BH is not set
178# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
179# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
180CONFIG_INLINE_WRITE_UNLOCK=y
181# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
182CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
183# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
184# CONFIG_MUTEX_SPIN_ON_OWNER is not set
185# CONFIG_FREEZER is not set
186
187#
188# System Type
189#
190CONFIG_MMU=y
191# CONFIG_ARCH_AAEC2000 is not set
192# CONFIG_ARCH_INTEGRATOR is not set
193# CONFIG_ARCH_REALVIEW is not set
194# CONFIG_ARCH_VERSATILE is not set
195# CONFIG_ARCH_AT91 is not set
196# CONFIG_ARCH_BCMRING is not set
197# CONFIG_ARCH_CLPS711X is not set
198CONFIG_ARCH_CNS3XXX=y
199# CONFIG_ARCH_GEMINI is not set
200# CONFIG_ARCH_EBSA110 is not set
201# CONFIG_ARCH_EP93XX is not set
202# CONFIG_ARCH_FOOTBRIDGE is not set
203# CONFIG_ARCH_MXC is not set
204# CONFIG_ARCH_STMP3XXX is not set
205# CONFIG_ARCH_NETX is not set
206# CONFIG_ARCH_H720X is not set
207# CONFIG_ARCH_IOP13XX is not set
208# CONFIG_ARCH_IOP32X is not set
209# CONFIG_ARCH_IOP33X is not set
210# CONFIG_ARCH_IXP23XX is not set
211# CONFIG_ARCH_IXP2000 is not set
212# CONFIG_ARCH_IXP4XX is not set
213# CONFIG_ARCH_L7200 is not set
214# CONFIG_ARCH_DOVE is not set
215# CONFIG_ARCH_KIRKWOOD is not set
216# CONFIG_ARCH_LOKI is not set
217# CONFIG_ARCH_MV78XX0 is not set
218# CONFIG_ARCH_ORION5X is not set
219# CONFIG_ARCH_MMP is not set
220# CONFIG_ARCH_KS8695 is not set
221# CONFIG_ARCH_NS9XXX is not set
222# CONFIG_ARCH_W90X900 is not set
223# CONFIG_ARCH_NUC93X is not set
224# CONFIG_ARCH_PNX4008 is not set
225# CONFIG_ARCH_PXA is not set
226# CONFIG_ARCH_MSM is not set
227# CONFIG_ARCH_SHMOBILE is not set
228# CONFIG_ARCH_RPC is not set
229# CONFIG_ARCH_SA1100 is not set
230# CONFIG_ARCH_S3C2410 is not set
231# CONFIG_ARCH_S3C64XX is not set
232# CONFIG_ARCH_S5P6440 is not set
233# CONFIG_ARCH_S5P6442 is not set
234# CONFIG_ARCH_S5PC1XX is not set
235# CONFIG_ARCH_S5PV210 is not set
236# CONFIG_ARCH_SHARK is not set
237# CONFIG_ARCH_LH7A40X is not set
238# CONFIG_ARCH_U300 is not set
239# CONFIG_ARCH_U8500 is not set
240# CONFIG_ARCH_NOMADIK is not set
241# CONFIG_ARCH_DAVINCI is not set
242# CONFIG_ARCH_OMAP is not set
243
244#
245# CNS3XXX platform type
246#
247CONFIG_MACH_CNS3420VB=y
248
249#
250# Processor Type
251#
252CONFIG_CPU_V6=y
253# CONFIG_CPU_32v6K is not set
254CONFIG_CPU_32v6=y
255CONFIG_CPU_ABRT_EV6=y
256CONFIG_CPU_PABRT_V6=y
257CONFIG_CPU_CACHE_V6=y
258CONFIG_CPU_CACHE_VIPT=y
259CONFIG_CPU_COPY_V6=y
260CONFIG_CPU_TLB_V6=y
261CONFIG_CPU_HAS_ASID=y
262CONFIG_CPU_CP15=y
263CONFIG_CPU_CP15_MMU=y
264
265#
266# Processor Features
267#
268CONFIG_ARM_THUMB=y
269# CONFIG_CPU_ICACHE_DISABLE is not set
270# CONFIG_CPU_DCACHE_DISABLE is not set
271# CONFIG_CPU_BPREDICT_DISABLE is not set
272CONFIG_ARM_L1_CACHE_SHIFT=5
273CONFIG_CPU_HAS_PMU=y
274# CONFIG_ARM_ERRATA_411920 is not set
275CONFIG_ARM_GIC=y
276
277#
278# Bus support
279#
280# CONFIG_PCI_SYSCALL is not set
281# CONFIG_ARCH_SUPPORTS_MSI is not set
282# CONFIG_PCCARD is not set
283
284#
285# Kernel Features
286#
287# CONFIG_NO_HZ is not set
288# CONFIG_HIGH_RES_TIMERS is not set
289CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
290CONFIG_VMSPLIT_3G=y
291# CONFIG_VMSPLIT_2G is not set
292# CONFIG_VMSPLIT_1G is not set
293CONFIG_PAGE_OFFSET=0xC0000000
294CONFIG_PREEMPT_NONE=y
295# CONFIG_PREEMPT_VOLUNTARY is not set
296# CONFIG_PREEMPT is not set
297CONFIG_HZ=100
298CONFIG_AEABI=y
299CONFIG_OABI_COMPAT=y
300# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
301# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
302# CONFIG_HIGHMEM is not set
303CONFIG_SELECT_MEMORY_MODEL=y
304CONFIG_FLATMEM_MANUAL=y
305# CONFIG_DISCONTIGMEM_MANUAL is not set
306# CONFIG_SPARSEMEM_MANUAL is not set
307CONFIG_FLATMEM=y
308CONFIG_FLAT_NODE_MEM_MAP=y
309CONFIG_PAGEFLAGS_EXTENDED=y
310CONFIG_SPLIT_PTLOCK_CPUS=4
311# CONFIG_PHYS_ADDR_T_64BIT is not set
312CONFIG_ZONE_DMA_FLAG=0
313CONFIG_VIRT_TO_BUS=y
314# CONFIG_KSM is not set
315CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
316CONFIG_ALIGNMENT_TRAP=y
317# CONFIG_UACCESS_WITH_MEMCPY is not set
318
319#
320# Boot options
321#
322CONFIG_ZBOOT_ROM_TEXT=0x0
323CONFIG_ZBOOT_ROM_BSS=0x0
324CONFIG_CMDLINE="console=ttyS0,38400 mem=128M root=/dev/mmcblk0p1 ro rootwait"
325# CONFIG_XIP_KERNEL is not set
326# CONFIG_KEXEC is not set
327
328#
329# CPU Power Management
330#
331# CONFIG_CPU_IDLE is not set
332
333#
334# Floating point emulation
335#
336
337#
338# At least one emulation must be selected
339#
340# CONFIG_FPE_NWFPE is not set
341# CONFIG_FPE_FASTFPE is not set
342# CONFIG_VFP is not set
343
344#
345# Userspace binary formats
346#
347CONFIG_BINFMT_ELF=y
348# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
349CONFIG_HAVE_AOUT=y
350# CONFIG_BINFMT_AOUT is not set
351# CONFIG_BINFMT_MISC is not set
352
353#
354# Power management options
355#
356# CONFIG_PM is not set
357CONFIG_ARCH_SUSPEND_POSSIBLE=y
358# CONFIG_NET is not set
359
360#
361# Device Drivers
362#
363
364#
365# Generic Driver Options
366#
367CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
368# CONFIG_DEVTMPFS is not set
369CONFIG_STANDALONE=y
370CONFIG_PREVENT_FIRMWARE_BUILD=y
371CONFIG_FW_LOADER=y
372# CONFIG_FIRMWARE_IN_KERNEL is not set
373CONFIG_EXTRA_FIRMWARE=""
374# CONFIG_SYS_HYPERVISOR is not set
375CONFIG_MTD=y
376# CONFIG_MTD_DEBUG is not set
377# CONFIG_MTD_TESTS is not set
378# CONFIG_MTD_CONCAT is not set
379CONFIG_MTD_PARTITIONS=y
380# CONFIG_MTD_REDBOOT_PARTS is not set
381CONFIG_MTD_CMDLINE_PARTS=y
382# CONFIG_MTD_AFS_PARTS is not set
383# CONFIG_MTD_AR7_PARTS is not set
384
385#
386# User Modules And Translation Layers
387#
388CONFIG_MTD_CHAR=y
389CONFIG_MTD_BLKDEVS=y
390CONFIG_MTD_BLOCK=y
391# CONFIG_FTL is not set
392# CONFIG_NFTL is not set
393# CONFIG_INFTL is not set
394# CONFIG_RFD_FTL is not set
395# CONFIG_SSFDC is not set
396# CONFIG_MTD_OOPS is not set
397
398#
399# RAM/ROM/Flash chip drivers
400#
401CONFIG_MTD_CFI=y
402# CONFIG_MTD_JEDECPROBE is not set
403CONFIG_MTD_GEN_PROBE=y
404# CONFIG_MTD_CFI_ADV_OPTIONS is not set
405CONFIG_MTD_MAP_BANK_WIDTH_1=y
406CONFIG_MTD_MAP_BANK_WIDTH_2=y
407CONFIG_MTD_MAP_BANK_WIDTH_4=y
408# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
409# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
410# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
411CONFIG_MTD_CFI_I1=y
412CONFIG_MTD_CFI_I2=y
413# CONFIG_MTD_CFI_I4 is not set
414# CONFIG_MTD_CFI_I8 is not set
415# CONFIG_MTD_CFI_INTELEXT is not set
416CONFIG_MTD_CFI_AMDSTD=y
417# CONFIG_MTD_CFI_STAA is not set
418CONFIG_MTD_CFI_UTIL=y
419# CONFIG_MTD_RAM is not set
420# CONFIG_MTD_ROM is not set
421# CONFIG_MTD_ABSENT is not set
422
423#
424# Mapping drivers for chip access
425#
426# CONFIG_MTD_COMPLEX_MAPPINGS is not set
427CONFIG_MTD_PHYSMAP=y
428# CONFIG_MTD_PHYSMAP_COMPAT is not set
429# CONFIG_MTD_ARM_INTEGRATOR is not set
430# CONFIG_MTD_PLATRAM is not set
431
432#
433# Self-contained MTD device drivers
434#
435# CONFIG_MTD_SLRAM is not set
436# CONFIG_MTD_PHRAM is not set
437# CONFIG_MTD_MTDRAM is not set
438# CONFIG_MTD_BLOCK2MTD is not set
439
440#
441# Disk-On-Chip Device Drivers
442#
443# CONFIG_MTD_DOC2000 is not set
444# CONFIG_MTD_DOC2001 is not set
445# CONFIG_MTD_DOC2001PLUS is not set
446# CONFIG_MTD_NAND is not set
447# CONFIG_MTD_ONENAND is not set
448
449#
450# LPDDR flash memory drivers
451#
452# CONFIG_MTD_LPDDR is not set
453
454#
455# UBI - Unsorted block images
456#
457# CONFIG_MTD_UBI is not set
458# CONFIG_PARPORT is not set
459CONFIG_BLK_DEV=y
460# CONFIG_BLK_DEV_COW_COMMON is not set
461CONFIG_BLK_DEV_LOOP=y
462# CONFIG_BLK_DEV_CRYPTOLOOP is not set
463
464#
465# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
466#
467CONFIG_BLK_DEV_RAM=y
468CONFIG_BLK_DEV_RAM_COUNT=16
469CONFIG_BLK_DEV_RAM_SIZE=20000
470# CONFIG_BLK_DEV_XIP is not set
471# CONFIG_CDROM_PKTCDVD is not set
472# CONFIG_MISC_DEVICES is not set
473CONFIG_HAVE_IDE=y
474# CONFIG_IDE is not set
475
476#
477# SCSI device support
478#
479CONFIG_SCSI_MOD=y
480# CONFIG_RAID_ATTRS is not set
481CONFIG_SCSI=y
482CONFIG_SCSI_DMA=y
483# CONFIG_SCSI_TGT is not set
484# CONFIG_SCSI_NETLINK is not set
485CONFIG_SCSI_PROC_FS=y
486
487#
488# SCSI support type (disk, tape, CD-ROM)
489#
490CONFIG_BLK_DEV_SD=y
491# CONFIG_CHR_DEV_ST is not set
492# CONFIG_CHR_DEV_OSST is not set
493# CONFIG_BLK_DEV_SR is not set
494# CONFIG_CHR_DEV_SG is not set
495# CONFIG_CHR_DEV_SCH is not set
496# CONFIG_SCSI_MULTI_LUN is not set
497# CONFIG_SCSI_CONSTANTS is not set
498# CONFIG_SCSI_LOGGING is not set
499# CONFIG_SCSI_SCAN_ASYNC is not set
500CONFIG_SCSI_WAIT_SCAN=m
501
502#
503# SCSI Transports
504#
505# CONFIG_SCSI_SPI_ATTRS is not set
506# CONFIG_SCSI_FC_ATTRS is not set
507# CONFIG_SCSI_SAS_LIBSAS is not set
508# CONFIG_SCSI_SRP_ATTRS is not set
509CONFIG_SCSI_LOWLEVEL=y
510# CONFIG_LIBFC is not set
511# CONFIG_LIBFCOE is not set
512# CONFIG_SCSI_DEBUG is not set
513# CONFIG_SCSI_DH is not set
514# CONFIG_SCSI_OSD_INITIATOR is not set
515CONFIG_ATA=y
516# CONFIG_ATA_NONSTANDARD is not set
517CONFIG_ATA_VERBOSE_ERROR=y
518# CONFIG_SATA_PMP is not set
519# CONFIG_ATA_SFF is not set
520# CONFIG_MD is not set
521# CONFIG_PHONE is not set
522
523#
524# Input device support
525#
526CONFIG_INPUT=y
527# CONFIG_INPUT_FF_MEMLESS is not set
528# CONFIG_INPUT_POLLDEV is not set
529# CONFIG_INPUT_SPARSEKMAP is not set
530
531#
532# Userland interfaces
533#
534CONFIG_INPUT_MOUSEDEV=y
535# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
536CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
537CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
538# CONFIG_INPUT_JOYDEV is not set
539# CONFIG_INPUT_EVDEV is not set
540# CONFIG_INPUT_EVBUG is not set
541
542#
543# Input Device Drivers
544#
545# CONFIG_INPUT_KEYBOARD is not set
546# CONFIG_INPUT_MOUSE is not set
547# CONFIG_INPUT_JOYSTICK is not set
548# CONFIG_INPUT_TABLET is not set
549# CONFIG_INPUT_TOUCHSCREEN is not set
550# CONFIG_INPUT_MISC is not set
551
552#
553# Hardware I/O ports
554#
555# CONFIG_SERIO is not set
556# CONFIG_GAMEPORT is not set
557
558#
559# Character devices
560#
561CONFIG_VT=y
562CONFIG_CONSOLE_TRANSLATIONS=y
563CONFIG_VT_CONSOLE=y
564CONFIG_HW_CONSOLE=y
565# CONFIG_VT_HW_CONSOLE_BINDING is not set
566CONFIG_DEVKMEM=y
567# CONFIG_SERIAL_NONSTANDARD is not set
568
569#
570# Serial drivers
571#
572CONFIG_SERIAL_8250=y
573CONFIG_SERIAL_8250_CONSOLE=y
574CONFIG_SERIAL_8250_NR_UARTS=4
575CONFIG_SERIAL_8250_RUNTIME_UARTS=4
576# CONFIG_SERIAL_8250_EXTENDED is not set
577
578#
579# Non-8250 serial port support
580#
581CONFIG_SERIAL_CORE=y
582CONFIG_SERIAL_CORE_CONSOLE=y
583# CONFIG_SERIAL_TIMBERDALE is not set
584CONFIG_UNIX98_PTYS=y
585# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
586CONFIG_LEGACY_PTYS=y
587CONFIG_LEGACY_PTY_COUNT=16
588# CONFIG_IPMI_HANDLER is not set
589# CONFIG_HW_RANDOM is not set
590# CONFIG_R3964 is not set
591# CONFIG_RAW_DRIVER is not set
592# CONFIG_TCG_TPM is not set
593# CONFIG_I2C is not set
594# CONFIG_SPI is not set
595
596#
597# PPS support
598#
599# CONFIG_PPS is not set
600# CONFIG_W1 is not set
601# CONFIG_POWER_SUPPLY is not set
602# CONFIG_HWMON is not set
603# CONFIG_THERMAL is not set
604# CONFIG_WATCHDOG is not set
605CONFIG_SSB_POSSIBLE=y
606
607#
608# Sonics Silicon Backplane
609#
610# CONFIG_SSB is not set
611
612#
613# Multifunction device drivers
614#
615# CONFIG_MFD_CORE is not set
616# CONFIG_MFD_SM501 is not set
617# CONFIG_HTC_PASIC3 is not set
618# CONFIG_MFD_TMIO is not set
619# CONFIG_REGULATOR is not set
620# CONFIG_MEDIA_SUPPORT is not set
621
622#
623# Graphics support
624#
625# CONFIG_VGASTATE is not set
626# CONFIG_VIDEO_OUTPUT_CONTROL is not set
627# CONFIG_FB is not set
628# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
629
630#
631# Display device support
632#
633# CONFIG_DISPLAY_SUPPORT is not set
634
635#
636# Console display driver support
637#
638# CONFIG_VGA_CONSOLE is not set
639CONFIG_DUMMY_CONSOLE=y
640# CONFIG_SOUND is not set
641# CONFIG_HID_SUPPORT is not set
642# CONFIG_USB_SUPPORT is not set
643CONFIG_MMC=y
644# CONFIG_MMC_DEBUG is not set
645# CONFIG_MMC_UNSAFE_RESUME is not set
646
647#
648# MMC/SD/SDIO Card Drivers
649#
650CONFIG_MMC_BLOCK=y
651CONFIG_MMC_BLOCK_BOUNCE=y
652# CONFIG_SDIO_UART is not set
653# CONFIG_MMC_TEST is not set
654
655#
656# MMC/SD/SDIO Host Controller Drivers
657#
658CONFIG_MMC_SDHCI=y
659CONFIG_MMC_SDHCI_PLTFM=y
660# CONFIG_MEMSTICK is not set
661# CONFIG_NEW_LEDS is not set
662# CONFIG_ACCESSIBILITY is not set
663CONFIG_RTC_LIB=y
664# CONFIG_RTC_CLASS is not set
665# CONFIG_DMADEVICES is not set
666# CONFIG_AUXDISPLAY is not set
667# CONFIG_UIO is not set
668
669#
670# TI VLYNQ
671#
672# CONFIG_STAGING is not set
673
674#
675# File systems
676#
677CONFIG_EXT2_FS=y
678CONFIG_EXT2_FS_XATTR=y
679# CONFIG_EXT2_FS_POSIX_ACL is not set
680# CONFIG_EXT2_FS_SECURITY is not set
681# CONFIG_EXT2_FS_XIP is not set
682# CONFIG_EXT3_FS is not set
683# CONFIG_EXT4_FS is not set
684CONFIG_FS_MBCACHE=y
685# CONFIG_REISERFS_FS is not set
686# CONFIG_JFS_FS is not set
687# CONFIG_FS_POSIX_ACL is not set
688# CONFIG_XFS_FS is not set
689# CONFIG_GFS2_FS is not set
690# CONFIG_BTRFS_FS is not set
691# CONFIG_NILFS2_FS is not set
692CONFIG_FILE_LOCKING=y
693CONFIG_FSNOTIFY=y
694CONFIG_DNOTIFY=y
695CONFIG_INOTIFY=y
696CONFIG_INOTIFY_USER=y
697# CONFIG_QUOTA is not set
698# CONFIG_AUTOFS_FS is not set
699CONFIG_AUTOFS4_FS=y
700# CONFIG_FUSE_FS is not set
701
702#
703# Caches
704#
705CONFIG_FSCACHE=y
706# CONFIG_FSCACHE_STATS is not set
707# CONFIG_FSCACHE_HISTOGRAM is not set
708# CONFIG_FSCACHE_DEBUG is not set
709# CONFIG_FSCACHE_OBJECT_LIST is not set
710# CONFIG_CACHEFILES is not set
711
712#
713# CD-ROM/DVD Filesystems
714#
715# CONFIG_ISO9660_FS is not set
716# CONFIG_UDF_FS is not set
717
718#
719# DOS/FAT/NT Filesystems
720#
721# CONFIG_MSDOS_FS is not set
722# CONFIG_VFAT_FS is not set
723# CONFIG_NTFS_FS is not set
724
725#
726# Pseudo filesystems
727#
728CONFIG_PROC_FS=y
729CONFIG_PROC_SYSCTL=y
730CONFIG_PROC_PAGE_MONITOR=y
731CONFIG_SYSFS=y
732CONFIG_TMPFS=y
733# CONFIG_TMPFS_POSIX_ACL is not set
734# CONFIG_HUGETLB_PAGE is not set
735# CONFIG_CONFIGFS_FS is not set
736CONFIG_MISC_FILESYSTEMS=y
737# CONFIG_ADFS_FS is not set
738# CONFIG_AFFS_FS is not set
739# CONFIG_HFS_FS is not set
740# CONFIG_HFSPLUS_FS is not set
741# CONFIG_BEFS_FS is not set
742# CONFIG_BFS_FS is not set
743# CONFIG_EFS_FS is not set
744# CONFIG_JFFS2_FS is not set
745# CONFIG_LOGFS is not set
746# CONFIG_CRAMFS is not set
747# CONFIG_SQUASHFS is not set
748# CONFIG_VXFS_FS is not set
749# CONFIG_MINIX_FS is not set
750# CONFIG_OMFS_FS is not set
751# CONFIG_HPFS_FS is not set
752# CONFIG_QNX4FS_FS is not set
753# CONFIG_ROMFS_FS is not set
754# CONFIG_SYSV_FS is not set
755# CONFIG_UFS_FS is not set
756
757#
758# Partition Types
759#
760# CONFIG_PARTITION_ADVANCED is not set
761CONFIG_MSDOS_PARTITION=y
762# CONFIG_NLS is not set
763
764#
765# Kernel hacking
766#
767# CONFIG_PRINTK_TIME is not set
768# CONFIG_ENABLE_WARN_DEPRECATED is not set
769# CONFIG_ENABLE_MUST_CHECK is not set
770CONFIG_FRAME_WARN=1024
771# CONFIG_MAGIC_SYSRQ is not set
772# CONFIG_STRIP_ASM_SYMS is not set
773# CONFIG_UNUSED_SYMBOLS is not set
774CONFIG_DEBUG_FS=y
775# CONFIG_HEADERS_CHECK is not set
776# CONFIG_DEBUG_KERNEL is not set
777CONFIG_DEBUG_BUGVERBOSE=y
778CONFIG_DEBUG_MEMORY_INIT=y
779CONFIG_FRAME_POINTER=y
780# CONFIG_RCU_CPU_STALL_DETECTOR is not set
781# CONFIG_LKDTM is not set
782# CONFIG_LATENCYTOP is not set
783# CONFIG_SYSCTL_SYSCALL_CHECK is not set
784CONFIG_HAVE_FUNCTION_TRACER=y
785CONFIG_RING_BUFFER=y
786CONFIG_RING_BUFFER_ALLOW_SWAP=y
787CONFIG_TRACING_SUPPORT=y
788# CONFIG_FTRACE is not set
789# CONFIG_DYNAMIC_DEBUG is not set
790# CONFIG_SAMPLES is not set
791CONFIG_HAVE_ARCH_KGDB=y
792# CONFIG_ARM_UNWIND is not set
793# CONFIG_DEBUG_USER is not set
794# CONFIG_OC_ETM is not set
795
796#
797# Security options
798#
799# CONFIG_KEYS is not set
800# CONFIG_SECURITY is not set
801# CONFIG_SECURITYFS is not set
802# CONFIG_DEFAULT_SECURITY_SELINUX is not set
803# CONFIG_DEFAULT_SECURITY_SMACK is not set
804# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
805CONFIG_DEFAULT_SECURITY_DAC=y
806CONFIG_DEFAULT_SECURITY=""
807# CONFIG_CRYPTO is not set
808# CONFIG_BINARY_PRINTF is not set
809
810#
811# Library routines
812#
813CONFIG_BITREVERSE=y
814CONFIG_GENERIC_FIND_LAST_BIT=y
815CONFIG_CRC_CCITT=y
816# CONFIG_CRC16 is not set
817# CONFIG_CRC_T10DIF is not set
818# CONFIG_CRC_ITU_T is not set
819CONFIG_CRC32=y
820# CONFIG_CRC7 is not set
821# CONFIG_LIBCRC32C is not set
822CONFIG_ZLIB_INFLATE=y
823CONFIG_LZO_DECOMPRESS=y
824CONFIG_DECOMPRESS_GZIP=y
825CONFIG_DECOMPRESS_BZIP2=y
826CONFIG_DECOMPRESS_LZMA=y
827CONFIG_DECOMPRESS_LZO=y
828CONFIG_HAS_IOMEM=y
829CONFIG_HAS_IOPORT=y
830CONFIG_HAS_DMA=y
831CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig
index 03f76cfc941c..4b55dcb60029 100644
--- a/arch/arm/configs/mmp2_defconfig
+++ b/arch/arm/configs/mmp2_defconfig
@@ -1,13 +1,14 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Tue Jan 5 13:55:22 2010 4# Wed Apr 28 11:23:19 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y 9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_HAVE_PROC_CPU=y
11CONFIG_GENERIC_HARDIRQS=y 12CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y 13CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y 14CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,6 +19,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y 19CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y 20CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y 21CONFIG_GENERIC_CALIBRATE_DELAY=y
22CONFIG_NEED_DMA_MAP_STATE=y
21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 23CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
22CONFIG_VECTORS_BASE=0xffff0000 24CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 25CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -32,6 +34,12 @@ CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32 34CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION="" 35CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y 36CONFIG_LOCALVERSION_AUTO=y
37CONFIG_HAVE_KERNEL_GZIP=y
38CONFIG_HAVE_KERNEL_LZO=y
39CONFIG_KERNEL_GZIP=y
40# CONFIG_KERNEL_BZIP2 is not set
41# CONFIG_KERNEL_LZMA is not set
42# CONFIG_KERNEL_LZO is not set
35CONFIG_SWAP=y 43CONFIG_SWAP=y
36CONFIG_SYSVIPC=y 44CONFIG_SYSVIPC=y
37CONFIG_SYSVIPC_SYSCTL=y 45CONFIG_SYSVIPC_SYSCTL=y
@@ -52,7 +60,6 @@ CONFIG_RCU_FANOUT=32
52# CONFIG_TREE_RCU_TRACE is not set 60# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_IKCONFIG is not set 61# CONFIG_IKCONFIG is not set
54CONFIG_LOG_BUF_SHIFT=14 62CONFIG_LOG_BUF_SHIFT=14
55# CONFIG_GROUP_SCHED is not set
56# CONFIG_CGROUPS is not set 63# CONFIG_CGROUPS is not set
57CONFIG_SYSFS_DEPRECATED=y 64CONFIG_SYSFS_DEPRECATED=y
58CONFIG_SYSFS_DEPRECATED_V2=y 65CONFIG_SYSFS_DEPRECATED_V2=y
@@ -85,10 +92,14 @@ CONFIG_TIMERFD=y
85CONFIG_EVENTFD=y 92CONFIG_EVENTFD=y
86CONFIG_SHMEM=y 93CONFIG_SHMEM=y
87CONFIG_AIO=y 94CONFIG_AIO=y
95CONFIG_HAVE_PERF_EVENTS=y
96CONFIG_PERF_USE_VMALLOC=y
88 97
89# 98#
90# Kernel Performance Events And Counters 99# Kernel Performance Events And Counters
91# 100#
101# CONFIG_PERF_EVENTS is not set
102# CONFIG_PERF_COUNTERS is not set
92CONFIG_VM_EVENT_COUNTERS=y 103CONFIG_VM_EVENT_COUNTERS=y
93CONFIG_COMPAT_BRK=y 104CONFIG_COMPAT_BRK=y
94CONFIG_SLAB=y 105CONFIG_SLAB=y
@@ -104,6 +115,7 @@ CONFIG_HAVE_CLK=y
104# 115#
105# GCOV-based kernel profiling 116# GCOV-based kernel profiling
106# 117#
118# CONFIG_GCOV_KERNEL is not set
107# CONFIG_SLOW_WORK is not set 119# CONFIG_SLOW_WORK is not set
108CONFIG_HAVE_GENERIC_DMA_COHERENT=y 120CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_SLABINFO=y 121CONFIG_SLABINFO=y
@@ -170,6 +182,7 @@ CONFIG_MMU=y
170# CONFIG_ARCH_REALVIEW is not set 182# CONFIG_ARCH_REALVIEW is not set
171# CONFIG_ARCH_VERSATILE is not set 183# CONFIG_ARCH_VERSATILE is not set
172# CONFIG_ARCH_AT91 is not set 184# CONFIG_ARCH_AT91 is not set
185# CONFIG_ARCH_BCMRING is not set
173# CONFIG_ARCH_CLPS711X is not set 186# CONFIG_ARCH_CLPS711X is not set
174# CONFIG_ARCH_GEMINI is not set 187# CONFIG_ARCH_GEMINI is not set
175# CONFIG_ARCH_EBSA110 is not set 188# CONFIG_ARCH_EBSA110 is not set
@@ -179,7 +192,6 @@ CONFIG_MMU=y
179# CONFIG_ARCH_STMP3XXX is not set 192# CONFIG_ARCH_STMP3XXX is not set
180# CONFIG_ARCH_NETX is not set 193# CONFIG_ARCH_NETX is not set
181# CONFIG_ARCH_H720X is not set 194# CONFIG_ARCH_H720X is not set
182# CONFIG_ARCH_NOMADIK is not set
183# CONFIG_ARCH_IOP13XX is not set 195# CONFIG_ARCH_IOP13XX is not set
184# CONFIG_ARCH_IOP32X is not set 196# CONFIG_ARCH_IOP32X is not set
185# CONFIG_ARCH_IOP33X is not set 197# CONFIG_ARCH_IOP33X is not set
@@ -196,21 +208,26 @@ CONFIG_ARCH_MMP=y
196# CONFIG_ARCH_KS8695 is not set 208# CONFIG_ARCH_KS8695 is not set
197# CONFIG_ARCH_NS9XXX is not set 209# CONFIG_ARCH_NS9XXX is not set
198# CONFIG_ARCH_W90X900 is not set 210# CONFIG_ARCH_W90X900 is not set
211# CONFIG_ARCH_NUC93X is not set
199# CONFIG_ARCH_PNX4008 is not set 212# CONFIG_ARCH_PNX4008 is not set
200# CONFIG_ARCH_PXA is not set 213# CONFIG_ARCH_PXA is not set
201# CONFIG_ARCH_MSM is not set 214# CONFIG_ARCH_MSM is not set
215# CONFIG_ARCH_SHMOBILE is not set
202# CONFIG_ARCH_RPC is not set 216# CONFIG_ARCH_RPC is not set
203# CONFIG_ARCH_SA1100 is not set 217# CONFIG_ARCH_SA1100 is not set
204# CONFIG_ARCH_S3C2410 is not set 218# CONFIG_ARCH_S3C2410 is not set
205# CONFIG_ARCH_S3C64XX is not set 219# CONFIG_ARCH_S3C64XX is not set
220# CONFIG_ARCH_S5P6440 is not set
221# CONFIG_ARCH_S5P6442 is not set
206# CONFIG_ARCH_S5PC1XX is not set 222# CONFIG_ARCH_S5PC1XX is not set
223# CONFIG_ARCH_S5PV210 is not set
207# CONFIG_ARCH_SHARK is not set 224# CONFIG_ARCH_SHARK is not set
208# CONFIG_ARCH_LH7A40X is not set 225# CONFIG_ARCH_LH7A40X is not set
209# CONFIG_ARCH_U300 is not set 226# CONFIG_ARCH_U300 is not set
227# CONFIG_ARCH_U8500 is not set
228# CONFIG_ARCH_NOMADIK is not set
210# CONFIG_ARCH_DAVINCI is not set 229# CONFIG_ARCH_DAVINCI is not set
211# CONFIG_ARCH_OMAP is not set 230# CONFIG_ARCH_OMAP is not set
212# CONFIG_ARCH_BCMRING is not set
213# CONFIG_ARCH_U8500 is not set
214# CONFIG_MACH_TAVOREVB is not set 231# CONFIG_MACH_TAVOREVB is not set
215 232
216# 233#
@@ -218,8 +235,10 @@ CONFIG_ARCH_MMP=y
218# 235#
219# CONFIG_MACH_ASPENITE is not set 236# CONFIG_MACH_ASPENITE is not set
220# CONFIG_MACH_ZYLONITE2 is not set 237# CONFIG_MACH_ZYLONITE2 is not set
238# CONFIG_MACH_AVENGERS_LITE is not set
221# CONFIG_MACH_TTC_DKB is not set 239# CONFIG_MACH_TTC_DKB is not set
222CONFIG_MACH_FLINT=y 240CONFIG_MACH_FLINT=y
241CONFIG_MACH_MARVELL_JASPER=y
223CONFIG_CPU_MMP2=y 242CONFIG_CPU_MMP2=y
224CONFIG_PLAT_PXA=y 243CONFIG_PLAT_PXA=y
225 244
@@ -246,7 +265,10 @@ CONFIG_ARM_THUMB=y
246# CONFIG_CPU_ICACHE_DISABLE is not set 265# CONFIG_CPU_ICACHE_DISABLE is not set
247# CONFIG_CPU_DCACHE_DISABLE is not set 266# CONFIG_CPU_DCACHE_DISABLE is not set
248# CONFIG_CPU_BPREDICT_DISABLE is not set 267# CONFIG_CPU_BPREDICT_DISABLE is not set
268CONFIG_OUTER_CACHE=y
269CONFIG_CACHE_TAUROS2=y
249CONFIG_ARM_L1_CACHE_SHIFT=5 270CONFIG_ARM_L1_CACHE_SHIFT=5
271CONFIG_CPU_HAS_PMU=y
250# CONFIG_ARM_ERRATA_411920 is not set 272# CONFIG_ARM_ERRATA_411920 is not set
251CONFIG_COMMON_CLKDEV=y 273CONFIG_COMMON_CLKDEV=y
252 274
@@ -298,7 +320,7 @@ CONFIG_ALIGNMENT_TRAP=y
298# 320#
299CONFIG_ZBOOT_ROM_TEXT=0x0 321CONFIG_ZBOOT_ROM_TEXT=0x0
300CONFIG_ZBOOT_ROM_BSS=0x0 322CONFIG_ZBOOT_ROM_BSS=0x0
301CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M user_debug=255" 323CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=128M user_debug=255"
302# CONFIG_XIP_KERNEL is not set 324# CONFIG_XIP_KERNEL is not set
303# CONFIG_KEXEC is not set 325# CONFIG_KEXEC is not set
304 326
@@ -338,7 +360,6 @@ CONFIG_NET=y
338# Networking options 360# Networking options
339# 361#
340CONFIG_PACKET=y 362CONFIG_PACKET=y
341# CONFIG_PACKET_MMAP is not set
342CONFIG_UNIX=y 363CONFIG_UNIX=y
343CONFIG_XFRM=y 364CONFIG_XFRM=y
344# CONFIG_XFRM_USER is not set 365# CONFIG_XFRM_USER is not set
@@ -532,6 +553,7 @@ CONFIG_HAVE_IDE=y
532# 553#
533# SCSI device support 554# SCSI device support
534# 555#
556CONFIG_SCSI_MOD=y
535# CONFIG_RAID_ATTRS is not set 557# CONFIG_RAID_ATTRS is not set
536# CONFIG_SCSI is not set 558# CONFIG_SCSI is not set
537# CONFIG_SCSI_DMA is not set 559# CONFIG_SCSI_DMA is not set
@@ -640,6 +662,7 @@ CONFIG_SERIAL_PXA=y
640CONFIG_SERIAL_PXA_CONSOLE=y 662CONFIG_SERIAL_PXA_CONSOLE=y
641CONFIG_SERIAL_CORE=y 663CONFIG_SERIAL_CORE=y
642CONFIG_SERIAL_CORE_CONSOLE=y 664CONFIG_SERIAL_CORE_CONSOLE=y
665# CONFIG_SERIAL_TIMBERDALE is not set
643CONFIG_UNIX98_PTYS=y 666CONFIG_UNIX98_PTYS=y
644# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 667# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
645# CONFIG_LEGACY_PTYS is not set 668# CONFIG_LEGACY_PTYS is not set
@@ -667,6 +690,7 @@ CONFIG_I2C_HELPER_AUTO=y
667CONFIG_I2C_PXA=y 690CONFIG_I2C_PXA=y
668# CONFIG_I2C_PXA_SLAVE is not set 691# CONFIG_I2C_PXA_SLAVE is not set
669# CONFIG_I2C_SIMTEC is not set 692# CONFIG_I2C_SIMTEC is not set
693# CONFIG_I2C_XILINX is not set
670 694
671# 695#
672# External I2C/SMBus adapter drivers 696# External I2C/SMBus adapter drivers
@@ -679,15 +703,9 @@ CONFIG_I2C_PXA=y
679# 703#
680# CONFIG_I2C_PCA_PLATFORM is not set 704# CONFIG_I2C_PCA_PLATFORM is not set
681# CONFIG_I2C_STUB is not set 705# CONFIG_I2C_STUB is not set
682
683#
684# Miscellaneous I2C Chip support
685#
686# CONFIG_SENSORS_TSL2550 is not set
687# CONFIG_I2C_DEBUG_CORE is not set 706# CONFIG_I2C_DEBUG_CORE is not set
688# CONFIG_I2C_DEBUG_ALGO is not set 707# CONFIG_I2C_DEBUG_ALGO is not set
689# CONFIG_I2C_DEBUG_BUS is not set 708# CONFIG_I2C_DEBUG_BUS is not set
690# CONFIG_I2C_DEBUG_CHIP is not set
691# CONFIG_SPI is not set 709# CONFIG_SPI is not set
692 710
693# 711#
@@ -702,13 +720,16 @@ CONFIG_GPIOLIB=y
702# 720#
703# Memory mapped GPIO expanders: 721# Memory mapped GPIO expanders:
704# 722#
723# CONFIG_GPIO_IT8761E is not set
705 724
706# 725#
707# I2C GPIO expanders: 726# I2C GPIO expanders:
708# 727#
728# CONFIG_GPIO_MAX7300 is not set
709# CONFIG_GPIO_MAX732X is not set 729# CONFIG_GPIO_MAX732X is not set
710# CONFIG_GPIO_PCA953X is not set 730# CONFIG_GPIO_PCA953X is not set
711# CONFIG_GPIO_PCF857X is not set 731# CONFIG_GPIO_PCF857X is not set
732# CONFIG_GPIO_ADP5588 is not set
712 733
713# 734#
714# PCI GPIO expanders: 735# PCI GPIO expanders:
@@ -737,10 +758,12 @@ CONFIG_SSB_POSSIBLE=y
737# Multifunction device drivers 758# Multifunction device drivers
738# 759#
739CONFIG_MFD_CORE=y 760CONFIG_MFD_CORE=y
761# CONFIG_MFD_88PM860X is not set
740# CONFIG_MFD_SM501 is not set 762# CONFIG_MFD_SM501 is not set
741# CONFIG_MFD_ASIC3 is not set 763# CONFIG_MFD_ASIC3 is not set
742# CONFIG_HTC_EGPIO is not set 764# CONFIG_HTC_EGPIO is not set
743# CONFIG_HTC_PASIC3 is not set 765# CONFIG_HTC_PASIC3 is not set
766# CONFIG_HTC_I2CPLD is not set
744# CONFIG_TPS65010 is not set 767# CONFIG_TPS65010 is not set
745# CONFIG_TWL4030_CORE is not set 768# CONFIG_TWL4030_CORE is not set
746# CONFIG_MFD_TMIO is not set 769# CONFIG_MFD_TMIO is not set
@@ -749,24 +772,27 @@ CONFIG_MFD_CORE=y
749# CONFIG_MFD_TC6393XB is not set 772# CONFIG_MFD_TC6393XB is not set
750# CONFIG_PMIC_DA903X is not set 773# CONFIG_PMIC_DA903X is not set
751# CONFIG_PMIC_ADP5520 is not set 774# CONFIG_PMIC_ADP5520 is not set
775CONFIG_MFD_MAX8925=y
752# CONFIG_MFD_WM8400 is not set 776# CONFIG_MFD_WM8400 is not set
753# CONFIG_MFD_WM831X is not set 777# CONFIG_MFD_WM831X is not set
754# CONFIG_MFD_WM8350_I2C is not set 778# CONFIG_MFD_WM8350_I2C is not set
779# CONFIG_MFD_WM8994 is not set
755# CONFIG_MFD_PCF50633 is not set 780# CONFIG_MFD_PCF50633 is not set
756# CONFIG_AB3100_CORE is not set 781# CONFIG_AB3100_CORE is not set
757CONFIG_MFD_88PM8607=y
758CONFIG_REGULATOR=y 782CONFIG_REGULATOR=y
759# CONFIG_REGULATOR_DEBUG is not set 783# CONFIG_REGULATOR_DEBUG is not set
784# CONFIG_REGULATOR_DUMMY is not set
760# CONFIG_REGULATOR_FIXED_VOLTAGE is not set 785# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
761# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set 786# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
762# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set 787# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
763# CONFIG_REGULATOR_BQ24022 is not set 788# CONFIG_REGULATOR_BQ24022 is not set
764# CONFIG_REGULATOR_MAX1586 is not set 789# CONFIG_REGULATOR_MAX1586 is not set
765CONFIG_REGULATOR_MAX8660=y 790CONFIG_REGULATOR_MAX8649=y
791# CONFIG_REGULATOR_MAX8660 is not set
792CONFIG_REGULATOR_MAX8925=y
766# CONFIG_REGULATOR_LP3971 is not set 793# CONFIG_REGULATOR_LP3971 is not set
767# CONFIG_REGULATOR_TPS65023 is not set 794# CONFIG_REGULATOR_TPS65023 is not set
768# CONFIG_REGULATOR_TPS6507X is not set 795# CONFIG_REGULATOR_TPS6507X is not set
769CONFIG_REGULATOR_88PM8607=y
770# CONFIG_MEDIA_SUPPORT is not set 796# CONFIG_MEDIA_SUPPORT is not set
771 797
772# 798#
@@ -781,6 +807,7 @@ CONFIG_LCD_CLASS_DEVICE=y
781# CONFIG_LCD_PLATFORM is not set 807# CONFIG_LCD_PLATFORM is not set
782CONFIG_BACKLIGHT_CLASS_DEVICE=y 808CONFIG_BACKLIGHT_CLASS_DEVICE=y
783CONFIG_BACKLIGHT_GENERIC=y 809CONFIG_BACKLIGHT_GENERIC=y
810CONFIG_BACKLIGHT_MAX8925=y
784 811
785# 812#
786# Display device support 813# Display device support
@@ -821,6 +848,7 @@ CONFIG_RTC_INTF_DEV=y
821# CONFIG_RTC_DRV_DS1374 is not set 848# CONFIG_RTC_DRV_DS1374 is not set
822# CONFIG_RTC_DRV_DS1672 is not set 849# CONFIG_RTC_DRV_DS1672 is not set
823# CONFIG_RTC_DRV_MAX6900 is not set 850# CONFIG_RTC_DRV_MAX6900 is not set
851CONFIG_RTC_DRV_MAX8925=y
824# CONFIG_RTC_DRV_RS5C372 is not set 852# CONFIG_RTC_DRV_RS5C372 is not set
825# CONFIG_RTC_DRV_ISL1208 is not set 853# CONFIG_RTC_DRV_ISL1208 is not set
826# CONFIG_RTC_DRV_X1205 is not set 854# CONFIG_RTC_DRV_X1205 is not set
@@ -872,7 +900,6 @@ CONFIG_RTC_INTF_DEV=y
872# CONFIG_EXT2_FS is not set 900# CONFIG_EXT2_FS is not set
873# CONFIG_EXT3_FS is not set 901# CONFIG_EXT3_FS is not set
874# CONFIG_EXT4_FS is not set 902# CONFIG_EXT4_FS is not set
875CONFIG_EXT4_USE_FOR_EXT23=y
876# CONFIG_REISERFS_FS is not set 903# CONFIG_REISERFS_FS is not set
877# CONFIG_JFS_FS is not set 904# CONFIG_JFS_FS is not set
878CONFIG_FS_POSIX_ACL=y 905CONFIG_FS_POSIX_ACL=y
@@ -883,7 +910,7 @@ CONFIG_FS_POSIX_ACL=y
883# CONFIG_NILFS2_FS is not set 910# CONFIG_NILFS2_FS is not set
884CONFIG_FILE_LOCKING=y 911CONFIG_FILE_LOCKING=y
885CONFIG_FSNOTIFY=y 912CONFIG_FSNOTIFY=y
886CONFIG_DNOTIFY=y 913# CONFIG_DNOTIFY is not set
887CONFIG_INOTIFY=y 914CONFIG_INOTIFY=y
888CONFIG_INOTIFY_USER=y 915CONFIG_INOTIFY_USER=y
889# CONFIG_QUOTA is not set 916# CONFIG_QUOTA is not set
@@ -940,6 +967,7 @@ CONFIG_JFFS2_ZLIB=y
940# CONFIG_JFFS2_LZO is not set 967# CONFIG_JFFS2_LZO is not set
941CONFIG_JFFS2_RTIME=y 968CONFIG_JFFS2_RTIME=y
942# CONFIG_JFFS2_RUBIN is not set 969# CONFIG_JFFS2_RUBIN is not set
970# CONFIG_LOGFS is not set
943CONFIG_CRAMFS=y 971CONFIG_CRAMFS=y
944# CONFIG_SQUASHFS is not set 972# CONFIG_SQUASHFS is not set
945# CONFIG_VXFS_FS is not set 973# CONFIG_VXFS_FS is not set
@@ -967,6 +995,7 @@ CONFIG_SUNRPC_GSS=y
967CONFIG_RPCSEC_GSS_KRB5=y 995CONFIG_RPCSEC_GSS_KRB5=y
968# CONFIG_RPCSEC_GSS_SPKM3 is not set 996# CONFIG_RPCSEC_GSS_SPKM3 is not set
969# CONFIG_SMB_FS is not set 997# CONFIG_SMB_FS is not set
998# CONFIG_CEPH_FS is not set
970# CONFIG_CIFS is not set 999# CONFIG_CIFS is not set
971# CONFIG_NCP_FS is not set 1000# CONFIG_NCP_FS is not set
972# CONFIG_CODA_FS is not set 1001# CONFIG_CODA_FS is not set
@@ -990,7 +1019,7 @@ CONFIG_FRAME_WARN=1024
990CONFIG_MAGIC_SYSRQ=y 1019CONFIG_MAGIC_SYSRQ=y
991# CONFIG_STRIP_ASM_SYMS is not set 1020# CONFIG_STRIP_ASM_SYMS is not set
992# CONFIG_UNUSED_SYMBOLS is not set 1021# CONFIG_UNUSED_SYMBOLS is not set
993# CONFIG_DEBUG_FS is not set 1022CONFIG_DEBUG_FS=y
994# CONFIG_HEADERS_CHECK is not set 1023# CONFIG_HEADERS_CHECK is not set
995CONFIG_DEBUG_KERNEL=y 1024CONFIG_DEBUG_KERNEL=y
996# CONFIG_DEBUG_SHIRQ is not set 1025# CONFIG_DEBUG_SHIRQ is not set
@@ -1032,6 +1061,7 @@ CONFIG_DEBUG_MEMORY_INIT=y
1032# CONFIG_BACKTRACE_SELF_TEST is not set 1061# CONFIG_BACKTRACE_SELF_TEST is not set
1033# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1062# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1034# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1063# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1064# CONFIG_LKDTM is not set
1035# CONFIG_FAULT_INJECTION is not set 1065# CONFIG_FAULT_INJECTION is not set
1036# CONFIG_LATENCYTOP is not set 1066# CONFIG_LATENCYTOP is not set
1037# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1067# CONFIG_SYSCTL_SYSCALL_CHECK is not set
@@ -1052,6 +1082,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
1052# CONFIG_KMEMTRACE is not set 1082# CONFIG_KMEMTRACE is not set
1053# CONFIG_WORKQUEUE_TRACER is not set 1083# CONFIG_WORKQUEUE_TRACER is not set
1054# CONFIG_BLK_DEV_IO_TRACE is not set 1084# CONFIG_BLK_DEV_IO_TRACE is not set
1085CONFIG_DYNAMIC_DEBUG=y
1055# CONFIG_SAMPLES is not set 1086# CONFIG_SAMPLES is not set
1056CONFIG_HAVE_ARCH_KGDB=y 1087CONFIG_HAVE_ARCH_KGDB=y
1057# CONFIG_KGDB is not set 1088# CONFIG_KGDB is not set
@@ -1059,9 +1090,7 @@ CONFIG_ARM_UNWIND=y
1059CONFIG_DEBUG_USER=y 1090CONFIG_DEBUG_USER=y
1060CONFIG_DEBUG_ERRORS=y 1091CONFIG_DEBUG_ERRORS=y
1061# CONFIG_DEBUG_STACK_USAGE is not set 1092# CONFIG_DEBUG_STACK_USAGE is not set
1062CONFIG_DEBUG_LL=y 1093# CONFIG_DEBUG_LL is not set
1063# CONFIG_EARLY_PRINTK is not set
1064# CONFIG_DEBUG_ICEDCC is not set
1065# CONFIG_OC_ETM is not set 1094# CONFIG_OC_ETM is not set
1066 1095
1067# 1096#
diff --git a/arch/arm/configs/spear300_defconfig b/arch/arm/configs/spear300_defconfig
new file mode 100644
index 000000000000..35e64d1cb750
--- /dev/null
+++ b/arch/arm/configs/spear300_defconfig
@@ -0,0 +1,773 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32
4# Tue Mar 23 14:36:23 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_INIT_ENV_ARG_LIMIT=32
32CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_SWAP=y
35CONFIG_SYSVIPC=y
36CONFIG_SYSVIPC_SYSCTL=y
37CONFIG_BSD_PROCESS_ACCT=y
38# CONFIG_BSD_PROCESS_ACCT_V3 is not set
39
40#
41# RCU Subsystem
42#
43CONFIG_TREE_RCU=y
44# CONFIG_TREE_PREEMPT_RCU is not set
45# CONFIG_RCU_TRACE is not set
46CONFIG_RCU_FANOUT=32
47# CONFIG_RCU_FANOUT_EXACT is not set
48# CONFIG_TREE_RCU_TRACE is not set
49# CONFIG_IKCONFIG is not set
50CONFIG_LOG_BUF_SHIFT=17
51# CONFIG_GROUP_SCHED is not set
52# CONFIG_CGROUPS is not set
53# CONFIG_SYSFS_DEPRECATED_V2 is not set
54# CONFIG_RELAY is not set
55CONFIG_NAMESPACES=y
56# CONFIG_UTS_NS is not set
57# CONFIG_IPC_NS is not set
58# CONFIG_USER_NS is not set
59# CONFIG_PID_NS is not set
60CONFIG_BLK_DEV_INITRD=y
61CONFIG_INITRAMFS_SOURCE=""
62CONFIG_RD_GZIP=y
63CONFIG_RD_BZIP2=y
64CONFIG_RD_LZMA=y
65CONFIG_CC_OPTIMIZE_FOR_SIZE=y
66CONFIG_SYSCTL=y
67CONFIG_ANON_INODES=y
68# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73CONFIG_KALLSYMS_EXTRA_PASS=y
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SIGNALFD=y
82CONFIG_TIMERFD=y
83CONFIG_EVENTFD=y
84CONFIG_SHMEM=y
85CONFIG_AIO=y
86
87#
88# Kernel Performance Events And Counters
89#
90CONFIG_VM_EVENT_COUNTERS=y
91CONFIG_SLUB_DEBUG=y
92CONFIG_COMPAT_BRK=y
93# CONFIG_SLAB is not set
94CONFIG_SLUB=y
95# CONFIG_SLOB is not set
96# CONFIG_PROFILING is not set
97CONFIG_HAVE_OPROFILE=y
98# CONFIG_KPROBES is not set
99CONFIG_HAVE_KPROBES=y
100CONFIG_HAVE_KRETPROBES=y
101CONFIG_HAVE_CLK=y
102
103#
104# GCOV-based kernel profiling
105#
106# CONFIG_GCOV_KERNEL is not set
107# CONFIG_SLOW_WORK is not set
108CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_SLABINFO=y
110CONFIG_RT_MUTEXES=y
111CONFIG_BASE_SMALL=0
112CONFIG_MODULES=y
113# CONFIG_MODULE_FORCE_LOAD is not set
114CONFIG_MODULE_UNLOAD=y
115# CONFIG_MODULE_FORCE_UNLOAD is not set
116CONFIG_MODVERSIONS=y
117# CONFIG_MODULE_SRCVERSION_ALL is not set
118CONFIG_BLOCK=y
119CONFIG_LBDAF=y
120CONFIG_BLK_DEV_BSG=y
121# CONFIG_BLK_DEV_INTEGRITY is not set
122
123#
124# IO Schedulers
125#
126CONFIG_IOSCHED_NOOP=y
127CONFIG_IOSCHED_AS=y
128CONFIG_IOSCHED_DEADLINE=y
129CONFIG_IOSCHED_CFQ=y
130# CONFIG_DEFAULT_AS is not set
131# CONFIG_DEFAULT_DEADLINE is not set
132CONFIG_DEFAULT_CFQ=y
133# CONFIG_DEFAULT_NOOP is not set
134CONFIG_DEFAULT_IOSCHED="cfq"
135# CONFIG_FREEZER is not set
136
137#
138# System Type
139#
140CONFIG_MMU=y
141# CONFIG_ARCH_AAEC2000 is not set
142# CONFIG_ARCH_INTEGRATOR is not set
143# CONFIG_ARCH_REALVIEW is not set
144# CONFIG_ARCH_VERSATILE is not set
145# CONFIG_ARCH_AT91 is not set
146# CONFIG_ARCH_CLPS711X is not set
147# CONFIG_ARCH_GEMINI is not set
148# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set
150# CONFIG_ARCH_FOOTBRIDGE is not set
151# CONFIG_ARCH_MXC is not set
152# CONFIG_ARCH_STMP3XXX is not set
153# CONFIG_ARCH_NETX is not set
154# CONFIG_ARCH_H720X is not set
155# CONFIG_ARCH_NOMADIK is not set
156# CONFIG_ARCH_IOP13XX is not set
157# CONFIG_ARCH_IOP32X is not set
158# CONFIG_ARCH_IOP33X is not set
159# CONFIG_ARCH_IXP23XX is not set
160# CONFIG_ARCH_IXP2000 is not set
161# CONFIG_ARCH_IXP4XX is not set
162# CONFIG_ARCH_L7200 is not set
163# CONFIG_ARCH_KIRKWOOD is not set
164# CONFIG_ARCH_LOKI is not set
165# CONFIG_ARCH_MV78XX0 is not set
166# CONFIG_ARCH_ORION5X is not set
167# CONFIG_ARCH_MMP is not set
168# CONFIG_ARCH_KS8695 is not set
169# CONFIG_ARCH_NS9XXX is not set
170# CONFIG_ARCH_W90X900 is not set
171# CONFIG_ARCH_PNX4008 is not set
172# CONFIG_ARCH_PXA is not set
173# CONFIG_ARCH_MSM is not set
174# CONFIG_ARCH_RPC is not set
175# CONFIG_ARCH_SA1100 is not set
176# CONFIG_ARCH_S3C2410 is not set
177# CONFIG_ARCH_S3C64XX is not set
178# CONFIG_ARCH_S5PC1XX is not set
179# CONFIG_ARCH_SHARK is not set
180# CONFIG_ARCH_LH7A40X is not set
181# CONFIG_ARCH_U300 is not set
182# CONFIG_ARCH_DAVINCI is not set
183# CONFIG_ARCH_OMAP is not set
184# CONFIG_ARCH_BCMRING is not set
185CONFIG_PLAT_SPEAR=y
186CONFIG_ARCH_SPEAR3XX=y
187# CONFIG_ARCH_SPEAR6XX is not set
188CONFIG_MACH_SPEAR300=y
189# CONFIG_MACH_SPEAR310 is not set
190# CONFIG_MACH_SPEAR320 is not set
191CONFIG_BOARD_SPEAR300_EVB=y
192
193#
194# Processor Type
195#
196CONFIG_CPU_32=y
197CONFIG_CPU_ARM926T=y
198CONFIG_CPU_32v5=y
199CONFIG_CPU_ABRT_EV5TJ=y
200CONFIG_CPU_PABRT_LEGACY=y
201CONFIG_CPU_CACHE_VIVT=y
202CONFIG_CPU_COPY_V4WB=y
203CONFIG_CPU_TLB_V4WBI=y
204CONFIG_CPU_CP15=y
205CONFIG_CPU_CP15_MMU=y
206
207#
208# Processor Features
209#
210CONFIG_ARM_THUMB=y
211# CONFIG_CPU_ICACHE_DISABLE is not set
212# CONFIG_CPU_DCACHE_DISABLE is not set
213# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
214# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
215CONFIG_ARM_L1_CACHE_SHIFT=5
216CONFIG_ARM_VIC=y
217CONFIG_ARM_VIC_NR=2
218CONFIG_COMMON_CLKDEV=y
219
220#
221# Bus support
222#
223CONFIG_ARM_AMBA=y
224# CONFIG_PCI_SYSCALL is not set
225# CONFIG_ARCH_SUPPORTS_MSI is not set
226# CONFIG_PCCARD is not set
227
228#
229# Kernel Features
230#
231# CONFIG_NO_HZ is not set
232# CONFIG_HIGH_RES_TIMERS is not set
233CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
234CONFIG_VMSPLIT_3G=y
235# CONFIG_VMSPLIT_2G is not set
236# CONFIG_VMSPLIT_1G is not set
237CONFIG_PAGE_OFFSET=0xC0000000
238CONFIG_PREEMPT_NONE=y
239# CONFIG_PREEMPT_VOLUNTARY is not set
240# CONFIG_PREEMPT is not set
241CONFIG_HZ=100
242# CONFIG_AEABI is not set
243# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
244# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
245# CONFIG_HIGHMEM is not set
246CONFIG_SELECT_MEMORY_MODEL=y
247CONFIG_FLATMEM_MANUAL=y
248# CONFIG_DISCONTIGMEM_MANUAL is not set
249# CONFIG_SPARSEMEM_MANUAL is not set
250CONFIG_FLATMEM=y
251CONFIG_FLAT_NODE_MEM_MAP=y
252CONFIG_PAGEFLAGS_EXTENDED=y
253CONFIG_SPLIT_PTLOCK_CPUS=4096
254# CONFIG_PHYS_ADDR_T_64BIT is not set
255CONFIG_ZONE_DMA_FLAG=0
256CONFIG_VIRT_TO_BUS=y
257CONFIG_HAVE_MLOCK=y
258CONFIG_HAVE_MLOCKED_PAGE_BIT=y
259# CONFIG_KSM is not set
260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
261CONFIG_ALIGNMENT_TRAP=y
262# CONFIG_UACCESS_WITH_MEMCPY is not set
263
264#
265# Boot options
266#
267CONFIG_ZBOOT_ROM_TEXT=0
268CONFIG_ZBOOT_ROM_BSS=0
269CONFIG_CMDLINE=""
270# CONFIG_XIP_KERNEL is not set
271# CONFIG_KEXEC is not set
272
273#
274# CPU Power Management
275#
276# CONFIG_CPU_IDLE is not set
277
278#
279# Floating point emulation
280#
281
282#
283# At least one emulation must be selected
284#
285# CONFIG_FPE_NWFPE is not set
286# CONFIG_FPE_FASTFPE is not set
287# CONFIG_VFP is not set
288
289#
290# Userspace binary formats
291#
292CONFIG_BINFMT_ELF=y
293# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
294CONFIG_HAVE_AOUT=y
295# CONFIG_BINFMT_AOUT is not set
296CONFIG_BINFMT_MISC=y
297
298#
299# Power management options
300#
301# CONFIG_PM is not set
302CONFIG_ARCH_SUSPEND_POSSIBLE=y
303# CONFIG_NET is not set
304
305#
306# Device Drivers
307#
308
309#
310# Generic Driver Options
311#
312CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
313# CONFIG_DEVTMPFS is not set
314CONFIG_STANDALONE=y
315CONFIG_PREVENT_FIRMWARE_BUILD=y
316CONFIG_FW_LOADER=y
317CONFIG_FIRMWARE_IN_KERNEL=y
318CONFIG_EXTRA_FIRMWARE=""
319# CONFIG_DEBUG_DRIVER is not set
320# CONFIG_DEBUG_DEVRES is not set
321# CONFIG_SYS_HYPERVISOR is not set
322# CONFIG_MTD is not set
323# CONFIG_PARPORT is not set
324CONFIG_BLK_DEV=y
325# CONFIG_BLK_DEV_COW_COMMON is not set
326# CONFIG_BLK_DEV_LOOP is not set
327CONFIG_BLK_DEV_RAM=y
328CONFIG_BLK_DEV_RAM_COUNT=16
329CONFIG_BLK_DEV_RAM_SIZE=16384
330# CONFIG_BLK_DEV_XIP is not set
331# CONFIG_CDROM_PKTCDVD is not set
332CONFIG_MISC_DEVICES=y
333# CONFIG_ENCLOSURE_SERVICES is not set
334# CONFIG_C2PORT is not set
335
336#
337# EEPROM support
338#
339# CONFIG_EEPROM_93CX6 is not set
340CONFIG_HAVE_IDE=y
341# CONFIG_IDE is not set
342
343#
344# SCSI device support
345#
346# CONFIG_RAID_ATTRS is not set
347# CONFIG_SCSI is not set
348# CONFIG_SCSI_DMA is not set
349# CONFIG_SCSI_NETLINK is not set
350# CONFIG_ATA is not set
351# CONFIG_MD is not set
352# CONFIG_PHONE is not set
353
354#
355# Input device support
356#
357CONFIG_INPUT=y
358CONFIG_INPUT_FF_MEMLESS=y
359# CONFIG_INPUT_POLLDEV is not set
360
361#
362# Userland interfaces
363#
364CONFIG_INPUT_MOUSEDEV=y
365# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
366CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
367CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
368# CONFIG_INPUT_JOYDEV is not set
369# CONFIG_INPUT_EVDEV is not set
370# CONFIG_INPUT_EVBUG is not set
371
372#
373# Input Device Drivers
374#
375# CONFIG_INPUT_KEYBOARD is not set
376# CONFIG_INPUT_MOUSE is not set
377# CONFIG_INPUT_JOYSTICK is not set
378# CONFIG_INPUT_TABLET is not set
379# CONFIG_INPUT_TOUCHSCREEN is not set
380# CONFIG_INPUT_MISC is not set
381
382#
383# Hardware I/O ports
384#
385CONFIG_SERIO=y
386CONFIG_SERIO_SERPORT=y
387# CONFIG_SERIO_AMBAKMI is not set
388# CONFIG_SERIO_RAW is not set
389# CONFIG_GAMEPORT is not set
390
391#
392# Character devices
393#
394CONFIG_VT=y
395CONFIG_CONSOLE_TRANSLATIONS=y
396CONFIG_VT_CONSOLE=y
397CONFIG_HW_CONSOLE=y
398# CONFIG_VT_HW_CONSOLE_BINDING is not set
399CONFIG_DEVKMEM=y
400# CONFIG_SERIAL_NONSTANDARD is not set
401
402#
403# Serial drivers
404#
405# CONFIG_SERIAL_8250 is not set
406
407#
408# Non-8250 serial port support
409#
410# CONFIG_SERIAL_AMBA_PL010 is not set
411CONFIG_SERIAL_AMBA_PL011=y
412CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
413CONFIG_SERIAL_CORE=y
414CONFIG_SERIAL_CORE_CONSOLE=y
415CONFIG_UNIX98_PTYS=y
416# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
417# CONFIG_LEGACY_PTYS is not set
418# CONFIG_IPMI_HANDLER is not set
419# CONFIG_HW_RANDOM is not set
420# CONFIG_R3964 is not set
421CONFIG_RAW_DRIVER=y
422CONFIG_MAX_RAW_DEVS=8192
423# CONFIG_TCG_TPM is not set
424# CONFIG_I2C is not set
425# CONFIG_SPI is not set
426
427#
428# PPS support
429#
430# CONFIG_PPS is not set
431CONFIG_ARCH_REQUIRE_GPIOLIB=y
432CONFIG_GPIOLIB=y
433# CONFIG_DEBUG_GPIO is not set
434CONFIG_GPIO_SYSFS=y
435
436#
437# Memory mapped GPIO expanders:
438#
439CONFIG_GPIO_PL061=y
440
441#
442# I2C GPIO expanders:
443#
444
445#
446# PCI GPIO expanders:
447#
448
449#
450# SPI GPIO expanders:
451#
452
453#
454# AC97 GPIO expanders:
455#
456# CONFIG_W1 is not set
457# CONFIG_POWER_SUPPLY is not set
458# CONFIG_HWMON is not set
459# CONFIG_THERMAL is not set
460# CONFIG_WATCHDOG is not set
461CONFIG_SSB_POSSIBLE=y
462
463#
464# Sonics Silicon Backplane
465#
466# CONFIG_SSB is not set
467
468#
469# Multifunction device drivers
470#
471# CONFIG_MFD_CORE is not set
472# CONFIG_MFD_SM501 is not set
473# CONFIG_MFD_ASIC3 is not set
474# CONFIG_HTC_EGPIO is not set
475# CONFIG_HTC_PASIC3 is not set
476# CONFIG_MFD_TMIO is not set
477# CONFIG_MFD_T7L66XB is not set
478# CONFIG_MFD_TC6387XB is not set
479# CONFIG_MFD_TC6393XB is not set
480# CONFIG_REGULATOR is not set
481# CONFIG_MEDIA_SUPPORT is not set
482
483#
484# Graphics support
485#
486# CONFIG_VGASTATE is not set
487# CONFIG_VIDEO_OUTPUT_CONTROL is not set
488# CONFIG_FB is not set
489# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
490
491#
492# Display device support
493#
494# CONFIG_DISPLAY_SUPPORT is not set
495
496#
497# Console display driver support
498#
499# CONFIG_VGA_CONSOLE is not set
500CONFIG_DUMMY_CONSOLE=y
501# CONFIG_SOUND is not set
502# CONFIG_HID_SUPPORT is not set
503# CONFIG_USB_SUPPORT is not set
504# CONFIG_MMC is not set
505# CONFIG_MEMSTICK is not set
506# CONFIG_NEW_LEDS is not set
507# CONFIG_ACCESSIBILITY is not set
508CONFIG_RTC_LIB=y
509# CONFIG_RTC_CLASS is not set
510# CONFIG_DMADEVICES is not set
511# CONFIG_AUXDISPLAY is not set
512# CONFIG_UIO is not set
513
514#
515# TI VLYNQ
516#
517# CONFIG_STAGING is not set
518
519#
520# File systems
521#
522CONFIG_EXT2_FS=y
523CONFIG_EXT2_FS_XATTR=y
524# CONFIG_EXT2_FS_POSIX_ACL is not set
525CONFIG_EXT2_FS_SECURITY=y
526# CONFIG_EXT2_FS_XIP is not set
527CONFIG_EXT3_FS=y
528# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
529CONFIG_EXT3_FS_XATTR=y
530# CONFIG_EXT3_FS_POSIX_ACL is not set
531CONFIG_EXT3_FS_SECURITY=y
532# CONFIG_EXT4_FS is not set
533CONFIG_JBD=y
534# CONFIG_JBD_DEBUG is not set
535CONFIG_FS_MBCACHE=y
536# CONFIG_REISERFS_FS is not set
537# CONFIG_JFS_FS is not set
538# CONFIG_FS_POSIX_ACL is not set
539# CONFIG_XFS_FS is not set
540# CONFIG_GFS2_FS is not set
541# CONFIG_BTRFS_FS is not set
542# CONFIG_NILFS2_FS is not set
543CONFIG_FILE_LOCKING=y
544CONFIG_FSNOTIFY=y
545CONFIG_DNOTIFY=y
546# CONFIG_INOTIFY is not set
547CONFIG_INOTIFY_USER=y
548# CONFIG_QUOTA is not set
549# CONFIG_AUTOFS_FS is not set
550CONFIG_AUTOFS4_FS=m
551# CONFIG_FUSE_FS is not set
552
553#
554# Caches
555#
556# CONFIG_FSCACHE is not set
557
558#
559# CD-ROM/DVD Filesystems
560#
561# CONFIG_ISO9660_FS is not set
562# CONFIG_UDF_FS is not set
563
564#
565# DOS/FAT/NT Filesystems
566#
567CONFIG_FAT_FS=m
568CONFIG_MSDOS_FS=m
569CONFIG_VFAT_FS=m
570CONFIG_FAT_DEFAULT_CODEPAGE=437
571CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
572# CONFIG_NTFS_FS is not set
573
574#
575# Pseudo filesystems
576#
577CONFIG_PROC_FS=y
578CONFIG_PROC_SYSCTL=y
579CONFIG_PROC_PAGE_MONITOR=y
580CONFIG_SYSFS=y
581CONFIG_TMPFS=y
582# CONFIG_TMPFS_POSIX_ACL is not set
583# CONFIG_HUGETLB_PAGE is not set
584# CONFIG_CONFIGFS_FS is not set
585CONFIG_MISC_FILESYSTEMS=y
586# CONFIG_ADFS_FS is not set
587# CONFIG_AFFS_FS is not set
588# CONFIG_HFS_FS is not set
589# CONFIG_HFSPLUS_FS is not set
590# CONFIG_BEFS_FS is not set
591# CONFIG_BFS_FS is not set
592# CONFIG_EFS_FS is not set
593# CONFIG_SQUASHFS is not set
594# CONFIG_VXFS_FS is not set
595# CONFIG_MINIX_FS is not set
596# CONFIG_OMFS_FS is not set
597# CONFIG_HPFS_FS is not set
598# CONFIG_QNX4FS_FS is not set
599# CONFIG_ROMFS_FS is not set
600# CONFIG_SYSV_FS is not set
601# CONFIG_UFS_FS is not set
602
603#
604# Partition Types
605#
606CONFIG_PARTITION_ADVANCED=y
607# CONFIG_ACORN_PARTITION is not set
608# CONFIG_OSF_PARTITION is not set
609# CONFIG_AMIGA_PARTITION is not set
610# CONFIG_ATARI_PARTITION is not set
611# CONFIG_MAC_PARTITION is not set
612CONFIG_MSDOS_PARTITION=y
613# CONFIG_BSD_DISKLABEL is not set
614# CONFIG_MINIX_SUBPARTITION is not set
615# CONFIG_SOLARIS_X86_PARTITION is not set
616# CONFIG_UNIXWARE_DISKLABEL is not set
617# CONFIG_LDM_PARTITION is not set
618# CONFIG_SGI_PARTITION is not set
619# CONFIG_ULTRIX_PARTITION is not set
620# CONFIG_SUN_PARTITION is not set
621# CONFIG_KARMA_PARTITION is not set
622# CONFIG_EFI_PARTITION is not set
623# CONFIG_SYSV68_PARTITION is not set
624CONFIG_NLS=y
625CONFIG_NLS_DEFAULT="utf8"
626CONFIG_NLS_CODEPAGE_437=y
627# CONFIG_NLS_CODEPAGE_737 is not set
628# CONFIG_NLS_CODEPAGE_775 is not set
629# CONFIG_NLS_CODEPAGE_850 is not set
630# CONFIG_NLS_CODEPAGE_852 is not set
631# CONFIG_NLS_CODEPAGE_855 is not set
632# CONFIG_NLS_CODEPAGE_857 is not set
633# CONFIG_NLS_CODEPAGE_860 is not set
634# CONFIG_NLS_CODEPAGE_861 is not set
635# CONFIG_NLS_CODEPAGE_862 is not set
636# CONFIG_NLS_CODEPAGE_863 is not set
637# CONFIG_NLS_CODEPAGE_864 is not set
638# CONFIG_NLS_CODEPAGE_865 is not set
639# CONFIG_NLS_CODEPAGE_866 is not set
640# CONFIG_NLS_CODEPAGE_869 is not set
641# CONFIG_NLS_CODEPAGE_936 is not set
642# CONFIG_NLS_CODEPAGE_950 is not set
643# CONFIG_NLS_CODEPAGE_932 is not set
644# CONFIG_NLS_CODEPAGE_949 is not set
645# CONFIG_NLS_CODEPAGE_874 is not set
646# CONFIG_NLS_ISO8859_8 is not set
647# CONFIG_NLS_CODEPAGE_1250 is not set
648# CONFIG_NLS_CODEPAGE_1251 is not set
649CONFIG_NLS_ASCII=m
650# CONFIG_NLS_ISO8859_1 is not set
651# CONFIG_NLS_ISO8859_2 is not set
652# CONFIG_NLS_ISO8859_3 is not set
653# CONFIG_NLS_ISO8859_4 is not set
654# CONFIG_NLS_ISO8859_5 is not set
655# CONFIG_NLS_ISO8859_6 is not set
656# CONFIG_NLS_ISO8859_7 is not set
657# CONFIG_NLS_ISO8859_9 is not set
658# CONFIG_NLS_ISO8859_13 is not set
659# CONFIG_NLS_ISO8859_14 is not set
660# CONFIG_NLS_ISO8859_15 is not set
661# CONFIG_NLS_KOI8_R is not set
662# CONFIG_NLS_KOI8_U is not set
663# CONFIG_NLS_UTF8 is not set
664
665#
666# Kernel hacking
667#
668# CONFIG_PRINTK_TIME is not set
669CONFIG_ENABLE_WARN_DEPRECATED=y
670CONFIG_ENABLE_MUST_CHECK=y
671CONFIG_FRAME_WARN=1024
672CONFIG_MAGIC_SYSRQ=y
673# CONFIG_STRIP_ASM_SYMS is not set
674# CONFIG_UNUSED_SYMBOLS is not set
675CONFIG_DEBUG_FS=y
676# CONFIG_HEADERS_CHECK is not set
677CONFIG_DEBUG_KERNEL=y
678# CONFIG_DEBUG_SHIRQ is not set
679CONFIG_DETECT_SOFTLOCKUP=y
680# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
681CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
682CONFIG_DETECT_HUNG_TASK=y
683# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
684CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
685CONFIG_SCHED_DEBUG=y
686# CONFIG_SCHEDSTATS is not set
687# CONFIG_TIMER_STATS is not set
688# CONFIG_DEBUG_OBJECTS is not set
689# CONFIG_SLUB_DEBUG_ON is not set
690# CONFIG_SLUB_STATS is not set
691# CONFIG_DEBUG_KMEMLEAK is not set
692# CONFIG_DEBUG_RT_MUTEXES is not set
693# CONFIG_RT_MUTEX_TESTER is not set
694CONFIG_DEBUG_SPINLOCK=y
695# CONFIG_DEBUG_MUTEXES is not set
696# CONFIG_DEBUG_LOCK_ALLOC is not set
697# CONFIG_PROVE_LOCKING is not set
698# CONFIG_LOCK_STAT is not set
699CONFIG_DEBUG_SPINLOCK_SLEEP=y
700# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
701# CONFIG_DEBUG_KOBJECT is not set
702CONFIG_DEBUG_BUGVERBOSE=y
703CONFIG_DEBUG_INFO=y
704# CONFIG_DEBUG_VM is not set
705# CONFIG_DEBUG_WRITECOUNT is not set
706CONFIG_DEBUG_MEMORY_INIT=y
707# CONFIG_DEBUG_LIST is not set
708# CONFIG_DEBUG_SG is not set
709# CONFIG_DEBUG_NOTIFIERS is not set
710# CONFIG_DEBUG_CREDENTIALS is not set
711CONFIG_FRAME_POINTER=y
712# CONFIG_BOOT_PRINTK_DELAY is not set
713# CONFIG_RCU_TORTURE_TEST is not set
714CONFIG_RCU_CPU_STALL_DETECTOR=y
715# CONFIG_BACKTRACE_SELF_TEST is not set
716# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
717# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
718# CONFIG_FAULT_INJECTION is not set
719# CONFIG_LATENCYTOP is not set
720# CONFIG_SYSCTL_SYSCALL_CHECK is not set
721# CONFIG_PAGE_POISONING is not set
722CONFIG_HAVE_FUNCTION_TRACER=y
723CONFIG_TRACING_SUPPORT=y
724CONFIG_FTRACE=y
725# CONFIG_FUNCTION_TRACER is not set
726# CONFIG_IRQSOFF_TRACER is not set
727# CONFIG_SCHED_TRACER is not set
728# CONFIG_ENABLE_DEFAULT_TRACERS is not set
729# CONFIG_BOOT_TRACER is not set
730CONFIG_BRANCH_PROFILE_NONE=y
731# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
732# CONFIG_PROFILE_ALL_BRANCHES is not set
733# CONFIG_STACK_TRACER is not set
734# CONFIG_KMEMTRACE is not set
735# CONFIG_WORKQUEUE_TRACER is not set
736# CONFIG_BLK_DEV_IO_TRACE is not set
737# CONFIG_DYNAMIC_DEBUG is not set
738# CONFIG_SAMPLES is not set
739CONFIG_HAVE_ARCH_KGDB=y
740# CONFIG_KGDB is not set
741# CONFIG_DEBUG_USER is not set
742# CONFIG_DEBUG_ERRORS is not set
743# CONFIG_DEBUG_STACK_USAGE is not set
744# CONFIG_DEBUG_LL is not set
745
746#
747# Security options
748#
749# CONFIG_KEYS is not set
750# CONFIG_SECURITY is not set
751# CONFIG_SECURITYFS is not set
752# CONFIG_SECURITY_FILE_CAPABILITIES is not set
753# CONFIG_CRYPTO is not set
754# CONFIG_BINARY_PRINTF is not set
755
756#
757# Library routines
758#
759CONFIG_GENERIC_FIND_LAST_BIT=y
760# CONFIG_CRC_CCITT is not set
761# CONFIG_CRC16 is not set
762# CONFIG_CRC_T10DIF is not set
763# CONFIG_CRC_ITU_T is not set
764# CONFIG_CRC32 is not set
765# CONFIG_CRC7 is not set
766# CONFIG_LIBCRC32C is not set
767CONFIG_ZLIB_INFLATE=y
768CONFIG_DECOMPRESS_GZIP=y
769CONFIG_DECOMPRESS_BZIP2=y
770CONFIG_DECOMPRESS_LZMA=y
771CONFIG_HAS_IOMEM=y
772CONFIG_HAS_IOPORT=y
773CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/spear310_defconfig b/arch/arm/configs/spear310_defconfig
new file mode 100644
index 000000000000..cbbfd290bba8
--- /dev/null
+++ b/arch/arm/configs/spear310_defconfig
@@ -0,0 +1,775 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32
4# Tue Mar 23 14:37:01 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_INIT_ENV_ARG_LIMIT=32
32CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_SWAP=y
35CONFIG_SYSVIPC=y
36CONFIG_SYSVIPC_SYSCTL=y
37CONFIG_BSD_PROCESS_ACCT=y
38# CONFIG_BSD_PROCESS_ACCT_V3 is not set
39
40#
41# RCU Subsystem
42#
43CONFIG_TREE_RCU=y
44# CONFIG_TREE_PREEMPT_RCU is not set
45# CONFIG_RCU_TRACE is not set
46CONFIG_RCU_FANOUT=32
47# CONFIG_RCU_FANOUT_EXACT is not set
48# CONFIG_TREE_RCU_TRACE is not set
49# CONFIG_IKCONFIG is not set
50CONFIG_LOG_BUF_SHIFT=17
51# CONFIG_GROUP_SCHED is not set
52# CONFIG_CGROUPS is not set
53# CONFIG_SYSFS_DEPRECATED_V2 is not set
54# CONFIG_RELAY is not set
55CONFIG_NAMESPACES=y
56# CONFIG_UTS_NS is not set
57# CONFIG_IPC_NS is not set
58# CONFIG_USER_NS is not set
59# CONFIG_PID_NS is not set
60CONFIG_BLK_DEV_INITRD=y
61CONFIG_INITRAMFS_SOURCE=""
62CONFIG_RD_GZIP=y
63CONFIG_RD_BZIP2=y
64CONFIG_RD_LZMA=y
65CONFIG_CC_OPTIMIZE_FOR_SIZE=y
66CONFIG_SYSCTL=y
67CONFIG_ANON_INODES=y
68# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73CONFIG_KALLSYMS_EXTRA_PASS=y
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SIGNALFD=y
82CONFIG_TIMERFD=y
83CONFIG_EVENTFD=y
84CONFIG_SHMEM=y
85CONFIG_AIO=y
86
87#
88# Kernel Performance Events And Counters
89#
90CONFIG_VM_EVENT_COUNTERS=y
91CONFIG_SLUB_DEBUG=y
92CONFIG_COMPAT_BRK=y
93# CONFIG_SLAB is not set
94CONFIG_SLUB=y
95# CONFIG_SLOB is not set
96# CONFIG_PROFILING is not set
97CONFIG_HAVE_OPROFILE=y
98# CONFIG_KPROBES is not set
99CONFIG_HAVE_KPROBES=y
100CONFIG_HAVE_KRETPROBES=y
101CONFIG_HAVE_CLK=y
102
103#
104# GCOV-based kernel profiling
105#
106# CONFIG_GCOV_KERNEL is not set
107# CONFIG_SLOW_WORK is not set
108CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_SLABINFO=y
110CONFIG_RT_MUTEXES=y
111CONFIG_BASE_SMALL=0
112CONFIG_MODULES=y
113# CONFIG_MODULE_FORCE_LOAD is not set
114CONFIG_MODULE_UNLOAD=y
115# CONFIG_MODULE_FORCE_UNLOAD is not set
116CONFIG_MODVERSIONS=y
117# CONFIG_MODULE_SRCVERSION_ALL is not set
118CONFIG_BLOCK=y
119CONFIG_LBDAF=y
120CONFIG_BLK_DEV_BSG=y
121# CONFIG_BLK_DEV_INTEGRITY is not set
122
123#
124# IO Schedulers
125#
126CONFIG_IOSCHED_NOOP=y
127CONFIG_IOSCHED_AS=y
128CONFIG_IOSCHED_DEADLINE=y
129CONFIG_IOSCHED_CFQ=y
130# CONFIG_DEFAULT_AS is not set
131# CONFIG_DEFAULT_DEADLINE is not set
132CONFIG_DEFAULT_CFQ=y
133# CONFIG_DEFAULT_NOOP is not set
134CONFIG_DEFAULT_IOSCHED="cfq"
135# CONFIG_FREEZER is not set
136
137#
138# System Type
139#
140CONFIG_MMU=y
141# CONFIG_ARCH_AAEC2000 is not set
142# CONFIG_ARCH_INTEGRATOR is not set
143# CONFIG_ARCH_REALVIEW is not set
144# CONFIG_ARCH_VERSATILE is not set
145# CONFIG_ARCH_AT91 is not set
146# CONFIG_ARCH_CLPS711X is not set
147# CONFIG_ARCH_GEMINI is not set
148# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set
150# CONFIG_ARCH_FOOTBRIDGE is not set
151# CONFIG_ARCH_MXC is not set
152# CONFIG_ARCH_STMP3XXX is not set
153# CONFIG_ARCH_NETX is not set
154# CONFIG_ARCH_H720X is not set
155# CONFIG_ARCH_NOMADIK is not set
156# CONFIG_ARCH_IOP13XX is not set
157# CONFIG_ARCH_IOP32X is not set
158# CONFIG_ARCH_IOP33X is not set
159# CONFIG_ARCH_IXP23XX is not set
160# CONFIG_ARCH_IXP2000 is not set
161# CONFIG_ARCH_IXP4XX is not set
162# CONFIG_ARCH_L7200 is not set
163# CONFIG_ARCH_KIRKWOOD is not set
164# CONFIG_ARCH_LOKI is not set
165# CONFIG_ARCH_MV78XX0 is not set
166# CONFIG_ARCH_ORION5X is not set
167# CONFIG_ARCH_MMP is not set
168# CONFIG_ARCH_KS8695 is not set
169# CONFIG_ARCH_NS9XXX is not set
170# CONFIG_ARCH_W90X900 is not set
171# CONFIG_ARCH_PNX4008 is not set
172# CONFIG_ARCH_PXA is not set
173# CONFIG_ARCH_MSM is not set
174# CONFIG_ARCH_RPC is not set
175# CONFIG_ARCH_SA1100 is not set
176# CONFIG_ARCH_S3C2410 is not set
177# CONFIG_ARCH_S3C64XX is not set
178# CONFIG_ARCH_S5PC1XX is not set
179# CONFIG_ARCH_SHARK is not set
180# CONFIG_ARCH_LH7A40X is not set
181# CONFIG_ARCH_U300 is not set
182# CONFIG_ARCH_DAVINCI is not set
183# CONFIG_ARCH_OMAP is not set
184# CONFIG_ARCH_BCMRING is not set
185CONFIG_PLAT_SPEAR=y
186CONFIG_ARCH_SPEAR3XX=y
187# CONFIG_ARCH_SPEAR6XX is not set
188# CONFIG_MACH_SPEAR300 is not set
189CONFIG_MACH_SPEAR310=y
190# CONFIG_MACH_SPEAR320 is not set
191# CONFIG_BOARD_SPEAR300_EVB is not set
192CONFIG_BOARD_SPEAR310_EVB=y
193
194#
195# Processor Type
196#
197CONFIG_CPU_32=y
198CONFIG_CPU_ARM926T=y
199CONFIG_CPU_32v5=y
200CONFIG_CPU_ABRT_EV5TJ=y
201CONFIG_CPU_PABRT_LEGACY=y
202CONFIG_CPU_CACHE_VIVT=y
203CONFIG_CPU_COPY_V4WB=y
204CONFIG_CPU_TLB_V4WBI=y
205CONFIG_CPU_CP15=y
206CONFIG_CPU_CP15_MMU=y
207
208#
209# Processor Features
210#
211CONFIG_ARM_THUMB=y
212# CONFIG_CPU_ICACHE_DISABLE is not set
213# CONFIG_CPU_DCACHE_DISABLE is not set
214# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
215# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
216CONFIG_ARM_L1_CACHE_SHIFT=5
217CONFIG_ARM_VIC=y
218CONFIG_ARM_VIC_NR=2
219CONFIG_COMMON_CLKDEV=y
220
221#
222# Bus support
223#
224CONFIG_ARM_AMBA=y
225# CONFIG_PCI_SYSCALL is not set
226# CONFIG_ARCH_SUPPORTS_MSI is not set
227# CONFIG_PCCARD is not set
228
229#
230# Kernel Features
231#
232# CONFIG_NO_HZ is not set
233# CONFIG_HIGH_RES_TIMERS is not set
234CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
235CONFIG_VMSPLIT_3G=y
236# CONFIG_VMSPLIT_2G is not set
237# CONFIG_VMSPLIT_1G is not set
238CONFIG_PAGE_OFFSET=0xC0000000
239CONFIG_PREEMPT_NONE=y
240# CONFIG_PREEMPT_VOLUNTARY is not set
241# CONFIG_PREEMPT is not set
242CONFIG_HZ=100
243# CONFIG_AEABI is not set
244# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
245# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
246# CONFIG_HIGHMEM is not set
247CONFIG_SELECT_MEMORY_MODEL=y
248CONFIG_FLATMEM_MANUAL=y
249# CONFIG_DISCONTIGMEM_MANUAL is not set
250# CONFIG_SPARSEMEM_MANUAL is not set
251CONFIG_FLATMEM=y
252CONFIG_FLAT_NODE_MEM_MAP=y
253CONFIG_PAGEFLAGS_EXTENDED=y
254CONFIG_SPLIT_PTLOCK_CPUS=4096
255# CONFIG_PHYS_ADDR_T_64BIT is not set
256CONFIG_ZONE_DMA_FLAG=0
257CONFIG_VIRT_TO_BUS=y
258CONFIG_HAVE_MLOCK=y
259CONFIG_HAVE_MLOCKED_PAGE_BIT=y
260# CONFIG_KSM is not set
261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
262CONFIG_ALIGNMENT_TRAP=y
263# CONFIG_UACCESS_WITH_MEMCPY is not set
264
265#
266# Boot options
267#
268CONFIG_ZBOOT_ROM_TEXT=0
269CONFIG_ZBOOT_ROM_BSS=0
270CONFIG_CMDLINE=""
271# CONFIG_XIP_KERNEL is not set
272# CONFIG_KEXEC is not set
273
274#
275# CPU Power Management
276#
277# CONFIG_CPU_IDLE is not set
278
279#
280# Floating point emulation
281#
282
283#
284# At least one emulation must be selected
285#
286# CONFIG_FPE_NWFPE is not set
287# CONFIG_FPE_FASTFPE is not set
288# CONFIG_VFP is not set
289
290#
291# Userspace binary formats
292#
293CONFIG_BINFMT_ELF=y
294# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
295CONFIG_HAVE_AOUT=y
296# CONFIG_BINFMT_AOUT is not set
297CONFIG_BINFMT_MISC=y
298
299#
300# Power management options
301#
302# CONFIG_PM is not set
303CONFIG_ARCH_SUSPEND_POSSIBLE=y
304# CONFIG_NET is not set
305
306#
307# Device Drivers
308#
309
310#
311# Generic Driver Options
312#
313CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
314# CONFIG_DEVTMPFS is not set
315CONFIG_STANDALONE=y
316CONFIG_PREVENT_FIRMWARE_BUILD=y
317CONFIG_FW_LOADER=y
318CONFIG_FIRMWARE_IN_KERNEL=y
319CONFIG_EXTRA_FIRMWARE=""
320# CONFIG_DEBUG_DRIVER is not set
321# CONFIG_DEBUG_DEVRES is not set
322# CONFIG_SYS_HYPERVISOR is not set
323# CONFIG_MTD is not set
324# CONFIG_PARPORT is not set
325CONFIG_BLK_DEV=y
326# CONFIG_BLK_DEV_COW_COMMON is not set
327# CONFIG_BLK_DEV_LOOP is not set
328CONFIG_BLK_DEV_RAM=y
329CONFIG_BLK_DEV_RAM_COUNT=16
330CONFIG_BLK_DEV_RAM_SIZE=16384
331# CONFIG_BLK_DEV_XIP is not set
332# CONFIG_CDROM_PKTCDVD is not set
333# CONFIG_MG_DISK is not set
334CONFIG_MISC_DEVICES=y
335# CONFIG_ENCLOSURE_SERVICES is not set
336# CONFIG_C2PORT is not set
337
338#
339# EEPROM support
340#
341# CONFIG_EEPROM_93CX6 is not set
342CONFIG_HAVE_IDE=y
343# CONFIG_IDE is not set
344
345#
346# SCSI device support
347#
348# CONFIG_RAID_ATTRS is not set
349# CONFIG_SCSI is not set
350# CONFIG_SCSI_DMA is not set
351# CONFIG_SCSI_NETLINK is not set
352# CONFIG_ATA is not set
353# CONFIG_MD is not set
354# CONFIG_PHONE is not set
355
356#
357# Input device support
358#
359CONFIG_INPUT=y
360CONFIG_INPUT_FF_MEMLESS=y
361# CONFIG_INPUT_POLLDEV is not set
362
363#
364# Userland interfaces
365#
366CONFIG_INPUT_MOUSEDEV=y
367# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
368CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
369CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
370# CONFIG_INPUT_JOYDEV is not set
371# CONFIG_INPUT_EVDEV is not set
372# CONFIG_INPUT_EVBUG is not set
373
374#
375# Input Device Drivers
376#
377# CONFIG_INPUT_KEYBOARD is not set
378# CONFIG_INPUT_MOUSE is not set
379# CONFIG_INPUT_JOYSTICK is not set
380# CONFIG_INPUT_TABLET is not set
381# CONFIG_INPUT_TOUCHSCREEN is not set
382# CONFIG_INPUT_MISC is not set
383
384#
385# Hardware I/O ports
386#
387CONFIG_SERIO=y
388CONFIG_SERIO_SERPORT=y
389# CONFIG_SERIO_AMBAKMI is not set
390# CONFIG_SERIO_RAW is not set
391# CONFIG_GAMEPORT is not set
392
393#
394# Character devices
395#
396CONFIG_VT=y
397CONFIG_CONSOLE_TRANSLATIONS=y
398CONFIG_VT_CONSOLE=y
399CONFIG_HW_CONSOLE=y
400# CONFIG_VT_HW_CONSOLE_BINDING is not set
401CONFIG_DEVKMEM=y
402# CONFIG_SERIAL_NONSTANDARD is not set
403
404#
405# Serial drivers
406#
407# CONFIG_SERIAL_8250 is not set
408
409#
410# Non-8250 serial port support
411#
412# CONFIG_SERIAL_AMBA_PL010 is not set
413CONFIG_SERIAL_AMBA_PL011=y
414CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
415CONFIG_SERIAL_CORE=y
416CONFIG_SERIAL_CORE_CONSOLE=y
417CONFIG_UNIX98_PTYS=y
418# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
419# CONFIG_LEGACY_PTYS is not set
420# CONFIG_IPMI_HANDLER is not set
421# CONFIG_HW_RANDOM is not set
422# CONFIG_R3964 is not set
423CONFIG_RAW_DRIVER=y
424CONFIG_MAX_RAW_DEVS=8192
425# CONFIG_TCG_TPM is not set
426# CONFIG_I2C is not set
427# CONFIG_SPI is not set
428
429#
430# PPS support
431#
432# CONFIG_PPS is not set
433CONFIG_ARCH_REQUIRE_GPIOLIB=y
434CONFIG_GPIOLIB=y
435# CONFIG_DEBUG_GPIO is not set
436CONFIG_GPIO_SYSFS=y
437
438#
439# Memory mapped GPIO expanders:
440#
441CONFIG_GPIO_PL061=y
442
443#
444# I2C GPIO expanders:
445#
446
447#
448# PCI GPIO expanders:
449#
450
451#
452# SPI GPIO expanders:
453#
454
455#
456# AC97 GPIO expanders:
457#
458# CONFIG_W1 is not set
459# CONFIG_POWER_SUPPLY is not set
460# CONFIG_HWMON is not set
461# CONFIG_THERMAL is not set
462# CONFIG_WATCHDOG is not set
463CONFIG_SSB_POSSIBLE=y
464
465#
466# Sonics Silicon Backplane
467#
468# CONFIG_SSB is not set
469
470#
471# Multifunction device drivers
472#
473# CONFIG_MFD_CORE is not set
474# CONFIG_MFD_SM501 is not set
475# CONFIG_MFD_ASIC3 is not set
476# CONFIG_HTC_EGPIO is not set
477# CONFIG_HTC_PASIC3 is not set
478# CONFIG_MFD_TMIO is not set
479# CONFIG_MFD_T7L66XB is not set
480# CONFIG_MFD_TC6387XB is not set
481# CONFIG_MFD_TC6393XB is not set
482# CONFIG_REGULATOR is not set
483# CONFIG_MEDIA_SUPPORT is not set
484
485#
486# Graphics support
487#
488# CONFIG_VGASTATE is not set
489# CONFIG_VIDEO_OUTPUT_CONTROL is not set
490# CONFIG_FB is not set
491# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
492
493#
494# Display device support
495#
496# CONFIG_DISPLAY_SUPPORT is not set
497
498#
499# Console display driver support
500#
501# CONFIG_VGA_CONSOLE is not set
502CONFIG_DUMMY_CONSOLE=y
503# CONFIG_SOUND is not set
504# CONFIG_HID_SUPPORT is not set
505# CONFIG_USB_SUPPORT is not set
506# CONFIG_MMC is not set
507# CONFIG_MEMSTICK is not set
508# CONFIG_NEW_LEDS is not set
509# CONFIG_ACCESSIBILITY is not set
510CONFIG_RTC_LIB=y
511# CONFIG_RTC_CLASS is not set
512# CONFIG_DMADEVICES is not set
513# CONFIG_AUXDISPLAY is not set
514# CONFIG_UIO is not set
515
516#
517# TI VLYNQ
518#
519# CONFIG_STAGING is not set
520
521#
522# File systems
523#
524CONFIG_EXT2_FS=y
525CONFIG_EXT2_FS_XATTR=y
526# CONFIG_EXT2_FS_POSIX_ACL is not set
527CONFIG_EXT2_FS_SECURITY=y
528# CONFIG_EXT2_FS_XIP is not set
529CONFIG_EXT3_FS=y
530# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
531CONFIG_EXT3_FS_XATTR=y
532# CONFIG_EXT3_FS_POSIX_ACL is not set
533CONFIG_EXT3_FS_SECURITY=y
534# CONFIG_EXT4_FS is not set
535CONFIG_JBD=y
536# CONFIG_JBD_DEBUG is not set
537CONFIG_FS_MBCACHE=y
538# CONFIG_REISERFS_FS is not set
539# CONFIG_JFS_FS is not set
540# CONFIG_FS_POSIX_ACL is not set
541# CONFIG_XFS_FS is not set
542# CONFIG_GFS2_FS is not set
543# CONFIG_BTRFS_FS is not set
544# CONFIG_NILFS2_FS is not set
545CONFIG_FILE_LOCKING=y
546CONFIG_FSNOTIFY=y
547CONFIG_DNOTIFY=y
548# CONFIG_INOTIFY is not set
549CONFIG_INOTIFY_USER=y
550# CONFIG_QUOTA is not set
551# CONFIG_AUTOFS_FS is not set
552CONFIG_AUTOFS4_FS=m
553# CONFIG_FUSE_FS is not set
554
555#
556# Caches
557#
558# CONFIG_FSCACHE is not set
559
560#
561# CD-ROM/DVD Filesystems
562#
563# CONFIG_ISO9660_FS is not set
564# CONFIG_UDF_FS is not set
565
566#
567# DOS/FAT/NT Filesystems
568#
569CONFIG_FAT_FS=m
570CONFIG_MSDOS_FS=m
571CONFIG_VFAT_FS=m
572CONFIG_FAT_DEFAULT_CODEPAGE=437
573CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
574# CONFIG_NTFS_FS is not set
575
576#
577# Pseudo filesystems
578#
579CONFIG_PROC_FS=y
580CONFIG_PROC_SYSCTL=y
581CONFIG_PROC_PAGE_MONITOR=y
582CONFIG_SYSFS=y
583CONFIG_TMPFS=y
584# CONFIG_TMPFS_POSIX_ACL is not set
585# CONFIG_HUGETLB_PAGE is not set
586# CONFIG_CONFIGFS_FS is not set
587CONFIG_MISC_FILESYSTEMS=y
588# CONFIG_ADFS_FS is not set
589# CONFIG_AFFS_FS is not set
590# CONFIG_HFS_FS is not set
591# CONFIG_HFSPLUS_FS is not set
592# CONFIG_BEFS_FS is not set
593# CONFIG_BFS_FS is not set
594# CONFIG_EFS_FS is not set
595# CONFIG_SQUASHFS is not set
596# CONFIG_VXFS_FS is not set
597# CONFIG_MINIX_FS is not set
598# CONFIG_OMFS_FS is not set
599# CONFIG_HPFS_FS is not set
600# CONFIG_QNX4FS_FS is not set
601# CONFIG_ROMFS_FS is not set
602# CONFIG_SYSV_FS is not set
603# CONFIG_UFS_FS is not set
604
605#
606# Partition Types
607#
608CONFIG_PARTITION_ADVANCED=y
609# CONFIG_ACORN_PARTITION is not set
610# CONFIG_OSF_PARTITION is not set
611# CONFIG_AMIGA_PARTITION is not set
612# CONFIG_ATARI_PARTITION is not set
613# CONFIG_MAC_PARTITION is not set
614CONFIG_MSDOS_PARTITION=y
615# CONFIG_BSD_DISKLABEL is not set
616# CONFIG_MINIX_SUBPARTITION is not set
617# CONFIG_SOLARIS_X86_PARTITION is not set
618# CONFIG_UNIXWARE_DISKLABEL is not set
619# CONFIG_LDM_PARTITION is not set
620# CONFIG_SGI_PARTITION is not set
621# CONFIG_ULTRIX_PARTITION is not set
622# CONFIG_SUN_PARTITION is not set
623# CONFIG_KARMA_PARTITION is not set
624# CONFIG_EFI_PARTITION is not set
625# CONFIG_SYSV68_PARTITION is not set
626CONFIG_NLS=y
627CONFIG_NLS_DEFAULT="utf8"
628CONFIG_NLS_CODEPAGE_437=y
629# CONFIG_NLS_CODEPAGE_737 is not set
630# CONFIG_NLS_CODEPAGE_775 is not set
631# CONFIG_NLS_CODEPAGE_850 is not set
632# CONFIG_NLS_CODEPAGE_852 is not set
633# CONFIG_NLS_CODEPAGE_855 is not set
634# CONFIG_NLS_CODEPAGE_857 is not set
635# CONFIG_NLS_CODEPAGE_860 is not set
636# CONFIG_NLS_CODEPAGE_861 is not set
637# CONFIG_NLS_CODEPAGE_862 is not set
638# CONFIG_NLS_CODEPAGE_863 is not set
639# CONFIG_NLS_CODEPAGE_864 is not set
640# CONFIG_NLS_CODEPAGE_865 is not set
641# CONFIG_NLS_CODEPAGE_866 is not set
642# CONFIG_NLS_CODEPAGE_869 is not set
643# CONFIG_NLS_CODEPAGE_936 is not set
644# CONFIG_NLS_CODEPAGE_950 is not set
645# CONFIG_NLS_CODEPAGE_932 is not set
646# CONFIG_NLS_CODEPAGE_949 is not set
647# CONFIG_NLS_CODEPAGE_874 is not set
648# CONFIG_NLS_ISO8859_8 is not set
649# CONFIG_NLS_CODEPAGE_1250 is not set
650# CONFIG_NLS_CODEPAGE_1251 is not set
651CONFIG_NLS_ASCII=m
652# CONFIG_NLS_ISO8859_1 is not set
653# CONFIG_NLS_ISO8859_2 is not set
654# CONFIG_NLS_ISO8859_3 is not set
655# CONFIG_NLS_ISO8859_4 is not set
656# CONFIG_NLS_ISO8859_5 is not set
657# CONFIG_NLS_ISO8859_6 is not set
658# CONFIG_NLS_ISO8859_7 is not set
659# CONFIG_NLS_ISO8859_9 is not set
660# CONFIG_NLS_ISO8859_13 is not set
661# CONFIG_NLS_ISO8859_14 is not set
662# CONFIG_NLS_ISO8859_15 is not set
663# CONFIG_NLS_KOI8_R is not set
664# CONFIG_NLS_KOI8_U is not set
665# CONFIG_NLS_UTF8 is not set
666
667#
668# Kernel hacking
669#
670# CONFIG_PRINTK_TIME is not set
671CONFIG_ENABLE_WARN_DEPRECATED=y
672CONFIG_ENABLE_MUST_CHECK=y
673CONFIG_FRAME_WARN=1024
674CONFIG_MAGIC_SYSRQ=y
675# CONFIG_STRIP_ASM_SYMS is not set
676# CONFIG_UNUSED_SYMBOLS is not set
677CONFIG_DEBUG_FS=y
678# CONFIG_HEADERS_CHECK is not set
679CONFIG_DEBUG_KERNEL=y
680# CONFIG_DEBUG_SHIRQ is not set
681CONFIG_DETECT_SOFTLOCKUP=y
682# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
683CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
684CONFIG_DETECT_HUNG_TASK=y
685# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
686CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
687CONFIG_SCHED_DEBUG=y
688# CONFIG_SCHEDSTATS is not set
689# CONFIG_TIMER_STATS is not set
690# CONFIG_DEBUG_OBJECTS is not set
691# CONFIG_SLUB_DEBUG_ON is not set
692# CONFIG_SLUB_STATS is not set
693# CONFIG_DEBUG_KMEMLEAK is not set
694# CONFIG_DEBUG_RT_MUTEXES is not set
695# CONFIG_RT_MUTEX_TESTER is not set
696CONFIG_DEBUG_SPINLOCK=y
697# CONFIG_DEBUG_MUTEXES is not set
698# CONFIG_DEBUG_LOCK_ALLOC is not set
699# CONFIG_PROVE_LOCKING is not set
700# CONFIG_LOCK_STAT is not set
701CONFIG_DEBUG_SPINLOCK_SLEEP=y
702# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
703# CONFIG_DEBUG_KOBJECT is not set
704CONFIG_DEBUG_BUGVERBOSE=y
705CONFIG_DEBUG_INFO=y
706# CONFIG_DEBUG_VM is not set
707# CONFIG_DEBUG_WRITECOUNT is not set
708CONFIG_DEBUG_MEMORY_INIT=y
709# CONFIG_DEBUG_LIST is not set
710# CONFIG_DEBUG_SG is not set
711# CONFIG_DEBUG_NOTIFIERS is not set
712# CONFIG_DEBUG_CREDENTIALS is not set
713CONFIG_FRAME_POINTER=y
714# CONFIG_BOOT_PRINTK_DELAY is not set
715# CONFIG_RCU_TORTURE_TEST is not set
716CONFIG_RCU_CPU_STALL_DETECTOR=y
717# CONFIG_BACKTRACE_SELF_TEST is not set
718# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
719# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
720# CONFIG_FAULT_INJECTION is not set
721# CONFIG_LATENCYTOP is not set
722# CONFIG_SYSCTL_SYSCALL_CHECK is not set
723# CONFIG_PAGE_POISONING is not set
724CONFIG_HAVE_FUNCTION_TRACER=y
725CONFIG_TRACING_SUPPORT=y
726CONFIG_FTRACE=y
727# CONFIG_FUNCTION_TRACER is not set
728# CONFIG_IRQSOFF_TRACER is not set
729# CONFIG_SCHED_TRACER is not set
730# CONFIG_ENABLE_DEFAULT_TRACERS is not set
731# CONFIG_BOOT_TRACER is not set
732CONFIG_BRANCH_PROFILE_NONE=y
733# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
734# CONFIG_PROFILE_ALL_BRANCHES is not set
735# CONFIG_STACK_TRACER is not set
736# CONFIG_KMEMTRACE is not set
737# CONFIG_WORKQUEUE_TRACER is not set
738# CONFIG_BLK_DEV_IO_TRACE is not set
739# CONFIG_DYNAMIC_DEBUG is not set
740# CONFIG_SAMPLES is not set
741CONFIG_HAVE_ARCH_KGDB=y
742# CONFIG_KGDB is not set
743# CONFIG_DEBUG_USER is not set
744# CONFIG_DEBUG_ERRORS is not set
745# CONFIG_DEBUG_STACK_USAGE is not set
746# CONFIG_DEBUG_LL is not set
747
748#
749# Security options
750#
751# CONFIG_KEYS is not set
752# CONFIG_SECURITY is not set
753# CONFIG_SECURITYFS is not set
754# CONFIG_SECURITY_FILE_CAPABILITIES is not set
755# CONFIG_CRYPTO is not set
756# CONFIG_BINARY_PRINTF is not set
757
758#
759# Library routines
760#
761CONFIG_GENERIC_FIND_LAST_BIT=y
762# CONFIG_CRC_CCITT is not set
763# CONFIG_CRC16 is not set
764# CONFIG_CRC_T10DIF is not set
765# CONFIG_CRC_ITU_T is not set
766# CONFIG_CRC32 is not set
767# CONFIG_CRC7 is not set
768# CONFIG_LIBCRC32C is not set
769CONFIG_ZLIB_INFLATE=y
770CONFIG_DECOMPRESS_GZIP=y
771CONFIG_DECOMPRESS_BZIP2=y
772CONFIG_DECOMPRESS_LZMA=y
773CONFIG_HAS_IOMEM=y
774CONFIG_HAS_IOPORT=y
775CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/spear320_defconfig b/arch/arm/configs/spear320_defconfig
new file mode 100644
index 000000000000..2ae3c110a21a
--- /dev/null
+++ b/arch/arm/configs/spear320_defconfig
@@ -0,0 +1,775 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32
4# Tue Mar 23 14:37:12 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_INIT_ENV_ARG_LIMIT=32
32CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_SWAP=y
35CONFIG_SYSVIPC=y
36CONFIG_SYSVIPC_SYSCTL=y
37CONFIG_BSD_PROCESS_ACCT=y
38# CONFIG_BSD_PROCESS_ACCT_V3 is not set
39
40#
41# RCU Subsystem
42#
43CONFIG_TREE_RCU=y
44# CONFIG_TREE_PREEMPT_RCU is not set
45# CONFIG_RCU_TRACE is not set
46CONFIG_RCU_FANOUT=32
47# CONFIG_RCU_FANOUT_EXACT is not set
48# CONFIG_TREE_RCU_TRACE is not set
49# CONFIG_IKCONFIG is not set
50CONFIG_LOG_BUF_SHIFT=17
51# CONFIG_GROUP_SCHED is not set
52# CONFIG_CGROUPS is not set
53# CONFIG_SYSFS_DEPRECATED_V2 is not set
54# CONFIG_RELAY is not set
55CONFIG_NAMESPACES=y
56# CONFIG_UTS_NS is not set
57# CONFIG_IPC_NS is not set
58# CONFIG_USER_NS is not set
59# CONFIG_PID_NS is not set
60CONFIG_BLK_DEV_INITRD=y
61CONFIG_INITRAMFS_SOURCE=""
62CONFIG_RD_GZIP=y
63CONFIG_RD_BZIP2=y
64CONFIG_RD_LZMA=y
65CONFIG_CC_OPTIMIZE_FOR_SIZE=y
66CONFIG_SYSCTL=y
67CONFIG_ANON_INODES=y
68# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73CONFIG_KALLSYMS_EXTRA_PASS=y
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SIGNALFD=y
82CONFIG_TIMERFD=y
83CONFIG_EVENTFD=y
84CONFIG_SHMEM=y
85CONFIG_AIO=y
86
87#
88# Kernel Performance Events And Counters
89#
90CONFIG_VM_EVENT_COUNTERS=y
91CONFIG_SLUB_DEBUG=y
92CONFIG_COMPAT_BRK=y
93# CONFIG_SLAB is not set
94CONFIG_SLUB=y
95# CONFIG_SLOB is not set
96# CONFIG_PROFILING is not set
97CONFIG_HAVE_OPROFILE=y
98# CONFIG_KPROBES is not set
99CONFIG_HAVE_KPROBES=y
100CONFIG_HAVE_KRETPROBES=y
101CONFIG_HAVE_CLK=y
102
103#
104# GCOV-based kernel profiling
105#
106# CONFIG_GCOV_KERNEL is not set
107# CONFIG_SLOW_WORK is not set
108CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_SLABINFO=y
110CONFIG_RT_MUTEXES=y
111CONFIG_BASE_SMALL=0
112CONFIG_MODULES=y
113# CONFIG_MODULE_FORCE_LOAD is not set
114CONFIG_MODULE_UNLOAD=y
115# CONFIG_MODULE_FORCE_UNLOAD is not set
116CONFIG_MODVERSIONS=y
117# CONFIG_MODULE_SRCVERSION_ALL is not set
118CONFIG_BLOCK=y
119CONFIG_LBDAF=y
120CONFIG_BLK_DEV_BSG=y
121# CONFIG_BLK_DEV_INTEGRITY is not set
122
123#
124# IO Schedulers
125#
126CONFIG_IOSCHED_NOOP=y
127CONFIG_IOSCHED_AS=y
128CONFIG_IOSCHED_DEADLINE=y
129CONFIG_IOSCHED_CFQ=y
130# CONFIG_DEFAULT_AS is not set
131# CONFIG_DEFAULT_DEADLINE is not set
132CONFIG_DEFAULT_CFQ=y
133# CONFIG_DEFAULT_NOOP is not set
134CONFIG_DEFAULT_IOSCHED="cfq"
135# CONFIG_FREEZER is not set
136
137#
138# System Type
139#
140CONFIG_MMU=y
141# CONFIG_ARCH_AAEC2000 is not set
142# CONFIG_ARCH_INTEGRATOR is not set
143# CONFIG_ARCH_REALVIEW is not set
144# CONFIG_ARCH_VERSATILE is not set
145# CONFIG_ARCH_AT91 is not set
146# CONFIG_ARCH_CLPS711X is not set
147# CONFIG_ARCH_GEMINI is not set
148# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set
150# CONFIG_ARCH_FOOTBRIDGE is not set
151# CONFIG_ARCH_MXC is not set
152# CONFIG_ARCH_STMP3XXX is not set
153# CONFIG_ARCH_NETX is not set
154# CONFIG_ARCH_H720X is not set
155# CONFIG_ARCH_NOMADIK is not set
156# CONFIG_ARCH_IOP13XX is not set
157# CONFIG_ARCH_IOP32X is not set
158# CONFIG_ARCH_IOP33X is not set
159# CONFIG_ARCH_IXP23XX is not set
160# CONFIG_ARCH_IXP2000 is not set
161# CONFIG_ARCH_IXP4XX is not set
162# CONFIG_ARCH_L7200 is not set
163# CONFIG_ARCH_KIRKWOOD is not set
164# CONFIG_ARCH_LOKI is not set
165# CONFIG_ARCH_MV78XX0 is not set
166# CONFIG_ARCH_ORION5X is not set
167# CONFIG_ARCH_MMP is not set
168# CONFIG_ARCH_KS8695 is not set
169# CONFIG_ARCH_NS9XXX is not set
170# CONFIG_ARCH_W90X900 is not set
171# CONFIG_ARCH_PNX4008 is not set
172# CONFIG_ARCH_PXA is not set
173# CONFIG_ARCH_MSM is not set
174# CONFIG_ARCH_RPC is not set
175# CONFIG_ARCH_SA1100 is not set
176# CONFIG_ARCH_S3C2410 is not set
177# CONFIG_ARCH_S3C64XX is not set
178# CONFIG_ARCH_S5PC1XX is not set
179# CONFIG_ARCH_SHARK is not set
180# CONFIG_ARCH_LH7A40X is not set
181# CONFIG_ARCH_U300 is not set
182# CONFIG_ARCH_DAVINCI is not set
183# CONFIG_ARCH_OMAP is not set
184# CONFIG_ARCH_BCMRING is not set
185CONFIG_PLAT_SPEAR=y
186CONFIG_ARCH_SPEAR3XX=y
187# CONFIG_ARCH_SPEAR6XX is not set
188# CONFIG_MACH_SPEAR300 is not set
189# CONFIG_MACH_SPEAR310 is not set
190CONFIG_MACH_SPEAR320=y
191# CONFIG_BOARD_SPEAR300_EVB is not set
192CONFIG_BOARD_SPEAR320_EVB=y
193
194#
195# Processor Type
196#
197CONFIG_CPU_32=y
198CONFIG_CPU_ARM926T=y
199CONFIG_CPU_32v5=y
200CONFIG_CPU_ABRT_EV5TJ=y
201CONFIG_CPU_PABRT_LEGACY=y
202CONFIG_CPU_CACHE_VIVT=y
203CONFIG_CPU_COPY_V4WB=y
204CONFIG_CPU_TLB_V4WBI=y
205CONFIG_CPU_CP15=y
206CONFIG_CPU_CP15_MMU=y
207
208#
209# Processor Features
210#
211CONFIG_ARM_THUMB=y
212# CONFIG_CPU_ICACHE_DISABLE is not set
213# CONFIG_CPU_DCACHE_DISABLE is not set
214# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
215# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
216CONFIG_ARM_L1_CACHE_SHIFT=5
217CONFIG_ARM_VIC=y
218CONFIG_ARM_VIC_NR=2
219CONFIG_COMMON_CLKDEV=y
220
221#
222# Bus support
223#
224CONFIG_ARM_AMBA=y
225# CONFIG_PCI_SYSCALL is not set
226# CONFIG_ARCH_SUPPORTS_MSI is not set
227# CONFIG_PCCARD is not set
228
229#
230# Kernel Features
231#
232# CONFIG_NO_HZ is not set
233# CONFIG_HIGH_RES_TIMERS is not set
234CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
235CONFIG_VMSPLIT_3G=y
236# CONFIG_VMSPLIT_2G is not set
237# CONFIG_VMSPLIT_1G is not set
238CONFIG_PAGE_OFFSET=0xC0000000
239CONFIG_PREEMPT_NONE=y
240# CONFIG_PREEMPT_VOLUNTARY is not set
241# CONFIG_PREEMPT is not set
242CONFIG_HZ=100
243# CONFIG_AEABI is not set
244# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
245# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
246# CONFIG_HIGHMEM is not set
247CONFIG_SELECT_MEMORY_MODEL=y
248CONFIG_FLATMEM_MANUAL=y
249# CONFIG_DISCONTIGMEM_MANUAL is not set
250# CONFIG_SPARSEMEM_MANUAL is not set
251CONFIG_FLATMEM=y
252CONFIG_FLAT_NODE_MEM_MAP=y
253CONFIG_PAGEFLAGS_EXTENDED=y
254CONFIG_SPLIT_PTLOCK_CPUS=4096
255# CONFIG_PHYS_ADDR_T_64BIT is not set
256CONFIG_ZONE_DMA_FLAG=0
257CONFIG_VIRT_TO_BUS=y
258CONFIG_HAVE_MLOCK=y
259CONFIG_HAVE_MLOCKED_PAGE_BIT=y
260# CONFIG_KSM is not set
261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
262CONFIG_ALIGNMENT_TRAP=y
263# CONFIG_UACCESS_WITH_MEMCPY is not set
264
265#
266# Boot options
267#
268CONFIG_ZBOOT_ROM_TEXT=0
269CONFIG_ZBOOT_ROM_BSS=0
270CONFIG_CMDLINE=""
271# CONFIG_XIP_KERNEL is not set
272# CONFIG_KEXEC is not set
273
274#
275# CPU Power Management
276#
277# CONFIG_CPU_IDLE is not set
278
279#
280# Floating point emulation
281#
282
283#
284# At least one emulation must be selected
285#
286# CONFIG_FPE_NWFPE is not set
287# CONFIG_FPE_FASTFPE is not set
288# CONFIG_VFP is not set
289
290#
291# Userspace binary formats
292#
293CONFIG_BINFMT_ELF=y
294# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
295CONFIG_HAVE_AOUT=y
296# CONFIG_BINFMT_AOUT is not set
297CONFIG_BINFMT_MISC=y
298
299#
300# Power management options
301#
302# CONFIG_PM is not set
303CONFIG_ARCH_SUSPEND_POSSIBLE=y
304# CONFIG_NET is not set
305
306#
307# Device Drivers
308#
309
310#
311# Generic Driver Options
312#
313CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
314# CONFIG_DEVTMPFS is not set
315CONFIG_STANDALONE=y
316CONFIG_PREVENT_FIRMWARE_BUILD=y
317CONFIG_FW_LOADER=y
318CONFIG_FIRMWARE_IN_KERNEL=y
319CONFIG_EXTRA_FIRMWARE=""
320# CONFIG_DEBUG_DRIVER is not set
321# CONFIG_DEBUG_DEVRES is not set
322# CONFIG_SYS_HYPERVISOR is not set
323# CONFIG_MTD is not set
324# CONFIG_PARPORT is not set
325CONFIG_BLK_DEV=y
326# CONFIG_BLK_DEV_COW_COMMON is not set
327# CONFIG_BLK_DEV_LOOP is not set
328CONFIG_BLK_DEV_RAM=y
329CONFIG_BLK_DEV_RAM_COUNT=16
330CONFIG_BLK_DEV_RAM_SIZE=16384
331# CONFIG_BLK_DEV_XIP is not set
332# CONFIG_CDROM_PKTCDVD is not set
333# CONFIG_MG_DISK is not set
334CONFIG_MISC_DEVICES=y
335# CONFIG_ENCLOSURE_SERVICES is not set
336# CONFIG_C2PORT is not set
337
338#
339# EEPROM support
340#
341# CONFIG_EEPROM_93CX6 is not set
342CONFIG_HAVE_IDE=y
343# CONFIG_IDE is not set
344
345#
346# SCSI device support
347#
348# CONFIG_RAID_ATTRS is not set
349# CONFIG_SCSI is not set
350# CONFIG_SCSI_DMA is not set
351# CONFIG_SCSI_NETLINK is not set
352# CONFIG_ATA is not set
353# CONFIG_MD is not set
354# CONFIG_PHONE is not set
355
356#
357# Input device support
358#
359CONFIG_INPUT=y
360CONFIG_INPUT_FF_MEMLESS=y
361# CONFIG_INPUT_POLLDEV is not set
362
363#
364# Userland interfaces
365#
366CONFIG_INPUT_MOUSEDEV=y
367# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
368CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
369CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
370# CONFIG_INPUT_JOYDEV is not set
371# CONFIG_INPUT_EVDEV is not set
372# CONFIG_INPUT_EVBUG is not set
373
374#
375# Input Device Drivers
376#
377# CONFIG_INPUT_KEYBOARD is not set
378# CONFIG_INPUT_MOUSE is not set
379# CONFIG_INPUT_JOYSTICK is not set
380# CONFIG_INPUT_TABLET is not set
381# CONFIG_INPUT_TOUCHSCREEN is not set
382# CONFIG_INPUT_MISC is not set
383
384#
385# Hardware I/O ports
386#
387CONFIG_SERIO=y
388CONFIG_SERIO_SERPORT=y
389# CONFIG_SERIO_AMBAKMI is not set
390# CONFIG_SERIO_RAW is not set
391# CONFIG_GAMEPORT is not set
392
393#
394# Character devices
395#
396CONFIG_VT=y
397CONFIG_CONSOLE_TRANSLATIONS=y
398CONFIG_VT_CONSOLE=y
399CONFIG_HW_CONSOLE=y
400# CONFIG_VT_HW_CONSOLE_BINDING is not set
401CONFIG_DEVKMEM=y
402# CONFIG_SERIAL_NONSTANDARD is not set
403
404#
405# Serial drivers
406#
407# CONFIG_SERIAL_8250 is not set
408
409#
410# Non-8250 serial port support
411#
412# CONFIG_SERIAL_AMBA_PL010 is not set
413CONFIG_SERIAL_AMBA_PL011=y
414CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
415CONFIG_SERIAL_CORE=y
416CONFIG_SERIAL_CORE_CONSOLE=y
417CONFIG_UNIX98_PTYS=y
418# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
419# CONFIG_LEGACY_PTYS is not set
420# CONFIG_IPMI_HANDLER is not set
421# CONFIG_HW_RANDOM is not set
422# CONFIG_R3964 is not set
423CONFIG_RAW_DRIVER=y
424CONFIG_MAX_RAW_DEVS=8192
425# CONFIG_TCG_TPM is not set
426# CONFIG_I2C is not set
427# CONFIG_SPI is not set
428
429#
430# PPS support
431#
432# CONFIG_PPS is not set
433CONFIG_ARCH_REQUIRE_GPIOLIB=y
434CONFIG_GPIOLIB=y
435# CONFIG_DEBUG_GPIO is not set
436CONFIG_GPIO_SYSFS=y
437
438#
439# Memory mapped GPIO expanders:
440#
441CONFIG_GPIO_PL061=y
442
443#
444# I2C GPIO expanders:
445#
446
447#
448# PCI GPIO expanders:
449#
450
451#
452# SPI GPIO expanders:
453#
454
455#
456# AC97 GPIO expanders:
457#
458# CONFIG_W1 is not set
459# CONFIG_POWER_SUPPLY is not set
460# CONFIG_HWMON is not set
461# CONFIG_THERMAL is not set
462# CONFIG_WATCHDOG is not set
463CONFIG_SSB_POSSIBLE=y
464
465#
466# Sonics Silicon Backplane
467#
468# CONFIG_SSB is not set
469
470#
471# Multifunction device drivers
472#
473# CONFIG_MFD_CORE is not set
474# CONFIG_MFD_SM501 is not set
475# CONFIG_MFD_ASIC3 is not set
476# CONFIG_HTC_EGPIO is not set
477# CONFIG_HTC_PASIC3 is not set
478# CONFIG_MFD_TMIO is not set
479# CONFIG_MFD_T7L66XB is not set
480# CONFIG_MFD_TC6387XB is not set
481# CONFIG_MFD_TC6393XB is not set
482# CONFIG_REGULATOR is not set
483# CONFIG_MEDIA_SUPPORT is not set
484
485#
486# Graphics support
487#
488# CONFIG_VGASTATE is not set
489# CONFIG_VIDEO_OUTPUT_CONTROL is not set
490# CONFIG_FB is not set
491# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
492
493#
494# Display device support
495#
496# CONFIG_DISPLAY_SUPPORT is not set
497
498#
499# Console display driver support
500#
501# CONFIG_VGA_CONSOLE is not set
502CONFIG_DUMMY_CONSOLE=y
503# CONFIG_SOUND is not set
504# CONFIG_HID_SUPPORT is not set
505# CONFIG_USB_SUPPORT is not set
506# CONFIG_MMC is not set
507# CONFIG_MEMSTICK is not set
508# CONFIG_NEW_LEDS is not set
509# CONFIG_ACCESSIBILITY is not set
510CONFIG_RTC_LIB=y
511# CONFIG_RTC_CLASS is not set
512# CONFIG_DMADEVICES is not set
513# CONFIG_AUXDISPLAY is not set
514# CONFIG_UIO is not set
515
516#
517# TI VLYNQ
518#
519# CONFIG_STAGING is not set
520
521#
522# File systems
523#
524CONFIG_EXT2_FS=y
525CONFIG_EXT2_FS_XATTR=y
526# CONFIG_EXT2_FS_POSIX_ACL is not set
527CONFIG_EXT2_FS_SECURITY=y
528# CONFIG_EXT2_FS_XIP is not set
529CONFIG_EXT3_FS=y
530# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
531CONFIG_EXT3_FS_XATTR=y
532# CONFIG_EXT3_FS_POSIX_ACL is not set
533CONFIG_EXT3_FS_SECURITY=y
534# CONFIG_EXT4_FS is not set
535CONFIG_JBD=y
536# CONFIG_JBD_DEBUG is not set
537CONFIG_FS_MBCACHE=y
538# CONFIG_REISERFS_FS is not set
539# CONFIG_JFS_FS is not set
540# CONFIG_FS_POSIX_ACL is not set
541# CONFIG_XFS_FS is not set
542# CONFIG_GFS2_FS is not set
543# CONFIG_BTRFS_FS is not set
544# CONFIG_NILFS2_FS is not set
545CONFIG_FILE_LOCKING=y
546CONFIG_FSNOTIFY=y
547CONFIG_DNOTIFY=y
548# CONFIG_INOTIFY is not set
549CONFIG_INOTIFY_USER=y
550# CONFIG_QUOTA is not set
551# CONFIG_AUTOFS_FS is not set
552CONFIG_AUTOFS4_FS=m
553# CONFIG_FUSE_FS is not set
554
555#
556# Caches
557#
558# CONFIG_FSCACHE is not set
559
560#
561# CD-ROM/DVD Filesystems
562#
563# CONFIG_ISO9660_FS is not set
564# CONFIG_UDF_FS is not set
565
566#
567# DOS/FAT/NT Filesystems
568#
569CONFIG_FAT_FS=m
570CONFIG_MSDOS_FS=m
571CONFIG_VFAT_FS=m
572CONFIG_FAT_DEFAULT_CODEPAGE=437
573CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
574# CONFIG_NTFS_FS is not set
575
576#
577# Pseudo filesystems
578#
579CONFIG_PROC_FS=y
580CONFIG_PROC_SYSCTL=y
581CONFIG_PROC_PAGE_MONITOR=y
582CONFIG_SYSFS=y
583CONFIG_TMPFS=y
584# CONFIG_TMPFS_POSIX_ACL is not set
585# CONFIG_HUGETLB_PAGE is not set
586# CONFIG_CONFIGFS_FS is not set
587CONFIG_MISC_FILESYSTEMS=y
588# CONFIG_ADFS_FS is not set
589# CONFIG_AFFS_FS is not set
590# CONFIG_HFS_FS is not set
591# CONFIG_HFSPLUS_FS is not set
592# CONFIG_BEFS_FS is not set
593# CONFIG_BFS_FS is not set
594# CONFIG_EFS_FS is not set
595# CONFIG_SQUASHFS is not set
596# CONFIG_VXFS_FS is not set
597# CONFIG_MINIX_FS is not set
598# CONFIG_OMFS_FS is not set
599# CONFIG_HPFS_FS is not set
600# CONFIG_QNX4FS_FS is not set
601# CONFIG_ROMFS_FS is not set
602# CONFIG_SYSV_FS is not set
603# CONFIG_UFS_FS is not set
604
605#
606# Partition Types
607#
608CONFIG_PARTITION_ADVANCED=y
609# CONFIG_ACORN_PARTITION is not set
610# CONFIG_OSF_PARTITION is not set
611# CONFIG_AMIGA_PARTITION is not set
612# CONFIG_ATARI_PARTITION is not set
613# CONFIG_MAC_PARTITION is not set
614CONFIG_MSDOS_PARTITION=y
615# CONFIG_BSD_DISKLABEL is not set
616# CONFIG_MINIX_SUBPARTITION is not set
617# CONFIG_SOLARIS_X86_PARTITION is not set
618# CONFIG_UNIXWARE_DISKLABEL is not set
619# CONFIG_LDM_PARTITION is not set
620# CONFIG_SGI_PARTITION is not set
621# CONFIG_ULTRIX_PARTITION is not set
622# CONFIG_SUN_PARTITION is not set
623# CONFIG_KARMA_PARTITION is not set
624# CONFIG_EFI_PARTITION is not set
625# CONFIG_SYSV68_PARTITION is not set
626CONFIG_NLS=y
627CONFIG_NLS_DEFAULT="utf8"
628CONFIG_NLS_CODEPAGE_437=y
629# CONFIG_NLS_CODEPAGE_737 is not set
630# CONFIG_NLS_CODEPAGE_775 is not set
631# CONFIG_NLS_CODEPAGE_850 is not set
632# CONFIG_NLS_CODEPAGE_852 is not set
633# CONFIG_NLS_CODEPAGE_855 is not set
634# CONFIG_NLS_CODEPAGE_857 is not set
635# CONFIG_NLS_CODEPAGE_860 is not set
636# CONFIG_NLS_CODEPAGE_861 is not set
637# CONFIG_NLS_CODEPAGE_862 is not set
638# CONFIG_NLS_CODEPAGE_863 is not set
639# CONFIG_NLS_CODEPAGE_864 is not set
640# CONFIG_NLS_CODEPAGE_865 is not set
641# CONFIG_NLS_CODEPAGE_866 is not set
642# CONFIG_NLS_CODEPAGE_869 is not set
643# CONFIG_NLS_CODEPAGE_936 is not set
644# CONFIG_NLS_CODEPAGE_950 is not set
645# CONFIG_NLS_CODEPAGE_932 is not set
646# CONFIG_NLS_CODEPAGE_949 is not set
647# CONFIG_NLS_CODEPAGE_874 is not set
648# CONFIG_NLS_ISO8859_8 is not set
649# CONFIG_NLS_CODEPAGE_1250 is not set
650# CONFIG_NLS_CODEPAGE_1251 is not set
651CONFIG_NLS_ASCII=m
652# CONFIG_NLS_ISO8859_1 is not set
653# CONFIG_NLS_ISO8859_2 is not set
654# CONFIG_NLS_ISO8859_3 is not set
655# CONFIG_NLS_ISO8859_4 is not set
656# CONFIG_NLS_ISO8859_5 is not set
657# CONFIG_NLS_ISO8859_6 is not set
658# CONFIG_NLS_ISO8859_7 is not set
659# CONFIG_NLS_ISO8859_9 is not set
660# CONFIG_NLS_ISO8859_13 is not set
661# CONFIG_NLS_ISO8859_14 is not set
662# CONFIG_NLS_ISO8859_15 is not set
663# CONFIG_NLS_KOI8_R is not set
664# CONFIG_NLS_KOI8_U is not set
665# CONFIG_NLS_UTF8 is not set
666
667#
668# Kernel hacking
669#
670# CONFIG_PRINTK_TIME is not set
671CONFIG_ENABLE_WARN_DEPRECATED=y
672CONFIG_ENABLE_MUST_CHECK=y
673CONFIG_FRAME_WARN=1024
674CONFIG_MAGIC_SYSRQ=y
675# CONFIG_STRIP_ASM_SYMS is not set
676# CONFIG_UNUSED_SYMBOLS is not set
677CONFIG_DEBUG_FS=y
678# CONFIG_HEADERS_CHECK is not set
679CONFIG_DEBUG_KERNEL=y
680# CONFIG_DEBUG_SHIRQ is not set
681CONFIG_DETECT_SOFTLOCKUP=y
682# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
683CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
684CONFIG_DETECT_HUNG_TASK=y
685# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
686CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
687CONFIG_SCHED_DEBUG=y
688# CONFIG_SCHEDSTATS is not set
689# CONFIG_TIMER_STATS is not set
690# CONFIG_DEBUG_OBJECTS is not set
691# CONFIG_SLUB_DEBUG_ON is not set
692# CONFIG_SLUB_STATS is not set
693# CONFIG_DEBUG_KMEMLEAK is not set
694# CONFIG_DEBUG_RT_MUTEXES is not set
695# CONFIG_RT_MUTEX_TESTER is not set
696CONFIG_DEBUG_SPINLOCK=y
697# CONFIG_DEBUG_MUTEXES is not set
698# CONFIG_DEBUG_LOCK_ALLOC is not set
699# CONFIG_PROVE_LOCKING is not set
700# CONFIG_LOCK_STAT is not set
701CONFIG_DEBUG_SPINLOCK_SLEEP=y
702# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
703# CONFIG_DEBUG_KOBJECT is not set
704CONFIG_DEBUG_BUGVERBOSE=y
705CONFIG_DEBUG_INFO=y
706# CONFIG_DEBUG_VM is not set
707# CONFIG_DEBUG_WRITECOUNT is not set
708CONFIG_DEBUG_MEMORY_INIT=y
709# CONFIG_DEBUG_LIST is not set
710# CONFIG_DEBUG_SG is not set
711# CONFIG_DEBUG_NOTIFIERS is not set
712# CONFIG_DEBUG_CREDENTIALS is not set
713CONFIG_FRAME_POINTER=y
714# CONFIG_BOOT_PRINTK_DELAY is not set
715# CONFIG_RCU_TORTURE_TEST is not set
716CONFIG_RCU_CPU_STALL_DETECTOR=y
717# CONFIG_BACKTRACE_SELF_TEST is not set
718# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
719# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
720# CONFIG_FAULT_INJECTION is not set
721# CONFIG_LATENCYTOP is not set
722# CONFIG_SYSCTL_SYSCALL_CHECK is not set
723# CONFIG_PAGE_POISONING is not set
724CONFIG_HAVE_FUNCTION_TRACER=y
725CONFIG_TRACING_SUPPORT=y
726CONFIG_FTRACE=y
727# CONFIG_FUNCTION_TRACER is not set
728# CONFIG_IRQSOFF_TRACER is not set
729# CONFIG_SCHED_TRACER is not set
730# CONFIG_ENABLE_DEFAULT_TRACERS is not set
731# CONFIG_BOOT_TRACER is not set
732CONFIG_BRANCH_PROFILE_NONE=y
733# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
734# CONFIG_PROFILE_ALL_BRANCHES is not set
735# CONFIG_STACK_TRACER is not set
736# CONFIG_KMEMTRACE is not set
737# CONFIG_WORKQUEUE_TRACER is not set
738# CONFIG_BLK_DEV_IO_TRACE is not set
739# CONFIG_DYNAMIC_DEBUG is not set
740# CONFIG_SAMPLES is not set
741CONFIG_HAVE_ARCH_KGDB=y
742# CONFIG_KGDB is not set
743# CONFIG_DEBUG_USER is not set
744# CONFIG_DEBUG_ERRORS is not set
745# CONFIG_DEBUG_STACK_USAGE is not set
746# CONFIG_DEBUG_LL is not set
747
748#
749# Security options
750#
751# CONFIG_KEYS is not set
752# CONFIG_SECURITY is not set
753# CONFIG_SECURITYFS is not set
754# CONFIG_SECURITY_FILE_CAPABILITIES is not set
755# CONFIG_CRYPTO is not set
756# CONFIG_BINARY_PRINTF is not set
757
758#
759# Library routines
760#
761CONFIG_GENERIC_FIND_LAST_BIT=y
762# CONFIG_CRC_CCITT is not set
763# CONFIG_CRC16 is not set
764# CONFIG_CRC_T10DIF is not set
765# CONFIG_CRC_ITU_T is not set
766# CONFIG_CRC32 is not set
767# CONFIG_CRC7 is not set
768# CONFIG_LIBCRC32C is not set
769CONFIG_ZLIB_INFLATE=y
770CONFIG_DECOMPRESS_GZIP=y
771CONFIG_DECOMPRESS_BZIP2=y
772CONFIG_DECOMPRESS_LZMA=y
773CONFIG_HAS_IOMEM=y
774CONFIG_HAS_IOPORT=y
775CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/spear600_defconfig b/arch/arm/configs/spear600_defconfig
new file mode 100644
index 000000000000..c85a02924ec5
--- /dev/null
+++ b/arch/arm/configs/spear600_defconfig
@@ -0,0 +1,760 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32
4# Tue Mar 23 14:37:26 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_LOCKDEP_SUPPORT=y
15CONFIG_TRACE_IRQFLAGS_SUPPORT=y
16CONFIG_HARDIRQS_SW_RESEND=y
17CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y
21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_INIT_ENV_ARG_LIMIT=32
32CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_SWAP=y
35CONFIG_SYSVIPC=y
36CONFIG_SYSVIPC_SYSCTL=y
37CONFIG_BSD_PROCESS_ACCT=y
38# CONFIG_BSD_PROCESS_ACCT_V3 is not set
39
40#
41# RCU Subsystem
42#
43CONFIG_TREE_RCU=y
44# CONFIG_TREE_PREEMPT_RCU is not set
45# CONFIG_RCU_TRACE is not set
46CONFIG_RCU_FANOUT=32
47# CONFIG_RCU_FANOUT_EXACT is not set
48# CONFIG_TREE_RCU_TRACE is not set
49# CONFIG_IKCONFIG is not set
50CONFIG_LOG_BUF_SHIFT=17
51# CONFIG_GROUP_SCHED is not set
52# CONFIG_CGROUPS is not set
53# CONFIG_SYSFS_DEPRECATED_V2 is not set
54# CONFIG_RELAY is not set
55CONFIG_NAMESPACES=y
56# CONFIG_UTS_NS is not set
57# CONFIG_IPC_NS is not set
58# CONFIG_USER_NS is not set
59# CONFIG_PID_NS is not set
60CONFIG_BLK_DEV_INITRD=y
61CONFIG_INITRAMFS_SOURCE=""
62CONFIG_RD_GZIP=y
63CONFIG_RD_BZIP2=y
64CONFIG_RD_LZMA=y
65CONFIG_CC_OPTIMIZE_FOR_SIZE=y
66CONFIG_SYSCTL=y
67CONFIG_ANON_INODES=y
68# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73CONFIG_KALLSYMS_EXTRA_PASS=y
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SIGNALFD=y
82CONFIG_TIMERFD=y
83CONFIG_EVENTFD=y
84CONFIG_SHMEM=y
85CONFIG_AIO=y
86
87#
88# Kernel Performance Events And Counters
89#
90CONFIG_VM_EVENT_COUNTERS=y
91CONFIG_SLUB_DEBUG=y
92CONFIG_COMPAT_BRK=y
93# CONFIG_SLAB is not set
94CONFIG_SLUB=y
95# CONFIG_SLOB is not set
96# CONFIG_PROFILING is not set
97CONFIG_HAVE_OPROFILE=y
98# CONFIG_KPROBES is not set
99CONFIG_HAVE_KPROBES=y
100CONFIG_HAVE_KRETPROBES=y
101CONFIG_HAVE_CLK=y
102
103#
104# GCOV-based kernel profiling
105#
106# CONFIG_GCOV_KERNEL is not set
107# CONFIG_SLOW_WORK is not set
108CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_SLABINFO=y
110CONFIG_RT_MUTEXES=y
111CONFIG_BASE_SMALL=0
112CONFIG_MODULES=y
113# CONFIG_MODULE_FORCE_LOAD is not set
114CONFIG_MODULE_UNLOAD=y
115# CONFIG_MODULE_FORCE_UNLOAD is not set
116CONFIG_MODVERSIONS=y
117# CONFIG_MODULE_SRCVERSION_ALL is not set
118CONFIG_BLOCK=y
119CONFIG_LBDAF=y
120CONFIG_BLK_DEV_BSG=y
121# CONFIG_BLK_DEV_INTEGRITY is not set
122
123#
124# IO Schedulers
125#
126CONFIG_IOSCHED_NOOP=y
127CONFIG_IOSCHED_AS=y
128CONFIG_IOSCHED_DEADLINE=y
129CONFIG_IOSCHED_CFQ=y
130# CONFIG_DEFAULT_AS is not set
131# CONFIG_DEFAULT_DEADLINE is not set
132CONFIG_DEFAULT_CFQ=y
133# CONFIG_DEFAULT_NOOP is not set
134CONFIG_DEFAULT_IOSCHED="cfq"
135# CONFIG_FREEZER is not set
136
137#
138# System Type
139#
140CONFIG_MMU=y
141# CONFIG_ARCH_AAEC2000 is not set
142# CONFIG_ARCH_INTEGRATOR is not set
143# CONFIG_ARCH_REALVIEW is not set
144# CONFIG_ARCH_VERSATILE is not set
145# CONFIG_ARCH_AT91 is not set
146# CONFIG_ARCH_CLPS711X is not set
147# CONFIG_ARCH_GEMINI is not set
148# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set
150# CONFIG_ARCH_FOOTBRIDGE is not set
151# CONFIG_ARCH_MXC is not set
152# CONFIG_ARCH_STMP3XXX is not set
153# CONFIG_ARCH_NETX is not set
154# CONFIG_ARCH_H720X is not set
155# CONFIG_ARCH_NOMADIK is not set
156# CONFIG_ARCH_IOP13XX is not set
157# CONFIG_ARCH_IOP32X is not set
158# CONFIG_ARCH_IOP33X is not set
159# CONFIG_ARCH_IXP23XX is not set
160# CONFIG_ARCH_IXP2000 is not set
161# CONFIG_ARCH_IXP4XX is not set
162# CONFIG_ARCH_L7200 is not set
163# CONFIG_ARCH_KIRKWOOD is not set
164# CONFIG_ARCH_LOKI is not set
165# CONFIG_ARCH_MV78XX0 is not set
166# CONFIG_ARCH_ORION5X is not set
167# CONFIG_ARCH_MMP is not set
168# CONFIG_ARCH_KS8695 is not set
169# CONFIG_ARCH_NS9XXX is not set
170# CONFIG_ARCH_W90X900 is not set
171# CONFIG_ARCH_PNX4008 is not set
172# CONFIG_ARCH_PXA is not set
173# CONFIG_ARCH_MSM is not set
174# CONFIG_ARCH_RPC is not set
175# CONFIG_ARCH_SA1100 is not set
176# CONFIG_ARCH_S3C2410 is not set
177# CONFIG_ARCH_S3C64XX is not set
178# CONFIG_ARCH_S5PC1XX is not set
179# CONFIG_ARCH_SHARK is not set
180# CONFIG_ARCH_LH7A40X is not set
181# CONFIG_ARCH_U300 is not set
182# CONFIG_ARCH_DAVINCI is not set
183# CONFIG_ARCH_OMAP is not set
184# CONFIG_ARCH_BCMRING is not set
185CONFIG_PLAT_SPEAR=y
186# CONFIG_ARCH_SPEAR3XX is not set
187CONFIG_ARCH_SPEAR6XX=y
188# CONFIG_MACH_SPEAR300 is not set
189# CONFIG_MACH_SPEAR310 is not set
190# CONFIG_MACH_SPEAR320 is not set
191# CONFIG_BOARD_SPEAR300_EVB is not set
192CONFIG_MACH_SPEAR600=y
193CONFIG_BOARD_SPEAR600_EVB=y
194
195#
196# Processor Type
197#
198CONFIG_CPU_32=y
199CONFIG_CPU_ARM926T=y
200CONFIG_CPU_32v5=y
201CONFIG_CPU_ABRT_EV5TJ=y
202CONFIG_CPU_PABRT_LEGACY=y
203CONFIG_CPU_CACHE_VIVT=y
204CONFIG_CPU_COPY_V4WB=y
205CONFIG_CPU_TLB_V4WBI=y
206CONFIG_CPU_CP15=y
207CONFIG_CPU_CP15_MMU=y
208
209#
210# Processor Features
211#
212CONFIG_ARM_THUMB=y
213# CONFIG_CPU_ICACHE_DISABLE is not set
214# CONFIG_CPU_DCACHE_DISABLE is not set
215# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
216# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
217CONFIG_ARM_L1_CACHE_SHIFT=5
218CONFIG_ARM_VIC=y
219CONFIG_ARM_VIC_NR=2
220CONFIG_COMMON_CLKDEV=y
221
222#
223# Bus support
224#
225CONFIG_ARM_AMBA=y
226# CONFIG_PCI_SYSCALL is not set
227# CONFIG_ARCH_SUPPORTS_MSI is not set
228# CONFIG_PCCARD is not set
229
230#
231# Kernel Features
232#
233# CONFIG_NO_HZ is not set
234# CONFIG_HIGH_RES_TIMERS is not set
235CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
236CONFIG_VMSPLIT_3G=y
237# CONFIG_VMSPLIT_2G is not set
238# CONFIG_VMSPLIT_1G is not set
239CONFIG_PAGE_OFFSET=0xC0000000
240CONFIG_PREEMPT_NONE=y
241# CONFIG_PREEMPT_VOLUNTARY is not set
242# CONFIG_PREEMPT is not set
243CONFIG_HZ=100
244# CONFIG_AEABI is not set
245# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
246# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
247# CONFIG_HIGHMEM is not set
248CONFIG_SELECT_MEMORY_MODEL=y
249CONFIG_FLATMEM_MANUAL=y
250# CONFIG_DISCONTIGMEM_MANUAL is not set
251# CONFIG_SPARSEMEM_MANUAL is not set
252CONFIG_FLATMEM=y
253CONFIG_FLAT_NODE_MEM_MAP=y
254CONFIG_PAGEFLAGS_EXTENDED=y
255CONFIG_SPLIT_PTLOCK_CPUS=4096
256# CONFIG_PHYS_ADDR_T_64BIT is not set
257CONFIG_ZONE_DMA_FLAG=0
258CONFIG_VIRT_TO_BUS=y
259CONFIG_HAVE_MLOCK=y
260CONFIG_HAVE_MLOCKED_PAGE_BIT=y
261# CONFIG_KSM is not set
262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
263CONFIG_ALIGNMENT_TRAP=y
264# CONFIG_UACCESS_WITH_MEMCPY is not set
265
266#
267# Boot options
268#
269CONFIG_ZBOOT_ROM_TEXT=0
270CONFIG_ZBOOT_ROM_BSS=0
271CONFIG_CMDLINE=""
272# CONFIG_XIP_KERNEL is not set
273# CONFIG_KEXEC is not set
274
275#
276# CPU Power Management
277#
278# CONFIG_CPU_IDLE is not set
279
280#
281# Floating point emulation
282#
283
284#
285# At least one emulation must be selected
286#
287# CONFIG_FPE_NWFPE is not set
288# CONFIG_FPE_FASTFPE is not set
289# CONFIG_VFP is not set
290
291#
292# Userspace binary formats
293#
294CONFIG_BINFMT_ELF=y
295# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
296CONFIG_HAVE_AOUT=y
297# CONFIG_BINFMT_AOUT is not set
298CONFIG_BINFMT_MISC=y
299# CONFIG_ARTHUR is not set
300
301#
302# Power management options
303#
304# CONFIG_PM is not set
305CONFIG_ARCH_SUSPEND_POSSIBLE=y
306# CONFIG_NET is not set
307
308#
309# Device Drivers
310#
311
312#
313# Generic Driver Options
314#
315CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
316# CONFIG_DEVTMPFS is not set
317CONFIG_STANDALONE=y
318CONFIG_PREVENT_FIRMWARE_BUILD=y
319CONFIG_FW_LOADER=y
320CONFIG_FIRMWARE_IN_KERNEL=y
321CONFIG_EXTRA_FIRMWARE=""
322# CONFIG_DEBUG_DRIVER is not set
323# CONFIG_DEBUG_DEVRES is not set
324# CONFIG_SYS_HYPERVISOR is not set
325# CONFIG_MTD is not set
326# CONFIG_PARPORT is not set
327CONFIG_BLK_DEV=y
328# CONFIG_BLK_DEV_COW_COMMON is not set
329# CONFIG_BLK_DEV_LOOP is not set
330CONFIG_BLK_DEV_RAM=y
331CONFIG_BLK_DEV_RAM_COUNT=16
332CONFIG_BLK_DEV_RAM_SIZE=16384
333# CONFIG_BLK_DEV_XIP is not set
334# CONFIG_CDROM_PKTCDVD is not set
335CONFIG_MISC_DEVICES=y
336# CONFIG_ENCLOSURE_SERVICES is not set
337# CONFIG_C2PORT is not set
338
339#
340# EEPROM support
341#
342# CONFIG_EEPROM_93CX6 is not set
343CONFIG_HAVE_IDE=y
344# CONFIG_IDE is not set
345
346#
347# SCSI device support
348#
349# CONFIG_RAID_ATTRS is not set
350# CONFIG_SCSI is not set
351# CONFIG_SCSI_DMA is not set
352# CONFIG_SCSI_NETLINK is not set
353# CONFIG_ATA is not set
354# CONFIG_MD is not set
355# CONFIG_PHONE is not set
356
357#
358# Input device support
359#
360CONFIG_INPUT=y
361CONFIG_INPUT_FF_MEMLESS=y
362# CONFIG_INPUT_POLLDEV is not set
363
364#
365# Userland interfaces
366#
367CONFIG_INPUT_MOUSEDEV=y
368# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
369CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
370CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
371# CONFIG_INPUT_JOYDEV is not set
372# CONFIG_INPUT_EVDEV is not set
373# CONFIG_INPUT_EVBUG is not set
374
375#
376# Hardware I/O ports
377#
378CONFIG_SERIO=y
379CONFIG_SERIO_SERPORT=y
380# CONFIG_SERIO_AMBAKMI is not set
381# CONFIG_SERIO_RAW is not set
382# CONFIG_GAMEPORT is not set
383
384#
385# Character devices
386#
387CONFIG_VT=y
388CONFIG_CONSOLE_TRANSLATIONS=y
389CONFIG_VT_CONSOLE=y
390CONFIG_HW_CONSOLE=y
391# CONFIG_VT_HW_CONSOLE_BINDING is not set
392CONFIG_DEVKMEM=y
393# CONFIG_SERIAL_NONSTANDARD is not set
394
395#
396# Serial drivers
397#
398# CONFIG_SERIAL_8250 is not set
399
400#
401# Non-8250 serial port support
402#
403# CONFIG_SERIAL_AMBA_PL010 is not set
404CONFIG_SERIAL_AMBA_PL011=y
405CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
406CONFIG_SERIAL_CORE=y
407CONFIG_SERIAL_CORE_CONSOLE=y
408CONFIG_UNIX98_PTYS=y
409# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
410# CONFIG_LEGACY_PTYS is not set
411# CONFIG_R3964 is not set
412CONFIG_RAW_DRIVER=y
413CONFIG_MAX_RAW_DEVS=8192
414# CONFIG_TCG_TPM is not set
415# CONFIG_I2C is not set
416# CONFIG_SPI is not set
417
418#
419# PPS support
420#
421# CONFIG_PPS is not set
422CONFIG_ARCH_REQUIRE_GPIOLIB=y
423CONFIG_GPIOLIB=y
424# CONFIG_DEBUG_GPIO is not set
425CONFIG_GPIO_SYSFS=y
426
427#
428# Memory mapped GPIO expanders:
429#
430CONFIG_GPIO_PL061=y
431
432#
433# I2C GPIO expanders:
434#
435
436#
437# PCI GPIO expanders:
438#
439
440#
441# SPI GPIO expanders:
442#
443
444#
445# AC97 GPIO expanders:
446#
447# CONFIG_W1 is not set
448# CONFIG_POWER_SUPPLY is not set
449# CONFIG_HWMON is not set
450# CONFIG_THERMAL is not set
451# CONFIG_WATCHDOG is not set
452CONFIG_SSB_POSSIBLE=y
453
454#
455# Sonics Silicon Backplane
456#
457# CONFIG_SSB is not set
458
459#
460# Multifunction device drivers
461#
462# CONFIG_MFD_CORE is not set
463# CONFIG_MFD_SM501 is not set
464# CONFIG_HTC_PASIC3 is not set
465# CONFIG_MFD_TMIO is not set
466# CONFIG_MFD_T7L66XB is not set
467# CONFIG_MFD_TC6387XB is not set
468# CONFIG_REGULATOR is not set
469# CONFIG_MEDIA_SUPPORT is not set
470
471#
472# Graphics support
473#
474# CONFIG_VGASTATE is not set
475# CONFIG_VIDEO_OUTPUT_CONTROL is not set
476# CONFIG_FB is not set
477# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
478
479#
480# Display device support
481#
482# CONFIG_DISPLAY_SUPPORT is not set
483
484#
485# Console display driver support
486#
487# CONFIG_VGA_CONSOLE is not set
488CONFIG_DUMMY_CONSOLE=y
489# CONFIG_HID_SUPPORT is not set
490# CONFIG_USB_SUPPORT is not set
491# CONFIG_MMC is not set
492# CONFIG_MEMSTICK is not set
493# CONFIG_NEW_LEDS is not set
494# CONFIG_ACCESSIBILITY is not set
495CONFIG_RTC_LIB=y
496# CONFIG_RTC_CLASS is not set
497# CONFIG_DMADEVICES is not set
498# CONFIG_AUXDISPLAY is not set
499# CONFIG_UIO is not set
500
501#
502# TI VLYNQ
503#
504# CONFIG_STAGING is not set
505
506#
507# File systems
508#
509CONFIG_EXT2_FS=y
510CONFIG_EXT2_FS_XATTR=y
511# CONFIG_EXT2_FS_POSIX_ACL is not set
512CONFIG_EXT2_FS_SECURITY=y
513# CONFIG_EXT2_FS_XIP is not set
514CONFIG_EXT3_FS=y
515# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
516CONFIG_EXT3_FS_XATTR=y
517# CONFIG_EXT3_FS_POSIX_ACL is not set
518CONFIG_EXT3_FS_SECURITY=y
519# CONFIG_EXT4_FS is not set
520CONFIG_JBD=y
521# CONFIG_JBD_DEBUG is not set
522CONFIG_FS_MBCACHE=y
523# CONFIG_REISERFS_FS is not set
524# CONFIG_JFS_FS is not set
525# CONFIG_FS_POSIX_ACL is not set
526# CONFIG_XFS_FS is not set
527# CONFIG_GFS2_FS is not set
528# CONFIG_BTRFS_FS is not set
529# CONFIG_NILFS2_FS is not set
530CONFIG_FILE_LOCKING=y
531CONFIG_FSNOTIFY=y
532CONFIG_DNOTIFY=y
533# CONFIG_INOTIFY is not set
534CONFIG_INOTIFY_USER=y
535# CONFIG_QUOTA is not set
536# CONFIG_AUTOFS_FS is not set
537CONFIG_AUTOFS4_FS=m
538# CONFIG_FUSE_FS is not set
539
540#
541# Caches
542#
543# CONFIG_FSCACHE is not set
544
545#
546# CD-ROM/DVD Filesystems
547#
548# CONFIG_ISO9660_FS is not set
549# CONFIG_UDF_FS is not set
550
551#
552# DOS/FAT/NT Filesystems
553#
554CONFIG_FAT_FS=m
555CONFIG_MSDOS_FS=m
556CONFIG_VFAT_FS=m
557CONFIG_FAT_DEFAULT_CODEPAGE=437
558CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
559# CONFIG_NTFS_FS is not set
560
561#
562# Pseudo filesystems
563#
564CONFIG_PROC_FS=y
565CONFIG_PROC_SYSCTL=y
566CONFIG_PROC_PAGE_MONITOR=y
567CONFIG_SYSFS=y
568CONFIG_TMPFS=y
569# CONFIG_TMPFS_POSIX_ACL is not set
570# CONFIG_HUGETLB_PAGE is not set
571# CONFIG_CONFIGFS_FS is not set
572CONFIG_MISC_FILESYSTEMS=y
573# CONFIG_ADFS_FS is not set
574# CONFIG_AFFS_FS is not set
575# CONFIG_HFS_FS is not set
576# CONFIG_HFSPLUS_FS is not set
577# CONFIG_BEFS_FS is not set
578# CONFIG_BFS_FS is not set
579# CONFIG_EFS_FS is not set
580# CONFIG_SQUASHFS is not set
581# CONFIG_VXFS_FS is not set
582# CONFIG_MINIX_FS is not set
583# CONFIG_OMFS_FS is not set
584# CONFIG_HPFS_FS is not set
585# CONFIG_QNX4FS_FS is not set
586# CONFIG_ROMFS_FS is not set
587# CONFIG_SYSV_FS is not set
588# CONFIG_UFS_FS is not set
589
590#
591# Partition Types
592#
593CONFIG_PARTITION_ADVANCED=y
594# CONFIG_ACORN_PARTITION is not set
595# CONFIG_OSF_PARTITION is not set
596# CONFIG_AMIGA_PARTITION is not set
597# CONFIG_ATARI_PARTITION is not set
598# CONFIG_MAC_PARTITION is not set
599CONFIG_MSDOS_PARTITION=y
600# CONFIG_BSD_DISKLABEL is not set
601# CONFIG_MINIX_SUBPARTITION is not set
602# CONFIG_SOLARIS_X86_PARTITION is not set
603# CONFIG_UNIXWARE_DISKLABEL is not set
604# CONFIG_LDM_PARTITION is not set
605# CONFIG_SGI_PARTITION is not set
606# CONFIG_ULTRIX_PARTITION is not set
607# CONFIG_SUN_PARTITION is not set
608# CONFIG_KARMA_PARTITION is not set
609# CONFIG_EFI_PARTITION is not set
610# CONFIG_SYSV68_PARTITION is not set
611CONFIG_NLS=y
612CONFIG_NLS_DEFAULT="utf8"
613CONFIG_NLS_CODEPAGE_437=y
614# CONFIG_NLS_CODEPAGE_737 is not set
615# CONFIG_NLS_CODEPAGE_775 is not set
616# CONFIG_NLS_CODEPAGE_850 is not set
617# CONFIG_NLS_CODEPAGE_852 is not set
618# CONFIG_NLS_CODEPAGE_855 is not set
619# CONFIG_NLS_CODEPAGE_857 is not set
620# CONFIG_NLS_CODEPAGE_860 is not set
621# CONFIG_NLS_CODEPAGE_861 is not set
622# CONFIG_NLS_CODEPAGE_862 is not set
623# CONFIG_NLS_CODEPAGE_863 is not set
624# CONFIG_NLS_CODEPAGE_864 is not set
625# CONFIG_NLS_CODEPAGE_865 is not set
626# CONFIG_NLS_CODEPAGE_866 is not set
627# CONFIG_NLS_CODEPAGE_869 is not set
628# CONFIG_NLS_CODEPAGE_936 is not set
629# CONFIG_NLS_CODEPAGE_950 is not set
630# CONFIG_NLS_CODEPAGE_932 is not set
631# CONFIG_NLS_CODEPAGE_949 is not set
632# CONFIG_NLS_CODEPAGE_874 is not set
633# CONFIG_NLS_ISO8859_8 is not set
634# CONFIG_NLS_CODEPAGE_1250 is not set
635# CONFIG_NLS_CODEPAGE_1251 is not set
636CONFIG_NLS_ASCII=m
637# CONFIG_NLS_ISO8859_1 is not set
638# CONFIG_NLS_ISO8859_2 is not set
639# CONFIG_NLS_ISO8859_3 is not set
640# CONFIG_NLS_ISO8859_4 is not set
641# CONFIG_NLS_ISO8859_5 is not set
642# CONFIG_NLS_ISO8859_6 is not set
643# CONFIG_NLS_ISO8859_7 is not set
644# CONFIG_NLS_ISO8859_9 is not set
645# CONFIG_NLS_ISO8859_13 is not set
646# CONFIG_NLS_ISO8859_14 is not set
647# CONFIG_NLS_ISO8859_15 is not set
648# CONFIG_NLS_KOI8_R is not set
649# CONFIG_NLS_KOI8_U is not set
650# CONFIG_NLS_UTF8 is not set
651
652#
653# Kernel hacking
654#
655# CONFIG_PRINTK_TIME is not set
656CONFIG_ENABLE_WARN_DEPRECATED=y
657CONFIG_ENABLE_MUST_CHECK=y
658CONFIG_FRAME_WARN=1024
659CONFIG_MAGIC_SYSRQ=y
660# CONFIG_STRIP_ASM_SYMS is not set
661# CONFIG_UNUSED_SYMBOLS is not set
662CONFIG_DEBUG_FS=y
663# CONFIG_HEADERS_CHECK is not set
664CONFIG_DEBUG_KERNEL=y
665# CONFIG_DEBUG_SHIRQ is not set
666CONFIG_DETECT_SOFTLOCKUP=y
667# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
668CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
669CONFIG_DETECT_HUNG_TASK=y
670# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
671CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
672CONFIG_SCHED_DEBUG=y
673# CONFIG_SCHEDSTATS is not set
674# CONFIG_TIMER_STATS is not set
675# CONFIG_DEBUG_OBJECTS is not set
676# CONFIG_SLUB_DEBUG_ON is not set
677# CONFIG_SLUB_STATS is not set
678# CONFIG_DEBUG_KMEMLEAK is not set
679# CONFIG_DEBUG_RT_MUTEXES is not set
680# CONFIG_RT_MUTEX_TESTER is not set
681CONFIG_DEBUG_SPINLOCK=y
682# CONFIG_DEBUG_MUTEXES is not set
683# CONFIG_DEBUG_LOCK_ALLOC is not set
684# CONFIG_PROVE_LOCKING is not set
685# CONFIG_LOCK_STAT is not set
686CONFIG_DEBUG_SPINLOCK_SLEEP=y
687# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
688# CONFIG_DEBUG_KOBJECT is not set
689CONFIG_DEBUG_BUGVERBOSE=y
690CONFIG_DEBUG_INFO=y
691# CONFIG_DEBUG_VM is not set
692# CONFIG_DEBUG_WRITECOUNT is not set
693CONFIG_DEBUG_MEMORY_INIT=y
694# CONFIG_DEBUG_LIST is not set
695# CONFIG_DEBUG_SG is not set
696# CONFIG_DEBUG_NOTIFIERS is not set
697# CONFIG_DEBUG_CREDENTIALS is not set
698CONFIG_FRAME_POINTER=y
699# CONFIG_BOOT_PRINTK_DELAY is not set
700# CONFIG_RCU_TORTURE_TEST is not set
701CONFIG_RCU_CPU_STALL_DETECTOR=y
702# CONFIG_BACKTRACE_SELF_TEST is not set
703# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
704# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
705# CONFIG_FAULT_INJECTION is not set
706# CONFIG_LATENCYTOP is not set
707# CONFIG_SYSCTL_SYSCALL_CHECK is not set
708# CONFIG_PAGE_POISONING is not set
709CONFIG_HAVE_FUNCTION_TRACER=y
710CONFIG_TRACING_SUPPORT=y
711CONFIG_FTRACE=y
712# CONFIG_FUNCTION_TRACER is not set
713# CONFIG_IRQSOFF_TRACER is not set
714# CONFIG_SCHED_TRACER is not set
715# CONFIG_ENABLE_DEFAULT_TRACERS is not set
716# CONFIG_BOOT_TRACER is not set
717CONFIG_BRANCH_PROFILE_NONE=y
718# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
719# CONFIG_PROFILE_ALL_BRANCHES is not set
720# CONFIG_STACK_TRACER is not set
721# CONFIG_KMEMTRACE is not set
722# CONFIG_WORKQUEUE_TRACER is not set
723# CONFIG_BLK_DEV_IO_TRACE is not set
724# CONFIG_DYNAMIC_DEBUG is not set
725# CONFIG_SAMPLES is not set
726CONFIG_HAVE_ARCH_KGDB=y
727# CONFIG_KGDB is not set
728# CONFIG_DEBUG_USER is not set
729# CONFIG_DEBUG_ERRORS is not set
730# CONFIG_DEBUG_STACK_USAGE is not set
731# CONFIG_DEBUG_LL is not set
732
733#
734# Security options
735#
736# CONFIG_KEYS is not set
737# CONFIG_SECURITY is not set
738# CONFIG_SECURITYFS is not set
739# CONFIG_SECURITY_FILE_CAPABILITIES is not set
740# CONFIG_CRYPTO is not set
741# CONFIG_BINARY_PRINTF is not set
742
743#
744# Library routines
745#
746CONFIG_GENERIC_FIND_LAST_BIT=y
747# CONFIG_CRC_CCITT is not set
748# CONFIG_CRC16 is not set
749# CONFIG_CRC_T10DIF is not set
750# CONFIG_CRC_ITU_T is not set
751# CONFIG_CRC32 is not set
752# CONFIG_CRC7 is not set
753# CONFIG_LIBCRC32C is not set
754CONFIG_ZLIB_INFLATE=y
755CONFIG_DECOMPRESS_GZIP=y
756CONFIG_DECOMPRESS_BZIP2=y
757CONFIG_DECOMPRESS_LZMA=y
758CONFIG_HAS_IOMEM=y
759CONFIG_HAS_IOPORT=y
760CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/stamp9g20_defconfig b/arch/arm/configs/stamp9g20_defconfig
new file mode 100644
index 000000000000..06a8293c61ca
--- /dev/null
+++ b/arch/arm/configs/stamp9g20_defconfig
@@ -0,0 +1,1456 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34-rc1
4# Wed Mar 17 16:38:03 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_HAVE_PROC_CPU=y
12CONFIG_GENERIC_HARDIRQS=y
13CONFIG_STACKTRACE_SUPPORT=y
14CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20CONFIG_GENERIC_HWEIGHT=y
21CONFIG_GENERIC_CALIBRATE_DELAY=y
22CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
23CONFIG_VECTORS_BASE=0xffff0000
24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
25CONFIG_CONSTRUCTORS=y
26
27#
28# General setup
29#
30CONFIG_EXPERIMENTAL=y
31CONFIG_BROKEN_ON_SMP=y
32CONFIG_LOCK_KERNEL=y
33CONFIG_INIT_ENV_ARG_LIMIT=32
34CONFIG_LOCALVERSION=""
35# CONFIG_LOCALVERSION_AUTO is not set
36CONFIG_HAVE_KERNEL_GZIP=y
37CONFIG_HAVE_KERNEL_LZO=y
38CONFIG_KERNEL_GZIP=y
39# CONFIG_KERNEL_BZIP2 is not set
40# CONFIG_KERNEL_LZMA is not set
41# CONFIG_KERNEL_LZO is not set
42# CONFIG_SWAP is not set
43CONFIG_SYSVIPC=y
44CONFIG_SYSVIPC_SYSCTL=y
45# CONFIG_POSIX_MQUEUE is not set
46# CONFIG_BSD_PROCESS_ACCT is not set
47# CONFIG_TASKSTATS is not set
48# CONFIG_AUDIT is not set
49
50#
51# RCU Subsystem
52#
53# CONFIG_TREE_RCU is not set
54CONFIG_TREE_PREEMPT_RCU=y
55# CONFIG_TINY_RCU is not set
56# CONFIG_RCU_TRACE is not set
57CONFIG_RCU_FANOUT=32
58# CONFIG_RCU_FANOUT_EXACT is not set
59# CONFIG_TREE_RCU_TRACE is not set
60# CONFIG_IKCONFIG is not set
61CONFIG_LOG_BUF_SHIFT=14
62# CONFIG_CGROUPS is not set
63# CONFIG_SYSFS_DEPRECATED_V2 is not set
64# CONFIG_RELAY is not set
65CONFIG_NAMESPACES=y
66# CONFIG_UTS_NS is not set
67# CONFIG_IPC_NS is not set
68# CONFIG_USER_NS is not set
69# CONFIG_PID_NS is not set
70# CONFIG_NET_NS is not set
71CONFIG_BLK_DEV_INITRD=y
72CONFIG_INITRAMFS_SOURCE=""
73CONFIG_RD_GZIP=y
74CONFIG_RD_BZIP2=y
75CONFIG_RD_LZMA=y
76CONFIG_RD_LZO=y
77CONFIG_CC_OPTIMIZE_FOR_SIZE=y
78CONFIG_SYSCTL=y
79CONFIG_ANON_INODES=y
80# CONFIG_EMBEDDED is not set
81CONFIG_UID16=y
82CONFIG_SYSCTL_SYSCALL=y
83CONFIG_KALLSYMS=y
84# CONFIG_KALLSYMS_EXTRA_PASS is not set
85CONFIG_HOTPLUG=y
86CONFIG_PRINTK=y
87CONFIG_BUG=y
88CONFIG_ELF_CORE=y
89CONFIG_BASE_FULL=y
90CONFIG_FUTEX=y
91CONFIG_EPOLL=y
92CONFIG_SIGNALFD=y
93CONFIG_TIMERFD=y
94CONFIG_EVENTFD=y
95CONFIG_SHMEM=y
96CONFIG_AIO=y
97CONFIG_HAVE_PERF_EVENTS=y
98CONFIG_PERF_USE_VMALLOC=y
99
100#
101# Kernel Performance Events And Counters
102#
103# CONFIG_PERF_EVENTS is not set
104# CONFIG_PERF_COUNTERS is not set
105CONFIG_VM_EVENT_COUNTERS=y
106CONFIG_COMPAT_BRK=y
107CONFIG_SLAB=y
108# CONFIG_SLUB is not set
109# CONFIG_SLOB is not set
110# CONFIG_PROFILING is not set
111CONFIG_HAVE_OPROFILE=y
112# CONFIG_KPROBES is not set
113CONFIG_HAVE_KPROBES=y
114CONFIG_HAVE_KRETPROBES=y
115CONFIG_HAVE_CLK=y
116
117#
118# GCOV-based kernel profiling
119#
120# CONFIG_SLOW_WORK is not set
121CONFIG_HAVE_GENERIC_DMA_COHERENT=y
122CONFIG_SLABINFO=y
123CONFIG_RT_MUTEXES=y
124CONFIG_BASE_SMALL=0
125CONFIG_MODULES=y
126# CONFIG_MODULE_FORCE_LOAD is not set
127CONFIG_MODULE_UNLOAD=y
128# CONFIG_MODULE_FORCE_UNLOAD is not set
129# CONFIG_MODVERSIONS is not set
130# CONFIG_MODULE_SRCVERSION_ALL is not set
131CONFIG_BLOCK=y
132# CONFIG_LBDAF is not set
133# CONFIG_BLK_DEV_BSG is not set
134# CONFIG_BLK_DEV_INTEGRITY is not set
135
136#
137# IO Schedulers
138#
139CONFIG_IOSCHED_NOOP=y
140# CONFIG_IOSCHED_DEADLINE is not set
141CONFIG_IOSCHED_CFQ=y
142# CONFIG_DEFAULT_DEADLINE is not set
143CONFIG_DEFAULT_CFQ=y
144# CONFIG_DEFAULT_NOOP is not set
145CONFIG_DEFAULT_IOSCHED="cfq"
146# CONFIG_INLINE_SPIN_TRYLOCK is not set
147# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
148# CONFIG_INLINE_SPIN_LOCK is not set
149# CONFIG_INLINE_SPIN_LOCK_BH is not set
150# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
151# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
152# CONFIG_INLINE_SPIN_UNLOCK is not set
153# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
154# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
155# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
156# CONFIG_INLINE_READ_TRYLOCK is not set
157# CONFIG_INLINE_READ_LOCK is not set
158# CONFIG_INLINE_READ_LOCK_BH is not set
159# CONFIG_INLINE_READ_LOCK_IRQ is not set
160# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
161# CONFIG_INLINE_READ_UNLOCK is not set
162# CONFIG_INLINE_READ_UNLOCK_BH is not set
163# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
164# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
165# CONFIG_INLINE_WRITE_TRYLOCK is not set
166# CONFIG_INLINE_WRITE_LOCK is not set
167# CONFIG_INLINE_WRITE_LOCK_BH is not set
168# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
169# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
170# CONFIG_INLINE_WRITE_UNLOCK is not set
171# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
172# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
173# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
174# CONFIG_MUTEX_SPIN_ON_OWNER is not set
175CONFIG_FREEZER=y
176
177#
178# System Type
179#
180CONFIG_MMU=y
181# CONFIG_ARCH_AAEC2000 is not set
182# CONFIG_ARCH_INTEGRATOR is not set
183# CONFIG_ARCH_REALVIEW is not set
184# CONFIG_ARCH_VERSATILE is not set
185CONFIG_ARCH_AT91=y
186# CONFIG_ARCH_CLPS711X is not set
187# CONFIG_ARCH_GEMINI is not set
188# CONFIG_ARCH_EBSA110 is not set
189# CONFIG_ARCH_EP93XX is not set
190# CONFIG_ARCH_FOOTBRIDGE is not set
191# CONFIG_ARCH_MXC is not set
192# CONFIG_ARCH_STMP3XXX is not set
193# CONFIG_ARCH_NETX is not set
194# CONFIG_ARCH_H720X is not set
195# CONFIG_ARCH_NOMADIK is not set
196# CONFIG_ARCH_IOP13XX is not set
197# CONFIG_ARCH_IOP32X is not set
198# CONFIG_ARCH_IOP33X is not set
199# CONFIG_ARCH_IXP23XX is not set
200# CONFIG_ARCH_IXP2000 is not set
201# CONFIG_ARCH_IXP4XX is not set
202# CONFIG_ARCH_L7200 is not set
203# CONFIG_ARCH_DOVE is not set
204# CONFIG_ARCH_KIRKWOOD is not set
205# CONFIG_ARCH_LOKI is not set
206# CONFIG_ARCH_MV78XX0 is not set
207# CONFIG_ARCH_ORION5X is not set
208# CONFIG_ARCH_MMP is not set
209# CONFIG_ARCH_KS8695 is not set
210# CONFIG_ARCH_NS9XXX is not set
211# CONFIG_ARCH_W90X900 is not set
212# CONFIG_ARCH_NUC93X is not set
213# CONFIG_ARCH_PNX4008 is not set
214# CONFIG_ARCH_PXA is not set
215# CONFIG_ARCH_MSM is not set
216# CONFIG_ARCH_RPC is not set
217# CONFIG_ARCH_SA1100 is not set
218# CONFIG_ARCH_S3C2410 is not set
219# CONFIG_ARCH_S3C64XX is not set
220# CONFIG_ARCH_S5PC1XX is not set
221# CONFIG_ARCH_SHARK is not set
222# CONFIG_ARCH_LH7A40X is not set
223# CONFIG_ARCH_U300 is not set
224# CONFIG_ARCH_DAVINCI is not set
225# CONFIG_ARCH_OMAP is not set
226# CONFIG_ARCH_BCMRING is not set
227# CONFIG_ARCH_U8500 is not set
228CONFIG_HAVE_AT91_USART3=y
229CONFIG_HAVE_AT91_USART4=y
230CONFIG_HAVE_AT91_USART5=y
231
232#
233# Atmel AT91 System-on-Chip
234#
235# CONFIG_ARCH_AT91RM9200 is not set
236# CONFIG_ARCH_AT91SAM9260 is not set
237# CONFIG_ARCH_AT91SAM9261 is not set
238# CONFIG_ARCH_AT91SAM9G10 is not set
239# CONFIG_ARCH_AT91SAM9263 is not set
240# CONFIG_ARCH_AT91SAM9RL is not set
241CONFIG_ARCH_AT91SAM9G20=y
242# CONFIG_ARCH_AT91SAM9G45 is not set
243# CONFIG_ARCH_AT91CAP9 is not set
244# CONFIG_ARCH_AT572D940HF is not set
245# CONFIG_ARCH_AT91X40 is not set
246CONFIG_AT91_PMC_UNIT=y
247
248#
249# AT91SAM9G20 Board Type
250#
251# CONFIG_MACH_AT91SAM9G20EK is not set
252# CONFIG_MACH_AT91SAM9G20EK_2MMC is not set
253# CONFIG_MACH_CPU9G20 is not set
254CONFIG_MACH_PORTUXG20=y
255CONFIG_MACH_STAMP9G20=y
256
257#
258# AT91 Board Options
259#
260
261#
262# AT91 Feature Selections
263#
264CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
265CONFIG_AT91_SLOW_CLOCK=y
266CONFIG_AT91_TIMER_HZ=100
267CONFIG_AT91_EARLY_DBGU=y
268# CONFIG_AT91_EARLY_USART0 is not set
269# CONFIG_AT91_EARLY_USART1 is not set
270# CONFIG_AT91_EARLY_USART2 is not set
271# CONFIG_AT91_EARLY_USART3 is not set
272# CONFIG_AT91_EARLY_USART4 is not set
273# CONFIG_AT91_EARLY_USART5 is not set
274
275#
276# Processor Type
277#
278CONFIG_CPU_ARM926T=y
279CONFIG_CPU_32v5=y
280CONFIG_CPU_ABRT_EV5TJ=y
281CONFIG_CPU_PABRT_LEGACY=y
282CONFIG_CPU_CACHE_VIVT=y
283CONFIG_CPU_COPY_V4WB=y
284CONFIG_CPU_TLB_V4WBI=y
285CONFIG_CPU_CP15=y
286CONFIG_CPU_CP15_MMU=y
287
288#
289# Processor Features
290#
291CONFIG_ARM_THUMB=y
292# CONFIG_CPU_ICACHE_DISABLE is not set
293# CONFIG_CPU_DCACHE_DISABLE is not set
294# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
295# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
296CONFIG_ARM_L1_CACHE_SHIFT=5
297
298#
299# Bus support
300#
301# CONFIG_PCI_SYSCALL is not set
302# CONFIG_ARCH_SUPPORTS_MSI is not set
303# CONFIG_PCCARD is not set
304
305#
306# Kernel Features
307#
308CONFIG_TICK_ONESHOT=y
309CONFIG_NO_HZ=y
310CONFIG_HIGH_RES_TIMERS=y
311CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
312CONFIG_VMSPLIT_3G=y
313# CONFIG_VMSPLIT_2G is not set
314# CONFIG_VMSPLIT_1G is not set
315CONFIG_PAGE_OFFSET=0xC0000000
316# CONFIG_PREEMPT_NONE is not set
317# CONFIG_PREEMPT_VOLUNTARY is not set
318CONFIG_PREEMPT=y
319CONFIG_HZ=100
320CONFIG_AEABI=y
321# CONFIG_OABI_COMPAT is not set
322# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
323# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
324# CONFIG_HIGHMEM is not set
325CONFIG_SELECT_MEMORY_MODEL=y
326CONFIG_FLATMEM_MANUAL=y
327# CONFIG_DISCONTIGMEM_MANUAL is not set
328# CONFIG_SPARSEMEM_MANUAL is not set
329CONFIG_FLATMEM=y
330CONFIG_FLAT_NODE_MEM_MAP=y
331CONFIG_PAGEFLAGS_EXTENDED=y
332CONFIG_SPLIT_PTLOCK_CPUS=999999
333# CONFIG_PHYS_ADDR_T_64BIT is not set
334CONFIG_ZONE_DMA_FLAG=0
335CONFIG_VIRT_TO_BUS=y
336# CONFIG_KSM is not set
337CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
338# CONFIG_LEDS is not set
339CONFIG_ALIGNMENT_TRAP=y
340# CONFIG_UACCESS_WITH_MEMCPY is not set
341
342#
343# Boot options
344#
345CONFIG_ZBOOT_ROM_TEXT=0x0
346CONFIG_ZBOOT_ROM_BSS=0x0
347CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
348# CONFIG_XIP_KERNEL is not set
349CONFIG_KEXEC=y
350CONFIG_ATAGS_PROC=y
351
352#
353# CPU Power Management
354#
355CONFIG_CPU_IDLE=y
356CONFIG_CPU_IDLE_GOV_LADDER=y
357CONFIG_CPU_IDLE_GOV_MENU=y
358
359#
360# Floating point emulation
361#
362
363#
364# At least one emulation must be selected
365#
366# CONFIG_VFP is not set
367
368#
369# Userspace binary formats
370#
371CONFIG_BINFMT_ELF=y
372# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
373CONFIG_HAVE_AOUT=y
374# CONFIG_BINFMT_AOUT is not set
375# CONFIG_BINFMT_MISC is not set
376
377#
378# Power management options
379#
380CONFIG_PM=y
381# CONFIG_PM_DEBUG is not set
382CONFIG_PM_SLEEP=y
383CONFIG_SUSPEND=y
384CONFIG_SUSPEND_FREEZER=y
385# CONFIG_APM_EMULATION is not set
386# CONFIG_PM_RUNTIME is not set
387CONFIG_PM_OPS=y
388CONFIG_ARCH_SUSPEND_POSSIBLE=y
389CONFIG_NET=y
390
391#
392# Networking options
393#
394CONFIG_PACKET=y
395CONFIG_UNIX=y
396# CONFIG_NET_KEY is not set
397CONFIG_INET=y
398# CONFIG_IP_MULTICAST is not set
399# CONFIG_IP_ADVANCED_ROUTER is not set
400CONFIG_IP_FIB_HASH=y
401# CONFIG_IP_PNP is not set
402# CONFIG_NET_IPIP is not set
403# CONFIG_NET_IPGRE is not set
404# CONFIG_ARPD is not set
405# CONFIG_SYN_COOKIES is not set
406# CONFIG_INET_AH is not set
407# CONFIG_INET_ESP is not set
408# CONFIG_INET_IPCOMP is not set
409# CONFIG_INET_XFRM_TUNNEL is not set
410# CONFIG_INET_TUNNEL is not set
411# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
412# CONFIG_INET_XFRM_MODE_TUNNEL is not set
413# CONFIG_INET_XFRM_MODE_BEET is not set
414# CONFIG_INET_LRO is not set
415CONFIG_INET_DIAG=y
416CONFIG_INET_TCP_DIAG=y
417# CONFIG_TCP_CONG_ADVANCED is not set
418CONFIG_TCP_CONG_CUBIC=y
419CONFIG_DEFAULT_TCP_CONG="cubic"
420# CONFIG_TCP_MD5SIG is not set
421# CONFIG_IPV6 is not set
422# CONFIG_NETWORK_SECMARK is not set
423# CONFIG_NETFILTER is not set
424# CONFIG_IP_DCCP is not set
425# CONFIG_IP_SCTP is not set
426# CONFIG_RDS is not set
427# CONFIG_TIPC is not set
428# CONFIG_ATM is not set
429# CONFIG_BRIDGE is not set
430# CONFIG_NET_DSA is not set
431# CONFIG_VLAN_8021Q is not set
432# CONFIG_DECNET is not set
433# CONFIG_LLC2 is not set
434# CONFIG_IPX is not set
435# CONFIG_ATALK is not set
436# CONFIG_X25 is not set
437# CONFIG_LAPB is not set
438# CONFIG_ECONET is not set
439# CONFIG_WAN_ROUTER is not set
440# CONFIG_PHONET is not set
441# CONFIG_IEEE802154 is not set
442# CONFIG_NET_SCHED is not set
443# CONFIG_DCB is not set
444
445#
446# Network testing
447#
448# CONFIG_NET_PKTGEN is not set
449# CONFIG_HAMRADIO is not set
450# CONFIG_CAN is not set
451# CONFIG_IRDA is not set
452# CONFIG_BT is not set
453# CONFIG_AF_RXRPC is not set
454# CONFIG_WIRELESS is not set
455# CONFIG_WIMAX is not set
456# CONFIG_RFKILL is not set
457# CONFIG_NET_9P is not set
458
459#
460# Device Drivers
461#
462
463#
464# Generic Driver Options
465#
466CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
467# CONFIG_DEVTMPFS is not set
468CONFIG_STANDALONE=y
469CONFIG_PREVENT_FIRMWARE_BUILD=y
470CONFIG_FW_LOADER=y
471CONFIG_FIRMWARE_IN_KERNEL=y
472CONFIG_EXTRA_FIRMWARE=""
473# CONFIG_SYS_HYPERVISOR is not set
474# CONFIG_CONNECTOR is not set
475CONFIG_MTD=y
476# CONFIG_MTD_DEBUG is not set
477# CONFIG_MTD_TESTS is not set
478CONFIG_MTD_CONCAT=y
479CONFIG_MTD_PARTITIONS=y
480# CONFIG_MTD_REDBOOT_PARTS is not set
481CONFIG_MTD_CMDLINE_PARTS=y
482# CONFIG_MTD_AFS_PARTS is not set
483# CONFIG_MTD_AR7_PARTS is not set
484
485#
486# User Modules And Translation Layers
487#
488CONFIG_MTD_CHAR=y
489CONFIG_MTD_BLKDEVS=y
490CONFIG_MTD_BLOCK=y
491# CONFIG_FTL is not set
492# CONFIG_NFTL is not set
493# CONFIG_INFTL is not set
494# CONFIG_RFD_FTL is not set
495# CONFIG_SSFDC is not set
496# CONFIG_MTD_OOPS is not set
497
498#
499# RAM/ROM/Flash chip drivers
500#
501# CONFIG_MTD_CFI is not set
502# CONFIG_MTD_JEDECPROBE is not set
503CONFIG_MTD_MAP_BANK_WIDTH_1=y
504CONFIG_MTD_MAP_BANK_WIDTH_2=y
505CONFIG_MTD_MAP_BANK_WIDTH_4=y
506# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
507# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
508# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
509CONFIG_MTD_CFI_I1=y
510CONFIG_MTD_CFI_I2=y
511# CONFIG_MTD_CFI_I4 is not set
512# CONFIG_MTD_CFI_I8 is not set
513# CONFIG_MTD_RAM is not set
514# CONFIG_MTD_ROM is not set
515# CONFIG_MTD_ABSENT is not set
516
517#
518# Mapping drivers for chip access
519#
520# CONFIG_MTD_COMPLEX_MAPPINGS is not set
521# CONFIG_MTD_PLATRAM is not set
522
523#
524# Self-contained MTD device drivers
525#
526CONFIG_MTD_DATAFLASH=y
527# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
528# CONFIG_MTD_DATAFLASH_OTP is not set
529# CONFIG_MTD_M25P80 is not set
530# CONFIG_MTD_SST25L is not set
531# CONFIG_MTD_SLRAM is not set
532# CONFIG_MTD_PHRAM is not set
533# CONFIG_MTD_MTDRAM is not set
534# CONFIG_MTD_BLOCK2MTD is not set
535
536#
537# Disk-On-Chip Device Drivers
538#
539# CONFIG_MTD_DOC2000 is not set
540# CONFIG_MTD_DOC2001 is not set
541# CONFIG_MTD_DOC2001PLUS is not set
542CONFIG_MTD_NAND=y
543# CONFIG_MTD_NAND_VERIFY_WRITE is not set
544# CONFIG_MTD_NAND_ECC_SMC is not set
545# CONFIG_MTD_NAND_MUSEUM_IDS is not set
546# CONFIG_MTD_NAND_GPIO is not set
547CONFIG_MTD_NAND_IDS=y
548# CONFIG_MTD_NAND_DISKONCHIP is not set
549CONFIG_MTD_NAND_ATMEL=y
550# CONFIG_MTD_NAND_ATMEL_ECC_HW is not set
551CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
552# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
553# CONFIG_MTD_NAND_NANDSIM is not set
554# CONFIG_MTD_NAND_PLATFORM is not set
555# CONFIG_MTD_ALAUDA is not set
556# CONFIG_MTD_ONENAND is not set
557
558#
559# LPDDR flash memory drivers
560#
561# CONFIG_MTD_LPDDR is not set
562
563#
564# UBI - Unsorted block images
565#
566# CONFIG_MTD_UBI is not set
567# CONFIG_PARPORT is not set
568CONFIG_BLK_DEV=y
569# CONFIG_BLK_DEV_COW_COMMON is not set
570CONFIG_BLK_DEV_LOOP=y
571# CONFIG_BLK_DEV_CRYPTOLOOP is not set
572
573#
574# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
575#
576# CONFIG_BLK_DEV_NBD is not set
577# CONFIG_BLK_DEV_UB is not set
578CONFIG_BLK_DEV_RAM=y
579CONFIG_BLK_DEV_RAM_COUNT=16
580CONFIG_BLK_DEV_RAM_SIZE=8192
581# CONFIG_BLK_DEV_XIP is not set
582# CONFIG_CDROM_PKTCDVD is not set
583# CONFIG_ATA_OVER_ETH is not set
584# CONFIG_MG_DISK is not set
585# CONFIG_MISC_DEVICES is not set
586CONFIG_HAVE_IDE=y
587# CONFIG_IDE is not set
588
589#
590# SCSI device support
591#
592# CONFIG_RAID_ATTRS is not set
593CONFIG_SCSI=y
594CONFIG_SCSI_DMA=y
595# CONFIG_SCSI_TGT is not set
596# CONFIG_SCSI_NETLINK is not set
597CONFIG_SCSI_PROC_FS=y
598
599#
600# SCSI support type (disk, tape, CD-ROM)
601#
602CONFIG_BLK_DEV_SD=y
603# CONFIG_CHR_DEV_ST is not set
604# CONFIG_CHR_DEV_OSST is not set
605# CONFIG_BLK_DEV_SR is not set
606# CONFIG_CHR_DEV_SG is not set
607# CONFIG_CHR_DEV_SCH is not set
608CONFIG_SCSI_MULTI_LUN=y
609# CONFIG_SCSI_CONSTANTS is not set
610# CONFIG_SCSI_LOGGING is not set
611# CONFIG_SCSI_SCAN_ASYNC is not set
612CONFIG_SCSI_WAIT_SCAN=m
613
614#
615# SCSI Transports
616#
617# CONFIG_SCSI_SPI_ATTRS is not set
618# CONFIG_SCSI_FC_ATTRS is not set
619# CONFIG_SCSI_ISCSI_ATTRS is not set
620# CONFIG_SCSI_SAS_LIBSAS is not set
621# CONFIG_SCSI_SRP_ATTRS is not set
622# CONFIG_SCSI_LOWLEVEL is not set
623# CONFIG_SCSI_DH is not set
624# CONFIG_SCSI_OSD_INITIATOR is not set
625# CONFIG_ATA is not set
626# CONFIG_MD is not set
627CONFIG_NETDEVICES=y
628# CONFIG_DUMMY is not set
629# CONFIG_BONDING is not set
630# CONFIG_MACVLAN is not set
631# CONFIG_EQUALIZER is not set
632# CONFIG_TUN is not set
633# CONFIG_VETH is not set
634CONFIG_PHYLIB=y
635
636#
637# MII PHY device drivers
638#
639# CONFIG_MARVELL_PHY is not set
640# CONFIG_DAVICOM_PHY is not set
641# CONFIG_QSEMI_PHY is not set
642# CONFIG_LXT_PHY is not set
643# CONFIG_CICADA_PHY is not set
644# CONFIG_VITESSE_PHY is not set
645# CONFIG_SMSC_PHY is not set
646# CONFIG_BROADCOM_PHY is not set
647# CONFIG_ICPLUS_PHY is not set
648# CONFIG_REALTEK_PHY is not set
649# CONFIG_NATIONAL_PHY is not set
650# CONFIG_STE10XP is not set
651# CONFIG_LSI_ET1011C_PHY is not set
652# CONFIG_FIXED_PHY is not set
653# CONFIG_MDIO_BITBANG is not set
654CONFIG_NET_ETHERNET=y
655# CONFIG_MII is not set
656CONFIG_MACB=y
657# CONFIG_AX88796 is not set
658# CONFIG_SMC91X is not set
659# CONFIG_DM9000 is not set
660# CONFIG_ENC28J60 is not set
661# CONFIG_ETHOC is not set
662# CONFIG_SMC911X is not set
663# CONFIG_SMSC911X is not set
664# CONFIG_DNET is not set
665# CONFIG_IBM_NEW_EMAC_ZMII is not set
666# CONFIG_IBM_NEW_EMAC_RGMII is not set
667# CONFIG_IBM_NEW_EMAC_TAH is not set
668# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
669# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
670# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
671# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
672# CONFIG_B44 is not set
673# CONFIG_KS8842 is not set
674# CONFIG_KS8851 is not set
675# CONFIG_KS8851_MLL is not set
676# CONFIG_NETDEV_1000 is not set
677# CONFIG_NETDEV_10000 is not set
678# CONFIG_WLAN is not set
679
680#
681# Enable WiMAX (Networking options) to see the WiMAX drivers
682#
683
684#
685# USB Network Adapters
686#
687# CONFIG_USB_CATC is not set
688# CONFIG_USB_KAWETH is not set
689# CONFIG_USB_PEGASUS is not set
690# CONFIG_USB_RTL8150 is not set
691# CONFIG_USB_USBNET is not set
692# CONFIG_WAN is not set
693# CONFIG_PPP is not set
694# CONFIG_SLIP is not set
695# CONFIG_NETCONSOLE is not set
696# CONFIG_NETPOLL is not set
697# CONFIG_NET_POLL_CONTROLLER is not set
698# CONFIG_ISDN is not set
699# CONFIG_PHONE is not set
700
701#
702# Input device support
703#
704CONFIG_INPUT=y
705# CONFIG_INPUT_FF_MEMLESS is not set
706# CONFIG_INPUT_POLLDEV is not set
707# CONFIG_INPUT_SPARSEKMAP is not set
708
709#
710# Userland interfaces
711#
712CONFIG_INPUT_MOUSEDEV=y
713# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
714CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
715CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
716# CONFIG_INPUT_JOYDEV is not set
717# CONFIG_INPUT_EVDEV is not set
718# CONFIG_INPUT_EVBUG is not set
719
720#
721# Input Device Drivers
722#
723# CONFIG_INPUT_KEYBOARD is not set
724# CONFIG_INPUT_MOUSE is not set
725# CONFIG_INPUT_JOYSTICK is not set
726# CONFIG_INPUT_TABLET is not set
727# CONFIG_INPUT_TOUCHSCREEN is not set
728# CONFIG_INPUT_MISC is not set
729
730#
731# Hardware I/O ports
732#
733# CONFIG_SERIO is not set
734# CONFIG_GAMEPORT is not set
735
736#
737# Character devices
738#
739CONFIG_VT=y
740CONFIG_CONSOLE_TRANSLATIONS=y
741CONFIG_VT_CONSOLE=y
742CONFIG_HW_CONSOLE=y
743# CONFIG_VT_HW_CONSOLE_BINDING is not set
744CONFIG_DEVKMEM=y
745# CONFIG_SERIAL_NONSTANDARD is not set
746
747#
748# Serial drivers
749#
750# CONFIG_SERIAL_8250 is not set
751
752#
753# Non-8250 serial port support
754#
755CONFIG_SERIAL_ATMEL=y
756CONFIG_SERIAL_ATMEL_CONSOLE=y
757CONFIG_SERIAL_ATMEL_PDC=y
758# CONFIG_SERIAL_ATMEL_TTYAT is not set
759# CONFIG_SERIAL_MAX3100 is not set
760CONFIG_SERIAL_CORE=y
761CONFIG_SERIAL_CORE_CONSOLE=y
762# CONFIG_SERIAL_TIMBERDALE is not set
763CONFIG_UNIX98_PTYS=y
764# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
765# CONFIG_LEGACY_PTYS is not set
766# CONFIG_IPMI_HANDLER is not set
767# CONFIG_HW_RANDOM is not set
768# CONFIG_R3964 is not set
769# CONFIG_RAW_DRIVER is not set
770# CONFIG_TCG_TPM is not set
771CONFIG_I2C=y
772CONFIG_I2C_BOARDINFO=y
773CONFIG_I2C_COMPAT=y
774CONFIG_I2C_CHARDEV=y
775CONFIG_I2C_HELPER_AUTO=y
776CONFIG_I2C_ALGOBIT=y
777
778#
779# I2C Hardware Bus support
780#
781
782#
783# I2C system bus drivers (mostly embedded / system-on-chip)
784#
785# CONFIG_I2C_DESIGNWARE is not set
786CONFIG_I2C_GPIO=y
787# CONFIG_I2C_OCORES is not set
788# CONFIG_I2C_SIMTEC is not set
789# CONFIG_I2C_XILINX is not set
790
791#
792# External I2C/SMBus adapter drivers
793#
794# CONFIG_I2C_PARPORT_LIGHT is not set
795# CONFIG_I2C_TAOS_EVM is not set
796# CONFIG_I2C_TINY_USB is not set
797
798#
799# Other I2C/SMBus bus drivers
800#
801# CONFIG_I2C_PCA_PLATFORM is not set
802# CONFIG_I2C_STUB is not set
803
804#
805# Miscellaneous I2C Chip support
806#
807# CONFIG_SENSORS_TSL2550 is not set
808# CONFIG_I2C_DEBUG_CORE is not set
809# CONFIG_I2C_DEBUG_ALGO is not set
810# CONFIG_I2C_DEBUG_BUS is not set
811# CONFIG_I2C_DEBUG_CHIP is not set
812CONFIG_SPI=y
813CONFIG_SPI_MASTER=y
814
815#
816# SPI Master Controller Drivers
817#
818CONFIG_SPI_ATMEL=y
819# CONFIG_SPI_BITBANG is not set
820# CONFIG_SPI_GPIO is not set
821# CONFIG_SPI_XILINX is not set
822# CONFIG_SPI_DESIGNWARE is not set
823
824#
825# SPI Protocol Masters
826#
827CONFIG_SPI_SPIDEV=y
828# CONFIG_SPI_TLE62X0 is not set
829
830#
831# PPS support
832#
833# CONFIG_PPS is not set
834CONFIG_ARCH_REQUIRE_GPIOLIB=y
835CONFIG_GPIOLIB=y
836CONFIG_GPIO_SYSFS=y
837
838#
839# Memory mapped GPIO expanders:
840#
841# CONFIG_GPIO_IT8761E is not set
842
843#
844# I2C GPIO expanders:
845#
846# CONFIG_GPIO_MAX7300 is not set
847# CONFIG_GPIO_MAX732X is not set
848# CONFIG_GPIO_PCA953X is not set
849# CONFIG_GPIO_PCF857X is not set
850# CONFIG_GPIO_ADP5588 is not set
851
852#
853# PCI GPIO expanders:
854#
855
856#
857# SPI GPIO expanders:
858#
859# CONFIG_GPIO_MAX7301 is not set
860# CONFIG_GPIO_MCP23S08 is not set
861# CONFIG_GPIO_MC33880 is not set
862
863#
864# AC97 GPIO expanders:
865#
866CONFIG_W1=y
867
868#
869# 1-wire Bus Masters
870#
871# CONFIG_W1_MASTER_DS2490 is not set
872# CONFIG_W1_MASTER_DS2482 is not set
873# CONFIG_W1_MASTER_DS1WM is not set
874CONFIG_W1_MASTER_GPIO=y
875
876#
877# 1-wire Slaves
878#
879CONFIG_W1_SLAVE_THERM=y
880# CONFIG_W1_SLAVE_SMEM is not set
881CONFIG_W1_SLAVE_DS2431=y
882# CONFIG_W1_SLAVE_DS2433 is not set
883# CONFIG_W1_SLAVE_DS2760 is not set
884# CONFIG_W1_SLAVE_BQ27000 is not set
885# CONFIG_POWER_SUPPLY is not set
886# CONFIG_HWMON is not set
887# CONFIG_THERMAL is not set
888CONFIG_WATCHDOG=y
889# CONFIG_WATCHDOG_NOWAYOUT is not set
890
891#
892# Watchdog Device Drivers
893#
894# CONFIG_SOFT_WATCHDOG is not set
895# CONFIG_MAX63XX_WATCHDOG is not set
896CONFIG_AT91SAM9X_WATCHDOG=y
897
898#
899# USB-based Watchdog Cards
900#
901# CONFIG_USBPCWATCHDOG is not set
902CONFIG_SSB_POSSIBLE=y
903
904#
905# Sonics Silicon Backplane
906#
907# CONFIG_SSB is not set
908
909#
910# Multifunction device drivers
911#
912# CONFIG_MFD_CORE is not set
913# CONFIG_MFD_88PM860X is not set
914# CONFIG_MFD_SM501 is not set
915# CONFIG_MFD_ASIC3 is not set
916# CONFIG_HTC_EGPIO is not set
917# CONFIG_HTC_PASIC3 is not set
918# CONFIG_HTC_I2CPLD is not set
919# CONFIG_TPS65010 is not set
920# CONFIG_TWL4030_CORE is not set
921# CONFIG_MFD_TMIO is not set
922# CONFIG_MFD_T7L66XB is not set
923# CONFIG_MFD_TC6387XB is not set
924# CONFIG_MFD_TC6393XB is not set
925# CONFIG_PMIC_DA903X is not set
926# CONFIG_PMIC_ADP5520 is not set
927# CONFIG_MFD_MAX8925 is not set
928# CONFIG_MFD_WM8400 is not set
929# CONFIG_MFD_WM831X is not set
930# CONFIG_MFD_WM8350_I2C is not set
931# CONFIG_MFD_WM8994 is not set
932# CONFIG_MFD_PCF50633 is not set
933# CONFIG_MFD_MC13783 is not set
934# CONFIG_AB3100_CORE is not set
935# CONFIG_EZX_PCAP is not set
936# CONFIG_AB4500_CORE is not set
937# CONFIG_REGULATOR is not set
938# CONFIG_MEDIA_SUPPORT is not set
939
940#
941# Graphics support
942#
943# CONFIG_VGASTATE is not set
944# CONFIG_VIDEO_OUTPUT_CONTROL is not set
945# CONFIG_FB is not set
946# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
947
948#
949# Display device support
950#
951# CONFIG_DISPLAY_SUPPORT is not set
952
953#
954# Console display driver support
955#
956# CONFIG_VGA_CONSOLE is not set
957CONFIG_DUMMY_CONSOLE=y
958# CONFIG_SOUND is not set
959# CONFIG_HID_SUPPORT is not set
960CONFIG_USB_SUPPORT=y
961CONFIG_USB_ARCH_HAS_HCD=y
962CONFIG_USB_ARCH_HAS_OHCI=y
963# CONFIG_USB_ARCH_HAS_EHCI is not set
964CONFIG_USB=y
965# CONFIG_USB_DEBUG is not set
966# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
967
968#
969# Miscellaneous USB options
970#
971CONFIG_USB_DEVICEFS=y
972# CONFIG_USB_DEVICE_CLASS is not set
973# CONFIG_USB_DYNAMIC_MINORS is not set
974# CONFIG_USB_OTG is not set
975CONFIG_USB_MON=y
976# CONFIG_USB_WUSB is not set
977# CONFIG_USB_WUSB_CBAF is not set
978
979#
980# USB Host Controller Drivers
981#
982# CONFIG_USB_C67X00_HCD is not set
983# CONFIG_USB_OXU210HP_HCD is not set
984# CONFIG_USB_ISP116X_HCD is not set
985# CONFIG_USB_ISP1760_HCD is not set
986# CONFIG_USB_ISP1362_HCD is not set
987CONFIG_USB_OHCI_HCD=y
988# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
989# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
990CONFIG_USB_OHCI_LITTLE_ENDIAN=y
991# CONFIG_USB_SL811_HCD is not set
992# CONFIG_USB_R8A66597_HCD is not set
993# CONFIG_USB_HWA_HCD is not set
994# CONFIG_USB_MUSB_HDRC is not set
995# CONFIG_USB_GADGET_MUSB_HDRC is not set
996
997#
998# USB Device Class drivers
999#
1000# CONFIG_USB_ACM is not set
1001# CONFIG_USB_PRINTER is not set
1002# CONFIG_USB_WDM is not set
1003# CONFIG_USB_TMC is not set
1004
1005#
1006# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1007#
1008
1009#
1010# also be needed; see USB_STORAGE Help for more info
1011#
1012CONFIG_USB_STORAGE=y
1013# CONFIG_USB_STORAGE_DEBUG is not set
1014# CONFIG_USB_STORAGE_DATAFAB is not set
1015# CONFIG_USB_STORAGE_FREECOM is not set
1016# CONFIG_USB_STORAGE_ISD200 is not set
1017# CONFIG_USB_STORAGE_USBAT is not set
1018# CONFIG_USB_STORAGE_SDDR09 is not set
1019# CONFIG_USB_STORAGE_SDDR55 is not set
1020# CONFIG_USB_STORAGE_JUMPSHOT is not set
1021# CONFIG_USB_STORAGE_ALAUDA is not set
1022# CONFIG_USB_STORAGE_ONETOUCH is not set
1023# CONFIG_USB_STORAGE_KARMA is not set
1024# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1025# CONFIG_USB_LIBUSUAL is not set
1026
1027#
1028# USB Imaging devices
1029#
1030# CONFIG_USB_MDC800 is not set
1031# CONFIG_USB_MICROTEK is not set
1032
1033#
1034# USB port drivers
1035#
1036# CONFIG_USB_SERIAL is not set
1037
1038#
1039# USB Miscellaneous drivers
1040#
1041# CONFIG_USB_EMI62 is not set
1042# CONFIG_USB_EMI26 is not set
1043# CONFIG_USB_ADUTUX is not set
1044# CONFIG_USB_SEVSEG is not set
1045# CONFIG_USB_RIO500 is not set
1046# CONFIG_USB_LEGOTOWER is not set
1047# CONFIG_USB_LCD is not set
1048# CONFIG_USB_LED is not set
1049# CONFIG_USB_CYPRESS_CY7C63 is not set
1050# CONFIG_USB_CYTHERM is not set
1051# CONFIG_USB_IDMOUSE is not set
1052# CONFIG_USB_FTDI_ELAN is not set
1053# CONFIG_USB_APPLEDISPLAY is not set
1054# CONFIG_USB_LD is not set
1055# CONFIG_USB_TRANCEVIBRATOR is not set
1056# CONFIG_USB_IOWARRIOR is not set
1057# CONFIG_USB_TEST is not set
1058# CONFIG_USB_ISIGHTFW is not set
1059CONFIG_USB_GADGET=m
1060# CONFIG_USB_GADGET_DEBUG_FILES is not set
1061CONFIG_USB_GADGET_VBUS_DRAW=2
1062CONFIG_USB_GADGET_SELECTED=y
1063CONFIG_USB_GADGET_AT91=y
1064CONFIG_USB_AT91=m
1065# CONFIG_USB_GADGET_ATMEL_USBA is not set
1066# CONFIG_USB_GADGET_FSL_USB2 is not set
1067# CONFIG_USB_GADGET_LH7A40X is not set
1068# CONFIG_USB_GADGET_OMAP is not set
1069# CONFIG_USB_GADGET_PXA25X is not set
1070# CONFIG_USB_GADGET_R8A66597 is not set
1071# CONFIG_USB_GADGET_PXA27X is not set
1072# CONFIG_USB_GADGET_S3C_HSOTG is not set
1073# CONFIG_USB_GADGET_IMX is not set
1074# CONFIG_USB_GADGET_S3C2410 is not set
1075# CONFIG_USB_GADGET_M66592 is not set
1076# CONFIG_USB_GADGET_AMD5536UDC is not set
1077# CONFIG_USB_GADGET_FSL_QE is not set
1078# CONFIG_USB_GADGET_CI13XXX is not set
1079# CONFIG_USB_GADGET_NET2280 is not set
1080# CONFIG_USB_GADGET_GOKU is not set
1081# CONFIG_USB_GADGET_LANGWELL is not set
1082# CONFIG_USB_GADGET_DUMMY_HCD is not set
1083# CONFIG_USB_GADGET_DUALSPEED is not set
1084CONFIG_USB_ZERO=m
1085# CONFIG_USB_AUDIO is not set
1086CONFIG_USB_ETH=m
1087CONFIG_USB_ETH_RNDIS=y
1088# CONFIG_USB_ETH_EEM is not set
1089# CONFIG_USB_GADGETFS is not set
1090CONFIG_USB_FILE_STORAGE=m
1091# CONFIG_USB_FILE_STORAGE_TEST is not set
1092# CONFIG_USB_MASS_STORAGE is not set
1093CONFIG_USB_G_SERIAL=m
1094# CONFIG_USB_MIDI_GADGET is not set
1095# CONFIG_USB_G_PRINTER is not set
1096# CONFIG_USB_CDC_COMPOSITE is not set
1097# CONFIG_USB_G_NOKIA is not set
1098# CONFIG_USB_G_MULTI is not set
1099
1100#
1101# OTG and related infrastructure
1102#
1103# CONFIG_USB_GPIO_VBUS is not set
1104# CONFIG_USB_ULPI is not set
1105# CONFIG_NOP_USB_XCEIV is not set
1106CONFIG_MMC=y
1107# CONFIG_MMC_DEBUG is not set
1108# CONFIG_MMC_UNSAFE_RESUME is not set
1109
1110#
1111# MMC/SD/SDIO Card Drivers
1112#
1113CONFIG_MMC_BLOCK=y
1114CONFIG_MMC_BLOCK_BOUNCE=y
1115# CONFIG_SDIO_UART is not set
1116# CONFIG_MMC_TEST is not set
1117
1118#
1119# MMC/SD/SDIO Host Controller Drivers
1120#
1121# CONFIG_MMC_SDHCI is not set
1122# CONFIG_MMC_AT91 is not set
1123CONFIG_MMC_ATMELMCI=y
1124# CONFIG_MMC_SPI is not set
1125# CONFIG_MEMSTICK is not set
1126CONFIG_NEW_LEDS=y
1127CONFIG_LEDS_CLASS=y
1128
1129#
1130# LED drivers
1131#
1132# CONFIG_LEDS_PCA9532 is not set
1133CONFIG_LEDS_GPIO=y
1134CONFIG_LEDS_GPIO_PLATFORM=y
1135# CONFIG_LEDS_LP3944 is not set
1136# CONFIG_LEDS_PCA955X is not set
1137# CONFIG_LEDS_DAC124S085 is not set
1138# CONFIG_LEDS_BD2802 is not set
1139# CONFIG_LEDS_LT3593 is not set
1140
1141#
1142# LED Triggers
1143#
1144CONFIG_LEDS_TRIGGERS=y
1145CONFIG_LEDS_TRIGGER_TIMER=y
1146CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1147# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1148# CONFIG_LEDS_TRIGGER_GPIO is not set
1149CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
1150
1151#
1152# iptables trigger is under Netfilter config (LED target)
1153#
1154# CONFIG_ACCESSIBILITY is not set
1155CONFIG_RTC_LIB=y
1156CONFIG_RTC_CLASS=y
1157CONFIG_RTC_HCTOSYS=y
1158CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1159# CONFIG_RTC_DEBUG is not set
1160
1161#
1162# RTC interfaces
1163#
1164CONFIG_RTC_INTF_SYSFS=y
1165CONFIG_RTC_INTF_PROC=y
1166CONFIG_RTC_INTF_DEV=y
1167# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1168# CONFIG_RTC_DRV_TEST is not set
1169
1170#
1171# I2C RTC drivers
1172#
1173# CONFIG_RTC_DRV_DS1307 is not set
1174# CONFIG_RTC_DRV_DS1374 is not set
1175# CONFIG_RTC_DRV_DS1672 is not set
1176# CONFIG_RTC_DRV_MAX6900 is not set
1177# CONFIG_RTC_DRV_RS5C372 is not set
1178# CONFIG_RTC_DRV_ISL1208 is not set
1179# CONFIG_RTC_DRV_X1205 is not set
1180# CONFIG_RTC_DRV_PCF8563 is not set
1181# CONFIG_RTC_DRV_PCF8583 is not set
1182# CONFIG_RTC_DRV_M41T80 is not set
1183# CONFIG_RTC_DRV_BQ32K is not set
1184# CONFIG_RTC_DRV_S35390A is not set
1185# CONFIG_RTC_DRV_FM3130 is not set
1186# CONFIG_RTC_DRV_RX8581 is not set
1187# CONFIG_RTC_DRV_RX8025 is not set
1188
1189#
1190# SPI RTC drivers
1191#
1192# CONFIG_RTC_DRV_M41T94 is not set
1193# CONFIG_RTC_DRV_DS1305 is not set
1194# CONFIG_RTC_DRV_DS1390 is not set
1195# CONFIG_RTC_DRV_MAX6902 is not set
1196# CONFIG_RTC_DRV_R9701 is not set
1197# CONFIG_RTC_DRV_RS5C348 is not set
1198# CONFIG_RTC_DRV_DS3234 is not set
1199# CONFIG_RTC_DRV_PCF2123 is not set
1200
1201#
1202# Platform RTC drivers
1203#
1204# CONFIG_RTC_DRV_CMOS is not set
1205# CONFIG_RTC_DRV_DS1286 is not set
1206# CONFIG_RTC_DRV_DS1511 is not set
1207# CONFIG_RTC_DRV_DS1553 is not set
1208# CONFIG_RTC_DRV_DS1742 is not set
1209# CONFIG_RTC_DRV_STK17TA8 is not set
1210# CONFIG_RTC_DRV_M48T86 is not set
1211# CONFIG_RTC_DRV_M48T35 is not set
1212# CONFIG_RTC_DRV_M48T59 is not set
1213# CONFIG_RTC_DRV_MSM6242 is not set
1214# CONFIG_RTC_DRV_BQ4802 is not set
1215# CONFIG_RTC_DRV_RP5C01 is not set
1216# CONFIG_RTC_DRV_V3020 is not set
1217
1218#
1219# on-CPU RTC drivers
1220#
1221CONFIG_RTC_DRV_AT91SAM9=y
1222CONFIG_RTC_DRV_AT91SAM9_RTT=0
1223CONFIG_RTC_DRV_AT91SAM9_GPBR=0
1224# CONFIG_DMADEVICES is not set
1225# CONFIG_AUXDISPLAY is not set
1226# CONFIG_UIO is not set
1227
1228#
1229# TI VLYNQ
1230#
1231# CONFIG_STAGING is not set
1232
1233#
1234# File systems
1235#
1236CONFIG_EXT2_FS=y
1237# CONFIG_EXT2_FS_XATTR is not set
1238# CONFIG_EXT2_FS_XIP is not set
1239CONFIG_EXT3_FS=y
1240# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1241CONFIG_EXT3_FS_XATTR=y
1242# CONFIG_EXT3_FS_POSIX_ACL is not set
1243# CONFIG_EXT3_FS_SECURITY is not set
1244# CONFIG_EXT4_FS is not set
1245CONFIG_JBD=y
1246CONFIG_FS_MBCACHE=y
1247# CONFIG_REISERFS_FS is not set
1248# CONFIG_JFS_FS is not set
1249# CONFIG_FS_POSIX_ACL is not set
1250# CONFIG_XFS_FS is not set
1251# CONFIG_OCFS2_FS is not set
1252# CONFIG_BTRFS_FS is not set
1253# CONFIG_NILFS2_FS is not set
1254CONFIG_FILE_LOCKING=y
1255CONFIG_FSNOTIFY=y
1256CONFIG_DNOTIFY=y
1257CONFIG_INOTIFY=y
1258CONFIG_INOTIFY_USER=y
1259# CONFIG_QUOTA is not set
1260# CONFIG_AUTOFS_FS is not set
1261# CONFIG_AUTOFS4_FS is not set
1262# CONFIG_FUSE_FS is not set
1263
1264#
1265# Caches
1266#
1267# CONFIG_FSCACHE is not set
1268
1269#
1270# CD-ROM/DVD Filesystems
1271#
1272# CONFIG_ISO9660_FS is not set
1273# CONFIG_UDF_FS is not set
1274
1275#
1276# DOS/FAT/NT Filesystems
1277#
1278CONFIG_FAT_FS=y
1279# CONFIG_MSDOS_FS is not set
1280CONFIG_VFAT_FS=y
1281CONFIG_FAT_DEFAULT_CODEPAGE=437
1282CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1283# CONFIG_NTFS_FS is not set
1284
1285#
1286# Pseudo filesystems
1287#
1288CONFIG_PROC_FS=y
1289CONFIG_PROC_SYSCTL=y
1290CONFIG_PROC_PAGE_MONITOR=y
1291CONFIG_SYSFS=y
1292CONFIG_TMPFS=y
1293# CONFIG_TMPFS_POSIX_ACL is not set
1294# CONFIG_HUGETLB_PAGE is not set
1295# CONFIG_CONFIGFS_FS is not set
1296CONFIG_MISC_FILESYSTEMS=y
1297# CONFIG_ADFS_FS is not set
1298# CONFIG_AFFS_FS is not set
1299# CONFIG_HFS_FS is not set
1300# CONFIG_HFSPLUS_FS is not set
1301# CONFIG_BEFS_FS is not set
1302# CONFIG_BFS_FS is not set
1303# CONFIG_EFS_FS is not set
1304CONFIG_JFFS2_FS=y
1305CONFIG_JFFS2_FS_DEBUG=0
1306CONFIG_JFFS2_FS_WRITEBUFFER=y
1307# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1308CONFIG_JFFS2_SUMMARY=y
1309# CONFIG_JFFS2_FS_XATTR is not set
1310# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1311CONFIG_JFFS2_ZLIB=y
1312# CONFIG_JFFS2_LZO is not set
1313CONFIG_JFFS2_RTIME=y
1314# CONFIG_JFFS2_RUBIN is not set
1315# CONFIG_LOGFS is not set
1316# CONFIG_CRAMFS is not set
1317# CONFIG_SQUASHFS is not set
1318# CONFIG_VXFS_FS is not set
1319# CONFIG_MINIX_FS is not set
1320# CONFIG_OMFS_FS is not set
1321# CONFIG_HPFS_FS is not set
1322# CONFIG_QNX4FS_FS is not set
1323# CONFIG_ROMFS_FS is not set
1324# CONFIG_SYSV_FS is not set
1325# CONFIG_UFS_FS is not set
1326CONFIG_NETWORK_FILESYSTEMS=y
1327CONFIG_NFS_FS=y
1328CONFIG_NFS_V3=y
1329# CONFIG_NFS_V3_ACL is not set
1330# CONFIG_NFS_V4 is not set
1331# CONFIG_NFSD is not set
1332CONFIG_LOCKD=y
1333CONFIG_LOCKD_V4=y
1334CONFIG_NFS_COMMON=y
1335CONFIG_SUNRPC=y
1336# CONFIG_RPCSEC_GSS_KRB5 is not set
1337# CONFIG_RPCSEC_GSS_SPKM3 is not set
1338# CONFIG_SMB_FS is not set
1339# CONFIG_CIFS is not set
1340# CONFIG_NCP_FS is not set
1341# CONFIG_CODA_FS is not set
1342# CONFIG_AFS_FS is not set
1343
1344#
1345# Partition Types
1346#
1347# CONFIG_PARTITION_ADVANCED is not set
1348CONFIG_MSDOS_PARTITION=y
1349CONFIG_NLS=y
1350CONFIG_NLS_DEFAULT="iso8859-1"
1351CONFIG_NLS_CODEPAGE_437=y
1352# CONFIG_NLS_CODEPAGE_737 is not set
1353# CONFIG_NLS_CODEPAGE_775 is not set
1354CONFIG_NLS_CODEPAGE_850=y
1355# CONFIG_NLS_CODEPAGE_852 is not set
1356# CONFIG_NLS_CODEPAGE_855 is not set
1357# CONFIG_NLS_CODEPAGE_857 is not set
1358# CONFIG_NLS_CODEPAGE_860 is not set
1359# CONFIG_NLS_CODEPAGE_861 is not set
1360# CONFIG_NLS_CODEPAGE_862 is not set
1361# CONFIG_NLS_CODEPAGE_863 is not set
1362# CONFIG_NLS_CODEPAGE_864 is not set
1363# CONFIG_NLS_CODEPAGE_865 is not set
1364# CONFIG_NLS_CODEPAGE_866 is not set
1365# CONFIG_NLS_CODEPAGE_869 is not set
1366# CONFIG_NLS_CODEPAGE_936 is not set
1367# CONFIG_NLS_CODEPAGE_950 is not set
1368# CONFIG_NLS_CODEPAGE_932 is not set
1369# CONFIG_NLS_CODEPAGE_949 is not set
1370# CONFIG_NLS_CODEPAGE_874 is not set
1371# CONFIG_NLS_ISO8859_8 is not set
1372# CONFIG_NLS_CODEPAGE_1250 is not set
1373# CONFIG_NLS_CODEPAGE_1251 is not set
1374# CONFIG_NLS_ASCII is not set
1375CONFIG_NLS_ISO8859_1=y
1376# CONFIG_NLS_ISO8859_2 is not set
1377# CONFIG_NLS_ISO8859_3 is not set
1378# CONFIG_NLS_ISO8859_4 is not set
1379# CONFIG_NLS_ISO8859_5 is not set
1380# CONFIG_NLS_ISO8859_6 is not set
1381# CONFIG_NLS_ISO8859_7 is not set
1382# CONFIG_NLS_ISO8859_9 is not set
1383# CONFIG_NLS_ISO8859_13 is not set
1384# CONFIG_NLS_ISO8859_14 is not set
1385CONFIG_NLS_ISO8859_15=y
1386# CONFIG_NLS_KOI8_R is not set
1387# CONFIG_NLS_KOI8_U is not set
1388CONFIG_NLS_UTF8=y
1389# CONFIG_DLM is not set
1390
1391#
1392# Kernel hacking
1393#
1394# CONFIG_PRINTK_TIME is not set
1395CONFIG_ENABLE_WARN_DEPRECATED=y
1396CONFIG_ENABLE_MUST_CHECK=y
1397CONFIG_FRAME_WARN=1024
1398# CONFIG_MAGIC_SYSRQ is not set
1399# CONFIG_STRIP_ASM_SYMS is not set
1400# CONFIG_UNUSED_SYMBOLS is not set
1401# CONFIG_DEBUG_FS is not set
1402# CONFIG_HEADERS_CHECK is not set
1403# CONFIG_DEBUG_KERNEL is not set
1404CONFIG_DEBUG_BUGVERBOSE=y
1405CONFIG_DEBUG_MEMORY_INIT=y
1406CONFIG_FRAME_POINTER=y
1407# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1408# CONFIG_LATENCYTOP is not set
1409# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1410CONFIG_HAVE_FUNCTION_TRACER=y
1411CONFIG_TRACING_SUPPORT=y
1412# CONFIG_FTRACE is not set
1413# CONFIG_SAMPLES is not set
1414CONFIG_HAVE_ARCH_KGDB=y
1415# CONFIG_ARM_UNWIND is not set
1416# CONFIG_DEBUG_USER is not set
1417# CONFIG_OC_ETM is not set
1418
1419#
1420# Security options
1421#
1422# CONFIG_KEYS is not set
1423# CONFIG_SECURITY is not set
1424# CONFIG_SECURITYFS is not set
1425# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1426# CONFIG_DEFAULT_SECURITY_SMACK is not set
1427# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1428CONFIG_DEFAULT_SECURITY_DAC=y
1429CONFIG_DEFAULT_SECURITY=""
1430# CONFIG_CRYPTO is not set
1431# CONFIG_BINARY_PRINTF is not set
1432
1433#
1434# Library routines
1435#
1436CONFIG_BITREVERSE=y
1437CONFIG_GENERIC_FIND_LAST_BIT=y
1438# CONFIG_CRC_CCITT is not set
1439# CONFIG_CRC16 is not set
1440# CONFIG_CRC_T10DIF is not set
1441# CONFIG_CRC_ITU_T is not set
1442CONFIG_CRC32=y
1443# CONFIG_CRC7 is not set
1444# CONFIG_LIBCRC32C is not set
1445CONFIG_ZLIB_INFLATE=y
1446CONFIG_ZLIB_DEFLATE=y
1447CONFIG_LZO_DECOMPRESS=y
1448CONFIG_DECOMPRESS_GZIP=y
1449CONFIG_DECOMPRESS_BZIP2=y
1450CONFIG_DECOMPRESS_LZMA=y
1451CONFIG_DECOMPRESS_LZO=y
1452CONFIG_HAS_IOMEM=y
1453CONFIG_HAS_IOPORT=y
1454CONFIG_HAS_DMA=y
1455CONFIG_NLATTR=y
1456CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index e8ddec2cb158..a0162fa94564 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -24,7 +24,7 @@
24 * strex/ldrex monitor on some implementations. The reason we can use it for 24 * strex/ldrex monitor on some implementations. The reason we can use it for
25 * atomic_set() is the clrex or dummy strex done on every exception return. 25 * atomic_set() is the clrex or dummy strex done on every exception return.
26 */ 26 */
27#define atomic_read(v) ((v)->counter) 27#define atomic_read(v) (*(volatile int *)&(v)->counter)
28#define atomic_set(v,i) (((v)->counter) = (i)) 28#define atomic_set(v,i) (((v)->counter) = (i))
29 29
30#if __LINUX_ARM_ARCH__ >= 6 30#if __LINUX_ARM_ARCH__ >= 6
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 0d08d4170b64..4656a24058d2 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -371,6 +371,10 @@ static inline void __flush_icache_all(void)
371#ifdef CONFIG_ARM_ERRATA_411920 371#ifdef CONFIG_ARM_ERRATA_411920
372 extern void v6_icache_inval_all(void); 372 extern void v6_icache_inval_all(void);
373 v6_icache_inval_all(); 373 v6_icache_inval_all();
374#elif defined(CONFIG_SMP) && __LINUX_ARM_ARCH__ >= 7
375 asm("mcr p15, 0, %0, c7, c1, 0 @ invalidate I-cache inner shareable\n"
376 :
377 : "r" (0));
374#else 378#else
375 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" 379 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
376 : 380 :
diff --git a/arch/arm/include/asm/hardware/arm_timer.h b/arch/arm/include/asm/hardware/arm_timer.h
index 04be3bdf46b8..c0f4e7bf22de 100644
--- a/arch/arm/include/asm/hardware/arm_timer.h
+++ b/arch/arm/include/asm/hardware/arm_timer.h
@@ -1,21 +1,30 @@
1#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H 1#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H
2#define __ASM_ARM_HARDWARE_ARM_TIMER_H 2#define __ASM_ARM_HARDWARE_ARM_TIMER_H
3 3
4#define TIMER_LOAD 0x00 4/*
5#define TIMER_VALUE 0x04 5 * ARM timer implementation, found in Integrator, Versatile and Realview
6#define TIMER_CTRL 0x08 6 * platforms. Not all platforms support all registers and bits in these
7#define TIMER_CTRL_ONESHOT (1 << 0) 7 * registers, so we mark them with A for Integrator AP, C for Integrator
8#define TIMER_CTRL_32BIT (1 << 1) 8 * CP, V for Versatile and R for Realview.
9#define TIMER_CTRL_DIV1 (0 << 2) 9 *
10#define TIMER_CTRL_DIV16 (1 << 2) 10 * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
11#define TIMER_CTRL_DIV256 (2 << 2) 11 * can have 16-bit or 32-bit selectable via a bit in the control register.
12#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */ 12 */
13#define TIMER_CTRL_PERIODIC (1 << 6) 13#define TIMER_LOAD 0x00 /* ACVR rw */
14#define TIMER_CTRL_ENABLE (1 << 7) 14#define TIMER_VALUE 0x04 /* ACVR ro */
15#define TIMER_CTRL 0x08 /* ACVR rw */
16#define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */
17#define TIMER_CTRL_32BIT (1 << 1) /* CVR */
18#define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */
19#define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */
20#define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */
21#define TIMER_CTRL_IE (1 << 5) /* VR */
22#define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */
23#define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */
15 24
16#define TIMER_INTCLR 0x0c 25#define TIMER_INTCLR 0x0c /* ACVR wo */
17#define TIMER_RIS 0x10 26#define TIMER_RIS 0x10 /* CVR ro */
18#define TIMER_MIS 0x14 27#define TIMER_MIS 0x14 /* CVR ro */
19#define TIMER_BGLOAD 0x18 28#define TIMER_BGLOAD 0x18 /* CVR rw */
20 29
21#endif 30#endif
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index cdb9022716fd..6bcba48800fe 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -21,6 +21,9 @@
21#define __ASM_ARM_HARDWARE_L2X0_H 21#define __ASM_ARM_HARDWARE_L2X0_H
22 22
23#define L2X0_CACHE_ID 0x000 23#define L2X0_CACHE_ID 0x000
24#define L2X0_CACHE_ID_PART_MASK (0xf << 6)
25#define L2X0_CACHE_ID_PART_L210 (1 << 6)
26#define L2X0_CACHE_ID_PART_L310 (3 << 6)
24#define L2X0_CACHE_TYPE 0x004 27#define L2X0_CACHE_TYPE 0x004
25#define L2X0_CTRL 0x100 28#define L2X0_CTRL 0x100
26#define L2X0_AUX_CTRL 0x104 29#define L2X0_AUX_CTRL 0x104
diff --git a/arch/arm/include/asm/hardware/icst.h b/arch/arm/include/asm/hardware/icst.h
new file mode 100644
index 000000000000..10382a3dcec9
--- /dev/null
+++ b/arch/arm/include/asm/hardware/icst.h
@@ -0,0 +1,59 @@
1/*
2 * arch/arm/include/asm/hardware/icst.h
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICST
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 */
14#ifndef ASMARM_HARDWARE_ICST_H
15#define ASMARM_HARDWARE_ICST_H
16
17struct icst_params {
18 unsigned long ref;
19 unsigned long vco_max; /* inclusive */
20 unsigned long vco_min; /* exclusive */
21 unsigned short vd_min; /* inclusive */
22 unsigned short vd_max; /* inclusive */
23 unsigned char rd_min; /* inclusive */
24 unsigned char rd_max; /* inclusive */
25 const unsigned char *s2div; /* chip specific s2div array */
26 const unsigned char *idx2s; /* chip specific idx2s array */
27};
28
29struct icst_vco {
30 unsigned short v;
31 unsigned char r;
32 unsigned char s;
33};
34
35unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco);
36struct icst_vco icst_hz_to_vco(const struct icst_params *p, unsigned long freq);
37
38/*
39 * ICST307 VCO frequency must be between 6MHz and 200MHz (3.3 or 5V).
40 * This frequency is pre-output divider.
41 */
42#define ICST307_VCO_MIN 6000000
43#define ICST307_VCO_MAX 200000000
44
45extern const unsigned char icst307_s2div[];
46extern const unsigned char icst307_idx2s[];
47
48/*
49 * ICST525 VCO frequency must be between 10MHz and 200MHz (3V) or 320MHz (5V).
50 * This frequency is pre-output divider.
51 */
52#define ICST525_VCO_MIN 10000000
53#define ICST525_VCO_MAX_3V 200000000
54#define ICST525_VCO_MAX_5V 320000000
55
56extern const unsigned char icst525_s2div[];
57extern const unsigned char icst525_idx2s[];
58
59#endif
diff --git a/arch/arm/include/asm/hardware/icst307.h b/arch/arm/include/asm/hardware/icst307.h
deleted file mode 100644
index 554f128a1046..000000000000
--- a/arch/arm/include/asm/hardware/icst307.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/icst307.h
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICS307
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 *
14 * This file is similar to the icst525.h file
15 */
16#ifndef ASMARM_HARDWARE_ICST307_H
17#define ASMARM_HARDWARE_ICST307_H
18
19struct icst307_params {
20 unsigned long ref;
21 unsigned long vco_max; /* inclusive */
22 unsigned short vd_min; /* inclusive */
23 unsigned short vd_max; /* inclusive */
24 unsigned char rd_min; /* inclusive */
25 unsigned char rd_max; /* inclusive */
26};
27
28struct icst307_vco {
29 unsigned short v;
30 unsigned char r;
31 unsigned char s;
32};
33
34unsigned long icst307_khz(const struct icst307_params *p, struct icst307_vco vco);
35struct icst307_vco icst307_khz_to_vco(const struct icst307_params *p, unsigned long freq);
36struct icst307_vco icst307_ps_to_vco(const struct icst307_params *p, unsigned long period);
37
38#endif
diff --git a/arch/arm/include/asm/hardware/icst525.h b/arch/arm/include/asm/hardware/icst525.h
deleted file mode 100644
index 58f0dc43e2ed..000000000000
--- a/arch/arm/include/asm/hardware/icst525.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/icst525.h
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICST525
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 */
14#ifndef ASMARM_HARDWARE_ICST525_H
15#define ASMARM_HARDWARE_ICST525_H
16
17struct icst525_params {
18 unsigned long ref;
19 unsigned long vco_max; /* inclusive */
20 unsigned short vd_min; /* inclusive */
21 unsigned short vd_max; /* inclusive */
22 unsigned char rd_min; /* inclusive */
23 unsigned char rd_max; /* inclusive */
24};
25
26struct icst525_vco {
27 unsigned short v;
28 unsigned char r;
29 unsigned char s;
30};
31
32unsigned long icst525_khz(const struct icst525_params *p, struct icst525_vco vco);
33struct icst525_vco icst525_khz_to_vco(const struct icst525_params *p, unsigned long freq);
34struct icst525_vco icst525_ps_to_vco(const struct icst525_params *p, unsigned long period);
35
36#endif
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h
new file mode 100644
index 000000000000..575fa8186ca0
--- /dev/null
+++ b/arch/arm/include/asm/hardware/pl330.h
@@ -0,0 +1,217 @@
1/* linux/include/asm/hardware/pl330.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef __PL330_CORE_H
22#define __PL330_CORE_H
23
24#define PL330_MAX_CHAN 8
25#define PL330_MAX_IRQS 32
26#define PL330_MAX_PERI 32
27
28enum pl330_srccachectrl {
29 SCCTRL0 = 0, /* Noncacheable and nonbufferable */
30 SCCTRL1, /* Bufferable only */
31 SCCTRL2, /* Cacheable, but do not allocate */
32 SCCTRL3, /* Cacheable and bufferable, but do not allocate */
33 SINVALID1,
34 SINVALID2,
35 SCCTRL6, /* Cacheable write-through, allocate on reads only */
36 SCCTRL7, /* Cacheable write-back, allocate on reads only */
37};
38
39enum pl330_dstcachectrl {
40 DCCTRL0 = 0, /* Noncacheable and nonbufferable */
41 DCCTRL1, /* Bufferable only */
42 DCCTRL2, /* Cacheable, but do not allocate */
43 DCCTRL3, /* Cacheable and bufferable, but do not allocate */
44 DINVALID1 = 8,
45 DINVALID2,
46 DCCTRL6, /* Cacheable write-through, allocate on writes only */
47 DCCTRL7, /* Cacheable write-back, allocate on writes only */
48};
49
50/* Populated by the PL330 core driver for DMA API driver's info */
51struct pl330_config {
52 u32 periph_id;
53 u32 pcell_id;
54#define DMAC_MODE_NS (1 << 0)
55 unsigned int mode;
56 unsigned int data_bus_width:10; /* In number of bits */
57 unsigned int data_buf_dep:10;
58 unsigned int num_chan:4;
59 unsigned int num_peri:6;
60 u32 peri_ns;
61 unsigned int num_events:6;
62 u32 irq_ns;
63};
64
65/* Handle to the DMAC provided to the PL330 core */
66struct pl330_info {
67 /* Owning device */
68 struct device *dev;
69 /* Size of MicroCode buffers for each channel. */
70 unsigned mcbufsz;
71 /* ioremap'ed address of PL330 registers. */
72 void __iomem *base;
73 /* Client can freely use it. */
74 void *client_data;
75 /* PL330 core data, Client must not touch it. */
76 void *pl330_data;
77 /* Populated by the PL330 core driver during pl330_add */
78 struct pl330_config pcfg;
79 /*
80 * If the DMAC has some reset mechanism, then the
81 * client may want to provide pointer to the method.
82 */
83 void (*dmac_reset)(struct pl330_info *pi);
84};
85
86enum pl330_byteswap {
87 SWAP_NO = 0,
88 SWAP_2,
89 SWAP_4,
90 SWAP_8,
91 SWAP_16,
92};
93
94/**
95 * Request Configuration.
96 * The PL330 core does not modify this and uses the last
97 * working configuration if the request doesn't provide any.
98 *
99 * The Client may want to provide this info only for the
100 * first request and a request with new settings.
101 */
102struct pl330_reqcfg {
103 /* Address Incrementing */
104 unsigned dst_inc:1;
105 unsigned src_inc:1;
106
107 /*
108 * For now, the SRC & DST protection levels
109 * and burst size/length are assumed same.
110 */
111 bool nonsecure;
112 bool privileged;
113 bool insnaccess;
114 unsigned brst_len:5;
115 unsigned brst_size:3; /* in power of 2 */
116
117 enum pl330_dstcachectrl dcctl;
118 enum pl330_srccachectrl scctl;
119 enum pl330_byteswap swap;
120};
121
122/*
123 * One cycle of DMAC operation.
124 * There may be more than one xfer in a request.
125 */
126struct pl330_xfer {
127 u32 src_addr;
128 u32 dst_addr;
129 /* Size to xfer */
130 u32 bytes;
131 /*
132 * Pointer to next xfer in the list.
133 * The last xfer in the req must point to NULL.
134 */
135 struct pl330_xfer *next;
136};
137
138/* The xfer callbacks are made with one of these arguments. */
139enum pl330_op_err {
140 /* The all xfers in the request were success. */
141 PL330_ERR_NONE,
142 /* If req aborted due to global error. */
143 PL330_ERR_ABORT,
144 /* If req failed due to problem with Channel. */
145 PL330_ERR_FAIL,
146};
147
148enum pl330_reqtype {
149 MEMTOMEM,
150 MEMTODEV,
151 DEVTOMEM,
152 DEVTODEV,
153};
154
155/* A request defining Scatter-Gather List ending with NULL xfer. */
156struct pl330_req {
157 enum pl330_reqtype rqtype;
158 /* Index of peripheral for the xfer. */
159 unsigned peri:5;
160 /* Unique token for this xfer, set by the client. */
161 void *token;
162 /* Callback to be called after xfer. */
163 void (*xfer_cb)(void *token, enum pl330_op_err err);
164 /* If NULL, req will be done at last set parameters. */
165 struct pl330_reqcfg *cfg;
166 /* Pointer to first xfer in the request. */
167 struct pl330_xfer *x;
168};
169
170/*
171 * To know the status of the channel and DMAC, the client
172 * provides a pointer to this structure. The PL330 core
173 * fills it with current information.
174 */
175struct pl330_chanstatus {
176 /*
177 * If the DMAC engine halted due to some error,
178 * the client should remove-add DMAC.
179 */
180 bool dmac_halted;
181 /*
182 * If channel is halted due to some error,
183 * the client should ABORT/FLUSH and START the channel.
184 */
185 bool faulting;
186 /* Location of last load */
187 u32 src_addr;
188 /* Location of last store */
189 u32 dst_addr;
190 /*
191 * Pointer to the currently active req, NULL if channel is
192 * inactive, even though the requests may be present.
193 */
194 struct pl330_req *top_req;
195 /* Pointer to req waiting second in the queue if any. */
196 struct pl330_req *wait_req;
197};
198
199enum pl330_chan_op {
200 /* Start the channel */
201 PL330_OP_START,
202 /* Abort the active xfer */
203 PL330_OP_ABORT,
204 /* Stop xfer and flush queue */
205 PL330_OP_FLUSH,
206};
207
208extern int pl330_add(struct pl330_info *);
209extern void pl330_del(struct pl330_info *pi);
210extern int pl330_update(const struct pl330_info *pi);
211extern void pl330_release_channel(void *ch_id);
212extern void *pl330_request_channel(const struct pl330_info *pi);
213extern int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus);
214extern int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op);
215extern int pl330_submit_req(void *ch_id, struct pl330_req *r);
216
217#endif /* __PL330_CORE_H */
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
new file mode 100644
index 000000000000..a101f10bb5b1
--- /dev/null
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -0,0 +1,59 @@
1/*
2 * arch/arm/include/asm/hardware/sp810.h
3 *
4 * ARM PrimeXsys System Controller SP810 header file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __ASM_ARM_SP810_H
15#define __ASM_ARM_SP810_H
16
17#include <linux/io.h>
18
19/* sysctl registers offset */
20#define SCCTRL 0x000
21#define SCSYSSTAT 0x004
22#define SCIMCTRL 0x008
23#define SCIMSTAT 0x00C
24#define SCXTALCTRL 0x010
25#define SCPLLCTRL 0x014
26#define SCPLLFCTRL 0x018
27#define SCPERCTRL0 0x01C
28#define SCPERCTRL1 0x020
29#define SCPEREN 0x024
30#define SCPERDIS 0x028
31#define SCPERCLKEN 0x02C
32#define SCPERSTAT 0x030
33#define SCSYSID0 0xEE0
34#define SCSYSID1 0xEE4
35#define SCSYSID2 0xEE8
36#define SCSYSID3 0xEEC
37#define SCITCR 0xF00
38#define SCITIR0 0xF04
39#define SCITIR1 0xF08
40#define SCITOR 0xF0C
41#define SCCNTCTRL 0xF10
42#define SCCNTDATA 0xF14
43#define SCCNTSTEP 0xF18
44#define SCPERIPHID0 0xFE0
45#define SCPERIPHID1 0xFE4
46#define SCPERIPHID2 0xFE8
47#define SCPERIPHID3 0xFEC
48#define SCPCELLID0 0xFF0
49#define SCPCELLID1 0xFF4
50#define SCPCELLID2 0xFF8
51#define SCPCELLID3 0xFFC
52
53static inline void sysctl_soft_reset(void __iomem *base)
54{
55 /* writing any value to SCSYSSTAT reg will reset system */
56 writel(0, base + SCSYSSTAT);
57}
58
59#endif /* __ASM_ARM_SP810_H */
diff --git a/arch/arm/include/asm/ioctls.h b/arch/arm/include/asm/ioctls.h
index a91d8a1523cf..7f0b6d13296a 100644
--- a/arch/arm/include/asm/ioctls.h
+++ b/arch/arm/include/asm/ioctls.h
@@ -53,6 +53,9 @@
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55 55
56#define TIOCGRS485 0x542E
57#define TIOCSRS485 0x542F
58
56#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ 59#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
57#define FIOCLEX 0x5451 60#define FIOCLEX 0x5451
58#define FIOASYNC 0x5452 61#define FIOASYNC 0x5452
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index a38bdc7afa34..52f0da1e97df 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -8,10 +8,16 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#ifndef __ASM_MACH_PCI_H
12#define __ASM_MACH_PCI_H
13
11struct pci_sys_data; 14struct pci_sys_data;
12struct pci_bus; 15struct pci_bus;
13 16
14struct hw_pci { 17struct hw_pci {
18#ifdef CONFIG_PCI_DOMAINS
19 int domain;
20#endif
15 struct list_head buses; 21 struct list_head buses;
16 int nr_controllers; 22 int nr_controllers;
17 int (*setup)(int nr, struct pci_sys_data *); 23 int (*setup)(int nr, struct pci_sys_data *);
@@ -26,6 +32,9 @@ struct hw_pci {
26 * Per-controller structure 32 * Per-controller structure
27 */ 33 */
28struct pci_sys_data { 34struct pci_sys_data {
35#ifdef CONFIG_PCI_DOMAINS
36 int domain;
37#endif
29 struct list_head node; 38 struct list_head node;
30 int busnr; /* primary bus number */ 39 int busnr; /* primary bus number */
31 u64 mem_offset; /* bus->cpu memory mapping offset */ 40 u64 mem_offset; /* bus->cpu memory mapping offset */
@@ -70,3 +79,5 @@ extern int pci_v3_setup(int nr, struct pci_sys_data *);
70extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *); 79extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *);
71extern void pci_v3_preinit(void); 80extern void pci_v3_preinit(void);
72extern void pci_v3_postinit(void); 81extern void pci_v3_postinit(void);
82
83#endif /* __ASM_MACH_PCI_H */
diff --git a/arch/arm/include/asm/mach/time.h b/arch/arm/include/asm/mach/time.h
index 8bffc3ff3acf..35d408f6dccf 100644
--- a/arch/arm/include/asm/mach/time.h
+++ b/arch/arm/include/asm/mach/time.h
@@ -38,7 +38,7 @@ struct sys_timer {
38 void (*init)(void); 38 void (*init)(void);
39 void (*suspend)(void); 39 void (*suspend)(void);
40 void (*resume)(void); 40 void (*resume)(void);
41#ifndef CONFIG_GENERIC_TIME 41#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
42 unsigned long (*offset)(void); 42 unsigned long (*offset)(void);
43#endif 43#endif
44}; 44};
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 47980118d0a5..92e2a833693d 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -4,8 +4,23 @@
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5#include <asm-generic/pci-dma-compat.h> 5#include <asm-generic/pci-dma-compat.h>
6 6
7#include <asm/mach/pci.h> /* for pci_sys_data */
7#include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 8#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
8 9
10#ifdef CONFIG_PCI_DOMAINS
11static inline int pci_domain_nr(struct pci_bus *bus)
12{
13 struct pci_sys_data *root = bus->sysdata;
14
15 return root->domain;
16}
17
18static inline int pci_proc_domain(struct pci_bus *bus)
19{
20 return pci_domain_nr(bus);
21}
22#endif /* CONFIG_PCI_DOMAINS */
23
9#ifdef CONFIG_PCI_HOST_ITE8152 24#ifdef CONFIG_PCI_HOST_ITE8152
10/* ITE bridge requires setting latency timer to avoid early bus access 25/* ITE bridge requires setting latency timer to avoid early bus access
11 termination by PIC bus mater devices 26 termination by PIC bus mater devices
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 49e3049aba32..48837e6d8887 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -28,4 +28,21 @@ set_perf_event_pending(void)
28 * same indexes here for consistency. */ 28 * same indexes here for consistency. */
29#define PERF_EVENT_INDEX_OFFSET 1 29#define PERF_EVENT_INDEX_OFFSET 1
30 30
31/* ARM perf PMU IDs for use by internal perf clients. */
32enum arm_perf_pmu_ids {
33 ARM_PERF_PMU_ID_XSCALE1 = 0,
34 ARM_PERF_PMU_ID_XSCALE2,
35 ARM_PERF_PMU_ID_V6,
36 ARM_PERF_PMU_ID_V6MP,
37 ARM_PERF_PMU_ID_CA8,
38 ARM_PERF_PMU_ID_CA9,
39 ARM_NUM_PMU_IDS,
40};
41
42extern enum arm_perf_pmu_ids
43armpmu_get_pmu_id(void);
44
45extern int
46armpmu_get_max_events(void);
47
31#endif /* __ARM_PERF_EVENT_H__ */ 48#endif /* __ARM_PERF_EVENT_H__ */
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 11397687f42c..ab68cf1ef80f 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -314,7 +314,7 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
314 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED) 314 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
315#define pgprot_writecombine(prot) \ 315#define pgprot_writecombine(prot) \
316 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE) 316 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
317#if __LINUX_ARM_ARCH__ >= 7 317#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
318#define pgprot_dmacoherent(prot) \ 318#define pgprot_dmacoherent(prot) \
319 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE) 319 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE)
320#else 320#else
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 2829b9f981a1..8ccea012722c 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -12,33 +12,33 @@
12#ifndef __ARM_PMU_H__ 12#ifndef __ARM_PMU_H__
13#define __ARM_PMU_H__ 13#define __ARM_PMU_H__
14 14
15#ifdef CONFIG_CPU_HAS_PMU 15enum arm_pmu_type {
16 16 ARM_PMU_DEVICE_CPU = 0,
17struct pmu_irqs { 17 ARM_NUM_PMU_DEVICES,
18 const int *irqs;
19 int num_irqs;
20}; 18};
21 19
20#ifdef CONFIG_CPU_HAS_PMU
21
22/** 22/**
23 * reserve_pmu() - reserve the hardware performance counters 23 * reserve_pmu() - reserve the hardware performance counters
24 * 24 *
25 * Reserve the hardware performance counters in the system for exclusive use. 25 * Reserve the hardware performance counters in the system for exclusive use.
26 * The 'struct pmu_irqs' for the system is returned on success, ERR_PTR() 26 * The platform_device for the system is returned on success, ERR_PTR()
27 * encoded error on failure. 27 * encoded error on failure.
28 */ 28 */
29extern const struct pmu_irqs * 29extern struct platform_device *
30reserve_pmu(void); 30reserve_pmu(enum arm_pmu_type device);
31 31
32/** 32/**
33 * release_pmu() - Relinquish control of the performance counters 33 * release_pmu() - Relinquish control of the performance counters
34 * 34 *
35 * Release the performance counters and allow someone else to use them. 35 * Release the performance counters and allow someone else to use them.
36 * Callers must have disabled the counters and released IRQs before calling 36 * Callers must have disabled the counters and released IRQs before calling
37 * this. The 'struct pmu_irqs' returned from reserve_pmu() must be passed as 37 * this. The platform_device returned from reserve_pmu() must be passed as
38 * a cookie. 38 * a cookie.
39 */ 39 */
40extern int 40extern int
41release_pmu(const struct pmu_irqs *irqs); 41release_pmu(struct platform_device *pdev);
42 42
43/** 43/**
44 * init_pmu() - Initialise the PMU. 44 * init_pmu() - Initialise the PMU.
@@ -48,24 +48,26 @@ release_pmu(const struct pmu_irqs *irqs);
48 * the actual hardware initialisation. 48 * the actual hardware initialisation.
49 */ 49 */
50extern int 50extern int
51init_pmu(void); 51init_pmu(enum arm_pmu_type device);
52 52
53#else /* CONFIG_CPU_HAS_PMU */ 53#else /* CONFIG_CPU_HAS_PMU */
54 54
55static inline const struct pmu_irqs * 55#include <linux/err.h>
56reserve_pmu(void) 56
57static inline struct platform_device *
58reserve_pmu(enum arm_pmu_type device)
57{ 59{
58 return ERR_PTR(-ENODEV); 60 return ERR_PTR(-ENODEV);
59} 61}
60 62
61static inline int 63static inline int
62release_pmu(const struct pmu_irqs *irqs) 64release_pmu(struct platform_device *pdev)
63{ 65{
64 return -ENODEV; 66 return -ENODEV;
65} 67}
66 68
67static inline int 69static inline int
68init_pmu(void) 70init_pmu(enum arm_pmu_type device)
69{ 71{
70 return -ENODEV; 72 return -ENODEV;
71} 73}
diff --git a/arch/arm/include/asm/scatterlist.h b/arch/arm/include/asm/scatterlist.h
index ca0a37d03400..bcda59f39941 100644
--- a/arch/arm/include/asm/scatterlist.h
+++ b/arch/arm/include/asm/scatterlist.h
@@ -4,24 +4,8 @@
4#include <asm/memory.h> 4#include <asm/memory.h>
5#include <asm/types.h> 5#include <asm/types.h>
6 6
7struct scatterlist { 7#include <asm-generic/scatterlist.h>
8#ifdef CONFIG_DEBUG_SG
9 unsigned long sg_magic;
10#endif
11 unsigned long page_link;
12 unsigned int offset; /* buffer offset */
13 dma_addr_t dma_address; /* dma address */
14 unsigned int length; /* length */
15};
16 8
17/* 9#undef ARCH_HAS_SG_CHAIN
18 * These macros should be used after a pci_map_sg call has been done
19 * to get bus addresses of each of the SG entries and their lengths.
20 * You should only work with the number of sg entries pci_map_sg
21 * returns, or alternatively stop on the first sg_dma_len(sg) which
22 * is 0.
23 */
24#define sg_dma_address(sg) ((sg)->dma_address)
25#define sg_dma_len(sg) ((sg)->length)
26 10
27#endif /* _ASMARM_SCATTERLIST_H */ 11#endif /* _ASMARM_SCATTERLIST_H */
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index e0d763be1846..3d05190797cb 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -82,7 +82,7 @@ struct secondary_data {
82extern struct secondary_data secondary_data; 82extern struct secondary_data secondary_data;
83 83
84extern int __cpu_disable(void); 84extern int __cpu_disable(void);
85extern int mach_cpu_disable(unsigned int cpu); 85extern int platform_cpu_disable(unsigned int cpu);
86 86
87extern void __cpu_die(unsigned int cpu); 87extern void __cpu_die(unsigned int cpu);
88extern void cpu_die(void); 88extern void cpu_die(void);
diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h
index 7be0978b2625..634f357be6bb 100644
--- a/arch/arm/include/asm/smp_twd.h
+++ b/arch/arm/include/asm/smp_twd.h
@@ -1,6 +1,23 @@
1#ifndef __ASMARM_SMP_TWD_H 1#ifndef __ASMARM_SMP_TWD_H
2#define __ASMARM_SMP_TWD_H 2#define __ASMARM_SMP_TWD_H
3 3
4#define TWD_TIMER_LOAD 0x00
5#define TWD_TIMER_COUNTER 0x04
6#define TWD_TIMER_CONTROL 0x08
7#define TWD_TIMER_INTSTAT 0x0C
8
9#define TWD_WDOG_LOAD 0x20
10#define TWD_WDOG_COUNTER 0x24
11#define TWD_WDOG_CONTROL 0x28
12#define TWD_WDOG_INTSTAT 0x2C
13#define TWD_WDOG_RESETSTAT 0x30
14#define TWD_WDOG_DISABLE 0x34
15
16#define TWD_TIMER_CONTROL_ENABLE (1 << 0)
17#define TWD_TIMER_CONTROL_ONESHOT (0 << 1)
18#define TWD_TIMER_CONTROL_PERIODIC (1 << 1)
19#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2)
20
4struct clock_event_device; 21struct clock_event_device;
5 22
6extern void __iomem *twd_base; 23extern void __iomem *twd_base;
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 4ace45ec3ef8..5f4f48002734 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -141,7 +141,7 @@ extern unsigned int user_debug;
141 141
142#ifdef CONFIG_ARCH_HAS_BARRIERS 142#ifdef CONFIG_ARCH_HAS_BARRIERS
143#include <mach/barriers.h> 143#include <mach/barriers.h>
144#elif __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP) 144#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
145#define mb() do { dsb(); outer_sync(); } while (0) 145#define mb() do { dsb(); outer_sync(); } while (0)
146#define rmb() dmb() 146#define rmb() dmb()
147#define wmb() mb() 147#define wmb() mb()
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index e085e2c545eb..bd863d8608cd 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -46,6 +46,9 @@
46#define TLB_V7_UIS_FULL (1 << 20) 46#define TLB_V7_UIS_FULL (1 << 20)
47#define TLB_V7_UIS_ASID (1 << 21) 47#define TLB_V7_UIS_ASID (1 << 21)
48 48
49/* Inner Shareable BTB operation (ARMv7 MP extensions) */
50#define TLB_V7_IS_BTB (1 << 22)
51
49#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */ 52#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */
50#define TLB_DCLEAN (1 << 30) 53#define TLB_DCLEAN (1 << 30)
51#define TLB_WB (1 << 31) 54#define TLB_WB (1 << 31)
@@ -183,7 +186,7 @@
183#endif 186#endif
184 187
185#ifdef CONFIG_SMP 188#ifdef CONFIG_SMP
186#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \ 189#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \
187 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID) 190 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)
188#else 191#else
189#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \ 192#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
@@ -339,6 +342,12 @@ static inline void local_flush_tlb_all(void)
339 dsb(); 342 dsb();
340 isb(); 343 isb();
341 } 344 }
345 if (tlb_flag(TLB_V7_IS_BTB)) {
346 /* flush the branch target cache */
347 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
348 dsb();
349 isb();
350 }
342} 351}
343 352
344static inline void local_flush_tlb_mm(struct mm_struct *mm) 353static inline void local_flush_tlb_mm(struct mm_struct *mm)
@@ -376,6 +385,12 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
376 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc"); 385 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
377 dsb(); 386 dsb();
378 } 387 }
388 if (tlb_flag(TLB_V7_IS_BTB)) {
389 /* flush the branch target cache */
390 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
391 dsb();
392 isb();
393 }
379} 394}
380 395
381static inline void 396static inline void
@@ -416,6 +431,12 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
416 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc"); 431 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
417 dsb(); 432 dsb();
418 } 433 }
434 if (tlb_flag(TLB_V7_IS_BTB)) {
435 /* flush the branch target cache */
436 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
437 dsb();
438 isb();
439 }
419} 440}
420 441
421static inline void local_flush_tlb_kernel_page(unsigned long kaddr) 442static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
@@ -454,6 +475,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
454 dsb(); 475 dsb();
455 isb(); 476 isb();
456 } 477 }
478 if (tlb_flag(TLB_V7_IS_BTB)) {
479 /* flush the branch target cache */
480 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
481 dsb();
482 isb();
483 }
457} 484}
458 485
459/* 486/*
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index bd397e0b663e..c6273a3bfc25 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -527,6 +527,9 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
527 if (!sys) 527 if (!sys)
528 panic("PCI: unable to allocate sys data!"); 528 panic("PCI: unable to allocate sys data!");
529 529
530#ifdef CONFIG_PCI_DOMAINS
531 sys->domain = hw->domain;
532#endif
530 sys->hw = hw; 533 sys->hw = hw;
531 sys->busnr = busnr; 534 sys->busnr = busnr;
532 sys->swizzle = hw->swizzle; 535 sys->swizzle = hw->swizzle;
diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c
index 7d5b9fb01e71..2c4a185f92cd 100644
--- a/arch/arm/kernel/dma.c
+++ b/arch/arm/kernel/dma.c
@@ -16,6 +16,8 @@
16#include <linux/spinlock.h> 16#include <linux/spinlock.h>
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/scatterlist.h> 18#include <linux/scatterlist.h>
19#include <linux/seq_file.h>
20#include <linux/proc_fs.h>
19 21
20#include <asm/dma.h> 22#include <asm/dma.h>
21 23
@@ -264,3 +266,37 @@ int get_dma_residue(unsigned int chan)
264 return ret; 266 return ret;
265} 267}
266EXPORT_SYMBOL(get_dma_residue); 268EXPORT_SYMBOL(get_dma_residue);
269
270#ifdef CONFIG_PROC_FS
271static int proc_dma_show(struct seq_file *m, void *v)
272{
273 int i;
274
275 for (i = 0 ; i < MAX_DMA_CHANNELS ; i++) {
276 dma_t *dma = dma_channel(i);
277 if (dma && dma->lock)
278 seq_printf(m, "%2d: %s\n", i, dma->device_id);
279 }
280 return 0;
281}
282
283static int proc_dma_open(struct inode *inode, struct file *file)
284{
285 return single_open(file, proc_dma_show, NULL);
286}
287
288static const struct file_operations proc_dma_operations = {
289 .open = proc_dma_open,
290 .read = seq_read,
291 .llseek = seq_lseek,
292 .release = single_release,
293};
294
295static int __init proc_dma_init(void)
296{
297 proc_create("dma", 0, NULL, &proc_dma_operations);
298 return 0;
299}
300
301__initcall(proc_dma_init);
302#endif
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 9e70f2053f9a..c45768614c8a 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -16,7 +16,9 @@
16 16
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/module.h>
19#include <linux/perf_event.h> 20#include <linux/perf_event.h>
21#include <linux/platform_device.h>
20#include <linux/spinlock.h> 22#include <linux/spinlock.h>
21#include <linux/uaccess.h> 23#include <linux/uaccess.h>
22 24
@@ -26,7 +28,7 @@
26#include <asm/pmu.h> 28#include <asm/pmu.h>
27#include <asm/stacktrace.h> 29#include <asm/stacktrace.h>
28 30
29static const struct pmu_irqs *pmu_irqs; 31static struct platform_device *pmu_device;
30 32
31/* 33/*
32 * Hardware lock to serialize accesses to PMU registers. Needed for the 34 * Hardware lock to serialize accesses to PMU registers. Needed for the
@@ -67,8 +69,18 @@ struct cpu_hw_events {
67}; 69};
68DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); 70DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
69 71
72/* PMU names. */
73static const char *arm_pmu_names[] = {
74 [ARM_PERF_PMU_ID_XSCALE1] = "xscale1",
75 [ARM_PERF_PMU_ID_XSCALE2] = "xscale2",
76 [ARM_PERF_PMU_ID_V6] = "v6",
77 [ARM_PERF_PMU_ID_V6MP] = "v6mpcore",
78 [ARM_PERF_PMU_ID_CA8] = "ARMv7 Cortex-A8",
79 [ARM_PERF_PMU_ID_CA9] = "ARMv7 Cortex-A9",
80};
81
70struct arm_pmu { 82struct arm_pmu {
71 char *name; 83 enum arm_perf_pmu_ids id;
72 irqreturn_t (*handle_irq)(int irq_num, void *dev); 84 irqreturn_t (*handle_irq)(int irq_num, void *dev);
73 void (*enable)(struct hw_perf_event *evt, int idx); 85 void (*enable)(struct hw_perf_event *evt, int idx);
74 void (*disable)(struct hw_perf_event *evt, int idx); 86 void (*disable)(struct hw_perf_event *evt, int idx);
@@ -87,6 +99,30 @@ struct arm_pmu {
87/* Set at runtime when we know what CPU type we are. */ 99/* Set at runtime when we know what CPU type we are. */
88static const struct arm_pmu *armpmu; 100static const struct arm_pmu *armpmu;
89 101
102enum arm_perf_pmu_ids
103armpmu_get_pmu_id(void)
104{
105 int id = -ENODEV;
106
107 if (armpmu != NULL)
108 id = armpmu->id;
109
110 return id;
111}
112EXPORT_SYMBOL_GPL(armpmu_get_pmu_id);
113
114int
115armpmu_get_max_events(void)
116{
117 int max_events = 0;
118
119 if (armpmu != NULL)
120 max_events = armpmu->num_events;
121
122 return max_events;
123}
124EXPORT_SYMBOL_GPL(armpmu_get_max_events);
125
90#define HW_OP_UNSUPPORTED 0xFFFF 126#define HW_OP_UNSUPPORTED 0xFFFF
91 127
92#define C(_x) \ 128#define C(_x) \
@@ -314,38 +350,44 @@ validate_group(struct perf_event *event)
314static int 350static int
315armpmu_reserve_hardware(void) 351armpmu_reserve_hardware(void)
316{ 352{
317 int i; 353 int i, err = -ENODEV, irq;
318 int err;
319 354
320 pmu_irqs = reserve_pmu(); 355 pmu_device = reserve_pmu(ARM_PMU_DEVICE_CPU);
321 if (IS_ERR(pmu_irqs)) { 356 if (IS_ERR(pmu_device)) {
322 pr_warning("unable to reserve pmu\n"); 357 pr_warning("unable to reserve pmu\n");
323 return PTR_ERR(pmu_irqs); 358 return PTR_ERR(pmu_device);
324 } 359 }
325 360
326 init_pmu(); 361 init_pmu(ARM_PMU_DEVICE_CPU);
327 362
328 if (pmu_irqs->num_irqs < 1) { 363 if (pmu_device->num_resources < 1) {
329 pr_err("no irqs for PMUs defined\n"); 364 pr_err("no irqs for PMUs defined\n");
330 return -ENODEV; 365 return -ENODEV;
331 } 366 }
332 367
333 for (i = 0; i < pmu_irqs->num_irqs; ++i) { 368 for (i = 0; i < pmu_device->num_resources; ++i) {
334 err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq, 369 irq = platform_get_irq(pmu_device, i);
370 if (irq < 0)
371 continue;
372
373 err = request_irq(irq, armpmu->handle_irq,
335 IRQF_DISABLED | IRQF_NOBALANCING, 374 IRQF_DISABLED | IRQF_NOBALANCING,
336 "armpmu", NULL); 375 "armpmu", NULL);
337 if (err) { 376 if (err) {
338 pr_warning("unable to request IRQ%d for ARM " 377 pr_warning("unable to request IRQ%d for ARM perf "
339 "perf counters\n", pmu_irqs->irqs[i]); 378 "counters\n", irq);
340 break; 379 break;
341 } 380 }
342 } 381 }
343 382
344 if (err) { 383 if (err) {
345 for (i = i - 1; i >= 0; --i) 384 for (i = i - 1; i >= 0; --i) {
346 free_irq(pmu_irqs->irqs[i], NULL); 385 irq = platform_get_irq(pmu_device, i);
347 release_pmu(pmu_irqs); 386 if (irq >= 0)
348 pmu_irqs = NULL; 387 free_irq(irq, NULL);
388 }
389 release_pmu(pmu_device);
390 pmu_device = NULL;
349 } 391 }
350 392
351 return err; 393 return err;
@@ -354,14 +396,17 @@ armpmu_reserve_hardware(void)
354static void 396static void
355armpmu_release_hardware(void) 397armpmu_release_hardware(void)
356{ 398{
357 int i; 399 int i, irq;
358 400
359 for (i = pmu_irqs->num_irqs - 1; i >= 0; --i) 401 for (i = pmu_device->num_resources - 1; i >= 0; --i) {
360 free_irq(pmu_irqs->irqs[i], NULL); 402 irq = platform_get_irq(pmu_device, i);
403 if (irq >= 0)
404 free_irq(irq, NULL);
405 }
361 armpmu->stop(); 406 armpmu->stop();
362 407
363 release_pmu(pmu_irqs); 408 release_pmu(pmu_device);
364 pmu_irqs = NULL; 409 pmu_device = NULL;
365} 410}
366 411
367static atomic_t active_events = ATOMIC_INIT(0); 412static atomic_t active_events = ATOMIC_INIT(0);
@@ -1144,7 +1189,7 @@ armv6mpcore_pmu_disable_event(struct hw_perf_event *hwc,
1144} 1189}
1145 1190
1146static const struct arm_pmu armv6pmu = { 1191static const struct arm_pmu armv6pmu = {
1147 .name = "v6", 1192 .id = ARM_PERF_PMU_ID_V6,
1148 .handle_irq = armv6pmu_handle_irq, 1193 .handle_irq = armv6pmu_handle_irq,
1149 .enable = armv6pmu_enable_event, 1194 .enable = armv6pmu_enable_event,
1150 .disable = armv6pmu_disable_event, 1195 .disable = armv6pmu_disable_event,
@@ -1167,7 +1212,7 @@ static const struct arm_pmu armv6pmu = {
1167 * reset the period and enable the interrupt reporting. 1212 * reset the period and enable the interrupt reporting.
1168 */ 1213 */
1169static const struct arm_pmu armv6mpcore_pmu = { 1214static const struct arm_pmu armv6mpcore_pmu = {
1170 .name = "v6mpcore", 1215 .id = ARM_PERF_PMU_ID_V6MP,
1171 .handle_irq = armv6pmu_handle_irq, 1216 .handle_irq = armv6pmu_handle_irq,
1172 .enable = armv6pmu_enable_event, 1217 .enable = armv6pmu_enable_event,
1173 .disable = armv6mpcore_pmu_disable_event, 1218 .disable = armv6mpcore_pmu_disable_event,
@@ -1197,10 +1242,6 @@ static const struct arm_pmu armv6mpcore_pmu = {
1197 * counter and all 4 performance counters together can be reset separately. 1242 * counter and all 4 performance counters together can be reset separately.
1198 */ 1243 */
1199 1244
1200#define ARMV7_PMU_CORTEX_A8_NAME "ARMv7 Cortex-A8"
1201
1202#define ARMV7_PMU_CORTEX_A9_NAME "ARMv7 Cortex-A9"
1203
1204/* Common ARMv7 event types */ 1245/* Common ARMv7 event types */
1205enum armv7_perf_types { 1246enum armv7_perf_types {
1206 ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, 1247 ARMV7_PERFCTR_PMNC_SW_INCR = 0x00,
@@ -2079,6 +2120,803 @@ static u32 __init armv7_reset_read_pmnc(void)
2079 return nb_cnt + 1; 2120 return nb_cnt + 1;
2080} 2121}
2081 2122
2123/*
2124 * ARMv5 [xscale] Performance counter handling code.
2125 *
2126 * Based on xscale OProfile code.
2127 *
2128 * There are two variants of the xscale PMU that we support:
2129 * - xscale1pmu: 2 event counters and a cycle counter
2130 * - xscale2pmu: 4 event counters and a cycle counter
2131 * The two variants share event definitions, but have different
2132 * PMU structures.
2133 */
2134
2135enum xscale_perf_types {
2136 XSCALE_PERFCTR_ICACHE_MISS = 0x00,
2137 XSCALE_PERFCTR_ICACHE_NO_DELIVER = 0x01,
2138 XSCALE_PERFCTR_DATA_STALL = 0x02,
2139 XSCALE_PERFCTR_ITLB_MISS = 0x03,
2140 XSCALE_PERFCTR_DTLB_MISS = 0x04,
2141 XSCALE_PERFCTR_BRANCH = 0x05,
2142 XSCALE_PERFCTR_BRANCH_MISS = 0x06,
2143 XSCALE_PERFCTR_INSTRUCTION = 0x07,
2144 XSCALE_PERFCTR_DCACHE_FULL_STALL = 0x08,
2145 XSCALE_PERFCTR_DCACHE_FULL_STALL_CONTIG = 0x09,
2146 XSCALE_PERFCTR_DCACHE_ACCESS = 0x0A,
2147 XSCALE_PERFCTR_DCACHE_MISS = 0x0B,
2148 XSCALE_PERFCTR_DCACHE_WRITE_BACK = 0x0C,
2149 XSCALE_PERFCTR_PC_CHANGED = 0x0D,
2150 XSCALE_PERFCTR_BCU_REQUEST = 0x10,
2151 XSCALE_PERFCTR_BCU_FULL = 0x11,
2152 XSCALE_PERFCTR_BCU_DRAIN = 0x12,
2153 XSCALE_PERFCTR_BCU_ECC_NO_ELOG = 0x14,
2154 XSCALE_PERFCTR_BCU_1_BIT_ERR = 0x15,
2155 XSCALE_PERFCTR_RMW = 0x16,
2156 /* XSCALE_PERFCTR_CCNT is not hardware defined */
2157 XSCALE_PERFCTR_CCNT = 0xFE,
2158 XSCALE_PERFCTR_UNUSED = 0xFF,
2159};
2160
2161enum xscale_counters {
2162 XSCALE_CYCLE_COUNTER = 1,
2163 XSCALE_COUNTER0,
2164 XSCALE_COUNTER1,
2165 XSCALE_COUNTER2,
2166 XSCALE_COUNTER3,
2167};
2168
2169static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = {
2170 [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT,
2171 [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION,
2172 [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED,
2173 [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED,
2174 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH,
2175 [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS,
2176 [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED,
2177};
2178
2179static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
2180 [PERF_COUNT_HW_CACHE_OP_MAX]
2181 [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
2182 [C(L1D)] = {
2183 [C(OP_READ)] = {
2184 [C(RESULT_ACCESS)] = XSCALE_PERFCTR_DCACHE_ACCESS,
2185 [C(RESULT_MISS)] = XSCALE_PERFCTR_DCACHE_MISS,
2186 },
2187 [C(OP_WRITE)] = {
2188 [C(RESULT_ACCESS)] = XSCALE_PERFCTR_DCACHE_ACCESS,
2189 [C(RESULT_MISS)] = XSCALE_PERFCTR_DCACHE_MISS,
2190 },
2191 [C(OP_PREFETCH)] = {
2192 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2193 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2194 },
2195 },
2196 [C(L1I)] = {
2197 [C(OP_READ)] = {
2198 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2199 [C(RESULT_MISS)] = XSCALE_PERFCTR_ICACHE_MISS,
2200 },
2201 [C(OP_WRITE)] = {
2202 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2203 [C(RESULT_MISS)] = XSCALE_PERFCTR_ICACHE_MISS,
2204 },
2205 [C(OP_PREFETCH)] = {
2206 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2207 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2208 },
2209 },
2210 [C(LL)] = {
2211 [C(OP_READ)] = {
2212 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2213 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2214 },
2215 [C(OP_WRITE)] = {
2216 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2217 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2218 },
2219 [C(OP_PREFETCH)] = {
2220 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2221 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2222 },
2223 },
2224 [C(DTLB)] = {
2225 [C(OP_READ)] = {
2226 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2227 [C(RESULT_MISS)] = XSCALE_PERFCTR_DTLB_MISS,
2228 },
2229 [C(OP_WRITE)] = {
2230 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2231 [C(RESULT_MISS)] = XSCALE_PERFCTR_DTLB_MISS,
2232 },
2233 [C(OP_PREFETCH)] = {
2234 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2235 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2236 },
2237 },
2238 [C(ITLB)] = {
2239 [C(OP_READ)] = {
2240 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2241 [C(RESULT_MISS)] = XSCALE_PERFCTR_ITLB_MISS,
2242 },
2243 [C(OP_WRITE)] = {
2244 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2245 [C(RESULT_MISS)] = XSCALE_PERFCTR_ITLB_MISS,
2246 },
2247 [C(OP_PREFETCH)] = {
2248 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2249 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2250 },
2251 },
2252 [C(BPU)] = {
2253 [C(OP_READ)] = {
2254 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2255 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2256 },
2257 [C(OP_WRITE)] = {
2258 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2259 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2260 },
2261 [C(OP_PREFETCH)] = {
2262 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
2263 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
2264 },
2265 },
2266};
2267
2268#define XSCALE_PMU_ENABLE 0x001
2269#define XSCALE_PMN_RESET 0x002
2270#define XSCALE_CCNT_RESET 0x004
2271#define XSCALE_PMU_RESET (CCNT_RESET | PMN_RESET)
2272#define XSCALE_PMU_CNT64 0x008
2273
2274static inline int
2275xscalepmu_event_map(int config)
2276{
2277 int mapping = xscale_perf_map[config];
2278 if (HW_OP_UNSUPPORTED == mapping)
2279 mapping = -EOPNOTSUPP;
2280 return mapping;
2281}
2282
2283static u64
2284xscalepmu_raw_event(u64 config)
2285{
2286 return config & 0xff;
2287}
2288
2289#define XSCALE1_OVERFLOWED_MASK 0x700
2290#define XSCALE1_CCOUNT_OVERFLOW 0x400
2291#define XSCALE1_COUNT0_OVERFLOW 0x100
2292#define XSCALE1_COUNT1_OVERFLOW 0x200
2293#define XSCALE1_CCOUNT_INT_EN 0x040
2294#define XSCALE1_COUNT0_INT_EN 0x010
2295#define XSCALE1_COUNT1_INT_EN 0x020
2296#define XSCALE1_COUNT0_EVT_SHFT 12
2297#define XSCALE1_COUNT0_EVT_MASK (0xff << XSCALE1_COUNT0_EVT_SHFT)
2298#define XSCALE1_COUNT1_EVT_SHFT 20
2299#define XSCALE1_COUNT1_EVT_MASK (0xff << XSCALE1_COUNT1_EVT_SHFT)
2300
2301static inline u32
2302xscale1pmu_read_pmnc(void)
2303{
2304 u32 val;
2305 asm volatile("mrc p14, 0, %0, c0, c0, 0" : "=r" (val));
2306 return val;
2307}
2308
2309static inline void
2310xscale1pmu_write_pmnc(u32 val)
2311{
2312 /* upper 4bits and 7, 11 are write-as-0 */
2313 val &= 0xffff77f;
2314 asm volatile("mcr p14, 0, %0, c0, c0, 0" : : "r" (val));
2315}
2316
2317static inline int
2318xscale1_pmnc_counter_has_overflowed(unsigned long pmnc,
2319 enum xscale_counters counter)
2320{
2321 int ret = 0;
2322
2323 switch (counter) {
2324 case XSCALE_CYCLE_COUNTER:
2325 ret = pmnc & XSCALE1_CCOUNT_OVERFLOW;
2326 break;
2327 case XSCALE_COUNTER0:
2328 ret = pmnc & XSCALE1_COUNT0_OVERFLOW;
2329 break;
2330 case XSCALE_COUNTER1:
2331 ret = pmnc & XSCALE1_COUNT1_OVERFLOW;
2332 break;
2333 default:
2334 WARN_ONCE(1, "invalid counter number (%d)\n", counter);
2335 }
2336
2337 return ret;
2338}
2339
2340static irqreturn_t
2341xscale1pmu_handle_irq(int irq_num, void *dev)
2342{
2343 unsigned long pmnc;
2344 struct perf_sample_data data;
2345 struct cpu_hw_events *cpuc;
2346 struct pt_regs *regs;
2347 int idx;
2348
2349 /*
2350 * NOTE: there's an A stepping erratum that states if an overflow
2351 * bit already exists and another occurs, the previous
2352 * Overflow bit gets cleared. There's no workaround.
2353 * Fixed in B stepping or later.
2354 */
2355 pmnc = xscale1pmu_read_pmnc();
2356
2357 /*
2358 * Write the value back to clear the overflow flags. Overflow
2359 * flags remain in pmnc for use below. We also disable the PMU
2360 * while we process the interrupt.
2361 */
2362 xscale1pmu_write_pmnc(pmnc & ~XSCALE_PMU_ENABLE);
2363
2364 if (!(pmnc & XSCALE1_OVERFLOWED_MASK))
2365 return IRQ_NONE;
2366
2367 regs = get_irq_regs();
2368
2369 perf_sample_data_init(&data, 0);
2370
2371 cpuc = &__get_cpu_var(cpu_hw_events);
2372 for (idx = 0; idx <= armpmu->num_events; ++idx) {
2373 struct perf_event *event = cpuc->events[idx];
2374 struct hw_perf_event *hwc;
2375
2376 if (!test_bit(idx, cpuc->active_mask))
2377 continue;
2378
2379 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
2380 continue;
2381
2382 hwc = &event->hw;
2383 armpmu_event_update(event, hwc, idx);
2384 data.period = event->hw.last_period;
2385 if (!armpmu_event_set_period(event, hwc, idx))
2386 continue;
2387
2388 if (perf_event_overflow(event, 0, &data, regs))
2389 armpmu->disable(hwc, idx);
2390 }
2391
2392 perf_event_do_pending();
2393
2394 /*
2395 * Re-enable the PMU.
2396 */
2397 pmnc = xscale1pmu_read_pmnc() | XSCALE_PMU_ENABLE;
2398 xscale1pmu_write_pmnc(pmnc);
2399
2400 return IRQ_HANDLED;
2401}
2402
2403static void
2404xscale1pmu_enable_event(struct hw_perf_event *hwc, int idx)
2405{
2406 unsigned long val, mask, evt, flags;
2407
2408 switch (idx) {
2409 case XSCALE_CYCLE_COUNTER:
2410 mask = 0;
2411 evt = XSCALE1_CCOUNT_INT_EN;
2412 break;
2413 case XSCALE_COUNTER0:
2414 mask = XSCALE1_COUNT0_EVT_MASK;
2415 evt = (hwc->config_base << XSCALE1_COUNT0_EVT_SHFT) |
2416 XSCALE1_COUNT0_INT_EN;
2417 break;
2418 case XSCALE_COUNTER1:
2419 mask = XSCALE1_COUNT1_EVT_MASK;
2420 evt = (hwc->config_base << XSCALE1_COUNT1_EVT_SHFT) |
2421 XSCALE1_COUNT1_INT_EN;
2422 break;
2423 default:
2424 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
2425 return;
2426 }
2427
2428 spin_lock_irqsave(&pmu_lock, flags);
2429 val = xscale1pmu_read_pmnc();
2430 val &= ~mask;
2431 val |= evt;
2432 xscale1pmu_write_pmnc(val);
2433 spin_unlock_irqrestore(&pmu_lock, flags);
2434}
2435
2436static void
2437xscale1pmu_disable_event(struct hw_perf_event *hwc, int idx)
2438{
2439 unsigned long val, mask, evt, flags;
2440
2441 switch (idx) {
2442 case XSCALE_CYCLE_COUNTER:
2443 mask = XSCALE1_CCOUNT_INT_EN;
2444 evt = 0;
2445 break;
2446 case XSCALE_COUNTER0:
2447 mask = XSCALE1_COUNT0_INT_EN | XSCALE1_COUNT0_EVT_MASK;
2448 evt = XSCALE_PERFCTR_UNUSED << XSCALE1_COUNT0_EVT_SHFT;
2449 break;
2450 case XSCALE_COUNTER1:
2451 mask = XSCALE1_COUNT1_INT_EN | XSCALE1_COUNT1_EVT_MASK;
2452 evt = XSCALE_PERFCTR_UNUSED << XSCALE1_COUNT1_EVT_SHFT;
2453 break;
2454 default:
2455 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
2456 return;
2457 }
2458
2459 spin_lock_irqsave(&pmu_lock, flags);
2460 val = xscale1pmu_read_pmnc();
2461 val &= ~mask;
2462 val |= evt;
2463 xscale1pmu_write_pmnc(val);
2464 spin_unlock_irqrestore(&pmu_lock, flags);
2465}
2466
2467static int
2468xscale1pmu_get_event_idx(struct cpu_hw_events *cpuc,
2469 struct hw_perf_event *event)
2470{
2471 if (XSCALE_PERFCTR_CCNT == event->config_base) {
2472 if (test_and_set_bit(XSCALE_CYCLE_COUNTER, cpuc->used_mask))
2473 return -EAGAIN;
2474
2475 return XSCALE_CYCLE_COUNTER;
2476 } else {
2477 if (!test_and_set_bit(XSCALE_COUNTER1, cpuc->used_mask)) {
2478 return XSCALE_COUNTER1;
2479 }
2480
2481 if (!test_and_set_bit(XSCALE_COUNTER0, cpuc->used_mask)) {
2482 return XSCALE_COUNTER0;
2483 }
2484
2485 return -EAGAIN;
2486 }
2487}
2488
2489static void
2490xscale1pmu_start(void)
2491{
2492 unsigned long flags, val;
2493
2494 spin_lock_irqsave(&pmu_lock, flags);
2495 val = xscale1pmu_read_pmnc();
2496 val |= XSCALE_PMU_ENABLE;
2497 xscale1pmu_write_pmnc(val);
2498 spin_unlock_irqrestore(&pmu_lock, flags);
2499}
2500
2501static void
2502xscale1pmu_stop(void)
2503{
2504 unsigned long flags, val;
2505
2506 spin_lock_irqsave(&pmu_lock, flags);
2507 val = xscale1pmu_read_pmnc();
2508 val &= ~XSCALE_PMU_ENABLE;
2509 xscale1pmu_write_pmnc(val);
2510 spin_unlock_irqrestore(&pmu_lock, flags);
2511}
2512
2513static inline u32
2514xscale1pmu_read_counter(int counter)
2515{
2516 u32 val = 0;
2517
2518 switch (counter) {
2519 case XSCALE_CYCLE_COUNTER:
2520 asm volatile("mrc p14, 0, %0, c1, c0, 0" : "=r" (val));
2521 break;
2522 case XSCALE_COUNTER0:
2523 asm volatile("mrc p14, 0, %0, c2, c0, 0" : "=r" (val));
2524 break;
2525 case XSCALE_COUNTER1:
2526 asm volatile("mrc p14, 0, %0, c3, c0, 0" : "=r" (val));
2527 break;
2528 }
2529
2530 return val;
2531}
2532
2533static inline void
2534xscale1pmu_write_counter(int counter, u32 val)
2535{
2536 switch (counter) {
2537 case XSCALE_CYCLE_COUNTER:
2538 asm volatile("mcr p14, 0, %0, c1, c0, 0" : : "r" (val));
2539 break;
2540 case XSCALE_COUNTER0:
2541 asm volatile("mcr p14, 0, %0, c2, c0, 0" : : "r" (val));
2542 break;
2543 case XSCALE_COUNTER1:
2544 asm volatile("mcr p14, 0, %0, c3, c0, 0" : : "r" (val));
2545 break;
2546 }
2547}
2548
2549static const struct arm_pmu xscale1pmu = {
2550 .id = ARM_PERF_PMU_ID_XSCALE1,
2551 .handle_irq = xscale1pmu_handle_irq,
2552 .enable = xscale1pmu_enable_event,
2553 .disable = xscale1pmu_disable_event,
2554 .event_map = xscalepmu_event_map,
2555 .raw_event = xscalepmu_raw_event,
2556 .read_counter = xscale1pmu_read_counter,
2557 .write_counter = xscale1pmu_write_counter,
2558 .get_event_idx = xscale1pmu_get_event_idx,
2559 .start = xscale1pmu_start,
2560 .stop = xscale1pmu_stop,
2561 .num_events = 3,
2562 .max_period = (1LLU << 32) - 1,
2563};
2564
2565#define XSCALE2_OVERFLOWED_MASK 0x01f
2566#define XSCALE2_CCOUNT_OVERFLOW 0x001
2567#define XSCALE2_COUNT0_OVERFLOW 0x002
2568#define XSCALE2_COUNT1_OVERFLOW 0x004
2569#define XSCALE2_COUNT2_OVERFLOW 0x008
2570#define XSCALE2_COUNT3_OVERFLOW 0x010
2571#define XSCALE2_CCOUNT_INT_EN 0x001
2572#define XSCALE2_COUNT0_INT_EN 0x002
2573#define XSCALE2_COUNT1_INT_EN 0x004
2574#define XSCALE2_COUNT2_INT_EN 0x008
2575#define XSCALE2_COUNT3_INT_EN 0x010
2576#define XSCALE2_COUNT0_EVT_SHFT 0
2577#define XSCALE2_COUNT0_EVT_MASK (0xff << XSCALE2_COUNT0_EVT_SHFT)
2578#define XSCALE2_COUNT1_EVT_SHFT 8
2579#define XSCALE2_COUNT1_EVT_MASK (0xff << XSCALE2_COUNT1_EVT_SHFT)
2580#define XSCALE2_COUNT2_EVT_SHFT 16
2581#define XSCALE2_COUNT2_EVT_MASK (0xff << XSCALE2_COUNT2_EVT_SHFT)
2582#define XSCALE2_COUNT3_EVT_SHFT 24
2583#define XSCALE2_COUNT3_EVT_MASK (0xff << XSCALE2_COUNT3_EVT_SHFT)
2584
2585static inline u32
2586xscale2pmu_read_pmnc(void)
2587{
2588 u32 val;
2589 asm volatile("mrc p14, 0, %0, c0, c1, 0" : "=r" (val));
2590 /* bits 1-2 and 4-23 are read-unpredictable */
2591 return val & 0xff000009;
2592}
2593
2594static inline void
2595xscale2pmu_write_pmnc(u32 val)
2596{
2597 /* bits 4-23 are write-as-0, 24-31 are write ignored */
2598 val &= 0xf;
2599 asm volatile("mcr p14, 0, %0, c0, c1, 0" : : "r" (val));
2600}
2601
2602static inline u32
2603xscale2pmu_read_overflow_flags(void)
2604{
2605 u32 val;
2606 asm volatile("mrc p14, 0, %0, c5, c1, 0" : "=r" (val));
2607 return val;
2608}
2609
2610static inline void
2611xscale2pmu_write_overflow_flags(u32 val)
2612{
2613 asm volatile("mcr p14, 0, %0, c5, c1, 0" : : "r" (val));
2614}
2615
2616static inline u32
2617xscale2pmu_read_event_select(void)
2618{
2619 u32 val;
2620 asm volatile("mrc p14, 0, %0, c8, c1, 0" : "=r" (val));
2621 return val;
2622}
2623
2624static inline void
2625xscale2pmu_write_event_select(u32 val)
2626{
2627 asm volatile("mcr p14, 0, %0, c8, c1, 0" : : "r"(val));
2628}
2629
2630static inline u32
2631xscale2pmu_read_int_enable(void)
2632{
2633 u32 val;
2634 asm volatile("mrc p14, 0, %0, c4, c1, 0" : "=r" (val));
2635 return val;
2636}
2637
2638static void
2639xscale2pmu_write_int_enable(u32 val)
2640{
2641 asm volatile("mcr p14, 0, %0, c4, c1, 0" : : "r" (val));
2642}
2643
2644static inline int
2645xscale2_pmnc_counter_has_overflowed(unsigned long of_flags,
2646 enum xscale_counters counter)
2647{
2648 int ret = 0;
2649
2650 switch (counter) {
2651 case XSCALE_CYCLE_COUNTER:
2652 ret = of_flags & XSCALE2_CCOUNT_OVERFLOW;
2653 break;
2654 case XSCALE_COUNTER0:
2655 ret = of_flags & XSCALE2_COUNT0_OVERFLOW;
2656 break;
2657 case XSCALE_COUNTER1:
2658 ret = of_flags & XSCALE2_COUNT1_OVERFLOW;
2659 break;
2660 case XSCALE_COUNTER2:
2661 ret = of_flags & XSCALE2_COUNT2_OVERFLOW;
2662 break;
2663 case XSCALE_COUNTER3:
2664 ret = of_flags & XSCALE2_COUNT3_OVERFLOW;
2665 break;
2666 default:
2667 WARN_ONCE(1, "invalid counter number (%d)\n", counter);
2668 }
2669
2670 return ret;
2671}
2672
2673static irqreturn_t
2674xscale2pmu_handle_irq(int irq_num, void *dev)
2675{
2676 unsigned long pmnc, of_flags;
2677 struct perf_sample_data data;
2678 struct cpu_hw_events *cpuc;
2679 struct pt_regs *regs;
2680 int idx;
2681
2682 /* Disable the PMU. */
2683 pmnc = xscale2pmu_read_pmnc();
2684 xscale2pmu_write_pmnc(pmnc & ~XSCALE_PMU_ENABLE);
2685
2686 /* Check the overflow flag register. */
2687 of_flags = xscale2pmu_read_overflow_flags();
2688 if (!(of_flags & XSCALE2_OVERFLOWED_MASK))
2689 return IRQ_NONE;
2690
2691 /* Clear the overflow bits. */
2692 xscale2pmu_write_overflow_flags(of_flags);
2693
2694 regs = get_irq_regs();
2695
2696 perf_sample_data_init(&data, 0);
2697
2698 cpuc = &__get_cpu_var(cpu_hw_events);
2699 for (idx = 0; idx <= armpmu->num_events; ++idx) {
2700 struct perf_event *event = cpuc->events[idx];
2701 struct hw_perf_event *hwc;
2702
2703 if (!test_bit(idx, cpuc->active_mask))
2704 continue;
2705
2706 if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx))
2707 continue;
2708
2709 hwc = &event->hw;
2710 armpmu_event_update(event, hwc, idx);
2711 data.period = event->hw.last_period;
2712 if (!armpmu_event_set_period(event, hwc, idx))
2713 continue;
2714
2715 if (perf_event_overflow(event, 0, &data, regs))
2716 armpmu->disable(hwc, idx);
2717 }
2718
2719 perf_event_do_pending();
2720
2721 /*
2722 * Re-enable the PMU.
2723 */
2724 pmnc = xscale2pmu_read_pmnc() | XSCALE_PMU_ENABLE;
2725 xscale2pmu_write_pmnc(pmnc);
2726
2727 return IRQ_HANDLED;
2728}
2729
2730static void
2731xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
2732{
2733 unsigned long flags, ien, evtsel;
2734
2735 ien = xscale2pmu_read_int_enable();
2736 evtsel = xscale2pmu_read_event_select();
2737
2738 switch (idx) {
2739 case XSCALE_CYCLE_COUNTER:
2740 ien |= XSCALE2_CCOUNT_INT_EN;
2741 break;
2742 case XSCALE_COUNTER0:
2743 ien |= XSCALE2_COUNT0_INT_EN;
2744 evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
2745 evtsel |= hwc->config_base << XSCALE2_COUNT0_EVT_SHFT;
2746 break;
2747 case XSCALE_COUNTER1:
2748 ien |= XSCALE2_COUNT1_INT_EN;
2749 evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
2750 evtsel |= hwc->config_base << XSCALE2_COUNT1_EVT_SHFT;
2751 break;
2752 case XSCALE_COUNTER2:
2753 ien |= XSCALE2_COUNT2_INT_EN;
2754 evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
2755 evtsel |= hwc->config_base << XSCALE2_COUNT2_EVT_SHFT;
2756 break;
2757 case XSCALE_COUNTER3:
2758 ien |= XSCALE2_COUNT3_INT_EN;
2759 evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
2760 evtsel |= hwc->config_base << XSCALE2_COUNT3_EVT_SHFT;
2761 break;
2762 default:
2763 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
2764 return;
2765 }
2766
2767 spin_lock_irqsave(&pmu_lock, flags);
2768 xscale2pmu_write_event_select(evtsel);
2769 xscale2pmu_write_int_enable(ien);
2770 spin_unlock_irqrestore(&pmu_lock, flags);
2771}
2772
2773static void
2774xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
2775{
2776 unsigned long flags, ien, evtsel;
2777
2778 ien = xscale2pmu_read_int_enable();
2779 evtsel = xscale2pmu_read_event_select();
2780
2781 switch (idx) {
2782 case XSCALE_CYCLE_COUNTER:
2783 ien &= ~XSCALE2_CCOUNT_INT_EN;
2784 break;
2785 case XSCALE_COUNTER0:
2786 ien &= ~XSCALE2_COUNT0_INT_EN;
2787 evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
2788 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
2789 break;
2790 case XSCALE_COUNTER1:
2791 ien &= ~XSCALE2_COUNT1_INT_EN;
2792 evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
2793 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
2794 break;
2795 case XSCALE_COUNTER2:
2796 ien &= ~XSCALE2_COUNT2_INT_EN;
2797 evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
2798 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
2799 break;
2800 case XSCALE_COUNTER3:
2801 ien &= ~XSCALE2_COUNT3_INT_EN;
2802 evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
2803 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
2804 break;
2805 default:
2806 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
2807 return;
2808 }
2809
2810 spin_lock_irqsave(&pmu_lock, flags);
2811 xscale2pmu_write_event_select(evtsel);
2812 xscale2pmu_write_int_enable(ien);
2813 spin_unlock_irqrestore(&pmu_lock, flags);
2814}
2815
2816static int
2817xscale2pmu_get_event_idx(struct cpu_hw_events *cpuc,
2818 struct hw_perf_event *event)
2819{
2820 int idx = xscale1pmu_get_event_idx(cpuc, event);
2821 if (idx >= 0)
2822 goto out;
2823
2824 if (!test_and_set_bit(XSCALE_COUNTER3, cpuc->used_mask))
2825 idx = XSCALE_COUNTER3;
2826 else if (!test_and_set_bit(XSCALE_COUNTER2, cpuc->used_mask))
2827 idx = XSCALE_COUNTER2;
2828out:
2829 return idx;
2830}
2831
2832static void
2833xscale2pmu_start(void)
2834{
2835 unsigned long flags, val;
2836
2837 spin_lock_irqsave(&pmu_lock, flags);
2838 val = xscale2pmu_read_pmnc() & ~XSCALE_PMU_CNT64;
2839 val |= XSCALE_PMU_ENABLE;
2840 xscale2pmu_write_pmnc(val);
2841 spin_unlock_irqrestore(&pmu_lock, flags);
2842}
2843
2844static void
2845xscale2pmu_stop(void)
2846{
2847 unsigned long flags, val;
2848
2849 spin_lock_irqsave(&pmu_lock, flags);
2850 val = xscale2pmu_read_pmnc();
2851 val &= ~XSCALE_PMU_ENABLE;
2852 xscale2pmu_write_pmnc(val);
2853 spin_unlock_irqrestore(&pmu_lock, flags);
2854}
2855
2856static inline u32
2857xscale2pmu_read_counter(int counter)
2858{
2859 u32 val = 0;
2860
2861 switch (counter) {
2862 case XSCALE_CYCLE_COUNTER:
2863 asm volatile("mrc p14, 0, %0, c1, c1, 0" : "=r" (val));
2864 break;
2865 case XSCALE_COUNTER0:
2866 asm volatile("mrc p14, 0, %0, c0, c2, 0" : "=r" (val));
2867 break;
2868 case XSCALE_COUNTER1:
2869 asm volatile("mrc p14, 0, %0, c1, c2, 0" : "=r" (val));
2870 break;
2871 case XSCALE_COUNTER2:
2872 asm volatile("mrc p14, 0, %0, c2, c2, 0" : "=r" (val));
2873 break;
2874 case XSCALE_COUNTER3:
2875 asm volatile("mrc p14, 0, %0, c3, c2, 0" : "=r" (val));
2876 break;
2877 }
2878
2879 return val;
2880}
2881
2882static inline void
2883xscale2pmu_write_counter(int counter, u32 val)
2884{
2885 switch (counter) {
2886 case XSCALE_CYCLE_COUNTER:
2887 asm volatile("mcr p14, 0, %0, c1, c1, 0" : : "r" (val));
2888 break;
2889 case XSCALE_COUNTER0:
2890 asm volatile("mcr p14, 0, %0, c0, c2, 0" : : "r" (val));
2891 break;
2892 case XSCALE_COUNTER1:
2893 asm volatile("mcr p14, 0, %0, c1, c2, 0" : : "r" (val));
2894 break;
2895 case XSCALE_COUNTER2:
2896 asm volatile("mcr p14, 0, %0, c2, c2, 0" : : "r" (val));
2897 break;
2898 case XSCALE_COUNTER3:
2899 asm volatile("mcr p14, 0, %0, c3, c2, 0" : : "r" (val));
2900 break;
2901 }
2902}
2903
2904static const struct arm_pmu xscale2pmu = {
2905 .id = ARM_PERF_PMU_ID_XSCALE2,
2906 .handle_irq = xscale2pmu_handle_irq,
2907 .enable = xscale2pmu_enable_event,
2908 .disable = xscale2pmu_disable_event,
2909 .event_map = xscalepmu_event_map,
2910 .raw_event = xscalepmu_raw_event,
2911 .read_counter = xscale2pmu_read_counter,
2912 .write_counter = xscale2pmu_write_counter,
2913 .get_event_idx = xscale2pmu_get_event_idx,
2914 .start = xscale2pmu_start,
2915 .stop = xscale2pmu_stop,
2916 .num_events = 5,
2917 .max_period = (1LLU << 32) - 1,
2918};
2919
2082static int __init 2920static int __init
2083init_hw_perf_events(void) 2921init_hw_perf_events(void)
2084{ 2922{
@@ -2086,7 +2924,7 @@ init_hw_perf_events(void)
2086 unsigned long implementor = (cpuid & 0xFF000000) >> 24; 2924 unsigned long implementor = (cpuid & 0xFF000000) >> 24;
2087 unsigned long part_number = (cpuid & 0xFFF0); 2925 unsigned long part_number = (cpuid & 0xFFF0);
2088 2926
2089 /* We only support ARM CPUs implemented by ARM at the moment. */ 2927 /* ARM Ltd CPUs. */
2090 if (0x41 == implementor) { 2928 if (0x41 == implementor) {
2091 switch (part_number) { 2929 switch (part_number) {
2092 case 0xB360: /* ARM1136 */ 2930 case 0xB360: /* ARM1136 */
@@ -2105,7 +2943,7 @@ init_hw_perf_events(void)
2105 perf_max_events = armv6mpcore_pmu.num_events; 2943 perf_max_events = armv6mpcore_pmu.num_events;
2106 break; 2944 break;
2107 case 0xC080: /* Cortex-A8 */ 2945 case 0xC080: /* Cortex-A8 */
2108 armv7pmu.name = ARMV7_PMU_CORTEX_A8_NAME; 2946 armv7pmu.id = ARM_PERF_PMU_ID_CA8;
2109 memcpy(armpmu_perf_cache_map, armv7_a8_perf_cache_map, 2947 memcpy(armpmu_perf_cache_map, armv7_a8_perf_cache_map,
2110 sizeof(armv7_a8_perf_cache_map)); 2948 sizeof(armv7_a8_perf_cache_map));
2111 armv7pmu.event_map = armv7_a8_pmu_event_map; 2949 armv7pmu.event_map = armv7_a8_pmu_event_map;
@@ -2117,7 +2955,7 @@ init_hw_perf_events(void)
2117 perf_max_events = armv7pmu.num_events; 2955 perf_max_events = armv7pmu.num_events;
2118 break; 2956 break;
2119 case 0xC090: /* Cortex-A9 */ 2957 case 0xC090: /* Cortex-A9 */
2120 armv7pmu.name = ARMV7_PMU_CORTEX_A9_NAME; 2958 armv7pmu.id = ARM_PERF_PMU_ID_CA9;
2121 memcpy(armpmu_perf_cache_map, armv7_a9_perf_cache_map, 2959 memcpy(armpmu_perf_cache_map, armv7_a9_perf_cache_map,
2122 sizeof(armv7_a9_perf_cache_map)); 2960 sizeof(armv7_a9_perf_cache_map));
2123 armv7pmu.event_map = armv7_a9_pmu_event_map; 2961 armv7pmu.event_map = armv7_a9_pmu_event_map;
@@ -2128,15 +2966,33 @@ init_hw_perf_events(void)
2128 armv7pmu.num_events = armv7_reset_read_pmnc(); 2966 armv7pmu.num_events = armv7_reset_read_pmnc();
2129 perf_max_events = armv7pmu.num_events; 2967 perf_max_events = armv7pmu.num_events;
2130 break; 2968 break;
2131 default: 2969 }
2132 pr_info("no hardware support available\n"); 2970 /* Intel CPUs [xscale]. */
2133 perf_max_events = -1; 2971 } else if (0x69 == implementor) {
2972 part_number = (cpuid >> 13) & 0x7;
2973 switch (part_number) {
2974 case 1:
2975 armpmu = &xscale1pmu;
2976 memcpy(armpmu_perf_cache_map, xscale_perf_cache_map,
2977 sizeof(xscale_perf_cache_map));
2978 perf_max_events = xscale1pmu.num_events;
2979 break;
2980 case 2:
2981 armpmu = &xscale2pmu;
2982 memcpy(armpmu_perf_cache_map, xscale_perf_cache_map,
2983 sizeof(xscale_perf_cache_map));
2984 perf_max_events = xscale2pmu.num_events;
2985 break;
2134 } 2986 }
2135 } 2987 }
2136 2988
2137 if (armpmu) 2989 if (armpmu) {
2138 pr_info("enabled with %s PMU driver, %d counters available\n", 2990 pr_info("enabled with %s PMU driver, %d counters available\n",
2139 armpmu->name, armpmu->num_events); 2991 arm_pmu_names[armpmu->id], armpmu->num_events);
2992 } else {
2993 pr_info("no hardware support available\n");
2994 perf_max_events = -1;
2995 }
2140 2996
2141 return 0; 2997 return 0;
2142} 2998}
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index a124312e343f..b8af96ea62e6 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -2,6 +2,7 @@
2 * linux/arch/arm/kernel/pmu.c 2 * linux/arch/arm/kernel/pmu.c
3 * 3 *
4 * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles 4 * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
5 * Copyright (C) 2010 ARM Ltd, Will Deacon
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -9,65 +10,78 @@
9 * 10 *
10 */ 11 */
11 12
13#define pr_fmt(fmt) "PMU: " fmt
14
12#include <linux/cpumask.h> 15#include <linux/cpumask.h>
13#include <linux/err.h> 16#include <linux/err.h>
14#include <linux/interrupt.h> 17#include <linux/interrupt.h>
15#include <linux/kernel.h> 18#include <linux/kernel.h>
16#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/platform_device.h>
17 21
18#include <asm/pmu.h> 22#include <asm/pmu.h>
19 23
20/* 24static volatile long pmu_lock;
21 * Define the IRQs for the system. We could use something like a platform 25
22 * device but that seems fairly heavyweight for this. Also, the performance 26static struct platform_device *pmu_devices[ARM_NUM_PMU_DEVICES];
23 * counters can't be removed or hotplugged. 27
24 * 28static int __devinit pmu_device_probe(struct platform_device *pdev)
25 * Ordering is important: init_pmu() will use the ordering to set the affinity 29{
26 * to the corresponding core. e.g. the first interrupt will go to cpu 0, the 30
27 * second goes to cpu 1 etc. 31 if (pdev->id < 0 || pdev->id >= ARM_NUM_PMU_DEVICES) {
28 */ 32 pr_warning("received registration request for unknown "
29static const int irqs[] = { 33 "device %d\n", pdev->id);
30#if defined(CONFIG_ARCH_OMAP2) 34 return -EINVAL;
31 3, 35 }
32#elif defined(CONFIG_ARCH_BCMRING) 36
33 IRQ_PMUIRQ, 37 if (pmu_devices[pdev->id])
34#elif defined(CONFIG_MACH_REALVIEW_EB) 38 pr_warning("registering new PMU device type %d overwrites "
35 IRQ_EB11MP_PMU_CPU0, 39 "previous registration!\n", pdev->id);
36 IRQ_EB11MP_PMU_CPU1, 40 else
37 IRQ_EB11MP_PMU_CPU2, 41 pr_info("registered new PMU device of type %d\n",
38 IRQ_EB11MP_PMU_CPU3, 42 pdev->id);
39#elif defined(CONFIG_ARCH_OMAP3)
40 INT_34XX_BENCH_MPU_EMUL,
41#elif defined(CONFIG_ARCH_IOP32X)
42 IRQ_IOP32X_CORE_PMU,
43#elif defined(CONFIG_ARCH_IOP33X)
44 IRQ_IOP33X_CORE_PMU,
45#elif defined(CONFIG_ARCH_PXA)
46 IRQ_PMU,
47#endif
48};
49 43
50static const struct pmu_irqs pmu_irqs = { 44 pmu_devices[pdev->id] = pdev;
51 .irqs = irqs, 45 return 0;
52 .num_irqs = ARRAY_SIZE(irqs), 46}
47
48static struct platform_driver pmu_driver = {
49 .driver = {
50 .name = "arm-pmu",
51 },
52 .probe = pmu_device_probe,
53}; 53};
54 54
55static volatile long pmu_lock; 55static int __init register_pmu_driver(void)
56{
57 return platform_driver_register(&pmu_driver);
58}
59device_initcall(register_pmu_driver);
56 60
57const struct pmu_irqs * 61struct platform_device *
58reserve_pmu(void) 62reserve_pmu(enum arm_pmu_type device)
59{ 63{
60 return test_and_set_bit_lock(0, &pmu_lock) ? ERR_PTR(-EBUSY) : 64 struct platform_device *pdev;
61 &pmu_irqs; 65
66 if (test_and_set_bit_lock(device, &pmu_lock)) {
67 pdev = ERR_PTR(-EBUSY);
68 } else if (pmu_devices[device] == NULL) {
69 clear_bit_unlock(device, &pmu_lock);
70 pdev = ERR_PTR(-ENODEV);
71 } else {
72 pdev = pmu_devices[device];
73 }
74
75 return pdev;
62} 76}
63EXPORT_SYMBOL_GPL(reserve_pmu); 77EXPORT_SYMBOL_GPL(reserve_pmu);
64 78
65int 79int
66release_pmu(const struct pmu_irqs *irqs) 80release_pmu(struct platform_device *pdev)
67{ 81{
68 if (WARN_ON(irqs != &pmu_irqs)) 82 if (WARN_ON(pdev != pmu_devices[pdev->id]))
69 return -EINVAL; 83 return -EINVAL;
70 clear_bit_unlock(0, &pmu_lock); 84 clear_bit_unlock(pdev->id, &pmu_lock);
71 return 0; 85 return 0;
72} 86}
73EXPORT_SYMBOL_GPL(release_pmu); 87EXPORT_SYMBOL_GPL(release_pmu);
@@ -87,17 +101,42 @@ set_irq_affinity(int irq,
87#endif 101#endif
88} 102}
89 103
90int 104static int
91init_pmu(void) 105init_cpu_pmu(void)
92{ 106{
93 int i, err = 0; 107 int i, err = 0;
108 struct platform_device *pdev = pmu_devices[ARM_PMU_DEVICE_CPU];
109
110 if (!pdev) {
111 err = -ENODEV;
112 goto out;
113 }
94 114
95 for (i = 0; i < pmu_irqs.num_irqs; ++i) { 115 for (i = 0; i < pdev->num_resources; ++i) {
96 err = set_irq_affinity(pmu_irqs.irqs[i], i); 116 err = set_irq_affinity(platform_get_irq(pdev, i), i);
97 if (err) 117 if (err)
98 break; 118 break;
99 } 119 }
100 120
121out:
122 return err;
123}
124
125int
126init_pmu(enum arm_pmu_type device)
127{
128 int err = 0;
129
130 switch (device) {
131 case ARM_PMU_DEVICE_CPU:
132 err = init_cpu_pmu();
133 break;
134 default:
135 pr_warning("attempt to initialise unknown device %d\n",
136 device);
137 err = -EINVAL;
138 }
139
101 return err; 140 return err;
102} 141}
103EXPORT_SYMBOL_GPL(init_pmu); 142EXPORT_SYMBOL_GPL(init_pmu);
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index a01194e583ff..b8c3d0f689d9 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -168,7 +168,7 @@ int __cpu_disable(void)
168 struct task_struct *p; 168 struct task_struct *p;
169 int ret; 169 int ret;
170 170
171 ret = mach_cpu_disable(cpu); 171 ret = platform_cpu_disable(cpu);
172 if (ret) 172 if (ret)
173 return ret; 173 return ret;
174 174
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index ea02a7b1c244..7c5f0c024db7 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -21,23 +21,6 @@
21#include <asm/smp_twd.h> 21#include <asm/smp_twd.h>
22#include <asm/hardware/gic.h> 22#include <asm/hardware/gic.h>
23 23
24#define TWD_TIMER_LOAD 0x00
25#define TWD_TIMER_COUNTER 0x04
26#define TWD_TIMER_CONTROL 0x08
27#define TWD_TIMER_INTSTAT 0x0C
28
29#define TWD_WDOG_LOAD 0x20
30#define TWD_WDOG_COUNTER 0x24
31#define TWD_WDOG_CONTROL 0x28
32#define TWD_WDOG_INTSTAT 0x2C
33#define TWD_WDOG_RESETSTAT 0x30
34#define TWD_WDOG_DISABLE 0x34
35
36#define TWD_TIMER_CONTROL_ENABLE (1 << 0)
37#define TWD_TIMER_CONTROL_ONESHOT (0 << 1)
38#define TWD_TIMER_CONTROL_PERIODIC (1 << 1)
39#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2)
40
41/* set up by the platform code */ 24/* set up by the platform code */
42void __iomem *twd_base; 25void __iomem *twd_base;
43 26
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 28753805d2d1..38c261f9951c 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -72,12 +72,15 @@ unsigned long profile_pc(struct pt_regs *regs)
72EXPORT_SYMBOL(profile_pc); 72EXPORT_SYMBOL(profile_pc);
73#endif 73#endif
74 74
75#ifndef CONFIG_GENERIC_TIME 75#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
76static unsigned long dummy_gettimeoffset(void) 76u32 arch_gettimeoffset(void)
77{ 77{
78 if (system_timer->offset != NULL)
79 return system_timer->offset() * 1000;
80
78 return 0; 81 return 0;
79} 82}
80#endif 83#endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */
81 84
82#ifdef CONFIG_LEDS_TIMER 85#ifdef CONFIG_LEDS_TIMER
83static inline void do_leds(void) 86static inline void do_leds(void)
@@ -93,63 +96,6 @@ static inline void do_leds(void)
93#define do_leds() 96#define do_leds()
94#endif 97#endif
95 98
96#ifndef CONFIG_GENERIC_TIME
97void do_gettimeofday(struct timeval *tv)
98{
99 unsigned long flags;
100 unsigned long seq;
101 unsigned long usec, sec;
102
103 do {
104 seq = read_seqbegin_irqsave(&xtime_lock, flags);
105 usec = system_timer->offset();
106 sec = xtime.tv_sec;
107 usec += xtime.tv_nsec / 1000;
108 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
109
110 /* usec may have gone up a lot: be safe */
111 while (usec >= 1000000) {
112 usec -= 1000000;
113 sec++;
114 }
115
116 tv->tv_sec = sec;
117 tv->tv_usec = usec;
118}
119
120EXPORT_SYMBOL(do_gettimeofday);
121
122int do_settimeofday(struct timespec *tv)
123{
124 time_t wtm_sec, sec = tv->tv_sec;
125 long wtm_nsec, nsec = tv->tv_nsec;
126
127 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
128 return -EINVAL;
129
130 write_seqlock_irq(&xtime_lock);
131 /*
132 * This is revolting. We need to set "xtime" correctly. However, the
133 * value in this location is the value at the most recent update of
134 * wall time. Discover what correction gettimeofday() would have
135 * done, and then undo it!
136 */
137 nsec -= system_timer->offset() * NSEC_PER_USEC;
138
139 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
140 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
141
142 set_normalized_timespec(&xtime, sec, nsec);
143 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
144
145 ntp_clear();
146 write_sequnlock_irq(&xtime_lock);
147 clock_was_set();
148 return 0;
149}
150
151EXPORT_SYMBOL(do_settimeofday);
152#endif /* !CONFIG_GENERIC_TIME */
153 99
154#ifndef CONFIG_GENERIC_CLOCKEVENTS 100#ifndef CONFIG_GENERIC_CLOCKEVENTS
155/* 101/*
@@ -214,10 +160,6 @@ device_initcall(timer_init_sysfs);
214 160
215void __init time_init(void) 161void __init time_init(void)
216{ 162{
217#ifndef CONFIG_GENERIC_TIME
218 if (system_timer->offset == NULL)
219 system_timer->offset = dummy_gettimeoffset;
220#endif
221 system_timer->init(); 163 system_timer->init();
222} 164}
223 165
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
index 5e3f99620c04..14a0d988c82c 100644
--- a/arch/arm/lib/clear_user.S
+++ b/arch/arm/lib/clear_user.S
@@ -45,6 +45,7 @@ USER( strnebt r2, [r0])
45 mov r0, #0 45 mov r0, #0
46 ldmfd sp!, {r1, pc} 46 ldmfd sp!, {r1, pc}
47ENDPROC(__clear_user) 47ENDPROC(__clear_user)
48ENDPROC(__clear_user_std)
48 49
49 .pushsection .fixup,"ax" 50 .pushsection .fixup,"ax"
50 .align 0 51 .align 0
diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S
index 027b69bdbad1..d066df686e17 100644
--- a/arch/arm/lib/copy_to_user.S
+++ b/arch/arm/lib/copy_to_user.S
@@ -93,6 +93,7 @@ WEAK(__copy_to_user)
93#include "copy_template.S" 93#include "copy_template.S"
94 94
95ENDPROC(__copy_to_user) 95ENDPROC(__copy_to_user)
96ENDPROC(__copy_to_user_std)
96 97
97 .pushsection .fixup,"ax" 98 .pushsection .fixup,"ax"
98 .align 0 99 .align 0
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2db43a5ddd9b..841eaf8f27e2 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -23,14 +23,12 @@ choice
23config ARCH_AT91RM9200 23config ARCH_AT91RM9200
24 bool "AT91RM9200" 24 bool "AT91RM9200"
25 select CPU_ARM920T 25 select CPU_ARM920T
26 select GENERIC_TIME
27 select GENERIC_CLOCKEVENTS 26 select GENERIC_CLOCKEVENTS
28 select HAVE_AT91_USART3 27 select HAVE_AT91_USART3
29 28
30config ARCH_AT91SAM9260 29config ARCH_AT91SAM9260
31 bool "AT91SAM9260 or AT91SAM9XE" 30 bool "AT91SAM9260 or AT91SAM9XE"
32 select CPU_ARM926T 31 select CPU_ARM926T
33 select GENERIC_TIME
34 select GENERIC_CLOCKEVENTS 32 select GENERIC_CLOCKEVENTS
35 select HAVE_AT91_USART3 33 select HAVE_AT91_USART3
36 select HAVE_AT91_USART4 34 select HAVE_AT91_USART4
@@ -39,28 +37,24 @@ config ARCH_AT91SAM9260
39config ARCH_AT91SAM9261 37config ARCH_AT91SAM9261
40 bool "AT91SAM9261" 38 bool "AT91SAM9261"
41 select CPU_ARM926T 39 select CPU_ARM926T
42 select GENERIC_TIME
43 select GENERIC_CLOCKEVENTS 40 select GENERIC_CLOCKEVENTS
44 select HAVE_FB_ATMEL 41 select HAVE_FB_ATMEL
45 42
46config ARCH_AT91SAM9G10 43config ARCH_AT91SAM9G10
47 bool "AT91SAM9G10" 44 bool "AT91SAM9G10"
48 select CPU_ARM926T 45 select CPU_ARM926T
49 select GENERIC_TIME
50 select GENERIC_CLOCKEVENTS 46 select GENERIC_CLOCKEVENTS
51 select HAVE_FB_ATMEL 47 select HAVE_FB_ATMEL
52 48
53config ARCH_AT91SAM9263 49config ARCH_AT91SAM9263
54 bool "AT91SAM9263" 50 bool "AT91SAM9263"
55 select CPU_ARM926T 51 select CPU_ARM926T
56 select GENERIC_TIME
57 select GENERIC_CLOCKEVENTS 52 select GENERIC_CLOCKEVENTS
58 select HAVE_FB_ATMEL 53 select HAVE_FB_ATMEL
59 54
60config ARCH_AT91SAM9RL 55config ARCH_AT91SAM9RL
61 bool "AT91SAM9RL" 56 bool "AT91SAM9RL"
62 select CPU_ARM926T 57 select CPU_ARM926T
63 select GENERIC_TIME
64 select GENERIC_CLOCKEVENTS 58 select GENERIC_CLOCKEVENTS
65 select HAVE_AT91_USART3 59 select HAVE_AT91_USART3
66 select HAVE_FB_ATMEL 60 select HAVE_FB_ATMEL
@@ -68,7 +62,6 @@ config ARCH_AT91SAM9RL
68config ARCH_AT91SAM9G20 62config ARCH_AT91SAM9G20
69 bool "AT91SAM9G20" 63 bool "AT91SAM9G20"
70 select CPU_ARM926T 64 select CPU_ARM926T
71 select GENERIC_TIME
72 select GENERIC_CLOCKEVENTS 65 select GENERIC_CLOCKEVENTS
73 select HAVE_AT91_USART3 66 select HAVE_AT91_USART3
74 select HAVE_AT91_USART4 67 select HAVE_AT91_USART4
@@ -77,7 +70,6 @@ config ARCH_AT91SAM9G20
77config ARCH_AT91SAM9G45 70config ARCH_AT91SAM9G45
78 bool "AT91SAM9G45" 71 bool "AT91SAM9G45"
79 select CPU_ARM926T 72 select CPU_ARM926T
80 select GENERIC_TIME
81 select GENERIC_CLOCKEVENTS 73 select GENERIC_CLOCKEVENTS
82 select HAVE_AT91_USART3 74 select HAVE_AT91_USART3
83 select HAVE_FB_ATMEL 75 select HAVE_FB_ATMEL
@@ -85,18 +77,17 @@ config ARCH_AT91SAM9G45
85config ARCH_AT91CAP9 77config ARCH_AT91CAP9
86 bool "AT91CAP9" 78 bool "AT91CAP9"
87 select CPU_ARM926T 79 select CPU_ARM926T
88 select GENERIC_TIME
89 select GENERIC_CLOCKEVENTS 80 select GENERIC_CLOCKEVENTS
90 select HAVE_FB_ATMEL 81 select HAVE_FB_ATMEL
91 82
92config ARCH_AT572D940HF 83config ARCH_AT572D940HF
93 bool "AT572D940HF" 84 bool "AT572D940HF"
94 select CPU_ARM926T 85 select CPU_ARM926T
95 select GENERIC_TIME
96 select GENERIC_CLOCKEVENTS 86 select GENERIC_CLOCKEVENTS
97 87
98config ARCH_AT91X40 88config ARCH_AT91X40
99 bool "AT91x40" 89 bool "AT91x40"
90 select ARCH_USES_GETTIMEOFFSET
100 91
101endchoice 92endchoice
102 93
@@ -360,6 +351,19 @@ config MACH_CPU9G20
360 Select this if you are using a Eukrea Electromatique's 351 Select this if you are using a Eukrea Electromatique's
361 CPU9G20 Board <http://www.eukrea.com/> 352 CPU9G20 Board <http://www.eukrea.com/>
362 353
354config MACH_PORTUXG20
355 bool "taskit PortuxG20"
356 help
357 Select this if you are using taskit's PortuxG20.
358 <http://www.taskit.de/en/>
359
360config MACH_STAMP9G20
361 bool "taskit Stamp9G20 CPU module"
362 help
363 Select this if you are using taskit's Stamp9G20 CPU module on its
364 evaluation board.
365 <http://www.taskit.de/en/>
366
363endif 367endif
364 368
365# ---------------------------------------------------------- 369# ----------------------------------------------------------
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index d4004557532a..c1f821e58222 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -63,6 +63,8 @@ obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
63obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o 63obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
64obj-$(CONFIG_MACH_AT91SAM9G20EK_2MMC) += board-sam9g20ek-2slot-mmc.o 64obj-$(CONFIG_MACH_AT91SAM9G20EK_2MMC) += board-sam9g20ek-2slot-mmc.o
65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o 65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
66obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
67obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
66 68
67# AT91SAM9G45 board-specific support 69# AT91SAM9G45 board-specific support
68obj-$(CONFIG_MACH_AT91SAM9G45EKES) += board-sam9m10g45ek.o 70obj-$(CONFIG_MACH_AT91SAM9G45EKES) += board-sam9m10g45ek.o
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
new file mode 100644
index 000000000000..87958274290f
--- /dev/null
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -0,0 +1,315 @@
1/*
2 * Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
3 * taskit GmbH
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/mm.h>
21#include <linux/platform_device.h>
22#include <linux/gpio.h>
23#include <linux/w1-gpio.h>
24
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27
28#include <mach/board.h>
29#include <mach/at91sam9_smc.h>
30
31#include "sam9_smc.h"
32#include "generic.h"
33
34
35static void __init portuxg20_map_io(void)
36{
37 /* Initialize processor: 18.432 MHz crystal */
38 at91sam9260_initialize(18432000);
39
40 /* DGBU on ttyS0. (Rx & Tx only) */
41 at91_register_uart(0, 0, 0);
42
43 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
44 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
45 | ATMEL_UART_DTR | ATMEL_UART_DSR
46 | ATMEL_UART_DCD | ATMEL_UART_RI);
47
48 /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
49 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
50
51 /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
52 at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
53
54 /* USART4 on ttyS5. (Rx, Tx only) */
55 at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
56
57 /* USART5 on ttyS6. (Rx, Tx only) */
58 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
59
60 /* set serial console to ttyS0 (ie, DBGU) */
61 at91_set_serial_console(0);
62}
63
64static void __init stamp9g20_map_io(void)
65{
66 /* Initialize processor: 18.432 MHz crystal */
67 at91sam9260_initialize(18432000);
68
69 /* DGBU on ttyS0. (Rx & Tx only) */
70 at91_register_uart(0, 0, 0);
71
72 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
73 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
74 | ATMEL_UART_DTR | ATMEL_UART_DSR
75 | ATMEL_UART_DCD | ATMEL_UART_RI);
76
77 /* set serial console to ttyS0 (ie, DBGU) */
78 at91_set_serial_console(0);
79}
80
81static void __init init_irq(void)
82{
83 at91sam9260_init_interrupts(NULL);
84}
85
86
87/*
88 * NAND flash
89 */
90static struct atmel_nand_data __initdata nand_data = {
91 .ale = 21,
92 .cle = 22,
93 .rdy_pin = AT91_PIN_PC13,
94 .enable_pin = AT91_PIN_PC14,
95 .bus_width_16 = 0,
96};
97
98static struct sam9_smc_config __initdata nand_smc_config = {
99 .ncs_read_setup = 0,
100 .nrd_setup = 2,
101 .ncs_write_setup = 0,
102 .nwe_setup = 2,
103
104 .ncs_read_pulse = 4,
105 .nrd_pulse = 4,
106 .ncs_write_pulse = 4,
107 .nwe_pulse = 4,
108
109 .read_cycle = 7,
110 .write_cycle = 7,
111
112 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
113 .tdf_cycles = 3,
114};
115
116static void __init add_device_nand(void)
117{
118 /* configure chip-select 3 (NAND) */
119 sam9_smc_configure(3, &nand_smc_config);
120
121 at91_add_device_nand(&nand_data);
122}
123
124
125/*
126 * MCI (SD/MMC)
127 * det_pin, wp_pin and vcc_pin are not connected
128 */
129#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
130static struct mci_platform_data __initdata mmc_data = {
131 .slot[0] = {
132 .bus_width = 4,
133 },
134};
135#else
136static struct at91_mmc_data __initdata mmc_data = {
137 .slot_b = 0,
138 .wire4 = 1,
139};
140#endif
141
142
143/*
144 * USB Host port
145 */
146static struct at91_usbh_data __initdata usbh_data = {
147 .ports = 2,
148};
149
150
151/*
152 * USB Device port
153 */
154static struct at91_udc_data __initdata portuxg20_udc_data = {
155 .vbus_pin = AT91_PIN_PC7,
156 .pullup_pin = 0, /* pull-up driven by UDC */
157};
158
159static struct at91_udc_data __initdata stamp9g20_udc_data = {
160 .vbus_pin = AT91_PIN_PA22,
161 .pullup_pin = 0, /* pull-up driven by UDC */
162};
163
164
165/*
166 * MACB Ethernet device
167 */
168static struct at91_eth_data __initdata macb_data = {
169 .phy_irq_pin = AT91_PIN_PA28,
170 .is_rmii = 1,
171};
172
173
174/*
175 * LEDs
176 */
177static struct gpio_led portuxg20_leds[] = {
178 {
179 .name = "LED2",
180 .gpio = AT91_PIN_PC5,
181 .default_trigger = "none",
182 }, {
183 .name = "LED3",
184 .gpio = AT91_PIN_PC4,
185 .default_trigger = "none",
186 }, {
187 .name = "LED4",
188 .gpio = AT91_PIN_PC10,
189 .default_trigger = "heartbeat",
190 }
191};
192
193static struct gpio_led stamp9g20_leds[] = {
194 {
195 .name = "D8",
196 .gpio = AT91_PIN_PB18,
197 .active_low = 1,
198 .default_trigger = "none",
199 }, {
200 .name = "D9",
201 .gpio = AT91_PIN_PB19,
202 .active_low = 1,
203 .default_trigger = "none",
204 }, {
205 .name = "D10",
206 .gpio = AT91_PIN_PB20,
207 .active_low = 1,
208 .default_trigger = "heartbeat",
209 }
210};
211
212
213/*
214 * SPI devices
215 */
216static struct spi_board_info portuxg20_spi_devices[] = {
217 {
218 .modalias = "spidev",
219 .chip_select = 0,
220 .max_speed_hz = 1 * 1000 * 1000,
221 .bus_num = 0,
222 }, {
223 .modalias = "spidev",
224 .chip_select = 0,
225 .max_speed_hz = 1 * 1000 * 1000,
226 .bus_num = 1,
227 },
228};
229
230
231/*
232 * Dallas 1-Wire
233 */
234static struct w1_gpio_platform_data w1_gpio_pdata = {
235 .pin = AT91_PIN_PA29,
236 .is_open_drain = 1,
237};
238
239static struct platform_device w1_device = {
240 .name = "w1-gpio",
241 .id = -1,
242 .dev.platform_data = &w1_gpio_pdata,
243};
244
245void add_w1(void)
246{
247 at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
248 at91_set_multi_drive(w1_gpio_pdata.pin, 1);
249 platform_device_register(&w1_device);
250}
251
252
253static void __init generic_board_init(void)
254{
255 /* Serial */
256 at91_add_device_serial();
257 /* NAND */
258 add_device_nand();
259 /* MMC */
260#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
261 at91_add_device_mci(0, &mmc_data);
262#else
263 at91_add_device_mmc(0, &mmc_data);
264#endif
265 /* USB Host */
266 at91_add_device_usbh(&usbh_data);
267 /* Ethernet */
268 at91_add_device_eth(&macb_data);
269 /* I2C */
270 at91_add_device_i2c(NULL, 0);
271 /* W1 */
272 add_w1();
273}
274
275static void __init portuxg20_board_init(void)
276{
277 generic_board_init();
278 /* SPI */
279 at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices));
280 /* USB Device */
281 at91_add_device_udc(&portuxg20_udc_data);
282 /* LEDs */
283 at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds));
284}
285
286static void __init stamp9g20_board_init(void)
287{
288 generic_board_init();
289 /* USB Device */
290 at91_add_device_udc(&stamp9g20_udc_data);
291 /* LEDs */
292 at91_gpio_leds(stamp9g20_leds, ARRAY_SIZE(stamp9g20_leds));
293}
294
295MACHINE_START(PORTUXG20, "taskit PortuxG20")
296 /* Maintainer: taskit GmbH */
297 .phys_io = AT91_BASE_SYS,
298 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
299 .boot_params = AT91_SDRAM_BASE + 0x100,
300 .timer = &at91sam926x_timer,
301 .map_io = portuxg20_map_io,
302 .init_irq = init_irq,
303 .init_machine = portuxg20_board_init,
304MACHINE_END
305
306MACHINE_START(STAMP9G20, "taskit Stamp9G20")
307 /* Maintainer: taskit GmbH */
308 .phys_io = AT91_BASE_SYS,
309 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
310 .boot_params = AT91_SDRAM_BASE + 0x100,
311 .timer = &at91sam926x_timer,
312 .map_io = stamp9g20_map_io,
313 .init_irq = init_irq,
314 .init_machine = stamp9g20_board_init,
315MACHINE_END
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index ceaec6c16eb2..df2ed848c9f8 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -39,6 +39,7 @@
39#include <linux/usb/atmel_usba_udc.h> 39#include <linux/usb/atmel_usba_udc.h>
40#include <linux/atmel-mci.h> 40#include <linux/atmel-mci.h>
41#include <sound/atmel-ac97c.h> 41#include <sound/atmel-ac97c.h>
42#include <linux/serial.h>
42 43
43 /* USB Device */ 44 /* USB Device */
44struct at91_udc_data { 45struct at91_udc_data {
@@ -143,9 +144,10 @@ extern struct platform_device *atmel_default_console_device;
143extern void __init __deprecated at91_init_serial(struct at91_uart_config *config); 144extern void __init __deprecated at91_init_serial(struct at91_uart_config *config);
144 145
145struct atmel_uart_data { 146struct atmel_uart_data {
146 short use_dma_tx; /* use transmit DMA? */ 147 short use_dma_tx; /* use transmit DMA? */
147 short use_dma_rx; /* use receive DMA? */ 148 short use_dma_rx; /* use receive DMA? */
148 void __iomem *regs; /* virtual base address, if any */ 149 void __iomem *regs; /* virt. base address, if any */
150 struct serial_rs485 rs485; /* rs485 settings */
149}; 151};
150extern void __init at91_add_device_serial(void); 152extern void __init at91_add_device_serial(void);
151 153
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index 5a0650101d45..833659d1200a 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -21,7 +21,7 @@
21#define ARCH_ID_AT91SAM9260 0x019803a0 21#define ARCH_ID_AT91SAM9260 0x019803a0
22#define ARCH_ID_AT91SAM9261 0x019703a0 22#define ARCH_ID_AT91SAM9261 0x019703a0
23#define ARCH_ID_AT91SAM9263 0x019607a0 23#define ARCH_ID_AT91SAM9263 0x019607a0
24#define ARCH_ID_AT91SAM9G10 0x819903a0 24#define ARCH_ID_AT91SAM9G10 0x019903a0
25#define ARCH_ID_AT91SAM9G20 0x019905a0 25#define ARCH_ID_AT91SAM9G20 0x019905a0
26#define ARCH_ID_AT91SAM9RL64 0x019b03a0 26#define ARCH_ID_AT91SAM9RL64 0x019b03a0
27#define ARCH_ID_AT91SAM9G45 0x819b05a0 27#define ARCH_ID_AT91SAM9G45 0x819b05a0
@@ -108,7 +108,7 @@ static inline unsigned long at91cap9_rev_identify(void)
108#endif 108#endif
109 109
110#ifdef CONFIG_ARCH_AT91SAM9G10 110#ifdef CONFIG_ARCH_AT91SAM9G10
111#define cpu_is_at91sam9g10() (at91_cpu_identify() == ARCH_ID_AT91SAM9G10) 111#define cpu_is_at91sam9g10() ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
112#else 112#else
113#define cpu_is_at91sam9g10() (0) 113#define cpu_is_at91sam9g10() (0)
114#endif 114#endif
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
index 5268af3933c2..c80e090b3670 100644
--- a/arch/arm/mach-at91/include/mach/system.h
+++ b/arch/arm/mach-at91/include/mach/system.h
@@ -24,21 +24,24 @@
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/at91_st.h> 25#include <mach/at91_st.h>
26#include <mach/at91_dbgu.h> 26#include <mach/at91_dbgu.h>
27#include <mach/at91_pmc.h>
27 28
28static inline void arch_idle(void) 29static inline void arch_idle(void)
29{ 30{
31#ifndef CONFIG_DEBUG_KERNEL
30 /* 32 /*
31 * Disable the processor clock. The processor will be automatically 33 * Disable the processor clock. The processor will be automatically
32 * re-enabled by an interrupt or by a reset. 34 * re-enabled by an interrupt or by a reset.
33 */ 35 */
34// at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); 36 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
35 37#else
36 /* 38 /*
37 * Set the processor (CP15) into 'Wait for Interrupt' mode. 39 * Set the processor (CP15) into 'Wait for Interrupt' mode.
38 * Unlike disabling the processor clock via the PMC (above) 40 * Unlike disabling the processor clock via the PMC (above)
39 * this allows the processor to be woken via JTAG. 41 * this allows the processor to be woken via JTAG.
40 */ 42 */
41 cpu_do_idle(); 43 cpu_do_idle();
44#endif
42} 45}
43 46
44void (*at91_arch_reset)(void); 47void (*at91_arch_reset)(void);
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index 53dd2a9eecf9..2f139196d63d 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -29,6 +29,7 @@
29#include <asm/setup.h> 29#include <asm/setup.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <asm/mach/time.h> 31#include <asm/mach/time.h>
32#include <asm/pmu.h>
32 33
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <mach/dma.h> 35#include <mach/dma.h>
@@ -85,8 +86,23 @@ static struct platform_device nand_device = {
85 .num_resources = ARRAY_SIZE(nand_resource), 86 .num_resources = ARRAY_SIZE(nand_resource),
86}; 87};
87 88
89static struct resource pmu_resource = {
90 .start = IRQ_PMUIRQ,
91 .end = IRQ_PMUIRQ,
92 .flags = IORESOURCE_IRQ,
93};
94
95static struct platform_device pmu_device = {
96 .name = "arm-pmu",
97 .id = ARM_PMU_DEVICE_CPU,
98 .resource = &pmu_resource,
99 .num_resources = 1,
100};
101
102
88static struct platform_device *devices[] __initdata = { 103static struct platform_device *devices[] __initdata = {
89 &nand_device, 104 &nand_device,
105 &pmu_device,
90}; 106};
91 107
92/**************************************************************************** 108/****************************************************************************
diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c
index a7b4591205a3..986592176767 100644
--- a/arch/arm/mach-clps711x/mm.c
+++ b/arch/arm/mach-clps711x/mm.c
@@ -22,7 +22,6 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/bootmem.h>
26 25
27#include <asm/sizes.h> 26#include <asm/sizes.h>
28#include <mach/hardware.h> 27#include <mach/hardware.h>
diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig
new file mode 100644
index 000000000000..9ebfcc46feb1
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -0,0 +1,12 @@
1menu "CNS3XXX platform type"
2 depends on ARCH_CNS3XXX
3
4config MACH_CNS3420VB
5 bool "Support for CNS3420 Validation Board"
6 help
7 Include support for the Cavium Networks CNS3420 MPCore Platform
8 Baseboard.
9 This is a platform with an on-board ARM11 MPCore and has support
10 for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc.
11
12endmenu
diff --git a/arch/arm/mach-cns3xxx/Makefile b/arch/arm/mach-cns3xxx/Makefile
new file mode 100644
index 000000000000..427507a2d696
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -0,0 +1,2 @@
1obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o
2obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
diff --git a/arch/arm/mach-cns3xxx/Makefile.boot b/arch/arm/mach-cns3xxx/Makefile.boot
new file mode 100644
index 000000000000..777012865220
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00C00000
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
new file mode 100644
index 000000000000..2e30c8288740
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -0,0 +1,148 @@
1/*
2 * Cavium Networks CNS3420 Validation Board
3 *
4 * Copyright 2000 Deep Blue Solutions Ltd
5 * Copyright 2008 ARM Limited
6 * Copyright 2008 Cavium Networks
7 * Scott Shu
8 * Copyright 2010 MontaVista Software, LLC.
9 * Anton Vorontsov <avorontsov@mvista.com>
10 *
11 * This file is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License, Version 2, as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/compiler.h>
19#include <linux/io.h>
20#include <linux/serial_core.h>
21#include <linux/serial_8250.h>
22#include <linux/platform_device.h>
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/physmap.h>
25#include <linux/mtd/partitions.h>
26#include <asm/setup.h>
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/time.h>
31#include <mach/hardware.h>
32#include <mach/cns3xxx.h>
33#include <mach/irqs.h>
34#include "core.h"
35
36/*
37 * NOR Flash
38 */
39static struct mtd_partition cns3420_nor_partitions[] = {
40 {
41 .name = "uboot",
42 .size = 0x00040000,
43 .offset = 0,
44 .mask_flags = MTD_WRITEABLE,
45 }, {
46 .name = "kernel",
47 .size = 0x004C0000,
48 .offset = MTDPART_OFS_APPEND,
49 }, {
50 .name = "filesystem",
51 .size = 0x7000000,
52 .offset = MTDPART_OFS_APPEND,
53 }, {
54 .name = "filesystem2",
55 .size = 0x0AE0000,
56 .offset = MTDPART_OFS_APPEND,
57 }, {
58 .name = "ubootenv",
59 .size = MTDPART_SIZ_FULL,
60 .offset = MTDPART_OFS_APPEND,
61 },
62};
63
64static struct physmap_flash_data cns3420_nor_pdata = {
65 .width = 2,
66 .parts = cns3420_nor_partitions,
67 .nr_parts = ARRAY_SIZE(cns3420_nor_partitions),
68};
69
70static struct resource cns3420_nor_res = {
71 .start = CNS3XXX_FLASH_BASE,
72 .end = CNS3XXX_FLASH_BASE + SZ_128M - 1,
73 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
74};
75
76static struct platform_device cns3420_nor_pdev = {
77 .name = "physmap-flash",
78 .id = 0,
79 .resource = &cns3420_nor_res,
80 .num_resources = 1,
81 .dev = {
82 .platform_data = &cns3420_nor_pdata,
83 },
84};
85
86/*
87 * UART
88 */
89static void __init cns3420_early_serial_setup(void)
90{
91#ifdef CONFIG_SERIAL_8250_CONSOLE
92 static struct uart_port cns3420_serial_port = {
93 .membase = (void __iomem *)CNS3XXX_UART0_BASE_VIRT,
94 .mapbase = CNS3XXX_UART0_BASE,
95 .irq = IRQ_CNS3XXX_UART0,
96 .iotype = UPIO_MEM,
97 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
98 .regshift = 2,
99 .uartclk = 24000000,
100 .line = 0,
101 .type = PORT_16550A,
102 .fifosize = 16,
103 };
104
105 early_serial_setup(&cns3420_serial_port);
106#endif
107}
108
109/*
110 * Initialization
111 */
112static struct platform_device *cns3420_pdevs[] __initdata = {
113 &cns3420_nor_pdev,
114};
115
116static void __init cns3420_init(void)
117{
118 platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs));
119
120 pm_power_off = cns3xxx_power_off;
121}
122
123static struct map_desc cns3420_io_desc[] __initdata = {
124 {
125 .virtual = CNS3XXX_UART0_BASE_VIRT,
126 .pfn = __phys_to_pfn(CNS3XXX_UART0_BASE),
127 .length = SZ_4K,
128 .type = MT_DEVICE,
129 },
130};
131
132static void __init cns3420_map_io(void)
133{
134 cns3xxx_map_io();
135 iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc));
136
137 cns3420_early_serial_setup();
138}
139
140MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
141 .phys_io = CNS3XXX_UART0_BASE,
142 .io_pg_offst = (CNS3XXX_UART0_BASE_VIRT >> 18) & 0xfffc,
143 .boot_params = 0x00000100,
144 .map_io = cns3420_map_io,
145 .init_irq = cns3xxx_init_irq,
146 .timer = &cns3xxx_timer,
147 .init_machine = cns3420_init,
148MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
new file mode 100644
index 000000000000..9ca4d581016f
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -0,0 +1,249 @@
1/*
2 * Copyright 1999 - 2003 ARM Limited
3 * Copyright 2000 Deep Blue Solutions Ltd
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/clockchips.h>
14#include <linux/io.h>
15#include <asm/mach/map.h>
16#include <asm/mach/time.h>
17#include <asm/mach/irq.h>
18#include <asm/hardware/gic.h>
19#include <mach/cns3xxx.h>
20#include "core.h"
21
22static struct map_desc cns3xxx_io_desc[] __initdata = {
23 {
24 .virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT,
25 .pfn = __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE),
26 .length = SZ_4K,
27 .type = MT_DEVICE,
28 }, {
29 .virtual = CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT,
30 .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE),
31 .length = SZ_4K,
32 .type = MT_DEVICE,
33 }, {
34 .virtual = CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT,
35 .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE),
36 .length = SZ_4K,
37 .type = MT_DEVICE,
38 }, {
39 .virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT,
40 .pfn = __phys_to_pfn(CNS3XXX_TIMER1_2_3_BASE),
41 .length = SZ_4K,
42 .type = MT_DEVICE,
43 }, {
44 .virtual = CNS3XXX_GPIOA_BASE_VIRT,
45 .pfn = __phys_to_pfn(CNS3XXX_GPIOA_BASE),
46 .length = SZ_4K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = CNS3XXX_GPIOB_BASE_VIRT,
50 .pfn = __phys_to_pfn(CNS3XXX_GPIOB_BASE),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = CNS3XXX_MISC_BASE_VIRT,
55 .pfn = __phys_to_pfn(CNS3XXX_MISC_BASE),
56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = CNS3XXX_PM_BASE_VIRT,
60 .pfn = __phys_to_pfn(CNS3XXX_PM_BASE),
61 .length = SZ_4K,
62 .type = MT_DEVICE,
63 },
64};
65
66void __init cns3xxx_map_io(void)
67{
68 iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
69}
70
71/* used by entry-macro.S */
72void __iomem *gic_cpu_base_addr;
73
74void __init cns3xxx_init_irq(void)
75{
76 gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT);
77 gic_dist_init(0, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), 29);
78 gic_cpu_init(0, gic_cpu_base_addr);
79}
80
81void cns3xxx_power_off(void)
82{
83 u32 __iomem *pm_base = __io(CNS3XXX_PM_BASE_VIRT);
84 u32 clkctrl;
85
86 printk(KERN_INFO "powering system down...\n");
87
88 clkctrl = readl(pm_base + PM_SYS_CLK_CTRL_OFFSET);
89 clkctrl &= 0xfffff1ff;
90 clkctrl |= (0x5 << 9); /* Hibernate */
91 writel(clkctrl, pm_base + PM_SYS_CLK_CTRL_OFFSET);
92
93}
94
95/*
96 * Timer
97 */
98static void __iomem *cns3xxx_tmr1;
99
100static void cns3xxx_timer_set_mode(enum clock_event_mode mode,
101 struct clock_event_device *clk)
102{
103 unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
104 int pclk = cns3xxx_cpu_clock() / 8;
105 int reload;
106
107 switch (mode) {
108 case CLOCK_EVT_MODE_PERIODIC:
109 reload = pclk * 20 / (3 * HZ) * 0x25000;
110 writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
111 ctrl |= (1 << 0) | (1 << 2) | (1 << 9);
112 break;
113 case CLOCK_EVT_MODE_ONESHOT:
114 /* period set, and timer enabled in 'next_event' hook */
115 ctrl |= (1 << 2) | (1 << 9);
116 break;
117 case CLOCK_EVT_MODE_UNUSED:
118 case CLOCK_EVT_MODE_SHUTDOWN:
119 default:
120 ctrl = 0;
121 }
122
123 writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
124}
125
126static int cns3xxx_timer_set_next_event(unsigned long evt,
127 struct clock_event_device *unused)
128{
129 unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
130
131 writel(evt, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
132 writel(ctrl | (1 << 0), cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
133
134 return 0;
135}
136
137static struct clock_event_device cns3xxx_tmr1_clockevent = {
138 .name = "cns3xxx timer1",
139 .shift = 8,
140 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
141 .set_mode = cns3xxx_timer_set_mode,
142 .set_next_event = cns3xxx_timer_set_next_event,
143 .rating = 350,
144 .cpumask = cpu_all_mask,
145};
146
147static void __init cns3xxx_clockevents_init(unsigned int timer_irq)
148{
149 cns3xxx_tmr1_clockevent.irq = timer_irq;
150 cns3xxx_tmr1_clockevent.mult =
151 div_sc((cns3xxx_cpu_clock() >> 3) * 1000000, NSEC_PER_SEC,
152 cns3xxx_tmr1_clockevent.shift);
153 cns3xxx_tmr1_clockevent.max_delta_ns =
154 clockevent_delta2ns(0xffffffff, &cns3xxx_tmr1_clockevent);
155 cns3xxx_tmr1_clockevent.min_delta_ns =
156 clockevent_delta2ns(0xf, &cns3xxx_tmr1_clockevent);
157
158 clockevents_register_device(&cns3xxx_tmr1_clockevent);
159}
160
161/*
162 * IRQ handler for the timer
163 */
164static irqreturn_t cns3xxx_timer_interrupt(int irq, void *dev_id)
165{
166 struct clock_event_device *evt = &cns3xxx_tmr1_clockevent;
167 u32 __iomem *stat = cns3xxx_tmr1 + TIMER1_2_INTERRUPT_STATUS_OFFSET;
168 u32 val;
169
170 /* Clear the interrupt */
171 val = readl(stat);
172 writel(val & ~(1 << 2), stat);
173
174 evt->event_handler(evt);
175
176 return IRQ_HANDLED;
177}
178
179static struct irqaction cns3xxx_timer_irq = {
180 .name = "timer",
181 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
182 .handler = cns3xxx_timer_interrupt,
183};
184
185/*
186 * Set up the clock source and clock events devices
187 */
188static void __init __cns3xxx_timer_init(unsigned int timer_irq)
189{
190 u32 val;
191 u32 irq_mask;
192
193 /*
194 * Initialise to a known state (all timers off)
195 */
196
197 /* disable timer1 and timer2 */
198 writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
199 /* stop free running timer3 */
200 writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
201
202 /* timer1 */
203 writel(0x5C800, cns3xxx_tmr1 + TIMER1_COUNTER_OFFSET);
204 writel(0x5C800, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
205
206 writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V1_OFFSET);
207 writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V2_OFFSET);
208
209 /* mask irq, non-mask timer1 overflow */
210 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
211 irq_mask &= ~(1 << 2);
212 irq_mask |= 0x03;
213 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
214
215 /* down counter */
216 val = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
217 val |= (1 << 9);
218 writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
219
220 /* timer2 */
221 writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V1_OFFSET);
222 writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V2_OFFSET);
223
224 /* mask irq */
225 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
226 irq_mask |= ((1 << 3) | (1 << 4) | (1 << 5));
227 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
228
229 /* down counter */
230 val = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
231 val |= (1 << 10);
232 writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
233
234 /* Make irqs happen for the system timer */
235 setup_irq(timer_irq, &cns3xxx_timer_irq);
236
237 cns3xxx_clockevents_init(timer_irq);
238}
239
240static void __init cns3xxx_timer_init(void)
241{
242 cns3xxx_tmr1 = __io(CNS3XXX_TIMER1_2_3_BASE_VIRT);
243
244 __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0);
245}
246
247struct sys_timer cns3xxx_timer = {
248 .init = cns3xxx_timer_init,
249};
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
new file mode 100644
index 000000000000..6b33ec11346e
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -0,0 +1,23 @@
1/*
2 * Copyright 2000 Deep Blue Solutions Ltd
3 * Copyright 2004 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __CNS3XXX_CORE_H
12#define __CNS3XXX_CORE_H
13
14extern void __iomem *gic_cpu_base_addr;
15extern struct sys_timer cns3xxx_timer;
16
17void __init cns3xxx_map_io(void);
18void __init cns3xxx_init_irq(void);
19void cns3xxx_power_off(void);
20void cns3xxx_pwr_power_up(unsigned int block);
21void cns3xxx_pwr_power_down(unsigned int block);
22
23#endif /* __CNS3XXX_CORE_H */
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
new file mode 100644
index 000000000000..8a2f5a21d4ee
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
@@ -0,0 +1,635 @@
1/*
2 * Copyright 2008 Cavium Networks
3 *
4 * This file is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, Version 2, as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __MACH_BOARD_CNS3XXXH
10#define __MACH_BOARD_CNS3XXXH
11
12/*
13 * Memory map
14 */
15#define CNS3XXX_FLASH_BASE 0x10000000 /* Flash/SRAM Memory Bank 0 */
16#define CNS3XXX_FLASH_SIZE SZ_256M
17
18#define CNS3XXX_DDR2SDRAM_BASE 0x20000000 /* DDR2 SDRAM Memory */
19
20#define CNS3XXX_SPI_FLASH_BASE 0x60000000 /* SPI Serial Flash Memory */
21
22#define CNS3XXX_SWITCH_BASE 0x70000000 /* Switch and HNAT Control */
23#define CNS3XXX_SWITCH_BASE_VIRT 0xFFF00000
24
25#define CNS3XXX_PPE_BASE 0x70001000 /* HANT */
26#define CNS3XXX_PPE_BASE_VIRT 0xFFF50000
27
28#define CNS3XXX_EMBEDDED_SRAM_BASE 0x70002000 /* HANT Embedded SRAM */
29#define CNS3XXX_EMBEDDED_SRAM_BASE_VIRT 0xFFF60000
30
31#define CNS3XXX_SSP_BASE 0x71000000 /* Synchronous Serial Port - SPI/PCM/I2C */
32#define CNS3XXX_SSP_BASE_VIRT 0xFFF01000
33
34#define CNS3XXX_DMC_BASE 0x72000000 /* DMC Control (DDR2 SDRAM) */
35#define CNS3XXX_DMC_BASE_VIRT 0xFFF02000
36
37#define CNS3XXX_SMC_BASE 0x73000000 /* SMC Control */
38#define CNS3XXX_SMC_BASE_VIRT 0xFFF03000
39
40#define SMC_MEMC_STATUS_OFFSET 0x000
41#define SMC_MEMIF_CFG_OFFSET 0x004
42#define SMC_MEMC_CFG_SET_OFFSET 0x008
43#define SMC_MEMC_CFG_CLR_OFFSET 0x00C
44#define SMC_DIRECT_CMD_OFFSET 0x010
45#define SMC_SET_CYCLES_OFFSET 0x014
46#define SMC_SET_OPMODE_OFFSET 0x018
47#define SMC_REFRESH_PERIOD_0_OFFSET 0x020
48#define SMC_REFRESH_PERIOD_1_OFFSET 0x024
49#define SMC_SRAM_CYCLES0_0_OFFSET 0x100
50#define SMC_NAND_CYCLES0_0_OFFSET 0x100
51#define SMC_OPMODE0_0_OFFSET 0x104
52#define SMC_SRAM_CYCLES0_1_OFFSET 0x120
53#define SMC_NAND_CYCLES0_1_OFFSET 0x120
54#define SMC_OPMODE0_1_OFFSET 0x124
55#define SMC_USER_STATUS_OFFSET 0x200
56#define SMC_USER_CONFIG_OFFSET 0x204
57#define SMC_ECC_STATUS_OFFSET 0x300
58#define SMC_ECC_MEMCFG_OFFSET 0x304
59#define SMC_ECC_MEMCOMMAND1_OFFSET 0x308
60#define SMC_ECC_MEMCOMMAND2_OFFSET 0x30C
61#define SMC_ECC_ADDR0_OFFSET 0x310
62#define SMC_ECC_ADDR1_OFFSET 0x314
63#define SMC_ECC_VALUE0_OFFSET 0x318
64#define SMC_ECC_VALUE1_OFFSET 0x31C
65#define SMC_ECC_VALUE2_OFFSET 0x320
66#define SMC_ECC_VALUE3_OFFSET 0x324
67#define SMC_PERIPH_ID_0_OFFSET 0xFE0
68#define SMC_PERIPH_ID_1_OFFSET 0xFE4
69#define SMC_PERIPH_ID_2_OFFSET 0xFE8
70#define SMC_PERIPH_ID_3_OFFSET 0xFEC
71#define SMC_PCELL_ID_0_OFFSET 0xFF0
72#define SMC_PCELL_ID_1_OFFSET 0xFF4
73#define SMC_PCELL_ID_2_OFFSET 0xFF8
74#define SMC_PCELL_ID_3_OFFSET 0xFFC
75
76#define CNS3XXX_GPIOA_BASE 0x74000000 /* GPIO port A */
77#define CNS3XXX_GPIOA_BASE_VIRT 0xFFF04000
78
79#define CNS3XXX_GPIOB_BASE 0x74800000 /* GPIO port B */
80#define CNS3XXX_GPIOB_BASE_VIRT 0xFFF05000
81
82#define CNS3XXX_RTC_BASE 0x75000000 /* Real Time Clock */
83#define CNS3XXX_RTC_BASE_VIRT 0xFFF06000
84
85#define RTC_SEC_OFFSET 0x00
86#define RTC_MIN_OFFSET 0x04
87#define RTC_HOUR_OFFSET 0x08
88#define RTC_DAY_OFFSET 0x0C
89#define RTC_SEC_ALM_OFFSET 0x10
90#define RTC_MIN_ALM_OFFSET 0x14
91#define RTC_HOUR_ALM_OFFSET 0x18
92#define RTC_REC_OFFSET 0x1C
93#define RTC_CTRL_OFFSET 0x20
94#define RTC_INTR_STS_OFFSET 0x34
95
96#define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */
97#define CNS3XXX_MISC_BASE_VIRT 0xFFF07000 /* Misc Control */
98
99#define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */
100#define CNS3XXX_PM_BASE_VIRT 0xFFF08000
101
102#define PM_CLK_GATE_OFFSET 0x00
103#define PM_SOFT_RST_OFFSET 0x04
104#define PM_HS_CFG_OFFSET 0x08
105#define PM_CACTIVE_STA_OFFSET 0x0C
106#define PM_PWR_STA_OFFSET 0x10
107#define PM_SYS_CLK_CTRL_OFFSET 0x14
108#define PM_PLL_LCD_I2S_CTRL_OFFSET 0x18
109#define PM_PLL_HM_PD_OFFSET 0x1C
110
111#define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */
112#define CNS3XXX_UART0_BASE_VIRT 0xFFF09000
113
114#define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */
115#define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000
116
117#define CNS3XXX_UART2_BASE 0x78800000 /* UART 2 */
118#define CNS3XXX_UART2_BASE_VIRT 0xFFF0B000
119
120#define CNS3XXX_DMAC_BASE 0x79000000 /* Generic DMA Control */
121#define CNS3XXX_DMAC_BASE_VIRT 0xFFF0D000
122
123#define CNS3XXX_CORESIGHT_BASE 0x7A000000 /* CoreSight */
124#define CNS3XXX_CORESIGHT_BASE_VIRT 0xFFF0E000
125
126#define CNS3XXX_CRYPTO_BASE 0x7B000000 /* Crypto */
127#define CNS3XXX_CRYPTO_BASE_VIRT 0xFFF0F000
128
129#define CNS3XXX_I2S_BASE 0x7C000000 /* I2S */
130#define CNS3XXX_I2S_BASE_VIRT 0xFFF10000
131
132#define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */
133#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800
134
135#define TIMER1_COUNTER_OFFSET 0x00
136#define TIMER1_AUTO_RELOAD_OFFSET 0x04
137#define TIMER1_MATCH_V1_OFFSET 0x08
138#define TIMER1_MATCH_V2_OFFSET 0x0C
139
140#define TIMER2_COUNTER_OFFSET 0x10
141#define TIMER2_AUTO_RELOAD_OFFSET 0x14
142#define TIMER2_MATCH_V1_OFFSET 0x18
143#define TIMER2_MATCH_V2_OFFSET 0x1C
144
145#define TIMER1_2_CONTROL_OFFSET 0x30
146#define TIMER1_2_INTERRUPT_STATUS_OFFSET 0x34
147#define TIMER1_2_INTERRUPT_MASK_OFFSET 0x38
148
149#define TIMER_FREERUN_OFFSET 0x40
150#define TIMER_FREERUN_CONTROL_OFFSET 0x44
151
152#define CNS3XXX_HCIE_BASE 0x7D000000 /* HCIE Control */
153#define CNS3XXX_HCIE_BASE_VIRT 0xFFF30000
154
155#define CNS3XXX_RAID_BASE 0x7E000000 /* RAID Control */
156#define CNS3XXX_RAID_BASE_VIRT 0xFFF12000
157
158#define CNS3XXX_AXI_IXC_BASE 0x7F000000 /* AXI IXC */
159#define CNS3XXX_AXI_IXC_BASE_VIRT 0xFFF13000
160
161#define CNS3XXX_CLCD_BASE 0x80000000 /* LCD Control */
162#define CNS3XXX_CLCD_BASE_VIRT 0xFFF14000
163
164#define CNS3XXX_USBOTG_BASE 0x81000000 /* USB OTG Control */
165#define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000
166
167#define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */
168#define CNS3XXX_USB_BASE_VIRT 0xFFF16000
169
170#define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */
171#define CNS3XXX_SATA2_SIZE SZ_16M
172#define CNS3XXX_SATA2_BASE_VIRT 0xFFF17000
173
174#define CNS3XXX_CAMERA_BASE 0x84000000 /* Camera Interface */
175#define CNS3XXX_CAMERA_BASE_VIRT 0xFFF18000
176
177#define CNS3XXX_SDIO_BASE 0x85000000 /* SDIO */
178#define CNS3XXX_SDIO_BASE_VIRT 0xFFF19000
179
180#define CNS3XXX_I2S_TDM_BASE 0x86000000 /* I2S TDM */
181#define CNS3XXX_I2S_TDM_BASE_VIRT 0xFFF1A000
182
183#define CNS3XXX_2DG_BASE 0x87000000 /* 2D Graphic Control */
184#define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000
185
186#define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */
187#define CNS3XXX_USB_OHCI_BASE_VIRT 0xFFF1C000
188
189#define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */
190#define CNS3XXX_L2C_BASE_VIRT 0xFFF27000
191
192#define CNS3XXX_PCIE0_MEM_BASE 0xA0000000 /* PCIe Port 0 IO/Memory Space */
193#define CNS3XXX_PCIE0_MEM_BASE_VIRT 0xE0000000
194
195#define CNS3XXX_PCIE0_HOST_BASE 0xAB000000 /* PCIe Port 0 RC Base */
196#define CNS3XXX_PCIE0_HOST_BASE_VIRT 0xE1000000
197
198#define CNS3XXX_PCIE0_IO_BASE 0xAC000000 /* PCIe Port 0 */
199#define CNS3XXX_PCIE0_IO_BASE_VIRT 0xE2000000
200
201#define CNS3XXX_PCIE0_CFG0_BASE 0xAD000000 /* PCIe Port 0 CFG Type 0 */
202#define CNS3XXX_PCIE0_CFG0_BASE_VIRT 0xE3000000
203
204#define CNS3XXX_PCIE0_CFG1_BASE 0xAE000000 /* PCIe Port 0 CFG Type 1 */
205#define CNS3XXX_PCIE0_CFG1_BASE_VIRT 0xE4000000
206
207#define CNS3XXX_PCIE0_MSG_BASE 0xAF000000 /* PCIe Port 0 Message Space */
208#define CNS3XXX_PCIE0_MSG_BASE_VIRT 0xE5000000
209
210#define CNS3XXX_PCIE1_MEM_BASE 0xB0000000 /* PCIe Port 1 IO/Memory Space */
211#define CNS3XXX_PCIE1_MEM_BASE_VIRT 0xE8000000
212
213#define CNS3XXX_PCIE1_HOST_BASE 0xBB000000 /* PCIe Port 1 RC Base */
214#define CNS3XXX_PCIE1_HOST_BASE_VIRT 0xE9000000
215
216#define CNS3XXX_PCIE1_IO_BASE 0xBC000000 /* PCIe Port 1 */
217#define CNS3XXX_PCIE1_IO_BASE_VIRT 0xEA000000
218
219#define CNS3XXX_PCIE1_CFG0_BASE 0xBD000000 /* PCIe Port 1 CFG Type 0 */
220#define CNS3XXX_PCIE1_CFG0_BASE_VIRT 0xEB000000
221
222#define CNS3XXX_PCIE1_CFG1_BASE 0xBE000000 /* PCIe Port 1 CFG Type 1 */
223#define CNS3XXX_PCIE1_CFG1_BASE_VIRT 0xEC000000
224
225#define CNS3XXX_PCIE1_MSG_BASE 0xBF000000 /* PCIe Port 1 Message Space */
226#define CNS3XXX_PCIE1_MSG_BASE_VIRT 0xED000000
227
228/*
229 * Testchip peripheral and fpga gic regions
230 */
231#define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */
232#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFF000000
233
234#define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */
235#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFF000100
236
237#define CNS3XXX_TC11MP_TWD_BASE 0x90000600
238#define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFF000600
239
240#define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */
241#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000
242
243#define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */
244#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000
245
246/*
247 * Misc block
248 */
249#define MISC_MEM_MAP(offs) (void __iomem *)(CNS3XXX_MISC_BASE_VIRT + (offs))
250#define MISC_MEM_MAP_VALUE(offset) (*((volatile unsigned int *)(CNS3XXX_MISC_BASE_VIRT + (offset))))
251
252#define MISC_MEMORY_REMAP_REG MISC_MEM_MAP_VALUE(0x00)
253#define MISC_CHIP_CONFIG_REG MISC_MEM_MAP_VALUE(0x04)
254#define MISC_DEBUG_PROBE_DATA_REG MISC_MEM_MAP_VALUE(0x08)
255#define MISC_DEBUG_PROBE_SELECTION_REG MISC_MEM_MAP_VALUE(0x0C)
256#define MISC_IO_PIN_FUNC_SELECTION_REG MISC_MEM_MAP_VALUE(0x10)
257#define MISC_GPIOA_PIN_ENABLE_REG MISC_MEM_MAP_VALUE(0x14)
258#define MISC_GPIOB_PIN_ENABLE_REG MISC_MEM_MAP_VALUE(0x18)
259#define MISC_IO_PAD_DRIVE_STRENGTH_CTRL_A MISC_MEM_MAP_VALUE(0x1C)
260#define MISC_IO_PAD_DRIVE_STRENGTH_CTRL_B MISC_MEM_MAP_VALUE(0x20)
261#define MISC_GPIOA_15_0_PULL_CTRL_REG MISC_MEM_MAP_VALUE(0x24)
262#define MISC_GPIOA_16_31_PULL_CTRL_REG MISC_MEM_MAP_VALUE(0x28)
263#define MISC_GPIOB_15_0_PULL_CTRL_REG MISC_MEM_MAP_VALUE(0x2C)
264#define MISC_GPIOB_16_31_PULL_CTRL_REG MISC_MEM_MAP_VALUE(0x30)
265#define MISC_IO_PULL_CTRL_REG MISC_MEM_MAP_VALUE(0x34)
266#define MISC_E_FUSE_31_0_REG MISC_MEM_MAP_VALUE(0x40)
267#define MISC_E_FUSE_63_32_REG MISC_MEM_MAP_VALUE(0x44)
268#define MISC_E_FUSE_95_64_REG MISC_MEM_MAP_VALUE(0x48)
269#define MISC_E_FUSE_127_96_REG MISC_MEM_MAP_VALUE(0x4C)
270#define MISC_SOFTWARE_TEST_1_REG MISC_MEM_MAP_VALUE(0x50)
271#define MISC_SOFTWARE_TEST_2_REG MISC_MEM_MAP_VALUE(0x54)
272
273#define MISC_SATA_POWER_MODE MISC_MEM_MAP_VALUE(0x310)
274
275#define MISC_USB_CFG_REG MISC_MEM_MAP_VALUE(0x800)
276#define MISC_USB_STS_REG MISC_MEM_MAP_VALUE(0x804)
277#define MISC_USBPHY00_CFG_REG MISC_MEM_MAP_VALUE(0x808)
278#define MISC_USBPHY01_CFG_REG MISC_MEM_MAP_VALUE(0x80c)
279#define MISC_USBPHY10_CFG_REG MISC_MEM_MAP_VALUE(0x810)
280#define MISC_USBPHY11_CFG_REG MISC_MEM_MAP_VALUE(0x814)
281
282#define MISC_PCIEPHY_CMCTL(x) MISC_MEM_MAP(0x900 + (x) * 0x004)
283#define MISC_PCIEPHY_CTL(x) MISC_MEM_MAP(0x940 + (x) * 0x100)
284#define MISC_PCIE_AXIS_AWMISC(x) MISC_MEM_MAP(0x944 + (x) * 0x100)
285#define MISC_PCIE_AXIS_ARMISC(x) MISC_MEM_MAP(0x948 + (x) * 0x100)
286#define MISC_PCIE_AXIS_RMISC(x) MISC_MEM_MAP(0x94C + (x) * 0x100)
287#define MISC_PCIE_AXIS_BMISC(x) MISC_MEM_MAP(0x950 + (x) * 0x100)
288#define MISC_PCIE_AXIM_RMISC(x) MISC_MEM_MAP(0x954 + (x) * 0x100)
289#define MISC_PCIE_AXIM_BMISC(x) MISC_MEM_MAP(0x958 + (x) * 0x100)
290#define MISC_PCIE_CTRL(x) MISC_MEM_MAP(0x95C + (x) * 0x100)
291#define MISC_PCIE_PM_DEBUG(x) MISC_MEM_MAP(0x960 + (x) * 0x100)
292#define MISC_PCIE_RFC_DEBUG(x) MISC_MEM_MAP(0x964 + (x) * 0x100)
293#define MISC_PCIE_CXPL_DEBUGL(x) MISC_MEM_MAP(0x968 + (x) * 0x100)
294#define MISC_PCIE_CXPL_DEBUGH(x) MISC_MEM_MAP(0x96C + (x) * 0x100)
295#define MISC_PCIE_DIAG_DEBUGH(x) MISC_MEM_MAP(0x970 + (x) * 0x100)
296#define MISC_PCIE_W1CLR(x) MISC_MEM_MAP(0x974 + (x) * 0x100)
297#define MISC_PCIE_INT_MASK(x) MISC_MEM_MAP(0x978 + (x) * 0x100)
298#define MISC_PCIE_INT_STATUS(x) MISC_MEM_MAP(0x97C + (x) * 0x100)
299
300/*
301 * Power management and clock control
302 */
303#define PMU_REG_VALUE(offset) (*((volatile unsigned int *)(CNS3XXX_PM_BASE_VIRT + (offset))))
304
305#define PM_CLK_GATE_REG PMU_REG_VALUE(0x000)
306#define PM_SOFT_RST_REG PMU_REG_VALUE(0x004)
307#define PM_HS_CFG_REG PMU_REG_VALUE(0x008)
308#define PM_CACTIVE_STA_REG PMU_REG_VALUE(0x00C)
309#define PM_PWR_STA_REG PMU_REG_VALUE(0x010)
310#define PM_CLK_CTRL_REG PMU_REG_VALUE(0x014)
311#define PM_PLL_LCD_I2S_CTRL_REG PMU_REG_VALUE(0x018)
312#define PM_PLL_HM_PD_CTRL_REG PMU_REG_VALUE(0x01C)
313#define PM_REGULAT_CTRL_REG PMU_REG_VALUE(0x020)
314#define PM_WDT_CTRL_REG PMU_REG_VALUE(0x024)
315#define PM_WU_CTRL0_REG PMU_REG_VALUE(0x028)
316#define PM_WU_CTRL1_REG PMU_REG_VALUE(0x02C)
317#define PM_CSR_REG PMU_REG_VALUE(0x030)
318
319/* PM_CLK_GATE_REG */
320#define PM_CLK_GATE_REG_OFFSET_SDIO (25)
321#define PM_CLK_GATE_REG_OFFSET_GPU (24)
322#define PM_CLK_GATE_REG_OFFSET_CIM (23)
323#define PM_CLK_GATE_REG_OFFSET_LCDC (22)
324#define PM_CLK_GATE_REG_OFFSET_I2S (21)
325#define PM_CLK_GATE_REG_OFFSET_RAID (20)
326#define PM_CLK_GATE_REG_OFFSET_SATA (19)
327#define PM_CLK_GATE_REG_OFFSET_PCIE(x) (17 + (x))
328#define PM_CLK_GATE_REG_OFFSET_USB_HOST (16)
329#define PM_CLK_GATE_REG_OFFSET_USB_OTG (15)
330#define PM_CLK_GATE_REG_OFFSET_TIMER (14)
331#define PM_CLK_GATE_REG_OFFSET_CRYPTO (13)
332#define PM_CLK_GATE_REG_OFFSET_HCIE (12)
333#define PM_CLK_GATE_REG_OFFSET_SWITCH (11)
334#define PM_CLK_GATE_REG_OFFSET_GPIO (10)
335#define PM_CLK_GATE_REG_OFFSET_UART3 (9)
336#define PM_CLK_GATE_REG_OFFSET_UART2 (8)
337#define PM_CLK_GATE_REG_OFFSET_UART1 (7)
338#define PM_CLK_GATE_REG_OFFSET_RTC (5)
339#define PM_CLK_GATE_REG_OFFSET_GDMA (4)
340#define PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C (3)
341#define PM_CLK_GATE_REG_OFFSET_SMC_NFI (1)
342#define PM_CLK_GATE_REG_MASK (0x03FFFFBA)
343
344/* PM_SOFT_RST_REG */
345#define PM_SOFT_RST_REG_OFFST_WARM_RST_FLAG (31)
346#define PM_SOFT_RST_REG_OFFST_CPU1 (29)
347#define PM_SOFT_RST_REG_OFFST_CPU0 (28)
348#define PM_SOFT_RST_REG_OFFST_SDIO (25)
349#define PM_SOFT_RST_REG_OFFST_GPU (24)
350#define PM_SOFT_RST_REG_OFFST_CIM (23)
351#define PM_SOFT_RST_REG_OFFST_LCDC (22)
352#define PM_SOFT_RST_REG_OFFST_I2S (21)
353#define PM_SOFT_RST_REG_OFFST_RAID (20)
354#define PM_SOFT_RST_REG_OFFST_SATA (19)
355#define PM_SOFT_RST_REG_OFFST_PCIE(x) (17 + (x))
356#define PM_SOFT_RST_REG_OFFST_USB_HOST (16)
357#define PM_SOFT_RST_REG_OFFST_USB_OTG (15)
358#define PM_SOFT_RST_REG_OFFST_TIMER (14)
359#define PM_SOFT_RST_REG_OFFST_CRYPTO (13)
360#define PM_SOFT_RST_REG_OFFST_HCIE (12)
361#define PM_SOFT_RST_REG_OFFST_SWITCH (11)
362#define PM_SOFT_RST_REG_OFFST_GPIO (10)
363#define PM_SOFT_RST_REG_OFFST_UART3 (9)
364#define PM_SOFT_RST_REG_OFFST_UART2 (8)
365#define PM_SOFT_RST_REG_OFFST_UART1 (7)
366#define PM_SOFT_RST_REG_OFFST_RTC (5)
367#define PM_SOFT_RST_REG_OFFST_GDMA (4)
368#define PM_SOFT_RST_REG_OFFST_SPI_PCM_I2C (3)
369#define PM_SOFT_RST_REG_OFFST_DMC (2)
370#define PM_SOFT_RST_REG_OFFST_SMC_NFI (1)
371#define PM_SOFT_RST_REG_OFFST_GLOBAL (0)
372#define PM_SOFT_RST_REG_MASK (0xF3FFFFBF)
373
374/* PMHS_CFG_REG */
375#define PM_HS_CFG_REG_OFFSET_SDIO (25)
376#define PM_HS_CFG_REG_OFFSET_GPU (24)
377#define PM_HS_CFG_REG_OFFSET_CIM (23)
378#define PM_HS_CFG_REG_OFFSET_LCDC (22)
379#define PM_HS_CFG_REG_OFFSET_I2S (21)
380#define PM_HS_CFG_REG_OFFSET_RAID (20)
381#define PM_HS_CFG_REG_OFFSET_SATA (19)
382#define PM_HS_CFG_REG_OFFSET_PCIE1 (18)
383#define PM_HS_CFG_REG_OFFSET_PCIE0 (17)
384#define PM_HS_CFG_REG_OFFSET_USB_HOST (16)
385#define PM_HS_CFG_REG_OFFSET_USB_OTG (15)
386#define PM_HS_CFG_REG_OFFSET_TIMER (14)
387#define PM_HS_CFG_REG_OFFSET_CRYPTO (13)
388#define PM_HS_CFG_REG_OFFSET_HCIE (12)
389#define PM_HS_CFG_REG_OFFSET_SWITCH (11)
390#define PM_HS_CFG_REG_OFFSET_GPIO (10)
391#define PM_HS_CFG_REG_OFFSET_UART3 (9)
392#define PM_HS_CFG_REG_OFFSET_UART2 (8)
393#define PM_HS_CFG_REG_OFFSET_UART1 (7)
394#define PM_HS_CFG_REG_OFFSET_RTC (5)
395#define PM_HS_CFG_REG_OFFSET_GDMA (4)
396#define PM_HS_CFG_REG_OFFSET_SPI_PCM_I2S (3)
397#define PM_HS_CFG_REG_OFFSET_DMC (2)
398#define PM_HS_CFG_REG_OFFSET_SMC_NFI (1)
399#define PM_HS_CFG_REG_MASK (0x03FFFFBE)
400#define PM_HS_CFG_REG_MASK_SUPPORT (0x01100806)
401
402/* PM_CACTIVE_STA_REG */
403#define PM_CACTIVE_STA_REG_OFFSET_SDIO (25)
404#define PM_CACTIVE_STA_REG_OFFSET_GPU (24)
405#define PM_CACTIVE_STA_REG_OFFSET_CIM (23)
406#define PM_CACTIVE_STA_REG_OFFSET_LCDC (22)
407#define PM_CACTIVE_STA_REG_OFFSET_I2S (21)
408#define PM_CACTIVE_STA_REG_OFFSET_RAID (20)
409#define PM_CACTIVE_STA_REG_OFFSET_SATA (19)
410#define PM_CACTIVE_STA_REG_OFFSET_PCIE1 (18)
411#define PM_CACTIVE_STA_REG_OFFSET_PCIE0 (17)
412#define PM_CACTIVE_STA_REG_OFFSET_USB_HOST (16)
413#define PM_CACTIVE_STA_REG_OFFSET_USB_OTG (15)
414#define PM_CACTIVE_STA_REG_OFFSET_TIMER (14)
415#define PM_CACTIVE_STA_REG_OFFSET_CRYPTO (13)
416#define PM_CACTIVE_STA_REG_OFFSET_HCIE (12)
417#define PM_CACTIVE_STA_REG_OFFSET_SWITCH (11)
418#define PM_CACTIVE_STA_REG_OFFSET_GPIO (10)
419#define PM_CACTIVE_STA_REG_OFFSET_UART3 (9)
420#define PM_CACTIVE_STA_REG_OFFSET_UART2 (8)
421#define PM_CACTIVE_STA_REG_OFFSET_UART1 (7)
422#define PM_CACTIVE_STA_REG_OFFSET_RTC (5)
423#define PM_CACTIVE_STA_REG_OFFSET_GDMA (4)
424#define PM_CACTIVE_STA_REG_OFFSET_SPI_PCM_I2S (3)
425#define PM_CACTIVE_STA_REG_OFFSET_DMC (2)
426#define PM_CACTIVE_STA_REG_OFFSET_SMC_NFI (1)
427#define PM_CACTIVE_STA_REG_MASK (0x03FFFFBE)
428
429/* PM_PWR_STA_REG */
430#define PM_PWR_STA_REG_REG_OFFSET_SDIO (25)
431#define PM_PWR_STA_REG_REG_OFFSET_GPU (24)
432#define PM_PWR_STA_REG_REG_OFFSET_CIM (23)
433#define PM_PWR_STA_REG_REG_OFFSET_LCDC (22)
434#define PM_PWR_STA_REG_REG_OFFSET_I2S (21)
435#define PM_PWR_STA_REG_REG_OFFSET_RAID (20)
436#define PM_PWR_STA_REG_REG_OFFSET_SATA (19)
437#define PM_PWR_STA_REG_REG_OFFSET_PCIE1 (18)
438#define PM_PWR_STA_REG_REG_OFFSET_PCIE0 (17)
439#define PM_PWR_STA_REG_REG_OFFSET_USB_HOST (16)
440#define PM_PWR_STA_REG_REG_OFFSET_USB_OTG (15)
441#define PM_PWR_STA_REG_REG_OFFSET_TIMER (14)
442#define PM_PWR_STA_REG_REG_OFFSET_CRYPTO (13)
443#define PM_PWR_STA_REG_REG_OFFSET_HCIE (12)
444#define PM_PWR_STA_REG_REG_OFFSET_SWITCH (11)
445#define PM_PWR_STA_REG_REG_OFFSET_GPIO (10)
446#define PM_PWR_STA_REG_REG_OFFSET_UART3 (9)
447#define PM_PWR_STA_REG_REG_OFFSET_UART2 (8)
448#define PM_PWR_STA_REG_REG_OFFSET_UART1 (7)
449#define PM_PWR_STA_REG_REG_OFFSET_RTC (5)
450#define PM_PWR_STA_REG_REG_OFFSET_GDMA (4)
451#define PM_PWR_STA_REG_REG_OFFSET_SPI_PCM_I2S (3)
452#define PM_PWR_STA_REG_REG_OFFSET_DMC (2)
453#define PM_PWR_STA_REG_REG_OFFSET_SMC_NFI (1)
454#define PM_PWR_STA_REG_REG_MASK (0x03FFFFBE)
455
456/* PM_CLK_CTRL_REG */
457#define PM_CLK_CTRL_REG_OFFSET_I2S_MCLK (31)
458#define PM_CLK_CTRL_REG_OFFSET_DDR2_CHG_EN (30)
459#define PM_CLK_CTRL_REG_OFFSET_PCIE_REF1_EN (29)
460#define PM_CLK_CTRL_REG_OFFSET_PCIE_REF0_EN (28)
461#define PM_CLK_CTRL_REG_OFFSET_TIMER_SIM_MODE (27)
462#define PM_CLK_CTRL_REG_OFFSET_I2SCLK_DIV (24)
463#define PM_CLK_CTRL_REG_OFFSET_I2SCLK_SEL (22)
464#define PM_CLK_CTRL_REG_OFFSET_CLKOUT_DIV (20)
465#define PM_CLK_CTRL_REG_OFFSET_CLKOUT_SEL (16)
466#define PM_CLK_CTRL_REG_OFFSET_MDC_DIV (14)
467#define PM_CLK_CTRL_REG_OFFSET_CRYPTO_CLK_SEL (12)
468#define PM_CLK_CTRL_REG_OFFSET_CPU_PWR_MODE (9)
469#define PM_CLK_CTRL_REG_OFFSET_PLL_DDR2_SEL (7)
470#define PM_CLK_CTRL_REG_OFFSET_DIV_IMMEDIATE (6)
471#define PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV (4)
472#define PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL (0)
473
474#define PM_CPU_CLK_DIV(DIV) { \
475 PM_CLK_CTRL_REG &= ~((0x3) << PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV); \
476 PM_CLK_CTRL_REG |= (((DIV)&0x3) << PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV); \
477}
478
479#define PM_PLL_CPU_SEL(CPU) { \
480 PM_CLK_CTRL_REG &= ~((0xF) << PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL); \
481 PM_CLK_CTRL_REG |= (((CPU)&0xF) << PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL); \
482}
483
484/* PM_PLL_LCD_I2S_CTRL_REG */
485#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_MCLK_SMC_DIV (22)
486#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_R_SEL (17)
487#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_PLL_LCD_P (11)
488#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_PLL_LCD_M (3)
489#define PM_PLL_LCD_I2S_CTRL_REG_OFFSET_PLL_LCD_S (0)
490
491/* PM_PLL_HM_PD_CTRL_REG */
492#define PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1 (11)
493#define PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0 (10)
494#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_I2SCD (6)
495#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_I2S (5)
496#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_LCD (4)
497#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB (3)
498#define PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_RGMII (2)
499#define PM_PLL_HM_PD_CTRL_REG_MASK (0x00000C7C)
500
501/* PM_WDT_CTRL_REG */
502#define PM_WDT_CTRL_REG_OFFSET_RESET_CPU_ONLY (0)
503
504/* PM_CSR_REG - Clock Scaling Register*/
505#define PM_CSR_REG_OFFSET_CSR_EN (30)
506#define PM_CSR_REG_OFFSET_CSR_NUM (0)
507
508#define CNS3XXX_PWR_CLK_EN(BLOCK) (0x1<<PM_CLK_GATE_REG_OFFSET_##BLOCK)
509
510/* Software reset*/
511#define CNS3XXX_PWR_SOFTWARE_RST(BLOCK) (0x1<<PM_SOFT_RST_REG_OFFST_##BLOCK)
512
513/*
514 * CNS3XXX support several power saving mode as following,
515 * DFS, IDLE, HALT, DOZE, SLEEP, Hibernate
516 */
517#define CNS3XXX_PWR_CPU_MODE_DFS (0)
518#define CNS3XXX_PWR_CPU_MODE_IDLE (1)
519#define CNS3XXX_PWR_CPU_MODE_HALT (2)
520#define CNS3XXX_PWR_CPU_MODE_DOZE (3)
521#define CNS3XXX_PWR_CPU_MODE_SLEEP (4)
522#define CNS3XXX_PWR_CPU_MODE_HIBERNATE (5)
523
524#define CNS3XXX_PWR_PLL(BLOCK) (0x1<<PM_PLL_HM_PD_CTRL_REG_OFFSET_##BLOCK)
525#define CNS3XXX_PWR_PLL_ALL PM_PLL_HM_PD_CTRL_REG_MASK
526
527/* Change CPU frequency and divider */
528#define CNS3XXX_PWR_PLL_CPU_300MHZ (0)
529#define CNS3XXX_PWR_PLL_CPU_333MHZ (1)
530#define CNS3XXX_PWR_PLL_CPU_366MHZ (2)
531#define CNS3XXX_PWR_PLL_CPU_400MHZ (3)
532#define CNS3XXX_PWR_PLL_CPU_433MHZ (4)
533#define CNS3XXX_PWR_PLL_CPU_466MHZ (5)
534#define CNS3XXX_PWR_PLL_CPU_500MHZ (6)
535#define CNS3XXX_PWR_PLL_CPU_533MHZ (7)
536#define CNS3XXX_PWR_PLL_CPU_566MHZ (8)
537#define CNS3XXX_PWR_PLL_CPU_600MHZ (9)
538#define CNS3XXX_PWR_PLL_CPU_633MHZ (10)
539#define CNS3XXX_PWR_PLL_CPU_666MHZ (11)
540#define CNS3XXX_PWR_PLL_CPU_700MHZ (12)
541
542#define CNS3XXX_PWR_CPU_CLK_DIV_BY1 (0)
543#define CNS3XXX_PWR_CPU_CLK_DIV_BY2 (1)
544#define CNS3XXX_PWR_CPU_CLK_DIV_BY4 (2)
545
546/* Change DDR2 frequency */
547#define CNS3XXX_PWR_PLL_DDR2_200MHZ (0)
548#define CNS3XXX_PWR_PLL_DDR2_266MHZ (1)
549#define CNS3XXX_PWR_PLL_DDR2_333MHZ (2)
550#define CNS3XXX_PWR_PLL_DDR2_400MHZ (3)
551
552void cns3xxx_pwr_soft_rst(unsigned int block);
553void cns3xxx_pwr_clk_en(unsigned int block);
554int cns3xxx_cpu_clock(void);
555
556/*
557 * ARM11 MPCore interrupt sources (primary GIC)
558 */
559#define IRQ_CNS3XXX_PMU (IRQ_TC11MP_GIC_START + 0)
560#define IRQ_CNS3XXX_SDIO (IRQ_TC11MP_GIC_START + 1)
561#define IRQ_CNS3XXX_L2CC (IRQ_TC11MP_GIC_START + 2)
562#define IRQ_CNS3XXX_RTC (IRQ_TC11MP_GIC_START + 3)
563#define IRQ_CNS3XXX_I2S (IRQ_TC11MP_GIC_START + 4)
564#define IRQ_CNS3XXX_PCM (IRQ_TC11MP_GIC_START + 5)
565#define IRQ_CNS3XXX_SPI (IRQ_TC11MP_GIC_START + 6)
566#define IRQ_CNS3XXX_I2C (IRQ_TC11MP_GIC_START + 7)
567#define IRQ_CNS3XXX_CIM (IRQ_TC11MP_GIC_START + 8)
568#define IRQ_CNS3XXX_GPU (IRQ_TC11MP_GIC_START + 9)
569#define IRQ_CNS3XXX_LCD (IRQ_TC11MP_GIC_START + 10)
570#define IRQ_CNS3XXX_GPIOA (IRQ_TC11MP_GIC_START + 11)
571#define IRQ_CNS3XXX_GPIOB (IRQ_TC11MP_GIC_START + 12)
572#define IRQ_CNS3XXX_UART0 (IRQ_TC11MP_GIC_START + 13)
573#define IRQ_CNS3XXX_UART1 (IRQ_TC11MP_GIC_START + 14)
574#define IRQ_CNS3XXX_UART2 (IRQ_TC11MP_GIC_START + 15)
575#define IRQ_CNS3XXX_ARM11 (IRQ_TC11MP_GIC_START + 16)
576
577#define IRQ_CNS3XXX_SW_STATUS (IRQ_TC11MP_GIC_START + 17)
578#define IRQ_CNS3XXX_SW_R0TXC (IRQ_TC11MP_GIC_START + 18)
579#define IRQ_CNS3XXX_SW_R0RXC (IRQ_TC11MP_GIC_START + 19)
580#define IRQ_CNS3XXX_SW_R0QE (IRQ_TC11MP_GIC_START + 20)
581#define IRQ_CNS3XXX_SW_R0QF (IRQ_TC11MP_GIC_START + 21)
582#define IRQ_CNS3XXX_SW_R1TXC (IRQ_TC11MP_GIC_START + 22)
583#define IRQ_CNS3XXX_SW_R1RXC (IRQ_TC11MP_GIC_START + 23)
584#define IRQ_CNS3XXX_SW_R1QE (IRQ_TC11MP_GIC_START + 24)
585#define IRQ_CNS3XXX_SW_R1QF (IRQ_TC11MP_GIC_START + 25)
586#define IRQ_CNS3XXX_SW_PPE (IRQ_TC11MP_GIC_START + 26)
587
588#define IRQ_CNS3XXX_CRYPTO (IRQ_TC11MP_GIC_START + 27)
589#define IRQ_CNS3XXX_HCIE (IRQ_TC11MP_GIC_START + 28)
590#define IRQ_CNS3XXX_PCIE0_DEVICE (IRQ_TC11MP_GIC_START + 29)
591#define IRQ_CNS3XXX_PCIE1_DEVICE (IRQ_TC11MP_GIC_START + 30)
592#define IRQ_CNS3XXX_USB_OTG (IRQ_TC11MP_GIC_START + 31)
593#define IRQ_CNS3XXX_USB_EHCI (IRQ_TC11MP_GIC_START + 32)
594#define IRQ_CNS3XXX_SATA (IRQ_TC11MP_GIC_START + 33)
595#define IRQ_CNS3XXX_RAID (IRQ_TC11MP_GIC_START + 34)
596#define IRQ_CNS3XXX_SMC (IRQ_TC11MP_GIC_START + 35)
597
598#define IRQ_CNS3XXX_DMAC_ABORT (IRQ_TC11MP_GIC_START + 36)
599#define IRQ_CNS3XXX_DMAC0 (IRQ_TC11MP_GIC_START + 37)
600#define IRQ_CNS3XXX_DMAC1 (IRQ_TC11MP_GIC_START + 38)
601#define IRQ_CNS3XXX_DMAC2 (IRQ_TC11MP_GIC_START + 39)
602#define IRQ_CNS3XXX_DMAC3 (IRQ_TC11MP_GIC_START + 40)
603#define IRQ_CNS3XXX_DMAC4 (IRQ_TC11MP_GIC_START + 41)
604#define IRQ_CNS3XXX_DMAC5 (IRQ_TC11MP_GIC_START + 42)
605#define IRQ_CNS3XXX_DMAC6 (IRQ_TC11MP_GIC_START + 43)
606#define IRQ_CNS3XXX_DMAC7 (IRQ_TC11MP_GIC_START + 44)
607#define IRQ_CNS3XXX_DMAC8 (IRQ_TC11MP_GIC_START + 45)
608#define IRQ_CNS3XXX_DMAC9 (IRQ_TC11MP_GIC_START + 46)
609#define IRQ_CNS3XXX_DMAC10 (IRQ_TC11MP_GIC_START + 47)
610#define IRQ_CNS3XXX_DMAC11 (IRQ_TC11MP_GIC_START + 48)
611#define IRQ_CNS3XXX_DMAC12 (IRQ_TC11MP_GIC_START + 49)
612#define IRQ_CNS3XXX_DMAC13 (IRQ_TC11MP_GIC_START + 50)
613#define IRQ_CNS3XXX_DMAC14 (IRQ_TC11MP_GIC_START + 51)
614#define IRQ_CNS3XXX_DMAC15 (IRQ_TC11MP_GIC_START + 52)
615#define IRQ_CNS3XXX_DMAC16 (IRQ_TC11MP_GIC_START + 53)
616#define IRQ_CNS3XXX_DMAC17 (IRQ_TC11MP_GIC_START + 54)
617
618#define IRQ_CNS3XXX_PCIE0_RC (IRQ_TC11MP_GIC_START + 55)
619#define IRQ_CNS3XXX_PCIE1_RC (IRQ_TC11MP_GIC_START + 56)
620#define IRQ_CNS3XXX_TIMER0 (IRQ_TC11MP_GIC_START + 57)
621#define IRQ_CNS3XXX_TIMER1 (IRQ_TC11MP_GIC_START + 58)
622#define IRQ_CNS3XXX_USB_OHCI (IRQ_TC11MP_GIC_START + 59)
623#define IRQ_CNS3XXX_TIMER2 (IRQ_TC11MP_GIC_START + 60)
624#define IRQ_CNS3XXX_EXTERNAL_PIN0 (IRQ_TC11MP_GIC_START + 61)
625#define IRQ_CNS3XXX_EXTERNAL_PIN1 (IRQ_TC11MP_GIC_START + 62)
626#define IRQ_CNS3XXX_EXTERNAL_PIN2 (IRQ_TC11MP_GIC_START + 63)
627
628#define NR_IRQS_CNS3XXX (IRQ_TC11MP_GIC_START + 64)
629
630#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX)
631#undef NR_IRQS
632#define NR_IRQS NR_IRQS_CNS3XXX
633#endif
634
635#endif /* __MACH_BOARD_CNS3XXX_H */
diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
new file mode 100644
index 000000000000..d16ce7eb00e9
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
@@ -0,0 +1,21 @@
1/*
2 * Debugging macro include header
3 *
4 * Copyright 1994-1999 Russell King
5 * Copyright 2008 Cavium Networks
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This file is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License, Version 2, as
10 * published by the Free Software Foundation.
11 */
12
13 .macro addruart,rx
14 mrc p15, 0, \rx, c1, c0
15 tst \rx, #1 @ MMU enabled?
16 moveq \rx, #0x10000000
17 movne \rx, #0xf0000000 @ virtual base
18 orr \rx, \rx, #0x00009000
19 .endm
20
21#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
new file mode 100644
index 000000000000..5e1c5545680f
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -0,0 +1,82 @@
1/*
2 * Low-level IRQ helper macros for Cavium Networks platforms
3 *
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#include <mach/hardware.h>
12#include <asm/hardware/gic.h>
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =gic_cpu_base_addr
19 ldr \base, [\base]
20 .endm
21
22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25 /*
26 * The interrupt numbering scheme is defined in the
27 * interrupt controller spec. To wit:
28 *
29 * Interrupts 0-15 are IPI
30 * 16-28 are reserved
31 * 29-31 are local. We allow 30 to be used for the watchdog.
32 * 32-1020 are global
33 * 1021-1022 are reserved
34 * 1023 is "spurious" (no interrupt)
35 *
36 * For now, we ignore all local interrupts so only return an interrupt if it's
37 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
38 *
39 * A simple read from the controller will tell us the number of the highest
40 * priority enabled interrupt. We then just need to check whether it is in the
41 * valid range for an IRQ (30-1020 inclusive).
42 */
43
44 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
45
46 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
47
48 ldr \tmp, =1021
49
50 bic \irqnr, \irqstat, #0x1c00
51
52 cmp \irqnr, #29
53 cmpcc \irqnr, \irqnr
54 cmpne \irqnr, \tmp
55 cmpcs \irqnr, \irqnr
56
57 .endm
58
59 /* We assume that irqstat (the raw value of the IRQ acknowledge
60 * register) is preserved from the macro above.
61 * If there is an IPI, we immediately signal end of interrupt on the
62 * controller, since this requires the original irqstat value which
63 * we won't easily be able to recreate later.
64 */
65
66 .macro test_for_ipi, irqnr, irqstat, base, tmp
67 bic \irqnr, \irqstat, #0x1c00
68 cmp \irqnr, #16
69 strcc \irqstat, [\base, #GIC_CPU_EOI]
70 cmpcs \irqnr, \irqnr
71 .endm
72
73 /* As above, this assumes that irqstat and base are preserved.. */
74
75 .macro test_for_ltirq, irqnr, irqstat, base, tmp
76 bic \irqnr, \irqstat, #0x1c00
77 mov \tmp, #0
78 cmp \irqnr, #29
79 moveq \tmp, #1
80 streq \irqstat, [\base, #GIC_CPU_EOI]
81 cmp \tmp, #0
82 .endm
diff --git a/arch/arm/mach-cns3xxx/include/mach/hardware.h b/arch/arm/mach-cns3xxx/include/mach/hardware.h
new file mode 100644
index 000000000000..57e09836f9d7
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/hardware.h
@@ -0,0 +1,22 @@
1/*
2 * This file contains the hardware definitions of the Cavium Networks boards.
3 *
4 * Copyright 2003 ARM Limited.
5 * Copyright 2008 Cavium Networks
6 *
7 * This file is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, Version 2, as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __MACH_HARDWARE_H
13#define __MACH_HARDWARE_H
14
15#include <asm/sizes.h>
16
17/* macro to get at IO space when running virtually */
18#define PCIBIOS_MIN_IO 0x00000000
19#define PCIBIOS_MIN_MEM 0x00000000
20#define pcibios_assign_all_busses() 1
21
22#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/io.h b/arch/arm/mach-cns3xxx/include/mach/io.h
new file mode 100644
index 000000000000..33b6fc1ece7c
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/io.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright 2008 Cavium Networks
3 * Copyright 2003 ARM Limited
4 *
5 * This file is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, Version 2, as
7 * published by the Free Software Foundation.
8 */
9#ifndef __MACH_IO_H
10#define __MACH_IO_H
11
12#define IO_SPACE_LIMIT 0xffffffff
13
14#define __io(a) __typesafe_io(a)
15#define __mem_pci(a) (a)
16
17#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/irqs.h b/arch/arm/mach-cns3xxx/include/mach/irqs.h
new file mode 100644
index 000000000000..2ab96f8085c8
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/irqs.h
@@ -0,0 +1,24 @@
1/*
2 * Copyright 2000 Deep Blue Solutions Ltd.
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __MACH_IRQS_H
12#define __MACH_IRQS_H
13
14#define IRQ_LOCALTIMER 29
15#define IRQ_LOCALWDOG 30
16#define IRQ_TC11MP_GIC_START 32
17
18#include <mach/cns3xxx.h>
19
20#ifndef NR_IRQS
21#error "NR_IRQS not defined by the board-specific files"
22#endif
23
24#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/memory.h b/arch/arm/mach-cns3xxx/include/mach/memory.h
new file mode 100644
index 000000000000..3b6b769b7a27
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/memory.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright 2003 ARM Limited
3 * Copyright 2008 Cavium Networks
4 *
5 * This file is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, Version 2, as
7 * published by the Free Software Foundation.
8 */
9
10#ifndef __MACH_MEMORY_H
11#define __MACH_MEMORY_H
12
13/*
14 * Physical DRAM offset.
15 */
16#define PHYS_OFFSET UL(0x00000000)
17
18#define __phys_to_bus(x) ((x) + PHYS_OFFSET)
19#define __bus_to_phys(x) ((x) - PHYS_OFFSET)
20
21#define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v))
22#define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b))
23#define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p))
24#define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b))
25
26#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
new file mode 100644
index 000000000000..58bb03ae3cf4
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright 2000 Deep Blue Solutions Ltd
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __MACH_SYSTEM_H
12#define __MACH_SYSTEM_H
13
14#include <linux/io.h>
15#include <asm/proc-fns.h>
16#include <mach/hardware.h>
17
18static inline void arch_idle(void)
19{
20 /*
21 * This should do all the clock switching
22 * and wait for interrupt tricks
23 */
24 cpu_do_idle();
25}
26
27void arch_reset(char mode, const char *cmd);
28
29#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/timex.h b/arch/arm/mach-cns3xxx/include/mach/timex.h
new file mode 100644
index 000000000000..1fd04217cacb
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/timex.h
@@ -0,0 +1,12 @@
1/*
2 * Cavium Networks architecture timex specifications
3 *
4 * Copyright 2003 ARM Limited
5 * Copyright 2008 Cavium Networks
6 *
7 * This file is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, Version 2, as
9 * published by the Free Software Foundation.
10 */
11
12#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
new file mode 100644
index 000000000000..de8ead9b91f7
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
@@ -0,0 +1,55 @@
1/*
2 * Copyright 2003 ARM Limited
3 * Copyright 2008 Cavium Networks
4 *
5 * This file is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, Version 2, as
7 * published by the Free Software Foundation.
8 */
9
10#include <asm/mach-types.h>
11#include <mach/hardware.h>
12#include <mach/cns3xxx.h>
13
14#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
15#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
16#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
17#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
18
19/*
20 * Return the UART base address
21 */
22static inline unsigned long get_uart_base(void)
23{
24 if (machine_is_cns3420vb())
25 return CNS3XXX_UART0_BASE;
26 else
27 return 0;
28}
29
30/*
31 * This does not append a newline
32 */
33static inline void putc(int c)
34{
35 unsigned long base = get_uart_base();
36
37 while (AMBA_UART_FR(base) & (1 << 5))
38 barrier();
39
40 AMBA_UART_DR(base) = c;
41}
42
43static inline void flush(void)
44{
45 unsigned long base = get_uart_base();
46
47 while (AMBA_UART_FR(base) & (1 << 3))
48 barrier();
49}
50
51/*
52 * nothing to do
53 */
54#define arch_decomp_setup()
55#define arch_decomp_wdog()
diff --git a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
new file mode 100644
index 000000000000..4d381ec05278
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
@@ -0,0 +1,11 @@
1/*
2 * Copyright 2000 Russell King.
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#define VMALLOC_END 0xd8000000
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
new file mode 100644
index 000000000000..725e1a4fc231
--- /dev/null
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -0,0 +1,86 @@
1/*
2 * Copyright 2008 Cavium Networks
3 *
4 * This file is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, Version 2, as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/delay.h>
10#include <mach/system.h>
11#include <mach/cns3xxx.h>
12
13void cns3xxx_pwr_clk_en(unsigned int block)
14{
15 PM_CLK_GATE_REG |= (block & PM_CLK_GATE_REG_MASK);
16}
17
18void cns3xxx_pwr_power_up(unsigned int block)
19{
20 PM_PLL_HM_PD_CTRL_REG &= ~(block & CNS3XXX_PWR_PLL_ALL);
21
22 /* Wait for 300us for the PLL output clock locked. */
23 udelay(300);
24};
25
26void cns3xxx_pwr_power_down(unsigned int block)
27{
28 /* write '1' to power down */
29 PM_PLL_HM_PD_CTRL_REG |= (block & CNS3XXX_PWR_PLL_ALL);
30};
31
32static void cns3xxx_pwr_soft_rst_force(unsigned int block)
33{
34 /*
35 * bit 0, 28, 29 => program low to reset,
36 * the other else program low and then high
37 */
38 if (block & 0x30000001) {
39 PM_SOFT_RST_REG &= ~(block & PM_SOFT_RST_REG_MASK);
40 } else {
41 PM_SOFT_RST_REG &= ~(block & PM_SOFT_RST_REG_MASK);
42 PM_SOFT_RST_REG |= (block & PM_SOFT_RST_REG_MASK);
43 }
44}
45
46void cns3xxx_pwr_soft_rst(unsigned int block)
47{
48 static unsigned int soft_reset;
49
50 if (soft_reset & block) {
51 /* SPI/I2C/GPIO use the same block, reset once. */
52 return;
53 } else {
54 soft_reset |= block;
55 }
56 cns3xxx_pwr_soft_rst_force(block);
57}
58
59void arch_reset(char mode, const char *cmd)
60{
61 /*
62 * To reset, we hit the on-board reset register
63 * in the system FPGA.
64 */
65 cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(GLOBAL));
66}
67
68/*
69 * cns3xxx_cpu_clock - return CPU/L2 clock
70 * aclk: cpu clock/2
71 * hclk: cpu clock/4
72 * pclk: cpu clock/8
73 */
74int cns3xxx_cpu_clock(void)
75{
76 int cpu;
77 int cpu_sel;
78 int div_sel;
79
80 cpu_sel = (PM_CLK_CTRL_REG >> PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL) & 0xf;
81 div_sel = (PM_CLK_CTRL_REG >> PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV) & 0x3;
82
83 cpu = (300 + ((cpu_sel / 3) * 100) + ((cpu_sel % 3) * 33)) >> div_sel;
84
85 return cpu;
86}
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 0ebe185610bf..0316e201ada0 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -7,6 +7,7 @@ config CP_INTC
7 bool 7 bool
8 8
9config ARCH_DAVINCI_DMx 9config ARCH_DAVINCI_DMx
10 select CPU_ARM926T
10 bool 11 bool
11 12
12menu "TI DaVinci Implementations" 13menu "TI DaVinci Implementations"
@@ -41,6 +42,7 @@ config ARCH_DAVINCI_DA850
41 select ARCH_HAS_CPUFREQ 42 select ARCH_HAS_CPUFREQ
42 43
43config ARCH_DAVINCI_DA8XX 44config ARCH_DAVINCI_DA8XX
45 select CPU_ARM926T
44 bool 46 bool
45 47
46config ARCH_DAVINCI_DM365 48config ARCH_DAVINCI_DM365
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index dc19870b23cd..212d97084bd7 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -33,9 +33,6 @@
33#define DA830_EVM_PHY_MASK 0x0 33#define DA830_EVM_PHY_MASK 0x0
34#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ 34#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
35 35
36#define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000
37#define DA830_EMIF25_CONTROL_BASE 0x68000000
38
39/* 36/*
40 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. 37 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
41 */ 38 */
@@ -157,7 +154,7 @@ static __init void da830_evm_usb_init(void)
157 __func__, ret); 154 __func__, ret);
158 } 155 }
159 156
160 ret = da8xx_pinmux_setup(da830_evm_usb11_pins); 157 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
161 if (ret) { 158 if (ret) {
162 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n", 159 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
163 __func__, ret); 160 __func__, ret);
@@ -229,15 +226,22 @@ static const short da830_evm_mmc_sd_pins[] = {
229}; 226};
230 227
231#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1) 228#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
229#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
232 230
233static int da830_evm_mmc_get_ro(int index) 231static int da830_evm_mmc_get_ro(int index)
234{ 232{
235 return gpio_get_value(DA830_MMCSD_WP_PIN); 233 return gpio_get_value(DA830_MMCSD_WP_PIN);
236} 234}
237 235
236static int da830_evm_mmc_get_cd(int index)
237{
238 return !gpio_get_value(DA830_MMCSD_CD_PIN);
239}
240
238static struct davinci_mmc_config da830_evm_mmc_config = { 241static struct davinci_mmc_config da830_evm_mmc_config = {
239 .get_ro = da830_evm_mmc_get_ro, 242 .get_ro = da830_evm_mmc_get_ro,
240 .wires = 4, 243 .get_cd = da830_evm_mmc_get_cd,
244 .wires = 8,
241 .max_freq = 50000000, 245 .max_freq = 50000000,
242 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 246 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
243 .version = MMC_CTLR_VERSION_2, 247 .version = MMC_CTLR_VERSION_2,
@@ -247,7 +251,7 @@ static inline void da830_evm_init_mmc(void)
247{ 251{
248 int ret; 252 int ret;
249 253
250 ret = da8xx_pinmux_setup(da830_evm_mmc_sd_pins); 254 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
251 if (ret) { 255 if (ret) {
252 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n", 256 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
253 ret); 257 ret);
@@ -262,6 +266,14 @@ static inline void da830_evm_init_mmc(void)
262 } 266 }
263 gpio_direction_input(DA830_MMCSD_WP_PIN); 267 gpio_direction_input(DA830_MMCSD_WP_PIN);
264 268
269 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
270 if (ret) {
271 pr_warning("da830_evm_init: can not open GPIO %d\n",
272 DA830_MMCSD_CD_PIN);
273 return;
274 }
275 gpio_direction_input(DA830_MMCSD_CD_PIN);
276
265 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config); 277 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
266 if (ret) { 278 if (ret) {
267 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n", 279 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
@@ -360,13 +372,13 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
360 372
361static struct resource da830_evm_nand_resources[] = { 373static struct resource da830_evm_nand_resources[] = {
362 [0] = { /* First memory resource is NAND I/O window */ 374 [0] = { /* First memory resource is NAND I/O window */
363 .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE, 375 .start = DA8XX_AEMIF_CS3_BASE,
364 .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1, 376 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
365 .flags = IORESOURCE_MEM, 377 .flags = IORESOURCE_MEM,
366 }, 378 },
367 [1] = { /* Second memory resource is AEMIF control registers */ 379 [1] = { /* Second memory resource is AEMIF control registers */
368 .start = DA830_EMIF25_CONTROL_BASE, 380 .start = DA8XX_AEMIF_CTL_BASE,
369 .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1, 381 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
370 .flags = IORESOURCE_MEM, 382 .flags = IORESOURCE_MEM,
371 }, 383 },
372}; 384};
@@ -392,7 +404,7 @@ static inline void da830_evm_init_nand(int mux_mode)
392 return; 404 return;
393 } 405 }
394 406
395 ret = da8xx_pinmux_setup(da830_evm_emif25_pins); 407 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
396 if (ret) 408 if (ret)
397 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n", 409 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
398 ret); 410 ret);
@@ -412,7 +424,7 @@ static inline void da830_evm_init_lcdc(int mux_mode)
412{ 424{
413 int ret; 425 int ret;
414 426
415 ret = da8xx_pinmux_setup(da830_lcdcntl_pins); 427 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
416 if (ret) 428 if (ret)
417 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n", 429 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
418 ret); 430 ret);
@@ -492,7 +504,7 @@ static __init void da830_evm_init(void)
492 pr_warning("da830_evm_init: edma registration failed: %d\n", 504 pr_warning("da830_evm_init: edma registration failed: %d\n",
493 ret); 505 ret);
494 506
495 ret = da8xx_pinmux_setup(da830_i2c0_pins); 507 ret = davinci_cfg_reg_list(da830_i2c0_pins);
496 if (ret) 508 if (ret)
497 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n", 509 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
498 ret); 510 ret);
@@ -508,7 +520,7 @@ static __init void da830_evm_init(void)
508 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY; 520 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
509 soc_info->emac_pdata->rmii_en = 1; 521 soc_info->emac_pdata->rmii_en = 1;
510 522
511 ret = da8xx_pinmux_setup(da830_cpgmac_pins); 523 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
512 if (ret) 524 if (ret)
513 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n", 525 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
514 ret); 526 ret);
@@ -527,7 +539,7 @@ static __init void da830_evm_init(void)
527 i2c_register_board_info(1, da830_evm_i2c_devices, 539 i2c_register_board_info(1, da830_evm_i2c_devices,
528 ARRAY_SIZE(da830_evm_i2c_devices)); 540 ARRAY_SIZE(da830_evm_i2c_devices));
529 541
530 ret = da8xx_pinmux_setup(da830_evm_mcasp1_pins); 542 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
531 if (ret) 543 if (ret)
532 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", 544 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
533 ret); 545 ret);
@@ -549,14 +561,6 @@ static int __init da830_evm_console_init(void)
549console_initcall(da830_evm_console_init); 561console_initcall(da830_evm_console_init);
550#endif 562#endif
551 563
552static __init void da830_evm_irq_init(void)
553{
554 struct davinci_soc_info *soc_info = &davinci_soc_info;
555
556 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
557 soc_info->intc_irq_prios);
558}
559
560static void __init da830_evm_map_io(void) 564static void __init da830_evm_map_io(void)
561{ 565{
562 da830_init(); 566 da830_init();
@@ -567,7 +571,7 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
567 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 571 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
568 .boot_params = (DA8XX_DDR_BASE + 0x100), 572 .boot_params = (DA8XX_DDR_BASE + 0x100),
569 .map_io = da830_evm_map_io, 573 .map_io = da830_evm_map_io,
570 .init_irq = da830_evm_irq_init, 574 .init_irq = cp_intc_init,
571 .timer = &davinci_timer, 575 .timer = &davinci_timer,
572 .init_machine = da830_evm_init, 576 .init_machine = da830_evm_init,
573MACHINE_END 577MACHINE_END
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 411284d0b0fa..abd04932917b 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -206,12 +206,12 @@ static __init void da850_evm_setup_nor_nand(void)
206 int ret = 0; 206 int ret = 0;
207 207
208 if (ui_card_detected & !HAS_MMC) { 208 if (ui_card_detected & !HAS_MMC) {
209 ret = da8xx_pinmux_setup(da850_nand_pins); 209 ret = davinci_cfg_reg_list(da850_nand_pins);
210 if (ret) 210 if (ret)
211 pr_warning("da850_evm_init: nand mux setup failed: " 211 pr_warning("da850_evm_init: nand mux setup failed: "
212 "%d\n", ret); 212 "%d\n", ret);
213 213
214 ret = da8xx_pinmux_setup(da850_nor_pins); 214 ret = davinci_cfg_reg_list(da850_nor_pins);
215 if (ret) 215 if (ret)
216 pr_warning("da850_evm_init: nor mux setup failed: %d\n", 216 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
217 ret); 217 ret);
@@ -568,12 +568,12 @@ static int __init da850_evm_config_emac(void)
568 568
569 if (rmii_en) { 569 if (rmii_en) {
570 val |= BIT(8); 570 val |= BIT(8);
571 ret = da8xx_pinmux_setup(da850_rmii_pins); 571 ret = davinci_cfg_reg_list(da850_rmii_pins);
572 pr_info("EMAC: RMII PHY configured, MII PHY will not be" 572 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
573 " functional\n"); 573 " functional\n");
574 } else { 574 } else {
575 val &= ~BIT(8); 575 val &= ~BIT(8);
576 ret = da8xx_pinmux_setup(da850_cpgmac_pins); 576 ret = davinci_cfg_reg_list(da850_cpgmac_pins);
577 pr_info("EMAC: MII PHY configured, RMII PHY will not be" 577 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
578 " functional\n"); 578 " functional\n");
579 } 579 }
@@ -626,7 +626,7 @@ static __init void da850_evm_init(void)
626 pr_warning("da850_evm_init: edma registration failed: %d\n", 626 pr_warning("da850_evm_init: edma registration failed: %d\n",
627 ret); 627 ret);
628 628
629 ret = da8xx_pinmux_setup(da850_i2c0_pins); 629 ret = davinci_cfg_reg_list(da850_i2c0_pins);
630 if (ret) 630 if (ret)
631 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n", 631 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
632 ret); 632 ret);
@@ -643,7 +643,7 @@ static __init void da850_evm_init(void)
643 ret); 643 ret);
644 644
645 if (HAS_MMC) { 645 if (HAS_MMC) {
646 ret = da8xx_pinmux_setup(da850_mmcsd0_pins); 646 ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
647 if (ret) 647 if (ret)
648 pr_warning("da850_evm_init: mmcsd0 mux setup failed:" 648 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
649 " %d\n", ret); 649 " %d\n", ret);
@@ -679,20 +679,20 @@ static __init void da850_evm_init(void)
679 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); 679 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
680 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); 680 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
681 681
682 ret = da8xx_pinmux_setup(da850_mcasp_pins); 682 ret = davinci_cfg_reg_list(da850_mcasp_pins);
683 if (ret) 683 if (ret)
684 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", 684 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
685 ret); 685 ret);
686 686
687 da8xx_register_mcasp(0, &da850_evm_snd_data); 687 da8xx_register_mcasp(0, &da850_evm_snd_data);
688 688
689 ret = da8xx_pinmux_setup(da850_lcdcntl_pins); 689 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
690 if (ret) 690 if (ret)
691 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", 691 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
692 ret); 692 ret);
693 693
694 /* Handle board specific muxing for LCD here */ 694 /* Handle board specific muxing for LCD here */
695 ret = da8xx_pinmux_setup(da850_evm_lcdc_pins); 695 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
696 if (ret) 696 if (ret)
697 pr_warning("da850_evm_init: evm specific lcd mux setup " 697 pr_warning("da850_evm_init: evm specific lcd mux setup "
698 "failed: %d\n", ret); 698 "failed: %d\n", ret);
@@ -736,14 +736,6 @@ static int __init da850_evm_console_init(void)
736console_initcall(da850_evm_console_init); 736console_initcall(da850_evm_console_init);
737#endif 737#endif
738 738
739static __init void da850_evm_irq_init(void)
740{
741 struct davinci_soc_info *soc_info = &davinci_soc_info;
742
743 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
744 soc_info->intc_irq_prios);
745}
746
747static void __init da850_evm_map_io(void) 739static void __init da850_evm_map_io(void)
748{ 740{
749 da850_init(); 741 da850_init();
@@ -754,7 +746,7 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
754 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 746 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
755 .boot_params = (DA8XX_DDR_BASE + 0x100), 747 .boot_params = (DA8XX_DDR_BASE + 0x100),
756 .map_io = da850_evm_map_io, 748 .map_io = da850_evm_map_io,
757 .init_irq = da850_evm_irq_init, 749 .init_irq = cp_intc_init,
758 .timer = &davinci_timer, 750 .timer = &davinci_timer,
759 .init_machine = da850_evm_init, 751 .init_machine = da850_evm_init,
760MACHINE_END 752MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index aa48e3f69715..a3191015efee 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -33,9 +33,6 @@
33#include <mach/mmc.h> 33#include <mach/mmc.h>
34#include <mach/usb.h> 34#include <mach/usb.h>
35 35
36#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
37#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
38
39/* NOTE: this is geared for the standard config, with a socketed 36/* NOTE: this is geared for the standard config, with a socketed
40 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you 37 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
41 * swap chips, maybe with a different block size, partitioning may 38 * swap chips, maybe with a different block size, partitioning may
@@ -86,12 +83,12 @@ static struct davinci_nand_pdata davinci_nand_data = {
86 83
87static struct resource davinci_nand_resources[] = { 84static struct resource davinci_nand_resources[] = {
88 { 85 {
89 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 86 .start = DM355_ASYNC_EMIF_DATA_CE0_BASE,
90 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, 87 .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
91 .flags = IORESOURCE_MEM, 88 .flags = IORESOURCE_MEM,
92 }, { 89 }, {
93 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 90 .start = DM355_ASYNC_EMIF_CONTROL_BASE,
94 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 91 .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
95 .flags = IORESOURCE_MEM, 92 .flags = IORESOURCE_MEM,
96 }, 93 },
97}; 94};
@@ -353,17 +350,12 @@ static __init void dm355_evm_init(void)
353 dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data); 350 dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data);
354} 351}
355 352
356static __init void dm355_evm_irq_init(void)
357{
358 davinci_irq_init();
359}
360
361MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") 353MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
362 .phys_io = IO_PHYS, 354 .phys_io = IO_PHYS,
363 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 355 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
364 .boot_params = (0x80000100), 356 .boot_params = (0x80000100),
365 .map_io = dm355_evm_map_io, 357 .map_io = dm355_evm_map_io,
366 .init_irq = dm355_evm_irq_init, 358 .init_irq = davinci_irq_init,
367 .timer = &davinci_timer, 359 .timer = &davinci_timer,
368 .init_machine = dm355_evm_init, 360 .init_machine = dm355_evm_init,
369MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 21f32eb41e8c..f1d8132cf0c3 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -30,9 +30,6 @@
30#include <mach/mmc.h> 30#include <mach/mmc.h>
31#include <mach/usb.h> 31#include <mach/usb.h>
32 32
33#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
34#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
35
36/* NOTE: this is geared for the standard config, with a socketed 33/* NOTE: this is geared for the standard config, with a socketed
37 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you 34 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
38 * swap chips, maybe with a different block size, partitioning may 35 * swap chips, maybe with a different block size, partitioning may
@@ -82,12 +79,12 @@ static struct davinci_nand_pdata davinci_nand_data = {
82 79
83static struct resource davinci_nand_resources[] = { 80static struct resource davinci_nand_resources[] = {
84 { 81 {
85 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 82 .start = DM355_ASYNC_EMIF_DATA_CE0_BASE,
86 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, 83 .end = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
87 .flags = IORESOURCE_MEM, 84 .flags = IORESOURCE_MEM,
88 }, { 85 }, {
89 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 86 .start = DM355_ASYNC_EMIF_CONTROL_BASE,
90 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 87 .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
91 .flags = IORESOURCE_MEM, 88 .flags = IORESOURCE_MEM,
92 }, 89 },
93}; 90};
@@ -272,17 +269,12 @@ static __init void dm355_leopard_init(void)
272 ARRAY_SIZE(dm355_leopard_spi_info)); 269 ARRAY_SIZE(dm355_leopard_spi_info));
273} 270}
274 271
275static __init void dm355_leopard_irq_init(void)
276{
277 davinci_irq_init();
278}
279
280MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard") 272MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
281 .phys_io = IO_PHYS, 273 .phys_io = IO_PHYS,
282 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 274 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
283 .boot_params = (0x80000100), 275 .boot_params = (0x80000100),
284 .map_io = dm355_leopard_map_io, 276 .map_io = dm355_leopard_map_io,
285 .init_irq = dm355_leopard_irq_init, 277 .init_irq = davinci_irq_init,
286 .timer = &davinci_timer, 278 .timer = &davinci_timer,
287 .init_machine = dm355_leopard_init, 279 .init_machine = dm355_leopard_init,
288MACHINE_END 280MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index df4ab2105869..98814e6a5987 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -54,11 +54,6 @@ static inline int have_tvp7002(void)
54 return 0; 54 return 0;
55} 55}
56 56
57
58#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000
59#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
60#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
61
62#define DM365_EVM_PHY_MASK (0x2) 57#define DM365_EVM_PHY_MASK (0x2)
63#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ 58#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
64 59
@@ -613,17 +608,12 @@ static __init void dm365_evm_init(void)
613 ARRAY_SIZE(dm365_evm_spi_info)); 608 ARRAY_SIZE(dm365_evm_spi_info));
614} 609}
615 610
616static __init void dm365_evm_irq_init(void)
617{
618 davinci_irq_init();
619}
620
621MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") 611MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
622 .phys_io = IO_PHYS, 612 .phys_io = IO_PHYS,
623 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 613 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
624 .boot_params = (0x80000100), 614 .boot_params = (0x80000100),
625 .map_io = dm365_evm_map_io, 615 .map_io = dm365_evm_map_io,
626 .init_irq = dm365_evm_irq_init, 616 .init_irq = davinci_irq_init,
627 .timer = &davinci_timer, 617 .timer = &davinci_timer,
628 .init_machine = dm365_evm_init, 618 .init_machine = dm365_evm_init,
629MACHINE_END 619MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 976e11b7fa4a..34c8b418cd72 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -41,14 +41,6 @@
41#define DM644X_EVM_PHY_MASK (0x2) 41#define DM644X_EVM_PHY_MASK (0x2)
42#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ 42#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
43 43
44#define DAVINCI_CFC_ATA_BASE 0x01C66000
45
46#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
47#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
48#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
49#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
50#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
51
52#define LXT971_PHY_ID (0x001378e2) 44#define LXT971_PHY_ID (0x001378e2)
53#define LXT971_PHY_MASK (0xfffffff0) 45#define LXT971_PHY_MASK (0xfffffff0)
54 46
@@ -92,8 +84,8 @@ static struct physmap_flash_data davinci_evm_norflash_data = {
92/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF 84/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
93 * limits addresses to 16M, so using addresses past 16M will wrap */ 85 * limits addresses to 16M, so using addresses past 16M will wrap */
94static struct resource davinci_evm_norflash_resource = { 86static struct resource davinci_evm_norflash_resource = {
95 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 87 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
96 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, 88 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
97 .flags = IORESOURCE_MEM, 89 .flags = IORESOURCE_MEM,
98}; 90};
99 91
@@ -111,7 +103,7 @@ static struct platform_device davinci_evm_norflash_device = {
111 * It may used instead of the (default) NOR chip to boot, using TI's 103 * It may used instead of the (default) NOR chip to boot, using TI's
112 * tools to install the secondary boot loader (UBL) and U-Boot. 104 * tools to install the secondary boot loader (UBL) and U-Boot.
113 */ 105 */
114struct mtd_partition davinci_evm_nandflash_partition[] = { 106static struct mtd_partition davinci_evm_nandflash_partition[] = {
115 /* Bootloader layout depends on whose u-boot is installed, but we 107 /* Bootloader layout depends on whose u-boot is installed, but we
116 * can hide all the details. 108 * can hide all the details.
117 * - block 0 for u-boot environment ... in mainline u-boot 109 * - block 0 for u-boot environment ... in mainline u-boot
@@ -154,12 +146,12 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
154 146
155static struct resource davinci_evm_nandflash_resource[] = { 147static struct resource davinci_evm_nandflash_resource[] = {
156 { 148 {
157 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 149 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
158 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, 150 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
159 .flags = IORESOURCE_MEM, 151 .flags = IORESOURCE_MEM,
160 }, { 152 }, {
161 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 153 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
162 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 154 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
163 .flags = IORESOURCE_MEM, 155 .flags = IORESOURCE_MEM,
164 }, 156 },
165}; 157};
@@ -258,32 +250,6 @@ static struct platform_device rtc_dev = {
258 .id = -1, 250 .id = -1,
259}; 251};
260 252
261static struct resource ide_resources[] = {
262 {
263 .start = DAVINCI_CFC_ATA_BASE,
264 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
265 .flags = IORESOURCE_MEM,
266 },
267 {
268 .start = IRQ_IDE,
269 .end = IRQ_IDE,
270 .flags = IORESOURCE_IRQ,
271 },
272};
273
274static u64 ide_dma_mask = DMA_BIT_MASK(32);
275
276static struct platform_device ide_dev = {
277 .name = "palm_bk3710",
278 .id = -1,
279 .resource = ide_resources,
280 .num_resources = ARRAY_SIZE(ide_resources),
281 .dev = {
282 .dma_mask = &ide_dma_mask,
283 .coherent_dma_mask = DMA_BIT_MASK(32),
284 },
285};
286
287static struct snd_platform_data dm644x_evm_snd_data; 253static struct snd_platform_data dm644x_evm_snd_data;
288 254
289/*----------------------------------------------------------------------*/ 255/*----------------------------------------------------------------------*/
@@ -704,10 +670,7 @@ static __init void davinci_evm_init(void)
704 pr_warning("WARNING: both IDE and Flash are " 670 pr_warning("WARNING: both IDE and Flash are "
705 "enabled, but they share AEMIF pins.\n" 671 "enabled, but they share AEMIF pins.\n"
706 "\tDisable IDE for NAND/NOR support.\n"); 672 "\tDisable IDE for NAND/NOR support.\n");
707 davinci_cfg_reg(DM644X_HPIEN_DISABLE); 673 davinci_init_ide();
708 davinci_cfg_reg(DM644X_ATAEN);
709 davinci_cfg_reg(DM644X_HDIREN);
710 platform_device_register(&ide_dev);
711 } else if (HAS_NAND || HAS_NOR) { 674 } else if (HAS_NAND || HAS_NOR) {
712 davinci_cfg_reg(DM644X_HPIEN_DISABLE); 675 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
713 davinci_cfg_reg(DM644X_ATAEN_DISABLE); 676 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
@@ -741,18 +704,13 @@ static __init void davinci_evm_init(void)
741 704
742} 705}
743 706
744static __init void davinci_evm_irq_init(void)
745{
746 davinci_irq_init();
747}
748
749MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") 707MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
750 /* Maintainer: MontaVista Software <source@mvista.com> */ 708 /* Maintainer: MontaVista Software <source@mvista.com> */
751 .phys_io = IO_PHYS, 709 .phys_io = IO_PHYS,
752 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 710 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
753 .boot_params = (DAVINCI_DDR_BASE + 0x100), 711 .boot_params = (DAVINCI_DDR_BASE + 0x100),
754 .map_io = davinci_evm_map_io, 712 .map_io = davinci_evm_map_io,
755 .init_irq = davinci_evm_irq_init, 713 .init_irq = davinci_irq_init,
756 .timer = &davinci_timer, 714 .timer = &davinci_timer,
757 .init_machine = davinci_evm_init, 715 .init_machine = davinci_evm_init,
758MACHINE_END 716MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 5ba3cb2daaa0..6d8889342c9f 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -80,17 +80,14 @@ static struct davinci_nand_pdata davinci_nand_data = {
80 .options = 0, 80 .options = 0,
81}; 81};
82 82
83#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
84#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
85
86static struct resource davinci_nand_resources[] = { 83static struct resource davinci_nand_resources[] = {
87 { 84 {
88 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 85 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
89 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, 86 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
90 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
91 }, { 88 }, {
92 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 89 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
93 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 90 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
94 .flags = IORESOURCE_MEM, 91 .flags = IORESOURCE_MEM,
95 }, 92 },
96}; 93};
@@ -736,17 +733,12 @@ static __init void evm_init(void)
736 platform_device_register(&davinci_nand_device); 733 platform_device_register(&davinci_nand_device);
737 734
738 if (HAS_ATA) 735 if (HAS_ATA)
739 dm646x_init_ide(); 736 davinci_init_ide();
740 737
741 soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK; 738 soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
742 soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY; 739 soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
743} 740}
744 741
745static __init void davinci_dm646x_evm_irq_init(void)
746{
747 davinci_irq_init();
748}
749
750#define DM646X_EVM_REF_FREQ 27000000 742#define DM646X_EVM_REF_FREQ 27000000
751#define DM6467T_EVM_REF_FREQ 33000000 743#define DM6467T_EVM_REF_FREQ 33000000
752 744
@@ -763,7 +755,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
763 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 755 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
764 .boot_params = (0x80000100), 756 .boot_params = (0x80000100),
765 .map_io = davinci_map_io, 757 .map_io = davinci_map_io,
766 .init_irq = davinci_dm646x_evm_irq_init, 758 .init_irq = davinci_irq_init,
767 .timer = &davinci_timer, 759 .timer = &davinci_timer,
768 .init_machine = evm_init, 760 .init_machine = evm_init,
769MACHINE_END 761MACHINE_END
@@ -773,7 +765,7 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
773 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 765 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
774 .boot_params = (0x80000100), 766 .boot_params = (0x80000100),
775 .map_io = davinci_map_io, 767 .map_io = davinci_map_io,
776 .init_irq = davinci_dm646x_evm_irq_init, 768 .init_irq = davinci_irq_init,
777 .timer = &davinci_timer, 769 .timer = &davinci_timer,
778 .init_machine = evm_init, 770 .init_machine = evm_init,
779MACHINE_END 771MACHINE_END
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index bd9ca079b69d..4c30e929bbf9 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -31,6 +31,7 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32 32
33#include <mach/dm644x.h> 33#include <mach/dm644x.h>
34#include <mach/common.h>
34#include <mach/i2c.h> 35#include <mach/i2c.h>
35#include <mach/serial.h> 36#include <mach/serial.h>
36#include <mach/mux.h> 37#include <mach/mux.h>
@@ -41,11 +42,6 @@
41#define NEUROS_OSD2_PHY_MASK 0x2 42#define NEUROS_OSD2_PHY_MASK 0x2
42#define NEUROS_OSD2_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ 43#define NEUROS_OSD2_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
43 44
44#define DAVINCI_CFC_ATA_BASE 0x01C66000
45
46#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
47#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
48
49#define LXT971_PHY_ID 0x001378e2 45#define LXT971_PHY_ID 0x001378e2
50#define LXT971_PHY_MASK 0xfffffff0 46#define LXT971_PHY_MASK 0xfffffff0
51 47
@@ -60,7 +56,7 @@
60 56
61#define NAND_BLOCK_SIZE SZ_128K 57#define NAND_BLOCK_SIZE SZ_128K
62 58
63struct mtd_partition davinci_ntosd2_nandflash_partition[] = { 59static struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
64 { 60 {
65 /* UBL (a few copies) plus U-Boot */ 61 /* UBL (a few copies) plus U-Boot */
66 .name = "bootloader", 62 .name = "bootloader",
@@ -98,12 +94,12 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
98 94
99static struct resource davinci_ntosd2_nandflash_resource[] = { 95static struct resource davinci_ntosd2_nandflash_resource[] = {
100 { 96 {
101 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 97 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
102 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, 98 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
103 .flags = IORESOURCE_MEM, 99 .flags = IORESOURCE_MEM,
104 }, { 100 }, {
105 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 101 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
106 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 102 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
107 .flags = IORESOURCE_MEM, 103 .flags = IORESOURCE_MEM,
108 }, 104 },
109}; 105};
@@ -130,32 +126,6 @@ static struct platform_device davinci_fb_device = {
130 .num_resources = 0, 126 .num_resources = 0,
131}; 127};
132 128
133static struct resource ide_resources[] = {
134 {
135 .start = DAVINCI_CFC_ATA_BASE,
136 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
137 .flags = IORESOURCE_MEM,
138 },
139 {
140 .start = IRQ_IDE,
141 .end = IRQ_IDE,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static u64 ide_dma_mask = DMA_BIT_MASK(32);
147
148static struct platform_device ide_dev = {
149 .name = "palm_bk3710",
150 .id = -1,
151 .resource = ide_resources,
152 .num_resources = ARRAY_SIZE(ide_resources),
153 .dev = {
154 .dma_mask = &ide_dma_mask,
155 .coherent_dma_mask = DMA_BIT_MASK(32),
156 },
157};
158
159static struct snd_platform_data dm644x_ntosd2_snd_data; 129static struct snd_platform_data dm644x_ntosd2_snd_data;
160 130
161static struct gpio_led ntosd2_leds[] = { 131static struct gpio_led ntosd2_leds[] = {
@@ -259,10 +229,7 @@ static __init void davinci_ntosd2_init(void)
259 pr_warning("WARNING: both IDE and Flash are " 229 pr_warning("WARNING: both IDE and Flash are "
260 "enabled, but they share AEMIF pins.\n" 230 "enabled, but they share AEMIF pins.\n"
261 "\tDisable IDE for NAND/NOR support.\n"); 231 "\tDisable IDE for NAND/NOR support.\n");
262 davinci_cfg_reg(DM644X_HPIEN_DISABLE); 232 davinci_init_ide();
263 davinci_cfg_reg(DM644X_ATAEN);
264 davinci_cfg_reg(DM644X_HDIREN);
265 platform_device_register(&ide_dev);
266 } else if (HAS_NAND) { 233 } else if (HAS_NAND) {
267 davinci_cfg_reg(DM644X_HPIEN_DISABLE); 234 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
268 davinci_cfg_reg(DM644X_ATAEN_DISABLE); 235 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
@@ -306,18 +273,13 @@ static __init void davinci_ntosd2_init(void)
306 davinci_setup_mmc(0, &davinci_ntosd2_mmc_config); 273 davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
307} 274}
308 275
309static __init void davinci_ntosd2_irq_init(void)
310{
311 davinci_irq_init();
312}
313
314MACHINE_START(NEUROS_OSD2, "Neuros OSD2") 276MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
315 /* Maintainer: Neuros Technologies <neuros@groups.google.com> */ 277 /* Maintainer: Neuros Technologies <neuros@groups.google.com> */
316 .phys_io = IO_PHYS, 278 .phys_io = IO_PHYS,
317 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 279 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
318 .boot_params = (DAVINCI_DDR_BASE + 0x100), 280 .boot_params = (DAVINCI_DDR_BASE + 0x100),
319 .map_io = davinci_ntosd2_map_io, 281 .map_io = davinci_ntosd2_map_io,
320 .init_irq = davinci_ntosd2_irq_init, 282 .init_irq = davinci_irq_init,
321 .timer = &davinci_timer, 283 .timer = &davinci_timer,
322 .init_machine = davinci_ntosd2_init, 284 .init_machine = davinci_ntosd2_init,
323MACHINE_END 285MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 08d373bfcc8a..23e664a1a802 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -45,10 +45,7 @@
45#define SFFSDR_PHY_MASK (0x2) 45#define SFFSDR_PHY_MASK (0x2)
46#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ 46#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
47 47
48#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000 48static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
49#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
50
51struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
52 /* U-Boot Environment: Block 0 49 /* U-Boot Environment: Block 0
53 * UBL: Block 1 50 * UBL: Block 1
54 * U-Boot: Blocks 6-7 (256 kb) 51 * U-Boot: Blocks 6-7 (256 kb)
@@ -76,12 +73,12 @@ static struct flash_platform_data davinci_sffsdr_nandflash_data = {
76 73
77static struct resource davinci_sffsdr_nandflash_resource[] = { 74static struct resource davinci_sffsdr_nandflash_resource[] = {
78 { 75 {
79 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 76 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
80 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, 77 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
81 .flags = IORESOURCE_MEM, 78 .flags = IORESOURCE_MEM,
82 }, { 79 }, {
83 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 80 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
84 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 81 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
85 .flags = IORESOURCE_MEM, 82 .flags = IORESOURCE_MEM,
86 }, 83 },
87}; 84};
@@ -155,18 +152,13 @@ static __init void davinci_sffsdr_init(void)
155 davinci_cfg_reg(DM644X_VLYNQWD); 152 davinci_cfg_reg(DM644X_VLYNQWD);
156} 153}
157 154
158static __init void davinci_sffsdr_irq_init(void)
159{
160 davinci_irq_init();
161}
162
163MACHINE_START(SFFSDR, "Lyrtech SFFSDR") 155MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
164 /* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */ 156 /* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
165 .phys_io = IO_PHYS, 157 .phys_io = IO_PHYS,
166 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, 158 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
167 .boot_params = (DAVINCI_DDR_BASE + 0x100), 159 .boot_params = (DAVINCI_DDR_BASE + 0x100),
168 .map_io = davinci_sffsdr_map_io, 160 .map_io = davinci_sffsdr_map_io,
169 .init_irq = davinci_sffsdr_irq_init, 161 .init_irq = davinci_irq_init,
170 .timer = &davinci_timer, 162 .timer = &davinci_timer,
171 .init_machine = davinci_sffsdr_init, 163 .init_machine = davinci_sffsdr_init,
172MACHINE_END 164MACHINE_END
diff --git a/arch/arm/mach-davinci/cdce949.c b/arch/arm/mach-davinci/cdce949.c
index aec375690543..ba8b12b2913b 100644
--- a/arch/arm/mach-davinci/cdce949.c
+++ b/arch/arm/mach-davinci/cdce949.c
@@ -19,6 +19,7 @@
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20 20
21#include <mach/clock.h> 21#include <mach/clock.h>
22#include <mach/cdce949.h>
22 23
23#include "clock.h" 24#include "clock.h"
24 25
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index bf6218ee94e1..054c303caead 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -22,6 +22,7 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24 24
25#include <mach/clock.h>
25#include <mach/psc.h> 26#include <mach/psc.h>
26#include <mach/cputype.h> 27#include <mach/cputype.h>
27#include "clock.h" 28#include "clock.h"
@@ -42,7 +43,8 @@ static void __clk_enable(struct clk *clk)
42 if (clk->parent) 43 if (clk->parent)
43 __clk_enable(clk->parent); 44 __clk_enable(clk->parent);
44 if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) 45 if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
45 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 1); 46 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
47 PSC_STATE_ENABLE);
46} 48}
47 49
48static void __clk_disable(struct clk *clk) 50static void __clk_disable(struct clk *clk)
@@ -51,7 +53,9 @@ static void __clk_disable(struct clk *clk)
51 return; 53 return;
52 if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && 54 if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) &&
53 (clk->flags & CLK_PSC)) 55 (clk->flags & CLK_PSC))
54 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 0); 56 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,
57 (clk->flags & PSC_SWRSTDISABLE) ?
58 PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
55 if (clk->parent) 59 if (clk->parent)
56 __clk_disable(clk->parent); 60 __clk_disable(clk->parent);
57} 61}
@@ -233,7 +237,10 @@ static int __init clk_disable_unused(void)
233 continue; 237 continue;
234 238
235 pr_info("Clocks: disable unused %s\n", ck->name); 239 pr_info("Clocks: disable unused %s\n", ck->name);
236 davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, 0); 240
241 davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc,
242 (ck->flags & PSC_SWRSTDISABLE) ?
243 PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE);
237 } 244 }
238 spin_unlock_irq(&clockfw_lock); 245 spin_unlock_irq(&clockfw_lock);
239 246
@@ -272,7 +279,7 @@ static unsigned long clk_sysclk_recalc(struct clk *clk)
272 279
273 v = __raw_readl(pll->base + clk->div_reg); 280 v = __raw_readl(pll->base + clk->div_reg);
274 if (v & PLLDIV_EN) { 281 if (v & PLLDIV_EN) {
275 plldiv = (v & PLLDIV_RATIO_MASK) + 1; 282 plldiv = (v & pll->div_ratio_mask) + 1;
276 if (plldiv) 283 if (plldiv)
277 rate /= plldiv; 284 rate /= plldiv;
278 } 285 }
@@ -295,7 +302,6 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
295 struct pll_data *pll = clk->pll_data; 302 struct pll_data *pll = clk->pll_data;
296 unsigned long rate = clk->rate; 303 unsigned long rate = clk->rate;
297 304
298 pll->base = IO_ADDRESS(pll->phys_base);
299 ctrl = __raw_readl(pll->base + PLLCTL); 305 ctrl = __raw_readl(pll->base + PLLCTL);
300 rate = pll->input_rate = clk->parent->rate; 306 rate = pll->input_rate = clk->parent->rate;
301 307
@@ -312,7 +318,7 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
312 if (pll->flags & PLL_HAS_PREDIV) { 318 if (pll->flags & PLL_HAS_PREDIV) {
313 prediv = __raw_readl(pll->base + PREDIV); 319 prediv = __raw_readl(pll->base + PREDIV);
314 if (prediv & PLLDIV_EN) 320 if (prediv & PLLDIV_EN)
315 prediv = (prediv & PLLDIV_RATIO_MASK) + 1; 321 prediv = (prediv & pll->div_ratio_mask) + 1;
316 else 322 else
317 prediv = 1; 323 prediv = 1;
318 } 324 }
@@ -324,7 +330,7 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
324 if (pll->flags & PLL_HAS_POSTDIV) { 330 if (pll->flags & PLL_HAS_POSTDIV) {
325 postdiv = __raw_readl(pll->base + POSTDIV); 331 postdiv = __raw_readl(pll->base + POSTDIV);
326 if (postdiv & PLLDIV_EN) 332 if (postdiv & PLLDIV_EN)
327 postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1; 333 postdiv = (postdiv & pll->div_ratio_mask) + 1;
328 else 334 else
329 postdiv = 1; 335 postdiv = 1;
330 } 336 }
@@ -451,6 +457,18 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
451 clk->recalc = clk_leafclk_recalc; 457 clk->recalc = clk_leafclk_recalc;
452 } 458 }
453 459
460 if (clk->pll_data) {
461 struct pll_data *pll = clk->pll_data;
462
463 if (!pll->div_ratio_mask)
464 pll->div_ratio_mask = PLLDIV_RATIO_MASK;
465
466 if (pll->phys_base && !pll->base) {
467 pll->base = ioremap(pll->phys_base, SZ_4K);
468 WARN_ON(!pll->base);
469 }
470 }
471
454 if (clk->recalc) 472 if (clk->recalc)
455 clk->rate = clk->recalc(clk); 473 clk->rate = clk->recalc(clk);
456 474
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index aa0a61150325..01e36483ac3d 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -76,6 +76,7 @@ struct pll_data {
76 u32 num; 76 u32 num;
77 u32 flags; 77 u32 flags;
78 u32 input_rate; 78 u32 input_rate;
79 u32 div_ratio_mask;
79}; 80};
80#define PLL_HAS_PREDIV 0x01 81#define PLL_HAS_PREDIV 0x01
81#define PLL_HAS_POSTDIV 0x02 82#define PLL_HAS_POSTDIV 0x02
@@ -101,10 +102,11 @@ struct clk {
101 102
102/* Clock flags: SoC-specific flags start at BIT(16) */ 103/* Clock flags: SoC-specific flags start at BIT(16) */
103#define ALWAYS_ENABLED BIT(1) 104#define ALWAYS_ENABLED BIT(1)
104#define CLK_PSC BIT(2) 105#define CLK_PSC BIT(2)
105#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ 106#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */
106#define CLK_PLL BIT(4) /* PLL-derived clock */ 107#define CLK_PLL BIT(4) /* PLL-derived clock */
107#define PRE_PLL BIT(5) /* source is before PLL mult/div */ 108#define PRE_PLL BIT(5) /* source is before PLL mult/div */
109#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */
108 110
109#define CLK(dev, con, ck) \ 111#define CLK(dev, con, ck) \
110 { \ 112 { \
@@ -118,6 +120,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
118 unsigned int mult, unsigned int postdiv); 120 unsigned int mult, unsigned int postdiv);
119 121
120extern struct platform_device davinci_wdt_device; 122extern struct platform_device davinci_wdt_device;
123extern void davinci_watchdog_reset(struct platform_device *);
121 124
122#endif 125#endif
123 126
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 94f27cbcd55a..1d2557394235 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -37,26 +37,43 @@ void davinci_get_mac_addr(struct memory_accessor *mem_acc, void *context)
37 pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr); 37 pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);
38} 38}
39 39
40static struct davinci_id * __init davinci_get_id(u32 jtag_id) 40static int __init davinci_init_id(struct davinci_soc_info *soc_info)
41{ 41{
42 int i; 42 int i;
43 struct davinci_id *dip; 43 struct davinci_id *dip;
44 u8 variant = (jtag_id & 0xf0000000) >> 28; 44 u8 variant;
45 u16 part_no = (jtag_id & 0x0ffff000) >> 12; 45 u16 part_no;
46 void __iomem *base;
47
48 base = ioremap(soc_info->jtag_id_reg, SZ_4K);
49 if (!base) {
50 pr_err("Unable to map JTAG ID register\n");
51 return -ENOMEM;
52 }
53
54 soc_info->jtag_id = __raw_readl(base);
55 iounmap(base);
56
57 variant = (soc_info->jtag_id & 0xf0000000) >> 28;
58 part_no = (soc_info->jtag_id & 0x0ffff000) >> 12;
46 59
47 for (i = 0, dip = davinci_soc_info.ids; i < davinci_soc_info.ids_num; 60 for (i = 0, dip = soc_info->ids; i < soc_info->ids_num;
48 i++, dip++) 61 i++, dip++)
49 /* Don't care about the manufacturer right now */ 62 /* Don't care about the manufacturer right now */
50 if ((dip->part_no == part_no) && (dip->variant == variant)) 63 if ((dip->part_no == part_no) && (dip->variant == variant)) {
51 return dip; 64 soc_info->cpu_id = dip->cpu_id;
52 65 pr_info("DaVinci %s variant 0x%x\n", dip->name,
53 return NULL; 66 dip->variant);
67 return 0;
68 }
69
70 pr_err("Unknown DaVinci JTAG ID 0x%x\n", soc_info->jtag_id);
71 return -EINVAL;
54} 72}
55 73
56void __init davinci_common_init(struct davinci_soc_info *soc_info) 74void __init davinci_common_init(struct davinci_soc_info *soc_info)
57{ 75{
58 int ret; 76 int ret;
59 struct davinci_id *dip;
60 77
61 if (!soc_info) { 78 if (!soc_info) {
62 ret = -EINVAL; 79 ret = -EINVAL;
@@ -77,22 +94,16 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
77 local_flush_tlb_all(); 94 local_flush_tlb_all();
78 flush_cache_all(); 95 flush_cache_all();
79 96
97 if (!davinci_soc_info.reset)
98 davinci_soc_info.reset = davinci_watchdog_reset;
99
80 /* 100 /*
81 * We want to check CPU revision early for cpu_is_xxxx() macros. 101 * We want to check CPU revision early for cpu_is_xxxx() macros.
82 * IO space mapping must be initialized before we can do that. 102 * IO space mapping must be initialized before we can do that.
83 */ 103 */
84 davinci_soc_info.jtag_id = __raw_readl(davinci_soc_info.jtag_id_base); 104 ret = davinci_init_id(&davinci_soc_info);
85 105 if (ret < 0)
86 dip = davinci_get_id(davinci_soc_info.jtag_id);
87 if (!dip) {
88 ret = -EINVAL;
89 pr_err("Unknown DaVinci JTAG ID 0x%x\n",
90 davinci_soc_info.jtag_id);
91 goto err; 106 goto err;
92 }
93
94 davinci_soc_info.cpu_id = dip->cpu_id;
95 pr_info("DaVinci %s variant 0x%x\n", dip->name, dip->variant);
96 107
97 if (davinci_soc_info.cpu_clks) { 108 if (davinci_soc_info.cpu_clks) {
98 ret = davinci_clk_init(davinci_soc_info.cpu_clks); 109 ret = davinci_clk_init(davinci_soc_info.cpu_clks);
@@ -101,8 +112,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
101 goto err; 112 goto err;
102 } 113 }
103 114
104 davinci_intc_base = davinci_soc_info.intc_base;
105 davinci_intc_type = davinci_soc_info.intc_type;
106 return; 115 return;
107 116
108err: 117err:
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 37311d1830eb..bb4c40ecb803 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -13,18 +13,17 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15 15
16#include <mach/common.h>
16#include <mach/cp_intc.h> 17#include <mach/cp_intc.h>
17 18
18static void __iomem *cp_intc_base;
19
20static inline unsigned int cp_intc_read(unsigned offset) 19static inline unsigned int cp_intc_read(unsigned offset)
21{ 20{
22 return __raw_readl(cp_intc_base + offset); 21 return __raw_readl(davinci_intc_base + offset);
23} 22}
24 23
25static inline void cp_intc_write(unsigned long value, unsigned offset) 24static inline void cp_intc_write(unsigned long value, unsigned offset)
26{ 25{
27 __raw_writel(value, cp_intc_base + offset); 26 __raw_writel(value, davinci_intc_base + offset);
28} 27}
29 28
30static void cp_intc_ack_irq(unsigned int irq) 29static void cp_intc_ack_irq(unsigned int irq)
@@ -100,13 +99,18 @@ static struct irq_chip cp_intc_irq_chip = {
100 .set_wake = cp_intc_set_wake, 99 .set_wake = cp_intc_set_wake,
101}; 100};
102 101
103void __init cp_intc_init(void __iomem *base, unsigned short num_irq, 102void __init cp_intc_init(void)
104 u8 *irq_prio)
105{ 103{
104 unsigned long num_irq = davinci_soc_info.intc_irq_num;
105 u8 *irq_prio = davinci_soc_info.intc_irq_prios;
106 u32 *host_map = davinci_soc_info.intc_host_map;
106 unsigned num_reg = BITS_TO_LONGS(num_irq); 107 unsigned num_reg = BITS_TO_LONGS(num_irq);
107 int i; 108 int i;
108 109
109 cp_intc_base = base; 110 davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
111 davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
112 if (WARN_ON(!davinci_intc_base))
113 return;
110 114
111 cp_intc_write(0, CP_INTC_GLOBAL_ENABLE); 115 cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
112 116
@@ -157,6 +161,10 @@ void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
157 cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i)); 161 cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
158 } 162 }
159 163
164 if (host_map)
165 for (i = 0; host_map[i] != -1; i++)
166 cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
167
160 /* Set up genirq dispatching for cp_intc */ 168 /* Set up genirq dispatching for cp_intc */
161 for (i = 0; i < num_irq; i++) { 169 for (i = 0; i < num_irq; i++) {
162 set_irq_chip(i, &cp_intc_irq_chip); 170 set_irq_chip(i, &cp_intc_irq_chip);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index e8cb982f5e8e..23e9eda5a377 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -19,6 +19,7 @@
19#include <mach/common.h> 19#include <mach/common.h>
20#include <mach/time.h> 20#include <mach/time.h>
21#include <mach/da8xx.h> 21#include <mach/da8xx.h>
22#include <mach/gpio.h>
22 23
23#include "clock.h" 24#include "clock.h"
24#include "mux.h" 25#include "mux.h"
@@ -1126,10 +1127,7 @@ static struct map_desc da830_io_desc[] = {
1126 }, 1127 },
1127}; 1128};
1128 1129
1129static void __iomem *da830_psc_bases[] = { 1130static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
1130 IO_ADDRESS(DA8XX_PSC0_BASE),
1131 IO_ADDRESS(DA8XX_PSC1_BASE),
1132};
1133 1131
1134/* Contents of JTAG ID register used to identify exact cpu type */ 1132/* Contents of JTAG ID register used to identify exact cpu type */
1135static struct davinci_id da830_ids[] = { 1133static struct davinci_id da830_ids[] = {
@@ -1158,14 +1156,14 @@ static struct davinci_id da830_ids[] = {
1158 1156
1159static struct davinci_timer_instance da830_timer_instance[2] = { 1157static struct davinci_timer_instance da830_timer_instance[2] = {
1160 { 1158 {
1161 .base = IO_ADDRESS(DA8XX_TIMER64P0_BASE), 1159 .base = DA8XX_TIMER64P0_BASE,
1162 .bottom_irq = IRQ_DA8XX_TINT12_0, 1160 .bottom_irq = IRQ_DA8XX_TINT12_0,
1163 .top_irq = IRQ_DA8XX_TINT34_0, 1161 .top_irq = IRQ_DA8XX_TINT34_0,
1164 .cmp_off = DA830_CMP12_0, 1162 .cmp_off = DA830_CMP12_0,
1165 .cmp_irq = IRQ_DA830_T12CMPINT0_0, 1163 .cmp_irq = IRQ_DA830_T12CMPINT0_0,
1166 }, 1164 },
1167 { 1165 {
1168 .base = IO_ADDRESS(DA8XX_TIMER64P1_BASE), 1166 .base = DA8XX_TIMER64P1_BASE,
1169 .bottom_irq = IRQ_DA8XX_TINT12_1, 1167 .bottom_irq = IRQ_DA8XX_TINT12_1,
1170 .top_irq = IRQ_DA8XX_TINT34_1, 1168 .top_irq = IRQ_DA8XX_TINT34_1,
1171 .cmp_off = DA830_CMP12_0, 1169 .cmp_off = DA830_CMP12_0,
@@ -1187,34 +1185,33 @@ static struct davinci_timer_info da830_timer_info = {
1187static struct davinci_soc_info davinci_soc_info_da830 = { 1185static struct davinci_soc_info davinci_soc_info_da830 = {
1188 .io_desc = da830_io_desc, 1186 .io_desc = da830_io_desc,
1189 .io_desc_num = ARRAY_SIZE(da830_io_desc), 1187 .io_desc_num = ARRAY_SIZE(da830_io_desc),
1188 .jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
1190 .ids = da830_ids, 1189 .ids = da830_ids,
1191 .ids_num = ARRAY_SIZE(da830_ids), 1190 .ids_num = ARRAY_SIZE(da830_ids),
1192 .cpu_clks = da830_clks, 1191 .cpu_clks = da830_clks,
1193 .psc_bases = da830_psc_bases, 1192 .psc_bases = da830_psc_bases,
1194 .psc_bases_num = ARRAY_SIZE(da830_psc_bases), 1193 .psc_bases_num = ARRAY_SIZE(da830_psc_bases),
1194 .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
1195 .pinmux_pins = da830_pins, 1195 .pinmux_pins = da830_pins,
1196 .pinmux_pins_num = ARRAY_SIZE(da830_pins), 1196 .pinmux_pins_num = ARRAY_SIZE(da830_pins),
1197 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, 1197 .intc_base = DA8XX_CP_INTC_BASE,
1198 .intc_type = DAVINCI_INTC_TYPE_CP_INTC, 1198 .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
1199 .intc_irq_prios = da830_default_priorities, 1199 .intc_irq_prios = da830_default_priorities,
1200 .intc_irq_num = DA830_N_CP_INTC_IRQ, 1200 .intc_irq_num = DA830_N_CP_INTC_IRQ,
1201 .timer_info = &da830_timer_info, 1201 .timer_info = &da830_timer_info,
1202 .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE), 1202 .gpio_type = GPIO_TYPE_DAVINCI,
1203 .gpio_base = DA8XX_GPIO_BASE,
1203 .gpio_num = 128, 1204 .gpio_num = 128,
1204 .gpio_irq = IRQ_DA8XX_GPIO0, 1205 .gpio_irq = IRQ_DA8XX_GPIO0,
1205 .serial_dev = &da8xx_serial_device, 1206 .serial_dev = &da8xx_serial_device,
1206 .emac_pdata = &da8xx_emac_pdata, 1207 .emac_pdata = &da8xx_emac_pdata,
1208 .reset_device = &da8xx_wdt_device,
1207}; 1209};
1208 1210
1209void __init da830_init(void) 1211void __init da830_init(void)
1210{ 1212{
1211 da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
1212 if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"))
1213 return;
1214
1215 davinci_soc_info_da830.jtag_id_base =
1216 DA8XX_SYSCFG0_VIRT(DA8XX_JTAG_ID_REG);
1217 davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120);
1218
1219 davinci_common_init(&davinci_soc_info_da830); 1213 davinci_common_init(&davinci_soc_info_da830);
1214
1215 da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
1216 WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
1220} 1217}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index d0fd7566712a..6b8331bf8cf3 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -27,6 +27,7 @@
27#include <mach/da8xx.h> 27#include <mach/da8xx.h>
28#include <mach/cpufreq.h> 28#include <mach/cpufreq.h>
29#include <mach/pm.h> 29#include <mach/pm.h>
30#include <mach/gpio.h>
30 31
31#include "clock.h" 32#include "clock.h"
32#include "mux.h" 33#include "mux.h"
@@ -781,10 +782,7 @@ static struct map_desc da850_io_desc[] = {
781 }, 782 },
782}; 783};
783 784
784static void __iomem *da850_psc_bases[] = { 785static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
785 IO_ADDRESS(DA8XX_PSC0_BASE),
786 IO_ADDRESS(DA8XX_PSC1_BASE),
787};
788 786
789/* Contents of JTAG ID register used to identify exact cpu type */ 787/* Contents of JTAG ID register used to identify exact cpu type */
790static struct davinci_id da850_ids[] = { 788static struct davinci_id da850_ids[] = {
@@ -799,22 +797,22 @@ static struct davinci_id da850_ids[] = {
799 797
800static struct davinci_timer_instance da850_timer_instance[4] = { 798static struct davinci_timer_instance da850_timer_instance[4] = {
801 { 799 {
802 .base = IO_ADDRESS(DA8XX_TIMER64P0_BASE), 800 .base = DA8XX_TIMER64P0_BASE,
803 .bottom_irq = IRQ_DA8XX_TINT12_0, 801 .bottom_irq = IRQ_DA8XX_TINT12_0,
804 .top_irq = IRQ_DA8XX_TINT34_0, 802 .top_irq = IRQ_DA8XX_TINT34_0,
805 }, 803 },
806 { 804 {
807 .base = IO_ADDRESS(DA8XX_TIMER64P1_BASE), 805 .base = DA8XX_TIMER64P1_BASE,
808 .bottom_irq = IRQ_DA8XX_TINT12_1, 806 .bottom_irq = IRQ_DA8XX_TINT12_1,
809 .top_irq = IRQ_DA8XX_TINT34_1, 807 .top_irq = IRQ_DA8XX_TINT34_1,
810 }, 808 },
811 { 809 {
812 .base = IO_ADDRESS(DA850_TIMER64P2_BASE), 810 .base = DA850_TIMER64P2_BASE,
813 .bottom_irq = IRQ_DA850_TINT12_2, 811 .bottom_irq = IRQ_DA850_TINT12_2,
814 .top_irq = IRQ_DA850_TINT34_2, 812 .top_irq = IRQ_DA850_TINT34_2,
815 }, 813 },
816 { 814 {
817 .base = IO_ADDRESS(DA850_TIMER64P3_BASE), 815 .base = DA850_TIMER64P3_BASE,
818 .bottom_irq = IRQ_DA850_TINT12_3, 816 .bottom_irq = IRQ_DA850_TINT12_3,
819 .top_irq = IRQ_DA850_TINT34_3, 817 .top_irq = IRQ_DA850_TINT34_3,
820 }, 818 },
@@ -1072,31 +1070,37 @@ no_ddrpll_mem:
1072static struct davinci_soc_info davinci_soc_info_da850 = { 1070static struct davinci_soc_info davinci_soc_info_da850 = {
1073 .io_desc = da850_io_desc, 1071 .io_desc = da850_io_desc,
1074 .io_desc_num = ARRAY_SIZE(da850_io_desc), 1072 .io_desc_num = ARRAY_SIZE(da850_io_desc),
1073 .jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
1075 .ids = da850_ids, 1074 .ids = da850_ids,
1076 .ids_num = ARRAY_SIZE(da850_ids), 1075 .ids_num = ARRAY_SIZE(da850_ids),
1077 .cpu_clks = da850_clks, 1076 .cpu_clks = da850_clks,
1078 .psc_bases = da850_psc_bases, 1077 .psc_bases = da850_psc_bases,
1079 .psc_bases_num = ARRAY_SIZE(da850_psc_bases), 1078 .psc_bases_num = ARRAY_SIZE(da850_psc_bases),
1079 .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
1080 .pinmux_pins = da850_pins, 1080 .pinmux_pins = da850_pins,
1081 .pinmux_pins_num = ARRAY_SIZE(da850_pins), 1081 .pinmux_pins_num = ARRAY_SIZE(da850_pins),
1082 .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, 1082 .intc_base = DA8XX_CP_INTC_BASE,
1083 .intc_type = DAVINCI_INTC_TYPE_CP_INTC, 1083 .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
1084 .intc_irq_prios = da850_default_priorities, 1084 .intc_irq_prios = da850_default_priorities,
1085 .intc_irq_num = DA850_N_CP_INTC_IRQ, 1085 .intc_irq_num = DA850_N_CP_INTC_IRQ,
1086 .timer_info = &da850_timer_info, 1086 .timer_info = &da850_timer_info,
1087 .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE), 1087 .gpio_type = GPIO_TYPE_DAVINCI,
1088 .gpio_base = DA8XX_GPIO_BASE,
1088 .gpio_num = 144, 1089 .gpio_num = 144,
1089 .gpio_irq = IRQ_DA8XX_GPIO0, 1090 .gpio_irq = IRQ_DA8XX_GPIO0,
1090 .serial_dev = &da8xx_serial_device, 1091 .serial_dev = &da8xx_serial_device,
1091 .emac_pdata = &da8xx_emac_pdata, 1092 .emac_pdata = &da8xx_emac_pdata,
1092 .sram_dma = DA8XX_ARM_RAM_BASE, 1093 .sram_dma = DA8XX_ARM_RAM_BASE,
1093 .sram_len = SZ_8K, 1094 .sram_len = SZ_8K,
1095 .reset_device = &da8xx_wdt_device,
1094}; 1096};
1095 1097
1096void __init da850_init(void) 1098void __init da850_init(void)
1097{ 1099{
1098 unsigned int v; 1100 unsigned int v;
1099 1101
1102 davinci_common_init(&davinci_soc_info_da850);
1103
1100 da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); 1104 da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
1101 if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) 1105 if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"))
1102 return; 1106 return;
@@ -1105,12 +1109,6 @@ void __init da850_init(void)
1105 if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module")) 1109 if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module"))
1106 return; 1110 return;
1107 1111
1108 davinci_soc_info_da850.jtag_id_base =
1109 DA8XX_SYSCFG0_VIRT(DA8XX_JTAG_ID_REG);
1110 davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120);
1111
1112 davinci_common_init(&davinci_soc_info_da850);
1113
1114 /* 1112 /*
1115 * Move the clock source of Async3 domain to PLL1 SYSCLK2. 1113 * Move the clock source of Async3 domain to PLL1 SYSCLK2.
1116 * This helps keeping the peripherals on this domain insulated 1114 * This helps keeping the peripherals on this domain insulated
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 0a96791d3b0f..8cda729be273 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -326,7 +326,7 @@ static struct resource da8xx_watchdog_resources[] = {
326 }, 326 },
327}; 327};
328 328
329struct platform_device davinci_wdt_device = { 329struct platform_device da8xx_wdt_device = {
330 .name = "watchdog", 330 .name = "watchdog",
331 .id = -1, 331 .id = -1,
332 .num_resources = ARRAY_SIZE(da8xx_watchdog_resources), 332 .num_resources = ARRAY_SIZE(da8xx_watchdog_resources),
@@ -335,7 +335,7 @@ struct platform_device davinci_wdt_device = {
335 335
336int __init da8xx_register_watchdog(void) 336int __init da8xx_register_watchdog(void)
337{ 337{
338 return platform_device_register(&davinci_wdt_device); 338 return platform_device_register(&da8xx_wdt_device);
339} 339}
340 340
341static struct resource da8xx_emac_resources[] = { 341static struct resource da8xx_emac_resources[] = {
@@ -584,10 +584,17 @@ static struct platform_device da8xx_rtc_device = {
584int da8xx_register_rtc(void) 584int da8xx_register_rtc(void)
585{ 585{
586 int ret; 586 int ret;
587 void __iomem *base;
588
589 base = ioremap(DA8XX_RTC_BASE, SZ_4K);
590 if (WARN_ON(!base))
591 return -ENOMEM;
587 592
588 /* Unlock the rtc's registers */ 593 /* Unlock the rtc's registers */
589 __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); 594 __raw_writel(0x83e70b13, base + 0x6c);
590 __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); 595 __raw_writel(0x95a4f1e0, base + 0x70);
596
597 iounmap(base);
591 598
592 ret = platform_device_register(&da8xx_rtc_device); 599 ret = platform_device_register(&da8xx_rtc_device);
593 if (!ret) 600 if (!ret)
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 147949650c25..8b7201e4c79c 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -23,7 +23,10 @@
23#include <mach/mmc.h> 23#include <mach/mmc.h>
24#include <mach/time.h> 24#include <mach/time.h>
25 25
26#include "clock.h"
27
26#define DAVINCI_I2C_BASE 0x01C21000 28#define DAVINCI_I2C_BASE 0x01C21000
29#define DAVINCI_ATA_BASE 0x01C66000
27#define DAVINCI_MMCSD0_BASE 0x01E10000 30#define DAVINCI_MMCSD0_BASE 0x01E10000
28#define DM355_MMCSD0_BASE 0x01E11000 31#define DM355_MMCSD0_BASE 0x01E11000
29#define DM355_MMCSD1_BASE 0x01E00000 32#define DM355_MMCSD1_BASE 0x01E00000
@@ -58,6 +61,49 @@ void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
58 (void) platform_device_register(&davinci_i2c_device); 61 (void) platform_device_register(&davinci_i2c_device);
59} 62}
60 63
64static struct resource ide_resources[] = {
65 {
66 .start = DAVINCI_ATA_BASE,
67 .end = DAVINCI_ATA_BASE + 0x7ff,
68 .flags = IORESOURCE_MEM,
69 },
70 {
71 .start = IRQ_IDE,
72 .end = IRQ_IDE,
73 .flags = IORESOURCE_IRQ,
74 },
75};
76
77static u64 ide_dma_mask = DMA_BIT_MASK(32);
78
79static struct platform_device ide_device = {
80 .name = "palm_bk3710",
81 .id = -1,
82 .resource = ide_resources,
83 .num_resources = ARRAY_SIZE(ide_resources),
84 .dev = {
85 .dma_mask = &ide_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
87 },
88};
89
90void __init davinci_init_ide(void)
91{
92 if (cpu_is_davinci_dm644x()) {
93 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
94 davinci_cfg_reg(DM644X_ATAEN);
95 davinci_cfg_reg(DM644X_HDIREN);
96 } else if (cpu_is_davinci_dm646x()) {
97 /* IRQ_DM646X_IDE is the same as IRQ_IDE */
98 davinci_cfg_reg(DM646X_ATAEN);
99 } else {
100 WARN_ON(1);
101 return;
102 }
103
104 platform_device_register(&ide_device);
105}
106
61#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) 107#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
62 108
63static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32); 109static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
@@ -251,12 +297,12 @@ static void davinci_init_wdt(void)
251 297
252struct davinci_timer_instance davinci_timer_instance[2] = { 298struct davinci_timer_instance davinci_timer_instance[2] = {
253 { 299 {
254 .base = IO_ADDRESS(DAVINCI_TIMER0_BASE), 300 .base = DAVINCI_TIMER0_BASE,
255 .bottom_irq = IRQ_TINT0_TINT12, 301 .bottom_irq = IRQ_TINT0_TINT12,
256 .top_irq = IRQ_TINT0_TINT34, 302 .top_irq = IRQ_TINT0_TINT34,
257 }, 303 },
258 { 304 {
259 .base = IO_ADDRESS(DAVINCI_TIMER1_BASE), 305 .base = DAVINCI_TIMER1_BASE,
260 .bottom_irq = IRQ_TINT1_TINT12, 306 .bottom_irq = IRQ_TINT1_TINT12,
261 .top_irq = IRQ_TINT1_TINT34, 307 .top_irq = IRQ_TINT1_TINT34,
262 }, 308 },
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 3dc0a88712eb..383478116ef5 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -450,11 +450,6 @@ void __init dm355_init_spi0(unsigned chipselect_mask,
450 450
451/*----------------------------------------------------------------------*/ 451/*----------------------------------------------------------------------*/
452 452
453#define PINMUX0 0x00
454#define PINMUX1 0x04
455#define PINMUX2 0x08
456#define PINMUX3 0x0c
457#define PINMUX4 0x10
458#define INTMUX 0x18 453#define INTMUX 0x18
459#define EVTMUX 0x1c 454#define EVTMUX 0x1c
460 455
@@ -788,9 +783,7 @@ static struct davinci_id dm355_ids[] = {
788 }, 783 },
789}; 784};
790 785
791static void __iomem *dm355_psc_bases[] = { 786static u32 dm355_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
792 IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
793};
794 787
795/* 788/*
796 * T0_BOT: Timer 0, bottom: clockevent source for hrtimers 789 * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
@@ -798,7 +791,7 @@ static void __iomem *dm355_psc_bases[] = {
798 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) 791 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
799 * T1_TOP: Timer 1, top : <unused> 792 * T1_TOP: Timer 1, top : <unused>
800 */ 793 */
801struct davinci_timer_info dm355_timer_info = { 794static struct davinci_timer_info dm355_timer_info = {
802 .timers = davinci_timer_instance, 795 .timers = davinci_timer_instance,
803 .clockevent_id = T0_BOT, 796 .clockevent_id = T0_BOT,
804 .clocksource_id = T0_TOP, 797 .clocksource_id = T0_TOP,
@@ -845,26 +838,28 @@ static struct platform_device dm355_serial_device = {
845static struct davinci_soc_info davinci_soc_info_dm355 = { 838static struct davinci_soc_info davinci_soc_info_dm355 = {
846 .io_desc = dm355_io_desc, 839 .io_desc = dm355_io_desc,
847 .io_desc_num = ARRAY_SIZE(dm355_io_desc), 840 .io_desc_num = ARRAY_SIZE(dm355_io_desc),
848 .jtag_id_base = IO_ADDRESS(0x01c40028), 841 .jtag_id_reg = 0x01c40028,
849 .ids = dm355_ids, 842 .ids = dm355_ids,
850 .ids_num = ARRAY_SIZE(dm355_ids), 843 .ids_num = ARRAY_SIZE(dm355_ids),
851 .cpu_clks = dm355_clks, 844 .cpu_clks = dm355_clks,
852 .psc_bases = dm355_psc_bases, 845 .psc_bases = dm355_psc_bases,
853 .psc_bases_num = ARRAY_SIZE(dm355_psc_bases), 846 .psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
854 .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), 847 .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
855 .pinmux_pins = dm355_pins, 848 .pinmux_pins = dm355_pins,
856 .pinmux_pins_num = ARRAY_SIZE(dm355_pins), 849 .pinmux_pins_num = ARRAY_SIZE(dm355_pins),
857 .intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE), 850 .intc_base = DAVINCI_ARM_INTC_BASE,
858 .intc_type = DAVINCI_INTC_TYPE_AINTC, 851 .intc_type = DAVINCI_INTC_TYPE_AINTC,
859 .intc_irq_prios = dm355_default_priorities, 852 .intc_irq_prios = dm355_default_priorities,
860 .intc_irq_num = DAVINCI_N_AINTC_IRQ, 853 .intc_irq_num = DAVINCI_N_AINTC_IRQ,
861 .timer_info = &dm355_timer_info, 854 .timer_info = &dm355_timer_info,
862 .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), 855 .gpio_type = GPIO_TYPE_DAVINCI,
856 .gpio_base = DAVINCI_GPIO_BASE,
863 .gpio_num = 104, 857 .gpio_num = 104,
864 .gpio_irq = IRQ_DM355_GPIOBNK0, 858 .gpio_irq = IRQ_DM355_GPIOBNK0,
865 .serial_dev = &dm355_serial_device, 859 .serial_dev = &dm355_serial_device,
866 .sram_dma = 0x00010000, 860 .sram_dma = 0x00010000,
867 .sram_len = SZ_32K, 861 .sram_len = SZ_32K,
862 .reset_device = &davinci_wdt_device,
868}; 863};
869 864
870void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) 865void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 0d6ee583f65c..a146849d78f0 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -467,11 +467,6 @@ static struct clk_lookup dm365_clks[] = {
467 467
468/*----------------------------------------------------------------------*/ 468/*----------------------------------------------------------------------*/
469 469
470#define PINMUX0 0x00
471#define PINMUX1 0x04
472#define PINMUX2 0x08
473#define PINMUX3 0x0c
474#define PINMUX4 0x10
475#define INTMUX 0x18 470#define INTMUX 0x18
476#define EVTMUX 0x1c 471#define EVTMUX 0x1c
477 472
@@ -490,11 +485,14 @@ MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false)
490MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false) 485MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false)
491MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false) 486MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false)
492 487
493MUX_CFG(DM365, AEMIF_AR, 2, 0, 3, 1, false) 488MUX_CFG(DM365, AEMIF_AR_A14, 2, 0, 3, 1, false)
489MUX_CFG(DM365, AEMIF_AR_BA0, 2, 0, 3, 2, false)
494MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false) 490MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false)
495MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false) 491MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false)
496MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false) 492MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false)
497MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false) 493MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false)
494MUX_CFG(DM365, AEMIF_CE1, 2, 8, 1, 0, false)
495MUX_CFG(DM365, AEMIF_WE_OE, 2, 9, 1, 0, false)
498 496
499MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false) 497MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false)
500MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false) 498MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false)
@@ -573,9 +571,17 @@ MUX_CFG(DM365, SPI4_SDO, 4, 16, 3, 1, false)
573MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false) 571MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false)
574MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false) 572MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false)
575 573
574MUX_CFG(DM365, CLKOUT0, 4, 20, 3, 3, false)
575MUX_CFG(DM365, CLKOUT1, 4, 16, 3, 3, false)
576MUX_CFG(DM365, CLKOUT2, 4, 8, 3, 3, false)
577
576MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false) 578MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false)
579MUX_CFG(DM365, GPIO30, 4, 6, 3, 0, false)
580MUX_CFG(DM365, GPIO31, 4, 8, 3, 0, false)
581MUX_CFG(DM365, GPIO32, 4, 10, 3, 0, false)
577MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false) 582MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false)
578MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false) 583MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false)
584MUX_CFG(DM365, GPIO64_57, 2, 6, 1, 0, false)
579 585
580MUX_CFG(DM365, VOUT_FIELD, 1, 18, 3, 1, false) 586MUX_CFG(DM365, VOUT_FIELD, 1, 18, 3, 1, false)
581MUX_CFG(DM365, VOUT_FIELD_G81, 1, 18, 3, 0, false) 587MUX_CFG(DM365, VOUT_FIELD_G81, 1, 18, 3, 0, false)
@@ -1006,11 +1012,9 @@ static struct davinci_id dm365_ids[] = {
1006 }, 1012 },
1007}; 1013};
1008 1014
1009static void __iomem *dm365_psc_bases[] = { 1015static u32 dm365_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
1010 IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
1011};
1012 1016
1013struct davinci_timer_info dm365_timer_info = { 1017static struct davinci_timer_info dm365_timer_info = {
1014 .timers = davinci_timer_instance, 1018 .timers = davinci_timer_instance,
1015 .clockevent_id = T0_BOT, 1019 .clockevent_id = T0_BOT,
1016 .clocksource_id = T0_TOP, 1020 .clocksource_id = T0_TOP,
@@ -1049,21 +1053,22 @@ static struct platform_device dm365_serial_device = {
1049static struct davinci_soc_info davinci_soc_info_dm365 = { 1053static struct davinci_soc_info davinci_soc_info_dm365 = {
1050 .io_desc = dm365_io_desc, 1054 .io_desc = dm365_io_desc,
1051 .io_desc_num = ARRAY_SIZE(dm365_io_desc), 1055 .io_desc_num = ARRAY_SIZE(dm365_io_desc),
1052 .jtag_id_base = IO_ADDRESS(0x01c40028), 1056 .jtag_id_reg = 0x01c40028,
1053 .ids = dm365_ids, 1057 .ids = dm365_ids,
1054 .ids_num = ARRAY_SIZE(dm365_ids), 1058 .ids_num = ARRAY_SIZE(dm365_ids),
1055 .cpu_clks = dm365_clks, 1059 .cpu_clks = dm365_clks,
1056 .psc_bases = dm365_psc_bases, 1060 .psc_bases = dm365_psc_bases,
1057 .psc_bases_num = ARRAY_SIZE(dm365_psc_bases), 1061 .psc_bases_num = ARRAY_SIZE(dm365_psc_bases),
1058 .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), 1062 .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
1059 .pinmux_pins = dm365_pins, 1063 .pinmux_pins = dm365_pins,
1060 .pinmux_pins_num = ARRAY_SIZE(dm365_pins), 1064 .pinmux_pins_num = ARRAY_SIZE(dm365_pins),
1061 .intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE), 1065 .intc_base = DAVINCI_ARM_INTC_BASE,
1062 .intc_type = DAVINCI_INTC_TYPE_AINTC, 1066 .intc_type = DAVINCI_INTC_TYPE_AINTC,
1063 .intc_irq_prios = dm365_default_priorities, 1067 .intc_irq_prios = dm365_default_priorities,
1064 .intc_irq_num = DAVINCI_N_AINTC_IRQ, 1068 .intc_irq_num = DAVINCI_N_AINTC_IRQ,
1065 .timer_info = &dm365_timer_info, 1069 .timer_info = &dm365_timer_info,
1066 .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), 1070 .gpio_type = GPIO_TYPE_DAVINCI,
1071 .gpio_base = DAVINCI_GPIO_BASE,
1067 .gpio_num = 104, 1072 .gpio_num = 104,
1068 .gpio_irq = IRQ_DM365_GPIO0, 1073 .gpio_irq = IRQ_DM365_GPIO0,
1069 .gpio_unbanked = 8, /* really 16 ... skip muxed GPIOs */ 1074 .gpio_unbanked = 8, /* really 16 ... skip muxed GPIOs */
@@ -1071,6 +1076,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
1071 .emac_pdata = &dm365_emac_pdata, 1076 .emac_pdata = &dm365_emac_pdata,
1072 .sram_dma = 0x00010000, 1077 .sram_dma = 0x00010000,
1073 .sram_len = SZ_32K, 1078 .sram_len = SZ_32K,
1079 .reset_device = &davinci_wdt_device,
1074}; 1080};
1075 1081
1076void __init dm365_init_asp(struct snd_platform_data *pdata) 1082void __init dm365_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 2f2ae8bc77bb..7ad15208b841 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -277,7 +277,7 @@ static struct clk timer2_clk = {
277 .usecount = 1, /* REVISIT: why cant' this be disabled? */ 277 .usecount = 1, /* REVISIT: why cant' this be disabled? */
278}; 278};
279 279
280struct clk_lookup dm644x_clks[] = { 280static struct clk_lookup dm644x_clks[] = {
281 CLK(NULL, "ref", &ref_clk), 281 CLK(NULL, "ref", &ref_clk),
282 CLK(NULL, "pll1", &pll1_clk), 282 CLK(NULL, "pll1", &pll1_clk),
283 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), 283 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
@@ -350,9 +350,6 @@ static struct platform_device dm644x_emac_device = {
350 .resource = dm644x_emac_resources, 350 .resource = dm644x_emac_resources,
351}; 351};
352 352
353#define PINMUX0 0x00
354#define PINMUX1 0x04
355
356/* 353/*
357 * Device specific mux setup 354 * Device specific mux setup
358 * 355 *
@@ -677,9 +674,7 @@ static struct davinci_id dm644x_ids[] = {
677 }, 674 },
678}; 675};
679 676
680static void __iomem *dm644x_psc_bases[] = { 677static u32 dm644x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
681 IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
682};
683 678
684/* 679/*
685 * T0_BOT: Timer 0, bottom: clockevent source for hrtimers 680 * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
@@ -687,7 +682,7 @@ static void __iomem *dm644x_psc_bases[] = {
687 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) 682 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
688 * T1_TOP: Timer 1, top : <unused> 683 * T1_TOP: Timer 1, top : <unused>
689 */ 684 */
690struct davinci_timer_info dm644x_timer_info = { 685static struct davinci_timer_info dm644x_timer_info = {
691 .timers = davinci_timer_instance, 686 .timers = davinci_timer_instance,
692 .clockevent_id = T0_BOT, 687 .clockevent_id = T0_BOT,
693 .clocksource_id = T0_TOP, 688 .clocksource_id = T0_TOP,
@@ -734,27 +729,29 @@ static struct platform_device dm644x_serial_device = {
734static struct davinci_soc_info davinci_soc_info_dm644x = { 729static struct davinci_soc_info davinci_soc_info_dm644x = {
735 .io_desc = dm644x_io_desc, 730 .io_desc = dm644x_io_desc,
736 .io_desc_num = ARRAY_SIZE(dm644x_io_desc), 731 .io_desc_num = ARRAY_SIZE(dm644x_io_desc),
737 .jtag_id_base = IO_ADDRESS(0x01c40028), 732 .jtag_id_reg = 0x01c40028,
738 .ids = dm644x_ids, 733 .ids = dm644x_ids,
739 .ids_num = ARRAY_SIZE(dm644x_ids), 734 .ids_num = ARRAY_SIZE(dm644x_ids),
740 .cpu_clks = dm644x_clks, 735 .cpu_clks = dm644x_clks,
741 .psc_bases = dm644x_psc_bases, 736 .psc_bases = dm644x_psc_bases,
742 .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases), 737 .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases),
743 .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), 738 .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
744 .pinmux_pins = dm644x_pins, 739 .pinmux_pins = dm644x_pins,
745 .pinmux_pins_num = ARRAY_SIZE(dm644x_pins), 740 .pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
746 .intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE), 741 .intc_base = DAVINCI_ARM_INTC_BASE,
747 .intc_type = DAVINCI_INTC_TYPE_AINTC, 742 .intc_type = DAVINCI_INTC_TYPE_AINTC,
748 .intc_irq_prios = dm644x_default_priorities, 743 .intc_irq_prios = dm644x_default_priorities,
749 .intc_irq_num = DAVINCI_N_AINTC_IRQ, 744 .intc_irq_num = DAVINCI_N_AINTC_IRQ,
750 .timer_info = &dm644x_timer_info, 745 .timer_info = &dm644x_timer_info,
751 .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), 746 .gpio_type = GPIO_TYPE_DAVINCI,
747 .gpio_base = DAVINCI_GPIO_BASE,
752 .gpio_num = 71, 748 .gpio_num = 71,
753 .gpio_irq = IRQ_GPIOBNK0, 749 .gpio_irq = IRQ_GPIOBNK0,
754 .serial_dev = &dm644x_serial_device, 750 .serial_dev = &dm644x_serial_device,
755 .emac_pdata = &dm644x_emac_pdata, 751 .emac_pdata = &dm644x_emac_pdata,
756 .sram_dma = 0x00008000, 752 .sram_dma = 0x00008000,
757 .sram_len = SZ_16K, 753 .sram_len = SZ_16K,
754 .reset_device = &davinci_wdt_device,
758}; 755};
759 756
760void __init dm644x_init_asp(struct snd_platform_data *pdata) 757void __init dm644x_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 893baf4ad37d..94045656cff6 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -311,7 +311,7 @@ static struct clk vpif1_clk = {
311 .flags = ALWAYS_ENABLED, 311 .flags = ALWAYS_ENABLED,
312}; 312};
313 313
314struct clk_lookup dm646x_clks[] = { 314static struct clk_lookup dm646x_clks[] = {
315 CLK(NULL, "ref", &ref_clk), 315 CLK(NULL, "ref", &ref_clk),
316 CLK(NULL, "aux", &aux_clkin), 316 CLK(NULL, "aux", &aux_clkin),
317 CLK(NULL, "pll1", &pll1_clk), 317 CLK(NULL, "pll1", &pll1_clk),
@@ -401,9 +401,6 @@ static struct platform_device dm646x_emac_device = {
401 .resource = dm646x_emac_resources, 401 .resource = dm646x_emac_resources,
402}; 402};
403 403
404#define PINMUX0 0x00
405#define PINMUX1 0x04
406
407/* 404/*
408 * Device specific mux setup 405 * Device specific mux setup
409 * 406 *
@@ -596,32 +593,6 @@ static struct platform_device dm646x_edma_device = {
596 .resource = edma_resources, 593 .resource = edma_resources,
597}; 594};
598 595
599static struct resource ide_resources[] = {
600 {
601 .start = DM646X_ATA_REG_BASE,
602 .end = DM646X_ATA_REG_BASE + 0x7ff,
603 .flags = IORESOURCE_MEM,
604 },
605 {
606 .start = IRQ_DM646X_IDE,
607 .end = IRQ_DM646X_IDE,
608 .flags = IORESOURCE_IRQ,
609 },
610};
611
612static u64 ide_dma_mask = DMA_BIT_MASK(32);
613
614static struct platform_device ide_dev = {
615 .name = "palm_bk3710",
616 .id = -1,
617 .resource = ide_resources,
618 .num_resources = ARRAY_SIZE(ide_resources),
619 .dev = {
620 .dma_mask = &ide_dma_mask,
621 .coherent_dma_mask = DMA_BIT_MASK(32),
622 },
623};
624
625static struct resource dm646x_mcasp0_resources[] = { 596static struct resource dm646x_mcasp0_resources[] = {
626 { 597 {
627 .name = "mcasp0", 598 .name = "mcasp0",
@@ -787,9 +758,7 @@ static struct davinci_id dm646x_ids[] = {
787 }, 758 },
788}; 759};
789 760
790static void __iomem *dm646x_psc_bases[] = { 761static u32 dm646x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
791 IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
792};
793 762
794/* 763/*
795 * T0_BOT: Timer 0, bottom: clockevent source for hrtimers 764 * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
@@ -797,7 +766,7 @@ static void __iomem *dm646x_psc_bases[] = {
797 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) 766 * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
798 * T1_TOP: Timer 1, top : <unused> 767 * T1_TOP: Timer 1, top : <unused>
799 */ 768 */
800struct davinci_timer_info dm646x_timer_info = { 769static struct davinci_timer_info dm646x_timer_info = {
801 .timers = davinci_timer_instance, 770 .timers = davinci_timer_instance,
802 .clockevent_id = T0_BOT, 771 .clockevent_id = T0_BOT,
803 .clocksource_id = T0_TOP, 772 .clocksource_id = T0_TOP,
@@ -844,35 +813,31 @@ static struct platform_device dm646x_serial_device = {
844static struct davinci_soc_info davinci_soc_info_dm646x = { 813static struct davinci_soc_info davinci_soc_info_dm646x = {
845 .io_desc = dm646x_io_desc, 814 .io_desc = dm646x_io_desc,
846 .io_desc_num = ARRAY_SIZE(dm646x_io_desc), 815 .io_desc_num = ARRAY_SIZE(dm646x_io_desc),
847 .jtag_id_base = IO_ADDRESS(0x01c40028), 816 .jtag_id_reg = 0x01c40028,
848 .ids = dm646x_ids, 817 .ids = dm646x_ids,
849 .ids_num = ARRAY_SIZE(dm646x_ids), 818 .ids_num = ARRAY_SIZE(dm646x_ids),
850 .cpu_clks = dm646x_clks, 819 .cpu_clks = dm646x_clks,
851 .psc_bases = dm646x_psc_bases, 820 .psc_bases = dm646x_psc_bases,
852 .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases), 821 .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases),
853 .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), 822 .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
854 .pinmux_pins = dm646x_pins, 823 .pinmux_pins = dm646x_pins,
855 .pinmux_pins_num = ARRAY_SIZE(dm646x_pins), 824 .pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
856 .intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE), 825 .intc_base = DAVINCI_ARM_INTC_BASE,
857 .intc_type = DAVINCI_INTC_TYPE_AINTC, 826 .intc_type = DAVINCI_INTC_TYPE_AINTC,
858 .intc_irq_prios = dm646x_default_priorities, 827 .intc_irq_prios = dm646x_default_priorities,
859 .intc_irq_num = DAVINCI_N_AINTC_IRQ, 828 .intc_irq_num = DAVINCI_N_AINTC_IRQ,
860 .timer_info = &dm646x_timer_info, 829 .timer_info = &dm646x_timer_info,
861 .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), 830 .gpio_type = GPIO_TYPE_DAVINCI,
831 .gpio_base = DAVINCI_GPIO_BASE,
862 .gpio_num = 43, /* Only 33 usable */ 832 .gpio_num = 43, /* Only 33 usable */
863 .gpio_irq = IRQ_DM646X_GPIOBNK0, 833 .gpio_irq = IRQ_DM646X_GPIOBNK0,
864 .serial_dev = &dm646x_serial_device, 834 .serial_dev = &dm646x_serial_device,
865 .emac_pdata = &dm646x_emac_pdata, 835 .emac_pdata = &dm646x_emac_pdata,
866 .sram_dma = 0x10010000, 836 .sram_dma = 0x10010000,
867 .sram_len = SZ_32K, 837 .sram_len = SZ_32K,
838 .reset_device = &davinci_wdt_device,
868}; 839};
869 840
870void __init dm646x_init_ide()
871{
872 davinci_cfg_reg(DM646X_ATAEN);
873 platform_device_register(&ide_dev);
874}
875
876void __init dm646x_init_mcasp0(struct snd_platform_data *pdata) 841void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
877{ 842{
878 dm646x_mcasp0_device.dev.platform_data = pdata; 843 dm646x_mcasp0_device.dev.platform_data = pdata;
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 53137387aee1..d33827aadda7 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -243,7 +243,7 @@ struct edma {
243 } intr_data[EDMA_MAX_DMACH]; 243 } intr_data[EDMA_MAX_DMACH];
244}; 244};
245 245
246static struct edma *edma_info[EDMA_MAX_CC]; 246static struct edma *edma_cc[EDMA_MAX_CC];
247static int arch_num_cc; 247static int arch_num_cc;
248 248
249/* dummy param set used to (re)initialize parameter RAM slots */ 249/* dummy param set used to (re)initialize parameter RAM slots */
@@ -261,7 +261,7 @@ static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
261 261
262 /* default to low priority queue */ 262 /* default to low priority queue */
263 if (queue_no == EVENTQ_DEFAULT) 263 if (queue_no == EVENTQ_DEFAULT)
264 queue_no = edma_info[ctlr]->default_queue; 264 queue_no = edma_cc[ctlr]->default_queue;
265 265
266 queue_no &= 7; 266 queue_no &= 7;
267 edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3), 267 edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3),
@@ -310,29 +310,27 @@ setup_dma_interrupt(unsigned lch,
310 ctlr = EDMA_CTLR(lch); 310 ctlr = EDMA_CTLR(lch);
311 lch = EDMA_CHAN_SLOT(lch); 311 lch = EDMA_CHAN_SLOT(lch);
312 312
313 if (!callback) { 313 if (!callback)
314 edma_shadow0_write_array(ctlr, SH_IECR, lch >> 5, 314 edma_shadow0_write_array(ctlr, SH_IECR, lch >> 5,
315 (1 << (lch & 0x1f))); 315 BIT(lch & 0x1f));
316 }
317 316
318 edma_info[ctlr]->intr_data[lch].callback = callback; 317 edma_cc[ctlr]->intr_data[lch].callback = callback;
319 edma_info[ctlr]->intr_data[lch].data = data; 318 edma_cc[ctlr]->intr_data[lch].data = data;
320 319
321 if (callback) { 320 if (callback) {
322 edma_shadow0_write_array(ctlr, SH_ICR, lch >> 5, 321 edma_shadow0_write_array(ctlr, SH_ICR, lch >> 5,
323 (1 << (lch & 0x1f))); 322 BIT(lch & 0x1f));
324 edma_shadow0_write_array(ctlr, SH_IESR, lch >> 5, 323 edma_shadow0_write_array(ctlr, SH_IESR, lch >> 5,
325 (1 << (lch & 0x1f))); 324 BIT(lch & 0x1f));
326 } 325 }
327} 326}
328 327
329static int irq2ctlr(int irq) 328static int irq2ctlr(int irq)
330{ 329{
331 if (irq >= edma_info[0]->irq_res_start && 330 if (irq >= edma_cc[0]->irq_res_start && irq <= edma_cc[0]->irq_res_end)
332 irq <= edma_info[0]->irq_res_end)
333 return 0; 331 return 0;
334 else if (irq >= edma_info[1]->irq_res_start && 332 else if (irq >= edma_cc[1]->irq_res_start &&
335 irq <= edma_info[1]->irq_res_end) 333 irq <= edma_cc[1]->irq_res_end)
336 return 1; 334 return 1;
337 335
338 return -1; 336 return -1;
@@ -353,15 +351,17 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
353 351
354 dev_dbg(data, "dma_irq_handler\n"); 352 dev_dbg(data, "dma_irq_handler\n");
355 353
356 if ((edma_shadow0_read_array(ctlr, SH_IPR, 0) == 0) 354 if ((edma_shadow0_read_array(ctlr, SH_IPR, 0) == 0) &&
357 && (edma_shadow0_read_array(ctlr, SH_IPR, 1) == 0)) 355 (edma_shadow0_read_array(ctlr, SH_IPR, 1) == 0))
358 return IRQ_NONE; 356 return IRQ_NONE;
359 357
360 while (1) { 358 while (1) {
361 int j; 359 int j;
362 if (edma_shadow0_read_array(ctlr, SH_IPR, 0)) 360 if (edma_shadow0_read_array(ctlr, SH_IPR, 0) &
361 edma_shadow0_read_array(ctlr, SH_IER, 0))
363 j = 0; 362 j = 0;
364 else if (edma_shadow0_read_array(ctlr, SH_IPR, 1)) 363 else if (edma_shadow0_read_array(ctlr, SH_IPR, 1) &
364 edma_shadow0_read_array(ctlr, SH_IER, 1))
365 j = 1; 365 j = 1;
366 else 366 else
367 break; 367 break;
@@ -369,17 +369,17 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
369 edma_shadow0_read_array(ctlr, SH_IPR, j)); 369 edma_shadow0_read_array(ctlr, SH_IPR, j));
370 for (i = 0; i < 32; i++) { 370 for (i = 0; i < 32; i++) {
371 int k = (j << 5) + i; 371 int k = (j << 5) + i;
372 if (edma_shadow0_read_array(ctlr, SH_IPR, j) & 372 if ((edma_shadow0_read_array(ctlr, SH_IPR, j) & BIT(i))
373 (1 << i)) { 373 && (edma_shadow0_read_array(ctlr,
374 SH_IER, j) & BIT(i))) {
374 /* Clear the corresponding IPR bits */ 375 /* Clear the corresponding IPR bits */
375 edma_shadow0_write_array(ctlr, SH_ICR, j, 376 edma_shadow0_write_array(ctlr, SH_ICR, j,
376 (1 << i)); 377 BIT(i));
377 if (edma_info[ctlr]->intr_data[k].callback) { 378 if (edma_cc[ctlr]->intr_data[k].callback)
378 edma_info[ctlr]->intr_data[k].callback( 379 edma_cc[ctlr]->intr_data[k].callback(
379 k, DMA_COMPLETE, 380 k, DMA_COMPLETE,
380 edma_info[ctlr]->intr_data[k]. 381 edma_cc[ctlr]->intr_data[k].
381 data); 382 data);
382 }
383 } 383 }
384 } 384 }
385 cnt++; 385 cnt++;
@@ -423,19 +423,19 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
423 for (i = 0; i < 32; i++) { 423 for (i = 0; i < 32; i++) {
424 int k = (j << 5) + i; 424 int k = (j << 5) + i;
425 if (edma_read_array(ctlr, EDMA_EMR, j) & 425 if (edma_read_array(ctlr, EDMA_EMR, j) &
426 (1 << i)) { 426 BIT(i)) {
427 /* Clear the corresponding EMR bits */ 427 /* Clear the corresponding EMR bits */
428 edma_write_array(ctlr, EDMA_EMCR, j, 428 edma_write_array(ctlr, EDMA_EMCR, j,
429 1 << i); 429 BIT(i));
430 /* Clear any SER */ 430 /* Clear any SER */
431 edma_shadow0_write_array(ctlr, SH_SECR, 431 edma_shadow0_write_array(ctlr, SH_SECR,
432 j, (1 << i)); 432 j, BIT(i));
433 if (edma_info[ctlr]->intr_data[k]. 433 if (edma_cc[ctlr]->intr_data[k].
434 callback) { 434 callback) {
435 edma_info[ctlr]->intr_data[k]. 435 edma_cc[ctlr]->intr_data[k].
436 callback(k, 436 callback(k,
437 DMA_CC_ERROR, 437 DMA_CC_ERROR,
438 edma_info[ctlr]->intr_data 438 edma_cc[ctlr]->intr_data
439 [k].data); 439 [k].data);
440 } 440 }
441 } 441 }
@@ -444,11 +444,11 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
444 dev_dbg(data, "QEMR %02x\n", 444 dev_dbg(data, "QEMR %02x\n",
445 edma_read(ctlr, EDMA_QEMR)); 445 edma_read(ctlr, EDMA_QEMR));
446 for (i = 0; i < 8; i++) { 446 for (i = 0; i < 8; i++) {
447 if (edma_read(ctlr, EDMA_QEMR) & (1 << i)) { 447 if (edma_read(ctlr, EDMA_QEMR) & BIT(i)) {
448 /* Clear the corresponding IPR bits */ 448 /* Clear the corresponding IPR bits */
449 edma_write(ctlr, EDMA_QEMCR, 1 << i); 449 edma_write(ctlr, EDMA_QEMCR, BIT(i));
450 edma_shadow0_write(ctlr, SH_QSECR, 450 edma_shadow0_write(ctlr, SH_QSECR,
451 (1 << i)); 451 BIT(i));
452 452
453 /* NOTE: not reported!! */ 453 /* NOTE: not reported!! */
454 } 454 }
@@ -460,20 +460,19 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
460 * to just write CCERRCLR with CCERR value... 460 * to just write CCERRCLR with CCERR value...
461 */ 461 */
462 for (i = 0; i < 8; i++) { 462 for (i = 0; i < 8; i++) {
463 if (edma_read(ctlr, EDMA_CCERR) & (1 << i)) { 463 if (edma_read(ctlr, EDMA_CCERR) & BIT(i)) {
464 /* Clear the corresponding IPR bits */ 464 /* Clear the corresponding IPR bits */
465 edma_write(ctlr, EDMA_CCERRCLR, 1 << i); 465 edma_write(ctlr, EDMA_CCERRCLR, BIT(i));
466 466
467 /* NOTE: not reported!! */ 467 /* NOTE: not reported!! */
468 } 468 }
469 } 469 }
470 } 470 }
471 if ((edma_read_array(ctlr, EDMA_EMR, 0) == 0) 471 if ((edma_read_array(ctlr, EDMA_EMR, 0) == 0) &&
472 && (edma_read_array(ctlr, EDMA_EMR, 1) == 0) 472 (edma_read_array(ctlr, EDMA_EMR, 1) == 0) &&
473 && (edma_read(ctlr, EDMA_QEMR) == 0) 473 (edma_read(ctlr, EDMA_QEMR) == 0) &&
474 && (edma_read(ctlr, EDMA_CCERR) == 0)) { 474 (edma_read(ctlr, EDMA_CCERR) == 0))
475 break; 475 break;
476 }
477 cnt++; 476 cnt++;
478 if (cnt > 10) 477 if (cnt > 10)
479 break; 478 break;
@@ -511,9 +510,9 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
511 int stop_slot = start_slot; 510 int stop_slot = start_slot;
512 DECLARE_BITMAP(tmp_inuse, EDMA_MAX_PARAMENTRY); 511 DECLARE_BITMAP(tmp_inuse, EDMA_MAX_PARAMENTRY);
513 512
514 for (i = start_slot; i < edma_info[ctlr]->num_slots; ++i) { 513 for (i = start_slot; i < edma_cc[ctlr]->num_slots; ++i) {
515 j = EDMA_CHAN_SLOT(i); 514 j = EDMA_CHAN_SLOT(i);
516 if (!test_and_set_bit(j, edma_info[ctlr]->edma_inuse)) { 515 if (!test_and_set_bit(j, edma_cc[ctlr]->edma_inuse)) {
517 /* Record our current beginning slot */ 516 /* Record our current beginning slot */
518 if (count == num_slots) 517 if (count == num_slots)
519 stop_slot = i; 518 stop_slot = i;
@@ -529,8 +528,9 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
529 if (id == EDMA_CONT_PARAMS_FIXED_EXACT) { 528 if (id == EDMA_CONT_PARAMS_FIXED_EXACT) {
530 stop_slot = i; 529 stop_slot = i;
531 break; 530 break;
532 } else 531 } else {
533 count = num_slots; 532 count = num_slots;
533 }
534 } 534 }
535 } 535 }
536 536
@@ -540,12 +540,12 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
540 * of contiguous parameter RAM slots but do not find the exact number 540 * of contiguous parameter RAM slots but do not find the exact number
541 * requested as we may reach the total number of parameter RAM slots 541 * requested as we may reach the total number of parameter RAM slots
542 */ 542 */
543 if (i == edma_info[ctlr]->num_slots) 543 if (i == edma_cc[ctlr]->num_slots)
544 stop_slot = i; 544 stop_slot = i;
545 545
546 for (j = start_slot; j < stop_slot; j++) 546 for (j = start_slot; j < stop_slot; j++)
547 if (test_bit(j, tmp_inuse)) 547 if (test_bit(j, tmp_inuse))
548 clear_bit(j, edma_info[ctlr]->edma_inuse); 548 clear_bit(j, edma_cc[ctlr]->edma_inuse);
549 549
550 if (count) 550 if (count)
551 return -EBUSY; 551 return -EBUSY;
@@ -567,7 +567,7 @@ static int prepare_unused_channel_list(struct device *dev, void *data)
567 (int)pdev->resource[i].start >= 0) { 567 (int)pdev->resource[i].start >= 0) {
568 ctlr = EDMA_CTLR(pdev->resource[i].start); 568 ctlr = EDMA_CTLR(pdev->resource[i].start);
569 clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), 569 clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start),
570 edma_info[ctlr]->edma_unused); 570 edma_cc[ctlr]->edma_unused);
571 } 571 }
572 } 572 }
573 573
@@ -641,14 +641,13 @@ int edma_alloc_channel(int channel,
641 for (i = 0; i < arch_num_cc; i++) { 641 for (i = 0; i < arch_num_cc; i++) {
642 channel = 0; 642 channel = 0;
643 for (;;) { 643 for (;;) {
644 channel = find_next_bit(edma_info[i]-> 644 channel = find_next_bit(edma_cc[i]->edma_unused,
645 edma_unused, 645 edma_cc[i]->num_channels,
646 edma_info[i]->num_channels,
647 channel); 646 channel);
648 if (channel == edma_info[i]->num_channels) 647 if (channel == edma_cc[i]->num_channels)
649 break; 648 break;
650 if (!test_and_set_bit(channel, 649 if (!test_and_set_bit(channel,
651 edma_info[i]->edma_inuse)) { 650 edma_cc[i]->edma_inuse)) {
652 done = 1; 651 done = 1;
653 ctlr = i; 652 ctlr = i;
654 break; 653 break;
@@ -660,14 +659,14 @@ int edma_alloc_channel(int channel,
660 } 659 }
661 if (!done) 660 if (!done)
662 return -ENOMEM; 661 return -ENOMEM;
663 } else if (channel >= edma_info[ctlr]->num_channels) { 662 } else if (channel >= edma_cc[ctlr]->num_channels) {
664 return -EINVAL; 663 return -EINVAL;
665 } else if (test_and_set_bit(channel, edma_info[ctlr]->edma_inuse)) { 664 } else if (test_and_set_bit(channel, edma_cc[ctlr]->edma_inuse)) {
666 return -EBUSY; 665 return -EBUSY;
667 } 666 }
668 667
669 /* ensure access through shadow region 0 */ 668 /* ensure access through shadow region 0 */
670 edma_or_array2(ctlr, EDMA_DRAE, 0, channel >> 5, 1 << (channel & 0x1f)); 669 edma_or_array2(ctlr, EDMA_DRAE, 0, channel >> 5, BIT(channel & 0x1f));
671 670
672 /* ensure no events are pending */ 671 /* ensure no events are pending */
673 edma_stop(EDMA_CTLR_CHAN(ctlr, channel)); 672 edma_stop(EDMA_CTLR_CHAN(ctlr, channel));
@@ -703,7 +702,7 @@ void edma_free_channel(unsigned channel)
703 ctlr = EDMA_CTLR(channel); 702 ctlr = EDMA_CTLR(channel);
704 channel = EDMA_CHAN_SLOT(channel); 703 channel = EDMA_CHAN_SLOT(channel);
705 704
706 if (channel >= edma_info[ctlr]->num_channels) 705 if (channel >= edma_cc[ctlr]->num_channels)
707 return; 706 return;
708 707
709 setup_dma_interrupt(channel, NULL, NULL); 708 setup_dma_interrupt(channel, NULL, NULL);
@@ -711,7 +710,7 @@ void edma_free_channel(unsigned channel)
711 710
712 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(channel), 711 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(channel),
713 &dummy_paramset, PARM_SIZE); 712 &dummy_paramset, PARM_SIZE);
714 clear_bit(channel, edma_info[ctlr]->edma_inuse); 713 clear_bit(channel, edma_cc[ctlr]->edma_inuse);
715} 714}
716EXPORT_SYMBOL(edma_free_channel); 715EXPORT_SYMBOL(edma_free_channel);
717 716
@@ -735,20 +734,19 @@ int edma_alloc_slot(unsigned ctlr, int slot)
735 slot = EDMA_CHAN_SLOT(slot); 734 slot = EDMA_CHAN_SLOT(slot);
736 735
737 if (slot < 0) { 736 if (slot < 0) {
738 slot = edma_info[ctlr]->num_channels; 737 slot = edma_cc[ctlr]->num_channels;
739 for (;;) { 738 for (;;) {
740 slot = find_next_zero_bit(edma_info[ctlr]->edma_inuse, 739 slot = find_next_zero_bit(edma_cc[ctlr]->edma_inuse,
741 edma_info[ctlr]->num_slots, slot); 740 edma_cc[ctlr]->num_slots, slot);
742 if (slot == edma_info[ctlr]->num_slots) 741 if (slot == edma_cc[ctlr]->num_slots)
743 return -ENOMEM; 742 return -ENOMEM;
744 if (!test_and_set_bit(slot, 743 if (!test_and_set_bit(slot, edma_cc[ctlr]->edma_inuse))
745 edma_info[ctlr]->edma_inuse))
746 break; 744 break;
747 } 745 }
748 } else if (slot < edma_info[ctlr]->num_channels || 746 } else if (slot < edma_cc[ctlr]->num_channels ||
749 slot >= edma_info[ctlr]->num_slots) { 747 slot >= edma_cc[ctlr]->num_slots) {
750 return -EINVAL; 748 return -EINVAL;
751 } else if (test_and_set_bit(slot, edma_info[ctlr]->edma_inuse)) { 749 } else if (test_and_set_bit(slot, edma_cc[ctlr]->edma_inuse)) {
752 return -EBUSY; 750 return -EBUSY;
753 } 751 }
754 752
@@ -774,13 +772,13 @@ void edma_free_slot(unsigned slot)
774 ctlr = EDMA_CTLR(slot); 772 ctlr = EDMA_CTLR(slot);
775 slot = EDMA_CHAN_SLOT(slot); 773 slot = EDMA_CHAN_SLOT(slot);
776 774
777 if (slot < edma_info[ctlr]->num_channels || 775 if (slot < edma_cc[ctlr]->num_channels ||
778 slot >= edma_info[ctlr]->num_slots) 776 slot >= edma_cc[ctlr]->num_slots)
779 return; 777 return;
780 778
781 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), 779 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
782 &dummy_paramset, PARM_SIZE); 780 &dummy_paramset, PARM_SIZE);
783 clear_bit(slot, edma_info[ctlr]->edma_inuse); 781 clear_bit(slot, edma_cc[ctlr]->edma_inuse);
784} 782}
785EXPORT_SYMBOL(edma_free_slot); 783EXPORT_SYMBOL(edma_free_slot);
786 784
@@ -818,8 +816,8 @@ int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
818 * of slots 816 * of slots
819 */ 817 */
820 if ((id != EDMA_CONT_PARAMS_ANY) && 818 if ((id != EDMA_CONT_PARAMS_ANY) &&
821 (slot < edma_info[ctlr]->num_channels || 819 (slot < edma_cc[ctlr]->num_channels ||
822 slot >= edma_info[ctlr]->num_slots)) 820 slot >= edma_cc[ctlr]->num_slots))
823 return -EINVAL; 821 return -EINVAL;
824 822
825 /* 823 /*
@@ -828,13 +826,13 @@ int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
828 * channels 826 * channels
829 */ 827 */
830 if (count < 1 || count > 828 if (count < 1 || count >
831 (edma_info[ctlr]->num_slots - edma_info[ctlr]->num_channels)) 829 (edma_cc[ctlr]->num_slots - edma_cc[ctlr]->num_channels))
832 return -EINVAL; 830 return -EINVAL;
833 831
834 switch (id) { 832 switch (id) {
835 case EDMA_CONT_PARAMS_ANY: 833 case EDMA_CONT_PARAMS_ANY:
836 return reserve_contiguous_slots(ctlr, id, count, 834 return reserve_contiguous_slots(ctlr, id, count,
837 edma_info[ctlr]->num_channels); 835 edma_cc[ctlr]->num_channels);
838 case EDMA_CONT_PARAMS_FIXED_EXACT: 836 case EDMA_CONT_PARAMS_FIXED_EXACT:
839 case EDMA_CONT_PARAMS_FIXED_NOT_EXACT: 837 case EDMA_CONT_PARAMS_FIXED_NOT_EXACT:
840 return reserve_contiguous_slots(ctlr, id, count, slot); 838 return reserve_contiguous_slots(ctlr, id, count, slot);
@@ -866,8 +864,8 @@ int edma_free_cont_slots(unsigned slot, int count)
866 ctlr = EDMA_CTLR(slot); 864 ctlr = EDMA_CTLR(slot);
867 slot = EDMA_CHAN_SLOT(slot); 865 slot = EDMA_CHAN_SLOT(slot);
868 866
869 if (slot < edma_info[ctlr]->num_channels || 867 if (slot < edma_cc[ctlr]->num_channels ||
870 slot >= edma_info[ctlr]->num_slots || 868 slot >= edma_cc[ctlr]->num_slots ||
871 count < 1) 869 count < 1)
872 return -EINVAL; 870 return -EINVAL;
873 871
@@ -877,7 +875,7 @@ int edma_free_cont_slots(unsigned slot, int count)
877 875
878 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot_to_free), 876 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot_to_free),
879 &dummy_paramset, PARM_SIZE); 877 &dummy_paramset, PARM_SIZE);
880 clear_bit(slot_to_free, edma_info[ctlr]->edma_inuse); 878 clear_bit(slot_to_free, edma_cc[ctlr]->edma_inuse);
881 } 879 }
882 880
883 return 0; 881 return 0;
@@ -907,7 +905,7 @@ void edma_set_src(unsigned slot, dma_addr_t src_port,
907 ctlr = EDMA_CTLR(slot); 905 ctlr = EDMA_CTLR(slot);
908 slot = EDMA_CHAN_SLOT(slot); 906 slot = EDMA_CHAN_SLOT(slot);
909 907
910 if (slot < edma_info[ctlr]->num_slots) { 908 if (slot < edma_cc[ctlr]->num_slots) {
911 unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot); 909 unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
912 910
913 if (mode) { 911 if (mode) {
@@ -945,7 +943,7 @@ void edma_set_dest(unsigned slot, dma_addr_t dest_port,
945 ctlr = EDMA_CTLR(slot); 943 ctlr = EDMA_CTLR(slot);
946 slot = EDMA_CHAN_SLOT(slot); 944 slot = EDMA_CHAN_SLOT(slot);
947 945
948 if (slot < edma_info[ctlr]->num_slots) { 946 if (slot < edma_cc[ctlr]->num_slots) {
949 unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot); 947 unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
950 948
951 if (mode) { 949 if (mode) {
@@ -1005,7 +1003,7 @@ void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx)
1005 ctlr = EDMA_CTLR(slot); 1003 ctlr = EDMA_CTLR(slot);
1006 slot = EDMA_CHAN_SLOT(slot); 1004 slot = EDMA_CHAN_SLOT(slot);
1007 1005
1008 if (slot < edma_info[ctlr]->num_slots) { 1006 if (slot < edma_cc[ctlr]->num_slots) {
1009 edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot, 1007 edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
1010 0xffff0000, src_bidx); 1008 0xffff0000, src_bidx);
1011 edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot, 1009 edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
@@ -1031,7 +1029,7 @@ void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx)
1031 ctlr = EDMA_CTLR(slot); 1029 ctlr = EDMA_CTLR(slot);
1032 slot = EDMA_CHAN_SLOT(slot); 1030 slot = EDMA_CHAN_SLOT(slot);
1033 1031
1034 if (slot < edma_info[ctlr]->num_slots) { 1032 if (slot < edma_cc[ctlr]->num_slots) {
1035 edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot, 1033 edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
1036 0x0000ffff, dest_bidx << 16); 1034 0x0000ffff, dest_bidx << 16);
1037 edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot, 1035 edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
@@ -1078,7 +1076,7 @@ void edma_set_transfer_params(unsigned slot,
1078 ctlr = EDMA_CTLR(slot); 1076 ctlr = EDMA_CTLR(slot);
1079 slot = EDMA_CHAN_SLOT(slot); 1077 slot = EDMA_CHAN_SLOT(slot);
1080 1078
1081 if (slot < edma_info[ctlr]->num_slots) { 1079 if (slot < edma_cc[ctlr]->num_slots) {
1082 edma_parm_modify(ctlr, PARM_LINK_BCNTRLD, slot, 1080 edma_parm_modify(ctlr, PARM_LINK_BCNTRLD, slot,
1083 0x0000ffff, bcnt_rld << 16); 1081 0x0000ffff, bcnt_rld << 16);
1084 if (sync_mode == ASYNC) 1082 if (sync_mode == ASYNC)
@@ -1108,9 +1106,9 @@ void edma_link(unsigned from, unsigned to)
1108 ctlr_to = EDMA_CTLR(to); 1106 ctlr_to = EDMA_CTLR(to);
1109 to = EDMA_CHAN_SLOT(to); 1107 to = EDMA_CHAN_SLOT(to);
1110 1108
1111 if (from >= edma_info[ctlr_from]->num_slots) 1109 if (from >= edma_cc[ctlr_from]->num_slots)
1112 return; 1110 return;
1113 if (to >= edma_info[ctlr_to]->num_slots) 1111 if (to >= edma_cc[ctlr_to]->num_slots)
1114 return; 1112 return;
1115 edma_parm_modify(ctlr_from, PARM_LINK_BCNTRLD, from, 0xffff0000, 1113 edma_parm_modify(ctlr_from, PARM_LINK_BCNTRLD, from, 0xffff0000,
1116 PARM_OFFSET(to)); 1114 PARM_OFFSET(to));
@@ -1131,7 +1129,7 @@ void edma_unlink(unsigned from)
1131 ctlr = EDMA_CTLR(from); 1129 ctlr = EDMA_CTLR(from);
1132 from = EDMA_CHAN_SLOT(from); 1130 from = EDMA_CHAN_SLOT(from);
1133 1131
1134 if (from >= edma_info[ctlr]->num_slots) 1132 if (from >= edma_cc[ctlr]->num_slots)
1135 return; 1133 return;
1136 edma_parm_or(ctlr, PARM_LINK_BCNTRLD, from, 0xffff); 1134 edma_parm_or(ctlr, PARM_LINK_BCNTRLD, from, 0xffff);
1137} 1135}
@@ -1158,7 +1156,7 @@ void edma_write_slot(unsigned slot, const struct edmacc_param *param)
1158 ctlr = EDMA_CTLR(slot); 1156 ctlr = EDMA_CTLR(slot);
1159 slot = EDMA_CHAN_SLOT(slot); 1157 slot = EDMA_CHAN_SLOT(slot);
1160 1158
1161 if (slot >= edma_info[ctlr]->num_slots) 1159 if (slot >= edma_cc[ctlr]->num_slots)
1162 return; 1160 return;
1163 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), param, 1161 memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), param,
1164 PARM_SIZE); 1162 PARM_SIZE);
@@ -1180,7 +1178,7 @@ void edma_read_slot(unsigned slot, struct edmacc_param *param)
1180 ctlr = EDMA_CTLR(slot); 1178 ctlr = EDMA_CTLR(slot);
1181 slot = EDMA_CHAN_SLOT(slot); 1179 slot = EDMA_CHAN_SLOT(slot);
1182 1180
1183 if (slot >= edma_info[ctlr]->num_slots) 1181 if (slot >= edma_cc[ctlr]->num_slots)
1184 return; 1182 return;
1185 memcpy_fromio(param, edmacc_regs_base[ctlr] + PARM_OFFSET(slot), 1183 memcpy_fromio(param, edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
1186 PARM_SIZE); 1184 PARM_SIZE);
@@ -1205,8 +1203,8 @@ void edma_pause(unsigned channel)
1205 ctlr = EDMA_CTLR(channel); 1203 ctlr = EDMA_CTLR(channel);
1206 channel = EDMA_CHAN_SLOT(channel); 1204 channel = EDMA_CHAN_SLOT(channel);
1207 1205
1208 if (channel < edma_info[ctlr]->num_channels) { 1206 if (channel < edma_cc[ctlr]->num_channels) {
1209 unsigned int mask = (1 << (channel & 0x1f)); 1207 unsigned int mask = BIT(channel & 0x1f);
1210 1208
1211 edma_shadow0_write_array(ctlr, SH_EECR, channel >> 5, mask); 1209 edma_shadow0_write_array(ctlr, SH_EECR, channel >> 5, mask);
1212 } 1210 }
@@ -1226,8 +1224,8 @@ void edma_resume(unsigned channel)
1226 ctlr = EDMA_CTLR(channel); 1224 ctlr = EDMA_CTLR(channel);
1227 channel = EDMA_CHAN_SLOT(channel); 1225 channel = EDMA_CHAN_SLOT(channel);
1228 1226
1229 if (channel < edma_info[ctlr]->num_channels) { 1227 if (channel < edma_cc[ctlr]->num_channels) {
1230 unsigned int mask = (1 << (channel & 0x1f)); 1228 unsigned int mask = BIT(channel & 0x1f);
1231 1229
1232 edma_shadow0_write_array(ctlr, SH_EESR, channel >> 5, mask); 1230 edma_shadow0_write_array(ctlr, SH_EESR, channel >> 5, mask);
1233 } 1231 }
@@ -1252,12 +1250,12 @@ int edma_start(unsigned channel)
1252 ctlr = EDMA_CTLR(channel); 1250 ctlr = EDMA_CTLR(channel);
1253 channel = EDMA_CHAN_SLOT(channel); 1251 channel = EDMA_CHAN_SLOT(channel);
1254 1252
1255 if (channel < edma_info[ctlr]->num_channels) { 1253 if (channel < edma_cc[ctlr]->num_channels) {
1256 int j = channel >> 5; 1254 int j = channel >> 5;
1257 unsigned int mask = (1 << (channel & 0x1f)); 1255 unsigned int mask = BIT(channel & 0x1f);
1258 1256
1259 /* EDMA channels without event association */ 1257 /* EDMA channels without event association */
1260 if (test_bit(channel, edma_info[ctlr]->edma_unused)) { 1258 if (test_bit(channel, edma_cc[ctlr]->edma_unused)) {
1261 pr_debug("EDMA: ESR%d %08x\n", j, 1259 pr_debug("EDMA: ESR%d %08x\n", j,
1262 edma_shadow0_read_array(ctlr, SH_ESR, j)); 1260 edma_shadow0_read_array(ctlr, SH_ESR, j));
1263 edma_shadow0_write_array(ctlr, SH_ESR, j, mask); 1261 edma_shadow0_write_array(ctlr, SH_ESR, j, mask);
@@ -1298,9 +1296,9 @@ void edma_stop(unsigned channel)
1298 ctlr = EDMA_CTLR(channel); 1296 ctlr = EDMA_CTLR(channel);
1299 channel = EDMA_CHAN_SLOT(channel); 1297 channel = EDMA_CHAN_SLOT(channel);
1300 1298
1301 if (channel < edma_info[ctlr]->num_channels) { 1299 if (channel < edma_cc[ctlr]->num_channels) {
1302 int j = channel >> 5; 1300 int j = channel >> 5;
1303 unsigned int mask = (1 << (channel & 0x1f)); 1301 unsigned int mask = BIT(channel & 0x1f);
1304 1302
1305 edma_shadow0_write_array(ctlr, SH_EECR, j, mask); 1303 edma_shadow0_write_array(ctlr, SH_EECR, j, mask);
1306 edma_shadow0_write_array(ctlr, SH_ECR, j, mask); 1304 edma_shadow0_write_array(ctlr, SH_ECR, j, mask);
@@ -1337,9 +1335,9 @@ void edma_clean_channel(unsigned channel)
1337 ctlr = EDMA_CTLR(channel); 1335 ctlr = EDMA_CTLR(channel);
1338 channel = EDMA_CHAN_SLOT(channel); 1336 channel = EDMA_CHAN_SLOT(channel);
1339 1337
1340 if (channel < edma_info[ctlr]->num_channels) { 1338 if (channel < edma_cc[ctlr]->num_channels) {
1341 int j = (channel >> 5); 1339 int j = (channel >> 5);
1342 unsigned int mask = 1 << (channel & 0x1f); 1340 unsigned int mask = BIT(channel & 0x1f);
1343 1341
1344 pr_debug("EDMA: EMR%d %08x\n", j, 1342 pr_debug("EDMA: EMR%d %08x\n", j,
1345 edma_read_array(ctlr, EDMA_EMR, j)); 1343 edma_read_array(ctlr, EDMA_EMR, j));
@@ -1348,7 +1346,7 @@ void edma_clean_channel(unsigned channel)
1348 edma_write_array(ctlr, EDMA_EMCR, j, mask); 1346 edma_write_array(ctlr, EDMA_EMCR, j, mask);
1349 /* Clear any SER */ 1347 /* Clear any SER */
1350 edma_shadow0_write_array(ctlr, SH_SECR, j, mask); 1348 edma_shadow0_write_array(ctlr, SH_SECR, j, mask);
1351 edma_write(ctlr, EDMA_CCERRCLR, (1 << 16) | 0x3); 1349 edma_write(ctlr, EDMA_CCERRCLR, BIT(16) | BIT(1) | BIT(0));
1352 } 1350 }
1353} 1351}
1354EXPORT_SYMBOL(edma_clean_channel); 1352EXPORT_SYMBOL(edma_clean_channel);
@@ -1365,12 +1363,12 @@ void edma_clear_event(unsigned channel)
1365 ctlr = EDMA_CTLR(channel); 1363 ctlr = EDMA_CTLR(channel);
1366 channel = EDMA_CHAN_SLOT(channel); 1364 channel = EDMA_CHAN_SLOT(channel);
1367 1365
1368 if (channel >= edma_info[ctlr]->num_channels) 1366 if (channel >= edma_cc[ctlr]->num_channels)
1369 return; 1367 return;
1370 if (channel < 32) 1368 if (channel < 32)
1371 edma_write(ctlr, EDMA_ECR, 1 << channel); 1369 edma_write(ctlr, EDMA_ECR, BIT(channel));
1372 else 1370 else
1373 edma_write(ctlr, EDMA_ECRH, 1 << (channel - 32)); 1371 edma_write(ctlr, EDMA_ECRH, BIT(channel - 32));
1374} 1372}
1375EXPORT_SYMBOL(edma_clear_event); 1373EXPORT_SYMBOL(edma_clear_event);
1376 1374
@@ -1402,8 +1400,9 @@ static int __init edma_probe(struct platform_device *pdev)
1402 break; 1400 break;
1403 else 1401 else
1404 return -ENODEV; 1402 return -ENODEV;
1405 } else 1403 } else {
1406 found = 1; 1404 found = 1;
1405 }
1407 1406
1408 len[j] = resource_size(r[j]); 1407 len[j] = resource_size(r[j]);
1409 1408
@@ -1420,38 +1419,37 @@ static int __init edma_probe(struct platform_device *pdev)
1420 goto fail1; 1419 goto fail1;
1421 } 1420 }
1422 1421
1423 edma_info[j] = kmalloc(sizeof(struct edma), GFP_KERNEL); 1422 edma_cc[j] = kmalloc(sizeof(struct edma), GFP_KERNEL);
1424 if (!edma_info[j]) { 1423 if (!edma_cc[j]) {
1425 status = -ENOMEM; 1424 status = -ENOMEM;
1426 goto fail1; 1425 goto fail1;
1427 } 1426 }
1428 memset(edma_info[j], 0, sizeof(struct edma)); 1427 memset(edma_cc[j], 0, sizeof(struct edma));
1429 1428
1430 edma_info[j]->num_channels = min_t(unsigned, info[j].n_channel, 1429 edma_cc[j]->num_channels = min_t(unsigned, info[j].n_channel,
1431 EDMA_MAX_DMACH); 1430 EDMA_MAX_DMACH);
1432 edma_info[j]->num_slots = min_t(unsigned, info[j].n_slot, 1431 edma_cc[j]->num_slots = min_t(unsigned, info[j].n_slot,
1433 EDMA_MAX_PARAMENTRY); 1432 EDMA_MAX_PARAMENTRY);
1434 edma_info[j]->num_cc = min_t(unsigned, info[j].n_cc, 1433 edma_cc[j]->num_cc = min_t(unsigned, info[j].n_cc, EDMA_MAX_CC);
1435 EDMA_MAX_CC);
1436 1434
1437 edma_info[j]->default_queue = info[j].default_queue; 1435 edma_cc[j]->default_queue = info[j].default_queue;
1438 if (!edma_info[j]->default_queue) 1436 if (!edma_cc[j]->default_queue)
1439 edma_info[j]->default_queue = EVENTQ_1; 1437 edma_cc[j]->default_queue = EVENTQ_1;
1440 1438
1441 dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", 1439 dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
1442 edmacc_regs_base[j]); 1440 edmacc_regs_base[j]);
1443 1441
1444 for (i = 0; i < edma_info[j]->num_slots; i++) 1442 for (i = 0; i < edma_cc[j]->num_slots; i++)
1445 memcpy_toio(edmacc_regs_base[j] + PARM_OFFSET(i), 1443 memcpy_toio(edmacc_regs_base[j] + PARM_OFFSET(i),
1446 &dummy_paramset, PARM_SIZE); 1444 &dummy_paramset, PARM_SIZE);
1447 1445
1448 /* Mark all channels as unused */ 1446 /* Mark all channels as unused */
1449 memset(edma_info[j]->edma_unused, 0xff, 1447 memset(edma_cc[j]->edma_unused, 0xff,
1450 sizeof(edma_info[j]->edma_unused)); 1448 sizeof(edma_cc[j]->edma_unused));
1451 1449
1452 sprintf(irq_name, "edma%d", j); 1450 sprintf(irq_name, "edma%d", j);
1453 irq[j] = platform_get_irq_byname(pdev, irq_name); 1451 irq[j] = platform_get_irq_byname(pdev, irq_name);
1454 edma_info[j]->irq_res_start = irq[j]; 1452 edma_cc[j]->irq_res_start = irq[j];
1455 status = request_irq(irq[j], dma_irq_handler, 0, "edma", 1453 status = request_irq(irq[j], dma_irq_handler, 0, "edma",
1456 &pdev->dev); 1454 &pdev->dev);
1457 if (status < 0) { 1455 if (status < 0) {
@@ -1462,7 +1460,7 @@ static int __init edma_probe(struct platform_device *pdev)
1462 1460
1463 sprintf(irq_name, "edma%d_err", j); 1461 sprintf(irq_name, "edma%d_err", j);
1464 err_irq[j] = platform_get_irq_byname(pdev, irq_name); 1462 err_irq[j] = platform_get_irq_byname(pdev, irq_name);
1465 edma_info[j]->irq_res_end = err_irq[j]; 1463 edma_cc[j]->irq_res_end = err_irq[j];
1466 status = request_irq(err_irq[j], dma_ccerr_handler, 0, 1464 status = request_irq(err_irq[j], dma_ccerr_handler, 0,
1467 "edma_error", &pdev->dev); 1465 "edma_error", &pdev->dev);
1468 if (status < 0) { 1466 if (status < 0) {
@@ -1475,7 +1473,7 @@ static int __init edma_probe(struct platform_device *pdev)
1475 * specified. This way, long transfers on the low priority queue 1473 * specified. This way, long transfers on the low priority queue
1476 * started by the codec engine will not cause audio defects. 1474 * started by the codec engine will not cause audio defects.
1477 */ 1475 */
1478 for (i = 0; i < edma_info[j]->num_channels; i++) 1476 for (i = 0; i < edma_cc[j]->num_channels; i++)
1479 map_dmach_queue(j, i, EVENTQ_1); 1477 map_dmach_queue(j, i, EVENTQ_1);
1480 1478
1481 queue_tc_mapping = info[j].queue_tc_mapping; 1479 queue_tc_mapping = info[j].queue_tc_mapping;
@@ -1538,7 +1536,7 @@ fail1:
1538 release_mem_region(r[i]->start, len[i]); 1536 release_mem_region(r[i]->start, len[i]);
1539 if (edmacc_regs_base[i]) 1537 if (edmacc_regs_base[i])
1540 iounmap(edmacc_regs_base[i]); 1538 iounmap(edmacc_regs_base[i]);
1541 kfree(edma_info[i]); 1539 kfree(edma_cc[i]);
1542 } 1540 }
1543 return status; 1541 return status;
1544} 1542}
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 744755b53236..bf0ff587e46a 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -20,46 +20,92 @@
20 20
21#include <asm/mach/irq.h> 21#include <asm/mach/irq.h>
22 22
23static DEFINE_SPINLOCK(gpio_lock); 23struct davinci_gpio_regs {
24 24 u32 dir;
25struct davinci_gpio { 25 u32 out_data;
26 struct gpio_chip chip; 26 u32 set_data;
27 struct gpio_controller *__iomem regs; 27 u32 clr_data;
28 int irq_base; 28 u32 in_data;
29 u32 set_rising;
30 u32 clr_rising;
31 u32 set_falling;
32 u32 clr_falling;
33 u32 intstat;
29}; 34};
30 35
31static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; 36#define chip2controller(chip) \
37 container_of(chip, struct davinci_gpio_controller, chip)
38
39static struct davinci_gpio_controller chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
40static void __iomem *gpio_base;
41
42static struct davinci_gpio_regs __iomem __init *gpio2regs(unsigned gpio)
43{
44 void __iomem *ptr;
45
46 if (gpio < 32 * 1)
47 ptr = gpio_base + 0x10;
48 else if (gpio < 32 * 2)
49 ptr = gpio_base + 0x38;
50 else if (gpio < 32 * 3)
51 ptr = gpio_base + 0x60;
52 else if (gpio < 32 * 4)
53 ptr = gpio_base + 0x88;
54 else if (gpio < 32 * 5)
55 ptr = gpio_base + 0xb0;
56 else
57 ptr = NULL;
58 return ptr;
59}
32 60
33/* create a non-inlined version */ 61static inline struct davinci_gpio_regs __iomem *irq2regs(int irq)
34static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio)
35{ 62{
36 return __gpio_to_controller(gpio); 63 struct davinci_gpio_regs __iomem *g;
64
65 g = (__force struct davinci_gpio_regs __iomem *)get_irq_chip_data(irq);
66
67 return g;
37} 68}
38 69
39static int __init davinci_gpio_irq_setup(void); 70static int __init davinci_gpio_irq_setup(void);
40 71
41/*--------------------------------------------------------------------------*/ 72/*--------------------------------------------------------------------------*/
42 73
43/* 74/* board setup code *MUST* setup pinmux and enable the GPIO clock. */
44 * board setup code *MUST* set PINMUX0 and PINMUX1 as 75static inline int __davinci_direction(struct gpio_chip *chip,
45 * needed, and enable the GPIO clock. 76 unsigned offset, bool out, int value)
46 */
47
48static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
49{ 77{
50 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 78 struct davinci_gpio_controller *d = chip2controller(chip);
51 struct gpio_controller *__iomem g = d->regs; 79 struct davinci_gpio_regs __iomem *g = d->regs;
80 unsigned long flags;
52 u32 temp; 81 u32 temp;
82 u32 mask = 1 << offset;
53 83
54 spin_lock(&gpio_lock); 84 spin_lock_irqsave(&d->lock, flags);
55 temp = __raw_readl(&g->dir); 85 temp = __raw_readl(&g->dir);
56 temp |= (1 << offset); 86 if (out) {
87 temp &= ~mask;
88 __raw_writel(mask, value ? &g->set_data : &g->clr_data);
89 } else {
90 temp |= mask;
91 }
57 __raw_writel(temp, &g->dir); 92 __raw_writel(temp, &g->dir);
58 spin_unlock(&gpio_lock); 93 spin_unlock_irqrestore(&d->lock, flags);
59 94
60 return 0; 95 return 0;
61} 96}
62 97
98static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
99{
100 return __davinci_direction(chip, offset, false, 0);
101}
102
103static int
104davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
105{
106 return __davinci_direction(chip, offset, true, value);
107}
108
63/* 109/*
64 * Read the pin's value (works even if it's set up as output); 110 * Read the pin's value (works even if it's set up as output);
65 * returns zero/nonzero. 111 * returns zero/nonzero.
@@ -69,37 +115,20 @@ static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
69 */ 115 */
70static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) 116static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
71{ 117{
72 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 118 struct davinci_gpio_controller *d = chip2controller(chip);
73 struct gpio_controller *__iomem g = d->regs; 119 struct davinci_gpio_regs __iomem *g = d->regs;
74 120
75 return (1 << offset) & __raw_readl(&g->in_data); 121 return (1 << offset) & __raw_readl(&g->in_data);
76} 122}
77 123
78static int
79davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
80{
81 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
82 struct gpio_controller *__iomem g = d->regs;
83 u32 temp;
84 u32 mask = 1 << offset;
85
86 spin_lock(&gpio_lock);
87 temp = __raw_readl(&g->dir);
88 temp &= ~mask;
89 __raw_writel(mask, value ? &g->set_data : &g->clr_data);
90 __raw_writel(temp, &g->dir);
91 spin_unlock(&gpio_lock);
92 return 0;
93}
94
95/* 124/*
96 * Assuming the pin is muxed as a gpio output, set its output value. 125 * Assuming the pin is muxed as a gpio output, set its output value.
97 */ 126 */
98static void 127static void
99davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 128davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
100{ 129{
101 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 130 struct davinci_gpio_controller *d = chip2controller(chip);
102 struct gpio_controller *__iomem g = d->regs; 131 struct davinci_gpio_regs __iomem *g = d->regs;
103 132
104 __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data); 133 __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data);
105} 134}
@@ -109,6 +138,10 @@ static int __init davinci_gpio_setup(void)
109 int i, base; 138 int i, base;
110 unsigned ngpio; 139 unsigned ngpio;
111 struct davinci_soc_info *soc_info = &davinci_soc_info; 140 struct davinci_soc_info *soc_info = &davinci_soc_info;
141 struct davinci_gpio_regs *regs;
142
143 if (soc_info->gpio_type != GPIO_TYPE_DAVINCI)
144 return 0;
112 145
113 /* 146 /*
114 * The gpio banks conceptually expose a segmented bitmap, 147 * The gpio banks conceptually expose a segmented bitmap,
@@ -124,6 +157,10 @@ static int __init davinci_gpio_setup(void)
124 if (WARN_ON(DAVINCI_N_GPIO < ngpio)) 157 if (WARN_ON(DAVINCI_N_GPIO < ngpio))
125 ngpio = DAVINCI_N_GPIO; 158 ngpio = DAVINCI_N_GPIO;
126 159
160 gpio_base = ioremap(soc_info->gpio_base, SZ_4K);
161 if (WARN_ON(!gpio_base))
162 return -ENOMEM;
163
127 for (i = 0, base = 0; base < ngpio; i++, base += 32) { 164 for (i = 0, base = 0; base < ngpio; i++, base += 32) {
128 chips[i].chip.label = "DaVinci"; 165 chips[i].chip.label = "DaVinci";
129 166
@@ -137,11 +174,20 @@ static int __init davinci_gpio_setup(void)
137 if (chips[i].chip.ngpio > 32) 174 if (chips[i].chip.ngpio > 32)
138 chips[i].chip.ngpio = 32; 175 chips[i].chip.ngpio = 32;
139 176
140 chips[i].regs = gpio2controller(base); 177 spin_lock_init(&chips[i].lock);
178
179 regs = gpio2regs(base);
180 chips[i].regs = regs;
181 chips[i].set_data = &regs->set_data;
182 chips[i].clr_data = &regs->clr_data;
183 chips[i].in_data = &regs->in_data;
141 184
142 gpiochip_add(&chips[i].chip); 185 gpiochip_add(&chips[i].chip);
143 } 186 }
144 187
188 soc_info->gpio_ctlrs = chips;
189 soc_info->gpio_ctlrs_num = DIV_ROUND_UP(ngpio, 32);
190
145 davinci_gpio_irq_setup(); 191 davinci_gpio_irq_setup();
146 return 0; 192 return 0;
147} 193}
@@ -161,7 +207,7 @@ pure_initcall(davinci_gpio_setup);
161 207
162static void gpio_irq_disable(unsigned irq) 208static void gpio_irq_disable(unsigned irq)
163{ 209{
164 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 210 struct davinci_gpio_regs __iomem *g = irq2regs(irq);
165 u32 mask = (u32) get_irq_data(irq); 211 u32 mask = (u32) get_irq_data(irq);
166 212
167 __raw_writel(mask, &g->clr_falling); 213 __raw_writel(mask, &g->clr_falling);
@@ -170,7 +216,7 @@ static void gpio_irq_disable(unsigned irq)
170 216
171static void gpio_irq_enable(unsigned irq) 217static void gpio_irq_enable(unsigned irq)
172{ 218{
173 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 219 struct davinci_gpio_regs __iomem *g = irq2regs(irq);
174 u32 mask = (u32) get_irq_data(irq); 220 u32 mask = (u32) get_irq_data(irq);
175 unsigned status = irq_desc[irq].status; 221 unsigned status = irq_desc[irq].status;
176 222
@@ -186,7 +232,7 @@ static void gpio_irq_enable(unsigned irq)
186 232
187static int gpio_irq_type(unsigned irq, unsigned trigger) 233static int gpio_irq_type(unsigned irq, unsigned trigger)
188{ 234{
189 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 235 struct davinci_gpio_regs __iomem *g = irq2regs(irq);
190 u32 mask = (u32) get_irq_data(irq); 236 u32 mask = (u32) get_irq_data(irq);
191 237
192 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 238 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
@@ -215,7 +261,7 @@ static struct irq_chip gpio_irqchip = {
215static void 261static void
216gpio_irq_handler(unsigned irq, struct irq_desc *desc) 262gpio_irq_handler(unsigned irq, struct irq_desc *desc)
217{ 263{
218 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 264 struct davinci_gpio_regs __iomem *g = irq2regs(irq);
219 u32 mask = 0xffff; 265 u32 mask = 0xffff;
220 266
221 /* we only care about one bank */ 267 /* we only care about one bank */
@@ -253,7 +299,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
253 299
254static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) 300static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset)
255{ 301{
256 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); 302 struct davinci_gpio_controller *d = chip2controller(chip);
257 303
258 if (d->irq_base >= 0) 304 if (d->irq_base >= 0)
259 return d->irq_base + offset; 305 return d->irq_base + offset;
@@ -276,7 +322,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
276 322
277static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger) 323static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger)
278{ 324{
279 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 325 struct davinci_gpio_regs __iomem *g = irq2regs(irq);
280 u32 mask = (u32) get_irq_data(irq); 326 u32 mask = (u32) get_irq_data(irq);
281 327
282 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 328 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
@@ -305,7 +351,7 @@ static int __init davinci_gpio_irq_setup(void)
305 u32 binten = 0; 351 u32 binten = 0;
306 unsigned ngpio, bank_irq; 352 unsigned ngpio, bank_irq;
307 struct davinci_soc_info *soc_info = &davinci_soc_info; 353 struct davinci_soc_info *soc_info = &davinci_soc_info;
308 struct gpio_controller *__iomem g; 354 struct davinci_gpio_regs __iomem *g;
309 355
310 ngpio = soc_info->gpio_num; 356 ngpio = soc_info->gpio_num;
311 357
@@ -354,7 +400,7 @@ static int __init davinci_gpio_irq_setup(void)
354 gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked; 400 gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked;
355 401
356 /* default trigger: both edges */ 402 /* default trigger: both edges */
357 g = gpio2controller(0); 403 g = gpio2regs(0);
358 __raw_writel(~0, &g->set_falling); 404 __raw_writel(~0, &g->set_falling);
359 __raw_writel(~0, &g->set_rising); 405 __raw_writel(~0, &g->set_rising);
360 406
@@ -362,7 +408,7 @@ static int __init davinci_gpio_irq_setup(void)
362 for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { 408 for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
363 set_irq_chip(irq, &gpio_irqchip_unbanked); 409 set_irq_chip(irq, &gpio_irqchip_unbanked);
364 set_irq_data(irq, (void *) __gpio_mask(gpio)); 410 set_irq_data(irq, (void *) __gpio_mask(gpio));
365 set_irq_chip_data(irq, g); 411 set_irq_chip_data(irq, (__force void *) g);
366 irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH; 412 irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH;
367 } 413 }
368 414
@@ -379,18 +425,18 @@ static int __init davinci_gpio_irq_setup(void)
379 unsigned i; 425 unsigned i;
380 426
381 /* disabled by default, enabled only as needed */ 427 /* disabled by default, enabled only as needed */
382 g = gpio2controller(gpio); 428 g = gpio2regs(gpio);
383 __raw_writel(~0, &g->clr_falling); 429 __raw_writel(~0, &g->clr_falling);
384 __raw_writel(~0, &g->clr_rising); 430 __raw_writel(~0, &g->clr_rising);
385 431
386 /* set up all irqs in this bank */ 432 /* set up all irqs in this bank */
387 set_irq_chained_handler(bank_irq, gpio_irq_handler); 433 set_irq_chained_handler(bank_irq, gpio_irq_handler);
388 set_irq_chip_data(bank_irq, g); 434 set_irq_chip_data(bank_irq, (__force void *) g);
389 set_irq_data(bank_irq, (void *)irq); 435 set_irq_data(bank_irq, (void *) irq);
390 436
391 for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { 437 for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
392 set_irq_chip(irq, &gpio_irqchip); 438 set_irq_chip(irq, &gpio_irqchip);
393 set_irq_chip_data(irq, g); 439 set_irq_chip_data(irq, (__force void *) g);
394 set_irq_data(irq, (void *) __gpio_mask(gpio)); 440 set_irq_data(irq, (void *) __gpio_mask(gpio));
395 set_irq_handler(irq, handle_simple_irq); 441 set_irq_handler(irq, handle_simple_irq);
396 set_irq_flags(irq, IRQF_VALID); 442 set_irq_flags(irq, IRQF_VALID);
@@ -403,7 +449,7 @@ done:
403 /* BINTEN -- per-bank interrupt enable. genirq would also let these 449 /* BINTEN -- per-bank interrupt enable. genirq would also let these
404 * bits be set/cleared dynamically. 450 * bits be set/cleared dynamically.
405 */ 451 */
406 __raw_writel(binten, soc_info->gpio_base + 0x08); 452 __raw_writel(binten, gpio_base + 0x08);
407 453
408 printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0)); 454 printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));
409 455
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 50a955f05ef9..a57cba21e21e 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -12,6 +12,9 @@
12#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H 12#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
13#define __ARCH_ARM_MACH_DAVINCI_COMMON_H 13#define __ARCH_ARM_MACH_DAVINCI_COMMON_H
14 14
15#include <linux/compiler.h>
16#include <linux/types.h>
17
15struct sys_timer; 18struct sys_timer;
16 19
17extern struct sys_timer davinci_timer; 20extern struct sys_timer davinci_timer;
@@ -21,7 +24,7 @@ extern void __iomem *davinci_intc_base;
21extern int davinci_intc_type; 24extern int davinci_intc_type;
22 25
23struct davinci_timer_instance { 26struct davinci_timer_instance {
24 void __iomem *base; 27 u32 base;
25 u32 bottom_irq; 28 u32 bottom_irq;
26 u32 top_irq; 29 u32 top_irq;
27 unsigned long cmp_off; 30 unsigned long cmp_off;
@@ -34,39 +37,54 @@ struct davinci_timer_info {
34 unsigned int clocksource_id; 37 unsigned int clocksource_id;
35}; 38};
36 39
37/* SoC specific init support */ 40struct davinci_gpio_controller;
41
42/*
43 * SoC info passed into common davinci modules.
44 *
45 * Base addresses in this structure should be physical and not virtual.
46 * Modules that take such base addresses, should internally ioremap() them to
47 * use.
48 */
38struct davinci_soc_info { 49struct davinci_soc_info {
39 struct map_desc *io_desc; 50 struct map_desc *io_desc;
40 unsigned long io_desc_num; 51 unsigned long io_desc_num;
41 u32 cpu_id; 52 u32 cpu_id;
42 u32 jtag_id; 53 u32 jtag_id;
43 void __iomem *jtag_id_base; 54 u32 jtag_id_reg;
44 struct davinci_id *ids; 55 struct davinci_id *ids;
45 unsigned long ids_num; 56 unsigned long ids_num;
46 struct clk_lookup *cpu_clks; 57 struct clk_lookup *cpu_clks;
47 void __iomem **psc_bases; 58 u32 *psc_bases;
48 unsigned long psc_bases_num; 59 unsigned long psc_bases_num;
49 void __iomem *pinmux_base; 60 u32 pinmux_base;
50 const struct mux_config *pinmux_pins; 61 const struct mux_config *pinmux_pins;
51 unsigned long pinmux_pins_num; 62 unsigned long pinmux_pins_num;
52 void __iomem *intc_base; 63 u32 intc_base;
53 int intc_type; 64 int intc_type;
54 u8 *intc_irq_prios; 65 u8 *intc_irq_prios;
55 unsigned long intc_irq_num; 66 unsigned long intc_irq_num;
67 u32 *intc_host_map;
56 struct davinci_timer_info *timer_info; 68 struct davinci_timer_info *timer_info;
57 void __iomem *gpio_base; 69 int gpio_type;
70 u32 gpio_base;
58 unsigned gpio_num; 71 unsigned gpio_num;
59 unsigned gpio_irq; 72 unsigned gpio_irq;
60 unsigned gpio_unbanked; 73 unsigned gpio_unbanked;
74 struct davinci_gpio_controller *gpio_ctlrs;
75 int gpio_ctlrs_num;
61 struct platform_device *serial_dev; 76 struct platform_device *serial_dev;
62 struct emac_platform_data *emac_pdata; 77 struct emac_platform_data *emac_pdata;
63 dma_addr_t sram_dma; 78 dma_addr_t sram_dma;
64 unsigned sram_len; 79 unsigned sram_len;
80 struct platform_device *reset_device;
81 void (*reset)(struct platform_device *);
65}; 82};
66 83
67extern struct davinci_soc_info davinci_soc_info; 84extern struct davinci_soc_info davinci_soc_info;
68 85
69extern void davinci_common_init(struct davinci_soc_info *soc_info); 86extern void davinci_common_init(struct davinci_soc_info *soc_info);
87extern void davinci_init_ide(void);
70 88
71/* standard place to map on-chip SRAMs; they *may* support DMA */ 89/* standard place to map on-chip SRAMs; they *may* support DMA */
72#define SRAM_VIRT 0xfffe0000 90#define SRAM_VIRT 0xfffe0000
diff --git a/arch/arm/mach-davinci/include/mach/cp_intc.h b/arch/arm/mach-davinci/include/mach/cp_intc.h
index c4d27eec8064..4e8190eed673 100644
--- a/arch/arm/mach-davinci/include/mach/cp_intc.h
+++ b/arch/arm/mach-davinci/include/mach/cp_intc.h
@@ -51,7 +51,6 @@
51#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2)) 51#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
52#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2)) 52#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
53 53
54void __init cp_intc_init(void __iomem *base, unsigned short num_irq, 54void __init cp_intc_init(void);
55 u8 *irq_prio);
56 55
57#endif /* __ASM_HARDWARE_CP_INTC_H */ 56#endif /* __ASM_HARDWARE_CP_INTC_H */
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h
index 189b1ff13642..cea6b8972043 100644
--- a/arch/arm/mach-davinci/include/mach/cputype.h
+++ b/arch/arm/mach-davinci/include/mach/cputype.h
@@ -33,6 +33,7 @@ struct davinci_id {
33#define DAVINCI_CPU_ID_DM365 0x03650000 33#define DAVINCI_CPU_ID_DM365 0x03650000
34#define DAVINCI_CPU_ID_DA830 0x08300000 34#define DAVINCI_CPU_ID_DA830 0x08300000
35#define DAVINCI_CPU_ID_DA850 0x08500000 35#define DAVINCI_CPU_ID_DA850 0x08500000
36#define DAVINCI_CPU_ID_TNETV107X 0x0b8a0000
36 37
37#define IS_DAVINCI_CPU(type, id) \ 38#define IS_DAVINCI_CPU(type, id) \
38static inline int is_davinci_ ##type(void) \ 39static inline int is_davinci_ ##type(void) \
@@ -46,6 +47,7 @@ IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355)
46IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365) 47IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365)
47IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) 48IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830)
48IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850) 49IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850)
50IS_DAVINCI_CPU(tnetv107x, DAVINCI_CPU_ID_TNETV107X)
49 51
50#ifdef CONFIG_ARCH_DAVINCI_DM644x 52#ifdef CONFIG_ARCH_DAVINCI_DM644x
51#define cpu_is_davinci_dm644x() is_davinci_dm644x() 53#define cpu_is_davinci_dm644x() is_davinci_dm644x()
@@ -83,4 +85,10 @@ IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850)
83#define cpu_is_davinci_da850() 0 85#define cpu_is_davinci_da850() 0
84#endif 86#endif
85 87
88#ifdef CONFIG_ARCH_DAVINCI_TNETV107X
89#define cpu_is_davinci_tnetv107x() is_davinci_tnetv107x()
90#else
91#define cpu_is_davinci_tnetv107x() 0
92#endif
93
86#endif 94#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 03acfd39042b..1b31a9aa8fba 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -64,27 +64,6 @@ extern void __iomem *da8xx_syscfg1_base;
64#define DA8XX_DDR2_CTL_BASE 0xb0000000 64#define DA8XX_DDR2_CTL_BASE 0xb0000000
65#define DA8XX_ARM_RAM_BASE 0xffff0000 65#define DA8XX_ARM_RAM_BASE 0xffff0000
66 66
67#define PINMUX0 0x00
68#define PINMUX1 0x04
69#define PINMUX2 0x08
70#define PINMUX3 0x0c
71#define PINMUX4 0x10
72#define PINMUX5 0x14
73#define PINMUX6 0x18
74#define PINMUX7 0x1c
75#define PINMUX8 0x20
76#define PINMUX9 0x24
77#define PINMUX10 0x28
78#define PINMUX11 0x2c
79#define PINMUX12 0x30
80#define PINMUX13 0x34
81#define PINMUX14 0x38
82#define PINMUX15 0x3c
83#define PINMUX16 0x40
84#define PINMUX17 0x44
85#define PINMUX18 0x48
86#define PINMUX19 0x4c
87
88void __init da830_init(void); 67void __init da830_init(void);
89void __init da850_init(void); 68void __init da850_init(void);
90 69
@@ -108,6 +87,8 @@ extern struct emac_platform_data da8xx_emac_pdata;
108extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; 87extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
109extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; 88extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
110 89
90extern struct platform_device da8xx_wdt_device;
91
111extern const short da830_emif25_pins[]; 92extern const short da830_emif25_pins[];
112extern const short da830_spi0_pins[]; 93extern const short da830_spi0_pins[];
113extern const short da830_spi1_pins[]; 94extern const short da830_spi1_pins[];
@@ -146,10 +127,4 @@ extern const short da850_mmcsd0_pins[];
146extern const short da850_nand_pins[]; 127extern const short da850_nand_pins[];
147extern const short da850_nor_pins[]; 128extern const short da850_nor_pins[];
148 129
149#ifdef CONFIG_DAVINCI_MUX
150int da8xx_pinmux_setup(const short pins[]);
151#else
152static inline int da8xx_pinmux_setup(const short pins[]) { return 0; }
153#endif
154
155#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ 130#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h
index 85536d8e8336..36dff4a0ce3f 100644
--- a/arch/arm/mach-davinci/include/mach/dm355.h
+++ b/arch/arm/mach-davinci/include/mach/dm355.h
@@ -15,6 +15,9 @@
15#include <mach/asp.h> 15#include <mach/asp.h>
16#include <media/davinci/vpfe_capture.h> 16#include <media/davinci/vpfe_capture.h>
17 17
18#define DM355_ASYNC_EMIF_CONTROL_BASE 0x01E10000
19#define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
20
18#define ASP1_TX_EVT_EN 1 21#define ASP1_TX_EVT_EN 1
19#define ASP1_RX_EVT_EN 2 22#define ASP1_RX_EVT_EN 2
20 23
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index 3a37b5a6983c..ea5df3b49ec4 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -36,6 +36,10 @@
36#define DAVINCI_DMA_VC_TX 2 36#define DAVINCI_DMA_VC_TX 2
37#define DAVINCI_DMA_VC_RX 3 37#define DAVINCI_DMA_VC_RX 3
38 38
39#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01D10000
40#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
41#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
42
39void __init dm365_init(void); 43void __init dm365_init(void);
40void __init dm365_init_asp(struct snd_platform_data *pdata); 44void __init dm365_init_asp(struct snd_platform_data *pdata);
41void __init dm365_init_vc(struct snd_platform_data *pdata); 45void __init dm365_init_vc(struct snd_platform_data *pdata);
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 1a8b09ccc3c8..6fca568a0fd2 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -34,6 +34,12 @@
34#define DM644X_EMAC_MDIO_OFFSET (0x4000) 34#define DM644X_EMAC_MDIO_OFFSET (0x4000)
35#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) 35#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000)
36 36
37#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000
38#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
39#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
40#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
41#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
42
37void __init dm644x_init(void); 43void __init dm644x_init(void);
38void __init dm644x_init_asp(struct snd_platform_data *pdata); 44void __init dm644x_init_asp(struct snd_platform_data *pdata);
39void dm644x_set_vpfe_config(struct vpfe_config *cfg); 45void dm644x_set_vpfe_config(struct vpfe_config *cfg);
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 846da98b619a..add6f794a362 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -25,10 +25,10 @@
25#define DM646X_EMAC_MDIO_OFFSET (0x4000) 25#define DM646X_EMAC_MDIO_OFFSET (0x4000)
26#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) 26#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000)
27 27
28#define DM646X_ATA_REG_BASE (0x01C66000) 28#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
29#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
29 30
30void __init dm646x_init(void); 31void __init dm646x_init(void);
31void __init dm646x_init_ide(void);
32void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); 32void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
33void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); 33void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
34void __init dm646x_board_setup_refclk(struct clk *clk); 34void __init dm646x_board_setup_refclk(struct clk *clk);
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index f3b8ef878158..504cc180a60b 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -14,6 +14,8 @@
14#define __DAVINCI_GPIO_H 14#define __DAVINCI_GPIO_H
15 15
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/spinlock.h>
18
17#include <asm-generic/gpio.h> 19#include <asm-generic/gpio.h>
18 20
19#include <mach/irqs.h> 21#include <mach/irqs.h>
@@ -21,6 +23,10 @@
21 23
22#define DAVINCI_GPIO_BASE 0x01C67000 24#define DAVINCI_GPIO_BASE 0x01C67000
23 25
26enum davinci_gpio_type {
27 GPIO_TYPE_DAVINCI = 0,
28};
29
24/* 30/*
25 * basic gpio routines 31 * basic gpio routines
26 * 32 *
@@ -45,17 +51,14 @@
45/* Convert GPIO signal to GPIO pin number */ 51/* Convert GPIO signal to GPIO pin number */
46#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio)) 52#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
47 53
48struct gpio_controller { 54struct davinci_gpio_controller {
49 u32 dir; 55 struct gpio_chip chip;
50 u32 out_data; 56 int irq_base;
51 u32 set_data; 57 spinlock_t lock;
52 u32 clr_data; 58 void __iomem *regs;
53 u32 in_data; 59 void __iomem *set_data;
54 u32 set_rising; 60 void __iomem *clr_data;
55 u32 clr_rising; 61 void __iomem *in_data;
56 u32 set_falling;
57 u32 clr_falling;
58 u32 intstat;
59}; 62};
60 63
61/* The __gpio_to_controller() and __gpio_mask() functions inline to constants 64/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
@@ -67,25 +70,16 @@ struct gpio_controller {
67 * 70 *
68 * These are NOT part of the cross-platform GPIO interface 71 * These are NOT part of the cross-platform GPIO interface
69 */ 72 */
70static inline struct gpio_controller *__iomem 73static inline struct davinci_gpio_controller *
71__gpio_to_controller(unsigned gpio) 74__gpio_to_controller(unsigned gpio)
72{ 75{
73 void *__iomem ptr; 76 struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
74 void __iomem *base = davinci_soc_info.gpio_base; 77 int index = gpio / 32;
75 78
76 if (gpio < 32 * 1) 79 if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
77 ptr = base + 0x10; 80 return NULL;
78 else if (gpio < 32 * 2) 81
79 ptr = base + 0x38; 82 return ctlrs + index;
80 else if (gpio < 32 * 3)
81 ptr = base + 0x60;
82 else if (gpio < 32 * 4)
83 ptr = base + 0x88;
84 else if (gpio < 32 * 5)
85 ptr = base + 0xb0;
86 else
87 ptr = NULL;
88 return ptr;
89} 83}
90 84
91static inline u32 __gpio_mask(unsigned gpio) 85static inline u32 __gpio_mask(unsigned gpio)
@@ -101,16 +95,16 @@ static inline u32 __gpio_mask(unsigned gpio)
101 */ 95 */
102static inline void gpio_set_value(unsigned gpio, int value) 96static inline void gpio_set_value(unsigned gpio, int value)
103{ 97{
104 if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) { 98 if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
105 struct gpio_controller *__iomem g; 99 struct davinci_gpio_controller *ctlr;
106 u32 mask; 100 u32 mask;
107 101
108 g = __gpio_to_controller(gpio); 102 ctlr = __gpio_to_controller(gpio);
109 mask = __gpio_mask(gpio); 103 mask = __gpio_mask(gpio);
110 if (value) 104 if (value)
111 __raw_writel(mask, &g->set_data); 105 __raw_writel(mask, ctlr->set_data);
112 else 106 else
113 __raw_writel(mask, &g->clr_data); 107 __raw_writel(mask, ctlr->clr_data);
114 return; 108 return;
115 } 109 }
116 110
@@ -128,18 +122,18 @@ static inline void gpio_set_value(unsigned gpio, int value)
128 */ 122 */
129static inline int gpio_get_value(unsigned gpio) 123static inline int gpio_get_value(unsigned gpio)
130{ 124{
131 struct gpio_controller *__iomem g; 125 struct davinci_gpio_controller *ctlr;
132 126
133 if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO) 127 if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
134 return __gpio_get_value(gpio); 128 return __gpio_get_value(gpio);
135 129
136 g = __gpio_to_controller(gpio); 130 ctlr = __gpio_to_controller(gpio);
137 return __gpio_mask(gpio) & __raw_readl(&g->in_data); 131 return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
138} 132}
139 133
140static inline int gpio_cansleep(unsigned gpio) 134static inline int gpio_cansleep(unsigned gpio)
141{ 135{
142 if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO) 136 if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
143 return 0; 137 return 0;
144 else 138 else
145 return __gpio_cansleep(gpio); 139 return __gpio_cansleep(gpio);
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 354af71798dc..ec76c7775c2e 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -401,6 +401,103 @@
401 401
402#define DA850_N_CP_INTC_IRQ 101 402#define DA850_N_CP_INTC_IRQ 101
403 403
404
405/* TNETV107X specific interrupts */
406#define IRQ_TNETV107X_TDM1_TXDMA 0
407#define IRQ_TNETV107X_EXT_INT_0 1
408#define IRQ_TNETV107X_EXT_INT_1 2
409#define IRQ_TNETV107X_GPIO_INT12 3
410#define IRQ_TNETV107X_GPIO_INT13 4
411#define IRQ_TNETV107X_TIMER_0_TINT12 5
412#define IRQ_TNETV107X_TIMER_1_TINT12 6
413#define IRQ_TNETV107X_UART0 7
414#define IRQ_TNETV107X_TDM1_RXDMA 8
415#define IRQ_TNETV107X_MCDMA_INT0 9
416#define IRQ_TNETV107X_MCDMA_INT1 10
417#define IRQ_TNETV107X_TPCC 11
418#define IRQ_TNETV107X_TPCC_INT0 12
419#define IRQ_TNETV107X_TPCC_INT1 13
420#define IRQ_TNETV107X_TPCC_INT2 14
421#define IRQ_TNETV107X_TPCC_INT3 15
422#define IRQ_TNETV107X_TPTC0 16
423#define IRQ_TNETV107X_TPTC1 17
424#define IRQ_TNETV107X_TIMER_0_TINT34 18
425#define IRQ_TNETV107X_ETHSS 19
426#define IRQ_TNETV107X_TIMER_1_TINT34 20
427#define IRQ_TNETV107X_DSP2ARM_INT0 21
428#define IRQ_TNETV107X_DSP2ARM_INT1 22
429#define IRQ_TNETV107X_ARM_NPMUIRQ 23
430#define IRQ_TNETV107X_USB1 24
431#define IRQ_TNETV107X_VLYNQ 25
432#define IRQ_TNETV107X_UART0_DMATX 26
433#define IRQ_TNETV107X_UART0_DMARX 27
434#define IRQ_TNETV107X_TDM1_TXMCSP 28
435#define IRQ_TNETV107X_SSP 29
436#define IRQ_TNETV107X_MCDMA_INT2 30
437#define IRQ_TNETV107X_MCDMA_INT3 31
438#define IRQ_TNETV107X_TDM_CODECIF_EOT 32
439#define IRQ_TNETV107X_IMCOP_SQR_ARM 33
440#define IRQ_TNETV107X_USB0 34
441#define IRQ_TNETV107X_USB_CDMA 35
442#define IRQ_TNETV107X_LCD 36
443#define IRQ_TNETV107X_KEYPAD 37
444#define IRQ_TNETV107X_KEYPAD_FREE 38
445#define IRQ_TNETV107X_RNG 39
446#define IRQ_TNETV107X_PKA 40
447#define IRQ_TNETV107X_TDM0_TXDMA 41
448#define IRQ_TNETV107X_TDM0_RXDMA 42
449#define IRQ_TNETV107X_TDM0_TXMCSP 43
450#define IRQ_TNETV107X_TDM0_RXMCSP 44
451#define IRQ_TNETV107X_TDM1_RXMCSP 45
452#define IRQ_TNETV107X_SDIO1 46
453#define IRQ_TNETV107X_SDIO0 47
454#define IRQ_TNETV107X_TSC 48
455#define IRQ_TNETV107X_TS 49
456#define IRQ_TNETV107X_UART1 50
457#define IRQ_TNETV107X_MBX_LITE 51
458#define IRQ_TNETV107X_GPIO_INT00 52
459#define IRQ_TNETV107X_GPIO_INT01 53
460#define IRQ_TNETV107X_GPIO_INT02 54
461#define IRQ_TNETV107X_GPIO_INT03 55
462#define IRQ_TNETV107X_UART2 56
463#define IRQ_TNETV107X_UART2_DMATX 57
464#define IRQ_TNETV107X_UART2_DMARX 58
465#define IRQ_TNETV107X_IMCOP_IMX 59
466#define IRQ_TNETV107X_IMCOP_VLCD 60
467#define IRQ_TNETV107X_AES 61
468#define IRQ_TNETV107X_DES 62
469#define IRQ_TNETV107X_SHAMD5 63
470#define IRQ_TNETV107X_TPCC_ERR 68
471#define IRQ_TNETV107X_TPCC_PROT 69
472#define IRQ_TNETV107X_TPTC0_ERR 70
473#define IRQ_TNETV107X_TPTC1_ERR 71
474#define IRQ_TNETV107X_UART0_ERR 72
475#define IRQ_TNETV107X_UART1_ERR 73
476#define IRQ_TNETV107X_AEMIF_ERR 74
477#define IRQ_TNETV107X_DDR_ERR 75
478#define IRQ_TNETV107X_WDTARM_INT0 76
479#define IRQ_TNETV107X_MCDMA_ERR 77
480#define IRQ_TNETV107X_GPIO_ERR 78
481#define IRQ_TNETV107X_MPU_ADDR 79
482#define IRQ_TNETV107X_MPU_PROT 80
483#define IRQ_TNETV107X_IOPU_ADDR 81
484#define IRQ_TNETV107X_IOPU_PROT 82
485#define IRQ_TNETV107X_KEYPAD_ADDR_ERR 83
486#define IRQ_TNETV107X_WDT0_ADDR_ERR 84
487#define IRQ_TNETV107X_WDT1_ADDR_ERR 85
488#define IRQ_TNETV107X_CLKCTL_ADDR_ERR 86
489#define IRQ_TNETV107X_PLL_UNLOCK 87
490#define IRQ_TNETV107X_WDTDSP_INT0 88
491#define IRQ_TNETV107X_SEC_CTRL_VIOLATION 89
492#define IRQ_TNETV107X_KEY_MNG_VIOLATION 90
493#define IRQ_TNETV107X_PBIST_CPU 91
494#define IRQ_TNETV107X_WDTARM 92
495#define IRQ_TNETV107X_PSC 93
496#define IRQ_TNETV107X_MMC0 94
497#define IRQ_TNETV107X_MMC1 95
498
499#define TNETV107X_N_CP_INTC_IRQ 96
500
404/* da850 currently has the most gpio pins (144) */ 501/* da850 currently has the most gpio pins (144) */
405#define DAVINCI_N_GPIO 144 502#define DAVINCI_N_GPIO 144
406/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ 503/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 2a68c1d8a24b..de11aac76a80 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -194,11 +194,14 @@ enum davinci_dm365_index {
194 DM365_I2C_SCL, 194 DM365_I2C_SCL,
195 195
196 /* AEMIF */ 196 /* AEMIF */
197 DM365_AEMIF_AR, 197 DM365_AEMIF_AR_A14,
198 DM365_AEMIF_AR_BA0,
198 DM365_AEMIF_A3, 199 DM365_AEMIF_A3,
199 DM365_AEMIF_A7, 200 DM365_AEMIF_A7,
200 DM365_AEMIF_D15_8, 201 DM365_AEMIF_D15_8,
201 DM365_AEMIF_CE0, 202 DM365_AEMIF_CE0,
203 DM365_AEMIF_CE1,
204 DM365_AEMIF_WE_OE,
202 205
203 /* ASP0 function */ 206 /* ASP0 function */
204 DM365_MCBSP0_BDX, 207 DM365_MCBSP0_BDX,
@@ -287,10 +290,19 @@ enum davinci_dm365_index {
287 DM365_SPI4_SDENA0, 290 DM365_SPI4_SDENA0,
288 DM365_SPI4_SDENA1, 291 DM365_SPI4_SDENA1,
289 292
293 /* Clock */
294 DM365_CLKOUT0,
295 DM365_CLKOUT1,
296 DM365_CLKOUT2,
297
290 /* GPIO */ 298 /* GPIO */
291 DM365_GPIO20, 299 DM365_GPIO20,
300 DM365_GPIO30,
301 DM365_GPIO31,
302 DM365_GPIO32,
292 DM365_GPIO33, 303 DM365_GPIO33,
293 DM365_GPIO40, 304 DM365_GPIO40,
305 DM365_GPIO64_57,
294 306
295 /* Video */ 307 /* Video */
296 DM365_VOUT_FIELD, 308 DM365_VOUT_FIELD,
@@ -904,12 +916,288 @@ enum davinci_da850_index {
904 DA850_RTC_ALARM, 916 DA850_RTC_ALARM,
905}; 917};
906 918
919enum davinci_tnetv107x_index {
920 TNETV107X_ASR_A00,
921 TNETV107X_GPIO32,
922 TNETV107X_ASR_A01,
923 TNETV107X_GPIO33,
924 TNETV107X_ASR_A02,
925 TNETV107X_GPIO34,
926 TNETV107X_ASR_A03,
927 TNETV107X_GPIO35,
928 TNETV107X_ASR_A04,
929 TNETV107X_GPIO36,
930 TNETV107X_ASR_A05,
931 TNETV107X_GPIO37,
932 TNETV107X_ASR_A06,
933 TNETV107X_GPIO38,
934 TNETV107X_ASR_A07,
935 TNETV107X_GPIO39,
936 TNETV107X_ASR_A08,
937 TNETV107X_GPIO40,
938 TNETV107X_ASR_A09,
939 TNETV107X_GPIO41,
940 TNETV107X_ASR_A10,
941 TNETV107X_GPIO42,
942 TNETV107X_ASR_A11,
943 TNETV107X_BOOT_STRP_0,
944 TNETV107X_ASR_A12,
945 TNETV107X_BOOT_STRP_1,
946 TNETV107X_ASR_A13,
947 TNETV107X_GPIO43,
948 TNETV107X_ASR_A14,
949 TNETV107X_GPIO44,
950 TNETV107X_ASR_A15,
951 TNETV107X_GPIO45,
952 TNETV107X_ASR_A16,
953 TNETV107X_GPIO46,
954 TNETV107X_ASR_A17,
955 TNETV107X_GPIO47,
956 TNETV107X_ASR_A18,
957 TNETV107X_GPIO48,
958 TNETV107X_SDIO1_DATA3_0,
959 TNETV107X_ASR_A19,
960 TNETV107X_GPIO49,
961 TNETV107X_SDIO1_DATA2_0,
962 TNETV107X_ASR_A20,
963 TNETV107X_GPIO50,
964 TNETV107X_SDIO1_DATA1_0,
965 TNETV107X_ASR_A21,
966 TNETV107X_GPIO51,
967 TNETV107X_SDIO1_DATA0_0,
968 TNETV107X_ASR_A22,
969 TNETV107X_GPIO52,
970 TNETV107X_SDIO1_CMD_0,
971 TNETV107X_ASR_A23,
972 TNETV107X_GPIO53,
973 TNETV107X_SDIO1_CLK_0,
974 TNETV107X_ASR_BA_1,
975 TNETV107X_GPIO54,
976 TNETV107X_SYS_PLL_CLK,
977 TNETV107X_ASR_CS0,
978 TNETV107X_ASR_CS1,
979 TNETV107X_ASR_CS2,
980 TNETV107X_TDM_PLL_CLK,
981 TNETV107X_ASR_CS3,
982 TNETV107X_ETH_PHY_CLK,
983 TNETV107X_ASR_D00,
984 TNETV107X_GPIO55,
985 TNETV107X_ASR_D01,
986 TNETV107X_GPIO56,
987 TNETV107X_ASR_D02,
988 TNETV107X_GPIO57,
989 TNETV107X_ASR_D03,
990 TNETV107X_GPIO58,
991 TNETV107X_ASR_D04,
992 TNETV107X_GPIO59_0,
993 TNETV107X_ASR_D05,
994 TNETV107X_GPIO60_0,
995 TNETV107X_ASR_D06,
996 TNETV107X_GPIO61_0,
997 TNETV107X_ASR_D07,
998 TNETV107X_GPIO62_0,
999 TNETV107X_ASR_D08,
1000 TNETV107X_GPIO63_0,
1001 TNETV107X_ASR_D09,
1002 TNETV107X_GPIO64_0,
1003 TNETV107X_ASR_D10,
1004 TNETV107X_SDIO1_DATA3_1,
1005 TNETV107X_ASR_D11,
1006 TNETV107X_SDIO1_DATA2_1,
1007 TNETV107X_ASR_D12,
1008 TNETV107X_SDIO1_DATA1_1,
1009 TNETV107X_ASR_D13,
1010 TNETV107X_SDIO1_DATA0_1,
1011 TNETV107X_ASR_D14,
1012 TNETV107X_SDIO1_CMD_1,
1013 TNETV107X_ASR_D15,
1014 TNETV107X_SDIO1_CLK_1,
1015 TNETV107X_ASR_OE,
1016 TNETV107X_BOOT_STRP_2,
1017 TNETV107X_ASR_RNW,
1018 TNETV107X_GPIO29_0,
1019 TNETV107X_ASR_WAIT,
1020 TNETV107X_GPIO30_0,
1021 TNETV107X_ASR_WE,
1022 TNETV107X_BOOT_STRP_3,
1023 TNETV107X_ASR_WE_DQM0,
1024 TNETV107X_GPIO31,
1025 TNETV107X_LCD_PD17_0,
1026 TNETV107X_ASR_WE_DQM1,
1027 TNETV107X_ASR_BA0_0,
1028 TNETV107X_VLYNQ_CLK,
1029 TNETV107X_GPIO14,
1030 TNETV107X_LCD_PD19_0,
1031 TNETV107X_VLYNQ_RXD0,
1032 TNETV107X_GPIO15,
1033 TNETV107X_LCD_PD20_0,
1034 TNETV107X_VLYNQ_RXD1,
1035 TNETV107X_GPIO16,
1036 TNETV107X_LCD_PD21_0,
1037 TNETV107X_VLYNQ_TXD0,
1038 TNETV107X_GPIO17,
1039 TNETV107X_LCD_PD22_0,
1040 TNETV107X_VLYNQ_TXD1,
1041 TNETV107X_GPIO18,
1042 TNETV107X_LCD_PD23_0,
1043 TNETV107X_SDIO0_CLK,
1044 TNETV107X_GPIO19,
1045 TNETV107X_SDIO0_CMD,
1046 TNETV107X_GPIO20,
1047 TNETV107X_SDIO0_DATA0,
1048 TNETV107X_GPIO21,
1049 TNETV107X_SDIO0_DATA1,
1050 TNETV107X_GPIO22,
1051 TNETV107X_SDIO0_DATA2,
1052 TNETV107X_GPIO23,
1053 TNETV107X_SDIO0_DATA3,
1054 TNETV107X_GPIO24,
1055 TNETV107X_EMU0,
1056 TNETV107X_EMU1,
1057 TNETV107X_RTCK,
1058 TNETV107X_TRST_N,
1059 TNETV107X_TCK,
1060 TNETV107X_TDI,
1061 TNETV107X_TDO,
1062 TNETV107X_TMS,
1063 TNETV107X_TDM1_CLK,
1064 TNETV107X_TDM1_RX,
1065 TNETV107X_TDM1_TX,
1066 TNETV107X_TDM1_FS,
1067 TNETV107X_KEYPAD_R0,
1068 TNETV107X_KEYPAD_R1,
1069 TNETV107X_KEYPAD_R2,
1070 TNETV107X_KEYPAD_R3,
1071 TNETV107X_KEYPAD_R4,
1072 TNETV107X_KEYPAD_R5,
1073 TNETV107X_KEYPAD_R6,
1074 TNETV107X_GPIO12,
1075 TNETV107X_KEYPAD_R7,
1076 TNETV107X_GPIO10,
1077 TNETV107X_KEYPAD_C0,
1078 TNETV107X_KEYPAD_C1,
1079 TNETV107X_KEYPAD_C2,
1080 TNETV107X_KEYPAD_C3,
1081 TNETV107X_KEYPAD_C4,
1082 TNETV107X_KEYPAD_C5,
1083 TNETV107X_KEYPAD_C6,
1084 TNETV107X_GPIO13,
1085 TNETV107X_TEST_CLK_IN,
1086 TNETV107X_KEYPAD_C7,
1087 TNETV107X_GPIO11,
1088 TNETV107X_SSP0_0,
1089 TNETV107X_SCC_DCLK,
1090 TNETV107X_LCD_PD20_1,
1091 TNETV107X_SSP0_1,
1092 TNETV107X_SCC_CS_N,
1093 TNETV107X_LCD_PD21_1,
1094 TNETV107X_SSP0_2,
1095 TNETV107X_SCC_D,
1096 TNETV107X_LCD_PD22_1,
1097 TNETV107X_SSP0_3,
1098 TNETV107X_SCC_RESETN,
1099 TNETV107X_LCD_PD23_1,
1100 TNETV107X_SSP1_0,
1101 TNETV107X_GPIO25,
1102 TNETV107X_UART2_CTS,
1103 TNETV107X_SSP1_1,
1104 TNETV107X_GPIO26,
1105 TNETV107X_UART2_RD,
1106 TNETV107X_SSP1_2,
1107 TNETV107X_GPIO27,
1108 TNETV107X_UART2_RTS,
1109 TNETV107X_SSP1_3,
1110 TNETV107X_GPIO28,
1111 TNETV107X_UART2_TD,
1112 TNETV107X_UART0_CTS,
1113 TNETV107X_UART0_RD,
1114 TNETV107X_UART0_RTS,
1115 TNETV107X_UART0_TD,
1116 TNETV107X_UART1_RD,
1117 TNETV107X_UART1_TD,
1118 TNETV107X_LCD_AC_NCS,
1119 TNETV107X_LCD_HSYNC_RNW,
1120 TNETV107X_LCD_VSYNC_A0,
1121 TNETV107X_LCD_MCLK,
1122 TNETV107X_LCD_PD16_0,
1123 TNETV107X_LCD_PCLK_E,
1124 TNETV107X_LCD_PD00,
1125 TNETV107X_LCD_PD01,
1126 TNETV107X_LCD_PD02,
1127 TNETV107X_LCD_PD03,
1128 TNETV107X_LCD_PD04,
1129 TNETV107X_LCD_PD05,
1130 TNETV107X_LCD_PD06,
1131 TNETV107X_LCD_PD07,
1132 TNETV107X_LCD_PD08,
1133 TNETV107X_GPIO59_1,
1134 TNETV107X_LCD_PD09,
1135 TNETV107X_GPIO60_1,
1136 TNETV107X_LCD_PD10,
1137 TNETV107X_ASR_BA0_1,
1138 TNETV107X_GPIO61_1,
1139 TNETV107X_LCD_PD11,
1140 TNETV107X_GPIO62_1,
1141 TNETV107X_LCD_PD12,
1142 TNETV107X_GPIO63_1,
1143 TNETV107X_LCD_PD13,
1144 TNETV107X_GPIO64_1,
1145 TNETV107X_LCD_PD14,
1146 TNETV107X_GPIO29_1,
1147 TNETV107X_LCD_PD15,
1148 TNETV107X_GPIO30_1,
1149 TNETV107X_EINT0,
1150 TNETV107X_GPIO08,
1151 TNETV107X_EINT1,
1152 TNETV107X_GPIO09,
1153 TNETV107X_GPIO00,
1154 TNETV107X_LCD_PD20_2,
1155 TNETV107X_TDM_CLK_IN_2,
1156 TNETV107X_GPIO01,
1157 TNETV107X_LCD_PD21_2,
1158 TNETV107X_24M_CLK_OUT_1,
1159 TNETV107X_GPIO02,
1160 TNETV107X_LCD_PD22_2,
1161 TNETV107X_GPIO03,
1162 TNETV107X_LCD_PD23_2,
1163 TNETV107X_GPIO04,
1164 TNETV107X_LCD_PD16_1,
1165 TNETV107X_USB0_RXERR,
1166 TNETV107X_GPIO05,
1167 TNETV107X_LCD_PD17_1,
1168 TNETV107X_TDM_CLK_IN_1,
1169 TNETV107X_GPIO06,
1170 TNETV107X_LCD_PD18,
1171 TNETV107X_24M_CLK_OUT_2,
1172 TNETV107X_GPIO07,
1173 TNETV107X_LCD_PD19_1,
1174 TNETV107X_USB1_RXERR,
1175 TNETV107X_ETH_PLL_CLK,
1176 TNETV107X_MDIO,
1177 TNETV107X_MDC,
1178 TNETV107X_AIC_MUTE_STAT_N,
1179 TNETV107X_TDM0_CLK,
1180 TNETV107X_AIC_HNS_EN_N,
1181 TNETV107X_TDM0_FS,
1182 TNETV107X_AIC_HDS_EN_STAT_N,
1183 TNETV107X_TDM0_TX,
1184 TNETV107X_AIC_HNF_EN_STAT_N,
1185 TNETV107X_TDM0_RX,
1186};
1187
1188#define PINMUX(x) (4 * (x))
1189
907#ifdef CONFIG_DAVINCI_MUX 1190#ifdef CONFIG_DAVINCI_MUX
908/* setup pin muxing */ 1191/* setup pin muxing */
909extern int davinci_cfg_reg(unsigned long reg_cfg); 1192extern int davinci_cfg_reg(unsigned long reg_cfg);
1193extern int davinci_cfg_reg_list(const short pins[]);
910#else 1194#else
911/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */ 1195/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
912static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; } 1196static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
1197static inline int davinci_cfg_reg_list(const short pins[])
1198{
1199 return 0;
1200}
913#endif 1201#endif
914 1202
915#endif /* __INC_MACH_MUX_H */ 1203#endif /* __INC_MACH_MUX_H */
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 651f6d8158fa..983da6e4554c 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -180,6 +180,53 @@
180#define DA8XX_LPSC1_CR_P3_SS 26 180#define DA8XX_LPSC1_CR_P3_SS 26
181#define DA8XX_LPSC1_L3_CBA_RAM 31 181#define DA8XX_LPSC1_L3_CBA_RAM 31
182 182
183/* TNETV107X LPSC Assignments */
184#define TNETV107X_LPSC_ARM 0
185#define TNETV107X_LPSC_GEM 1
186#define TNETV107X_LPSC_DDR2_PHY 2
187#define TNETV107X_LPSC_TPCC 3
188#define TNETV107X_LPSC_TPTC0 4
189#define TNETV107X_LPSC_TPTC1 5
190#define TNETV107X_LPSC_RAM 6
191#define TNETV107X_LPSC_MBX_LITE 7
192#define TNETV107X_LPSC_LCD 8
193#define TNETV107X_LPSC_ETHSS 9
194#define TNETV107X_LPSC_AEMIF 10
195#define TNETV107X_LPSC_CHIP_CFG 11
196#define TNETV107X_LPSC_TSC 12
197#define TNETV107X_LPSC_ROM 13
198#define TNETV107X_LPSC_UART2 14
199#define TNETV107X_LPSC_PKTSEC 15
200#define TNETV107X_LPSC_SECCTL 16
201#define TNETV107X_LPSC_KEYMGR 17
202#define TNETV107X_LPSC_KEYPAD 18
203#define TNETV107X_LPSC_GPIO 19
204#define TNETV107X_LPSC_MDIO 20
205#define TNETV107X_LPSC_SDIO0 21
206#define TNETV107X_LPSC_UART0 22
207#define TNETV107X_LPSC_UART1 23
208#define TNETV107X_LPSC_TIMER0 24
209#define TNETV107X_LPSC_TIMER1 25
210#define TNETV107X_LPSC_WDT_ARM 26
211#define TNETV107X_LPSC_WDT_DSP 27
212#define TNETV107X_LPSC_SSP 28
213#define TNETV107X_LPSC_TDM0 29
214#define TNETV107X_LPSC_VLYNQ 30
215#define TNETV107X_LPSC_MCDMA 31
216#define TNETV107X_LPSC_USB0 32
217#define TNETV107X_LPSC_TDM1 33
218#define TNETV107X_LPSC_DEBUGSS 34
219#define TNETV107X_LPSC_ETHSS_RGMII 35
220#define TNETV107X_LPSC_SYSTEM 36
221#define TNETV107X_LPSC_IMCOP 37
222#define TNETV107X_LPSC_SPARE 38
223#define TNETV107X_LPSC_SDIO1 39
224#define TNETV107X_LPSC_USB1 40
225#define TNETV107X_LPSC_USBSS 41
226#define TNETV107X_LPSC_DDR2_EMIF1_VRST 42
227#define TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST 43
228#define TNETV107X_LPSC_MAX 44
229
183/* PSC register offsets */ 230/* PSC register offsets */
184#define EPCPR 0x070 231#define EPCPR 0x070
185#define PTCMD 0x120 232#define PTCMD 0x120
@@ -189,13 +236,19 @@
189#define MDSTAT 0x800 236#define MDSTAT 0x800
190#define MDCTL 0xA00 237#define MDCTL 0xA00
191 238
239/* PSC module states */
240#define PSC_STATE_SWRSTDISABLE 0
241#define PSC_STATE_SYNCRST 1
242#define PSC_STATE_DISABLE 2
243#define PSC_STATE_ENABLE 3
244
192#define MDSTAT_STATE_MASK 0x1f 245#define MDSTAT_STATE_MASK 0x1f
193 246
194#ifndef __ASSEMBLER__ 247#ifndef __ASSEMBLER__
195 248
196extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); 249extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
197extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, 250extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
198 unsigned int id, char enable); 251 unsigned int id, u32 next_state);
199 252
200#endif 253#endif
201 254
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index a584697a9e70..f6c4f34909a2 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -13,7 +13,6 @@
13 13
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15 15
16#define DAVINCI_MAX_NR_UARTS 3
17#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) 16#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
18#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) 17#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
19#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) 18#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index 5a7d7581b8ce..e65629c20769 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -11,7 +11,7 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14extern void davinci_watchdog_reset(void); 14#include <mach/common.h>
15 15
16static inline void arch_idle(void) 16static inline void arch_idle(void)
17{ 17{
@@ -20,7 +20,8 @@ static inline void arch_idle(void)
20 20
21static inline void arch_reset(char mode, const char *cmd) 21static inline void arch_reset(char mode, const char *cmd)
22{ 22{
23 davinci_watchdog_reset(); 23 if (davinci_soc_info.reset)
24 davinci_soc_info.reset(davinci_soc_info.reset_device);
24} 25}
25 26
26#endif /* __ASM_ARCH_SYSTEM_H */ 27#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c
index a1c0b6b99edf..8ea60a8b2495 100644
--- a/arch/arm/mach-davinci/io.c
+++ b/arch/arm/mach-davinci/io.c
@@ -12,19 +12,29 @@
12#include <linux/io.h> 12#include <linux/io.h>
13 13
14#include <asm/tlb.h> 14#include <asm/tlb.h>
15#include <asm/mach/map.h>
15 16
16#define BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) 17#include <mach/common.h>
17#define XLATE(p, pst, vst) ((void __iomem *)((p) - (pst) + (vst)))
18 18
19/* 19/*
20 * Intercept ioremap() requests for addresses in our fixed mapping regions. 20 * Intercept ioremap() requests for addresses in our fixed mapping regions.
21 */ 21 */
22void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type) 22void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type)
23{ 23{
24 if (BETWEEN(p, IO_PHYS, IO_SIZE)) 24 struct map_desc *desc = davinci_soc_info.io_desc;
25 return XLATE(p, IO_PHYS, IO_VIRT); 25 int desc_num = davinci_soc_info.io_desc_num;
26 int i;
26 27
27 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0)); 28 for (i = 0; i < desc_num; i++, desc++) {
29 unsigned long iophys = __pfn_to_phys(desc->pfn);
30 unsigned long iosize = desc->length;
31
32 if (p >= iophys && (p + size) <= (iophys + iosize))
33 return __io(desc->virtual + p - iophys);
34 }
35
36 return __arm_ioremap_caller(p, size, type,
37 __builtin_return_address(0));
28} 38}
29EXPORT_SYMBOL(davinci_ioremap); 39EXPORT_SYMBOL(davinci_ioremap);
30 40
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index af92ffee8471..784ddf3c5ad4 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -116,6 +116,11 @@ void __init davinci_irq_init(void)
116 unsigned i; 116 unsigned i;
117 const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios; 117 const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
118 118
119 davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
120 davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
121 if (WARN_ON(!davinci_intc_base))
122 return;
123
119 /* Clear all interrupt requests */ 124 /* Clear all interrupt requests */
120 davinci_irq_writel(~0x0, FIQ_REG0_OFFSET); 125 davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
121 davinci_irq_writel(~0x0, FIQ_REG1_OFFSET); 126 davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
@@ -148,7 +153,7 @@ void __init davinci_irq_init(void)
148 } 153 }
149 154
150 /* set up genirq dispatch for ARM INTC */ 155 /* set up genirq dispatch for ARM INTC */
151 for (i = 0; i < DAVINCI_N_AINTC_IRQ; i++) { 156 for (i = 0; i < davinci_soc_info.intc_irq_num; i++) {
152 set_irq_chip(i, &davinci_irq_chip_0); 157 set_irq_chip(i, &davinci_irq_chip_0);
153 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 158 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
154 if (i != IRQ_TINT1_TINT34) 159 if (i != IRQ_TINT1_TINT34)
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index f757e83415f3..f34a8dcdae2b 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -22,6 +22,8 @@
22#include <mach/mux.h> 22#include <mach/mux.h>
23#include <mach/common.h> 23#include <mach/common.h>
24 24
25static void __iomem *pinmux_base;
26
25/* 27/*
26 * Sets the DAVINCI MUX register based on the table 28 * Sets the DAVINCI MUX register based on the table
27 */ 29 */
@@ -29,14 +31,19 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
29{ 31{
30 static DEFINE_SPINLOCK(mux_spin_lock); 32 static DEFINE_SPINLOCK(mux_spin_lock);
31 struct davinci_soc_info *soc_info = &davinci_soc_info; 33 struct davinci_soc_info *soc_info = &davinci_soc_info;
32 void __iomem *base = soc_info->pinmux_base;
33 unsigned long flags; 34 unsigned long flags;
34 const struct mux_config *cfg; 35 const struct mux_config *cfg;
35 unsigned int reg_orig = 0, reg = 0; 36 unsigned int reg_orig = 0, reg = 0;
36 unsigned int mask, warn = 0; 37 unsigned int mask, warn = 0;
37 38
38 if (!soc_info->pinmux_pins) 39 if (WARN_ON(!soc_info->pinmux_pins))
39 BUG(); 40 return -ENODEV;
41
42 if (!pinmux_base) {
43 pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K);
44 if (WARN_ON(!pinmux_base))
45 return -ENOMEM;
46 }
40 47
41 if (index >= soc_info->pinmux_pins_num) { 48 if (index >= soc_info->pinmux_pins_num) {
42 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", 49 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
@@ -57,7 +64,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
57 unsigned tmp1, tmp2; 64 unsigned tmp1, tmp2;
58 65
59 spin_lock_irqsave(&mux_spin_lock, flags); 66 spin_lock_irqsave(&mux_spin_lock, flags);
60 reg_orig = __raw_readl(base + cfg->mux_reg); 67 reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);
61 68
62 mask = (cfg->mask << cfg->mask_offset); 69 mask = (cfg->mask << cfg->mask_offset);
63 tmp1 = reg_orig & mask; 70 tmp1 = reg_orig & mask;
@@ -69,7 +76,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
69 if (tmp1 != tmp2) 76 if (tmp1 != tmp2)
70 warn = 1; 77 warn = 1;
71 78
72 __raw_writel(reg, base + cfg->mux_reg); 79 __raw_writel(reg, pinmux_base + cfg->mux_reg);
73 spin_unlock_irqrestore(&mux_spin_lock, flags); 80 spin_unlock_irqrestore(&mux_spin_lock, flags);
74 } 81 }
75 82
@@ -91,7 +98,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
91} 98}
92EXPORT_SYMBOL(davinci_cfg_reg); 99EXPORT_SYMBOL(davinci_cfg_reg);
93 100
94int da8xx_pinmux_setup(const short pins[]) 101int __init_or_module davinci_cfg_reg_list(const short pins[])
95{ 102{
96 int i, error = -EINVAL; 103 int i, error = -EINVAL;
97 104
diff --git a/arch/arm/mach-davinci/mux.h b/arch/arm/mach-davinci/mux.h
index adc869413371..5aad1e7dd210 100644
--- a/arch/arm/mach-davinci/mux.h
+++ b/arch/arm/mach-davinci/mux.h
@@ -20,7 +20,7 @@
20 .name = #desc, \ 20 .name = #desc, \
21 .debug = dbg, \ 21 .debug = dbg, \
22 .mux_reg_name = "PINMUX"#muxreg, \ 22 .mux_reg_name = "PINMUX"#muxreg, \
23 .mux_reg = PINMUX##muxreg, \ 23 .mux_reg = PINMUX(muxreg), \
24 .mask_offset = mode_offset, \ 24 .mask_offset = mode_offset, \
25 .mask = mode_mask, \ 25 .mask = mode_mask, \
26 .mode = mux_mode, \ 26 .mode = mux_mode, \
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index adf6b5c7f1e5..1b15dbd0a77b 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -38,8 +38,9 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
38 return 0; 38 return 0;
39 } 39 }
40 40
41 psc_base = soc_info->psc_bases[ctlr]; 41 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
42 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); 42 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
43 iounmap(psc_base);
43 44
44 /* if clocked, state can be "Enable" or "SyncReset" */ 45 /* if clocked, state can be "Enable" or "SyncReset" */
45 return mdstat & BIT(12); 46 return mdstat & BIT(12);
@@ -47,12 +48,11 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
47 48
48/* Enable or disable a PSC domain */ 49/* Enable or disable a PSC domain */
49void davinci_psc_config(unsigned int domain, unsigned int ctlr, 50void davinci_psc_config(unsigned int domain, unsigned int ctlr,
50 unsigned int id, char enable) 51 unsigned int id, u32 next_state)
51{ 52{
52 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; 53 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
53 void __iomem *psc_base; 54 void __iomem *psc_base;
54 struct davinci_soc_info *soc_info = &davinci_soc_info; 55 struct davinci_soc_info *soc_info = &davinci_soc_info;
55 u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */
56 56
57 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { 57 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
58 pr_warning("PSC: Bad psc data: 0x%x[%d]\n", 58 pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
@@ -60,7 +60,7 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
60 return; 60 return;
61 } 61 }
62 62
63 psc_base = soc_info->psc_bases[ctlr]; 63 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
64 64
65 mdctl = __raw_readl(psc_base + MDCTL + 4 * id); 65 mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
66 mdctl &= ~MDSTAT_STATE_MASK; 66 mdctl &= ~MDSTAT_STATE_MASK;
@@ -100,4 +100,6 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
100 do { 100 do {
101 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); 101 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
102 } while (!((mdstat & MDSTAT_STATE_MASK) == next_state)); 102 } while (!((mdstat & MDSTAT_STATE_MASK) == next_state));
103
104 iounmap(psc_base);
103} 105}
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index 7ce5ba086575..1875740fe27c 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
@@ -35,14 +35,20 @@ static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
35 int offset) 35 int offset)
36{ 36{
37 offset <<= up->regshift; 37 offset <<= up->regshift;
38 return (unsigned int)__raw_readl(IO_ADDRESS(up->mapbase) + offset); 38
39 WARN_ONCE(!up->membase, "unmapped read: uart[%d]\n", offset);
40
41 return (unsigned int)__raw_readl(up->membase + offset);
39} 42}
40 43
41static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, 44static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
42 int value) 45 int value)
43{ 46{
44 offset <<= p->regshift; 47 offset <<= p->regshift;
45 __raw_writel(value, IO_ADDRESS(p->mapbase) + offset); 48
49 WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset);
50
51 __raw_writel(value, p->membase + offset);
46} 52}
47 53
48static void __init davinci_serial_reset(struct plat_serial8250_port *p) 54static void __init davinci_serial_reset(struct plat_serial8250_port *p)
@@ -77,20 +83,32 @@ int __init davinci_serial_init(struct davinci_uart_config *info)
77 * Make sure the serial ports are muxed on at this point. 83 * Make sure the serial ports are muxed on at this point.
78 * You have to mux them off in device drivers later on if not needed. 84 * You have to mux them off in device drivers later on if not needed.
79 */ 85 */
80 for (i = 0; i < DAVINCI_MAX_NR_UARTS; i++, p++) { 86 for (i = 0; p->flags; i++, p++) {
81 if (!(info->enabled_uarts & (1 << i))) 87 if (!(info->enabled_uarts & (1 << i)))
82 continue; 88 continue;
83 89
84 sprintf(name, "uart%d", i); 90 sprintf(name, "uart%d", i);
85 uart_clk = clk_get(dev, name); 91 uart_clk = clk_get(dev, name);
86 if (IS_ERR(uart_clk)) 92 if (IS_ERR(uart_clk)) {
87 printk(KERN_ERR "%s:%d: failed to get UART%d clock\n", 93 printk(KERN_ERR "%s:%d: failed to get UART%d clock\n",
88 __func__, __LINE__, i); 94 __func__, __LINE__, i);
89 else { 95 continue;
90 clk_enable(uart_clk);
91 p->uartclk = clk_get_rate(uart_clk);
92 davinci_serial_reset(p);
93 } 96 }
97
98 clk_enable(uart_clk);
99 p->uartclk = clk_get_rate(uart_clk);
100
101 if (!p->membase && p->mapbase) {
102 p->membase = ioremap(p->mapbase, SZ_4K);
103
104 if (p->membase)
105 p->flags &= ~UPF_IOREMAP;
106 else
107 pr_err("uart regs ioremap failed\n");
108 }
109
110 if (p->membase && p->type != PORT_AR7)
111 davinci_serial_reset(p);
94 } 112 }
95 113
96 return platform_device_register(soc_info->serial_dev); 114 return platform_device_register(soc_info->serial_dev);
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 9e0b106b4f5f..0f21c36e65dd 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -197,32 +197,36 @@ static void __init timer_init(void)
197{ 197{
198 struct davinci_soc_info *soc_info = &davinci_soc_info; 198 struct davinci_soc_info *soc_info = &davinci_soc_info;
199 struct davinci_timer_instance *dtip = soc_info->timer_info->timers; 199 struct davinci_timer_instance *dtip = soc_info->timer_info->timers;
200 void __iomem *base[2];
200 int i; 201 int i;
201 202
202 /* Global init of each 64-bit timer as a whole */ 203 /* Global init of each 64-bit timer as a whole */
203 for(i=0; i<2; i++) { 204 for(i=0; i<2; i++) {
204 u32 tgcr; 205 u32 tgcr;
205 void __iomem *base = dtip[i].base; 206
207 base[i] = ioremap(dtip[i].base, SZ_4K);
208 if (WARN_ON(!base[i]))
209 continue;
206 210
207 /* Disabled, Internal clock source */ 211 /* Disabled, Internal clock source */
208 __raw_writel(0, base + TCR); 212 __raw_writel(0, base[i] + TCR);
209 213
210 /* reset both timers, no pre-scaler for timer34 */ 214 /* reset both timers, no pre-scaler for timer34 */
211 tgcr = 0; 215 tgcr = 0;
212 __raw_writel(tgcr, base + TGCR); 216 __raw_writel(tgcr, base[i] + TGCR);
213 217
214 /* Set both timers to unchained 32-bit */ 218 /* Set both timers to unchained 32-bit */
215 tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT; 219 tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT;
216 __raw_writel(tgcr, base + TGCR); 220 __raw_writel(tgcr, base[i] + TGCR);
217 221
218 /* Unreset timers */ 222 /* Unreset timers */
219 tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | 223 tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
220 (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); 224 (TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
221 __raw_writel(tgcr, base + TGCR); 225 __raw_writel(tgcr, base[i] + TGCR);
222 226
223 /* Init both counters to zero */ 227 /* Init both counters to zero */
224 __raw_writel(0, base + TIM12); 228 __raw_writel(0, base[i] + TIM12);
225 __raw_writel(0, base + TIM34); 229 __raw_writel(0, base[i] + TIM34);
226 } 230 }
227 231
228 /* Init of each timer as a 32-bit timer */ 232 /* Init of each timer as a 32-bit timer */
@@ -231,7 +235,9 @@ static void __init timer_init(void)
231 int timer = ID_TO_TIMER(t->id); 235 int timer = ID_TO_TIMER(t->id);
232 u32 irq; 236 u32 irq;
233 237
234 t->base = dtip[timer].base; 238 t->base = base[timer];
239 if (!t->base)
240 continue;
235 241
236 if (IS_TIMER_BOT(t->id)) { 242 if (IS_TIMER_BOT(t->id)) {
237 t->enamode_shift = 6; 243 t->enamode_shift = 6;
@@ -361,13 +367,13 @@ static void __init davinci_timer_init(void)
361 } 367 }
362 } 368 }
363 369
364 /* init timer hw */
365 timer_init();
366
367 timer_clk = clk_get(NULL, "timer0"); 370 timer_clk = clk_get(NULL, "timer0");
368 BUG_ON(IS_ERR(timer_clk)); 371 BUG_ON(IS_ERR(timer_clk));
369 clk_enable(timer_clk); 372 clk_enable(timer_clk);
370 373
374 /* init timer hw */
375 timer_init();
376
371 davinci_clock_tick_rate = clk_get_rate(timer_clk); 377 davinci_clock_tick_rate = clk_get_rate(timer_clk);
372 378
373 /* setup clocksource */ 379 /* setup clocksource */
@@ -399,13 +405,16 @@ struct sys_timer davinci_timer = {
399 405
400 406
401/* reset board using watchdog timer */ 407/* reset board using watchdog timer */
402void davinci_watchdog_reset(void) 408void davinci_watchdog_reset(struct platform_device *pdev)
403{ 409{
404 u32 tgcr, wdtcr; 410 u32 tgcr, wdtcr;
405 struct platform_device *pdev = &davinci_wdt_device; 411 void __iomem *base;
406 void __iomem *base = IO_ADDRESS(pdev->resource[0].start);
407 struct clk *wd_clk; 412 struct clk *wd_clk;
408 413
414 base = ioremap(pdev->resource[0].start, SZ_4K);
415 if (WARN_ON(!base))
416 return;
417
409 wd_clk = clk_get(&pdev->dev, NULL); 418 wd_clk = clk_get(&pdev->dev, NULL);
410 if (WARN_ON(IS_ERR(wd_clk))) 419 if (WARN_ON(IS_ERR(wd_clk)))
411 return; 420 return;
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index caf6d5154aec..3a1a855bfdca 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -41,7 +41,7 @@ static struct platform_device adssphere_flash = {
41 .resource = &adssphere_flash_resource, 41 .resource = &adssphere_flash_resource,
42}; 42};
43 43
44static struct ep93xx_eth_data adssphere_eth_data = { 44static struct ep93xx_eth_data __initdata adssphere_eth_data = {
45 .phy_id = 1, 45 .phy_id = 1,
46}; 46};
47 47
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 5f80092b6ace..e29bdef9b2e2 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -96,6 +96,10 @@ static struct clk clk_keypad = {
96 .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN, 96 .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN,
97 .set_rate = set_keytchclk_rate, 97 .set_rate = set_keytchclk_rate,
98}; 98};
99static struct clk clk_spi = {
100 .parent = &clk_xtali,
101 .rate = EP93XX_EXT_CLK_RATE,
102};
99static struct clk clk_pwm = { 103static struct clk clk_pwm = {
100 .parent = &clk_xtali, 104 .parent = &clk_xtali,
101 .rate = EP93XX_EXT_CLK_RATE, 105 .rate = EP93XX_EXT_CLK_RATE,
@@ -186,6 +190,7 @@ static struct clk_lookup clocks[] = {
186 INIT_CK("ep93xx-ohci", NULL, &clk_usb_host), 190 INIT_CK("ep93xx-ohci", NULL, &clk_usb_host),
187 INIT_CK("ep93xx-keypad", NULL, &clk_keypad), 191 INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
188 INIT_CK("ep93xx-fb", NULL, &clk_video), 192 INIT_CK("ep93xx-fb", NULL, &clk_video),
193 INIT_CK("ep93xx-spi.0", NULL, &clk_spi),
189 INIT_CK(NULL, "pwm_clk", &clk_pwm), 194 INIT_CK(NULL, "pwm_clk", &clk_pwm),
190 INIT_CK(NULL, "m2p0", &clk_m2p0), 195 INIT_CK(NULL, "m2p0", &clk_m2p0),
191 INIT_CK(NULL, "m2p1", &clk_m2p1), 196 INIT_CK(NULL, "m2p1", &clk_m2p1),
@@ -473,6 +478,14 @@ static int __init ep93xx_clock_init(void)
473 /* Initialize the pll2 derived clocks */ 478 /* Initialize the pll2 derived clocks */
474 clk_usb_host.rate = clk_pll2.rate / (((value >> 28) & 0xf) + 1); 479 clk_usb_host.rate = clk_pll2.rate / (((value >> 28) & 0xf) + 1);
475 480
481 /*
482 * EP93xx SSP clock rate was doubled in version E2. For more information
483 * see:
484 * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
485 */
486 if (ep93xx_chip_revision() < EP93XX_CHIP_REV_E2)
487 clk_spi.rate /= 2;
488
476 pr_info("PLL1 running at %ld MHz, PLL2 at %ld MHz\n", 489 pr_info("PLL1 running at %ld MHz, PLL2 at %ld MHz\n",
477 clk_pll1.rate / 1000000, clk_pll2.rate / 1000000); 490 clk_pll1.rate / 1000000, clk_pll2.rate / 1000000);
478 pr_info("FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n", 491 pr_info("FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n",
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 90fb591cbffa..9092677f63eb 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -31,10 +31,12 @@
31#include <linux/amba/serial.h> 31#include <linux/amba/serial.h>
32#include <linux/i2c.h> 32#include <linux/i2c.h>
33#include <linux/i2c-gpio.h> 33#include <linux/i2c-gpio.h>
34#include <linux/spi/spi.h>
34 35
35#include <mach/hardware.h> 36#include <mach/hardware.h>
36#include <mach/fb.h> 37#include <mach/fb.h>
37#include <mach/ep93xx_keypad.h> 38#include <mach/ep93xx_keypad.h>
39#include <mach/ep93xx_spi.h>
38 40
39#include <asm/mach/map.h> 41#include <asm/mach/map.h>
40#include <asm/mach/time.h> 42#include <asm/mach/time.h>
@@ -222,6 +224,20 @@ void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
222} 224}
223EXPORT_SYMBOL(ep93xx_devcfg_set_clear); 225EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
224 226
227/**
228 * ep93xx_chip_revision() - returns the EP93xx chip revision
229 *
230 * See <mach/platform.h> for more information.
231 */
232unsigned int ep93xx_chip_revision(void)
233{
234 unsigned int v;
235
236 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
237 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
238 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
239 return v;
240}
225 241
226/************************************************************************* 242/*************************************************************************
227 * EP93xx peripheral handling 243 * EP93xx peripheral handling
@@ -330,6 +346,10 @@ static struct platform_device ep93xx_ohci_device = {
330 .resource = ep93xx_ohci_resources, 346 .resource = ep93xx_ohci_resources,
331}; 347};
332 348
349
350/*************************************************************************
351 * EP93xx ethernet peripheral handling
352 *************************************************************************/
333static struct ep93xx_eth_data ep93xx_eth_data; 353static struct ep93xx_eth_data ep93xx_eth_data;
334 354
335static struct resource ep93xx_eth_resource[] = { 355static struct resource ep93xx_eth_resource[] = {
@@ -354,6 +374,12 @@ static struct platform_device ep93xx_eth_device = {
354 .resource = ep93xx_eth_resource, 374 .resource = ep93xx_eth_resource,
355}; 375};
356 376
377/**
378 * ep93xx_register_eth - Register the built-in ethernet platform device.
379 * @data: platform specific ethernet configuration (__initdata)
380 * @copy_addr: flag indicating that the MAC address should be copied
381 * from the IndAd registers (as programmed by the bootloader)
382 */
357void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) 383void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
358{ 384{
359 if (copy_addr) 385 if (copy_addr)
@@ -370,11 +396,19 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
370static struct i2c_gpio_platform_data ep93xx_i2c_data; 396static struct i2c_gpio_platform_data ep93xx_i2c_data;
371 397
372static struct platform_device ep93xx_i2c_device = { 398static struct platform_device ep93xx_i2c_device = {
373 .name = "i2c-gpio", 399 .name = "i2c-gpio",
374 .id = 0, 400 .id = 0,
375 .dev.platform_data = &ep93xx_i2c_data, 401 .dev = {
402 .platform_data = &ep93xx_i2c_data,
403 },
376}; 404};
377 405
406/**
407 * ep93xx_register_i2c - Register the i2c platform device.
408 * @data: platform specific i2c-gpio configuration (__initdata)
409 * @devices: platform specific i2c bus device information (__initdata)
410 * @num: the number of devices on the i2c bus
411 */
378void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data, 412void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
379 struct i2c_board_info *devices, int num) 413 struct i2c_board_info *devices, int num)
380{ 414{
@@ -398,17 +432,67 @@ void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
398 platform_device_register(&ep93xx_i2c_device); 432 platform_device_register(&ep93xx_i2c_device);
399} 433}
400 434
435/*************************************************************************
436 * EP93xx SPI peripheral handling
437 *************************************************************************/
438static struct ep93xx_spi_info ep93xx_spi_master_data;
439
440static struct resource ep93xx_spi_resources[] = {
441 {
442 .start = EP93XX_SPI_PHYS_BASE,
443 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
444 .flags = IORESOURCE_MEM,
445 },
446 {
447 .start = IRQ_EP93XX_SSP,
448 .end = IRQ_EP93XX_SSP,
449 .flags = IORESOURCE_IRQ,
450 },
451};
452
453static struct platform_device ep93xx_spi_device = {
454 .name = "ep93xx-spi",
455 .id = 0,
456 .dev = {
457 .platform_data = &ep93xx_spi_master_data,
458 },
459 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
460 .resource = ep93xx_spi_resources,
461};
462
463/**
464 * ep93xx_register_spi() - registers spi platform device
465 * @info: ep93xx board specific spi master info (__initdata)
466 * @devices: SPI devices to register (__initdata)
467 * @num: number of SPI devices to register
468 *
469 * This function registers platform device for the EP93xx SPI controller and
470 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
471 */
472void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
473 struct spi_board_info *devices, int num)
474{
475 /*
476 * When SPI is used, we need to make sure that I2S is muxed off from
477 * SPI pins.
478 */
479 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
480
481 ep93xx_spi_master_data = *info;
482 spi_register_board_info(devices, num);
483 platform_device_register(&ep93xx_spi_device);
484}
401 485
402/************************************************************************* 486/*************************************************************************
403 * EP93xx LEDs 487 * EP93xx LEDs
404 *************************************************************************/ 488 *************************************************************************/
405static struct gpio_led ep93xx_led_pins[] = { 489static struct gpio_led ep93xx_led_pins[] = {
406 { 490 {
407 .name = "platform:grled", 491 .name = "platform:grled",
408 .gpio = EP93XX_GPIO_LINE_GRLED, 492 .gpio = EP93XX_GPIO_LINE_GRLED,
409 }, { 493 }, {
410 .name = "platform:rdled", 494 .name = "platform:rdled",
411 .gpio = EP93XX_GPIO_LINE_RDLED, 495 .gpio = EP93XX_GPIO_LINE_RDLED,
412 }, 496 },
413}; 497};
414 498
@@ -528,7 +612,7 @@ static struct platform_device ep93xx_fb_device = {
528 .name = "ep93xx-fb", 612 .name = "ep93xx-fb",
529 .id = -1, 613 .id = -1,
530 .dev = { 614 .dev = {
531 .platform_data = &ep93xxfb_data, 615 .platform_data = &ep93xxfb_data,
532 .coherent_dma_mask = DMA_BIT_MASK(32), 616 .coherent_dma_mask = DMA_BIT_MASK(32),
533 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, 617 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
534 }, 618 },
@@ -536,6 +620,10 @@ static struct platform_device ep93xx_fb_device = {
536 .resource = ep93xx_fb_resource, 620 .resource = ep93xx_fb_resource,
537}; 621};
538 622
623/**
624 * ep93xx_register_fb - Register the framebuffer platform device.
625 * @data: platform specific framebuffer configuration (__initdata)
626 */
539void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) 627void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
540{ 628{
541 ep93xxfb_data = *data; 629 ep93xxfb_data = *data;
@@ -546,6 +634,8 @@ void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
546/************************************************************************* 634/*************************************************************************
547 * EP93xx matrix keypad peripheral handling 635 * EP93xx matrix keypad peripheral handling
548 *************************************************************************/ 636 *************************************************************************/
637static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
638
549static struct resource ep93xx_keypad_resource[] = { 639static struct resource ep93xx_keypad_resource[] = {
550 { 640 {
551 .start = EP93XX_KEY_MATRIX_PHYS_BASE, 641 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
@@ -559,15 +649,22 @@ static struct resource ep93xx_keypad_resource[] = {
559}; 649};
560 650
561static struct platform_device ep93xx_keypad_device = { 651static struct platform_device ep93xx_keypad_device = {
562 .name = "ep93xx-keypad", 652 .name = "ep93xx-keypad",
563 .id = -1, 653 .id = -1,
564 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), 654 .dev = {
565 .resource = ep93xx_keypad_resource, 655 .platform_data = &ep93xx_keypad_data,
656 },
657 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
658 .resource = ep93xx_keypad_resource,
566}; 659};
567 660
661/**
662 * ep93xx_register_keypad - Register the keypad platform device.
663 * @data: platform specific keypad configuration (__initdata)
664 */
568void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) 665void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
569{ 666{
570 ep93xx_keypad_device.dev.platform_data = data; 667 ep93xx_keypad_data = *data;
571 platform_device_register(&ep93xx_keypad_device); 668 platform_device_register(&ep93xx_keypad_device);
572} 669}
573 670
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index d22d67ac8b99..3884182cd362 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -74,7 +74,7 @@ static void __init edb93xx_register_flash(void)
74 } 74 }
75} 75}
76 76
77static struct ep93xx_eth_data edb93xx_eth_data = { 77static struct ep93xx_eth_data __initdata edb93xx_eth_data = {
78 .phy_id = 1, 78 .phy_id = 1,
79}; 79};
80 80
@@ -82,7 +82,7 @@ static struct ep93xx_eth_data edb93xx_eth_data = {
82/************************************************************************* 82/*************************************************************************
83 * EDB93xx i2c peripheral handling 83 * EDB93xx i2c peripheral handling
84 *************************************************************************/ 84 *************************************************************************/
85static struct i2c_gpio_platform_data edb93xx_i2c_gpio_data = { 85static struct i2c_gpio_platform_data __initdata edb93xx_i2c_gpio_data = {
86 .sda_pin = EP93XX_GPIO_LINE_EEDAT, 86 .sda_pin = EP93XX_GPIO_LINE_EEDAT,
87 .sda_is_open_drain = 0, 87 .sda_is_open_drain = 0,
88 .scl_pin = EP93XX_GPIO_LINE_EECLK, 88 .scl_pin = EP93XX_GPIO_LINE_EECLK,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 3da7ca816d19..a809618e9f05 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -41,7 +41,7 @@ static struct platform_device gesbc9312_flash = {
41 .resource = &gesbc9312_flash_resource, 41 .resource = &gesbc9312_flash_resource,
42}; 42};
43 43
44static struct ep93xx_eth_data gesbc9312_eth_data = { 44static struct ep93xx_eth_data __initdata gesbc9312_eth_data = {
45 .phy_id = 1, 45 .phy_id = 1,
46}; 46};
47 47
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index 93e2ecc79ceb..b1e096f0c2d2 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -106,6 +106,7 @@
106 106
107#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) 107#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
108 108
109#define EP93XX_SPI_PHYS_BASE EP93XX_APB_PHYS(0x000a0000)
109#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000) 110#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000)
110 111
111#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) 112#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index c6dc14dbca18..9a4413dd44bb 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -6,9 +6,11 @@
6 6
7struct i2c_gpio_platform_data; 7struct i2c_gpio_platform_data;
8struct i2c_board_info; 8struct i2c_board_info;
9struct spi_board_info;
9struct platform_device; 10struct platform_device;
10struct ep93xxfb_mach_info; 11struct ep93xxfb_mach_info;
11struct ep93xx_keypad_platform_data; 12struct ep93xx_keypad_platform_data;
13struct ep93xx_spi_info;
12 14
13struct ep93xx_eth_data 15struct ep93xx_eth_data
14{ 16{
@@ -33,9 +35,19 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
33 ep93xx_devcfg_set_clear(0x00, bits); 35 ep93xx_devcfg_set_clear(0x00, bits);
34} 36}
35 37
38#define EP93XX_CHIP_REV_D0 3
39#define EP93XX_CHIP_REV_D1 4
40#define EP93XX_CHIP_REV_E0 5
41#define EP93XX_CHIP_REV_E1 6
42#define EP93XX_CHIP_REV_E2 7
43
44unsigned int ep93xx_chip_revision(void);
45
36void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); 46void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
37void ep93xx_register_i2c(struct i2c_gpio_platform_data *data, 47void ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
38 struct i2c_board_info *devices, int num); 48 struct i2c_board_info *devices, int num);
49void ep93xx_register_spi(struct ep93xx_spi_info *info,
50 struct spi_board_info *devices, int num);
39void ep93xx_register_fb(struct ep93xxfb_mach_info *data); 51void ep93xx_register_fb(struct ep93xxfb_mach_info *data);
40void ep93xx_register_pwm(int pwm0, int pwm1); 52void ep93xx_register_pwm(int pwm0, int pwm1);
41int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); 53int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index c33360e82868..1cc911b4efa6 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -80,7 +80,7 @@ static void __init micro9_register_flash(void)
80/************************************************************************* 80/*************************************************************************
81 * Micro9 Ethernet 81 * Micro9 Ethernet
82 *************************************************************************/ 82 *************************************************************************/
83static struct ep93xx_eth_data micro9_eth_data = { 83static struct ep93xx_eth_data __initdata micro9_eth_data = {
84 .phy_id = 0x1f, 84 .phy_id = 0x1f,
85}; 85};
86 86
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index cd93990f1b99..388aec95f60e 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -49,17 +49,17 @@ static struct platform_device simone_flash = {
49 }, 49 },
50}; 50};
51 51
52static struct ep93xx_eth_data simone_eth_data = { 52static struct ep93xx_eth_data __initdata simone_eth_data = {
53 .phy_id = 1, 53 .phy_id = 1,
54}; 54};
55 55
56static struct ep93xxfb_mach_info simone_fb_info = { 56static struct ep93xxfb_mach_info __initdata simone_fb_info = {
57 .num_modes = EP93XXFB_USE_MODEDB, 57 .num_modes = EP93XXFB_USE_MODEDB,
58 .bpp = 16, 58 .bpp = 16,
59 .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, 59 .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
60}; 60};
61 61
62static struct i2c_gpio_platform_data simone_i2c_gpio_data = { 62static struct i2c_gpio_platform_data __initdata simone_i2c_gpio_data = {
63 .sda_pin = EP93XX_GPIO_LINE_EEDAT, 63 .sda_pin = EP93XX_GPIO_LINE_EEDAT,
64 .sda_is_open_drain = 0, 64 .sda_is_open_drain = 0,
65 .scl_pin = EP93XX_GPIO_LINE_EECLK, 65 .scl_pin = EP93XX_GPIO_LINE_EECLK,
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 51134b0382ca..38deaee40397 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -125,11 +125,11 @@ static struct platform_device snappercl15_nand_device = {
125 .num_resources = ARRAY_SIZE(snappercl15_nand_resource), 125 .num_resources = ARRAY_SIZE(snappercl15_nand_resource),
126}; 126};
127 127
128static struct ep93xx_eth_data snappercl15_eth_data = { 128static struct ep93xx_eth_data __initdata snappercl15_eth_data = {
129 .phy_id = 1, 129 .phy_id = 1,
130}; 130};
131 131
132static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = { 132static struct i2c_gpio_platform_data __initdata snappercl15_i2c_gpio_data = {
133 .sda_pin = EP93XX_GPIO_LINE_EEDAT, 133 .sda_pin = EP93XX_GPIO_LINE_EEDAT,
134 .sda_is_open_drain = 0, 134 .sda_is_open_drain = 0,
135 .scl_pin = EP93XX_GPIO_LINE_EECLK, 135 .scl_pin = EP93XX_GPIO_LINE_EECLK,
@@ -145,7 +145,7 @@ static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
145 }, 145 },
146}; 146};
147 147
148static struct ep93xxfb_mach_info snappercl15_fb_info = { 148static struct ep93xxfb_mach_info __initdata snappercl15_fb_info = {
149 .num_modes = EP93XXFB_USE_MODEDB, 149 .num_modes = EP93XXFB_USE_MODEDB,
150 .bpp = 16, 150 .bpp = 16,
151}; 151};
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index fac1ec7a60fb..9553031900b0 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -186,7 +186,7 @@ static struct platform_device ts72xx_wdt_device = {
186 .resource = ts72xx_wdt_resources, 186 .resource = ts72xx_wdt_resources,
187}; 187};
188 188
189static struct ep93xx_eth_data ts72xx_eth_data = { 189static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
190 .phy_id = 1, 190 .phy_id = 1,
191}; 191};
192 192
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index df97d16390e3..27db275b367c 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -11,6 +11,7 @@ config ARCH_INTEGRATOR_AP
11config ARCH_INTEGRATOR_CP 11config ARCH_INTEGRATOR_CP
12 bool "Support Integrator/CP platform" 12 bool "Support Integrator/CP platform"
13 select ARCH_CINTEGRATOR 13 select ARCH_CINTEGRATOR
14 select ARM_TIMER_SP804
14 help 15 help
15 Include support for the ARM(R) Integrator CP platform. 16 Include support for the ARM(R) Integrator CP platform.
16 17
diff --git a/arch/arm/mach-integrator/Makefile b/arch/arm/mach-integrator/Makefile
index 6a5ef8d30b10..ebeef966e1f5 100644
--- a/arch/arm/mach-integrator/Makefile
+++ b/arch/arm/mach-integrator/Makefile
@@ -4,7 +4,7 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := clock.o core.o lm.o 7obj-y := core.o lm.o
8obj-$(CONFIG_ARCH_INTEGRATOR_AP) += integrator_ap.o 8obj-$(CONFIG_ARCH_INTEGRATOR_AP) += integrator_ap.o
9obj-$(CONFIG_ARCH_INTEGRATOR_CP) += integrator_cp.o 9obj-$(CONFIG_ARCH_INTEGRATOR_CP) += integrator_cp.o
10 10
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
deleted file mode 100644
index 609c49de3d47..000000000000
--- a/arch/arm/mach-integrator/common.h
+++ /dev/null
@@ -1,2 +0,0 @@
1extern void integrator_time_init(unsigned long, unsigned int);
2extern unsigned long integrator_gettimeoffset(void);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 8b390e36ba69..b02cfc06e0ae 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -24,15 +24,13 @@
24#include <asm/clkdev.h> 24#include <asm/clkdev.h>
25#include <mach/clkdev.h> 25#include <mach/clkdev.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/platform.h>
27#include <asm/irq.h> 28#include <asm/irq.h>
28#include <asm/hardware/arm_timer.h>
29#include <mach/cm.h> 29#include <mach/cm.h>
30#include <asm/system.h> 30#include <asm/system.h>
31#include <asm/leds.h> 31#include <asm/leds.h>
32#include <asm/mach/time.h> 32#include <asm/mach/time.h>
33 33
34#include "common.h"
35
36static struct amba_pl010_data integrator_uart_data; 34static struct amba_pl010_data integrator_uart_data;
37 35
38static struct amba_device rtc_device = { 36static struct amba_device rtc_device = {
@@ -163,8 +161,8 @@ arch_initcall(integrator_init);
163 * UART0 7 6 161 * UART0 7 6
164 * UART1 5 4 162 * UART1 5 4
165 */ 163 */
166#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET) 164#define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC)
167#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET) 165#define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS)
168 166
169static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl) 167static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
170{ 168{
@@ -196,7 +194,7 @@ static struct amba_pl010_data integrator_uart_data = {
196 .set_mctrl = integrator_uart_set_mctrl, 194 .set_mctrl = integrator_uart_set_mctrl,
197}; 195};
198 196
199#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET 197#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
200 198
201static DEFINE_SPINLOCK(cm_lock); 199static DEFINE_SPINLOCK(cm_lock);
202 200
@@ -217,120 +215,3 @@ void cm_control(u32 mask, u32 set)
217} 215}
218 216
219EXPORT_SYMBOL(cm_control); 217EXPORT_SYMBOL(cm_control);
220
221/*
222 * Where is the timer (VA)?
223 */
224#define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000)
225#define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100)
226#define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200)
227#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
228
229/*
230 * How long is the timer interval?
231 */
232#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
233#if TIMER_INTERVAL >= 0x100000
234#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
235#elif TIMER_INTERVAL >= 0x10000
236#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
237#else
238#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
239#endif
240
241static unsigned long timer_reload;
242
243/*
244 * Returns number of ms since last clock interrupt. Note that interrupts
245 * will have been disabled by do_gettimeoffset()
246 */
247unsigned long integrator_gettimeoffset(void)
248{
249 unsigned long ticks1, ticks2, status;
250
251 /*
252 * Get the current number of ticks. Note that there is a race
253 * condition between us reading the timer and checking for
254 * an interrupt. We get around this by ensuring that the
255 * counter has not reloaded between our two reads.
256 */
257 ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
258 do {
259 ticks1 = ticks2;
260 status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS);
261 ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
262 } while (ticks2 > ticks1);
263
264 /*
265 * Number of ticks since last interrupt.
266 */
267 ticks1 = timer_reload - ticks2;
268
269 /*
270 * Interrupt pending? If so, we've reloaded once already.
271 */
272 if (status & (1 << IRQ_TIMERINT1))
273 ticks1 += timer_reload;
274
275 /*
276 * Convert the ticks to usecs
277 */
278 return TICKS2USECS(ticks1);
279}
280
281/*
282 * IRQ handler for the timer
283 */
284static irqreturn_t
285integrator_timer_interrupt(int irq, void *dev_id)
286{
287 /*
288 * clear the interrupt
289 */
290 writel(1, TIMER1_VA_BASE + TIMER_INTCLR);
291
292 timer_tick();
293
294 return IRQ_HANDLED;
295}
296
297static struct irqaction integrator_timer_irq = {
298 .name = "Integrator Timer Tick",
299 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
300 .handler = integrator_timer_interrupt,
301};
302
303/*
304 * Set up timer interrupt, and return the current time in seconds.
305 */
306void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
307{
308 unsigned int timer_ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
309
310 timer_reload = reload;
311 timer_ctrl |= ctrl;
312
313 if (timer_reload > 0x100000) {
314 timer_reload >>= 8;
315 timer_ctrl |= TIMER_CTRL_DIV256;
316 } else if (timer_reload > 0x010000) {
317 timer_reload >>= 4;
318 timer_ctrl |= TIMER_CTRL_DIV16;
319 }
320
321 /*
322 * Initialise to a known state (all timers off)
323 */
324 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
325 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
326 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
327
328 writel(timer_reload, TIMER1_VA_BASE + TIMER_LOAD);
329 writel(timer_reload, TIMER1_VA_BASE + TIMER_VALUE);
330 writel(timer_ctrl, TIMER1_VA_BASE + TIMER_CTRL);
331
332 /*
333 * Make irqs happen for the system timer
334 */
335 setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
336}
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
index f77f20255045..a3fbcb3adc29 100644
--- a/arch/arm/mach-integrator/cpu.c
+++ b/arch/arm/mach-integrator/cpu.c
@@ -19,32 +19,39 @@
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <mach/platform.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/hardware/icst525.h> 24#include <asm/hardware/icst.h>
24 25
25static struct cpufreq_driver integrator_driver; 26static struct cpufreq_driver integrator_driver;
26 27
27#define CM_ID (IO_ADDRESS(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_ID_OFFSET) 28#define CM_ID IO_ADDRESS(INTEGRATOR_HDR_ID)
28#define CM_OSC (IO_ADDRESS(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_OSC_OFFSET) 29#define CM_OSC IO_ADDRESS(INTEGRATOR_HDR_OSC)
29#define CM_STAT (IO_ADDRESS(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_STAT_OFFSET) 30#define CM_STAT IO_ADDRESS(INTEGRATOR_HDR_STAT)
30#define CM_LOCK (IO_ADDRESS(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_LOCK_OFFSET) 31#define CM_LOCK IO_ADDRESS(INTEGRATOR_HDR_LOCK)
31 32
32static const struct icst525_params lclk_params = { 33static const struct icst_params lclk_params = {
33 .ref = 24000, 34 .ref = 24000000,
34 .vco_max = 320000, 35 .vco_max = ICST525_VCO_MAX_5V,
36 .vco_min = ICST525_VCO_MIN,
35 .vd_min = 8, 37 .vd_min = 8,
36 .vd_max = 132, 38 .vd_max = 132,
37 .rd_min = 24, 39 .rd_min = 24,
38 .rd_max = 24, 40 .rd_max = 24,
41 .s2div = icst525_s2div,
42 .idx2s = icst525_idx2s,
39}; 43};
40 44
41static const struct icst525_params cclk_params = { 45static const struct icst_params cclk_params = {
42 .ref = 24000, 46 .ref = 24000000,
43 .vco_max = 320000, 47 .vco_max = ICST525_VCO_MAX_5V,
48 .vco_min = ICST525_VCO_MIN,
44 .vd_min = 12, 49 .vd_min = 12,
45 .vd_max = 160, 50 .vd_max = 160,
46 .rd_min = 24, 51 .rd_min = 24,
47 .rd_max = 24, 52 .rd_max = 24,
53 .s2div = icst525_s2div,
54 .idx2s = icst525_idx2s,
48}; 55};
49 56
50/* 57/*
@@ -52,17 +59,17 @@ static const struct icst525_params cclk_params = {
52 */ 59 */
53static int integrator_verify_policy(struct cpufreq_policy *policy) 60static int integrator_verify_policy(struct cpufreq_policy *policy)
54{ 61{
55 struct icst525_vco vco; 62 struct icst_vco vco;
56 63
57 cpufreq_verify_within_limits(policy, 64 cpufreq_verify_within_limits(policy,
58 policy->cpuinfo.min_freq, 65 policy->cpuinfo.min_freq,
59 policy->cpuinfo.max_freq); 66 policy->cpuinfo.max_freq);
60 67
61 vco = icst525_khz_to_vco(&cclk_params, policy->max); 68 vco = icst_hz_to_vco(&cclk_params, policy->max * 1000);
62 policy->max = icst525_khz(&cclk_params, vco); 69 policy->max = icst_hz(&cclk_params, vco) / 1000;
63 70
64 vco = icst525_khz_to_vco(&cclk_params, policy->min); 71 vco = icst_hz_to_vco(&cclk_params, policy->min * 1000);
65 policy->min = icst525_khz(&cclk_params, vco); 72 policy->min = icst_hz(&cclk_params, vco) / 1000;
66 73
67 cpufreq_verify_within_limits(policy, 74 cpufreq_verify_within_limits(policy,
68 policy->cpuinfo.min_freq, 75 policy->cpuinfo.min_freq,
@@ -78,7 +85,7 @@ static int integrator_set_target(struct cpufreq_policy *policy,
78{ 85{
79 cpumask_t cpus_allowed; 86 cpumask_t cpus_allowed;
80 int cpu = policy->cpu; 87 int cpu = policy->cpu;
81 struct icst525_vco vco; 88 struct icst_vco vco;
82 struct cpufreq_freqs freqs; 89 struct cpufreq_freqs freqs;
83 u_int cm_osc; 90 u_int cm_osc;
84 91
@@ -104,17 +111,17 @@ static int integrator_set_target(struct cpufreq_policy *policy,
104 } 111 }
105 vco.v = cm_osc & 255; 112 vco.v = cm_osc & 255;
106 vco.r = 22; 113 vco.r = 22;
107 freqs.old = icst525_khz(&cclk_params, vco); 114 freqs.old = icst_hz(&cclk_params, vco) / 1000;
108 115
109 /* icst525_khz_to_vco rounds down -- so we need the next 116 /* icst_hz_to_vco rounds down -- so we need the next
110 * larger freq in case of CPUFREQ_RELATION_L. 117 * larger freq in case of CPUFREQ_RELATION_L.
111 */ 118 */
112 if (relation == CPUFREQ_RELATION_L) 119 if (relation == CPUFREQ_RELATION_L)
113 target_freq += 999; 120 target_freq += 999;
114 if (target_freq > policy->max) 121 if (target_freq > policy->max)
115 target_freq = policy->max; 122 target_freq = policy->max;
116 vco = icst525_khz_to_vco(&cclk_params, target_freq); 123 vco = icst_hz_to_vco(&cclk_params, target_freq * 1000);
117 freqs.new = icst525_khz(&cclk_params, vco); 124 freqs.new = icst_hz(&cclk_params, vco) / 1000;
118 125
119 freqs.cpu = policy->cpu; 126 freqs.cpu = policy->cpu;
120 127
@@ -154,7 +161,7 @@ static unsigned int integrator_get(unsigned int cpu)
154 cpumask_t cpus_allowed; 161 cpumask_t cpus_allowed;
155 unsigned int current_freq; 162 unsigned int current_freq;
156 u_int cm_osc; 163 u_int cm_osc;
157 struct icst525_vco vco; 164 struct icst_vco vco;
158 165
159 cpus_allowed = current->cpus_allowed; 166 cpus_allowed = current->cpus_allowed;
160 167
@@ -172,7 +179,7 @@ static unsigned int integrator_get(unsigned int cpu)
172 vco.v = cm_osc & 255; 179 vco.v = cm_osc & 255;
173 vco.r = 22; 180 vco.r = 22;
174 181
175 current_freq = icst525_khz(&cclk_params, vco); /* current freq */ 182 current_freq = icst_hz(&cclk_params, vco) / 1000; /* current freq */
176 183
177 set_cpus_allowed(current, cpus_allowed); 184 set_cpus_allowed(current, cpus_allowed);
178 185
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 41b10725cef7..fd684bf205e5 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -25,7 +25,7 @@
25 25
26#include <asm/clkdev.h> 26#include <asm/clkdev.h>
27#include <mach/clkdev.h> 27#include <mach/clkdev.h>
28#include <asm/hardware/icst525.h> 28#include <asm/hardware/icst.h>
29#include <mach/lm.h> 29#include <mach/lm.h>
30#include <mach/impd1.h> 30#include <mach/impd1.h>
31#include <asm/sizes.h> 31#include <asm/sizes.h>
@@ -41,32 +41,25 @@ struct impd1_module {
41 struct clk_lookup *clks[3]; 41 struct clk_lookup *clks[3];
42}; 42};
43 43
44static const struct icst525_params impd1_vco_params = { 44static const struct icst_params impd1_vco_params = {
45 .ref = 24000, /* 24 MHz */ 45 .ref = 24000000, /* 24 MHz */
46 .vco_max = 200000, /* 200 MHz */ 46 .vco_max = ICST525_VCO_MAX_3V,
47 .vco_min = ICST525_VCO_MIN,
47 .vd_min = 12, 48 .vd_min = 12,
48 .vd_max = 519, 49 .vd_max = 519,
49 .rd_min = 3, 50 .rd_min = 3,
50 .rd_max = 120, 51 .rd_max = 120,
52 .s2div = icst525_s2div,
53 .idx2s = icst525_idx2s,
51}; 54};
52 55
53static void impd1_setvco(struct clk *clk, struct icst525_vco vco) 56static void impd1_setvco(struct clk *clk, struct icst_vco vco)
54{ 57{
55 struct impd1_module *impd1 = clk->data; 58 struct impd1_module *impd1 = clk->data;
56 int vconr = clk - impd1->vcos; 59 u32 val = vco.v | (vco.r << 9) | (vco.s << 16);
57 u32 val;
58
59 val = vco.v | (vco.r << 9) | (vco.s << 16);
60 60
61 writel(0xa05f, impd1->base + IMPD1_LOCK); 61 writel(0xa05f, impd1->base + IMPD1_LOCK);
62 switch (vconr) { 62 writel(val, clk->vcoreg);
63 case 0:
64 writel(val, impd1->base + IMPD1_OSC1);
65 break;
66 case 1:
67 writel(val, impd1->base + IMPD1_OSC2);
68 break;
69 }
70 writel(0, impd1->base + IMPD1_LOCK); 63 writel(0, impd1->base + IMPD1_LOCK);
71 64
72#ifdef DEBUG 65#ifdef DEBUG
@@ -74,11 +67,17 @@ static void impd1_setvco(struct clk *clk, struct icst525_vco vco)
74 vco.r = (val >> 9) & 0x7f; 67 vco.r = (val >> 9) & 0x7f;
75 vco.s = (val >> 16) & 7; 68 vco.s = (val >> 16) & 7;
76 69
77 pr_debug("IM-PD1: VCO%d clock is %ld kHz\n", 70 pr_debug("IM-PD1: VCO%d clock is %ld Hz\n",
78 vconr, icst525_khz(&impd1_vco_params, vco)); 71 vconr, icst525_hz(&impd1_vco_params, vco));
79#endif 72#endif
80} 73}
81 74
75static const struct clk_ops impd1_clk_ops = {
76 .round = icst_clk_round,
77 .set = icst_clk_set,
78 .setvco = impd1_setvco,
79};
80
82void impd1_tweak_control(struct device *dev, u32 mask, u32 val) 81void impd1_tweak_control(struct device *dev, u32 mask, u32 val)
83{ 82{
84 struct impd1_module *impd1 = dev_get_drvdata(dev); 83 struct impd1_module *impd1 = dev_get_drvdata(dev);
@@ -374,11 +373,13 @@ static int impd1_probe(struct lm_device *dev)
374 (unsigned long)dev->resource.start); 373 (unsigned long)dev->resource.start);
375 374
376 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) { 375 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) {
376 impd1->vcos[i].ops = &impd1_clk_ops,
377 impd1->vcos[i].owner = THIS_MODULE, 377 impd1->vcos[i].owner = THIS_MODULE,
378 impd1->vcos[i].params = &impd1_vco_params, 378 impd1->vcos[i].params = &impd1_vco_params,
379 impd1->vcos[i].data = impd1, 379 impd1->vcos[i].data = impd1;
380 impd1->vcos[i].setvco = impd1_setvco;
381 } 380 }
381 impd1->vcos[0].vcoreg = impd1->base + IMPD1_OSC1;
382 impd1->vcos[1].vcoreg = impd1->base + IMPD1_OSC2;
382 383
383 impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000", 384 impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000",
384 dev->id); 385 dev->id);
diff --git a/arch/arm/mach-integrator/include/mach/clkdev.h b/arch/arm/mach-integrator/include/mach/clkdev.h
index 9293e410832a..bfe07679faec 100644
--- a/arch/arm/mach-integrator/include/mach/clkdev.h
+++ b/arch/arm/mach-integrator/include/mach/clkdev.h
@@ -2,14 +2,15 @@
2#define __ASM_MACH_CLKDEV_H 2#define __ASM_MACH_CLKDEV_H
3 3
4#include <linux/module.h> 4#include <linux/module.h>
5#include <asm/hardware/icst525.h> 5#include <plat/clock.h>
6 6
7struct clk { 7struct clk {
8 unsigned long rate; 8 unsigned long rate;
9 const struct clk_ops *ops;
9 struct module *owner; 10 struct module *owner;
10 const struct icst525_params *params; 11 const struct icst_params *params;
12 void __iomem *vcoreg;
11 void *data; 13 void *data;
12 void (*setvco)(struct clk *, struct icst525_vco vco);
13}; 14};
14 15
15static inline int __clk_get(struct clk *clk) 16static inline int __clk_get(struct clk *clk)
diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S
index 7649c57acb53..3d029c9f3ef6 100644
--- a/arch/arm/mach-integrator/include/mach/entry-macro.S
+++ b/arch/arm/mach-integrator/include/mach/entry-macro.S
@@ -8,6 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h> 10#include <mach/hardware.h>
11#include <mach/platform.h>
11#include <mach/irqs.h> 12#include <mach/irqs.h>
12 13
13 .macro disable_fiq 14 .macro disable_fiq
diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h
index d795642fad22..8e26360ce9a3 100644
--- a/arch/arm/mach-integrator/include/mach/hardware.h
+++ b/arch/arm/mach-integrator/include/mach/hardware.h
@@ -23,7 +23,6 @@
23#define __ASM_ARCH_HARDWARE_H 23#define __ASM_ARCH_HARDWARE_H
24 24
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26#include <mach/platform.h>
27 26
28/* 27/*
29 * Where in virtual memory the IO devices (timers, system controllers 28 * Where in virtual memory the IO devices (timers, system controllers
@@ -36,17 +35,19 @@
36#define PCIO_BASE PCI_IO_VADDR 35#define PCIO_BASE PCI_IO_VADDR
37#define PCIMEM_BASE PCI_MEMORY_VADDR 36#define PCIMEM_BASE PCI_MEMORY_VADDR
38 37
39#ifdef CONFIG_MMU
40/* macro to get at IO space when running virtually */
41#define IO_ADDRESS(x) (((x) >> 4) + IO_BASE)
42#else
43#define IO_ADDRESS(x) (x)
44#endif
45
46#define pcibios_assign_all_busses() 1 38#define pcibios_assign_all_busses() 1
47 39
48#define PCIBIOS_MIN_IO 0x6000 40#define PCIBIOS_MIN_IO 0x6000
49#define PCIBIOS_MIN_MEM 0x00100000 41#define PCIBIOS_MIN_MEM 0x00100000
50 42
43/* macro to get at IO space when running virtually */
44#ifdef CONFIG_MMU
45#define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
46#else
47#define IO_ADDRESS(x) (x)
48#endif
49
50#define __io_address(n) ((void __iomem *)IO_ADDRESS(n))
51
51#endif 52#endif
52 53
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index e00a2624f269..5e6ea5cfea6e 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -23,9 +23,6 @@
23 * 23 *
24 * Integrator address map 24 * Integrator address map
25 * 25 *
26 * NOTE: This is a multi-hosted header file for use with uHAL and
27 * supported debuggers.
28 *
29 * ***********************************************************************/ 26 * ***********************************************************************/
30 27
31#ifndef __address_h 28#ifndef __address_h
@@ -290,12 +287,14 @@
290#define INTEGRATOR_DBG_LEDS (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_LEDS_OFFSET) 287#define INTEGRATOR_DBG_LEDS (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_LEDS_OFFSET)
291#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET) 288#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET)
292 289
290#define INTEGRATOR_AP_GPIO_BASE 0x1B000000 /* GPIO */
293 291
294#if defined(CONFIG_ARCH_INTEGRATOR_AP) 292#define INTEGRATOR_CP_MMC_BASE 0x1C000000 /* MMC */
295#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */ 293#define INTEGRATOR_CP_AACI_BASE 0x1D000000 /* AACI */
296#elif defined(CONFIG_ARCH_INTEGRATOR_CP) 294#define INTEGRATOR_CP_ETH_BASE 0xC8000000 /* Ethernet */
297#define INTEGRATOR_GPIO_BASE 0xC9000000 /* GPIO */ 295#define INTEGRATOR_CP_GPIO_BASE 0xC9000000 /* GPIO */
298#endif 296#define INTEGRATOR_CP_SIC_BASE 0xCA000000 /* SIC */
297#define INTEGRATOR_CP_CTL_BASE 0xCB000000 /* CP system control */
299 298
300/* ------------------------------------------------------------------------ 299/* ------------------------------------------------------------------------
301 * KMI keyboard/mouse definitions 300 * KMI keyboard/mouse definitions
@@ -328,20 +327,6 @@
328 */ 327 */
329#define PHYS_PCI_V3_BASE 0x62000000 328#define PHYS_PCI_V3_BASE 0x62000000
330 329
331#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE
332
333/* 'export' these to UHAL */
334#define UHAL_PCI_IO PCI_IO_BASE
335#define UHAL_PCI_MEM PCI_MEM_BASE
336#define UHAL_PCI_ALLOC_IO_BASE 0x00004000
337#define UHAL_PCI_ALLOC_MEM_BASE PCI_MEM_BASE
338#define UHAL_PCI_MAX_SLOT 20
339
340/* ========================================================================
341 * Start of uHAL definitions
342 * ========================================================================
343 */
344
345/* ------------------------------------------------------------------------ 330/* ------------------------------------------------------------------------
346 * Integrator Interrupt Controllers 331 * Integrator Interrupt Controllers
347 * ------------------------------------------------------------------------ 332 * ------------------------------------------------------------------------
@@ -389,7 +374,7 @@
389 */ 374 */
390 375
391/* ------------------------------------------------------------------------ 376/* ------------------------------------------------------------------------
392 * LED's - The header LED is not accessible via the uHAL API 377 * LED's
393 * ------------------------------------------------------------------------ 378 * ------------------------------------------------------------------------
394 * 379 *
395 */ 380 */
@@ -402,34 +387,18 @@
402#define LED_BANK INTEGRATOR_DBG_LEDS 387#define LED_BANK INTEGRATOR_DBG_LEDS
403 388
404/* 389/*
405 * Memory definitions - run uHAL out of SSRAM.
406 *
407 */
408#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE
409
410/*
411 * Clean base - dummy
412 *
413 */
414#define CLEAN_BASE INTEGRATOR_BOOT_ROM_HI
415
416/*
417 * Timer definitions 390 * Timer definitions
418 * 391 *
419 * Only use timer 1 & 2 392 * Only use timer 1 & 2
420 * (both run at 24MHz and will need the clock divider set to 16). 393 * (both run at 24MHz and will need the clock divider set to 16).
421 * 394 *
422 * Timer 0 runs at bus frequency and therefore could vary and currently 395 * Timer 0 runs at bus frequency
423 * uHAL can't handle that.
424 *
425 */ 396 */
426 397
427#define INTEGRATOR_TIMER0_BASE INTEGRATOR_CT_BASE 398#define INTEGRATOR_TIMER0_BASE INTEGRATOR_CT_BASE
428#define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100) 399#define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100)
429#define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200) 400#define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200)
430 401
431#define MAX_TIMER 2
432#define MAX_PERIOD 699050
433#define TICKS_PER_uSEC 24 402#define TICKS_PER_uSEC 24
434 403
435/* 404/*
@@ -437,14 +406,9 @@
437 * 406 *
438 */ 407 */
439#define mSEC_1 1000 408#define mSEC_1 1000
440#define mSEC_5 (mSEC_1 * 5)
441#define mSEC_10 (mSEC_1 * 10) 409#define mSEC_10 (mSEC_1 * 10)
442#define mSEC_25 (mSEC_1 * 25)
443#define SEC_1 (mSEC_1 * 1000)
444 410
445#define INTEGRATOR_CSR_BASE 0x10000000 411#define INTEGRATOR_CSR_BASE 0x10000000
446#define INTEGRATOR_CSR_SIZE 0x10000000 412#define INTEGRATOR_CSR_SIZE 0x10000000
447 413
448#endif 414#endif
449
450/* END */
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 8138a7e24562..227cf4d05088 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -27,9 +27,14 @@
27#include <linux/sysdev.h> 27#include <linux/sysdev.h>
28#include <linux/amba/bus.h> 28#include <linux/amba/bus.h>
29#include <linux/amba/kmi.h> 29#include <linux/amba/kmi.h>
30#include <linux/clocksource.h>
31#include <linux/clockchips.h>
32#include <linux/interrupt.h>
30#include <linux/io.h> 33#include <linux/io.h>
31 34
32#include <mach/hardware.h> 35#include <mach/hardware.h>
36#include <mach/platform.h>
37#include <asm/hardware/arm_timer.h>
33#include <asm/irq.h> 38#include <asm/irq.h>
34#include <asm/setup.h> 39#include <asm/setup.h>
35#include <asm/param.h> /* HZ */ 40#include <asm/param.h> /* HZ */
@@ -43,8 +48,6 @@
43#include <asm/mach/map.h> 48#include <asm/mach/map.h>
44#include <asm/mach/time.h> 49#include <asm/mach/time.h>
45 50
46#include "common.h"
47
48/* 51/*
49 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx 52 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
50 * is the (PA >> 12). 53 * is the (PA >> 12).
@@ -55,7 +58,7 @@
55#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 58#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
56#define VA_SC_BASE IO_ADDRESS(INTEGRATOR_SC_BASE) 59#define VA_SC_BASE IO_ADDRESS(INTEGRATOR_SC_BASE)
57#define VA_EBI_BASE IO_ADDRESS(INTEGRATOR_EBI_BASE) 60#define VA_EBI_BASE IO_ADDRESS(INTEGRATOR_EBI_BASE)
58#define VA_CMIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_IC_OFFSET 61#define VA_CMIC_BASE IO_ADDRESS(INTEGRATOR_HDR_IC)
59 62
60/* 63/*
61 * Logical Physical 64 * Logical Physical
@@ -117,8 +120,8 @@ static struct map_desc ap_io_desc[] __initdata = {
117 .length = SZ_4K, 120 .length = SZ_4K,
118 .type = MT_DEVICE 121 .type = MT_DEVICE
119 }, { 122 }, {
120 .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE), 123 .virtual = IO_ADDRESS(INTEGRATOR_AP_GPIO_BASE),
121 .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE), 124 .pfn = __phys_to_pfn(INTEGRATOR_AP_GPIO_BASE),
122 .length = SZ_4K, 125 .length = SZ_4K,
123 .type = MT_DEVICE 126 .type = MT_DEVICE
124 }, { 127 }, {
@@ -334,14 +337,163 @@ static void __init ap_init(void)
334 } 337 }
335} 338}
336 339
340/*
341 * Where is the timer (VA)?
342 */
343#define TIMER0_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER0_BASE)
344#define TIMER1_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER1_BASE)
345#define TIMER2_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER2_BASE)
346
347/*
348 * How long is the timer interval?
349 */
350#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
351#if TIMER_INTERVAL >= 0x100000
352#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
353#elif TIMER_INTERVAL >= 0x10000
354#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
355#else
356#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
357#endif
358
359static unsigned long timer_reload;
360
361static void __iomem * const clksrc_base = (void __iomem *)TIMER2_VA_BASE;
362
363static cycle_t timersp_read(struct clocksource *cs)
364{
365 return ~(readl(clksrc_base + TIMER_VALUE) & 0xffff);
366}
367
368static struct clocksource clocksource_timersp = {
369 .name = "timer2",
370 .rating = 200,
371 .read = timersp_read,
372 .mask = CLOCKSOURCE_MASK(16),
373 .shift = 16,
374 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
375};
376
377static void integrator_clocksource_init(u32 khz)
378{
379 struct clocksource *cs = &clocksource_timersp;
380 void __iomem *base = clksrc_base;
381 u32 ctrl = TIMER_CTRL_ENABLE;
382
383 if (khz >= 1500) {
384 khz /= 16;
385 ctrl = TIMER_CTRL_DIV16;
386 }
387
388 writel(ctrl, base + TIMER_CTRL);
389 writel(0xffff, base + TIMER_LOAD);
390
391 cs->mult = clocksource_khz2mult(khz, cs->shift);
392 clocksource_register(cs);
393}
394
395static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
396
397/*
398 * IRQ handler for the timer
399 */
400static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
401{
402 struct clock_event_device *evt = dev_id;
403
404 /* clear the interrupt */
405 writel(1, clkevt_base + TIMER_INTCLR);
406
407 evt->event_handler(evt);
408
409 return IRQ_HANDLED;
410}
411
412static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
413{
414 u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
415
416 BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT);
417
418 if (mode == CLOCK_EVT_MODE_PERIODIC) {
419 writel(ctrl, clkevt_base + TIMER_CTRL);
420 writel(timer_reload, clkevt_base + TIMER_LOAD);
421 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
422 }
423
424 writel(ctrl, clkevt_base + TIMER_CTRL);
425}
426
427static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
428{
429 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
430
431 writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
432 writel(next, clkevt_base + TIMER_LOAD);
433 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
434
435 return 0;
436}
437
438static struct clock_event_device integrator_clockevent = {
439 .name = "timer1",
440 .shift = 34,
441 .features = CLOCK_EVT_FEAT_PERIODIC,
442 .set_mode = clkevt_set_mode,
443 .set_next_event = clkevt_set_next_event,
444 .rating = 300,
445 .cpumask = cpu_all_mask,
446};
447
448static struct irqaction integrator_timer_irq = {
449 .name = "timer",
450 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
451 .handler = integrator_timer_interrupt,
452 .dev_id = &integrator_clockevent,
453};
454
455static void integrator_clockevent_init(u32 khz)
456{
457 struct clock_event_device *evt = &integrator_clockevent;
458 unsigned int ctrl = 0;
459
460 if (khz * 1000 > 0x100000 * HZ) {
461 khz /= 256;
462 ctrl |= TIMER_CTRL_DIV256;
463 } else if (khz * 1000 > 0x10000 * HZ) {
464 khz /= 16;
465 ctrl |= TIMER_CTRL_DIV16;
466 }
467
468 timer_reload = khz * 1000 / HZ;
469 writel(ctrl, clkevt_base + TIMER_CTRL);
470
471 evt->irq = IRQ_TIMERINT1;
472 evt->mult = div_sc(khz, NSEC_PER_MSEC, evt->shift);
473 evt->max_delta_ns = clockevent_delta2ns(0xffff, evt);
474 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
475
476 setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
477 clockevents_register_device(evt);
478}
479
480/*
481 * Set up timer(s).
482 */
337static void __init ap_init_timer(void) 483static void __init ap_init_timer(void)
338{ 484{
339 integrator_time_init(1000000 * TICKS_PER_uSEC / HZ, 0); 485 u32 khz = TICKS_PER_uSEC * 1000;
486
487 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
488 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
489 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
490
491 integrator_clocksource_init(khz);
492 integrator_clockevent_init(khz);
340} 493}
341 494
342static struct sys_timer ap_timer = { 495static struct sys_timer ap_timer = {
343 .init = ap_init_timer, 496 .init = ap_init_timer,
344 .offset = integrator_gettimeoffset,
345}; 497};
346 498
347MACHINE_START(INTEGRATOR, "ARM-Integrator") 499MACHINE_START(INTEGRATOR, "ARM-Integrator")
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 15e6cc5a352f..cde57b2b83b5 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -25,10 +25,12 @@
25#include <asm/clkdev.h> 25#include <asm/clkdev.h>
26#include <mach/clkdev.h> 26#include <mach/clkdev.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/platform.h>
28#include <asm/irq.h> 29#include <asm/irq.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/hardware/icst525.h> 32#include <asm/hardware/arm_timer.h>
33#include <asm/hardware/icst.h>
32 34
33#include <mach/cm.h> 35#include <mach/cm.h>
34#include <mach/lm.h> 36#include <mach/lm.h>
@@ -39,24 +41,20 @@
39#include <asm/mach/map.h> 41#include <asm/mach/map.h>
40#include <asm/mach/time.h> 42#include <asm/mach/time.h>
41 43
42#include "common.h" 44#include <plat/timer-sp.h>
43
44#define INTCP_PA_MMC_BASE 0x1c000000
45#define INTCP_PA_AACI_BASE 0x1d000000
46 45
47#define INTCP_PA_FLASH_BASE 0x24000000 46#define INTCP_PA_FLASH_BASE 0x24000000
48#define INTCP_FLASH_SIZE SZ_32M 47#define INTCP_FLASH_SIZE SZ_32M
49 48
50#define INTCP_PA_CLCD_BASE 0xc0000000 49#define INTCP_PA_CLCD_BASE 0xc0000000
51 50
52#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE) + 0x40 51#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE + 0x40)
53#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 52#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
54#define INTCP_VA_SIC_BASE IO_ADDRESS(0xca000000) 53#define INTCP_VA_SIC_BASE IO_ADDRESS(INTEGRATOR_CP_SIC_BASE)
55 54
56#define INTCP_PA_ETH_BASE 0xc8000000
57#define INTCP_ETH_SIZE 0x10 55#define INTCP_ETH_SIZE 0x10
58 56
59#define INTCP_VA_CTRL_BASE IO_ADDRESS(0xcb000000) 57#define INTCP_VA_CTRL_BASE IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
60#define INTCP_FLASHPROG 0x04 58#define INTCP_FLASHPROG 0x04
61#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) 59#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0)
62#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) 60#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1)
@@ -71,7 +69,9 @@
71 * f1600000 16000000 UART 0 69 * f1600000 16000000 UART 0
72 * f1700000 17000000 UART 1 70 * f1700000 17000000 UART 1
73 * f1a00000 1a000000 Debug LEDs 71 * f1a00000 1a000000 Debug LEDs
74 * f1b00000 1b000000 GPIO 72 * fc900000 c9000000 GPIO
73 * fca00000 ca000000 SIC
74 * fcb00000 cb000000 CP system control
75 */ 75 */
76 76
77static struct map_desc intcp_io_desc[] __initdata = { 77static struct map_desc intcp_io_desc[] __initdata = {
@@ -116,18 +116,18 @@ static struct map_desc intcp_io_desc[] __initdata = {
116 .length = SZ_4K, 116 .length = SZ_4K,
117 .type = MT_DEVICE 117 .type = MT_DEVICE
118 }, { 118 }, {
119 .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE), 119 .virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),
120 .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE), 120 .pfn = __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE),
121 .length = SZ_4K, 121 .length = SZ_4K,
122 .type = MT_DEVICE 122 .type = MT_DEVICE
123 }, { 123 }, {
124 .virtual = IO_ADDRESS(0xca000000), 124 .virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),
125 .pfn = __phys_to_pfn(0xca000000), 125 .pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
126 .length = SZ_4K, 126 .length = SZ_4K,
127 .type = MT_DEVICE 127 .type = MT_DEVICE
128 }, { 128 }, {
129 .virtual = IO_ADDRESS(0xcb000000), 129 .virtual = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
130 .pfn = __phys_to_pfn(0xcb000000), 130 .pfn = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
131 .length = SZ_4K, 131 .length = SZ_4K,
132 .type = MT_DEVICE 132 .type = MT_DEVICE
133 } 133 }
@@ -266,33 +266,43 @@ static void __init intcp_init_irq(void)
266/* 266/*
267 * Clock handling 267 * Clock handling
268 */ 268 */
269#define CM_LOCK (IO_ADDRESS(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_LOCK_OFFSET) 269#define CM_LOCK (__io_address(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_LOCK_OFFSET)
270#define CM_AUXOSC (IO_ADDRESS(INTEGRATOR_HDR_BASE)+0x1c) 270#define CM_AUXOSC (__io_address(INTEGRATOR_HDR_BASE)+0x1c)
271 271
272static const struct icst525_params cp_auxvco_params = { 272static const struct icst_params cp_auxvco_params = {
273 .ref = 24000, 273 .ref = 24000000,
274 .vco_max = 320000, 274 .vco_max = ICST525_VCO_MAX_5V,
275 .vco_min = ICST525_VCO_MIN,
275 .vd_min = 8, 276 .vd_min = 8,
276 .vd_max = 263, 277 .vd_max = 263,
277 .rd_min = 3, 278 .rd_min = 3,
278 .rd_max = 65, 279 .rd_max = 65,
280 .s2div = icst525_s2div,
281 .idx2s = icst525_idx2s,
279}; 282};
280 283
281static void cp_auxvco_set(struct clk *clk, struct icst525_vco vco) 284static void cp_auxvco_set(struct clk *clk, struct icst_vco vco)
282{ 285{
283 u32 val; 286 u32 val;
284 287
285 val = readl(CM_AUXOSC) & ~0x7ffff; 288 val = readl(clk->vcoreg) & ~0x7ffff;
286 val |= vco.v | (vco.r << 9) | (vco.s << 16); 289 val |= vco.v | (vco.r << 9) | (vco.s << 16);
287 290
288 writel(0xa05f, CM_LOCK); 291 writel(0xa05f, CM_LOCK);
289 writel(val, CM_AUXOSC); 292 writel(val, clk->vcoreg);
290 writel(0, CM_LOCK); 293 writel(0, CM_LOCK);
291} 294}
292 295
296static const struct clk_ops cp_auxclk_ops = {
297 .round = icst_clk_round,
298 .set = icst_clk_set,
299 .setvco = cp_auxvco_set,
300};
301
293static struct clk cp_auxclk = { 302static struct clk cp_auxclk = {
303 .ops = &cp_auxclk_ops,
294 .params = &cp_auxvco_params, 304 .params = &cp_auxvco_params,
295 .setvco = cp_auxvco_set, 305 .vcoreg = CM_AUXOSC,
296}; 306};
297 307
298static struct clk_lookup cp_lookups[] = { 308static struct clk_lookup cp_lookups[] = {
@@ -363,8 +373,8 @@ static struct platform_device intcp_flash_device = {
363 373
364static struct resource smc91x_resources[] = { 374static struct resource smc91x_resources[] = {
365 [0] = { 375 [0] = {
366 .start = INTCP_PA_ETH_BASE, 376 .start = INTEGRATOR_CP_ETH_BASE,
367 .end = INTCP_PA_ETH_BASE + INTCP_ETH_SIZE - 1, 377 .end = INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
368 .flags = IORESOURCE_MEM, 378 .flags = IORESOURCE_MEM,
369 }, 379 },
370 [1] = { 380 [1] = {
@@ -394,8 +404,8 @@ static struct platform_device *intcp_devs[] __initdata = {
394 */ 404 */
395static unsigned int mmc_status(struct device *dev) 405static unsigned int mmc_status(struct device *dev)
396{ 406{
397 unsigned int status = readl(IO_ADDRESS(0xca000000) + 4); 407 unsigned int status = readl(IO_ADDRESS(0xca000000 + 4));
398 writel(8, IO_ADDRESS(0xcb000000) + 8); 408 writel(8, IO_ADDRESS(INTEGRATOR_CP_CTL_BASE + 8));
399 409
400 return status & 8; 410 return status & 8;
401} 411}
@@ -413,8 +423,8 @@ static struct amba_device mmc_device = {
413 .platform_data = &mmc_data, 423 .platform_data = &mmc_data,
414 }, 424 },
415 .res = { 425 .res = {
416 .start = INTCP_PA_MMC_BASE, 426 .start = INTEGRATOR_CP_MMC_BASE,
417 .end = INTCP_PA_MMC_BASE + SZ_4K - 1, 427 .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1,
418 .flags = IORESOURCE_MEM, 428 .flags = IORESOURCE_MEM,
419 }, 429 },
420 .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, 430 .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
@@ -426,8 +436,8 @@ static struct amba_device aaci_device = {
426 .init_name = "mb:1d", 436 .init_name = "mb:1d",
427 }, 437 },
428 .res = { 438 .res = {
429 .start = INTCP_PA_AACI_BASE, 439 .start = INTEGRATOR_CP_AACI_BASE,
430 .end = INTCP_PA_AACI_BASE + SZ_4K - 1, 440 .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
431 .flags = IORESOURCE_MEM, 441 .flags = IORESOURCE_MEM,
432 }, 442 },
433 .irq = { IRQ_CP_AACIINT, NO_IRQ }, 443 .irq = { IRQ_CP_AACIINT, NO_IRQ },
@@ -567,16 +577,22 @@ static void __init intcp_init(void)
567 } 577 }
568} 578}
569 579
570#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable */ 580#define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
581#define TIMER1_VA_BASE __io_address(INTEGRATOR_TIMER1_BASE)
582#define TIMER2_VA_BASE __io_address(INTEGRATOR_TIMER2_BASE)
571 583
572static void __init intcp_timer_init(void) 584static void __init intcp_timer_init(void)
573{ 585{
574 integrator_time_init(1000000 / HZ, TIMER_CTRL_IE); 586 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
587 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
588 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
589
590 sp804_clocksource_init(TIMER2_VA_BASE);
591 sp804_clockevents_init(TIMER1_VA_BASE, IRQ_TIMERINT1);
575} 592}
576 593
577static struct sys_timer cp_timer = { 594static struct sys_timer cp_timer = {
578 .init = intcp_timer_init, 595 .init = intcp_timer_init,
579 .offset = integrator_gettimeoffset,
580}; 596};
581 597
582MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") 598MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
diff --git a/arch/arm/mach-integrator/leds.c b/arch/arm/mach-integrator/leds.c
index 8dcc823f4135..28be186adb89 100644
--- a/arch/arm/mach-integrator/leds.c
+++ b/arch/arm/mach-integrator/leds.c
@@ -27,6 +27,7 @@
27#include <linux/io.h> 27#include <linux/io.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/platform.h>
30#include <asm/leds.h> 31#include <asm/leds.h>
31#include <asm/system.h> 32#include <asm/system.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index ffbd349363af..9cef0590d5aa 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -29,6 +29,7 @@
29#include <linux/io.h> 29#include <linux/io.h>
30 30
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <mach/platform.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/signal.h> 34#include <asm/signal.h>
34#include <asm/system.h> 35#include <asm/system.h>
@@ -389,9 +390,9 @@ static int __init pci_v3_setup_resources(struct resource **resource)
389 * means I can't get additional information on the reason for the pm2fb 390 * means I can't get additional information on the reason for the pm2fb
390 * problems. I suppose I'll just have to mind-meld with the machine. ;) 391 * problems. I suppose I'll just have to mind-meld with the machine. ;)
391 */ 392 */
392#define SC_PCI (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_PCIENABLE_OFFSET) 393#define SC_PCI IO_ADDRESS(INTEGRATOR_SC_PCIENABLE)
393#define SC_LBFADDR (IO_ADDRESS(INTEGRATOR_SC_BASE) + 0x20) 394#define SC_LBFADDR IO_ADDRESS(INTEGRATOR_SC_BASE + 0x20)
394#define SC_LBFCODE (IO_ADDRESS(INTEGRATOR_SC_BASE) + 0x24) 395#define SC_LBFCODE IO_ADDRESS(INTEGRATOR_SC_BASE + 0x24)
395 396
396static int 397static int
397v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 398v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 5d99039286eb..f108a31afc2b 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -176,7 +176,7 @@ static struct plat_serial8250_port n2100_serial_port[] = {
176 .mapbase = N2100_UART, 176 .mapbase = N2100_UART,
177 .membase = (char *)N2100_UART, 177 .membase = (char *)N2100_UART,
178 .irq = 0, 178 .irq = 0,
179 .flags = UPF_SKIP_TEST, 179 .flags = UPF_SKIP_TEST | UPF_AUTO_IRQ | UPF_SHARE_IRQ,
180 .iotype = UPIO_MEM, 180 .iotype = UPIO_MEM,
181 .regshift = 0, 181 .regshift = 0,
182 .uartclk = 1843200, 182 .uartclk = 1843200,
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 71728d36d501..0bce09799d18 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -21,7 +21,6 @@
21#include <linux/tty.h> 21#include <linux/tty.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/serial_core.h> 23#include <linux/serial_core.h>
24#include <linux/bootmem.h>
25#include <linux/interrupt.h> 24#include <linux/interrupt.h>
26#include <linux/bitops.h> 25#include <linux/bitops.h>
27#include <linux/time.h> 26#include <linux/time.h>
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 17879a876be6..29b2163b1fe3 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -38,6 +38,12 @@ config MACH_ESATA_SHEEVAPLUG
38 Say 'Y' here if you want your kernel to support the 38 Say 'Y' here if you want your kernel to support the
39 Marvell eSATA SheevaPlug Reference Board. 39 Marvell eSATA SheevaPlug Reference Board.
40 40
41config MACH_GURUPLUG
42 bool "Marvell GuruPlug Reference Board"
43 help
44 Say 'Y' here if you want your kernel to support the
45 Marvell GuruPlug Reference Board.
46
41config MACH_TS219 47config MACH_TS219
42 bool "QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS" 48 bool "QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS"
43 help 49 help
@@ -81,6 +87,18 @@ config MACH_INETSPACE_V2
81 Say 'Y' here if you want your kernel to support the 87 Say 'Y' here if you want your kernel to support the
82 LaCie Internet Space v2 NAS. 88 LaCie Internet Space v2 NAS.
83 89
90config MACH_NET2BIG_V2
91 bool "LaCie 2Big Network v2 NAS Board"
92 help
93 Say 'Y' here if you want your kernel to support the
94 LaCie 2Big Network v2 NAS.
95
96config MACH_NET5BIG_V2
97 bool "LaCie 5Big Network v2 NAS Board"
98 help
99 Say 'Y' here if you want your kernel to support the
100 LaCie 5Big Network v2 NAS.
101
84endmenu 102endmenu
85 103
86endif 104endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index a5530e36ba3e..c0cd5d362002 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -6,10 +6,13 @@ obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
6obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o 6obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o
7obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o 7obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
8obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o 8obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o
9obj-$(CONFIG_MACH_GURUPLUG) += guruplug-setup.o
9obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o 10obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
10obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o 11obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o
11obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o 12obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o
12obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o 13obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o
13obj-$(CONFIG_MACH_INETSPACE_V2) += netspace_v2-setup.o 14obj-$(CONFIG_MACH_INETSPACE_V2) += netspace_v2-setup.o
15obj-$(CONFIG_MACH_NET2BIG_V2) += netxbig_v2-setup.o
16obj-$(CONFIG_MACH_NET5BIG_V2) += netxbig_v2-setup.o
14 17
15obj-$(CONFIG_CPU_IDLE) += cpuidle.o 18obj-$(CONFIG_CPU_IDLE) += cpuidle.o
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c
new file mode 100644
index 000000000000..54d07c89d4ff
--- /dev/null
+++ b/arch/arm/mach-kirkwood/guruplug-setup.c
@@ -0,0 +1,131 @@
1/*
2 * arch/arm/mach-kirkwood/guruplug-setup.c
3 *
4 * Marvell GuruPlug Reference Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/partitions.h>
15#include <linux/ata_platform.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/gpio.h>
18#include <linux/leds.h>
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21#include <mach/kirkwood.h>
22#include <plat/mvsdio.h>
23#include "common.h"
24#include "mpp.h"
25
26static struct mtd_partition guruplug_nand_parts[] = {
27 {
28 .name = "u-boot",
29 .offset = 0,
30 .size = SZ_1M
31 }, {
32 .name = "uImage",
33 .offset = MTDPART_OFS_NXTBLK,
34 .size = SZ_4M
35 }, {
36 .name = "root",
37 .offset = MTDPART_OFS_NXTBLK,
38 .size = MTDPART_SIZ_FULL
39 },
40};
41
42static struct mv643xx_eth_platform_data guruplug_ge00_data = {
43 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
44};
45
46static struct mv643xx_eth_platform_data guruplug_ge01_data = {
47 .phy_addr = MV643XX_ETH_PHY_ADDR(1),
48};
49
50static struct mv_sata_platform_data guruplug_sata_data = {
51 .n_ports = 1,
52};
53
54static struct mvsdio_platform_data guruplug_mvsdio_data = {
55 /* unfortunately the CD signal has not been connected */
56};
57
58static struct gpio_led guruplug_led_pins[] = {
59 {
60 .name = "guruplug:red:health",
61 .gpio = 46,
62 .active_low = 1,
63 },
64 {
65 .name = "guruplug:green:health",
66 .gpio = 47,
67 .active_low = 1,
68 },
69 {
70 .name = "guruplug:red:wmode",
71 .gpio = 48,
72 .active_low = 1,
73 },
74 {
75 .name = "guruplug:green:wmode",
76 .gpio = 49,
77 .active_low = 1,
78 },
79};
80
81static struct gpio_led_platform_data guruplug_led_data = {
82 .leds = guruplug_led_pins,
83 .num_leds = ARRAY_SIZE(guruplug_led_pins),
84};
85
86static struct platform_device guruplug_leds = {
87 .name = "leds-gpio",
88 .id = -1,
89 .dev = {
90 .platform_data = &guruplug_led_data,
91 }
92};
93
94static unsigned int guruplug_mpp_config[] __initdata = {
95 MPP46_GPIO, /* M_RLED */
96 MPP47_GPIO, /* M_GLED */
97 MPP48_GPIO, /* B_RLED */
98 MPP49_GPIO, /* B_GLED */
99 0
100};
101
102static void __init guruplug_init(void)
103{
104 /*
105 * Basic setup. Needs to be called early.
106 */
107 kirkwood_init();
108 kirkwood_mpp_conf(guruplug_mpp_config);
109
110 kirkwood_uart0_init();
111 kirkwood_nand_init(ARRAY_AND_SIZE(guruplug_nand_parts), 25);
112
113 kirkwood_ehci_init();
114 kirkwood_ge00_init(&guruplug_ge00_data);
115 kirkwood_ge01_init(&guruplug_ge01_data);
116 kirkwood_sata_init(&guruplug_sata_data);
117 kirkwood_sdio_init(&guruplug_mvsdio_data);
118
119 platform_device_register(&guruplug_leds);
120}
121
122MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
123 /* Maintainer: Siddarth Gore <gores@marvell.com> */
124 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
125 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
126 .boot_params = 0x00000100,
127 .init_machine = guruplug_init,
128 .map_io = kirkwood_map_io,
129 .init_irq = kirkwood_init_irq,
130 .timer = &kirkwood_timer,
131MACHINE_END
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
new file mode 100644
index 000000000000..8a2bb0228e4f
--- /dev/null
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -0,0 +1,415 @@
1/*
2 * arch/arm/mach-kirkwood/netxbig_v2-setup.c
3 *
4 * LaCie 2Big and 5Big Network v2 board setup
5 *
6 * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/platform_device.h>
26#include <linux/mtd/physmap.h>
27#include <linux/spi/flash.h>
28#include <linux/spi/spi.h>
29#include <linux/ata_platform.h>
30#include <linux/mv643xx_eth.h>
31#include <linux/i2c.h>
32#include <linux/i2c/at24.h>
33#include <linux/input.h>
34#include <linux/gpio.h>
35#include <linux/gpio_keys.h>
36#include <linux/leds.h>
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/time.h>
40#include <mach/kirkwood.h>
41#include <plat/time.h>
42#include "common.h"
43#include "mpp.h"
44
45/*****************************************************************************
46 * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005)
47 ****************************************************************************/
48
49static struct mtd_partition netxbig_v2_flash_parts[] = {
50 {
51 .name = "u-boot",
52 .size = MTDPART_SIZ_FULL,
53 .offset = 0,
54 .mask_flags = MTD_WRITEABLE, /* force read-only */
55 },
56};
57
58static const struct flash_platform_data netxbig_v2_flash = {
59 .type = "mx25l4005a",
60 .name = "spi_flash",
61 .parts = netxbig_v2_flash_parts,
62 .nr_parts = ARRAY_SIZE(netxbig_v2_flash_parts),
63};
64
65static struct spi_board_info __initdata netxbig_v2_spi_slave_info[] = {
66 {
67 .modalias = "m25p80",
68 .platform_data = &netxbig_v2_flash,
69 .irq = -1,
70 .max_speed_hz = 20000000,
71 .bus_num = 0,
72 .chip_select = 0,
73 },
74};
75
76/*****************************************************************************
77 * Ethernet
78 ****************************************************************************/
79
80static struct mv643xx_eth_platform_data netxbig_v2_ge00_data = {
81 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
82};
83
84static struct mv643xx_eth_platform_data netxbig_v2_ge01_data = {
85 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
86};
87
88/*****************************************************************************
89 * I2C devices
90 ****************************************************************************/
91
92static struct at24_platform_data at24c04 = {
93 .byte_len = SZ_4K / 8,
94 .page_size = 16,
95};
96
97/*
98 * i2c addr | chip | description
99 * 0x50 | HT24LC04 | eeprom (512B)
100 */
101
102static struct i2c_board_info __initdata netxbig_v2_i2c_info[] = {
103 {
104 I2C_BOARD_INFO("24c04", 0x50),
105 .platform_data = &at24c04,
106 }
107};
108
109/*****************************************************************************
110 * SATA
111 ****************************************************************************/
112
113static struct mv_sata_platform_data netxbig_v2_sata_data = {
114 .n_ports = 2,
115};
116
117static int __initdata netxbig_v2_gpio_hdd_power[] = { 16, 17, 41, 42, 43 };
118
119static void __init netxbig_v2_sata_power_init(void)
120{
121 int i;
122 int err;
123 int hdd_nb;
124
125 if (machine_is_net2big_v2())
126 hdd_nb = 2;
127 else
128 hdd_nb = 5;
129
130 /* Power up all hard disks. */
131 for (i = 0; i < hdd_nb; i++) {
132 err = gpio_request(netxbig_v2_gpio_hdd_power[i], NULL);
133 if (err == 0) {
134 err = gpio_direction_output(
135 netxbig_v2_gpio_hdd_power[i], 1);
136 /* Free the HDD power GPIOs. This allow user-space to
137 * configure them via the gpiolib sysfs interface. */
138 gpio_free(netxbig_v2_gpio_hdd_power[i]);
139 }
140 if (err)
141 pr_err("netxbig_v2: failed to power up HDD%d\n", i + 1);
142 }
143}
144
145/*****************************************************************************
146 * GPIO keys
147 ****************************************************************************/
148
149#define NETXBIG_V2_GPIO_SWITCH_POWER_ON 13
150#define NETXBIG_V2_GPIO_SWITCH_POWER_OFF 15
151#define NETXBIG_V2_GPIO_FUNC_BUTTON 34
152
153#define NETXBIG_V2_SWITCH_POWER_ON 0x1
154#define NETXBIG_V2_SWITCH_POWER_OFF 0x2
155
156static struct gpio_keys_button netxbig_v2_buttons[] = {
157 [0] = {
158 .type = EV_SW,
159 .code = NETXBIG_V2_SWITCH_POWER_ON,
160 .gpio = NETXBIG_V2_GPIO_SWITCH_POWER_ON,
161 .desc = "Back power switch (on|auto)",
162 .active_low = 1,
163 },
164 [1] = {
165 .type = EV_SW,
166 .code = NETXBIG_V2_SWITCH_POWER_OFF,
167 .gpio = NETXBIG_V2_GPIO_SWITCH_POWER_OFF,
168 .desc = "Back power switch (auto|off)",
169 .active_low = 1,
170 },
171 [2] = {
172 .code = KEY_OPTION,
173 .gpio = NETXBIG_V2_GPIO_FUNC_BUTTON,
174 .desc = "Function button",
175 .active_low = 1,
176 },
177};
178
179static struct gpio_keys_platform_data netxbig_v2_button_data = {
180 .buttons = netxbig_v2_buttons,
181 .nbuttons = ARRAY_SIZE(netxbig_v2_buttons),
182};
183
184static struct platform_device netxbig_v2_gpio_buttons = {
185 .name = "gpio-keys",
186 .id = -1,
187 .dev = {
188 .platform_data = &netxbig_v2_button_data,
189 },
190};
191
192/*****************************************************************************
193 * GPIO LEDs
194 ****************************************************************************/
195
196/*
197 * The LEDs are controlled by a CPLD and can be configured through a GPIO
198 * extension bus:
199 *
200 * - address register : bit [0-2] -> GPIO [47-49]
201 * - data register : bit [0-2] -> GPIO [44-46]
202 * - enable register : GPIO 29
203 *
204 * Address register selection:
205 *
206 * addr | register
207 * ----------------------------
208 * 0 | front LED
209 * 1 | front LED brightness
210 * 2 | HDD LED brightness
211 * 3 | HDD1 LED
212 * 4 | HDD2 LED
213 * 5 | HDD3 LED
214 * 6 | HDD4 LED
215 * 7 | HDD5 LED
216 *
217 * Data register configuration:
218 *
219 * data | LED brightness
220 * -------------------------------------------------
221 * 0 | min (off)
222 * - | -
223 * 7 | max
224 *
225 * data | front LED mode
226 * -------------------------------------------------
227 * 0 | fix off
228 * 1 | fix blue on
229 * 2 | fix red on
230 * 3 | blink blue on=1 sec and blue off=1 sec
231 * 4 | blink red on=1 sec and red off=1 sec
232 * 5 | blink blue on=2.5 sec and red on=0.5 sec
233 * 6 | blink blue on=1 sec and red on=1 sec
234 * 7 | blink blue on=0.5 sec and blue off=2.5 sec
235 *
236 * data | HDD LED mode
237 * -------------------------------------------------
238 * 0 | fix blue on
239 * 1 | SATA activity blink
240 * 2 | fix red on
241 * 3 | blink blue on=1 sec and blue off=1 sec
242 * 4 | blink red on=1 sec and red off=1 sec
243 * 5 | blink blue on=2.5 sec and red on=0.5 sec
244 * 6 | blink blue on=1 sec and red on=1 sec
245 * 7 | blink blue on=0.5 sec and blue off=2.5 sec
246 */
247
248/*****************************************************************************
249 * Timer
250 ****************************************************************************/
251
252static void netxbig_v2_timer_init(void)
253{
254 kirkwood_tclk = 166666667;
255 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
256}
257
258struct sys_timer netxbig_v2_timer = {
259 .init = netxbig_v2_timer_init,
260};
261
262/*****************************************************************************
263 * General Setup
264 ****************************************************************************/
265
266static unsigned int net2big_v2_mpp_config[] __initdata = {
267 MPP0_SPI_SCn,
268 MPP1_SPI_MOSI,
269 MPP2_SPI_SCK,
270 MPP3_SPI_MISO,
271 MPP6_SYSRST_OUTn,
272 MPP7_GPO, /* Request power-off */
273 MPP8_TW_SDA,
274 MPP9_TW_SCK,
275 MPP10_UART0_TXD,
276 MPP11_UART0_RXD,
277 MPP13_GPIO, /* Rear power switch (on|auto) */
278 MPP14_GPIO, /* USB fuse alarm */
279 MPP15_GPIO, /* Rear power switch (auto|off) */
280 MPP16_GPIO, /* SATA HDD1 power */
281 MPP17_GPIO, /* SATA HDD2 power */
282 MPP20_SATA1_ACTn,
283 MPP21_SATA0_ACTn,
284 MPP24_GPIO, /* USB mode select */
285 MPP26_GPIO, /* USB device vbus */
286 MPP28_GPIO, /* USB enable host vbus */
287 MPP29_GPIO, /* CPLD extension ALE */
288 MPP34_GPIO, /* Rear Push button */
289 MPP35_GPIO, /* Inhibit switch power-off */
290 MPP36_GPIO, /* SATA HDD1 presence */
291 MPP37_GPIO, /* SATA HDD2 presence */
292 MPP40_GPIO, /* eSATA presence */
293 MPP44_GPIO, /* CPLD extension (data 0) */
294 MPP45_GPIO, /* CPLD extension (data 1) */
295 MPP46_GPIO, /* CPLD extension (data 2) */
296 MPP47_GPIO, /* CPLD extension (addr 0) */
297 MPP48_GPIO, /* CPLD extension (addr 1) */
298 MPP49_GPIO, /* CPLD extension (addr 2) */
299 0
300};
301
302static unsigned int net5big_v2_mpp_config[] __initdata = {
303 MPP0_SPI_SCn,
304 MPP1_SPI_MOSI,
305 MPP2_SPI_SCK,
306 MPP3_SPI_MISO,
307 MPP6_SYSRST_OUTn,
308 MPP7_GPO, /* Request power-off */
309 MPP8_TW_SDA,
310 MPP9_TW_SCK,
311 MPP10_UART0_TXD,
312 MPP11_UART0_RXD,
313 MPP13_GPIO, /* Rear power switch (on|auto) */
314 MPP14_GPIO, /* USB fuse alarm */
315 MPP15_GPIO, /* Rear power switch (auto|off) */
316 MPP16_GPIO, /* SATA HDD1 power */
317 MPP17_GPIO, /* SATA HDD2 power */
318 MPP20_GE1_0,
319 MPP21_GE1_1,
320 MPP22_GE1_2,
321 MPP23_GE1_3,
322 MPP24_GE1_4,
323 MPP25_GE1_5,
324 MPP26_GE1_6,
325 MPP27_GE1_7,
326 MPP28_GPIO, /* USB enable host vbus */
327 MPP29_GPIO, /* CPLD extension ALE */
328 MPP30_GE1_10,
329 MPP31_GE1_11,
330 MPP32_GE1_12,
331 MPP33_GE1_13,
332 MPP34_GPIO, /* Rear Push button */
333 MPP35_GPIO, /* Inhibit switch power-off */
334 MPP36_GPIO, /* SATA HDD1 presence */
335 MPP37_GPIO, /* SATA HDD2 presence */
336 MPP38_GPIO, /* SATA HDD3 presence */
337 MPP39_GPIO, /* SATA HDD4 presence */
338 MPP40_GPIO, /* SATA HDD5 presence */
339 MPP41_GPIO, /* SATA HDD3 power */
340 MPP42_GPIO, /* SATA HDD4 power */
341 MPP43_GPIO, /* SATA HDD5 power */
342 MPP44_GPIO, /* CPLD extension (data 0) */
343 MPP45_GPIO, /* CPLD extension (data 1) */
344 MPP46_GPIO, /* CPLD extension (data 2) */
345 MPP47_GPIO, /* CPLD extension (addr 0) */
346 MPP48_GPIO, /* CPLD extension (addr 1) */
347 MPP49_GPIO, /* CPLD extension (addr 2) */
348 0
349};
350
351#define NETXBIG_V2_GPIO_POWER_OFF 7
352
353static void netxbig_v2_power_off(void)
354{
355 gpio_set_value(NETXBIG_V2_GPIO_POWER_OFF, 1);
356}
357
358static void __init netxbig_v2_init(void)
359{
360 /*
361 * Basic setup. Needs to be called early.
362 */
363 kirkwood_init();
364 if (machine_is_net2big_v2())
365 kirkwood_mpp_conf(net2big_v2_mpp_config);
366 else
367 kirkwood_mpp_conf(net5big_v2_mpp_config);
368
369 netxbig_v2_sata_power_init();
370
371 kirkwood_ehci_init();
372 kirkwood_ge00_init(&netxbig_v2_ge00_data);
373 if (machine_is_net5big_v2())
374 kirkwood_ge01_init(&netxbig_v2_ge01_data);
375 kirkwood_sata_init(&netxbig_v2_sata_data);
376 kirkwood_uart0_init();
377 spi_register_board_info(netxbig_v2_spi_slave_info,
378 ARRAY_SIZE(netxbig_v2_spi_slave_info));
379 kirkwood_spi_init();
380 kirkwood_i2c_init();
381 i2c_register_board_info(0, netxbig_v2_i2c_info,
382 ARRAY_SIZE(netxbig_v2_i2c_info));
383
384 platform_device_register(&netxbig_v2_gpio_buttons);
385
386 if (gpio_request(NETXBIG_V2_GPIO_POWER_OFF, "power-off") == 0 &&
387 gpio_direction_output(NETXBIG_V2_GPIO_POWER_OFF, 0) == 0)
388 pm_power_off = netxbig_v2_power_off;
389 else
390 pr_err("netxbig_v2: failed to configure power-off GPIO\n");
391}
392
393#ifdef CONFIG_MACH_NET2BIG_V2
394MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
395 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
396 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
397 .boot_params = 0x00000100,
398 .init_machine = netxbig_v2_init,
399 .map_io = kirkwood_map_io,
400 .init_irq = kirkwood_init_irq,
401 .timer = &netxbig_v2_timer,
402MACHINE_END
403#endif
404
405#ifdef CONFIG_MACH_NET5BIG_V2
406MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
407 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
408 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
409 .boot_params = 0x00000100,
410 .init_machine = netxbig_v2_init,
411 .map_io = kirkwood_map_io,
412 .init_irq = kirkwood_init_irq,
413 .timer = &netxbig_v2_timer,
414MACHINE_END
415#endif
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index a2d307ec0420..244655d323ea 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -59,6 +59,13 @@ static unsigned long common_pin_config[] __initdata = {
59 /* UART1 */ 59 /* UART1 */
60 GPIO107_UART1_RXD, 60 GPIO107_UART1_RXD,
61 GPIO108_UART1_TXD, 61 GPIO108_UART1_TXD,
62
63 /* SSP1 */
64 GPIO113_I2S_MCLK,
65 GPIO114_I2S_FRM,
66 GPIO115_I2S_BCLK,
67 GPIO116_I2S_RXD,
68 GPIO117_I2S_TXD,
62}; 69};
63 70
64static struct smc91x_platdata smc91x_info = { 71static struct smc91x_platdata smc91x_info = {
@@ -123,12 +130,18 @@ static struct pxa3xx_nand_platform_data aspenite_nand_info = {
123 .nr_parts = ARRAY_SIZE(aspenite_nand_partitions), 130 .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
124}; 131};
125 132
133static struct i2c_board_info aspenite_i2c_info[] __initdata = {
134 { I2C_BOARD_INFO("wm8753", 0x1b), },
135};
136
126static void __init common_init(void) 137static void __init common_init(void)
127{ 138{
128 mfp_config(ARRAY_AND_SIZE(common_pin_config)); 139 mfp_config(ARRAY_AND_SIZE(common_pin_config));
129 140
130 /* on-chip devices */ 141 /* on-chip devices */
131 pxa168_add_uart(1); 142 pxa168_add_uart(1);
143 pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
144 pxa168_add_ssp(1);
132 pxa168_add_nand(&aspenite_nand_info); 145 pxa168_add_nand(&aspenite_nand_info);
133 146
134 /* off-chip devices */ 147 /* off-chip devices */
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index ab26d13295c4..ee8b02ed8011 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -10,7 +10,7 @@
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) 11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
12 12
13#define NR_BUILTIN_GPIO (128) 13#define NR_BUILTIN_GPIO (192)
14 14
15#define gpio_to_bank(gpio) ((gpio) >> 5) 15#define gpio_to_bank(gpio) ((gpio) >> 5)
16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) 16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index 02701196ea03..b379cdec4d38 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -5,10 +5,10 @@
5 * Interrupt numbers for PXA168 5 * Interrupt numbers for PXA168
6 */ 6 */
7#define IRQ_PXA168_NONE (-1) 7#define IRQ_PXA168_NONE (-1)
8#define IRQ_PXA168_SSP3 0 8#define IRQ_PXA168_SSP4 0
9#define IRQ_PXA168_SSP2 1 9#define IRQ_PXA168_SSP3 1
10#define IRQ_PXA168_SSP1 2 10#define IRQ_PXA168_SSP2 2
11#define IRQ_PXA168_SSP0 3 11#define IRQ_PXA168_SSP1 3
12#define IRQ_PXA168_PMIC_INT 4 12#define IRQ_PXA168_PMIC_INT 4
13#define IRQ_PXA168_RTC_INT 5 13#define IRQ_PXA168_RTC_INT 5
14#define IRQ_PXA168_RTC_ALARM 6 14#define IRQ_PXA168_RTC_ALARM 6
@@ -20,7 +20,7 @@
20#define IRQ_PXA168_TIMER2 14 20#define IRQ_PXA168_TIMER2 14
21#define IRQ_PXA168_TIMER3 15 21#define IRQ_PXA168_TIMER3 15
22#define IRQ_PXA168_CMU 16 22#define IRQ_PXA168_CMU 16
23#define IRQ_PXA168_SSP4 17 23#define IRQ_PXA168_SSP5 17
24#define IRQ_PXA168_MSP_WAKEUP 19 24#define IRQ_PXA168_MSP_WAKEUP 19
25#define IRQ_PXA168_CF_WAKEUP 20 25#define IRQ_PXA168_CF_WAKEUP 20
26#define IRQ_PXA168_XD_WAKEUP 21 26#define IRQ_PXA168_XD_WAKEUP 21
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 9f9f8143e272..761c2dacc079 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -9,6 +9,175 @@
9#define MFP_DRIVE_FAST (0x8 << 13) 9#define MFP_DRIVE_FAST (0x8 << 13)
10 10
11/* GPIO */ 11/* GPIO */
12#define GPIO0_GPIO0 MFP_CFG(GPIO0, AF0)
13#define GPIO1_GPIO1 MFP_CFG(GPIO1, AF0)
14#define GPIO2_GPIO2 MFP_CFG(GPIO2, AF0)
15#define GPIO3_GPIO3 MFP_CFG(GPIO3, AF0)
16#define GPIO4_GPIO4 MFP_CFG(GPIO4, AF0)
17#define GPIO5_GPIO5 MFP_CFG(GPIO5, AF0)
18#define GPIO6_GPIO6 MFP_CFG(GPIO6, AF0)
19#define GPIO7_GPIO7 MFP_CFG(GPIO7, AF0)
20#define GPIO8_GPIO8 MFP_CFG(GPIO8, AF0)
21#define GPIO9_GPIO9 MFP_CFG(GPIO9, AF0)
22#define GPIO10_GPIO10 MFP_CFG(GPIO10, AF0)
23#define GPIO11_GPIO11 MFP_CFG(GPIO11, AF0)
24#define GPIO12_GPIO12 MFP_CFG(GPIO12, AF0)
25#define GPIO13_GPIO13 MFP_CFG(GPIO13, AF0)
26#define GPIO14_GPIO14 MFP_CFG(GPIO14, AF0)
27#define GPIO15_GPIO15 MFP_CFG(GPIO15, AF0)
28#define GPIO16_GPIO16 MFP_CFG(GPIO16, AF0)
29#define GPIO17_GPIO17 MFP_CFG(GPIO17, AF0)
30#define GPIO18_GPIO18 MFP_CFG(GPIO18, AF0)
31#define GPIO19_GPIO19 MFP_CFG(GPIO19, AF0)
32#define GPIO20_GPIO20 MFP_CFG(GPIO20, AF0)
33#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0)
34#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0)
35#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0)
36#define GPIO24_GPIO24 MFP_CFG(GPIO24, AF0)
37#define GPIO25_GPIO25 MFP_CFG(GPIO25, AF0)
38#define GPIO26_GPIO26 MFP_CFG(GPIO26, AF0)
39#define GPIO27_GPIO27 MFP_CFG(GPIO27, AF0)
40#define GPIO28_GPIO28 MFP_CFG(GPIO28, AF0)
41#define GPIO29_GPIO29 MFP_CFG(GPIO29, AF0)
42#define GPIO30_GPIO30 MFP_CFG(GPIO30, AF0)
43#define GPIO31_GPIO31 MFP_CFG(GPIO31, AF0)
44#define GPIO32_GPIO32 MFP_CFG(GPIO32, AF0)
45#define GPIO33_GPIO33 MFP_CFG(GPIO33, AF0)
46#define GPIO34_GPIO34 MFP_CFG(GPIO34, AF0)
47#define GPIO35_GPIO35 MFP_CFG(GPIO35, AF0)
48#define GPIO36_GPIO36 MFP_CFG(GPIO36, AF0)
49#define GPIO37_GPIO37 MFP_CFG(GPIO37, AF0)
50#define GPIO38_GPIO38 MFP_CFG(GPIO38, AF0)
51#define GPIO39_GPIO39 MFP_CFG(GPIO39, AF0)
52#define GPIO40_GPIO40 MFP_CFG(GPIO40, AF0)
53#define GPIO41_GPIO41 MFP_CFG(GPIO41, AF0)
54#define GPIO42_GPIO42 MFP_CFG(GPIO42, AF0)
55#define GPIO43_GPIO43 MFP_CFG(GPIO43, AF0)
56#define GPIO44_GPIO44 MFP_CFG(GPIO44, AF0)
57#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0)
58#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0)
59#define GPIO47_GPIO47 MFP_CFG(GPIO47, AF0)
60#define GPIO48_GPIO48 MFP_CFG(GPIO48, AF0)
61#define GPIO49_GPIO49 MFP_CFG(GPIO49, AF0)
62#define GPIO50_GPIO50 MFP_CFG(GPIO50, AF0)
63#define GPIO51_GPIO51 MFP_CFG(GPIO51, AF0)
64#define GPIO52_GPIO52 MFP_CFG(GPIO52, AF0)
65#define GPIO53_GPIO53 MFP_CFG(GPIO53, AF0)
66#define GPIO54_GPIO54 MFP_CFG(GPIO54, AF0)
67#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0)
68#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0)
69#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0)
70#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0)
71#define GPIO59_GPIO59 MFP_CFG(GPIO59, AF0)
72#define GPIO60_GPIO60 MFP_CFG(GPIO60, AF0)
73#define GPIO61_GPIO61 MFP_CFG(GPIO61, AF0)
74#define GPIO62_GPIO62 MFP_CFG(GPIO62, AF0)
75#define GPIO63_GPIO63 MFP_CFG(GPIO63, AF0)
76#define GPIO64_GPIO64 MFP_CFG(GPIO64, AF0)
77#define GPIO65_GPIO65 MFP_CFG(GPIO65, AF0)
78#define GPIO66_GPIO66 MFP_CFG(GPIO66, AF0)
79#define GPIO67_GPIO67 MFP_CFG(GPIO67, AF0)
80#define GPIO68_GPIO68 MFP_CFG(GPIO68, AF0)
81#define GPIO69_GPIO69 MFP_CFG(GPIO69, AF0)
82#define GPIO70_GPIO70 MFP_CFG(GPIO70, AF0)
83#define GPIO71_GPIO71 MFP_CFG(GPIO71, AF0)
84#define GPIO72_GPIO72 MFP_CFG(GPIO72, AF0)
85#define GPIO73_GPIO73 MFP_CFG(GPIO73, AF0)
86#define GPIO74_GPIO74 MFP_CFG(GPIO74, AF0)
87#define GPIO75_GPIO75 MFP_CFG(GPIO75, AF0)
88#define GPIO76_GPIO76 MFP_CFG(GPIO76, AF0)
89#define GPIO77_GPIO77 MFP_CFG(GPIO77, AF0)
90#define GPIO78_GPIO78 MFP_CFG(GPIO78, AF0)
91#define GPIO79_GPIO79 MFP_CFG(GPIO79, AF0)
92#define GPIO80_GPIO80 MFP_CFG(GPIO80, AF0)
93#define GPIO81_GPIO81 MFP_CFG(GPIO81, AF0)
94#define GPIO82_GPIO82 MFP_CFG(GPIO82, AF0)
95#define GPIO83_GPIO83 MFP_CFG(GPIO83, AF0)
96#define GPIO84_GPIO84 MFP_CFG(GPIO84, AF0)
97#define GPIO85_GPIO85 MFP_CFG(GPIO85, AF0)
98#define GPIO86_GPIO86 MFP_CFG(GPIO86, AF0)
99#define GPIO87_GPIO87 MFP_CFG(GPIO87, AF0)
100#define GPIO88_GPIO88 MFP_CFG(GPIO88, AF0)
101#define GPIO89_GPIO89 MFP_CFG(GPIO89, AF0)
102#define GPIO90_GPIO90 MFP_CFG(GPIO90, AF0)
103#define GPIO91_GPIO91 MFP_CFG(GPIO91, AF0)
104#define GPIO92_GPIO92 MFP_CFG(GPIO92, AF0)
105#define GPIO93_GPIO93 MFP_CFG(GPIO93, AF0)
106#define GPIO94_GPIO94 MFP_CFG(GPIO94, AF0)
107#define GPIO95_GPIO95 MFP_CFG(GPIO95, AF0)
108#define GPIO96_GPIO96 MFP_CFG(GPIO96, AF0)
109#define GPIO97_GPIO97 MFP_CFG(GPIO97, AF0)
110#define GPIO98_GPIO98 MFP_CFG(GPIO98, AF0)
111#define GPIO99_GPIO99 MFP_CFG(GPIO99, AF0)
112#define GPIO100_GPIO100 MFP_CFG(GPIO100, AF0)
113#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0)
114#define GPIO102_GPIO102 MFP_CFG(GPIO102, AF1)
115#define GPIO103_GPIO103 MFP_CFG(GPIO103, AF1)
116#define GPIO104_GPIO104 MFP_CFG(GPIO104, AF1)
117#define GPIO105_GPIO105 MFP_CFG(GPIO105, AF1)
118#define GPIO106_GPIO106 MFP_CFG(GPIO106, AF1)
119#define GPIO107_GPIO107 MFP_CFG(GPIO107, AF1)
120#define GPIO108_GPIO108 MFP_CFG(GPIO108, AF1)
121#define GPIO109_GPIO109 MFP_CFG(GPIO109, AF1)
122#define GPIO110_GPIO110 MFP_CFG(GPIO110, AF1)
123#define GPIO111_GPIO111 MFP_CFG(GPIO111, AF1)
124#define GPIO112_GPIO112 MFP_CFG(GPIO112, AF1)
125#define GPIO113_GPIO113 MFP_CFG(GPIO113, AF1)
126#define GPIO114_GPIO114 MFP_CFG(GPIO114, AF0)
127#define GPIO115_GPIO115 MFP_CFG(GPIO115, AF0)
128#define GPIO116_GPIO116 MFP_CFG(GPIO116, AF0)
129#define GPIO117_GPIO117 MFP_CFG(GPIO117, AF0)
130#define GPIO118_GPIO118 MFP_CFG(GPIO118, AF0)
131#define GPIO119_GPIO119 MFP_CFG(GPIO119, AF0)
132#define GPIO120_GPIO120 MFP_CFG(GPIO120, AF0)
133#define GPIO121_GPIO121 MFP_CFG(GPIO121, AF0)
134#define GPIO122_GPIO122 MFP_CFG(GPIO122, AF0)
135#define GPIO123_GPIO123 MFP_CFG(GPIO123, AF0)
136#define GPIO124_GPIO124 MFP_CFG(GPIO124, AF0)
137#define GPIO125_GPIO125 MFP_CFG(GPIO125, AF0)
138#define GPIO126_GPIO126 MFP_CFG(GPIO126, AF0)
139#define GPIO127_GPIO127 MFP_CFG(GPIO127, AF0)
140#define GPIO128_GPIO128 MFP_CFG(GPIO128, AF0)
141#define GPIO129_GPIO129 MFP_CFG(GPIO129, AF0)
142#define GPIO130_GPIO130 MFP_CFG(GPIO130, AF0)
143#define GPIO131_GPIO131 MFP_CFG(GPIO131, AF0)
144#define GPIO132_GPIO132 MFP_CFG(GPIO132, AF0)
145#define GPIO133_GPIO133 MFP_CFG(GPIO133, AF0)
146#define GPIO134_GPIO134 MFP_CFG(GPIO134, AF0)
147#define GPIO135_GPIO135 MFP_CFG(GPIO135, AF0)
148#define GPIO136_GPIO136 MFP_CFG(GPIO136, AF0)
149#define GPIO137_GPIO137 MFP_CFG(GPIO137, AF0)
150#define GPIO138_GPIO138 MFP_CFG(GPIO138, AF0)
151#define GPIO139_GPIO139 MFP_CFG(GPIO139, AF0)
152#define GPIO140_GPIO140 MFP_CFG(GPIO140, AF0)
153#define GPIO141_GPIO141 MFP_CFG(GPIO141, AF0)
154#define GPIO142_GPIO142 MFP_CFG(GPIO142, AF1)
155#define GPIO143_GPIO143 MFP_CFG(GPIO143, AF1)
156#define GPIO144_GPIO144 MFP_CFG(GPIO144, AF1)
157#define GPIO145_GPIO145 MFP_CFG(GPIO145, AF1)
158#define GPIO146_GPIO146 MFP_CFG(GPIO146, AF1)
159#define GPIO147_GPIO147 MFP_CFG(GPIO147, AF1)
160#define GPIO148_GPIO148 MFP_CFG(GPIO148, AF1)
161#define GPIO149_GPIO149 MFP_CFG(GPIO149, AF1)
162#define GPIO150_GPIO150 MFP_CFG(GPIO150, AF1)
163#define GPIO151_GPIO151 MFP_CFG(GPIO151, AF1)
164#define GPIO152_GPIO152 MFP_CFG(GPIO152, AF1)
165#define GPIO153_GPIO153 MFP_CFG(GPIO153, AF1)
166#define GPIO154_GPIO154 MFP_CFG(GPIO154, AF1)
167#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1)
168#define GPIO156_GPIO156 MFP_CFG(GPIO156, AF1)
169#define GPIO157_GPIO157 MFP_CFG(GPIO157, AF1)
170#define GPIO158_GPIO158 MFP_CFG(GPIO158, AF1)
171#define GPIO159_GPIO159 MFP_CFG(GPIO159, AF1)
172#define GPIO160_GPIO160 MFP_CFG(GPIO160, AF1)
173#define GPIO161_GPIO161 MFP_CFG(GPIO161, AF1)
174#define GPIO162_GPIO162 MFP_CFG(GPIO162, AF1)
175#define GPIO163_GPIO163 MFP_CFG(GPIO163, AF1)
176#define GPIO164_GPIO164 MFP_CFG(GPIO164, AF1)
177#define GPIO165_GPIO165 MFP_CFG(GPIO165, AF1)
178#define GPIO166_GPIO166 MFP_CFG(GPIO166, AF1)
179#define GPIO167_GPIO167 MFP_CFG(GPIO167, AF1)
180#define GPIO168_GPIO168 MFP_CFG(GPIO168, AF1)
12 181
13/* DFI */ 182/* DFI */
14#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0) 183#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0)
@@ -47,7 +216,6 @@
47 216
48/* Ethernet */ 217/* Ethernet */
49#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2) 218#define GPIO155_SM_ADVMUX MFP_CFG(GPIO155, AF2)
50#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1)
51 219
52/* UART1 */ 220/* UART1 */
53#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1) 221#define GPIO45_UART1_RXD MFP_CFG(GPIO45, AF1)
@@ -159,6 +327,8 @@
159#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW) 327#define GPIO44_TWSI2_SDA MFP_CFG_DRV(GPIO44, AF1, SLOW)
160#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW) 328#define GPIO71_TWSI3_SCL MFP_CFG_DRV(GPIO71, AF1, SLOW)
161#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW) 329#define GPIO72_TWSI3_SDA MFP_CFG_DRV(GPIO72, AF1, SLOW)
330#define TWSI4_SCL MFP_CFG_DRV(TWSI4_SCL, AF0, SLOW)
331#define TWSI4_SDA MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW)
162#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW) 332#define GPIO99_TWSI5_SCL MFP_CFG_DRV(GPIO99, AF4, SLOW)
163#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW) 333#define GPIO100_TWSI5_SDA MFP_CFG_DRV(GPIO100, AF4, SLOW)
164#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW) 334#define GPIO97_TWSI6_SCL MFP_CFG_DRV(GPIO97, AF2, SLOW)
@@ -218,21 +388,6 @@
218#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST) 388#define GPIO69_CAM_MCLK MFP_CFG_DRV(GPIO69, AF1, FAST)
219#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST) 389#define GPIO70_CAM_PCLK MFP_CFG_DRV(GPIO70, AF1, FAST)
220 390
221/* Wifi */
222#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0)
223#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0)
224#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0)
225#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0)
226#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0)
227#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0)
228#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0)
229#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0)
230
231/* Codec*/
232#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0)
233
234#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0)
235
236/* PMIC */ 391/* PMIC */
237#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0) 392#define PMIC_PMIC_INT MFP_CFG(PMIC_INT, AF0)
238 393
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 459f3be9cfb2..fec220bd5046 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -39,17 +39,17 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
39 int ret; 39 int ret;
40 40
41 switch (id) { 41 switch (id) {
42 case 0: d = &mmp2_device_twsi1; break; 42 case 1: d = &mmp2_device_twsi1; break;
43 case 1: d = &mmp2_device_twsi2; break; 43 case 2: d = &mmp2_device_twsi2; break;
44 case 2: d = &mmp2_device_twsi3; break; 44 case 3: d = &mmp2_device_twsi3; break;
45 case 3: d = &mmp2_device_twsi4; break; 45 case 4: d = &mmp2_device_twsi4; break;
46 case 4: d = &mmp2_device_twsi5; break; 46 case 5: d = &mmp2_device_twsi5; break;
47 case 5: d = &mmp2_device_twsi6; break; 47 case 6: d = &mmp2_device_twsi6; break;
48 default: 48 default:
49 return -EINVAL; 49 return -EINVAL;
50 } 50 }
51 51
52 ret = i2c_register_board_info(id, info, size); 52 ret = i2c_register_board_info(id - 1, info, size);
53 if (ret) 53 if (ret)
54 return ret; 54 return ret;
55 55
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 3ad612cbdf09..3b2bd5d5eb05 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -14,6 +14,11 @@ extern struct pxa_device_desc pxa168_device_pwm1;
14extern struct pxa_device_desc pxa168_device_pwm2; 14extern struct pxa_device_desc pxa168_device_pwm2;
15extern struct pxa_device_desc pxa168_device_pwm3; 15extern struct pxa_device_desc pxa168_device_pwm3;
16extern struct pxa_device_desc pxa168_device_pwm4; 16extern struct pxa_device_desc pxa168_device_pwm4;
17extern struct pxa_device_desc pxa168_device_ssp1;
18extern struct pxa_device_desc pxa168_device_ssp2;
19extern struct pxa_device_desc pxa168_device_ssp3;
20extern struct pxa_device_desc pxa168_device_ssp4;
21extern struct pxa_device_desc pxa168_device_ssp5;
17extern struct pxa_device_desc pxa168_device_nand; 22extern struct pxa_device_desc pxa168_device_nand;
18 23
19static inline int pxa168_add_uart(int id) 24static inline int pxa168_add_uart(int id)
@@ -67,6 +72,22 @@ static inline int pxa168_add_pwm(int id)
67 return pxa_register_device(d, NULL, 0); 72 return pxa_register_device(d, NULL, 0);
68} 73}
69 74
75static inline int pxa168_add_ssp(int id)
76{
77 struct pxa_device_desc *d = NULL;
78
79 switch (id) {
80 case 1: d = &pxa168_device_ssp1; break;
81 case 2: d = &pxa168_device_ssp2; break;
82 case 3: d = &pxa168_device_ssp3; break;
83 case 4: d = &pxa168_device_ssp4; break;
84 case 5: d = &pxa168_device_ssp5; break;
85 default:
86 return -EINVAL;
87 }
88 return pxa_register_device(d, NULL, 0);
89}
90
70static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info) 91static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
71{ 92{
72 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info)); 93 return pxa_register_device(&pxa168_device_nand, info, sizeof(*info));
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 712af03fd1af..1a96585336ba 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -26,8 +26,6 @@
26#define APBC_PXA168_PWM2 APBC_REG(0x010) 26#define APBC_PXA168_PWM2 APBC_REG(0x010)
27#define APBC_PXA168_PWM3 APBC_REG(0x014) 27#define APBC_PXA168_PWM3 APBC_REG(0x014)
28#define APBC_PXA168_PWM4 APBC_REG(0x018) 28#define APBC_PXA168_PWM4 APBC_REG(0x018)
29#define APBC_PXA168_SSP1 APBC_REG(0x01c)
30#define APBC_PXA168_SSP2 APBC_REG(0x020)
31#define APBC_PXA168_RTC APBC_REG(0x028) 29#define APBC_PXA168_RTC APBC_REG(0x028)
32#define APBC_PXA168_TWSI0 APBC_REG(0x02c) 30#define APBC_PXA168_TWSI0 APBC_REG(0x02c)
33#define APBC_PXA168_KPC APBC_REG(0x030) 31#define APBC_PXA168_KPC APBC_REG(0x030)
@@ -35,14 +33,16 @@
35#define APBC_PXA168_AIB APBC_REG(0x03c) 33#define APBC_PXA168_AIB APBC_REG(0x03c)
36#define APBC_PXA168_SW_JTAG APBC_REG(0x040) 34#define APBC_PXA168_SW_JTAG APBC_REG(0x040)
37#define APBC_PXA168_ONEWIRE APBC_REG(0x048) 35#define APBC_PXA168_ONEWIRE APBC_REG(0x048)
38#define APBC_PXA168_SSP3 APBC_REG(0x04c)
39#define APBC_PXA168_ASFAR APBC_REG(0x050) 36#define APBC_PXA168_ASFAR APBC_REG(0x050)
40#define APBC_PXA168_ASSAR APBC_REG(0x054) 37#define APBC_PXA168_ASSAR APBC_REG(0x054)
41#define APBC_PXA168_SSP4 APBC_REG(0x058)
42#define APBC_PXA168_SSP5 APBC_REG(0x05c)
43#define APBC_PXA168_TWSI1 APBC_REG(0x06c) 38#define APBC_PXA168_TWSI1 APBC_REG(0x06c)
44#define APBC_PXA168_UART3 APBC_REG(0x070) 39#define APBC_PXA168_UART3 APBC_REG(0x070)
45#define APBC_PXA168_AC97 APBC_REG(0x084) 40#define APBC_PXA168_AC97 APBC_REG(0x084)
41#define APBC_PXA168_SSP1 APBC_REG(0x81c)
42#define APBC_PXA168_SSP2 APBC_REG(0x820)
43#define APBC_PXA168_SSP3 APBC_REG(0x84c)
44#define APBC_PXA168_SSP4 APBC_REG(0x858)
45#define APBC_PXA168_SSP5 APBC_REG(0x85c)
46 46
47/* 47/*
48 * APB Clock register offsets for PXA910 48 * APB Clock register offsets for PXA910
diff --git a/arch/arm/mach-mmp/include/mach/regs-smc.h b/arch/arm/mach-mmp/include/mach/regs-smc.h
new file mode 100644
index 000000000000..e484d40d71bd
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-smc.h
@@ -0,0 +1,37 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-smc.h
3 *
4 * Static Memory Controller Registers
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_SMC_H
12#define __ASM_MACH_REGS_SMC_H
13
14#include <mach/addr-map.h>
15
16#define SMC_VIRT_BASE (AXI_VIRT_BASE + 0x83800)
17#define SMC_REG(x) (SMC_VIRT_BASE + (x))
18
19#define SMC_MSC0 SMC_REG(0x0020)
20#define SMC_MSC1 SMC_REG(0x0024)
21#define SMC_SXCNFG0 SMC_REG(0x0030)
22#define SMC_SXCNFG1 SMC_REG(0x0034)
23#define SMC_MEMCLKCFG SMC_REG(0x0068)
24#define SMC_CSDFICFG0 SMC_REG(0x0090)
25#define SMC_CSDFICFG1 SMC_REG(0x0094)
26#define SMC_CLK_RET_DEL SMC_REG(0x00b0)
27#define SMC_ADV_RET_DEL SMC_REG(0x00b4)
28#define SMC_CSADRMAP0 SMC_REG(0x00c0)
29#define SMC_CSADRMAP1 SMC_REG(0x00c4)
30#define SMC_WE_AP0 SMC_REG(0x00e0)
31#define SMC_WE_AP1 SMC_REG(0x00e4)
32#define SMC_OE_AP0 SMC_REG(0x00f0)
33#define SMC_OE_AP1 SMC_REG(0x00f4)
34#define SMC_ADV_AP0 SMC_REG(0x0100)
35#define SMC_ADV_AP1 SMC_REG(0x0104)
36
37#endif /* __ASM_MACH_REGS_SMC_H */
diff --git a/arch/arm/mach-mmp/include/mach/timex.h b/arch/arm/mach-mmp/include/mach/timex.h
index 6cebbd0ca8f4..70c9f1d88c02 100644
--- a/arch/arm/mach-mmp/include/mach/timex.h
+++ b/arch/arm/mach-mmp/include/mach/timex.h
@@ -6,4 +6,8 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9#ifdef CONFIG_CPU_MMP2
10#define CLOCK_TICK_RATE 6500000
11#else
9#define CLOCK_TICK_RATE 3250000 12#define CLOCK_TICK_RATE 3250000
13#endif
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index cfd4d66ef800..d77dd41d60e1 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -15,12 +15,16 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/regulator/machine.h>
19#include <linux/regulator/max8649.h>
20#include <linux/mfd/max8925.h>
18 21
19#include <asm/mach-types.h> 22#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
21#include <mach/addr-map.h> 24#include <mach/addr-map.h>
22#include <mach/mfp-mmp2.h> 25#include <mach/mfp-mmp2.h>
23#include <mach/mmp2.h> 26#include <mach/mmp2.h>
27#include <mach/irqs.h>
24 28
25#include "common.h" 29#include "common.h"
26 30
@@ -58,6 +62,63 @@ static unsigned long jasper_pin_config[] __initdata = {
58 GPIO149_ND_CLE, 62 GPIO149_ND_CLE,
59 GPIO112_ND_RDY0, 63 GPIO112_ND_RDY0,
60 GPIO160_ND_RDY1, 64 GPIO160_ND_RDY1,
65
66 /* PMIC */
67 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
68};
69
70static struct regulator_consumer_supply max8649_supply[] = {
71 REGULATOR_SUPPLY("vcc_core", NULL),
72};
73
74static struct regulator_init_data max8649_init_data = {
75 .constraints = {
76 .name = "vcc_core range",
77 .min_uV = 1150000,
78 .max_uV = 1280000,
79 .always_on = 1,
80 .boot_on = 1,
81 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
82 },
83 .num_consumer_supplies = 1,
84 .consumer_supplies = &max8649_supply[0],
85};
86
87static struct max8649_platform_data jasper_max8649_info = {
88 .mode = 2, /* VID1 = 1, VID0 = 0 */
89 .extclk = 0,
90 .ramp_timing = MAX8649_RAMP_32MV,
91 .regulator = &max8649_init_data,
92};
93
94static struct max8925_backlight_pdata jasper_backlight_data = {
95 .dual_string = 0,
96};
97
98static struct max8925_power_pdata jasper_power_data = {
99 .batt_detect = 0, /* can't detect battery by ID pin */
100 .topoff_threshold = MAX8925_TOPOFF_THR_10PER,
101 .fast_charge = MAX8925_FCHG_1000MA,
102};
103
104static struct max8925_platform_data jasper_max8925_info = {
105 .backlight = &jasper_backlight_data,
106 .power = &jasper_power_data,
107 .irq_base = IRQ_BOARD_START,
108};
109
110static struct i2c_board_info jasper_twsi1_info[] = {
111 [0] = {
112 .type = "max8649",
113 .addr = 0x60,
114 .platform_data = &jasper_max8649_info,
115 },
116 [1] = {
117 .type = "max8925",
118 .addr = 0x3c,
119 .irq = IRQ_MMP2_PMIC,
120 .platform_data = &jasper_max8925_info,
121 },
61}; 122};
62 123
63static void __init jasper_init(void) 124static void __init jasper_init(void)
@@ -67,6 +128,9 @@ static void __init jasper_init(void)
67 /* on-chip devices */ 128 /* on-chip devices */
68 mmp2_add_uart(1); 129 mmp2_add_uart(1);
69 mmp2_add_uart(3); 130 mmp2_add_uart(3);
131 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
132
133 regulator_has_full_constraints();
70} 134}
71 135
72MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") 136MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 72eb9daeea99..7f5eb059bb01 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -15,11 +15,14 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <asm/hardware/cache-tauros2.h>
19
18#include <mach/addr-map.h> 20#include <mach/addr-map.h>
19#include <mach/regs-apbc.h> 21#include <mach/regs-apbc.h>
20#include <mach/regs-apmu.h> 22#include <mach/regs-apmu.h>
21#include <mach/cputype.h> 23#include <mach/cputype.h>
22#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/dma.h>
23#include <mach/mfp.h> 26#include <mach/mfp.h>
24#include <mach/gpio.h> 27#include <mach/gpio.h>
25#include <mach/devices.h> 28#include <mach/devices.h>
@@ -32,7 +35,50 @@
32#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c) 35#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
33 36
34static struct mfp_addr_map mmp2_addr_map[] __initdata = { 37static struct mfp_addr_map mmp2_addr_map[] __initdata = {
38
39 MFP_ADDR_X(GPIO0, GPIO58, 0x54),
40 MFP_ADDR_X(GPIO59, GPIO73, 0x280),
41 MFP_ADDR_X(GPIO74, GPIO101, 0x170),
42
43 MFP_ADDR(GPIO102, 0x0),
44 MFP_ADDR(GPIO103, 0x4),
45 MFP_ADDR(GPIO104, 0x1fc),
46 MFP_ADDR(GPIO105, 0x1f8),
47 MFP_ADDR(GPIO106, 0x1f4),
48 MFP_ADDR(GPIO107, 0x1f0),
49 MFP_ADDR(GPIO108, 0x21c),
50 MFP_ADDR(GPIO109, 0x218),
51 MFP_ADDR(GPIO110, 0x214),
52 MFP_ADDR(GPIO111, 0x200),
53 MFP_ADDR(GPIO112, 0x244),
54 MFP_ADDR(GPIO113, 0x25c),
55 MFP_ADDR(GPIO114, 0x164),
56 MFP_ADDR_X(GPIO115, GPIO122, 0x260),
57
58 MFP_ADDR(GPIO123, 0x148),
59 MFP_ADDR_X(GPIO124, GPIO141, 0xc),
60
61 MFP_ADDR(GPIO142, 0x8),
62 MFP_ADDR_X(GPIO143, GPIO151, 0x220),
63 MFP_ADDR_X(GPIO152, GPIO153, 0x248),
64 MFP_ADDR_X(GPIO154, GPIO155, 0x254),
65 MFP_ADDR_X(GPIO156, GPIO159, 0x14c),
66
67 MFP_ADDR(GPIO160, 0x250),
68 MFP_ADDR(GPIO161, 0x210),
69 MFP_ADDR(GPIO162, 0x20c),
70 MFP_ADDR(GPIO163, 0x208),
71 MFP_ADDR(GPIO164, 0x204),
72 MFP_ADDR(GPIO165, 0x1ec),
73 MFP_ADDR(GPIO166, 0x1e8),
74 MFP_ADDR(GPIO167, 0x1e4),
75 MFP_ADDR(GPIO168, 0x1e0),
76
77 MFP_ADDR_X(TWSI1_SCL, TWSI1_SDA, 0x140),
78 MFP_ADDR_X(TWSI4_SCL, TWSI4_SDA, 0x2bc),
79
35 MFP_ADDR(PMIC_INT, 0x2c4), 80 MFP_ADDR(PMIC_INT, 0x2c4),
81 MFP_ADDR(CLK_REQ, 0x160),
36 82
37 MFP_ADDR_END, 83 MFP_ADDR_END,
38}; 84};
@@ -99,9 +145,13 @@ static struct clk_lookup mmp2_clkregs[] = {
99static int __init mmp2_init(void) 145static int __init mmp2_init(void)
100{ 146{
101 if (cpu_is_mmp2()) { 147 if (cpu_is_mmp2()) {
148#ifdef CONFIG_CACHE_TAUROS2
149 tauros2_init();
150#endif
102 mfp_init_base(MFPR_VIRT_BASE); 151 mfp_init_base(MFPR_VIRT_BASE);
103 mfp_init_addr(mmp2_addr_map); 152 mfp_init_addr(mmp2_addr_map);
104 clks_register(ARRAY_AND_SIZE(mmp2_clkregs)); 153 pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
154 clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
105 } 155 }
106 156
107 return 0; 157 return 0;
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 1873c821df90..652ae660634c 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -72,6 +72,11 @@ static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
72static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000); 72static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
73static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000); 73static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
74static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000); 74static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
75static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
76static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
77static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
78static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
79static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
75 80
76static APMU_CLK(nand, NAND, 0x01db, 208000000); 81static APMU_CLK(nand, NAND, 0x01db, 208000000);
77 82
@@ -85,6 +90,11 @@ static struct clk_lookup pxa168_clkregs[] = {
85 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), 90 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
86 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), 91 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
87 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), 92 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
93 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
94 INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
95 INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
96 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
97 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
88 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 98 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
89}; 99};
90 100
@@ -132,3 +142,8 @@ PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
132PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); 142PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
133PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); 143PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
134PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); 144PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
145PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
146PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
147PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
148PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
149PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index f780086befd7..47264a76eeb3 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -1,7 +1,80 @@
1if ARCH_MSM 1if ARCH_MSM
2 2
3comment "MSM Board Type" 3choice
4 prompt "Qualcomm MSM SoC Type"
5 default ARCH_MSM7X00A
6
7config ARCH_MSM7X00A
8 bool "MSM7x00A / MSM7x01A"
9 select ARCH_MSM_ARM11
10 select MSM_SMD
11 select MSM_SMD_PKG3
12 select CPU_V6
13
14config ARCH_MSM7X30
15 bool "MSM7x30"
16 select ARCH_MSM_SCORPION
17 select MSM_SMD
18 select MSM_VIC
19 select CPU_V7
20 select MSM_REMOTE_SPINLOCK_DEKKERS
21
22config ARCH_QSD8X50
23 bool "QSD8X50"
24 select ARCH_MSM_SCORPION
25 select MSM_SMD
26 select MSM_VIC
27 select CPU_V7
28 select MSM_REMOTE_SPINLOCK_LDREX
29endchoice
30
31config MSM_SOC_REV_A
32 bool
33
34config ARCH_MSM_ARM11
35 bool
36config ARCH_MSM_SCORPION
37 bool
38
39config MSM_VIC
40 bool
41
42menu "Qualcomm MSM Board Type"
43
44config MACH_HALIBUT
4 depends on ARCH_MSM 45 depends on ARCH_MSM
46 depends on ARCH_MSM7X00A
47 bool "Halibut Board (QCT SURF7201A)"
48 help
49 Support for the Qualcomm SURF7201A eval board.
50
51config MACH_TROUT
52 depends on ARCH_MSM
53 depends on ARCH_MSM7X00A
54 bool "HTC Dream (aka trout)"
55 help
56 Support for the HTC Dream, T-Mobile G1, Android ADP1 devices.
57
58config MACH_MSM7X30_SURF
59 depends on ARCH_MSM7X30
60 bool "MSM7x30 SURF"
61 help
62 Support for the Qualcomm MSM7x30 SURF eval board.
63
64config MACH_QSD8X50_SURF
65 depends on ARCH_QSD8X50
66 bool "QSD8x50 SURF"
67 help
68 Support for the Qualcomm QSD8x50 SURF eval board.
69
70config MACH_QSD8X50A_ST1_5
71 depends on ARCH_QSD8X50
72 select MSM_SOC_REV_A
73 bool "QSD8x50A ST1.5"
74 help
75 Support for the Qualcomm ST1.5.
76
77endmenu
5 78
6config MSM_DEBUG_UART 79config MSM_DEBUG_UART
7 int 80 int
@@ -27,17 +100,10 @@ choice
27 bool "UART3" 100 bool "UART3"
28endchoice 101endchoice
29 102
30config MACH_HALIBUT 103config MSM_SMD_PKG3
31 depends on ARCH_MSM 104 bool
32 default y
33 bool "Halibut Board (QCT SURF7201A)"
34 help
35 Support for the Qualcomm SURF7201A eval board.
36 105
37config MACH_TROUT 106config MSM_SMD
38 default y 107 bool
39 bool "HTC Dream (aka trout)"
40 help
41 Support for the HTC Dream, T-Mobile G1, Android ADP1 devices.
42 108
43endif 109endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 91e6f5c95dc1..66677f0acaed 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -1,9 +1,22 @@
1obj-y += io.o idle.o irq.o timer.o dma.o
2obj-y += devices.o
3obj-y += proc_comm.o 1obj-y += proc_comm.o
2obj-y += io.o idle.o timer.o dma.o
4obj-y += vreg.o 3obj-y += vreg.o
5obj-y += clock.o clock-7x01a.o 4obj-y += acpuclock-arm11.o
5obj-y += clock.o clock-pcom.o
6obj-y += gpio.o
6 7
7obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o 8ifdef CONFIG_MSM_VIC
9obj-y += irq-vic.o
10else
11obj-y += irq.o
12endif
13
14obj-$(CONFIG_ARCH_QSD8X50) += sirc.o
15obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
16obj-$(CONFIG_MSM_SMD) += last_radio_log.o
17
18obj-$(CONFIG_MACH_TROUT) += board-trout.o devices-msm7x00.o
19obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o
20obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
21obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
8 22
9obj-$(CONFIG_MACH_TROUT) += board-dream.o
diff --git a/arch/arm/mach-msm/acpuclock-arm11.c b/arch/arm/mach-msm/acpuclock-arm11.c
new file mode 100644
index 000000000000..af5e85b91d02
--- /dev/null
+++ b/arch/arm/mach-msm/acpuclock-arm11.c
@@ -0,0 +1,526 @@
1/* arch/arm/mach-msm/acpuclock.c
2 *
3 * MSM architecture clock driver
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2007 QUALCOMM Incorporated
7 * Author: San Mehat <san@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/version.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/list.h>
24#include <linux/errno.h>
25#include <linux/string.h>
26#include <linux/delay.h>
27#include <linux/clk.h>
28#include <linux/cpufreq.h>
29#include <linux/mutex.h>
30#include <linux/io.h>
31#include <mach/board.h>
32#include <mach/msm_iomap.h>
33
34#include "proc_comm.h"
35#include "acpuclock.h"
36
37
38#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
39#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
40#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
41
42/*
43 * ARM11 clock configuration for specific ACPU speeds
44 */
45
46#define ACPU_PLL_TCXO -1
47#define ACPU_PLL_0 0
48#define ACPU_PLL_1 1
49#define ACPU_PLL_2 2
50#define ACPU_PLL_3 3
51
52#define PERF_SWITCH_DEBUG 0
53#define PERF_SWITCH_STEP_DEBUG 0
54
55struct clock_state
56{
57 struct clkctl_acpu_speed *current_speed;
58 struct mutex lock;
59 uint32_t acpu_switch_time_us;
60 uint32_t max_speed_delta_khz;
61 uint32_t vdd_switch_time_us;
62 unsigned long power_collapse_khz;
63 unsigned long wait_for_irq_khz;
64};
65
66static struct clk *ebi1_clk;
67static struct clock_state drv_state = { 0 };
68
69static void __init acpuclk_init(void);
70
71/* MSM7201A Levels 3-6 all correspond to 1.2V, level 7 corresponds to 1.325V. */
72enum {
73 VDD_0 = 0,
74 VDD_1 = 1,
75 VDD_2 = 2,
76 VDD_3 = 3,
77 VDD_4 = 3,
78 VDD_5 = 3,
79 VDD_6 = 3,
80 VDD_7 = 7,
81 VDD_END
82};
83
84struct clkctl_acpu_speed {
85 unsigned int a11clk_khz;
86 int pll;
87 unsigned int a11clk_src_sel;
88 unsigned int a11clk_src_div;
89 unsigned int ahbclk_khz;
90 unsigned int ahbclk_div;
91 int vdd;
92 unsigned int axiclk_khz;
93 unsigned long lpj; /* loops_per_jiffy */
94/* Index in acpu_freq_tbl[] for steppings. */
95 short down;
96 short up;
97};
98
99/*
100 * ACPU speed table. Complete table is shown but certain speeds are commented
101 * out to optimized speed switching. Initalize loops_per_jiffy to 0.
102 *
103 * Table stepping up/down is optimized for 256mhz jumps while staying on the
104 * same PLL.
105 */
106#if (0)
107static struct clkctl_acpu_speed acpu_freq_tbl[] = {
108 { 19200, ACPU_PLL_TCXO, 0, 0, 19200, 0, VDD_0, 30720, 0, 0, 8 },
109 { 61440, ACPU_PLL_0, 4, 3, 61440, 0, VDD_0, 30720, 0, 0, 8 },
110 { 81920, ACPU_PLL_0, 4, 2, 40960, 1, VDD_0, 61440, 0, 0, 8 },
111 { 96000, ACPU_PLL_1, 1, 7, 48000, 1, VDD_0, 61440, 0, 0, 9 },
112 { 122880, ACPU_PLL_0, 4, 1, 61440, 1, VDD_3, 61440, 0, 0, 8 },
113 { 128000, ACPU_PLL_1, 1, 5, 64000, 1, VDD_3, 61440, 0, 0, 12 },
114 { 176000, ACPU_PLL_2, 2, 5, 88000, 1, VDD_3, 61440, 0, 0, 11 },
115 { 192000, ACPU_PLL_1, 1, 3, 64000, 2, VDD_3, 61440, 0, 0, 12 },
116 { 245760, ACPU_PLL_0, 4, 0, 81920, 2, VDD_4, 61440, 0, 0, 12 },
117 { 256000, ACPU_PLL_1, 1, 2, 128000, 2, VDD_5, 128000, 0, 0, 12 },
118 { 264000, ACPU_PLL_2, 2, 3, 88000, 2, VDD_5, 128000, 0, 6, 13 },
119 { 352000, ACPU_PLL_2, 2, 2, 88000, 3, VDD_5, 128000, 0, 6, 13 },
120 { 384000, ACPU_PLL_1, 1, 1, 128000, 2, VDD_6, 128000, 0, 5, -1 },
121 { 528000, ACPU_PLL_2, 2, 1, 132000, 3, VDD_7, 128000, 0, 11, -1 },
122 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
123};
124#else /* Table of freq we currently use. */
125static struct clkctl_acpu_speed acpu_freq_tbl[] = {
126 { 19200, ACPU_PLL_TCXO, 0, 0, 19200, 0, VDD_0, 30720, 0, 0, 4 },
127 { 122880, ACPU_PLL_0, 4, 1, 61440, 1, VDD_3, 61440, 0, 0, 4 },
128 { 128000, ACPU_PLL_1, 1, 5, 64000, 1, VDD_3, 61440, 0, 0, 6 },
129 { 176000, ACPU_PLL_2, 2, 5, 88000, 1, VDD_3, 61440, 0, 0, 5 },
130 { 245760, ACPU_PLL_0, 4, 0, 81920, 2, VDD_4, 61440, 0, 0, 5 },
131 { 352000, ACPU_PLL_2, 2, 2, 88000, 3, VDD_5, 128000, 0, 3, 7 },
132 { 384000, ACPU_PLL_1, 1, 1, 128000, 2, VDD_6, 128000, 0, 2, -1 },
133 { 528000, ACPU_PLL_2, 2, 1, 132000, 3, VDD_7, 128000, 0, 5, -1 },
134 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
135};
136#endif
137
138
139#ifdef CONFIG_CPU_FREQ_TABLE
140static struct cpufreq_frequency_table freq_table[] = {
141 { 0, 122880 },
142 { 1, 128000 },
143 { 2, 245760 },
144 { 3, 384000 },
145 { 4, 528000 },
146 { 5, CPUFREQ_TABLE_END },
147};
148#endif
149
150static int pc_pll_request(unsigned id, unsigned on)
151{
152 int res;
153 on = !!on;
154
155#if PERF_SWITCH_DEBUG
156 if (on)
157 printk(KERN_DEBUG "Enabling PLL %d\n", id);
158 else
159 printk(KERN_DEBUG "Disabling PLL %d\n", id);
160#endif
161
162 res = msm_proc_comm(PCOM_CLKCTL_RPC_PLL_REQUEST, &id, &on);
163 if (res < 0)
164 return res;
165
166#if PERF_SWITCH_DEBUG
167 if (on)
168 printk(KERN_DEBUG "PLL %d enabled\n", id);
169 else
170 printk(KERN_DEBUG "PLL %d disabled\n", id);
171#endif
172 return res;
173}
174
175
176/*----------------------------------------------------------------------------
177 * ARM11 'owned' clock control
178 *---------------------------------------------------------------------------*/
179
180unsigned long acpuclk_power_collapse(void) {
181 int ret = acpuclk_get_rate();
182 ret *= 1000;
183 if (ret > drv_state.power_collapse_khz)
184 acpuclk_set_rate(drv_state.power_collapse_khz, 1);
185 return ret;
186}
187
188unsigned long acpuclk_get_wfi_rate(void)
189{
190 return drv_state.wait_for_irq_khz;
191}
192
193unsigned long acpuclk_wait_for_irq(void) {
194 int ret = acpuclk_get_rate();
195 ret *= 1000;
196 if (ret > drv_state.wait_for_irq_khz)
197 acpuclk_set_rate(drv_state.wait_for_irq_khz, 1);
198 return ret;
199}
200
201static int acpuclk_set_vdd_level(int vdd)
202{
203 uint32_t current_vdd;
204
205 current_vdd = readl(A11S_VDD_SVS_PLEVEL_ADDR) & 0x07;
206
207#if PERF_SWITCH_DEBUG
208 printk(KERN_DEBUG "acpuclock: Switching VDD from %u -> %d\n",
209 current_vdd, vdd);
210#endif
211 writel((1 << 7) | (vdd << 3), A11S_VDD_SVS_PLEVEL_ADDR);
212 udelay(drv_state.vdd_switch_time_us);
213 if ((readl(A11S_VDD_SVS_PLEVEL_ADDR) & 0x7) != vdd) {
214#if PERF_SWITCH_DEBUG
215 printk(KERN_ERR "acpuclock: VDD set failed\n");
216#endif
217 return -EIO;
218 }
219
220#if PERF_SWITCH_DEBUG
221 printk(KERN_DEBUG "acpuclock: VDD switched\n");
222#endif
223 return 0;
224}
225
226/* Set proper dividers for the given clock speed. */
227static void acpuclk_set_div(const struct clkctl_acpu_speed *hunt_s) {
228 uint32_t reg_clkctl, reg_clksel, clk_div;
229
230 /* AHB_CLK_DIV */
231 clk_div = (readl(A11S_CLK_SEL_ADDR) >> 1) & 0x03;
232 /*
233 * If the new clock divider is higher than the previous, then
234 * program the divider before switching the clock
235 */
236 if (hunt_s->ahbclk_div > clk_div) {
237 reg_clksel = readl(A11S_CLK_SEL_ADDR);
238 reg_clksel &= ~(0x3 << 1);
239 reg_clksel |= (hunt_s->ahbclk_div << 1);
240 writel(reg_clksel, A11S_CLK_SEL_ADDR);
241 }
242 if ((readl(A11S_CLK_SEL_ADDR) & 0x01) == 0) {
243 /* SRC0 */
244
245 /* Program clock source */
246 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
247 reg_clkctl &= ~(0x07 << 4);
248 reg_clkctl |= (hunt_s->a11clk_src_sel << 4);
249 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
250
251 /* Program clock divider */
252 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
253 reg_clkctl &= ~0xf;
254 reg_clkctl |= hunt_s->a11clk_src_div;
255 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
256
257 /* Program clock source selection */
258 reg_clksel = readl(A11S_CLK_SEL_ADDR);
259 reg_clksel |= 1; /* CLK_SEL_SRC1NO == SRC1 */
260 writel(reg_clksel, A11S_CLK_SEL_ADDR);
261 } else {
262 /* SRC1 */
263
264 /* Program clock source */
265 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
266 reg_clkctl &= ~(0x07 << 12);
267 reg_clkctl |= (hunt_s->a11clk_src_sel << 12);
268 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
269
270 /* Program clock divider */
271 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
272 reg_clkctl &= ~(0xf << 8);
273 reg_clkctl |= (hunt_s->a11clk_src_div << 8);
274 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
275
276 /* Program clock source selection */
277 reg_clksel = readl(A11S_CLK_SEL_ADDR);
278 reg_clksel &= ~1; /* CLK_SEL_SRC1NO == SRC0 */
279 writel(reg_clksel, A11S_CLK_SEL_ADDR);
280 }
281
282 /*
283 * If the new clock divider is lower than the previous, then
284 * program the divider after switching the clock
285 */
286 if (hunt_s->ahbclk_div < clk_div) {
287 reg_clksel = readl(A11S_CLK_SEL_ADDR);
288 reg_clksel &= ~(0x3 << 1);
289 reg_clksel |= (hunt_s->ahbclk_div << 1);
290 writel(reg_clksel, A11S_CLK_SEL_ADDR);
291 }
292}
293
294int acpuclk_set_rate(unsigned long rate, int for_power_collapse)
295{
296 uint32_t reg_clkctl;
297 struct clkctl_acpu_speed *cur_s, *tgt_s, *strt_s;
298 int rc = 0;
299 unsigned int plls_enabled = 0, pll;
300
301 strt_s = cur_s = drv_state.current_speed;
302
303 WARN_ONCE(cur_s == NULL, "acpuclk_set_rate: not initialized\n");
304 if (cur_s == NULL)
305 return -ENOENT;
306
307 if (rate == (cur_s->a11clk_khz * 1000))
308 return 0;
309
310 for (tgt_s = acpu_freq_tbl; tgt_s->a11clk_khz != 0; tgt_s++) {
311 if (tgt_s->a11clk_khz == (rate / 1000))
312 break;
313 }
314
315 if (tgt_s->a11clk_khz == 0)
316 return -EINVAL;
317
318 /* Choose the highest speed speed at or below 'rate' with same PLL. */
319 if (for_power_collapse && tgt_s->a11clk_khz < cur_s->a11clk_khz) {
320 while (tgt_s->pll != ACPU_PLL_TCXO && tgt_s->pll != cur_s->pll)
321 tgt_s--;
322 }
323
324 if (strt_s->pll != ACPU_PLL_TCXO)
325 plls_enabled |= 1 << strt_s->pll;
326
327 if (!for_power_collapse) {
328 mutex_lock(&drv_state.lock);
329 if (strt_s->pll != tgt_s->pll && tgt_s->pll != ACPU_PLL_TCXO) {
330 rc = pc_pll_request(tgt_s->pll, 1);
331 if (rc < 0) {
332 pr_err("PLL%d enable failed (%d)\n",
333 tgt_s->pll, rc);
334 goto out;
335 }
336 plls_enabled |= 1 << tgt_s->pll;
337 }
338 /* Increase VDD if needed. */
339 if (tgt_s->vdd > cur_s->vdd) {
340 if ((rc = acpuclk_set_vdd_level(tgt_s->vdd)) < 0) {
341 printk(KERN_ERR "Unable to switch ACPU vdd\n");
342 goto out;
343 }
344 }
345 }
346
347 /* Set wait states for CPU inbetween frequency changes */
348 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
349 reg_clkctl |= (100 << 16); /* set WT_ST_CNT */
350 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
351
352#if PERF_SWITCH_DEBUG
353 printk(KERN_INFO "acpuclock: Switching from ACPU rate %u -> %u\n",
354 strt_s->a11clk_khz * 1000, tgt_s->a11clk_khz * 1000);
355#endif
356
357 while (cur_s != tgt_s) {
358 /*
359 * Always jump to target freq if within 256mhz, regulardless of
360 * PLL. If differnece is greater, use the predefinied
361 * steppings in the table.
362 */
363 int d = abs((int)(cur_s->a11clk_khz - tgt_s->a11clk_khz));
364 if (d > drv_state.max_speed_delta_khz) {
365 /* Step up or down depending on target vs current. */
366 int clk_index = tgt_s->a11clk_khz > cur_s->a11clk_khz ?
367 cur_s->up : cur_s->down;
368 if (clk_index < 0) { /* This should not happen. */
369 printk(KERN_ERR "cur:%u target: %u\n",
370 cur_s->a11clk_khz, tgt_s->a11clk_khz);
371 rc = -EINVAL;
372 goto out;
373 }
374 cur_s = &acpu_freq_tbl[clk_index];
375 } else {
376 cur_s = tgt_s;
377 }
378#if PERF_SWITCH_STEP_DEBUG
379 printk(KERN_DEBUG "%s: STEP khz = %u, pll = %d\n",
380 __FUNCTION__, cur_s->a11clk_khz, cur_s->pll);
381#endif
382 if (!for_power_collapse&& cur_s->pll != ACPU_PLL_TCXO
383 && !(plls_enabled & (1 << cur_s->pll))) {
384 rc = pc_pll_request(cur_s->pll, 1);
385 if (rc < 0) {
386 pr_err("PLL%d enable failed (%d)\n",
387 cur_s->pll, rc);
388 goto out;
389 }
390 plls_enabled |= 1 << cur_s->pll;
391 }
392
393 acpuclk_set_div(cur_s);
394 drv_state.current_speed = cur_s;
395 /* Re-adjust lpj for the new clock speed. */
396 loops_per_jiffy = cur_s->lpj;
397 udelay(drv_state.acpu_switch_time_us);
398 }
399
400 /* Nothing else to do for power collapse. */
401 if (for_power_collapse)
402 return 0;
403
404 /* Disable PLLs we are not using anymore. */
405 plls_enabled &= ~(1 << tgt_s->pll);
406 for (pll = ACPU_PLL_0; pll <= ACPU_PLL_2; pll++)
407 if (plls_enabled & (1 << pll)) {
408 rc = pc_pll_request(pll, 0);
409 if (rc < 0) {
410 pr_err("PLL%d disable failed (%d)\n", pll, rc);
411 goto out;
412 }
413 }
414
415 /* Change the AXI bus frequency if we can. */
416 if (strt_s->axiclk_khz != tgt_s->axiclk_khz) {
417 rc = clk_set_rate(ebi1_clk, tgt_s->axiclk_khz * 1000);
418 if (rc < 0)
419 pr_err("Setting AXI min rate failed!\n");
420 }
421
422 /* Drop VDD level if we can. */
423 if (tgt_s->vdd < strt_s->vdd) {
424 if (acpuclk_set_vdd_level(tgt_s->vdd) < 0)
425 printk(KERN_ERR "acpuclock: Unable to drop ACPU vdd\n");
426 }
427
428#if PERF_SWITCH_DEBUG
429 printk(KERN_DEBUG "%s: ACPU speed change complete\n", __FUNCTION__);
430#endif
431out:
432 if (!for_power_collapse)
433 mutex_unlock(&drv_state.lock);
434 return rc;
435}
436
437static void __init acpuclk_init(void)
438{
439 struct clkctl_acpu_speed *speed;
440 uint32_t div, sel;
441 int rc;
442
443 /*
444 * Determine the rate of ACPU clock
445 */
446
447 if (!(readl(A11S_CLK_SEL_ADDR) & 0x01)) { /* CLK_SEL_SRC1N0 */
448 /* CLK_SRC0_SEL */
449 sel = (readl(A11S_CLK_CNTL_ADDR) >> 12) & 0x7;
450 /* CLK_SRC0_DIV */
451 div = (readl(A11S_CLK_CNTL_ADDR) >> 8) & 0x0f;
452 } else {
453 /* CLK_SRC1_SEL */
454 sel = (readl(A11S_CLK_CNTL_ADDR) >> 4) & 0x07;
455 /* CLK_SRC1_DIV */
456 div = readl(A11S_CLK_CNTL_ADDR) & 0x0f;
457 }
458
459 for (speed = acpu_freq_tbl; speed->a11clk_khz != 0; speed++) {
460 if (speed->a11clk_src_sel == sel
461 && (speed->a11clk_src_div == div))
462 break;
463 }
464 if (speed->a11clk_khz == 0) {
465 printk(KERN_WARNING "Warning - ACPU clock reports invalid speed\n");
466 return;
467 }
468
469 drv_state.current_speed = speed;
470
471 rc = clk_set_rate(ebi1_clk, speed->axiclk_khz * 1000);
472 if (rc < 0)
473 pr_err("Setting AXI min rate failed!\n");
474
475 printk(KERN_INFO "ACPU running at %d KHz\n", speed->a11clk_khz);
476}
477
478unsigned long acpuclk_get_rate(void)
479{
480 WARN_ONCE(drv_state.current_speed == NULL,
481 "acpuclk_get_rate: not initialized\n");
482 if (drv_state.current_speed)
483 return drv_state.current_speed->a11clk_khz;
484 else
485 return 0;
486}
487
488uint32_t acpuclk_get_switch_time(void)
489{
490 return drv_state.acpu_switch_time_us;
491}
492
493/*----------------------------------------------------------------------------
494 * Clock driver initialization
495 *---------------------------------------------------------------------------*/
496
497/* Initalize the lpj field in the acpu_freq_tbl. */
498static void __init lpj_init(void)
499{
500 int i;
501 const struct clkctl_acpu_speed *base_clk = drv_state.current_speed;
502 for (i = 0; acpu_freq_tbl[i].a11clk_khz; i++) {
503 acpu_freq_tbl[i].lpj = cpufreq_scale(loops_per_jiffy,
504 base_clk->a11clk_khz,
505 acpu_freq_tbl[i].a11clk_khz);
506 }
507}
508
509void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *clkdata)
510{
511 pr_info("acpu_clock_init()\n");
512
513 ebi1_clk = clk_get(NULL, "ebi1_clk");
514
515 mutex_init(&drv_state.lock);
516 drv_state.acpu_switch_time_us = clkdata->acpu_switch_time_us;
517 drv_state.max_speed_delta_khz = clkdata->max_speed_delta_khz;
518 drv_state.vdd_switch_time_us = clkdata->vdd_switch_time_us;
519 drv_state.power_collapse_khz = clkdata->power_collapse_khz;
520 drv_state.wait_for_irq_khz = clkdata->wait_for_irq_khz;
521 acpuclk_init();
522 lpj_init();
523#ifdef CONFIG_CPU_FREQ_TABLE
524 cpufreq_frequency_table_get_attr(freq_table, smp_processor_id());
525#endif
526}
diff --git a/arch/arm/mach-msm/acpuclock.h b/arch/arm/mach-msm/acpuclock.h
new file mode 100644
index 000000000000..415de2eb9a5e
--- /dev/null
+++ b/arch/arm/mach-msm/acpuclock.h
@@ -0,0 +1,32 @@
1/* arch/arm/mach-msm/acpuclock.h
2 *
3 * MSM architecture clock driver header
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2007 QUALCOMM Incorporated
7 * Author: San Mehat <san@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#ifndef __ARCH_ARM_MACH_MSM_ACPUCLOCK_H
21#define __ARCH_ARM_MACH_MSM_ACPUCLOCK_H
22
23int acpuclk_set_rate(unsigned long rate, int for_power_collapse);
24unsigned long acpuclk_get_rate(void);
25uint32_t acpuclk_get_switch_time(void);
26unsigned long acpuclk_wait_for_irq(void);
27unsigned long acpuclk_power_collapse(void);
28unsigned long acpuclk_get_wfi_rate(void);
29
30
31#endif
32
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index e61967dde9a1..7bd72e8f127e 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -26,6 +26,7 @@
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28#include <asm/mach/flash.h> 28#include <asm/mach/flash.h>
29#include <asm/setup.h>
29 30
30#include <mach/irqs.h> 31#include <mach/irqs.h>
31#include <mach/board.h> 32#include <mach/board.h>
@@ -77,14 +78,28 @@ static void __init halibut_init(void)
77 platform_add_devices(devices, ARRAY_SIZE(devices)); 78 platform_add_devices(devices, ARRAY_SIZE(devices));
78} 79}
79 80
81static void __init halibut_fixup(struct machine_desc *desc, struct tag *tags,
82 char **cmdline, struct meminfo *mi)
83{
84 mi->nr_banks=1;
85 mi->bank[0].start = PHYS_OFFSET;
86 mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
87 mi->bank[0].size = (101*1024*1024);
88}
89
80static void __init halibut_map_io(void) 90static void __init halibut_map_io(void)
81{ 91{
82 msm_map_common_io(); 92 msm_map_common_io();
83 msm_clock_init(); 93 msm_clock_init(msm_clocks_7x01a, msm_num_clocks_7x01a);
84} 94}
85 95
86MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") 96MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
97#ifdef CONFIG_MSM_DEBUG_UART
98 .phys_io = MSM_DEBUG_UART_PHYS,
99 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
100#endif
87 .boot_params = 0x10000100, 101 .boot_params = 0x10000100,
102 .fixup = halibut_fixup,
88 .map_io = halibut_map_io, 103 .map_io = halibut_map_io,
89 .init_irq = halibut_init_irq, 104 .init_irq = halibut_init_irq,
90 .init_machine = halibut_init, 105 .init_machine = halibut_init,
diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c
new file mode 100644
index 000000000000..bcbefdfe7b5e
--- /dev/null
+++ b/arch/arm/mach-msm/board-mahimahi.c
@@ -0,0 +1,87 @@
1/* linux/arch/arm/mach-msm/board-mahimahi.c
2 *
3 * Copyright (C) 2009 Google, Inc.
4 * Copyright (C) 2009 HTC Corporation.
5 * Author: Dima Zavin <dima@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/delay.h>
19#include <linux/gpio.h>
20#include <linux/init.h>
21#include <linux/input.h>
22#include <linux/io.h>
23#include <linux/kernel.h>
24#include <linux/platform_device.h>
25
26#include <asm/mach-types.h>
27#include <asm/mach/arch.h>
28#include <asm/mach/map.h>
29#include <asm/setup.h>
30
31#include <mach/board.h>
32#include <mach/hardware.h>
33#include <mach/system.h>
34
35#include "board-mahimahi.h"
36#include "devices.h"
37#include "proc_comm.h"
38
39static uint debug_uart;
40
41module_param_named(debug_uart, debug_uart, uint, 0);
42
43static struct platform_device *devices[] __initdata = {
44#if !defined(CONFIG_MSM_SERIAL_DEBUGGER)
45 &msm_device_uart1,
46#endif
47 &msm_device_uart_dm1,
48 &msm_device_nand,
49};
50
51static void __init mahimahi_init(void)
52{
53 platform_add_devices(devices, ARRAY_SIZE(devices));
54}
55
56static void __init mahimahi_fixup(struct machine_desc *desc, struct tag *tags,
57 char **cmdline, struct meminfo *mi)
58{
59 mi->nr_banks = 2;
60 mi->bank[0].start = PHYS_OFFSET;
61 mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
62 mi->bank[0].size = (219*1024*1024);
63 mi->bank[1].start = MSM_HIGHMEM_BASE;
64 mi->bank[1].node = PHYS_TO_NID(MSM_HIGHMEM_BASE);
65 mi->bank[1].size = MSM_HIGHMEM_SIZE;
66}
67
68static void __init mahimahi_map_io(void)
69{
70 msm_map_common_io();
71 msm_clock_init();
72}
73
74extern struct sys_timer msm_timer;
75
76MACHINE_START(MAHIMAHI, "mahimahi")
77#ifdef CONFIG_MSM_DEBUG_UART
78 .phys_io = MSM_DEBUG_UART_PHYS,
79 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
80#endif
81 .boot_params = 0x20000100,
82 .fixup = mahimahi_fixup,
83 .map_io = mahimahi_map_io,
84 .init_irq = msm_init_irq,
85 .init_machine = mahimahi_init,
86 .timer = &msm_timer,
87MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c
new file mode 100644
index 000000000000..cccb9f3c9d01
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm7x27.c
@@ -0,0 +1,179 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/input.h>
21#include <linux/io.h>
22#include <linux/delay.h>
23#include <linux/bootmem.h>
24#include <linux/power_supply.h>
25
26#include <mach/hardware.h>
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/flash.h>
31#include <asm/setup.h>
32#ifdef CONFIG_CACHE_L2X0
33#include <asm/hardware/cache-l2x0.h>
34#endif
35
36#include <mach/vreg.h>
37#include <mach/mpp.h>
38#include <mach/gpio.h>
39#include <mach/board.h>
40#include <mach/msm_iomap.h>
41
42#include <linux/mtd/nand.h>
43#include <linux/mtd/partitions.h>
44
45#include "devices.h"
46#include "socinfo.h"
47#include "clock.h"
48
49static struct resource smc91x_resources[] = {
50 [0] = {
51 .start = 0x9C004300,
52 .end = 0x9C0043ff,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = MSM_GPIO_TO_INT(132),
57 .end = MSM_GPIO_TO_INT(132),
58 .flags = IORESOURCE_IRQ,
59 },
60};
61
62static struct platform_device smc91x_device = {
63 .name = "smc91x",
64 .id = 0,
65 .num_resources = ARRAY_SIZE(smc91x_resources),
66 .resource = smc91x_resources,
67};
68
69static struct platform_device *devices[] __initdata = {
70 &msm_device_uart3,
71 &msm_device_smd,
72 &msm_device_dmov,
73 &msm_device_nand,
74 &smc91x_device,
75};
76
77extern struct sys_timer msm_timer;
78
79static void __init msm7x2x_init_irq(void)
80{
81 msm_init_irq();
82}
83
84static void __init msm7x2x_init(void)
85{
86 if (socinfo_init() < 0)
87 BUG();
88
89 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
90 smc91x_resources[0].start = 0x98000300;
91 smc91x_resources[0].end = 0x980003ff;
92 smc91x_resources[1].start = MSM_GPIO_TO_INT(85);
93 smc91x_resources[1].end = MSM_GPIO_TO_INT(85);
94 if (gpio_tlmm_config(GPIO_CFG(85, 0,
95 GPIO_INPUT,
96 GPIO_PULL_DOWN,
97 GPIO_2MA),
98 GPIO_ENABLE)) {
99 printk(KERN_ERR
100 "%s: Err: Config GPIO-85 INT\n",
101 __func__);
102 }
103 }
104
105 platform_add_devices(devices, ARRAY_SIZE(devices));
106}
107
108static void __init msm7x2x_map_io(void)
109{
110 msm_map_common_io();
111 /* Technically dependent on the SoC but using machine_is
112 * macros since socinfo is not available this early and there
113 * are plans to restructure the code which will eliminate the
114 * need for socinfo.
115 */
116 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa())
117 msm_clock_init(msm_clocks_7x27, msm_num_clocks_7x27);
118
119 if (machine_is_msm7x25_surf() || machine_is_msm7x25_ffa())
120 msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25);
121
122#ifdef CONFIG_CACHE_L2X0
123 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
124 /* 7x27 has 256KB L2 cache:
125 64Kb/Way and 4-Way Associativity;
126 R/W latency: 3 cycles;
127 evmon/parity/share disabled. */
128 l2x0_init(MSM_L2CC_BASE, 0x00068012, 0xfe000000);
129 }
130#endif
131}
132
133MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
134#ifdef CONFIG_MSM_DEBUG_UART
135 .phys_io = MSM_DEBUG_UART_PHYS,
136 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
137#endif
138 .boot_params = PHYS_OFFSET + 0x100,
139 .map_io = msm7x2x_map_io,
140 .init_irq = msm7x2x_init_irq,
141 .init_machine = msm7x2x_init,
142 .timer = &msm_timer,
143MACHINE_END
144
145MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
146#ifdef CONFIG_MSM_DEBUG_UART
147 .phys_io = MSM_DEBUG_UART_PHYS,
148 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
149#endif
150 .boot_params = PHYS_OFFSET + 0x100,
151 .map_io = msm7x2x_map_io,
152 .init_irq = msm7x2x_init_irq,
153 .init_machine = msm7x2x_init,
154 .timer = &msm_timer,
155MACHINE_END
156
157MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
158#ifdef CONFIG_MSM_DEBUG_UART
159 .phys_io = MSM_DEBUG_UART_PHYS,
160 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
161#endif
162 .boot_params = PHYS_OFFSET + 0x100,
163 .map_io = msm7x2x_map_io,
164 .init_irq = msm7x2x_init_irq,
165 .init_machine = msm7x2x_init,
166 .timer = &msm_timer,
167MACHINE_END
168
169MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
170#ifdef CONFIG_MSM_DEBUG_UART
171 .phys_io = MSM_DEBUG_UART_PHYS,
172 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
173#endif
174 .boot_params = PHYS_OFFSET + 0x100,
175 .map_io = msm7x2x_map_io,
176 .init_irq = msm7x2x_init_irq,
177 .init_machine = msm7x2x_init,
178 .timer = &msm_timer,
179MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
new file mode 100644
index 000000000000..bac1f3c38a3b
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -0,0 +1,120 @@
1/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 */
17
18#include <linux/kernel.h>
19#include <linux/irq.h>
20#include <linux/gpio.h>
21#include <linux/platform_device.h>
22#include <linux/delay.h>
23#include <linux/bootmem.h>
24#include <linux/io.h>
25#include <linux/smsc911x.h>
26
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/setup.h>
30
31#include <mach/gpio.h>
32#include <mach/board.h>
33#include <mach/memory.h>
34#include <mach/msm_iomap.h>
35#include <mach/dma.h>
36
37#include <mach/vreg.h>
38#include "devices.h"
39#include "proc_comm.h"
40
41extern struct sys_timer msm_timer;
42
43#ifdef CONFIG_SERIAL_MSM_CONSOLE
44static struct msm_gpio uart2_config_data[] = {
45 { GPIO_CFG(49, 2, GPIO_OUTPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_RFR"},
46 { GPIO_CFG(50, 2, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_CTS"},
47 { GPIO_CFG(51, 2, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_Rx"},
48 { GPIO_CFG(52, 2, GPIO_OUTPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_Tx"},
49};
50
51static void msm7x30_init_uart2(void)
52{
53 msm_gpios_request_enable(uart2_config_data,
54 ARRAY_SIZE(uart2_config_data));
55
56}
57#endif
58
59static struct platform_device *devices[] __initdata = {
60#if defined(CONFIG_SERIAL_MSM) || defined(CONFIG_MSM_SERIAL_DEBUGGER)
61 &msm_device_uart2,
62#endif
63
64};
65
66static void __init msm7x30_init_irq(void)
67{
68 msm_init_irq();
69}
70
71static void __init msm7x30_init(void)
72{
73 platform_add_devices(devices, ARRAY_SIZE(devices));
74#ifdef CONFIG_SERIAL_MSM_CONSOLE
75 msm7x30_init_uart2();
76#endif
77
78}
79
80static void __init msm7x30_map_io(void)
81{
82 msm_map_msm7x30_io();
83 msm_clock_init(msm_clocks_7x30, msm_num_clocks_7x30);
84}
85
86MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
87#ifdef CONFIG_MSM_DEBUG_UART
88 .phys_io = MSM_DEBUG_UART_PHYS,
89 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
90#endif
91 .boot_params = PHYS_OFFSET + 0x100,
92 .map_io = msm7x30_map_io,
93 .init_irq = msm7x30_init_irq,
94 .init_machine = msm7x30_init,
95 .timer = &msm_timer,
96MACHINE_END
97
98MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
99#ifdef CONFIG_MSM_DEBUG_UART
100 .phys_io = MSM_DEBUG_UART_PHYS,
101 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
102#endif
103 .boot_params = PHYS_OFFSET + 0x100,
104 .map_io = msm7x30_map_io,
105 .init_irq = msm7x30_init_irq,
106 .init_machine = msm7x30_init,
107 .timer = &msm_timer,
108MACHINE_END
109
110MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
111#ifdef CONFIG_MSM_DEBUG_UART
112 .phys_io = MSM_DEBUG_UART_PHYS,
113 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
114#endif
115 .boot_params = PHYS_OFFSET + 0x100,
116 .map_io = msm7x30_map_io,
117 .init_irq = msm7x30_init_irq,
118 .init_machine = msm7x30_init,
119 .timer = &msm_timer,
120MACHINE_END
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
new file mode 100644
index 000000000000..ec4606643d2c
--- /dev/null
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -0,0 +1,94 @@
1/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 */
17
18#include <linux/kernel.h>
19#include <linux/irq.h>
20#include <linux/gpio.h>
21#include <linux/platform_device.h>
22#include <linux/bootmem.h>
23#include <linux/delay.h>
24
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <asm/io.h>
28#include <asm/setup.h>
29
30#include <mach/board.h>
31#include <mach/irqs.h>
32#include <mach/sirc.h>
33#include <mach/gpio.h>
34
35#include "devices.h"
36
37extern struct sys_timer msm_timer;
38
39static struct msm_gpio uart3_config_data[] = {
40 { GPIO_CFG(86, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_Rx"},
41 { GPIO_CFG(87, 1, GPIO_OUTPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_Tx"},
42};
43
44static struct platform_device *devices[] __initdata = {
45 &msm_device_uart3,
46};
47
48static void msm8x50_init_uart3(void)
49{
50 msm_gpios_request_enable(uart3_config_data,
51 ARRAY_SIZE(uart3_config_data));
52}
53
54static void __init qsd8x50_map_io(void)
55{
56 msm_map_qsd8x50_io();
57 msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50);
58}
59
60static void __init qsd8x50_init_irq(void)
61{
62 msm_init_irq();
63 msm_init_sirc();
64}
65
66static void __init qsd8x50_init(void)
67{
68 msm8x50_init_uart3();
69 platform_add_devices(devices, ARRAY_SIZE(devices));
70}
71
72MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
73#ifdef CONFIG_MSM_DEBUG_UART
74 .phys_io = MSM_DEBUG_UART_PHYS,
75 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
76#endif
77 .boot_params = PHYS_OFFSET + 0x100,
78 .map_io = qsd8x50_map_io,
79 .init_irq = qsd8x50_init_irq,
80 .init_machine = qsd8x50_init,
81 .timer = &msm_timer,
82MACHINE_END
83
84MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
85#ifdef CONFIG_MSM_DEBUG_UART
86 .phys_io = MSM_DEBUG_UART_PHYS,
87 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
88#endif
89 .boot_params = PHYS_OFFSET + 0x100,
90 .map_io = qsd8x50_map_io,
91 .init_irq = qsd8x50_init_irq,
92 .init_machine = qsd8x50_init,
93 .timer = &msm_timer,
94MACHINE_END
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
new file mode 100644
index 000000000000..2bc1b9d5623e
--- /dev/null
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -0,0 +1,118 @@
1/* linux/arch/arm/mach-msm/board-sapphire.c
2 * Copyright (C) 2007-2009 HTC Corporation.
3 * Author: Thomas Tsai <thomas_tsai@htc.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13*/
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/input.h>
19#include <linux/interrupt.h>
20#include <linux/irq.h>
21#include <linux/sysdev.h>
22
23#include <linux/delay.h>
24
25#include <asm/gpio.h>
26#include <mach/hardware.h>
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/flash.h>
31#include <asm/system.h>
32#include <mach/system.h>
33#include <mach/vreg.h>
34#include <mach/board.h>
35
36#include <asm/io.h>
37#include <asm/delay.h>
38#include <asm/setup.h>
39
40#include <linux/mtd/nand.h>
41#include <linux/mtd/partitions.h>
42
43#include "gpio_chip.h"
44#include "board-sapphire.h"
45#include "proc_comm.h"
46#include "devices.h"
47
48void msm_init_irq(void);
49void msm_init_gpio(void);
50
51static struct platform_device *devices[] __initdata = {
52 &msm_device_smd,
53 &msm_device_dmov,
54 &msm_device_nand,
55 &msm_device_uart1,
56 &msm_device_uart3,
57};
58
59extern struct sys_timer msm_timer;
60
61static void __init sapphire_init_irq(void)
62{
63 msm_init_irq();
64}
65
66static void __init sapphire_init(void)
67{
68 platform_add_devices(devices, ARRAY_SIZE(devices));
69}
70
71static struct map_desc sapphire_io_desc[] __initdata = {
72 {
73 .virtual = SAPPHIRE_CPLD_BASE,
74 .pfn = __phys_to_pfn(SAPPHIRE_CPLD_START),
75 .length = SAPPHIRE_CPLD_SIZE,
76 .type = MT_DEVICE_NONSHARED
77 }
78};
79
80static void __init sapphire_fixup(struct machine_desc *desc, struct tag *tags,
81 char **cmdline, struct meminfo *mi)
82{
83 int smi_sz = parse_tag_smi((const struct tag *)tags);
84
85 mi->nr_banks = 1;
86 mi->bank[0].start = PHYS_OFFSET;
87 mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
88 if (smi_sz == 32) {
89 mi->bank[0].size = (84*1024*1024);
90 } else if (smi_sz == 64) {
91 mi->bank[0].size = (101*1024*1024);
92 } else {
93 /* Give a default value when not get smi size */
94 smi_sz = 64;
95 mi->bank[0].size = (101*1024*1024);
96 }
97}
98
99static void __init sapphire_map_io(void)
100{
101 msm_map_common_io();
102 iotable_init(sapphire_io_desc, ARRAY_SIZE(sapphire_io_desc));
103 msm_clock_init();
104}
105
106MACHINE_START(SAPPHIRE, "sapphire")
107/* Maintainer: Brian Swetland <swetland@google.com> */
108#ifdef CONFIG_MSM_DEBUG_UART
109 .phys_io = MSM_DEBUG_UART_PHYS,
110 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
111#endif
112 .boot_params = PHYS_OFFSET + 0x100,
113 .fixup = sapphire_fixup,
114 .map_io = sapphire_map_io,
115 .init_irq = sapphire_init_irq,
116 .init_machine = sapphire_init,
117 .timer = &msm_timer,
118MACHINE_END
diff --git a/arch/arm/mach-msm/board-dream.c b/arch/arm/mach-msm/board-trout.c
index 21afa8513168..dca5a5f062dc 100644
--- a/arch/arm/mach-msm/board-dream.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-msm/board-dream.c 1/* linux/arch/arm/mach-msm/board-trout.c
2 * 2 *
3 * Copyright (C) 2009 Google, Inc. 3 * Copyright (C) 2009 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com> 4 * Author: Brian Swetland <swetland@google.com>
@@ -28,7 +28,7 @@
28#include <mach/msm_iomap.h> 28#include <mach/msm_iomap.h>
29 29
30#include "devices.h" 30#include "devices.h"
31#include "board-dream.h" 31#include "board-trout.h"
32 32
33static struct platform_device *devices[] __initdata = { 33static struct platform_device *devices[] __initdata = {
34 &msm_device_uart3, 34 &msm_device_uart3,
@@ -78,12 +78,14 @@ static void __init trout_map_io(void)
78 writeb(0x80, TROUT_CPLD_BASE + 0x00); 78 writeb(0x80, TROUT_CPLD_BASE + 0x00);
79#endif 79#endif
80 80
81 msm_clock_init(); 81 msm_clock_init(msm_clocks_7x01a, msm_num_clocks_7x01a);
82} 82}
83 83
84MACHINE_START(TROUT, "HTC Dream") 84MACHINE_START(TROUT, "HTC Dream")
85#ifdef CONFIG_MSM_DEBUG_UART
85 .phys_io = MSM_DEBUG_UART_PHYS, 86 .phys_io = MSM_DEBUG_UART_PHYS,
86 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, 87 .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
88#endif
87 .boot_params = 0x10000100, 89 .boot_params = 0x10000100,
88 .fixup = trout_fixup, 90 .fixup = trout_fixup,
89 .map_io = trout_map_io, 91 .map_io = trout_map_io,
diff --git a/arch/arm/mach-msm/board-dream.h b/arch/arm/mach-msm/board-trout.h
index 4f345a5a0a61..4f345a5a0a61 100644
--- a/arch/arm/mach-msm/board-dream.h
+++ b/arch/arm/mach-msm/board-trout.h
diff --git a/arch/arm/mach-msm/clock-7x01a.c b/arch/arm/mach-msm/clock-7x01a.c
deleted file mode 100644
index 62230a3428ee..000000000000
--- a/arch/arm/mach-msm/clock-7x01a.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/* arch/arm/mach-msm/clock-7x01a.c
2 *
3 * Clock tables for MSM7X01A
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2007 QUALCOMM Incorporated
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21
22#include "clock.h"
23#include "devices.h"
24
25/* clock IDs used by the modem processor */
26
27#define ACPU_CLK 0 /* Applications processor clock */
28#define ADM_CLK 1 /* Applications data mover clock */
29#define ADSP_CLK 2 /* ADSP clock */
30#define EBI1_CLK 3 /* External bus interface 1 clock */
31#define EBI2_CLK 4 /* External bus interface 2 clock */
32#define ECODEC_CLK 5 /* External CODEC clock */
33#define EMDH_CLK 6 /* External MDDI host clock */
34#define GP_CLK 7 /* General purpose clock */
35#define GRP_CLK 8 /* Graphics clock */
36#define I2C_CLK 9 /* I2C clock */
37#define ICODEC_RX_CLK 10 /* Internal CODEX RX clock */
38#define ICODEC_TX_CLK 11 /* Internal CODEX TX clock */
39#define IMEM_CLK 12 /* Internal graphics memory clock */
40#define MDC_CLK 13 /* MDDI client clock */
41#define MDP_CLK 14 /* Mobile display processor clock */
42#define PBUS_CLK 15 /* Peripheral bus clock */
43#define PCM_CLK 16 /* PCM clock */
44#define PMDH_CLK 17 /* Primary MDDI host clock */
45#define SDAC_CLK 18 /* Stereo DAC clock */
46#define SDC1_CLK 19 /* Secure Digital Card clocks */
47#define SDC1_PCLK 20
48#define SDC2_CLK 21
49#define SDC2_PCLK 22
50#define SDC3_CLK 23
51#define SDC3_PCLK 24
52#define SDC4_CLK 25
53#define SDC4_PCLK 26
54#define TSIF_CLK 27 /* Transport Stream Interface clocks */
55#define TSIF_REF_CLK 28
56#define TV_DAC_CLK 29 /* TV clocks */
57#define TV_ENC_CLK 30
58#define UART1_CLK 31 /* UART clocks */
59#define UART2_CLK 32
60#define UART3_CLK 33
61#define UART1DM_CLK 34
62#define UART2DM_CLK 35
63#define USB_HS_CLK 36 /* High speed USB core clock */
64#define USB_HS_PCLK 37 /* High speed USB pbus clock */
65#define USB_OTG_CLK 38 /* Full speed USB clock */
66#define VDC_CLK 39 /* Video controller clock */
67#define VFE_CLK 40 /* Camera / Video Front End clock */
68#define VFE_MDC_CLK 41 /* VFE MDDI client clock */
69
70#define NR_CLKS 42
71
72#define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \
73 .name = clk_name, \
74 .id = clk_id, \
75 .flags = clk_flags, \
76 .dev = clk_dev, \
77 }
78
79#define OFF CLKFLAG_AUTO_OFF
80#define MINMAX CLKFLAG_USE_MIN_MAX_TO_SET
81
82struct clk msm_clocks[] = {
83 CLOCK("adm_clk", ADM_CLK, NULL, 0),
84 CLOCK("adsp_clk", ADSP_CLK, NULL, 0),
85 CLOCK("ebi1_clk", EBI1_CLK, NULL, 0),
86 CLOCK("ebi2_clk", EBI2_CLK, NULL, 0),
87 CLOCK("ecodec_clk", ECODEC_CLK, NULL, 0),
88 CLOCK("emdh_clk", EMDH_CLK, NULL, OFF),
89 CLOCK("gp_clk", GP_CLK, NULL, 0),
90 CLOCK("grp_clk", GRP_CLK, NULL, OFF),
91 CLOCK("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
92 CLOCK("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
93 CLOCK("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
94 CLOCK("imem_clk", IMEM_CLK, NULL, OFF),
95 CLOCK("mdc_clk", MDC_CLK, NULL, 0),
96 CLOCK("mdp_clk", MDP_CLK, NULL, OFF),
97 CLOCK("pbus_clk", PBUS_CLK, NULL, 0),
98 CLOCK("pcm_clk", PCM_CLK, NULL, 0),
99 CLOCK("pmdh_clk", PMDH_CLK, NULL, OFF | MINMAX),
100 CLOCK("sdac_clk", SDAC_CLK, NULL, OFF),
101 CLOCK("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
102 CLOCK("sdc_pclk", SDC1_PCLK, &msm_device_sdc1.dev, OFF),
103 CLOCK("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
104 CLOCK("sdc_pclk", SDC2_PCLK, &msm_device_sdc2.dev, OFF),
105 CLOCK("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
106 CLOCK("sdc_pclk", SDC3_PCLK, &msm_device_sdc3.dev, OFF),
107 CLOCK("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
108 CLOCK("sdc_pclk", SDC4_PCLK, &msm_device_sdc4.dev, OFF),
109 CLOCK("tsif_clk", TSIF_CLK, NULL, 0),
110 CLOCK("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
111 CLOCK("tv_dac_clk", TV_DAC_CLK, NULL, 0),
112 CLOCK("tv_enc_clk", TV_ENC_CLK, NULL, 0),
113 CLOCK("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
114 CLOCK("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
115 CLOCK("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
116 CLOCK("uart1dm_clk", UART1DM_CLK, NULL, OFF),
117 CLOCK("uart2dm_clk", UART2DM_CLK, NULL, 0),
118 CLOCK("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
119 CLOCK("usb_hs_pclk", USB_HS_PCLK, &msm_device_hsusb.dev, OFF),
120 CLOCK("usb_otg_clk", USB_OTG_CLK, NULL, 0),
121 CLOCK("vdc_clk", VDC_CLK, NULL, OFF | MINMAX),
122 CLOCK("vfe_clk", VFE_CLK, NULL, OFF),
123 CLOCK("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
124};
125
126unsigned msm_num_clocks = ARRAY_SIZE(msm_clocks);
diff --git a/arch/arm/mach-msm/clock-7x30.h b/arch/arm/mach-msm/clock-7x30.h
new file mode 100644
index 000000000000..e16f72f32829
--- /dev/null
+++ b/arch/arm/mach-msm/clock-7x30.h
@@ -0,0 +1,168 @@
1/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#ifndef __ARCH_ARM_MACH_MSM_CLOCK_7X30_H
31#define __ARCH_ARM_MACH_MSM_CLOCK_7X30_H
32
33enum {
34 L_7X30_NONE_CLK = -1,
35 L_7X30_ADM_CLK,
36 L_7X30_I2C_CLK,
37 L_7X30_I2C_2_CLK,
38 L_7X30_QUP_I2C_CLK,
39 L_7X30_UART1DM_CLK,
40 L_7X30_UART1DM_P_CLK,
41 L_7X30_UART2DM_CLK,
42 L_7X30_UART2DM_P_CLK,
43 L_7X30_EMDH_CLK,
44 L_7X30_EMDH_P_CLK,
45 L_7X30_PMDH_CLK,
46 L_7X30_PMDH_P_CLK,
47 L_7X30_GRP_2D_CLK,
48 L_7X30_GRP_2D_P_CLK,
49 L_7X30_GRP_3D_SRC_CLK,
50 L_7X30_GRP_3D_CLK,
51 L_7X30_GRP_3D_P_CLK,
52 L_7X30_IMEM_CLK,
53 L_7X30_SDC1_CLK,
54 L_7X30_SDC1_P_CLK,
55 L_7X30_SDC2_CLK,
56 L_7X30_SDC2_P_CLK,
57 L_7X30_SDC3_CLK,
58 L_7X30_SDC3_P_CLK,
59 L_7X30_SDC4_CLK,
60 L_7X30_SDC4_P_CLK,
61 L_7X30_MDP_CLK,
62 L_7X30_MDP_P_CLK,
63 L_7X30_MDP_LCDC_PCLK_CLK,
64 L_7X30_MDP_LCDC_PAD_PCLK_CLK,
65 L_7X30_MDP_VSYNC_CLK,
66 L_7X30_MI2S_CODEC_RX_M_CLK,
67 L_7X30_MI2S_CODEC_RX_S_CLK,
68 L_7X30_MI2S_CODEC_TX_M_CLK,
69 L_7X30_MI2S_CODEC_TX_S_CLK,
70 L_7X30_MI2S_M_CLK,
71 L_7X30_MI2S_S_CLK,
72 L_7X30_LPA_CODEC_CLK,
73 L_7X30_LPA_CORE_CLK,
74 L_7X30_LPA_P_CLK,
75 L_7X30_MIDI_CLK,
76 L_7X30_MDC_CLK,
77 L_7X30_ROTATOR_IMEM_CLK,
78 L_7X30_ROTATOR_P_CLK,
79 L_7X30_SDAC_M_CLK,
80 L_7X30_SDAC_CLK,
81 L_7X30_UART1_CLK,
82 L_7X30_UART2_CLK,
83 L_7X30_UART3_CLK,
84 L_7X30_TV_CLK,
85 L_7X30_TV_DAC_CLK,
86 L_7X30_TV_ENC_CLK,
87 L_7X30_HDMI_CLK,
88 L_7X30_TSIF_REF_CLK,
89 L_7X30_TSIF_P_CLK,
90 L_7X30_USB_HS_SRC_CLK,
91 L_7X30_USB_HS_CLK,
92 L_7X30_USB_HS_CORE_CLK,
93 L_7X30_USB_HS_P_CLK,
94 L_7X30_USB_HS2_CLK,
95 L_7X30_USB_HS2_CORE_CLK,
96 L_7X30_USB_HS2_P_CLK,
97 L_7X30_USB_HS3_CLK,
98 L_7X30_USB_HS3_CORE_CLK,
99 L_7X30_USB_HS3_P_CLK,
100 L_7X30_VFE_CLK,
101 L_7X30_VFE_P_CLK,
102 L_7X30_VFE_MDC_CLK,
103 L_7X30_VFE_CAMIF_CLK,
104 L_7X30_CAMIF_PAD_P_CLK,
105 L_7X30_CAM_M_CLK,
106 L_7X30_JPEG_CLK,
107 L_7X30_JPEG_P_CLK,
108 L_7X30_VPE_CLK,
109 L_7X30_MFC_CLK,
110 L_7X30_MFC_DIV2_CLK,
111 L_7X30_MFC_P_CLK,
112 L_7X30_SPI_CLK,
113 L_7X30_SPI_P_CLK,
114 L_7X30_CSI0_CLK,
115 L_7X30_CSI0_VFE_CLK,
116 L_7X30_CSI0_P_CLK,
117 L_7X30_CSI1_CLK,
118 L_7X30_CSI1_VFE_CLK,
119 L_7X30_CSI1_P_CLK,
120 L_7X30_GLBL_ROOT_CLK,
121
122 L_7X30_AXI_LI_VG_CLK,
123 L_7X30_AXI_LI_GRP_CLK,
124 L_7X30_AXI_LI_JPEG_CLK,
125 L_7X30_AXI_GRP_2D_CLK,
126 L_7X30_AXI_MFC_CLK,
127 L_7X30_AXI_VPE_CLK,
128 L_7X30_AXI_LI_VFE_CLK,
129 L_7X30_AXI_LI_APPS_CLK,
130 L_7X30_AXI_MDP_CLK,
131 L_7X30_AXI_IMEM_CLK,
132 L_7X30_AXI_LI_ADSP_A_CLK,
133 L_7X30_AXI_ROTATOR_CLK,
134
135 L_7X30_NR_CLKS
136};
137
138struct clk_ops;
139extern struct clk_ops clk_ops_7x30;
140
141struct clk_ops *clk_7x30_is_local(uint32_t id);
142int clk_7x30_init(void);
143
144void pll_enable(uint32_t pll);
145void pll_disable(uint32_t pll);
146
147extern int internal_pwr_rail_ctl_auto(unsigned rail_id, bool enable);
148
149#define CLK_7X30(clk_name, clk_id, clk_dev, clk_flags) { \
150 .name = clk_name, \
151 .id = L_7X30_##clk_id, \
152 .remote_id = P_##clk_id, \
153 .flags = clk_flags, \
154 .dev = clk_dev, \
155 .dbg_name = #clk_id, \
156 }
157
158#define CLK_7X30S(clk_name, l_id, r_id, clk_dev, clk_flags) { \
159 .name = clk_name, \
160 .id = L_7X30_##l_id, \
161 .remote_id = P_##r_id, \
162 .flags = clk_flags, \
163 .dev = clk_dev, \
164 .dbg_name = #l_id, \
165 }
166
167#endif
168
diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c
new file mode 100644
index 000000000000..a3b45627eb4a
--- /dev/null
+++ b/arch/arm/mach-msm/clock-pcom.c
@@ -0,0 +1,131 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/err.h>
17#include <linux/ctype.h>
18#include <linux/stddef.h>
19#include <mach/clk.h>
20
21#include "proc_comm.h"
22#include "clock.h"
23
24/*
25 * glue for the proc_comm interface
26 */
27int pc_clk_enable(unsigned id)
28{
29 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL);
30 if (rc < 0)
31 return rc;
32 else
33 return (int)id < 0 ? -EINVAL : 0;
34}
35
36void pc_clk_disable(unsigned id)
37{
38 msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL);
39}
40
41int pc_clk_reset(unsigned id, enum clk_reset_action action)
42{
43 int rc;
44
45 if (action == CLK_RESET_ASSERT)
46 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_ASSERT, &id, NULL);
47 else
48 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_DEASSERT, &id, NULL);
49
50 if (rc < 0)
51 return rc;
52 else
53 return (int)id < 0 ? -EINVAL : 0;
54}
55
56int pc_clk_set_rate(unsigned id, unsigned rate)
57{
58 /* The rate _might_ be rounded off to the nearest KHz value by the
59 * remote function. So a return value of 0 doesn't necessarily mean
60 * that the exact rate was set successfully.
61 */
62 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate);
63 if (rc < 0)
64 return rc;
65 else
66 return (int)id < 0 ? -EINVAL : 0;
67}
68
69int pc_clk_set_min_rate(unsigned id, unsigned rate)
70{
71 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate);
72 if (rc < 0)
73 return rc;
74 else
75 return (int)id < 0 ? -EINVAL : 0;
76}
77
78int pc_clk_set_max_rate(unsigned id, unsigned rate)
79{
80 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate);
81 if (rc < 0)
82 return rc;
83 else
84 return (int)id < 0 ? -EINVAL : 0;
85}
86
87int pc_clk_set_flags(unsigned id, unsigned flags)
88{
89 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags);
90 if (rc < 0)
91 return rc;
92 else
93 return (int)id < 0 ? -EINVAL : 0;
94}
95
96unsigned pc_clk_get_rate(unsigned id)
97{
98 if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL))
99 return 0;
100 else
101 return id;
102}
103
104unsigned pc_clk_is_enabled(unsigned id)
105{
106 if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL))
107 return 0;
108 else
109 return id;
110}
111
112long pc_clk_round_rate(unsigned id, unsigned rate)
113{
114
115 /* Not really supported; pc_clk_set_rate() does rounding on it's own. */
116 return rate;
117}
118
119struct clk_ops clk_ops_pcom = {
120 .enable = pc_clk_enable,
121 .disable = pc_clk_disable,
122 .auto_off = pc_clk_disable,
123 .reset = pc_clk_reset,
124 .set_rate = pc_clk_set_rate,
125 .set_min_rate = pc_clk_set_min_rate,
126 .set_max_rate = pc_clk_set_max_rate,
127 .set_flags = pc_clk_set_flags,
128 .get_rate = pc_clk_get_rate,
129 .is_enabled = pc_clk_is_enabled,
130 .round_rate = pc_clk_round_rate,
131};
diff --git a/arch/arm/mach-msm/clock-pcom.h b/arch/arm/mach-msm/clock-pcom.h
new file mode 100644
index 000000000000..17d027b23501
--- /dev/null
+++ b/arch/arm/mach-msm/clock-pcom.h
@@ -0,0 +1,153 @@
1/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#ifndef __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H
31#define __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H
32
33/* clock IDs used by the modem processor */
34
35#define P_ACPU_CLK 0 /* Applications processor clock */
36#define P_ADM_CLK 1 /* Applications data mover clock */
37#define P_ADSP_CLK 2 /* ADSP clock */
38#define P_EBI1_CLK 3 /* External bus interface 1 clock */
39#define P_EBI2_CLK 4 /* External bus interface 2 clock */
40#define P_ECODEC_CLK 5 /* External CODEC clock */
41#define P_EMDH_CLK 6 /* External MDDI host clock */
42#define P_GP_CLK 7 /* General purpose clock */
43#define P_GRP_3D_CLK 8 /* Graphics clock */
44#define P_I2C_CLK 9 /* I2C clock */
45#define P_ICODEC_RX_CLK 10 /* Internal CODEX RX clock */
46#define P_ICODEC_TX_CLK 11 /* Internal CODEX TX clock */
47#define P_IMEM_CLK 12 /* Internal graphics memory clock */
48#define P_MDC_CLK 13 /* MDDI client clock */
49#define P_MDP_CLK 14 /* Mobile display processor clock */
50#define P_PBUS_CLK 15 /* Peripheral bus clock */
51#define P_PCM_CLK 16 /* PCM clock */
52#define P_PMDH_CLK 17 /* Primary MDDI host clock */
53#define P_SDAC_CLK 18 /* Stereo DAC clock */
54#define P_SDC1_CLK 19 /* Secure Digital Card clocks */
55#define P_SDC1_P_CLK 20
56#define P_SDC2_CLK 21
57#define P_SDC2_P_CLK 22
58#define P_SDC3_CLK 23
59#define P_SDC3_P_CLK 24
60#define P_SDC4_CLK 25
61#define P_SDC4_P_CLK 26
62#define P_TSIF_CLK 27 /* Transport Stream Interface clocks */
63#define P_TSIF_REF_CLK 28
64#define P_TV_DAC_CLK 29 /* TV clocks */
65#define P_TV_ENC_CLK 30
66#define P_UART1_CLK 31 /* UART clocks */
67#define P_UART2_CLK 32
68#define P_UART3_CLK 33
69#define P_UART1DM_CLK 34
70#define P_UART2DM_CLK 35
71#define P_USB_HS_CLK 36 /* High speed USB core clock */
72#define P_USB_HS_P_CLK 37 /* High speed USB pbus clock */
73#define P_USB_OTG_CLK 38 /* Full speed USB clock */
74#define P_VDC_CLK 39 /* Video controller clock */
75#define P_VFE_MDC_CLK 40 /* Camera / Video Front End clock */
76#define P_VFE_CLK 41 /* VFE MDDI client clock */
77#define P_MDP_LCDC_PCLK_CLK 42
78#define P_MDP_LCDC_PAD_PCLK_CLK 43
79#define P_MDP_VSYNC_CLK 44
80#define P_SPI_CLK 45
81#define P_VFE_AXI_CLK 46
82#define P_USB_HS2_CLK 47 /* High speed USB 2 core clock */
83#define P_USB_HS2_P_CLK 48 /* High speed USB 2 pbus clock */
84#define P_USB_HS3_CLK 49 /* High speed USB 3 core clock */
85#define P_USB_HS3_P_CLK 50 /* High speed USB 3 pbus clock */
86#define P_GRP_3D_P_CLK 51 /* Graphics pbus clock */
87#define P_USB_PHY_CLK 52 /* USB PHY clock */
88#define P_USB_HS_CORE_CLK 53 /* High speed USB 1 core clock */
89#define P_USB_HS2_CORE_CLK 54 /* High speed USB 2 core clock */
90#define P_USB_HS3_CORE_CLK 55 /* High speed USB 3 core clock */
91#define P_CAM_M_CLK 56
92#define P_CAMIF_PAD_P_CLK 57
93#define P_GRP_2D_CLK 58
94#define P_GRP_2D_P_CLK 59
95#define P_I2S_CLK 60
96#define P_JPEG_CLK 61
97#define P_JPEG_P_CLK 62
98#define P_LPA_CODEC_CLK 63
99#define P_LPA_CORE_CLK 64
100#define P_LPA_P_CLK 65
101#define P_MDC_IO_CLK 66
102#define P_MDC_P_CLK 67
103#define P_MFC_CLK 68
104#define P_MFC_DIV2_CLK 69
105#define P_MFC_P_CLK 70
106#define P_QUP_I2C_CLK 71
107#define P_ROTATOR_IMEM_CLK 72
108#define P_ROTATOR_P_CLK 73
109#define P_VFE_CAMIF_CLK 74
110#define P_VFE_P_CLK 75
111#define P_VPE_CLK 76
112#define P_I2C_2_CLK 77
113#define P_MI2S_CODEC_RX_S_CLK 78
114#define P_MI2S_CODEC_RX_M_CLK 79
115#define P_MI2S_CODEC_TX_S_CLK 80
116#define P_MI2S_CODEC_TX_M_CLK 81
117#define P_PMDH_P_CLK 82
118#define P_EMDH_P_CLK 83
119#define P_SPI_P_CLK 84
120#define P_TSIF_P_CLK 85
121#define P_MDP_P_CLK 86
122#define P_SDAC_M_CLK 87
123#define P_MI2S_S_CLK 88
124#define P_MI2S_M_CLK 89
125#define P_AXI_ROTATOR_CLK 90
126#define P_HDMI_CLK 91
127#define P_CSI0_CLK 92
128#define P_CSI0_VFE_CLK 93
129#define P_CSI0_P_CLK 94
130#define P_CSI1_CLK 95
131#define P_CSI1_VFE_CLK 96
132#define P_CSI1_P_CLK 97
133#define P_GSBI_CLK 98
134#define P_GSBI_P_CLK 99
135
136#define P_NR_CLKS 100
137
138struct clk_ops;
139extern struct clk_ops clk_ops_pcom;
140
141int pc_clk_reset(unsigned id, enum clk_reset_action action);
142
143#define CLK_PCOM(clk_name, clk_id, clk_dev, clk_flags) { \
144 .name = clk_name, \
145 .id = P_##clk_id, \
146 .remote_id = P_##clk_id, \
147 .ops = &clk_ops_pcom, \
148 .flags = clk_flags, \
149 .dev = clk_dev, \
150 .dbg_name = #clk_id, \
151 }
152
153#endif
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
index 3b1ce36f1032..9cb1276ab749 100644
--- a/arch/arm/mach-msm/clock.c
+++ b/arch/arm/mach-msm/clock.c
@@ -1,7 +1,7 @@
1/* arch/arm/mach-msm/clock.c 1/* arch/arm/mach-msm/clock.c
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated 4 * Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
5 * 5 *
6 * This software is licensed under the terms of the GNU General Public 6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 7 * License version 2, as published by the Free Software Foundation, and
@@ -22,68 +22,27 @@
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/spinlock.h> 24#include <linux/spinlock.h>
25#include <linux/debugfs.h>
26#include <linux/ctype.h>
27#include <linux/pm_qos_params.h>
28#include <mach/clk.h>
25 29
26#include "clock.h" 30#include "clock.h"
27#include "proc_comm.h" 31#include "proc_comm.h"
32#include "clock-7x30.h"
28 33
29static DEFINE_MUTEX(clocks_mutex); 34static DEFINE_MUTEX(clocks_mutex);
30static DEFINE_SPINLOCK(clocks_lock); 35static DEFINE_SPINLOCK(clocks_lock);
31static LIST_HEAD(clocks); 36static LIST_HEAD(clocks);
37struct clk *msm_clocks;
38unsigned msm_num_clocks;
32 39
33/* 40/*
34 * glue for the proc_comm interface 41 * Bitmap of enabled clocks, excluding ACPU which is always
42 * enabled
35 */ 43 */
36static inline int pc_clk_enable(unsigned id) 44static DECLARE_BITMAP(clock_map_enabled, NR_CLKS);
37{ 45static DEFINE_SPINLOCK(clock_map_lock);
38 return msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL);
39}
40
41static inline void pc_clk_disable(unsigned id)
42{
43 msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL);
44}
45
46static inline int pc_clk_set_rate(unsigned id, unsigned rate)
47{
48 return msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate);
49}
50
51static inline int pc_clk_set_min_rate(unsigned id, unsigned rate)
52{
53 return msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate);
54}
55
56static inline int pc_clk_set_max_rate(unsigned id, unsigned rate)
57{
58 return msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate);
59}
60
61static inline int pc_clk_set_flags(unsigned id, unsigned flags)
62{
63 return msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags);
64}
65
66static inline unsigned pc_clk_get_rate(unsigned id)
67{
68 if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL))
69 return 0;
70 else
71 return id;
72}
73
74static inline unsigned pc_clk_is_enabled(unsigned id)
75{
76 if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL))
77 return 0;
78 else
79 return id;
80}
81
82static inline int pc_pll_request(unsigned id, unsigned on)
83{
84 on = !!on;
85 return msm_proc_comm(PCOM_CLKCTL_RPC_PLL_REQUEST, &id, &on);
86}
87 46
88/* 47/*
89 * Standard clock functions defined in include/linux/clk.h 48 * Standard clock functions defined in include/linux/clk.h
@@ -119,8 +78,12 @@ int clk_enable(struct clk *clk)
119 unsigned long flags; 78 unsigned long flags;
120 spin_lock_irqsave(&clocks_lock, flags); 79 spin_lock_irqsave(&clocks_lock, flags);
121 clk->count++; 80 clk->count++;
122 if (clk->count == 1) 81 if (clk->count == 1) {
123 pc_clk_enable(clk->id); 82 clk->ops->enable(clk->id);
83 spin_lock(&clock_map_lock);
84 clock_map_enabled[BIT_WORD(clk->id)] |= BIT_MASK(clk->id);
85 spin_unlock(&clock_map_lock);
86 }
124 spin_unlock_irqrestore(&clocks_lock, flags); 87 spin_unlock_irqrestore(&clocks_lock, flags);
125 return 0; 88 return 0;
126} 89}
@@ -132,31 +95,54 @@ void clk_disable(struct clk *clk)
132 spin_lock_irqsave(&clocks_lock, flags); 95 spin_lock_irqsave(&clocks_lock, flags);
133 BUG_ON(clk->count == 0); 96 BUG_ON(clk->count == 0);
134 clk->count--; 97 clk->count--;
135 if (clk->count == 0) 98 if (clk->count == 0) {
136 pc_clk_disable(clk->id); 99 clk->ops->disable(clk->id);
100 spin_lock(&clock_map_lock);
101 clock_map_enabled[BIT_WORD(clk->id)] &= ~BIT_MASK(clk->id);
102 spin_unlock(&clock_map_lock);
103 }
137 spin_unlock_irqrestore(&clocks_lock, flags); 104 spin_unlock_irqrestore(&clocks_lock, flags);
138} 105}
139EXPORT_SYMBOL(clk_disable); 106EXPORT_SYMBOL(clk_disable);
140 107
108int clk_reset(struct clk *clk, enum clk_reset_action action)
109{
110 if (!clk->ops->reset)
111 clk->ops->reset = &pc_clk_reset;
112 return clk->ops->reset(clk->remote_id, action);
113}
114EXPORT_SYMBOL(clk_reset);
115
141unsigned long clk_get_rate(struct clk *clk) 116unsigned long clk_get_rate(struct clk *clk)
142{ 117{
143 return pc_clk_get_rate(clk->id); 118 return clk->ops->get_rate(clk->id);
144} 119}
145EXPORT_SYMBOL(clk_get_rate); 120EXPORT_SYMBOL(clk_get_rate);
146 121
147int clk_set_rate(struct clk *clk, unsigned long rate) 122int clk_set_rate(struct clk *clk, unsigned long rate)
148{ 123{
149 int ret; 124 return clk->ops->set_rate(clk->id, rate);
150 if (clk->flags & CLKFLAG_USE_MIN_MAX_TO_SET) {
151 ret = pc_clk_set_max_rate(clk->id, rate);
152 if (ret)
153 return ret;
154 return pc_clk_set_min_rate(clk->id, rate);
155 }
156 return pc_clk_set_rate(clk->id, rate);
157} 125}
158EXPORT_SYMBOL(clk_set_rate); 126EXPORT_SYMBOL(clk_set_rate);
159 127
128long clk_round_rate(struct clk *clk, unsigned long rate)
129{
130 return clk->ops->round_rate(clk->id, rate);
131}
132EXPORT_SYMBOL(clk_round_rate);
133
134int clk_set_min_rate(struct clk *clk, unsigned long rate)
135{
136 return clk->ops->set_min_rate(clk->id, rate);
137}
138EXPORT_SYMBOL(clk_set_min_rate);
139
140int clk_set_max_rate(struct clk *clk, unsigned long rate)
141{
142 return clk->ops->set_max_rate(clk->id, rate);
143}
144EXPORT_SYMBOL(clk_set_max_rate);
145
160int clk_set_parent(struct clk *clk, struct clk *parent) 146int clk_set_parent(struct clk *clk, struct clk *parent)
161{ 147{
162 return -ENOSYS; 148 return -ENOSYS;
@@ -173,22 +159,153 @@ int clk_set_flags(struct clk *clk, unsigned long flags)
173{ 159{
174 if (clk == NULL || IS_ERR(clk)) 160 if (clk == NULL || IS_ERR(clk))
175 return -EINVAL; 161 return -EINVAL;
176 return pc_clk_set_flags(clk->id, flags); 162 return clk->ops->set_flags(clk->id, flags);
177} 163}
178EXPORT_SYMBOL(clk_set_flags); 164EXPORT_SYMBOL(clk_set_flags);
179 165
166/* EBI1 is the only shared clock that several clients want to vote on as of
167 * this commit. If this changes in the future, then it might be better to
168 * make clk_min_rate handle the voting or make ebi1_clk_set_min_rate more
169 * generic to support different clocks.
170 */
171static struct clk *ebi1_clk;
180 172
181void __init msm_clock_init(void) 173static void __init set_clock_ops(struct clk *clk)
174{
175 if (!clk->ops) {
176 clk->ops = &clk_ops_pcom;
177 clk->id = clk->remote_id;
178 }
179}
180
181void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks)
182{ 182{
183 unsigned n; 183 unsigned n;
184 184
185 spin_lock_init(&clocks_lock); 185 spin_lock_init(&clocks_lock);
186 mutex_lock(&clocks_mutex); 186 mutex_lock(&clocks_mutex);
187 for (n = 0; n < msm_num_clocks; n++) 187 msm_clocks = clock_tbl;
188 msm_num_clocks = num_clocks;
189 for (n = 0; n < msm_num_clocks; n++) {
190 set_clock_ops(&msm_clocks[n]);
188 list_add_tail(&msm_clocks[n].list, &clocks); 191 list_add_tail(&msm_clocks[n].list, &clocks);
192 }
189 mutex_unlock(&clocks_mutex); 193 mutex_unlock(&clocks_mutex);
194
195 ebi1_clk = clk_get(NULL, "ebi1_clk");
196 BUG_ON(ebi1_clk == NULL);
197
198}
199
200#if defined(CONFIG_DEBUG_FS)
201static struct clk *msm_clock_get_nth(unsigned index)
202{
203 if (index < msm_num_clocks)
204 return msm_clocks + index;
205 else
206 return 0;
207}
208
209static int clock_debug_rate_set(void *data, u64 val)
210{
211 struct clk *clock = data;
212 int ret;
213
214 /* Only increases to max rate will succeed, but that's actually good
215 * for debugging purposes. So we don't check for error. */
216 if (clock->flags & CLK_MAX)
217 clk_set_max_rate(clock, val);
218 if (clock->flags & CLK_MIN)
219 ret = clk_set_min_rate(clock, val);
220 else
221 ret = clk_set_rate(clock, val);
222 if (ret != 0)
223 printk(KERN_ERR "clk_set%s_rate failed (%d)\n",
224 (clock->flags & CLK_MIN) ? "_min" : "", ret);
225 return ret;
226}
227
228static int clock_debug_rate_get(void *data, u64 *val)
229{
230 struct clk *clock = data;
231 *val = clk_get_rate(clock);
232 return 0;
233}
234
235static int clock_debug_enable_set(void *data, u64 val)
236{
237 struct clk *clock = data;
238 int rc = 0;
239
240 if (val)
241 rc = clock->ops->enable(clock->id);
242 else
243 clock->ops->disable(clock->id);
244
245 return rc;
190} 246}
191 247
248static int clock_debug_enable_get(void *data, u64 *val)
249{
250 struct clk *clock = data;
251
252 *val = clock->ops->is_enabled(clock->id);
253
254 return 0;
255}
256
257static int clock_debug_local_get(void *data, u64 *val)
258{
259 struct clk *clock = data;
260
261 *val = clock->ops != &clk_ops_pcom;
262
263 return 0;
264}
265
266DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_debug_rate_get,
267 clock_debug_rate_set, "%llu\n");
268DEFINE_SIMPLE_ATTRIBUTE(clock_enable_fops, clock_debug_enable_get,
269 clock_debug_enable_set, "%llu\n");
270DEFINE_SIMPLE_ATTRIBUTE(clock_local_fops, clock_debug_local_get,
271 NULL, "%llu\n");
272
273static int __init clock_debug_init(void)
274{
275 struct dentry *dent_rate, *dent_enable, *dent_local;
276 struct clk *clock;
277 unsigned n = 0;
278 char temp[50], *ptr;
279
280 dent_rate = debugfs_create_dir("clk_rate", 0);
281 if (IS_ERR(dent_rate))
282 return PTR_ERR(dent_rate);
283
284 dent_enable = debugfs_create_dir("clk_enable", 0);
285 if (IS_ERR(dent_enable))
286 return PTR_ERR(dent_enable);
287
288 dent_local = debugfs_create_dir("clk_local", NULL);
289 if (IS_ERR(dent_local))
290 return PTR_ERR(dent_local);
291
292 while ((clock = msm_clock_get_nth(n++)) != 0) {
293 strncpy(temp, clock->dbg_name, ARRAY_SIZE(temp)-1);
294 for (ptr = temp; *ptr; ptr++)
295 *ptr = tolower(*ptr);
296 debugfs_create_file(temp, 0644, dent_rate,
297 clock, &clock_rate_fops);
298 debugfs_create_file(temp, 0644, dent_enable,
299 clock, &clock_enable_fops);
300 debugfs_create_file(temp, S_IRUGO, dent_local,
301 clock, &clock_local_fops);
302 }
303 return 0;
304}
305
306device_initcall(clock_debug_init);
307#endif
308
192/* The bootloader and/or AMSS may have left various clocks enabled. 309/* The bootloader and/or AMSS may have left various clocks enabled.
193 * Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have 310 * Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have
194 * not been explicitly enabled by a clk_enable() call. 311 * not been explicitly enabled by a clk_enable() call.
@@ -205,7 +322,7 @@ static int __init clock_late_init(void)
205 spin_lock_irqsave(&clocks_lock, flags); 322 spin_lock_irqsave(&clocks_lock, flags);
206 if (!clk->count) { 323 if (!clk->count) {
207 count++; 324 count++;
208 pc_clk_disable(clk->id); 325 clk->ops->auto_off(clk->id);
209 } 326 }
210 spin_unlock_irqrestore(&clocks_lock, flags); 327 spin_unlock_irqrestore(&clocks_lock, flags);
211 } 328 }
@@ -216,3 +333,4 @@ static int __init clock_late_init(void)
216} 333}
217 334
218late_initcall(clock_late_init); 335late_initcall(clock_late_init);
336
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
index f875e1544e5f..c270b552ed13 100644
--- a/arch/arm/mach-msm/clock.h
+++ b/arch/arm/mach-msm/clock.h
@@ -1,7 +1,7 @@
1/* arch/arm/mach-msm/clock.h 1/* arch/arm/mach-msm/clock.h
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated 4 * Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
5 * 5 *
6 * This software is licensed under the terms of the GNU General Public 6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 7 * License version 2, as published by the Free Software Foundation, and
@@ -18,6 +18,10 @@
18#define __ARCH_ARM_MACH_MSM_CLOCK_H 18#define __ARCH_ARM_MACH_MSM_CLOCK_H
19 19
20#include <linux/list.h> 20#include <linux/list.h>
21#include <mach/clk.h>
22
23#include "clock-pcom.h"
24#include "clock-7x30.h"
21 25
22#define CLKFLAG_INVERT 0x00000001 26#define CLKFLAG_INVERT 0x00000001
23#define CLKFLAG_NOINVERT 0x00000002 27#define CLKFLAG_NOINVERT 0x00000002
@@ -25,14 +29,32 @@
25#define CLKFLAG_NORESET 0x00000008 29#define CLKFLAG_NORESET 0x00000008
26 30
27#define CLK_FIRST_AVAILABLE_FLAG 0x00000100 31#define CLK_FIRST_AVAILABLE_FLAG 0x00000100
28#define CLKFLAG_USE_MIN_MAX_TO_SET 0x00000200 32#define CLKFLAG_AUTO_OFF 0x00000200
29#define CLKFLAG_AUTO_OFF 0x00000400 33#define CLKFLAG_MIN 0x00000400
34#define CLKFLAG_MAX 0x00000800
35
36struct clk_ops {
37 int (*enable)(unsigned id);
38 void (*disable)(unsigned id);
39 void (*auto_off)(unsigned id);
40 int (*reset)(unsigned id, enum clk_reset_action action);
41 int (*set_rate)(unsigned id, unsigned rate);
42 int (*set_min_rate)(unsigned id, unsigned rate);
43 int (*set_max_rate)(unsigned id, unsigned rate);
44 int (*set_flags)(unsigned id, unsigned flags);
45 unsigned (*get_rate)(unsigned id);
46 unsigned (*is_enabled)(unsigned id);
47 long (*round_rate)(unsigned id, unsigned rate);
48};
30 49
31struct clk { 50struct clk {
32 uint32_t id; 51 uint32_t id;
52 uint32_t remote_id;
33 uint32_t count; 53 uint32_t count;
34 uint32_t flags; 54 uint32_t flags;
35 const char *name; 55 const char *name;
56 struct clk_ops *ops;
57 const char *dbg_name;
36 struct list_head list; 58 struct list_head list;
37 struct device *dev; 59 struct device *dev;
38}; 60};
@@ -41,8 +63,47 @@ struct clk {
41#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104) 63#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
42#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124) 64#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
43 65
44extern struct clk msm_clocks[]; 66#ifdef CONFIG_DEBUG_FS
45extern unsigned msm_num_clocks; 67#define CLOCK_DBG_NAME(x) .dbg_name = x,
68#else
69#define CLOCK_DBG_NAME(x)
70#endif
71
72#define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \
73 .name = clk_name, \
74 .id = clk_id, \
75 .flags = clk_flags, \
76 .dev = clk_dev, \
77 CLOCK_DBG_NAME(#clk_id) \
78 }
79
80#define OFF CLKFLAG_AUTO_OFF
81#define CLK_MIN CLKFLAG_MIN
82#define CLK_MAX CLKFLAG_MAX
83#define CLK_MINMAX (CLK_MIN | CLK_MAX)
84#define NR_CLKS P_NR_CLKS
85
86enum {
87 PLL_0 = 0,
88 PLL_1,
89 PLL_2,
90 PLL_3,
91 PLL_4,
92 PLL_5,
93 PLL_6,
94 NUM_PLL
95};
96
97enum clkvote_client {
98 CLKVOTE_ACPUCLK = 0,
99 CLKVOTE_PMQOS,
100 CLKVOTE_MAX,
101};
102
103int msm_clock_require_tcxo(unsigned long *reason, int nbits);
104int msm_clock_get_name(uint32_t id, char *name, uint32_t size);
105int ebi1_clk_set_min_rate(enum clkvote_client client, unsigned long rate);
106unsigned long clk_get_max_axi_khz(void);
46 107
47#endif 108#endif
48 109
diff --git a/arch/arm/mach-msm/devices.c b/arch/arm/mach-msm/devices-msm7x00.c
index 31b6b30e98bf..fde9d8f69f10 100644
--- a/arch/arm/mach-msm/devices.c
+++ b/arch/arm/mach-msm/devices-msm7x00.c
@@ -24,6 +24,10 @@
24#include <linux/mtd/nand.h> 24#include <linux/mtd/nand.h>
25#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26 26
27
28#include "clock.h"
29#include <mach/mmc.h>
30
27static struct resource resources_uart1[] = { 31static struct resource resources_uart1[] = {
28 { 32 {
29 .start = INT_UART1, 33 .start = INT_UART1,
@@ -163,8 +167,19 @@ static struct resource resources_sdc1[] = {
163 }, 167 },
164 { 168 {
165 .start = INT_SDC1_0, 169 .start = INT_SDC1_0,
170 .end = INT_SDC1_0,
171 .flags = IORESOURCE_IRQ,
172 .name = "cmd_irq",
173 },
174 {
175 .start = INT_SDC1_1,
166 .end = INT_SDC1_1, 176 .end = INT_SDC1_1,
167 .flags = IORESOURCE_IRQ, 177 .flags = IORESOURCE_IRQ,
178 .name = "pio_irq",
179 },
180 {
181 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
182 .name = "status_irq"
168 }, 183 },
169 { 184 {
170 .start = 8, 185 .start = 8,
@@ -181,8 +196,19 @@ static struct resource resources_sdc2[] = {
181 }, 196 },
182 { 197 {
183 .start = INT_SDC2_0, 198 .start = INT_SDC2_0,
199 .end = INT_SDC2_0,
200 .flags = IORESOURCE_IRQ,
201 .name = "cmd_irq",
202 },
203 {
204 .start = INT_SDC2_1,
184 .end = INT_SDC2_1, 205 .end = INT_SDC2_1,
185 .flags = IORESOURCE_IRQ, 206 .flags = IORESOURCE_IRQ,
207 .name = "pio_irq",
208 },
209 {
210 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
211 .name = "status_irq"
186 }, 212 },
187 { 213 {
188 .start = 8, 214 .start = 8,
@@ -199,8 +225,19 @@ static struct resource resources_sdc3[] = {
199 }, 225 },
200 { 226 {
201 .start = INT_SDC3_0, 227 .start = INT_SDC3_0,
228 .end = INT_SDC3_0,
229 .flags = IORESOURCE_IRQ,
230 .name = "cmd_irq",
231 },
232 {
233 .start = INT_SDC3_1,
202 .end = INT_SDC3_1, 234 .end = INT_SDC3_1,
203 .flags = IORESOURCE_IRQ, 235 .flags = IORESOURCE_IRQ,
236 .name = "pio_irq",
237 },
238 {
239 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
240 .name = "status_irq"
204 }, 241 },
205 { 242 {
206 .start = 8, 243 .start = 8,
@@ -217,8 +254,19 @@ static struct resource resources_sdc4[] = {
217 }, 254 },
218 { 255 {
219 .start = INT_SDC4_0, 256 .start = INT_SDC4_0,
257 .end = INT_SDC4_0,
258 .flags = IORESOURCE_IRQ,
259 .name = "cmd_irq",
260 },
261 {
262 .start = INT_SDC4_1,
220 .end = INT_SDC4_1, 263 .end = INT_SDC4_1,
221 .flags = IORESOURCE_IRQ, 264 .flags = IORESOURCE_IRQ,
265 .name = "pio_irq",
266 },
267 {
268 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
269 .name = "status_irq"
222 }, 270 },
223 { 271 {
224 .start = 8, 272 .start = 8,
@@ -266,3 +314,80 @@ struct platform_device msm_device_sdc4 = {
266 .coherent_dma_mask = 0xffffffff, 314 .coherent_dma_mask = 0xffffffff,
267 }, 315 },
268}; 316};
317
318static struct platform_device *msm_sdcc_devices[] __initdata = {
319 &msm_device_sdc1,
320 &msm_device_sdc2,
321 &msm_device_sdc3,
322 &msm_device_sdc4,
323};
324
325int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat,
326 unsigned int stat_irq, unsigned long stat_irq_flags)
327{
328 struct platform_device *pdev;
329 struct resource *res;
330
331 if (controller < 1 || controller > 4)
332 return -EINVAL;
333
334 pdev = msm_sdcc_devices[controller-1];
335 pdev->dev.platform_data = plat;
336
337 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
338 if (!res)
339 return -EINVAL;
340 else if (stat_irq) {
341 res->start = res->end = stat_irq;
342 res->flags &= ~IORESOURCE_DISABLED;
343 res->flags |= stat_irq_flags;
344 }
345
346 return platform_device_register(pdev);
347}
348
349struct clk msm_clocks_7x01a[] = {
350 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
351 CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
352 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0),
353 CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
354 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
355 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF),
356 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
357 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF),
358 CLK_PCOM("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
359 CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
360 CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
361 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
362 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
363 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
364 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0),
365 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
366 CLK_PCOM("pmdh_clk", PMDH_CLK, NULL, OFF ),
367 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
368 CLK_PCOM("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
369 CLK_PCOM("sdc_pclk", SDC1_P_CLK, &msm_device_sdc1.dev, OFF),
370 CLK_PCOM("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
371 CLK_PCOM("sdc_pclk", SDC2_P_CLK, &msm_device_sdc2.dev, OFF),
372 CLK_PCOM("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
373 CLK_PCOM("sdc_pclk", SDC3_P_CLK, &msm_device_sdc3.dev, OFF),
374 CLK_PCOM("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
375 CLK_PCOM("sdc_pclk", SDC4_P_CLK, &msm_device_sdc4.dev, OFF),
376 CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
377 CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
378 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
379 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
380 CLK_PCOM("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
381 CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
382 CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
383 CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF),
384 CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0),
385 CLK_PCOM("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
386 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, &msm_device_hsusb.dev, OFF),
387 CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
388 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ),
389 CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
390 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
391};
392
393unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
new file mode 100644
index 000000000000..b449e8ad2904
--- /dev/null
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -0,0 +1,128 @@
1/*
2 * Copyright (C) 2008 Google, Inc.
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <linux/dma-mapping.h>
20#include <mach/irqs.h>
21#include <mach/msm_iomap.h>
22#include <mach/dma.h>
23#include <mach/board.h>
24
25#include "devices.h"
26#include "smd_private.h"
27
28#include <asm/mach/flash.h>
29
30#include "clock-pcom.h"
31
32#include <mach/mmc.h>
33
34static struct resource resources_uart2[] = {
35 {
36 .start = INT_UART2,
37 .end = INT_UART2,
38 .flags = IORESOURCE_IRQ,
39 },
40 {
41 .start = MSM_UART2_PHYS,
42 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
43 .flags = IORESOURCE_MEM,
44 },
45};
46
47struct platform_device msm_device_uart2 = {
48 .name = "msm_serial",
49 .id = 1,
50 .num_resources = ARRAY_SIZE(resources_uart2),
51 .resource = resources_uart2,
52};
53
54struct clk msm_clocks_7x30[] = {
55 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
56 CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
57 CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0),
58 CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF),
59 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
60 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
61 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
62 CLK_PCOM("emdh_pclk", EMDH_P_CLK, NULL, OFF),
63 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
64 CLK_PCOM("grp_2d_clk", GRP_2D_CLK, NULL, 0),
65 CLK_PCOM("grp_2d_pclk", GRP_2D_P_CLK, NULL, 0),
66 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
67 CLK_PCOM("grp_pclk", GRP_3D_P_CLK, NULL, 0),
68 CLK_7X30S("grp_src_clk", GRP_3D_SRC_CLK, GRP_3D_CLK, NULL, 0),
69 CLK_PCOM("hdmi_clk", HDMI_CLK, NULL, 0),
70 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
71 CLK_PCOM("jpeg_clk", JPEG_CLK, NULL, OFF),
72 CLK_PCOM("jpeg_pclk", JPEG_P_CLK, NULL, OFF),
73 CLK_PCOM("lpa_codec_clk", LPA_CODEC_CLK, NULL, 0),
74 CLK_PCOM("lpa_core_clk", LPA_CORE_CLK, NULL, 0),
75 CLK_PCOM("lpa_pclk", LPA_P_CLK, NULL, 0),
76 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
77 CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
78 CLK_PCOM("mddi_pclk", PMDH_P_CLK, NULL, 0),
79 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
80 CLK_PCOM("mdp_pclk", MDP_P_CLK, NULL, 0),
81 CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
82 CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
83 CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0),
84 CLK_PCOM("mfc_clk", MFC_CLK, NULL, 0),
85 CLK_PCOM("mfc_div2_clk", MFC_DIV2_CLK, NULL, 0),
86 CLK_PCOM("mfc_pclk", MFC_P_CLK, NULL, 0),
87 CLK_PCOM("mi2s_m_clk", MI2S_M_CLK, NULL, 0),
88 CLK_PCOM("mi2s_s_clk", MI2S_S_CLK, NULL, 0),
89 CLK_PCOM("mi2s_codec_rx_m_clk", MI2S_CODEC_RX_M_CLK, NULL, 0),
90 CLK_PCOM("mi2s_codec_rx_s_clk", MI2S_CODEC_RX_S_CLK, NULL, 0),
91 CLK_PCOM("mi2s_codec_tx_m_clk", MI2S_CODEC_TX_M_CLK, NULL, 0),
92 CLK_PCOM("mi2s_codec_tx_s_clk", MI2S_CODEC_TX_S_CLK, NULL, 0),
93 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN),
94 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
95 CLK_PCOM("rotator_clk", AXI_ROTATOR_CLK, NULL, 0),
96 CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, OFF),
97 CLK_PCOM("rotator_pclk", ROTATOR_P_CLK, NULL, OFF),
98 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
99 CLK_PCOM("spi_clk", SPI_CLK, NULL, 0),
100 CLK_PCOM("spi_pclk", SPI_P_CLK, NULL, 0),
101 CLK_7X30S("tv_src_clk", TV_CLK, TV_ENC_CLK, NULL, 0),
102 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
103 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
104 CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
105 CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
106 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
107 CLK_PCOM("usb_hs_core_clk", USB_HS_CORE_CLK, NULL, OFF),
108 CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF),
109 CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF),
110 CLK_PCOM("usb_hs2_core_clk", USB_HS2_CORE_CLK, NULL, OFF),
111 CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF),
112 CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF),
113 CLK_PCOM("usb_hs3_core_clk", USB_HS3_CORE_CLK, NULL, OFF),
114 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN),
115 CLK_PCOM("vfe_camif_clk", VFE_CAMIF_CLK, NULL, 0),
116 CLK_PCOM("vfe_clk", VFE_CLK, NULL, 0),
117 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, 0),
118 CLK_PCOM("vfe_pclk", VFE_P_CLK, NULL, OFF),
119 CLK_PCOM("vpe_clk", VPE_CLK, NULL, 0),
120
121 /* 7x30 v2 hardware only. */
122 CLK_PCOM("csi_clk", CSI0_CLK, NULL, 0),
123 CLK_PCOM("csi_pclk", CSI0_P_CLK, NULL, 0),
124 CLK_PCOM("csi_vfe_clk", CSI0_VFE_CLK, NULL, 0),
125};
126
127unsigned msm_num_clocks_7x30 = ARRAY_SIZE(msm_clocks_7x30);
128
diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c
new file mode 100644
index 000000000000..4d4a50785e34
--- /dev/null
+++ b/arch/arm/mach-msm/devices-qsd8x50.c
@@ -0,0 +1,92 @@
1/*
2 * Copyright (C) 2008 Google, Inc.
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <linux/dma-mapping.h>
20#include <mach/irqs.h>
21#include <mach/msm_iomap.h>
22#include <mach/dma.h>
23#include <mach/board.h>
24
25#include "devices.h"
26
27#include <asm/mach/flash.h>
28
29#include <mach/mmc.h>
30
31static struct resource resources_uart3[] = {
32 {
33 .start = INT_UART3,
34 .end = INT_UART3,
35 .flags = IORESOURCE_IRQ,
36 },
37 {
38 .start = MSM_UART3_PHYS,
39 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
40 .flags = IORESOURCE_MEM,
41 },
42};
43
44struct platform_device msm_device_uart3 = {
45 .name = "msm_serial",
46 .id = 2,
47 .num_resources = ARRAY_SIZE(resources_uart3),
48 .resource = resources_uart3,
49};
50
51struct clk msm_clocks_8x50[] = {
52 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
53 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
54 CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
55 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
56 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
57 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
58 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
59 CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
60 CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
61 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
62 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
63 CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
64 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
65 CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
66 CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
67 CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0),
68 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN),
69 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
70 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
71 CLK_PCOM("spi_clk", SPI_CLK, NULL, 0),
72 CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
73 CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
74 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
75 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
76 CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
77 CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
78 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
79 CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
80 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN),
81 CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
82 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
83 CLK_PCOM("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
84 CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF),
85 CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF),
86 CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF),
87 CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF),
88 CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0),
89};
90
91unsigned msm_num_clocks_8x50 = ARRAY_SIZE(msm_clocks_8x50);
92
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 0744c4a27d6a..568443e76423 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -16,6 +16,8 @@
16#ifndef __ARCH_ARM_MACH_MSM_DEVICES_H 16#ifndef __ARCH_ARM_MACH_MSM_DEVICES_H
17#define __ARCH_ARM_MACH_MSM_DEVICES_H 17#define __ARCH_ARM_MACH_MSM_DEVICES_H
18 18
19#include "clock.h"
20
19extern struct platform_device msm_device_uart1; 21extern struct platform_device msm_device_uart1;
20extern struct platform_device msm_device_uart2; 22extern struct platform_device msm_device_uart2;
21extern struct platform_device msm_device_uart3; 23extern struct platform_device msm_device_uart3;
@@ -33,4 +35,13 @@ extern struct platform_device msm_device_smd;
33 35
34extern struct platform_device msm_device_nand; 36extern struct platform_device msm_device_nand;
35 37
38extern struct clk msm_clocks_7x01a[];
39extern unsigned msm_num_clocks_7x01a;
40
41extern struct clk msm_clocks_7x30[];
42extern unsigned msm_num_clocks_7x30;
43
44extern struct clk msm_clocks_8x50[];
45extern unsigned msm_num_clocks_8x50;
46
36#endif 47#endif
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index f5420f9585c5..3d725ae518e4 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -13,6 +13,8 @@
13 * 13 *
14 */ 14 */
15 15
16#include <linux/clk.h>
17#include <linux/err.h>
16#include <linux/io.h> 18#include <linux/io.h>
17#include <linux/interrupt.h> 19#include <linux/interrupt.h>
18#include <mach/dma.h> 20#include <mach/dma.h>
@@ -26,6 +28,7 @@ enum {
26}; 28};
27 29
28static DEFINE_SPINLOCK(msm_dmov_lock); 30static DEFINE_SPINLOCK(msm_dmov_lock);
31static struct clk *msm_dmov_clk;
29static unsigned int channel_active; 32static unsigned int channel_active;
30static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; 33static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
31static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; 34static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
@@ -54,6 +57,9 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd)
54 unsigned int status; 57 unsigned int status;
55 58
56 spin_lock_irqsave(&msm_dmov_lock, irq_flags); 59 spin_lock_irqsave(&msm_dmov_lock, irq_flags);
60 if (!channel_active)
61 clk_enable(msm_dmov_clk);
62 dsb();
57 status = readl(DMOV_STATUS(id)); 63 status = readl(DMOV_STATUS(id));
58 if (list_empty(&ready_commands[id]) && 64 if (list_empty(&ready_commands[id]) &&
59 (status & DMOV_STATUS_CMD_PTR_RDY)) { 65 (status & DMOV_STATUS_CMD_PTR_RDY)) {
@@ -70,6 +76,8 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd)
70 channel_active |= 1U << id; 76 channel_active |= 1U << id;
71 writel(cmd->cmdptr, DMOV_CMD_PTR(id)); 77 writel(cmd->cmdptr, DMOV_CMD_PTR(id));
72 } else { 78 } else {
79 if (!channel_active)
80 clk_disable(msm_dmov_clk);
73 if (list_empty(&active_commands[id])) 81 if (list_empty(&active_commands[id]))
74 PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status); 82 PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status);
75 83
@@ -165,6 +173,7 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
165 "for %p, result %x\n", id, cmd, ch_result); 173 "for %p, result %x\n", id, cmd, ch_result);
166 if (cmd) { 174 if (cmd) {
167 list_del(&cmd->list); 175 list_del(&cmd->list);
176 dsb();
168 cmd->complete_func(cmd, ch_result, NULL); 177 cmd->complete_func(cmd, ch_result, NULL);
169 } 178 }
170 } 179 }
@@ -181,6 +190,7 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
181 PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); 190 PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]);
182 if (cmd) { 191 if (cmd) {
183 list_del(&cmd->list); 192 list_del(&cmd->list);
193 dsb();
184 cmd->complete_func(cmd, ch_result, &errdata); 194 cmd->complete_func(cmd, ch_result, &errdata);
185 } 195 }
186 } 196 }
@@ -198,6 +208,7 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
198 PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); 208 PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]);
199 if (cmd) { 209 if (cmd) {
200 list_del(&cmd->list); 210 list_del(&cmd->list);
211 dsb();
201 cmd->complete_func(cmd, ch_result, &errdata); 212 cmd->complete_func(cmd, ch_result, &errdata);
202 } 213 }
203 /* this does not seem to work, once we get an error */ 214 /* this does not seem to work, once we get an error */
@@ -219,8 +230,10 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
219 PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); 230 PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
220 } 231 }
221 232
222 if (!channel_active) 233 if (!channel_active) {
223 disable_irq(INT_ADM_AARM); 234 disable_irq_nosync(INT_ADM_AARM);
235 clk_disable(msm_dmov_clk);
236 }
224 237
225 spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); 238 spin_unlock_irqrestore(&msm_dmov_lock, irq_flags);
226 return IRQ_HANDLED; 239 return IRQ_HANDLED;
@@ -230,11 +243,17 @@ static int __init msm_init_datamover(void)
230{ 243{
231 int i; 244 int i;
232 int ret; 245 int ret;
246 struct clk *clk;
247
233 for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { 248 for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) {
234 INIT_LIST_HEAD(&ready_commands[i]); 249 INIT_LIST_HEAD(&ready_commands[i]);
235 INIT_LIST_HEAD(&active_commands[i]); 250 INIT_LIST_HEAD(&active_commands[i]);
236 writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); 251 writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i));
237 } 252 }
253 clk = clk_get(NULL, "adm_clk");
254 if (IS_ERR(clk))
255 return PTR_ERR(clk);
256 msm_dmov_clk = clk;
238 ret = request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); 257 ret = request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL);
239 if (ret) 258 if (ret)
240 return ret; 259 return ret;
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
new file mode 100644
index 000000000000..bc32c845c7b0
--- /dev/null
+++ b/arch/arm/mach-msm/gpio.c
@@ -0,0 +1,85 @@
1/* linux/arch/arm/mach-msm/gpio.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <mach/gpio.h>
19#include "proc_comm.h"
20
21int gpio_tlmm_config(unsigned config, unsigned disable)
22{
23 return msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &config, &disable);
24}
25EXPORT_SYMBOL(gpio_tlmm_config);
26
27int msm_gpios_enable(const struct msm_gpio *table, int size)
28{
29 int rc;
30 int i;
31 const struct msm_gpio *g;
32 for (i = 0; i < size; i++) {
33 g = table + i;
34 rc = gpio_tlmm_config(g->gpio_cfg, GPIO_ENABLE);
35 if (rc) {
36 pr_err("gpio_tlmm_config(0x%08x, GPIO_ENABLE)"
37 " <%s> failed: %d\n",
38 g->gpio_cfg, g->label ?: "?", rc);
39 pr_err("pin %d func %d dir %d pull %d drvstr %d\n",
40 GPIO_PIN(g->gpio_cfg), GPIO_FUNC(g->gpio_cfg),
41 GPIO_DIR(g->gpio_cfg), GPIO_PULL(g->gpio_cfg),
42 GPIO_DRVSTR(g->gpio_cfg));
43 goto err;
44 }
45 }
46 return 0;
47err:
48 msm_gpios_disable(table, i);
49 return rc;
50}
51EXPORT_SYMBOL(msm_gpios_enable);
52
53void msm_gpios_disable(const struct msm_gpio *table, int size)
54{
55 int rc;
56 int i;
57 const struct msm_gpio *g;
58 for (i = size-1; i >= 0; i--) {
59 g = table + i;
60 rc = gpio_tlmm_config(g->gpio_cfg, GPIO_DISABLE);
61 if (rc) {
62 pr_err("gpio_tlmm_config(0x%08x, GPIO_DISABLE)"
63 " <%s> failed: %d\n",
64 g->gpio_cfg, g->label ?: "?", rc);
65 pr_err("pin %d func %d dir %d pull %d drvstr %d\n",
66 GPIO_PIN(g->gpio_cfg), GPIO_FUNC(g->gpio_cfg),
67 GPIO_DIR(g->gpio_cfg), GPIO_PULL(g->gpio_cfg),
68 GPIO_DRVSTR(g->gpio_cfg));
69 }
70 }
71}
72EXPORT_SYMBOL(msm_gpios_disable);
73
74int msm_gpios_request_enable(const struct msm_gpio *table, int size)
75{
76 int rc = msm_gpios_enable(table, size);
77 return rc;
78}
79EXPORT_SYMBOL(msm_gpios_request_enable);
80
81void msm_gpios_disable_free(const struct msm_gpio *table, int size)
82{
83 msm_gpios_disable(table, size);
84}
85EXPORT_SYMBOL(msm_gpios_disable_free);
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 264d62e519f3..e302fbdc439b 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -21,18 +21,24 @@
21 21
22/* platform device data structures */ 22/* platform device data structures */
23 23
24struct msm_mddi_platform_data 24struct msm_acpu_clock_platform_data
25{ 25{
26 void (*panel_power)(int on); 26 uint32_t acpu_switch_time_us;
27 unsigned has_vsync_irq:1; 27 uint32_t max_speed_delta_khz;
28 uint32_t vdd_switch_time_us;
29 unsigned long power_collapse_khz;
30 unsigned long wait_for_irq_khz;
28}; 31};
29 32
33struct clk;
34
30/* common init routines for use by arch/arm/mach-msm/board-*.c */ 35/* common init routines for use by arch/arm/mach-msm/board-*.c */
31 36
32void __init msm_add_devices(void); 37void __init msm_add_devices(void);
33void __init msm_map_common_io(void); 38void __init msm_map_common_io(void);
34void __init msm_init_irq(void); 39void __init msm_init_irq(void);
35void __init msm_init_gpio(void); 40void __init msm_init_gpio(void);
36void __init msm_clock_init(void); 41void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks);
42void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *);
37 43
38#endif 44#endif
diff --git a/arch/arm/mach-msm/include/mach/clk.h b/arch/arm/mach-msm/include/mach/clk.h
new file mode 100644
index 000000000000..c05ca40478c7
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/clk.h
@@ -0,0 +1,57 @@
1/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29#ifndef __MACH_CLK_H
30#define __MACH_CLK_H
31
32/* Magic rate value for use with PM QOS to request the board's maximum
33 * supported AXI rate. PM QOS will only pass positive s32 rate values
34 * through to the clock driver, so INT_MAX is used.
35 */
36#define MSM_AXI_MAX_FREQ LONG_MAX
37
38enum clk_reset_action {
39 CLK_RESET_DEASSERT = 0,
40 CLK_RESET_ASSERT = 1
41};
42
43struct clk;
44
45/* Rate is minimum clock rate in Hz */
46int clk_set_min_rate(struct clk *clk, unsigned long rate);
47
48/* Rate is maximum clock rate in Hz */
49int clk_set_max_rate(struct clk *clk, unsigned long rate);
50
51/* Assert/Deassert reset to a hardware block associated with a clock */
52int clk_reset(struct clk *clk, enum clk_reset_action action);
53
54/* Set clock-specific configuration parameters */
55int clk_set_flags(struct clk *clk, unsigned long flags);
56
57#endif
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index 5ab5bdffab07..04c51cc04f31 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -41,40 +41,42 @@ int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
41#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2)) 41#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2))
42#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2)) 42#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2))
43 43
44/* only security domain 3 is available to the ARM11 44#if defined(CONFIG_ARCH_MSM7X30)
45 * SD0 -> mARM trusted, SD1 -> mARM nontrusted, SD2 -> aDSP, SD3 -> aARM 45#define DMOV_SD_AARM DMOV_SD2
46 */ 46#else
47#define DMOV_SD_AARM DMOV_SD3
48#endif
47 49
48#define DMOV_CMD_PTR(ch) DMOV_SD3(0x000, ch) 50#define DMOV_CMD_PTR(ch) DMOV_SD_AARM(0x000, ch)
49#define DMOV_CMD_LIST (0 << 29) /* does not work */ 51#define DMOV_CMD_LIST (0 << 29) /* does not work */
50#define DMOV_CMD_PTR_LIST (1 << 29) /* works */ 52#define DMOV_CMD_PTR_LIST (1 << 29) /* works */
51#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */ 53#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
52#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */ 54#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
53#define DMOV_CMD_ADDR(addr) ((addr) >> 3) 55#define DMOV_CMD_ADDR(addr) ((addr) >> 3)
54 56
55#define DMOV_RSLT(ch) DMOV_SD3(0x040, ch) 57#define DMOV_RSLT(ch) DMOV_SD_AARM(0x040, ch)
56#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */ 58#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
57#define DMOV_RSLT_ERROR (1 << 3) 59#define DMOV_RSLT_ERROR (1 << 3)
58#define DMOV_RSLT_FLUSH (1 << 2) 60#define DMOV_RSLT_FLUSH (1 << 2)
59#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */ 61#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
60#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */ 62#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
61 63
62#define DMOV_FLUSH0(ch) DMOV_SD3(0x080, ch) 64#define DMOV_FLUSH0(ch) DMOV_SD_AARM(0x080, ch)
63#define DMOV_FLUSH1(ch) DMOV_SD3(0x0C0, ch) 65#define DMOV_FLUSH1(ch) DMOV_SD_AARM(0x0C0, ch)
64#define DMOV_FLUSH2(ch) DMOV_SD3(0x100, ch) 66#define DMOV_FLUSH2(ch) DMOV_SD_AARM(0x100, ch)
65#define DMOV_FLUSH3(ch) DMOV_SD3(0x140, ch) 67#define DMOV_FLUSH3(ch) DMOV_SD_AARM(0x140, ch)
66#define DMOV_FLUSH4(ch) DMOV_SD3(0x180, ch) 68#define DMOV_FLUSH4(ch) DMOV_SD_AARM(0x180, ch)
67#define DMOV_FLUSH5(ch) DMOV_SD3(0x1C0, ch) 69#define DMOV_FLUSH5(ch) DMOV_SD_AARM(0x1C0, ch)
68 70
69#define DMOV_STATUS(ch) DMOV_SD3(0x200, ch) 71#define DMOV_STATUS(ch) DMOV_SD_AARM(0x200, ch)
70#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29)) 72#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
71#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3) 73#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
72#define DMOV_STATUS_RSLT_VALID (1 << 1) 74#define DMOV_STATUS_RSLT_VALID (1 << 1)
73#define DMOV_STATUS_CMD_PTR_RDY (1 << 0) 75#define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
74 76
75#define DMOV_ISR DMOV_SD3(0x380, 0) 77#define DMOV_ISR DMOV_SD_AARM(0x380, 0)
76 78
77#define DMOV_CONFIG(ch) DMOV_SD3(0x300, ch) 79#define DMOV_CONFIG(ch) DMOV_SD_AARM(0x300, ch)
78#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2) 80#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2)
79#define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1) 81#define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1)
80#define DMOV_CONFIG_IRQ_EN (1 << 0) 82#define DMOV_CONFIG_IRQ_EN (1 << 0)
diff --git a/arch/arm/mach-msm/include/mach/gpio.h b/arch/arm/mach-msm/include/mach/gpio.h
new file mode 100644
index 000000000000..262b441b4374
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/gpio.h
@@ -0,0 +1,142 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
4 * Author: Mike Lockwood <lockwood@android.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#ifndef __ASM_ARCH_MSM_GPIO_H
17#define __ASM_ARCH_MSM_GPIO_H
18
19/**
20 * struct msm_gpio - GPIO pin description
21 * @gpio_cfg - configuration bitmap, as per gpio_tlmm_config()
22 * @label - textual label
23 *
24 * Usually, GPIO's are operated by sets.
25 * This struct accumulate all GPIO information in single source
26 * and facilitete group operations provided by msm_gpios_xxx()
27 */
28struct msm_gpio {
29 u32 gpio_cfg;
30 const char *label;
31};
32
33/**
34 * msm_gpios_request_enable() - request and enable set of GPIOs
35 *
36 * Request and configure set of GPIO's
37 * In case of error, all operations rolled back.
38 * Return error code.
39 *
40 * @table: GPIO table
41 * @size: number of entries in @table
42 */
43int msm_gpios_request_enable(const struct msm_gpio *table, int size);
44
45/**
46 * msm_gpios_disable_free() - disable and free set of GPIOs
47 *
48 * @table: GPIO table
49 * @size: number of entries in @table
50 */
51void msm_gpios_disable_free(const struct msm_gpio *table, int size);
52
53/**
54 * msm_gpios_request() - request set of GPIOs
55 * In case of error, all operations rolled back.
56 * Return error code.
57 *
58 * @table: GPIO table
59 * @size: number of entries in @table
60 */
61int msm_gpios_request(const struct msm_gpio *table, int size);
62
63/**
64 * msm_gpios_free() - free set of GPIOs
65 *
66 * @table: GPIO table
67 * @size: number of entries in @table
68 */
69void msm_gpios_free(const struct msm_gpio *table, int size);
70
71/**
72 * msm_gpios_enable() - enable set of GPIOs
73 * In case of error, all operations rolled back.
74 * Return error code.
75 *
76 * @table: GPIO table
77 * @size: number of entries in @table
78 */
79int msm_gpios_enable(const struct msm_gpio *table, int size);
80
81/**
82 * msm_gpios_disable() - disable set of GPIOs
83 *
84 * @table: GPIO table
85 * @size: number of entries in @table
86 */
87void msm_gpios_disable(const struct msm_gpio *table, int size);
88
89/* GPIO TLMM (Top Level Multiplexing) Definitions */
90
91/* GPIO TLMM: Function -- GPIO specific */
92
93/* GPIO TLMM: Direction */
94enum {
95 GPIO_INPUT,
96 GPIO_OUTPUT,
97};
98
99/* GPIO TLMM: Pullup/Pulldown */
100enum {
101 GPIO_NO_PULL,
102 GPIO_PULL_DOWN,
103 GPIO_KEEPER,
104 GPIO_PULL_UP,
105};
106
107/* GPIO TLMM: Drive Strength */
108enum {
109 GPIO_2MA,
110 GPIO_4MA,
111 GPIO_6MA,
112 GPIO_8MA,
113 GPIO_10MA,
114 GPIO_12MA,
115 GPIO_14MA,
116 GPIO_16MA,
117};
118
119enum {
120 GPIO_ENABLE,
121 GPIO_DISABLE,
122};
123
124#define GPIO_CFG(gpio, func, dir, pull, drvstr) \
125 ((((gpio) & 0x3FF) << 4) | \
126 ((func) & 0xf) | \
127 (((dir) & 0x1) << 14) | \
128 (((pull) & 0x3) << 15) | \
129 (((drvstr) & 0xF) << 17))
130
131/**
132 * extract GPIO pin from bit-field used for gpio_tlmm_config
133 */
134#define GPIO_PIN(gpio_cfg) (((gpio_cfg) >> 4) & 0x3ff)
135#define GPIO_FUNC(gpio_cfg) (((gpio_cfg) >> 0) & 0xf)
136#define GPIO_DIR(gpio_cfg) (((gpio_cfg) >> 14) & 0x1)
137#define GPIO_PULL(gpio_cfg) (((gpio_cfg) >> 15) & 0x3)
138#define GPIO_DRVSTR(gpio_cfg) (((gpio_cfg) >> 17) & 0xf)
139
140int gpio_tlmm_config(unsigned config, unsigned disable);
141
142#endif /* __ASM_ARCH_MSM_GPIO_H */
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
index aab964591db4..c35b29f9ac0f 100644
--- a/arch/arm/mach-msm/include/mach/io.h
+++ b/arch/arm/mach-msm/include/mach/io.h
@@ -26,4 +26,9 @@ void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int m
26#define __io(a) __typesafe_io(a) 26#define __io(a) __typesafe_io(a)
27#define __mem_pci(a) (a) 27#define __mem_pci(a) (a)
28 28
29void msm_map_qsd8x50_io(void);
30void msm_map_msm7x30_io(void);
31
32extern unsigned int msm_shared_ram_phys;
33
29#endif 34#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs-7x00.h b/arch/arm/mach-msm/include/mach/irqs-7x00.h
new file mode 100644
index 000000000000..f1fe70612fe9
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-7x00.h
@@ -0,0 +1,75 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com>
5 */
6
7#ifndef __ASM_ARCH_MSM_IRQS_7X00_H
8#define __ASM_ARCH_MSM_IRQS_7X00_H
9
10/* MSM ARM11 Interrupt Numbers */
11/* See 80-VE113-1 A, pp219-221 */
12
13#define INT_A9_M2A_0 0
14#define INT_A9_M2A_1 1
15#define INT_A9_M2A_2 2
16#define INT_A9_M2A_3 3
17#define INT_A9_M2A_4 4
18#define INT_A9_M2A_5 5
19#define INT_A9_M2A_6 6
20#define INT_GP_TIMER_EXP 7
21#define INT_DEBUG_TIMER_EXP 8
22#define INT_UART1 9
23#define INT_UART2 10
24#define INT_UART3 11
25#define INT_UART1_RX 12
26#define INT_UART2_RX 13
27#define INT_UART3_RX 14
28#define INT_USB_OTG 15
29#define INT_MDDI_PRI 16
30#define INT_MDDI_EXT 17
31#define INT_MDDI_CLIENT 18
32#define INT_MDP 19
33#define INT_GRAPHICS 20
34#define INT_ADM_AARM 21
35#define INT_ADSP_A11 22
36#define INT_ADSP_A9_A11 23
37#define INT_SDC1_0 24
38#define INT_SDC1_1 25
39#define INT_SDC2_0 26
40#define INT_SDC2_1 27
41#define INT_KEYSENSE 28
42#define INT_TCHSCRN_SSBI 29
43#define INT_TCHSCRN1 30
44#define INT_TCHSCRN2 31
45
46#define INT_GPIO_GROUP1 (32 + 0)
47#define INT_GPIO_GROUP2 (32 + 1)
48#define INT_PWB_I2C (32 + 2)
49#define INT_SOFTRESET (32 + 3)
50#define INT_NAND_WR_ER_DONE (32 + 4)
51#define INT_NAND_OP_DONE (32 + 5)
52#define INT_PBUS_ARM11 (32 + 6)
53#define INT_AXI_MPU_SMI (32 + 7)
54#define INT_AXI_MPU_EBI1 (32 + 8)
55#define INT_AD_HSSD (32 + 9)
56#define INT_ARM11_PMU (32 + 10)
57#define INT_ARM11_DMA (32 + 11)
58#define INT_TSIF_IRQ (32 + 12)
59#define INT_UART1DM_IRQ (32 + 13)
60#define INT_UART1DM_RX (32 + 14)
61#define INT_USB_HS (32 + 15)
62#define INT_SDC3_0 (32 + 16)
63#define INT_SDC3_1 (32 + 17)
64#define INT_SDC4_0 (32 + 18)
65#define INT_SDC4_1 (32 + 19)
66#define INT_UART2DM_RX (32 + 20)
67#define INT_UART2DM_IRQ (32 + 21)
68
69/* 22-31 are reserved */
70
71#define NR_MSM_IRQS 64
72#define NR_GPIO_IRQS 122
73#define NR_BOARD_IRQS 64
74
75#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs-7x30.h b/arch/arm/mach-msm/include/mach/irqs-7x30.h
new file mode 100644
index 000000000000..67c5396514fe
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-7x30.h
@@ -0,0 +1,170 @@
1/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#ifndef __ASM_ARCH_MSM_IRQS_7X30_H
31#define __ASM_ARCH_MSM_IRQS_7X30_H
32
33/* MSM ACPU Interrupt Numbers */
34
35#define INT_DEBUG_TIMER_EXP 0
36#define INT_GPT0_TIMER_EXP 1
37#define INT_GPT1_TIMER_EXP 2
38#define INT_WDT0_ACCSCSSBARK 3
39#define INT_WDT1_ACCSCSSBARK 4
40#define INT_AVS_SVIC 5
41#define INT_AVS_SVIC_SW_DONE 6
42#define INT_SC_DBG_RX_FULL 7
43#define INT_SC_DBG_TX_EMPTY 8
44#define INT_ARM11_PM 9
45#define INT_AVS_REQ_DOWN 10
46#define INT_AVS_REQ_UP 11
47#define INT_SC_ACG 12
48/* SCSS_VICFIQSTS0[13:15] are RESERVED */
49#define INT_L2_SVICCPUIRPTREQ 16
50#define INT_L2_SVICDMANSIRPTREQ 17
51#define INT_L2_SVICDMASIRPTREQ 18
52#define INT_L2_SVICSLVIRPTREQ 19
53#define INT_AD5A_MPROC_APPS_0 20
54#define INT_AD5A_MPROC_APPS_1 21
55#define INT_A9_M2A_0 22
56#define INT_A9_M2A_1 23
57#define INT_A9_M2A_2 24
58#define INT_A9_M2A_3 25
59#define INT_A9_M2A_4 26
60#define INT_A9_M2A_5 27
61#define INT_A9_M2A_6 28
62#define INT_A9_M2A_7 29
63#define INT_A9_M2A_8 30
64#define INT_A9_M2A_9 31
65
66#define INT_AXI_EBI1_SC (32 + 0)
67#define INT_IMEM_ERR (32 + 1)
68#define INT_AXI_EBI0_SC (32 + 2)
69#define INT_PBUS_SC_IRQC (32 + 3)
70#define INT_PERPH_BUS_BPM (32 + 4)
71#define INT_CC_TEMP_SENSE (32 + 5)
72#define INT_UXMC_EBI0 (32 + 6)
73#define INT_UXMC_EBI1 (32 + 7)
74#define INT_EBI2_OP_DONE (32 + 8)
75#define INT_EBI2_WR_ER_DONE (32 + 9)
76#define INT_TCSR_SPSS_CE (32 + 10)
77#define INT_EMDH (32 + 11)
78#define INT_PMDH (32 + 12)
79#define INT_MDC (32 + 13)
80#define INT_MIDI_TO_SUPSS (32 + 14)
81#define INT_LPA_2 (32 + 15)
82#define INT_GPIO_GROUP1_SECURE (32 + 16)
83#define INT_GPIO_GROUP2_SECURE (32 + 17)
84#define INT_GPIO_GROUP1 (32 + 18)
85#define INT_GPIO_GROUP2 (32 + 19)
86#define INT_MPRPH_SOFTRESET (32 + 20)
87#define INT_PWB_I2C (32 + 21)
88#define INT_PWB_I2C_2 (32 + 22)
89#define INT_TSSC_SAMPLE (32 + 23)
90#define INT_TSSC_PENUP (32 + 24)
91#define INT_TCHSCRN_SSBI (32 + 25)
92#define INT_FM_RDS (32 + 26)
93#define INT_KEYSENSE (32 + 27)
94#define INT_USB_OTG_HS (32 + 28)
95#define INT_USB_OTG_HS2 (32 + 29)
96#define INT_USB_OTG_HS3 (32 + 30)
97#define INT_CSI (32 + 31)
98
99#define INT_SPI_OUTPUT (64 + 0)
100#define INT_SPI_INPUT (64 + 1)
101#define INT_SPI_ERROR (64 + 2)
102#define INT_UART1 (64 + 3)
103#define INT_UART1_RX (64 + 4)
104#define INT_UART2 (64 + 5)
105#define INT_UART2_RX (64 + 6)
106#define INT_UART3 (64 + 7)
107#define INT_UART3_RX (64 + 8)
108#define INT_UART1DM_IRQ (64 + 9)
109#define INT_UART1DM_RX (64 + 10)
110#define INT_UART2DM_IRQ (64 + 11)
111#define INT_UART2DM_RX (64 + 12)
112#define INT_TSIF (64 + 13)
113#define INT_ADM_SC1 (64 + 14)
114#define INT_ADM_SC2 (64 + 15)
115#define INT_MDP (64 + 16)
116#define INT_VPE (64 + 17)
117#define INT_GRP_2D (64 + 18)
118#define INT_GRP_3D (64 + 19)
119#define INT_ROTATOR (64 + 20)
120#define INT_MFC720 (64 + 21)
121#define INT_JPEG (64 + 22)
122#define INT_VFE (64 + 23)
123#define INT_TV_ENC (64 + 24)
124#define INT_PMIC_SSBI (64 + 25)
125#define INT_MPM_1 (64 + 26)
126#define INT_TCSR_SPSS_SAMPLE (64 + 27)
127#define INT_TCSR_SPSS_PENUP (64 + 28)
128#define INT_MPM_2 (64 + 29)
129#define INT_SDC1_0 (64 + 30)
130#define INT_SDC1_1 (64 + 31)
131
132#define INT_SDC3_0 (96 + 0)
133#define INT_SDC3_1 (96 + 1)
134#define INT_SDC2_0 (96 + 2)
135#define INT_SDC2_1 (96 + 3)
136#define INT_SDC4_0 (96 + 4)
137#define INT_SDC4_1 (96 + 5)
138#define INT_PWB_QUP_IN (96 + 6)
139#define INT_PWB_QUP_OUT (96 + 7)
140#define INT_PWB_QUP_ERR (96 + 8)
141#define INT_SCSS_WDT0_BITE (96 + 9)
142/* SCSS_VICFIQSTS3[10:31] are RESERVED */
143
144/* Retrofit universal macro names */
145#define INT_ADM_AARM INT_ADM_SC2
146#define INT_USB_HS INT_USB_OTG_HS
147#define INT_USB_OTG INT_USB_OTG_HS
148#define INT_TCHSCRN1 INT_TSSC_SAMPLE
149#define INT_TCHSCRN2 INT_TSSC_PENUP
150#define INT_GP_TIMER_EXP INT_GPT0_TIMER_EXP
151#define INT_ADSP_A11 INT_AD5A_MPROC_APPS_0
152#define INT_ADSP_A9_A11 INT_AD5A_MPROC_APPS_1
153#define INT_MDDI_EXT INT_EMDH
154#define INT_MDDI_PRI INT_PMDH
155#define INT_MDDI_CLIENT INT_MDC
156#define INT_NAND_WR_ER_DONE INT_EBI2_WR_ER_DONE
157#define INT_NAND_OP_DONE INT_EBI2_OP_DONE
158
159#define NR_MSM_IRQS 128
160#define NR_GPIO_IRQS 182
161#define PMIC8058_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS)
162#define NR_PMIC8058_GPIO_IRQS 40
163#define NR_PMIC8058_MPP_IRQS 12
164#define NR_PMIC8058_MISC_IRQS 8
165#define NR_PMIC8058_IRQS (NR_PMIC8058_GPIO_IRQS +\
166 NR_PMIC8058_MPP_IRQS +\
167 NR_PMIC8058_MISC_IRQS)
168#define NR_BOARD_IRQS NR_PMIC8058_IRQS
169
170#endif /* __ASM_ARCH_MSM_IRQS_7X30_H */
diff --git a/arch/arm/mach-msm/include/mach/irqs-8x50.h b/arch/arm/mach-msm/include/mach/irqs-8x50.h
new file mode 100644
index 000000000000..de3d8fe24e4e
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-8x50.h
@@ -0,0 +1,105 @@
1/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#ifndef __ASM_ARCH_MSM_IRQS_8XXX_H
31#define __ASM_ARCH_MSM_IRQS_8XXX_H
32
33/* MSM ACPU Interrupt Numbers */
34
35#define INT_A9_M2A_0 0
36#define INT_A9_M2A_1 1
37#define INT_A9_M2A_2 2
38#define INT_A9_M2A_3 3
39#define INT_A9_M2A_4 4
40#define INT_A9_M2A_5 5
41#define INT_A9_M2A_6 6
42#define INT_GP_TIMER_EXP 7
43#define INT_DEBUG_TIMER_EXP 8
44#define INT_SIRC_0 9
45#define INT_SDC3_0 10
46#define INT_SDC3_1 11
47#define INT_SDC4_0 12
48#define INT_SDC4_1 13
49#define INT_AD6_EXT_VFR 14
50#define INT_USB_OTG 15
51#define INT_MDDI_PRI 16
52#define INT_MDDI_EXT 17
53#define INT_MDDI_CLIENT 18
54#define INT_MDP 19
55#define INT_GRAPHICS 20
56#define INT_ADM_AARM 21
57#define INT_ADSP_A11 22
58#define INT_ADSP_A9_A11 23
59#define INT_SDC1_0 24
60#define INT_SDC1_1 25
61#define INT_SDC2_0 26
62#define INT_SDC2_1 27
63#define INT_KEYSENSE 28
64#define INT_TCHSCRN_SSBI 29
65#define INT_TCHSCRN1 30
66#define INT_TCHSCRN2 31
67
68#define INT_TCSR_MPRPH_SC1 (32 + 0)
69#define INT_USB_FS2 (32 + 1)
70#define INT_PWB_I2C (32 + 2)
71#define INT_SOFTRESET (32 + 3)
72#define INT_NAND_WR_ER_DONE (32 + 4)
73#define INT_NAND_OP_DONE (32 + 5)
74#define INT_TCSR_MPRPH_SC2 (32 + 6)
75#define INT_OP_PEN (32 + 7)
76#define INT_AD_HSSD (32 + 8)
77#define INT_ARM11_PM (32 + 9)
78#define INT_SDMA_NON_SECURE (32 + 10)
79#define INT_TSIF_IRQ (32 + 11)
80#define INT_UART1DM_IRQ (32 + 12)
81#define INT_UART1DM_RX (32 + 13)
82#define INT_SDMA_SECURE (32 + 14)
83#define INT_SI2S_SLAVE (32 + 15)
84#define INT_SC_I2CPU (32 + 16)
85#define INT_SC_DBG_RDTRFULL (32 + 17)
86#define INT_SC_DBG_WDTRFULL (32 + 18)
87#define INT_SCPLL_CTL_DONE (32 + 19)
88#define INT_UART2DM_IRQ (32 + 20)
89#define INT_UART2DM_RX (32 + 21)
90#define INT_VDC_MEC (32 + 22)
91#define INT_VDC_DB (32 + 23)
92#define INT_VDC_AXI (32 + 24)
93#define INT_VFE (32 + 25)
94#define INT_USB_HS (32 + 26)
95#define INT_AUDIO_OUT0 (32 + 27)
96#define INT_AUDIO_OUT1 (32 + 28)
97#define INT_CRYPTO (32 + 29)
98#define INT_AD6M_IDLE (32 + 30)
99#define INT_SIRC_1 (32 + 31)
100
101#define NR_GPIO_IRQS 165
102#define NR_MSM_IRQS 64
103#define NR_BOARD_IRQS 64
104
105#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index 9dd4cf8a2693..164d355c96ea 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -1,6 +1,6 @@
1/* arch/arm/mach-msm/include/mach/irqs.h 1/*
2 *
3 * Copyright (C) 2007 Google, Inc. 2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com> 4 * Author: Brian Swetland <swetland@google.com>
5 * 5 *
6 * This software is licensed under the terms of the GNU General Public 6 * This software is licensed under the terms of the GNU General Public
@@ -17,74 +17,21 @@
17#ifndef __ASM_ARCH_MSM_IRQS_H 17#ifndef __ASM_ARCH_MSM_IRQS_H
18#define __ASM_ARCH_MSM_IRQS_H 18#define __ASM_ARCH_MSM_IRQS_H
19 19
20/* MSM ARM11 Interrupt Numbers */
21/* See 80-VE113-1 A, pp219-221 */
22
23#define INT_A9_M2A_0 0
24#define INT_A9_M2A_1 1
25#define INT_A9_M2A_2 2
26#define INT_A9_M2A_3 3
27#define INT_A9_M2A_4 4
28#define INT_A9_M2A_5 5
29#define INT_A9_M2A_6 6
30#define INT_GP_TIMER_EXP 7
31#define INT_DEBUG_TIMER_EXP 8
32#define INT_UART1 9
33#define INT_UART2 10
34#define INT_UART3 11
35#define INT_UART1_RX 12
36#define INT_UART2_RX 13
37#define INT_UART3_RX 14
38#define INT_USB_OTG 15
39#define INT_MDDI_PRI 16
40#define INT_MDDI_EXT 17
41#define INT_MDDI_CLIENT 18
42#define INT_MDP 19
43#define INT_GRAPHICS 20
44#define INT_ADM_AARM 21
45#define INT_ADSP_A11 22
46#define INT_ADSP_A9_A11 23
47#define INT_SDC1_0 24
48#define INT_SDC1_1 25
49#define INT_SDC2_0 26
50#define INT_SDC2_1 27
51#define INT_KEYSENSE 28
52#define INT_TCHSCRN_SSBI 29
53#define INT_TCHSCRN1 30
54#define INT_TCHSCRN2 31
55
56#define INT_GPIO_GROUP1 (32 + 0)
57#define INT_GPIO_GROUP2 (32 + 1)
58#define INT_PWB_I2C (32 + 2)
59#define INT_SOFTRESET (32 + 3)
60#define INT_NAND_WR_ER_DONE (32 + 4)
61#define INT_NAND_OP_DONE (32 + 5)
62#define INT_PBUS_ARM11 (32 + 6)
63#define INT_AXI_MPU_SMI (32 + 7)
64#define INT_AXI_MPU_EBI1 (32 + 8)
65#define INT_AD_HSSD (32 + 9)
66#define INT_ARM11_PMU (32 + 10)
67#define INT_ARM11_DMA (32 + 11)
68#define INT_TSIF_IRQ (32 + 12)
69#define INT_UART1DM_IRQ (32 + 13)
70#define INT_UART1DM_RX (32 + 14)
71#define INT_USB_HS (32 + 15)
72#define INT_SDC3_0 (32 + 16)
73#define INT_SDC3_1 (32 + 17)
74#define INT_SDC4_0 (32 + 18)
75#define INT_SDC4_1 (32 + 19)
76#define INT_UART2DM_RX (32 + 20)
77#define INT_UART2DM_IRQ (32 + 21)
78
79/* 22-31 are reserved */
80
81#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31)) 20#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
82 21
83#define NR_MSM_IRQS 64 22#if defined(CONFIG_ARCH_MSM7X30)
84#define NR_GPIO_IRQS 122 23#include "irqs-7x30.h"
85#define NR_BOARD_IRQS 64 24#elif defined(CONFIG_ARCH_QSD8X50)
86#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS) 25#include "irqs-8x50.h"
26#include "sirc.h"
27#elif defined(CONFIG_ARCH_MSM_ARM11)
28#include "irqs-7x00.h"
29#else
30#error "Unknown architecture specification"
31#endif
87 32
33#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
88#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n)) 34#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n))
35#define MSM_INT_TO_REG(base, irq) (base + irq / 32)
89 36
90#endif 37#endif
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
index f4698baec976..50c7847e6002 100644
--- a/arch/arm/mach-msm/include/mach/memory.h
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -17,7 +17,15 @@
17#define __ASM_ARCH_MEMORY_H 17#define __ASM_ARCH_MEMORY_H
18 18
19/* physical offset of RAM */ 19/* physical offset of RAM */
20#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A)
21#define PHYS_OFFSET UL(0x00000000)
22#elif defined(CONFIG_ARCH_QSD8X50)
23#define PHYS_OFFSET UL(0x20000000)
24#elif defined(CONFIG_ARCH_MSM7X30)
25#define PHYS_OFFSET UL(0x00200000)
26#else
20#define PHYS_OFFSET UL(0x10000000) 27#define PHYS_OFFSET UL(0x10000000)
28#endif
21 29
22#endif 30#endif
23 31
diff --git a/arch/arm/mach-msm/include/mach/msm_fb.h b/arch/arm/mach-msm/include/mach/msm_fb.h
new file mode 100644
index 000000000000..1f4fc81b3d8f
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_fb.h
@@ -0,0 +1,147 @@
1/* arch/arm/mach-msm/include/mach/msm_fb.h
2 *
3 * Internal shared definitions for various MSM framebuffer parts.
4 *
5 * Copyright (C) 2007 Google Incorporated
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef _MSM_FB_H_
18#define _MSM_FB_H_
19
20#include <linux/device.h>
21
22struct mddi_info;
23
24struct msm_fb_data {
25 int xres; /* x resolution in pixels */
26 int yres; /* y resolution in pixels */
27 int width; /* disply width in mm */
28 int height; /* display height in mm */
29 unsigned output_format;
30};
31
32struct msmfb_callback {
33 void (*func)(struct msmfb_callback *);
34};
35
36enum {
37 MSM_MDDI_PMDH_INTERFACE,
38 MSM_MDDI_EMDH_INTERFACE,
39 MSM_EBI2_INTERFACE,
40};
41
42#define MSMFB_CAP_PARTIAL_UPDATES (1 << 0)
43
44struct msm_panel_data {
45 /* turns off the fb memory */
46 int (*suspend)(struct msm_panel_data *);
47 /* turns on the fb memory */
48 int (*resume)(struct msm_panel_data *);
49 /* turns off the panel */
50 int (*blank)(struct msm_panel_data *);
51 /* turns on the panel */
52 int (*unblank)(struct msm_panel_data *);
53 void (*wait_vsync)(struct msm_panel_data *);
54 void (*request_vsync)(struct msm_panel_data *, struct msmfb_callback *);
55 void (*clear_vsync)(struct msm_panel_data *);
56 /* from the enum above */
57 unsigned interface_type;
58 /* data to be passed to the fb driver */
59 struct msm_fb_data *fb_data;
60
61 /* capabilities supported by the panel */
62 uint32_t caps;
63};
64
65struct msm_mddi_client_data {
66 void (*suspend)(struct msm_mddi_client_data *);
67 void (*resume)(struct msm_mddi_client_data *);
68 void (*activate_link)(struct msm_mddi_client_data *);
69 void (*remote_write)(struct msm_mddi_client_data *, uint32_t val,
70 uint32_t reg);
71 uint32_t (*remote_read)(struct msm_mddi_client_data *, uint32_t reg);
72 void (*auto_hibernate)(struct msm_mddi_client_data *, int);
73 /* custom data that needs to be passed from the board file to a
74 * particular client */
75 void *private_client_data;
76 struct resource *fb_resource;
77 /* from the list above */
78 unsigned interface_type;
79};
80
81struct msm_mddi_platform_data {
82 unsigned int clk_rate;
83 void (*power_client)(struct msm_mddi_client_data *, int on);
84
85 /* fixup the mfr name, product id */
86 void (*fixup)(uint16_t *mfr_name, uint16_t *product_id);
87
88 struct resource *fb_resource; /*optional*/
89 /* number of clients in the list that follows */
90 int num_clients;
91 /* array of client information of clients */
92 struct {
93 unsigned product_id; /* mfr id in top 16 bits, product id
94 * in lower 16 bits
95 */
96 char *name; /* the device name will be the platform
97 * device name registered for the client,
98 * it should match the name of the associated
99 * driver
100 */
101 unsigned id; /* id for mddi client device node, will also
102 * be used as device id of panel devices, if
103 * the client device will have multiple panels
104 * space must be left here for them
105 */
106 void *client_data; /* required private client data */
107 unsigned int clk_rate; /* optional: if the client requires a
108 * different mddi clk rate
109 */
110 } client_platform_data[];
111};
112
113struct mdp_blit_req;
114struct fb_info;
115struct mdp_device {
116 struct device dev;
117 void (*dma)(struct mdp_device *mpd, uint32_t addr,
118 uint32_t stride, uint32_t w, uint32_t h, uint32_t x,
119 uint32_t y, struct msmfb_callback *callback, int interface);
120 void (*dma_wait)(struct mdp_device *mdp);
121 int (*blit)(struct mdp_device *mdp, struct fb_info *fb,
122 struct mdp_blit_req *req);
123 void (*set_grp_disp)(struct mdp_device *mdp, uint32_t disp_id);
124};
125
126struct class_interface;
127int register_mdp_client(struct class_interface *class_intf);
128
129/**** private client data structs go below this line ***/
130
131struct msm_mddi_bridge_platform_data {
132 /* from board file */
133 int (*init)(struct msm_mddi_bridge_platform_data *,
134 struct msm_mddi_client_data *);
135 int (*uninit)(struct msm_mddi_bridge_platform_data *,
136 struct msm_mddi_client_data *);
137 /* passed to panel for use by the fb driver */
138 int (*blank)(struct msm_mddi_bridge_platform_data *,
139 struct msm_mddi_client_data *);
140 int (*unblank)(struct msm_mddi_bridge_platform_data *,
141 struct msm_mddi_client_data *);
142 struct msm_fb_data fb_data;
143};
144
145
146
147#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
new file mode 100644
index 000000000000..cfff0e74f128
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -0,0 +1,139 @@
1/* arch/arm/mach-msm/include/mach/msm_iomap.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_7X00_H
24#define __ASM_ARCH_MSM_IOMAP_7X00_H
25
26#include <asm/sizes.h>
27
28/* Physical base address and size of peripherals.
29 * Ordered by the virtual base addresses they will be mapped at.
30 *
31 * MSM_VIC_BASE must be an value that can be loaded via a "mov"
32 * instruction, otherwise entry-macro.S will not compile.
33 *
34 * If you add or remove entries here, you'll want to edit the
35 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
36 * changes.
37 *
38 */
39
40#ifdef __ASSEMBLY__
41#define IOMEM(x) x
42#else
43#define IOMEM(x) ((void __force __iomem *)(x))
44#endif
45
46#define MSM_VIC_BASE IOMEM(0xE0000000)
47#define MSM_VIC_PHYS 0xC0000000
48#define MSM_VIC_SIZE SZ_4K
49
50#define MSM_CSR_BASE IOMEM(0xE0001000)
51#define MSM_CSR_PHYS 0xC0100000
52#define MSM_CSR_SIZE SZ_4K
53
54#define MSM_GPT_PHYS MSM_CSR_PHYS
55#define MSM_GPT_BASE MSM_CSR_BASE
56#define MSM_GPT_SIZE SZ_4K
57
58#define MSM_DMOV_BASE IOMEM(0xE0002000)
59#define MSM_DMOV_PHYS 0xA9700000
60#define MSM_DMOV_SIZE SZ_4K
61
62#define MSM_GPIO1_BASE IOMEM(0xE0003000)
63#define MSM_GPIO1_PHYS 0xA9200000
64#define MSM_GPIO1_SIZE SZ_4K
65
66#define MSM_GPIO2_BASE IOMEM(0xE0004000)
67#define MSM_GPIO2_PHYS 0xA9300000
68#define MSM_GPIO2_SIZE SZ_4K
69
70#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
71#define MSM_CLK_CTL_PHYS 0xA8600000
72#define MSM_CLK_CTL_SIZE SZ_4K
73
74#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000)
75#define MSM_SHARED_RAM_PHYS 0x01F00000
76#define MSM_SHARED_RAM_SIZE SZ_1M
77
78#define MSM_UART1_PHYS 0xA9A00000
79#define MSM_UART1_SIZE SZ_4K
80
81#define MSM_UART2_PHYS 0xA9B00000
82#define MSM_UART2_SIZE SZ_4K
83
84#define MSM_UART3_PHYS 0xA9C00000
85#define MSM_UART3_SIZE SZ_4K
86
87#ifdef CONFIG_MSM_DEBUG_UART
88#define MSM_DEBUG_UART_BASE 0xE1000000
89#if CONFIG_MSM_DEBUG_UART == 1
90#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
91#elif CONFIG_MSM_DEBUG_UART == 2
92#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
93#elif CONFIG_MSM_DEBUG_UART == 3
94#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
95#endif
96#define MSM_DEBUG_UART_SIZE SZ_4K
97#endif
98
99#define MSM_SDC1_PHYS 0xA0400000
100#define MSM_SDC1_SIZE SZ_4K
101
102#define MSM_SDC2_PHYS 0xA0500000
103#define MSM_SDC2_SIZE SZ_4K
104
105#define MSM_SDC3_PHYS 0xA0600000
106#define MSM_SDC3_SIZE SZ_4K
107
108#define MSM_SDC4_PHYS 0xA0700000
109#define MSM_SDC4_SIZE SZ_4K
110
111#define MSM_I2C_PHYS 0xA9900000
112#define MSM_I2C_SIZE SZ_4K
113
114#define MSM_HSUSB_PHYS 0xA0800000
115#define MSM_HSUSB_SIZE SZ_4K
116
117#define MSM_PMDH_PHYS 0xAA600000
118#define MSM_PMDH_SIZE SZ_4K
119
120#define MSM_EMDH_PHYS 0xAA700000
121#define MSM_EMDH_SIZE SZ_4K
122
123#define MSM_MDP_PHYS 0xAA200000
124#define MSM_MDP_SIZE 0x000F0000
125
126#define MSM_MDC_PHYS 0xAA500000
127#define MSM_MDC_SIZE SZ_1M
128
129#define MSM_AD5_PHYS 0xAC000000
130#define MSM_AD5_SIZE (SZ_1M*13)
131
132
133#if defined(CONFIG_ARCH_MSM7X30)
134#define MSM_GCC_BASE IOMEM(0xF8009000)
135#define MSM_GCC_PHYS 0xC0182000
136#define MSM_GCC_SIZE SZ_4K
137#endif
138
139#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
new file mode 100644
index 000000000000..8a00c2defbc1
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -0,0 +1,122 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_7X30_H
24#define __ASM_ARCH_MSM_IOMAP_7X30_H
25
26/* Physical base address and size of peripherals.
27 * Ordered by the virtual base addresses they will be mapped at.
28 *
29 * MSM_VIC_BASE must be an value that can be loaded via a "mov"
30 * instruction, otherwise entry-macro.S will not compile.
31 *
32 * If you add or remove entries here, you'll want to edit the
33 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
34 * changes.
35 *
36 */
37
38#define MSM_VIC_BASE IOMEM(0xE0000000)
39#define MSM_VIC_PHYS 0xC0080000
40#define MSM_VIC_SIZE SZ_4K
41
42#define MSM_CSR_BASE IOMEM(0xE0001000)
43#define MSM_CSR_PHYS 0xC0100000
44#define MSM_CSR_SIZE SZ_4K
45
46#define MSM_TMR_PHYS MSM_CSR_PHYS
47#define MSM_TMR_BASE MSM_CSR_BASE
48#define MSM_TMR_SIZE SZ_4K
49
50#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
51#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
52
53#define MSM_DMOV_BASE IOMEM(0xE0002000)
54#define MSM_DMOV_PHYS 0xAC400000
55#define MSM_DMOV_SIZE SZ_4K
56
57#define MSM_GPIO1_BASE IOMEM(0xE0003000)
58#define MSM_GPIO1_PHYS 0xAC001000
59#define MSM_GPIO1_SIZE SZ_4K
60
61#define MSM_GPIO2_BASE IOMEM(0xE0004000)
62#define MSM_GPIO2_PHYS 0xAC101000
63#define MSM_GPIO2_SIZE SZ_4K
64
65#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
66#define MSM_CLK_CTL_PHYS 0xAB800000
67#define MSM_CLK_CTL_SIZE SZ_4K
68
69#define MSM_CLK_CTL_SH2_BASE IOMEM(0xE0006000)
70#define MSM_CLK_CTL_SH2_PHYS 0xABA01000
71#define MSM_CLK_CTL_SH2_SIZE SZ_4K
72
73#define MSM_ACC_BASE IOMEM(0xE0007000)
74#define MSM_ACC_PHYS 0xC0101000
75#define MSM_ACC_SIZE SZ_4K
76
77#define MSM_SAW_BASE IOMEM(0xE0008000)
78#define MSM_SAW_PHYS 0xC0102000
79#define MSM_SAW_SIZE SZ_4K
80
81#define MSM_GCC_BASE IOMEM(0xE0009000)
82#define MSM_GCC_PHYS 0xC0182000
83#define MSM_GCC_SIZE SZ_4K
84
85#define MSM_TCSR_BASE IOMEM(0xE000A000)
86#define MSM_TCSR_PHYS 0xAB600000
87#define MSM_TCSR_SIZE SZ_4K
88
89#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000)
90#define MSM_SHARED_RAM_PHYS 0x00100000
91#define MSM_SHARED_RAM_SIZE SZ_1M
92
93#define MSM_UART1_PHYS 0xACA00000
94#define MSM_UART1_SIZE SZ_4K
95
96#define MSM_UART2_PHYS 0xACB00000
97#define MSM_UART2_SIZE SZ_4K
98
99#define MSM_UART3_PHYS 0xACC00000
100#define MSM_UART3_SIZE SZ_4K
101
102#ifdef CONFIG_MSM_DEBUG_UART
103#define MSM_DEBUG_UART_BASE 0xE1000000
104#if CONFIG_MSM_DEBUG_UART == 1
105#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
106#elif CONFIG_MSM_DEBUG_UART == 2
107#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
108#elif CONFIG_MSM_DEBUG_UART == 3
109#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
110#endif
111#define MSM_DEBUG_UART_SIZE SZ_4K
112#endif
113
114#define MSM_MDC_BASE IOMEM(0xE0200000)
115#define MSM_MDC_PHYS 0xAA500000
116#define MSM_MDC_SIZE SZ_1M
117
118#define MSM_AD5_BASE IOMEM(0xE0300000)
119#define MSM_AD5_PHYS 0xA7000000
120#define MSM_AD5_SIZE (SZ_1M*13)
121
122#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
new file mode 100644
index 000000000000..acc819eb76e5
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -0,0 +1,147 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_8X50_H
24#define __ASM_ARCH_MSM_IOMAP_8X50_H
25
26/* Physical base address and size of peripherals.
27 * Ordered by the virtual base addresses they will be mapped at.
28 *
29 * MSM_VIC_BASE must be an value that can be loaded via a "mov"
30 * instruction, otherwise entry-macro.S will not compile.
31 *
32 * If you add or remove entries here, you'll want to edit the
33 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
34 * changes.
35 *
36 */
37
38#define MSM_VIC_BASE IOMEM(0xE0000000)
39#define MSM_VIC_PHYS 0xAC000000
40#define MSM_VIC_SIZE SZ_4K
41
42#define MSM_CSR_BASE IOMEM(0xE0001000)
43#define MSM_CSR_PHYS 0xAC100000
44#define MSM_CSR_SIZE SZ_4K
45
46#define MSM_TMR_PHYS MSM_CSR_PHYS
47#define MSM_TMR_BASE MSM_CSR_BASE
48#define MSM_TMR_SIZE SZ_4K
49
50#define MSM_GPT_BASE MSM_TMR_BASE
51#define MSM_DGT_BASE (MSM_TMR_BASE + 0x10)
52
53#define MSM_DMOV_BASE IOMEM(0xE0002000)
54#define MSM_DMOV_PHYS 0xA9700000
55#define MSM_DMOV_SIZE SZ_4K
56
57#define MSM_GPIO1_BASE IOMEM(0xE0003000)
58#define MSM_GPIO1_PHYS 0xA9000000
59#define MSM_GPIO1_SIZE SZ_4K
60
61#define MSM_GPIO2_BASE IOMEM(0xE0004000)
62#define MSM_GPIO2_PHYS 0xA9100000
63#define MSM_GPIO2_SIZE SZ_4K
64
65#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
66#define MSM_CLK_CTL_PHYS 0xA8600000
67#define MSM_CLK_CTL_SIZE SZ_4K
68
69#define MSM_SIRC_BASE IOMEM(0xE1006000)
70#define MSM_SIRC_PHYS 0xAC200000
71#define MSM_SIRC_SIZE SZ_4K
72
73#define MSM_SCPLL_BASE IOMEM(0xE1007000)
74#define MSM_SCPLL_PHYS 0xA8800000
75#define MSM_SCPLL_SIZE SZ_4K
76
77#ifdef CONFIG_MSM_SOC_REV_A
78#define MSM_SMI_BASE 0xE0000000
79#else
80#define MSM_SMI_BASE 0x00000000
81#endif
82
83#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000)
84#define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000)
85#define MSM_SHARED_RAM_SIZE SZ_1M
86
87#define MSM_UART1_PHYS 0xA9A00000
88#define MSM_UART1_SIZE SZ_4K
89
90#define MSM_UART2_PHYS 0xA9B00000
91#define MSM_UART2_SIZE SZ_4K
92
93#define MSM_UART3_PHYS 0xA9C00000
94#define MSM_UART3_SIZE SZ_4K
95
96#ifdef CONFIG_MSM_DEBUG_UART
97#define MSM_DEBUG_UART_BASE 0xE1000000
98#if CONFIG_MSM_DEBUG_UART == 1
99#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
100#elif CONFIG_MSM_DEBUG_UART == 2
101#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
102#elif CONFIG_MSM_DEBUG_UART == 3
103#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
104#endif
105#define MSM_DEBUG_UART_SIZE SZ_4K
106#endif
107
108#define MSM_MDC_BASE IOMEM(0xE0200000)
109#define MSM_MDC_PHYS 0xAA500000
110#define MSM_MDC_SIZE SZ_1M
111
112#define MSM_AD5_BASE IOMEM(0xE0300000)
113#define MSM_AD5_PHYS 0xAC000000
114#define MSM_AD5_SIZE (SZ_1M*13)
115
116
117#define MSM_I2C_SIZE SZ_4K
118#define MSM_I2C_PHYS 0xA9900000
119
120#define MSM_HSUSB_PHYS 0xA0800000
121#define MSM_HSUSB_SIZE SZ_1K
122
123#define MSM_NAND_PHYS 0xA0A00000
124
125
126#define MSM_TSIF_PHYS (0xa0100000)
127#define MSM_TSIF_SIZE (0x200)
128
129#define MSM_TSSC_PHYS 0xAA300000
130
131#define MSM_UART1DM_PHYS 0xA0200000
132#define MSM_UART2DM_PHYS 0xA0900000
133
134
135#define MSM_SDC1_PHYS 0xA0400000
136#define MSM_SDC1_SIZE SZ_4K
137
138#define MSM_SDC2_PHYS 0xA0500000
139#define MSM_SDC2_SIZE SZ_4K
140
141#define MSM_SDC3_PHYS 0xA0600000
142#define MSM_SDC3_SIZE SZ_4K
143
144#define MSM_SDC4_PHYS 0xA0700000
145#define MSM_SDC4_SIZE SZ_4K
146
147#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 9dae1a98c77a..e6b1821cc4ea 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -1,6 +1,6 @@
1/* arch/arm/mach-msm/include/mach/msm_iomap.h 1/*
2 *
3 * Copyright (C) 2007 Google, Inc. 2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com> 4 * Author: Brian Swetland <swetland@google.com>
5 * 5 *
6 * This software is licensed under the terms of the GNU General Public 6 * This software is licensed under the terms of the GNU General Public
@@ -43,91 +43,12 @@
43#define IOMEM(x) ((void __force __iomem *)(x)) 43#define IOMEM(x) ((void __force __iomem *)(x))
44#endif 44#endif
45 45
46#define MSM_VIC_BASE IOMEM(0xE0000000) 46#if defined(CONFIG_ARCH_MSM7X30)
47#define MSM_VIC_PHYS 0xC0000000 47#include "msm_iomap-7x30.h"
48#define MSM_VIC_SIZE SZ_4K 48#elif defined(CONFIG_ARCH_QSD8X50)
49 49#include "msm_iomap-8x50.h"
50#define MSM_CSR_BASE IOMEM(0xE0001000) 50#else
51#define MSM_CSR_PHYS 0xC0100000 51#include "msm_iomap-7x00.h"
52#define MSM_CSR_SIZE SZ_4K
53
54#define MSM_GPT_PHYS MSM_CSR_PHYS
55#define MSM_GPT_BASE MSM_CSR_BASE
56#define MSM_GPT_SIZE SZ_4K
57
58#define MSM_DMOV_BASE IOMEM(0xE0002000)
59#define MSM_DMOV_PHYS 0xA9700000
60#define MSM_DMOV_SIZE SZ_4K
61
62#define MSM_GPIO1_BASE IOMEM(0xE0003000)
63#define MSM_GPIO1_PHYS 0xA9200000
64#define MSM_GPIO1_SIZE SZ_4K
65
66#define MSM_GPIO2_BASE IOMEM(0xE0004000)
67#define MSM_GPIO2_PHYS 0xA9300000
68#define MSM_GPIO2_SIZE SZ_4K
69
70#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
71#define MSM_CLK_CTL_PHYS 0xA8600000
72#define MSM_CLK_CTL_SIZE SZ_4K
73
74#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000)
75#define MSM_SHARED_RAM_PHYS 0x01F00000
76#define MSM_SHARED_RAM_SIZE SZ_1M
77
78#define MSM_UART1_PHYS 0xA9A00000
79#define MSM_UART1_SIZE SZ_4K
80
81#define MSM_UART2_PHYS 0xA9B00000
82#define MSM_UART2_SIZE SZ_4K
83
84#define MSM_UART3_PHYS 0xA9C00000
85#define MSM_UART3_SIZE SZ_4K
86
87#ifdef CONFIG_MSM_DEBUG_UART
88#define MSM_DEBUG_UART_BASE 0xE1000000
89#if CONFIG_MSM_DEBUG_UART == 1
90#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
91#elif CONFIG_MSM_DEBUG_UART == 2
92#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
93#elif CONFIG_MSM_DEBUG_UART == 3
94#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
95#endif
96#define MSM_DEBUG_UART_SIZE SZ_4K
97#endif 52#endif
98 53
99#define MSM_SDC1_PHYS 0xA0400000
100#define MSM_SDC1_SIZE SZ_4K
101
102#define MSM_SDC2_PHYS 0xA0500000
103#define MSM_SDC2_SIZE SZ_4K
104
105#define MSM_SDC3_PHYS 0xA0600000
106#define MSM_SDC3_SIZE SZ_4K
107
108#define MSM_SDC4_PHYS 0xA0700000
109#define MSM_SDC4_SIZE SZ_4K
110
111#define MSM_I2C_PHYS 0xA9900000
112#define MSM_I2C_SIZE SZ_4K
113
114#define MSM_HSUSB_PHYS 0xA0800000
115#define MSM_HSUSB_SIZE SZ_4K
116
117#define MSM_PMDH_PHYS 0xAA600000
118#define MSM_PMDH_SIZE SZ_4K
119
120#define MSM_EMDH_PHYS 0xAA700000
121#define MSM_EMDH_SIZE SZ_4K
122
123#define MSM_MDP_PHYS 0xAA200000
124#define MSM_MDP_SIZE 0x000F0000
125
126#define MSM_MDC_PHYS 0xAA500000
127#define MSM_MDC_SIZE SZ_1M
128
129#define MSM_AD5_PHYS 0xAC000000
130#define MSM_AD5_SIZE (SZ_1M*13)
131
132
133#endif 54#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_smd.h b/arch/arm/mach-msm/include/mach/msm_smd.h
new file mode 100644
index 000000000000..029463ec8756
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_smd.h
@@ -0,0 +1,109 @@
1/* linux/include/asm-arm/arch-msm/msm_smd.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ASM_ARCH_MSM_SMD_H
18#define __ASM_ARCH_MSM_SMD_H
19
20typedef struct smd_channel smd_channel_t;
21
22extern int (*msm_check_for_modem_crash)(void);
23
24/* warning: notify() may be called before open returns */
25int smd_open(const char *name, smd_channel_t **ch, void *priv,
26 void (*notify)(void *priv, unsigned event));
27
28#define SMD_EVENT_DATA 1
29#define SMD_EVENT_OPEN 2
30#define SMD_EVENT_CLOSE 3
31
32int smd_close(smd_channel_t *ch);
33
34/* passing a null pointer for data reads and discards */
35int smd_read(smd_channel_t *ch, void *data, int len);
36
37/* Write to stream channels may do a partial write and return
38** the length actually written.
39** Write to packet channels will never do a partial write --
40** it will return the requested length written or an error.
41*/
42int smd_write(smd_channel_t *ch, const void *data, int len);
43int smd_write_atomic(smd_channel_t *ch, const void *data, int len);
44
45int smd_write_avail(smd_channel_t *ch);
46int smd_read_avail(smd_channel_t *ch);
47
48/* Returns the total size of the current packet being read.
49** Returns 0 if no packets available or a stream channel.
50*/
51int smd_cur_packet_size(smd_channel_t *ch);
52
53/* used for tty unthrottling and the like -- causes the notify()
54** callback to be called from the same lock context as is used
55** when it is called from channel updates
56*/
57void smd_kick(smd_channel_t *ch);
58
59
60#if 0
61/* these are interruptable waits which will block you until the specified
62** number of bytes are readable or writable.
63*/
64int smd_wait_until_readable(smd_channel_t *ch, int bytes);
65int smd_wait_until_writable(smd_channel_t *ch, int bytes);
66#endif
67
68typedef enum {
69 SMD_PORT_DS = 0,
70 SMD_PORT_DIAG,
71 SMD_PORT_RPC_CALL,
72 SMD_PORT_RPC_REPLY,
73 SMD_PORT_BT,
74 SMD_PORT_CONTROL,
75 SMD_PORT_MEMCPY_SPARE1,
76 SMD_PORT_DATA1,
77 SMD_PORT_DATA2,
78 SMD_PORT_DATA3,
79 SMD_PORT_DATA4,
80 SMD_PORT_DATA5,
81 SMD_PORT_DATA6,
82 SMD_PORT_DATA7,
83 SMD_PORT_DATA8,
84 SMD_PORT_DATA9,
85 SMD_PORT_DATA10,
86 SMD_PORT_DATA11,
87 SMD_PORT_DATA12,
88 SMD_PORT_DATA13,
89 SMD_PORT_DATA14,
90 SMD_PORT_DATA15,
91 SMD_PORT_DATA16,
92 SMD_PORT_DATA17,
93 SMD_PORT_DATA18,
94 SMD_PORT_DATA19,
95 SMD_PORT_DATA20,
96 SMD_PORT_GPS_NMEA,
97 SMD_PORT_BRIDGE_1,
98 SMD_PORT_BRIDGE_2,
99 SMD_PORT_BRIDGE_3,
100 SMD_PORT_BRIDGE_4,
101 SMD_PORT_BRIDGE_5,
102 SMD_PORT_LOOPBACK,
103 SMD_PORT_CS_APPS_MODEM,
104 SMD_PORT_CS_APPS_DSP,
105 SMD_PORT_CS_MODEM_DSP,
106 SMD_NUM_PORTS,
107} smd_port_id_type;
108
109#endif
diff --git a/arch/arm/mach-msm/include/mach/sirc.h b/arch/arm/mach-msm/include/mach/sirc.h
new file mode 100644
index 000000000000..7281337ee28d
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/sirc.h
@@ -0,0 +1,115 @@
1/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#ifndef __ASM_ARCH_MSM_SIRC_H
31#define __ASM_ARCH_MSM_SIRC_H
32
33struct sirc_regs_t {
34 void *int_enable;
35 void *int_enable_clear;
36 void *int_enable_set;
37 void *int_type;
38 void *int_polarity;
39 void *int_clear;
40};
41
42struct sirc_cascade_regs {
43 void *int_status;
44 unsigned int cascade_irq;
45};
46
47void msm_init_sirc(void);
48void msm_sirc_enter_sleep(void);
49void msm_sirc_exit_sleep(void);
50
51#if defined(CONFIG_ARCH_MSM_SCORPION)
52
53#include <mach/msm_iomap.h>
54
55/*
56 * Secondary interrupt controller interrupts
57 */
58
59#define FIRST_SIRC_IRQ (NR_MSM_IRQS + NR_GPIO_IRQS)
60
61#define INT_UART1 (FIRST_SIRC_IRQ + 0)
62#define INT_UART2 (FIRST_SIRC_IRQ + 1)
63#define INT_UART3 (FIRST_SIRC_IRQ + 2)
64#define INT_UART1_RX (FIRST_SIRC_IRQ + 3)
65#define INT_UART2_RX (FIRST_SIRC_IRQ + 4)
66#define INT_UART3_RX (FIRST_SIRC_IRQ + 5)
67#define INT_SPI_INPUT (FIRST_SIRC_IRQ + 6)
68#define INT_SPI_OUTPUT (FIRST_SIRC_IRQ + 7)
69#define INT_SPI_ERROR (FIRST_SIRC_IRQ + 8)
70#define INT_GPIO_GROUP1 (FIRST_SIRC_IRQ + 9)
71#define INT_GPIO_GROUP2 (FIRST_SIRC_IRQ + 10)
72#define INT_GPIO_GROUP1_SECURE (FIRST_SIRC_IRQ + 11)
73#define INT_GPIO_GROUP2_SECURE (FIRST_SIRC_IRQ + 12)
74#define INT_AVS_SVIC (FIRST_SIRC_IRQ + 13)
75#define INT_AVS_REQ_UP (FIRST_SIRC_IRQ + 14)
76#define INT_AVS_REQ_DOWN (FIRST_SIRC_IRQ + 15)
77#define INT_PBUS_ERR (FIRST_SIRC_IRQ + 16)
78#define INT_AXI_ERR (FIRST_SIRC_IRQ + 17)
79#define INT_SMI_ERR (FIRST_SIRC_IRQ + 18)
80#define INT_EBI1_ERR (FIRST_SIRC_IRQ + 19)
81#define INT_IMEM_ERR (FIRST_SIRC_IRQ + 20)
82#define INT_TEMP_SENSOR (FIRST_SIRC_IRQ + 21)
83#define INT_TV_ENC (FIRST_SIRC_IRQ + 22)
84#define INT_GRP2D (FIRST_SIRC_IRQ + 23)
85#define INT_GSBI_QUP (FIRST_SIRC_IRQ + 24)
86#define INT_SC_ACG (FIRST_SIRC_IRQ + 25)
87#define INT_WDT0 (FIRST_SIRC_IRQ + 26)
88#define INT_WDT1 (FIRST_SIRC_IRQ + 27)
89
90#if defined(CONFIG_MSM_SOC_REV_A)
91#define NR_SIRC_IRQS 28
92#define SIRC_MASK 0x0FFFFFFF
93#else
94#define NR_SIRC_IRQS 23
95#define SIRC_MASK 0x007FFFFF
96#endif
97
98#define LAST_SIRC_IRQ (FIRST_SIRC_IRQ + NR_SIRC_IRQS - 1)
99
100#define SPSS_SIRC_INT_SELECT (MSM_SIRC_BASE + 0x00)
101#define SPSS_SIRC_INT_ENABLE (MSM_SIRC_BASE + 0x04)
102#define SPSS_SIRC_INT_ENABLE_CLEAR (MSM_SIRC_BASE + 0x08)
103#define SPSS_SIRC_INT_ENABLE_SET (MSM_SIRC_BASE + 0x0C)
104#define SPSS_SIRC_INT_TYPE (MSM_SIRC_BASE + 0x10)
105#define SPSS_SIRC_INT_POLARITY (MSM_SIRC_BASE + 0x14)
106#define SPSS_SIRC_SECURITY (MSM_SIRC_BASE + 0x18)
107#define SPSS_SIRC_IRQ_STATUS (MSM_SIRC_BASE + 0x1C)
108#define SPSS_SIRC_IRQ1_STATUS (MSM_SIRC_BASE + 0x20)
109#define SPSS_SIRC_RAW_STATUS (MSM_SIRC_BASE + 0x24)
110#define SPSS_SIRC_INT_CLEAR (MSM_SIRC_BASE + 0x28)
111#define SPSS_SIRC_SOFT_INT (MSM_SIRC_BASE + 0x2C)
112
113#endif
114
115#endif
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index 574ccc493daf..d2e83f42ba16 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -21,3 +21,8 @@ static inline void arch_reset(char mode, const char *cmd)
21{ 21{
22 for (;;) ; /* depends on IPC w/ other core */ 22 for (;;) ; /* depends on IPC w/ other core */
23} 23}
24
25/* low level hardware reset hook -- for example, hitting the
26 * PSHOLD line on the PMIC to hard reset the system
27 */
28extern void (*msm_hw_reset_hook)(void);
diff --git a/arch/arm/mach-msm/include/mach/vreg.h b/arch/arm/mach-msm/include/mach/vreg.h
index 9f9e25cb718e..6626e7864e28 100644
--- a/arch/arm/mach-msm/include/mach/vreg.h
+++ b/arch/arm/mach-msm/include/mach/vreg.h
@@ -23,7 +23,7 @@ struct vreg *vreg_get(struct device *dev, const char *id);
23void vreg_put(struct vreg *vreg); 23void vreg_put(struct vreg *vreg);
24 24
25int vreg_enable(struct vreg *vreg); 25int vreg_enable(struct vreg *vreg);
26void vreg_disable(struct vreg *vreg); 26int vreg_disable(struct vreg *vreg);
27int vreg_set_level(struct vreg *vreg, unsigned mv); 27int vreg_set_level(struct vreg *vreg, unsigned mv);
28 28
29#endif 29#endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 05f96b780aa6..1c05060b5f3b 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -1,8 +1,9 @@
1/* arch/arm/mach-msm/io.c 1/* arch/arm/mach-msm/io.c
2 * 2 *
3 * MSM7K io support 3 * MSM7K, QSD io support
4 * 4 *
5 * Copyright (C) 2007 Google, Inc. 5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
6 * Author: Brian Swetland <swetland@google.com> 7 * Author: Brian Swetland <swetland@google.com>
7 * 8 *
8 * This software is licensed under the terms of the GNU General Public 9 * This software is licensed under the terms of the GNU General Public
@@ -34,6 +35,8 @@
34 .type = MT_DEVICE_NONSHARED, \ 35 .type = MT_DEVICE_NONSHARED, \
35 } 36 }
36 37
38#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X27) \
39 || defined(CONFIG_ARCH_MSM7X25)
37static struct map_desc msm_io_desc[] __initdata = { 40static struct map_desc msm_io_desc[] __initdata = {
38 MSM_DEVICE(VIC), 41 MSM_DEVICE(VIC),
39 MSM_DEVICE(CSR), 42 MSM_DEVICE(CSR),
@@ -45,9 +48,12 @@ static struct map_desc msm_io_desc[] __initdata = {
45#ifdef CONFIG_MSM_DEBUG_UART 48#ifdef CONFIG_MSM_DEBUG_UART
46 MSM_DEVICE(DEBUG_UART), 49 MSM_DEVICE(DEBUG_UART),
47#endif 50#endif
51#ifdef CONFIG_ARCH_MSM7X30
52 MSM_DEVICE(GCC),
53#endif
48 { 54 {
49 .virtual = (unsigned long) MSM_SHARED_RAM_BASE, 55 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
50 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 56 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
51 .length = MSM_SHARED_RAM_SIZE, 57 .length = MSM_SHARED_RAM_SIZE,
52 .type = MT_DEVICE, 58 .type = MT_DEVICE,
53 }, 59 },
@@ -60,9 +66,72 @@ void __init msm_map_common_io(void)
60 * pages are peripheral interface or not. 66 * pages are peripheral interface or not.
61 */ 67 */
62 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); 68 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
63
64 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc)); 69 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
65} 70}
71#endif
72
73#ifdef CONFIG_ARCH_QSD8X50
74static struct map_desc qsd8x50_io_desc[] __initdata = {
75 MSM_DEVICE(VIC),
76 MSM_DEVICE(CSR),
77 MSM_DEVICE(TMR),
78 MSM_DEVICE(DMOV),
79 MSM_DEVICE(GPIO1),
80 MSM_DEVICE(GPIO2),
81 MSM_DEVICE(CLK_CTL),
82 MSM_DEVICE(SIRC),
83 MSM_DEVICE(SCPLL),
84 MSM_DEVICE(AD5),
85 MSM_DEVICE(MDC),
86#ifdef CONFIG_MSM_DEBUG_UART
87 MSM_DEVICE(DEBUG_UART),
88#endif
89 {
90 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
91 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
92 .length = MSM_SHARED_RAM_SIZE,
93 .type = MT_DEVICE,
94 },
95};
96
97void __init msm_map_qsd8x50_io(void)
98{
99 iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
100}
101#endif /* CONFIG_ARCH_QSD8X50 */
102
103#ifdef CONFIG_ARCH_MSM7X30
104static struct map_desc msm7x30_io_desc[] __initdata = {
105 MSM_DEVICE(VIC),
106 MSM_DEVICE(CSR),
107 MSM_DEVICE(TMR),
108 MSM_DEVICE(DMOV),
109 MSM_DEVICE(GPIO1),
110 MSM_DEVICE(GPIO2),
111 MSM_DEVICE(CLK_CTL),
112 MSM_DEVICE(CLK_CTL_SH2),
113 MSM_DEVICE(AD5),
114 MSM_DEVICE(MDC),
115 MSM_DEVICE(ACC),
116 MSM_DEVICE(SAW),
117 MSM_DEVICE(GCC),
118 MSM_DEVICE(TCSR),
119#ifdef CONFIG_MSM_DEBUG_UART
120 MSM_DEVICE(DEBUG_UART),
121#endif
122 {
123 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
124 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
125 .length = MSM_SHARED_RAM_SIZE,
126 .type = MT_DEVICE,
127 },
128};
129
130void __init msm_map_msm7x30_io(void)
131{
132 iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
133}
134#endif /* CONFIG_ARCH_MSM7X30 */
66 135
67void __iomem * 136void __iomem *
68__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) 137__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c
new file mode 100644
index 000000000000..99f2c3473033
--- /dev/null
+++ b/arch/arm/mach-msm/irq-vic.c
@@ -0,0 +1,365 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/sched.h>
19#include <linux/interrupt.h>
20#include <linux/ptrace.h>
21#include <linux/timer.h>
22#include <linux/irq.h>
23#include <linux/io.h>
24
25#include <asm/cacheflush.h>
26
27#include <mach/hardware.h>
28
29#include <mach/msm_iomap.h>
30
31#include "smd_private.h"
32
33enum {
34 IRQ_DEBUG_SLEEP_INT_TRIGGER = 1U << 0,
35 IRQ_DEBUG_SLEEP_INT = 1U << 1,
36 IRQ_DEBUG_SLEEP_ABORT = 1U << 2,
37 IRQ_DEBUG_SLEEP = 1U << 3,
38 IRQ_DEBUG_SLEEP_REQUEST = 1U << 4,
39};
40static int msm_irq_debug_mask;
41module_param_named(debug_mask, msm_irq_debug_mask, int,
42 S_IRUGO | S_IWUSR | S_IWGRP);
43
44#define VIC_REG(off) (MSM_VIC_BASE + (off))
45#define VIC_INT_TO_REG_ADDR(base, irq) (base + (irq / 32) * 4)
46#define VIC_INT_TO_REG_INDEX(irq) ((irq >> 5) & 3)
47
48#define VIC_INT_SELECT0 VIC_REG(0x0000) /* 1: FIQ, 0: IRQ */
49#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */
50#define VIC_INT_SELECT2 VIC_REG(0x0008) /* 1: FIQ, 0: IRQ */
51#define VIC_INT_SELECT3 VIC_REG(0x000C) /* 1: FIQ, 0: IRQ */
52#define VIC_INT_EN0 VIC_REG(0x0010)
53#define VIC_INT_EN1 VIC_REG(0x0014)
54#define VIC_INT_EN2 VIC_REG(0x0018)
55#define VIC_INT_EN3 VIC_REG(0x001C)
56#define VIC_INT_ENCLEAR0 VIC_REG(0x0020)
57#define VIC_INT_ENCLEAR1 VIC_REG(0x0024)
58#define VIC_INT_ENCLEAR2 VIC_REG(0x0028)
59#define VIC_INT_ENCLEAR3 VIC_REG(0x002C)
60#define VIC_INT_ENSET0 VIC_REG(0x0030)
61#define VIC_INT_ENSET1 VIC_REG(0x0034)
62#define VIC_INT_ENSET2 VIC_REG(0x0038)
63#define VIC_INT_ENSET3 VIC_REG(0x003C)
64#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */
65#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */
66#define VIC_INT_TYPE2 VIC_REG(0x0048) /* 1: EDGE, 0: LEVEL */
67#define VIC_INT_TYPE3 VIC_REG(0x004C) /* 1: EDGE, 0: LEVEL */
68#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */
69#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */
70#define VIC_INT_POLARITY2 VIC_REG(0x0058) /* 1: NEG, 0: POS */
71#define VIC_INT_POLARITY3 VIC_REG(0x005C) /* 1: NEG, 0: POS */
72#define VIC_NO_PEND_VAL VIC_REG(0x0060)
73
74#if defined(CONFIG_ARCH_MSM_SCORPION)
75#define VIC_NO_PEND_VAL_FIQ VIC_REG(0x0064)
76#define VIC_INT_MASTEREN VIC_REG(0x0068) /* 1: IRQ, 2: FIQ */
77#define VIC_CONFIG VIC_REG(0x006C) /* 1: USE SC VIC */
78#else
79#define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */
80#define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */
81#define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */
82#endif
83
84#define VIC_IRQ_STATUS0 VIC_REG(0x0080)
85#define VIC_IRQ_STATUS1 VIC_REG(0x0084)
86#define VIC_IRQ_STATUS2 VIC_REG(0x0088)
87#define VIC_IRQ_STATUS3 VIC_REG(0x008C)
88#define VIC_FIQ_STATUS0 VIC_REG(0x0090)
89#define VIC_FIQ_STATUS1 VIC_REG(0x0094)
90#define VIC_FIQ_STATUS2 VIC_REG(0x0098)
91#define VIC_FIQ_STATUS3 VIC_REG(0x009C)
92#define VIC_RAW_STATUS0 VIC_REG(0x00A0)
93#define VIC_RAW_STATUS1 VIC_REG(0x00A4)
94#define VIC_RAW_STATUS2 VIC_REG(0x00A8)
95#define VIC_RAW_STATUS3 VIC_REG(0x00AC)
96#define VIC_INT_CLEAR0 VIC_REG(0x00B0)
97#define VIC_INT_CLEAR1 VIC_REG(0x00B4)
98#define VIC_INT_CLEAR2 VIC_REG(0x00B8)
99#define VIC_INT_CLEAR3 VIC_REG(0x00BC)
100#define VIC_SOFTINT0 VIC_REG(0x00C0)
101#define VIC_SOFTINT1 VIC_REG(0x00C4)
102#define VIC_SOFTINT2 VIC_REG(0x00C8)
103#define VIC_SOFTINT3 VIC_REG(0x00CC)
104#define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */
105#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */
106#define VIC_IRQ_VEC_WR VIC_REG(0x00D8)
107
108#if defined(CONFIG_ARCH_MSM_SCORPION)
109#define VIC_FIQ_VEC_RD VIC_REG(0x00DC)
110#define VIC_FIQ_VEC_PEND_RD VIC_REG(0x00E0)
111#define VIC_FIQ_VEC_WR VIC_REG(0x00E4)
112#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E8)
113#define VIC_IRQ_IN_STACK VIC_REG(0x00EC)
114#define VIC_FIQ_IN_SERVICE VIC_REG(0x00F0)
115#define VIC_FIQ_IN_STACK VIC_REG(0x00F4)
116#define VIC_TEST_BUS_SEL VIC_REG(0x00F8)
117#define VIC_IRQ_CTRL_CONFIG VIC_REG(0x00FC)
118#else
119#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E0)
120#define VIC_IRQ_IN_STACK VIC_REG(0x00E4)
121#define VIC_TEST_BUS_SEL VIC_REG(0x00E8)
122#endif
123
124#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4))
125#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4))
126
127#if defined(CONFIG_ARCH_MSM7X30)
128#define VIC_NUM_REGS 4
129#else
130#define VIC_NUM_REGS 2
131#endif
132
133#if VIC_NUM_REGS == 2
134#define DPRINT_REGS(base_reg, format, ...) \
135 printk(KERN_INFO format " %x %x\n", ##__VA_ARGS__, \
136 readl(base_reg ## 0), readl(base_reg ## 1))
137#define DPRINT_ARRAY(array, format, ...) \
138 printk(KERN_INFO format " %x %x\n", ##__VA_ARGS__, \
139 array[0], array[1])
140#elif VIC_NUM_REGS == 4
141#define DPRINT_REGS(base_reg, format, ...) \
142 printk(KERN_INFO format " %x %x %x %x\n", ##__VA_ARGS__, \
143 readl(base_reg ## 0), readl(base_reg ## 1), \
144 readl(base_reg ## 2), readl(base_reg ## 3))
145#define DPRINT_ARRAY(array, format, ...) \
146 printk(KERN_INFO format " %x %x %x %x\n", ##__VA_ARGS__, \
147 array[0], array[1], \
148 array[2], array[3])
149#else
150#error "VIC_NUM_REGS set to illegal value"
151#endif
152
153static uint32_t msm_irq_smsm_wake_enable[2];
154static struct {
155 uint32_t int_en[2];
156 uint32_t int_type;
157 uint32_t int_polarity;
158 uint32_t int_select;
159} msm_irq_shadow_reg[VIC_NUM_REGS];
160static uint32_t msm_irq_idle_disable[VIC_NUM_REGS];
161
162#define SMSM_FAKE_IRQ (0xff)
163static uint8_t msm_irq_to_smsm[NR_IRQS] = {
164 [INT_MDDI_EXT] = 1,
165 [INT_MDDI_PRI] = 2,
166 [INT_MDDI_CLIENT] = 3,
167 [INT_USB_OTG] = 4,
168
169 [INT_PWB_I2C] = 5,
170 [INT_SDC1_0] = 6,
171 [INT_SDC1_1] = 7,
172 [INT_SDC2_0] = 8,
173
174 [INT_SDC2_1] = 9,
175 [INT_ADSP_A9_A11] = 10,
176 [INT_UART1] = 11,
177 [INT_UART2] = 12,
178
179 [INT_UART3] = 13,
180 [INT_UART1_RX] = 14,
181 [INT_UART2_RX] = 15,
182 [INT_UART3_RX] = 16,
183
184 [INT_UART1DM_IRQ] = 17,
185 [INT_UART1DM_RX] = 18,
186 [INT_KEYSENSE] = 19,
187#if !defined(CONFIG_ARCH_MSM7X30)
188 [INT_AD_HSSD] = 20,
189#endif
190
191 [INT_NAND_WR_ER_DONE] = 21,
192 [INT_NAND_OP_DONE] = 22,
193 [INT_TCHSCRN1] = 23,
194 [INT_TCHSCRN2] = 24,
195
196 [INT_TCHSCRN_SSBI] = 25,
197 [INT_USB_HS] = 26,
198 [INT_UART2DM_RX] = 27,
199 [INT_UART2DM_IRQ] = 28,
200
201 [INT_SDC4_1] = 29,
202 [INT_SDC4_0] = 30,
203 [INT_SDC3_1] = 31,
204 [INT_SDC3_0] = 32,
205
206 /* fake wakeup interrupts */
207 [INT_GPIO_GROUP1] = SMSM_FAKE_IRQ,
208 [INT_GPIO_GROUP2] = SMSM_FAKE_IRQ,
209 [INT_A9_M2A_0] = SMSM_FAKE_IRQ,
210 [INT_A9_M2A_1] = SMSM_FAKE_IRQ,
211 [INT_A9_M2A_5] = SMSM_FAKE_IRQ,
212 [INT_GP_TIMER_EXP] = SMSM_FAKE_IRQ,
213 [INT_DEBUG_TIMER_EXP] = SMSM_FAKE_IRQ,
214 [INT_ADSP_A11] = SMSM_FAKE_IRQ,
215#ifdef CONFIG_ARCH_QSD8X50
216 [INT_SIRC_0] = SMSM_FAKE_IRQ,
217 [INT_SIRC_1] = SMSM_FAKE_IRQ,
218#endif
219};
220
221static inline void msm_irq_write_all_regs(void __iomem *base, unsigned int val)
222{
223 int i;
224
225 for (i = 0; i < VIC_NUM_REGS; i++)
226 writel(val, base + (i * 4));
227}
228
229static void msm_irq_ack(unsigned int irq)
230{
231 void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq);
232 irq = 1 << (irq & 31);
233 writel(irq, reg);
234}
235
236static void msm_irq_mask(unsigned int irq)
237{
238 void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, irq);
239 unsigned index = VIC_INT_TO_REG_INDEX(irq);
240 uint32_t mask = 1UL << (irq & 31);
241 int smsm_irq = msm_irq_to_smsm[irq];
242
243 msm_irq_shadow_reg[index].int_en[0] &= ~mask;
244 writel(mask, reg);
245 if (smsm_irq == 0)
246 msm_irq_idle_disable[index] &= ~mask;
247 else {
248 mask = 1UL << (smsm_irq - 1);
249 msm_irq_smsm_wake_enable[0] &= ~mask;
250 }
251}
252
253static void msm_irq_unmask(unsigned int irq)
254{
255 void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, irq);
256 unsigned index = VIC_INT_TO_REG_INDEX(irq);
257 uint32_t mask = 1UL << (irq & 31);
258 int smsm_irq = msm_irq_to_smsm[irq];
259
260 msm_irq_shadow_reg[index].int_en[0] |= mask;
261 writel(mask, reg);
262
263 if (smsm_irq == 0)
264 msm_irq_idle_disable[index] |= mask;
265 else {
266 mask = 1UL << (smsm_irq - 1);
267 msm_irq_smsm_wake_enable[0] |= mask;
268 }
269}
270
271static int msm_irq_set_wake(unsigned int irq, unsigned int on)
272{
273 unsigned index = VIC_INT_TO_REG_INDEX(irq);
274 uint32_t mask = 1UL << (irq & 31);
275 int smsm_irq = msm_irq_to_smsm[irq];
276
277 if (smsm_irq == 0) {
278 printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", irq);
279 return -EINVAL;
280 }
281 if (on)
282 msm_irq_shadow_reg[index].int_en[1] |= mask;
283 else
284 msm_irq_shadow_reg[index].int_en[1] &= ~mask;
285
286 if (smsm_irq == SMSM_FAKE_IRQ)
287 return 0;
288
289 mask = 1UL << (smsm_irq - 1);
290 if (on)
291 msm_irq_smsm_wake_enable[1] |= mask;
292 else
293 msm_irq_smsm_wake_enable[1] &= ~mask;
294 return 0;
295}
296
297static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
298{
299 void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, irq);
300 void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, irq);
301 unsigned index = VIC_INT_TO_REG_INDEX(irq);
302 int b = 1 << (irq & 31);
303 uint32_t polarity;
304 uint32_t type;
305
306 polarity = msm_irq_shadow_reg[index].int_polarity;
307 if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
308 polarity |= b;
309 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH))
310 polarity &= ~b;
311 writel(polarity, preg);
312 msm_irq_shadow_reg[index].int_polarity = polarity;
313
314 type = msm_irq_shadow_reg[index].int_type;
315 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
316 type |= b;
317 irq_desc[irq].handle_irq = handle_edge_irq;
318 }
319 if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
320 type &= ~b;
321 irq_desc[irq].handle_irq = handle_level_irq;
322 }
323 writel(type, treg);
324 msm_irq_shadow_reg[index].int_type = type;
325 return 0;
326}
327
328static struct irq_chip msm_irq_chip = {
329 .name = "msm",
330 .disable = msm_irq_mask,
331 .ack = msm_irq_ack,
332 .mask = msm_irq_mask,
333 .unmask = msm_irq_unmask,
334 .set_wake = msm_irq_set_wake,
335 .set_type = msm_irq_set_type,
336};
337
338void __init msm_init_irq(void)
339{
340 unsigned n;
341
342 /* select level interrupts */
343 msm_irq_write_all_regs(VIC_INT_TYPE0, 0);
344
345 /* select highlevel interrupts */
346 msm_irq_write_all_regs(VIC_INT_POLARITY0, 0);
347
348 /* select IRQ for all INTs */
349 msm_irq_write_all_regs(VIC_INT_SELECT0, 0);
350
351 /* disable all INTs */
352 msm_irq_write_all_regs(VIC_INT_EN0, 0);
353
354 /* don't use vic */
355 writel(0, VIC_CONFIG);
356
357 /* enable interrupt controller */
358 writel(3, VIC_INT_MASTEREN);
359
360 for (n = 0; n < NR_MSM_IRQS; n++) {
361 set_irq_chip(n, &msm_irq_chip);
362 set_irq_handler(n, handle_level_irq);
363 set_irq_flags(n, IRQF_VALID);
364 }
365}
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 69ca0dd79bdf..6c8d5f8caef3 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -101,11 +101,11 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
101 101
102 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { 102 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
103 writel(readl(treg) | b, treg); 103 writel(readl(treg) | b, treg);
104 set_irq_handler(irq, handle_edge_irq); 104 irq_desc[irq].handle_irq = handle_edge_irq;
105 } 105 }
106 if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { 106 if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
107 writel(readl(treg) & (~b), treg); 107 writel(readl(treg) & (~b), treg);
108 set_irq_handler(irq, handle_level_irq); 108 irq_desc[irq].handle_irq = handle_level_irq;
109 } 109 }
110 return 0; 110 return 0;
111} 111}
diff --git a/arch/arm/mach-msm/last_radio_log.c b/arch/arm/mach-msm/last_radio_log.c
new file mode 100644
index 000000000000..b64ba5a98686
--- /dev/null
+++ b/arch/arm/mach-msm/last_radio_log.c
@@ -0,0 +1,82 @@
1/* arch/arm/mach-msm/last_radio_log.c
2 *
3 * Extract the log from a modem crash though SMEM
4 *
5 * Copyright (C) 2007 Google, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/fs.h>
21#include <linux/proc_fs.h>
22#include <linux/uaccess.h>
23
24#include "smd_private.h"
25
26static void *radio_log_base;
27static size_t radio_log_size;
28
29extern void *smem_item(unsigned id, unsigned *size);
30
31static ssize_t last_radio_log_read(struct file *file, char __user *buf,
32 size_t len, loff_t *offset)
33{
34 loff_t pos = *offset;
35 ssize_t count;
36
37 if (pos >= radio_log_size)
38 return 0;
39
40 count = min(len, (size_t)(radio_log_size - pos));
41 if (copy_to_user(buf, radio_log_base + pos, count)) {
42 pr_err("%s: copy to user failed\n", __func__);
43 return -EFAULT;
44 }
45
46 *offset += count;
47 return count;
48}
49
50static struct file_operations last_radio_log_fops = {
51 .read = last_radio_log_read
52};
53
54void msm_init_last_radio_log(struct module *owner)
55{
56 struct proc_dir_entry *entry;
57
58 if (last_radio_log_fops.owner) {
59 pr_err("%s: already claimed\n", __func__);
60 return;
61 }
62
63 radio_log_base = smem_item(SMEM_CLKREGIM_BSP, &radio_log_size);
64 if (!radio_log_base) {
65 pr_err("%s: could not retrieve SMEM_CLKREGIM_BSP\n", __func__);
66 return;
67 }
68
69 entry = create_proc_entry("last_radio_log", S_IFREG | S_IRUGO, NULL);
70 if (!entry) {
71 pr_err("%s: could not create proc entry for radio log\n",
72 __func__);
73 return;
74 }
75
76 pr_err("%s: last radio log is %d bytes long\n", __func__,
77 radio_log_size);
78 last_radio_log_fops.owner = owner;
79 entry->proc_fops = &last_radio_log_fops;
80 entry->size = radio_log_size;
81}
82EXPORT_SYMBOL(msm_init_last_radio_log);
diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c
index 915ee704ed3c..67e701c7f183 100644
--- a/arch/arm/mach-msm/proc_comm.c
+++ b/arch/arm/mach-msm/proc_comm.c
@@ -23,11 +23,18 @@
23 23
24#include "proc_comm.h" 24#include "proc_comm.h"
25 25
26#define MSM_A2M_INT(n) (MSM_CSR_BASE + 0x400 + (n) * 4) 26static inline void msm_a2m_int(uint32_t irq)
27{
28#if defined(CONFIG_ARCH_MSM7X30)
29 writel(1 << irq, MSM_GCC_BASE + 0x8);
30#else
31 writel(1, MSM_CSR_BASE + 0x400 + (irq * 4));
32#endif
33}
27 34
28static inline void notify_other_proc_comm(void) 35static inline void notify_other_proc_comm(void)
29{ 36{
30 writel(1, MSM_A2M_INT(6)); 37 msm_a2m_int(6);
31} 38}
32 39
33#define APP_COMMAND 0x00 40#define APP_COMMAND 0x00
@@ -107,4 +114,17 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
107 return ret; 114 return ret;
108} 115}
109 116
110 117/*
118 * We need to wait for the ARM9 to at least partially boot
119 * up before we can continue. Since the ARM9 does resource
120 * allocation, if we dont' wait we could end up crashing or in
121 * and unknown state. This function should be called early to
122 * wait on the ARM9.
123 */
124void __init proc_comm_boot_wait(void)
125{
126 void __iomem *base = MSM_SHARED_RAM_BASE;
127
128 proc_comm_wait_for(base + MDM_STATUS, PCOM_READY);
129
130}
diff --git a/arch/arm/mach-msm/proc_comm.h b/arch/arm/mach-msm/proc_comm.h
index 834760f25692..12da4cacd4a8 100644
--- a/arch/arm/mach-msm/proc_comm.h
+++ b/arch/arm/mach-msm/proc_comm.h
@@ -16,6 +16,8 @@
16#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_ 16#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_
17#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_ 17#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_
18 18
19#include <linux/init.h>
20
19enum { 21enum {
20 PCOM_CMD_IDLE = 0x0, 22 PCOM_CMD_IDLE = 0x0,
21 PCOM_CMD_DONE, 23 PCOM_CMD_DONE,
@@ -62,19 +64,104 @@ enum {
62 PCOM_RESET_CHIP_IMM, 64 PCOM_RESET_CHIP_IMM,
63 PCOM_PM_VID_EN, 65 PCOM_PM_VID_EN,
64 PCOM_VREG_PULLDOWN, 66 PCOM_VREG_PULLDOWN,
67 PCOM_GET_MODEM_VERSION,
68 PCOM_CLK_REGIME_SEC_RESET,
69 PCOM_CLK_REGIME_SEC_RESET_ASSERT,
70 PCOM_CLK_REGIME_SEC_RESET_DEASSERT,
71 PCOM_CLK_REGIME_SEC_PLL_REQUEST_WRP,
72 PCOM_CLK_REGIME_SEC_ENABLE,
73 PCOM_CLK_REGIME_SEC_DISABLE,
74 PCOM_CLK_REGIME_SEC_IS_ON,
75 PCOM_CLK_REGIME_SEC_SEL_CLK_INV,
76 PCOM_CLK_REGIME_SEC_SEL_CLK_SRC,
77 PCOM_CLK_REGIME_SEC_SEL_CLK_DIV,
78 PCOM_CLK_REGIME_SEC_ICODEC_CLK_ENABLE,
79 PCOM_CLK_REGIME_SEC_ICODEC_CLK_DISABLE,
80 PCOM_CLK_REGIME_SEC_SEL_SPEED,
81 PCOM_CLK_REGIME_SEC_CONFIG_GP_CLK_WRP,
82 PCOM_CLK_REGIME_SEC_CONFIG_MDH_CLK_WRP,
83 PCOM_CLK_REGIME_SEC_USB_XTAL_ON,
84 PCOM_CLK_REGIME_SEC_USB_XTAL_OFF,
85 PCOM_CLK_REGIME_SEC_SET_QDSP_DME_MODE,
86 PCOM_CLK_REGIME_SEC_SWITCH_ADSP_CLK,
87 PCOM_CLK_REGIME_SEC_GET_MAX_ADSP_CLK_KHZ,
88 PCOM_CLK_REGIME_SEC_GET_I2C_CLK_KHZ,
89 PCOM_CLK_REGIME_SEC_MSM_GET_CLK_FREQ_KHZ,
90 PCOM_CLK_REGIME_SEC_SEL_VFE_SRC,
91 PCOM_CLK_REGIME_SEC_MSM_SEL_CAMCLK,
92 PCOM_CLK_REGIME_SEC_MSM_SEL_LCDCLK,
93 PCOM_CLK_REGIME_SEC_VFE_RAIL_OFF,
94 PCOM_CLK_REGIME_SEC_VFE_RAIL_ON,
95 PCOM_CLK_REGIME_SEC_GRP_RAIL_OFF,
96 PCOM_CLK_REGIME_SEC_GRP_RAIL_ON,
97 PCOM_CLK_REGIME_SEC_VDC_RAIL_OFF,
98 PCOM_CLK_REGIME_SEC_VDC_RAIL_ON,
99 PCOM_CLK_REGIME_SEC_LCD_CTRL,
100 PCOM_CLK_REGIME_SEC_REGISTER_FOR_CPU_RESOURCE,
101 PCOM_CLK_REGIME_SEC_DEREGISTER_FOR_CPU_RESOURCE,
102 PCOM_CLK_REGIME_SEC_RESOURCE_REQUEST_WRP,
103 PCOM_CLK_REGIME_MSM_SEC_SEL_CLK_OWNER,
104 PCOM_CLK_REGIME_SEC_DEVMAN_REQUEST_WRP,
105 PCOM_GPIO_CONFIG,
106 PCOM_GPIO_CONFIGURE_GROUP,
107 PCOM_GPIO_TLMM_SET_PORT,
108 PCOM_GPIO_TLMM_CONFIG_EX,
109 PCOM_SET_FTM_BOOT_COUNT,
110 PCOM_RESERVED0,
111 PCOM_RESERVED1,
112 PCOM_CUSTOMER_CMD1,
113 PCOM_CUSTOMER_CMD2,
114 PCOM_CUSTOMER_CMD3,
115 PCOM_CLK_REGIME_ENTER_APPSBL_CHG_MODE,
116 PCOM_CLK_REGIME_EXIT_APPSBL_CHG_MODE,
117 PCOM_CLK_REGIME_SEC_RAIL_DISABLE,
118 PCOM_CLK_REGIME_SEC_RAIL_ENABLE,
119 PCOM_CLK_REGIME_SEC_RAIL_CONTROL,
120 PCOM_SET_SW_WATCHDOG_STATE,
121 PCOM_PM_MPP_CONFIG_DIGITAL_INPUT,
122 PCOM_PM_MPP_CONFIG_I_SINK,
123 PCOM_RESERVED_101,
124 PCOM_MSM_HSUSB_PHY_RESET,
125 PCOM_GET_BATT_MV_LEVEL,
126 PCOM_CHG_USB_IS_PC_CONNECTED,
127 PCOM_CHG_USB_IS_CHARGER_CONNECTED,
128 PCOM_CHG_USB_IS_DISCONNECTED,
129 PCOM_CHG_USB_IS_AVAILABLE,
130 PCOM_CLK_REGIME_SEC_MSM_SEL_FREQ,
131 PCOM_CLK_REGIME_SEC_SET_PCLK_AXI_POLICY,
132 PCOM_CLKCTL_RPC_RESET_ASSERT,
133 PCOM_CLKCTL_RPC_RESET_DEASSERT,
134 PCOM_CLKCTL_RPC_RAIL_ON,
135 PCOM_CLKCTL_RPC_RAIL_OFF,
136 PCOM_CLKCTL_RPC_RAIL_ENABLE,
137 PCOM_CLKCTL_RPC_RAIL_DISABLE,
138 PCOM_CLKCTL_RPC_RAIL_CONTROL,
139 PCOM_CLKCTL_RPC_MIN_MSMC1,
65 PCOM_NUM_CMDS, 140 PCOM_NUM_CMDS,
66}; 141};
67 142
68enum { 143enum {
69 PCOM_INVALID_STATUS = 0x0, 144 PCOM_INVALID_STATUS = 0x0,
70 PCOM_READY, 145 PCOM_READY,
71 PCOM_CMD_RUNNING, 146 PCOM_CMD_RUNNING,
72 PCOM_CMD_SUCCESS, 147 PCOM_CMD_SUCCESS,
73 PCOM_CMD_FAIL, 148 PCOM_CMD_FAIL,
149 PCOM_CMD_FAIL_FALSE_RETURNED,
150 PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_SERVER,
151 PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_CLIENT,
152 PCOM_CMD_FAIL_CMD_UNREGISTERED,
153 PCOM_CMD_FAIL_CMD_LOCKED,
154 PCOM_CMD_FAIL_SERVER_NOT_YET_READY,
155 PCOM_CMD_FAIL_BAD_DESTINATION,
156 PCOM_CMD_FAIL_SERVER_RESET,
157 PCOM_CMD_FAIL_SMSM_NOT_INIT,
158 PCOM_CMD_FAIL_PROC_COMM_BUSY,
159 PCOM_CMD_FAIL_PROC_COMM_NOT_INIT,
160
74}; 161};
75 162
76/* List of VREGs that support the Pull Down Resistor setting. */ 163/* List of VREGs that support the Pull Down Resistor setting. */
77enum { 164enum vreg_pdown_id {
78 PM_VREG_PDOWN_MSMA_ID, 165 PM_VREG_PDOWN_MSMA_ID,
79 PM_VREG_PDOWN_MSMP_ID, 166 PM_VREG_PDOWN_MSMP_ID,
80 PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */ 167 PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */
@@ -131,6 +218,11 @@ enum {
131 PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID 218 PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID
132}; 219};
133 220
221enum {
222 PCOM_CLKRGM_APPS_RESET_USB_PHY = 34,
223 PCOM_CLKRGM_APPS_RESET_USBH = 37,
224};
225
134/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */ 226/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */
135 227
136#define GPIO_ENABLE 0 228#define GPIO_ENABLE 0
@@ -161,5 +253,6 @@ enum {
161 (((drvstr) & 0xF) << 17)) 253 (((drvstr) & 0xF) << 17))
162 254
163int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2); 255int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2);
256void __init proc_comm_boot_wait(void);
164 257
165#endif 258#endif
diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c
new file mode 100644
index 000000000000..b0794524ba6e
--- /dev/null
+++ b/arch/arm/mach-msm/sirc.c
@@ -0,0 +1,177 @@
1/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 *
17 */
18
19#include <linux/io.h>
20#include <linux/irq.h>
21#include <linux/interrupt.h>
22#include <asm/irq.h>
23
24static unsigned int int_enable;
25static unsigned int wake_enable;
26
27static struct sirc_regs_t sirc_regs = {
28 .int_enable = SPSS_SIRC_INT_ENABLE,
29 .int_enable_clear = SPSS_SIRC_INT_ENABLE_CLEAR,
30 .int_enable_set = SPSS_SIRC_INT_ENABLE_SET,
31 .int_type = SPSS_SIRC_INT_TYPE,
32 .int_polarity = SPSS_SIRC_INT_POLARITY,
33 .int_clear = SPSS_SIRC_INT_CLEAR,
34};
35
36static struct sirc_cascade_regs sirc_reg_table[] = {
37 {
38 .int_status = SPSS_SIRC_IRQ_STATUS,
39 .cascade_irq = INT_SIRC_0,
40 }
41};
42
43static unsigned int save_type;
44static unsigned int save_polarity;
45
46/* Mask off the given interrupt. Keep the int_enable mask in sync with
47 the enable reg, so it can be restored after power collapse. */
48static void sirc_irq_mask(unsigned int irq)
49{
50 unsigned int mask;
51
52
53 mask = 1 << (irq - FIRST_SIRC_IRQ);
54 writel(mask, sirc_regs.int_enable_clear);
55 int_enable &= ~mask;
56 return;
57}
58
59/* Unmask the given interrupt. Keep the int_enable mask in sync with
60 the enable reg, so it can be restored after power collapse. */
61static void sirc_irq_unmask(unsigned int irq)
62{
63 unsigned int mask;
64
65 mask = 1 << (irq - FIRST_SIRC_IRQ);
66 writel(mask, sirc_regs.int_enable_set);
67 int_enable |= mask;
68 return;
69}
70
71static void sirc_irq_ack(unsigned int irq)
72{
73 unsigned int mask;
74
75 mask = 1 << (irq - FIRST_SIRC_IRQ);
76 writel(mask, sirc_regs.int_clear);
77 return;
78}
79
80static int sirc_irq_set_wake(unsigned int irq, unsigned int on)
81{
82 unsigned int mask;
83
84 /* Used to set the interrupt enable mask during power collapse. */
85 mask = 1 << (irq - FIRST_SIRC_IRQ);
86 if (on)
87 wake_enable |= mask;
88 else
89 wake_enable &= ~mask;
90
91 return 0;
92}
93
94static int sirc_irq_set_type(unsigned int irq, unsigned int flow_type)
95{
96 unsigned int mask;
97 unsigned int val;
98
99 mask = 1 << (irq - FIRST_SIRC_IRQ);
100 val = readl(sirc_regs.int_polarity);
101
102 if (flow_type & (IRQF_TRIGGER_LOW | IRQF_TRIGGER_FALLING))
103 val |= mask;
104 else
105 val &= ~mask;
106
107 writel(val, sirc_regs.int_polarity);
108
109 val = readl(sirc_regs.int_type);
110 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
111 val |= mask;
112 irq_desc[irq].handle_irq = handle_edge_irq;
113 } else {
114 val &= ~mask;
115 irq_desc[irq].handle_irq = handle_level_irq;
116 }
117
118 writel(val, sirc_regs.int_type);
119
120 return 0;
121}
122
123/* Finds the pending interrupt on the passed cascade irq and redrives it */
124static void sirc_irq_handler(unsigned int irq, struct irq_desc *desc)
125{
126 unsigned int reg = 0;
127 unsigned int sirq;
128 unsigned int status;
129
130 while ((reg < ARRAY_SIZE(sirc_reg_table)) &&
131 (sirc_reg_table[reg].cascade_irq != irq))
132 reg++;
133
134 status = readl(sirc_reg_table[reg].int_status);
135 status &= SIRC_MASK;
136 if (status == 0)
137 return;
138
139 for (sirq = 0;
140 (sirq < NR_SIRC_IRQS) && ((status & (1U << sirq)) == 0);
141 sirq++)
142 ;
143 generic_handle_irq(sirq+FIRST_SIRC_IRQ);
144
145 desc->chip->ack(irq);
146}
147
148static struct irq_chip sirc_irq_chip = {
149 .name = "sirc",
150 .ack = sirc_irq_ack,
151 .mask = sirc_irq_mask,
152 .unmask = sirc_irq_unmask,
153 .set_wake = sirc_irq_set_wake,
154 .set_type = sirc_irq_set_type,
155};
156
157void __init msm_init_sirc(void)
158{
159 int i;
160
161 int_enable = 0;
162 wake_enable = 0;
163
164 for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) {
165 set_irq_chip(i, &sirc_irq_chip);
166 set_irq_handler(i, handle_edge_irq);
167 set_irq_flags(i, IRQF_VALID);
168 }
169
170 for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) {
171 set_irq_chained_handler(sirc_reg_table[i].cascade_irq,
172 sirc_irq_handler);
173 set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
174 }
175 return;
176}
177
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
new file mode 100644
index 000000000000..cf11d414b425
--- /dev/null
+++ b/arch/arm/mach-msm/smd.c
@@ -0,0 +1,1046 @@
1/* arch/arm/mach-msm/smd.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/fs.h>
20#include <linux/cdev.h>
21#include <linux/device.h>
22#include <linux/wait.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/list.h>
26#include <linux/slab.h>
27#include <linux/debugfs.h>
28#include <linux/delay.h>
29
30#include <mach/msm_smd.h>
31#include <mach/system.h>
32
33#include "smd_private.h"
34#include "proc_comm.h"
35
36#if defined(CONFIG_ARCH_QSD8X50)
37#define CONFIG_QDSP6 1
38#endif
39
40void (*msm_hw_reset_hook)(void);
41
42#define MODULE_NAME "msm_smd"
43
44enum {
45 MSM_SMD_DEBUG = 1U << 0,
46 MSM_SMSM_DEBUG = 1U << 0,
47};
48
49static int msm_smd_debug_mask;
50
51struct shared_info {
52 int ready;
53 unsigned state;
54};
55
56static unsigned dummy_state[SMSM_STATE_COUNT];
57
58static struct shared_info smd_info = {
59 .state = (unsigned) &dummy_state,
60};
61
62module_param_named(debug_mask, msm_smd_debug_mask,
63 int, S_IRUGO | S_IWUSR | S_IWGRP);
64
65static unsigned last_heap_free = 0xffffffff;
66
67static inline void notify_other_smsm(void)
68{
69 msm_a2m_int(5);
70#ifdef CONFIG_QDSP6
71 msm_a2m_int(8);
72#endif
73}
74
75static inline void notify_modem_smd(void)
76{
77 msm_a2m_int(0);
78}
79
80static inline void notify_dsp_smd(void)
81{
82 msm_a2m_int(8);
83}
84
85static void smd_diag(void)
86{
87 char *x;
88
89 x = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG);
90 if (x != 0) {
91 x[SZ_DIAG_ERR_MSG - 1] = 0;
92 pr_info("smem: DIAG '%s'\n", x);
93 }
94}
95
96/* call when SMSM_RESET flag is set in the A9's smsm_state */
97static void handle_modem_crash(void)
98{
99 pr_err("ARM9 has CRASHED\n");
100 smd_diag();
101
102 /* hard reboot if possible */
103 if (msm_hw_reset_hook)
104 msm_hw_reset_hook();
105
106 /* in this case the modem or watchdog should reboot us */
107 for (;;)
108 ;
109}
110
111uint32_t raw_smsm_get_state(enum smsm_state_item item)
112{
113 return readl(smd_info.state + item * 4);
114}
115
116static int check_for_modem_crash(void)
117{
118 if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) {
119 handle_modem_crash();
120 return -1;
121 }
122 return 0;
123}
124
125/* the spinlock is used to synchronize between the
126 * irq handler and code that mutates the channel
127 * list or fiddles with channel state
128 */
129DEFINE_SPINLOCK(smd_lock);
130DEFINE_SPINLOCK(smem_lock);
131
132/* the mutex is used during open() and close()
133 * operations to avoid races while creating or
134 * destroying smd_channel structures
135 */
136static DEFINE_MUTEX(smd_creation_mutex);
137
138static int smd_initialized;
139
140LIST_HEAD(smd_ch_closed_list);
141LIST_HEAD(smd_ch_list_modem);
142LIST_HEAD(smd_ch_list_dsp);
143
144static unsigned char smd_ch_allocated[64];
145static struct work_struct probe_work;
146
147/* how many bytes are available for reading */
148static int smd_stream_read_avail(struct smd_channel *ch)
149{
150 return (ch->recv->head - ch->recv->tail) & ch->fifo_mask;
151}
152
153/* how many bytes we are free to write */
154static int smd_stream_write_avail(struct smd_channel *ch)
155{
156 return ch->fifo_mask -
157 ((ch->send->head - ch->send->tail) & ch->fifo_mask);
158}
159
160static int smd_packet_read_avail(struct smd_channel *ch)
161{
162 if (ch->current_packet) {
163 int n = smd_stream_read_avail(ch);
164 if (n > ch->current_packet)
165 n = ch->current_packet;
166 return n;
167 } else {
168 return 0;
169 }
170}
171
172static int smd_packet_write_avail(struct smd_channel *ch)
173{
174 int n = smd_stream_write_avail(ch);
175 return n > SMD_HEADER_SIZE ? n - SMD_HEADER_SIZE : 0;
176}
177
178static int ch_is_open(struct smd_channel *ch)
179{
180 return (ch->recv->state == SMD_SS_OPENED) &&
181 (ch->send->state == SMD_SS_OPENED);
182}
183
184/* provide a pointer and length to readable data in the fifo */
185static unsigned ch_read_buffer(struct smd_channel *ch, void **ptr)
186{
187 unsigned head = ch->recv->head;
188 unsigned tail = ch->recv->tail;
189 *ptr = (void *) (ch->recv_data + tail);
190
191 if (tail <= head)
192 return head - tail;
193 else
194 return ch->fifo_size - tail;
195}
196
197/* advance the fifo read pointer after data from ch_read_buffer is consumed */
198static void ch_read_done(struct smd_channel *ch, unsigned count)
199{
200 BUG_ON(count > smd_stream_read_avail(ch));
201 ch->recv->tail = (ch->recv->tail + count) & ch->fifo_mask;
202 ch->send->fTAIL = 1;
203}
204
205/* basic read interface to ch_read_{buffer,done} used
206 * by smd_*_read() and update_packet_state()
207 * will read-and-discard if the _data pointer is null
208 */
209static int ch_read(struct smd_channel *ch, void *_data, int len)
210{
211 void *ptr;
212 unsigned n;
213 unsigned char *data = _data;
214 int orig_len = len;
215
216 while (len > 0) {
217 n = ch_read_buffer(ch, &ptr);
218 if (n == 0)
219 break;
220
221 if (n > len)
222 n = len;
223 if (_data)
224 memcpy(data, ptr, n);
225
226 data += n;
227 len -= n;
228 ch_read_done(ch, n);
229 }
230
231 return orig_len - len;
232}
233
234static void update_stream_state(struct smd_channel *ch)
235{
236 /* streams have no special state requiring updating */
237}
238
239static void update_packet_state(struct smd_channel *ch)
240{
241 unsigned hdr[5];
242 int r;
243
244 /* can't do anything if we're in the middle of a packet */
245 if (ch->current_packet != 0)
246 return;
247
248 /* don't bother unless we can get the full header */
249 if (smd_stream_read_avail(ch) < SMD_HEADER_SIZE)
250 return;
251
252 r = ch_read(ch, hdr, SMD_HEADER_SIZE);
253 BUG_ON(r != SMD_HEADER_SIZE);
254
255 ch->current_packet = hdr[0];
256}
257
258/* provide a pointer and length to next free space in the fifo */
259static unsigned ch_write_buffer(struct smd_channel *ch, void **ptr)
260{
261 unsigned head = ch->send->head;
262 unsigned tail = ch->send->tail;
263 *ptr = (void *) (ch->send_data + head);
264
265 if (head < tail) {
266 return tail - head - 1;
267 } else {
268 if (tail == 0)
269 return ch->fifo_size - head - 1;
270 else
271 return ch->fifo_size - head;
272 }
273}
274
275/* advace the fifo write pointer after freespace
276 * from ch_write_buffer is filled
277 */
278static void ch_write_done(struct smd_channel *ch, unsigned count)
279{
280 BUG_ON(count > smd_stream_write_avail(ch));
281 ch->send->head = (ch->send->head + count) & ch->fifo_mask;
282 ch->send->fHEAD = 1;
283}
284
285static void ch_set_state(struct smd_channel *ch, unsigned n)
286{
287 if (n == SMD_SS_OPENED) {
288 ch->send->fDSR = 1;
289 ch->send->fCTS = 1;
290 ch->send->fCD = 1;
291 } else {
292 ch->send->fDSR = 0;
293 ch->send->fCTS = 0;
294 ch->send->fCD = 0;
295 }
296 ch->send->state = n;
297 ch->send->fSTATE = 1;
298 ch->notify_other_cpu();
299}
300
301static void do_smd_probe(void)
302{
303 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
304 if (shared->heap_info.free_offset != last_heap_free) {
305 last_heap_free = shared->heap_info.free_offset;
306 schedule_work(&probe_work);
307 }
308}
309
310static void smd_state_change(struct smd_channel *ch,
311 unsigned last, unsigned next)
312{
313 ch->last_state = next;
314
315 pr_info("SMD: ch %d %d -> %d\n", ch->n, last, next);
316
317 switch (next) {
318 case SMD_SS_OPENING:
319 ch->recv->tail = 0;
320 case SMD_SS_OPENED:
321 if (ch->send->state != SMD_SS_OPENED)
322 ch_set_state(ch, SMD_SS_OPENED);
323 ch->notify(ch->priv, SMD_EVENT_OPEN);
324 break;
325 case SMD_SS_FLUSHING:
326 case SMD_SS_RESET:
327 /* we should force them to close? */
328 default:
329 ch->notify(ch->priv, SMD_EVENT_CLOSE);
330 }
331}
332
333static void handle_smd_irq(struct list_head *list, void (*notify)(void))
334{
335 unsigned long flags;
336 struct smd_channel *ch;
337 int do_notify = 0;
338 unsigned ch_flags;
339 unsigned tmp;
340
341 spin_lock_irqsave(&smd_lock, flags);
342 list_for_each_entry(ch, list, ch_list) {
343 ch_flags = 0;
344 if (ch_is_open(ch)) {
345 if (ch->recv->fHEAD) {
346 ch->recv->fHEAD = 0;
347 ch_flags |= 1;
348 do_notify |= 1;
349 }
350 if (ch->recv->fTAIL) {
351 ch->recv->fTAIL = 0;
352 ch_flags |= 2;
353 do_notify |= 1;
354 }
355 if (ch->recv->fSTATE) {
356 ch->recv->fSTATE = 0;
357 ch_flags |= 4;
358 do_notify |= 1;
359 }
360 }
361 tmp = ch->recv->state;
362 if (tmp != ch->last_state)
363 smd_state_change(ch, ch->last_state, tmp);
364 if (ch_flags) {
365 ch->update_state(ch);
366 ch->notify(ch->priv, SMD_EVENT_DATA);
367 }
368 }
369 if (do_notify)
370 notify();
371 spin_unlock_irqrestore(&smd_lock, flags);
372 do_smd_probe();
373}
374
375static irqreturn_t smd_modem_irq_handler(int irq, void *data)
376{
377 handle_smd_irq(&smd_ch_list_modem, notify_modem_smd);
378 return IRQ_HANDLED;
379}
380
381#if defined(CONFIG_QDSP6)
382static irqreturn_t smd_dsp_irq_handler(int irq, void *data)
383{
384 handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd);
385 return IRQ_HANDLED;
386}
387#endif
388
389static void smd_fake_irq_handler(unsigned long arg)
390{
391 handle_smd_irq(&smd_ch_list_modem, notify_modem_smd);
392 handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd);
393}
394
395static DECLARE_TASKLET(smd_fake_irq_tasklet, smd_fake_irq_handler, 0);
396
397static inline int smd_need_int(struct smd_channel *ch)
398{
399 if (ch_is_open(ch)) {
400 if (ch->recv->fHEAD || ch->recv->fTAIL || ch->recv->fSTATE)
401 return 1;
402 if (ch->recv->state != ch->last_state)
403 return 1;
404 }
405 return 0;
406}
407
408void smd_sleep_exit(void)
409{
410 unsigned long flags;
411 struct smd_channel *ch;
412 int need_int = 0;
413
414 spin_lock_irqsave(&smd_lock, flags);
415 list_for_each_entry(ch, &smd_ch_list_modem, ch_list) {
416 if (smd_need_int(ch)) {
417 need_int = 1;
418 break;
419 }
420 }
421 list_for_each_entry(ch, &smd_ch_list_dsp, ch_list) {
422 if (smd_need_int(ch)) {
423 need_int = 1;
424 break;
425 }
426 }
427 spin_unlock_irqrestore(&smd_lock, flags);
428 do_smd_probe();
429
430 if (need_int) {
431 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
432 pr_info("smd_sleep_exit need interrupt\n");
433 tasklet_schedule(&smd_fake_irq_tasklet);
434 }
435}
436
437
438void smd_kick(smd_channel_t *ch)
439{
440 unsigned long flags;
441 unsigned tmp;
442
443 spin_lock_irqsave(&smd_lock, flags);
444 ch->update_state(ch);
445 tmp = ch->recv->state;
446 if (tmp != ch->last_state) {
447 ch->last_state = tmp;
448 if (tmp == SMD_SS_OPENED)
449 ch->notify(ch->priv, SMD_EVENT_OPEN);
450 else
451 ch->notify(ch->priv, SMD_EVENT_CLOSE);
452 }
453 ch->notify(ch->priv, SMD_EVENT_DATA);
454 ch->notify_other_cpu();
455 spin_unlock_irqrestore(&smd_lock, flags);
456}
457
458static int smd_is_packet(int chn, unsigned type)
459{
460 type &= SMD_KIND_MASK;
461 if (type == SMD_KIND_PACKET)
462 return 1;
463 if (type == SMD_KIND_STREAM)
464 return 0;
465
466 /* older AMSS reports SMD_KIND_UNKNOWN always */
467 if ((chn > 4) || (chn == 1))
468 return 1;
469 else
470 return 0;
471}
472
473static int smd_stream_write(smd_channel_t *ch, const void *_data, int len)
474{
475 void *ptr;
476 const unsigned char *buf = _data;
477 unsigned xfer;
478 int orig_len = len;
479
480 if (len < 0)
481 return -EINVAL;
482
483 while ((xfer = ch_write_buffer(ch, &ptr)) != 0) {
484 if (!ch_is_open(ch))
485 break;
486 if (xfer > len)
487 xfer = len;
488 memcpy(ptr, buf, xfer);
489 ch_write_done(ch, xfer);
490 len -= xfer;
491 buf += xfer;
492 if (len == 0)
493 break;
494 }
495
496 ch->notify_other_cpu();
497
498 return orig_len - len;
499}
500
501static int smd_packet_write(smd_channel_t *ch, const void *_data, int len)
502{
503 unsigned hdr[5];
504
505 if (len < 0)
506 return -EINVAL;
507
508 if (smd_stream_write_avail(ch) < (len + SMD_HEADER_SIZE))
509 return -ENOMEM;
510
511 hdr[0] = len;
512 hdr[1] = hdr[2] = hdr[3] = hdr[4] = 0;
513
514 smd_stream_write(ch, hdr, sizeof(hdr));
515 smd_stream_write(ch, _data, len);
516
517 return len;
518}
519
520static int smd_stream_read(smd_channel_t *ch, void *data, int len)
521{
522 int r;
523
524 if (len < 0)
525 return -EINVAL;
526
527 r = ch_read(ch, data, len);
528 if (r > 0)
529 ch->notify_other_cpu();
530
531 return r;
532}
533
534static int smd_packet_read(smd_channel_t *ch, void *data, int len)
535{
536 unsigned long flags;
537 int r;
538
539 if (len < 0)
540 return -EINVAL;
541
542 if (len > ch->current_packet)
543 len = ch->current_packet;
544
545 r = ch_read(ch, data, len);
546 if (r > 0)
547 ch->notify_other_cpu();
548
549 spin_lock_irqsave(&smd_lock, flags);
550 ch->current_packet -= r;
551 update_packet_state(ch);
552 spin_unlock_irqrestore(&smd_lock, flags);
553
554 return r;
555}
556
557static int smd_alloc_channel(const char *name, uint32_t cid, uint32_t type)
558{
559 struct smd_channel *ch;
560
561 ch = kzalloc(sizeof(struct smd_channel), GFP_KERNEL);
562 if (ch == 0) {
563 pr_err("smd_alloc_channel() out of memory\n");
564 return -1;
565 }
566 ch->n = cid;
567
568 if (_smd_alloc_channel(ch)) {
569 kfree(ch);
570 return -1;
571 }
572
573 ch->fifo_mask = ch->fifo_size - 1;
574 ch->type = type;
575
576 if ((type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM)
577 ch->notify_other_cpu = notify_modem_smd;
578 else
579 ch->notify_other_cpu = notify_dsp_smd;
580
581 if (smd_is_packet(cid, type)) {
582 ch->read = smd_packet_read;
583 ch->write = smd_packet_write;
584 ch->read_avail = smd_packet_read_avail;
585 ch->write_avail = smd_packet_write_avail;
586 ch->update_state = update_packet_state;
587 } else {
588 ch->read = smd_stream_read;
589 ch->write = smd_stream_write;
590 ch->read_avail = smd_stream_read_avail;
591 ch->write_avail = smd_stream_write_avail;
592 ch->update_state = update_stream_state;
593 }
594
595 if ((type & 0xff) == 0)
596 memcpy(ch->name, "SMD_", 4);
597 else
598 memcpy(ch->name, "DSP_", 4);
599 memcpy(ch->name + 4, name, 20);
600 ch->name[23] = 0;
601 ch->pdev.name = ch->name;
602 ch->pdev.id = -1;
603
604 pr_info("smd_alloc_channel() cid=%02d size=%05d '%s'\n",
605 ch->n, ch->fifo_size, ch->name);
606
607 mutex_lock(&smd_creation_mutex);
608 list_add(&ch->ch_list, &smd_ch_closed_list);
609 mutex_unlock(&smd_creation_mutex);
610
611 platform_device_register(&ch->pdev);
612 return 0;
613}
614
615static void smd_channel_probe_worker(struct work_struct *work)
616{
617 struct smd_alloc_elm *shared;
618 unsigned ctype;
619 unsigned type;
620 unsigned n;
621
622 shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64);
623 if (!shared) {
624 pr_err("smd: cannot find allocation table\n");
625 return;
626 }
627 for (n = 0; n < 64; n++) {
628 if (smd_ch_allocated[n])
629 continue;
630 if (!shared[n].ref_count)
631 continue;
632 if (!shared[n].name[0])
633 continue;
634 ctype = shared[n].ctype;
635 type = ctype & SMD_TYPE_MASK;
636
637 /* DAL channels are stream but neither the modem,
638 * nor the DSP correctly indicate this. Fixup manually.
639 */
640 if (!memcmp(shared[n].name, "DAL", 3))
641 ctype = (ctype & (~SMD_KIND_MASK)) | SMD_KIND_STREAM;
642
643 type = shared[n].ctype & SMD_TYPE_MASK;
644 if ((type == SMD_TYPE_APPS_MODEM) ||
645 (type == SMD_TYPE_APPS_DSP))
646 if (!smd_alloc_channel(shared[n].name, shared[n].cid, ctype))
647 smd_ch_allocated[n] = 1;
648 }
649}
650
651static void do_nothing_notify(void *priv, unsigned flags)
652{
653}
654
655struct smd_channel *smd_get_channel(const char *name)
656{
657 struct smd_channel *ch;
658
659 mutex_lock(&smd_creation_mutex);
660 list_for_each_entry(ch, &smd_ch_closed_list, ch_list) {
661 if (!strcmp(name, ch->name)) {
662 list_del(&ch->ch_list);
663 mutex_unlock(&smd_creation_mutex);
664 return ch;
665 }
666 }
667 mutex_unlock(&smd_creation_mutex);
668
669 return NULL;
670}
671
672int smd_open(const char *name, smd_channel_t **_ch,
673 void *priv, void (*notify)(void *, unsigned))
674{
675 struct smd_channel *ch;
676 unsigned long flags;
677
678 if (smd_initialized == 0) {
679 pr_info("smd_open() before smd_init()\n");
680 return -ENODEV;
681 }
682
683 ch = smd_get_channel(name);
684 if (!ch)
685 return -ENODEV;
686
687 if (notify == 0)
688 notify = do_nothing_notify;
689
690 ch->notify = notify;
691 ch->current_packet = 0;
692 ch->last_state = SMD_SS_CLOSED;
693 ch->priv = priv;
694
695 *_ch = ch;
696
697 spin_lock_irqsave(&smd_lock, flags);
698
699 if ((ch->type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM)
700 list_add(&ch->ch_list, &smd_ch_list_modem);
701 else
702 list_add(&ch->ch_list, &smd_ch_list_dsp);
703
704 /* If the remote side is CLOSING, we need to get it to
705 * move to OPENING (which we'll do by moving from CLOSED to
706 * OPENING) and then get it to move from OPENING to
707 * OPENED (by doing the same state change ourselves).
708 *
709 * Otherwise, it should be OPENING and we can move directly
710 * to OPENED so that it will follow.
711 */
712 if (ch->recv->state == SMD_SS_CLOSING) {
713 ch->send->head = 0;
714 ch_set_state(ch, SMD_SS_OPENING);
715 } else {
716 ch_set_state(ch, SMD_SS_OPENED);
717 }
718 spin_unlock_irqrestore(&smd_lock, flags);
719 smd_kick(ch);
720
721 return 0;
722}
723
724int smd_close(smd_channel_t *ch)
725{
726 unsigned long flags;
727
728 pr_info("smd_close(%p)\n", ch);
729
730 if (ch == 0)
731 return -1;
732
733 spin_lock_irqsave(&smd_lock, flags);
734 ch->notify = do_nothing_notify;
735 list_del(&ch->ch_list);
736 ch_set_state(ch, SMD_SS_CLOSED);
737 spin_unlock_irqrestore(&smd_lock, flags);
738
739 mutex_lock(&smd_creation_mutex);
740 list_add(&ch->ch_list, &smd_ch_closed_list);
741 mutex_unlock(&smd_creation_mutex);
742
743 return 0;
744}
745
746int smd_read(smd_channel_t *ch, void *data, int len)
747{
748 return ch->read(ch, data, len);
749}
750
751int smd_write(smd_channel_t *ch, const void *data, int len)
752{
753 return ch->write(ch, data, len);
754}
755
756int smd_write_atomic(smd_channel_t *ch, const void *data, int len)
757{
758 unsigned long flags;
759 int res;
760 spin_lock_irqsave(&smd_lock, flags);
761 res = ch->write(ch, data, len);
762 spin_unlock_irqrestore(&smd_lock, flags);
763 return res;
764}
765
766int smd_read_avail(smd_channel_t *ch)
767{
768 return ch->read_avail(ch);
769}
770
771int smd_write_avail(smd_channel_t *ch)
772{
773 return ch->write_avail(ch);
774}
775
776int smd_wait_until_readable(smd_channel_t *ch, int bytes)
777{
778 return -1;
779}
780
781int smd_wait_until_writable(smd_channel_t *ch, int bytes)
782{
783 return -1;
784}
785
786int smd_cur_packet_size(smd_channel_t *ch)
787{
788 return ch->current_packet;
789}
790
791
792/* ------------------------------------------------------------------------- */
793
794void *smem_alloc(unsigned id, unsigned size)
795{
796 return smem_find(id, size);
797}
798
799void *smem_item(unsigned id, unsigned *size)
800{
801 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
802 struct smem_heap_entry *toc = shared->heap_toc;
803
804 if (id >= SMEM_NUM_ITEMS)
805 return 0;
806
807 if (toc[id].allocated) {
808 *size = toc[id].size;
809 return (void *) (MSM_SHARED_RAM_BASE + toc[id].offset);
810 } else {
811 *size = 0;
812 }
813
814 return 0;
815}
816
817void *smem_find(unsigned id, unsigned size_in)
818{
819 unsigned size;
820 void *ptr;
821
822 ptr = smem_item(id, &size);
823 if (!ptr)
824 return 0;
825
826 size_in = ALIGN(size_in, 8);
827 if (size_in != size) {
828 pr_err("smem_find(%d, %d): wrong size %d\n",
829 id, size_in, size);
830 return 0;
831 }
832
833 return ptr;
834}
835
836static irqreturn_t smsm_irq_handler(int irq, void *data)
837{
838 unsigned long flags;
839 unsigned apps, modm;
840
841 spin_lock_irqsave(&smem_lock, flags);
842
843 apps = raw_smsm_get_state(SMSM_STATE_APPS);
844 modm = raw_smsm_get_state(SMSM_STATE_MODEM);
845
846 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
847 pr_info("<SM %08x %08x>\n", apps, modm);
848 if (modm & SMSM_RESET)
849 handle_modem_crash();
850
851 do_smd_probe();
852
853 spin_unlock_irqrestore(&smem_lock, flags);
854 return IRQ_HANDLED;
855}
856
857int smsm_change_state(enum smsm_state_item item,
858 uint32_t clear_mask, uint32_t set_mask)
859{
860 unsigned long addr = smd_info.state + item * 4;
861 unsigned long flags;
862 unsigned state;
863
864 if (!smd_info.ready)
865 return -EIO;
866
867 spin_lock_irqsave(&smem_lock, flags);
868
869 if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET)
870 handle_modem_crash();
871
872 state = (readl(addr) & ~clear_mask) | set_mask;
873 writel(state, addr);
874
875 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
876 pr_info("smsm_change_state %d %x\n", item, state);
877 notify_other_smsm();
878
879 spin_unlock_irqrestore(&smem_lock, flags);
880
881 return 0;
882}
883
884uint32_t smsm_get_state(enum smsm_state_item item)
885{
886 unsigned long flags;
887 uint32_t rv;
888
889 spin_lock_irqsave(&smem_lock, flags);
890
891 rv = readl(smd_info.state + item * 4);
892
893 if (item == SMSM_STATE_MODEM && (rv & SMSM_RESET))
894 handle_modem_crash();
895
896 spin_unlock_irqrestore(&smem_lock, flags);
897
898 return rv;
899}
900
901#ifdef CONFIG_ARCH_MSM_SCORPION
902
903int smsm_set_sleep_duration(uint32_t delay)
904{
905 struct msm_dem_slave_data *ptr;
906
907 ptr = smem_find(SMEM_APPS_DEM_SLAVE_DATA, sizeof(*ptr));
908 if (ptr == NULL) {
909 pr_err("smsm_set_sleep_duration <SM NO APPS_DEM_SLAVE_DATA>\n");
910 return -EIO;
911 }
912 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
913 pr_info("smsm_set_sleep_duration %d -> %d\n",
914 ptr->sleep_time, delay);
915 ptr->sleep_time = delay;
916 return 0;
917}
918
919#else
920
921int smsm_set_sleep_duration(uint32_t delay)
922{
923 uint32_t *ptr;
924
925 ptr = smem_find(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr));
926 if (ptr == NULL) {
927 pr_err("smsm_set_sleep_duration <SM NO SLEEP_DELAY>\n");
928 return -EIO;
929 }
930 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
931 pr_info("smsm_set_sleep_duration %d -> %d\n",
932 *ptr, delay);
933 *ptr = delay;
934 return 0;
935}
936
937#endif
938
939int smd_core_init(void)
940{
941 int r;
942 pr_info("smd_core_init()\n");
943
944 /* wait for essential items to be initialized */
945 for (;;) {
946 unsigned size;
947 void *state;
948 state = smem_item(SMEM_SMSM_SHARED_STATE, &size);
949 if (size == SMSM_V1_SIZE || size == SMSM_V2_SIZE) {
950 smd_info.state = (unsigned)state;
951 break;
952 }
953 }
954
955 smd_info.ready = 1;
956
957 r = request_irq(INT_A9_M2A_0, smd_modem_irq_handler,
958 IRQF_TRIGGER_RISING, "smd_dev", 0);
959 if (r < 0)
960 return r;
961 r = enable_irq_wake(INT_A9_M2A_0);
962 if (r < 0)
963 pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_0\n");
964
965 r = request_irq(INT_A9_M2A_5, smsm_irq_handler,
966 IRQF_TRIGGER_RISING, "smsm_dev", 0);
967 if (r < 0) {
968 free_irq(INT_A9_M2A_0, 0);
969 return r;
970 }
971 r = enable_irq_wake(INT_A9_M2A_5);
972 if (r < 0)
973 pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_5\n");
974
975#if defined(CONFIG_QDSP6)
976 r = request_irq(INT_ADSP_A11, smd_dsp_irq_handler,
977 IRQF_TRIGGER_RISING, "smd_dsp", 0);
978 if (r < 0) {
979 free_irq(INT_A9_M2A_0, 0);
980 free_irq(INT_A9_M2A_5, 0);
981 return r;
982 }
983#endif
984
985 /* check for any SMD channels that may already exist */
986 do_smd_probe();
987
988 /* indicate that we're up and running */
989 smsm_change_state(SMSM_STATE_APPS,
990 ~0, SMSM_INIT | SMSM_SMDINIT | SMSM_RPCINIT | SMSM_RUN);
991#ifdef CONFIG_ARCH_MSM_SCORPION
992 smsm_change_state(SMSM_STATE_APPS_DEM, ~0, 0);
993#endif
994
995 pr_info("smd_core_init() done\n");
996
997 return 0;
998}
999
1000static int __init msm_smd_probe(struct platform_device *pdev)
1001{
1002 pr_info("smd_init()\n");
1003
1004 /*
1005 * If we haven't waited for the ARM9 to boot up till now,
1006 * then we need to wait here. Otherwise this should just
1007 * return immediately.
1008 */
1009 proc_comm_boot_wait();
1010
1011 INIT_WORK(&probe_work, smd_channel_probe_worker);
1012
1013 if (smd_core_init()) {
1014 pr_err("smd_core_init() failed\n");
1015 return -1;
1016 }
1017
1018 do_smd_probe();
1019
1020 msm_check_for_modem_crash = check_for_modem_crash;
1021
1022 msm_init_last_radio_log(THIS_MODULE);
1023
1024 smd_initialized = 1;
1025
1026 return 0;
1027}
1028
1029static struct platform_driver msm_smd_driver = {
1030 .probe = msm_smd_probe,
1031 .driver = {
1032 .name = MODULE_NAME,
1033 .owner = THIS_MODULE,
1034 },
1035};
1036
1037static int __init msm_smd_init(void)
1038{
1039 return platform_driver_register(&msm_smd_driver);
1040}
1041
1042module_init(msm_smd_init);
1043
1044MODULE_DESCRIPTION("MSM Shared Memory Core");
1045MODULE_AUTHOR("Brian Swetland <swetland@google.com>");
1046MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c
new file mode 100644
index 000000000000..3b2dd717b788
--- /dev/null
+++ b/arch/arm/mach-msm/smd_debug.c
@@ -0,0 +1,315 @@
1/* arch/arm/mach-msm/smd_debug.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/debugfs.h>
18#include <linux/list.h>
19
20#include <mach/msm_iomap.h>
21
22#include "smd_private.h"
23
24#if defined(CONFIG_DEBUG_FS)
25
26static char *chstate(unsigned n)
27{
28 switch (n) {
29 case SMD_SS_CLOSED:
30 return "CLOSED";
31 case SMD_SS_OPENING:
32 return "OPENING";
33 case SMD_SS_OPENED:
34 return "OPENED";
35 case SMD_SS_FLUSHING:
36 return "FLUSHING";
37 case SMD_SS_CLOSING:
38 return "CLOSING";
39 case SMD_SS_RESET:
40 return "RESET";
41 case SMD_SS_RESET_OPENING:
42 return "ROPENING";
43 default:
44 return "UNKNOWN";
45 }
46}
47
48
49static int dump_ch(char *buf, int max, struct smd_channel *ch)
50{
51 volatile struct smd_half_channel *s = ch->send;
52 volatile struct smd_half_channel *r = ch->recv;
53
54 return scnprintf(
55 buf, max,
56 "ch%02d:"
57 " %8s(%05d/%05d) %c%c%c%c%c%c%c <->"
58 " %8s(%05d/%05d) %c%c%c%c%c%c%c '%s'\n", ch->n,
59 chstate(s->state), s->tail, s->head,
60 s->fDSR ? 'D' : 'd',
61 s->fCTS ? 'C' : 'c',
62 s->fCD ? 'C' : 'c',
63 s->fRI ? 'I' : 'i',
64 s->fHEAD ? 'W' : 'w',
65 s->fTAIL ? 'R' : 'r',
66 s->fSTATE ? 'S' : 's',
67 chstate(r->state), r->tail, r->head,
68 r->fDSR ? 'D' : 'd',
69 r->fCTS ? 'R' : 'r',
70 r->fCD ? 'C' : 'c',
71 r->fRI ? 'I' : 'i',
72 r->fHEAD ? 'W' : 'w',
73 r->fTAIL ? 'R' : 'r',
74 r->fSTATE ? 'S' : 's',
75 ch->name
76 );
77}
78
79static int debug_read_stat(char *buf, int max)
80{
81 char *msg;
82 int i = 0;
83
84 msg = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG);
85
86 if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET)
87 i += scnprintf(buf + i, max - i,
88 "smsm: ARM9 HAS CRASHED\n");
89
90 i += scnprintf(buf + i, max - i, "smsm: a9: %08x a11: %08x\n",
91 raw_smsm_get_state(SMSM_STATE_MODEM),
92 raw_smsm_get_state(SMSM_STATE_APPS));
93#ifdef CONFIG_ARCH_MSM_SCORPION
94 i += scnprintf(buf + i, max - i, "smsm dem: apps: %08x modem: %08x "
95 "qdsp6: %08x power: %08x time: %08x\n",
96 raw_smsm_get_state(SMSM_STATE_APPS_DEM),
97 raw_smsm_get_state(SMSM_STATE_MODEM_DEM),
98 raw_smsm_get_state(SMSM_STATE_QDSP6_DEM),
99 raw_smsm_get_state(SMSM_STATE_POWER_MASTER_DEM),
100 raw_smsm_get_state(SMSM_STATE_TIME_MASTER_DEM));
101#endif
102 if (msg) {
103 msg[SZ_DIAG_ERR_MSG - 1] = 0;
104 i += scnprintf(buf + i, max - i, "diag: '%s'\n", msg);
105 }
106 return i;
107}
108
109static int debug_read_mem(char *buf, int max)
110{
111 unsigned n;
112 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
113 struct smem_heap_entry *toc = shared->heap_toc;
114 int i = 0;
115
116 i += scnprintf(buf + i, max - i,
117 "heap: init=%d free=%d remain=%d\n",
118 shared->heap_info.initialized,
119 shared->heap_info.free_offset,
120 shared->heap_info.heap_remaining);
121
122 for (n = 0; n < SMEM_NUM_ITEMS; n++) {
123 if (toc[n].allocated == 0)
124 continue;
125 i += scnprintf(buf + i, max - i,
126 "%04d: offset %08x size %08x\n",
127 n, toc[n].offset, toc[n].size);
128 }
129 return i;
130}
131
132static int debug_read_ch(char *buf, int max)
133{
134 struct smd_channel *ch;
135 unsigned long flags;
136 int i = 0;
137
138 spin_lock_irqsave(&smd_lock, flags);
139 list_for_each_entry(ch, &smd_ch_list_dsp, ch_list)
140 i += dump_ch(buf + i, max - i, ch);
141 list_for_each_entry(ch, &smd_ch_list_modem, ch_list)
142 i += dump_ch(buf + i, max - i, ch);
143 list_for_each_entry(ch, &smd_ch_closed_list, ch_list)
144 i += dump_ch(buf + i, max - i, ch);
145 spin_unlock_irqrestore(&smd_lock, flags);
146
147 return i;
148}
149
150static int debug_read_version(char *buf, int max)
151{
152 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
153 unsigned version = shared->version[VERSION_MODEM];
154 return sprintf(buf, "%d.%d\n", version >> 16, version & 0xffff);
155}
156
157static int debug_read_build_id(char *buf, int max)
158{
159 unsigned size;
160 void *data;
161
162 data = smem_item(SMEM_HW_SW_BUILD_ID, &size);
163 if (!data)
164 return 0;
165
166 if (size >= max)
167 size = max;
168 memcpy(buf, data, size);
169
170 return size;
171}
172
173static int debug_read_alloc_tbl(char *buf, int max)
174{
175 struct smd_alloc_elm *shared;
176 int n, i = 0;
177
178 shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64);
179
180 for (n = 0; n < 64; n++) {
181 if (shared[n].ref_count == 0)
182 continue;
183 i += scnprintf(buf + i, max - i,
184 "%03d: %-20s cid=%02d type=%03d "
185 "kind=%02d ref_count=%d\n",
186 n, shared[n].name, shared[n].cid,
187 shared[n].ctype & 0xff,
188 (shared[n].ctype >> 8) & 0xf,
189 shared[n].ref_count);
190 }
191
192 return i;
193}
194
195#define DEBUG_BUFMAX 4096
196static char debug_buffer[DEBUG_BUFMAX];
197
198static ssize_t debug_read(struct file *file, char __user *buf,
199 size_t count, loff_t *ppos)
200{
201 int (*fill)(char *buf, int max) = file->private_data;
202 int bsize = fill(debug_buffer, DEBUG_BUFMAX);
203 return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize);
204}
205
206static int debug_open(struct inode *inode, struct file *file)
207{
208 file->private_data = inode->i_private;
209 return 0;
210}
211
212static const struct file_operations debug_ops = {
213 .read = debug_read,
214 .open = debug_open,
215};
216
217static void debug_create(const char *name, mode_t mode,
218 struct dentry *dent,
219 int (*fill)(char *buf, int max))
220{
221 debugfs_create_file(name, mode, dent, fill, &debug_ops);
222}
223
224static int smd_debugfs_init(void)
225{
226 struct dentry *dent;
227
228 dent = debugfs_create_dir("smd", 0);
229 if (IS_ERR(dent))
230 return 1;
231
232 debug_create("ch", 0444, dent, debug_read_ch);
233 debug_create("stat", 0444, dent, debug_read_stat);
234 debug_create("mem", 0444, dent, debug_read_mem);
235 debug_create("version", 0444, dent, debug_read_version);
236 debug_create("tbl", 0444, dent, debug_read_alloc_tbl);
237 debug_create("build", 0444, dent, debug_read_build_id);
238
239 return 0;
240}
241
242late_initcall(smd_debugfs_init);
243#endif
244
245
246#define MAX_NUM_SLEEP_CLIENTS 64
247#define MAX_SLEEP_NAME_LEN 8
248
249#define NUM_GPIO_INT_REGISTERS 6
250#define GPIO_SMEM_NUM_GROUPS 2
251#define GPIO_SMEM_MAX_PC_INTERRUPTS 8
252
253struct tramp_gpio_save {
254 unsigned int enable;
255 unsigned int detect;
256 unsigned int polarity;
257};
258
259struct tramp_gpio_smem {
260 uint16_t num_fired[GPIO_SMEM_NUM_GROUPS];
261 uint16_t fired[GPIO_SMEM_NUM_GROUPS][GPIO_SMEM_MAX_PC_INTERRUPTS];
262 uint32_t enabled[NUM_GPIO_INT_REGISTERS];
263 uint32_t detection[NUM_GPIO_INT_REGISTERS];
264 uint32_t polarity[NUM_GPIO_INT_REGISTERS];
265};
266
267
268void smsm_print_sleep_info(void)
269{
270 unsigned long flags;
271 uint32_t *ptr;
272 struct tramp_gpio_smem *gpio;
273 struct smsm_interrupt_info *int_info;
274
275
276 spin_lock_irqsave(&smem_lock, flags);
277
278 ptr = smem_alloc(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr));
279 if (ptr)
280 pr_info("SMEM_SMSM_SLEEP_DELAY: %x\n", *ptr);
281
282 ptr = smem_alloc(SMEM_SMSM_LIMIT_SLEEP, sizeof(*ptr));
283 if (ptr)
284 pr_info("SMEM_SMSM_LIMIT_SLEEP: %x\n", *ptr);
285
286 ptr = smem_alloc(SMEM_SLEEP_POWER_COLLAPSE_DISABLED, sizeof(*ptr));
287 if (ptr)
288 pr_info("SMEM_SLEEP_POWER_COLLAPSE_DISABLED: %x\n", *ptr);
289
290#ifndef CONFIG_ARCH_MSM_SCORPION
291 int_info = smem_alloc(SMEM_SMSM_INT_INFO, sizeof(*int_info));
292 if (int_info)
293 pr_info("SMEM_SMSM_INT_INFO %x %x %x\n",
294 int_info->interrupt_mask,
295 int_info->pending_interrupts,
296 int_info->wakeup_reason);
297
298 gpio = smem_alloc(SMEM_GPIO_INT, sizeof(*gpio));
299 if (gpio) {
300 int i;
301 for (i = 0; i < NUM_GPIO_INT_REGISTERS; i++)
302 pr_info("SMEM_GPIO_INT: %d: e %x d %x p %x\n",
303 i, gpio->enabled[i], gpio->detection[i],
304 gpio->polarity[i]);
305
306 for (i = 0; i < GPIO_SMEM_NUM_GROUPS; i++)
307 pr_info("SMEM_GPIO_INT: %d: f %d: %d %d...\n",
308 i, gpio->num_fired[i], gpio->fired[i][0],
309 gpio->fired[i][1]);
310 }
311#else
312#endif
313 spin_unlock_irqrestore(&smem_lock, flags);
314}
315
diff --git a/arch/arm/mach-msm/smd_private.h b/arch/arm/mach-msm/smd_private.h
new file mode 100644
index 000000000000..727bfe68aa9b
--- /dev/null
+++ b/arch/arm/mach-msm/smd_private.h
@@ -0,0 +1,403 @@
1/* arch/arm/mach-msm/smd_private.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
17#define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
18
19#include <linux/platform_device.h>
20#include <linux/spinlock.h>
21#include <linux/list.h>
22#include <linux/io.h>
23
24#include <mach/msm_iomap.h>
25
26struct smem_heap_info {
27 unsigned initialized;
28 unsigned free_offset;
29 unsigned heap_remaining;
30 unsigned reserved;
31};
32
33struct smem_heap_entry {
34 unsigned allocated;
35 unsigned offset;
36 unsigned size;
37 unsigned reserved;
38};
39
40struct smem_proc_comm {
41 unsigned command;
42 unsigned status;
43 unsigned data1;
44 unsigned data2;
45};
46
47#define PC_APPS 0
48#define PC_MODEM 1
49
50#define VERSION_SMD 0
51#define VERSION_QDSP6 4
52#define VERSION_APPS_SBL 6
53#define VERSION_MODEM_SBL 7
54#define VERSION_APPS 8
55#define VERSION_MODEM 9
56
57struct smem_shared {
58 struct smem_proc_comm proc_comm[4];
59 unsigned version[32];
60 struct smem_heap_info heap_info;
61 struct smem_heap_entry heap_toc[512];
62};
63
64#define SMSM_V1_SIZE (sizeof(unsigned) * 8)
65#define SMSM_V2_SIZE (sizeof(unsigned) * 4)
66
67#ifdef CONFIG_MSM_SMD_PKG3
68struct smsm_interrupt_info {
69 uint32_t interrupt_mask;
70 uint32_t pending_interrupts;
71 uint32_t wakeup_reason;
72};
73#else
74#define DEM_MAX_PORT_NAME_LEN (20)
75struct msm_dem_slave_data {
76 uint32_t sleep_time;
77 uint32_t interrupt_mask;
78 uint32_t resources_used;
79 uint32_t reserved1;
80
81 uint32_t wakeup_reason;
82 uint32_t pending_interrupts;
83 uint32_t rpc_prog;
84 uint32_t rpc_proc;
85 char smd_port_name[DEM_MAX_PORT_NAME_LEN];
86 uint32_t reserved2;
87};
88#endif
89
90#define SZ_DIAG_ERR_MSG 0xC8
91#define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE
92#define ID_SMD_CHANNELS SMEM_SMD_BASE_ID
93#define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE
94#define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL
95
96#define SMSM_INIT 0x00000001
97#define SMSM_SMDINIT 0x00000008
98#define SMSM_RPCINIT 0x00000020
99#define SMSM_RESET 0x00000040
100#define SMSM_RSA 0x00000080
101#define SMSM_RUN 0x00000100
102#define SMSM_PWRC 0x00000200
103#define SMSM_TIMEWAIT 0x00000400
104#define SMSM_TIMEINIT 0x00000800
105#define SMSM_PWRC_EARLY_EXIT 0x00001000
106#define SMSM_WFPI 0x00002000
107#define SMSM_SLEEP 0x00004000
108#define SMSM_SLEEPEXIT 0x00008000
109#define SMSM_APPS_REBOOT 0x00020000
110#define SMSM_SYSTEM_POWER_DOWN 0x00040000
111#define SMSM_SYSTEM_REBOOT 0x00080000
112#define SMSM_SYSTEM_DOWNLOAD 0x00100000
113#define SMSM_PWRC_SUSPEND 0x00200000
114#define SMSM_APPS_SHUTDOWN 0x00400000
115#define SMSM_SMD_LOOPBACK 0x00800000
116#define SMSM_RUN_QUIET 0x01000000
117#define SMSM_MODEM_WAIT 0x02000000
118#define SMSM_MODEM_BREAK 0x04000000
119#define SMSM_MODEM_CONTINUE 0x08000000
120#define SMSM_UNKNOWN 0x80000000
121
122#define SMSM_WKUP_REASON_RPC 0x00000001
123#define SMSM_WKUP_REASON_INT 0x00000002
124#define SMSM_WKUP_REASON_GPIO 0x00000004
125#define SMSM_WKUP_REASON_TIMER 0x00000008
126#define SMSM_WKUP_REASON_ALARM 0x00000010
127#define SMSM_WKUP_REASON_RESET 0x00000020
128
129#ifdef CONFIG_ARCH_MSM7X00A
130enum smsm_state_item {
131 SMSM_STATE_APPS = 1,
132 SMSM_STATE_MODEM = 3,
133 SMSM_STATE_COUNT,
134};
135#else
136enum smsm_state_item {
137 SMSM_STATE_APPS,
138 SMSM_STATE_MODEM,
139 SMSM_STATE_HEXAGON,
140 SMSM_STATE_APPS_DEM,
141 SMSM_STATE_MODEM_DEM,
142 SMSM_STATE_QDSP6_DEM,
143 SMSM_STATE_POWER_MASTER_DEM,
144 SMSM_STATE_TIME_MASTER_DEM,
145 SMSM_STATE_COUNT,
146};
147#endif
148
149void *smem_alloc(unsigned id, unsigned size);
150int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask);
151uint32_t smsm_get_state(enum smsm_state_item item);
152int smsm_set_sleep_duration(uint32_t delay);
153void smsm_print_sleep_info(void);
154
155#define SMEM_NUM_SMD_CHANNELS 64
156
157typedef enum {
158 /* fixed items */
159 SMEM_PROC_COMM = 0,
160 SMEM_HEAP_INFO,
161 SMEM_ALLOCATION_TABLE,
162 SMEM_VERSION_INFO,
163 SMEM_HW_RESET_DETECT,
164 SMEM_AARM_WARM_BOOT,
165 SMEM_DIAG_ERR_MESSAGE,
166 SMEM_SPINLOCK_ARRAY,
167 SMEM_MEMORY_BARRIER_LOCATION,
168
169 /* dynamic items */
170 SMEM_AARM_PARTITION_TABLE,
171 SMEM_AARM_BAD_BLOCK_TABLE,
172 SMEM_RESERVE_BAD_BLOCKS,
173 SMEM_WM_UUID,
174 SMEM_CHANNEL_ALLOC_TBL,
175 SMEM_SMD_BASE_ID,
176 SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS,
177 SMEM_SMEM_LOG_EVENTS,
178 SMEM_SMEM_STATIC_LOG_IDX,
179 SMEM_SMEM_STATIC_LOG_EVENTS,
180 SMEM_SMEM_SLOW_CLOCK_SYNC,
181 SMEM_SMEM_SLOW_CLOCK_VALUE,
182 SMEM_BIO_LED_BUF,
183 SMEM_SMSM_SHARED_STATE,
184 SMEM_SMSM_INT_INFO,
185 SMEM_SMSM_SLEEP_DELAY,
186 SMEM_SMSM_LIMIT_SLEEP,
187 SMEM_SLEEP_POWER_COLLAPSE_DISABLED,
188 SMEM_KEYPAD_KEYS_PRESSED,
189 SMEM_KEYPAD_STATE_UPDATED,
190 SMEM_KEYPAD_STATE_IDX,
191 SMEM_GPIO_INT,
192 SMEM_MDDI_LCD_IDX,
193 SMEM_MDDI_HOST_DRIVER_STATE,
194 SMEM_MDDI_LCD_DISP_STATE,
195 SMEM_LCD_CUR_PANEL,
196 SMEM_MARM_BOOT_SEGMENT_INFO,
197 SMEM_AARM_BOOT_SEGMENT_INFO,
198 SMEM_SLEEP_STATIC,
199 SMEM_SCORPION_FREQUENCY,
200 SMEM_SMD_PROFILES,
201 SMEM_TSSC_BUSY,
202 SMEM_HS_SUSPEND_FILTER_INFO,
203 SMEM_BATT_INFO,
204 SMEM_APPS_BOOT_MODE,
205 SMEM_VERSION_FIRST,
206 SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24,
207 SMEM_OSS_RRCASN1_BUF1,
208 SMEM_OSS_RRCASN1_BUF2,
209 SMEM_ID_VENDOR0,
210 SMEM_ID_VENDOR1,
211 SMEM_ID_VENDOR2,
212 SMEM_HW_SW_BUILD_ID,
213 SMEM_SMD_BLOCK_PORT_BASE_ID,
214 SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID + SMEM_NUM_SMD_CHANNELS,
215 SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP + SMEM_NUM_SMD_CHANNELS,
216 SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP + SMEM_NUM_SMD_CHANNELS,
217 SMEM_SCLK_CONVERSION,
218 SMEM_SMD_SMSM_INTR_MUX,
219 SMEM_SMSM_CPU_INTR_MASK,
220 SMEM_APPS_DEM_SLAVE_DATA,
221 SMEM_QDSP6_DEM_SLAVE_DATA,
222 SMEM_CLKREGIM_BSP,
223 SMEM_CLKREGIM_SOURCES,
224 SMEM_SMD_FIFO_BASE_ID,
225 SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID + SMEM_NUM_SMD_CHANNELS,
226 SMEM_POWER_ON_STATUS_INFO,
227 SMEM_DAL_AREA,
228 SMEM_SMEM_LOG_POWER_IDX,
229 SMEM_SMEM_LOG_POWER_WRAP,
230 SMEM_SMEM_LOG_POWER_EVENTS,
231 SMEM_ERR_CRASH_LOG,
232 SMEM_ERR_F3_TRACE_LOG,
233 SMEM_NUM_ITEMS,
234} smem_mem_type;
235
236
237#define SMD_SS_CLOSED 0x00000000
238#define SMD_SS_OPENING 0x00000001
239#define SMD_SS_OPENED 0x00000002
240#define SMD_SS_FLUSHING 0x00000003
241#define SMD_SS_CLOSING 0x00000004
242#define SMD_SS_RESET 0x00000005
243#define SMD_SS_RESET_OPENING 0x00000006
244
245#define SMD_BUF_SIZE 8192
246#define SMD_CHANNELS 64
247
248#define SMD_HEADER_SIZE 20
249
250struct smd_alloc_elm {
251 char name[20];
252 uint32_t cid;
253 uint32_t ctype;
254 uint32_t ref_count;
255};
256
257struct smd_half_channel {
258 unsigned state;
259 unsigned char fDSR;
260 unsigned char fCTS;
261 unsigned char fCD;
262 unsigned char fRI;
263 unsigned char fHEAD;
264 unsigned char fTAIL;
265 unsigned char fSTATE;
266 unsigned char fUNUSED;
267 unsigned tail;
268 unsigned head;
269} __attribute__(( aligned(4), packed ));
270
271/* Only used on SMD package v3 on msm7201a */
272struct smd_shared_v1 {
273 struct smd_half_channel ch0;
274 unsigned char data0[SMD_BUF_SIZE];
275 struct smd_half_channel ch1;
276 unsigned char data1[SMD_BUF_SIZE];
277};
278
279/* Used on SMD package v4 */
280struct smd_shared_v2 {
281 struct smd_half_channel ch0;
282 struct smd_half_channel ch1;
283};
284
285struct smd_channel {
286 volatile struct smd_half_channel *send;
287 volatile struct smd_half_channel *recv;
288 unsigned char *send_data;
289 unsigned char *recv_data;
290
291 unsigned fifo_mask;
292 unsigned fifo_size;
293 unsigned current_packet;
294 unsigned n;
295
296 struct list_head ch_list;
297
298 void *priv;
299 void (*notify)(void *priv, unsigned flags);
300
301 int (*read)(struct smd_channel *ch, void *data, int len);
302 int (*write)(struct smd_channel *ch, const void *data, int len);
303 int (*read_avail)(struct smd_channel *ch);
304 int (*write_avail)(struct smd_channel *ch);
305
306 void (*update_state)(struct smd_channel *ch);
307 unsigned last_state;
308 void (*notify_other_cpu)(void);
309 unsigned type;
310
311 char name[32];
312 struct platform_device pdev;
313};
314
315#define SMD_TYPE_MASK 0x0FF
316#define SMD_TYPE_APPS_MODEM 0x000
317#define SMD_TYPE_APPS_DSP 0x001
318#define SMD_TYPE_MODEM_DSP 0x002
319
320#define SMD_KIND_MASK 0xF00
321#define SMD_KIND_UNKNOWN 0x000
322#define SMD_KIND_STREAM 0x100
323#define SMD_KIND_PACKET 0x200
324
325extern struct list_head smd_ch_closed_list;
326extern struct list_head smd_ch_list_modem;
327extern struct list_head smd_ch_list_dsp;
328
329extern spinlock_t smd_lock;
330extern spinlock_t smem_lock;
331
332void *smem_find(unsigned id, unsigned size);
333void *smem_item(unsigned id, unsigned *size);
334uint32_t raw_smsm_get_state(enum smsm_state_item item);
335
336extern void msm_init_last_radio_log(struct module *);
337
338#ifdef CONFIG_MSM_SMD_PKG3
339/*
340 * This allocator assumes an SMD Package v3 which only exists on
341 * MSM7x00 SoC's.
342 */
343static inline int _smd_alloc_channel(struct smd_channel *ch)
344{
345 struct smd_shared_v1 *shared1;
346
347 shared1 = smem_alloc(ID_SMD_CHANNELS + ch->n, sizeof(*shared1));
348 if (!shared1) {
349 pr_err("smd_alloc_channel() cid %d does not exist\n", ch->n);
350 return -1;
351 }
352 ch->send = &shared1->ch0;
353 ch->recv = &shared1->ch1;
354 ch->send_data = shared1->data0;
355 ch->recv_data = shared1->data1;
356 ch->fifo_size = SMD_BUF_SIZE;
357 return 0;
358}
359#else
360/*
361 * This allocator assumes an SMD Package v4, the most common
362 * and the default.
363 */
364static inline int _smd_alloc_channel(struct smd_channel *ch)
365{
366 struct smd_shared_v2 *shared2;
367 void *buffer;
368 unsigned buffer_sz;
369
370 shared2 = smem_alloc(SMEM_SMD_BASE_ID + ch->n, sizeof(*shared2));
371 buffer = smem_item(SMEM_SMD_FIFO_BASE_ID + ch->n, &buffer_sz);
372
373 if (!buffer)
374 return -1;
375
376 /* buffer must be a power-of-two size */
377 if (buffer_sz & (buffer_sz - 1))
378 return -1;
379
380 buffer_sz /= 2;
381 ch->send = &shared2->ch0;
382 ch->recv = &shared2->ch1;
383 ch->send_data = buffer;
384 ch->recv_data = buffer + buffer_sz;
385 ch->fifo_size = buffer_sz;
386 return 0;
387}
388#endif /* CONFIG_MSM_SMD_PKG3 */
389
390#if defined(CONFIG_ARCH_MSM7X30)
391static inline void msm_a2m_int(uint32_t irq)
392{
393 writel(1 << irq, MSM_GCC_BASE + 0x8);
394}
395#else
396static inline void msm_a2m_int(uint32_t irq)
397{
398 writel(1, MSM_CSR_BASE + 0x400 + (irq * 4));
399}
400#endif /* CONFIG_ARCH_MSM7X30 */
401
402
403#endif
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 4855b8ca5101..dec5ca622d7d 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -25,7 +25,9 @@
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <mach/msm_iomap.h> 26#include <mach/msm_iomap.h>
27 27
28#ifndef MSM_DGT_BASE
28#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10) 29#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10)
30#endif
29#define MSM_DGT_SHIFT (5) 31#define MSM_DGT_SHIFT (5)
30 32
31#define TIMER_MATCH_VAL 0x0000 33#define TIMER_MATCH_VAL 0x0000
diff --git a/arch/arm/mach-msm/vreg.c b/arch/arm/mach-msm/vreg.c
index fcb0b9f25684..a9103bc6615f 100644
--- a/arch/arm/mach-msm/vreg.c
+++ b/arch/arm/mach-msm/vreg.c
@@ -1,6 +1,7 @@
1/* arch/arm/mach-msm/vreg.c 1/* arch/arm/mach-msm/vreg.c
2 * 2 *
3 * Copyright (C) 2008 Google, Inc. 3 * Copyright (C) 2008 Google, Inc.
4 * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com> 5 * Author: Brian Swetland <swetland@google.com>
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
@@ -18,6 +19,7 @@
18#include <linux/device.h> 19#include <linux/device.h>
19#include <linux/init.h> 20#include <linux/init.h>
20#include <linux/debugfs.h> 21#include <linux/debugfs.h>
22#include <linux/string.h>
21#include <mach/vreg.h> 23#include <mach/vreg.h>
22 24
23#include "proc_comm.h" 25#include "proc_comm.h"
@@ -25,42 +27,62 @@
25struct vreg { 27struct vreg {
26 const char *name; 28 const char *name;
27 unsigned id; 29 unsigned id;
30 int status;
31 unsigned refcnt;
28}; 32};
29 33
30#define VREG(_name, _id) { .name = _name, .id = _id, } 34#define VREG(_name, _id, _status, _refcnt) \
35 { .name = _name, .id = _id, .status = _status, .refcnt = _refcnt }
31 36
32static struct vreg vregs[] = { 37static struct vreg vregs[] = {
33 VREG("msma", 0), 38 VREG("msma", 0, 0, 0),
34 VREG("msmp", 1), 39 VREG("msmp", 1, 0, 0),
35 VREG("msme1", 2), 40 VREG("msme1", 2, 0, 0),
36 VREG("msmc1", 3), 41 VREG("msmc1", 3, 0, 0),
37 VREG("msmc2", 4), 42 VREG("msmc2", 4, 0, 0),
38 VREG("gp3", 5), 43 VREG("gp3", 5, 0, 0),
39 VREG("msme2", 6), 44 VREG("msme2", 6, 0, 0),
40 VREG("gp4", 7), 45 VREG("gp4", 7, 0, 0),
41 VREG("gp1", 8), 46 VREG("gp1", 8, 0, 0),
42 VREG("tcxo", 9), 47 VREG("tcxo", 9, 0, 0),
43 VREG("pa", 10), 48 VREG("pa", 10, 0, 0),
44 VREG("rftx", 11), 49 VREG("rftx", 11, 0, 0),
45 VREG("rfrx1", 12), 50 VREG("rfrx1", 12, 0, 0),
46 VREG("rfrx2", 13), 51 VREG("rfrx2", 13, 0, 0),
47 VREG("synt", 14), 52 VREG("synt", 14, 0, 0),
48 VREG("wlan", 15), 53 VREG("wlan", 15, 0, 0),
49 VREG("usb", 16), 54 VREG("usb", 16, 0, 0),
50 VREG("boost", 17), 55 VREG("boost", 17, 0, 0),
51 VREG("mmc", 18), 56 VREG("mmc", 18, 0, 0),
52 VREG("ruim", 19), 57 VREG("ruim", 19, 0, 0),
53 VREG("msmc0", 20), 58 VREG("msmc0", 20, 0, 0),
54 VREG("gp2", 21), 59 VREG("gp2", 21, 0, 0),
55 VREG("gp5", 22), 60 VREG("gp5", 22, 0, 0),
56 VREG("gp6", 23), 61 VREG("gp6", 23, 0, 0),
57 VREG("rf", 24), 62 VREG("rf", 24, 0, 0),
58 VREG("rf_vco", 26), 63 VREG("rf_vco", 26, 0, 0),
59 VREG("mpll", 27), 64 VREG("mpll", 27, 0, 0),
60 VREG("s2", 28), 65 VREG("s2", 28, 0, 0),
61 VREG("s3", 29), 66 VREG("s3", 29, 0, 0),
62 VREG("rfubm", 30), 67 VREG("rfubm", 30, 0, 0),
63 VREG("ncp", 31), 68 VREG("ncp", 31, 0, 0),
69 VREG("gp7", 32, 0, 0),
70 VREG("gp8", 33, 0, 0),
71 VREG("gp9", 34, 0, 0),
72 VREG("gp10", 35, 0, 0),
73 VREG("gp11", 36, 0, 0),
74 VREG("gp12", 37, 0, 0),
75 VREG("gp13", 38, 0, 0),
76 VREG("gp14", 39, 0, 0),
77 VREG("gp15", 40, 0, 0),
78 VREG("gp16", 41, 0, 0),
79 VREG("gp17", 42, 0, 0),
80 VREG("s4", 43, 0, 0),
81 VREG("usb2", 44, 0, 0),
82 VREG("wlan2", 45, 0, 0),
83 VREG("xo_out", 46, 0, 0),
84 VREG("lvsw0", 47, 0, 0),
85 VREG("lvsw1", 48, 0, 0),
64}; 86};
65 87
66struct vreg *vreg_get(struct device *dev, const char *id) 88struct vreg *vreg_get(struct device *dev, const char *id)
@@ -70,7 +92,7 @@ struct vreg *vreg_get(struct device *dev, const char *id)
70 if (!strcmp(vregs[n].name, id)) 92 if (!strcmp(vregs[n].name, id))
71 return vregs + n; 93 return vregs + n;
72 } 94 }
73 return 0; 95 return ERR_PTR(-ENOENT);
74} 96}
75 97
76void vreg_put(struct vreg *vreg) 98void vreg_put(struct vreg *vreg)
@@ -81,20 +103,39 @@ int vreg_enable(struct vreg *vreg)
81{ 103{
82 unsigned id = vreg->id; 104 unsigned id = vreg->id;
83 unsigned enable = 1; 105 unsigned enable = 1;
84 return msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); 106
107 if (vreg->refcnt == 0)
108 vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable);
109
110 if ((vreg->refcnt < UINT_MAX) && (!vreg->status))
111 vreg->refcnt++;
112
113 return vreg->status;
85} 114}
86 115
87void vreg_disable(struct vreg *vreg) 116int vreg_disable(struct vreg *vreg)
88{ 117{
89 unsigned id = vreg->id; 118 unsigned id = vreg->id;
90 unsigned enable = 0; 119 unsigned enable = 0;
91 msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); 120
121 if (!vreg->refcnt)
122 return 0;
123
124 if (vreg->refcnt == 1)
125 vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable);
126
127 if (!vreg->status)
128 vreg->refcnt--;
129
130 return vreg->status;
92} 131}
93 132
94int vreg_set_level(struct vreg *vreg, unsigned mv) 133int vreg_set_level(struct vreg *vreg, unsigned mv)
95{ 134{
96 unsigned id = vreg->id; 135 unsigned id = vreg->id;
97 return msm_proc_comm(PCOM_VREG_SET_LEVEL, &id, &mv); 136
137 vreg->status = msm_proc_comm(PCOM_VREG_SET_LEVEL, &id, &mv);
138 return vreg->status;
98} 139}
99 140
100#if defined(CONFIG_DEBUG_FS) 141#if defined(CONFIG_DEBUG_FS)
@@ -118,24 +159,59 @@ static int vreg_debug_set(void *data, u64 val)
118 159
119static int vreg_debug_get(void *data, u64 *val) 160static int vreg_debug_get(void *data, u64 *val)
120{ 161{
121 return -ENOSYS; 162 struct vreg *vreg = data;
163
164 if (!vreg->status)
165 *val = 0;
166 else
167 *val = 1;
168
169 return 0;
170}
171
172static int vreg_debug_count_set(void *data, u64 val)
173{
174 struct vreg *vreg = data;
175 if (val > UINT_MAX)
176 val = UINT_MAX;
177 vreg->refcnt = val;
178 return 0;
179}
180
181static int vreg_debug_count_get(void *data, u64 *val)
182{
183 struct vreg *vreg = data;
184
185 *val = vreg->refcnt;
186
187 return 0;
122} 188}
123 189
124DEFINE_SIMPLE_ATTRIBUTE(vreg_fops, vreg_debug_get, vreg_debug_set, "%llu\n"); 190DEFINE_SIMPLE_ATTRIBUTE(vreg_fops, vreg_debug_get, vreg_debug_set, "%llu\n");
191DEFINE_SIMPLE_ATTRIBUTE(vreg_count_fops, vreg_debug_count_get,
192 vreg_debug_count_set, "%llu\n");
125 193
126static int __init vreg_debug_init(void) 194static int __init vreg_debug_init(void)
127{ 195{
128 struct dentry *dent; 196 struct dentry *dent;
129 int n; 197 int n;
198 char name[32];
199 const char *refcnt_name = "_refcnt";
130 200
131 dent = debugfs_create_dir("vreg", 0); 201 dent = debugfs_create_dir("vreg", 0);
132 if (IS_ERR(dent)) 202 if (IS_ERR(dent))
133 return 0; 203 return 0;
134 204
135 for (n = 0; n < ARRAY_SIZE(vregs); n++) 205 for (n = 0; n < ARRAY_SIZE(vregs); n++) {
136 (void) debugfs_create_file(vregs[n].name, 0644, 206 (void) debugfs_create_file(vregs[n].name, 0644,
137 dent, vregs + n, &vreg_fops); 207 dent, vregs + n, &vreg_fops);
138 208
209 strlcpy(name, vregs[n].name, sizeof(name));
210 strlcat(name, refcnt_name, sizeof(name));
211 (void) debugfs_create_file(name, 0644,
212 dent, vregs + n, &vreg_count_fops);
213 }
214
139 return 0; 215 return 0;
140} 216}
141 217
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index 3c5e0f522e9c..71f3ea623974 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -6,6 +6,7 @@ config MACH_NOMADIK_8815NHK
6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)" 6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
7 select NOMADIK_8815 7 select NOMADIK_8815
8 select HAS_MTU 8 select HAS_MTU
9 select NOMADIK_GPIO
9 10
10endmenu 11endmenu
11 12
diff --git a/arch/arm/mach-nomadik/Makefile b/arch/arm/mach-nomadik/Makefile
index 36f67fb207d2..a6bbd1a7b4e7 100644
--- a/arch/arm/mach-nomadik/Makefile
+++ b/arch/arm/mach-nomadik/Makefile
@@ -7,7 +7,7 @@
7 7
8# Object file lists. 8# Object file lists.
9 9
10obj-y += clock.o gpio.o 10obj-y += clock.o
11 11
12# Cpu revision 12# Cpu revision
13obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o 13obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index ab3712c86d2b..841d459ad59d 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -32,7 +32,6 @@
32#include <mach/setup.h> 32#include <mach/setup.h>
33#include <mach/nand.h> 33#include <mach/nand.h>
34#include <mach/fsmc.h> 34#include <mach/fsmc.h>
35#include "clock.h"
36 35
37/* Initial value for SRC control register: all timers use MXTAL/8 source */ 36/* Initial value for SRC control register: all timers use MXTAL/8 source */
38#define SRC_CR_INIT_MASK 0x00007fff 37#define SRC_CR_INIT_MASK 0x00007fff
@@ -202,11 +201,6 @@ static struct amba_device *amba_devs[] __initdata = {
202 &uart1_device, 201 &uart1_device,
203}; 202};
204 203
205/* We have a fixed clock alone, by now */
206static struct clk nhk8815_clk_48 = {
207 .rate = 48*1000*1000,
208};
209
210static struct resource nhk8815_eth_resources[] = { 204static struct resource nhk8815_eth_resources[] = {
211 { 205 {
212 .name = "smc91x-regs", 206 .name = "smc91x-regs",
@@ -276,10 +270,8 @@ static void __init nhk8815_platform_init(void)
276 platform_add_devices(nhk8815_platform_devices, 270 platform_add_devices(nhk8815_platform_devices,
277 ARRAY_SIZE(nhk8815_platform_devices)); 271 ARRAY_SIZE(nhk8815_platform_devices));
278 272
279 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 273 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
280 nmdk_clk_create(&nhk8815_clk_48, amba_devs[i]->dev.init_name);
281 amba_device_register(amba_devs[i], &iomem_resource); 274 amba_device_register(amba_devs[i], &iomem_resource);
282 }
283} 275}
284 276
285MACHINE_START(NOMADIK, "NHK8815") 277MACHINE_START(NOMADIK, "NHK8815")
diff --git a/arch/arm/mach-nomadik/clock.c b/arch/arm/mach-nomadik/clock.c
index 9f92502a0083..60f5bee09f2e 100644
--- a/arch/arm/mach-nomadik/clock.c
+++ b/arch/arm/mach-nomadik/clock.c
@@ -32,14 +32,36 @@ void clk_disable(struct clk *clk)
32} 32}
33EXPORT_SYMBOL(clk_disable); 33EXPORT_SYMBOL(clk_disable);
34 34
35/* Create a clock structure with the given name */ 35/* We have a fixed clock alone, for now */
36int nmdk_clk_create(struct clk *clk, const char *dev_id) 36static struct clk clk_48 = {
37{ 37 .rate = 48 * 1000 * 1000,
38 struct clk_lookup *clkdev; 38};
39
40/*
41 * Catch-all default clock to satisfy drivers using the clk API. We don't
42 * model the actual hardware clocks yet.
43 */
44static struct clk clk_default;
39 45
40 clkdev = clkdev_alloc(clk, NULL, dev_id); 46#define CLK(_clk, dev) \
41 if (!clkdev) 47 { \
42 return -ENOMEM; 48 .clk = _clk, \
43 clkdev_add(clkdev); 49 .dev_id = dev, \
50 }
51
52static struct clk_lookup lookups[] = {
53 CLK(&clk_48, "uart0"),
54 CLK(&clk_48, "uart1"),
55 CLK(&clk_default, "gpio.0"),
56 CLK(&clk_default, "gpio.1"),
57 CLK(&clk_default, "gpio.2"),
58 CLK(&clk_default, "gpio.3"),
59};
60
61static int __init clk_init(void)
62{
63 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
44 return 0; 64 return 0;
45} 65}
66
67arch_initcall(clk_init);
diff --git a/arch/arm/mach-nomadik/clock.h b/arch/arm/mach-nomadik/clock.h
index 235faec7f627..5563985a2cc7 100644
--- a/arch/arm/mach-nomadik/clock.h
+++ b/arch/arm/mach-nomadik/clock.h
@@ -11,4 +11,3 @@
11struct clk { 11struct clk {
12 unsigned long rate; 12 unsigned long rate;
13}; 13};
14extern int nmdk_clk_create(struct clk *clk, const char *dev_id);
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 9bf33b30a025..91c3c901b469 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -20,6 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/amba/bus.h> 22#include <linux/amba/bus.h>
23#include <linux/platform_device.h>
23#include <linux/gpio.h> 24#include <linux/gpio.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
@@ -30,60 +31,66 @@
30#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
31#include <asm/hardware/cache-l2x0.h> 32#include <asm/hardware/cache-l2x0.h>
32 33
34#define __MEM_4K_RESOURCE(x) \
35 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
36
33/* The 8815 has 4 GPIO blocks, let's register them immediately */ 37/* The 8815 has 4 GPIO blocks, let's register them immediately */
38
39#define GPIO_RESOURCE(block) \
40 { \
41 .start = NOMADIK_GPIO##block##_BASE, \
42 .end = NOMADIK_GPIO##block##_BASE + SZ_4K - 1, \
43 .flags = IORESOURCE_MEM, \
44 }, \
45 { \
46 .start = IRQ_GPIO##block, \
47 .end = IRQ_GPIO##block, \
48 .flags = IORESOURCE_IRQ, \
49 }
50
51#define GPIO_DEVICE(block) \
52 { \
53 .name = "gpio", \
54 .id = block, \
55 .num_resources = 2, \
56 .resource = &cpu8815_gpio_resources[block * 2], \
57 .dev = { \
58 .platform_data = &cpu8815_gpio[block], \
59 }, \
60 }
61
34static struct nmk_gpio_platform_data cpu8815_gpio[] = { 62static struct nmk_gpio_platform_data cpu8815_gpio[] = {
35 { 63 {
36 .name = "GPIO-0-31", 64 .name = "GPIO-0-31",
37 .first_gpio = 0, 65 .first_gpio = 0,
38 .first_irq = NOMADIK_GPIO_TO_IRQ(0), 66 .first_irq = NOMADIK_GPIO_TO_IRQ(0),
39 .parent_irq = IRQ_GPIO0,
40 }, { 67 }, {
41 .name = "GPIO-32-63", 68 .name = "GPIO-32-63",
42 .first_gpio = 32, 69 .first_gpio = 32,
43 .first_irq = NOMADIK_GPIO_TO_IRQ(32), 70 .first_irq = NOMADIK_GPIO_TO_IRQ(32),
44 .parent_irq = IRQ_GPIO1,
45 }, { 71 }, {
46 .name = "GPIO-64-95", 72 .name = "GPIO-64-95",
47 .first_gpio = 64, 73 .first_gpio = 64,
48 .first_irq = NOMADIK_GPIO_TO_IRQ(64), 74 .first_irq = NOMADIK_GPIO_TO_IRQ(64),
49 .parent_irq = IRQ_GPIO2,
50 }, { 75 }, {
51 .name = "GPIO-96-127", /* 124..127 not routed to pin */ 76 .name = "GPIO-96-127", /* 124..127 not routed to pin */
52 .first_gpio = 96, 77 .first_gpio = 96,
53 .first_irq = NOMADIK_GPIO_TO_IRQ(96), 78 .first_irq = NOMADIK_GPIO_TO_IRQ(96),
54 .parent_irq = IRQ_GPIO3,
55 } 79 }
56}; 80};
57 81
58#define __MEM_4K_RESOURCE(x) \ 82static struct resource cpu8815_gpio_resources[] = {
59 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} 83 GPIO_RESOURCE(0),
84 GPIO_RESOURCE(1),
85 GPIO_RESOURCE(2),
86 GPIO_RESOURCE(3),
87};
60 88
61static struct amba_device cpu8815_amba_gpio[] = { 89static struct platform_device cpu8815_platform_gpio[] = {
62 { 90 GPIO_DEVICE(0),
63 .dev = { 91 GPIO_DEVICE(1),
64 .init_name = "gpio0", 92 GPIO_DEVICE(2),
65 .platform_data = cpu8815_gpio + 0, 93 GPIO_DEVICE(3),
66 },
67 __MEM_4K_RESOURCE(NOMADIK_GPIO0_BASE),
68 }, {
69 .dev = {
70 .init_name = "gpio1",
71 .platform_data = cpu8815_gpio + 1,
72 },
73 __MEM_4K_RESOURCE(NOMADIK_GPIO1_BASE),
74 }, {
75 .dev = {
76 .init_name = "gpio2",
77 .platform_data = cpu8815_gpio + 2,
78 },
79 __MEM_4K_RESOURCE(NOMADIK_GPIO2_BASE),
80 }, {
81 .dev = {
82 .init_name = "gpio3",
83 .platform_data = cpu8815_gpio + 3,
84 },
85 __MEM_4K_RESOURCE(NOMADIK_GPIO3_BASE),
86 },
87}; 94};
88 95
89static struct amba_device cpu8815_amba_rng = { 96static struct amba_device cpu8815_amba_rng = {
@@ -93,11 +100,14 @@ static struct amba_device cpu8815_amba_rng = {
93 __MEM_4K_RESOURCE(NOMADIK_RNG_BASE), 100 __MEM_4K_RESOURCE(NOMADIK_RNG_BASE),
94}; 101};
95 102
103static struct platform_device *platform_devs[] __initdata = {
104 cpu8815_platform_gpio + 0,
105 cpu8815_platform_gpio + 1,
106 cpu8815_platform_gpio + 2,
107 cpu8815_platform_gpio + 3,
108};
109
96static struct amba_device *amba_devs[] __initdata = { 110static struct amba_device *amba_devs[] __initdata = {
97 cpu8815_amba_gpio + 0,
98 cpu8815_amba_gpio + 1,
99 cpu8815_amba_gpio + 2,
100 cpu8815_amba_gpio + 3,
101 &cpu8815_amba_rng 111 &cpu8815_amba_rng
102}; 112};
103 113
@@ -105,6 +115,7 @@ static int __init cpu8815_init(void)
105{ 115{
106 int i; 116 int i;
107 117
118 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
108 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) 119 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
109 amba_device_register(amba_devs[i], &iomem_resource); 120 amba_device_register(amba_devs[i], &iomem_resource);
110 return 0; 121 return 0;
diff --git a/arch/arm/mach-nomadik/include/mach/gpio.h b/arch/arm/mach-nomadik/include/mach/gpio.h
index 61577c9f9a7d..7a81a0420343 100644
--- a/arch/arm/mach-nomadik/include/mach/gpio.h
+++ b/arch/arm/mach-nomadik/include/mach/gpio.h
@@ -1,71 +1,6 @@
1/*
2 * Structures and registers for GPIO access in the Nomadik SoC
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 * Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
6 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef __ASM_ARCH_GPIO_H 1#ifndef __ASM_ARCH_GPIO_H
13#define __ASM_ARCH_GPIO_H 2#define __ASM_ARCH_GPIO_H
14 3
15#include <asm-generic/gpio.h> 4#include <plat/gpio.h>
16
17/*
18 * These currently cause a function call to happen, they may be optimized
19 * if needed by adding cpu-specific defines to identify blocks
20 * (see mach-pxa/include/mach/gpio.h as an example using GPLR etc)
21 */
22#define gpio_get_value __gpio_get_value
23#define gpio_set_value __gpio_set_value
24#define gpio_cansleep __gpio_cansleep
25#define gpio_to_irq __gpio_to_irq
26
27/*
28 * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
29 * the "gpio" namespace for generic and cross-machine functions
30 */
31
32/* Register in the logic block */
33#define NMK_GPIO_DAT 0x00
34#define NMK_GPIO_DATS 0x04
35#define NMK_GPIO_DATC 0x08
36#define NMK_GPIO_PDIS 0x0c
37#define NMK_GPIO_DIR 0x10
38#define NMK_GPIO_DIRS 0x14
39#define NMK_GPIO_DIRC 0x18
40#define NMK_GPIO_SLPC 0x1c
41#define NMK_GPIO_AFSLA 0x20
42#define NMK_GPIO_AFSLB 0x24
43
44#define NMK_GPIO_RIMSC 0x40
45#define NMK_GPIO_FIMSC 0x44
46#define NMK_GPIO_IS 0x48
47#define NMK_GPIO_IC 0x4c
48#define NMK_GPIO_RWIMSC 0x50
49#define NMK_GPIO_FWIMSC 0x54
50#define NMK_GPIO_WKS 0x58
51
52/* Alternate functions: function C is set in hw by setting both A and B */
53#define NMK_GPIO_ALT_GPIO 0
54#define NMK_GPIO_ALT_A 1
55#define NMK_GPIO_ALT_B 2
56#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
57
58extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
59extern int nmk_gpio_get_mode(int gpio);
60
61/*
62 * Platform data to register a block: only the initial gpio/irq number.
63 */
64struct nmk_gpio_platform_data {
65 char *name;
66 int first_gpio;
67 int first_irq;
68 int parent_irq;
69};
70 5
71#endif /* __ASM_ARCH_GPIO_H */ 6#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index e36639f66150..8e313b4b99a9 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -28,7 +28,6 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30#include <linux/input.h> 30#include <linux/input.h>
31#include <linux/bootmem.h>
32#include <linux/io.h> 31#include <linux/io.h>
33#include <linux/gpio.h> 32#include <linux/gpio.h>
34 33
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 2271b9bd1f50..12154d10e536 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -17,8 +17,10 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20#include <mach/irqs.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/map.h> 22#include <asm/mach/map.h>
23#include <asm/pmu.h>
22 24
23#include <plat/control.h> 25#include <plat/control.h>
24#include <plat/tc.h> 26#include <plat/tc.h>
@@ -453,6 +455,37 @@ static void omap_init_mcspi(void)
453static inline void omap_init_mcspi(void) {} 455static inline void omap_init_mcspi(void) {}
454#endif 456#endif
455 457
458static struct resource omap2_pmu_resource = {
459 .start = 3,
460 .end = 3,
461 .flags = IORESOURCE_IRQ,
462};
463
464static struct resource omap3_pmu_resource = {
465 .start = INT_34XX_BENCH_MPU_EMUL,
466 .end = INT_34XX_BENCH_MPU_EMUL,
467 .flags = IORESOURCE_IRQ,
468};
469
470static struct platform_device omap_pmu_device = {
471 .name = "arm-pmu",
472 .id = ARM_PMU_DEVICE_CPU,
473 .num_resources = 1,
474};
475
476static void omap_init_pmu(void)
477{
478 if (cpu_is_omap24xx())
479 omap_pmu_device.resource = &omap2_pmu_resource;
480 else if (cpu_is_omap34xx())
481 omap_pmu_device.resource = &omap3_pmu_resource;
482 else
483 return;
484
485 platform_device_register(&omap_pmu_device);
486}
487
488
456#ifdef CONFIG_OMAP_SHA1_MD5 489#ifdef CONFIG_OMAP_SHA1_MD5
457static struct resource sha1_md5_resources[] = { 490static struct resource sha1_md5_resources[] = {
458 { 491 {
@@ -797,6 +830,7 @@ static int __init omap2_init_devices(void)
797 omap_init_camera(); 830 omap_init_camera();
798 omap_init_mbox(); 831 omap_init_mbox();
799 omap_init_mcspi(); 832 omap_init_mcspi();
833 omap_init_pmu();
800 omap_hdq_init(); 834 omap_hdq_init();
801 omap_init_sti(); 835 omap_init_sti();
802 omap_init_sha1_md5(); 836 omap_init_sha1_md5();
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e436dcb19795..2c12e8cd7183 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -43,7 +43,6 @@
43#include <linux/err.h> 43#include <linux/err.h>
44#include <linux/list.h> 44#include <linux/list.h>
45#include <linux/mutex.h> 45#include <linux/mutex.h>
46#include <linux/bootmem.h>
47 46
48#include <plat/common.h> 47#include <plat/common.h>
49#include <plat/cpu.h> 48#include <plat/cpu.h>
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 421b82f7c63d..685f34a9634b 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -439,6 +439,7 @@ static void __init dns323_init(void)
439 */ 439 */
440 if (dns323_dev_id() == MV88F5181_DEV_ID) { 440 if (dns323_dev_id() == MV88F5181_DEV_ID) {
441 dns323_leds[0].active_low = 1; 441 dns323_leds[0].active_low = 1;
442 gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");
442 gpio_direction_output(DNS323_GPIO_LED_POWER1, 0); 443 gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
443 } 444 }
444 445
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 5b6ee46fa7f6..3b51741a4810 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -19,7 +19,6 @@ config MACH_MAINSTONE
19config MACH_ZYLONITE 19config MACH_ZYLONITE
20 bool 20 bool
21 select PXA3xx 21 select PXA3xx
22 select PXA_SSP
23 select HAVE_PWM 22 select HAVE_PWM
24 select PXA_HAVE_BOARD_IRQS 23 select PXA_HAVE_BOARD_IRQS
25 24
@@ -39,7 +38,6 @@ config MACH_LITTLETON
39 select PXA3xx 38 select PXA3xx
40 select CPU_PXA300 39 select CPU_PXA300
41 select CPU_PXA310 40 select CPU_PXA310
42 select PXA_SSP
43 41
44config MACH_TAVOREVB 42config MACH_TAVOREVB
45 bool "PXA930 Evaluation Board (aka TavorEVB)" 43 bool "PXA930 Evaluation Board (aka TavorEVB)"
@@ -98,7 +96,6 @@ config MACH_ARMCORE
98 select PXA27x 96 select PXA27x
99 select IWMMXT 97 select IWMMXT
100 select PXA25x 98 select PXA25x
101 select PXA_SSP
102 99
103config MACH_EM_X270 100config MACH_EM_X270
104 bool "CompuLab EM-x270 platform" 101 bool "CompuLab EM-x270 platform"
@@ -161,7 +158,6 @@ config MACH_XCEP
161 select MTD_CFI 158 select MTD_CFI
162 select MTD_CHAR 159 select MTD_CHAR
163 select SMC91X 160 select SMC91X
164 select PXA_SSP
165 help 161 help
166 PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash. 162 PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
167 Tuned for usage in Libera instruments for particle accelerators. 163 Tuned for usage in Libera instruments for particle accelerators.
@@ -180,7 +176,6 @@ config MACH_TRIZEPS4WL
180 depends on TRIZEPS_PXA 176 depends on TRIZEPS_PXA
181 select TRIZEPS_PCMCIA 177 select TRIZEPS_PCMCIA
182 select PXA27x 178 select PXA27x
183 select PXA_SSP
184 179
185choice 180choice
186 prompt "Select base board for Trizeps module" 181 prompt "Select base board for Trizeps module"
@@ -217,7 +212,6 @@ config MACH_PCM027
217 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" 212 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
218 select PXA27x 213 select PXA27x
219 select IWMMXT 214 select IWMMXT
220 select PXA_SSP
221 select PXA_HAVE_BOARD_IRQS 215 select PXA_HAVE_BOARD_IRQS
222 216
223config MACH_PCM990_BASEBOARD 217config MACH_PCM990_BASEBOARD
@@ -255,13 +249,19 @@ config MACH_COLIBRI320
255 select PXA3xx 249 select PXA3xx
256 select CPU_PXA320 250 select CPU_PXA320
257 251
252config MACH_VPAC270
253 bool "Voipac PXA270"
254 select PXA27x
255 select HAVE_PATA_PLATFORM
256 help
257 PXA270 based Single Board Computer.
258
258comment "End-user Products (sorted by vendor name)" 259comment "End-user Products (sorted by vendor name)"
259 260
260config MACH_H4700 261config MACH_H4700
261 bool "HP iPAQ hx4700" 262 bool "HP iPAQ hx4700"
262 select PXA27x 263 select PXA27x
263 select IWMMXT 264 select IWMMXT
264 select PXA_SSP
265 select HAVE_PWM 265 select HAVE_PWM
266 select PXA_HAVE_BOARD_IRQS 266 select PXA_HAVE_BOARD_IRQS
267 267
@@ -277,7 +277,6 @@ config MACH_MAGICIAN
277 bool "Enable HTC Magician Support" 277 bool "Enable HTC Magician Support"
278 select PXA27x 278 select PXA27x
279 select IWMMXT 279 select IWMMXT
280 select PXA_SSP
281 select HAVE_PWM 280 select HAVE_PWM
282 select PXA_HAVE_BOARD_IRQS 281 select PXA_HAVE_BOARD_IRQS
283 282
@@ -431,13 +430,11 @@ config MACH_RAUMFELD_CONNECTOR
431 bool "Raumfeld Connector" 430 bool "Raumfeld Connector"
432 select PXA3xx 431 select PXA3xx
433 select CPU_PXA300 432 select CPU_PXA300
434 select PXA_SSP
435 433
436config MACH_RAUMFELD_SPEAKER 434config MACH_RAUMFELD_SPEAKER
437 bool "Raumfeld Speaker" 435 bool "Raumfeld Speaker"
438 select PXA3xx 436 select PXA3xx
439 select CPU_PXA300 437 select CPU_PXA300
440 select PXA_SSP
441 438
442config PXA_SHARPSL 439config PXA_SHARPSL
443 bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models" 440 bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
@@ -461,21 +458,11 @@ config SHARPSL_PM_MAX1111
461 select HWMON 458 select HWMON
462 select SENSORS_MAX1111 459 select SENSORS_MAX1111
463 460
464config CORGI_SSP_DEPRECATED
465 bool
466 select PXA_SSP
467 select PXA_SSP_LEGACY
468 help
469 This option will include corgi_ssp.c and corgi_lcd.c
470 that corgi_ts.c and other legacy drivers (corgi_bl.c
471 and sharpsl_pm.c) may depend on.
472
473config MACH_POODLE 461config MACH_POODLE
474 bool "Enable Sharp SL-5600 (Poodle) Support" 462 bool "Enable Sharp SL-5600 (Poodle) Support"
475 depends on PXA_SHARPSL 463 depends on PXA_SHARPSL
476 select PXA25x 464 select PXA25x
477 select SHARP_LOCOMO 465 select SHARP_LOCOMO
478 select PXA_SSP
479 select PXA_HAVE_BOARD_IRQS 466 select PXA_HAVE_BOARD_IRQS
480 467
481config MACH_CORGI 468config MACH_CORGI
@@ -581,6 +568,12 @@ config MACH_E800
581 Say Y here if you intend to run this kernel on a Toshiba 568 Say Y here if you intend to run this kernel on a Toshiba
582 e800 family PDA. 569 e800 family PDA.
583 570
571config MACH_ZIPIT2
572 bool "Zipit Z2 Handheld"
573 select PXA27x
574 select HAVE_PWM
575 select PXA_HAVE_BOARD_IRQS
576
584endmenu 577endmenu
585 578
586config PXA25x 579config PXA25x
@@ -645,28 +638,16 @@ config CPU_PXA950
645 638
646config PXA_SHARP_C7xx 639config PXA_SHARP_C7xx
647 bool 640 bool
648 select PXA_SSP
649 select SHARPSL_PM 641 select SHARPSL_PM
650 help 642 help
651 Enable support for all Sharp C7xx models 643 Enable support for all Sharp C7xx models
652 644
653config PXA_SHARP_Cxx00 645config PXA_SHARP_Cxx00
654 bool 646 bool
655 select PXA_SSP
656 select SHARPSL_PM 647 select SHARPSL_PM
657 help 648 help
658 Enable common support for Sharp Cxx00 models 649 Enable common support for Sharp Cxx00 models
659 650
660config PXA_SSP
661 tristate
662 help
663 Enable support for PXA2xx SSP ports
664
665config PXA_SSP_LEGACY
666 bool
667 help
668 Support of legacy SSP API
669
670config TOSA_BT 651config TOSA_BT
671 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" 652 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
672 depends on MACH_TOSA 653 depends on MACH_TOSA
@@ -675,6 +656,18 @@ config TOSA_BT
675 This is a simple driver that is able to control 656 This is a simple driver that is able to control
676 the state of built in bluetooth chip on tosa. 657 the state of built in bluetooth chip on tosa.
677 658
659config TOSA_USE_EXT_KEYCODES
660 bool "Tosa keyboard: use extended keycodes"
661 depends on MACH_TOSA
662 default n
663 help
664 Say Y here to enable the tosa keyboard driver to generate extended
665 (>= 127) keycodes. Be aware, that they can't be correctly interpreted
666 by either console keyboard driver or by Kdrive keybd driver.
667
668 Say Y only if you know, what you are doing!
669
670
678config PXA_HAVE_BOARD_IRQS 671config PXA_HAVE_BOARD_IRQS
679 bool 672 bool
680 673
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 86bc87b7f2dd..b8f1f4bc7ca7 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_PXA3xx) += cpufreq-pxa3xx.o
14endif 14endif
15 15
16# Generic drivers that other drivers may depend upon 16# Generic drivers that other drivers may depend upon
17obj-$(CONFIG_PXA_SSP) += ssp.o
18 17
19# SoC-specific code 18# SoC-specific code
20obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o 19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o
@@ -62,6 +61,7 @@ obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
62obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o 61obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
63obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o 62obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
64obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o 63obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
64obj-$(CONFIG_MACH_VPAC270) += vpac270.o
65 65
66# End-user Products 66# End-user Products
67obj-$(CONFIG_MACH_H4700) += hx4700.o 67obj-$(CONFIG_MACH_H4700) += hx4700.o
@@ -80,7 +80,6 @@ obj-$(CONFIG_MACH_PALMLD) += palmld.o
80obj-$(CONFIG_PALM_TREO) += palmtreo.o 80obj-$(CONFIG_PALM_TREO) += palmtreo.o
81obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o 81obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
82obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o 82obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
83obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o
84obj-$(CONFIG_MACH_POODLE) += poodle.o 83obj-$(CONFIG_MACH_POODLE) += poodle.o
85obj-$(CONFIG_MACH_TOSA) += tosa.o 84obj-$(CONFIG_MACH_TOSA) += tosa.o
86obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o 85obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o
@@ -94,6 +93,7 @@ obj-$(CONFIG_MACH_E800) += e800.o
94obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o 93obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o
95obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o 94obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o
96obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o 95obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o
96obj-$(CONFIG_MACH_ZIPIT2) += z2.o
97 97
98# Support for blinky lights 98# Support for blinky lights
99led-y := leds.o 99led-y := leds.o
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index d37cfa132a65..fdda6be6c391 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -30,6 +30,9 @@
30#include <linux/i2c/pca953x.h> 30#include <linux/i2c/pca953x.h>
31 31
32#include <linux/mfd/da903x.h> 32#include <linux/mfd/da903x.h>
33#include <linux/regulator/machine.h>
34#include <linux/power_supply.h>
35#include <linux/apm-emulation.h>
33 36
34#include <linux/spi/spi.h> 37#include <linux/spi/spi.h>
35#include <linux/spi/spi_gpio.h> 38#include <linux/spi/spi_gpio.h>
@@ -430,7 +433,7 @@ static inline void cm_x300_init_nand(void) {}
430 433
431#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) 434#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
432static struct pxamci_platform_data cm_x300_mci_platform_data = { 435static struct pxamci_platform_data cm_x300_mci_platform_data = {
433 .detect_delay = 20, 436 .detect_delay_ms = 200,
434 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 437 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
435 .gpio_card_detect = GPIO82_MMC_IRQ, 438 .gpio_card_detect = GPIO82_MMC_IRQ,
436 .gpio_card_ro = GPIO85_MMC_WP, 439 .gpio_card_ro = GPIO85_MMC_WP,
@@ -451,7 +454,7 @@ static void cm_x300_mci2_exit(struct device *dev, void *data)
451} 454}
452 455
453static struct pxamci_platform_data cm_x300_mci2_platform_data = { 456static struct pxamci_platform_data cm_x300_mci2_platform_data = {
454 .detect_delay = 20, 457 .detect_delay_ms = 200,
455 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 458 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
456 .init = cm_x300_mci2_init, 459 .init = cm_x300_mci2_init,
457 .exit = cm_x300_mci2_exit, 460 .exit = cm_x300_mci2_exit,
@@ -584,12 +587,87 @@ static void __init cm_x300_init_rtc(void)
584static inline void cm_x300_init_rtc(void) {} 587static inline void cm_x300_init_rtc(void) {}
585#endif 588#endif
586 589
590/* Battery */
591struct power_supply_info cm_x300_psy_info = {
592 .name = "battery",
593 .technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
594 .voltage_max_design = 4200000,
595 .voltage_min_design = 3000000,
596 .use_for_apm = 1,
597};
598
599static void cm_x300_battery_low(void)
600{
601#if defined(CONFIG_APM_EMULATION)
602 apm_queue_event(APM_LOW_BATTERY);
603#endif
604}
605
606static void cm_x300_battery_critical(void)
607{
608#if defined(CONFIG_APM_EMULATION)
609 apm_queue_event(APM_CRITICAL_SUSPEND);
610#endif
611}
612
613struct da9030_battery_info cm_x300_battery_info = {
614 .battery_info = &cm_x300_psy_info,
615
616 .charge_milliamp = 1000,
617 .charge_millivolt = 4200,
618
619 .vbat_low = 3600,
620 .vbat_crit = 3400,
621 .vbat_charge_start = 4100,
622 .vbat_charge_stop = 4200,
623 .vbat_charge_restart = 4000,
624
625 .vcharge_min = 3200,
626 .vcharge_max = 5500,
627
628 .tbat_low = 197,
629 .tbat_high = 78,
630 .tbat_restart = 100,
631
632 .batmon_interval = 0,
633
634 .battery_low = cm_x300_battery_low,
635 .battery_critical = cm_x300_battery_critical,
636};
637
638static struct regulator_consumer_supply buck2_consumers[] = {
639 {
640 .dev = NULL,
641 .supply = "vcc_core",
642 },
643};
644
645static struct regulator_init_data buck2_data = {
646 .constraints = {
647 .min_uV = 1375000,
648 .max_uV = 1375000,
649 .state_mem = {
650 .enabled = 0,
651 },
652 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
653 .apply_uV = 1,
654 },
655 .num_consumer_supplies = ARRAY_SIZE(buck2_consumers),
656 .consumer_supplies = buck2_consumers,
657};
658
587/* DA9030 */ 659/* DA9030 */
588struct da903x_subdev_info cm_x300_da9030_subdevs[] = { 660struct da903x_subdev_info cm_x300_da9030_subdevs[] = {
589 { 661 {
590 .name = "da903x-backlight", 662 .name = "da903x-battery",
591 .id = DA9030_ID_WLED, 663 .id = DA9030_ID_BAT,
592 } 664 .platform_data = &cm_x300_battery_info,
665 },
666 {
667 .name = "da903x-regulator",
668 .id = DA9030_ID_BUCK2,
669 .platform_data = &buck2_data,
670 },
593}; 671};
594 672
595static struct da903x_platform_data cm_x300_da9030_info = { 673static struct da903x_platform_data cm_x300_da9030_info = {
@@ -599,7 +677,7 @@ static struct da903x_platform_data cm_x300_da9030_info = {
599 677
600static struct i2c_board_info cm_x300_pmic_info = { 678static struct i2c_board_info cm_x300_pmic_info = {
601 I2C_BOARD_INFO("da9030", 0x49), 679 I2C_BOARD_INFO("da9030", 0x49),
602 .irq = IRQ_GPIO(0), 680 .irq = IRQ_WAKEUP0,
603 .platform_data = &cm_x300_da9030_info, 681 .platform_data = &cm_x300_da9030_info,
604}; 682};
605 683
@@ -689,13 +767,13 @@ static void __init cm_x300_init(void)
689static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, 767static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
690 char **cmdline, struct meminfo *mi) 768 char **cmdline, struct meminfo *mi)
691{ 769{
692 mi->nr_banks = 2; 770 /* Make sure that mi->bank[0].start = PHYS_ADDR */
693 mi->bank[0].start = 0xa0000000; 771 for (; tags->hdr.size; tags = tag_next(tags))
694 mi->bank[0].node = 0; 772 if (tags->hdr.tag == ATAG_MEM &&
695 mi->bank[0].size = (64*1024*1024); 773 tags->u.mem.start == 0x80000000) {
696 mi->bank[1].start = 0xc0000000; 774 tags->u.mem.start = 0xa0000000;
697 mi->bank[1].node = 0; 775 break;
698 mi->bank[1].size = (64*1024*1024); 776 }
699} 777}
700 778
701MACHINE_START(CM_X300, "CM-X300 module") 779MACHINE_START(CM_X300, "CM-X300 module")
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index e6c0a2287eb8..199afa2ae303 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -96,7 +96,7 @@ static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
96} 96}
97 97
98static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = { 98static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
99 .detect_delay = 20, 99 .detect_delay_ms = 200,
100 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 100 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
101 .init = colibri_pxa3xx_mci_init, 101 .init = colibri_pxa3xx_mci_init,
102 .exit = colibri_pxa3xx_mci_exit, 102 .exit = colibri_pxa3xx_mci_exit,
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index da3156d8690b..3d1dcb9ac08f 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -106,18 +106,18 @@ static unsigned long corgi_pin_config[] __initdata = {
106 GPIO8_MMC_CS0, 106 GPIO8_MMC_CS0,
107 107
108 /* GPIO Matrix Keypad */ 108 /* GPIO Matrix Keypad */
109 GPIO66_GPIO, /* column 0 */ 109 GPIO66_GPIO | MFP_LPM_DRIVE_HIGH, /* column 0 */
110 GPIO67_GPIO, /* column 1 */ 110 GPIO67_GPIO | MFP_LPM_DRIVE_HIGH, /* column 1 */
111 GPIO68_GPIO, /* column 2 */ 111 GPIO68_GPIO | MFP_LPM_DRIVE_HIGH, /* column 2 */
112 GPIO69_GPIO, /* column 3 */ 112 GPIO69_GPIO | MFP_LPM_DRIVE_HIGH, /* column 3 */
113 GPIO70_GPIO, /* column 4 */ 113 GPIO70_GPIO | MFP_LPM_DRIVE_HIGH, /* column 4 */
114 GPIO71_GPIO, /* column 5 */ 114 GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* column 5 */
115 GPIO72_GPIO, /* column 6 */ 115 GPIO72_GPIO | MFP_LPM_DRIVE_HIGH, /* column 6 */
116 GPIO73_GPIO, /* column 7 */ 116 GPIO73_GPIO | MFP_LPM_DRIVE_HIGH, /* column 7 */
117 GPIO74_GPIO, /* column 8 */ 117 GPIO74_GPIO | MFP_LPM_DRIVE_HIGH, /* column 8 */
118 GPIO75_GPIO, /* column 9 */ 118 GPIO75_GPIO | MFP_LPM_DRIVE_HIGH, /* column 9 */
119 GPIO76_GPIO, /* column 10 */ 119 GPIO76_GPIO | MFP_LPM_DRIVE_HIGH, /* column 10 */
120 GPIO77_GPIO, /* column 11 */ 120 GPIO77_GPIO | MFP_LPM_DRIVE_HIGH, /* column 11 */
121 GPIO58_GPIO, /* row 0 */ 121 GPIO58_GPIO, /* row 0 */
122 GPIO59_GPIO, /* row 1 */ 122 GPIO59_GPIO, /* row 1 */
123 GPIO60_GPIO, /* row 2 */ 123 GPIO60_GPIO, /* row 2 */
@@ -128,13 +128,20 @@ static unsigned long corgi_pin_config[] __initdata = {
128 GPIO65_GPIO, /* row 7 */ 128 GPIO65_GPIO, /* row 7 */
129 129
130 /* GPIO */ 130 /* GPIO */
131 GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */ 131 GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */
132 GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */ 132 GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */
133 GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */ 133 GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_MAIN_BAT_{LOW,COVER} */
134 GPIO22_GPIO, /* CORGI_GPIO_IR_ON */ 134 GPIO13_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_LED_ORANGE */
135 GPIO44_GPIO, /* CORGI_GPIO_HSYNC */ 135 GPIO21_GPIO, /* CORGI_GPIO_ADC_TEMP */
136 136 GPIO22_GPIO, /* CORGI_GPIO_IR_ON */
137 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, 137 GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */
138 GPIO38_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_ON */
139 GPIO43_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_UKN */
140 GPIO44_GPIO, /* CORGI_GPIO_HSYNC */
141
142 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_KEY_INT */
143 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* CORGI_GPIO_AC_IN */
144 GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_WAKEUP */
138}; 145};
139 146
140/* 147/*
@@ -437,6 +444,7 @@ static struct platform_device corgiled_device = {
437 * to give the card a chance to fully insert/eject. 444 * to give the card a chance to fully insert/eject.
438 */ 445 */
439static struct pxamci_platform_data corgi_mci_platform_data = { 446static struct pxamci_platform_data corgi_mci_platform_data = {
447 .detect_delay_ms = 250,
440 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 448 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
441 .gpio_card_detect = -1, 449 .gpio_card_detect = -1,
442 .gpio_card_ro = CORGI_GPIO_nSD_WP, 450 .gpio_card_ro = CORGI_GPIO_nSD_WP,
@@ -672,6 +680,15 @@ static void __init corgi_init(void)
672 680
673 pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config)); 681 pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
674 682
683 /* allow wakeup from various GPIOs */
684 gpio_set_wake(CORGI_GPIO_KEY_INT, 1);
685 gpio_set_wake(CORGI_GPIO_WAKEUP, 1);
686 gpio_set_wake(CORGI_GPIO_AC_IN, 1);
687 gpio_set_wake(CORGI_GPIO_CHRG_FULL, 1);
688
689 if (!machine_is_corgi())
690 gpio_set_wake(CORGI_GPIO_MAIN_BAT_LOW, 1);
691
675 pxa_set_ffuart_info(NULL); 692 pxa_set_ffuart_info(NULL);
676 pxa_set_btuart_info(NULL); 693 pxa_set_btuart_info(NULL);
677 pxa_set_stuart_info(NULL); 694 pxa_set_stuart_info(NULL);
@@ -679,7 +696,6 @@ static void __init corgi_init(void)
679 corgi_init_spi(); 696 corgi_init_spi();
680 697
681 pxa_set_udc_info(&udc_info); 698 pxa_set_udc_info(&udc_info);
682 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
683 pxa_set_mci_info(&corgi_mci_platform_data); 699 pxa_set_mci_info(&corgi_mci_platform_data);
684 pxa_set_ficp_info(&corgi_ficp_platform_data); 700 pxa_set_ficp_info(&corgi_ficp_platform_data);
685 pxa_set_i2c_info(NULL); 701 pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c
deleted file mode 100644
index d9b96319d498..000000000000
--- a/arch/arm/mach-pxa/corgi_lcd.c
+++ /dev/null
@@ -1,288 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/corgi_lcd.c
3 *
4 * Corgi/Spitz LCD Specific Code
5 *
6 * Copyright (C) 2005 Richard Purdie
7 *
8 * Connectivity:
9 * Corgi - LCD to ATI Imageon w100 (Wallaby)
10 * Spitz - LCD to PXA Framebuffer
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/delay.h>
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21#include <linux/module.h>
22#include <linux/string.h>
23#include <mach/corgi.h>
24#include <mach/hardware.h>
25#include <mach/sharpsl.h>
26#include <mach/spitz.h>
27#include <asm/hardware/scoop.h>
28#include <asm/mach/sharpsl_param.h>
29#include "generic.h"
30
31/* Register Addresses */
32#define RESCTL_ADRS 0x00
33#define PHACTRL_ADRS 0x01
34#define DUTYCTRL_ADRS 0x02
35#define POWERREG0_ADRS 0x03
36#define POWERREG1_ADRS 0x04
37#define GPOR3_ADRS 0x05
38#define PICTRL_ADRS 0x06
39#define POLCTRL_ADRS 0x07
40
41/* Register Bit Definitions */
42#define RESCTL_QVGA 0x01
43#define RESCTL_VGA 0x00
44
45#define POWER1_VW_ON 0x01 /* VW Supply FET ON */
46#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */
47#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */
48
49#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */
50#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */
51#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */
52
53#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
54#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */
55#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
56#define POWER0_COM_ON 0x08 /* COM Power Supply ON */
57#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
58
59#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */
60#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */
61#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */
62
63#define PICTRL_INIT_STATE 0x01
64#define PICTRL_INIOFF 0x02
65#define PICTRL_POWER_DOWN 0x04
66#define PICTRL_COM_SIGNAL_OFF 0x08
67#define PICTRL_DAC_SIGNAL_OFF 0x10
68
69#define POLCTRL_SYNC_POL_FALL 0x01
70#define POLCTRL_EN_POL_FALL 0x02
71#define POLCTRL_DATA_POL_FALL 0x04
72#define POLCTRL_SYNC_ACT_H 0x08
73#define POLCTRL_EN_ACT_L 0x10
74
75#define POLCTRL_SYNC_POL_RISE 0x00
76#define POLCTRL_EN_POL_RISE 0x00
77#define POLCTRL_DATA_POL_RISE 0x00
78#define POLCTRL_SYNC_ACT_L 0x00
79#define POLCTRL_EN_ACT_H 0x00
80
81#define PHACTRL_PHASE_MANUAL 0x01
82#define DEFAULT_PHAD_QVGA (9)
83#define DEFAULT_COMADJ (125)
84
85/*
86 * This is only a psuedo I2C interface. We can't use the standard kernel
87 * routines as the interface is write only. We just assume the data is acked...
88 */
89static void lcdtg_ssp_i2c_send(u8 data)
90{
91 corgi_ssp_lcdtg_send(POWERREG0_ADRS, data);
92 udelay(10);
93}
94
95static void lcdtg_i2c_send_bit(u8 data)
96{
97 lcdtg_ssp_i2c_send(data);
98 lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK);
99 lcdtg_ssp_i2c_send(data);
100}
101
102static void lcdtg_i2c_send_start(u8 base)
103{
104 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
105 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
106 lcdtg_ssp_i2c_send(base);
107}
108
109static void lcdtg_i2c_send_stop(u8 base)
110{
111 lcdtg_ssp_i2c_send(base);
112 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
113 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
114}
115
116static void lcdtg_i2c_send_byte(u8 base, u8 data)
117{
118 int i;
119 for (i = 0; i < 8; i++) {
120 if (data & 0x80)
121 lcdtg_i2c_send_bit(base | POWER0_COM_DOUT);
122 else
123 lcdtg_i2c_send_bit(base);
124 data <<= 1;
125 }
126}
127
128static void lcdtg_i2c_wait_ack(u8 base)
129{
130 lcdtg_i2c_send_bit(base);
131}
132
133static void lcdtg_set_common_voltage(u8 base_data, u8 data)
134{
135 /* Set Common Voltage to M62332FP via I2C */
136 lcdtg_i2c_send_start(base_data);
137 lcdtg_i2c_send_byte(base_data, 0x9c);
138 lcdtg_i2c_wait_ack(base_data);
139 lcdtg_i2c_send_byte(base_data, 0x00);
140 lcdtg_i2c_wait_ack(base_data);
141 lcdtg_i2c_send_byte(base_data, data);
142 lcdtg_i2c_wait_ack(base_data);
143 lcdtg_i2c_send_stop(base_data);
144}
145
146/* Set Phase Adjust */
147static void lcdtg_set_phadadj(int mode)
148{
149 int adj;
150 switch(mode) {
151 case 480:
152 case 640:
153 /* Setting for VGA */
154 adj = sharpsl_param.phadadj;
155 if (adj < 0) {
156 adj = PHACTRL_PHASE_MANUAL;
157 } else {
158 adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL;
159 }
160 break;
161 case 240:
162 case 320:
163 default:
164 /* Setting for QVGA */
165 adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL;
166 break;
167 }
168
169 corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj);
170}
171
172static int lcd_inited;
173
174void corgi_lcdtg_hw_init(int mode)
175{
176 if (!lcd_inited) {
177 int comadj;
178
179 /* Initialize Internal Logic & Port */
180 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE
181 | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF);
182
183 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF
184 | POWER0_COM_OFF | POWER0_VCC5_OFF);
185
186 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
187
188 /* VDD(+8V), SVSS(-4V) ON */
189 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
190 mdelay(3);
191
192 /* DAC ON */
193 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
194 | POWER0_COM_OFF | POWER0_VCC5_OFF);
195
196 /* INIB = H, INI = L */
197 /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
198 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);
199
200 /* Set Common Voltage */
201 comadj = sharpsl_param.comadj;
202 if (comadj < 0)
203 comadj = DEFAULT_COMADJ;
204 lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj);
205
206 /* VCC5 ON, DAC ON */
207 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
208 POWER0_COM_OFF | POWER0_VCC5_ON);
209
210 /* GVSS(-8V) ON, VDD ON */
211 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
212 mdelay(2);
213
214 /* COM SIGNAL ON (PICTL[3] = L) */
215 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE);
216
217 /* COM ON, DAC ON, VCC5_ON */
218 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
219 | POWER0_COM_ON | POWER0_VCC5_ON);
220
221 /* VW ON, GVSS ON, VDD ON */
222 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);
223
224 /* Signals output enable */
225 corgi_ssp_lcdtg_send(PICTRL_ADRS, 0);
226
227 /* Set Phase Adjust */
228 lcdtg_set_phadadj(mode);
229
230 /* Initialize for Input Signals from ATI */
231 corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE
232 | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H);
233 udelay(1000);
234
235 lcd_inited=1;
236 } else {
237 lcdtg_set_phadadj(mode);
238 }
239
240 switch(mode) {
241 case 480:
242 case 640:
243 /* Set Lcd Resolution (VGA) */
244 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA);
245 break;
246 case 240:
247 case 320:
248 default:
249 /* Set Lcd Resolution (QVGA) */
250 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA);
251 break;
252 }
253}
254
255void corgi_lcdtg_suspend(void)
256{
257 /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
258 mdelay(34);
259
260 /* (1)VW OFF */
261 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
262
263 /* (2)COM OFF */
264 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
265 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
266
267 /* (3)Set Common Voltage Bias 0V */
268 lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0);
269
270 /* (4)GVSS OFF */
271 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
272
273 /* (5)VCC5 OFF */
274 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
275
276 /* (6)Set PDWN, INIOFF, DACOFF */
277 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
278 PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
279
280 /* (7)DAC OFF */
281 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
282
283 /* (8)VDD OFF */
284 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
285
286 lcd_inited = 0;
287}
288
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index d4a0733e905b..3f1dc74ac048 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/gpio.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/apm-emulation.h> 20#include <linux/apm-emulation.h>
@@ -25,7 +26,8 @@
25#include <mach/sharpsl.h> 26#include <mach/sharpsl.h>
26#include <mach/corgi.h> 27#include <mach/corgi.h>
27#include <mach/pxa2xx-regs.h> 28#include <mach/pxa2xx-regs.h>
28#include <mach/pxa2xx-gpio.h> 29
30#include "generic.h"
29#include "sharpsl.h" 31#include "sharpsl.h"
30 32
31#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ 33#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
@@ -35,87 +37,46 @@
35#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ 37#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */
36#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ 38#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */
37 39
40static struct gpio charger_gpios[] = {
41 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
42 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
43 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" },
44 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" },
45};
46
38static void corgi_charger_init(void) 47static void corgi_charger_init(void)
39{ 48{
40 pxa_gpio_mode(CORGI_GPIO_ADC_TEMP_ON | GPIO_OUT); 49 gpio_request_array(ARRAY_AND_SIZE(charger_gpios));
41 pxa_gpio_mode(CORGI_GPIO_CHRG_ON | GPIO_OUT);
42 pxa_gpio_mode(CORGI_GPIO_CHRG_UKN | GPIO_OUT);
43 pxa_gpio_mode(CORGI_GPIO_KEY_INT | GPIO_IN);
44} 50}
45 51
46static void corgi_measure_temp(int on) 52static void corgi_measure_temp(int on)
47{ 53{
48 if (on) 54 gpio_set_value(CORGI_GPIO_ADC_TEMP_ON, on);
49 GPSR(CORGI_GPIO_ADC_TEMP_ON) = GPIO_bit(CORGI_GPIO_ADC_TEMP_ON);
50 else
51 GPCR(CORGI_GPIO_ADC_TEMP_ON) = GPIO_bit(CORGI_GPIO_ADC_TEMP_ON);
52} 55}
53 56
54static void corgi_charge(int on) 57static void corgi_charge(int on)
55{ 58{
56 if (on) { 59 if (on) {
57 if (machine_is_corgi() && (sharpsl_pm.flags & SHARPSL_SUSPENDED)) { 60 if (machine_is_corgi() && (sharpsl_pm.flags & SHARPSL_SUSPENDED)) {
58 GPCR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON); 61 gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
59 GPSR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN); 62 gpio_set_value(CORGI_GPIO_CHRG_UKN, 1);
60 } else { 63 } else {
61 GPSR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON); 64 gpio_set_value(CORGI_GPIO_CHRG_ON, 1);
62 GPCR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN); 65 gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
63 } 66 }
64 } else { 67 } else {
65 GPCR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON); 68 gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
66 GPCR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN); 69 gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
67 } 70 }
68} 71}
69 72
70static void corgi_discharge(int on) 73static void corgi_discharge(int on)
71{ 74{
72 if (on) 75 gpio_set_value(CORGI_GPIO_DISCHARGE_ON, on);
73 GPSR(CORGI_GPIO_DISCHARGE_ON) = GPIO_bit(CORGI_GPIO_DISCHARGE_ON);
74 else
75 GPCR(CORGI_GPIO_DISCHARGE_ON) = GPIO_bit(CORGI_GPIO_DISCHARGE_ON);
76} 76}
77 77
78static void corgi_presuspend(void) 78static void corgi_presuspend(void)
79{ 79{
80 int i;
81 unsigned long wakeup_mask;
82
83 /* charging , so CHARGE_ON bit is HIGH during OFF. */
84 if (READ_GPIO_BIT(CORGI_GPIO_CHRG_ON))
85 PGSR1 |= GPIO_bit(CORGI_GPIO_CHRG_ON);
86 else
87 PGSR1 &= ~GPIO_bit(CORGI_GPIO_CHRG_ON);
88
89 if (READ_GPIO_BIT(CORGI_GPIO_LED_ORANGE))
90 PGSR0 |= GPIO_bit(CORGI_GPIO_LED_ORANGE);
91 else
92 PGSR0 &= ~GPIO_bit(CORGI_GPIO_LED_ORANGE);
93
94 if (READ_GPIO_BIT(CORGI_GPIO_CHRG_UKN))
95 PGSR1 |= GPIO_bit(CORGI_GPIO_CHRG_UKN);
96 else
97 PGSR1 &= ~GPIO_bit(CORGI_GPIO_CHRG_UKN);
98
99 /* Resume on keyboard power key */
100 PGSR2 = (PGSR2 & ~CORGI_GPIO_ALL_STROBE_BIT) | CORGI_GPIO_STROBE_BIT(0);
101
102 wakeup_mask = GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) | GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_CHRG_FULL);
103
104 if (!machine_is_corgi())
105 wakeup_mask |= GPIO_bit(CORGI_GPIO_MAIN_BAT_LOW);
106
107 PWER = wakeup_mask | PWER_RTC;
108 PRER = wakeup_mask;
109 PFER = wakeup_mask;
110
111 for (i = 0; i <=15; i++) {
112 if (PRER & PFER & GPIO_bit(i)) {
113 if (GPLR0 & GPIO_bit(i) )
114 PRER &= ~GPIO_bit(i);
115 else
116 PFER &= ~GPIO_bit(i);
117 }
118 }
119} 80}
120 81
121static void corgi_postsuspend(void) 82static void corgi_postsuspend(void)
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
deleted file mode 100644
index 9347254f8bcf..000000000000
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ /dev/null
@@ -1,274 +0,0 @@
1/*
2 * SSP control code for Sharp Corgi devices
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/delay.h>
17#include <linux/platform_device.h>
18#include <mach/hardware.h>
19#include <asm/mach-types.h>
20
21#include <mach/ssp.h>
22#include <mach/pxa2xx-gpio.h>
23#include <mach/regs-ssp.h>
24#include "sharpsl.h"
25
26static DEFINE_SPINLOCK(corgi_ssp_lock);
27static struct ssp_dev corgi_ssp_dev;
28static struct ssp_state corgi_ssp_state;
29static struct corgissp_machinfo *ssp_machinfo;
30
31/*
32 * There are three devices connected to the SSP interface:
33 * 1. A touchscreen controller (TI ADS7846 compatible)
34 * 2. An LCD controller (with some Backlight functionality)
35 * 3. A battery monitoring IC (Maxim MAX1111)
36 *
37 * Each device uses a different speed/mode of communication.
38 *
39 * The touchscreen is very sensitive and the most frequently used
40 * so the port is left configured for this.
41 *
42 * Devices are selected using Chip Selects on GPIOs.
43 */
44
45/*
46 * ADS7846 Routines
47 */
48unsigned long corgi_ssp_ads7846_putget(ulong data)
49{
50 unsigned long flag;
51 u32 ret = 0;
52
53 spin_lock_irqsave(&corgi_ssp_lock, flag);
54 if (ssp_machinfo->cs_ads7846 >= 0)
55 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
56
57 ssp_write_word(&corgi_ssp_dev,data);
58 ssp_read_word(&corgi_ssp_dev, &ret);
59
60 if (ssp_machinfo->cs_ads7846 >= 0)
61 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
62 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
63
64 return ret;
65}
66
67/*
68 * NOTE: These functions should always be called in interrupt context
69 * and use the _lock and _unlock functions. They are very time sensitive.
70 */
71void corgi_ssp_ads7846_lock(void)
72{
73 spin_lock(&corgi_ssp_lock);
74 if (ssp_machinfo->cs_ads7846 >= 0)
75 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
76}
77
78void corgi_ssp_ads7846_unlock(void)
79{
80 if (ssp_machinfo->cs_ads7846 >= 0)
81 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
82 spin_unlock(&corgi_ssp_lock);
83}
84
85void corgi_ssp_ads7846_put(ulong data)
86{
87 ssp_write_word(&corgi_ssp_dev,data);
88}
89
90unsigned long corgi_ssp_ads7846_get(void)
91{
92 u32 ret = 0;
93 ssp_read_word(&corgi_ssp_dev, &ret);
94 return ret;
95}
96
97EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
98EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
99EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
100EXPORT_SYMBOL(corgi_ssp_ads7846_put);
101EXPORT_SYMBOL(corgi_ssp_ads7846_get);
102
103
104/*
105 * LCD/Backlight Routines
106 */
107unsigned long corgi_ssp_dac_put(ulong data)
108{
109 unsigned long flag, sscr1 = SSCR1_SPH;
110 u32 tmp;
111
112 spin_lock_irqsave(&corgi_ssp_lock, flag);
113
114 if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi())
115 sscr1 = 0;
116
117 ssp_disable(&corgi_ssp_dev);
118 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
119 ssp_enable(&corgi_ssp_dev);
120
121 if (ssp_machinfo->cs_lcdcon >= 0)
122 GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
123 ssp_write_word(&corgi_ssp_dev,data);
124 /* Read null data back from device to prevent SSP overflow */
125 ssp_read_word(&corgi_ssp_dev, &tmp);
126 if (ssp_machinfo->cs_lcdcon >= 0)
127 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
128
129 ssp_disable(&corgi_ssp_dev);
130 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
131 ssp_enable(&corgi_ssp_dev);
132
133 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
134
135 return 0;
136}
137
138void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
139{
140 corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
141}
142
143void corgi_ssp_blduty_set(int duty)
144{
145 corgi_ssp_lcdtg_send(0x02,duty);
146}
147
148EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
149EXPORT_SYMBOL(corgi_ssp_blduty_set);
150
151/*
152 * Max1111 Routines
153 */
154int corgi_ssp_max1111_get(ulong data)
155{
156 unsigned long flag;
157 long voltage = 0, voltage1 = 0, voltage2 = 0;
158
159 spin_lock_irqsave(&corgi_ssp_lock, flag);
160 if (ssp_machinfo->cs_max1111 >= 0)
161 GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
162 ssp_disable(&corgi_ssp_dev);
163 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
164 ssp_enable(&corgi_ssp_dev);
165
166 udelay(1);
167
168 /* TB1/RB1 */
169 ssp_write_word(&corgi_ssp_dev,data);
170 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */
171
172 /* TB12/RB2 */
173 ssp_write_word(&corgi_ssp_dev,0);
174 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1);
175
176 /* TB13/RB3*/
177 ssp_write_word(&corgi_ssp_dev,0);
178 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2);
179
180 ssp_disable(&corgi_ssp_dev);
181 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
182 ssp_enable(&corgi_ssp_dev);
183 if (ssp_machinfo->cs_max1111 >= 0)
184 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
185 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
186
187 if (voltage1 & 0xc0 || voltage2 & 0x3f)
188 voltage = -1;
189 else
190 voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);
191
192 return voltage;
193}
194
195EXPORT_SYMBOL(corgi_ssp_max1111_get);
196
197/*
198 * Support Routines
199 */
200
201void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
202{
203 ssp_machinfo = machinfo;
204}
205
206static int __devinit corgi_ssp_probe(struct platform_device *dev)
207{
208 int ret;
209
210 /* Chip Select - Disable All */
211 if (ssp_machinfo->cs_lcdcon >= 0)
212 pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH);
213 if (ssp_machinfo->cs_max1111 >= 0)
214 pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
215 if (ssp_machinfo->cs_ads7846 >= 0)
216 pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
217
218 ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
219
220 if (ret)
221 printk(KERN_ERR "Unable to register SSP handler!\n");
222 else {
223 ssp_disable(&corgi_ssp_dev);
224 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
225 ssp_enable(&corgi_ssp_dev);
226 }
227
228 return ret;
229}
230
231static int corgi_ssp_remove(struct platform_device *dev)
232{
233 ssp_exit(&corgi_ssp_dev);
234 return 0;
235}
236
237static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
238{
239 ssp_flush(&corgi_ssp_dev);
240 ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
241
242 return 0;
243}
244
245static int corgi_ssp_resume(struct platform_device *dev)
246{
247 if (ssp_machinfo->cs_lcdcon >= 0)
248 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
249 if (ssp_machinfo->cs_max1111 >= 0)
250 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
251 if (ssp_machinfo->cs_ads7846 >= 0)
252 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
253 ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
254 ssp_enable(&corgi_ssp_dev);
255
256 return 0;
257}
258
259static struct platform_driver corgissp_driver = {
260 .probe = corgi_ssp_probe,
261 .remove = corgi_ssp_remove,
262 .suspend = corgi_ssp_suspend,
263 .resume = corgi_ssp_resume,
264 .driver = {
265 .name = "corgi-ssp",
266 },
267};
268
269int __init corgi_ssp_init(void)
270{
271 return platform_driver_register(&corgissp_driver);
272}
273
274arch_initcall(corgi_ssp_init);
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 88575b87bd33..91fd4fea6a54 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -125,18 +125,9 @@ static unsigned long csb726_pin_config[] = {
125 GPIO118_I2C_SDA, 125 GPIO118_I2C_SDA,
126}; 126};
127 127
128static struct pxamci_platform_data csb726_mci_data;
129
130static int csb726_mci_init(struct device *dev,
131 irq_handler_t detect, void *data)
132{
133 csb726_mci_data.detect_delay = msecs_to_jiffies(500);
134 return 0;
135}
136
137static struct pxamci_platform_data csb726_mci = { 128static struct pxamci_platform_data csb726_mci = {
129 .detect_delay_ms = 500,
138 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 130 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
139 .init = csb726_mci_init,
140 /* FIXME setpower */ 131 /* FIXME setpower */
141 .gpio_card_detect = CSB726_GPIO_MMC_DETECT, 132 .gpio_card_detect = CSB726_GPIO_MMC_DETECT,
142 .gpio_card_ro = CSB726_GPIO_MMC_RO, 133 .gpio_card_ro = CSB726_GPIO_MMC_RO,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index aab04f33e49b..0517c17978f3 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -626,6 +626,7 @@ static int em_x270_mci_get_ro(struct device *dev)
626} 626}
627 627
628static struct pxamci_platform_data em_x270_mci_platform_data = { 628static struct pxamci_platform_data em_x270_mci_platform_data = {
629 .detect_delay_ms = 250,
629 .ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23| 630 .ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23|
630 MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27| 631 MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
631 MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30| 632 MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
@@ -643,7 +644,6 @@ static void __init em_x270_init_mmc(void)
643 if (machine_is_em_x270()) 644 if (machine_is_em_x270())
644 em_x270_mci_platform_data.get_ro = em_x270_mci_get_ro; 645 em_x270_mci_platform_data.get_ro = em_x270_mci_get_ro;
645 646
646 em_x270_mci_platform_data.detect_delay = msecs_to_jiffies(250);
647 pxa_set_mci_info(&em_x270_mci_platform_data); 647 pxa_set_mci_info(&em_x270_mci_platform_data);
648} 648}
649#else 649#else
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 3126a35aa002..baabb3ce088e 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -28,7 +28,6 @@
28 28
29#include <mach/reset.h> 29#include <mach/reset.h>
30#include <mach/gpio.h> 30#include <mach/gpio.h>
31#include <mach/pxa2xx-gpio.h>
32 31
33#include "generic.h" 32#include "generic.h"
34 33
@@ -128,33 +127,3 @@ void __init pxa_map_io(void)
128 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 127 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
129 get_clk_frequency_khz(1); 128 get_clk_frequency_khz(1);
130} 129}
131
132/*
133 * Configure pins for GPIO or other functions
134 */
135int pxa_gpio_mode(int gpio_mode)
136{
137 unsigned long flags;
138 int gpio = gpio_mode & GPIO_MD_MASK_NR;
139 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
140 int gafr;
141
142 if (gpio > pxa_last_gpio)
143 return -EINVAL;
144
145 local_irq_save(flags);
146 if (gpio_mode & GPIO_DFLT_LOW)
147 GPCR(gpio) = GPIO_bit(gpio);
148 else if (gpio_mode & GPIO_DFLT_HIGH)
149 GPSR(gpio) = GPIO_bit(gpio);
150 if (gpio_mode & GPIO_MD_MASK_DIR)
151 GPDR(gpio) |= GPIO_bit(gpio);
152 else
153 GPDR(gpio) &= ~GPIO_bit(gpio);
154 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
155 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
156 local_irq_restore(flags);
157
158 return 0;
159}
160EXPORT_SYMBOL(pxa_gpio_mode);
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 7239281788de..585970ef08ce 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -113,7 +113,6 @@
113 * Shared data structures 113 * Shared data structures
114 */ 114 */
115extern struct platform_device corgiscoop_device; 115extern struct platform_device corgiscoop_device;
116extern struct platform_device corgissp_device;
117 116
118#endif /* __ASM_ARCH_CORGI_H */ 117#endif /* __ASM_ARCH_CORGI_H */
119 118
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
index 658b28ed129b..c54cef25895c 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
@@ -25,6 +25,8 @@
25#define MFP_DIR(x) (((x) >> 23) & 0x1) 25#define MFP_DIR(x) (((x) >> 23) & 0x1)
26 26
27#define MFP_LPM_CAN_WAKEUP (0x1 << 24) 27#define MFP_LPM_CAN_WAKEUP (0x1 << 24)
28#define MFP_LPM_KEEP_OUTPUT (0x1 << 25)
29
28#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) 30#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
29#define WAKEUP_ON_EDGE_FALL (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL) 31#define WAKEUP_ON_EDGE_FALL (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL)
30#define WAKEUP_ON_EDGE_BOTH (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH) 32#define WAKEUP_ON_EDGE_BOTH (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH)
diff --git a/arch/arm/mach-pxa/include/mach/mmc.h b/arch/arm/mach-pxa/include/mach/mmc.h
index 02a69dc2ee63..9eb515bb799d 100644
--- a/arch/arm/mach-pxa/include/mach/mmc.h
+++ b/arch/arm/mach-pxa/include/mach/mmc.h
@@ -9,7 +9,7 @@ struct mmc_host;
9 9
10struct pxamci_platform_data { 10struct pxamci_platform_data {
11 unsigned int ocr_mask; /* available voltages */ 11 unsigned int ocr_mask; /* available voltages */
12 unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */ 12 unsigned long detect_delay_ms; /* delay in millisecond before detecting cards after interrupt */
13 int (*init)(struct device *, irq_handler_t , void *); 13 int (*init)(struct device *, irq_handler_t , void *);
14 int (*get_ro)(struct device *); 14 int (*get_ro)(struct device *);
15 void (*setpower)(struct device *, unsigned int); 15 void (*setpower)(struct device *, unsigned int);
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
deleted file mode 100644
index 1209c44aa6f1..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
+++ /dev/null
@@ -1,375 +0,0 @@
1#ifndef __ASM_ARCH_PXA2XX_GPIO_H
2#define __ASM_ARCH_PXA2XX_GPIO_H
3
4#warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h
5
6#include <mach/gpio.h>
7
8/* GPIO alternate function assignments */
9
10#define GPIO1_RST 1 /* reset */
11#define GPIO6_MMCCLK 6 /* MMC Clock */
12#define GPIO7_48MHz 7 /* 48 MHz clock output */
13#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */
14#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */
15#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */
16#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */
17#define GPIO12_32KHz 12 /* 32 kHz out */
18#define GPIO12_CIF_DD_7 12 /* Camera data pin 7 */
19#define GPIO13_MBGNT 13 /* memory controller grant */
20#define GPIO14_MBREQ 14 /* alternate bus master request */
21#define GPIO15_nCS_1 15 /* chip select 1 */
22#define GPIO16_PWM0 16 /* PWM0 output */
23#define GPIO17_PWM1 17 /* PWM1 output */
24#define GPIO17_CIF_DD_6 17 /* Camera data pin 6 */
25#define GPIO18_RDY 18 /* Ext. Bus Ready */
26#define GPIO19_DREQ1 19 /* External DMA Request */
27#define GPIO20_DREQ0 20 /* External DMA Request */
28#define GPIO23_SCLK 23 /* SSP clock */
29#define GPIO23_CIF_MCLK 23 /* Camera Master Clock */
30#define GPIO24_SFRM 24 /* SSP Frame */
31#define GPIO24_CIF_FV 24 /* Camera frame start signal */
32#define GPIO25_STXD 25 /* SSP transmit */
33#define GPIO25_CIF_LV 25 /* Camera line start signal */
34#define GPIO26_SRXD 26 /* SSP receive */
35#define GPIO26_CIF_PCLK 26 /* Camera Pixel Clock */
36#define GPIO27_SEXTCLK 27 /* SSP ext_clk */
37#define GPIO27_CIF_DD_0 27 /* Camera data pin 0 */
38#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */
39#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */
40#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */
41#define GPIO31_SYNC 31 /* AC97/I2S sync */
42#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */
43#define GPIO32_SYSCLK 32 /* I2S System Clock */
44#define GPIO32_MMCCLK 32 /* MMC Clock (PXA270) */
45#define GPIO33_nCS_5 33 /* chip select 5 */
46#define GPIO34_FFRXD 34 /* FFUART receive */
47#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */
48#define GPIO35_FFCTS 35 /* FFUART Clear to send */
49#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */
50#define GPIO37_FFDSR 37 /* FFUART data set ready */
51#define GPIO38_FFRI 38 /* FFUART Ring Indicator */
52#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */
53#define GPIO39_FFTXD 39 /* FFUART transmit data */
54#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */
55#define GPIO41_FFRTS 41 /* FFUART request to send */
56#define GPIO42_BTRXD 42 /* BTUART receive data */
57#define GPIO42_HWRXD 42 /* HWUART receive data */
58#define GPIO42_CIF_MCLK 42 /* Camera Master Clock */
59#define GPIO43_BTTXD 43 /* BTUART transmit data */
60#define GPIO43_HWTXD 43 /* HWUART transmit data */
61#define GPIO43_CIF_FV 43 /* Camera frame start signal */
62#define GPIO44_BTCTS 44 /* BTUART clear to send */
63#define GPIO44_HWCTS 44 /* HWUART clear to send */
64#define GPIO44_CIF_LV 44 /* Camera line start signal */
65#define GPIO45_BTRTS 45 /* BTUART request to send */
66#define GPIO45_HWRTS 45 /* HWUART request to send */
67#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */
68#define GPIO45_CIF_PCLK 45 /* Camera Pixel Clock */
69#define GPIO46_ICPRXD 46 /* ICP receive data */
70#define GPIO46_STRXD 46 /* STD_UART receive data */
71#define GPIO47_ICPTXD 47 /* ICP transmit data */
72#define GPIO47_STTXD 47 /* STD_UART transmit data */
73#define GPIO47_CIF_DD_0 47 /* Camera data pin 0 */
74#define GPIO48_nPOE 48 /* Output Enable for Card Space */
75#define GPIO48_CIF_DD_5 48 /* Camera data pin 5 */
76#define GPIO49_nPWE 49 /* Write Enable for Card Space */
77#define GPIO50_nPIOR 50 /* I/O Read for Card Space */
78#define GPIO50_CIF_DD_3 50 /* Camera data pin 3 */
79#define GPIO51_nPIOW 51 /* I/O Write for Card Space */
80#define GPIO51_CIF_DD_2 51 /* Camera data pin 2 */
81#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */
82#define GPIO52_CIF_DD_4 52 /* Camera data pin 4 */
83#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */
84#define GPIO53_MMCCLK 53 /* MMC Clock */
85#define GPIO53_CIF_MCLK 53 /* Camera Master Clock */
86#define GPIO54_MMCCLK 54 /* MMC Clock */
87#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */
88#define GPIO54_nPCE_2 54 /* Card Enable for Card Space (PXA27x) */
89#define GPIO54_CIF_PCLK 54 /* Camera Pixel Clock */
90#define GPIO55_nPREG 55 /* Card Address bit 26 */
91#define GPIO55_CIF_DD_1 55 /* Camera data pin 1 */
92#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */
93#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */
94#define GPIO58_LDD_0 58 /* LCD data pin 0 */
95#define GPIO59_LDD_1 59 /* LCD data pin 1 */
96#define GPIO60_LDD_2 60 /* LCD data pin 2 */
97#define GPIO61_LDD_3 61 /* LCD data pin 3 */
98#define GPIO62_LDD_4 62 /* LCD data pin 4 */
99#define GPIO63_LDD_5 63 /* LCD data pin 5 */
100#define GPIO64_LDD_6 64 /* LCD data pin 6 */
101#define GPIO65_LDD_7 65 /* LCD data pin 7 */
102#define GPIO66_LDD_8 66 /* LCD data pin 8 */
103#define GPIO66_MBREQ 66 /* alternate bus master req */
104#define GPIO67_LDD_9 67 /* LCD data pin 9 */
105#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */
106#define GPIO68_LDD_10 68 /* LCD data pin 10 */
107#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */
108#define GPIO69_LDD_11 69 /* LCD data pin 11 */
109#define GPIO69_MMCCLK 69 /* MMC_CLK */
110#define GPIO70_LDD_12 70 /* LCD data pin 12 */
111#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */
112#define GPIO71_LDD_13 71 /* LCD data pin 13 */
113#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */
114#define GPIO72_LDD_14 72 /* LCD data pin 14 */
115#define GPIO72_32kHz 72 /* 32 kHz clock */
116#define GPIO73_LDD_15 73 /* LCD data pin 15 */
117#define GPIO73_MBGNT 73 /* Memory controller grant */
118#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */
119#define GPIO75_LCD_LCLK 75 /* LCD line clock */
120#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */
121#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */
122#define GPIO78_nCS_2 78 /* chip select 2 */
123#define GPIO79_nCS_3 79 /* chip select 3 */
124#define GPIO80_nCS_4 80 /* chip select 4 */
125#define GPIO81_NSCLK 81 /* NSSP clock */
126#define GPIO81_CIF_DD_0 81 /* Camera data pin 0 */
127#define GPIO82_NSFRM 82 /* NSSP Frame */
128#define GPIO82_CIF_DD_5 82 /* Camera data pin 5 */
129#define GPIO83_NSTXD 83 /* NSSP transmit */
130#define GPIO83_CIF_DD_4 83 /* Camera data pin 4 */
131#define GPIO84_NSRXD 84 /* NSSP receive */
132#define GPIO84_CIF_FV 84 /* Camera frame start signal */
133#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
134#define GPIO85_CIF_LV 85 /* Camera line start signal */
135#define GPIO90_CIF_DD_4 90 /* Camera data pin 4 */
136#define GPIO91_CIF_DD_5 91 /* Camera data pin 5 */
137#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
138#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */
139#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */
140#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */
141#define GPIO96_FFRXD 96 /* FFUART recieve */
142#define GPIO98_FFRTS 98 /* FFUART request to send */
143#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */
144#define GPIO99_FFTXD 99 /* FFUART transmit data */
145#define GPIO100_FFCTS 100 /* FFUART Clear to send */
146#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
147#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */
148#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */
149#define GPIO105_CIF_DD_1 105 /* Camera data pin 1 */
150#define GPIO106_CIF_DD_9 106 /* Camera data pin 9 */
151#define GPIO107_CIF_DD_8 107 /* Camera data pin 8 */
152#define GPIO108_CIF_DD_7 108 /* Camera data pin 7 */
153#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
154#define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */
155#define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */
156#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */
157#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */
158#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */
159#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */
160#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */
161#define GPIO114_CIF_DD_1 114 /* Camera data pin 1 */
162#define GPIO115_CIF_DD_3 115 /* Camera data pin 3 */
163#define GPIO116_CIF_DD_2 116 /* Camera data pin 2 */
164
165/* GPIO alternate function mode & direction */
166
167#define GPIO_IN 0x000
168#define GPIO_OUT 0x080
169#define GPIO_ALT_FN_1_IN 0x100
170#define GPIO_ALT_FN_1_OUT 0x180
171#define GPIO_ALT_FN_2_IN 0x200
172#define GPIO_ALT_FN_2_OUT 0x280
173#define GPIO_ALT_FN_3_IN 0x300
174#define GPIO_ALT_FN_3_OUT 0x380
175#define GPIO_MD_MASK_NR 0x07f
176#define GPIO_MD_MASK_DIR 0x080
177#define GPIO_MD_MASK_FN 0x300
178#define GPIO_DFLT_LOW 0x400
179#define GPIO_DFLT_HIGH 0x800
180
181#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN)
182#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT)
183#define GPIO7_48MHz_MD ( 7 | GPIO_ALT_FN_1_OUT)
184#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT)
185#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT)
186#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT)
187#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT)
188#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT)
189#define GPIO12_CIF_DD_7_MD (12 | GPIO_ALT_FN_2_IN)
190#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT)
191#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN)
192#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT)
193#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT)
194#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT)
195#define GPIO17_CIF_DD_6_MD (17 | GPIO_ALT_FN_2_IN)
196#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN)
197#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN)
198#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN)
199#define GPIO23_CIF_MCLK_MD (23 | GPIO_ALT_FN_1_OUT)
200#define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT)
201#define GPIO24_CIF_FV_MD (24 | GPIO_ALT_FN_1_OUT)
202#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT)
203#define GPIO25_CIF_LV_MD (25 | GPIO_ALT_FN_1_OUT)
204#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT)
205#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN)
206#define GPIO26_CIF_PCLK_MD (26 | GPIO_ALT_FN_2_IN)
207#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN)
208#define GPIO27_CIF_DD_0_MD (27 | GPIO_ALT_FN_3_IN)
209#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN)
210#define GPIO28_BITCLK_IN_I2S_MD (28 | GPIO_ALT_FN_2_IN)
211#define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT)
212#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN)
213#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN)
214#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT)
215#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT)
216#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT)
217#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT)
218#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN)
219#define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT)
220#define GPIO32_MMCCLK_MD (32 | GPIO_ALT_FN_2_OUT)
221#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT)
222#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN)
223#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT)
224#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN)
225#define GPIO35_KP_MKOUT6_MD (35 | GPIO_ALT_FN_2_OUT)
226#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN)
227#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN)
228#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN)
229#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT)
230#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT)
231#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT)
232#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT)
233#define GPIO41_KP_MKOUT7_MD (41 | GPIO_ALT_FN_1_OUT)
234#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN)
235#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN)
236#define GPIO42_CIF_MCLK_MD (42 | GPIO_ALT_FN_3_OUT)
237#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT)
238#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT)
239#define GPIO43_CIF_FV_MD (43 | GPIO_ALT_FN_3_OUT)
240#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN)
241#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN)
242#define GPIO44_CIF_LV_MD (44 | GPIO_ALT_FN_3_OUT)
243#define GPIO45_CIF_PCLK_MD (45 | GPIO_ALT_FN_3_IN)
244#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT)
245#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT)
246#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT)
247#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN)
248#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN)
249#define GPIO47_CIF_DD_0_MD (47 | GPIO_ALT_FN_1_IN)
250#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT)
251#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT)
252#define GPIO48_CIF_DD_5_MD (48 | GPIO_ALT_FN_1_IN)
253#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
254#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT)
255#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
256#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN)
257#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT)
258#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN)
259#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT)
260#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN)
261#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN)
262#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN)
263#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT)
264#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT)
265#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN)
266#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT)
267#define GPIO52_CIF_DD_4_MD (52 | GPIO_ALT_FN_1_IN)
268#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT)
269#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT)
270#define GPIO53_CIF_MCLK_MD (53 | GPIO_ALT_FN_2_OUT)
271#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT)
272#define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT)
273#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT)
274#define GPIO54_CIF_PCLK_MD (54 | GPIO_ALT_FN_3_IN)
275#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT)
276#define GPIO55_CIF_DD_1_MD (55 | GPIO_ALT_FN_1_IN)
277#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN)
278#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN)
279#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT)
280#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT)
281#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT)
282#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT)
283#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT)
284#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT)
285#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT)
286#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT)
287#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT)
288#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN)
289#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT)
290#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT)
291#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT)
292#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT)
293#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT)
294#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT)
295#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT)
296#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT)
297#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT)
298#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT)
299#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT)
300#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT)
301#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT)
302#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT)
303#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT)
304#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT)
305#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT)
306#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT)
307#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT)
308#define GPIO78_nPCE_2_MD (78 | GPIO_ALT_FN_1_OUT)
309#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT)
310#define GPIO79_pSKTSEL_MD (79 | GPIO_ALT_FN_1_OUT)
311#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT)
312#define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT)
313#define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN)
314#define GPIO81_CIF_DD_0_MD (81 | GPIO_ALT_FN_2_IN)
315#define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT)
316#define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN)
317#define GPIO82_CIF_DD_5_MD (82 | GPIO_ALT_FN_3_IN)
318#define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT)
319#define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN)
320#define GPIO83_CIF_DD_4_MD (83 | GPIO_ALT_FN_3_IN)
321#define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT)
322#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN)
323#define GPIO84_CIF_FV_MD (84 | GPIO_ALT_FN_3_IN)
324#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
325#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN)
326#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT)
327#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN)
328#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT)
329#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN)
330#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN)
331#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
332#define GPIO93_CIF_DD_6_MD (93 | GPIO_ALT_FN_2_IN)
333#define GPIO94_CIF_DD_5_MD (94 | GPIO_ALT_FN_2_IN)
334#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN)
335#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN)
336#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN)
337#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN)
338#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN)
339#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN)
340#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT)
341#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT)
342#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN)
343#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN)
344#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
345#define GPIO102_KP_MKIN2_MD (102 | GPIO_ALT_FN_1_IN)
346#define GPIO103_CIF_DD_3_MD (103 | GPIO_ALT_FN_1_IN)
347#define GPIO103_KP_MKOUT0_MD (103 | GPIO_ALT_FN_2_OUT)
348#define GPIO104_CIF_DD_2_MD (104 | GPIO_ALT_FN_1_IN)
349#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
350#define GPIO104_KP_MKOUT1_MD (104 | GPIO_ALT_FN_2_OUT)
351#define GPIO105_CIF_DD_1_MD (105 | GPIO_ALT_FN_1_IN)
352#define GPIO105_KP_MKOUT2_MD (105 | GPIO_ALT_FN_2_OUT)
353#define GPIO106_CIF_DD_9_MD (106 | GPIO_ALT_FN_1_IN)
354#define GPIO106_KP_MKOUT3_MD (106 | GPIO_ALT_FN_2_OUT)
355#define GPIO107_CIF_DD_8_MD (107 | GPIO_ALT_FN_1_IN)
356#define GPIO107_KP_MKOUT4_MD (107 | GPIO_ALT_FN_2_OUT)
357#define GPIO108_CIF_DD_7_MD (108 | GPIO_ALT_FN_1_IN)
358#define GPIO108_KP_MKOUT5_MD (108 | GPIO_ALT_FN_2_OUT)
359#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT)
360#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT)
361#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT)
362#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT)
363#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT)
364#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT)
365#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
366#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
367#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN)
368#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
369
370/*
371 * Handy routine to set GPIO alternate functions
372 */
373extern int pxa_gpio_mode( int gpio_mode );
374
375#endif /* __ASM_ARCH_PXA2XX_GPIO_H */
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
deleted file mode 100644
index be1be5b6db51..000000000000
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * ssp.h
3 *
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This driver supports the following PXA CPU/SSP ports:-
11 *
12 * PXA250 SSP
13 * PXA255 SSP, NSSP
14 * PXA26x SSP, NSSP, ASSP
15 * PXA27x SSP1, SSP2, SSP3
16 * PXA3xx SSP1, SSP2, SSP3, SSP4
17 */
18
19#ifndef __ASM_ARCH_SSP_H
20#define __ASM_ARCH_SSP_H
21
22#include <linux/list.h>
23#include <linux/io.h>
24
25enum pxa_ssp_type {
26 SSP_UNDEFINED = 0,
27 PXA25x_SSP, /* pxa 210, 250, 255, 26x */
28 PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
29 PXA27x_SSP,
30};
31
32struct ssp_device {
33 struct platform_device *pdev;
34 struct list_head node;
35
36 struct clk *clk;
37 void __iomem *mmio_base;
38 unsigned long phys_base;
39
40 const char *label;
41 int port_id;
42 int type;
43 int use_count;
44 int irq;
45 int drcmr_rx;
46 int drcmr_tx;
47};
48
49#ifdef CONFIG_PXA_SSP_LEGACY
50/*
51 * SSP initialisation flags
52 */
53#define SSP_NO_IRQ 0x1 /* don't register an irq handler in SSP driver */
54
55struct ssp_state {
56 u32 cr0;
57 u32 cr1;
58 u32 to;
59 u32 psp;
60};
61
62struct ssp_dev {
63 struct ssp_device *ssp;
64 u32 port;
65 u32 mode;
66 u32 flags;
67 u32 psp_flags;
68 u32 speed;
69 int irq;
70};
71
72int ssp_write_word(struct ssp_dev *dev, u32 data);
73int ssp_read_word(struct ssp_dev *dev, u32 *data);
74int ssp_flush(struct ssp_dev *dev);
75void ssp_enable(struct ssp_dev *dev);
76void ssp_disable(struct ssp_dev *dev);
77void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
78void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
79int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
80int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
81void ssp_exit(struct ssp_dev *dev);
82#endif /* CONFIG_PXA_SSP_LEGACY */
83
84/**
85 * ssp_write_reg - Write to a SSP register
86 *
87 * @dev: SSP device to access
88 * @reg: Register to write to
89 * @val: Value to be written.
90 */
91static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
92{
93 __raw_writel(val, dev->mmio_base + reg);
94}
95
96/**
97 * ssp_read_reg - Read from a SSP register
98 *
99 * @dev: SSP device to access
100 * @reg: Register to read from
101 */
102static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
103{
104 return __raw_readl(dev->mmio_base + reg);
105}
106
107struct ssp_device *ssp_request(int port, const char *label);
108void ssp_free(struct ssp_device *);
109#endif /* __ASM_ARCH_SSP_H */
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 4df2d38507dc..1bbd1f2e4beb 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -167,7 +167,7 @@
167 167
168#define TOSA_KEY_SYNC KEY_102ND /* ??? */ 168#define TOSA_KEY_SYNC KEY_102ND /* ??? */
169 169
170#ifndef CONFIG_KEYBOARD_TOSA_USE_EXT_KEYCODES 170#ifndef CONFIG_TOSA_USE_EXT_KEYCODES
171#define TOSA_KEY_RECORD KEY_YEN 171#define TOSA_KEY_RECORD KEY_YEN
172#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA 172#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA
173#define TOSA_KEY_CANCEL KEY_ESC 173#define TOSA_KEY_CANCEL KEY_ESC
diff --git a/arch/arm/mach-pxa/include/mach/vpac270.h b/arch/arm/mach-pxa/include/mach/vpac270.h
new file mode 100644
index 000000000000..7bfa3dd0fd5e
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/vpac270.h
@@ -0,0 +1,42 @@
1/*
2 * GPIOs and interrupts for Voipac PXA270
3 *
4 * Copyright (C) 2010
5 * Marek Vasut <marek.vasut@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13#ifndef _INCLUDE_VPAC270_H_
14#define _INCLUDE_VPAC270_H_
15
16#define GPIO1_VPAC270_USER_BTN 1
17
18#define GPIO15_VPAC270_LED_ORANGE 15
19
20#define GPIO81_VPAC270_BKL_ON 81
21#define GPIO83_VPAC270_NL_ON 83
22
23#define GPIO52_VPAC270_SD_READONLY 52
24#define GPIO53_VPAC270_SD_DETECT_N 53
25
26#define GPIO84_VPAC270_PCMCIA_CD 84
27#define GPIO35_VPAC270_PCMCIA_RDY 35
28#define GPIO107_VPAC270_PCMCIA_PPEN 107
29#define GPIO11_VPAC270_PCMCIA_RESET 11
30#define GPIO17_VPAC270_CF_CD 17
31#define GPIO12_VPAC270_CF_RDY 12
32#define GPIO16_VPAC270_CF_RESET 16
33
34#define GPIO41_VPAC270_UDC_DETECT 41
35
36#define GPIO114_VPAC270_ETH_IRQ 114
37
38#define GPIO36_VPAC270_IDE_IRQ 36
39
40#define GPIO113_VPAC270_TS_IRQ 113
41
42#endif
diff --git a/arch/arm/mach-pxa/include/mach/z2.h b/arch/arm/mach-pxa/include/mach/z2.h
new file mode 100644
index 000000000000..8835c16bc82f
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/z2.h
@@ -0,0 +1,41 @@
1/*
2 * arch/arm/mach-pxa/include/mach/z2.h
3 *
4 * Author: Ken McGuire
5 * Created: Feb 6, 2009
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef ASM_ARCH_ZIPIT2_H
13#define ASM_ARCH_ZIPIT2_H
14
15/* LEDs */
16#define GPIO10_ZIPITZ2_LED_WIFI 10
17#define GPIO85_ZIPITZ2_LED_CHARGED 85
18#define GPIO83_ZIPITZ2_LED_CHARGING 83
19
20/* SD/MMC */
21#define GPIO96_ZIPITZ2_SD_DETECT 96
22
23/* GPIO Buttons */
24#define GPIO1_ZIPITZ2_POWER_BUTTON 1
25#define GPIO98_ZIPITZ2_LID_BUTTON 98
26
27/* Libertas GSPI8686 WiFi */
28#define GPIO14_ZIPITZ2_WIFI_RESET 14
29#define GPIO15_ZIPITZ2_WIFI_POWER 15
30#define GPIO24_ZIPITZ2_WIFI_CS 24
31#define GPIO36_ZIPITZ2_WIFI_IRQ 36
32
33/* LCD */
34#define GPIO19_ZIPITZ2_LCD_RESET 19
35#define GPIO88_ZIPITZ2_LCD_CS 88
36
37/* MISC GPIOs */
38#define GPIO0_ZIPITZ2_AC_DETECT 0
39#define GPIO37_ZIPITZ2_HEADSET_DETECT 37
40
41#endif
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index fa527b258d61..9b9046185b00 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -41,7 +41,6 @@
41 41
42#include <mach/pxa300.h> 42#include <mach/pxa300.h>
43#include <mach/pxafb.h> 43#include <mach/pxafb.h>
44#include <mach/ssp.h>
45#include <mach/mmc.h> 44#include <mach/mmc.h>
46#include <mach/pxa2xx_spi.h> 45#include <mach/pxa2xx_spi.h>
47#include <mach/pxa27x_keypad.h> 46#include <mach/pxa27x_keypad.h>
@@ -272,7 +271,7 @@ static inline void littleton_init_keypad(void) {}
272 271
273#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 272#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
274static struct pxamci_platform_data littleton_mci_platform_data = { 273static struct pxamci_platform_data littleton_mci_platform_data = {
275 .detect_delay = 20, 274 .detect_delay_ms = 200,
276 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 275 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
277 .gpio_card_detect = GPIO_MMC1_CARD_DETECT, 276 .gpio_card_detect = GPIO_MMC1_CARD_DETECT,
278 .gpio_card_ro = -1, 277 .gpio_card_ro = -1,
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 63d65a2a0387..330c3282856e 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -478,7 +478,7 @@ static void lubbock_mci_exit(struct device *dev, void *data)
478 478
479static struct pxamci_platform_data lubbock_mci_platform_data = { 479static struct pxamci_platform_data lubbock_mci_platform_data = {
480 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 480 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
481 .detect_delay = 1, 481 .detect_delay_ms = 10,
482 .init = lubbock_mci_init, 482 .init = lubbock_mci_init,
483 .get_ro = lubbock_mci_get_ro, 483 .get_ro = lubbock_mci_get_ro,
484 .exit = lubbock_mci_exit, 484 .exit = lubbock_mci_exit,
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index cf6b720c055f..1d1419b73457 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -81,6 +81,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
81 PGSR(bank) &= ~mask; 81 PGSR(bank) &= ~mask;
82 is_out = 1; 82 is_out = 1;
83 break; 83 break;
84 case MFP_LPM_INPUT:
84 case MFP_LPM_DEFAULT: 85 case MFP_LPM_DEFAULT:
85 break; 86 break;
86 default: 87 default:
@@ -178,8 +179,17 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
178 if (!d->valid) 179 if (!d->valid)
179 return -EINVAL; 180 return -EINVAL;
180 181
181 if (d->keypad_gpio) 182 /* Allow keypad GPIOs to wakeup system when
182 return -EINVAL; 183 * configured as generic GPIOs.
184 */
185 if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
186 (d->config & MFP_LPM_CAN_WAKEUP)) {
187 if (on)
188 PKWR |= d->mask;
189 else
190 PKWR &= ~d->mask;
191 return 0;
192 }
183 193
184 mux_taken = (PWER & d->mux_mask) & (~d->mask); 194 mux_taken = (PWER & d->mux_mask) & (~d->mask);
185 if (on && mux_taken) 195 if (on && mux_taken)
@@ -239,21 +249,25 @@ static int pxa27x_pkwr_gpio[] = {
239int keypad_set_wake(unsigned int on) 249int keypad_set_wake(unsigned int on)
240{ 250{
241 unsigned int i, gpio, mask = 0; 251 unsigned int i, gpio, mask = 0;
242 252 struct gpio_desc *d;
243 if (!on) {
244 PKWR = 0;
245 return 0;
246 }
247 253
248 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { 254 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
249 255
250 gpio = pxa27x_pkwr_gpio[i]; 256 gpio = pxa27x_pkwr_gpio[i];
257 d = &gpio_desc[gpio];
251 258
252 if (gpio_desc[gpio].config & MFP_LPM_CAN_WAKEUP) 259 /* skip if configured as generic GPIO */
260 if (MFP_AF(d->config) == 0)
261 continue;
262
263 if (d->config & MFP_LPM_CAN_WAKEUP)
253 mask |= gpio_desc[gpio].mask; 264 mask |= gpio_desc[gpio].mask;
254 } 265 }
255 266
256 PKWR = mask; 267 if (on)
268 PKWR |= mask;
269 else
270 PKWR &= ~mask;
257 return 0; 271 return 0;
258} 272}
259 273
@@ -328,6 +342,17 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
328{ 342{
329 int i; 343 int i;
330 344
345 /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
346 for (i = 0; i < pxa_last_gpio; i++) {
347 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
348 (GPDR(i) & GPIO_bit(i))) {
349 if (GPLR(i) & GPIO_bit(i))
350 PGSR(i) |= GPIO_bit(i);
351 else
352 PGSR(i) &= ~GPIO_bit(i);
353 }
354 }
355
331 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 356 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
332 357
333 saved_gafr[0][i] = GAFR_L(i); 358 saved_gafr[0][i] = GAFR_L(i);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 7a50ed8fce94..d60db87dde08 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -426,6 +426,7 @@ struct gpio_vbus_mach_info gpio_vbus_data = {
426 * to give the card a chance to fully insert/eject. 426 * to give the card a chance to fully insert/eject.
427 */ 427 */
428static struct pxamci_platform_data mioa701_mci_info = { 428static struct pxamci_platform_data mioa701_mci_info = {
429 .detect_delay_ms = 250,
429 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 430 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
430 .gpio_card_detect = GPIO15_SDIO_INSERT, 431 .gpio_card_detect = GPIO15_SDIO_INSERT,
431 .gpio_card_ro = GPIO78_SDIO_RO, 432 .gpio_card_ro = GPIO78_SDIO_RO,
@@ -791,7 +792,6 @@ static void __init mioa701_machine_init(void)
791 mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); 792 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
792 bootstrap_init(); 793 bootstrap_init();
793 set_pxa_fb_info(&mioa701_pxafb_info); 794 set_pxa_fb_info(&mioa701_pxafb_info);
794 mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
795 pxa_set_mci_info(&mioa701_mci_info); 795 pxa_set_mci_info(&mioa701_mci_info);
796 pxa_set_keypad_info(&mioa701_keypad_info); 796 pxa_set_keypad_info(&mioa701_keypad_info);
797 wm97xx_bat_set_pdata(&mioa701_battery_data); 797 wm97xx_bat_set_pdata(&mioa701_battery_data);
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 8c9c6f0d56bb..462167ac05f9 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -325,7 +325,7 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
325#if defined(CONFIG_MMC) 325#if defined(CONFIG_MMC)
326static struct pxamci_platform_data mxm_8x10_mci_platform_data = { 326static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
327 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 327 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
328 .detect_delay = 1, 328 .detect_delay_ms = 10,
329 .gpio_card_detect = MXM_8X10_SD_nCD, 329 .gpio_card_detect = MXM_8X10_SD_nCD,
330 .gpio_card_ro = MXM_8X10_SD_WP, 330 .gpio_card_ro = MXM_8X10_SD_WP,
331 .gpio_power = -1 331 .gpio_power = -1
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index f70c75b38769..1963819dba98 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -168,7 +168,7 @@ static struct pxamci_platform_data palmld_mci_platform_data = {
168 .gpio_card_detect = GPIO_NR_PALMLD_SD_DETECT_N, 168 .gpio_card_detect = GPIO_NR_PALMLD_SD_DETECT_N,
169 .gpio_card_ro = GPIO_NR_PALMLD_SD_READONLY, 169 .gpio_card_ro = GPIO_NR_PALMLD_SD_READONLY,
170 .gpio_power = GPIO_NR_PALMLD_SD_POWER, 170 .gpio_power = GPIO_NR_PALMLD_SD_POWER,
171 .detect_delay = 20, 171 .detect_delay_ms = 200,
172}; 172};
173 173
174/****************************************************************************** 174/******************************************************************************
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index d902a813aae3..5305a3993e69 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -110,7 +110,7 @@ static struct pxamci_platform_data palmt5_mci_platform_data = {
110 .gpio_card_detect = GPIO_NR_PALMT5_SD_DETECT_N, 110 .gpio_card_detect = GPIO_NR_PALMT5_SD_DETECT_N,
111 .gpio_card_ro = GPIO_NR_PALMT5_SD_READONLY, 111 .gpio_card_ro = GPIO_NR_PALMT5_SD_READONLY,
112 .gpio_power = GPIO_NR_PALMT5_SD_POWER, 112 .gpio_power = GPIO_NR_PALMT5_SD_POWER,
113 .detect_delay = 20, 113 .detect_delay_ms = 200,
114}; 114};
115 115
116/****************************************************************************** 116/******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 717d7a638675..033b567e50bb 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -121,7 +121,7 @@ static struct pxamci_platform_data palmtc_mci_platform_data = {
121 .gpio_power = GPIO_NR_PALMTC_SD_POWER, 121 .gpio_power = GPIO_NR_PALMTC_SD_POWER,
122 .gpio_card_ro = GPIO_NR_PALMTC_SD_READONLY, 122 .gpio_card_ro = GPIO_NR_PALMTC_SD_READONLY,
123 .gpio_card_detect = GPIO_NR_PALMTC_SD_DETECT_N, 123 .gpio_card_detect = GPIO_NR_PALMTC_SD_DETECT_N,
124 .detect_delay = 20, 124 .detect_delay_ms = 200,
125}; 125};
126 126
127/****************************************************************************** 127/******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 007b58c11f8d..ecc1a401598e 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -170,7 +170,7 @@ static struct pxamci_platform_data palmtx_mci_platform_data = {
170 .gpio_card_detect = GPIO_NR_PALMTX_SD_DETECT_N, 170 .gpio_card_detect = GPIO_NR_PALMTX_SD_DETECT_N,
171 .gpio_card_ro = GPIO_NR_PALMTX_SD_READONLY, 171 .gpio_card_ro = GPIO_NR_PALMTX_SD_READONLY,
172 .gpio_power = GPIO_NR_PALMTX_SD_POWER, 172 .gpio_power = GPIO_NR_PALMTX_SD_POWER,
173 .detect_delay = 20, 173 .detect_delay_ms = 200,
174}; 174};
175 175
176/****************************************************************************** 176/******************************************************************************
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 9d0ecea1760c..f56ae1008759 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -326,7 +326,7 @@ static void pcm990_mci_exit(struct device *dev, void *data)
326#define MSECS_PER_JIFFY (1000/HZ) 326#define MSECS_PER_JIFFY (1000/HZ)
327 327
328static struct pxamci_platform_data pcm990_mci_platform_data = { 328static struct pxamci_platform_data pcm990_mci_platform_data = {
329 .detect_delay = 250 / MSECS_PER_JIFFY, 329 .detect_delay_ms = 250,
330 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 330 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
331 .init = pcm990_mci_init, 331 .init = pcm990_mci_init,
332 .setpower = pcm990_mci_setpower, 332 .setpower = pcm990_mci_setpower,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index d58a52415d75..f4abdaafdac4 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -40,13 +40,12 @@
40#include <mach/pxa25x.h> 40#include <mach/pxa25x.h>
41#include <mach/mmc.h> 41#include <mach/mmc.h>
42#include <mach/udc.h> 42#include <mach/udc.h>
43#include <plat/i2c.h>
44#include <mach/irda.h> 43#include <mach/irda.h>
45#include <mach/poodle.h> 44#include <mach/poodle.h>
46#include <mach/pxafb.h> 45#include <mach/pxafb.h>
47#include <mach/sharpsl.h> 46#include <mach/sharpsl.h>
48#include <mach/ssp.h>
49#include <mach/pxa2xx_spi.h> 47#include <mach/pxa2xx_spi.h>
48#include <plat/i2c.h>
50 49
51#include <asm/hardware/scoop.h> 50#include <asm/hardware/scoop.h>
52#include <asm/hardware/locomo.h> 51#include <asm/hardware/locomo.h>
@@ -277,6 +276,7 @@ static void poodle_mci_exit(struct device *dev, void *data)
277} 276}
278 277
279static struct pxamci_platform_data poodle_mci_platform_data = { 278static struct pxamci_platform_data poodle_mci_platform_data = {
279 .detect_delay_ms = 250,
280 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 280 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
281 .init = poodle_mci_init, 281 .init = poodle_mci_init,
282 .setpower = poodle_mci_setpower, 282 .setpower = poodle_mci_setpower,
@@ -450,7 +450,6 @@ static void __init poodle_init(void)
450 set_pxa_fb_parent(&poodle_locomo_device.dev); 450 set_pxa_fb_parent(&poodle_locomo_device.dev);
451 set_pxa_fb_info(&poodle_fb_info); 451 set_pxa_fb_info(&poodle_fb_info);
452 pxa_set_udc_info(&udc_info); 452 pxa_set_udc_info(&udc_info);
453 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
454 pxa_set_mci_info(&poodle_mci_platform_data); 453 pxa_set_mci_info(&poodle_mci_platform_data);
455 pxa_set_ficp_info(&poodle_ficp_platform_data); 454 pxa_set_ficp_info(&poodle_ficp_platform_data);
456 pxa_set_i2c_info(NULL); 455 pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4d7c03e72504..f544e58e1536 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -29,7 +29,6 @@
29#include <mach/ohci.h> 29#include <mach/ohci.h>
30#include <mach/pm.h> 30#include <mach/pm.h>
31#include <mach/dma.h> 31#include <mach/dma.h>
32#include <mach/ssp.h>
33#include <mach/regs-intc.h> 32#include <mach/regs-intc.h>
34#include <plat/i2c.h> 33#include <plat/i2c.h>
35 34
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index d12667bd9ebe..d4b61b3f08f3 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -714,7 +714,7 @@ static void raumfeld_mci_exit(struct device *dev, void *data)
714static struct pxamci_platform_data raumfeld_mci_platform_data = { 714static struct pxamci_platform_data raumfeld_mci_platform_data = {
715 .init = raumfeld_mci_init, 715 .init = raumfeld_mci_init,
716 .exit = raumfeld_mci_exit, 716 .exit = raumfeld_mci_exit,
717 .detect_delay = 20, 717 .detect_delay_ms = 200,
718 .gpio_card_detect = -1, 718 .gpio_card_detect = -1,
719 .gpio_card_ro = -1, 719 .gpio_card_ro = -1,
720 .gpio_power = -1, 720 .gpio_power = -1,
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h
index 1439785d3979..0cc1203c5bef 100644
--- a/arch/arm/mach-pxa/sharpsl.h
+++ b/arch/arm/mach-pxa/sharpsl.h
@@ -10,29 +10,6 @@
10#include <mach/sharpsl_pm.h> 10#include <mach/sharpsl_pm.h>
11 11
12/* 12/*
13 * SharpSL SSP Driver
14 */
15struct corgissp_machinfo {
16 int port;
17 int cs_lcdcon;
18 int cs_ads7846;
19 int cs_max1111;
20 int clk_lcdcon;
21 int clk_ads7846;
22 int clk_max1111;
23};
24
25void corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo);
26
27
28/*
29 * SharpSL/Corgi LCD Driver
30 */
31void corgi_lcdtg_suspend(void);
32void corgi_lcdtg_hw_init(int mode);
33
34
35/*
36 * SharpSL Battery/PM Driver 13 * SharpSL Battery/PM Driver
37 */ 14 */
38#define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x)) 15#define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x))
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 463d874bb867..cb4767251f3c 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -28,7 +28,6 @@
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <mach/pm.h> 29#include <mach/pm.h>
30#include <mach/pxa2xx-regs.h> 30#include <mach/pxa2xx-regs.h>
31#include <mach/pxa2xx-gpio.h>
32#include <mach/regs-rtc.h> 31#include <mach/regs-rtc.h>
33#include <mach/sharpsl.h> 32#include <mach/sharpsl.h>
34#include <mach/sharpsl_pm.h> 33#include <mach/sharpsl_pm.h>
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 01bdd7500df4..4d2413ed0ffa 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -86,6 +86,7 @@ static unsigned long spitz_pin_config[] __initdata = {
86 86
87 /* GPIOs */ 87 /* GPIOs */
88 GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */ 88 GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */
89 GPIO16_GPIO, /* SPITZ_GPIO_SYNC */
89 GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */ 90 GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */
90 GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */ 91 GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */
91 GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */ 92 GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */
@@ -119,7 +120,8 @@ static unsigned long spitz_pin_config[] __initdata = {
119 GPIO117_I2C_SCL, 120 GPIO117_I2C_SCL,
120 GPIO118_I2C_SDA, 121 GPIO118_I2C_SDA,
121 122
122 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, 123 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* SPITZ_GPIO_KEY_INT */
124 GPIO1_GPIO | WAKEUP_ON_EDGE_FALL, /* SPITZ_GPIO_RESET */
123}; 125};
124 126
125/* 127/*
@@ -537,6 +539,7 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
537} 539}
538 540
539static struct pxamci_platform_data spitz_mci_platform_data = { 541static struct pxamci_platform_data spitz_mci_platform_data = {
542 .detect_delay_ms = 250,
540 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 543 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
541 .setpower = spitz_mci_setpower, 544 .setpower = spitz_mci_setpower,
542 .gpio_card_detect = SPITZ_GPIO_nSD_DETECT, 545 .gpio_card_detect = SPITZ_GPIO_nSD_DETECT,
@@ -757,7 +760,6 @@ static void __init common_init(void)
757 spitz_init_spi(); 760 spitz_init_spi();
758 761
759 platform_add_devices(devices, ARRAY_SIZE(devices)); 762 platform_add_devices(devices, ARRAY_SIZE(devices));
760 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
761 pxa_set_mci_info(&spitz_mci_platform_data); 763 pxa_set_mci_info(&spitz_mci_platform_data);
762 pxa_set_ohci_info(&spitz_ohci_platform_data); 764 pxa_set_ohci_info(&spitz_ohci_platform_data);
763 pxa_set_ficp_info(&spitz_ficp_platform_data); 765 pxa_set_ficp_info(&spitz_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index fc5a70c40358..4209ddf6da61 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -24,9 +24,10 @@
24 24
25#include <mach/sharpsl.h> 25#include <mach/sharpsl.h>
26#include <mach/spitz.h> 26#include <mach/spitz.h>
27#include <mach/pxa2xx-regs.h> 27#include <mach/pxa27x.h>
28#include <mach/pxa2xx-gpio.h> 28
29#include "sharpsl.h" 29#include "sharpsl.h"
30#include "generic.h"
30 31
31#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ 32#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
32#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ 33#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */
@@ -37,10 +38,17 @@
37 38
38static int spitz_last_ac_status; 39static int spitz_last_ac_status;
39 40
41static struct gpio spitz_charger_gpios[] = {
42 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" },
43 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" },
44 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
45 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" },
46 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
47};
48
40static void spitz_charger_init(void) 49static void spitz_charger_init(void)
41{ 50{
42 pxa_gpio_mode(SPITZ_GPIO_KEY_INT | GPIO_IN); 51 gpio_request_array(ARRAY_AND_SIZE(spitz_charger_gpios));
43 pxa_gpio_mode(SPITZ_GPIO_SYNC | GPIO_IN);
44} 52}
45 53
46static void spitz_measure_temp(int on) 54static void spitz_measure_temp(int on)
@@ -76,6 +84,11 @@ static void spitz_discharge1(int on)
76 gpio_set_value(SPITZ_GPIO_LED_GREEN, on); 84 gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
77} 85}
78 86
87static unsigned long gpio18_config[] = {
88 GPIO18_RDY,
89 GPIO18_GPIO,
90};
91
79static void spitz_presuspend(void) 92static void spitz_presuspend(void)
80{ 93{
81 spitz_last_ac_status = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN); 94 spitz_last_ac_status = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
@@ -97,7 +110,9 @@ static void spitz_presuspend(void)
97 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; 110 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
98 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0); 111 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
99 112
100 pxa_gpio_mode(GPIO18_RDY|GPIO_OUT | GPIO_DFLT_HIGH); 113 pxa2xx_mfp_config(&gpio18_config[0], 1);
114 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
115 gpio_free(18);
101 116
102 PRER = GPIO_bit(SPITZ_GPIO_KEY_INT); 117 PRER = GPIO_bit(SPITZ_GPIO_KEY_INT);
103 PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); 118 PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
@@ -114,8 +129,7 @@ static void spitz_presuspend(void)
114 129
115static void spitz_postsuspend(void) 130static void spitz_postsuspend(void)
116{ 131{
117 pxa_gpio_mode(GPIO18_RDY_MD); 132 pxa2xx_mfp_config(&gpio18_config[1], 1);
118 pxa_gpio_mode(10 | GPIO_IN);
119} 133}
120 134
121static int spitz_should_wakeup(unsigned int resume_on_alarm) 135static int spitz_should_wakeup(unsigned int resume_on_alarm)
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
deleted file mode 100644
index a81d6dbf662d..000000000000
--- a/arch/arm/mach-pxa/ssp.c
+++ /dev/null
@@ -1,510 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/ssp.c
3 *
4 * based on linux/arch/arm/mach-sa1100/ssp.c by Russell King
5 *
6 * Copyright (C) 2003 Russell King.
7 * Copyright (C) 2003 Wolfson Microelectronics PLC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * PXA2xx SSP driver. This provides the generic core for simple
14 * IO-based SSP applications and allows easy port setup for DMA access.
15 *
16 * Author: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
17 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/slab.h>
23#include <linux/errno.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/init.h>
27#include <linux/mutex.h>
28#include <linux/clk.h>
29#include <linux/err.h>
30#include <linux/platform_device.h>
31#include <linux/io.h>
32
33#include <asm/irq.h>
34#include <mach/hardware.h>
35#include <mach/ssp.h>
36#include <mach/regs-ssp.h>
37
38#ifdef CONFIG_PXA_SSP_LEGACY
39
40#define TIMEOUT 100000
41
42static irqreturn_t ssp_interrupt(int irq, void *dev_id)
43{
44 struct ssp_dev *dev = dev_id;
45 struct ssp_device *ssp = dev->ssp;
46 unsigned int status;
47
48 status = __raw_readl(ssp->mmio_base + SSSR);
49 __raw_writel(status, ssp->mmio_base + SSSR);
50
51 if (status & SSSR_ROR)
52 printk(KERN_WARNING "SSP(%d): receiver overrun\n", dev->port);
53
54 if (status & SSSR_TUR)
55 printk(KERN_WARNING "SSP(%d): transmitter underrun\n", dev->port);
56
57 if (status & SSSR_BCE)
58 printk(KERN_WARNING "SSP(%d): bit count error\n", dev->port);
59
60 return IRQ_HANDLED;
61}
62
63/**
64 * ssp_write_word - write a word to the SSP port
65 * @data: 32-bit, MSB justified data to write.
66 *
67 * Wait for a free entry in the SSP transmit FIFO, and write a data
68 * word to the SSP port.
69 *
70 * The caller is expected to perform the necessary locking.
71 *
72 * Returns:
73 * %-ETIMEDOUT timeout occurred
74 * 0 success
75 */
76int ssp_write_word(struct ssp_dev *dev, u32 data)
77{
78 struct ssp_device *ssp = dev->ssp;
79 int timeout = TIMEOUT;
80
81 while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_TNF)) {
82 if (!--timeout)
83 return -ETIMEDOUT;
84 cpu_relax();
85 }
86
87 __raw_writel(data, ssp->mmio_base + SSDR);
88
89 return 0;
90}
91
92/**
93 * ssp_read_word - read a word from the SSP port
94 *
95 * Wait for a data word in the SSP receive FIFO, and return the
96 * received data. Data is LSB justified.
97 *
98 * Note: Currently, if data is not expected to be received, this
99 * function will wait for ever.
100 *
101 * The caller is expected to perform the necessary locking.
102 *
103 * Returns:
104 * %-ETIMEDOUT timeout occurred
105 * 32-bit data success
106 */
107int ssp_read_word(struct ssp_dev *dev, u32 *data)
108{
109 struct ssp_device *ssp = dev->ssp;
110 int timeout = TIMEOUT;
111
112 while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE)) {
113 if (!--timeout)
114 return -ETIMEDOUT;
115 cpu_relax();
116 }
117
118 *data = __raw_readl(ssp->mmio_base + SSDR);
119 return 0;
120}
121
122/**
123 * ssp_flush - flush the transmit and receive FIFOs
124 *
125 * Wait for the SSP to idle, and ensure that the receive FIFO
126 * is empty.
127 *
128 * The caller is expected to perform the necessary locking.
129 */
130int ssp_flush(struct ssp_dev *dev)
131{
132 struct ssp_device *ssp = dev->ssp;
133 int timeout = TIMEOUT * 2;
134
135 /* ensure TX FIFO is empty instead of not full */
136 if (cpu_is_pxa3xx()) {
137 while (__raw_readl(ssp->mmio_base + SSSR) & 0xf00) {
138 if (!--timeout)
139 return -ETIMEDOUT;
140 cpu_relax();
141 }
142 timeout = TIMEOUT * 2;
143 }
144
145 do {
146 while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE) {
147 if (!--timeout)
148 return -ETIMEDOUT;
149 (void)__raw_readl(ssp->mmio_base + SSDR);
150 }
151 if (!--timeout)
152 return -ETIMEDOUT;
153 } while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_BSY);
154
155 return 0;
156}
157
158/**
159 * ssp_enable - enable the SSP port
160 *
161 * Turn on the SSP port.
162 */
163void ssp_enable(struct ssp_dev *dev)
164{
165 struct ssp_device *ssp = dev->ssp;
166 uint32_t sscr0;
167
168 sscr0 = __raw_readl(ssp->mmio_base + SSCR0);
169 sscr0 |= SSCR0_SSE;
170 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
171}
172
173/**
174 * ssp_disable - shut down the SSP port
175 *
176 * Turn off the SSP port, optionally powering it down.
177 */
178void ssp_disable(struct ssp_dev *dev)
179{
180 struct ssp_device *ssp = dev->ssp;
181 uint32_t sscr0;
182
183 sscr0 = __raw_readl(ssp->mmio_base + SSCR0);
184 sscr0 &= ~SSCR0_SSE;
185 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
186}
187
188/**
189 * ssp_save_state - save the SSP configuration
190 * @ssp: pointer to structure to save SSP configuration
191 *
192 * Save the configured SSP state for suspend.
193 */
194void ssp_save_state(struct ssp_dev *dev, struct ssp_state *state)
195{
196 struct ssp_device *ssp = dev->ssp;
197
198 state->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
199 state->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
200 state->to = __raw_readl(ssp->mmio_base + SSTO);
201 state->psp = __raw_readl(ssp->mmio_base + SSPSP);
202
203 ssp_disable(dev);
204}
205
206/**
207 * ssp_restore_state - restore a previously saved SSP configuration
208 * @ssp: pointer to configuration saved by ssp_save_state
209 *
210 * Restore the SSP configuration saved previously by ssp_save_state.
211 */
212void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *state)
213{
214 struct ssp_device *ssp = dev->ssp;
215 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
216
217 __raw_writel(sssr, ssp->mmio_base + SSSR);
218
219 __raw_writel(state->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
220 __raw_writel(state->cr1, ssp->mmio_base + SSCR1);
221 __raw_writel(state->to, ssp->mmio_base + SSTO);
222 __raw_writel(state->psp, ssp->mmio_base + SSPSP);
223 __raw_writel(state->cr0, ssp->mmio_base + SSCR0);
224}
225
226/**
227 * ssp_config - configure SSP port settings
228 * @mode: port operating mode
229 * @flags: port config flags
230 * @psp_flags: port PSP config flags
231 * @speed: port speed
232 *
233 * Port MUST be disabled by ssp_disable before making any config changes.
234 */
235int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed)
236{
237 struct ssp_device *ssp = dev->ssp;
238
239 dev->mode = mode;
240 dev->flags = flags;
241 dev->psp_flags = psp_flags;
242 dev->speed = speed;
243
244 /* set up port type, speed, port settings */
245 __raw_writel((dev->speed | dev->mode), ssp->mmio_base + SSCR0);
246 __raw_writel(dev->flags, ssp->mmio_base + SSCR1);
247 __raw_writel(dev->psp_flags, ssp->mmio_base + SSPSP);
248
249 return 0;
250}
251
252/**
253 * ssp_init - setup the SSP port
254 *
255 * initialise and claim resources for the SSP port.
256 *
257 * Returns:
258 * %-ENODEV if the SSP port is unavailable
259 * %-EBUSY if the resources are already in use
260 * %0 on success
261 */
262int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
263{
264 struct ssp_device *ssp;
265 int ret;
266
267 ssp = ssp_request(port, "SSP");
268 if (ssp == NULL)
269 return -ENODEV;
270
271 dev->ssp = ssp;
272 dev->port = port;
273
274 /* do we need to get irq */
275 if (!(init_flags & SSP_NO_IRQ)) {
276 ret = request_irq(ssp->irq, ssp_interrupt,
277 0, "SSP", dev);
278 if (ret)
279 goto out_region;
280 dev->irq = ssp->irq;
281 } else
282 dev->irq = NO_IRQ;
283
284 /* turn on SSP port clock */
285 clk_enable(ssp->clk);
286 return 0;
287
288out_region:
289 ssp_free(ssp);
290 return ret;
291}
292
293/**
294 * ssp_exit - undo the effects of ssp_init
295 *
296 * release and free resources for the SSP port.
297 */
298void ssp_exit(struct ssp_dev *dev)
299{
300 struct ssp_device *ssp = dev->ssp;
301
302 ssp_disable(dev);
303 if (dev->irq != NO_IRQ)
304 free_irq(dev->irq, dev);
305 clk_disable(ssp->clk);
306 ssp_free(ssp);
307}
308#endif /* CONFIG_PXA_SSP_LEGACY */
309
310static DEFINE_MUTEX(ssp_lock);
311static LIST_HEAD(ssp_list);
312
313struct ssp_device *ssp_request(int port, const char *label)
314{
315 struct ssp_device *ssp = NULL;
316
317 mutex_lock(&ssp_lock);
318
319 list_for_each_entry(ssp, &ssp_list, node) {
320 if (ssp->port_id == port && ssp->use_count == 0) {
321 ssp->use_count++;
322 ssp->label = label;
323 break;
324 }
325 }
326
327 mutex_unlock(&ssp_lock);
328
329 if (&ssp->node == &ssp_list)
330 return NULL;
331
332 return ssp;
333}
334EXPORT_SYMBOL(ssp_request);
335
336void ssp_free(struct ssp_device *ssp)
337{
338 mutex_lock(&ssp_lock);
339 if (ssp->use_count) {
340 ssp->use_count--;
341 ssp->label = NULL;
342 } else
343 dev_err(&ssp->pdev->dev, "device already free\n");
344 mutex_unlock(&ssp_lock);
345}
346EXPORT_SYMBOL(ssp_free);
347
348static int __devinit ssp_probe(struct platform_device *pdev)
349{
350 const struct platform_device_id *id = platform_get_device_id(pdev);
351 struct resource *res;
352 struct ssp_device *ssp;
353 int ret = 0;
354
355 ssp = kzalloc(sizeof(struct ssp_device), GFP_KERNEL);
356 if (ssp == NULL) {
357 dev_err(&pdev->dev, "failed to allocate memory");
358 return -ENOMEM;
359 }
360 ssp->pdev = pdev;
361
362 ssp->clk = clk_get(&pdev->dev, NULL);
363 if (IS_ERR(ssp->clk)) {
364 ret = PTR_ERR(ssp->clk);
365 goto err_free;
366 }
367
368 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
369 if (res == NULL) {
370 dev_err(&pdev->dev, "no memory resource defined\n");
371 ret = -ENODEV;
372 goto err_free_clk;
373 }
374
375 res = request_mem_region(res->start, res->end - res->start + 1,
376 pdev->name);
377 if (res == NULL) {
378 dev_err(&pdev->dev, "failed to request memory resource\n");
379 ret = -EBUSY;
380 goto err_free_clk;
381 }
382
383 ssp->phys_base = res->start;
384
385 ssp->mmio_base = ioremap(res->start, res->end - res->start + 1);
386 if (ssp->mmio_base == NULL) {
387 dev_err(&pdev->dev, "failed to ioremap() registers\n");
388 ret = -ENODEV;
389 goto err_free_mem;
390 }
391
392 ssp->irq = platform_get_irq(pdev, 0);
393 if (ssp->irq < 0) {
394 dev_err(&pdev->dev, "no IRQ resource defined\n");
395 ret = -ENODEV;
396 goto err_free_io;
397 }
398
399 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
400 if (res == NULL) {
401 dev_err(&pdev->dev, "no SSP RX DRCMR defined\n");
402 ret = -ENODEV;
403 goto err_free_io;
404 }
405 ssp->drcmr_rx = res->start;
406
407 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
408 if (res == NULL) {
409 dev_err(&pdev->dev, "no SSP TX DRCMR defined\n");
410 ret = -ENODEV;
411 goto err_free_io;
412 }
413 ssp->drcmr_tx = res->start;
414
415 /* PXA2xx/3xx SSP ports starts from 1 and the internal pdev->id
416 * starts from 0, do a translation here
417 */
418 ssp->port_id = pdev->id + 1;
419 ssp->use_count = 0;
420 ssp->type = (int)id->driver_data;
421
422 mutex_lock(&ssp_lock);
423 list_add(&ssp->node, &ssp_list);
424 mutex_unlock(&ssp_lock);
425
426 platform_set_drvdata(pdev, ssp);
427 return 0;
428
429err_free_io:
430 iounmap(ssp->mmio_base);
431err_free_mem:
432 release_mem_region(res->start, res->end - res->start + 1);
433err_free_clk:
434 clk_put(ssp->clk);
435err_free:
436 kfree(ssp);
437 return ret;
438}
439
440static int __devexit ssp_remove(struct platform_device *pdev)
441{
442 struct resource *res;
443 struct ssp_device *ssp;
444
445 ssp = platform_get_drvdata(pdev);
446 if (ssp == NULL)
447 return -ENODEV;
448
449 iounmap(ssp->mmio_base);
450
451 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
452 release_mem_region(res->start, res->end - res->start + 1);
453
454 clk_put(ssp->clk);
455
456 mutex_lock(&ssp_lock);
457 list_del(&ssp->node);
458 mutex_unlock(&ssp_lock);
459
460 kfree(ssp);
461 return 0;
462}
463
464static const struct platform_device_id ssp_id_table[] = {
465 { "pxa25x-ssp", PXA25x_SSP },
466 { "pxa25x-nssp", PXA25x_NSSP },
467 { "pxa27x-ssp", PXA27x_SSP },
468 { },
469};
470
471static struct platform_driver ssp_driver = {
472 .probe = ssp_probe,
473 .remove = __devexit_p(ssp_remove),
474 .driver = {
475 .owner = THIS_MODULE,
476 .name = "pxa2xx-ssp",
477 },
478 .id_table = ssp_id_table,
479};
480
481static int __init pxa_ssp_init(void)
482{
483 return platform_driver_register(&ssp_driver);
484}
485
486static void __exit pxa_ssp_exit(void)
487{
488 platform_driver_unregister(&ssp_driver);
489}
490
491arch_initcall(pxa_ssp_init);
492module_exit(pxa_ssp_exit);
493
494#ifdef CONFIG_PXA_SSP_LEGACY
495EXPORT_SYMBOL(ssp_write_word);
496EXPORT_SYMBOL(ssp_read_word);
497EXPORT_SYMBOL(ssp_flush);
498EXPORT_SYMBOL(ssp_enable);
499EXPORT_SYMBOL(ssp_disable);
500EXPORT_SYMBOL(ssp_save_state);
501EXPORT_SYMBOL(ssp_restore_state);
502EXPORT_SYMBOL(ssp_init);
503EXPORT_SYMBOL(ssp_exit);
504EXPORT_SYMBOL(ssp_config);
505#endif
506
507MODULE_DESCRIPTION("PXA SSP driver");
508MODULE_AUTHOR("Liam Girdwood");
509MODULE_LICENSE("GPL");
510
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 2041eb1d90ba..af40d2a12d37 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -464,8 +464,6 @@ static struct platform_device smc91x_device = {
464 464
465 465
466 466
467static struct pxamci_platform_data stargate2_mci_platform_data;
468
469/* 467/*
470 * The card detect interrupt isn't debounced so we delay it by 250ms 468 * The card detect interrupt isn't debounced so we delay it by 250ms
471 * to give the card a chance to fully insert / eject. 469 * to give the card a chance to fully insert / eject.
@@ -489,8 +487,6 @@ static int stargate2_mci_init(struct device *dev,
489 goto free_power_en; 487 goto free_power_en;
490 } 488 }
491 gpio_direction_input(SG2_GPIO_nSD_DETECT); 489 gpio_direction_input(SG2_GPIO_nSD_DETECT);
492 /* Delay to allow for full insertion */
493 stargate2_mci_platform_data.detect_delay = msecs_to_jiffies(250);
494 490
495 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), 491 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT),
496 stargate2_detect_int, 492 stargate2_detect_int,
@@ -529,6 +525,7 @@ static void stargate2_mci_exit(struct device *dev, void *data)
529} 525}
530 526
531static struct pxamci_platform_data stargate2_mci_platform_data = { 527static struct pxamci_platform_data stargate2_mci_platform_data = {
528 .detect_delay_ms = 250,
532 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 529 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
533 .init = stargate2_mci_init, 530 .init = stargate2_mci_init,
534 .setpower = stargate2_mci_setpower, 531 .setpower = stargate2_mci_setpower,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index ad552791c4ce..7512b822c6ca 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -275,6 +275,7 @@ static void tosa_mci_exit(struct device *dev, void *data)
275} 275}
276 276
277static struct pxamci_platform_data tosa_mci_platform_data = { 277static struct pxamci_platform_data tosa_mci_platform_data = {
278 .detect_delay_ms = 250,
278 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 279 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
279 .init = tosa_mci_init, 280 .init = tosa_mci_init,
280 .exit = tosa_mci_exit, 281 .exit = tosa_mci_exit,
@@ -926,7 +927,6 @@ static void __init tosa_init(void)
926 dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12); 927 dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
927 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16); 928 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
928 929
929 tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
930 pxa_set_mci_info(&tosa_mci_platform_data); 930 pxa_set_mci_info(&tosa_mci_platform_data);
931 pxa_set_udc_info(&udc_info); 931 pxa_set_udc_info(&udc_info);
932 pxa_set_ficp_info(&tosa_ficp_platform_data); 932 pxa_set_ficp_info(&tosa_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 797f2544d0ce..69689112eae7 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -349,7 +349,7 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
349 349
350static struct pxamci_platform_data trizeps4_mci_platform_data = { 350static struct pxamci_platform_data trizeps4_mci_platform_data = {
351 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 351 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
352 .detect_delay = 1, 352 .detect_delay_ms= 10,
353 .init = trizeps4_mci_init, 353 .init = trizeps4_mci_init,
354 .exit = trizeps4_mci_exit, 354 .exit = trizeps4_mci_exit,
355 .get_ro = NULL, /* write-protection not supported */ 355 .get_ro = NULL, /* write-protection not supported */
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
new file mode 100644
index 000000000000..9884fa978f16
--- /dev/null
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -0,0 +1,615 @@
1/*
2 * Hardware definitions for Voipac PXA270
3 *
4 * Copyright (C) 2010
5 * Marek Vasut <marek.vasut@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13#include <linux/platform_device.h>
14#include <linux/delay.h>
15#include <linux/irq.h>
16#include <linux/gpio_keys.h>
17#include <linux/input.h>
18#include <linux/gpio.h>
19#include <linux/sysdev.h>
20#include <linux/usb/gpio_vbus.h>
21#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h>
23#include <linux/mtd/physmap.h>
24#include <linux/mtd/onenand.h>
25#include <linux/dm9000.h>
26#include <linux/ucb1400.h>
27#include <linux/ata_platform.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#include <mach/pxa27x.h>
33#include <mach/audio.h>
34#include <mach/vpac270.h>
35#include <mach/mmc.h>
36#include <mach/pxafb.h>
37#include <mach/ohci.h>
38#include <mach/pxa27x-udc.h>
39#include <mach/udc.h>
40
41#include <plat/i2c.h>
42
43#include "generic.h"
44#include "devices.h"
45
46/******************************************************************************
47 * Pin configuration
48 ******************************************************************************/
49static unsigned long vpac270_pin_config[] __initdata = {
50 /* MMC */
51 GPIO32_MMC_CLK,
52 GPIO92_MMC_DAT_0,
53 GPIO109_MMC_DAT_1,
54 GPIO110_MMC_DAT_2,
55 GPIO111_MMC_DAT_3,
56 GPIO112_MMC_CMD,
57 GPIO53_GPIO, /* SD detect */
58 GPIO52_GPIO, /* SD r/o switch */
59
60 /* GPIO KEYS */
61 GPIO1_GPIO, /* USER BTN */
62
63 /* LEDs */
64 GPIO15_GPIO, /* orange led */
65
66 /* FFUART */
67 GPIO34_FFUART_RXD,
68 GPIO39_FFUART_TXD,
69 GPIO27_FFUART_RTS,
70 GPIO100_FFUART_CTS,
71 GPIO33_FFUART_DSR,
72 GPIO40_FFUART_DTR,
73 GPIO10_FFUART_DCD,
74 GPIO38_FFUART_RI,
75
76 /* LCD */
77 GPIO58_LCD_LDD_0,
78 GPIO59_LCD_LDD_1,
79 GPIO60_LCD_LDD_2,
80 GPIO61_LCD_LDD_3,
81 GPIO62_LCD_LDD_4,
82 GPIO63_LCD_LDD_5,
83 GPIO64_LCD_LDD_6,
84 GPIO65_LCD_LDD_7,
85 GPIO66_LCD_LDD_8,
86 GPIO67_LCD_LDD_9,
87 GPIO68_LCD_LDD_10,
88 GPIO69_LCD_LDD_11,
89 GPIO70_LCD_LDD_12,
90 GPIO71_LCD_LDD_13,
91 GPIO72_LCD_LDD_14,
92 GPIO73_LCD_LDD_15,
93 GPIO86_LCD_LDD_16,
94 GPIO87_LCD_LDD_17,
95 GPIO74_LCD_FCLK,
96 GPIO75_LCD_LCLK,
97 GPIO76_LCD_PCLK,
98 GPIO77_LCD_BIAS,
99
100 /* PCMCIA */
101 GPIO48_nPOE,
102 GPIO49_nPWE,
103 GPIO50_nPIOR,
104 GPIO51_nPIOW,
105 GPIO85_nPCE_1,
106 GPIO54_nPCE_2,
107 GPIO55_nPREG,
108 GPIO57_nIOIS16,
109 GPIO56_nPWAIT,
110 GPIO104_PSKTSEL,
111 GPIO84_GPIO, /* PCMCIA CD */
112 GPIO35_GPIO, /* PCMCIA RDY */
113 GPIO107_GPIO, /* PCMCIA PPEN */
114 GPIO11_GPIO, /* PCMCIA RESET */
115 GPIO17_GPIO, /* CF CD */
116 GPIO12_GPIO, /* CF RDY */
117 GPIO16_GPIO, /* CF RESET */
118
119 /* UHC */
120 GPIO88_USBH1_PWR,
121 GPIO89_USBH1_PEN,
122 GPIO119_USBH2_PWR,
123 GPIO120_USBH2_PEN,
124
125 /* UDC */
126 GPIO41_GPIO,
127
128 /* Ethernet */
129 GPIO114_GPIO, /* IRQ */
130
131 /* AC97 */
132 GPIO28_AC97_BITCLK,
133 GPIO29_AC97_SDATA_IN_0,
134 GPIO30_AC97_SDATA_OUT,
135 GPIO31_AC97_SYNC,
136 GPIO95_AC97_nRESET,
137 GPIO98_AC97_SYSCLK,
138 GPIO113_GPIO, /* TS IRQ */
139
140 /* I2C */
141 GPIO117_I2C_SCL,
142 GPIO118_I2C_SDA,
143
144 /* IDE */
145 GPIO36_GPIO, /* IDE IRQ */
146 GPIO80_DREQ_1,
147};
148
149/******************************************************************************
150 * NOR Flash
151 ******************************************************************************/
152#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
153static struct mtd_partition vpac270_nor_partitions[] = {
154 {
155 .name = "Flash",
156 .offset = 0x00000000,
157 .size = MTDPART_SIZ_FULL,
158 }
159};
160
161static struct physmap_flash_data vpac270_flash_data[] = {
162 {
163 .width = 2, /* bankwidth in bytes */
164 .parts = vpac270_nor_partitions,
165 .nr_parts = ARRAY_SIZE(vpac270_nor_partitions)
166 }
167};
168
169static struct resource vpac270_flash_resource = {
170 .start = PXA_CS0_PHYS,
171 .end = PXA_CS0_PHYS + SZ_64M - 1,
172 .flags = IORESOURCE_MEM,
173};
174
175static struct platform_device vpac270_flash = {
176 .name = "physmap-flash",
177 .id = 0,
178 .resource = &vpac270_flash_resource,
179 .num_resources = 1,
180 .dev = {
181 .platform_data = vpac270_flash_data,
182 },
183};
184static void __init vpac270_nor_init(void)
185{
186 platform_device_register(&vpac270_flash);
187}
188#else
189static inline void vpac270_nor_init(void) {}
190#endif
191
192/******************************************************************************
193 * OneNAND Flash
194 ******************************************************************************/
195#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE)
196static struct mtd_partition vpac270_onenand_partitions[] = {
197 {
198 .name = "Flash",
199 .offset = 0x00000000,
200 .size = MTDPART_SIZ_FULL,
201 }
202};
203
204static struct onenand_platform_data vpac270_onenand_info = {
205 .parts = vpac270_onenand_partitions,
206 .nr_parts = ARRAY_SIZE(vpac270_onenand_partitions),
207};
208
209static struct resource vpac270_onenand_resources[] = {
210 [0] = {
211 .start = PXA_CS0_PHYS,
212 .end = PXA_CS0_PHYS + SZ_1M,
213 .flags = IORESOURCE_MEM,
214 },
215};
216
217static struct platform_device vpac270_onenand = {
218 .name = "onenand-flash",
219 .id = -1,
220 .resource = vpac270_onenand_resources,
221 .num_resources = ARRAY_SIZE(vpac270_onenand_resources),
222 .dev = {
223 .platform_data = &vpac270_onenand_info,
224 },
225};
226
227static void __init vpac270_onenand_init(void)
228{
229 platform_device_register(&vpac270_onenand);
230}
231#else
232static void __init vpac270_onenand_init(void) {}
233#endif
234
235/******************************************************************************
236 * SD/MMC card controller
237 ******************************************************************************/
238#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
239static struct pxamci_platform_data vpac270_mci_platform_data = {
240 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
241 .gpio_card_detect = GPIO53_VPAC270_SD_DETECT_N,
242 .gpio_card_ro = GPIO52_VPAC270_SD_READONLY,
243 .detect_delay_ms = 200,
244};
245
246static void __init vpac270_mmc_init(void)
247{
248 pxa_set_mci_info(&vpac270_mci_platform_data);
249}
250#else
251static inline void vpac270_mmc_init(void) {}
252#endif
253
254/******************************************************************************
255 * GPIO keys
256 ******************************************************************************/
257#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
258static struct gpio_keys_button vpac270_pxa_buttons[] = {
259 {KEY_POWER, GPIO1_VPAC270_USER_BTN, 0, "USER BTN"},
260};
261
262static struct gpio_keys_platform_data vpac270_pxa_keys_data = {
263 .buttons = vpac270_pxa_buttons,
264 .nbuttons = ARRAY_SIZE(vpac270_pxa_buttons),
265};
266
267static struct platform_device vpac270_pxa_keys = {
268 .name = "gpio-keys",
269 .id = -1,
270 .dev = {
271 .platform_data = &vpac270_pxa_keys_data,
272 },
273};
274
275static void __init vpac270_keys_init(void)
276{
277 platform_device_register(&vpac270_pxa_keys);
278}
279#else
280static inline void vpac270_keys_init(void) {}
281#endif
282
283/******************************************************************************
284 * LED
285 ******************************************************************************/
286#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
287struct gpio_led vpac270_gpio_leds[] = {
288{
289 .name = "vpac270:orange:user",
290 .default_trigger = "none",
291 .gpio = GPIO15_VPAC270_LED_ORANGE,
292 .active_low = 1,
293}
294};
295
296static struct gpio_led_platform_data vpac270_gpio_led_info = {
297 .leds = vpac270_gpio_leds,
298 .num_leds = ARRAY_SIZE(vpac270_gpio_leds),
299};
300
301static struct platform_device vpac270_leds = {
302 .name = "leds-gpio",
303 .id = -1,
304 .dev = {
305 .platform_data = &vpac270_gpio_led_info,
306 }
307};
308
309static void __init vpac270_leds_init(void)
310{
311 platform_device_register(&vpac270_leds);
312}
313#else
314static inline void vpac270_leds_init(void) {}
315#endif
316
317/******************************************************************************
318 * USB Host
319 ******************************************************************************/
320#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
321static int vpac270_ohci_init(struct device *dev)
322{
323 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
324 return 0;
325}
326
327static struct pxaohci_platform_data vpac270_ohci_info = {
328 .port_mode = PMM_PERPORT_MODE,
329 .flags = ENABLE_PORT1 | ENABLE_PORT2 |
330 POWER_CONTROL_LOW | POWER_SENSE_LOW,
331 .init = vpac270_ohci_init,
332};
333
334static void __init vpac270_uhc_init(void)
335{
336 pxa_set_ohci_info(&vpac270_ohci_info);
337}
338#else
339static inline void vpac270_uhc_init(void) {}
340#endif
341
342/******************************************************************************
343 * USB Gadget
344 ******************************************************************************/
345#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
346static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
347 .gpio_vbus = GPIO41_VPAC270_UDC_DETECT,
348 .gpio_pullup = -1,
349};
350
351static struct platform_device vpac270_gpio_vbus = {
352 .name = "gpio-vbus",
353 .id = -1,
354 .dev = {
355 .platform_data = &vpac270_gpio_vbus_info,
356 },
357};
358
359static void vpac270_udc_command(int cmd)
360{
361 if (cmd == PXA2XX_UDC_CMD_CONNECT)
362 UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
363 else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
364 UP2OCR = UP2OCR_HXOE;
365}
366
367static struct pxa2xx_udc_mach_info vpac270_udc_info __initdata = {
368 .udc_command = vpac270_udc_command,
369 .gpio_pullup = -1,
370};
371
372static void __init vpac270_udc_init(void)
373{
374 pxa_set_udc_info(&vpac270_udc_info);
375 platform_device_register(&vpac270_gpio_vbus);
376}
377#else
378static inline void vpac270_udc_init(void) {}
379#endif
380
381/******************************************************************************
382 * Ethernet
383 ******************************************************************************/
384#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
385static struct resource vpac270_dm9000_resources[] = {
386 [0] = {
387 .start = PXA_CS2_PHYS + 0x300,
388 .end = PXA_CS2_PHYS + 0x303,
389 .flags = IORESOURCE_MEM,
390 },
391 [1] = {
392 .start = PXA_CS2_PHYS + 0x304,
393 .end = PXA_CS2_PHYS + 0x343,
394 .flags = IORESOURCE_MEM,
395 },
396 [2] = {
397 .start = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
398 .end = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
399 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
400 },
401};
402
403static struct dm9000_plat_data vpac270_dm9000_platdata = {
404 .flags = DM9000_PLATF_32BITONLY,
405};
406
407static struct platform_device vpac270_dm9000_device = {
408 .name = "dm9000",
409 .id = -1,
410 .num_resources = ARRAY_SIZE(vpac270_dm9000_resources),
411 .resource = vpac270_dm9000_resources,
412 .dev = {
413 .platform_data = &vpac270_dm9000_platdata,
414 }
415};
416
417static void __init vpac270_eth_init(void)
418{
419 platform_device_register(&vpac270_dm9000_device);
420}
421#else
422static inline void vpac270_eth_init(void) {}
423#endif
424
425/******************************************************************************
426 * Audio and Touchscreen
427 ******************************************************************************/
428#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
429 defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
430static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
431 .reset_gpio = 95,
432};
433
434static struct ucb1400_pdata vpac270_ucb1400_pdata = {
435 .irq = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ),
436};
437
438static struct platform_device vpac270_ucb1400_device = {
439 .name = "ucb1400_core",
440 .id = -1,
441 .dev = {
442 .platform_data = &vpac270_ucb1400_pdata,
443 },
444};
445
446static void __init vpac270_ts_init(void)
447{
448 pxa_set_ac97_info(&vpac270_ac97_pdata);
449 platform_device_register(&vpac270_ucb1400_device);
450}
451#else
452static inline void vpac270_ts_init(void) {}
453#endif
454
455/******************************************************************************
456 * RTC
457 ******************************************************************************/
458#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
459static struct i2c_board_info __initdata vpac270_i2c_devs[] = {
460 {
461 I2C_BOARD_INFO("ds1339", 0x68),
462 },
463};
464
465static void __init vpac270_rtc_init(void)
466{
467 pxa_set_i2c_info(NULL);
468 i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs));
469}
470#else
471static inline void vpac270_rtc_init(void) {}
472#endif
473
474/******************************************************************************
475 * Framebuffer
476 ******************************************************************************/
477#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
478static struct pxafb_mode_info vpac270_lcd_modes[] = {
479{
480 .pixclock = 57692,
481 .xres = 640,
482 .yres = 480,
483 .bpp = 32,
484 .depth = 18,
485
486 .left_margin = 144,
487 .right_margin = 32,
488 .upper_margin = 13,
489 .lower_margin = 30,
490
491 .hsync_len = 32,
492 .vsync_len = 2,
493
494 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
495},
496};
497
498static struct pxafb_mach_info vpac270_lcd_screen = {
499 .modes = vpac270_lcd_modes,
500 .num_modes = ARRAY_SIZE(vpac270_lcd_modes),
501 .lcd_conn = LCD_COLOR_TFT_18BPP,
502};
503
504static void vpac270_lcd_power(int on, struct fb_var_screeninfo *info)
505{
506 gpio_set_value(GPIO81_VPAC270_BKL_ON, on);
507}
508
509static void __init vpac270_lcd_init(void)
510{
511 int ret;
512
513 ret = gpio_request(GPIO81_VPAC270_BKL_ON, "BKL-ON");
514 if (ret) {
515 pr_err("Requesting BKL-ON GPIO failed!\n");
516 goto err;
517 }
518
519 ret = gpio_direction_output(GPIO81_VPAC270_BKL_ON, 1);
520 if (ret) {
521 pr_err("Setting BKL-ON GPIO direction failed!\n");
522 goto err2;
523 }
524
525 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
526 set_pxa_fb_info(&vpac270_lcd_screen);
527 return;
528
529err2:
530 gpio_free(GPIO81_VPAC270_BKL_ON);
531err:
532 return;
533}
534#else
535static inline void vpac270_lcd_init(void) {}
536#endif
537
538/******************************************************************************
539 * PATA IDE
540 ******************************************************************************/
541#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
542static struct pata_platform_info vpac270_pata_pdata = {
543 .ioport_shift = 1,
544 .irq_flags = IRQF_TRIGGER_RISING,
545};
546
547static struct resource vpac270_ide_resources[] = {
548 [0] = { /* I/O Base address */
549 .start = PXA_CS3_PHYS + 0x120,
550 .end = PXA_CS3_PHYS + 0x13f,
551 .flags = IORESOURCE_MEM
552 },
553 [1] = { /* CTL Base address */
554 .start = PXA_CS3_PHYS + 0x15c,
555 .end = PXA_CS3_PHYS + 0x15f,
556 .flags = IORESOURCE_MEM
557 },
558 [2] = { /* IDE IRQ pin */
559 .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
560 .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
561 .flags = IORESOURCE_IRQ
562 }
563};
564
565static struct platform_device vpac270_ide_device = {
566 .name = "pata_platform",
567 .num_resources = ARRAY_SIZE(vpac270_ide_resources),
568 .resource = vpac270_ide_resources,
569 .dev = {
570 .platform_data = &vpac270_pata_pdata,
571 }
572};
573
574static void __init vpac270_ide_init(void)
575{
576 platform_device_register(&vpac270_ide_device);
577}
578#else
579static inline void vpac270_ide_init(void) {}
580#endif
581
582/******************************************************************************
583 * Machine init
584 ******************************************************************************/
585static void __init vpac270_init(void)
586{
587 pxa2xx_mfp_config(ARRAY_AND_SIZE(vpac270_pin_config));
588
589 pxa_set_ffuart_info(NULL);
590 pxa_set_btuart_info(NULL);
591 pxa_set_stuart_info(NULL);
592
593 vpac270_lcd_init();
594 vpac270_mmc_init();
595 vpac270_nor_init();
596 vpac270_onenand_init();
597 vpac270_leds_init();
598 vpac270_keys_init();
599 vpac270_uhc_init();
600 vpac270_udc_init();
601 vpac270_eth_init();
602 vpac270_ts_init();
603 vpac270_rtc_init();
604 vpac270_ide_init();
605}
606
607MACHINE_START(VPAC270, "Voipac PXA270")
608 .phys_io = 0x40000000,
609 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
610 .boot_params = 0xa0000100,
611 .map_io = pxa_map_io,
612 .init_irq = pxa27x_init_irq,
613 .timer = &pxa_timer,
614 .init_machine = vpac270_init
615MACHINE_END
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
new file mode 100644
index 000000000000..f5d1ae3db3a4
--- /dev/null
+++ b/arch/arm/mach-pxa/z2.c
@@ -0,0 +1,609 @@
1/*
2 * linux/arch/arm/mach-pxa/z2.c
3 *
4 * Support for the Zipit Z2 Handheld device.
5 *
6 * Author: Ken McGuire
7 * Created: Jan 25, 2009
8 * Based on mainstone.c as modified for the Zipit Z2.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/platform_device.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/pwm_backlight.h>
19#include <linux/dma-mapping.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/libertas_spi.h>
22#include <linux/spi/lms283gf05.h>
23#include <linux/power_supply.h>
24#include <linux/mtd/physmap.h>
25#include <linux/gpio.h>
26#include <linux/gpio_keys.h>
27#include <linux/delay.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#include <mach/pxa27x.h>
33#include <mach/mfp-pxa27x.h>
34#include <mach/z2.h>
35#include <mach/pxafb.h>
36#include <mach/mmc.h>
37#include <mach/pxa27x_keypad.h>
38#include <mach/pxa2xx_spi.h>
39
40#include <plat/i2c.h>
41
42#include "generic.h"
43#include "devices.h"
44
45/******************************************************************************
46 * Pin configuration
47 ******************************************************************************/
48static unsigned long z2_pin_config[] = {
49
50 /* LCD - 16bpp Active TFT */
51 GPIO58_LCD_LDD_0,
52 GPIO59_LCD_LDD_1,
53 GPIO60_LCD_LDD_2,
54 GPIO61_LCD_LDD_3,
55 GPIO62_LCD_LDD_4,
56 GPIO63_LCD_LDD_5,
57 GPIO64_LCD_LDD_6,
58 GPIO65_LCD_LDD_7,
59 GPIO66_LCD_LDD_8,
60 GPIO67_LCD_LDD_9,
61 GPIO68_LCD_LDD_10,
62 GPIO69_LCD_LDD_11,
63 GPIO70_LCD_LDD_12,
64 GPIO71_LCD_LDD_13,
65 GPIO72_LCD_LDD_14,
66 GPIO73_LCD_LDD_15,
67 GPIO74_LCD_FCLK,
68 GPIO75_LCD_LCLK,
69 GPIO76_LCD_PCLK,
70 GPIO77_LCD_BIAS,
71 GPIO19_GPIO, /* LCD reset */
72 GPIO88_GPIO, /* LCD chipselect */
73
74 /* PWM */
75 GPIO115_PWM1_OUT, /* Keypad Backlight */
76 GPIO11_PWM2_OUT, /* LCD Backlight */
77
78 /* MMC */
79 GPIO32_MMC_CLK,
80 GPIO112_MMC_CMD,
81 GPIO92_MMC_DAT_0,
82 GPIO109_MMC_DAT_1,
83 GPIO110_MMC_DAT_2,
84 GPIO111_MMC_DAT_3,
85 GPIO96_GPIO, /* SD detect */
86
87 /* STUART */
88 GPIO46_STUART_RXD,
89 GPIO47_STUART_TXD,
90
91 /* Keypad */
92 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
93 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
94 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
95 GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
96 GPIO38_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
97 GPIO16_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
98 GPIO17_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH,
99 GPIO103_KP_MKOUT_0,
100 GPIO104_KP_MKOUT_1,
101 GPIO105_KP_MKOUT_2,
102 GPIO106_KP_MKOUT_3,
103 GPIO107_KP_MKOUT_4,
104 GPIO108_KP_MKOUT_5,
105 GPIO35_KP_MKOUT_6,
106 GPIO41_KP_MKOUT_7,
107
108 /* I2C */
109 GPIO117_I2C_SCL,
110 GPIO118_I2C_SDA,
111
112 /* SSP1 */
113 GPIO23_SSP1_SCLK, /* SSP1_SCK */
114 GPIO25_SSP1_TXD, /* SSP1_TXD */
115 GPIO26_SSP1_RXD, /* SSP1_RXD */
116
117 /* SSP2 */
118 GPIO22_SSP2_SCLK, /* SSP2_SCK */
119 GPIO13_SSP2_TXD, /* SSP2_TXD */
120 GPIO40_SSP2_RXD, /* SSP2_RXD */
121
122 /* LEDs */
123 GPIO10_GPIO, /* WiFi LED */
124 GPIO83_GPIO, /* Charging LED */
125 GPIO85_GPIO, /* Charged LED */
126
127 /* I2S */
128 GPIO28_I2S_BITCLK_OUT,
129 GPIO29_I2S_SDATA_IN,
130 GPIO30_I2S_SDATA_OUT,
131 GPIO31_I2S_SYNC,
132 GPIO113_I2S_SYSCLK,
133
134 /* MISC */
135 GPIO0_GPIO, /* AC power detect */
136 GPIO1_GPIO, /* Power button */
137 GPIO37_GPIO, /* Headphone detect */
138 GPIO98_GPIO, /* Lid switch */
139 GPIO14_GPIO, /* WiFi Reset */
140 GPIO15_GPIO, /* WiFi Power */
141 GPIO24_GPIO, /* WiFi CS */
142 GPIO36_GPIO, /* WiFi IRQ */
143 GPIO88_GPIO, /* LCD CS */
144};
145
146/******************************************************************************
147 * NOR Flash
148 ******************************************************************************/
149#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
150static struct resource z2_flash_resource = {
151 .start = PXA_CS0_PHYS,
152 .end = PXA_CS0_PHYS + SZ_8M - 1,
153 .flags = IORESOURCE_MEM,
154};
155
156static struct mtd_partition z2_flash_parts[] = {
157 {
158 .name = "U-Boot Bootloader",
159 .offset = 0x0,
160 .size = 0x20000,
161 },
162 {
163 .name = "Linux Kernel",
164 .offset = 0x20000,
165 .size = 0x220000,
166 },
167 {
168 .name = "Filesystem",
169 .offset = 0x240000,
170 .size = 0x5b0000,
171 },
172 {
173 .name = "U-Boot Environment",
174 .offset = 0x7f0000,
175 .size = MTDPART_SIZ_FULL,
176 },
177};
178
179static struct physmap_flash_data z2_flash_data = {
180 .width = 2,
181 .parts = z2_flash_parts,
182 .nr_parts = ARRAY_SIZE(z2_flash_parts),
183};
184
185static struct platform_device z2_flash = {
186 .name = "physmap-flash",
187 .id = -1,
188 .resource = &z2_flash_resource,
189 .num_resources = 1,
190 .dev = {
191 .platform_data = &z2_flash_data,
192 },
193};
194
195static void __init z2_nor_init(void)
196{
197 platform_device_register(&z2_flash);
198}
199#else
200static inline void z2_nor_init(void) {}
201#endif
202
203/******************************************************************************
204 * Backlight
205 ******************************************************************************/
206#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
207static struct platform_pwm_backlight_data z2_backlight_data[] = {
208 [0] = {
209 /* Keypad Backlight */
210 .pwm_id = 1,
211 .max_brightness = 1023,
212 .dft_brightness = 512,
213 .pwm_period_ns = 1260320,
214 },
215 [1] = {
216 /* LCD Backlight */
217 .pwm_id = 2,
218 .max_brightness = 1023,
219 .dft_brightness = 512,
220 .pwm_period_ns = 1260320,
221 },
222};
223
224static struct platform_device z2_backlight_devices[2] = {
225 {
226 .name = "pwm-backlight",
227 .id = 0,
228 .dev = {
229 .platform_data = &z2_backlight_data[1],
230 },
231 },
232 {
233 .name = "pwm-backlight",
234 .id = 1,
235 .dev = {
236 .platform_data = &z2_backlight_data[0],
237 },
238 },
239};
240static void __init z2_pwm_init(void)
241{
242 platform_device_register(&z2_backlight_devices[0]);
243 platform_device_register(&z2_backlight_devices[1]);
244}
245#else
246static inline void z2_pwm_init(void) {}
247#endif
248
249/******************************************************************************
250 * Framebuffer
251 ******************************************************************************/
252#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
253static struct pxafb_mode_info z2_lcd_modes[] = {
254{
255 .pixclock = 192000,
256 .xres = 240,
257 .yres = 320,
258 .bpp = 16,
259
260 .left_margin = 4,
261 .right_margin = 8,
262 .upper_margin = 4,
263 .lower_margin = 8,
264
265 .hsync_len = 4,
266 .vsync_len = 4,
267},
268};
269
270static struct pxafb_mach_info z2_lcd_screen = {
271 .modes = z2_lcd_modes,
272 .num_modes = ARRAY_SIZE(z2_lcd_modes),
273 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_BIAS_ACTIVE_LOW |
274 LCD_ALTERNATE_MAPPING,
275};
276
277static void __init z2_lcd_init(void)
278{
279 set_pxa_fb_info(&z2_lcd_screen);
280}
281#else
282static inline void z2_lcd_init(void) {}
283#endif
284
285/******************************************************************************
286 * SD/MMC card controller
287 ******************************************************************************/
288#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
289static struct pxamci_platform_data z2_mci_platform_data = {
290 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
291 .gpio_card_detect = GPIO96_ZIPITZ2_SD_DETECT,
292 .gpio_power = -1,
293 .gpio_card_ro = -1,
294 .detect_delay_ms = 200,
295};
296
297static void __init z2_mmc_init(void)
298{
299 pxa_set_mci_info(&z2_mci_platform_data);
300}
301#else
302static inline void z2_mmc_init(void) {}
303#endif
304
305/******************************************************************************
306 * LEDs
307 ******************************************************************************/
308#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
309struct gpio_led z2_gpio_leds[] = {
310{
311 .name = "z2:green:wifi",
312 .default_trigger = "none",
313 .gpio = GPIO10_ZIPITZ2_LED_WIFI,
314 .active_low = 1,
315}, {
316 .name = "z2:green:charged",
317 .default_trigger = "none",
318 .gpio = GPIO85_ZIPITZ2_LED_CHARGED,
319 .active_low = 1,
320}, {
321 .name = "z2:amber:charging",
322 .default_trigger = "none",
323 .gpio = GPIO83_ZIPITZ2_LED_CHARGING,
324 .active_low = 1,
325},
326};
327
328static struct gpio_led_platform_data z2_gpio_led_info = {
329 .leds = z2_gpio_leds,
330 .num_leds = ARRAY_SIZE(z2_gpio_leds),
331};
332
333static struct platform_device z2_leds = {
334 .name = "leds-gpio",
335 .id = -1,
336 .dev = {
337 .platform_data = &z2_gpio_led_info,
338 }
339};
340
341static void __init z2_leds_init(void)
342{
343 platform_device_register(&z2_leds);
344}
345#else
346static inline void z2_leds_init(void) {}
347#endif
348
349/******************************************************************************
350 * GPIO keyboard
351 ******************************************************************************/
352#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
353static unsigned int z2_matrix_keys[] = {
354 KEY(0, 0, KEY_OPTION),
355 KEY(1, 0, KEY_UP),
356 KEY(2, 0, KEY_DOWN),
357 KEY(3, 0, KEY_LEFT),
358 KEY(4, 0, KEY_RIGHT),
359 KEY(5, 0, KEY_END),
360 KEY(6, 0, KEY_KPPLUS),
361
362 KEY(0, 1, KEY_HOME),
363 KEY(1, 1, KEY_Q),
364 KEY(2, 1, KEY_I),
365 KEY(3, 1, KEY_G),
366 KEY(4, 1, KEY_X),
367 KEY(5, 1, KEY_ENTER),
368 KEY(6, 1, KEY_KPMINUS),
369
370 KEY(0, 2, KEY_PAGEUP),
371 KEY(1, 2, KEY_W),
372 KEY(2, 2, KEY_O),
373 KEY(3, 2, KEY_H),
374 KEY(4, 2, KEY_C),
375 KEY(5, 2, KEY_LEFTALT),
376
377 KEY(0, 3, KEY_PAGEDOWN),
378 KEY(1, 3, KEY_E),
379 KEY(2, 3, KEY_P),
380 KEY(3, 3, KEY_J),
381 KEY(4, 3, KEY_V),
382 KEY(5, 3, KEY_LEFTSHIFT),
383
384 KEY(0, 4, KEY_ESC),
385 KEY(1, 4, KEY_R),
386 KEY(2, 4, KEY_A),
387 KEY(3, 4, KEY_K),
388 KEY(4, 4, KEY_B),
389 KEY(5, 4, KEY_LEFTCTRL),
390
391 KEY(0, 5, KEY_TAB),
392 KEY(1, 5, KEY_T),
393 KEY(2, 5, KEY_S),
394 KEY(3, 5, KEY_L),
395 KEY(4, 5, KEY_N),
396 KEY(5, 5, KEY_SPACE),
397
398 KEY(0, 6, KEY_STOPCD),
399 KEY(1, 6, KEY_Y),
400 KEY(2, 6, KEY_D),
401 KEY(3, 6, KEY_BACKSPACE),
402 KEY(4, 6, KEY_M),
403 KEY(5, 6, KEY_COMMA),
404
405 KEY(0, 7, KEY_PLAYCD),
406 KEY(1, 7, KEY_U),
407 KEY(2, 7, KEY_F),
408 KEY(3, 7, KEY_Z),
409 KEY(4, 7, KEY_SEMICOLON),
410 KEY(5, 7, KEY_DOT),
411};
412
413static struct pxa27x_keypad_platform_data z2_keypad_platform_data = {
414 .matrix_key_rows = 7,
415 .matrix_key_cols = 8,
416 .matrix_key_map = z2_matrix_keys,
417 .matrix_key_map_size = ARRAY_SIZE(z2_matrix_keys),
418
419 .debounce_interval = 30,
420};
421
422static void __init z2_mkp_init(void)
423{
424 pxa_set_keypad_info(&z2_keypad_platform_data);
425}
426#else
427static inline void z2_mkp_init(void) {}
428#endif
429
430/******************************************************************************
431 * GPIO keys
432 ******************************************************************************/
433#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
434static struct gpio_keys_button z2_pxa_buttons[] = {
435 {KEY_POWER, GPIO1_ZIPITZ2_POWER_BUTTON, 0, "Power Button" },
436 {KEY_CLOSE, GPIO98_ZIPITZ2_LID_BUTTON, 0, "Lid Button" },
437};
438
439static struct gpio_keys_platform_data z2_pxa_keys_data = {
440 .buttons = z2_pxa_buttons,
441 .nbuttons = ARRAY_SIZE(z2_pxa_buttons),
442};
443
444static struct platform_device z2_pxa_keys = {
445 .name = "gpio-keys",
446 .id = -1,
447 .dev = {
448 .platform_data = &z2_pxa_keys_data,
449 },
450};
451
452static void __init z2_keys_init(void)
453{
454 platform_device_register(&z2_pxa_keys);
455}
456#else
457static inline void z2_keys_init(void) {}
458#endif
459
460/******************************************************************************
461 * SSP Devices - WiFi and LCD control
462 ******************************************************************************/
463#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
464/* WiFi */
465static int z2_lbs_spi_setup(struct spi_device *spi)
466{
467 int ret = 0;
468
469 ret = gpio_request(GPIO15_ZIPITZ2_WIFI_POWER, "WiFi Power");
470 if (ret)
471 goto err;
472
473 ret = gpio_direction_output(GPIO15_ZIPITZ2_WIFI_POWER, 1);
474 if (ret)
475 goto err2;
476
477 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_RESET, "WiFi Reset");
478 if (ret)
479 goto err2;
480
481 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_RESET, 0);
482 if (ret)
483 goto err3;
484
485 /* Reset the card */
486 mdelay(180);
487 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 1);
488 mdelay(20);
489
490 spi->bits_per_word = 16;
491 spi->mode = SPI_MODE_2,
492
493 spi_setup(spi);
494
495 return 0;
496
497err3:
498 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
499err2:
500 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
501err:
502 return ret;
503};
504
505static int z2_lbs_spi_teardown(struct spi_device *spi)
506{
507 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 0);
508 gpio_set_value(GPIO15_ZIPITZ2_WIFI_POWER, 0);
509 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
510 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
511 return 0;
512
513};
514
515static struct pxa2xx_spi_chip z2_lbs_chip_info = {
516 .rx_threshold = 8,
517 .tx_threshold = 8,
518 .timeout = 1000,
519 .gpio_cs = GPIO24_ZIPITZ2_WIFI_CS,
520};
521
522static struct libertas_spi_platform_data z2_lbs_pdata = {
523 .use_dummy_writes = 1,
524 .setup = z2_lbs_spi_setup,
525 .teardown = z2_lbs_spi_teardown,
526};
527
528/* LCD */
529static struct pxa2xx_spi_chip lms283_chip_info = {
530 .rx_threshold = 1,
531 .tx_threshold = 1,
532 .timeout = 64,
533 .gpio_cs = GPIO88_ZIPITZ2_LCD_CS,
534};
535
536static const struct lms283gf05_pdata lms283_pdata = {
537 .reset_gpio = GPIO19_ZIPITZ2_LCD_RESET,
538};
539
540static struct spi_board_info spi_board_info[] __initdata = {
541{
542 .modalias = "libertas_spi",
543 .platform_data = &z2_lbs_pdata,
544 .controller_data = &z2_lbs_chip_info,
545 .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ),
546 .max_speed_hz = 13000000,
547 .bus_num = 1,
548 .chip_select = 0,
549},
550{
551 .modalias = "lms283gf05",
552 .controller_data = &lms283_chip_info,
553 .platform_data = &lms283_pdata,
554 .max_speed_hz = 400000,
555 .bus_num = 2,
556 .chip_select = 0,
557},
558};
559
560static struct pxa2xx_spi_master pxa_ssp1_master_info = {
561 .clock_enable = CKEN_SSP,
562 .num_chipselect = 1,
563 .enable_dma = 1,
564};
565
566static struct pxa2xx_spi_master pxa_ssp2_master_info = {
567 .clock_enable = CKEN_SSP2,
568 .num_chipselect = 1,
569};
570
571static void __init z2_spi_init(void)
572{
573 pxa2xx_set_spi_info(1, &pxa_ssp1_master_info);
574 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
575 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
576}
577#else
578static inline void z2_spi_init(void) {}
579#endif
580
581/******************************************************************************
582 * Machine init
583 ******************************************************************************/
584static void __init z2_init(void)
585{
586 pxa2xx_mfp_config(ARRAY_AND_SIZE(z2_pin_config));
587
588 z2_lcd_init();
589 z2_mmc_init();
590 z2_mkp_init();
591
592 pxa_set_i2c_info(NULL);
593
594 z2_spi_init();
595 z2_nor_init();
596 z2_pwm_init();
597 z2_leds_init();
598 z2_keys_init();
599}
600
601MACHINE_START(ZIPIT2, "Zipit Z2")
602 .phys_io = 0x40000000,
603 .boot_params = 0xa0000100,
604 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
605 .map_io = pxa_map_io,
606 .init_irq = pxa27x_init_irq,
607 .timer = &pxa_timer,
608 .init_machine = z2_init,
609MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 39896d883584..3680f6a90623 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -644,7 +644,7 @@ static struct pxafb_mach_info zeus_fb_info = {
644 644
645static struct pxamci_platform_data zeus_mci_platform_data = { 645static struct pxamci_platform_data zeus_mci_platform_data = {
646 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 646 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
647 .detect_delay = HZ/4, 647 .detect_delay_ms = 250,
648 .gpio_card_detect = ZEUS_MMC_CD_GPIO, 648 .gpio_card_detect = ZEUS_MMC_CD_GPIO,
649 .gpio_card_ro = ZEUS_MMC_WP_GPIO, 649 .gpio_card_ro = ZEUS_MMC_WP_GPIO,
650 .gpio_card_ro_invert = 1, 650 .gpio_card_ro_invert = 1,
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 2b4043c04d0c..c479cbecf784 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -218,7 +218,7 @@ static inline void zylonite_init_lcd(void) {}
218 218
219#if defined(CONFIG_MMC) 219#if defined(CONFIG_MMC)
220static struct pxamci_platform_data zylonite_mci_platform_data = { 220static struct pxamci_platform_data zylonite_mci_platform_data = {
221 .detect_delay = 20, 221 .detect_delay_ms= 200,
222 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 222 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
223 .gpio_card_detect = EXT_GPIO(0), 223 .gpio_card_detect = EXT_GPIO(0),
224 .gpio_card_ro = EXT_GPIO(2), 224 .gpio_card_ro = EXT_GPIO(2),
@@ -226,7 +226,7 @@ static struct pxamci_platform_data zylonite_mci_platform_data = {
226}; 226};
227 227
228static struct pxamci_platform_data zylonite_mci2_platform_data = { 228static struct pxamci_platform_data zylonite_mci2_platform_data = {
229 .detect_delay = 20, 229 .detect_delay_ms= 200,
230 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 230 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
231 .gpio_card_detect = EXT_GPIO(1), 231 .gpio_card_detect = EXT_GPIO(1),
232 .gpio_card_ro = EXT_GPIO(3), 232 .gpio_card_ro = EXT_GPIO(3),
@@ -234,7 +234,7 @@ static struct pxamci_platform_data zylonite_mci2_platform_data = {
234}; 234};
235 235
236static struct pxamci_platform_data zylonite_mci3_platform_data = { 236static struct pxamci_platform_data zylonite_mci3_platform_data = {
237 .detect_delay = 20, 237 .detect_delay_ms= 200,
238 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 238 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
239 .gpio_card_detect = EXT_GPIO(30), 239 .gpio_card_detect = EXT_GPIO(30),
240 .gpio_card_ro = EXT_GPIO(31), 240 .gpio_card_ro = EXT_GPIO(31),
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index e704edb733c0..a01b76b7c956 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := core.o clock.o 5obj-y := core.o
6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o 6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o 7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o 8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
deleted file mode 100644
index a7043115de72..000000000000
--- a/arch/arm/mach-realview/clock.c
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * linux/arch/arm/mach-realview/clock.c
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/device.h>
14#include <linux/list.h>
15#include <linux/errno.h>
16#include <linux/err.h>
17#include <linux/string.h>
18#include <linux/clk.h>
19#include <linux/mutex.h>
20
21#include <asm/hardware/icst307.h>
22
23#include "clock.h"
24
25int clk_enable(struct clk *clk)
26{
27 return 0;
28}
29EXPORT_SYMBOL(clk_enable);
30
31void clk_disable(struct clk *clk)
32{
33}
34EXPORT_SYMBOL(clk_disable);
35
36unsigned long clk_get_rate(struct clk *clk)
37{
38 return clk->rate;
39}
40EXPORT_SYMBOL(clk_get_rate);
41
42long clk_round_rate(struct clk *clk, unsigned long rate)
43{
44 struct icst307_vco vco;
45 vco = icst307_khz_to_vco(clk->params, rate / 1000);
46 return icst307_khz(clk->params, vco) * 1000;
47}
48EXPORT_SYMBOL(clk_round_rate);
49
50int clk_set_rate(struct clk *clk, unsigned long rate)
51{
52 int ret = -EIO;
53
54 if (clk->setvco) {
55 struct icst307_vco vco;
56
57 vco = icst307_khz_to_vco(clk->params, rate / 1000);
58 clk->rate = icst307_khz(clk->params, vco) * 1000;
59 clk->setvco(clk, vco);
60 ret = 0;
61 }
62 return ret;
63}
64EXPORT_SYMBOL(clk_set_rate);
diff --git a/arch/arm/mach-realview/clock.h b/arch/arm/mach-realview/clock.h
deleted file mode 100644
index ebbb0f06b600..000000000000
--- a/arch/arm/mach-realview/clock.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * linux/arch/arm/mach-realview/clock.h
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11struct module;
12struct icst307_params;
13
14struct clk {
15 unsigned long rate;
16 const struct icst307_params *params;
17 void *data;
18 void (*setvco)(struct clk *, struct icst307_vco vco);
19};
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index d5a95738f85b..595be19f8ad5 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -25,8 +25,6 @@
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/amba/bus.h> 26#include <linux/amba/bus.h>
27#include <linux/amba/clcd.h> 27#include <linux/amba/clcd.h>
28#include <linux/clocksource.h>
29#include <linux/clockchips.h>
30#include <linux/io.h> 28#include <linux/io.h>
31#include <linux/smsc911x.h> 29#include <linux/smsc911x.h>
32#include <linux/ata_platform.h> 30#include <linux/ata_platform.h>
@@ -40,7 +38,7 @@
40#include <asm/leds.h> 38#include <asm/leds.h>
41#include <asm/mach-types.h> 39#include <asm/mach-types.h>
42#include <asm/hardware/arm_timer.h> 40#include <asm/hardware/arm_timer.h>
43#include <asm/hardware/icst307.h> 41#include <asm/hardware/icst.h>
44 42
45#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
46#include <asm/mach/flash.h> 44#include <asm/mach/flash.h>
@@ -49,13 +47,12 @@
49 47
50#include <asm/hardware/gic.h> 48#include <asm/hardware/gic.h>
51 49
50#include <mach/clkdev.h>
52#include <mach/platform.h> 51#include <mach/platform.h>
53#include <mach/irqs.h> 52#include <mach/irqs.h>
53#include <plat/timer-sp.h>
54 54
55#include "core.h" 55#include "core.h"
56#include "clock.h"
57
58#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
59 56
60/* used by entry-macro.S and platsmp.c */ 57/* used by entry-macro.S and platsmp.c */
61void __iomem *gic_cpu_base_addr; 58void __iomem *gic_cpu_base_addr;
@@ -79,20 +76,6 @@ void __init realview_adjust_zones(int node, unsigned long *size,
79} 76}
80#endif 77#endif
81 78
82/*
83 * This is the RealView sched_clock implementation. This has
84 * a resolution of 41.7ns, and a maximum value of about 179s.
85 */
86unsigned long long sched_clock(void)
87{
88 unsigned long long v;
89
90 v = (unsigned long long)readl(REALVIEW_REFCOUNTER) * 125;
91 do_div(v, 3);
92
93 return v;
94}
95
96 79
97#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET) 80#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
98 81
@@ -274,37 +257,40 @@ struct mmci_platform_data realview_mmc1_plat_data = {
274/* 257/*
275 * Clock handling 258 * Clock handling
276 */ 259 */
277static const struct icst307_params realview_oscvco_params = { 260static const struct icst_params realview_oscvco_params = {
278 .ref = 24000, 261 .ref = 24000000,
279 .vco_max = 200000, 262 .vco_max = ICST307_VCO_MAX,
263 .vco_min = ICST307_VCO_MIN,
280 .vd_min = 4 + 8, 264 .vd_min = 4 + 8,
281 .vd_max = 511 + 8, 265 .vd_max = 511 + 8,
282 .rd_min = 1 + 2, 266 .rd_min = 1 + 2,
283 .rd_max = 127 + 2, 267 .rd_max = 127 + 2,
268 .s2div = icst307_s2div,
269 .idx2s = icst307_idx2s,
284}; 270};
285 271
286static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco) 272static void realview_oscvco_set(struct clk *clk, struct icst_vco vco)
287{ 273{
288 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET; 274 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
289 void __iomem *sys_osc;
290 u32 val; 275 u32 val;
291 276
292 if (machine_is_realview_pb1176()) 277 val = readl(clk->vcoreg) & ~0x7ffff;
293 sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
294 else
295 sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
296
297 val = readl(sys_osc) & ~0x7ffff;
298 val |= vco.v | (vco.r << 9) | (vco.s << 16); 278 val |= vco.v | (vco.r << 9) | (vco.s << 16);
299 279
300 writel(0xa05f, sys_lock); 280 writel(0xa05f, sys_lock);
301 writel(val, sys_osc); 281 writel(val, clk->vcoreg);
302 writel(0, sys_lock); 282 writel(0, sys_lock);
303} 283}
304 284
285static const struct clk_ops oscvco_clk_ops = {
286 .round = icst_clk_round,
287 .set = icst_clk_set,
288 .setvco = realview_oscvco_set,
289};
290
305static struct clk oscvco_clk = { 291static struct clk oscvco_clk = {
292 .ops = &oscvco_clk_ops,
306 .params = &realview_oscvco_params, 293 .params = &realview_oscvco_params,
307 .setvco = realview_oscvco_set,
308}; 294};
309 295
310/* 296/*
@@ -347,7 +333,13 @@ static struct clk_lookup lookups[] = {
347 333
348static int __init clk_init(void) 334static int __init clk_init(void)
349{ 335{
336 if (machine_is_realview_pb1176())
337 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
338 else
339 oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
340
350 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 341 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
342
351 return 0; 343 return 0;
352} 344}
353arch_initcall(clk_init); 345arch_initcall(clk_init);
@@ -644,133 +636,6 @@ void __iomem *timer2_va_base;
644void __iomem *timer3_va_base; 636void __iomem *timer3_va_base;
645 637
646/* 638/*
647 * How long is the timer interval?
648 */
649#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
650#if TIMER_INTERVAL >= 0x100000
651#define TIMER_RELOAD (TIMER_INTERVAL >> 8)
652#define TIMER_DIVISOR (TIMER_CTRL_DIV256)
653#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
654#elif TIMER_INTERVAL >= 0x10000
655#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */
656#define TIMER_DIVISOR (TIMER_CTRL_DIV16)
657#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
658#else
659#define TIMER_RELOAD (TIMER_INTERVAL)
660#define TIMER_DIVISOR (TIMER_CTRL_DIV1)
661#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
662#endif
663
664static void timer_set_mode(enum clock_event_mode mode,
665 struct clock_event_device *clk)
666{
667 unsigned long ctrl;
668
669 switch(mode) {
670 case CLOCK_EVT_MODE_PERIODIC:
671 writel(TIMER_RELOAD, timer0_va_base + TIMER_LOAD);
672
673 ctrl = TIMER_CTRL_PERIODIC;
674 ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE;
675 break;
676 case CLOCK_EVT_MODE_ONESHOT:
677 /* period set, and timer enabled in 'next_event' hook */
678 ctrl = TIMER_CTRL_ONESHOT;
679 ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE;
680 break;
681 case CLOCK_EVT_MODE_UNUSED:
682 case CLOCK_EVT_MODE_SHUTDOWN:
683 default:
684 ctrl = 0;
685 }
686
687 writel(ctrl, timer0_va_base + TIMER_CTRL);
688}
689
690static int timer_set_next_event(unsigned long evt,
691 struct clock_event_device *unused)
692{
693 unsigned long ctrl = readl(timer0_va_base + TIMER_CTRL);
694
695 writel(evt, timer0_va_base + TIMER_LOAD);
696 writel(ctrl | TIMER_CTRL_ENABLE, timer0_va_base + TIMER_CTRL);
697
698 return 0;
699}
700
701static struct clock_event_device timer0_clockevent = {
702 .name = "timer0",
703 .shift = 32,
704 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
705 .set_mode = timer_set_mode,
706 .set_next_event = timer_set_next_event,
707 .rating = 300,
708 .cpumask = cpu_all_mask,
709};
710
711static void __init realview_clockevents_init(unsigned int timer_irq)
712{
713 timer0_clockevent.irq = timer_irq;
714 timer0_clockevent.mult =
715 div_sc(1000000, NSEC_PER_SEC, timer0_clockevent.shift);
716 timer0_clockevent.max_delta_ns =
717 clockevent_delta2ns(0xffffffff, &timer0_clockevent);
718 timer0_clockevent.min_delta_ns =
719 clockevent_delta2ns(0xf, &timer0_clockevent);
720
721 clockevents_register_device(&timer0_clockevent);
722}
723
724/*
725 * IRQ handler for the timer
726 */
727static irqreturn_t realview_timer_interrupt(int irq, void *dev_id)
728{
729 struct clock_event_device *evt = &timer0_clockevent;
730
731 /* clear the interrupt */
732 writel(1, timer0_va_base + TIMER_INTCLR);
733
734 evt->event_handler(evt);
735
736 return IRQ_HANDLED;
737}
738
739static struct irqaction realview_timer_irq = {
740 .name = "RealView Timer Tick",
741 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
742 .handler = realview_timer_interrupt,
743};
744
745static cycle_t realview_get_cycles(struct clocksource *cs)
746{
747 return ~readl(timer3_va_base + TIMER_VALUE);
748}
749
750static struct clocksource clocksource_realview = {
751 .name = "timer3",
752 .rating = 200,
753 .read = realview_get_cycles,
754 .mask = CLOCKSOURCE_MASK(32),
755 .shift = 20,
756 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
757};
758
759static void __init realview_clocksource_init(void)
760{
761 /* setup timer 0 as free-running clocksource */
762 writel(0, timer3_va_base + TIMER_CTRL);
763 writel(0xffffffff, timer3_va_base + TIMER_LOAD);
764 writel(0xffffffff, timer3_va_base + TIMER_VALUE);
765 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
766 timer3_va_base + TIMER_CTRL);
767
768 clocksource_realview.mult =
769 clocksource_khz2mult(1000, clocksource_realview.shift);
770 clocksource_register(&clocksource_realview);
771}
772
773/*
774 * Set up the clock source and clock events devices 639 * Set up the clock source and clock events devices
775 */ 640 */
776void __init realview_timer_init(unsigned int timer_irq) 641void __init realview_timer_init(unsigned int timer_irq)
@@ -797,13 +662,8 @@ void __init realview_timer_init(unsigned int timer_irq)
797 writel(0, timer2_va_base + TIMER_CTRL); 662 writel(0, timer2_va_base + TIMER_CTRL);
798 writel(0, timer3_va_base + TIMER_CTRL); 663 writel(0, timer3_va_base + TIMER_CTRL);
799 664
800 /* 665 sp804_clocksource_init(timer3_va_base);
801 * Make irqs happen for the system timer 666 sp804_clockevents_init(timer0_va_base, timer_irq);
802 */
803 setup_irq(timer_irq, &realview_timer_irq);
804
805 realview_clocksource_init();
806 realview_clockevents_init(timer_irq);
807} 667}
808 668
809/* 669/*
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index be048e3e8799..f95521a5e5ce 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -131,7 +131,7 @@ void platform_cpu_die(unsigned int cpu)
131 cpu_leave_lowpower(); 131 cpu_leave_lowpower();
132} 132}
133 133
134int mach_cpu_disable(unsigned int cpu) 134int platform_cpu_disable(unsigned int cpu)
135{ 135{
136 /* 136 /*
137 * we don't allow CPU 0 to be shutdown (it is still too special 137 * we don't allow CPU 0 to be shutdown (it is still too special
diff --git a/arch/arm/mach-realview/include/mach/clkdev.h b/arch/arm/mach-realview/include/mach/clkdev.h
index 04b37a89801c..e58d0771b64e 100644
--- a/arch/arm/mach-realview/include/mach/clkdev.h
+++ b/arch/arm/mach-realview/include/mach/clkdev.h
@@ -1,6 +1,15 @@
1#ifndef __ASM_MACH_CLKDEV_H 1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H 2#define __ASM_MACH_CLKDEV_H
3 3
4#include <plat/clock.h>
5
6struct clk {
7 unsigned long rate;
8 const struct clk_ops *ops;
9 const struct icst_params *params;
10 void __iomem *vcoreg;
11};
12
4#define __clk_get(clk) ({ 1; }) 13#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0) 14#define __clk_put(clk) do { } while (0)
6 15
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
index 2410d4f8ddd3..830055bb8628 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -31,6 +31,7 @@
31#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */ 31#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
32#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */ 32#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
33#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */ 33#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
34#define IRQ_DC1176_CORE_PMU (IRQ_DC1176_GIC_START + 7) /* Core PMU interrupt */
34#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */ 35#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
35#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */ 36#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
36#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */ 37#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
diff --git a/arch/arm/mach-realview/include/mach/irqs-pba8.h b/arch/arm/mach-realview/include/mach/irqs-pba8.h
index 86792a9f2ab6..4a88a4edb651 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pba8.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pba8.h
@@ -23,12 +23,6 @@
23 23
24#define IRQ_PBA8_GIC_START 32 24#define IRQ_PBA8_GIC_START 32
25 25
26/* L220
27#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
28#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
29#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
30*/
31
32/* 26/*
33 * PB-A8 on-board gic irq sources 27 * PB-A8 on-board gic irq sources
34 */ 28 */
@@ -65,6 +59,8 @@
65#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */ 59#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
66#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */ 60#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
67 61
62#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */
63
68/* ... */ 64/* ... */
69#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50) 65#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
70#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51) 66#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
diff --git a/arch/arm/mach-realview/include/mach/irqs-pbx.h b/arch/arm/mach-realview/include/mach/irqs-pbx.h
index deaad4302b17..206a3001f46b 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pbx.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pbx.h
@@ -22,12 +22,6 @@
22 22
23#define IRQ_PBX_GIC_START 32 23#define IRQ_PBX_GIC_START 32
24 24
25/* L220
26#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
27#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
28#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
29*/
30
31/* 25/*
32 * PBX on-board gic irq sources 26 * PBX on-board gic irq sources
33 */ 27 */
@@ -77,10 +71,10 @@
77#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */ 71#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
78#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */ 72#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
79/* ... */ 73/* ... */
80#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */ 74#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
81#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45) 75#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 45)
82#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46) 76#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 46)
83#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47) 77#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 47)
84 78
85/* ... */ 79/* ... */
86#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50) 80#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h
index 86c0c4435a46..1b77a27badaf 100644
--- a/arch/arm/mach-realview/include/mach/platform.h
+++ b/arch/arm/mach-realview/include/mach/platform.h
@@ -231,12 +231,6 @@
231#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */ 231#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
232#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ 232#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
233 233
234/*
235 * Clean base - dummy
236 *
237 */
238#define CLEAN_BASE REALVIEW_BOOT_ROM_HI
239
240/* 234/*
241 * System controller bit assignment 235 * System controller bit assignment
242 */ 236 */
@@ -249,20 +243,6 @@
249#define REALVIEW_TIMER4_EnSel 21 243#define REALVIEW_TIMER4_EnSel 21
250 244
251 245
252#define MAX_TIMER 2
253#define MAX_PERIOD 699050
254#define TICKS_PER_uSEC 1
255
256/*
257 * These are useconds NOT ticks.
258 *
259 */
260#define mSEC_1 1000
261#define mSEC_5 (mSEC_1 * 5)
262#define mSEC_10 (mSEC_1 * 10)
263#define mSEC_25 (mSEC_1 * 25)
264#define SEC_1 (mSEC_1 * 1000)
265
266#define REALVIEW_CSR_BASE 0x10000000 246#define REALVIEW_CSR_BASE 0x10000000
267#define REALVIEW_CSR_SIZE 0x10000000 247#define REALVIEW_CSR_SIZE 0x10000000
268 248
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 7d857d300558..422ccd70d5f5 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -31,8 +31,8 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/leds.h> 32#include <asm/leds.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/pmu.h>
34#include <asm/hardware/gic.h> 35#include <asm/hardware/gic.h>
35#include <asm/hardware/icst307.h>
36#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
37#include <asm/localtimer.h> 37#include <asm/localtimer.h>
38 38
@@ -44,7 +44,6 @@
44#include <mach/irqs.h> 44#include <mach/irqs.h>
45 45
46#include "core.h" 46#include "core.h"
47#include "clock.h"
48 47
49static struct map_desc realview_eb_io_desc[] __initdata = { 48static struct map_desc realview_eb_io_desc[] __initdata = {
50 { 49 {
@@ -294,6 +293,36 @@ static struct resource realview_eb_isp1761_resources[] = {
294 }, 293 },
295}; 294};
296 295
296static struct resource pmu_resources[] = {
297 [0] = {
298 .start = IRQ_EB11MP_PMU_CPU0,
299 .end = IRQ_EB11MP_PMU_CPU0,
300 .flags = IORESOURCE_IRQ,
301 },
302 [1] = {
303 .start = IRQ_EB11MP_PMU_CPU1,
304 .end = IRQ_EB11MP_PMU_CPU1,
305 .flags = IORESOURCE_IRQ,
306 },
307 [2] = {
308 .start = IRQ_EB11MP_PMU_CPU2,
309 .end = IRQ_EB11MP_PMU_CPU2,
310 .flags = IORESOURCE_IRQ,
311 },
312 [3] = {
313 .start = IRQ_EB11MP_PMU_CPU3,
314 .end = IRQ_EB11MP_PMU_CPU3,
315 .flags = IORESOURCE_IRQ,
316 },
317};
318
319static struct platform_device pmu_device = {
320 .name = "arm-pmu",
321 .id = ARM_PMU_DEVICE_CPU,
322 .num_resources = ARRAY_SIZE(pmu_resources),
323 .resource = pmu_resources,
324};
325
297static void __init gic_init_irq(void) 326static void __init gic_init_irq(void)
298{ 327{
299 if (core_tile_eb11mp() || core_tile_a9mp()) { 328 if (core_tile_eb11mp() || core_tile_a9mp()) {
@@ -407,6 +436,7 @@ static void __init realview_eb_init(void)
407 * Bits: .... ...0 0111 1001 0000 .... .... .... */ 436 * Bits: .... ...0 0111 1001 0000 .... .... .... */
408 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff); 437 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
409#endif 438#endif
439 platform_device_register(&pmu_device);
410 } 440 }
411 441
412 realview_flash_register(&realview_eb_flash_resource, 1); 442 realview_flash_register(&realview_eb_flash_resource, 1);
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 44392e51dd50..96568ebfa2bb 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -31,8 +31,8 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/leds.h> 32#include <asm/leds.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/pmu.h>
34#include <asm/hardware/gic.h> 35#include <asm/hardware/gic.h>
35#include <asm/hardware/icst307.h>
36#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
37 37
38#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
@@ -44,7 +44,6 @@
44#include <mach/irqs.h> 44#include <mach/irqs.h>
45 45
46#include "core.h" 46#include "core.h"
47#include "clock.h"
48 47
49static struct map_desc realview_pb1176_io_desc[] __initdata = { 48static struct map_desc realview_pb1176_io_desc[] __initdata = {
50 { 49 {
@@ -263,6 +262,19 @@ static struct resource realview_pb1176_isp1761_resources[] = {
263 }, 262 },
264}; 263};
265 264
265static struct resource pmu_resource = {
266 .start = IRQ_DC1176_CORE_PMU,
267 .end = IRQ_DC1176_CORE_PMU,
268 .flags = IORESOURCE_IRQ,
269};
270
271static struct platform_device pmu_device = {
272 .name = "arm-pmu",
273 .id = ARM_PMU_DEVICE_CPU,
274 .num_resources = 1,
275 .resource = &pmu_resource,
276};
277
266static void __init gic_init_irq(void) 278static void __init gic_init_irq(void)
267{ 279{
268 /* ARM1176 DevChip GIC, primary */ 280 /* ARM1176 DevChip GIC, primary */
@@ -324,6 +336,7 @@ static void __init realview_pb1176_init(void)
324 realview_eth_register(NULL, realview_pb1176_smsc911x_resources); 336 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
325 platform_device_register(&realview_i2c_device); 337 platform_device_register(&realview_i2c_device);
326 realview_usb_register(realview_pb1176_isp1761_resources); 338 realview_usb_register(realview_pb1176_isp1761_resources);
339 platform_device_register(&pmu_device);
327 340
328 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 341 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
329 struct amba_device *d = amba_devs[i]; 342 struct amba_device *d = amba_devs[i];
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 3e02731af959..7fbefbbebaf0 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -31,8 +31,8 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/leds.h> 32#include <asm/leds.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/pmu.h>
34#include <asm/hardware/gic.h> 35#include <asm/hardware/gic.h>
35#include <asm/hardware/icst307.h>
36#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
37#include <asm/localtimer.h> 37#include <asm/localtimer.h>
38 38
@@ -45,7 +45,6 @@
45#include <mach/irqs.h> 45#include <mach/irqs.h>
46 46
47#include "core.h" 47#include "core.h"
48#include "clock.h"
49 48
50static struct map_desc realview_pb11mp_io_desc[] __initdata = { 49static struct map_desc realview_pb11mp_io_desc[] __initdata = {
51 { 50 {
@@ -260,6 +259,36 @@ static struct resource realview_pb11mp_isp1761_resources[] = {
260 }, 259 },
261}; 260};
262 261
262static struct resource pmu_resources[] = {
263 [0] = {
264 .start = IRQ_TC11MP_PMU_CPU0,
265 .end = IRQ_TC11MP_PMU_CPU0,
266 .flags = IORESOURCE_IRQ,
267 },
268 [1] = {
269 .start = IRQ_TC11MP_PMU_CPU1,
270 .end = IRQ_TC11MP_PMU_CPU1,
271 .flags = IORESOURCE_IRQ,
272 },
273 [2] = {
274 .start = IRQ_TC11MP_PMU_CPU2,
275 .end = IRQ_TC11MP_PMU_CPU2,
276 .flags = IORESOURCE_IRQ,
277 },
278 [3] = {
279 .start = IRQ_TC11MP_PMU_CPU3,
280 .end = IRQ_TC11MP_PMU_CPU3,
281 .flags = IORESOURCE_IRQ,
282 },
283};
284
285static struct platform_device pmu_device = {
286 .name = "arm-pmu",
287 .id = ARM_PMU_DEVICE_CPU,
288 .num_resources = ARRAY_SIZE(pmu_resources),
289 .resource = pmu_resources,
290};
291
263static void __init gic_init_irq(void) 292static void __init gic_init_irq(void)
264{ 293{
265 unsigned int pldctrl; 294 unsigned int pldctrl;
@@ -329,6 +358,7 @@ static void __init realview_pb11mp_init(void)
329 platform_device_register(&realview_i2c_device); 358 platform_device_register(&realview_i2c_device);
330 platform_device_register(&realview_cf_device); 359 platform_device_register(&realview_cf_device);
331 realview_usb_register(realview_pb11mp_isp1761_resources); 360 realview_usb_register(realview_pb11mp_isp1761_resources);
361 platform_device_register(&pmu_device);
332 362
333 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 363 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
334 struct amba_device *d = amba_devs[i]; 364 struct amba_device *d = amba_devs[i];
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index fe4e25c4201a..d3c113b3dfce 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -30,8 +30,8 @@
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/leds.h> 31#include <asm/leds.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33#include <asm/pmu.h>
33#include <asm/hardware/gic.h> 34#include <asm/hardware/gic.h>
34#include <asm/hardware/icst307.h>
35 35
36#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
37#include <asm/mach/map.h> 37#include <asm/mach/map.h>
@@ -42,7 +42,6 @@
42#include <mach/irqs.h> 42#include <mach/irqs.h>
43 43
44#include "core.h" 44#include "core.h"
45#include "clock.h"
46 45
47static struct map_desc realview_pba8_io_desc[] __initdata = { 46static struct map_desc realview_pba8_io_desc[] __initdata = {
48 { 47 {
@@ -250,6 +249,19 @@ static struct resource realview_pba8_isp1761_resources[] = {
250 }, 249 },
251}; 250};
252 251
252static struct resource pmu_resource = {
253 .start = IRQ_PBA8_PMU,
254 .end = IRQ_PBA8_PMU,
255 .flags = IORESOURCE_IRQ,
256};
257
258static struct platform_device pmu_device = {
259 .name = "arm-pmu",
260 .id = ARM_PMU_DEVICE_CPU,
261 .num_resources = 1,
262 .resource = &pmu_resource,
263};
264
253static void __init gic_init_irq(void) 265static void __init gic_init_irq(void)
254{ 266{
255 /* ARM PB-A8 on-board GIC */ 267 /* ARM PB-A8 on-board GIC */
@@ -296,6 +308,7 @@ static void __init realview_pba8_init(void)
296 platform_device_register(&realview_i2c_device); 308 platform_device_register(&realview_i2c_device);
297 platform_device_register(&realview_cf_device); 309 platform_device_register(&realview_cf_device);
298 realview_usb_register(realview_pba8_isp1761_resources); 310 realview_usb_register(realview_pba8_isp1761_resources);
311 platform_device_register(&pmu_device);
299 312
300 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 313 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
301 struct amba_device *d = amba_devs[i]; 314 struct amba_device *d = amba_devs[i];
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index d94857eb0690..a235ba30996b 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -29,6 +29,7 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/leds.h> 30#include <asm/leds.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/pmu.h>
32#include <asm/smp_twd.h> 33#include <asm/smp_twd.h>
33#include <asm/hardware/gic.h> 34#include <asm/hardware/gic.h>
34#include <asm/hardware/cache-l2x0.h> 35#include <asm/hardware/cache-l2x0.h>
@@ -270,6 +271,36 @@ static struct resource realview_pbx_isp1761_resources[] = {
270 }, 271 },
271}; 272};
272 273
274static struct resource pmu_resources[] = {
275 [0] = {
276 .start = IRQ_PBX_PMU_CPU0,
277 .end = IRQ_PBX_PMU_CPU0,
278 .flags = IORESOURCE_IRQ,
279 },
280 [1] = {
281 .start = IRQ_PBX_PMU_CPU1,
282 .end = IRQ_PBX_PMU_CPU1,
283 .flags = IORESOURCE_IRQ,
284 },
285 [2] = {
286 .start = IRQ_PBX_PMU_CPU2,
287 .end = IRQ_PBX_PMU_CPU2,
288 .flags = IORESOURCE_IRQ,
289 },
290 [3] = {
291 .start = IRQ_PBX_PMU_CPU3,
292 .end = IRQ_PBX_PMU_CPU3,
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297static struct platform_device pmu_device = {
298 .name = "arm-pmu",
299 .id = ARM_PMU_DEVICE_CPU,
300 .num_resources = ARRAY_SIZE(pmu_resources),
301 .resource = pmu_resources,
302};
303
273static void __init gic_init_irq(void) 304static void __init gic_init_irq(void)
274{ 305{
275 /* ARM PBX on-board GIC */ 306 /* ARM PBX on-board GIC */
@@ -354,6 +385,7 @@ static void __init realview_pbx_init(void)
354 /* 16KB way size, 8-way associativity, parity disabled 385 /* 16KB way size, 8-way associativity, parity disabled
355 * Bits: .. 0 0 0 0 1 00 1 0 1 001 0 000 0 .... .... .... */ 386 * Bits: .. 0 0 0 0 1 00 1 0 1 001 0 000 0 .... .... .... */
356 l2x0_init(l2x0_base, 0x02520000, 0xc0000fff); 387 l2x0_init(l2x0_base, 0x02520000, 0xc0000fff);
388 platform_device_register(&pmu_device);
357 } 389 }
358#endif 390#endif
359 391
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 554731868b07..7245a55795dc 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -6,6 +6,7 @@ config CPU_S3C2410
6 bool 6 bool
7 depends on ARCH_S3C2410 7 depends on ARCH_S3C2410
8 select CPU_ARM920T 8 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP
9 select S3C2410_CLOCK 10 select S3C2410_CLOCK
10 select S3C2410_GPIO 11 select S3C2410_GPIO
11 select CPU_LLSERIAL_S3C2410 12 select CPU_LLSERIAL_S3C2410
@@ -76,6 +77,7 @@ config ARCH_H1940
76 select PM_H1940 if PM 77 select PM_H1940 if PM
77 select S3C_DEV_USB_HOST 78 select S3C_DEV_USB_HOST
78 select S3C_DEV_NAND 79 select S3C_DEV_NAND
80 select S3C2410_SETUP_TS
79 help 81 help
80 Say Y here if you are using the HP IPAQ H1940 82 Say Y here if you are using the HP IPAQ H1940
81 83
@@ -95,12 +97,19 @@ config PM_H1940
95config MACH_N30 97config MACH_N30
96 bool "Acer N30 family" 98 bool "Acer N30 family"
97 select CPU_S3C2410 99 select CPU_S3C2410
100 select MACH_N35
98 select S3C_DEV_USB_HOST 101 select S3C_DEV_USB_HOST
99 select S3C_DEV_NAND 102 select S3C_DEV_NAND
100 help 103 help
101 Say Y here if you want suppt for the Acer N30, Acer N35, 104 Say Y here if you want suppt for the Acer N30, Acer N35,
102 Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs. 105 Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs.
103 106
107config MACH_N35
108 bool
109 help
110 Internal node in order to enable support for Acer N35 if Acer N30 is
111 selected.
112
104config ARCH_BAST 113config ARCH_BAST
105 bool "Simtec Electronics BAST (EB2410ITX)" 114 bool "Simtec Electronics BAST (EB2410ITX)"
106 select CPU_S3C2410 115 select CPU_S3C2410
@@ -110,6 +119,7 @@ config ARCH_BAST
110 select MACH_BAST_IDE 119 select MACH_BAST_IDE
111 select S3C24XX_DCLK 120 select S3C24XX_DCLK
112 select ISA 121 select ISA
122 select S3C_DEV_HWMON
113 select S3C_DEV_USB_HOST 123 select S3C_DEV_USB_HOST
114 select S3C_DEV_NAND 124 select S3C_DEV_NAND
115 help 125 help
diff --git a/arch/arm/mach-s3c2410/Makefile.boot b/arch/arm/mach-s3c2410/Makefile.boot
index 7dab2a0325b5..58c1dd7f8e1d 100644
--- a/arch/arm/mach-s3c2410/Makefile.boot
+++ b/arch/arm/mach-s3c2410/Makefile.boot
@@ -1,3 +1,7 @@
1 zreladdr-y := 0x30008000 1ifeq ($(CONFIG_PM_H1940),y)
2params_phys-y := 0x30000100 2 zreladdr-y := 0x30108000
3 3 params_phys-y := 0x30100100
4else
5 zreladdr-y := 0x30008000
6 params_phys-y := 0x30000100
7endif
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c
index a3f3c7b1ca38..8cdeb14af592 100644
--- a/arch/arm/mach-s3c2410/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c
@@ -33,14 +33,15 @@ static void h1940bt_enable(int on)
33 h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); 33 h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER);
34 /* Reset the chip */ 34 /* Reset the chip */
35 mdelay(10); 35 mdelay(10);
36 s3c2410_gpio_setpin(S3C2410_GPH(1), 1); 36
37 gpio_set_value(S3C2410_GPH(1), 1);
37 mdelay(10); 38 mdelay(10);
38 s3c2410_gpio_setpin(S3C2410_GPH(1), 0); 39 gpio_set_value(S3C2410_GPH(1), 0);
39 } 40 }
40 else { 41 else {
41 s3c2410_gpio_setpin(S3C2410_GPH(1), 1); 42 gpio_set_value(S3C2410_GPH(1), 1);
42 mdelay(10); 43 mdelay(10);
43 s3c2410_gpio_setpin(S3C2410_GPH(1), 0); 44 gpio_set_value(S3C2410_GPH(1), 0);
44 mdelay(10); 45 mdelay(10);
45 h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); 46 h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0);
46 } 47 }
@@ -61,15 +62,21 @@ static int __devinit h1940bt_probe(struct platform_device *pdev)
61 struct rfkill *rfk; 62 struct rfkill *rfk;
62 int ret = 0; 63 int ret = 0;
63 64
65 ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev));
66 if (ret) {
67 dev_err(&pdev->dev, "could not get GPH1\n");\
68 return ret;
69 }
70
64 /* Configures BT serial port GPIOs */ 71 /* Configures BT serial port GPIOs */
65 s3c2410_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); 72 s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0);
66 s3c2410_gpio_pullup(S3C2410_GPH(0), 1); 73 s3c_gpio_cfgpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE);
67 s3c2410_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); 74 s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT);
68 s3c2410_gpio_pullup(S3C2410_GPH(1), 1); 75 s3c_gpio_cfgpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE);
69 s3c2410_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); 76 s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0);
70 s3c2410_gpio_pullup(S3C2410_GPH(2), 1); 77 s3c_gpio_cfgpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE);
71 s3c2410_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); 78 s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0);
72 s3c2410_gpio_pullup(S3C2410_GPH(3), 1); 79 s3c_gpio_cfgpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE);
73 80
74 81
75 rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, 82 rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH,
@@ -100,6 +107,7 @@ static int h1940bt_remove(struct platform_device *pdev)
100 struct rfkill *rfk = platform_get_drvdata(pdev); 107 struct rfkill *rfk = platform_get_drvdata(pdev);
101 108
102 platform_set_drvdata(pdev, NULL); 109 platform_set_drvdata(pdev, NULL);
110 gpio_free(S3C2410_GPH(1));
103 111
104 if (rfk) { 112 if (rfk) {
105 rfkill_unregister(rfk); 113 rfkill_unregister(rfk);
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index 08ac5f96c012..cf68136cc668 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -54,7 +54,7 @@ enum dma_ch {
54#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ 54#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
55 55
56/* we have 4 dma channels */ 56/* we have 4 dma channels */
57#ifndef CONFIG_CPU_S3C2443 57#if !defined(CONFIG_CPU_S3C2443) && !defined(CONFIG_CPU_S3C2416)
58#define S3C_DMA_CHANNELS (4) 58#define S3C_DMA_CHANNELS (4)
59#else 59#else
60#define S3C_DMA_CHANNELS (6) 60#define S3C_DMA_CHANNELS (6)
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
index 035a493952db..f453c4f2cb8e 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
@@ -10,14 +10,28 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#ifndef __MACH_GPIO_FNS_H
14#define __MACH_GPIO_FNS_H __FILE__
15
13/* These functions are in the to-be-removed category and it is strongly 16/* These functions are in the to-be-removed category and it is strongly
14 * encouraged not to use these in new code. They will be marked deprecated 17 * encouraged not to use these in new code. They will be marked deprecated
15 * very soon. 18 * very soon.
16 * 19 *
17 * Most of the functionality can be either replaced by the gpiocfg calls 20 * Most of the functionality can be either replaced by the gpiocfg calls
18 * for the s3c platform or by the generic GPIOlib API. 21 * for the s3c platform or by the generic GPIOlib API.
22 *
23 * As of 2.6.35-rc, these will be removed, with the few drivers using them
24 * either replaced or given a wrapper until the calls can be removed.
19*/ 25*/
20 26
27#include <plat/gpio-cfg.h>
28
29static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg)
30{
31 /* 1:1 mapping between cfgpin and setcfg calls at the moment */
32 s3c_gpio_cfgpin(pin, cfg);
33}
34
21/* external functions for GPIO support 35/* external functions for GPIO support
22 * 36 *
23 * These allow various different clients to access the same GPIO 37 * These allow various different clients to access the same GPIO
@@ -25,17 +39,6 @@
25 * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. 39 * GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
26*/ 40*/
27 41
28/* s3c2410_gpio_cfgpin
29 *
30 * set the configuration of the given pin to the value passed.
31 *
32 * eg:
33 * s3c2410_gpio_cfgpin(S3C2410_GPA(0), S3C2410_GPA0_ADDR0);
34 * s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1);
35*/
36
37extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
38
39extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); 42extern unsigned int s3c2410_gpio_getcfg(unsigned int pin);
40 43
41/* s3c2410_gpio_getirq 44/* s3c2410_gpio_getirq
@@ -73,6 +76,14 @@ extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
73 76
74/* s3c2410_gpio_pullup 77/* s3c2410_gpio_pullup
75 * 78 *
79 * This call should be replaced with s3c_gpio_setpull().
80 *
81 * As a note, there is currently no distinction between pull-up and pull-down
82 * in the s3c24xx series devices with only an on/off configuration.
83 */
84
85/* s3c2410_gpio_pullup
86 *
76 * configure the pull-up control on the given pin 87 * configure the pull-up control on the given pin
77 * 88 *
78 * to = 1 => disable the pull-up 89 * to = 1 => disable the pull-up
@@ -86,18 +97,8 @@ extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
86 97
87extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); 98extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
88 99
89/* s3c2410_gpio_getpull
90 *
91 * Read the state of the pull-up on a given pin
92 *
93 * return:
94 * < 0 => error code
95 * 0 => enabled
96 * 1 => disabled
97*/
98
99extern int s3c2410_gpio_getpull(unsigned int pin);
100
101extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); 100extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
102 101
103extern unsigned int s3c2410_gpio_getpin(unsigned int pin); 102extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
103
104#endif /* __MACH_GPIO_FNS_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
index 2edbb9c88ab3..4f7bf3272e87 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
@@ -16,15 +16,28 @@
16 16
17#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) 17#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
18 18
19#define S3C2410_GPIO_BANKA (32*0)
20#define S3C2410_GPIO_BANKB (32*1)
21#define S3C2410_GPIO_BANKC (32*2)
22#define S3C2410_GPIO_BANKD (32*3)
23#define S3C2410_GPIO_BANKE (32*4)
24#define S3C2410_GPIO_BANKF (32*5)
25#define S3C2410_GPIO_BANKG (32*6) 19#define S3C2410_GPIO_BANKG (32*6)
26#define S3C2410_GPIO_BANKH (32*7) 20#define S3C2410_GPIO_BANKH (32*7)
27 21
22/* GPIO sizes for various SoCs:
23 *
24 * 2442
25 * 2410 2412 2440 2443 2416
26 * ---- ---- ---- ---- ----
27 * A 23 22 25 16 25
28 * B 11 11 11 11 9
29 * C 16 15 16 16 16
30 * D 16 16 16 16 16
31 * E 16 16 16 16 16
32 * F 8 8 8 8 8
33 * G 16 16 16 16 8
34 * H 11 11 9 15 15
35 * J -- -- 13 16 --
36 * K -- -- -- -- 16
37 * L -- -- -- 15 7
38 * M -- -- -- 2 2
39 */
40
28/* GPIO bank sizes */ 41/* GPIO bank sizes */
29#define S3C2410_GPIO_A_NR (32) 42#define S3C2410_GPIO_A_NR (32)
30#define S3C2410_GPIO_B_NR (32) 43#define S3C2410_GPIO_B_NR (32)
@@ -34,6 +47,10 @@
34#define S3C2410_GPIO_F_NR (32) 47#define S3C2410_GPIO_F_NR (32)
35#define S3C2410_GPIO_G_NR (32) 48#define S3C2410_GPIO_G_NR (32)
36#define S3C2410_GPIO_H_NR (32) 49#define S3C2410_GPIO_H_NR (32)
50#define S3C2410_GPIO_J_NR (32) /* technically 16. */
51#define S3C2410_GPIO_K_NR (32) /* technically 16. */
52#define S3C2410_GPIO_L_NR (32) /* technically 15. */
53#define S3C2410_GPIO_M_NR (32) /* technically 2. */
37 54
38#if CONFIG_S3C_GPIO_SPACE != 0 55#if CONFIG_S3C_GPIO_SPACE != 0
39#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment 56#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
@@ -53,6 +70,10 @@ enum s3c_gpio_number {
53 S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), 70 S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
54 S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), 71 S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
55 S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), 72 S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
73 S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
74 S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
75 S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
76 S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
56}; 77};
57 78
58#endif /* __ASSEMBLY__ */ 79#endif /* __ASSEMBLY__ */
@@ -67,6 +88,10 @@ enum s3c_gpio_number {
67#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) 88#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
68#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) 89#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
69#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) 90#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
91#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
92#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
93#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
94#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
70 95
71/* compatibility until drivers can be modified */ 96/* compatibility until drivers can be modified */
72 97
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-track.h b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
index acb259103808..d67819dde42a 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-track.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
@@ -23,11 +23,11 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin)
23{ 23{
24 struct s3c_gpio_chip *chip; 24 struct s3c_gpio_chip *chip;
25 25
26 if (pin > S3C2410_GPG(10)) 26 if (pin > S3C_GPIO_END)
27 return NULL; 27 return NULL;
28 28
29 chip = &s3c24xx_gpios[pin/32]; 29 chip = &s3c24xx_gpios[pin/32];
30 return (S3C2410_GPIO_OFFSET(pin) < chip->chip.ngpio) ? chip : NULL; 30 return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
31} 31}
32 32
33#endif /* __ASM_ARCH_GPIO_CORE_H */ 33#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c2410/include/mach/gpio.h
index 15f0b3e7ce69..b649bf2ccd5c 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio.h
@@ -20,10 +20,18 @@
20 * devices that need GPIO. 20 * devices that need GPIO.
21 */ 21 */
22 22
23#ifdef CONFIG_CPU_S3C244X
24#define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA)
25#else
23#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) 26#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA)
27#endif
24 28
25#include <asm-generic/gpio.h> 29#include <asm-generic/gpio.h>
26#include <mach/gpio-nrs.h> 30#include <mach/gpio-nrs.h>
27#include <mach/gpio-fns.h> 31#include <mach/gpio-fns.h>
28 32
33#ifdef CONFIG_CPU_S3C24XX
34#define S3C_GPIO_END (S3C2410_GPIO_BANKJ + 32)
35#else
29#define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32) 36#define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32)
37#endif
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h
index 6c12c6312ad8..11bb0f08fe6a 100644
--- a/arch/arm/mach-s3c2410/include/mach/irqs.h
+++ b/arch/arm/mach-s3c2410/include/mach/irqs.h
@@ -115,6 +115,26 @@
115#define IRQ_S3C2412_SDI S3C2410_IRQSUB(13) 115#define IRQ_S3C2412_SDI S3C2410_IRQSUB(13)
116#define IRQ_S3C2412_CF S3C2410_IRQSUB(14) 116#define IRQ_S3C2412_CF S3C2410_IRQSUB(14)
117 117
118
119#define IRQ_S3C2416_EINT8t15 S3C2410_IRQ(5)
120#define IRQ_S3C2416_DMA S3C2410_IRQ(17)
121#define IRQ_S3C2416_UART3 S3C2410_IRQ(18)
122#define IRQ_S3C2416_SDI1 S3C2410_IRQ(20)
123#define IRQ_S3C2416_SDI0 S3C2410_IRQ(21)
124
125#define IRQ_S3C2416_LCD2 S3C2410_IRQSUB(15)
126#define IRQ_S3C2416_LCD3 S3C2410_IRQSUB(16)
127#define IRQ_S3C2416_LCD4 S3C2410_IRQSUB(17)
128#define IRQ_S3C2416_DMA0 S3C2410_IRQSUB(18)
129#define IRQ_S3C2416_DMA1 S3C2410_IRQSUB(19)
130#define IRQ_S3C2416_DMA2 S3C2410_IRQSUB(20)
131#define IRQ_S3C2416_DMA3 S3C2410_IRQSUB(21)
132#define IRQ_S3C2416_DMA4 S3C2410_IRQSUB(22)
133#define IRQ_S3C2416_DMA5 S3C2410_IRQSUB(23)
134#define IRQ_S32416_WDT S3C2410_IRQSUB(27)
135#define IRQ_S32416_AC97 S3C2410_IRQSUB(28)
136
137
118/* extra irqs for s3c2440 */ 138/* extra irqs for s3c2440 */
119 139
120#define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */ 140#define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */
@@ -130,7 +150,10 @@
130#define IRQ_S3C2443_HSMMC S3C2410_IRQ(20) /* IRQ_SDI */ 150#define IRQ_S3C2443_HSMMC S3C2410_IRQ(20) /* IRQ_SDI */
131#define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */ 151#define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */
132 152
153#define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */
154
133#define IRQ_HSMMC0 IRQ_S3C2443_HSMMC 155#define IRQ_HSMMC0 IRQ_S3C2443_HSMMC
156#define IRQ_HSMMC1 IRQ_S3C2416_HSMMC0
134 157
135#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) 158#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14)
136#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) 159#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15)
@@ -152,7 +175,7 @@
152#define IRQ_S3C2443_WDT S3C2410_IRQSUB(27) 175#define IRQ_S3C2443_WDT S3C2410_IRQSUB(27)
153#define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28) 176#define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28)
154 177
155#ifdef CONFIG_CPU_S3C2443 178#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
156#define NR_IRQS (IRQ_S3C2443_AC97+1) 179#define NR_IRQS (IRQ_S3C2443_AC97+1)
157#else 180#else
158#define NR_IRQS (IRQ_S3C2440_AC97+1) 181#define NR_IRQS (IRQ_S3C2440_AC97+1)
@@ -164,6 +187,9 @@
164#define IRQ_S3CUART_TX3 IRQ_S3C2443_TX3 187#define IRQ_S3CUART_TX3 IRQ_S3C2443_TX3
165#define IRQ_S3CUART_ERR3 IRQ_S3C2443_ERR3 188#define IRQ_S3CUART_ERR3 IRQ_S3C2443_ERR3
166 189
190#define IRQ_LCD_VSYNC IRQ_S3C2443_LCD3
191#define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2
192
167#ifdef CONFIG_CPU_S3C2440 193#ifdef CONFIG_CPU_S3C2440
168#define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97 194#define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97
169#else 195#else
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index b049e61460b6..091c98a639d9 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -63,9 +63,11 @@
63#define S3C2440_PA_AC97 (0x5B000000) 63#define S3C2440_PA_AC97 (0x5B000000)
64#define S3C2440_SZ_AC97 SZ_1M 64#define S3C2440_SZ_AC97 SZ_1M
65 65
66/* S3C2443 High-speed SD/MMC */ 66/* S3C2443/S3C2416 High-speed SD/MMC */
67#define S3C2443_PA_HSMMC (0x4A800000) 67#define S3C2443_PA_HSMMC (0x4A800000)
68#define S3C2443_SZ_HSMMC (256) 68#define S3C2416_PA_HSMMC0 (0x4AC00000)
69
70#define S3C2443_PA_FB (0x4C800000)
69 71
70/* S3C2412 memory and IO controls */ 72/* S3C2412 memory and IO controls */
71#define S3C2412_PA_SSMC (0x4F000000) 73#define S3C2412_PA_SSMC (0x4F000000)
@@ -106,10 +108,12 @@
106#define S3C24XX_PA_SDI S3C2410_PA_SDI 108#define S3C24XX_PA_SDI S3C2410_PA_SDI
107#define S3C24XX_PA_NAND S3C2410_PA_NAND 109#define S3C24XX_PA_NAND S3C2410_PA_NAND
108 110
111#define S3C_PA_FB S3C2443_PA_FB
109#define S3C_PA_IIC S3C2410_PA_IIC 112#define S3C_PA_IIC S3C2410_PA_IIC
110#define S3C_PA_UART S3C24XX_PA_UART 113#define S3C_PA_UART S3C24XX_PA_UART
111#define S3C_PA_USBHOST S3C2410_PA_USBHOST 114#define S3C_PA_USBHOST S3C2410_PA_USBHOST
112#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC 115#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC
116#define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0
113#define S3C_PA_NAND S3C24XX_PA_NAND 117#define S3C_PA_NAND S3C24XX_PA_NAND
114 118
115#endif /* __ASM_ARCH_MAP_H */ 119#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
index 9a0d169be137..3415b60082d7 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
@@ -161,4 +161,6 @@
161 161
162#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */ 162#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */
163 163
164#define S3C2416_CLKDIV2 S3C2410_CLKREG(0x28)
165
164#endif /* __ASM_ARM_REGS_CLOCK */ 166#endif /* __ASM_ARM_REGS_CLOCK */
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-dsc.h b/arch/arm/mach-s3c2410/include/mach/regs-dsc.h
index 3c3853cd3cf7..98fd4a05587c 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-dsc.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-dsc.h
@@ -19,6 +19,42 @@
19#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) 19#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0)
20#endif 20#endif
21 21
22#if defined(CONFIG_CPU_S3C2416)
23#define S3C2416_DSC0 S3C2410_GPIOREG(0xc0)
24#define S3C2416_DSC1 S3C2410_GPIOREG(0xc4)
25#define S3C2416_DSC2 S3C2410_GPIOREG(0xc8)
26#define S3C2416_DSC3 S3C2410_GPIOREG(0x110)
27
28#define S3C2416_SELECT_DSC0 (0 << 30)
29#define S3C2416_SELECT_DSC1 (1 << 30)
30#define S3C2416_SELECT_DSC2 (2 << 30)
31#define S3C2416_SELECT_DSC3 (3 << 30)
32
33#define S3C2416_DSC_GETSHIFT(x) (x & 30)
34
35#define S3C2416_DSC0_CF (S3C2416_SELECT_DSC0 | 28)
36#define S3C2416_DSC0_CF_5mA (0 << 28)
37#define S3C2416_DSC0_CF_10mA (1 << 28)
38#define S3C2416_DSC0_CF_15mA (2 << 28)
39#define S3C2416_DSC0_CF_21mA (3 << 28)
40#define S3C2416_DSC0_CF_MASK (3 << 28)
41
42#define S3C2416_DSC0_nRBE (S3C2416_SELECT_DSC0 | 26)
43#define S3C2416_DSC0_nRBE_5mA (0 << 26)
44#define S3C2416_DSC0_nRBE_10mA (1 << 26)
45#define S3C2416_DSC0_nRBE_15mA (2 << 26)
46#define S3C2416_DSC0_nRBE_21mA (3 << 26)
47#define S3C2416_DSC0_nRBE_MASK (3 << 26)
48
49#define S3C2416_DSC0_nROE (S3C2416_SELECT_DSC0 | 24)
50#define S3C2416_DSC0_nROE_5mA (0 << 24)
51#define S3C2416_DSC0_nROE_10mA (1 << 24)
52#define S3C2416_DSC0_nROE_15mA (2 << 24)
53#define S3C2416_DSC0_nROE_21mA (3 << 24)
54#define S3C2416_DSC0_nROE_MASK (3 << 24)
55
56#endif
57
22#if defined(CONFIG_CPU_S3C244X) 58#if defined(CONFIG_CPU_S3C244X)
23 59
24#define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) 60#define S3C2440_DSC0 S3C2410_GPIOREG(0xc4)
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index fd672f330bf2..a0a89d429296 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -17,29 +17,11 @@
17#include <mach/gpio-nrs.h> 17#include <mach/gpio-nrs.h>
18 18
19#ifdef CONFIG_CPU_S3C2400 19#ifdef CONFIG_CPU_S3C2400
20#define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) 20#define S3C24XX_MISCCR S3C2400_MISCCR
21#define S3C24XX_MISCCR S3C2400_MISCCR
22#else 21#else
23#define S3C24XX_GPIO_BASE(x) S3C2410_GPIO_BASE(x) 22#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80)
24#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80)
25#endif /* CONFIG_CPU_S3C2400 */ 23#endif /* CONFIG_CPU_S3C2400 */
26 24
27
28/* S3C2400 doesn't have a 1:1 mapping to S3C2410 gpio base pins */
29
30#define S3C2400_BANKNUM(pin) (((pin) & ~31) / 32)
31#define S3C2400_BASEA2B(pin) ((((pin) & ~31) >> 2))
32#define S3C2400_BASEC2H(pin) ((S3C2400_BANKNUM(pin) * 10) + \
33 (2 * (S3C2400_BANKNUM(pin)-2)))
34
35#define S3C2400_GPIO_BASE(pin) (pin < S3C2410_GPIO_BANKC ? \
36 S3C2400_BASEA2B(pin)+S3C24XX_VA_GPIO : \
37 S3C2400_BASEC2H(pin)+S3C24XX_VA_GPIO)
38
39
40#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO)
41#define S3C2410_GPIO_OFFSET(pin) ((pin) & 31)
42
43/* general configuration options */ 25/* general configuration options */
44 26
45#define S3C2410_GPIO_LEAVE (0xFFFFFFFF) 27#define S3C2410_GPIO_LEAVE (0xFFFFFFFF)
@@ -610,35 +592,73 @@
610#define S3C2410_GPHUP S3C2410_GPIOREG(0x78) 592#define S3C2410_GPHUP S3C2410_GPIOREG(0x78)
611 593
612#define S3C2410_GPH0_nCTS0 (0x02 << 0) 594#define S3C2410_GPH0_nCTS0 (0x02 << 0)
595#define S3C2416_GPH0_TXD0 (0x02 << 0)
613 596
614#define S3C2410_GPH1_nRTS0 (0x02 << 2) 597#define S3C2410_GPH1_nRTS0 (0x02 << 2)
598#define S3C2416_GPH1_RXD0 (0x02 << 2)
615 599
616#define S3C2410_GPH2_TXD0 (0x02 << 4) 600#define S3C2410_GPH2_TXD0 (0x02 << 4)
601#define S3C2416_GPH2_TXD1 (0x02 << 4)
617 602
618#define S3C2410_GPH3_RXD0 (0x02 << 6) 603#define S3C2410_GPH3_RXD0 (0x02 << 6)
604#define S3C2416_GPH3_RXD1 (0x02 << 6)
619 605
620#define S3C2410_GPH4_TXD1 (0x02 << 8) 606#define S3C2410_GPH4_TXD1 (0x02 << 8)
607#define S3C2416_GPH4_TXD2 (0x02 << 8)
621 608
622#define S3C2410_GPH5_RXD1 (0x02 << 10) 609#define S3C2410_GPH5_RXD1 (0x02 << 10)
610#define S3C2416_GPH5_RXD2 (0x02 << 10)
623 611
624#define S3C2410_GPH6_TXD2 (0x02 << 12) 612#define S3C2410_GPH6_TXD2 (0x02 << 12)
613#define S3C2416_GPH6_TXD3 (0x02 << 12)
625#define S3C2410_GPH6_nRTS1 (0x03 << 12) 614#define S3C2410_GPH6_nRTS1 (0x03 << 12)
615#define S3C2416_GPH6_nRTS2 (0x03 << 12)
626 616
627#define S3C2410_GPH7_RXD2 (0x02 << 14) 617#define S3C2410_GPH7_RXD2 (0x02 << 14)
618#define S3C2416_GPH7_RXD3 (0x02 << 14)
628#define S3C2410_GPH7_nCTS1 (0x03 << 14) 619#define S3C2410_GPH7_nCTS1 (0x03 << 14)
620#define S3C2416_GPH7_nCTS2 (0x03 << 14)
629 621
630#define S3C2410_GPH8_UCLK (0x02 << 16) 622#define S3C2410_GPH8_UCLK (0x02 << 16)
623#define S3C2416_GPH8_nCTS0 (0x02 << 16)
631 624
632#define S3C2410_GPH9_CLKOUT0 (0x02 << 18) 625#define S3C2410_GPH9_CLKOUT0 (0x02 << 18)
633#define S3C2442_GPH9_nSPICS0 (0x03 << 18) 626#define S3C2442_GPH9_nSPICS0 (0x03 << 18)
627#define S3C2416_GPH9_nRTS0 (0x02 << 18)
634 628
635#define S3C2410_GPH10_CLKOUT1 (0x02 << 20) 629#define S3C2410_GPH10_CLKOUT1 (0x02 << 20)
630#define S3C2416_GPH10_nCTS1 (0x02 << 20)
631
632#define S3C2416_GPH11_nRTS1 (0x02 << 22)
633
634#define S3C2416_GPH12_EXTUARTCLK (0x02 << 24)
635
636#define S3C2416_GPH13_CLKOUT0 (0x02 << 26)
637
638#define S3C2416_GPH14_CLKOUT1 (0x02 << 28)
636 639
637/* The S3C2412 and S3C2413 move the GPJ register set to after 640/* The S3C2412 and S3C2413 move the GPJ register set to after
638 * GPH, which means all registers after 0x80 are now offset by 0x10 641 * GPH, which means all registers after 0x80 are now offset by 0x10
639 * for the 2412/2413 from the 2410/2440/2442 642 * for the 2412/2413 from the 2410/2440/2442
640*/ 643*/
641 644
645/* S3C2443 and above */
646#define S3C2440_GPJCON S3C2410_GPIOREG(0xD0)
647#define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4)
648#define S3C2440_GPJUP S3C2410_GPIOREG(0xD8)
649
650#define S3C2443_GPKCON S3C2410_GPIOREG(0xE0)
651#define S3C2443_GPKDAT S3C2410_GPIOREG(0xE4)
652#define S3C2443_GPKUP S3C2410_GPIOREG(0xE8)
653
654#define S3C2443_GPLCON S3C2410_GPIOREG(0xF0)
655#define S3C2443_GPLDAT S3C2410_GPIOREG(0xF4)
656#define S3C2443_GPLUP S3C2410_GPIOREG(0xF8)
657
658#define S3C2443_GPMCON S3C2410_GPIOREG(0x100)
659#define S3C2443_GPMDAT S3C2410_GPIOREG(0x104)
660#define S3C2443_GPMUP S3C2410_GPIOREG(0x108)
661
642/* miscellaneous control */ 662/* miscellaneous control */
643#define S3C2400_MISCCR S3C2410_GPIOREG(0x54) 663#define S3C2400_MISCCR S3C2410_GPIOREG(0x54)
644#define S3C2410_MISCCR S3C2410_GPIOREG(0x80) 664#define S3C2410_MISCCR S3C2410_GPIOREG(0x80)
@@ -686,6 +706,7 @@
686#define S3C2412_MISCCR_CLK1_CLKsrc (0<<8) 706#define S3C2412_MISCCR_CLK1_CLKsrc (0<<8)
687 707
688#define S3C2410_MISCCR_USBSUSPND0 (1<<12) 708#define S3C2410_MISCCR_USBSUSPND0 (1<<12)
709#define S3C2416_MISCCR_SEL_SUSPND (1<<12)
689#define S3C2410_MISCCR_USBSUSPND1 (1<<13) 710#define S3C2410_MISCCR_USBSUSPND1 (1<<13)
690 711
691#define S3C2410_MISCCR_nRSTCON (1<<16) 712#define S3C2410_MISCCR_nRSTCON (1<<16)
@@ -695,6 +716,9 @@
695#define S3C2410_MISCCR_nEN_SCLKE (1<<19) /* not 2412 */ 716#define S3C2410_MISCCR_nEN_SCLKE (1<<19) /* not 2412 */
696#define S3C2410_MISCCR_SDSLEEP (7<<17) 717#define S3C2410_MISCCR_SDSLEEP (7<<17)
697 718
719#define S3C2416_MISCCR_FLT_I2C (1<<24)
720#define S3C2416_MISCCR_HSSPI_EN2 (1<<31)
721
698/* external interrupt control... */ 722/* external interrupt control... */
699/* S3C2410_EXTINT0 -> irq sense control for EINT0..EINT7 723/* S3C2410_EXTINT0 -> irq sense control for EINT0..EINT7
700 * S3C2410_EXTINT1 -> irq sense control for EINT8..EINT15 724 * S3C2410_EXTINT1 -> irq sense control for EINT8..EINT15
@@ -762,8 +786,11 @@
762#define S3C2410_GSTATUS1_IDMASK (0xffff0000) 786#define S3C2410_GSTATUS1_IDMASK (0xffff0000)
763#define S3C2410_GSTATUS1_2410 (0x32410000) 787#define S3C2410_GSTATUS1_2410 (0x32410000)
764#define S3C2410_GSTATUS1_2412 (0x32412001) 788#define S3C2410_GSTATUS1_2412 (0x32412001)
789#define S3C2410_GSTATUS1_2416 (0x32416003)
765#define S3C2410_GSTATUS1_2440 (0x32440000) 790#define S3C2410_GSTATUS1_2440 (0x32440000)
766#define S3C2410_GSTATUS1_2442 (0x32440aaa) 791#define S3C2410_GSTATUS1_2442 (0x32440aaa)
792/* some 2416 CPUs report this value also */
793#define S3C2410_GSTATUS1_2450 (0x32450003)
767 794
768#define S3C2410_GSTATUS2_WTRESET (1<<2) 795#define S3C2410_GSTATUS2_WTRESET (1<<2)
769#define S3C2410_GSTATUS2_OFFRESET (1<<1) 796#define S3C2410_GSTATUS2_OFFRESET (1<<1)
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
index 1202ca5e99f6..19575e061114 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
@@ -22,85 +22,49 @@
22 * pull up works like all other ports. 22 * pull up works like all other ports.
23*/ 23*/
24 24
25#define S3C2440_GPIO_BANKJ (416)
26
27#define S3C2440_GPJCON S3C2410_GPIOREG(0xd0)
28#define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4)
29#define S3C2440_GPJUP S3C2410_GPIOREG(0xd8)
30
31#define S3C2413_GPJCON S3C2410_GPIOREG(0x80) 25#define S3C2413_GPJCON S3C2410_GPIOREG(0x80)
32#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) 26#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84)
33#define S3C2413_GPJUP S3C2410_GPIOREG(0x88) 27#define S3C2413_GPJUP S3C2410_GPIOREG(0x88)
34#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) 28#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C)
35 29
36#define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0)
37#define S3C2440_GPJ0_INP (0x00 << 0)
38#define S3C2440_GPJ0_OUTP (0x01 << 0) 30#define S3C2440_GPJ0_OUTP (0x01 << 0)
39#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) 31#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0)
40 32
41#define S3C2440_GPJ1 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1)
42#define S3C2440_GPJ1_INP (0x00 << 2)
43#define S3C2440_GPJ1_OUTP (0x01 << 2) 33#define S3C2440_GPJ1_OUTP (0x01 << 2)
44#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) 34#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2)
45 35
46#define S3C2440_GPJ2 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2)
47#define S3C2440_GPJ2_INP (0x00 << 4)
48#define S3C2440_GPJ2_OUTP (0x01 << 4) 36#define S3C2440_GPJ2_OUTP (0x01 << 4)
49#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) 37#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4)
50 38
51#define S3C2440_GPJ3 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3)
52#define S3C2440_GPJ3_INP (0x00 << 6)
53#define S3C2440_GPJ3_OUTP (0x01 << 6) 39#define S3C2440_GPJ3_OUTP (0x01 << 6)
54#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) 40#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6)
55 41
56#define S3C2440_GPJ4 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4)
57#define S3C2440_GPJ4_INP (0x00 << 8)
58#define S3C2440_GPJ4_OUTP (0x01 << 8) 42#define S3C2440_GPJ4_OUTP (0x01 << 8)
59#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) 43#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8)
60 44
61#define S3C2440_GPJ5 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5)
62#define S3C2440_GPJ5_INP (0x00 << 10)
63#define S3C2440_GPJ5_OUTP (0x01 << 10) 45#define S3C2440_GPJ5_OUTP (0x01 << 10)
64#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) 46#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10)
65 47
66#define S3C2440_GPJ6 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6)
67#define S3C2440_GPJ6_INP (0x00 << 12)
68#define S3C2440_GPJ6_OUTP (0x01 << 12) 48#define S3C2440_GPJ6_OUTP (0x01 << 12)
69#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) 49#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12)
70 50
71#define S3C2440_GPJ7 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7)
72#define S3C2440_GPJ7_INP (0x00 << 14)
73#define S3C2440_GPJ7_OUTP (0x01 << 14) 51#define S3C2440_GPJ7_OUTP (0x01 << 14)
74#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) 52#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14)
75 53
76#define S3C2440_GPJ8 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8)
77#define S3C2440_GPJ8_INP (0x00 << 16)
78#define S3C2440_GPJ8_OUTP (0x01 << 16) 54#define S3C2440_GPJ8_OUTP (0x01 << 16)
79#define S3C2440_GPJ8_CAMPCLK (0x02 << 16) 55#define S3C2440_GPJ8_CAMPCLK (0x02 << 16)
80 56
81#define S3C2440_GPJ9 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9)
82#define S3C2440_GPJ9_INP (0x00 << 18)
83#define S3C2440_GPJ9_OUTP (0x01 << 18) 57#define S3C2440_GPJ9_OUTP (0x01 << 18)
84#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) 58#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18)
85 59
86#define S3C2440_GPJ10 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10)
87#define S3C2440_GPJ10_INP (0x00 << 20)
88#define S3C2440_GPJ10_OUTP (0x01 << 20) 60#define S3C2440_GPJ10_OUTP (0x01 << 20)
89#define S3C2440_GPJ10_CAMHREF (0x02 << 20) 61#define S3C2440_GPJ10_CAMHREF (0x02 << 20)
90 62
91#define S3C2440_GPJ11 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11)
92#define S3C2440_GPJ11_INP (0x00 << 22)
93#define S3C2440_GPJ11_OUTP (0x01 << 22) 63#define S3C2440_GPJ11_OUTP (0x01 << 22)
94#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) 64#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22)
95 65
96#define S3C2440_GPJ12 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12)
97#define S3C2440_GPJ12_INP (0x00 << 24)
98#define S3C2440_GPJ12_OUTP (0x01 << 24) 66#define S3C2440_GPJ12_OUTP (0x01 << 24)
99#define S3C2440_GPJ12_CAMRESET (0x02 << 24) 67#define S3C2440_GPJ12_CAMRESET (0x02 << 24)
100 68
101#define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13)
102#define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14)
103#define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15)
104
105#endif /* __ASM_ARCH_REGS_GPIOJ_H */ 69#endif /* __ASM_ARCH_REGS_GPIOJ_H */
106 70
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-irq.h b/arch/arm/mach-s3c2410/include/mach/regs-irq.h
index de86ee8812bd..0f07ba30b1fb 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-irq.h
@@ -27,6 +27,16 @@
27#define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018) 27#define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018)
28#define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C) 28#define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C)
29 29
30#define S3C2416_PRIORITY_MODE1 S3C2410_IRQREG(0x030)
31#define S3C2416_PRIORITY_UPDATE1 S3C2410_IRQREG(0x034)
32#define S3C2416_SRCPND2 S3C2410_IRQREG(0x040)
33#define S3C2416_INTMOD2 S3C2410_IRQREG(0x044)
34#define S3C2416_INTMSK2 S3C2410_IRQREG(0x048)
35#define S3C2416_INTPND2 S3C2410_IRQREG(0x050)
36#define S3C2416_INTOFFSET2 S3C2410_IRQREG(0x054)
37#define S3C2416_PRIORITY_MODE2 S3C2410_IRQREG(0x070)
38#define S3C2416_PRIORITY_UPDATE2 S3C2410_IRQREG(0x074)
39
30/* mask: 0=enable, 1=disable 40/* mask: 0=enable, 1=disable
31 * 1 bit EINT, 4=EINT4, 23=EINT23 41 * 1 bit EINT, 4=EINT4, 23=EINT23
32 * EINT0,1,2,3 are not handled here. 42 * EINT0,1,2,3 are not handled here.
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h
new file mode 100644
index 000000000000..2f31b74974af
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h
@@ -0,0 +1,30 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4 * as part of OpenInkpot project
5 * Copyright (c) 2009 Promwad Innovation Company
6 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C2416 memory register definitions
13*/
14
15#ifndef __ASM_ARM_REGS_S3C2416_MEM
16#define __ASM_ARM_REGS_S3C2416_MEM
17
18#ifndef S3C2416_MEMREG
19#define S3C2416_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
20#endif
21
22#define S3C2416_BANKCFG S3C2416_MEMREG(0x00)
23#define S3C2416_BANKCON1 S3C2416_MEMREG(0x04)
24#define S3C2416_BANKCON2 S3C2416_MEMREG(0x08)
25#define S3C2416_BANKCON3 S3C2416_MEMREG(0x0C)
26
27#define S3C2416_REFRESH S3C2416_MEMREG(0x10)
28#define S3C2416_TIMEOUT S3C2416_MEMREG(0x14)
29
30#endif /* __ASM_ARM_REGS_S3C2416_MEM */
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h
new file mode 100644
index 000000000000..e443167efb87
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4 * as part of OpenInkpot project
5 * Copyright (c) 2009 Promwad Innovation Company
6 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C2416 specific register definitions
13*/
14
15#ifndef __ASM_ARCH_REGS_S3C2416_H
16#define __ASM_ARCH_REGS_S3C2416_H "s3c2416"
17
18#define S3C2416_SWRST (S3C24XX_VA_CLKPWR + 0x44)
19#define S3C2416_SWRST_RESET (0x533C2416)
20
21/* see regs-power.h for the other registers in the power block. */
22
23#endif /* __ASM_ARCH_REGS_S3C2416_H */
24
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index d87ebe0cb625..08ab9dfb6ae6 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -83,8 +83,7 @@
83#define S3C2443_HCLKCON_DMA4 (1<<4) 83#define S3C2443_HCLKCON_DMA4 (1<<4)
84#define S3C2443_HCLKCON_DMA5 (1<<5) 84#define S3C2443_HCLKCON_DMA5 (1<<5)
85#define S3C2443_HCLKCON_CAMIF (1<<8) 85#define S3C2443_HCLKCON_CAMIF (1<<8)
86#define S3C2443_HCLKCON_DISP (1<<9) 86#define S3C2443_HCLKCON_LCDC (1<<9)
87#define S3C2443_HCLKCON_LCDC (1<<10)
88#define S3C2443_HCLKCON_USBH (1<<11) 87#define S3C2443_HCLKCON_USBH (1<<11)
89#define S3C2443_HCLKCON_USBD (1<<12) 88#define S3C2443_HCLKCON_USBD (1<<12)
90#define S3C2443_HCLKCON_HSMMC (1<<16) 89#define S3C2443_HCLKCON_HSMMC (1<<16)
diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h
index 72f756c5e504..8b283f847daa 100644
--- a/arch/arm/mach-s3c2410/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h
@@ -40,7 +40,9 @@ static void arch_detect_cpu(void)
40 cpuid &= S3C2410_GSTATUS1_IDMASK; 40 cpuid &= S3C2410_GSTATUS1_IDMASK;
41 41
42 if (is_arm926() || cpuid == S3C2410_GSTATUS1_2440 || 42 if (is_arm926() || cpuid == S3C2410_GSTATUS1_2440 ||
43 cpuid == S3C2410_GSTATUS1_2442) { 43 cpuid == S3C2410_GSTATUS1_2442 ||
44 cpuid == S3C2410_GSTATUS1_2416 ||
45 cpuid == S3C2410_GSTATUS1_2450) {
44 fifo_mask = S3C2440_UFSTAT_TXMASK; 46 fifo_mask = S3C2440_UFSTAT_TXMASK;
45 fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT; 47 fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT;
46 } else { 48 } else {
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 7047317ed7f4..34fc05a4244b 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -56,6 +56,7 @@
56#include <plat/iic.h> 56#include <plat/iic.h>
57#include <plat/devs.h> 57#include <plat/devs.h>
58#include <plat/cpu.h> 58#include <plat/cpu.h>
59#include <plat/gpio-cfg.h>
59 60
60#ifdef CONFIG_MTD_PARTITIONS 61#ifdef CONFIG_MTD_PARTITIONS
61 62
@@ -225,8 +226,8 @@ static void amlm5900_init_pm(void)
225 } else { 226 } else {
226 enable_irq_wake(IRQ_EINT9); 227 enable_irq_wake(IRQ_EINT9);
227 /* configure the suspend/resume status pin */ 228 /* configure the suspend/resume status pin */
228 s3c2410_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); 229 s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT);
229 s3c2410_gpio_pullup(S3C2410_GPF(2), 0); 230 s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_UP);
230 } 231 }
231} 232}
232static void __init amlm5900_init(void) 233static void __init amlm5900_init(void)
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 02b1b6220cba..c1f90f6fab42 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -61,6 +61,7 @@
61#include <plat/devs.h> 61#include <plat/devs.h>
62#include <plat/cpu.h> 62#include <plat/cpu.h>
63#include <plat/cpu-freq.h> 63#include <plat/cpu-freq.h>
64#include <plat/gpio-cfg.h>
64#include <plat/audio-simtec.h> 65#include <plat/audio-simtec.h>
65 66
66#include "usb-simtec.h" 67#include "usb-simtec.h"
@@ -216,15 +217,13 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
216static int bast_pm_suspend(struct sys_device *sd, pm_message_t state) 217static int bast_pm_suspend(struct sys_device *sd, pm_message_t state)
217{ 218{
218 /* ensure that an nRESET is not generated on resume. */ 219 /* ensure that an nRESET is not generated on resume. */
219 s3c2410_gpio_setpin(S3C2410_GPA(21), 1); 220 gpio_direction_output(S3C2410_GPA(21), 1);
220 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT);
221
222 return 0; 221 return 0;
223} 222}
224 223
225static int bast_pm_resume(struct sys_device *sd) 224static int bast_pm_resume(struct sys_device *sd)
226{ 225{
227 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); 226 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
228 return 0; 227 return 0;
229} 228}
230 229
@@ -634,7 +633,7 @@ static void __init bast_map_io(void)
634 633
635 s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); 634 s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));
636 635
637 s3c_device_hwmon.dev.platform_data = &bast_hwmon_info; 636 s3c_hwmon_set_platdata(&bast_hwmon_info);
638 637
639 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); 638 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
640 s3c24xx_init_clocks(0); 639 s3c24xx_init_clocks(0);
@@ -658,6 +657,8 @@ static void __init bast_init(void)
658 nor_simtec_init(); 657 nor_simtec_init();
659 simtec_audio_add(NULL, true, &bast_audio); 658 simtec_audio_add(NULL, true, &bast_audio);
660 659
660 WARN_ON(gpio_request(S3C2410_GPA(21), "bast nreset"));
661
661 s3c_cpufreq_setboard(&bast_cpufreq); 662 s3c_cpufreq_setboard(&bast_cpufreq);
662} 663}
663 664
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index fbedd0760941..779b45b3f80f 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -46,16 +46,17 @@
46#include <mach/h1940.h> 46#include <mach/h1940.h>
47#include <mach/h1940-latch.h> 47#include <mach/h1940-latch.h>
48#include <mach/fb.h> 48#include <mach/fb.h>
49#include <mach/ts.h>
50#include <plat/udc.h> 49#include <plat/udc.h>
51#include <plat/iic.h> 50#include <plat/iic.h>
52 51
52#include <plat/gpio-cfg.h>
53#include <plat/clock.h> 53#include <plat/clock.h>
54#include <plat/devs.h> 54#include <plat/devs.h>
55#include <plat/cpu.h> 55#include <plat/cpu.h>
56#include <plat/pll.h> 56#include <plat/pll.h>
57#include <plat/pm.h> 57#include <plat/pm.h>
58#include <plat/mci.h> 58#include <plat/mci.h>
59#include <plat/ts.h>
59 60
60static struct map_desc h1940_iodesc[] __initdata = { 61static struct map_desc h1940_iodesc[] __initdata = {
61 [0] = { 62 [0] = {
@@ -145,6 +146,7 @@ static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = {
145 .delay = 10000, 146 .delay = 10000,
146 .presc = 49, 147 .presc = 49,
147 .oversampling_shift = 2, 148 .oversampling_shift = 2,
149 .cfg_gpio = s3c24xx_ts_cfg_gpio,
148}; 150};
149 151
150/** 152/**
@@ -162,8 +164,8 @@ static struct s3c2410fb_display h1940_lcd __initdata = {
162 .xres = 240, 164 .xres = 240,
163 .yres = 320, 165 .yres = 320,
164 .bpp = 16, 166 .bpp = 16,
165 .left_margin = 20, 167 .left_margin = 8,
166 .right_margin = 8, 168 .right_margin = 20,
167 .hsync_len = 4, 169 .hsync_len = 4,
168 .upper_margin = 8, 170 .upper_margin = 8,
169 .lower_margin = 7, 171 .lower_margin = 7,
@@ -207,16 +209,16 @@ static int h1940_backlight_init(struct device *dev)
207{ 209{
208 gpio_request(S3C2410_GPB(0), "Backlight"); 210 gpio_request(S3C2410_GPB(0), "Backlight");
209 211
210 s3c2410_gpio_setpin(S3C2410_GPB(0), 0); 212 gpio_direction_output(S3C2410_GPB(0), 0);
211 s3c2410_gpio_pullup(S3C2410_GPB(0), 0); 213 s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE);
212 s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); 214 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0);
213 215
214 return 0; 216 return 0;
215} 217}
216 218
217static void h1940_backlight_exit(struct device *dev) 219static void h1940_backlight_exit(struct device *dev)
218{ 220{
219 s3c2410_gpio_cfgpin(S3C2410_GPB(0), 1/*S3C2410_GPB0_OUTP*/); 221 gpio_direction_output(S3C2410_GPB(0), 1);
220} 222}
221 223
222static struct platform_pwm_backlight_data backlight_data = { 224static struct platform_pwm_backlight_data backlight_data = {
@@ -245,18 +247,18 @@ static void h1940_lcd_power_set(struct plat_lcd_data *pd,
245 247
246 if (!power) { 248 if (!power) {
247 /* set to 3ec */ 249 /* set to 3ec */
248 s3c2410_gpio_setpin(S3C2410_GPC(0), 0); 250 gpio_direction_output(S3C2410_GPC(0), 0);
249 /* wait for 3ac */ 251 /* wait for 3ac */
250 do { 252 do {
251 value = s3c2410_gpio_getpin(S3C2410_GPC(6)); 253 value = gpio_get_value(S3C2410_GPC(6));
252 } while (value); 254 } while (value);
253 /* set to 38c */ 255 /* set to 38c */
254 s3c2410_gpio_setpin(S3C2410_GPC(5), 0); 256 gpio_direction_output(S3C2410_GPC(5), 0);
255 } else { 257 } else {
256 /* Set to 3ac */ 258 /* Set to 3ac */
257 s3c2410_gpio_setpin(S3C2410_GPC(5), 1); 259 gpio_direction_output(S3C2410_GPC(5), 1);
258 /* Set to 3ad */ 260 /* Set to 3ad */
259 s3c2410_gpio_setpin(S3C2410_GPC(0), 1); 261 gpio_direction_output(S3C2410_GPC(0), 1);
260 } 262 }
261} 263}
262 264
@@ -271,7 +273,6 @@ static struct platform_device h1940_lcd_powerdev = {
271}; 273};
272 274
273static struct platform_device *h1940_devices[] __initdata = { 275static struct platform_device *h1940_devices[] __initdata = {
274 &s3c_device_ts,
275 &s3c_device_ohci, 276 &s3c_device_ohci,
276 &s3c_device_lcd, 277 &s3c_device_lcd,
277 &s3c_device_wdt, 278 &s3c_device_wdt,
@@ -285,6 +286,8 @@ static struct platform_device *h1940_devices[] __initdata = {
285 &s3c_device_timer[0], 286 &s3c_device_timer[0],
286 &h1940_backlight, 287 &h1940_backlight,
287 &h1940_lcd_powerdev, 288 &h1940_lcd_powerdev,
289 &s3c_device_adc,
290 &s3c_device_ts,
288}; 291};
289 292
290static void __init h1940_map_io(void) 293static void __init h1940_map_io(void)
@@ -332,12 +335,13 @@ static void __init h1940_init(void)
332 gpio_request(S3C2410_GPC(5), "LCD power"); 335 gpio_request(S3C2410_GPC(5), "LCD power");
333 gpio_request(S3C2410_GPC(6), "LCD power"); 336 gpio_request(S3C2410_GPC(6), "LCD power");
334 337
338 gpio_direction_input(S3C2410_GPC(6));
335 339
336 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); 340 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices));
337} 341}
338 342
339MACHINE_START(H1940, "IPAQ-H1940") 343MACHINE_START(H1940, "IPAQ-H1940")
340 /* Maintainer: Ben Dooks <ben@fluff.org> */ 344 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
341 .phys_io = S3C2410_PA_UART, 345 .phys_io = S3C2410_PA_UART,
342 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 346 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
343 .boot_params = S3C2410_SDRAM_PA + 0x100, 347 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 684710f88142..41f299d983eb 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -26,6 +26,7 @@
26#include <linux/serial_core.h> 26#include <linux/serial_core.h>
27#include <linux/timer.h> 27#include <linux/timer.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/mmc/host.h>
29 30
30#include <mach/hardware.h> 31#include <mach/hardware.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
@@ -46,6 +47,7 @@
46#include <plat/clock.h> 47#include <plat/clock.h>
47#include <plat/cpu.h> 48#include <plat/cpu.h>
48#include <plat/devs.h> 49#include <plat/devs.h>
50#include <plat/mci.h>
49#include <plat/s3c2410.h> 51#include <plat/s3c2410.h>
50#include <plat/udc.h> 52#include <plat/udc.h>
51 53
@@ -86,10 +88,10 @@ static void n30_udc_pullup(enum s3c2410_udc_cmd_e cmd)
86{ 88{
87 switch (cmd) { 89 switch (cmd) {
88 case S3C2410_UDC_P_ENABLE : 90 case S3C2410_UDC_P_ENABLE :
89 s3c2410_gpio_setpin(S3C2410_GPB(3), 1); 91 gpio_set_value(S3C2410_GPB(3), 1);
90 break; 92 break;
91 case S3C2410_UDC_P_DISABLE : 93 case S3C2410_UDC_P_DISABLE :
92 s3c2410_gpio_setpin(S3C2410_GPB(3), 0); 94 gpio_set_value(S3C2410_GPB(3), 0);
93 break; 95 break;
94 case S3C2410_UDC_P_RESET : 96 case S3C2410_UDC_P_RESET :
95 break; 97 break;
@@ -172,8 +174,10 @@ static struct gpio_keys_button n35_buttons[] = {
172 { 174 {
173 .gpio = S3C2410_GPF(0), 175 .gpio = S3C2410_GPF(0),
174 .code = KEY_POWER, 176 .code = KEY_POWER,
177 .type = EV_PWR,
175 .desc = "Power", 178 .desc = "Power",
176 .active_low = 0, 179 .active_low = 0,
180 .wakeup = 1,
177 }, 181 },
178 { 182 {
179 .gpio = S3C2410_GPG(9), 183 .gpio = S3C2410_GPG(9),
@@ -264,6 +268,14 @@ static struct s3c24xx_led_platdata n30_blue_led_pdata = {
264 .def_trigger = "", 268 .def_trigger = "",
265}; 269};
266 270
271/* This is the blue LED on the device. Originaly used to indicate GPS activity
272 * by flashing. */
273static struct s3c24xx_led_platdata n35_blue_led_pdata = {
274 .name = "blue_led",
275 .gpio = S3C2410_GPD(8),
276 .def_trigger = "",
277};
278
267/* This LED is driven by the battery microcontroller, and is blinking 279/* This LED is driven by the battery microcontroller, and is blinking
268 * red, blinking green or solid green when the battery is low, 280 * red, blinking green or solid green when the battery is low,
269 * charging or full respectively. By driving GPD9 low, it's possible 281 * charging or full respectively. By driving GPD9 low, it's possible
@@ -275,6 +287,13 @@ static struct s3c24xx_led_platdata n30_warning_led_pdata = {
275 .def_trigger = "", 287 .def_trigger = "",
276}; 288};
277 289
290static struct s3c24xx_led_platdata n35_warning_led_pdata = {
291 .name = "warning_led",
292 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
293 .gpio = S3C2410_GPD(9),
294 .def_trigger = "",
295};
296
278static struct platform_device n30_blue_led = { 297static struct platform_device n30_blue_led = {
279 .name = "s3c24xx_led", 298 .name = "s3c24xx_led",
280 .id = 1, 299 .id = 1,
@@ -283,6 +302,14 @@ static struct platform_device n30_blue_led = {
283 }, 302 },
284}; 303};
285 304
305static struct platform_device n35_blue_led = {
306 .name = "s3c24xx_led",
307 .id = 1,
308 .dev = {
309 .platform_data = &n35_blue_led_pdata,
310 },
311};
312
286static struct platform_device n30_warning_led = { 313static struct platform_device n30_warning_led = {
287 .name = "s3c24xx_led", 314 .name = "s3c24xx_led",
288 .id = 2, 315 .id = 2,
@@ -291,6 +318,14 @@ static struct platform_device n30_warning_led = {
291 }, 318 },
292}; 319};
293 320
321static struct platform_device n35_warning_led = {
322 .name = "s3c24xx_led",
323 .id = 2,
324 .dev = {
325 .platform_data = &n35_warning_led_pdata,
326 },
327};
328
294static struct s3c2410fb_display n30_display __initdata = { 329static struct s3c2410fb_display n30_display __initdata = {
295 .type = S3C2410_LCDCON1_TFT, 330 .type = S3C2410_LCDCON1_TFT,
296 .width = 240, 331 .width = 240,
@@ -317,13 +352,36 @@ static struct s3c2410fb_mach_info n30_fb_info __initdata = {
317 .lpcsel = 0x06, 352 .lpcsel = 0x06,
318}; 353};
319 354
355static void n30_sdi_set_power(unsigned char power_mode, unsigned short vdd)
356{
357 switch (power_mode) {
358 case MMC_POWER_ON:
359 case MMC_POWER_UP:
360 gpio_set_value(S3C2410_GPG(4), 1);
361 break;
362 case MMC_POWER_OFF:
363 default:
364 gpio_set_value(S3C2410_GPG(4), 0);
365 break;
366 }
367}
368
369static struct s3c24xx_mci_pdata n30_mci_cfg __initdata = {
370 .gpio_detect = S3C2410_GPF(1),
371 .gpio_wprotect = S3C2410_GPG(10),
372 .ocr_avail = MMC_VDD_32_33,
373 .set_power = n30_sdi_set_power,
374};
375
320static struct platform_device *n30_devices[] __initdata = { 376static struct platform_device *n30_devices[] __initdata = {
321 &s3c_device_lcd, 377 &s3c_device_lcd,
322 &s3c_device_wdt, 378 &s3c_device_wdt,
323 &s3c_device_i2c0, 379 &s3c_device_i2c0,
324 &s3c_device_iis, 380 &s3c_device_iis,
325 &s3c_device_ohci, 381 &s3c_device_ohci,
382 &s3c_device_rtc,
326 &s3c_device_usbgadget, 383 &s3c_device_usbgadget,
384 &s3c_device_sdi,
327 &n30_button_device, 385 &n30_button_device,
328 &n30_blue_led, 386 &n30_blue_led,
329 &n30_warning_led, 387 &n30_warning_led,
@@ -334,8 +392,12 @@ static struct platform_device *n35_devices[] __initdata = {
334 &s3c_device_wdt, 392 &s3c_device_wdt,
335 &s3c_device_i2c0, 393 &s3c_device_i2c0,
336 &s3c_device_iis, 394 &s3c_device_iis,
395 &s3c_device_rtc,
337 &s3c_device_usbgadget, 396 &s3c_device_usbgadget,
397 &s3c_device_sdi,
338 &n35_button_device, 398 &n35_button_device,
399 &n35_blue_led,
400 &n35_warning_led,
339}; 401};
340 402
341static struct s3c2410_platform_i2c __initdata n30_i2ccfg = { 403static struct s3c2410_platform_i2c __initdata n30_i2ccfg = {
@@ -490,17 +552,15 @@ static void __init n30_map_io(void)
490 s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); 552 s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs));
491} 553}
492 554
493static void __init n30_init_irq(void)
494{
495 s3c24xx_init_irq();
496}
497
498/* GPB3 is the line that controls the pull-up for the USB D+ line */ 555/* GPB3 is the line that controls the pull-up for the USB D+ line */
499 556
500static void __init n30_init(void) 557static void __init n30_init(void)
501{ 558{
559 WARN_ON(gpio_request(S3C2410_GPG(4), "mmc power"));
560
502 s3c24xx_fb_set_platdata(&n30_fb_info); 561 s3c24xx_fb_set_platdata(&n30_fb_info);
503 s3c24xx_udc_set_platdata(&n30_udc_cfg); 562 s3c24xx_udc_set_platdata(&n30_udc_cfg);
563 s3c24xx_mci_set_platdata(&n30_mci_cfg);
504 s3c_i2c0_set_platdata(&n30_i2ccfg); 564 s3c_i2c0_set_platdata(&n30_i2ccfg);
505 565
506 /* Turn off suspend on both USB ports, and switch the 566 /* Turn off suspend on both USB ports, and switch the
@@ -532,10 +592,13 @@ static void __init n30_init(void)
532 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | 592 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
533 S3C2410_MISCCR_USBSUSPND0 | 593 S3C2410_MISCCR_USBSUSPND0 |
534 S3C2410_MISCCR_USBSUSPND1, 594 S3C2410_MISCCR_USBSUSPND1,
535 S3C2410_MISCCR_USBSUSPND1); 595 S3C2410_MISCCR_USBSUSPND0);
536 596
537 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices)); 597 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices));
538 } 598 }
599
600 WARN_ON(gpio_request(S3C2410_GPB(3), "udc pup"));
601 gpio_direction_output(S3C2410_GPB(3), 0);
539} 602}
540 603
541MACHINE_START(N30, "Acer-N30") 604MACHINE_START(N30, "Acer-N30")
@@ -547,7 +610,7 @@ MACHINE_START(N30, "Acer-N30")
547 .boot_params = S3C2410_SDRAM_PA + 0x100, 610 .boot_params = S3C2410_SDRAM_PA + 0x100,
548 .timer = &s3c24xx_timer, 611 .timer = &s3c24xx_timer,
549 .init_machine = n30_init, 612 .init_machine = n30_init,
550 .init_irq = n30_init_irq, 613 .init_irq = s3c24xx_init_irq,
551 .map_io = n30_map_io, 614 .map_io = n30_map_io,
552MACHINE_END 615MACHINE_END
553 616
@@ -559,6 +622,6 @@ MACHINE_START(N35, "Acer-N35")
559 .boot_params = S3C2410_SDRAM_PA + 0x100, 622 .boot_params = S3C2410_SDRAM_PA + 0x100,
560 .timer = &s3c24xx_timer, 623 .timer = &s3c24xx_timer,
561 .init_machine = n30_init, 624 .init_machine = n30_init,
562 .init_irq = n30_init_irq, 625 .init_irq = s3c24xx_init_irq,
563 .map_io = n30_map_io, 626 .map_io = n30_map_io,
564MACHINE_END 627MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 92a4ec375d82..d0e87b6e2e0f 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -58,6 +58,7 @@
58#include <plat/iic.h> 58#include <plat/iic.h>
59 59
60#include <plat/common-smdk.h> 60#include <plat/common-smdk.h>
61#include <plat/gpio-cfg.h>
61#include <plat/devs.h> 62#include <plat/devs.h>
62#include <plat/cpu.h> 63#include <plat/cpu.h>
63#include <plat/pm.h> 64#include <plat/pm.h>
@@ -219,10 +220,10 @@ static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
219{ 220{
220 switch (cs) { 221 switch (cs) {
221 case BITBANG_CS_ACTIVE: 222 case BITBANG_CS_ACTIVE:
222 s3c2410_gpio_setpin(S3C2410_GPB(5), 0); 223 gpio_set_value(S3C2410_GPB(5), 0);
223 break; 224 break;
224 case BITBANG_CS_INACTIVE: 225 case BITBANG_CS_INACTIVE:
225 s3c2410_gpio_setpin(S3C2410_GPB(5), 1); 226 gpio_set_value(S3C2410_GPB(5), 1);
226 break; 227 break;
227 } 228 }
228} 229}
@@ -347,13 +348,14 @@ static void __init qt2410_machine_init(void)
347 } 348 }
348 s3c24xx_fb_set_platdata(&qt2410_fb_info); 349 s3c24xx_fb_set_platdata(&qt2410_fb_info);
349 350
350 s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT); 351 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT);
351 s3c2410_gpio_setpin(S3C2410_GPB(0), 1); 352 s3c2410_gpio_setpin(S3C2410_GPB(0), 1);
352 353
353 s3c24xx_udc_set_platdata(&qt2410_udc_cfg); 354 s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
354 s3c_i2c0_set_platdata(NULL); 355 s3c_i2c0_set_platdata(NULL);
355 356
356 s3c2410_gpio_cfgpin(S3C2410_GPB(5), S3C2410_GPIO_OUTPUT); 357 WARN_ON(gpio_request(S3C2410_GPB(5), "spi cs"));
358 gpio_direction_output(S3C2410_GPB(5), 1);
357 359
358 platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); 360 platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
359 s3c_pm_init(); 361 s3c_pm_init();
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 9051f0d31123..d540d79dd264 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -357,8 +357,7 @@ static struct clk *vr1000_clocks[] __initdata = {
357 357
358static void vr1000_power_off(void) 358static void vr1000_power_off(void)
359{ 359{
360 s3c2410_gpio_cfgpin(S3C2410_GPB(9), S3C2410_GPIO_OUTPUT); 360 gpio_direction_output(S3C2410_GPB(9), 1);
361 s3c2410_gpio_setpin(S3C2410_GPB(9), 1);
362} 361}
363 362
364static void __init vr1000_map_io(void) 363static void __init vr1000_map_io(void)
@@ -395,6 +394,8 @@ static void __init vr1000_init(void)
395 394
396 nor_simtec_init(); 395 nor_simtec_init();
397 simtec_audio_add(NULL, true, NULL); 396 simtec_audio_add(NULL, true, NULL);
397
398 WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
398} 399}
399 400
400MACHINE_START(VR1000, "Thorcom-VR1000") 401MACHINE_START(VR1000, "Thorcom-VR1000")
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 966119c8efee..725636fc4dc3 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -60,10 +60,10 @@ static void s3c2410_pm_prepare(void)
60 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); 60 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
61 } 61 }
62 62
63 /* the RX3715 uses similar code and the same H1940 and the 63 /* RX3715 and RX1950 use similar to H1940 code and the
64 * same offsets for resume and checksum pointers */ 64 * same offsets for resume and checksum pointers */
65 65
66 if (machine_is_rx3715()) { 66 if (machine_is_rx3715() || machine_is_rx1950()) {
67 void *base = phys_to_virt(H1940_SUSPEND_CHECK); 67 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
68 unsigned long ptr; 68 unsigned long ptr;
69 unsigned long calc = 0; 69 unsigned long calc = 0;
@@ -79,6 +79,17 @@ static void s3c2410_pm_prepare(void)
79 if ( machine_is_aml_m5900() ) 79 if ( machine_is_aml_m5900() )
80 s3c2410_gpio_setpin(S3C2410_GPF(2), 1); 80 s3c2410_gpio_setpin(S3C2410_GPF(2), 1);
81 81
82 if (machine_is_rx1950()) {
83 /* According to S3C2442 user's manual, page 7-17,
84 * when the system is operating in NAND boot mode,
85 * the hardware pin configuration - EINT[23:21] –
86 * must be set as input for starting up after
87 * wakeup from sleep mode
88 */
89 s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT);
90 s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT);
91 s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT);
92 }
82} 93}
83 94
84static int s3c2410_pm_resume(struct sys_device *dev) 95static int s3c2410_pm_resume(struct sys_device *dev)
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 91ba42f688ac..adc90a3c5890 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -16,6 +16,7 @@
16#include <linux/list.h> 16#include <linux/list.h>
17#include <linux/timer.h> 17#include <linux/timer.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/gpio.h>
19#include <linux/clk.h> 20#include <linux/clk.h>
20#include <linux/sysdev.h> 21#include <linux/sysdev.h>
21#include <linux/serial_core.h> 22#include <linux/serial_core.h>
@@ -40,6 +41,10 @@
40#include <plat/clock.h> 41#include <plat/clock.h>
41#include <plat/pll.h> 42#include <plat/pll.h>
42 43
44#include <plat/gpio-core.h>
45#include <plat/gpio-cfg.h>
46#include <plat/gpio-cfg-helpers.h>
47
43/* Initial IO mappings */ 48/* Initial IO mappings */
44 49
45static struct map_desc s3c2410_iodesc[] __initdata = { 50static struct map_desc s3c2410_iodesc[] __initdata = {
@@ -65,6 +70,9 @@ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
65 70
66void __init s3c2410_map_io(void) 71void __init s3c2410_map_io(void)
67{ 72{
73 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
74 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
75
68 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); 76 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
69} 77}
70 78
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index 9a8c0657ae50..cef6a65637bd 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -16,7 +16,8 @@ config CPU_S3C2412
16config CPU_S3C2412_ONLY 16config CPU_S3C2412_ONLY
17 bool 17 bool
18 depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \ 18 depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \
19 !CPU_S3C2440 && !CPU_S3C2442 && !CPU_S3C2443 && CPU_S3C2412 19 !CPU_2416 && !CPU_S3C2440 && !CPU_S3C2442 && \
20 !CPU_S3C2443 && CPU_S3C2412
20 default y if CPU_S3C2412 21 default y if CPU_S3C2412
21 22
22config S3C2412_DMA 23config S3C2412_DMA
diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c
index f7afece7fc38..3404a876b33e 100644
--- a/arch/arm/mach-s3c2412/gpio.c
+++ b/arch/arm/mach-s3c2412/gpio.c
@@ -16,41 +16,43 @@
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/gpio.h>
19 20
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
21#include <asm/mach/map.h> 22#include <asm/mach/map.h>
22 23
23#include <mach/regs-gpio.h> 24#include <mach/regs-gpio.h>
24
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26 26
27#include <plat/gpio-core.h>
28
27int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state) 29int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state)
28{ 30{
29 void __iomem *base = S3C24XX_GPIO_BASE(pin); 31 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
30 unsigned long offs = S3C2410_GPIO_OFFSET(pin); 32 unsigned long offs = pin - chip->chip.base;
31 unsigned long flags; 33 unsigned long flags;
32 unsigned long slpcon; 34 unsigned long slpcon;
33 35
34 offs *= 2; 36 offs *= 2;
35 37
36 if (pin < S3C2410_GPIO_BANKB) 38 if (pin < S3C2410_GPB(0))
37 return -EINVAL; 39 return -EINVAL;
38 40
39 if (pin >= S3C2410_GPIO_BANKF && 41 if (pin >= S3C2410_GPF(0) &&
40 pin <= S3C2410_GPIO_BANKG) 42 pin <= S3C2410_GPG(16))
41 return -EINVAL; 43 return -EINVAL;
42 44
43 if (pin > (S3C2410_GPIO_BANKH + 32)) 45 if (pin > S3C2410_GPH(16))
44 return -EINVAL; 46 return -EINVAL;
45 47
46 local_irq_save(flags); 48 local_irq_save(flags);
47 49
48 slpcon = __raw_readl(base + 0x0C); 50 slpcon = __raw_readl(chip->base + 0x0C);
49 51
50 slpcon &= ~(3 << offs); 52 slpcon &= ~(3 << offs);
51 slpcon |= state << offs; 53 slpcon |= state << offs;
52 54
53 __raw_writel(slpcon, base + 0x0C); 55 __raw_writel(slpcon, chip->base + 0x0C);
54 56
55 local_irq_restore(flags); 57 local_irq_restore(flags);
56 58
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 14f4798291aa..478f4b4606c2 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -48,6 +48,7 @@
48#include <linux/mtd/nand_ecc.h> 48#include <linux/mtd/nand_ecc.h>
49#include <linux/mtd/partitions.h> 49#include <linux/mtd/partitions.h>
50 50
51#include <plat/gpio-cfg.h>
51#include <plat/clock.h> 52#include <plat/clock.h>
52#include <plat/devs.h> 53#include <plat/devs.h>
53#include <plat/cpu.h> 54#include <plat/cpu.h>
@@ -357,8 +358,7 @@ static void jive_lcm_reset(unsigned int set)
357{ 358{
358 printk(KERN_DEBUG "%s(%d)\n", __func__, set); 359 printk(KERN_DEBUG "%s(%d)\n", __func__, set);
359 360
360 s3c2410_gpio_setpin(S3C2410_GPG(13), set); 361 gpio_set_value(S3C2410_GPG(13), set);
361 s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_OUTPUT);
362} 362}
363 363
364#undef LCD_UPPER_MARGIN 364#undef LCD_UPPER_MARGIN
@@ -391,7 +391,7 @@ static struct ili9320_platdata jive_lcm_config = {
391 391
392static void jive_lcd_spi_chipselect(struct s3c2410_spigpio_info *spi, int cs) 392static void jive_lcd_spi_chipselect(struct s3c2410_spigpio_info *spi, int cs)
393{ 393{
394 s3c2410_gpio_setpin(S3C2410_GPB(7), cs ? 0 : 1); 394 gpio_set_value(S3C2410_GPB(7), cs ? 0 : 1);
395} 395}
396 396
397static struct s3c2410_spigpio_info jive_lcd_spi = { 397static struct s3c2410_spigpio_info jive_lcd_spi = {
@@ -413,7 +413,7 @@ static struct platform_device jive_device_lcdspi = {
413 413
414static void jive_wm8750_chipselect(struct s3c2410_spigpio_info *spi, int cs) 414static void jive_wm8750_chipselect(struct s3c2410_spigpio_info *spi, int cs)
415{ 415{
416 s3c2410_gpio_setpin(S3C2410_GPH(10), cs ? 0 : 1); 416 gpio_set_value(S3C2410_GPH(10), cs ? 0 : 1);
417} 417}
418 418
419static struct s3c2410_spigpio_info jive_wm8750_spi = { 419static struct s3c2410_spigpio_info jive_wm8750_spi = {
@@ -531,7 +531,7 @@ static void jive_power_off(void)
531 printk(KERN_INFO "powering system down...\n"); 531 printk(KERN_INFO "powering system down...\n");
532 532
533 s3c2410_gpio_setpin(S3C2410_GPC(5), 1); 533 s3c2410_gpio_setpin(S3C2410_GPC(5), 1);
534 s3c2410_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT); 534 s3c_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT);
535} 535}
536 536
537static void __init jive_machine_init(void) 537static void __init jive_machine_init(void)
@@ -636,22 +636,22 @@ static void __init jive_machine_init(void)
636 636
637 /* initialise the spi */ 637 /* initialise the spi */
638 638
639 s3c2410_gpio_setpin(S3C2410_GPG(13), 0); 639 gpio_request(S3C2410_GPG(13), "lcm reset");
640 s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_OUTPUT); 640 gpio_direction_output(S3C2410_GPG(13), 0);
641 641
642 s3c2410_gpio_setpin(S3C2410_GPB(7), 1); 642 gpio_request(S3C2410_GPB(7), "jive spi");
643 s3c2410_gpio_cfgpin(S3C2410_GPB(7), S3C2410_GPIO_OUTPUT); 643 gpio_direction_output(S3C2410_GPB(7), 1);
644 644
645 s3c2410_gpio_setpin(S3C2410_GPB(6), 0); 645 s3c2410_gpio_setpin(S3C2410_GPB(6), 0);
646 s3c2410_gpio_cfgpin(S3C2410_GPB(6), S3C2410_GPIO_OUTPUT); 646 s3c_gpio_cfgpin(S3C2410_GPB(6), S3C2410_GPIO_OUTPUT);
647 647
648 s3c2410_gpio_setpin(S3C2410_GPG(8), 1); 648 s3c2410_gpio_setpin(S3C2410_GPG(8), 1);
649 s3c2410_gpio_cfgpin(S3C2410_GPG(8), S3C2410_GPIO_OUTPUT); 649 s3c_gpio_cfgpin(S3C2410_GPG(8), S3C2410_GPIO_OUTPUT);
650 650
651 /* initialise the WM8750 spi */ 651 /* initialise the WM8750 spi */
652 652
653 s3c2410_gpio_setpin(S3C2410_GPH(10), 1); 653 gpio_request(S3C2410_GPH(10), "jive wm8750 spi");
654 s3c2410_gpio_cfgpin(S3C2410_GPH(10), S3C2410_GPIO_OUTPUT); 654 gpio_direction_output(S3C2410_GPH(10), 1);
655 655
656 /* Turn off suspend on both USB ports, and switch the 656 /* Turn off suspend on both USB ports, and switch the
657 * selectable USB port to USB device mode. */ 657 * selectable USB port to USB device mode. */
@@ -674,7 +674,7 @@ static void __init jive_machine_init(void)
674} 674}
675 675
676MACHINE_START(JIVE, "JIVE") 676MACHINE_START(JIVE, "JIVE")
677 /* Maintainer: Ben Dooks <ben@fluff.org> */ 677 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
678 .phys_io = S3C2410_PA_UART, 678 .phys_io = S3C2410_PA_UART,
679 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 679 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
680 .boot_params = S3C2410_SDRAM_PA + 0x100, 680 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 0392065af1af..ba93a356a839 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -85,10 +85,10 @@ static void smdk2413_udc_pullup(enum s3c2410_udc_cmd_e cmd)
85 switch (cmd) 85 switch (cmd)
86 { 86 {
87 case S3C2410_UDC_P_ENABLE : 87 case S3C2410_UDC_P_ENABLE :
88 s3c2410_gpio_setpin(S3C2410_GPF(2), 1); 88 gpio_set_value(S3C2410_GPF(2), 1);
89 break; 89 break;
90 case S3C2410_UDC_P_DISABLE : 90 case S3C2410_UDC_P_DISABLE :
91 s3c2410_gpio_setpin(S3C2410_GPF(2), 0); 91 gpio_set_value(S3C2410_GPF(2), 0);
92 break; 92 break;
93 case S3C2410_UDC_P_RESET : 93 case S3C2410_UDC_P_RESET :
94 break; 94 break;
@@ -134,8 +134,8 @@ static void __init smdk2413_machine_init(void)
134{ /* Turn off suspend on both USB ports, and switch the 134{ /* Turn off suspend on both USB ports, and switch the
135 * selectable USB port to USB device mode. */ 135 * selectable USB port to USB device mode. */
136 136
137 s3c2410_gpio_setpin(S3C2410_GPF(2), 0); 137 WARN_ON(gpio_request(S3C2410_GPF(2), "udc pull"));
138 s3c2410_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); 138 gpio_direction_output(S3C2410_GPF(2), 0);
139 139
140 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | 140 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
141 S3C2410_MISCCR_USBSUSPND0 | 141 S3C2410_MISCCR_USBSUSPND0 |
@@ -150,7 +150,7 @@ static void __init smdk2413_machine_init(void)
150} 150}
151 151
152MACHINE_START(S3C2413, "S3C2413") 152MACHINE_START(S3C2413, "S3C2413")
153 /* Maintainer: Ben Dooks <ben@fluff.org> */ 153 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
154 .phys_io = S3C2410_PA_UART, 154 .phys_io = S3C2410_PA_UART,
155 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 155 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
156 .boot_params = S3C2410_SDRAM_PA + 0x100, 156 .boot_params = S3C2410_SDRAM_PA + 0x100,
@@ -163,7 +163,7 @@ MACHINE_START(S3C2413, "S3C2413")
163MACHINE_END 163MACHINE_END
164 164
165MACHINE_START(SMDK2412, "SMDK2412") 165MACHINE_START(SMDK2412, "SMDK2412")
166 /* Maintainer: Ben Dooks <ben@fluff.org> */ 166 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
167 .phys_io = S3C2410_PA_UART, 167 .phys_io = S3C2410_PA_UART,
168 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 168 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
169 .boot_params = S3C2410_SDRAM_PA + 0x100, 169 .boot_params = S3C2410_SDRAM_PA + 0x100,
@@ -176,7 +176,7 @@ MACHINE_START(SMDK2412, "SMDK2412")
176MACHINE_END 176MACHINE_END
177 177
178MACHINE_START(SMDK2413, "SMDK2413") 178MACHINE_START(SMDK2413, "SMDK2413")
179 /* Maintainer: Ben Dooks <ben@fluff.org> */ 179 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
180 .phys_io = S3C2410_PA_UART, 180 .phys_io = S3C2410_PA_UART,
181 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 181 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
182 .boot_params = S3C2410_SDRAM_PA + 0x100, 182 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig
new file mode 100644
index 000000000000..657e4fe17f39
--- /dev/null
+++ b/arch/arm/mach-s3c2416/Kconfig
@@ -0,0 +1,39 @@
1# arch/arm/mach-s3c2416/Kconfig
2#
3# Copyright 2009 Yauhen Kharuzhy <jekhor@gmail.com>
4#
5# Licensed under GPLv2
6
7# note, this also supports the S3C2450 which is so similar it has the same
8# ID code as the S3C2416.
9
10config CPU_S3C2416
11 bool
12 depends on ARCH_S3C2410
13 select CPU_ARM926T
14 select S3C2416_DMA if S3C2410_DMA
15 select CPU_LLSERIAL_S3C2440
16 select S3C_GPIO_PULL_UPDOWN
17 select SAMSUNG_CLKSRC
18 select S3C2443_CLOCK
19 help
20 Support for the S3C2416 SoC from the S3C24XX line
21
22config S3C2416_DMA
23 bool
24 depends on CPU_S3C2416
25 help
26 Internal config node for S3C2416 DMA support
27
28menu "S3C2416 Machines"
29
30config MACH_SMDK2416
31 bool "SMDK2416"
32 select CPU_S3C2416
33 select S3C_DEV_FB
34 select S3C_DEV_HSMMC
35 select S3C_DEV_HSMMC1
36 help
37 Say Y here if you are using an SMDK2416
38
39endmenu
diff --git a/arch/arm/mach-s3c2416/Makefile b/arch/arm/mach-s3c2416/Makefile
new file mode 100644
index 000000000000..6c12c7bf40ad
--- /dev/null
+++ b/arch/arm/mach-s3c2416/Makefile
@@ -0,0 +1,19 @@
1# arch/arm/mach-s3c2416/Makefile
2#
3# Copyright 2009 Yauhen Kharuzhy <jekhor@gmail.com>
4#
5# Licensed under GPLv2
6
7obj-y :=
8obj-m :=
9obj-n :=
10obj- :=
11
12obj-$(CONFIG_CPU_S3C2416) += s3c2416.o clock.o
13obj-$(CONFIG_CPU_S3C2416) += irq.o
14
15#obj-$(CONFIG_S3C2416_DMA) += dma.o
16
17# Machine support
18
19obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
new file mode 100644
index 000000000000..7ccf5a2a2bfc
--- /dev/null
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -0,0 +1,135 @@
1/* linux/arch/arm/mach-s3c2416/clock.c
2 *
3 * Copyright (c) 2010 Simtec Electronics
4 * Copyright (c) 2010 Ben Dooks <ben-linux@fluff.org>
5 *
6 * S3C2416 Clock control support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/init.h>
15#include <linux/clk.h>
16
17#include <plat/s3c2416.h>
18#include <plat/s3c2443.h>
19#include <plat/clock.h>
20#include <plat/clock-clksrc.h>
21#include <plat/cpu.h>
22
23#include <plat/cpu-freq.h>
24#include <plat/pll6553x.h>
25#include <plat/pll.h>
26
27#include <asm/mach/map.h>
28
29#include <mach/regs-clock.h>
30#include <mach/regs-s3c2443-clock.h>
31
32static unsigned int armdiv[8] = {
33 [0] = 1,
34 [1] = 2,
35 [2] = 3,
36 [3] = 4,
37 [5] = 6,
38 [7] = 8,
39};
40
41/* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */
42static struct clksrc_clk hsmmc_div[] = {
43 [0] = {
44 .clk = {
45 .name = "hsmmc-div",
46 .id = 1,
47 .parent = &clk_esysclk.clk,
48 },
49 .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
50 },
51 [1] = {
52 .clk = {
53 .name = "hsmmc-div",
54 .id = 0,
55 .parent = &clk_esysclk.clk,
56 },
57 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
58 },
59};
60
61static struct clksrc_clk hsmmc_mux[] = {
62 [0] = {
63 .clk = {
64 .id = 1,
65 .name = "hsmmc-if",
66 .ctrlbit = (1 << 6),
67 .enable = s3c2443_clkcon_enable_s,
68 },
69 .sources = &(struct clksrc_sources) {
70 .nr_sources = 2,
71 .sources = (struct clk *[]) {
72 [0] = &hsmmc_div[0].clk,
73 [1] = NULL, /* to fix */
74 },
75 },
76 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
77 },
78 [1] = {
79 .clk = {
80 .id = 0,
81 .name = "hsmmc-if",
82 .ctrlbit = (1 << 12),
83 .enable = s3c2443_clkcon_enable_s,
84 },
85 .sources = &(struct clksrc_sources) {
86 .nr_sources = 2,
87 .sources = (struct clk *[]) {
88 [0] = &hsmmc_div[1].clk,
89 [1] = NULL, /* to fix */
90 },
91 },
92 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
93 },
94};
95
96
97static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)
98{
99 clkcon0 &= 7 << S3C2443_CLKDIV0_ARMDIV_SHIFT;
100
101 return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
102}
103
104void __init_or_cpufreq s3c2416_setup_clocks(void)
105{
106 s3c2443_common_setup_clocks(s3c2416_get_pll, s3c2416_fclk_div);
107}
108
109
110static struct clksrc_clk *clksrcs[] __initdata = {
111 &hsmmc_div[0],
112 &hsmmc_div[1],
113 &hsmmc_mux[0],
114 &hsmmc_mux[1],
115};
116
117void __init s3c2416_init_clocks(int xtal)
118{
119 u32 epllcon = __raw_readl(S3C2443_EPLLCON);
120 u32 epllcon1 = __raw_readl(S3C2443_EPLLCON+4);
121 int ptr;
122
123 /* s3c2416 EPLL compatible with s3c64xx */
124 clk_epll.rate = s3c_get_pll6553x(xtal, epllcon, epllcon1);
125
126 clk_epll.parent = &clk_epllref.clk;
127
128 s3c2443_common_init_clocks(xtal, s3c2416_get_pll, s3c2416_fclk_div);
129
130 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
131 s3c_register_clksrc(clksrcs[ptr], 1);
132
133 s3c_pwmclk_init();
134
135}
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c
new file mode 100644
index 000000000000..89f521d59d06
--- /dev/null
+++ b/arch/arm/mach-s3c2416/irq.c
@@ -0,0 +1,254 @@
1/* linux/arch/arm/mach-s3c2416/irq.c
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4 * as part of OpenInkpot project
5 * Copyright (c) 2009 Promwad Innovation Company
6 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22*/
23
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/interrupt.h>
27#include <linux/ioport.h>
28#include <linux/sysdev.h>
29#include <linux/io.h>
30
31#include <mach/hardware.h>
32#include <asm/irq.h>
33
34#include <asm/mach/irq.h>
35
36#include <mach/regs-irq.h>
37#include <mach/regs-gpio.h>
38
39#include <plat/cpu.h>
40#include <plat/pm.h>
41#include <plat/irq.h>
42
43#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
44
45static inline void s3c2416_irq_demux(unsigned int irq, unsigned int len)
46{
47 unsigned int subsrc, submsk;
48 unsigned int end;
49
50 /* read the current pending interrupts, and the mask
51 * for what it is available */
52
53 subsrc = __raw_readl(S3C2410_SUBSRCPND);
54 submsk = __raw_readl(S3C2410_INTSUBMSK);
55
56 subsrc &= ~submsk;
57 subsrc >>= (irq - S3C2410_IRQSUB(0));
58 subsrc &= (1 << len)-1;
59
60 end = len + irq;
61
62 for (; irq < end && subsrc; irq++) {
63 if (subsrc & 1)
64 generic_handle_irq(irq);
65
66 subsrc >>= 1;
67 }
68}
69
70/* WDT/AC97 sub interrupts */
71
72static void s3c2416_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
73{
74 s3c2416_irq_demux(IRQ_S3C2443_WDT, 4);
75}
76
77#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
78#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
79
80static void s3c2416_irq_wdtac97_mask(unsigned int irqno)
81{
82 s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
83}
84
85static void s3c2416_irq_wdtac97_unmask(unsigned int irqno)
86{
87 s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
88}
89
90static void s3c2416_irq_wdtac97_ack(unsigned int irqno)
91{
92 s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
93}
94
95static struct irq_chip s3c2416_irq_wdtac97 = {
96 .mask = s3c2416_irq_wdtac97_mask,
97 .unmask = s3c2416_irq_wdtac97_unmask,
98 .ack = s3c2416_irq_wdtac97_ack,
99};
100
101
102/* LCD sub interrupts */
103
104static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
105{
106 s3c2416_irq_demux(IRQ_S3C2443_LCD1, 4);
107}
108
109#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
110#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
111
112static void s3c2416_irq_lcd_mask(unsigned int irqno)
113{
114 s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
115}
116
117static void s3c2416_irq_lcd_unmask(unsigned int irqno)
118{
119 s3c_irqsub_unmask(irqno, INTMSK_LCD);
120}
121
122static void s3c2416_irq_lcd_ack(unsigned int irqno)
123{
124 s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
125}
126
127static struct irq_chip s3c2416_irq_lcd = {
128 .mask = s3c2416_irq_lcd_mask,
129 .unmask = s3c2416_irq_lcd_unmask,
130 .ack = s3c2416_irq_lcd_ack,
131};
132
133
134/* DMA sub interrupts */
135
136static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
137{
138 s3c2416_irq_demux(IRQ_S3C2443_DMA0, 6);
139}
140
141#define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
142#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
143
144
145static void s3c2416_irq_dma_mask(unsigned int irqno)
146{
147 s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
148}
149
150static void s3c2416_irq_dma_unmask(unsigned int irqno)
151{
152 s3c_irqsub_unmask(irqno, INTMSK_DMA);
153}
154
155static void s3c2416_irq_dma_ack(unsigned int irqno)
156{
157 s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
158}
159
160static struct irq_chip s3c2416_irq_dma = {
161 .mask = s3c2416_irq_dma_mask,
162 .unmask = s3c2416_irq_dma_unmask,
163 .ack = s3c2416_irq_dma_ack,
164};
165
166
167/* UART3 sub interrupts */
168
169static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
170{
171 s3c2416_irq_demux(IRQ_S3C2443_UART3, 3);
172}
173
174#define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
175#define SUBMSK_UART3 (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
176
177
178static void s3c2416_irq_uart3_mask(unsigned int irqno)
179{
180 s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
181}
182
183static void s3c2416_irq_uart3_unmask(unsigned int irqno)
184{
185 s3c_irqsub_unmask(irqno, INTMSK_UART3);
186}
187
188static void s3c2416_irq_uart3_ack(unsigned int irqno)
189{
190 s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
191}
192
193static struct irq_chip s3c2416_irq_uart3 = {
194 .mask = s3c2416_irq_uart3_mask,
195 .unmask = s3c2416_irq_uart3_unmask,
196 .ack = s3c2416_irq_uart3_ack,
197};
198
199
200/* IRQ initialisation code */
201
202static int __init s3c2416_add_sub(unsigned int base,
203 void (*demux)(unsigned int,
204 struct irq_desc *),
205 struct irq_chip *chip,
206 unsigned int start, unsigned int end)
207{
208 unsigned int irqno;
209
210 set_irq_chip(base, &s3c_irq_level_chip);
211 set_irq_handler(base, handle_level_irq);
212 set_irq_chained_handler(base, demux);
213
214 for (irqno = start; irqno <= end; irqno++) {
215 set_irq_chip(irqno, chip);
216 set_irq_handler(irqno, handle_level_irq);
217 set_irq_flags(irqno, IRQF_VALID);
218 }
219
220 return 0;
221}
222
223static int __init s3c2416_irq_add(struct sys_device *sysdev)
224{
225 printk(KERN_INFO "S3C2416: IRQ Support\n");
226
227 s3c2416_add_sub(IRQ_LCD, s3c2416_irq_demux_lcd, &s3c2416_irq_lcd,
228 IRQ_S3C2443_LCD2, IRQ_S3C2443_LCD4);
229
230 s3c2416_add_sub(IRQ_S3C2443_DMA, s3c2416_irq_demux_dma,
231 &s3c2416_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
232
233 s3c2416_add_sub(IRQ_S3C2443_UART3, s3c2416_irq_demux_uart3,
234 &s3c2416_irq_uart3,
235 IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
236
237 s3c2416_add_sub(IRQ_WDT, s3c2416_irq_demux_wdtac97,
238 &s3c2416_irq_wdtac97,
239 IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
240
241 return 0;
242}
243
244static struct sysdev_driver s3c2416_irq_driver = {
245 .add = s3c2416_irq_add,
246};
247
248static int __init s3c2416_irq_init(void)
249{
250 return sysdev_driver_register(&s3c2416_sysclass, &s3c2416_irq_driver);
251}
252
253arch_initcall(s3c2416_irq_init);
254
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c
new file mode 100644
index 000000000000..5fc3f67ef265
--- /dev/null
+++ b/arch/arm/mach-s3c2416/mach-smdk2416.c
@@ -0,0 +1,206 @@
1/* linux/arch/arm/mach-s3c2416/mach-hanlin_v3c.c
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4 * as part of OpenInkpot project
5 * Copyright (c) 2009 Promwad Innovation Company
6 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/mtd/partitions.h>
24#include <linux/gpio.h>
25#include <linux/fb.h>
26
27#include <asm/mach/arch.h>
28#include <asm/mach/map.h>
29#include <asm/mach/irq.h>
30
31#include <mach/hardware.h>
32#include <asm/irq.h>
33#include <asm/mach-types.h>
34
35#include <plat/regs-serial.h>
36#include <mach/regs-gpio.h>
37#include <mach/regs-lcd.h>
38
39#include <mach/idle.h>
40#include <mach/leds-gpio.h>
41#include <plat/iic.h>
42
43#include <plat/s3c2416.h>
44#include <plat/gpio-cfg.h>
45#include <plat/clock.h>
46#include <plat/devs.h>
47#include <plat/cpu.h>
48#include <plat/nand.h>
49
50#include <plat/regs-fb-v4.h>
51#include <plat/fb.h>
52
53#include <plat/common-smdk.h>
54
55static struct map_desc smdk2416_iodesc[] __initdata = {
56 /* ISA IO Space map (memory space selected by A24) */
57
58 {
59 .virtual = (u32)S3C24XX_VA_ISA_WORD,
60 .pfn = __phys_to_pfn(S3C2410_CS2),
61 .length = 0x10000,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
65 .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
66 .length = SZ_4M,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
70 .pfn = __phys_to_pfn(S3C2410_CS2),
71 .length = 0x10000,
72 .type = MT_DEVICE,
73 }, {
74 .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
75 .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
76 .length = SZ_4M,
77 .type = MT_DEVICE,
78 }
79};
80
81#define UCON (S3C2410_UCON_DEFAULT | \
82 S3C2440_UCON_PCLK | \
83 S3C2443_UCON_RXERR_IRQEN)
84
85#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
86
87#define UFCON (S3C2410_UFCON_RXTRIG8 | \
88 S3C2410_UFCON_FIFOMODE | \
89 S3C2440_UFCON_TXTRIG16)
90
91static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = {
92 [0] = {
93 .hwport = 0,
94 .flags = 0,
95 .ucon = UCON,
96 .ulcon = ULCON,
97 .ufcon = UFCON,
98 },
99 [1] = {
100 .hwport = 1,
101 .flags = 0,
102 .ucon = UCON,
103 .ulcon = ULCON,
104 .ufcon = UFCON,
105 },
106 /* IR port */
107 [2] = {
108 .hwport = 2,
109 .flags = 0,
110 .ucon = UCON,
111 .ulcon = ULCON | 0x50,
112 .ufcon = UFCON,
113 }
114};
115
116struct s3c_fb_pd_win smdk2416_fb_win[] = {
117 [0] = {
118 /* think this is the same as the smdk6410 */
119 .win_mode = {
120 .pixclock = 41094,
121 .left_margin = 8,
122 .right_margin = 13,
123 .upper_margin = 7,
124 .lower_margin = 5,
125 .hsync_len = 3,
126 .vsync_len = 1,
127 .xres = 800,
128 .yres = 480,
129 },
130 .default_bpp = 16,
131 .max_bpp = 32,
132 },
133};
134
135static void s3c2416_fb_gpio_setup_24bpp(void)
136{
137 unsigned int gpio;
138
139 for (gpio = S3C2410_GPC(1); gpio <= S3C2410_GPC(4); gpio++) {
140 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
141 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
142 }
143
144 for (gpio = S3C2410_GPC(8); gpio <= S3C2410_GPC(15); gpio++) {
145 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
146 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
147 }
148
149 for (gpio = S3C2410_GPD(0); gpio <= S3C2410_GPD(15); gpio++) {
150 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
151 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
152 }
153}
154
155static struct s3c_fb_platdata smdk2416_fb_platdata = {
156 .win[0] = &smdk2416_fb_win[0],
157 .setup_gpio = s3c2416_fb_gpio_setup_24bpp,
158 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
159 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
160};
161
162static struct platform_device *smdk2416_devices[] __initdata = {
163 &s3c_device_fb,
164 &s3c_device_wdt,
165 &s3c_device_ohci,
166 &s3c_device_i2c0,
167 &s3c_device_hsmmc0,
168 &s3c_device_hsmmc1,
169};
170
171static void __init smdk2416_map_io(void)
172{
173 s3c24xx_init_io(smdk2416_iodesc, ARRAY_SIZE(smdk2416_iodesc));
174 s3c24xx_init_clocks(12000000);
175 s3c24xx_init_uarts(smdk2416_uartcfgs, ARRAY_SIZE(smdk2416_uartcfgs));
176}
177
178static void __init smdk2416_machine_init(void)
179{
180 s3c_i2c0_set_platdata(NULL);
181 s3c_fb_set_platdata(&smdk2416_fb_platdata);
182
183 gpio_request(S3C2410_GPB(4), "USBHost Power");
184 gpio_direction_output(S3C2410_GPB(4), 1);
185
186 gpio_request(S3C2410_GPB(3), "Display Power");
187 gpio_direction_output(S3C2410_GPB(3), 1);
188
189 gpio_request(S3C2410_GPB(1), "Display Reset");
190 gpio_direction_output(S3C2410_GPB(1), 1);
191
192 platform_add_devices(smdk2416_devices, ARRAY_SIZE(smdk2416_devices));
193 smdk_machine_init();
194}
195
196MACHINE_START(SMDK2416, "SMDK2416")
197 /* Maintainer: Yauhen Kharuzhy <jekhor@gmail.com> */
198 .phys_io = S3C2410_PA_UART,
199 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
200 .boot_params = S3C2410_SDRAM_PA + 0x100,
201
202 .init_irq = s3c24xx_init_irq,
203 .map_io = smdk2416_map_io,
204 .init_machine = smdk2416_machine_init,
205 .timer = &s3c24xx_timer,
206MACHINE_END
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
new file mode 100644
index 000000000000..35dabccd0ac2
--- /dev/null
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -0,0 +1,130 @@
1/* linux/arch/arm/mach-s3c2416/s3c2416.c
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4 * as part of OpenInkpot project
5 * Copyright (c) 2009 Promwad Innovation Company
6 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7 *
8 * Samsung S3C2416 Mobile CPU support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23*/
24
25#include <linux/kernel.h>
26#include <linux/types.h>
27#include <linux/interrupt.h>
28#include <linux/list.h>
29#include <linux/timer.h>
30#include <linux/init.h>
31#include <linux/gpio.h>
32#include <linux/platform_device.h>
33#include <linux/serial_core.h>
34#include <linux/sysdev.h>
35#include <linux/clk.h>
36#include <linux/io.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41
42#include <mach/hardware.h>
43#include <asm/proc-fns.h>
44#include <asm/irq.h>
45
46#include <mach/reset.h>
47#include <mach/idle.h>
48#include <mach/regs-s3c2443-clock.h>
49
50#include <plat/gpio-core.h>
51#include <plat/gpio-cfg.h>
52#include <plat/gpio-cfg-helpers.h>
53#include <plat/s3c2416.h>
54#include <plat/devs.h>
55#include <plat/cpu.h>
56
57#include <plat/iic-core.h>
58
59static struct map_desc s3c2416_iodesc[] __initdata = {
60 IODESC_ENT(WATCHDOG),
61 IODESC_ENT(CLKPWR),
62 IODESC_ENT(TIMER),
63};
64
65struct sysdev_class s3c2416_sysclass = {
66 .name = "s3c2416-core",
67};
68
69static struct sys_device s3c2416_sysdev = {
70 .cls = &s3c2416_sysclass,
71};
72
73static void s3c2416_hard_reset(void)
74{
75 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
76}
77
78int __init s3c2416_init(void)
79{
80 printk(KERN_INFO "S3C2416: Initializing architecture\n");
81
82 s3c24xx_reset_hook = s3c2416_hard_reset;
83 /* s3c24xx_idle = s3c2416_idle; */
84
85 /* change WDT IRQ number */
86 s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
87 s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
88
89 /* the i2c devices are directly compatible with s3c2440 */
90 s3c_i2c0_setname("s3c2440-i2c");
91 s3c_i2c1_setname("s3c2440-i2c");
92
93 s3c_device_fb.name = "s3c2443-fb";
94
95 return sysdev_register(&s3c2416_sysdev);
96}
97
98void __init s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no)
99{
100 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
101
102 s3c_device_nand.name = "s3c2416-nand";
103}
104
105/* s3c2416_map_io
106 *
107 * register the standard cpu IO areas, and any passed in from the
108 * machine specific initialisation.
109 */
110
111void __init s3c2416_map_io(void)
112{
113 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_updown;
114 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_updown;
115
116 iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
117}
118
119/* need to register class before we actually register the device, and
120 * we also need to ensure that it has been initialised before any of the
121 * drivers even try to use it (even if not on an s3c2416 based system)
122 * as a driver which may support both 2443 and 2440 may try and use it.
123*/
124
125static int __init s3c2416_core_init(void)
126{
127 return sysdev_class_register(&s3c2416_sysclass);
128}
129
130core_initcall(s3c2416_core_init);
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 7f465265cf04..cd8e7de388f0 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -6,6 +6,7 @@ config CPU_S3C2440
6 bool 6 bool
7 depends on ARCH_S3C2410 7 depends on ARCH_S3C2410
8 select CPU_ARM920T 8 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP
9 select S3C2410_CLOCK 10 select S3C2410_CLOCK
10 select S3C2410_PM if PM 11 select S3C2410_PM if PM
11 select S3C2410_GPIO 12 select S3C2410_GPIO
@@ -187,4 +188,17 @@ config MACH_MINI2440
187 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board 188 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
188 available via various sources. It can come with a 3.5" or 7" touch LCD. 189 available via various sources. It can come with a 3.5" or 7" touch LCD.
189 190
191config MACH_RX1950
192 bool "HP iPAQ rx1950"
193 select CPU_S3C2442
194 select S3C24XX_DCLK
195 select PM_H1940 if PM
196 select I2C
197 select S3C2410_PWM
198 select S3C_DEV_NAND
199 select S3C2410_IOTIMING if S3C2440_CPUFREQ
200 select S3C2440_XTAL_16934400
201 help
202 Say Y here if you're using HP iPAQ rx1950
203
190endmenu 204endmenu
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index c85ba32d8956..d5440fa34b04 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
34obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o 34obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o
35obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o 35obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o
36obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o 36obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
37obj-$(CONFIG_MACH_RX1950) += mach-rx1950.o
37 38
38# extra machine support 39# extra machine support
39 40
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 571b17683d96..a76bcda210ad 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -53,6 +53,7 @@
53#include <linux/mtd/nand_ecc.h> 53#include <linux/mtd/nand_ecc.h>
54#include <linux/mtd/partitions.h> 54#include <linux/mtd/partitions.h>
55 55
56#include <plat/gpio-cfg.h>
56#include <plat/clock.h> 57#include <plat/clock.h>
57#include <plat/devs.h> 58#include <plat/devs.h>
58#include <plat/cpu.h> 59#include <plat/cpu.h>
@@ -102,10 +103,10 @@ static void mini2440_udc_pullup(enum s3c2410_udc_cmd_e cmd)
102 103
103 switch (cmd) { 104 switch (cmd) {
104 case S3C2410_UDC_P_ENABLE : 105 case S3C2410_UDC_P_ENABLE :
105 s3c2410_gpio_setpin(S3C2410_GPC(5), 1); 106 gpio_set_value(S3C2410_GPC(5), 1);
106 break; 107 break;
107 case S3C2410_UDC_P_DISABLE : 108 case S3C2410_UDC_P_DISABLE :
108 s3c2410_gpio_setpin(S3C2410_GPC(5), 0); 109 gpio_set_value(S3C2410_GPC(5), 0);
109 break; 110 break;
110 case S3C2410_UDC_P_RESET : 111 case S3C2410_UDC_P_RESET :
111 break; 112 break;
@@ -632,25 +633,25 @@ static void __init mini2440_init(void)
632 mini2440_parse_features(&features, mini2440_features_str); 633 mini2440_parse_features(&features, mini2440_features_str);
633 634
634 /* turn LCD on */ 635 /* turn LCD on */
635 s3c2410_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); 636 s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND);
636 637
637 /* Turn the backlight early on */ 638 /* Turn the backlight early on */
638 s3c2410_gpio_setpin(S3C2410_GPG(4), 1); 639 WARN_ON(gpio_request(S3C2410_GPG(4), "backlight"));
639 s3c2410_gpio_cfgpin(S3C2410_GPG(4), S3C2410_GPIO_OUTPUT); 640 gpio_direction_output(S3C2410_GPG(4), 1);
640 641
641 /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ 642 /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */
642 s3c2410_gpio_pullup(S3C2410_GPB(1), 0); 643 s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP);
643 s3c2410_gpio_setpin(S3C2410_GPB(1), 0); 644 s3c2410_gpio_setpin(S3C2410_GPB(1), 0);
644 s3c2410_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT); 645 s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT);
645 646
646 /* Make sure the D+ pullup pin is output */ 647 /* Make sure the D+ pullup pin is output */
647 s3c2410_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT); 648 WARN_ON(gpio_request(S3C2410_GPC(5), "udc pup"));
649 gpio_direction_output(S3C2410_GPC(5), 0);
648 650
649 /* mark the key as input, without pullups (there is one on the board) */ 651 /* mark the key as input, without pullups (there is one on the board) */
650 for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) { 652 for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) {
651 s3c2410_gpio_pullup(mini2440_buttons[i].gpio, 0); 653 s3c_gpio_setpull(mini2440_buttons[i].gpio, S3C_GPIO_PULL_UP);
652 s3c2410_gpio_cfgpin(mini2440_buttons[i].gpio, 654 s3c_gpio_cfgpin(mini2440_buttons[i].gpio, S3C2410_GPIO_INPUT);
653 S3C2410_GPIO_INPUT);
654 } 655 }
655 if (features.lcd_index != -1) { 656 if (features.lcd_index != -1) {
656 int li; 657 int li;
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 342041593f22..3ff62de45fde 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -40,6 +40,7 @@
40#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
41#include <plat/iic.h> 41#include <plat/iic.h>
42 42
43#include <plat/gpio-cfg.h>
43#include <plat/s3c2410.h> 44#include <plat/s3c2410.h>
44#include <plat/s3c244x.h> 45#include <plat/s3c244x.h>
45#include <plat/clock.h> 46#include <plat/clock.h>
@@ -122,15 +123,15 @@ static void __init nexcoder_sensorboard_init(void)
122{ 123{
123 // Initialize SCCB bus 124 // Initialize SCCB bus
124 s3c2410_gpio_setpin(S3C2410_GPE(14), 1); // IICSCL 125 s3c2410_gpio_setpin(S3C2410_GPE(14), 1); // IICSCL
125 s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPIO_OUTPUT); 126 s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPIO_OUTPUT);
126 s3c2410_gpio_setpin(S3C2410_GPE(15), 1); // IICSDA 127 s3c2410_gpio_setpin(S3C2410_GPE(15), 1); // IICSDA
127 s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPIO_OUTPUT); 128 s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPIO_OUTPUT);
128 129
129 // Power up the sensor board 130 // Power up the sensor board
130 s3c2410_gpio_setpin(S3C2410_GPF(1), 1); 131 s3c2410_gpio_setpin(S3C2410_GPF(1), 1);
131 s3c2410_gpio_cfgpin(S3C2410_GPF(1), S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN 132 s3c_gpio_cfgpin(S3C2410_GPF(1), S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN
132 s3c2410_gpio_setpin(S3C2410_GPF(2), 0); 133 s3c2410_gpio_setpin(S3C2410_GPF(2), 0);
133 s3c2410_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN 134 s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN
134} 135}
135 136
136static void __init nexcoder_map_io(void) 137static void __init nexcoder_map_io(void)
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index f35371db33f5..319458da71a0 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -49,6 +49,7 @@
49#include <linux/mtd/nand_ecc.h> 49#include <linux/mtd/nand_ecc.h>
50#include <linux/mtd/partitions.h> 50#include <linux/mtd/partitions.h>
51 51
52#include <plat/gpio-cfg.h>
52#include <plat/clock.h> 53#include <plat/clock.h>
53#include <plat/devs.h> 54#include <plat/devs.h>
54#include <plat/cpu.h> 55#include <plat/cpu.h>
@@ -298,7 +299,7 @@ static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
298 299
299 /* ensure that an nRESET is not generated on resume. */ 300 /* ensure that an nRESET is not generated on resume. */
300 s3c2410_gpio_setpin(S3C2410_GPA(21), 1); 301 s3c2410_gpio_setpin(S3C2410_GPA(21), 1);
301 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT); 302 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT);
302 303
303 return 0; 304 return 0;
304} 305}
@@ -310,7 +311,7 @@ static int osiris_pm_resume(struct sys_device *sd)
310 311
311 __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0); 312 __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
312 313
313 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); 314 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
314 315
315 return 0; 316 return 0;
316} 317}
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
new file mode 100644
index 000000000000..8603b577a24b
--- /dev/null
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -0,0 +1,582 @@
1/* linux/arch/arm/mach-s3c2440/mach-rx1950.c
2 *
3 * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev,
4 * Copyright (c) 2007-2010 Vasily Khoruzhick
5 *
6 * based on smdk2440 written by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/delay.h>
19#include <linux/timer.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/platform_device.h>
23#include <linux/serial_core.h>
24#include <linux/input.h>
25#include <linux/gpio_keys.h>
26#include <linux/sysdev.h>
27#include <linux/pwm_backlight.h>
28#include <linux/pwm.h>
29
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h>
32
33#include <linux/mmc/host.h>
34
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach-types.h>
38
39#include <mach/regs-gpio.h>
40#include <mach/regs-gpioj.h>
41#include <mach/h1940.h>
42#include <mach/fb.h>
43
44#include <plat/clock.h>
45#include <plat/regs-serial.h>
46#include <plat/regs-iic.h>
47#include <plat/mci.h>
48#include <plat/udc.h>
49#include <plat/nand.h>
50#include <plat/iic.h>
51#include <plat/devs.h>
52#include <plat/cpu.h>
53#include <plat/pm.h>
54#include <plat/irq.h>
55#include <plat/ts.h>
56
57#define LCD_PWM_PERIOD 192960
58#define LCD_PWM_DUTY 127353
59
60static struct map_desc rx1950_iodesc[] __initdata = {
61};
62
63static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
64 [0] = {
65 .name = "fclk",
66 .divisor = 0x0a,
67 .min_baud = 0,
68 .max_baud = 0,
69 },
70};
71
72static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
73 [0] = {
74 .hwport = 0,
75 .flags = 0,
76 .ucon = 0x3c5,
77 .ulcon = 0x03,
78 .ufcon = 0x51,
79 .clocks = rx1950_serial_clocks,
80 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
81 },
82 [1] = {
83 .hwport = 1,
84 .flags = 0,
85 .ucon = 0x3c5,
86 .ulcon = 0x03,
87 .ufcon = 0x51,
88 .clocks = rx1950_serial_clocks,
89 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
90 },
91 /* IR port */
92 [2] = {
93 .hwport = 2,
94 .flags = 0,
95 .ucon = 0x3c5,
96 .ulcon = 0x43,
97 .ufcon = 0xf1,
98 .clocks = rx1950_serial_clocks,
99 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
100 },
101};
102
103static struct s3c2410fb_display rx1950_display = {
104 .type = S3C2410_LCDCON1_TFT,
105 .width = 240,
106 .height = 320,
107 .xres = 240,
108 .yres = 320,
109 .bpp = 16,
110
111 .pixclock = 260000,
112 .left_margin = 10,
113 .right_margin = 20,
114 .hsync_len = 10,
115 .upper_margin = 2,
116 .lower_margin = 2,
117 .vsync_len = 2,
118
119 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
120 S3C2410_LCDCON5_INVVCLK |
121 S3C2410_LCDCON5_INVVLINE |
122 S3C2410_LCDCON5_INVVFRAME |
123 S3C2410_LCDCON5_HWSWP |
124 (0x02 << 13) |
125 (0x02 << 15),
126
127};
128
129static struct s3c2410fb_mach_info rx1950_lcd_cfg = {
130 .displays = &rx1950_display,
131 .num_displays = 1,
132 .default_display = 0,
133
134 .lpcsel = 0x02,
135 .gpccon = 0xaa9556a9,
136 .gpccon_mask = 0xffc003fc,
137 .gpcup = 0x0000ffff,
138 .gpcup_mask = 0xffffffff,
139
140 .gpdcon = 0xaa90aaa1,
141 .gpdcon_mask = 0xffc0fff0,
142 .gpdup = 0x0000fcfd,
143 .gpdup_mask = 0xffffffff,
144
145};
146
147static struct pwm_device *lcd_pwm;
148
149void rx1950_lcd_power(int enable)
150{
151 int i;
152 static int enabled;
153 if (enabled == enable)
154 return;
155 if (!enable) {
156
157 /* GPC11-GPC15->OUTPUT */
158 for (i = 11; i < 16; i++)
159 gpio_direction_output(S3C2410_GPC(i), 1);
160
161 /* Wait a bit here... */
162 mdelay(100);
163
164 /* GPD2-GPD7->OUTPUT */
165 /* GPD11-GPD15->OUTPUT */
166 /* GPD2-GPD7->1, GPD11-GPD15->1 */
167 for (i = 2; i < 8; i++)
168 gpio_direction_output(S3C2410_GPD(i), 1);
169 for (i = 11; i < 16; i++)
170 gpio_direction_output(S3C2410_GPD(i), 1);
171
172 /* Wait a bit here...*/
173 mdelay(100);
174
175 /* GPB0->OUTPUT, GPB0->0 */
176 gpio_direction_output(S3C2410_GPB(0), 0);
177
178 /* GPC1-GPC4->OUTPUT, GPC1-4->0 */
179 for (i = 1; i < 5; i++)
180 gpio_direction_output(S3C2410_GPC(i), 0);
181
182 /* GPC15-GPC11->0 */
183 for (i = 11; i < 16; i++)
184 gpio_direction_output(S3C2410_GPC(i), 0);
185
186 /* GPD15-GPD11->0, GPD2->GPD7->0 */
187 for (i = 11; i < 16; i++)
188 gpio_direction_output(S3C2410_GPD(i), 0);
189
190 for (i = 2; i < 8; i++)
191 gpio_direction_output(S3C2410_GPD(i), 0);
192
193 /* GPC6->0, GPC7->0, GPC5->0 */
194 gpio_direction_output(S3C2410_GPC(6), 0);
195 gpio_direction_output(S3C2410_GPC(7), 0);
196 gpio_direction_output(S3C2410_GPC(5), 0);
197
198 /* GPB1->OUTPUT, GPB1->0 */
199 gpio_direction_output(S3C2410_GPB(1), 0);
200 pwm_config(lcd_pwm, 0, LCD_PWM_PERIOD);
201 pwm_disable(lcd_pwm);
202
203 /* GPC0->0, GPC10->0 */
204 gpio_direction_output(S3C2410_GPC(0), 0);
205 gpio_direction_output(S3C2410_GPC(10), 0);
206 } else {
207 pwm_config(lcd_pwm, LCD_PWM_DUTY, LCD_PWM_PERIOD);
208 pwm_enable(lcd_pwm);
209
210 gpio_direction_output(S3C2410_GPC(0), 1);
211 gpio_direction_output(S3C2410_GPC(5), 1);
212
213 s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPB1_TOUT1);
214 gpio_direction_output(S3C2410_GPC(7), 1);
215
216 for (i = 1; i < 5; i++)
217 s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2));
218
219 for (i = 11; i < 16; i++)
220 s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2));
221
222 for (i = 2; i < 8; i++)
223 s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2));
224
225 for (i = 11; i < 16; i++)
226 s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2));
227
228 gpio_direction_output(S3C2410_GPC(10), 1);
229 gpio_direction_output(S3C2410_GPC(6), 1);
230 }
231 enabled = enable;
232}
233
234static void rx1950_bl_power(int enable)
235{
236 static int enabled;
237 if (enabled == enable)
238 return;
239 if (!enable) {
240 gpio_direction_output(S3C2410_GPB(0), 0);
241 } else {
242 /* LED driver need a "push" to power on */
243 gpio_direction_output(S3C2410_GPB(0), 1);
244 /* Warm up backlight for one period of PWM.
245 * Without this trick its almost impossible to
246 * enable backlight with low brightness value
247 */
248 ndelay(48000);
249 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0);
250 }
251 enabled = enable;
252}
253
254static int rx1950_backlight_init(struct device *dev)
255{
256 WARN_ON(gpio_request(S3C2410_GPB(0), "Backlight"));
257 lcd_pwm = pwm_request(1, "RX1950 LCD");
258 if (IS_ERR(lcd_pwm)) {
259 dev_err(dev, "Unable to request PWM for LCD power!\n");
260 return PTR_ERR(lcd_pwm);
261 }
262
263 rx1950_lcd_power(1);
264 rx1950_bl_power(1);
265
266 return 0;
267}
268
269static void rx1950_backlight_exit(struct device *dev)
270{
271 rx1950_bl_power(0);
272 rx1950_lcd_power(0);
273
274 pwm_free(lcd_pwm);
275 gpio_free(S3C2410_GPB(0));
276}
277
278
279static int rx1950_backlight_notify(struct device *dev, int brightness)
280{
281 if (!brightness) {
282 rx1950_bl_power(0);
283 rx1950_lcd_power(0);
284 } else {
285 rx1950_lcd_power(1);
286 rx1950_bl_power(1);
287 }
288 return brightness;
289}
290
291static struct platform_pwm_backlight_data rx1950_backlight_data = {
292 .pwm_id = 0,
293 .max_brightness = 24,
294 .dft_brightness = 4,
295 .pwm_period_ns = 48000,
296 .init = rx1950_backlight_init,
297 .notify = rx1950_backlight_notify,
298 .exit = rx1950_backlight_exit,
299};
300
301static struct platform_device rx1950_backlight = {
302 .name = "pwm-backlight",
303 .dev = {
304 .parent = &s3c_device_timer[0].dev,
305 .platform_data = &rx1950_backlight_data,
306 },
307};
308
309static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd)
310{
311 switch (power_mode) {
312 case MMC_POWER_OFF:
313 gpio_direction_output(S3C2410_GPJ(1), 0);
314 break;
315 case MMC_POWER_UP:
316 case MMC_POWER_ON:
317 gpio_direction_output(S3C2410_GPJ(1), 1);
318 break;
319 default:
320 break;
321 }
322}
323
324static struct s3c24xx_mci_pdata rx1950_mmc_cfg __initdata = {
325 .gpio_detect = S3C2410_GPF(5),
326 .gpio_wprotect = S3C2410_GPH(8),
327 .set_power = rx1950_set_mmc_power,
328 .ocr_avail = MMC_VDD_32_33,
329};
330
331static struct mtd_partition rx1950_nand_part[] = {
332 [0] = {
333 .name = "Boot0",
334 .offset = 0,
335 .size = 0x4000,
336 .mask_flags = MTD_WRITEABLE,
337 },
338 [1] = {
339 .name = "Boot1",
340 .offset = MTDPART_OFS_APPEND,
341 .size = 0x40000,
342 .mask_flags = MTD_WRITEABLE,
343 },
344 [2] = {
345 .name = "Kernel",
346 .offset = MTDPART_OFS_APPEND,
347 .size = 0x300000,
348 .mask_flags = 0,
349 },
350 [3] = {
351 .name = "Filesystem",
352 .offset = MTDPART_OFS_APPEND,
353 .size = MTDPART_SIZ_FULL,
354 .mask_flags = 0,
355 },
356};
357
358static struct s3c2410_nand_set rx1950_nand_sets[] = {
359 [0] = {
360 .name = "Internal",
361 .nr_chips = 1,
362 .nr_partitions = ARRAY_SIZE(rx1950_nand_part),
363 .partitions = rx1950_nand_part,
364 },
365};
366
367static struct s3c2410_platform_nand rx1950_nand_info = {
368 .tacls = 25,
369 .twrph0 = 50,
370 .twrph1 = 15,
371 .nr_sets = ARRAY_SIZE(rx1950_nand_sets),
372 .sets = rx1950_nand_sets,
373};
374
375static void rx1950_udc_pullup(enum s3c2410_udc_cmd_e cmd)
376{
377 switch (cmd) {
378 case S3C2410_UDC_P_ENABLE:
379 gpio_direction_output(S3C2410_GPJ(5), 1);
380 break;
381 case S3C2410_UDC_P_DISABLE:
382 gpio_direction_output(S3C2410_GPJ(5), 0);
383 break;
384 case S3C2410_UDC_P_RESET:
385 break;
386 default:
387 break;
388 }
389}
390
391static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = {
392 .udc_command = rx1950_udc_pullup,
393 .vbus_pin = S3C2410_GPG(5),
394 .vbus_pin_inverted = 1,
395};
396
397static struct s3c2410_ts_mach_info rx1950_ts_cfg __initdata = {
398 .delay = 10000,
399 .presc = 49,
400 .oversampling_shift = 3,
401};
402
403static struct gpio_keys_button rx1950_gpio_keys_table[] = {
404 {
405 .code = KEY_POWER,
406 .gpio = S3C2410_GPF(0),
407 .active_low = 1,
408 .desc = "Power button",
409 .wakeup = 1,
410 },
411 {
412 .code = KEY_F5,
413 .gpio = S3C2410_GPF(7),
414 .active_low = 1,
415 .desc = "Record button",
416 },
417 {
418 .code = KEY_F1,
419 .gpio = S3C2410_GPG(0),
420 .active_low = 1,
421 .desc = "Calendar button",
422 },
423 {
424 .code = KEY_F2,
425 .gpio = S3C2410_GPG(2),
426 .active_low = 1,
427 .desc = "Contacts button",
428 },
429 {
430 .code = KEY_F3,
431 .gpio = S3C2410_GPG(3),
432 .active_low = 1,
433 .desc = "Mail button",
434 },
435 {
436 .code = KEY_F4,
437 .gpio = S3C2410_GPG(7),
438 .active_low = 1,
439 .desc = "WLAN button",
440 },
441 {
442 .code = KEY_LEFT,
443 .gpio = S3C2410_GPG(10),
444 .active_low = 1,
445 .desc = "Left button",
446 },
447 {
448 .code = KEY_RIGHT,
449 .gpio = S3C2410_GPG(11),
450 .active_low = 1,
451 .desc = "Right button",
452 },
453 {
454 .code = KEY_UP,
455 .gpio = S3C2410_GPG(4),
456 .active_low = 1,
457 .desc = "Up button",
458 },
459 {
460 .code = KEY_DOWN,
461 .gpio = S3C2410_GPG(6),
462 .active_low = 1,
463 .desc = "Down button",
464 },
465 {
466 .code = KEY_ENTER,
467 .gpio = S3C2410_GPG(9),
468 .active_low = 1,
469 .desc = "Ok button"
470 },
471};
472
473static struct gpio_keys_platform_data rx1950_gpio_keys_data = {
474 .buttons = rx1950_gpio_keys_table,
475 .nbuttons = ARRAY_SIZE(rx1950_gpio_keys_table),
476};
477
478static struct platform_device rx1950_device_gpiokeys = {
479 .name = "gpio-keys",
480 .dev.platform_data = &rx1950_gpio_keys_data,
481};
482
483static struct s3c2410_platform_i2c rx1950_i2c_data = {
484 .flags = 0,
485 .slave_addr = 0x42,
486 .frequency = 400 * 1000,
487 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
488};
489
490static struct platform_device *rx1950_devices[] __initdata = {
491 &s3c_device_lcd,
492 &s3c_device_wdt,
493 &s3c_device_i2c0,
494 &s3c_device_iis,
495 &s3c_device_usbgadget,
496 &s3c_device_rtc,
497 &s3c_device_nand,
498 &s3c_device_sdi,
499 &s3c_device_adc,
500 &s3c_device_ts,
501 &s3c_device_timer[0],
502 &s3c_device_timer[1],
503 &rx1950_backlight,
504 &rx1950_device_gpiokeys,
505};
506
507static struct clk *rx1950_clocks[] __initdata = {
508 &s3c24xx_clkout0,
509 &s3c24xx_clkout1,
510};
511
512static void __init rx1950_map_io(void)
513{
514 s3c24xx_clkout0.parent = &clk_h;
515 s3c24xx_clkout1.parent = &clk_f;
516
517 s3c24xx_register_clocks(rx1950_clocks, ARRAY_SIZE(rx1950_clocks));
518
519 s3c24xx_init_io(rx1950_iodesc, ARRAY_SIZE(rx1950_iodesc));
520 s3c24xx_init_clocks(16934000);
521 s3c24xx_init_uarts(rx1950_uartcfgs, ARRAY_SIZE(rx1950_uartcfgs));
522
523 /* setup PM */
524
525#ifdef CONFIG_PM_H1940
526 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 8);
527#endif
528
529 s3c_pm_init();
530}
531
532static void __init rx1950_init_machine(void)
533{
534 int i;
535
536 s3c24xx_fb_set_platdata(&rx1950_lcd_cfg);
537 s3c24xx_udc_set_platdata(&rx1950_udc_cfg);
538 s3c24xx_ts_set_platdata(&rx1950_ts_cfg);
539 s3c24xx_mci_set_platdata(&rx1950_mmc_cfg);
540 s3c_i2c0_set_platdata(&rx1950_i2c_data);
541 s3c_nand_set_platdata(&rx1950_nand_info);
542
543 /* Turn off suspend on both USB ports, and switch the
544 * selectable USB port to USB device mode. */
545 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
546 S3C2410_MISCCR_USBSUSPND0 |
547 S3C2410_MISCCR_USBSUSPND1, 0x0);
548
549 WARN_ON(gpio_request(S3C2410_GPJ(5), "UDC pullup"));
550 gpio_direction_output(S3C2410_GPJ(5), 0);
551
552 /* mmc power is disabled by default */
553 WARN_ON(gpio_request(S3C2410_GPJ(1), "MMC power"));
554 gpio_direction_output(S3C2410_GPJ(1), 0);
555
556 for (i = 0; i < 8; i++)
557 WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power"));
558
559 for (i = 10; i < 16; i++)
560 WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power"));
561
562 for (i = 2; i < 8; i++)
563 WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power"));
564
565 for (i = 11; i < 16; i++)
566 WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power"));
567
568 WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power"));
569
570 platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices));
571}
572
573MACHINE_START(RX1950, "HP iPAQ RX1950")
574 /* Maintainers: Vasily Khoruzhick */
575 .phys_io = S3C2410_PA_UART,
576 .io_pg_offst = (((u32) S3C24XX_VA_UART) >> 18) & 0xfffc,
577 .boot_params = S3C2410_SDRAM_PA + 0x100,
578 .map_io = rx1950_map_io,
579 .init_irq = s3c24xx_init_irq,
580 .init_machine = rx1950_init_machine,
581 .timer = &s3c24xx_timer,
582MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 1e836e506f8b..d2946de3f365 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -209,7 +209,7 @@ static void __init rx3715_init_machine(void)
209} 209}
210 210
211MACHINE_START(RX3715, "IPAQ-RX3715") 211MACHINE_START(RX3715, "IPAQ-RX3715")
212 /* Maintainer: Ben Dooks <ben@fluff.org> */ 212 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
213 .phys_io = S3C2410_PA_UART, 213 .phys_io = S3C2410_PA_UART,
214 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 214 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
215 .boot_params = S3C2410_SDRAM_PA + 0x100, 215 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 3ac3d636d615..df83276d85ae 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -174,7 +174,7 @@ static void __init smdk2440_machine_init(void)
174} 174}
175 175
176MACHINE_START(S3C2440, "SMDK2440") 176MACHINE_START(S3C2440, "SMDK2440")
177 /* Maintainer: Ben Dooks <ben@fluff.org> */ 177 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
178 .phys_io = S3C2410_PA_UART, 178 .phys_io = S3C2410_PA_UART,
179 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 179 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
180 .boot_params = S3C2410_SDRAM_PA + 0x100, 180 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 2b68f7ea45ae..d50f3ae6173d 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -19,6 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/sysdev.h> 21#include <linux/sysdev.h>
22#include <linux/gpio.h>
22#include <linux/clk.h> 23#include <linux/clk.h>
23#include <linux/io.h> 24#include <linux/io.h>
24 25
@@ -33,6 +34,10 @@
33#include <plat/cpu.h> 34#include <plat/cpu.h>
34#include <plat/s3c244x.h> 35#include <plat/s3c244x.h>
35 36
37#include <plat/gpio-core.h>
38#include <plat/gpio-cfg.h>
39#include <plat/gpio-cfg-helpers.h>
40
36static struct sys_device s3c2440_sysdev = { 41static struct sys_device s3c2440_sysdev = {
37 .cls = &s3c2440_sysclass, 42 .cls = &s3c2440_sysclass,
38}; 43};
@@ -41,6 +46,9 @@ int __init s3c2440_init(void)
41{ 46{
42 printk("S3C2440: Initialising architecture\n"); 47 printk("S3C2440: Initialising architecture\n");
43 48
49 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
50 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
51
44 /* change irq for watchdog */ 52 /* change irq for watchdog */
45 53
46 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; 54 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 698140af247c..4fef723126fa 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -8,6 +8,7 @@ config CPU_S3C2443
8 select S3C2443_DMA if S3C2410_DMA 8 select S3C2443_DMA if S3C2410_DMA
9 select CPU_LLSERIAL_S3C2440 9 select CPU_LLSERIAL_S3C2440
10 select SAMSUNG_CLKSRC 10 select SAMSUNG_CLKSRC
11 select S3C2443_CLOCK
11 help 12 help
12 Support for the S3C2443 SoC from the S3C24XX line 13 Support for the S3C2443 SoC from the S3C24XX line
13 14
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 62cd4eaee01b..83b1aa63d778 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -21,6 +21,7 @@
21*/ 21*/
22 22
23#include <linux/init.h> 23#include <linux/init.h>
24
24#include <linux/module.h> 25#include <linux/module.h>
25#include <linux/kernel.h> 26#include <linux/kernel.h>
26#include <linux/list.h> 27#include <linux/list.h>
@@ -54,111 +55,13 @@
54 * set the correct muxing at initialisation 55 * set the correct muxing at initialisation
55*/ 56*/
56 57
57static int s3c2443_gate(void __iomem *reg, struct clk *clk, int enable)
58{
59 u32 ctrlbit = clk->ctrlbit;
60 u32 con = __raw_readl(reg);
61
62 if (enable)
63 con |= ctrlbit;
64 else
65 con &= ~ctrlbit;
66
67 __raw_writel(con, reg);
68 return 0;
69}
70
71static int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
72{
73 return s3c2443_gate(S3C2443_HCLKCON, clk, enable);
74}
75
76static int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
77{
78 return s3c2443_gate(S3C2443_PCLKCON, clk, enable);
79}
80
81static int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
82{
83 return s3c2443_gate(S3C2443_SCLKCON, clk, enable);
84}
85
86/* clock selections */ 58/* clock selections */
87 59
88/* mpllref is a direct descendant of clk_xtal by default, but it is not
89 * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as
90 * such directly equating the two source clocks is impossible.
91 */
92static struct clk clk_mpllref = {
93 .name = "mpllref",
94 .parent = &clk_xtal,
95 .id = -1,
96};
97
98static struct clk clk_i2s_ext = { 60static struct clk clk_i2s_ext = {
99 .name = "i2s-ext", 61 .name = "i2s-ext",
100 .id = -1, 62 .id = -1,
101}; 63};
102 64
103static struct clk *clk_epllref_sources[] = {
104 [0] = &clk_mpllref,
105 [1] = &clk_mpllref,
106 [2] = &clk_xtal,
107 [3] = &clk_ext,
108};
109
110static struct clksrc_clk clk_epllref = {
111 .clk = {
112 .name = "epllref",
113 .id = -1,
114 },
115 .sources = &(struct clksrc_sources) {
116 .sources = clk_epllref_sources,
117 .nr_sources = ARRAY_SIZE(clk_epllref_sources),
118 },
119 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 7 },
120};
121
122static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
123{
124 unsigned long parent_rate = clk_get_rate(clk->parent);
125 unsigned long div = __raw_readl(S3C2443_CLKDIV0);
126
127 div &= S3C2443_CLKDIV0_EXTDIV_MASK;
128 div >>= (S3C2443_CLKDIV0_EXTDIV_SHIFT-1); /* x2 */
129
130 return parent_rate / (div + 1);
131}
132
133static struct clk clk_mdivclk = {
134 .name = "mdivclk",
135 .parent = &clk_mpllref,
136 .id = -1,
137 .ops = &(struct clk_ops) {
138 .get_rate = s3c2443_getrate_mdivclk,
139 },
140};
141
142static struct clk *clk_msysclk_sources[] = {
143 [0] = &clk_mpllref,
144 [1] = &clk_mpll,
145 [2] = &clk_mdivclk,
146 [3] = &clk_mpllref,
147};
148
149static struct clksrc_clk clk_msysclk = {
150 .clk = {
151 .name = "msysclk",
152 .parent = &clk_xtal,
153 .id = -1,
154 },
155 .sources = &(struct clksrc_sources) {
156 .sources = clk_msysclk_sources,
157 .nr_sources = ARRAY_SIZE(clk_msysclk_sources),
158 },
159 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 3 },
160};
161
162/* armdiv 65/* armdiv
163 * 66 *
164 * this clock is sourced from msysclk and can have a number of 67 * this clock is sourced from msysclk and can have a number of
@@ -266,44 +169,6 @@ static struct clksrc_clk clk_arm = {
266 .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 }, 169 .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },
267}; 170};
268 171
269/* esysclk
270 *
271 * this is sourced from either the EPLL or the EPLLref clock
272*/
273
274static struct clk *clk_sysclk_sources[] = {
275 [0] = &clk_epllref.clk,
276 [1] = &clk_epll,
277};
278
279static struct clksrc_clk clk_esysclk = {
280 .clk = {
281 .name = "esysclk",
282 .parent = &clk_epll,
283 .id = -1,
284 },
285 .sources = &(struct clksrc_sources) {
286 .sources = clk_sysclk_sources,
287 .nr_sources = ARRAY_SIZE(clk_sysclk_sources),
288 },
289 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 6 },
290};
291
292/* uartclk
293 *
294 * UART baud-rate clock sourced from esysclk via a divisor
295*/
296
297static struct clksrc_clk clk_uart = {
298 .clk = {
299 .name = "uartclk",
300 .id = -1,
301 .parent = &clk_esysclk.clk,
302 },
303 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
304};
305
306
307/* hsspi 172/* hsspi
308 * 173 *
309 * high-speed spi clock, sourced from esysclk 174 * high-speed spi clock, sourced from esysclk
@@ -320,21 +185,6 @@ static struct clksrc_clk clk_hsspi = {
320 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 }, 185 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
321}; 186};
322 187
323/* usbhost
324 *
325 * usb host bus-clock, usually 48MHz to provide USB bus clock timing
326*/
327
328static struct clksrc_clk clk_usb_bus_host = {
329 .clk = {
330 .name = "usb-bus-host-parent",
331 .id = -1,
332 .parent = &clk_esysclk.clk,
333 .ctrlbit = S3C2443_SCLKCON_USBHOST,
334 .enable = s3c2443_clkcon_enable_s,
335 },
336 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
337};
338 188
339/* clk_hsmcc_div 189/* clk_hsmcc_div
340 * 190 *
@@ -433,89 +283,16 @@ static struct clksrc_clk clk_i2s = {
433 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 }, 283 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
434}; 284};
435 285
436/* cam-if
437 *
438 * camera interface bus-clock, divided down from esysclk
439*/
440
441static struct clksrc_clk clk_cam = {
442 .clk = {
443 .name = "camif-upll", /* same as 2440 name */
444 .id = -1,
445 .parent = &clk_esysclk.clk,
446 .ctrlbit = S3C2443_SCLKCON_CAMCLK,
447 .enable = s3c2443_clkcon_enable_s,
448 },
449 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 26 },
450};
451
452/* display-if
453 *
454 * display interface clock, divided from esysclk
455*/
456
457static struct clksrc_clk clk_display = {
458 .clk = {
459 .name = "display-if",
460 .id = -1,
461 .parent = &clk_esysclk.clk,
462 .ctrlbit = S3C2443_SCLKCON_DISPCLK,
463 .enable = s3c2443_clkcon_enable_s,
464 },
465 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 8, .shift = 16 },
466};
467
468/* prediv
469 *
470 * this divides the msysclk down to pass to h/p/etc.
471 */
472
473static unsigned long s3c2443_prediv_getrate(struct clk *clk)
474{
475 unsigned long rate = clk_get_rate(clk->parent);
476 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
477
478 clkdiv0 &= S3C2443_CLKDIV0_PREDIV_MASK;
479 clkdiv0 >>= S3C2443_CLKDIV0_PREDIV_SHIFT;
480
481 return rate / (clkdiv0 + 1);
482}
483
484static struct clk clk_prediv = {
485 .name = "prediv",
486 .id = -1,
487 .parent = &clk_msysclk.clk,
488 .ops = &(struct clk_ops) {
489 .get_rate = s3c2443_prediv_getrate,
490 },
491};
492
493/* standard clock definitions */ 286/* standard clock definitions */
494 287
495static struct clk init_clocks_disable[] = { 288static struct clk init_clocks_off[] = {
496 { 289 {
497 .name = "nand",
498 .id = -1,
499 .parent = &clk_h,
500 }, {
501 .name = "sdi", 290 .name = "sdi",
502 .id = -1, 291 .id = -1,
503 .parent = &clk_p, 292 .parent = &clk_p,
504 .enable = s3c2443_clkcon_enable_p, 293 .enable = s3c2443_clkcon_enable_p,
505 .ctrlbit = S3C2443_PCLKCON_SDI, 294 .ctrlbit = S3C2443_PCLKCON_SDI,
506 }, { 295 }, {
507 .name = "adc",
508 .id = -1,
509 .parent = &clk_p,
510 .enable = s3c2443_clkcon_enable_p,
511 .ctrlbit = S3C2443_PCLKCON_ADC,
512 }, {
513 .name = "i2c",
514 .id = -1,
515 .parent = &clk_p,
516 .enable = s3c2443_clkcon_enable_p,
517 .ctrlbit = S3C2443_PCLKCON_IIC,
518 }, {
519 .name = "iis", 296 .name = "iis",
520 .id = -1, 297 .id = -1,
521 .parent = &clk_p, 298 .parent = &clk_p,
@@ -537,179 +314,12 @@ static struct clk init_clocks_disable[] = {
537}; 314};
538 315
539static struct clk init_clocks[] = { 316static struct clk init_clocks[] = {
540 {
541 .name = "dma",
542 .id = 0,
543 .parent = &clk_h,
544 .enable = s3c2443_clkcon_enable_h,
545 .ctrlbit = S3C2443_HCLKCON_DMA0,
546 }, {
547 .name = "dma",
548 .id = 1,
549 .parent = &clk_h,
550 .enable = s3c2443_clkcon_enable_h,
551 .ctrlbit = S3C2443_HCLKCON_DMA1,
552 }, {
553 .name = "dma",
554 .id = 2,
555 .parent = &clk_h,
556 .enable = s3c2443_clkcon_enable_h,
557 .ctrlbit = S3C2443_HCLKCON_DMA2,
558 }, {
559 .name = "dma",
560 .id = 3,
561 .parent = &clk_h,
562 .enable = s3c2443_clkcon_enable_h,
563 .ctrlbit = S3C2443_HCLKCON_DMA3,
564 }, {
565 .name = "dma",
566 .id = 4,
567 .parent = &clk_h,
568 .enable = s3c2443_clkcon_enable_h,
569 .ctrlbit = S3C2443_HCLKCON_DMA4,
570 }, {
571 .name = "dma",
572 .id = 5,
573 .parent = &clk_h,
574 .enable = s3c2443_clkcon_enable_h,
575 .ctrlbit = S3C2443_HCLKCON_DMA5,
576 }, {
577 .name = "lcd",
578 .id = -1,
579 .parent = &clk_h,
580 .enable = s3c2443_clkcon_enable_h,
581 .ctrlbit = S3C2443_HCLKCON_LCDC,
582 }, {
583 .name = "gpio",
584 .id = -1,
585 .parent = &clk_p,
586 .enable = s3c2443_clkcon_enable_p,
587 .ctrlbit = S3C2443_PCLKCON_GPIO,
588 }, {
589 .name = "usb-host",
590 .id = -1,
591 .parent = &clk_h,
592 .enable = s3c2443_clkcon_enable_h,
593 .ctrlbit = S3C2443_HCLKCON_USBH,
594 }, {
595 .name = "usb-device",
596 .id = -1,
597 .parent = &clk_h,
598 .enable = s3c2443_clkcon_enable_h,
599 .ctrlbit = S3C2443_HCLKCON_USBD,
600 }, {
601 .name = "hsmmc",
602 .id = -1,
603 .parent = &clk_h,
604 .enable = s3c2443_clkcon_enable_h,
605 .ctrlbit = S3C2443_HCLKCON_HSMMC,
606 }, {
607 .name = "cfc",
608 .id = -1,
609 .parent = &clk_h,
610 .enable = s3c2443_clkcon_enable_h,
611 .ctrlbit = S3C2443_HCLKCON_CFC,
612 }, {
613 .name = "ssmc",
614 .id = -1,
615 .parent = &clk_h,
616 .enable = s3c2443_clkcon_enable_h,
617 .ctrlbit = S3C2443_HCLKCON_SSMC,
618 }, {
619 .name = "timers",
620 .id = -1,
621 .parent = &clk_p,
622 .enable = s3c2443_clkcon_enable_p,
623 .ctrlbit = S3C2443_PCLKCON_PWMT,
624 }, {
625 .name = "uart",
626 .id = 0,
627 .parent = &clk_p,
628 .enable = s3c2443_clkcon_enable_p,
629 .ctrlbit = S3C2443_PCLKCON_UART0,
630 }, {
631 .name = "uart",
632 .id = 1,
633 .parent = &clk_p,
634 .enable = s3c2443_clkcon_enable_p,
635 .ctrlbit = S3C2443_PCLKCON_UART1,
636 }, {
637 .name = "uart",
638 .id = 2,
639 .parent = &clk_p,
640 .enable = s3c2443_clkcon_enable_p,
641 .ctrlbit = S3C2443_PCLKCON_UART2,
642 }, {
643 .name = "uart",
644 .id = 3,
645 .parent = &clk_p,
646 .enable = s3c2443_clkcon_enable_p,
647 .ctrlbit = S3C2443_PCLKCON_UART3,
648 }, {
649 .name = "rtc",
650 .id = -1,
651 .parent = &clk_p,
652 .enable = s3c2443_clkcon_enable_p,
653 .ctrlbit = S3C2443_PCLKCON_RTC,
654 }, {
655 .name = "watchdog",
656 .id = -1,
657 .parent = &clk_p,
658 .ctrlbit = S3C2443_PCLKCON_WDT,
659 }, {
660 .name = "usb-bus-host",
661 .id = -1,
662 .parent = &clk_usb_bus_host.clk,
663 }, {
664 .name = "ac97",
665 .id = -1,
666 .parent = &clk_p,
667 .ctrlbit = S3C2443_PCLKCON_AC97,
668 }
669};
670
671/* clocks to add where we need to check their parentage */
672
673static struct clksrc_clk __initdata *init_list[] = {
674 &clk_epllref, /* should be first */
675 &clk_esysclk,
676 &clk_msysclk,
677 &clk_arm,
678 &clk_i2s_eplldiv,
679 &clk_i2s,
680 &clk_cam,
681 &clk_uart,
682 &clk_display,
683 &clk_hsmmc_div,
684 &clk_usb_bus_host,
685}; 317};
686 318
687static void __init s3c2443_clk_initparents(void)
688{
689 int ptr;
690
691 for (ptr = 0; ptr < ARRAY_SIZE(init_list); ptr++)
692 s3c_set_clksrc(init_list[ptr], true);
693}
694
695static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
696{
697 clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK;
698
699 return clkcon0 + 1;
700}
701
702/* clocks to add straight away */ 319/* clocks to add straight away */
703 320
704static struct clksrc_clk *clksrcs[] __initdata = { 321static struct clksrc_clk *clksrcs[] __initdata = {
705 &clk_usb_bus_host,
706 &clk_epllref,
707 &clk_esysclk,
708 &clk_msysclk,
709 &clk_arm, 322 &clk_arm,
710 &clk_uart,
711 &clk_display,
712 &clk_cam,
713 &clk_i2s_eplldiv, 323 &clk_i2s_eplldiv,
714 &clk_i2s, 324 &clk_i2s,
715 &clk_hsspi, 325 &clk_hsspi,
@@ -717,92 +327,32 @@ static struct clksrc_clk *clksrcs[] __initdata = {
717}; 327};
718 328
719static struct clk *clks[] __initdata = { 329static struct clk *clks[] __initdata = {
720 &clk_ext,
721 &clk_epll,
722 &clk_usb_bus,
723 &clk_mpllref,
724 &clk_hsmmc, 330 &clk_hsmmc,
725 &clk_armdiv, 331 &clk_armdiv,
726 &clk_prediv,
727}; 332};
728 333
729void __init_or_cpufreq s3c2443_setup_clocks(void) 334void __init_or_cpufreq s3c2443_setup_clocks(void)
730{ 335{
731 unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON); 336 s3c2443_common_setup_clocks(s3c2443_get_mpll, s3c2443_fclk_div);
732 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
733 struct clk *xtal_clk;
734 unsigned long xtal;
735 unsigned long pll;
736 unsigned long fclk;
737 unsigned long hclk;
738 unsigned long pclk;
739
740 xtal_clk = clk_get(NULL, "xtal");
741 xtal = clk_get_rate(xtal_clk);
742 clk_put(xtal_clk);
743
744 pll = s3c2443_get_mpll(mpllcon, xtal);
745 clk_msysclk.clk.rate = pll;
746
747 fclk = pll / s3c2443_fclk_div(clkdiv0);
748 hclk = s3c2443_prediv_getrate(&clk_prediv);
749 hclk /= s3c2443_get_hdiv(clkdiv0);
750 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);
751
752 s3c24xx_setup_clocks(fclk, hclk, pclk);
753
754 printk("S3C2443: mpll %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n",
755 (mpllcon & S3C2443_PLLCON_OFF) ? "off":"on",
756 print_mhz(pll), print_mhz(fclk),
757 print_mhz(hclk), print_mhz(pclk));
758
759 s3c24xx_setup_clocks(fclk, hclk, pclk);
760} 337}
761 338
762void __init s3c2443_init_clocks(int xtal) 339void __init s3c2443_init_clocks(int xtal)
763{ 340{
764 struct clk *clkp;
765 unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); 341 unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
766 int ret;
767 int ptr; 342 int ptr;
768 343
769 /* s3c2443 parents h and p clocks from prediv */ 344 clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
770 clk_h.parent = &clk_prediv; 345 clk_epll.parent = &clk_epllref.clk;
771 clk_p.parent = &clk_prediv; 346
347 s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, s3c2443_fclk_div);
772 348
773 s3c24xx_register_baseclocks(xtal);
774 s3c2443_setup_clocks(); 349 s3c2443_setup_clocks();
775 s3c2443_clk_initparents();
776
777 for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
778 clkp = clks[ptr];
779 350
780 ret = s3c24xx_register_clock(clkp); 351 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
781 if (ret < 0) {
782 printk(KERN_ERR "Failed to register clock %s (%d)\n",
783 clkp->name, ret);
784 }
785 }
786 352
787 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) 353 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
788 s3c_register_clksrc(clksrcs[ptr], 1); 354 s3c_register_clksrc(clksrcs[ptr], 1);
789 355
790 clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
791 clk_epll.parent = &clk_epllref.clk;
792 clk_usb_bus.parent = &clk_usb_bus_host.clk;
793
794 /* ensure usb bus clock is within correct rate of 48MHz */
795
796 if (clk_get_rate(&clk_usb_bus_host.clk) != (48 * 1000 * 1000)) {
797 printk(KERN_INFO "Warning: USB host bus not at 48MHz\n");
798 clk_set_rate(&clk_usb_bus_host.clk, 48*1000*1000);
799 }
800
801 printk("S3C2443: epll %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n",
802 (epllcon & S3C2443_PLLCON_OFF) ? "off":"on",
803 print_mhz(clk_get_rate(&clk_epll)),
804 print_mhz(clk_get_rate(&clk_usb_bus)));
805
806 /* register clocks from clock array */ 356 /* register clocks from clock array */
807 357
808 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 358 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
@@ -819,17 +369,8 @@ void __init s3c2443_init_clocks(int xtal)
819 369
820 /* install (and disable) the clocks we do not need immediately */ 370 /* install (and disable) the clocks we do not need immediately */
821 371
822 clkp = init_clocks_disable; 372 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
823 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { 373 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
824
825 ret = s3c24xx_register_clock(clkp);
826 if (ret < 0) {
827 printk(KERN_ERR "Failed to register clock %s (%d)\n",
828 clkp->name, ret);
829 }
830
831 (clkp->enable)(clkp, 0);
832 }
833 374
834 s3c_pwmclk_init(); 375 s3c_pwmclk_init();
835} 376}
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index e2e362bda9b7..4c863d3a52f4 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -131,7 +131,7 @@ static void __init smdk2443_machine_init(void)
131} 131}
132 132
133MACHINE_START(SMDK2443, "SMDK2443") 133MACHINE_START(SMDK2443, "SMDK2443")
134 /* Maintainer: Ben Dooks <ben@fluff.org> */ 134 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
135 .phys_io = S3C2410_PA_UART, 135 .phys_io = S3C2410_PA_UART,
136 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 136 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
137 .boot_params = S3C2410_SDRAM_PA + 0x100, 137 .boot_params = S3C2410_SDRAM_PA + 0x100,
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 959df3840de5..69e9fbfea917 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -85,6 +85,7 @@ config MACH_ANW6410
85config MACH_SMDK6410 85config MACH_SMDK6410
86 bool "SMDK6410" 86 bool "SMDK6410"
87 select CPU_S3C6410 87 select CPU_S3C6410
88 select SAMSUNG_DEV_ADC
88 select S3C_DEV_HSMMC 89 select S3C_DEV_HSMMC
89 select S3C_DEV_HSMMC1 90 select S3C_DEV_HSMMC1
90 select S3C_DEV_I2C1 91 select S3C_DEV_I2C1
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 3758e15086be..a10f1fc6b023 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -56,7 +56,6 @@ obj-$(CONFIG_MACH_HMT) += mach-hmt.o
56# device support 56# device support
57 57
58obj-y += dev-uart.o 58obj-y += dev-uart.o
59obj-y += dev-rtc.o
60obj-y += dev-audio.o 59obj-y += dev-audio.o
61obj-$(CONFIG_S3C_ADC) += dev-adc.o
62obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o 60obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
61obj-$(CONFIG_S3C64XX_DEV_TS) += dev-ts.o
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 2ac2e7d73e53..7a4138beb665 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -88,6 +88,12 @@ struct clk clk_48m = {
88 .enable = clk_48m_ctrl, 88 .enable = clk_48m_ctrl,
89}; 89};
90 90
91struct clk clk_xusbxti = {
92 .name = "xusbxti",
93 .id = -1,
94 .rate = 48000000,
95};
96
91static int inline s3c64xx_gate(void __iomem *reg, 97static int inline s3c64xx_gate(void __iomem *reg,
92 struct clk *clk, 98 struct clk *clk,
93 int enable) 99 int enable)
@@ -518,6 +524,11 @@ static struct clk clk_iis_cd1 = {
518 .id = -1, 524 .id = -1,
519}; 525};
520 526
527static struct clk clk_iisv4_cd = {
528 .name = "iis_cdclk_v4",
529 .id = -1,
530};
531
521static struct clk clk_pcm_cd = { 532static struct clk clk_pcm_cd = {
522 .name = "pcm_cdclk", 533 .name = "pcm_cdclk",
523 .id = -1, 534 .id = -1,
@@ -549,6 +560,19 @@ static struct clksrc_sources clkset_audio1 = {
549 .nr_sources = ARRAY_SIZE(clkset_audio1_list), 560 .nr_sources = ARRAY_SIZE(clkset_audio1_list),
550}; 561};
551 562
563static struct clk *clkset_audio2_list[] = {
564 [0] = &clk_mout_epll.clk,
565 [1] = &clk_dout_mpll,
566 [2] = &clk_fin_epll,
567 [3] = &clk_iisv4_cd,
568 [4] = &clk_pcm_cd,
569};
570
571static struct clksrc_sources clkset_audio2 = {
572 .sources = clkset_audio2_list,
573 .nr_sources = ARRAY_SIZE(clkset_audio2_list),
574};
575
552static struct clk *clkset_camif_list[] = { 576static struct clk *clkset_camif_list[] = {
553 &clk_h2, 577 &clk_h2,
554}; 578};
@@ -652,6 +676,16 @@ static struct clksrc_clk clksrcs[] = {
652 .sources = &clkset_audio1, 676 .sources = &clkset_audio1,
653 }, { 677 }, {
654 .clk = { 678 .clk = {
679 .name = "audio-bus",
680 .id = -1, /* There's only one IISv4 port */
681 .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2,
682 .enable = s3c64xx_sclk_ctrl,
683 },
684 .reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 },
685 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 },
686 .sources = &clkset_audio2,
687 }, {
688 .clk = {
655 .name = "irda-bus", 689 .name = "irda-bus",
656 .id = 0, 690 .id = 0,
657 .ctrlbit = S3C_CLKCON_SCLK_IRDA, 691 .ctrlbit = S3C_CLKCON_SCLK_IRDA,
@@ -749,6 +783,7 @@ static struct clk *clks1[] __initdata = {
749 &clk_ext_xtal_mux, 783 &clk_ext_xtal_mux,
750 &clk_iis_cd0, 784 &clk_iis_cd0,
751 &clk_iis_cd1, 785 &clk_iis_cd1,
786 &clk_iisv4_cd,
752 &clk_pcm_cd, 787 &clk_pcm_cd,
753 &clk_mout_epll.clk, 788 &clk_mout_epll.clk,
754 &clk_mout_mpll.clk, 789 &clk_mout_mpll.clk,
@@ -762,6 +797,7 @@ static struct clk *clks[] __initdata = {
762 &clk_27m, 797 &clk_27m,
763 &clk_48m, 798 &clk_48m,
764 &clk_h2, 799 &clk_h2,
800 &clk_xusbxti,
765}; 801};
766 802
767/** 803/**
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 33ccf7bf766a..5567e037b0d1 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -414,7 +414,7 @@ err_buff:
414EXPORT_SYMBOL(s3c2410_dma_enqueue); 414EXPORT_SYMBOL(s3c2410_dma_enqueue);
415 415
416 416
417int s3c2410_dma_devconfig(int channel, 417int s3c2410_dma_devconfig(unsigned int channel,
418 enum s3c2410_dmasrc source, 418 enum s3c2410_dmasrc source,
419 unsigned long devaddr) 419 unsigned long devaddr)
420{ 420{
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c
index 66e6794481d2..60c929a3cab6 100644
--- a/arch/arm/mach-s3c64xx/gpiolib.c
+++ b/arch/arm/mach-s3c64xx/gpiolib.c
@@ -51,6 +51,7 @@
51 51
52static struct s3c_gpio_cfg gpio_4bit_cfg_noint = { 52static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
53 .set_config = s3c_gpio_setcfg_s3c64xx_4bit, 53 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
54 .get_config = s3c_gpio_getcfg_s3c64xx_4bit,
54 .set_pull = s3c_gpio_setpull_updown, 55 .set_pull = s3c_gpio_setpull_updown,
55 .get_pull = s3c_gpio_getpull_updown, 56 .get_pull = s3c_gpio_getpull_updown,
56}; 57};
@@ -58,12 +59,14 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
58static struct s3c_gpio_cfg gpio_4bit_cfg_eint0111 = { 59static struct s3c_gpio_cfg gpio_4bit_cfg_eint0111 = {
59 .cfg_eint = 7, 60 .cfg_eint = 7,
60 .set_config = s3c_gpio_setcfg_s3c64xx_4bit, 61 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
62 .get_config = s3c_gpio_getcfg_s3c64xx_4bit,
61 .set_pull = s3c_gpio_setpull_updown, 63 .set_pull = s3c_gpio_setpull_updown,
62 .get_pull = s3c_gpio_getpull_updown, 64 .get_pull = s3c_gpio_getpull_updown,
63}; 65};
64 66
65static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = { 67static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = {
66 .cfg_eint = 3, 68 .cfg_eint = 3,
69 .get_config = s3c_gpio_getcfg_s3c64xx_4bit,
67 .set_config = s3c_gpio_setcfg_s3c64xx_4bit, 70 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
68 .set_pull = s3c_gpio_setpull_updown, 71 .set_pull = s3c_gpio_setpull_updown,
69 .get_pull = s3c_gpio_getpull_updown, 72 .get_pull = s3c_gpio_getpull_updown,
@@ -171,6 +174,7 @@ static struct s3c_gpio_chip gpio_4bit2[] = {
171 174
172static struct s3c_gpio_cfg gpio_2bit_cfg_noint = { 175static struct s3c_gpio_cfg gpio_2bit_cfg_noint = {
173 .set_config = s3c_gpio_setcfg_s3c24xx, 176 .set_config = s3c_gpio_setcfg_s3c24xx,
177 .get_config = s3c_gpio_getcfg_s3c24xx,
174 .set_pull = s3c_gpio_setpull_updown, 178 .set_pull = s3c_gpio_setpull_updown,
175 .get_pull = s3c_gpio_getpull_updown, 179 .get_pull = s3c_gpio_getpull_updown,
176}; 180};
@@ -178,6 +182,7 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_noint = {
178static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = { 182static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = {
179 .cfg_eint = 2, 183 .cfg_eint = 2,
180 .set_config = s3c_gpio_setcfg_s3c24xx, 184 .set_config = s3c_gpio_setcfg_s3c24xx,
185 .get_config = s3c_gpio_getcfg_s3c24xx,
181 .set_pull = s3c_gpio_setpull_updown, 186 .set_pull = s3c_gpio_setpull_updown,
182 .get_pull = s3c_gpio_getpull_updown, 187 .get_pull = s3c_gpio_getpull_updown,
183}; 188};
@@ -185,6 +190,7 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = {
185static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = { 190static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = {
186 .cfg_eint = 3, 191 .cfg_eint = 3,
187 .set_config = s3c_gpio_setcfg_s3c24xx, 192 .set_config = s3c_gpio_setcfg_s3c24xx,
193 .get_config = s3c_gpio_getcfg_s3c24xx,
188 .set_pull = s3c_gpio_setpull_updown, 194 .set_pull = s3c_gpio_setpull_updown,
189 .get_pull = s3c_gpio_getpull_updown, 195 .get_pull = s3c_gpio_getpull_updown,
190}; 196};
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 801c1c0f3a95..9fdd50c8c767 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -103,5 +103,8 @@
103#define S3C_PA_USBHOST S3C64XX_PA_USBHOST 103#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
104#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG 104#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
105#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY 105#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
106#define S3C_PA_RTC S3C64XX_PA_RTC
107
108#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
106 109
107#endif /* __ASM_ARCH_6400_MAP_H */ 110#endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h
index 90bbd72fdc4e..5ef0bb698ee0 100644
--- a/arch/arm/mach-s3c64xx/include/mach/pll.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pll.h
@@ -20,6 +20,7 @@
20#define S3C6400_PLL_SDIV_SHIFT (0) 20#define S3C6400_PLL_SDIV_SHIFT (0)
21 21
22#include <asm/div64.h> 22#include <asm/div64.h>
23#include <plat/pll6553x.h>
23 24
24static inline unsigned long s3c6400_get_pll(unsigned long baseclk, 25static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
25 u32 pllcon) 26 u32 pllcon)
@@ -37,38 +38,8 @@ static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
37 return (unsigned long)fvco; 38 return (unsigned long)fvco;
38} 39}
39 40
40#define S3C6400_EPLL_MDIV_MASK ((1 << (23-16)) - 1)
41#define S3C6400_EPLL_PDIV_MASK ((1 << (13-8)) - 1)
42#define S3C6400_EPLL_SDIV_MASK ((1 << (2-0)) - 1)
43#define S3C6400_EPLL_MDIV_SHIFT (16)
44#define S3C6400_EPLL_PDIV_SHIFT (8)
45#define S3C6400_EPLL_SDIV_SHIFT (0)
46#define S3C6400_EPLL_KDIV_MASK (0xffff)
47
48static inline unsigned long s3c6400_get_epll(unsigned long baseclk) 41static inline unsigned long s3c6400_get_epll(unsigned long baseclk)
49{ 42{
50 unsigned long result; 43 return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0),
51 u32 epll0 = __raw_readl(S3C_EPLL_CON0); 44 __raw_readl(S3C_EPLL_CON1));
52 u32 epll1 = __raw_readl(S3C_EPLL_CON1);
53 u32 mdiv, pdiv, sdiv, kdiv;
54 u64 tmp;
55
56 mdiv = (epll0 >> S3C6400_EPLL_MDIV_SHIFT) & S3C6400_EPLL_MDIV_MASK;
57 pdiv = (epll0 >> S3C6400_EPLL_PDIV_SHIFT) & S3C6400_EPLL_PDIV_MASK;
58 sdiv = (epll0 >> S3C6400_EPLL_SDIV_SHIFT) & S3C6400_EPLL_SDIV_MASK;
59 kdiv = epll1 & S3C6400_EPLL_KDIV_MASK;
60
61 /* We need to multiple baseclk by mdiv (the integer part) and kdiv
62 * which is in 2^16ths, so shift mdiv up (does not overflow) and
63 * add kdiv before multiplying. The use of tmp is to avoid any
64 * overflows before shifting bac down into result when multipling
65 * by the mdiv and kdiv pair.
66 */
67
68 tmp = baseclk;
69 tmp *= (mdiv << 16) + kdiv;
70 do_div(tmp, (pdiv << sdiv));
71 result = tmp >> 16;
72
73 return result;
74} 45}
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index 3ef62741e5d1..0114eb0c1fe7 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
@@ -33,6 +33,7 @@
33#define S3C_PCLK_GATE S3C_CLKREG(0x34) 33#define S3C_PCLK_GATE S3C_CLKREG(0x34)
34#define S3C_SCLK_GATE S3C_CLKREG(0x38) 34#define S3C_SCLK_GATE S3C_CLKREG(0x38)
35#define S3C_MEM0_GATE S3C_CLKREG(0x3C) 35#define S3C_MEM0_GATE S3C_CLKREG(0x3C)
36#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C)
36 37
37/* CLKDIV0 */ 38/* CLKDIV0 */
38#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) 39#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12)
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index f7b18983950c..59916676d8d2 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -84,7 +84,7 @@ static void __init smdk6400_machine_init(void)
84} 84}
85 85
86MACHINE_START(SMDK6400, "SMDK6400") 86MACHINE_START(SMDK6400, "SMDK6400")
87 /* Maintainer: Ben Dooks <ben@fluff.org> */ 87 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
88 .phys_io = S3C_PA_UART & 0xfff00000, 88 .phys_io = S3C_PA_UART & 0xfff00000,
89 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, 89 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
90 .boot_params = S3C64XX_PA_SDRAM + 0x100, 90 .boot_params = S3C64XX_PA_SDRAM + 0x100,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 2d5afd221d77..9d51455feb31 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -656,7 +656,7 @@ static void __init smdk6410_machine_init(void)
656} 656}
657 657
658MACHINE_START(SMDK6410, "SMDK6410") 658MACHINE_START(SMDK6410, "SMDK6410")
659 /* Maintainer: Ben Dooks <ben@fluff.org> */ 659 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
660 .phys_io = S3C_PA_UART & 0xfff00000, 660 .phys_io = S3C_PA_UART & 0xfff00000,
661 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, 661 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
662 .boot_params = S3C64XX_PA_SDRAM + 0x100, 662 .boot_params = S3C64XX_PA_SDRAM + 0x100,
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 59635d19466a..3ab695c691ee 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -38,6 +38,7 @@
38#include <plat/clock.h> 38#include <plat/clock.h>
39#include <plat/sdhci.h> 39#include <plat/sdhci.h>
40#include <plat/iic-core.h> 40#include <plat/iic-core.h>
41#include <plat/adc.h>
41#include <mach/s3c6400.h> 42#include <mach/s3c6400.h>
42#include <mach/s3c6410.h> 43#include <mach/s3c6410.h>
43 44
@@ -52,6 +53,7 @@ void __init s3c6410_map_io(void)
52 s3c_i2c0_setname("s3c2440-i2c"); 53 s3c_i2c0_setname("s3c2440-i2c");
53 s3c_i2c1_setname("s3c2440-i2c"); 54 s3c_i2c1_setname("s3c2440-i2c");
54 55
56 s3c_device_adc.name = "s3c64xx-adc";
55 s3c_device_nand.name = "s3c6400-nand"; 57 s3c_device_nand.name = "s3c6400-nand";
56} 58}
57 59
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
index 4c29ff8b07de..77aeffd17330 100644
--- a/arch/arm/mach-s5p6440/Kconfig
+++ b/arch/arm/mach-s5p6440/Kconfig
@@ -9,6 +9,7 @@ if ARCH_S5P6440
9 9
10config CPU_S5P6440 10config CPU_S5P6440
11 bool 11 bool
12 select S3C_PL330_DMA
12 help 13 help
13 Enable S5P6440 CPU support 14 Enable S5P6440 CPU support
14 15
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
index 1ad894b1d3ab..44facf43d59f 100644
--- a/arch/arm/mach-s5p6440/Makefile
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -12,8 +12,12 @@ obj- :=
12 12
13# Core support for S5P6440 system 13# Core support for S5P6440 system
14 14
15obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o 15obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o dma.o
16obj-$(CONFIG_CPU_S5P6440) += setup-i2c0.o
16 17
17# machine support 18# machine support
18 19
19obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o 20obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
21
22# device support
23obj-y += dev-audio.o
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c
index b2672e16e7aa..ca6e48dce777 100644
--- a/arch/arm/mach-s5p6440/clock.c
+++ b/arch/arm/mach-s5p6440/clock.c
@@ -134,24 +134,6 @@ static struct clksrc_clk clk_mout_mpll = {
134 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 }, 134 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 },
135}; 135};
136 136
137static struct clk clk_h_low = {
138 .name = "hclk_low",
139 .id = -1,
140 .rate = 0,
141 .parent = NULL,
142 .ctrlbit = 0,
143 .ops = &clk_ops_def_setrate,
144};
145
146static struct clk clk_p_low = {
147 .name = "pclk_low",
148 .id = -1,
149 .rate = 0,
150 .parent = NULL,
151 .ctrlbit = 0,
152 .ops = &clk_ops_def_setrate,
153};
154
155enum perf_level { 137enum perf_level {
156 L0 = 532*1000, 138 L0 = 532*1000,
157 L1 = 266*1000, 139 L1 = 266*1000,
@@ -247,23 +229,70 @@ static struct clk_ops s5p6440_clkarm_ops = {
247 .round_rate = s5p6440_armclk_round_rate, 229 .round_rate = s5p6440_armclk_round_rate,
248}; 230};
249 231
250static unsigned long s5p6440_clk_doutmpll_get_rate(struct clk *clk) 232static struct clksrc_clk clk_armclk = {
251{ 233 .clk = {
252 unsigned long rate = clk_get_rate(clk->parent); 234 .name = "armclk",
235 .id = 1,
236 .parent = &clk_mout_apll.clk,
237 .ops = &s5p6440_clkarm_ops,
238 },
239 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 4 },
240};
253 241
254 if (__raw_readl(S5P_CLK_DIV0) & S5P_CLKDIV0_MPLL_MASK) 242static struct clksrc_clk clk_dout_mpll = {
255 rate /= 2; 243 .clk = {
244 .name = "dout_mpll",
245 .id = -1,
246 .parent = &clk_mout_mpll.clk,
247 },
248 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 1 },
249};
256 250
257 return rate; 251static struct clksrc_clk clk_hclk = {
258} 252 .clk = {
253 .name = "clk_hclk",
254 .id = -1,
255 .parent = &clk_armclk.clk,
256 },
257 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 4 },
258};
259 259
260static struct clk clk_dout_mpll = { 260static struct clksrc_clk clk_pclk = {
261 .name = "dout_mpll", 261 .clk = {
262 .id = -1, 262 .name = "clk_pclk",
263 .parent = &clk_mout_mpll.clk, 263 .id = -1,
264 .ops = &(struct clk_ops) { 264 .parent = &clk_hclk.clk,
265 .get_rate = s5p6440_clk_doutmpll_get_rate,
266 }, 265 },
266 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 4 },
267};
268
269static struct clk *clkset_hclklow_list[] = {
270 &clk_mout_apll.clk,
271 &clk_mout_mpll.clk,
272};
273
274static struct clksrc_sources clkset_hclklow = {
275 .sources = clkset_hclklow_list,
276 .nr_sources = ARRAY_SIZE(clkset_hclklow_list),
277};
278
279static struct clksrc_clk clk_hclk_low = {
280 .clk = {
281 .name = "hclk_low",
282 .id = -1,
283 },
284 .sources = &clkset_hclklow,
285 .reg_src = { .reg = S5P_SYS_OTHERS, .shift = 6, .size = 1 },
286 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
287};
288
289static struct clksrc_clk clk_pclk_low = {
290 .clk = {
291 .name = "pclk_low",
292 .id = -1,
293 .parent = &clk_hclk_low.clk,
294 },
295 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 },
267}; 296};
268 297
269int s5p6440_clk48m_ctrl(struct clk *clk, int enable) 298int s5p6440_clk48m_ctrl(struct clk *clk, int enable)
@@ -307,6 +336,11 @@ static int s5p6440_sclk_ctrl(struct clk *clk, int enable)
307 return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable); 336 return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable);
308} 337}
309 338
339static int s5p6440_sclk1_ctrl(struct clk *clk, int enable)
340{
341 return s5p_gatectrl(S5P_CLK_GATE_SCLK1, clk, enable);
342}
343
310static int s5p6440_mem_ctrl(struct clk *clk, int enable) 344static int s5p6440_mem_ctrl(struct clk *clk, int enable)
311{ 345{
312 return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable); 346 return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable);
@@ -321,37 +355,37 @@ static struct clk init_clocks_disable[] = {
321 { 355 {
322 .name = "nand", 356 .name = "nand",
323 .id = -1, 357 .id = -1,
324 .parent = &clk_h, 358 .parent = &clk_hclk.clk,
325 .enable = s5p6440_mem_ctrl, 359 .enable = s5p6440_mem_ctrl,
326 .ctrlbit = S5P_CLKCON_MEM0_HCLK_NFCON, 360 .ctrlbit = S5P_CLKCON_MEM0_HCLK_NFCON,
327 }, { 361 }, {
328 .name = "adc", 362 .name = "adc",
329 .id = -1, 363 .id = -1,
330 .parent = &clk_p_low, 364 .parent = &clk_pclk_low.clk,
331 .enable = s5p6440_pclk_ctrl, 365 .enable = s5p6440_pclk_ctrl,
332 .ctrlbit = S5P_CLKCON_PCLK_TSADC, 366 .ctrlbit = S5P_CLKCON_PCLK_TSADC,
333 }, { 367 }, {
334 .name = "i2c", 368 .name = "i2c",
335 .id = -1, 369 .id = -1,
336 .parent = &clk_p_low, 370 .parent = &clk_pclk_low.clk,
337 .enable = s5p6440_pclk_ctrl, 371 .enable = s5p6440_pclk_ctrl,
338 .ctrlbit = S5P_CLKCON_PCLK_IIC0, 372 .ctrlbit = S5P_CLKCON_PCLK_IIC0,
339 }, { 373 }, {
340 .name = "i2s_v40", 374 .name = "i2s_v40",
341 .id = 0, 375 .id = 0,
342 .parent = &clk_p_low, 376 .parent = &clk_pclk_low.clk,
343 .enable = s5p6440_pclk_ctrl, 377 .enable = s5p6440_pclk_ctrl,
344 .ctrlbit = S5P_CLKCON_PCLK_IIS2, 378 .ctrlbit = S5P_CLKCON_PCLK_IIS2,
345 }, { 379 }, {
346 .name = "spi", 380 .name = "spi",
347 .id = 0, 381 .id = 0,
348 .parent = &clk_p_low, 382 .parent = &clk_pclk_low.clk,
349 .enable = s5p6440_pclk_ctrl, 383 .enable = s5p6440_pclk_ctrl,
350 .ctrlbit = S5P_CLKCON_PCLK_SPI0, 384 .ctrlbit = S5P_CLKCON_PCLK_SPI0,
351 }, { 385 }, {
352 .name = "spi", 386 .name = "spi",
353 .id = 1, 387 .id = 1,
354 .parent = &clk_p_low, 388 .parent = &clk_pclk_low.clk,
355 .enable = s5p6440_pclk_ctrl, 389 .enable = s5p6440_pclk_ctrl,
356 .ctrlbit = S5P_CLKCON_PCLK_SPI1, 390 .ctrlbit = S5P_CLKCON_PCLK_SPI1,
357 }, { 391 }, {
@@ -387,58 +421,124 @@ static struct clk init_clocks_disable[] = {
387 }, { 421 }, {
388 .name = "otg", 422 .name = "otg",
389 .id = -1, 423 .id = -1,
390 .parent = &clk_h_low, 424 .parent = &clk_hclk_low.clk,
391 .enable = s5p6440_hclk0_ctrl, 425 .enable = s5p6440_hclk0_ctrl,
392 .ctrlbit = S5P_CLKCON_HCLK0_USB 426 .ctrlbit = S5P_CLKCON_HCLK0_USB
393 }, { 427 }, {
394 .name = "post", 428 .name = "post",
395 .id = -1, 429 .id = -1,
396 .parent = &clk_h_low, 430 .parent = &clk_hclk_low.clk,
397 .enable = s5p6440_hclk0_ctrl, 431 .enable = s5p6440_hclk0_ctrl,
398 .ctrlbit = S5P_CLKCON_HCLK0_POST0 432 .ctrlbit = S5P_CLKCON_HCLK0_POST0
399 }, { 433 }, {
400 .name = "lcd", 434 .name = "lcd",
401 .id = -1, 435 .id = -1,
402 .parent = &clk_h_low, 436 .parent = &clk_hclk_low.clk,
403 .enable = s5p6440_hclk1_ctrl, 437 .enable = s5p6440_hclk1_ctrl,
404 .ctrlbit = S5P_CLKCON_HCLK1_DISPCON, 438 .ctrlbit = S5P_CLKCON_HCLK1_DISPCON,
405 }, { 439 }, {
406 .name = "hsmmc", 440 .name = "hsmmc",
407 .id = 0, 441 .id = 0,
408 .parent = &clk_h_low, 442 .parent = &clk_hclk_low.clk,
409 .enable = s5p6440_hclk0_ctrl, 443 .enable = s5p6440_hclk0_ctrl,
410 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC0, 444 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC0,
411 }, { 445 }, {
412 .name = "hsmmc", 446 .name = "hsmmc",
413 .id = 1, 447 .id = 1,
414 .parent = &clk_h_low, 448 .parent = &clk_hclk_low.clk,
415 .enable = s5p6440_hclk0_ctrl, 449 .enable = s5p6440_hclk0_ctrl,
416 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC1, 450 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC1,
417 }, { 451 }, {
418 .name = "hsmmc", 452 .name = "hsmmc",
419 .id = 2, 453 .id = 2,
420 .parent = &clk_h_low, 454 .parent = &clk_hclk_low.clk,
421 .enable = s5p6440_hclk0_ctrl, 455 .enable = s5p6440_hclk0_ctrl,
422 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC2, 456 .ctrlbit = S5P_CLKCON_HCLK0_HSMMC2,
423 }, { 457 }, {
424 .name = "rtc", 458 .name = "rtc",
425 .id = -1, 459 .id = -1,
426 .parent = &clk_p_low, 460 .parent = &clk_pclk_low.clk,
427 .enable = s5p6440_pclk_ctrl, 461 .enable = s5p6440_pclk_ctrl,
428 .ctrlbit = S5P_CLKCON_PCLK_RTC, 462 .ctrlbit = S5P_CLKCON_PCLK_RTC,
429 }, { 463 }, {
430 .name = "watchdog", 464 .name = "watchdog",
431 .id = -1, 465 .id = -1,
432 .parent = &clk_p_low, 466 .parent = &clk_pclk_low.clk,
433 .enable = s5p6440_pclk_ctrl, 467 .enable = s5p6440_pclk_ctrl,
434 .ctrlbit = S5P_CLKCON_PCLK_WDT, 468 .ctrlbit = S5P_CLKCON_PCLK_WDT,
435 }, { 469 }, {
436 .name = "timers", 470 .name = "timers",
437 .id = -1, 471 .id = -1,
438 .parent = &clk_p_low, 472 .parent = &clk_pclk_low.clk,
439 .enable = s5p6440_pclk_ctrl, 473 .enable = s5p6440_pclk_ctrl,
440 .ctrlbit = S5P_CLKCON_PCLK_PWM, 474 .ctrlbit = S5P_CLKCON_PCLK_PWM,
441 } 475 }, {
476 .name = "hclk_fimgvg",
477 .id = -1,
478 .parent = &clk_hclk.clk,
479 .enable = s5p6440_hclk1_ctrl,
480 .ctrlbit = (1 << 2),
481 }, {
482 .name = "tsi",
483 .id = -1,
484 .parent = &clk_hclk_low.clk,
485 .enable = s5p6440_hclk1_ctrl,
486 .ctrlbit = (1 << 0),
487 }, {
488 .name = "pclk_fimgvg",
489 .id = -1,
490 .parent = &clk_pclk.clk,
491 .enable = s5p6440_pclk_ctrl,
492 .ctrlbit = (1 << 31),
493 }, {
494 .name = "dmc0",
495 .id = -1,
496 .parent = &clk_pclk.clk,
497 .enable = s5p6440_pclk_ctrl,
498 .ctrlbit = (1 << 30),
499 }, {
500 .name = "etm",
501 .id = -1,
502 .parent = &clk_pclk.clk,
503 .enable = s5p6440_pclk_ctrl,
504 .ctrlbit = (1 << 29),
505 }, {
506 .name = "dsim",
507 .id = -1,
508 .parent = &clk_pclk_low.clk,
509 .enable = s5p6440_pclk_ctrl,
510 .ctrlbit = (1 << 28),
511 }, {
512 .name = "gps",
513 .id = -1,
514 .parent = &clk_pclk_low.clk,
515 .enable = s5p6440_pclk_ctrl,
516 .ctrlbit = (1 << 25),
517 }, {
518 .name = "pcm",
519 .id = -1,
520 .parent = &clk_pclk_low.clk,
521 .enable = s5p6440_pclk_ctrl,
522 .ctrlbit = (1 << 8),
523 }, {
524 .name = "irom",
525 .id = -1,
526 .parent = &clk_hclk.clk,
527 .enable = s5p6440_hclk0_ctrl,
528 .ctrlbit = (1 << 25),
529 }, {
530 .name = "dma",
531 .id = -1,
532 .parent = &clk_hclk_low.clk,
533 .enable = s5p6440_hclk0_ctrl,
534 .ctrlbit = (1 << 12),
535 }, {
536 .name = "2d",
537 .id = -1,
538 .parent = &clk_hclk.clk,
539 .enable = s5p6440_hclk0_ctrl,
540 .ctrlbit = (1 << 8),
541 },
442}; 542};
443 543
444/* 544/*
@@ -448,34 +548,46 @@ static struct clk init_clocks[] = {
448 { 548 {
449 .name = "gpio", 549 .name = "gpio",
450 .id = -1, 550 .id = -1,
451 .parent = &clk_p_low, 551 .parent = &clk_pclk_low.clk,
452 .enable = s5p6440_pclk_ctrl, 552 .enable = s5p6440_pclk_ctrl,
453 .ctrlbit = S5P_CLKCON_PCLK_GPIO, 553 .ctrlbit = S5P_CLKCON_PCLK_GPIO,
454 }, { 554 }, {
455 .name = "uart", 555 .name = "uart",
456 .id = 0, 556 .id = 0,
457 .parent = &clk_p_low, 557 .parent = &clk_pclk_low.clk,
458 .enable = s5p6440_pclk_ctrl, 558 .enable = s5p6440_pclk_ctrl,
459 .ctrlbit = S5P_CLKCON_PCLK_UART0, 559 .ctrlbit = S5P_CLKCON_PCLK_UART0,
460 }, { 560 }, {
461 .name = "uart", 561 .name = "uart",
462 .id = 1, 562 .id = 1,
463 .parent = &clk_p_low, 563 .parent = &clk_pclk_low.clk,
464 .enable = s5p6440_pclk_ctrl, 564 .enable = s5p6440_pclk_ctrl,
465 .ctrlbit = S5P_CLKCON_PCLK_UART1, 565 .ctrlbit = S5P_CLKCON_PCLK_UART1,
466 }, { 566 }, {
467 .name = "uart", 567 .name = "uart",
468 .id = 2, 568 .id = 2,
469 .parent = &clk_p_low, 569 .parent = &clk_pclk_low.clk,
470 .enable = s5p6440_pclk_ctrl, 570 .enable = s5p6440_pclk_ctrl,
471 .ctrlbit = S5P_CLKCON_PCLK_UART2, 571 .ctrlbit = S5P_CLKCON_PCLK_UART2,
472 }, { 572 }, {
473 .name = "uart", 573 .name = "uart",
474 .id = 3, 574 .id = 3,
475 .parent = &clk_p_low, 575 .parent = &clk_pclk_low.clk,
476 .enable = s5p6440_pclk_ctrl, 576 .enable = s5p6440_pclk_ctrl,
477 .ctrlbit = S5P_CLKCON_PCLK_UART3, 577 .ctrlbit = S5P_CLKCON_PCLK_UART3,
478 } 578 }, {
579 .name = "mem",
580 .id = -1,
581 .parent = &clk_hclk.clk,
582 .enable = s5p6440_hclk0_ctrl,
583 .ctrlbit = (1 << 21),
584 }, {
585 .name = "intc",
586 .id = -1,
587 .parent = &clk_hclk.clk,
588 .enable = s5p6440_hclk0_ctrl,
589 .ctrlbit = (1 << 1),
590 },
479}; 591};
480 592
481static struct clk clk_iis_cd_v40 = { 593static struct clk clk_iis_cd_v40 = {
@@ -488,20 +600,20 @@ static struct clk clk_pcm_cd = {
488 .id = -1, 600 .id = -1,
489}; 601};
490 602
491static struct clk *clkset_spi_mmc_list[] = { 603static struct clk *clkset_group1_list[] = {
492 &clk_mout_epll.clk, 604 &clk_mout_epll.clk,
493 &clk_dout_mpll, 605 &clk_dout_mpll.clk,
494 &clk_fin_epll, 606 &clk_fin_epll,
495}; 607};
496 608
497static struct clksrc_sources clkset_spi_mmc = { 609static struct clksrc_sources clkset_group1 = {
498 .sources = clkset_spi_mmc_list, 610 .sources = clkset_group1_list,
499 .nr_sources = ARRAY_SIZE(clkset_spi_mmc_list), 611 .nr_sources = ARRAY_SIZE(clkset_group1_list),
500}; 612};
501 613
502static struct clk *clkset_uart_list[] = { 614static struct clk *clkset_uart_list[] = {
503 &clk_mout_epll.clk, 615 &clk_mout_epll.clk,
504 &clk_dout_mpll 616 &clk_dout_mpll.clk,
505}; 617};
506 618
507static struct clksrc_sources clkset_uart = { 619static struct clksrc_sources clkset_uart = {
@@ -509,6 +621,19 @@ static struct clksrc_sources clkset_uart = {
509 .nr_sources = ARRAY_SIZE(clkset_uart_list), 621 .nr_sources = ARRAY_SIZE(clkset_uart_list),
510}; 622};
511 623
624static struct clk *clkset_audio_list[] = {
625 &clk_mout_epll.clk,
626 &clk_dout_mpll.clk,
627 &clk_fin_epll,
628 &clk_iis_cd_v40,
629 &clk_pcm_cd,
630};
631
632static struct clksrc_sources clkset_audio = {
633 .sources = clkset_audio_list,
634 .nr_sources = ARRAY_SIZE(clkset_audio_list),
635};
636
512static struct clksrc_clk clksrcs[] = { 637static struct clksrc_clk clksrcs[] = {
513 { 638 {
514 .clk = { 639 .clk = {
@@ -517,7 +642,7 @@ static struct clksrc_clk clksrcs[] = {
517 .ctrlbit = S5P_CLKCON_SCLK0_MMC0, 642 .ctrlbit = S5P_CLKCON_SCLK0_MMC0,
518 .enable = s5p6440_sclk_ctrl, 643 .enable = s5p6440_sclk_ctrl,
519 }, 644 },
520 .sources = &clkset_spi_mmc, 645 .sources = &clkset_group1,
521 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 }, 646 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 },
522 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 }, 647 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 },
523 }, { 648 }, {
@@ -527,7 +652,7 @@ static struct clksrc_clk clksrcs[] = {
527 .ctrlbit = S5P_CLKCON_SCLK0_MMC1, 652 .ctrlbit = S5P_CLKCON_SCLK0_MMC1,
528 .enable = s5p6440_sclk_ctrl, 653 .enable = s5p6440_sclk_ctrl,
529 }, 654 },
530 .sources = &clkset_spi_mmc, 655 .sources = &clkset_group1,
531 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 }, 656 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 },
532 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 }, 657 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 },
533 }, { 658 }, {
@@ -537,7 +662,7 @@ static struct clksrc_clk clksrcs[] = {
537 .ctrlbit = S5P_CLKCON_SCLK0_MMC2, 662 .ctrlbit = S5P_CLKCON_SCLK0_MMC2,
538 .enable = s5p6440_sclk_ctrl, 663 .enable = s5p6440_sclk_ctrl,
539 }, 664 },
540 .sources = &clkset_spi_mmc, 665 .sources = &clkset_group1,
541 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 }, 666 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 },
542 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 }, 667 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 },
543 }, { 668 }, {
@@ -557,7 +682,7 @@ static struct clksrc_clk clksrcs[] = {
557 .ctrlbit = S5P_CLKCON_SCLK0_SPI0, 682 .ctrlbit = S5P_CLKCON_SCLK0_SPI0,
558 .enable = s5p6440_sclk_ctrl, 683 .enable = s5p6440_sclk_ctrl,
559 }, 684 },
560 .sources = &clkset_spi_mmc, 685 .sources = &clkset_group1,
561 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 }, 686 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 },
562 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, 687 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
563 }, { 688 }, {
@@ -567,17 +692,63 @@ static struct clksrc_clk clksrcs[] = {
567 .ctrlbit = S5P_CLKCON_SCLK0_SPI1, 692 .ctrlbit = S5P_CLKCON_SCLK0_SPI1,
568 .enable = s5p6440_sclk_ctrl, 693 .enable = s5p6440_sclk_ctrl,
569 }, 694 },
570 .sources = &clkset_spi_mmc, 695 .sources = &clkset_group1,
571 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 }, 696 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 },
572 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, 697 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
573 } 698 }, {
699 .clk = {
700 .name = "sclk_post",
701 .id = -1,
702 .ctrlbit = (1 << 10),
703 .enable = s5p6440_sclk_ctrl,
704 },
705 .sources = &clkset_group1,
706 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 26, .size = 2 },
707 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
708 }, {
709 .clk = {
710 .name = "sclk_dispcon",
711 .id = -1,
712 .ctrlbit = (1 << 1),
713 .enable = s5p6440_sclk1_ctrl,
714 },
715 .sources = &clkset_group1,
716 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
717 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
718 }, {
719 .clk = {
720 .name = "sclk_fimgvg",
721 .id = -1,
722 .ctrlbit = (1 << 2),
723 .enable = s5p6440_sclk1_ctrl,
724 },
725 .sources = &clkset_group1,
726 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
727 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
728 }, {
729 .clk = {
730 .name = "sclk_audio2",
731 .id = -1,
732 .ctrlbit = (1 << 11),
733 .enable = s5p6440_sclk_ctrl,
734 },
735 .sources = &clkset_audio,
736 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 3 },
737 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 24, .size = 4 },
738 },
574}; 739};
575 740
576/* Clock initialisation code */ 741/* Clock initialisation code */
577static struct clksrc_clk *init_parents[] = { 742static struct clksrc_clk *sysclks[] = {
578 &clk_mout_apll, 743 &clk_mout_apll,
579 &clk_mout_epll, 744 &clk_mout_epll,
580 &clk_mout_mpll, 745 &clk_mout_mpll,
746 &clk_dout_mpll,
747 &clk_armclk,
748 &clk_hclk,
749 &clk_pclk,
750 &clk_hclk_low,
751 &clk_pclk_low,
581}; 752};
582 753
583void __init_or_cpufreq s5p6440_setup_clocks(void) 754void __init_or_cpufreq s5p6440_setup_clocks(void)
@@ -593,21 +764,13 @@ void __init_or_cpufreq s5p6440_setup_clocks(void)
593 unsigned long apll; 764 unsigned long apll;
594 unsigned long mpll; 765 unsigned long mpll;
595 unsigned int ptr; 766 unsigned int ptr;
596 u32 clkdiv0;
597 u32 clkdiv3;
598 767
599 /* Set S5P6440 functions for clk_fout_epll */ 768 /* Set S5P6440 functions for clk_fout_epll */
600 clk_fout_epll.enable = s5p6440_epll_enable; 769 clk_fout_epll.enable = s5p6440_epll_enable;
601 clk_fout_epll.ops = &s5p6440_epll_ops; 770 clk_fout_epll.ops = &s5p6440_epll_ops;
602 771
603 /* Set S5P6440 functions for arm clock */
604 clk_arm.parent = &clk_mout_apll.clk;
605 clk_arm.ops = &s5p6440_clkarm_ops;
606 clk_48m.enable = s5p6440_clk48m_ctrl; 772 clk_48m.enable = s5p6440_clk48m_ctrl;
607 773
608 clkdiv0 = __raw_readl(S5P_CLK_DIV0);
609 clkdiv3 = __raw_readl(S5P_CLK_DIV3);
610
611 xtal_clk = clk_get(NULL, "ext_xtal"); 774 xtal_clk = clk_get(NULL, "ext_xtal");
612 BUG_ON(IS_ERR(xtal_clk)); 775 BUG_ON(IS_ERR(xtal_clk));
613 776
@@ -619,41 +782,28 @@ void __init_or_cpufreq s5p6440_setup_clocks(void)
619 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); 782 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
620 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502); 783 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502);
621 784
785 clk_fout_mpll.rate = mpll;
786 clk_fout_epll.rate = epll;
787 clk_fout_apll.rate = apll;
788
622 printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \ 789 printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
623 " E=%ld.%ldMHz\n", 790 " E=%ld.%ldMHz\n",
624 print_mhz(apll), print_mhz(mpll), print_mhz(epll)); 791 print_mhz(apll), print_mhz(mpll), print_mhz(epll));
625 792
626 fclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_ARM); 793 fclk = clk_get_rate(&clk_armclk.clk);
627 hclk = fclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK); 794 hclk = clk_get_rate(&clk_hclk.clk);
628 pclk = hclk / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK); 795 pclk = clk_get_rate(&clk_pclk.clk);
629 796 hclk_low = clk_get_rate(&clk_hclk_low.clk);
630 if (__raw_readl(S5P_OTHERS) & S5P_OTHERS_HCLK_LOW_SEL_MPLL) { 797 pclk_low = clk_get_rate(&clk_pclk_low.clk);
631 /* Asynchronous mode */
632 hclk_low = mpll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
633 } else {
634 /* Synchronous mode */
635 hclk_low = apll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
636 }
637
638 pclk_low = hclk_low / GET_DIV(clkdiv3, S5P_CLKDIV3_PCLK_LOW);
639 798
640 printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \ 799 printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
641 " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n", 800 " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
642 print_mhz(hclk), print_mhz(hclk_low), 801 print_mhz(hclk), print_mhz(hclk_low),
643 print_mhz(pclk), print_mhz(pclk_low)); 802 print_mhz(pclk), print_mhz(pclk_low));
644 803
645 clk_fout_mpll.rate = mpll;
646 clk_fout_epll.rate = epll;
647 clk_fout_apll.rate = apll;
648
649 clk_f.rate = fclk; 804 clk_f.rate = fclk;
650 clk_h.rate = hclk; 805 clk_h.rate = hclk;
651 clk_p.rate = pclk; 806 clk_p.rate = pclk;
652 clk_h_low.rate = hclk_low;
653 clk_p_low.rate = pclk_low;
654
655 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
656 s3c_set_clksrc(init_parents[ptr], true);
657 807
658 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) 808 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
659 s3c_set_clksrc(&clksrcs[ptr], true); 809 s3c_set_clksrc(&clksrcs[ptr], true);
@@ -661,13 +811,8 @@ void __init_or_cpufreq s5p6440_setup_clocks(void)
661 811
662static struct clk *clks[] __initdata = { 812static struct clk *clks[] __initdata = {
663 &clk_ext, 813 &clk_ext,
664 &clk_mout_epll.clk,
665 &clk_mout_mpll.clk,
666 &clk_dout_mpll,
667 &clk_iis_cd_v40, 814 &clk_iis_cd_v40,
668 &clk_pcm_cd, 815 &clk_pcm_cd,
669 &clk_p_low,
670 &clk_h_low,
671}; 816};
672 817
673void __init s5p6440_register_clocks(void) 818void __init s5p6440_register_clocks(void)
@@ -680,6 +825,9 @@ void __init s5p6440_register_clocks(void)
680 if (ret > 0) 825 if (ret > 0)
681 printk(KERN_ERR "Failed to register %u clocks\n", ret); 826 printk(KERN_ERR "Failed to register %u clocks\n", ret);
682 827
828 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
829 s3c_register_clksrc(sysclks[ptr], 1);
830
683 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 831 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
684 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 832 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
685 833
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
index 1794131aeacb..ca3b3206e6f8 100644
--- a/arch/arm/mach-s5p6440/cpu.c
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -88,7 +88,7 @@ void __init s5p6440_init_irq(void)
88 s5p_init_irq(vic, ARRAY_SIZE(vic)); 88 s5p_init_irq(vic, ARRAY_SIZE(vic));
89} 89}
90 90
91static struct sysdev_class s5p6440_sysclass = { 91struct sysdev_class s5p6440_sysclass = {
92 .name = "s5p6440-core", 92 .name = "s5p6440-core",
93}; 93};
94 94
diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c
new file mode 100644
index 000000000000..0c5367962830
--- /dev/null
+++ b/arch/arm/mach-s5p6440/dev-audio.c
@@ -0,0 +1,127 @@
1/* linux/arch/arm/mach-s5p6440/dev-audio.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co. Ltd
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/audio.h>
16
17#include <mach/gpio.h>
18#include <mach/map.h>
19#include <mach/dma.h>
20#include <mach/irqs.h>
21
22static int s5p6440_cfg_i2s(struct platform_device *pdev)
23{
24 /* configure GPIO for i2s port */
25 switch (pdev->id) {
26 case -1:
27 s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
28 s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
29 s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
30 s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
31 s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
32 s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
33 s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
34 break;
35
36 default:
37 printk(KERN_ERR "Invalid Device %d\n", pdev->id);
38 return -EINVAL;
39 }
40
41 return 0;
42}
43
44static struct s3c_audio_pdata s3c_i2s_pdata = {
45 .cfg_gpio = s5p6440_cfg_i2s,
46};
47
48static struct resource s5p6440_iis0_resource[] = {
49 [0] = {
50 .start = S5P6440_PA_I2S,
51 .end = S5P6440_PA_I2S + 0x100 - 1,
52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = DMACH_I2S0_TX,
56 .end = DMACH_I2S0_TX,
57 .flags = IORESOURCE_DMA,
58 },
59 [2] = {
60 .start = DMACH_I2S0_RX,
61 .end = DMACH_I2S0_RX,
62 .flags = IORESOURCE_DMA,
63 },
64};
65
66struct platform_device s5p6440_device_iis = {
67 .name = "s3c64xx-iis-v4",
68 .id = -1,
69 .num_resources = ARRAY_SIZE(s5p6440_iis0_resource),
70 .resource = s5p6440_iis0_resource,
71 .dev = {
72 .platform_data = &s3c_i2s_pdata,
73 },
74};
75
76/* PCM Controller platform_devices */
77
78static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
79{
80 switch (pdev->id) {
81 case 0:
82 s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
83 s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
84 s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
85 s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
86 s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
87 break;
88
89 default:
90 printk(KERN_DEBUG "Invalid PCM Controller number!");
91 return -EINVAL;
92 }
93
94 return 0;
95}
96
97static struct s3c_audio_pdata s3c_pcm_pdata = {
98 .cfg_gpio = s5p6440_pcm_cfg_gpio,
99};
100
101static struct resource s5p6440_pcm0_resource[] = {
102 [0] = {
103 .start = S5P6440_PA_PCM,
104 .end = S5P6440_PA_PCM + 0x100 - 1,
105 .flags = IORESOURCE_MEM,
106 },
107 [1] = {
108 .start = DMACH_PCM0_TX,
109 .end = DMACH_PCM0_TX,
110 .flags = IORESOURCE_DMA,
111 },
112 [2] = {
113 .start = DMACH_PCM0_RX,
114 .end = DMACH_PCM0_RX,
115 .flags = IORESOURCE_DMA,
116 },
117};
118
119struct platform_device s5p6440_device_pcm = {
120 .name = "samsung-pcm",
121 .id = 0,
122 .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
123 .resource = s5p6440_pcm0_resource,
124 .dev = {
125 .platform_data = &s3c_pcm_pdata,
126 },
127};
diff --git a/arch/arm/mach-s5p6440/dma.c b/arch/arm/mach-s5p6440/dma.c
new file mode 100644
index 000000000000..07606ad57519
--- /dev/null
+++ b/arch/arm/mach-s5p6440/dma.c
@@ -0,0 +1,105 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/dma-mapping.h>
22
23#include <plat/devs.h>
24#include <plat/irqs.h>
25
26#include <mach/map.h>
27#include <mach/irqs.h>
28
29#include <plat/s3c-pl330-pdata.h>
30
31static u64 dma_dmamask = DMA_BIT_MASK(32);
32
33static struct resource s5p6440_pdma_resource[] = {
34 [0] = {
35 .start = S5P6440_PA_PDMA,
36 .end = S5P6440_PA_PDMA + SZ_4K,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = IRQ_DMA0,
41 .end = IRQ_DMA0,
42 .flags = IORESOURCE_IRQ,
43 },
44};
45
46static struct s3c_pl330_platdata s5p6440_pdma_pdata = {
47 .peri = {
48 [0] = DMACH_UART0_RX,
49 [1] = DMACH_UART0_TX,
50 [2] = DMACH_UART1_RX,
51 [3] = DMACH_UART1_TX,
52 [4] = DMACH_UART2_RX,
53 [5] = DMACH_UART2_TX,
54 [6] = DMACH_UART3_RX,
55 [7] = DMACH_UART3_TX,
56 [8] = DMACH_MAX,
57 [9] = DMACH_MAX,
58 [10] = DMACH_PCM0_TX,
59 [11] = DMACH_PCM0_RX,
60 [12] = DMACH_I2S0_TX,
61 [13] = DMACH_I2S0_RX,
62 [14] = DMACH_SPI0_TX,
63 [15] = DMACH_SPI0_RX,
64 [16] = DMACH_MAX,
65 [17] = DMACH_MAX,
66 [18] = DMACH_MAX,
67 [19] = DMACH_MAX,
68 [20] = DMACH_SPI1_TX,
69 [21] = DMACH_SPI1_RX,
70 [22] = DMACH_MAX,
71 [23] = DMACH_MAX,
72 [24] = DMACH_MAX,
73 [25] = DMACH_MAX,
74 [26] = DMACH_MAX,
75 [27] = DMACH_MAX,
76 [28] = DMACH_MAX,
77 [29] = DMACH_PWM,
78 [30] = DMACH_MAX,
79 [31] = DMACH_MAX,
80 },
81};
82
83static struct platform_device s5p6440_device_pdma = {
84 .name = "s3c-pl330",
85 .id = 1,
86 .num_resources = ARRAY_SIZE(s5p6440_pdma_resource),
87 .resource = s5p6440_pdma_resource,
88 .dev = {
89 .dma_mask = &dma_dmamask,
90 .coherent_dma_mask = DMA_BIT_MASK(32),
91 .platform_data = &s5p6440_pdma_pdata,
92 },
93};
94
95static struct platform_device *s5p6440_dmacs[] __initdata = {
96 &s5p6440_device_pdma,
97};
98
99static int __init s5p6440_dma_init(void)
100{
101 platform_add_devices(s5p6440_dmacs, ARRAY_SIZE(s5p6440_dmacs));
102
103 return 0;
104}
105arch_initcall(s5p6440_dma_init);
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c
index b0ea741177ad..262dc75d5bea 100644
--- a/arch/arm/mach-s5p6440/gpio.c
+++ b/arch/arm/mach-s5p6440/gpio.c
@@ -161,12 +161,15 @@ static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = {
161 }, { 161 }, {
162 .cfg_eint = 0, 162 .cfg_eint = 0,
163 .set_config = s3c_gpio_setcfg_s3c24xx, 163 .set_config = s3c_gpio_setcfg_s3c24xx,
164 .get_config = s3c_gpio_getcfg_s3c24xx,
164 }, { 165 }, {
165 .cfg_eint = 2, 166 .cfg_eint = 2,
166 .set_config = s3c_gpio_setcfg_s3c24xx, 167 .set_config = s3c_gpio_setcfg_s3c24xx,
168 .get_config = s3c_gpio_getcfg_s3c24xx,
167 }, { 169 }, {
168 .cfg_eint = 3, 170 .cfg_eint = 3,
169 .set_config = s3c_gpio_setcfg_s3c24xx, 171 .set_config = s3c_gpio_setcfg_s3c24xx,
172 .get_config = s3c_gpio_getcfg_s3c24xx,
170 }, 173 },
171}; 174};
172 175
@@ -279,6 +282,8 @@ void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
279 for (; nr_chips > 0; nr_chips--, chipcfg++) { 282 for (; nr_chips > 0; nr_chips--, chipcfg++) {
280 if (!chipcfg->set_config) 283 if (!chipcfg->set_config)
281 chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit; 284 chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit;
285 if (!chipcfg->get_config)
286 chipcfg->get_config = s3c_gpio_getcfg_s3c64xx_4bit;
282 if (!chipcfg->set_pull) 287 if (!chipcfg->set_pull)
283 chipcfg->set_pull = s3c_gpio_setpull_updown; 288 chipcfg->set_pull = s3c_gpio_setpull_updown;
284 if (!chipcfg->get_pull) 289 if (!chipcfg->get_pull)
diff --git a/arch/arm/mach-s5p6440/include/mach/dma.h b/arch/arm/mach-s5p6440/include/mach/dma.h
new file mode 100644
index 000000000000..81209eb1409b
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/dma.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#ifndef __MACH_DMA_H
21#define __MACH_DMA_H
22
23/* This platform uses the common S3C DMA API driver for PL330 */
24#include <plat/s3c-dma-pl330.h>
25
26#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
index 8924e5a4d6a6..72aedadd412c 100644
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -29,6 +29,8 @@
29#define S5P6440_PA_VIC0 (0xE4000000) 29#define S5P6440_PA_VIC0 (0xE4000000)
30#define S5P_PA_VIC0 S5P6440_PA_VIC0 30#define S5P_PA_VIC0 S5P6440_PA_VIC0
31 31
32#define S5P6440_PA_PDMA 0xE9000000
33
32#define S5P6440_PA_VIC1 (0xE4100000) 34#define S5P6440_PA_VIC1 (0xE4100000)
33#define S5P_PA_VIC1 S5P6440_PA_VIC1 35#define S5P_PA_VIC1 S5P6440_PA_VIC1
34 36
@@ -61,6 +63,12 @@
61#define S5P6440_PA_SDRAM (0x20000000) 63#define S5P6440_PA_SDRAM (0x20000000)
62#define S5P_PA_SDRAM S5P6440_PA_SDRAM 64#define S5P_PA_SDRAM S5P6440_PA_SDRAM
63 65
66/* I2S */
67#define S5P6440_PA_I2S 0xF2000000
68
69/* PCM */
70#define S5P6440_PA_PCM 0xF2100000
71
64/* compatibiltiy defines. */ 72/* compatibiltiy defines. */
65#define S3C_PA_UART S5P6440_PA_UART 73#define S3C_PA_UART S5P6440_PA_UART
66#define S3C_PA_IIC S5P6440_PA_IIC0 74#define S3C_PA_IIC S5P6440_PA_IIC0
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
index c4bb7c555477..6a2a02fdf12a 100644
--- a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
@@ -1,11 +1,14 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright 2009 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 * 12 *
10 * S5P6440 - pwm clock and timer support 13 * S5P6440 - pwm clock and timer support
11 * 14 *
@@ -14,16 +17,19 @@
14 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
15*/ 18*/
16 19
20#ifndef __ASM_ARCH_PWMCLK_H
21#define __ASM_ARCH_PWMCLK_H __FILE__
22
17/** 23/**
18 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
19 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
20 * 26 *
21 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
22 * any of the TDIV clocks. 28 * any of the TDIV clocks.
23 */ 29 */
24static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
25{ 31{
26 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return 0;
27} 33}
28 34
29/** 35/**
@@ -35,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
35 */ 41 */
36static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
37{ 43{
38 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
39} 45}
40 46
41/** 47/**
@@ -45,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
45 */ 51 */
46static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
47{ 53{
48 return 0; 54 return 1;
49} 55}
50 56
51/** 57/**
@@ -56,7 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
56 */ 62 */
57static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
58{ 64{
59 return ilog2(div) - 1; 65 return ilog2(div);
60} 66}
61 67
62#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK 0
69
70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c
index 3ae88f2c7c77..d7fede971ca6 100644
--- a/arch/arm/mach-s5p6440/mach-smdk6440.c
+++ b/arch/arm/mach-s5p6440/mach-smdk6440.c
@@ -84,6 +84,7 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
84}; 84};
85 85
86static struct platform_device *smdk6440_devices[] __initdata = { 86static struct platform_device *smdk6440_devices[] __initdata = {
87 &s5p6440_device_iis,
87}; 88};
88 89
89static void __init smdk6440_map_io(void) 90static void __init smdk6440_map_io(void)
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/mach-s5p6440/setup-i2c0.c
index 67a66e02a97a..69e8a664aedb 100644
--- a/arch/arm/plat-s5p/setup-i2c0.c
+++ b/arch/arm/mach-s5p6440/setup-i2c0.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s5p/setup-i2c0.c 1/* linux/arch/arm/mach-s5p6440/setup-i2c0.c
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
index 4f3f6de6a013..0fd41b447915 100644
--- a/arch/arm/mach-s5p6442/Kconfig
+++ b/arch/arm/mach-s5p6442/Kconfig
@@ -12,6 +12,7 @@ if ARCH_S5P6442
12config CPU_S5P6442 12config CPU_S5P6442
13 bool 13 bool
14 select PLAT_S5P 14 select PLAT_S5P
15 select S3C_PL330_DMA
15 help 16 help
16 Enable S5P6442 CPU support 17 Enable S5P6442 CPU support
17 18
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
index dde39a6ce6bc..e30a7f76aee6 100644
--- a/arch/arm/mach-s5p6442/Makefile
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -12,8 +12,12 @@ obj- :=
12 12
13# Core support for S5P6442 system 13# Core support for S5P6442 system
14 14
15obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o 15obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o dma.o
16obj-$(CONFIG_CPU_S5P6442) += setup-i2c0.o
16 17
17# machine support 18# machine support
18 19
19obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o 20obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o
21
22# device support
23obj-y += dev-audio.o
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
index bc2524df89b3..a48fb553fd01 100644
--- a/arch/arm/mach-s5p6442/cpu.c
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -95,7 +95,7 @@ void __init s5p6442_init_irq(void)
95 s5p_init_irq(vic, ARRAY_SIZE(vic)); 95 s5p_init_irq(vic, ARRAY_SIZE(vic));
96} 96}
97 97
98static struct sysdev_class s5p6442_sysclass = { 98struct sysdev_class s5p6442_sysclass = {
99 .name = "s5p6442-core", 99 .name = "s5p6442-core",
100}; 100};
101 101
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c
new file mode 100644
index 000000000000..cb801e1f5e23
--- /dev/null
+++ b/arch/arm/mach-s5p6442/dev-audio.c
@@ -0,0 +1,197 @@
1/* linux/arch/arm/mach-s5p6442/dev-audio.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co. Ltd
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/audio.h>
16
17#include <mach/gpio.h>
18#include <mach/map.h>
19#include <mach/dma.h>
20#include <mach/irqs.h>
21
22static int s5p6442_cfg_i2s(struct platform_device *pdev)
23{
24 /* configure GPIO for i2s port */
25 switch (pdev->id) {
26 case 1:
27 s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(2));
28 s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(2));
29 s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(2));
30 s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(2));
31 s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(2));
32 break;
33
34 case -1:
35 s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(2));
36 s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(2));
37 s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(2));
38 s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(2));
39 s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(2));
40 break;
41
42 default:
43 printk(KERN_ERR "Invalid Device %d\n", pdev->id);
44 return -EINVAL;
45 }
46
47 return 0;
48}
49
50static struct s3c_audio_pdata s3c_i2s_pdata = {
51 .cfg_gpio = s5p6442_cfg_i2s,
52};
53
54static struct resource s5p6442_iis0_resource[] = {
55 [0] = {
56 .start = S5P6442_PA_I2S0,
57 .end = S5P6442_PA_I2S0 + 0x100 - 1,
58 .flags = IORESOURCE_MEM,
59 },
60 [1] = {
61 .start = DMACH_I2S0_TX,
62 .end = DMACH_I2S0_TX,
63 .flags = IORESOURCE_DMA,
64 },
65 [2] = {
66 .start = DMACH_I2S0_RX,
67 .end = DMACH_I2S0_RX,
68 .flags = IORESOURCE_DMA,
69 },
70};
71
72struct platform_device s5p6442_device_iis0 = {
73 .name = "s3c64xx-iis-v4",
74 .id = -1,
75 .num_resources = ARRAY_SIZE(s5p6442_iis0_resource),
76 .resource = s5p6442_iis0_resource,
77 .dev = {
78 .platform_data = &s3c_i2s_pdata,
79 },
80};
81
82static struct resource s5p6442_iis1_resource[] = {
83 [0] = {
84 .start = S5P6442_PA_I2S1,
85 .end = S5P6442_PA_I2S1 + 0x100 - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = DMACH_I2S1_TX,
90 .end = DMACH_I2S1_TX,
91 .flags = IORESOURCE_DMA,
92 },
93 [2] = {
94 .start = DMACH_I2S1_RX,
95 .end = DMACH_I2S1_RX,
96 .flags = IORESOURCE_DMA,
97 },
98};
99
100struct platform_device s5p6442_device_iis1 = {
101 .name = "s3c64xx-iis",
102 .id = 1,
103 .num_resources = ARRAY_SIZE(s5p6442_iis1_resource),
104 .resource = s5p6442_iis1_resource,
105 .dev = {
106 .platform_data = &s3c_i2s_pdata,
107 },
108};
109
110/* PCM Controller platform_devices */
111
112static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
113{
114 switch (pdev->id) {
115 case 0:
116 s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(3));
117 s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(3));
118 s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(3));
119 s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(3));
120 s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(3));
121 break;
122
123 case 1:
124 s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(3));
125 s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(3));
126 s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(3));
127 s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(3));
128 s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(3));
129 break;
130
131 default:
132 printk(KERN_DEBUG "Invalid PCM Controller number!");
133 return -EINVAL;
134 }
135
136 return 0;
137}
138
139static struct s3c_audio_pdata s3c_pcm_pdata = {
140 .cfg_gpio = s5p6442_pcm_cfg_gpio,
141};
142
143static struct resource s5p6442_pcm0_resource[] = {
144 [0] = {
145 .start = S5P6442_PA_PCM0,
146 .end = S5P6442_PA_PCM0 + 0x100 - 1,
147 .flags = IORESOURCE_MEM,
148 },
149 [1] = {
150 .start = DMACH_PCM0_TX,
151 .end = DMACH_PCM0_TX,
152 .flags = IORESOURCE_DMA,
153 },
154 [2] = {
155 .start = DMACH_PCM0_RX,
156 .end = DMACH_PCM0_RX,
157 .flags = IORESOURCE_DMA,
158 },
159};
160
161struct platform_device s5p6442_device_pcm0 = {
162 .name = "samsung-pcm",
163 .id = 0,
164 .num_resources = ARRAY_SIZE(s5p6442_pcm0_resource),
165 .resource = s5p6442_pcm0_resource,
166 .dev = {
167 .platform_data = &s3c_pcm_pdata,
168 },
169};
170
171static struct resource s5p6442_pcm1_resource[] = {
172 [0] = {
173 .start = S5P6442_PA_PCM1,
174 .end = S5P6442_PA_PCM1 + 0x100 - 1,
175 .flags = IORESOURCE_MEM,
176 },
177 [1] = {
178 .start = DMACH_PCM1_TX,
179 .end = DMACH_PCM1_TX,
180 .flags = IORESOURCE_DMA,
181 },
182 [2] = {
183 .start = DMACH_PCM1_RX,
184 .end = DMACH_PCM1_RX,
185 .flags = IORESOURCE_DMA,
186 },
187};
188
189struct platform_device s5p6442_device_pcm1 = {
190 .name = "samsung-pcm",
191 .id = 1,
192 .num_resources = ARRAY_SIZE(s5p6442_pcm1_resource),
193 .resource = s5p6442_pcm1_resource,
194 .dev = {
195 .platform_data = &s3c_pcm_pdata,
196 },
197};
diff --git a/arch/arm/mach-s5p6442/dma.c b/arch/arm/mach-s5p6442/dma.c
new file mode 100644
index 000000000000..ad4f8704b93d
--- /dev/null
+++ b/arch/arm/mach-s5p6442/dma.c
@@ -0,0 +1,105 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/dma-mapping.h>
22
23#include <plat/devs.h>
24#include <plat/irqs.h>
25
26#include <mach/map.h>
27#include <mach/irqs.h>
28
29#include <plat/s3c-pl330-pdata.h>
30
31static u64 dma_dmamask = DMA_BIT_MASK(32);
32
33static struct resource s5p6442_pdma_resource[] = {
34 [0] = {
35 .start = S5P6442_PA_PDMA,
36 .end = S5P6442_PA_PDMA + SZ_4K,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = IRQ_PDMA,
41 .end = IRQ_PDMA,
42 .flags = IORESOURCE_IRQ,
43 },
44};
45
46static struct s3c_pl330_platdata s5p6442_pdma_pdata = {
47 .peri = {
48 [0] = DMACH_UART0_RX,
49 [1] = DMACH_UART0_TX,
50 [2] = DMACH_UART1_RX,
51 [3] = DMACH_UART1_TX,
52 [4] = DMACH_UART2_RX,
53 [5] = DMACH_UART2_TX,
54 [6] = DMACH_MAX,
55 [7] = DMACH_MAX,
56 [8] = DMACH_MAX,
57 [9] = DMACH_I2S0_RX,
58 [10] = DMACH_I2S0_TX,
59 [11] = DMACH_I2S0S_TX,
60 [12] = DMACH_I2S1_RX,
61 [13] = DMACH_I2S1_TX,
62 [14] = DMACH_MAX,
63 [15] = DMACH_MAX,
64 [16] = DMACH_SPI0_RX,
65 [17] = DMACH_SPI0_TX,
66 [18] = DMACH_MAX,
67 [19] = DMACH_MAX,
68 [20] = DMACH_PCM0_RX,
69 [21] = DMACH_PCM0_TX,
70 [22] = DMACH_PCM1_RX,
71 [23] = DMACH_PCM1_TX,
72 [24] = DMACH_MAX,
73 [25] = DMACH_MAX,
74 [26] = DMACH_MAX,
75 [27] = DMACH_MSM_REQ0,
76 [28] = DMACH_MSM_REQ1,
77 [29] = DMACH_MSM_REQ2,
78 [30] = DMACH_MSM_REQ3,
79 [31] = DMACH_MAX,
80 },
81};
82
83static struct platform_device s5p6442_device_pdma = {
84 .name = "s3c-pl330",
85 .id = 1,
86 .num_resources = ARRAY_SIZE(s5p6442_pdma_resource),
87 .resource = s5p6442_pdma_resource,
88 .dev = {
89 .dma_mask = &dma_dmamask,
90 .coherent_dma_mask = DMA_BIT_MASK(32),
91 .platform_data = &s5p6442_pdma_pdata,
92 },
93};
94
95static struct platform_device *s5p6442_dmacs[] __initdata = {
96 &s5p6442_device_pdma,
97};
98
99static int __init s5p6442_dma_init(void)
100{
101 platform_add_devices(s5p6442_dmacs, ARRAY_SIZE(s5p6442_dmacs));
102
103 return 0;
104}
105arch_initcall(s5p6442_dma_init);
diff --git a/arch/arm/mach-s5p6442/include/mach/dma.h b/arch/arm/mach-s5p6442/include/mach/dma.h
new file mode 100644
index 000000000000..81209eb1409b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/dma.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#ifndef __MACH_DMA_H
21#define __MACH_DMA_H
22
23/* This platform uses the common S3C DMA API driver for PL330 */
24#include <plat/s3c-dma-pl330.h>
25
26#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 685277d792fb..7568dc0d6be0 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -34,6 +34,9 @@
34#define S5P6442_PA_VIC2 (0xE4200000) 34#define S5P6442_PA_VIC2 (0xE4200000)
35#define S5P_PA_VIC2 S5P6442_PA_VIC2 35#define S5P_PA_VIC2 S5P6442_PA_VIC2
36 36
37#define S5P6442_PA_MDMA 0xE8000000
38#define S5P6442_PA_PDMA 0xE9000000
39
37#define S5P6442_PA_TIMER (0xEA000000) 40#define S5P6442_PA_TIMER (0xEA000000)
38#define S5P_PA_TIMER S5P6442_PA_TIMER 41#define S5P_PA_TIMER S5P6442_PA_TIMER
39 42
@@ -51,6 +54,14 @@
51#define S5P6442_PA_SDRAM (0x20000000) 54#define S5P6442_PA_SDRAM (0x20000000)
52#define S5P_PA_SDRAM S5P6442_PA_SDRAM 55#define S5P_PA_SDRAM S5P6442_PA_SDRAM
53 56
57/* I2S */
58#define S5P6442_PA_I2S0 0xC0B00000
59#define S5P6442_PA_I2S1 0xF2200000
60
61/* PCM */
62#define S5P6442_PA_PCM0 0xF2400000
63#define S5P6442_PA_PCM1 0xF2500000
64
54/* compatibiltiy defines. */ 65/* compatibiltiy defines. */
55#define S3C_PA_UART S5P6442_PA_UART 66#define S3C_PA_UART S5P6442_PA_UART
56#define S3C_PA_IIC S5P6442_PA_IIC0 67#define S3C_PA_IIC S5P6442_PA_IIC0
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
index 15e8525da0f1..2724b37def31 100644
--- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -1,13 +1,14 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright 2010 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 * 12 *
12 * S5P6442 - pwm clock and timer support 13 * S5P6442 - pwm clock and timer support
13 * 14 *
@@ -21,14 +22,14 @@
21 22
22/** 23/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
25 * 26 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks. 28 * any of the TDIV clocks.
28 */ 29 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{ 31{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
32} 33}
33 34
34/** 35/**
@@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
40 */ 41 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{ 43{
43 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
44} 45}
45 46
46/** 47/**
@@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
50 */ 51 */
51static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
52{ 53{
53 return 0; 54 return 1;
54} 55}
55 56
56/** 57/**
@@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
61 */ 62 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{ 64{
64 return ilog2(div) - 1; 65 return ilog2(div);
65} 66}
66 67
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
68 69
69#endif /* __ASM_ARCH_PWMCLK_H */ 70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
index 0d63371ce07c..ebcf99777259 100644
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -65,6 +65,7 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
65}; 65};
66 66
67static struct platform_device *smdk6442_devices[] __initdata = { 67static struct platform_device *smdk6442_devices[] __initdata = {
68 &s5p6442_device_iis0,
68}; 69};
69 70
70static void __init smdk6442_map_io(void) 71static void __init smdk6442_map_io(void)
diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c
new file mode 100644
index 000000000000..662695dd7761
--- /dev/null
+++ b/arch/arm/mach-s5p6442/setup-i2c0.c
@@ -0,0 +1,25 @@
1/* linux/arch/arm/mach-s5p6442/setup-i2c0.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * I2C0 GPIO configuration.
7 *
8 * Based on plat-s3c64xx/setup-i2c0.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <plat/iic.h>
21
22void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{
24 /* Will be populated later */
25}
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 27ec167d2808..8593337784e1 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -12,12 +12,22 @@ config CPU_S5PC100
12 help 12 help
13 Enable S5PC100 CPU support 13 Enable S5PC100 CPU support
14 14
15config S5PC100_SETUP_FB_24BPP
16 bool
17 help
18 Common setup code for S5PC1XX with an 24bpp RGB display helper.
19
15config S5PC100_SETUP_SDHCI 20config S5PC100_SETUP_SDHCI
16 bool 21 bool
17 select S5PC1XX_SETUP_SDHCI_GPIO 22 select S5PC1XX_SETUP_SDHCI_GPIO
18 help 23 help
19 Internal helper functions for S5PC100 based SDHCI systems 24 Internal helper functions for S5PC100 based SDHCI systems
20 25
26config S5PC100_SETUP_I2C1
27 bool
28 help
29 Common setup code for i2c bus 1.
30
21config MACH_SMDKC100 31config MACH_SMDKC100
22 bool "SMDKC100" 32 bool "SMDKC100"
23 select CPU_S5PC100 33 select CPU_S5PC100
@@ -26,9 +36,8 @@ config MACH_SMDKC100
26 select S3C_DEV_HSMMC 36 select S3C_DEV_HSMMC
27 select S3C_DEV_HSMMC1 37 select S3C_DEV_HSMMC1
28 select S3C_DEV_HSMMC2 38 select S3C_DEV_HSMMC2
29 select S5PC1XX_SETUP_I2C0 39 select S5PC100_SETUP_FB_24BPP
30 select S5PC1XX_SETUP_I2C1 40 select S5PC100_SETUP_I2C1
31 select S5PC1XX_SETUP_FB_24BPP
32 select S5PC100_SETUP_SDHCI 41 select S5PC100_SETUP_SDHCI
33 help 42 help
34 Machine support for the Samsung SMDKC100 43 Machine support for the Samsung SMDKC100
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 809ff10f768f..373bc546eae8 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -11,10 +11,13 @@ obj- :=
11 11
12# Core support for S5PC100 system 12# Core support for S5PC100 system
13 13
14obj-$(CONFIG_CPU_S5PC100) += cpu.o 14obj-$(CONFIG_CPU_S5PC100) += cpu.o gpiolib.o
15obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o
15 16
16# Helper and device support 17# Helper and device support
17 18
19obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o
20obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
18obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o 21obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o
19 22
20# machine support 23# machine support
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
new file mode 100644
index 000000000000..e3fed4cfe7ad
--- /dev/null
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -0,0 +1,1358 @@
1/* linux/arch/arm/mach-s5pc100/clock.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PC100 - Clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20
21#include <mach/map.h>
22
23#include <plat/cpu-freq.h>
24#include <mach/regs-clock.h>
25#include <plat/clock.h>
26#include <plat/cpu.h>
27#include <plat/pll.h>
28#include <plat/s5p-clock.h>
29#include <plat/clock-clksrc.h>
30#include <plat/s5pc100.h>
31
32static struct clk s5p_clk_otgphy = {
33 .name = "otg_phy",
34 .id = -1,
35};
36
37static struct clk *clk_src_mout_href_list[] = {
38 [0] = &s5p_clk_27m,
39 [1] = &clk_fin_hpll,
40};
41
42static struct clksrc_sources clk_src_mout_href = {
43 .sources = clk_src_mout_href_list,
44 .nr_sources = ARRAY_SIZE(clk_src_mout_href_list),
45};
46
47static struct clksrc_clk clk_mout_href = {
48 .clk = {
49 .name = "mout_href",
50 .id = -1,
51 },
52 .sources = &clk_src_mout_href,
53 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 },
54};
55
56static struct clk *clk_src_mout_48m_list[] = {
57 [0] = &clk_xusbxti,
58 [1] = &s5p_clk_otgphy,
59};
60
61static struct clksrc_sources clk_src_mout_48m = {
62 .sources = clk_src_mout_48m_list,
63 .nr_sources = ARRAY_SIZE(clk_src_mout_48m_list),
64};
65
66static struct clksrc_clk clk_mout_48m = {
67 .clk = {
68 .name = "mout_48m",
69 .id = -1,
70 },
71 .sources = &clk_src_mout_48m,
72 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 1 },
73};
74
75static struct clksrc_clk clk_mout_mpll = {
76 .clk = {
77 .name = "mout_mpll",
78 .id = -1,
79 },
80 .sources = &clk_src_mpll,
81 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
82};
83
84
85static struct clksrc_clk clk_mout_apll = {
86 .clk = {
87 .name = "mout_apll",
88 .id = -1,
89 },
90 .sources = &clk_src_apll,
91 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
92};
93
94static struct clksrc_clk clk_mout_epll = {
95 .clk = {
96 .name = "mout_epll",
97 .id = -1,
98 },
99 .sources = &clk_src_epll,
100 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
101};
102
103static struct clk *clk_src_mout_hpll_list[] = {
104 [0] = &s5p_clk_27m,
105};
106
107static struct clksrc_sources clk_src_mout_hpll = {
108 .sources = clk_src_mout_hpll_list,
109 .nr_sources = ARRAY_SIZE(clk_src_mout_hpll_list),
110};
111
112static struct clksrc_clk clk_mout_hpll = {
113 .clk = {
114 .name = "mout_hpll",
115 .id = -1,
116 },
117 .sources = &clk_src_mout_hpll,
118 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 },
119};
120
121static struct clksrc_clk clk_div_apll = {
122 .clk = {
123 .name = "div_apll",
124 .id = -1,
125 .parent = &clk_mout_apll.clk,
126 },
127 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 1 },
128};
129
130static struct clksrc_clk clk_div_arm = {
131 .clk = {
132 .name = "div_arm",
133 .id = -1,
134 .parent = &clk_div_apll.clk,
135 },
136 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
137};
138
139static struct clksrc_clk clk_div_d0_bus = {
140 .clk = {
141 .name = "div_d0_bus",
142 .id = -1,
143 .parent = &clk_div_arm.clk,
144 },
145 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 },
146};
147
148static struct clksrc_clk clk_div_pclkd0 = {
149 .clk = {
150 .name = "div_pclkd0",
151 .id = -1,
152 .parent = &clk_div_d0_bus.clk,
153 },
154 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 },
155};
156
157static struct clksrc_clk clk_div_secss = {
158 .clk = {
159 .name = "div_secss",
160 .id = -1,
161 .parent = &clk_div_d0_bus.clk,
162 },
163 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 3 },
164};
165
166static struct clksrc_clk clk_div_apll2 = {
167 .clk = {
168 .name = "div_apll2",
169 .id = -1,
170 .parent = &clk_mout_apll.clk,
171 },
172 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 3 },
173};
174
175static struct clk *clk_src_mout_am_list[] = {
176 [0] = &clk_mout_mpll.clk,
177 [1] = &clk_div_apll2.clk,
178};
179
180struct clksrc_sources clk_src_mout_am = {
181 .sources = clk_src_mout_am_list,
182 .nr_sources = ARRAY_SIZE(clk_src_mout_am_list),
183};
184
185static struct clksrc_clk clk_mout_am = {
186 .clk = {
187 .name = "mout_am",
188 .id = -1,
189 },
190 .sources = &clk_src_mout_am,
191 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 },
192};
193
194static struct clksrc_clk clk_div_d1_bus = {
195 .clk = {
196 .name = "div_d1_bus",
197 .id = -1,
198 .parent = &clk_mout_am.clk,
199 },
200 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 3 },
201};
202
203static struct clksrc_clk clk_div_mpll2 = {
204 .clk = {
205 .name = "div_mpll2",
206 .id = -1,
207 .parent = &clk_mout_am.clk,
208 },
209 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 1 },
210};
211
212static struct clksrc_clk clk_div_mpll = {
213 .clk = {
214 .name = "div_mpll",
215 .id = -1,
216 .parent = &clk_mout_am.clk,
217 },
218 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 2 },
219};
220
221static struct clk *clk_src_mout_onenand_list[] = {
222 [0] = &clk_div_d0_bus.clk,
223 [1] = &clk_div_d1_bus.clk,
224};
225
226struct clksrc_sources clk_src_mout_onenand = {
227 .sources = clk_src_mout_onenand_list,
228 .nr_sources = ARRAY_SIZE(clk_src_mout_onenand_list),
229};
230
231static struct clksrc_clk clk_mout_onenand = {
232 .clk = {
233 .name = "mout_onenand",
234 .id = -1,
235 },
236 .sources = &clk_src_mout_onenand,
237 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 },
238};
239
240static struct clksrc_clk clk_div_onenand = {
241 .clk = {
242 .name = "div_onenand",
243 .id = -1,
244 .parent = &clk_mout_onenand.clk,
245 },
246 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 2 },
247};
248
249static struct clksrc_clk clk_div_pclkd1 = {
250 .clk = {
251 .name = "div_pclkd1",
252 .id = -1,
253 .parent = &clk_div_d1_bus.clk,
254 },
255 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 3 },
256};
257
258static struct clksrc_clk clk_div_cam = {
259 .clk = {
260 .name = "div_cam",
261 .id = -1,
262 .parent = &clk_div_mpll2.clk,
263 },
264 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 24, .size = 5 },
265};
266
267static struct clksrc_clk clk_div_hdmi = {
268 .clk = {
269 .name = "div_hdmi",
270 .id = -1,
271 .parent = &clk_mout_hpll.clk,
272 },
273 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 28, .size = 4 },
274};
275
276static int s5pc100_epll_enable(struct clk *clk, int enable)
277{
278 unsigned int ctrlbit = clk->ctrlbit;
279 unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit;
280
281 if (enable)
282 __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON);
283 else
284 __raw_writel(epll_con, S5P_EPLL_CON);
285
286 return 0;
287}
288
289static unsigned long s5pc100_epll_get_rate(struct clk *clk)
290{
291 return clk->rate;
292}
293
294static u32 epll_div[][4] = {
295 { 32750000, 131, 3, 4 },
296 { 32768000, 131, 3, 4 },
297 { 36000000, 72, 3, 3 },
298 { 45000000, 90, 3, 3 },
299 { 45158000, 90, 3, 3 },
300 { 45158400, 90, 3, 3 },
301 { 48000000, 96, 3, 3 },
302 { 49125000, 131, 4, 3 },
303 { 49152000, 131, 4, 3 },
304 { 60000000, 120, 3, 3 },
305 { 67737600, 226, 5, 3 },
306 { 67738000, 226, 5, 3 },
307 { 73800000, 246, 5, 3 },
308 { 73728000, 246, 5, 3 },
309 { 72000000, 144, 3, 3 },
310 { 84000000, 168, 3, 3 },
311 { 96000000, 96, 3, 2 },
312 { 144000000, 144, 3, 2 },
313 { 192000000, 96, 3, 1 }
314};
315
316static int s5pc100_epll_set_rate(struct clk *clk, unsigned long rate)
317{
318 unsigned int epll_con;
319 unsigned int i;
320
321 if (clk->rate == rate) /* Return if nothing changed */
322 return 0;
323
324 epll_con = __raw_readl(S5P_EPLL_CON);
325
326 epll_con &= ~(PLL65XX_MDIV_MASK | PLL65XX_PDIV_MASK | PLL65XX_SDIV_MASK);
327
328 for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
329 if (epll_div[i][0] == rate) {
330 epll_con |= (epll_div[i][1] << PLL65XX_MDIV_SHIFT) |
331 (epll_div[i][2] << PLL65XX_PDIV_SHIFT) |
332 (epll_div[i][3] << PLL65XX_SDIV_SHIFT);
333 break;
334 }
335 }
336
337 if (i == ARRAY_SIZE(epll_div)) {
338 printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
339 return -EINVAL;
340 }
341
342 __raw_writel(epll_con, S5P_EPLL_CON);
343
344 clk->rate = rate;
345
346 return 0;
347}
348
349static struct clk_ops s5pc100_epll_ops = {
350 .get_rate = s5pc100_epll_get_rate,
351 .set_rate = s5pc100_epll_set_rate,
352};
353
354static int s5pc100_d0_0_ctrl(struct clk *clk, int enable)
355{
356 return s5p_gatectrl(S5P_CLKGATE_D00, clk, enable);
357}
358
359static int s5pc100_d0_1_ctrl(struct clk *clk, int enable)
360{
361 return s5p_gatectrl(S5P_CLKGATE_D01, clk, enable);
362}
363
364static int s5pc100_d0_2_ctrl(struct clk *clk, int enable)
365{
366 return s5p_gatectrl(S5P_CLKGATE_D02, clk, enable);
367}
368
369static int s5pc100_d1_0_ctrl(struct clk *clk, int enable)
370{
371 return s5p_gatectrl(S5P_CLKGATE_D10, clk, enable);
372}
373
374static int s5pc100_d1_1_ctrl(struct clk *clk, int enable)
375{
376 return s5p_gatectrl(S5P_CLKGATE_D11, clk, enable);
377}
378
379static int s5pc100_d1_2_ctrl(struct clk *clk, int enable)
380{
381 return s5p_gatectrl(S5P_CLKGATE_D12, clk, enable);
382}
383
384static int s5pc100_d1_3_ctrl(struct clk *clk, int enable)
385{
386 return s5p_gatectrl(S5P_CLKGATE_D13, clk, enable);
387}
388
389static int s5pc100_d1_4_ctrl(struct clk *clk, int enable)
390{
391 return s5p_gatectrl(S5P_CLKGATE_D14, clk, enable);
392}
393
394static int s5pc100_d1_5_ctrl(struct clk *clk, int enable)
395{
396 return s5p_gatectrl(S5P_CLKGATE_D15, clk, enable);
397}
398
399static int s5pc100_sclk0_ctrl(struct clk *clk, int enable)
400{
401 return s5p_gatectrl(S5P_CLKGATE_SCLK0, clk, enable);
402}
403
404static int s5pc100_sclk1_ctrl(struct clk *clk, int enable)
405{
406 return s5p_gatectrl(S5P_CLKGATE_SCLK1, clk, enable);
407}
408
409/*
410 * The following clocks will be disabled during clock initialization. It is
411 * recommended to keep the following clocks disabled until the driver requests
412 * for enabling the clock.
413 */
414static struct clk init_clocks_disable[] = {
415 {
416 .name = "cssys",
417 .id = -1,
418 .parent = &clk_div_d0_bus.clk,
419 .enable = s5pc100_d0_0_ctrl,
420 .ctrlbit = (1 << 6),
421 }, {
422 .name = "secss",
423 .id = -1,
424 .parent = &clk_div_d0_bus.clk,
425 .enable = s5pc100_d0_0_ctrl,
426 .ctrlbit = (1 << 5),
427 }, {
428 .name = "g2d",
429 .id = -1,
430 .parent = &clk_div_d0_bus.clk,
431 .enable = s5pc100_d0_0_ctrl,
432 .ctrlbit = (1 << 4),
433 }, {
434 .name = "mdma",
435 .id = -1,
436 .parent = &clk_div_d0_bus.clk,
437 .enable = s5pc100_d0_0_ctrl,
438 .ctrlbit = (1 << 3),
439 }, {
440 .name = "cfcon",
441 .id = -1,
442 .parent = &clk_div_d0_bus.clk,
443 .enable = s5pc100_d0_0_ctrl,
444 .ctrlbit = (1 << 2),
445 }, {
446 .name = "nfcon",
447 .id = -1,
448 .parent = &clk_div_d0_bus.clk,
449 .enable = s5pc100_d0_1_ctrl,
450 .ctrlbit = (1 << 3),
451 }, {
452 .name = "onenandc",
453 .id = -1,
454 .parent = &clk_div_d0_bus.clk,
455 .enable = s5pc100_d0_1_ctrl,
456 .ctrlbit = (1 << 2),
457 }, {
458 .name = "sdm",
459 .id = -1,
460 .parent = &clk_div_d0_bus.clk,
461 .enable = s5pc100_d0_2_ctrl,
462 .ctrlbit = (1 << 2),
463 }, {
464 .name = "seckey",
465 .id = -1,
466 .parent = &clk_div_d0_bus.clk,
467 .enable = s5pc100_d0_2_ctrl,
468 .ctrlbit = (1 << 1),
469 }, {
470 .name = "hsmmc",
471 .id = 2,
472 .parent = &clk_div_d1_bus.clk,
473 .enable = s5pc100_d1_0_ctrl,
474 .ctrlbit = (1 << 7),
475 }, {
476 .name = "hsmmc",
477 .id = 1,
478 .parent = &clk_div_d1_bus.clk,
479 .enable = s5pc100_d1_0_ctrl,
480 .ctrlbit = (1 << 6),
481 }, {
482 .name = "hsmmc",
483 .id = 0,
484 .parent = &clk_div_d1_bus.clk,
485 .enable = s5pc100_d1_0_ctrl,
486 .ctrlbit = (1 << 5),
487 }, {
488 .name = "modemif",
489 .id = -1,
490 .parent = &clk_div_d1_bus.clk,
491 .enable = s5pc100_d1_0_ctrl,
492 .ctrlbit = (1 << 4),
493 }, {
494 .name = "otg",
495 .id = -1,
496 .parent = &clk_div_d1_bus.clk,
497 .enable = s5pc100_d1_0_ctrl,
498 .ctrlbit = (1 << 3),
499 }, {
500 .name = "usbhost",
501 .id = -1,
502 .parent = &clk_div_d1_bus.clk,
503 .enable = s5pc100_d1_0_ctrl,
504 .ctrlbit = (1 << 2),
505 }, {
506 .name = "pdma",
507 .id = 1,
508 .parent = &clk_div_d1_bus.clk,
509 .enable = s5pc100_d1_0_ctrl,
510 .ctrlbit = (1 << 1),
511 }, {
512 .name = "pdma",
513 .id = 0,
514 .parent = &clk_div_d1_bus.clk,
515 .enable = s5pc100_d1_0_ctrl,
516 .ctrlbit = (1 << 0),
517 }, {
518 .name = "lcd",
519 .id = -1,
520 .parent = &clk_div_d1_bus.clk,
521 .enable = s5pc100_d1_1_ctrl,
522 .ctrlbit = (1 << 0),
523 }, {
524 .name = "rotator",
525 .id = -1,
526 .parent = &clk_div_d1_bus.clk,
527 .enable = s5pc100_d1_1_ctrl,
528 .ctrlbit = (1 << 1),
529 }, {
530 .name = "fimc",
531 .id = 0,
532 .parent = &clk_div_d1_bus.clk,
533 .enable = s5pc100_d1_1_ctrl,
534 .ctrlbit = (1 << 2),
535 }, {
536 .name = "fimc",
537 .id = 1,
538 .parent = &clk_div_d1_bus.clk,
539 .enable = s5pc100_d1_1_ctrl,
540 .ctrlbit = (1 << 3),
541 }, {
542 .name = "fimc",
543 .id = 2,
544 .parent = &clk_div_d1_bus.clk,
545 .enable = s5pc100_d1_1_ctrl,
546 .ctrlbit = (1 << 4),
547 }, {
548 .name = "jpeg",
549 .id = -1,
550 .parent = &clk_div_d1_bus.clk,
551 .enable = s5pc100_d1_1_ctrl,
552 .ctrlbit = (1 << 5),
553 }, {
554 .name = "mipi-dsim",
555 .id = -1,
556 .parent = &clk_div_d1_bus.clk,
557 .enable = s5pc100_d1_1_ctrl,
558 .ctrlbit = (1 << 6),
559 }, {
560 .name = "mipi-csis",
561 .id = -1,
562 .parent = &clk_div_d1_bus.clk,
563 .enable = s5pc100_d1_1_ctrl,
564 .ctrlbit = (1 << 7),
565 }, {
566 .name = "g3d",
567 .id = 0,
568 .parent = &clk_div_d1_bus.clk,
569 .enable = s5pc100_d1_0_ctrl,
570 .ctrlbit = (1 << 8),
571 }, {
572 .name = "tv",
573 .id = -1,
574 .parent = &clk_div_d1_bus.clk,
575 .enable = s5pc100_d1_2_ctrl,
576 .ctrlbit = (1 << 0),
577 }, {
578 .name = "vp",
579 .id = -1,
580 .parent = &clk_div_d1_bus.clk,
581 .enable = s5pc100_d1_2_ctrl,
582 .ctrlbit = (1 << 1),
583 }, {
584 .name = "mixer",
585 .id = -1,
586 .parent = &clk_div_d1_bus.clk,
587 .enable = s5pc100_d1_2_ctrl,
588 .ctrlbit = (1 << 2),
589 }, {
590 .name = "hdmi",
591 .id = -1,
592 .parent = &clk_div_d1_bus.clk,
593 .enable = s5pc100_d1_2_ctrl,
594 .ctrlbit = (1 << 3),
595 }, {
596 .name = "mfc",
597 .id = -1,
598 .parent = &clk_div_d1_bus.clk,
599 .enable = s5pc100_d1_2_ctrl,
600 .ctrlbit = (1 << 4),
601 }, {
602 .name = "apc",
603 .id = -1,
604 .parent = &clk_div_d1_bus.clk,
605 .enable = s5pc100_d1_3_ctrl,
606 .ctrlbit = (1 << 2),
607 }, {
608 .name = "iec",
609 .id = -1,
610 .parent = &clk_div_d1_bus.clk,
611 .enable = s5pc100_d1_3_ctrl,
612 .ctrlbit = (1 << 3),
613 }, {
614 .name = "systimer",
615 .id = -1,
616 .parent = &clk_div_d1_bus.clk,
617 .enable = s5pc100_d1_3_ctrl,
618 .ctrlbit = (1 << 7),
619 }, {
620 .name = "watchdog",
621 .id = -1,
622 .parent = &clk_div_d1_bus.clk,
623 .enable = s5pc100_d1_3_ctrl,
624 .ctrlbit = (1 << 8),
625 }, {
626 .name = "rtc",
627 .id = -1,
628 .parent = &clk_div_d1_bus.clk,
629 .enable = s5pc100_d1_3_ctrl,
630 .ctrlbit = (1 << 9),
631 }, {
632 .name = "i2c",
633 .id = 0,
634 .parent = &clk_div_d1_bus.clk,
635 .enable = s5pc100_d1_4_ctrl,
636 .ctrlbit = (1 << 4),
637 }, {
638 .name = "i2c",
639 .id = 1,
640 .parent = &clk_div_d1_bus.clk,
641 .enable = s5pc100_d1_4_ctrl,
642 .ctrlbit = (1 << 5),
643 }, {
644 .name = "spi",
645 .id = 0,
646 .parent = &clk_div_d1_bus.clk,
647 .enable = s5pc100_d1_4_ctrl,
648 .ctrlbit = (1 << 6),
649 }, {
650 .name = "spi",
651 .id = 1,
652 .parent = &clk_div_d1_bus.clk,
653 .enable = s5pc100_d1_4_ctrl,
654 .ctrlbit = (1 << 7),
655 }, {
656 .name = "spi",
657 .id = 2,
658 .parent = &clk_div_d1_bus.clk,
659 .enable = s5pc100_d1_4_ctrl,
660 .ctrlbit = (1 << 8),
661 }, {
662 .name = "irda",
663 .id = -1,
664 .parent = &clk_div_d1_bus.clk,
665 .enable = s5pc100_d1_4_ctrl,
666 .ctrlbit = (1 << 9),
667 }, {
668 .name = "ccan",
669 .id = 0,
670 .parent = &clk_div_d1_bus.clk,
671 .enable = s5pc100_d1_4_ctrl,
672 .ctrlbit = (1 << 10),
673 }, {
674 .name = "ccan",
675 .id = 1,
676 .parent = &clk_div_d1_bus.clk,
677 .enable = s5pc100_d1_4_ctrl,
678 .ctrlbit = (1 << 11),
679 }, {
680 .name = "hsitx",
681 .id = -1,
682 .parent = &clk_div_d1_bus.clk,
683 .enable = s5pc100_d1_4_ctrl,
684 .ctrlbit = (1 << 12),
685 }, {
686 .name = "hsirx",
687 .id = -1,
688 .parent = &clk_div_d1_bus.clk,
689 .enable = s5pc100_d1_4_ctrl,
690 .ctrlbit = (1 << 13),
691 }, {
692 .name = "iis",
693 .id = 0,
694 .parent = &clk_div_d1_bus.clk,
695 .enable = s5pc100_d1_5_ctrl,
696 .ctrlbit = (1 << 0),
697 }, {
698 .name = "iis",
699 .id = 1,
700 .parent = &clk_div_d1_bus.clk,
701 .enable = s5pc100_d1_5_ctrl,
702 .ctrlbit = (1 << 1),
703 }, {
704 .name = "iis",
705 .id = 2,
706 .parent = &clk_div_d1_bus.clk,
707 .enable = s5pc100_d1_5_ctrl,
708 .ctrlbit = (1 << 2),
709 }, {
710 .name = "ac97",
711 .id = -1,
712 .parent = &clk_div_d1_bus.clk,
713 .enable = s5pc100_d1_5_ctrl,
714 .ctrlbit = (1 << 3),
715 }, {
716 .name = "pcm",
717 .id = 0,
718 .parent = &clk_div_d1_bus.clk,
719 .enable = s5pc100_d1_5_ctrl,
720 .ctrlbit = (1 << 4),
721 }, {
722 .name = "pcm",
723 .id = 1,
724 .parent = &clk_div_d1_bus.clk,
725 .enable = s5pc100_d1_5_ctrl,
726 .ctrlbit = (1 << 5),
727 }, {
728 .name = "spdif",
729 .id = -1,
730 .parent = &clk_div_d1_bus.clk,
731 .enable = s5pc100_d1_5_ctrl,
732 .ctrlbit = (1 << 6),
733 }, {
734 .name = "adc",
735 .id = -1,
736 .parent = &clk_div_d1_bus.clk,
737 .enable = s5pc100_d1_5_ctrl,
738 .ctrlbit = (1 << 7),
739 }, {
740 .name = "keyif",
741 .id = -1,
742 .parent = &clk_div_d1_bus.clk,
743 .enable = s5pc100_d1_5_ctrl,
744 .ctrlbit = (1 << 8),
745 }, {
746 .name = "spi_48m",
747 .id = 0,
748 .parent = &clk_mout_48m.clk,
749 .enable = s5pc100_sclk0_ctrl,
750 .ctrlbit = (1 << 7),
751 }, {
752 .name = "spi_48m",
753 .id = 1,
754 .parent = &clk_mout_48m.clk,
755 .enable = s5pc100_sclk0_ctrl,
756 .ctrlbit = (1 << 8),
757 }, {
758 .name = "spi_48m",
759 .id = 2,
760 .parent = &clk_mout_48m.clk,
761 .enable = s5pc100_sclk0_ctrl,
762 .ctrlbit = (1 << 9),
763 }, {
764 .name = "mmc_48m",
765 .id = 0,
766 .parent = &clk_mout_48m.clk,
767 .enable = s5pc100_sclk0_ctrl,
768 .ctrlbit = (1 << 15),
769 }, {
770 .name = "mmc_48m",
771 .id = 1,
772 .parent = &clk_mout_48m.clk,
773 .enable = s5pc100_sclk0_ctrl,
774 .ctrlbit = (1 << 16),
775 }, {
776 .name = "mmc_48m",
777 .id = 2,
778 .parent = &clk_mout_48m.clk,
779 .enable = s5pc100_sclk0_ctrl,
780 .ctrlbit = (1 << 17),
781 },
782};
783
784static struct clk clk_vclk54m = {
785 .name = "vclk_54m",
786 .id = -1,
787 .rate = 54000000,
788};
789
790static struct clk clk_i2scdclk0 = {
791 .name = "i2s_cdclk0",
792 .id = -1,
793};
794
795static struct clk clk_i2scdclk1 = {
796 .name = "i2s_cdclk1",
797 .id = -1,
798};
799
800static struct clk clk_i2scdclk2 = {
801 .name = "i2s_cdclk2",
802 .id = -1,
803};
804
805static struct clk clk_pcmcdclk0 = {
806 .name = "pcm_cdclk0",
807 .id = -1,
808};
809
810static struct clk clk_pcmcdclk1 = {
811 .name = "pcm_cdclk1",
812 .id = -1,
813};
814
815static struct clk *clk_src_group1_list[] = {
816 [0] = &clk_mout_epll.clk,
817 [1] = &clk_div_mpll2.clk,
818 [2] = &clk_fin_epll,
819 [3] = &clk_mout_hpll.clk,
820};
821
822struct clksrc_sources clk_src_group1 = {
823 .sources = clk_src_group1_list,
824 .nr_sources = ARRAY_SIZE(clk_src_group1_list),
825};
826
827static struct clk *clk_src_group2_list[] = {
828 [0] = &clk_mout_epll.clk,
829 [1] = &clk_div_mpll.clk,
830};
831
832struct clksrc_sources clk_src_group2 = {
833 .sources = clk_src_group2_list,
834 .nr_sources = ARRAY_SIZE(clk_src_group2_list),
835};
836
837static struct clk *clk_src_group3_list[] = {
838 [0] = &clk_mout_epll.clk,
839 [1] = &clk_div_mpll.clk,
840 [2] = &clk_fin_epll,
841 [3] = &clk_i2scdclk0,
842 [4] = &clk_pcmcdclk0,
843 [5] = &clk_mout_hpll.clk,
844};
845
846struct clksrc_sources clk_src_group3 = {
847 .sources = clk_src_group3_list,
848 .nr_sources = ARRAY_SIZE(clk_src_group3_list),
849};
850
851static struct clk *clk_src_group4_list[] = {
852 [0] = &clk_mout_epll.clk,
853 [1] = &clk_div_mpll.clk,
854 [2] = &clk_fin_epll,
855 [3] = &clk_i2scdclk1,
856 [4] = &clk_pcmcdclk1,
857 [5] = &clk_mout_hpll.clk,
858};
859
860struct clksrc_sources clk_src_group4 = {
861 .sources = clk_src_group4_list,
862 .nr_sources = ARRAY_SIZE(clk_src_group4_list),
863};
864
865static struct clk *clk_src_group5_list[] = {
866 [0] = &clk_mout_epll.clk,
867 [1] = &clk_div_mpll.clk,
868 [2] = &clk_fin_epll,
869 [3] = &clk_i2scdclk2,
870 [4] = &clk_mout_hpll.clk,
871};
872
873struct clksrc_sources clk_src_group5 = {
874 .sources = clk_src_group5_list,
875 .nr_sources = ARRAY_SIZE(clk_src_group5_list),
876};
877
878static struct clk *clk_src_group6_list[] = {
879 [0] = &s5p_clk_27m,
880 [1] = &clk_vclk54m,
881 [2] = &clk_div_hdmi.clk,
882};
883
884struct clksrc_sources clk_src_group6 = {
885 .sources = clk_src_group6_list,
886 .nr_sources = ARRAY_SIZE(clk_src_group6_list),
887};
888
889static struct clk *clk_src_group7_list[] = {
890 [0] = &clk_mout_epll.clk,
891 [1] = &clk_div_mpll.clk,
892 [2] = &clk_mout_hpll.clk,
893 [3] = &clk_vclk54m,
894};
895
896struct clksrc_sources clk_src_group7 = {
897 .sources = clk_src_group7_list,
898 .nr_sources = ARRAY_SIZE(clk_src_group7_list),
899};
900
901static struct clk *clk_src_mmc0_list[] = {
902 [0] = &clk_mout_epll.clk,
903 [1] = &clk_div_mpll.clk,
904 [2] = &clk_fin_epll,
905};
906
907struct clksrc_sources clk_src_mmc0 = {
908 .sources = clk_src_mmc0_list,
909 .nr_sources = ARRAY_SIZE(clk_src_mmc0_list),
910};
911
912static struct clk *clk_src_mmc12_list[] = {
913 [0] = &clk_mout_epll.clk,
914 [1] = &clk_div_mpll.clk,
915 [2] = &clk_fin_epll,
916 [3] = &clk_mout_hpll.clk,
917};
918
919struct clksrc_sources clk_src_mmc12 = {
920 .sources = clk_src_mmc12_list,
921 .nr_sources = ARRAY_SIZE(clk_src_mmc12_list),
922};
923
924static struct clk *clk_src_irda_usb_list[] = {
925 [0] = &clk_mout_epll.clk,
926 [1] = &clk_div_mpll.clk,
927 [2] = &clk_fin_epll,
928 [3] = &clk_mout_hpll.clk,
929};
930
931struct clksrc_sources clk_src_irda_usb = {
932 .sources = clk_src_irda_usb_list,
933 .nr_sources = ARRAY_SIZE(clk_src_irda_usb_list),
934};
935
936static struct clk *clk_src_pwi_list[] = {
937 [0] = &clk_fin_epll,
938 [1] = &clk_mout_epll.clk,
939 [2] = &clk_div_mpll.clk,
940};
941
942struct clksrc_sources clk_src_pwi = {
943 .sources = clk_src_pwi_list,
944 .nr_sources = ARRAY_SIZE(clk_src_pwi_list),
945};
946
947static struct clksrc_clk clksrcs[] = {
948 {
949 .clk = {
950 .name = "sclk_spi",
951 .id = 0,
952 .ctrlbit = (1 << 4),
953 .enable = s5pc100_sclk0_ctrl,
954
955 },
956 .sources = &clk_src_group1,
957 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
958 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
959 }, {
960 .clk = {
961 .name = "sclk_spi",
962 .id = 1,
963 .ctrlbit = (1 << 5),
964 .enable = s5pc100_sclk0_ctrl,
965
966 },
967 .sources = &clk_src_group1,
968 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
969 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
970 }, {
971 .clk = {
972 .name = "sclk_spi",
973 .id = 2,
974 .ctrlbit = (1 << 6),
975 .enable = s5pc100_sclk0_ctrl,
976
977 },
978 .sources = &clk_src_group1,
979 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
980 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
981 }, {
982 .clk = {
983 .name = "uclk1",
984 .id = -1,
985 .ctrlbit = (1 << 3),
986 .enable = s5pc100_sclk0_ctrl,
987
988 },
989 .sources = &clk_src_group2,
990 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
991 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
992 }, {
993 .clk = {
994 .name = "sclk_mixer",
995 .id = -1,
996 .ctrlbit = (1 << 6),
997 .enable = s5pc100_sclk0_ctrl,
998
999 },
1000 .sources = &clk_src_group6,
1001 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 28, .size = 2 },
1002 }, {
1003 .clk = {
1004 .name = "sclk_audio",
1005 .id = 0,
1006 .ctrlbit = (1 << 8),
1007 .enable = s5pc100_sclk1_ctrl,
1008
1009 },
1010 .sources = &clk_src_group3,
1011 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 3 },
1012 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
1013 }, {
1014 .clk = {
1015 .name = "sclk_audio",
1016 .id = 1,
1017 .ctrlbit = (1 << 9),
1018 .enable = s5pc100_sclk1_ctrl,
1019
1020 },
1021 .sources = &clk_src_group4,
1022 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 3 },
1023 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
1024 }, {
1025 .clk = {
1026 .name = "sclk_audio",
1027 .id = 2,
1028 .ctrlbit = (1 << 10),
1029 .enable = s5pc100_sclk1_ctrl,
1030
1031 },
1032 .sources = &clk_src_group5,
1033 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 3 },
1034 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
1035 }, {
1036 .clk = {
1037 .name = "sclk_lcd",
1038 .id = -1,
1039 .ctrlbit = (1 << 0),
1040 .enable = s5pc100_sclk1_ctrl,
1041
1042 },
1043 .sources = &clk_src_group7,
1044 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 12, .size = 2 },
1045 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 },
1046 }, {
1047 .clk = {
1048 .name = "sclk_fimc",
1049 .id = 0,
1050 .ctrlbit = (1 << 1),
1051 .enable = s5pc100_sclk1_ctrl,
1052
1053 },
1054 .sources = &clk_src_group7,
1055 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 16, .size = 2 },
1056 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 16, .size = 4 },
1057 }, {
1058 .clk = {
1059 .name = "sclk_fimc",
1060 .id = 1,
1061 .ctrlbit = (1 << 2),
1062 .enable = s5pc100_sclk1_ctrl,
1063
1064 },
1065 .sources = &clk_src_group7,
1066 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 20, .size = 2 },
1067 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 },
1068 }, {
1069 .clk = {
1070 .name = "sclk_fimc",
1071 .id = 2,
1072 .ctrlbit = (1 << 3),
1073 .enable = s5pc100_sclk1_ctrl,
1074
1075 },
1076 .sources = &clk_src_group7,
1077 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 24, .size = 2 },
1078 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 },
1079 }, {
1080 .clk = {
1081 .name = "mmc_bus",
1082 .id = 0,
1083 .ctrlbit = (1 << 12),
1084 .enable = s5pc100_sclk1_ctrl,
1085
1086 },
1087 .sources = &clk_src_mmc0,
1088 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 },
1089 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
1090 }, {
1091 .clk = {
1092 .name = "mmc_bus",
1093 .id = 1,
1094 .ctrlbit = (1 << 13),
1095 .enable = s5pc100_sclk1_ctrl,
1096
1097 },
1098 .sources = &clk_src_mmc12,
1099 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 },
1100 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
1101 }, {
1102 .clk = {
1103 .name = "mmc_bus",
1104 .id = 2,
1105 .ctrlbit = (1 << 14),
1106 .enable = s5pc100_sclk1_ctrl,
1107
1108 },
1109 .sources = &clk_src_mmc12,
1110 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 },
1111 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
1112 }, {
1113 .clk = {
1114 .name = "sclk_irda",
1115 .id = 2,
1116 .ctrlbit = (1 << 10),
1117 .enable = s5pc100_sclk0_ctrl,
1118
1119 },
1120 .sources = &clk_src_irda_usb,
1121 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 },
1122 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
1123 }, {
1124 .clk = {
1125 .name = "sclk_irda",
1126 .id = -1,
1127 .ctrlbit = (1 << 10),
1128 .enable = s5pc100_sclk0_ctrl,
1129
1130 },
1131 .sources = &clk_src_mmc12,
1132 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 2 },
1133 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 },
1134 }, {
1135 .clk = {
1136 .name = "sclk_pwi",
1137 .id = -1,
1138 .ctrlbit = (1 << 1),
1139 .enable = s5pc100_sclk0_ctrl,
1140
1141 },
1142 .sources = &clk_src_pwi,
1143 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 0, .size = 2 },
1144 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 3 },
1145 }, {
1146 .clk = {
1147 .name = "sclk_uhost",
1148 .id = -1,
1149 .ctrlbit = (1 << 11),
1150 .enable = s5pc100_sclk0_ctrl,
1151
1152 },
1153 .sources = &clk_src_irda_usb,
1154 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 2 },
1155 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 20, .size = 4 },
1156 },
1157};
1158
1159/* Clock initialisation code */
1160static struct clksrc_clk *sysclks[] = {
1161 &clk_mout_apll,
1162 &clk_mout_epll,
1163 &clk_mout_mpll,
1164 &clk_mout_hpll,
1165 &clk_mout_href,
1166 &clk_mout_48m,
1167 &clk_div_apll,
1168 &clk_div_arm,
1169 &clk_div_d0_bus,
1170 &clk_div_pclkd0,
1171 &clk_div_secss,
1172 &clk_div_apll2,
1173 &clk_mout_am,
1174 &clk_div_d1_bus,
1175 &clk_div_mpll2,
1176 &clk_div_mpll,
1177 &clk_mout_onenand,
1178 &clk_div_onenand,
1179 &clk_div_pclkd1,
1180 &clk_div_cam,
1181 &clk_div_hdmi,
1182};
1183
1184void __init_or_cpufreq s5pc100_setup_clocks(void)
1185{
1186 unsigned long xtal;
1187 unsigned long arm;
1188 unsigned long hclkd0;
1189 unsigned long hclkd1;
1190 unsigned long pclkd0;
1191 unsigned long pclkd1;
1192 unsigned long apll;
1193 unsigned long mpll;
1194 unsigned long epll;
1195 unsigned long hpll;
1196 unsigned int ptr;
1197
1198 /* Set S5PC100 functions for clk_fout_epll */
1199 clk_fout_epll.enable = s5pc100_epll_enable;
1200 clk_fout_epll.ops = &s5pc100_epll_ops;
1201
1202 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
1203
1204 xtal = clk_get_rate(&clk_xtal);
1205
1206 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
1207
1208 apll = s5p_get_pll65xx(xtal, __raw_readl(S5P_APLL_CON));
1209 mpll = s5p_get_pll65xx(xtal, __raw_readl(S5P_MPLL_CON));
1210 epll = s5p_get_pll65xx(xtal, __raw_readl(S5P_EPLL_CON));
1211 hpll = s5p_get_pll65xx(xtal, __raw_readl(S5P_HPLL_CON));
1212
1213 printk(KERN_INFO "S5PC100: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz, E=%ld.%ldMHz, H=%ld.%ldMHz\n",
1214 print_mhz(apll), print_mhz(mpll), print_mhz(epll), print_mhz(hpll));
1215
1216 clk_fout_apll.rate = apll;
1217 clk_fout_mpll.rate = mpll;
1218 clk_fout_epll.rate = epll;
1219 clk_mout_hpll.clk.rate = hpll;
1220
1221 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
1222 s3c_set_clksrc(&clksrcs[ptr], true);
1223
1224 arm = clk_get_rate(&clk_div_arm.clk);
1225 hclkd0 = clk_get_rate(&clk_div_d0_bus.clk);
1226 pclkd0 = clk_get_rate(&clk_div_pclkd0.clk);
1227 hclkd1 = clk_get_rate(&clk_div_d1_bus.clk);
1228 pclkd1 = clk_get_rate(&clk_div_pclkd1.clk);
1229
1230 printk(KERN_INFO "S5PC100: HCLKD0=%ld.%ldMHz, HCLKD1=%ld.%ldMHz, PCLKD0=%ld.%ldMHz, PCLKD1=%ld.%ldMHz\n",
1231 print_mhz(hclkd0), print_mhz(hclkd1), print_mhz(pclkd0), print_mhz(pclkd1));
1232
1233 clk_f.rate = arm;
1234 clk_h.rate = hclkd1;
1235 clk_p.rate = pclkd1;
1236}
1237
1238/*
1239 * The following clocks will be enabled during clock initialization.
1240 */
1241static struct clk init_clocks[] = {
1242 {
1243 .name = "tzic",
1244 .id = -1,
1245 .parent = &clk_div_d0_bus.clk,
1246 .enable = s5pc100_d0_0_ctrl,
1247 .ctrlbit = (1 << 1),
1248 }, {
1249 .name = "intc",
1250 .id = -1,
1251 .parent = &clk_div_d0_bus.clk,
1252 .enable = s5pc100_d0_0_ctrl,
1253 .ctrlbit = (1 << 0),
1254 }, {
1255 .name = "ebi",
1256 .id = -1,
1257 .parent = &clk_div_d0_bus.clk,
1258 .enable = s5pc100_d0_1_ctrl,
1259 .ctrlbit = (1 << 5),
1260 }, {
1261 .name = "intmem",
1262 .id = -1,
1263 .parent = &clk_div_d0_bus.clk,
1264 .enable = s5pc100_d0_1_ctrl,
1265 .ctrlbit = (1 << 4),
1266 }, {
1267 .name = "sromc",
1268 .id = -1,
1269 .parent = &clk_div_d0_bus.clk,
1270 .enable = s5pc100_d0_1_ctrl,
1271 .ctrlbit = (1 << 1),
1272 }, {
1273 .name = "dmc",
1274 .id = -1,
1275 .parent = &clk_div_d0_bus.clk,
1276 .enable = s5pc100_d0_1_ctrl,
1277 .ctrlbit = (1 << 0),
1278 }, {
1279 .name = "chipid",
1280 .id = -1,
1281 .parent = &clk_div_d0_bus.clk,
1282 .enable = s5pc100_d0_1_ctrl,
1283 .ctrlbit = (1 << 0),
1284 }, {
1285 .name = "gpio",
1286 .id = -1,
1287 .parent = &clk_div_d1_bus.clk,
1288 .enable = s5pc100_d1_3_ctrl,
1289 .ctrlbit = (1 << 1),
1290 }, {
1291 .name = "uart",
1292 .id = 0,
1293 .parent = &clk_div_d1_bus.clk,
1294 .enable = s5pc100_d1_4_ctrl,
1295 .ctrlbit = (1 << 0),
1296 }, {
1297 .name = "uart",
1298 .id = 1,
1299 .parent = &clk_div_d1_bus.clk,
1300 .enable = s5pc100_d1_4_ctrl,
1301 .ctrlbit = (1 << 1),
1302 }, {
1303 .name = "uart",
1304 .id = 2,
1305 .parent = &clk_div_d1_bus.clk,
1306 .enable = s5pc100_d1_4_ctrl,
1307 .ctrlbit = (1 << 2),
1308 }, {
1309 .name = "uart",
1310 .id = 3,
1311 .parent = &clk_div_d1_bus.clk,
1312 .enable = s5pc100_d1_4_ctrl,
1313 .ctrlbit = (1 << 3),
1314 }, {
1315 .name = "timers",
1316 .id = -1,
1317 .parent = &clk_div_d1_bus.clk,
1318 .enable = s5pc100_d1_3_ctrl,
1319 .ctrlbit = (1 << 6),
1320 },
1321};
1322
1323static struct clk *clks[] __initdata = {
1324 &clk_ext,
1325 &clk_i2scdclk0,
1326 &clk_i2scdclk1,
1327 &clk_i2scdclk2,
1328 &clk_pcmcdclk0,
1329 &clk_pcmcdclk1,
1330};
1331
1332void __init s5pc100_register_clocks(void)
1333{
1334 struct clk *clkp;
1335 int ret;
1336 int ptr;
1337
1338 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
1339
1340 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
1341 s3c_register_clksrc(sysclks[ptr], 1);
1342
1343 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
1344 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
1345
1346 clkp = init_clocks_disable;
1347 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
1348
1349 ret = s3c24xx_register_clock(clkp);
1350 if (ret < 0) {
1351 printk(KERN_ERR "Failed to register clock %s (%d)\n",
1352 clkp->name, ret);
1353 }
1354 (clkp->enable)(clkp, 0);
1355 }
1356
1357 s3c_pwmclk_init();
1358}
diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index 1ffc57ac293d..c8e8336a3a12 100644
--- a/arch/arm/plat-s5pc1xx/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -17,11 +17,11 @@
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18 18
19#include <mach/map.h> 19#include <mach/map.h>
20#include <mach/regs-gpio.h>
20 21
21#include <plat/gpio-core.h> 22#include <plat/gpio-core.h>
22#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
23#include <plat/gpio-cfg-helpers.h> 24#include <plat/gpio-cfg-helpers.h>
24#include <plat/regs-gpio.h>
25 25
26/* S5PC100 GPIO bank summary: 26/* S5PC100 GPIO bank summary:
27 * 27 *
@@ -61,74 +61,7 @@
61 * L3 8 4Bit None 61 * L3 8 4Bit None
62 */ 62 */
63 63
64#define OFF_GPCON (0x00) 64#if 0
65#define OFF_GPDAT (0x04)
66
67#define con_4bit_shift(__off) ((__off) * 4)
68
69#if 1
70#define gpio_dbg(x...) do { } while (0)
71#else
72#define gpio_dbg(x...) printk(KERN_DEBUG x)
73#endif
74
75/* The s5pc1xx_gpiolib routines are to control the gpio banks where
76 * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
77 * following example:
78 *
79 * base + 0x00: Control register, 4 bits per gpio
80 * gpio n: 4 bits starting at (4*n)
81 * 0000 = input, 0001 = output, others mean special-function
82 * base + 0x04: Data register, 1 bit per gpio
83 * bit n: data bit n
84 *
85 * Note, since the data register is one bit per gpio and is at base + 0x4
86 * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
87 * the output.
88 */
89
90static int s5pc1xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
91{
92 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
93 void __iomem *base = ourchip->base;
94 unsigned long con;
95
96 con = __raw_readl(base + OFF_GPCON);
97 con &= ~(0xf << con_4bit_shift(offset));
98 __raw_writel(con, base + OFF_GPCON);
99
100 gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
101
102 return 0;
103}
104
105static int s5pc1xx_gpiolib_output(struct gpio_chip *chip,
106 unsigned offset, int value)
107{
108 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
109 void __iomem *base = ourchip->base;
110 unsigned long con;
111 unsigned long dat;
112
113 con = __raw_readl(base + OFF_GPCON);
114 con &= ~(0xf << con_4bit_shift(offset));
115 con |= 0x1 << con_4bit_shift(offset);
116
117 dat = __raw_readl(base + OFF_GPDAT);
118 if (value)
119 dat |= 1 << offset;
120 else
121 dat &= ~(1 << offset);
122
123 __raw_writel(dat, base + OFF_GPDAT);
124 __raw_writel(con, base + OFF_GPCON);
125 __raw_writel(dat, base + OFF_GPDAT);
126
127 gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
128
129 return 0;
130}
131
132static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) 65static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
133{ 66{
134 return S3C_IRQ_GPIO(chip->base + offset); 67 return S3C_IRQ_GPIO(chip->base + offset);
@@ -152,7 +85,7 @@ static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
152 return IRQ_EINT(24 + offset); 85 return IRQ_EINT(24 + offset);
153 return -EINVAL; 86 return -EINVAL;
154} 87}
155 88#endif
156static struct s3c_gpio_cfg gpio_cfg = { 89static struct s3c_gpio_cfg gpio_cfg = {
157 .set_config = s3c_gpio_setcfg_s3c64xx_4bit, 90 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
158 .set_pull = s3c_gpio_setpull_updown, 91 .set_pull = s3c_gpio_setpull_updown,
@@ -452,12 +385,9 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
452extern struct irq_chip s5pc1xx_gpioint; 385extern struct irq_chip s5pc1xx_gpioint;
453extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); 386extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc);
454 387
455static __init void s5pc1xx_gpiolib_link(struct s3c_gpio_chip *chip) 388static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
456{ 389{
457 chip->chip.direction_input = s5pc1xx_gpiolib_input; 390#if 0
458 chip->chip.direction_output = s5pc1xx_gpiolib_output;
459 chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
460
461 /* Interrupt */ 391 /* Interrupt */
462 if (chip->config == &gpio_cfg) { 392 if (chip->config == &gpio_cfg) {
463 int i, irq; 393 int i, irq;
@@ -473,31 +403,26 @@ static __init void s5pc1xx_gpiolib_link(struct s3c_gpio_chip *chip)
473 } 403 }
474 } else if (chip->config == &gpio_cfg_eint) 404 } else if (chip->config == &gpio_cfg_eint)
475 chip->chip.to_irq = s5pc1xx_gpiolib_to_eint; 405 chip->chip.to_irq = s5pc1xx_gpiolib_to_eint;
476} 406#endif
477
478static __init void s5pc1xx_gpiolib_add(struct s3c_gpio_chip *chips,
479 int nr_chips,
480 void (*fn)(struct s3c_gpio_chip *))
481{
482 for (; nr_chips > 0; nr_chips--, chips++) {
483 if (fn)
484 (fn)(chips);
485 s3c_gpiolib_add(chips);
486 }
487} 407}
488 408
489static __init int s5pc1xx_gpiolib_init(void) 409static __init int s5pc1xx_gpiolib_init(void)
490{ 410{
491 struct s3c_gpio_chip *chips; 411 struct s3c_gpio_chip *chip;
492 int nr_chips; 412 int nr_chips;
493 413
494 chips = s5pc100_gpio_chips; 414 chip = s5pc100_gpio_chips;
495 nr_chips = ARRAY_SIZE(s5pc100_gpio_chips); 415 nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
416
417 for (; nr_chips > 0; nr_chips--, chip++)
418 s5pc100_gpiolib_link(chip);
496 419
497 s5pc1xx_gpiolib_add(chips, nr_chips, s5pc1xx_gpiolib_link); 420 samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
421 ARRAY_SIZE(s5pc100_gpio_chips));
422#if 0
498 /* Interrupt */ 423 /* Interrupt */
499 set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler); 424 set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler);
500 425#endif
501 return 0; 426 return 0;
502} 427}
503core_initcall(s5pc1xx_gpiolib_init); 428core_initcall(s5pc1xx_gpiolib_init);
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
index 2c4cbe8ee6b7..29a8a12d9b4f 100644
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -12,6 +12,9 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#ifndef __ASM_ARCH_GPIO_H
16#define __ASM_ARCH_GPIO_H __FILE__
17
15#define gpio_get_value __gpio_get_value 18#define gpio_get_value __gpio_get_value
16#define gpio_set_value __gpio_set_value 19#define gpio_set_value __gpio_set_value
17#define gpio_cansleep __gpio_cansleep 20#define gpio_cansleep __gpio_cansleep
@@ -52,11 +55,6 @@
52#define S5PC100_GPIO_L2_NR (8) 55#define S5PC100_GPIO_L2_NR (8)
53#define S5PC100_GPIO_L3_NR (8) 56#define S5PC100_GPIO_L3_NR (8)
54#define S5PC100_GPIO_L4_NR (8) 57#define S5PC100_GPIO_L4_NR (8)
55#define S5PC100_GPIO_MP00_NR (8)
56#define S5PC100_GPIO_MP01_NR (8)
57#define S5PC100_GPIO_MP02_NR (8)
58#define S5PC100_GPIO_MP03_NR (8)
59#define S5PC100_GPIO_MP04_NR (5)
60 58
61/* GPIO bank numbes */ 59/* GPIO bank numbes */
62 60
@@ -65,50 +63,45 @@
65 * change from one gpio bank to another can be caught. 63 * change from one gpio bank to another can be caught.
66*/ 64*/
67 65
68#define S5PC1XX_GPIO_NEXT(__gpio) \ 66#define S5PC100_GPIO_NEXT(__gpio) \
69 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) 67 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
70 68
71enum s3c_gpio_number { 69enum s5p_gpio_number {
72 S5PC100_GPIO_A0_START = 0, 70 S5PC100_GPIO_A0_START = 0,
73 S5PC100_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0), 71 S5PC100_GPIO_A1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A0),
74 S5PC100_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1), 72 S5PC100_GPIO_B_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A1),
75 S5PC100_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B), 73 S5PC100_GPIO_C_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_B),
76 S5PC100_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C), 74 S5PC100_GPIO_D_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_C),
77 S5PC100_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D), 75 S5PC100_GPIO_E0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_D),
78 S5PC100_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0), 76 S5PC100_GPIO_E1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E0),
79 S5PC100_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1), 77 S5PC100_GPIO_F0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E1),
80 S5PC100_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0), 78 S5PC100_GPIO_F1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F0),
81 S5PC100_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1), 79 S5PC100_GPIO_F2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F1),
82 S5PC100_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2), 80 S5PC100_GPIO_F3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F2),
83 S5PC100_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3), 81 S5PC100_GPIO_G0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F3),
84 S5PC100_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0), 82 S5PC100_GPIO_G1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G0),
85 S5PC100_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1), 83 S5PC100_GPIO_G2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G1),
86 S5PC100_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2), 84 S5PC100_GPIO_G3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G2),
87 S5PC100_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3), 85 S5PC100_GPIO_H0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G3),
88 S5PC100_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0), 86 S5PC100_GPIO_H1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H0),
89 S5PC100_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1), 87 S5PC100_GPIO_H2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H1),
90 S5PC100_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2), 88 S5PC100_GPIO_H3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H2),
91 S5PC100_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3), 89 S5PC100_GPIO_I_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H3),
92 S5PC100_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I), 90 S5PC100_GPIO_J0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_I),
93 S5PC100_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0), 91 S5PC100_GPIO_J1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J0),
94 S5PC100_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1), 92 S5PC100_GPIO_J2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J1),
95 S5PC100_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2), 93 S5PC100_GPIO_J3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J2),
96 S5PC100_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3), 94 S5PC100_GPIO_J4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J3),
97 S5PC100_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4), 95 S5PC100_GPIO_K0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J4),
98 S5PC100_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0), 96 S5PC100_GPIO_K1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K0),
99 S5PC100_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1), 97 S5PC100_GPIO_K2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K1),
100 S5PC100_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2), 98 S5PC100_GPIO_K3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K2),
101 S5PC100_GPIO_L0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3), 99 S5PC100_GPIO_L0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K3),
102 S5PC100_GPIO_L1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0), 100 S5PC100_GPIO_L1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L0),
103 S5PC100_GPIO_L2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1), 101 S5PC100_GPIO_L2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L1),
104 S5PC100_GPIO_L3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2), 102 S5PC100_GPIO_L3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L2),
105 S5PC100_GPIO_L4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3), 103 S5PC100_GPIO_L4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L3),
106 S5PC100_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4), 104 S5PC100_GPIO_END = S5PC100_GPIO_NEXT(S5PC100_GPIO_L4),
107 S5PC100_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00),
108 S5PC100_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01),
109 S5PC100_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02),
110 S5PC100_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03),
111 S5PC100_GPIO_END = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04),
112}; 105};
113 106
114/* S5PC100 GPIO number definitions. */ 107/* S5PC100 GPIO number definitions. */
@@ -146,17 +139,13 @@ enum s3c_gpio_number {
146#define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr)) 139#define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr))
147#define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr)) 140#define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr))
148#define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr)) 141#define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr))
149#define S5PC100_MP00(_nr) (S5PC100_GPIO_MP00_START + (_nr))
150#define S5PC100_MP01(_nr) (S5PC100_GPIO_MP01_START + (_nr))
151#define S5PC100_MP02(_nr) (S5PC100_GPIO_MP02_START + (_nr))
152#define S5PC100_MP03(_nr) (S5PC100_GPIO_MP03_START + (_nr))
153#define S5PC100_MP04(_nr) (S5PC100_GPIO_MP04_START + (_nr))
154#define S5PC100_MP05(_nr) (S5PC100_GPIO_MP05_START + (_nr))
155 142
156/* It used the end of the S5PC1XX gpios */ 143/* It used the end of the S5PC100 gpios */
157#define S3C_GPIO_END S5PC100_GPIO_END 144#define S3C_GPIO_END S5PC100_GPIO_END
158 145
159/* define the number of gpios we need to the one after the MP04() range */ 146/* define the number of gpios we need to the one after the MP04() range */
160#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1) 147#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1)
161 148
162#include <asm-generic/gpio.h> 149#include <asm-generic/gpio.h>
150
151#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
new file mode 100644
index 000000000000..f2283bdc941e
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
@@ -0,0 +1,71 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PC100 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
22#define S5P_EPLL_LOCK S5P_CLKREG(0x08)
23#define S5P_HPLL_LOCK S5P_CLKREG(0x0C)
24
25#define S5P_APLL_CON S5P_CLKREG(0x100)
26#define S5P_MPLL_CON S5P_CLKREG(0x104)
27#define S5P_EPLL_CON S5P_CLKREG(0x108)
28#define S5P_HPLL_CON S5P_CLKREG(0x10C)
29
30#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
31#define S5P_CLK_SRC1 S5P_CLKREG(0x204)
32#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
33#define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
34
35#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
36#define S5P_CLK_DIV1 S5P_CLKREG(0x304)
37#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
38#define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
39#define S5P_CLK_DIV4 S5P_CLKREG(0x310)
40
41#define S5P_CLK_OUT S5P_CLKREG(0x400)
42
43#define S5P_CLKGATE_D00 S5P_CLKREG(0x500)
44#define S5P_CLKGATE_D01 S5P_CLKREG(0x504)
45#define S5P_CLKGATE_D02 S5P_CLKREG(0x508)
46
47#define S5P_CLKGATE_D10 S5P_CLKREG(0x520)
48#define S5P_CLKGATE_D11 S5P_CLKREG(0x524)
49#define S5P_CLKGATE_D12 S5P_CLKREG(0x528)
50#define S5P_CLKGATE_D13 S5P_CLKREG(0x52C)
51#define S5P_CLKGATE_D14 S5P_CLKREG(0x530)
52#define S5P_CLKGATE_D15 S5P_CLKREG(0x534)
53
54#define S5P_CLKGATE_D20 S5P_CLKREG(0x540)
55
56#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x560)
57#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x564)
58
59/* CLKDIV0 */
60#define S5P_CLKDIV0_D0_MASK (0x7<<8)
61#define S5P_CLKDIV0_D0_SHIFT (8)
62#define S5P_CLKDIV0_PCLKD0_MASK (0x7<<12)
63#define S5P_CLKDIV0_PCLKD0_SHIFT (12)
64
65/* CLKDIV1 */
66#define S5P_CLKDIV1_D1_MASK (0x7<<12)
67#define S5P_CLKDIV1_D1_SHIFT (12)
68#define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16)
69#define S5P_CLKDIV1_PCLKD1_SHIFT (16)
70
71#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
index 43c7bc8bf784..68666913354c 100644
--- a/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
@@ -3,11 +3,11 @@
3 * Copyright 2009 Samsung Electronics Co. 3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com> 4 * Byungho Min <bhmin@samsung.com>
5 * 5 *
6 * S5PC1XX - GPIO register definitions 6 * S5PC100 - GPIO register definitions
7 */ 7 */
8 8
9#ifndef __ASM_PLAT_S5PC1XX_REGS_GPIO_H 9#ifndef __ASM_MACH_S5PC100_REGS_GPIO_H
10#define __ASM_PLAT_S5PC1XX_REGS_GPIO_H __FILE__ 10#define __ASM_MACH_S5PC100_REGS_GPIO_H __FILE__
11 11
12#include <mach/map.h> 12#include <mach/map.h>
13 13
@@ -66,5 +66,5 @@
66#define S5PC100_GPx_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) 66#define S5PC100_GPx_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
67#define S5PC100_GPx_CONMASK(__gpio) (0xf << ((__gpio) * 4)) 67#define S5PC100_GPx_CONMASK(__gpio) (0xf << ((__gpio) * 4))
68 68
69#endif /* __ASM_PLAT_S5PC1XX_REGS_GPIO_H */ 69#endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */
70 70
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index ae3c52cd0ebb..bfe67db34f04 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -35,7 +35,6 @@
35 35
36#include <plat/regs-serial.h> 36#include <plat/regs-serial.h>
37#include <plat/gpio-cfg.h> 37#include <plat/gpio-cfg.h>
38#include <plat/regs-gpio.h>
39 38
40#include <plat/clock.h> 39#include <plat/clock.h>
41#include <plat/devs.h> 40#include <plat/devs.h>
diff --git a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
index 1a63768a9a2e..6eba6cb8e2f4 100644
--- a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * linux/arch/arm/plat-s5pc100/setup-fb-24bpp.c 2 * linux/arch/arm/mach-s5pc100/setup-fb-24bpp.c
3 * 3 *
4 * Copyright 2009 Samsung Electronics 4 * Copyright 2009 Samsung Electronics
5 * 5 *
6 * Base S5PC1XX setup information for 24bpp LCD framebuffer 6 * Base S5PC100 setup information for 24bpp LCD framebuffer
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
@@ -19,7 +19,6 @@
19#include <mach/map.h> 19#include <mach/map.h>
20#include <plat/fb.h> 20#include <plat/fb.h>
21#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
22#include <plat/gpio-cfg-s5pc1xx.h>
23 22
24#define DISR_OFFSET 0x7008 23#define DISR_OFFSET 0x7008
25 24
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c0.c b/arch/arm/mach-s5pc100/setup-i2c0.c
index 5e4a7c3a231e..dd3174e6ecc5 100644
--- a/arch/arm/plat-s5pc1xx/setup-i2c0.c
+++ b/arch/arm/mach-s5pc100/setup-i2c0.c
@@ -1,9 +1,9 @@
1/* linux/arch/arm/plat-s5pc1xx/setup-i2c0.c 1/* linux/arch/arm/mach-s5pc100/setup-i2c0.c
2 * 2 *
3 * Copyright 2009 Samsung Electronics Co. 3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com> 4 * Byungho Min <bhmin@samsung.com>
5 * 5 *
6 * Base S5PC1XX I2C bus 0 gpio configuration 6 * Base S5PC100 I2C bus 0 gpio configuration
7 * 7 *
8 * Based on plat-s3c64xx/setup-i2c0.c 8 * Based on plat-s3c64xx/setup-i2c0.c
9 * 9 *
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c1.c b/arch/arm/mach-s5pc100/setup-i2c1.c
index a0a8b4ae6ad8..d1fec26b69ee 100644
--- a/arch/arm/plat-s5pc1xx/setup-i2c1.c
+++ b/arch/arm/mach-s5pc100/setup-i2c1.c
@@ -1,9 +1,9 @@
1/* linux/arch/arm/plat-s3c64xx/setup-i2c1.c 1/* linux/arch/arm/mach-s5pc100/setup-i2c1.c
2 * 2 *
3 * Copyright 2009 Samsung Electronics Co. 3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com> 4 * Byungho Min <bhmin@samsung.com>
5 * 5 *
6 * Base S5PC1XX I2C bus 1 gpio configuration 6 * Base S5PC100 I2C bus 1 gpio configuration
7 * 7 *
8 * Based on plat-s3c64xx/setup-i2c1.c 8 * Based on plat-s3c64xx/setup-i2c1.c
9 * 9 *
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index af33a1a89b72..7601c28e240b 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -12,6 +12,7 @@ if ARCH_S5PV210
12config CPU_S5PV210 12config CPU_S5PV210
13 bool 13 bool
14 select PLAT_S5P 14 select PLAT_S5P
15 select S3C_PL330_DMA
15 help 16 help
16 Enable S5PV210 CPU support 17 Enable S5PV210 CPU support
17 18
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 8ebf51c52a01..99827813d293 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -12,9 +12,14 @@ obj- :=
12 12
13# Core support for S5PV210 system 13# Core support for S5PV210 system
14 14
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o 15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o gpiolib.o
16obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o
16 17
17# machine support 18# machine support
18 19
19obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o 20obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
20obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o 21obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
22
23# device support
24
25obj-y += dev-audio.o
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index ccccae262351..154bca4abc09 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -31,6 +31,128 @@
31#include <plat/clock-clksrc.h> 31#include <plat/clock-clksrc.h>
32#include <plat/s5pv210.h> 32#include <plat/s5pv210.h>
33 33
34static struct clksrc_clk clk_mout_apll = {
35 .clk = {
36 .name = "mout_apll",
37 .id = -1,
38 },
39 .sources = &clk_src_apll,
40 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
41};
42
43static struct clksrc_clk clk_mout_epll = {
44 .clk = {
45 .name = "mout_epll",
46 .id = -1,
47 },
48 .sources = &clk_src_epll,
49 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
50};
51
52static struct clksrc_clk clk_mout_mpll = {
53 .clk = {
54 .name = "mout_mpll",
55 .id = -1,
56 },
57 .sources = &clk_src_mpll,
58 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
59};
60
61static struct clk *clkset_armclk_list[] = {
62 [0] = &clk_mout_apll.clk,
63 [1] = &clk_mout_mpll.clk,
64};
65
66static struct clksrc_sources clkset_armclk = {
67 .sources = clkset_armclk_list,
68 .nr_sources = ARRAY_SIZE(clkset_armclk_list),
69};
70
71static struct clksrc_clk clk_armclk = {
72 .clk = {
73 .name = "armclk",
74 .id = -1,
75 },
76 .sources = &clkset_armclk,
77 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 },
78 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 },
79};
80
81static struct clksrc_clk clk_hclk_msys = {
82 .clk = {
83 .name = "hclk_msys",
84 .id = -1,
85 .parent = &clk_armclk.clk,
86 },
87 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 },
88};
89
90static struct clksrc_clk clk_pclk_msys = {
91 .clk = {
92 .name = "pclk_msys",
93 .id = -1,
94 .parent = &clk_hclk_msys.clk,
95 },
96 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 },
97};
98
99static struct clksrc_clk clk_sclk_a2m = {
100 .clk = {
101 .name = "sclk_a2m",
102 .id = -1,
103 .parent = &clk_mout_apll.clk,
104 },
105 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
106};
107
108static struct clk *clkset_hclk_sys_list[] = {
109 [0] = &clk_mout_mpll.clk,
110 [1] = &clk_sclk_a2m.clk,
111};
112
113static struct clksrc_sources clkset_hclk_sys = {
114 .sources = clkset_hclk_sys_list,
115 .nr_sources = ARRAY_SIZE(clkset_hclk_sys_list),
116};
117
118static struct clksrc_clk clk_hclk_dsys = {
119 .clk = {
120 .name = "hclk_dsys",
121 .id = -1,
122 },
123 .sources = &clkset_hclk_sys,
124 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 },
125 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 },
126};
127
128static struct clksrc_clk clk_pclk_dsys = {
129 .clk = {
130 .name = "pclk_dsys",
131 .id = -1,
132 .parent = &clk_hclk_dsys.clk,
133 },
134 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
135};
136
137static struct clksrc_clk clk_hclk_psys = {
138 .clk = {
139 .name = "hclk_psys",
140 .id = -1,
141 },
142 .sources = &clkset_hclk_sys,
143 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 },
144 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 },
145};
146
147static struct clksrc_clk clk_pclk_psys = {
148 .clk = {
149 .name = "pclk_psys",
150 .id = -1,
151 .parent = &clk_hclk_psys.clk,
152 },
153 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
154};
155
34static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable) 156static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable)
35{ 157{
36 return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); 158 return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
@@ -51,176 +173,226 @@ static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
51 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); 173 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
52} 174}
53 175
54static struct clk clk_h200 = { 176static int s5pv210_clk_ip4_ctrl(struct clk *clk, int enable)
55 .name = "hclk200", 177{
178 return s5p_gatectrl(S5P_CLKGATE_IP4, clk, enable);
179}
180
181static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable)
182{
183 return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable);
184}
185
186static struct clk clk_sclk_hdmi27m = {
187 .name = "sclk_hdmi27m",
56 .id = -1, 188 .id = -1,
189 .rate = 27000000,
57}; 190};
58 191
59static struct clk clk_h100 = { 192static struct clk clk_sclk_hdmiphy = {
60 .name = "hclk100", 193 .name = "sclk_hdmiphy",
61 .id = -1, 194 .id = -1,
62}; 195};
63 196
64static struct clk clk_h166 = { 197static struct clk clk_sclk_usbphy0 = {
65 .name = "hclk166", 198 .name = "sclk_usbphy0",
66 .id = -1, 199 .id = -1,
67}; 200};
68 201
69static struct clk clk_h133 = { 202static struct clk clk_sclk_usbphy1 = {
70 .name = "hclk133", 203 .name = "sclk_usbphy1",
71 .id = -1, 204 .id = -1,
72}; 205};
73 206
74static struct clk clk_p100 = { 207static struct clk clk_pcmcdclk0 = {
75 .name = "pclk100", 208 .name = "pcmcdclk",
76 .id = -1, 209 .id = -1,
77}; 210};
78 211
79static struct clk clk_p83 = { 212static struct clk clk_pcmcdclk1 = {
80 .name = "pclk83", 213 .name = "pcmcdclk",
81 .id = -1, 214 .id = -1,
82}; 215};
83 216
84static struct clk clk_p66 = { 217static struct clk clk_pcmcdclk2 = {
85 .name = "pclk66", 218 .name = "pcmcdclk",
86 .id = -1, 219 .id = -1,
87}; 220};
88 221
89static struct clk *sys_clks[] = { 222static struct clk *clkset_vpllsrc_list[] = {
90 &clk_h200, 223 [0] = &clk_fin_vpll,
91 &clk_h100, 224 [1] = &clk_sclk_hdmi27m,
92 &clk_h166, 225};
93 &clk_h133, 226
94 &clk_p100, 227static struct clksrc_sources clkset_vpllsrc = {
95 &clk_p83, 228 .sources = clkset_vpllsrc_list,
96 &clk_p66 229 .nr_sources = ARRAY_SIZE(clkset_vpllsrc_list),
230};
231
232static struct clksrc_clk clk_vpllsrc = {
233 .clk = {
234 .name = "vpll_src",
235 .id = -1,
236 .enable = s5pv210_clk_mask0_ctrl,
237 .ctrlbit = (1 << 7),
238 },
239 .sources = &clkset_vpllsrc,
240 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 28, .size = 1 },
241};
242
243static struct clk *clkset_sclk_vpll_list[] = {
244 [0] = &clk_vpllsrc.clk,
245 [1] = &clk_fout_vpll,
246};
247
248static struct clksrc_sources clkset_sclk_vpll = {
249 .sources = clkset_sclk_vpll_list,
250 .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list),
251};
252
253static struct clksrc_clk clk_sclk_vpll = {
254 .clk = {
255 .name = "sclk_vpll",
256 .id = -1,
257 },
258 .sources = &clkset_sclk_vpll,
259 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 },
260};
261
262static unsigned long s5pv210_clk_imem_get_rate(struct clk *clk)
263{
264 return clk_get_rate(clk->parent) / 2;
265}
266
267static struct clk_ops clk_hclk_imem_ops = {
268 .get_rate = s5pv210_clk_imem_get_rate,
97}; 269};
98 270
99static struct clk init_clocks_disable[] = { 271static struct clk init_clocks_disable[] = {
100 { 272 {
101 .name = "rot", 273 .name = "rot",
102 .id = -1, 274 .id = -1,
103 .parent = &clk_h166, 275 .parent = &clk_hclk_dsys.clk,
104 .enable = s5pv210_clk_ip0_ctrl, 276 .enable = s5pv210_clk_ip0_ctrl,
105 .ctrlbit = (1<<29), 277 .ctrlbit = (1<<29),
106 }, { 278 }, {
107 .name = "otg", 279 .name = "otg",
108 .id = -1, 280 .id = -1,
109 .parent = &clk_h133, 281 .parent = &clk_hclk_psys.clk,
110 .enable = s5pv210_clk_ip1_ctrl, 282 .enable = s5pv210_clk_ip1_ctrl,
111 .ctrlbit = (1<<16), 283 .ctrlbit = (1<<16),
112 }, { 284 }, {
113 .name = "usb-host", 285 .name = "usb-host",
114 .id = -1, 286 .id = -1,
115 .parent = &clk_h133, 287 .parent = &clk_hclk_psys.clk,
116 .enable = s5pv210_clk_ip1_ctrl, 288 .enable = s5pv210_clk_ip1_ctrl,
117 .ctrlbit = (1<<17), 289 .ctrlbit = (1<<17),
118 }, { 290 }, {
119 .name = "lcd", 291 .name = "lcd",
120 .id = -1, 292 .id = -1,
121 .parent = &clk_h166, 293 .parent = &clk_hclk_dsys.clk,
122 .enable = s5pv210_clk_ip1_ctrl, 294 .enable = s5pv210_clk_ip1_ctrl,
123 .ctrlbit = (1<<0), 295 .ctrlbit = (1<<0),
124 }, { 296 }, {
125 .name = "cfcon", 297 .name = "cfcon",
126 .id = 0, 298 .id = 0,
127 .parent = &clk_h133, 299 .parent = &clk_hclk_psys.clk,
128 .enable = s5pv210_clk_ip1_ctrl, 300 .enable = s5pv210_clk_ip1_ctrl,
129 .ctrlbit = (1<<25), 301 .ctrlbit = (1<<25),
130 }, { 302 }, {
131 .name = "hsmmc", 303 .name = "hsmmc",
132 .id = 0, 304 .id = 0,
133 .parent = &clk_h133, 305 .parent = &clk_hclk_psys.clk,
134 .enable = s5pv210_clk_ip2_ctrl, 306 .enable = s5pv210_clk_ip2_ctrl,
135 .ctrlbit = (1<<16), 307 .ctrlbit = (1<<16),
136 }, { 308 }, {
137 .name = "hsmmc", 309 .name = "hsmmc",
138 .id = 1, 310 .id = 1,
139 .parent = &clk_h133, 311 .parent = &clk_hclk_psys.clk,
140 .enable = s5pv210_clk_ip2_ctrl, 312 .enable = s5pv210_clk_ip2_ctrl,
141 .ctrlbit = (1<<17), 313 .ctrlbit = (1<<17),
142 }, { 314 }, {
143 .name = "hsmmc", 315 .name = "hsmmc",
144 .id = 2, 316 .id = 2,
145 .parent = &clk_h133, 317 .parent = &clk_hclk_psys.clk,
146 .enable = s5pv210_clk_ip2_ctrl, 318 .enable = s5pv210_clk_ip2_ctrl,
147 .ctrlbit = (1<<18), 319 .ctrlbit = (1<<18),
148 }, { 320 }, {
149 .name = "hsmmc", 321 .name = "hsmmc",
150 .id = 3, 322 .id = 3,
151 .parent = &clk_h133, 323 .parent = &clk_hclk_psys.clk,
152 .enable = s5pv210_clk_ip2_ctrl, 324 .enable = s5pv210_clk_ip2_ctrl,
153 .ctrlbit = (1<<19), 325 .ctrlbit = (1<<19),
154 }, { 326 }, {
155 .name = "systimer", 327 .name = "systimer",
156 .id = -1, 328 .id = -1,
157 .parent = &clk_p66, 329 .parent = &clk_pclk_psys.clk,
158 .enable = s5pv210_clk_ip3_ctrl, 330 .enable = s5pv210_clk_ip3_ctrl,
159 .ctrlbit = (1<<16), 331 .ctrlbit = (1<<16),
160 }, { 332 }, {
161 .name = "watchdog", 333 .name = "watchdog",
162 .id = -1, 334 .id = -1,
163 .parent = &clk_p66, 335 .parent = &clk_pclk_psys.clk,
164 .enable = s5pv210_clk_ip3_ctrl, 336 .enable = s5pv210_clk_ip3_ctrl,
165 .ctrlbit = (1<<22), 337 .ctrlbit = (1<<22),
166 }, { 338 }, {
167 .name = "rtc", 339 .name = "rtc",
168 .id = -1, 340 .id = -1,
169 .parent = &clk_p66, 341 .parent = &clk_pclk_psys.clk,
170 .enable = s5pv210_clk_ip3_ctrl, 342 .enable = s5pv210_clk_ip3_ctrl,
171 .ctrlbit = (1<<15), 343 .ctrlbit = (1<<15),
172 }, { 344 }, {
173 .name = "i2c", 345 .name = "i2c",
174 .id = 0, 346 .id = 0,
175 .parent = &clk_p66, 347 .parent = &clk_pclk_psys.clk,
176 .enable = s5pv210_clk_ip3_ctrl, 348 .enable = s5pv210_clk_ip3_ctrl,
177 .ctrlbit = (1<<7), 349 .ctrlbit = (1<<7),
178 }, { 350 }, {
179 .name = "i2c", 351 .name = "i2c",
180 .id = 1, 352 .id = 1,
181 .parent = &clk_p66, 353 .parent = &clk_pclk_psys.clk,
182 .enable = s5pv210_clk_ip3_ctrl, 354 .enable = s5pv210_clk_ip3_ctrl,
183 .ctrlbit = (1<<8), 355 .ctrlbit = (1<<8),
184 }, { 356 }, {
185 .name = "i2c", 357 .name = "i2c",
186 .id = 2, 358 .id = 2,
187 .parent = &clk_p66, 359 .parent = &clk_pclk_psys.clk,
188 .enable = s5pv210_clk_ip3_ctrl, 360 .enable = s5pv210_clk_ip3_ctrl,
189 .ctrlbit = (1<<9), 361 .ctrlbit = (1<<9),
190 }, { 362 }, {
191 .name = "spi", 363 .name = "spi",
192 .id = 0, 364 .id = 0,
193 .parent = &clk_p66, 365 .parent = &clk_pclk_psys.clk,
194 .enable = s5pv210_clk_ip3_ctrl, 366 .enable = s5pv210_clk_ip3_ctrl,
195 .ctrlbit = (1<<12), 367 .ctrlbit = (1<<12),
196 }, { 368 }, {
197 .name = "spi", 369 .name = "spi",
198 .id = 1, 370 .id = 1,
199 .parent = &clk_p66, 371 .parent = &clk_pclk_psys.clk,
200 .enable = s5pv210_clk_ip3_ctrl, 372 .enable = s5pv210_clk_ip3_ctrl,
201 .ctrlbit = (1<<13), 373 .ctrlbit = (1<<13),
202 }, { 374 }, {
203 .name = "spi", 375 .name = "spi",
204 .id = 2, 376 .id = 2,
205 .parent = &clk_p66, 377 .parent = &clk_pclk_psys.clk,
206 .enable = s5pv210_clk_ip3_ctrl, 378 .enable = s5pv210_clk_ip3_ctrl,
207 .ctrlbit = (1<<14), 379 .ctrlbit = (1<<14),
208 }, { 380 }, {
209 .name = "timers", 381 .name = "timers",
210 .id = -1, 382 .id = -1,
211 .parent = &clk_p66, 383 .parent = &clk_pclk_psys.clk,
212 .enable = s5pv210_clk_ip3_ctrl, 384 .enable = s5pv210_clk_ip3_ctrl,
213 .ctrlbit = (1<<23), 385 .ctrlbit = (1<<23),
214 }, { 386 }, {
215 .name = "adc", 387 .name = "adc",
216 .id = -1, 388 .id = -1,
217 .parent = &clk_p66, 389 .parent = &clk_pclk_psys.clk,
218 .enable = s5pv210_clk_ip3_ctrl, 390 .enable = s5pv210_clk_ip3_ctrl,
219 .ctrlbit = (1<<24), 391 .ctrlbit = (1<<24),
220 }, { 392 }, {
221 .name = "keypad", 393 .name = "keypad",
222 .id = -1, 394 .id = -1,
223 .parent = &clk_p66, 395 .parent = &clk_pclk_psys.clk,
224 .enable = s5pv210_clk_ip3_ctrl, 396 .enable = s5pv210_clk_ip3_ctrl,
225 .ctrlbit = (1<<21), 397 .ctrlbit = (1<<21),
226 }, { 398 }, {
@@ -246,106 +418,537 @@ static struct clk init_clocks_disable[] = {
246 418
247static struct clk init_clocks[] = { 419static struct clk init_clocks[] = {
248 { 420 {
421 .name = "hclk_imem",
422 .id = -1,
423 .parent = &clk_hclk_msys.clk,
424 .ctrlbit = (1 << 5),
425 .enable = s5pv210_clk_ip0_ctrl,
426 .ops = &clk_hclk_imem_ops,
427 }, {
249 .name = "uart", 428 .name = "uart",
250 .id = 0, 429 .id = 0,
251 .parent = &clk_p66, 430 .parent = &clk_pclk_psys.clk,
252 .enable = s5pv210_clk_ip3_ctrl, 431 .enable = s5pv210_clk_ip3_ctrl,
253 .ctrlbit = (1<<7), 432 .ctrlbit = (1<<7),
254 }, { 433 }, {
255 .name = "uart", 434 .name = "uart",
256 .id = 1, 435 .id = 1,
257 .parent = &clk_p66, 436 .parent = &clk_pclk_psys.clk,
258 .enable = s5pv210_clk_ip3_ctrl, 437 .enable = s5pv210_clk_ip3_ctrl,
259 .ctrlbit = (1<<8), 438 .ctrlbit = (1<<8),
260 }, { 439 }, {
261 .name = "uart", 440 .name = "uart",
262 .id = 2, 441 .id = 2,
263 .parent = &clk_p66, 442 .parent = &clk_pclk_psys.clk,
264 .enable = s5pv210_clk_ip3_ctrl, 443 .enable = s5pv210_clk_ip3_ctrl,
265 .ctrlbit = (1<<9), 444 .ctrlbit = (1<<9),
266 }, { 445 }, {
267 .name = "uart", 446 .name = "uart",
268 .id = 3, 447 .id = 3,
269 .parent = &clk_p66, 448 .parent = &clk_pclk_psys.clk,
270 .enable = s5pv210_clk_ip3_ctrl, 449 .enable = s5pv210_clk_ip3_ctrl,
271 .ctrlbit = (1<<10), 450 .ctrlbit = (1<<10),
272 }, 451 },
273}; 452};
274 453
275static struct clksrc_clk clk_mout_apll = { 454static struct clk *clkset_uart_list[] = {
276 .clk = { 455 [6] = &clk_mout_mpll.clk,
277 .name = "mout_apll", 456 [7] = &clk_mout_epll.clk,
457};
458
459static struct clksrc_sources clkset_uart = {
460 .sources = clkset_uart_list,
461 .nr_sources = ARRAY_SIZE(clkset_uart_list),
462};
463
464static struct clk *clkset_group1_list[] = {
465 [0] = &clk_sclk_a2m.clk,
466 [1] = &clk_mout_mpll.clk,
467 [2] = &clk_mout_epll.clk,
468 [3] = &clk_sclk_vpll.clk,
469};
470
471static struct clksrc_sources clkset_group1 = {
472 .sources = clkset_group1_list,
473 .nr_sources = ARRAY_SIZE(clkset_group1_list),
474};
475
476static struct clk *clkset_sclk_onenand_list[] = {
477 [0] = &clk_hclk_psys.clk,
478 [1] = &clk_hclk_dsys.clk,
479};
480
481static struct clksrc_sources clkset_sclk_onenand = {
482 .sources = clkset_sclk_onenand_list,
483 .nr_sources = ARRAY_SIZE(clkset_sclk_onenand_list),
484};
485
486static struct clk *clkset_sclk_dac_list[] = {
487 [0] = &clk_sclk_vpll.clk,
488 [1] = &clk_sclk_hdmiphy,
489};
490
491static struct clksrc_sources clkset_sclk_dac = {
492 .sources = clkset_sclk_dac_list,
493 .nr_sources = ARRAY_SIZE(clkset_sclk_dac_list),
494};
495
496static struct clksrc_clk clk_sclk_dac = {
497 .clk = {
498 .name = "sclk_dac",
278 .id = -1, 499 .id = -1,
500 .ctrlbit = (1 << 10),
501 .enable = s5pv210_clk_ip1_ctrl,
279 }, 502 },
280 .sources = &clk_src_apll, 503 .sources = &clkset_sclk_dac,
281 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, 504 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 },
282}; 505};
283 506
284static struct clksrc_clk clk_mout_epll = { 507static struct clksrc_clk clk_sclk_pixel = {
285 .clk = { 508 .clk = {
286 .name = "mout_epll", 509 .name = "sclk_pixel",
287 .id = -1, 510 .id = -1,
511 .parent = &clk_sclk_vpll.clk,
288 }, 512 },
289 .sources = &clk_src_epll, 513 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4},
290 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
291}; 514};
292 515
293static struct clksrc_clk clk_mout_mpll = { 516static struct clk *clkset_sclk_hdmi_list[] = {
294 .clk = { 517 [0] = &clk_sclk_pixel.clk,
295 .name = "mout_mpll", 518 [1] = &clk_sclk_hdmiphy,
519};
520
521static struct clksrc_sources clkset_sclk_hdmi = {
522 .sources = clkset_sclk_hdmi_list,
523 .nr_sources = ARRAY_SIZE(clkset_sclk_hdmi_list),
524};
525
526static struct clksrc_clk clk_sclk_hdmi = {
527 .clk = {
528 .name = "sclk_hdmi",
296 .id = -1, 529 .id = -1,
530 .enable = s5pv210_clk_ip1_ctrl,
531 .ctrlbit = (1 << 11),
297 }, 532 },
298 .sources = &clk_src_mpll, 533 .sources = &clkset_sclk_hdmi,
299 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, 534 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
300}; 535};
301 536
302static struct clk *clkset_uart_list[] = { 537static struct clk *clkset_sclk_mixer_list[] = {
538 [0] = &clk_sclk_dac.clk,
539 [1] = &clk_sclk_hdmi.clk,
540};
541
542static struct clksrc_sources clkset_sclk_mixer = {
543 .sources = clkset_sclk_mixer_list,
544 .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list),
545};
546
547static struct clk *clkset_sclk_audio0_list[] = {
548 [0] = &clk_ext_xtal_mux,
549 [1] = &clk_pcmcdclk0,
550 [2] = &clk_sclk_hdmi27m,
551 [3] = &clk_sclk_usbphy0,
552 [4] = &clk_sclk_usbphy1,
553 [5] = &clk_sclk_hdmiphy,
303 [6] = &clk_mout_mpll.clk, 554 [6] = &clk_mout_mpll.clk,
304 [7] = &clk_mout_epll.clk, 555 [7] = &clk_mout_epll.clk,
556 [8] = &clk_sclk_vpll.clk,
305}; 557};
306 558
307static struct clksrc_sources clkset_uart = { 559static struct clksrc_sources clkset_sclk_audio0 = {
308 .sources = clkset_uart_list, 560 .sources = clkset_sclk_audio0_list,
309 .nr_sources = ARRAY_SIZE(clkset_uart_list), 561 .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list),
562};
563
564static struct clksrc_clk clk_sclk_audio0 = {
565 .clk = {
566 .name = "sclk_audio",
567 .id = 0,
568 .enable = s5pv210_clk_ip3_ctrl,
569 .ctrlbit = (1 << 4),
570 },
571 .sources = &clkset_sclk_audio0,
572 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 0, .size = 4 },
573 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 0, .size = 4 },
574};
575
576static struct clk *clkset_sclk_audio1_list[] = {
577 [0] = &clk_ext_xtal_mux,
578 [1] = &clk_pcmcdclk1,
579 [2] = &clk_sclk_hdmi27m,
580 [3] = &clk_sclk_usbphy0,
581 [4] = &clk_sclk_usbphy1,
582 [5] = &clk_sclk_hdmiphy,
583 [6] = &clk_mout_mpll.clk,
584 [7] = &clk_mout_epll.clk,
585 [8] = &clk_sclk_vpll.clk,
586};
587
588static struct clksrc_sources clkset_sclk_audio1 = {
589 .sources = clkset_sclk_audio1_list,
590 .nr_sources = ARRAY_SIZE(clkset_sclk_audio1_list),
591};
592
593static struct clksrc_clk clk_sclk_audio1 = {
594 .clk = {
595 .name = "sclk_audio",
596 .id = 1,
597 .enable = s5pv210_clk_ip3_ctrl,
598 .ctrlbit = (1 << 5),
599 },
600 .sources = &clkset_sclk_audio1,
601 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 4, .size = 4 },
602 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 4, .size = 4 },
603};
604
605static struct clk *clkset_sclk_audio2_list[] = {
606 [0] = &clk_ext_xtal_mux,
607 [1] = &clk_pcmcdclk0,
608 [2] = &clk_sclk_hdmi27m,
609 [3] = &clk_sclk_usbphy0,
610 [4] = &clk_sclk_usbphy1,
611 [5] = &clk_sclk_hdmiphy,
612 [6] = &clk_mout_mpll.clk,
613 [7] = &clk_mout_epll.clk,
614 [8] = &clk_sclk_vpll.clk,
615};
616
617static struct clksrc_sources clkset_sclk_audio2 = {
618 .sources = clkset_sclk_audio2_list,
619 .nr_sources = ARRAY_SIZE(clkset_sclk_audio2_list),
620};
621
622static struct clksrc_clk clk_sclk_audio2 = {
623 .clk = {
624 .name = "sclk_audio",
625 .id = 2,
626 .enable = s5pv210_clk_ip3_ctrl,
627 .ctrlbit = (1 << 6),
628 },
629 .sources = &clkset_sclk_audio2,
630 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 8, .size = 4 },
631 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 8, .size = 4 },
632};
633
634static struct clk *clkset_sclk_spdif_list[] = {
635 [0] = &clk_sclk_audio0.clk,
636 [1] = &clk_sclk_audio1.clk,
637 [2] = &clk_sclk_audio2.clk,
638};
639
640static struct clksrc_sources clkset_sclk_spdif = {
641 .sources = clkset_sclk_spdif_list,
642 .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list),
643};
644
645static struct clk *clkset_group2_list[] = {
646 [0] = &clk_ext_xtal_mux,
647 [1] = &clk_xusbxti,
648 [2] = &clk_sclk_hdmi27m,
649 [3] = &clk_sclk_usbphy0,
650 [4] = &clk_sclk_usbphy1,
651 [5] = &clk_sclk_hdmiphy,
652 [6] = &clk_mout_mpll.clk,
653 [7] = &clk_mout_epll.clk,
654 [8] = &clk_sclk_vpll.clk,
655};
656
657static struct clksrc_sources clkset_group2 = {
658 .sources = clkset_group2_list,
659 .nr_sources = ARRAY_SIZE(clkset_group2_list),
310}; 660};
311 661
312static struct clksrc_clk clksrcs[] = { 662static struct clksrc_clk clksrcs[] = {
313 { 663 {
314 .clk = { 664 .clk = {
315 .name = "uclk1", 665 .name = "sclk_dmc",
316 .id = -1, 666 .id = -1,
667 },
668 .sources = &clkset_group1,
669 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 },
670 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 },
671 }, {
672 .clk = {
673 .name = "sclk_onenand",
674 .id = -1,
675 },
676 .sources = &clkset_sclk_onenand,
677 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 28, .size = 1 },
678 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 },
679 }, {
680 .clk = {
681 .name = "uclk1",
682 .id = 0,
317 .ctrlbit = (1<<17), 683 .ctrlbit = (1<<17),
318 .enable = s5pv210_clk_ip3_ctrl, 684 .enable = s5pv210_clk_ip3_ctrl,
319 }, 685 },
320 .sources = &clkset_uart, 686 .sources = &clkset_uart,
321 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, 687 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
322 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, 688 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
323 } 689 }, {
690 .clk = {
691 .name = "uclk1",
692 .id = 1,
693 .enable = s5pv210_clk_ip3_ctrl,
694 .ctrlbit = (1 << 18),
695 },
696 .sources = &clkset_uart,
697 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 },
698 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
699 }, {
700 .clk = {
701 .name = "uclk1",
702 .id = 2,
703 .enable = s5pv210_clk_ip3_ctrl,
704 .ctrlbit = (1 << 19),
705 },
706 .sources = &clkset_uart,
707 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 },
708 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 },
709 }, {
710 .clk = {
711 .name = "uclk1",
712 .id = 3,
713 .enable = s5pv210_clk_ip3_ctrl,
714 .ctrlbit = (1 << 20),
715 },
716 .sources = &clkset_uart,
717 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 },
718 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
719 }, {
720 .clk = {
721 .name = "sclk_mixer",
722 .id = -1,
723 .enable = s5pv210_clk_ip1_ctrl,
724 .ctrlbit = (1 << 9),
725 },
726 .sources = &clkset_sclk_mixer,
727 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
728 }, {
729 .clk = {
730 .name = "sclk_spdif",
731 .id = -1,
732 .enable = s5pv210_clk_mask0_ctrl,
733 .ctrlbit = (1 << 27),
734 },
735 .sources = &clkset_sclk_spdif,
736 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 12, .size = 2 },
737 }, {
738 .clk = {
739 .name = "sclk_fimc",
740 .id = 0,
741 .enable = s5pv210_clk_ip0_ctrl,
742 .ctrlbit = (1 << 24),
743 },
744 .sources = &clkset_group2,
745 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 4 },
746 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 },
747 }, {
748 .clk = {
749 .name = "sclk_fimc",
750 .id = 1,
751 .enable = s5pv210_clk_ip0_ctrl,
752 .ctrlbit = (1 << 25),
753 },
754 .sources = &clkset_group2,
755 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 4 },
756 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 16, .size = 4 },
757 }, {
758 .clk = {
759 .name = "sclk_fimc",
760 .id = 2,
761 .enable = s5pv210_clk_ip0_ctrl,
762 .ctrlbit = (1 << 26),
763 },
764 .sources = &clkset_group2,
765 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 4 },
766 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 },
767 }, {
768 .clk = {
769 .name = "sclk_cam",
770 .id = 0,
771 },
772 .sources = &clkset_group2,
773 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 },
774 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
775 }, {
776 .clk = {
777 .name = "sclk_cam",
778 .id = 1,
779 },
780 .sources = &clkset_group2,
781 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 },
782 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 4 },
783 }, {
784 .clk = {
785 .name = "sclk_fimd",
786 .id = -1,
787 .enable = s5pv210_clk_ip1_ctrl,
788 .ctrlbit = (1 << 0),
789 },
790 .sources = &clkset_group2,
791 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 },
792 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 },
793 }, {
794 .clk = {
795 .name = "sclk_mmc",
796 .id = 0,
797 .enable = s5pv210_clk_ip2_ctrl,
798 .ctrlbit = (1 << 16),
799 },
800 .sources = &clkset_group2,
801 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
802 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
803 }, {
804 .clk = {
805 .name = "sclk_mmc",
806 .id = 1,
807 .enable = s5pv210_clk_ip2_ctrl,
808 .ctrlbit = (1 << 17),
809 },
810 .sources = &clkset_group2,
811 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
812 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
813 }, {
814 .clk = {
815 .name = "sclk_mmc",
816 .id = 2,
817 .enable = s5pv210_clk_ip2_ctrl,
818 .ctrlbit = (1 << 18),
819 },
820 .sources = &clkset_group2,
821 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
822 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
823 }, {
824 .clk = {
825 .name = "sclk_mmc",
826 .id = 3,
827 .enable = s5pv210_clk_ip2_ctrl,
828 .ctrlbit = (1 << 19),
829 },
830 .sources = &clkset_group2,
831 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
832 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
833 }, {
834 .clk = {
835 .name = "sclk_mfc",
836 .id = -1,
837 .enable = s5pv210_clk_ip0_ctrl,
838 .ctrlbit = (1 << 16),
839 },
840 .sources = &clkset_group1,
841 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 },
842 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
843 }, {
844 .clk = {
845 .name = "sclk_g2d",
846 .id = -1,
847 .enable = s5pv210_clk_ip0_ctrl,
848 .ctrlbit = (1 << 12),
849 },
850 .sources = &clkset_group1,
851 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 },
852 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
853 }, {
854 .clk = {
855 .name = "sclk_g3d",
856 .id = -1,
857 .enable = s5pv210_clk_ip0_ctrl,
858 .ctrlbit = (1 << 8),
859 },
860 .sources = &clkset_group1,
861 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 },
862 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
863 }, {
864 .clk = {
865 .name = "sclk_csis",
866 .id = -1,
867 .enable = s5pv210_clk_ip0_ctrl,
868 .ctrlbit = (1 << 31),
869 },
870 .sources = &clkset_group2,
871 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 },
872 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
873 }, {
874 .clk = {
875 .name = "sclk_spi",
876 .id = 0,
877 .enable = s5pv210_clk_ip3_ctrl,
878 .ctrlbit = (1 << 12),
879 },
880 .sources = &clkset_group2,
881 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
882 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
883 }, {
884 .clk = {
885 .name = "sclk_spi",
886 .id = 1,
887 .enable = s5pv210_clk_ip3_ctrl,
888 .ctrlbit = (1 << 13),
889 },
890 .sources = &clkset_group2,
891 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
892 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
893 }, {
894 .clk = {
895 .name = "sclk_pwi",
896 .id = -1,
897 .enable = &s5pv210_clk_ip4_ctrl,
898 .ctrlbit = (1 << 2),
899 },
900 .sources = &clkset_group2,
901 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 20, .size = 4 },
902 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 24, .size = 4 },
903 }, {
904 .clk = {
905 .name = "sclk_pwm",
906 .id = -1,
907 .enable = s5pv210_clk_ip3_ctrl,
908 .ctrlbit = (1 << 23),
909 },
910 .sources = &clkset_group2,
911 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 12, .size = 4 },
912 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 12, .size = 4 },
913 },
324}; 914};
325 915
326/* Clock initialisation code */ 916/* Clock initialisation code */
327static struct clksrc_clk *init_parents[] = { 917static struct clksrc_clk *sysclks[] = {
328 &clk_mout_apll, 918 &clk_mout_apll,
329 &clk_mout_epll, 919 &clk_mout_epll,
330 &clk_mout_mpll, 920 &clk_mout_mpll,
921 &clk_armclk,
922 &clk_hclk_msys,
923 &clk_sclk_a2m,
924 &clk_hclk_dsys,
925 &clk_hclk_psys,
926 &clk_pclk_msys,
927 &clk_pclk_dsys,
928 &clk_pclk_psys,
929 &clk_vpllsrc,
930 &clk_sclk_vpll,
931 &clk_sclk_dac,
932 &clk_sclk_pixel,
933 &clk_sclk_hdmi,
331}; 934};
332 935
333#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
334
335void __init_or_cpufreq s5pv210_setup_clocks(void) 936void __init_or_cpufreq s5pv210_setup_clocks(void)
336{ 937{
337 struct clk *xtal_clk; 938 struct clk *xtal_clk;
338 unsigned long xtal; 939 unsigned long xtal;
940 unsigned long vpllsrc;
339 unsigned long armclk; 941 unsigned long armclk;
340 unsigned long hclk200; 942 unsigned long hclk_msys;
341 unsigned long hclk166; 943 unsigned long hclk_dsys;
342 unsigned long hclk133; 944 unsigned long hclk_psys;
343 unsigned long pclk100; 945 unsigned long pclk_msys;
344 unsigned long pclk83; 946 unsigned long pclk_dsys;
345 unsigned long pclk66; 947 unsigned long pclk_psys;
346 unsigned long apll; 948 unsigned long apll;
347 unsigned long mpll; 949 unsigned long mpll;
348 unsigned long epll; 950 unsigned long epll;
951 unsigned long vpll;
349 unsigned int ptr; 952 unsigned int ptr;
350 u32 clkdiv0, clkdiv1; 953 u32 clkdiv0, clkdiv1;
351 954
@@ -368,59 +971,46 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
368 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); 971 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
369 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); 972 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
370 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500); 973 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
371 974 vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
372 printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld", 975 vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502);
373 apll, mpll, epll);
374
375 armclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_APLL);
376 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX200_MASK)
377 hclk200 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
378 else
379 hclk200 = armclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
380
381 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX166_MASK) {
382 hclk166 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
383 hclk166 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
384 } else
385 hclk166 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
386
387 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX133_MASK) {
388 hclk133 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
389 hclk133 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
390 } else
391 hclk133 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
392
393 pclk100 = hclk200 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK100);
394 pclk83 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK83);
395 pclk66 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK66);
396
397 printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld, \
398 HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n",
399 armclk, hclk200, hclk166, hclk133, pclk100, pclk83, pclk66);
400 976
401 clk_fout_apll.rate = apll; 977 clk_fout_apll.rate = apll;
402 clk_fout_mpll.rate = mpll; 978 clk_fout_mpll.rate = mpll;
403 clk_fout_epll.rate = epll; 979 clk_fout_epll.rate = epll;
980 clk_fout_vpll.rate = vpll;
404 981
405 clk_f.rate = armclk; 982 printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld V=%ld",
406 clk_h.rate = hclk133; 983 apll, mpll, epll, vpll);
407 clk_p.rate = pclk66; 984
408 clk_p66.rate = pclk66; 985 armclk = clk_get_rate(&clk_armclk.clk);
409 clk_p83.rate = pclk83; 986 hclk_msys = clk_get_rate(&clk_hclk_msys.clk);
410 clk_h133.rate = hclk133; 987 hclk_dsys = clk_get_rate(&clk_hclk_dsys.clk);
411 clk_h166.rate = hclk166; 988 hclk_psys = clk_get_rate(&clk_hclk_psys.clk);
412 clk_h200.rate = hclk200; 989 pclk_msys = clk_get_rate(&clk_pclk_msys.clk);
990 pclk_dsys = clk_get_rate(&clk_pclk_dsys.clk);
991 pclk_psys = clk_get_rate(&clk_pclk_psys.clk);
992
993 printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld\n"
994 "HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n",
995 armclk, hclk_msys, hclk_dsys, hclk_psys,
996 pclk_msys, pclk_dsys, pclk_psys);
413 997
414 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) 998 clk_f.rate = armclk;
415 s3c_set_clksrc(init_parents[ptr], true); 999 clk_h.rate = hclk_psys;
1000 clk_p.rate = pclk_psys;
416 1001
417 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) 1002 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
418 s3c_set_clksrc(&clksrcs[ptr], true); 1003 s3c_set_clksrc(&clksrcs[ptr], true);
419} 1004}
420 1005
421static struct clk *clks[] __initdata = { 1006static struct clk *clks[] __initdata = {
422 &clk_mout_epll.clk, 1007 &clk_sclk_hdmi27m,
423 &clk_mout_mpll.clk, 1008 &clk_sclk_hdmiphy,
1009 &clk_sclk_usbphy0,
1010 &clk_sclk_usbphy1,
1011 &clk_pcmcdclk0,
1012 &clk_pcmcdclk1,
1013 &clk_pcmcdclk2,
424}; 1014};
425 1015
426void __init s5pv210_register_clocks(void) 1016void __init s5pv210_register_clocks(void)
@@ -433,13 +1023,12 @@ void __init s5pv210_register_clocks(void)
433 if (ret > 0) 1023 if (ret > 0)
434 printk(KERN_ERR "Failed to register %u clocks\n", ret); 1024 printk(KERN_ERR "Failed to register %u clocks\n", ret);
435 1025
1026 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
1027 s3c_register_clksrc(sysclks[ptr], 1);
1028
436 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 1029 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
437 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 1030 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
438 1031
439 ret = s3c24xx_register_clocks(sys_clks, ARRAY_SIZE(sys_clks));
440 if (ret > 0)
441 printk(KERN_ERR "Failed to register system clocks\n");
442
443 clkp = init_clocks_disable; 1032 clkp = init_clocks_disable;
444 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { 1033 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
445 ret = s3c24xx_register_clock(clkp); 1034 ret = s3c24xx_register_clock(clkp);
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 0e0f8fde2aa6..2b776eb5d150 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -100,7 +100,7 @@ void __init s5pv210_init_irq(void)
100 s5p_init_irq(vic, ARRAY_SIZE(vic)); 100 s5p_init_irq(vic, ARRAY_SIZE(vic));
101} 101}
102 102
103static struct sysdev_class s5pv210_sysclass = { 103struct sysdev_class s5pv210_sysclass = {
104 .name = "s5pv210-core", 104 .name = "s5pv210-core",
105}; 105};
106 106
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
new file mode 100644
index 000000000000..6e215330a1be
--- /dev/null
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -0,0 +1,327 @@
1/* linux/arch/arm/mach-s5pv210/dev-audio.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co. Ltd
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/audio.h>
16
17#include <mach/gpio.h>
18#include <mach/map.h>
19#include <mach/dma.h>
20#include <mach/irqs.h>
21
22static int s5pv210_cfg_i2s(struct platform_device *pdev)
23{
24 /* configure GPIO for i2s port */
25 switch (pdev->id) {
26 case 1:
27 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(2));
28 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(2));
29 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(2));
30 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(2));
31 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(2));
32 break;
33
34 case 2:
35 s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(4));
36 s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(4));
37 s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(4));
38 s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(4));
39 s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(4));
40 break;
41
42 case -1:
43 s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(2));
44 s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(2));
45 s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(2));
46 s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(2));
47 s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(2));
48 s3c_gpio_cfgpin(S5PV210_GPI(5), S3C_GPIO_SFN(2));
49 s3c_gpio_cfgpin(S5PV210_GPI(6), S3C_GPIO_SFN(2));
50 break;
51
52 default:
53 printk(KERN_ERR "Invalid Device %d\n", pdev->id);
54 return -EINVAL;
55 }
56
57 return 0;
58}
59
60static struct s3c_audio_pdata s3c_i2s_pdata = {
61 .cfg_gpio = s5pv210_cfg_i2s,
62};
63
64static struct resource s5pv210_iis0_resource[] = {
65 [0] = {
66 .start = S5PV210_PA_IIS0,
67 .end = S5PV210_PA_IIS0 + 0x100 - 1,
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 .start = DMACH_I2S0_TX,
72 .end = DMACH_I2S0_TX,
73 .flags = IORESOURCE_DMA,
74 },
75 [2] = {
76 .start = DMACH_I2S0_RX,
77 .end = DMACH_I2S0_RX,
78 .flags = IORESOURCE_DMA,
79 },
80};
81
82struct platform_device s5pv210_device_iis0 = {
83 .name = "s3c64xx-iis-v4",
84 .id = -1,
85 .num_resources = ARRAY_SIZE(s5pv210_iis0_resource),
86 .resource = s5pv210_iis0_resource,
87 .dev = {
88 .platform_data = &s3c_i2s_pdata,
89 },
90};
91
92static struct resource s5pv210_iis1_resource[] = {
93 [0] = {
94 .start = S5PV210_PA_IIS1,
95 .end = S5PV210_PA_IIS1 + 0x100 - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 [1] = {
99 .start = DMACH_I2S1_TX,
100 .end = DMACH_I2S1_TX,
101 .flags = IORESOURCE_DMA,
102 },
103 [2] = {
104 .start = DMACH_I2S1_RX,
105 .end = DMACH_I2S1_RX,
106 .flags = IORESOURCE_DMA,
107 },
108};
109
110struct platform_device s5pv210_device_iis1 = {
111 .name = "s3c64xx-iis",
112 .id = 1,
113 .num_resources = ARRAY_SIZE(s5pv210_iis1_resource),
114 .resource = s5pv210_iis1_resource,
115 .dev = {
116 .platform_data = &s3c_i2s_pdata,
117 },
118};
119
120static struct resource s5pv210_iis2_resource[] = {
121 [0] = {
122 .start = S5PV210_PA_IIS2,
123 .end = S5PV210_PA_IIS2 + 0x100 - 1,
124 .flags = IORESOURCE_MEM,
125 },
126 [1] = {
127 .start = DMACH_I2S2_TX,
128 .end = DMACH_I2S2_TX,
129 .flags = IORESOURCE_DMA,
130 },
131 [2] = {
132 .start = DMACH_I2S2_RX,
133 .end = DMACH_I2S2_RX,
134 .flags = IORESOURCE_DMA,
135 },
136};
137
138struct platform_device s5pv210_device_iis2 = {
139 .name = "s3c64xx-iis",
140 .id = 2,
141 .num_resources = ARRAY_SIZE(s5pv210_iis2_resource),
142 .resource = s5pv210_iis2_resource,
143 .dev = {
144 .platform_data = &s3c_i2s_pdata,
145 },
146};
147
148/* PCM Controller platform_devices */
149
150static int s5pv210_pcm_cfg_gpio(struct platform_device *pdev)
151{
152 switch (pdev->id) {
153 case 0:
154 s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(3));
155 s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(3));
156 s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(3));
157 s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(3));
158 s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(3));
159 break;
160 case 1:
161 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(3));
162 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(3));
163 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(3));
164 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(3));
165 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(3));
166 break;
167 case 2:
168 s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(2));
169 s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(2));
170 s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(2));
171 s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(2));
172 s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(2));
173 break;
174 default:
175 printk(KERN_DEBUG "Invalid PCM Controller number!");
176 return -EINVAL;
177 }
178
179 return 0;
180}
181
182static struct s3c_audio_pdata s3c_pcm_pdata = {
183 .cfg_gpio = s5pv210_pcm_cfg_gpio,
184};
185
186static struct resource s5pv210_pcm0_resource[] = {
187 [0] = {
188 .start = S5PV210_PA_PCM0,
189 .end = S5PV210_PA_PCM0 + 0x100 - 1,
190 .flags = IORESOURCE_MEM,
191 },
192 [1] = {
193 .start = DMACH_PCM0_TX,
194 .end = DMACH_PCM0_TX,
195 .flags = IORESOURCE_DMA,
196 },
197 [2] = {
198 .start = DMACH_PCM0_RX,
199 .end = DMACH_PCM0_RX,
200 .flags = IORESOURCE_DMA,
201 },
202};
203
204struct platform_device s5pv210_device_pcm0 = {
205 .name = "samsung-pcm",
206 .id = 0,
207 .num_resources = ARRAY_SIZE(s5pv210_pcm0_resource),
208 .resource = s5pv210_pcm0_resource,
209 .dev = {
210 .platform_data = &s3c_pcm_pdata,
211 },
212};
213
214static struct resource s5pv210_pcm1_resource[] = {
215 [0] = {
216 .start = S5PV210_PA_PCM1,
217 .end = S5PV210_PA_PCM1 + 0x100 - 1,
218 .flags = IORESOURCE_MEM,
219 },
220 [1] = {
221 .start = DMACH_PCM1_TX,
222 .end = DMACH_PCM1_TX,
223 .flags = IORESOURCE_DMA,
224 },
225 [2] = {
226 .start = DMACH_PCM1_RX,
227 .end = DMACH_PCM1_RX,
228 .flags = IORESOURCE_DMA,
229 },
230};
231
232struct platform_device s5pv210_device_pcm1 = {
233 .name = "samsung-pcm",
234 .id = 1,
235 .num_resources = ARRAY_SIZE(s5pv210_pcm1_resource),
236 .resource = s5pv210_pcm1_resource,
237 .dev = {
238 .platform_data = &s3c_pcm_pdata,
239 },
240};
241
242static struct resource s5pv210_pcm2_resource[] = {
243 [0] = {
244 .start = S5PV210_PA_PCM2,
245 .end = S5PV210_PA_PCM2 + 0x100 - 1,
246 .flags = IORESOURCE_MEM,
247 },
248 [1] = {
249 .start = DMACH_PCM2_TX,
250 .end = DMACH_PCM2_TX,
251 .flags = IORESOURCE_DMA,
252 },
253 [2] = {
254 .start = DMACH_PCM2_RX,
255 .end = DMACH_PCM2_RX,
256 .flags = IORESOURCE_DMA,
257 },
258};
259
260struct platform_device s5pv210_device_pcm2 = {
261 .name = "samsung-pcm",
262 .id = 2,
263 .num_resources = ARRAY_SIZE(s5pv210_pcm2_resource),
264 .resource = s5pv210_pcm2_resource,
265 .dev = {
266 .platform_data = &s3c_pcm_pdata,
267 },
268};
269
270/* AC97 Controller platform devices */
271
272static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev)
273{
274 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(4));
275 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(4));
276 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(4));
277 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(4));
278 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(4));
279
280 return 0;
281}
282
283static struct resource s5pv210_ac97_resource[] = {
284 [0] = {
285 .start = S5PV210_PA_AC97,
286 .end = S5PV210_PA_AC97 + 0x100 - 1,
287 .flags = IORESOURCE_MEM,
288 },
289 [1] = {
290 .start = DMACH_AC97_PCMOUT,
291 .end = DMACH_AC97_PCMOUT,
292 .flags = IORESOURCE_DMA,
293 },
294 [2] = {
295 .start = DMACH_AC97_PCMIN,
296 .end = DMACH_AC97_PCMIN,
297 .flags = IORESOURCE_DMA,
298 },
299 [3] = {
300 .start = DMACH_AC97_MICIN,
301 .end = DMACH_AC97_MICIN,
302 .flags = IORESOURCE_DMA,
303 },
304 [4] = {
305 .start = IRQ_AC97,
306 .end = IRQ_AC97,
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct s3c_audio_pdata s3c_ac97_pdata = {
312 .cfg_gpio = s5pv210_ac97_cfg_gpio,
313};
314
315static u64 s5pv210_ac97_dmamask = DMA_BIT_MASK(32);
316
317struct platform_device s5pv210_device_ac97 = {
318 .name = "s3c-ac97",
319 .id = -1,
320 .num_resources = ARRAY_SIZE(s5pv210_ac97_resource),
321 .resource = s5pv210_ac97_resource,
322 .dev = {
323 .platform_data = &s3c_ac97_pdata,
324 .dma_mask = &s5pv210_ac97_dmamask,
325 .coherent_dma_mask = DMA_BIT_MASK(32),
326 },
327};
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
new file mode 100644
index 000000000000..778ad5fe231a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -0,0 +1,168 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/dma-mapping.h>
22
23#include <plat/devs.h>
24#include <plat/irqs.h>
25
26#include <mach/map.h>
27#include <mach/irqs.h>
28
29#include <plat/s3c-pl330-pdata.h>
30
31static u64 dma_dmamask = DMA_BIT_MASK(32);
32
33static struct resource s5pv210_pdma0_resource[] = {
34 [0] = {
35 .start = S5PV210_PA_PDMA0,
36 .end = S5PV210_PA_PDMA0 + SZ_4K,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = IRQ_PDMA0,
41 .end = IRQ_PDMA0,
42 .flags = IORESOURCE_IRQ,
43 },
44};
45
46static struct s3c_pl330_platdata s5pv210_pdma0_pdata = {
47 .peri = {
48 [0] = DMACH_UART0_RX,
49 [1] = DMACH_UART0_TX,
50 [2] = DMACH_UART1_RX,
51 [3] = DMACH_UART1_TX,
52 [4] = DMACH_UART2_RX,
53 [5] = DMACH_UART2_TX,
54 [6] = DMACH_UART3_RX,
55 [7] = DMACH_UART3_TX,
56 [8] = DMACH_MAX,
57 [9] = DMACH_I2S0_RX,
58 [10] = DMACH_I2S0_TX,
59 [11] = DMACH_I2S0S_TX,
60 [12] = DMACH_I2S1_RX,
61 [13] = DMACH_I2S1_TX,
62 [14] = DMACH_MAX,
63 [15] = DMACH_MAX,
64 [16] = DMACH_SPI0_RX,
65 [17] = DMACH_SPI0_TX,
66 [18] = DMACH_SPI1_RX,
67 [19] = DMACH_SPI1_TX,
68 [20] = DMACH_MAX,
69 [21] = DMACH_MAX,
70 [22] = DMACH_AC97_MICIN,
71 [23] = DMACH_AC97_PCMIN,
72 [24] = DMACH_AC97_PCMOUT,
73 [25] = DMACH_MAX,
74 [26] = DMACH_PWM,
75 [27] = DMACH_SPDIF,
76 [28] = DMACH_MAX,
77 [29] = DMACH_MAX,
78 [30] = DMACH_MAX,
79 [31] = DMACH_MAX,
80 },
81};
82
83static struct platform_device s5pv210_device_pdma0 = {
84 .name = "s3c-pl330",
85 .id = 1,
86 .num_resources = ARRAY_SIZE(s5pv210_pdma0_resource),
87 .resource = s5pv210_pdma0_resource,
88 .dev = {
89 .dma_mask = &dma_dmamask,
90 .coherent_dma_mask = DMA_BIT_MASK(32),
91 .platform_data = &s5pv210_pdma0_pdata,
92 },
93};
94
95static struct resource s5pv210_pdma1_resource[] = {
96 [0] = {
97 .start = S5PV210_PA_PDMA1,
98 .end = S5PV210_PA_PDMA1 + SZ_4K,
99 .flags = IORESOURCE_MEM,
100 },
101 [1] = {
102 .start = IRQ_PDMA1,
103 .end = IRQ_PDMA1,
104 .flags = IORESOURCE_IRQ,
105 },
106};
107
108static struct s3c_pl330_platdata s5pv210_pdma1_pdata = {
109 .peri = {
110 [0] = DMACH_UART0_RX,
111 [1] = DMACH_UART0_TX,
112 [2] = DMACH_UART1_RX,
113 [3] = DMACH_UART1_TX,
114 [4] = DMACH_UART2_RX,
115 [5] = DMACH_UART2_TX,
116 [6] = DMACH_UART3_RX,
117 [7] = DMACH_UART3_TX,
118 [8] = DMACH_MAX,
119 [9] = DMACH_I2S0_RX,
120 [10] = DMACH_I2S0_TX,
121 [11] = DMACH_I2S0S_TX,
122 [12] = DMACH_I2S1_RX,
123 [13] = DMACH_I2S1_TX,
124 [14] = DMACH_I2S2_RX,
125 [15] = DMACH_I2S2_TX,
126 [16] = DMACH_SPI0_RX,
127 [17] = DMACH_SPI0_TX,
128 [18] = DMACH_SPI1_RX,
129 [19] = DMACH_SPI1_TX,
130 [20] = DMACH_MAX,
131 [21] = DMACH_MAX,
132 [22] = DMACH_PCM0_RX,
133 [23] = DMACH_PCM0_TX,
134 [24] = DMACH_PCM1_RX,
135 [25] = DMACH_PCM1_TX,
136 [26] = DMACH_MSM_REQ0,
137 [27] = DMACH_MSM_REQ1,
138 [28] = DMACH_MSM_REQ2,
139 [29] = DMACH_MSM_REQ3,
140 [30] = DMACH_PCM2_RX,
141 [31] = DMACH_PCM2_TX,
142 },
143};
144
145static struct platform_device s5pv210_device_pdma1 = {
146 .name = "s3c-pl330",
147 .id = 2,
148 .num_resources = ARRAY_SIZE(s5pv210_pdma1_resource),
149 .resource = s5pv210_pdma1_resource,
150 .dev = {
151 .dma_mask = &dma_dmamask,
152 .coherent_dma_mask = DMA_BIT_MASK(32),
153 .platform_data = &s5pv210_pdma1_pdata,
154 },
155};
156
157static struct platform_device *s5pv210_dmacs[] __initdata = {
158 &s5pv210_device_pdma0,
159 &s5pv210_device_pdma1,
160};
161
162static int __init s5pv210_dma_init(void)
163{
164 platform_add_devices(s5pv210_dmacs, ARRAY_SIZE(s5pv210_dmacs));
165
166 return 0;
167}
168arch_initcall(s5pv210_dma_init);
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
new file mode 100644
index 000000000000..9ea8972e023d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -0,0 +1,261 @@
1/* linux/arch/arm/mach-s5pv210/gpiolib.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - GPIOlib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/gpio.h>
17#include <plat/gpio-core.h>
18#include <plat/gpio-cfg.h>
19#include <plat/gpio-cfg-helpers.h>
20#include <mach/map.h>
21
22static struct s3c_gpio_cfg gpio_cfg = {
23 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
24 .set_pull = s3c_gpio_setpull_updown,
25 .get_pull = s3c_gpio_getpull_updown,
26};
27
28static struct s3c_gpio_cfg gpio_cfg_noint = {
29 .set_config = s3c_gpio_setcfg_s3c64xx_4bit,
30 .set_pull = s3c_gpio_setpull_updown,
31 .get_pull = s3c_gpio_getpull_updown,
32};
33
34/* GPIO bank's base address given the index of the bank in the
35 * list of all gpio banks.
36 */
37#define S5PV210_BANK_BASE(bank_nr) (S5P_VA_GPIO + ((bank_nr) * 0x20))
38
39/*
40 * Following are the gpio banks in v210.
41 *
42 * The 'config' member when left to NULL, is initialized to the default
43 * structure gpio_cfg in the init function below.
44 *
45 * The 'base' member is also initialized in the init function below.
46 * Note: The initialization of 'base' member of s3c_gpio_chip structure
47 * uses the above macro and depends on the banks being listed in order here.
48 */
49static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
50 {
51 .chip = {
52 .base = S5PV210_GPA0(0),
53 .ngpio = S5PV210_GPIO_A0_NR,
54 .label = "GPA0",
55 },
56 }, {
57 .chip = {
58 .base = S5PV210_GPA1(0),
59 .ngpio = S5PV210_GPIO_A1_NR,
60 .label = "GPA1",
61 },
62 }, {
63 .chip = {
64 .base = S5PV210_GPB(0),
65 .ngpio = S5PV210_GPIO_B_NR,
66 .label = "GPB",
67 },
68 }, {
69 .chip = {
70 .base = S5PV210_GPC0(0),
71 .ngpio = S5PV210_GPIO_C0_NR,
72 .label = "GPC0",
73 },
74 }, {
75 .chip = {
76 .base = S5PV210_GPC1(0),
77 .ngpio = S5PV210_GPIO_C1_NR,
78 .label = "GPC1",
79 },
80 }, {
81 .chip = {
82 .base = S5PV210_GPD0(0),
83 .ngpio = S5PV210_GPIO_D0_NR,
84 .label = "GPD0",
85 },
86 }, {
87 .chip = {
88 .base = S5PV210_GPD1(0),
89 .ngpio = S5PV210_GPIO_D1_NR,
90 .label = "GPD1",
91 },
92 }, {
93 .chip = {
94 .base = S5PV210_GPE0(0),
95 .ngpio = S5PV210_GPIO_E0_NR,
96 .label = "GPE0",
97 },
98 }, {
99 .chip = {
100 .base = S5PV210_GPE1(0),
101 .ngpio = S5PV210_GPIO_E1_NR,
102 .label = "GPE1",
103 },
104 }, {
105 .chip = {
106 .base = S5PV210_GPF0(0),
107 .ngpio = S5PV210_GPIO_F0_NR,
108 .label = "GPF0",
109 },
110 }, {
111 .chip = {
112 .base = S5PV210_GPF1(0),
113 .ngpio = S5PV210_GPIO_F1_NR,
114 .label = "GPF1",
115 },
116 }, {
117 .chip = {
118 .base = S5PV210_GPF2(0),
119 .ngpio = S5PV210_GPIO_F2_NR,
120 .label = "GPF2",
121 },
122 }, {
123 .chip = {
124 .base = S5PV210_GPF3(0),
125 .ngpio = S5PV210_GPIO_F3_NR,
126 .label = "GPF3",
127 },
128 }, {
129 .chip = {
130 .base = S5PV210_GPG0(0),
131 .ngpio = S5PV210_GPIO_G0_NR,
132 .label = "GPG0",
133 },
134 }, {
135 .chip = {
136 .base = S5PV210_GPG1(0),
137 .ngpio = S5PV210_GPIO_G1_NR,
138 .label = "GPG1",
139 },
140 }, {
141 .chip = {
142 .base = S5PV210_GPG2(0),
143 .ngpio = S5PV210_GPIO_G2_NR,
144 .label = "GPG2",
145 },
146 }, {
147 .chip = {
148 .base = S5PV210_GPG3(0),
149 .ngpio = S5PV210_GPIO_G3_NR,
150 .label = "GPG3",
151 },
152 }, {
153 .chip = {
154 .base = S5PV210_GPI(0),
155 .ngpio = S5PV210_GPIO_I_NR,
156 .label = "GPI",
157 },
158 }, {
159 .chip = {
160 .base = S5PV210_GPJ0(0),
161 .ngpio = S5PV210_GPIO_J0_NR,
162 .label = "GPJ0",
163 },
164 }, {
165 .chip = {
166 .base = S5PV210_GPJ1(0),
167 .ngpio = S5PV210_GPIO_J1_NR,
168 .label = "GPJ1",
169 },
170 }, {
171 .chip = {
172 .base = S5PV210_GPJ2(0),
173 .ngpio = S5PV210_GPIO_J2_NR,
174 .label = "GPJ2",
175 },
176 }, {
177 .chip = {
178 .base = S5PV210_GPJ3(0),
179 .ngpio = S5PV210_GPIO_J3_NR,
180 .label = "GPJ3",
181 },
182 }, {
183 .chip = {
184 .base = S5PV210_GPJ4(0),
185 .ngpio = S5PV210_GPIO_J4_NR,
186 .label = "GPJ4",
187 },
188 }, {
189 .config = &gpio_cfg_noint,
190 .chip = {
191 .base = S5PV210_MP01(0),
192 .ngpio = S5PV210_GPIO_MP01_NR,
193 .label = "MP01",
194 },
195 }, {
196 .config = &gpio_cfg_noint,
197 .chip = {
198 .base = S5PV210_MP02(0),
199 .ngpio = S5PV210_GPIO_MP02_NR,
200 .label = "MP02",
201 },
202 }, {
203 .config = &gpio_cfg_noint,
204 .chip = {
205 .base = S5PV210_MP03(0),
206 .ngpio = S5PV210_GPIO_MP03_NR,
207 .label = "MP03",
208 },
209 }, {
210 .base = (S5P_VA_GPIO + 0xC00),
211 .config = &gpio_cfg_noint,
212 .chip = {
213 .base = S5PV210_GPH0(0),
214 .ngpio = S5PV210_GPIO_H0_NR,
215 .label = "GPH0",
216 },
217 }, {
218 .base = (S5P_VA_GPIO + 0xC20),
219 .config = &gpio_cfg_noint,
220 .chip = {
221 .base = S5PV210_GPH1(0),
222 .ngpio = S5PV210_GPIO_H1_NR,
223 .label = "GPH1",
224 },
225 }, {
226 .base = (S5P_VA_GPIO + 0xC40),
227 .config = &gpio_cfg_noint,
228 .chip = {
229 .base = S5PV210_GPH2(0),
230 .ngpio = S5PV210_GPIO_H2_NR,
231 .label = "GPH2",
232 },
233 }, {
234 .base = (S5P_VA_GPIO + 0xC60),
235 .config = &gpio_cfg_noint,
236 .chip = {
237 .base = S5PV210_GPH3(0),
238 .ngpio = S5PV210_GPIO_H3_NR,
239 .label = "GPH3",
240 },
241 },
242};
243
244static __init int s5pv210_gpiolib_init(void)
245{
246 struct s3c_gpio_chip *chip = s5pv210_gpio_4bit;
247 int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit);
248 int i = 0;
249
250 for (i = 0; i < nr_chips; i++, chip++) {
251 if (chip->config == NULL)
252 chip->config = &gpio_cfg;
253 if (chip->base == NULL)
254 chip->base = S5PV210_BANK_BASE(i);
255 }
256
257 samsung_gpiolib_add_4bit_chips(s5pv210_gpio_4bit, nr_chips);
258
259 return 0;
260}
261core_initcall(s5pv210_gpiolib_init);
diff --git a/arch/arm/mach-s5pv210/include/mach/dma.h b/arch/arm/mach-s5pv210/include/mach/dma.h
new file mode 100644
index 000000000000..81209eb1409b
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/dma.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#ifndef __MACH_DMA_H
21#define __MACH_DMA_H
22
23/* This platform uses the common S3C DMA API driver for PL330 */
24#include <plat/s3c-dma-pl330.h>
25
26#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index 533b020e21e9..d6461ba2b71d 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -18,6 +18,8 @@
18#define gpio_cansleep __gpio_cansleep 18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq 19#define gpio_to_irq __gpio_to_irq
20 20
21/* Practically, GPIO banks upto MP03 are the configurable gpio banks */
22
21/* GPIO bank sizes */ 23/* GPIO bank sizes */
22#define S5PV210_GPIO_A0_NR (8) 24#define S5PV210_GPIO_A0_NR (8)
23#define S5PV210_GPIO_A1_NR (4) 25#define S5PV210_GPIO_A1_NR (4)
@@ -47,6 +49,10 @@
47#define S5PV210_GPIO_J3_NR (8) 49#define S5PV210_GPIO_J3_NR (8)
48#define S5PV210_GPIO_J4_NR (5) 50#define S5PV210_GPIO_J4_NR (5)
49 51
52#define S5PV210_GPIO_MP01_NR (8)
53#define S5PV210_GPIO_MP02_NR (4)
54#define S5PV210_GPIO_MP03_NR (8)
55
50/* GPIO bank numbers */ 56/* GPIO bank numbers */
51 57
52/* CONFIG_S3C_GPIO_SPACE allows the user to select extra 58/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
@@ -85,6 +91,9 @@ enum s5p_gpio_number {
85 S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1), 91 S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1),
86 S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2), 92 S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2),
87 S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3), 93 S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3),
94 S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4),
95 S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01),
96 S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02),
88}; 97};
89 98
90/* S5PV210 GPIO number definitions */ 99/* S5PV210 GPIO number definitions */
@@ -115,13 +124,16 @@ enum s5p_gpio_number {
115#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr)) 124#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr))
116#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr)) 125#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr))
117#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr)) 126#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr))
127#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr))
128#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr))
129#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr))
118 130
119/* the end of the S5PV210 specific gpios */ 131/* the end of the S5PV210 specific gpios */
120#define S5PV210_GPIO_END (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1) 132#define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1)
121#define S3C_GPIO_END S5PV210_GPIO_END 133#define S3C_GPIO_END S5PV210_GPIO_END
122 134
123/* define the number of gpios we need to the one after the GPJ4() range */ 135/* define the number of gpios we need to the one after the MP03() range */
124#define ARCH_NR_GPIOS (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + \ 136#define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \
125 CONFIG_SAMSUNG_GPIO_EXTRA + 1) 137 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
126 138
127#include <asm-generic/gpio.h> 139#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index c22694c8231f..5adcb9f26e44 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -43,6 +43,10 @@
43 43
44#define S5PV210_PA_SROMC (0xE8000000) 44#define S5PV210_PA_SROMC (0xE8000000)
45 45
46#define S5PV210_PA_MDMA 0xFA200000
47#define S5PV210_PA_PDMA0 0xE0900000
48#define S5PV210_PA_PDMA1 0xE0A00000
49
46#define S5PV210_PA_VIC0 (0xF2000000) 50#define S5PV210_PA_VIC0 (0xF2000000)
47#define S5P_PA_VIC0 S5PV210_PA_VIC0 51#define S5P_PA_VIC0 S5PV210_PA_VIC0
48 52
@@ -58,6 +62,19 @@
58#define S5PV210_PA_SDRAM (0x20000000) 62#define S5PV210_PA_SDRAM (0x20000000)
59#define S5P_PA_SDRAM S5PV210_PA_SDRAM 63#define S5P_PA_SDRAM S5PV210_PA_SDRAM
60 64
65/* I2S */
66#define S5PV210_PA_IIS0 0xEEE30000
67#define S5PV210_PA_IIS1 0xE2100000
68#define S5PV210_PA_IIS2 0xE2A00000
69
70/* PCM */
71#define S5PV210_PA_PCM0 0xE2300000
72#define S5PV210_PA_PCM1 0xE1200000
73#define S5PV210_PA_PCM2 0xE2B00000
74
75/* AC97 */
76#define S5PV210_PA_AC97 0xE2200000
77
61/* compatibiltiy defines. */ 78/* compatibiltiy defines. */
62#define S3C_PA_UART S5PV210_PA_UART 79#define S3C_PA_UART S5PV210_PA_UART
63#define S3C_PA_IIC S5PV210_PA_IIC0 80#define S3C_PA_IIC S5PV210_PA_IIC0
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
index 69027fea987a..f8a9f1b330e0 100644
--- a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
@@ -1,13 +1,14 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 * 12 *
12 * S5PV210 - pwm clock and timer support 13 * S5PV210 - pwm clock and timer support
13 * 14 *
@@ -21,14 +22,14 @@
21 22
22/** 23/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
25 * 26 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks. 28 * any of the TDIV clocks.
28 */ 29 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{ 31{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
32} 33}
33 34
34/** 35/**
@@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
40 */ 41 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{ 43{
43 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
44} 45}
45 46
46/** 47/**
@@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
50 */ 51 */
51static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
52{ 53{
53 return 0; 54 return 1;
54} 55}
55 56
56/** 57/**
@@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
61 */ 62 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{ 64{
64 return ilog2(div) - 1; 65 return ilog2(div);
65} 66}
66 67
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
68 69
69#endif /* __ASM_ARCH_PWMCLK_H */ 70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index ab4869df30c0..6f9fd3274e2e 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -72,6 +72,8 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
72}; 72};
73 73
74static struct platform_device *smdkc110_devices[] __initdata = { 74static struct platform_device *smdkc110_devices[] __initdata = {
75 &s5pv210_device_iis0,
76 &s5pv210_device_ac97,
75}; 77};
76 78
77static void __init smdkc110_map_io(void) 79static void __init smdkc110_map_io(void)
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index a27883253204..3c29e18528a5 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -72,6 +72,8 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
72}; 72};
73 73
74static struct platform_device *smdkv210_devices[] __initdata = { 74static struct platform_device *smdkv210_devices[] __initdata = {
75 &s5pv210_device_iis0,
76 &s5pv210_device_ac97,
75}; 77};
76 78
77static void __init smdkv210_map_io(void) 79static void __init smdkv210_map_io(void)
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c
new file mode 100644
index 000000000000..9ec6845840e5
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-i2c0.c
@@ -0,0 +1,25 @@
1/* linux/arch/arm/mach-s5pv210/setup-i2c0.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * I2C0 GPIO configuration.
7 *
8 * Based on plat-s3c64xx/setup-i2c0.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <plat/iic.h>
21
22void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{
24 /* Will be populated later */
25}
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index aeceb9b92aeb..f2b88c5fe142 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -7,7 +7,6 @@ config ARCH_SH7367
7 select CPU_V6 7 select CPU_V6
8 select HAVE_CLK 8 select HAVE_CLK
9 select COMMON_CLKDEV 9 select COMMON_CLKDEV
10 select GENERIC_TIME
11 select GENERIC_CLOCKEVENTS 10 select GENERIC_CLOCKEVENTS
12 11
13config ARCH_SH7377 12config ARCH_SH7377
@@ -15,7 +14,6 @@ config ARCH_SH7377
15 select CPU_V7 14 select CPU_V7
16 select HAVE_CLK 15 select HAVE_CLK
17 select COMMON_CLKDEV 16 select COMMON_CLKDEV
18 select GENERIC_TIME
19 select GENERIC_CLOCKEVENTS 17 select GENERIC_CLOCKEVENTS
20 18
21config ARCH_SH7372 19config ARCH_SH7372
@@ -23,7 +21,6 @@ config ARCH_SH7372
23 select CPU_V7 21 select CPU_V7
24 select HAVE_CLK 22 select HAVE_CLK
25 select COMMON_CLKDEV 23 select COMMON_CLKDEV
26 select GENERIC_TIME
27 select GENERIC_CLOCKEVENTS 24 select GENERIC_CLOCKEVENTS
28 25
29comment "SH-Mobile Board Type" 26comment "SH-Mobile Board Type"
diff --git a/arch/arm/mach-spear3xx/Kconfig b/arch/arm/mach-spear3xx/Kconfig
new file mode 100644
index 000000000000..20d1317cc486
--- /dev/null
+++ b/arch/arm/mach-spear3xx/Kconfig
@@ -0,0 +1,33 @@
1#
2# SPEAr3XX Machine configuration file
3#
4
5if ARCH_SPEAR3XX
6
7choice
8 prompt "SPEAr3XX Family"
9 default MACH_SPEAR300
10
11config MACH_SPEAR300
12 bool "SPEAr300"
13 help
14 Supports ST SPEAr300 Machine
15
16config MACH_SPEAR310
17 bool "SPEAr310"
18 help
19 Supports ST SPEAr310 Machine
20
21config MACH_SPEAR320
22 bool "SPEAr320"
23 help
24 Supports ST SPEAr320 Machine
25
26endchoice
27
28# Adding SPEAr3XX machine specific configuration files
29source "arch/arm/mach-spear3xx/Kconfig300"
30source "arch/arm/mach-spear3xx/Kconfig310"
31source "arch/arm/mach-spear3xx/Kconfig320"
32
33endif #ARCH_SPEAR3XX
diff --git a/arch/arm/mach-spear3xx/Kconfig300 b/arch/arm/mach-spear3xx/Kconfig300
new file mode 100644
index 000000000000..c519a05b4ab4
--- /dev/null
+++ b/arch/arm/mach-spear3xx/Kconfig300
@@ -0,0 +1,17 @@
1#
2# SPEAr300 machine configuration file
3#
4
5if MACH_SPEAR300
6
7choice
8 prompt "SPEAr300 Boards"
9 default BOARD_SPEAR300_EVB
10
11config BOARD_SPEAR300_EVB
12 bool "SPEAr300 Evaluation Board"
13 help
14 Supports ST SPEAr300 Evaluation Board
15endchoice
16
17endif #MACH_SPEAR300
diff --git a/arch/arm/mach-spear3xx/Kconfig310 b/arch/arm/mach-spear3xx/Kconfig310
new file mode 100644
index 000000000000..60e7442d75bd
--- /dev/null
+++ b/arch/arm/mach-spear3xx/Kconfig310
@@ -0,0 +1,17 @@
1#
2# SPEAr310 machine configuration file
3#
4
5if MACH_SPEAR310
6
7choice
8 prompt "SPEAr310 Boards"
9 default BOARD_SPEAR310_EVB
10
11config BOARD_SPEAR310_EVB
12 bool "SPEAr310 Evaluation Board"
13 help
14 Supports ST SPEAr310 Evaluation Board
15endchoice
16
17endif #MACH_SPEAR310
diff --git a/arch/arm/mach-spear3xx/Kconfig320 b/arch/arm/mach-spear3xx/Kconfig320
new file mode 100644
index 000000000000..1c1d438399b8
--- /dev/null
+++ b/arch/arm/mach-spear3xx/Kconfig320
@@ -0,0 +1,17 @@
1#
2# SPEAr320 machine configuration file
3#
4
5if MACH_SPEAR320
6
7choice
8 prompt "SPEAr320 Boards"
9 default BOARD_SPEAR320_EVB
10
11config BOARD_SPEAR320_EVB
12 bool "SPEAr320 Evaluation Board"
13 help
14 Supports ST SPEAr320 Evaluation Board
15endchoice
16
17endif #MACH_SPEAR320
diff --git a/arch/arm/mach-spear3xx/Makefile b/arch/arm/mach-spear3xx/Makefile
new file mode 100644
index 000000000000..b24862489704
--- /dev/null
+++ b/arch/arm/mach-spear3xx/Makefile
@@ -0,0 +1,26 @@
1#
2# Makefile for SPEAr3XX machine series
3#
4
5# common files
6obj-y += spear3xx.o clock.o
7
8# spear300 specific files
9obj-$(CONFIG_MACH_SPEAR300) += spear300.o
10
11# spear300 boards files
12obj-$(CONFIG_BOARD_SPEAR300_EVB) += spear300_evb.o
13
14
15# spear310 specific files
16obj-$(CONFIG_MACH_SPEAR310) += spear310.o
17
18# spear310 boards files
19obj-$(CONFIG_BOARD_SPEAR310_EVB) += spear310_evb.o
20
21
22# spear320 specific files
23obj-$(CONFIG_MACH_SPEAR320) += spear320.o
24
25# spear320 boards files
26obj-$(CONFIG_BOARD_SPEAR320_EVB) += spear320_evb.o
diff --git a/arch/arm/mach-spear3xx/Makefile.boot b/arch/arm/mach-spear3xx/Makefile.boot
new file mode 100644
index 000000000000..7a1f3c0eadb8
--- /dev/null
+++ b/arch/arm/mach-spear3xx/Makefile.boot
@@ -0,0 +1,3 @@
1zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
new file mode 100644
index 000000000000..39f6ccf22294
--- /dev/null
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -0,0 +1,389 @@
1/*
2 * arch/arm/mach-spear3xx/clock.c
3 *
4 * SPEAr3xx machines clock framework source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <mach/misc_regs.h>
17#include <plat/clock.h>
18
19/* root clks */
20/* 32 KHz oscillator clock */
21static struct clk osc_32k_clk = {
22 .flags = ALWAYS_ENABLED,
23 .rate = 32000,
24};
25
26/* 24 MHz oscillator clock */
27static struct clk osc_24m_clk = {
28 .flags = ALWAYS_ENABLED,
29 .rate = 24000000,
30};
31
32/* clock derived from 32 KHz osc clk */
33/* rtc clock */
34static struct clk rtc_clk = {
35 .pclk = &osc_32k_clk,
36 .en_reg = PERIP1_CLK_ENB,
37 .en_reg_bit = RTC_CLK_ENB,
38 .recalc = &follow_parent,
39};
40
41/* clock derived from 24 MHz osc clk */
42/* pll1 configuration structure */
43static struct pll_clk_config pll1_config = {
44 .mode_reg = PLL1_CTR,
45 .cfg_reg = PLL1_FRQ,
46};
47
48/* PLL1 clock */
49static struct clk pll1_clk = {
50 .pclk = &osc_24m_clk,
51 .en_reg = PLL1_CTR,
52 .en_reg_bit = PLL_ENABLE,
53 .recalc = &pll1_clk_recalc,
54 .private_data = &pll1_config,
55};
56
57/* PLL3 48 MHz clock */
58static struct clk pll3_48m_clk = {
59 .flags = ALWAYS_ENABLED,
60 .pclk = &osc_24m_clk,
61 .rate = 48000000,
62};
63
64/* watch dog timer clock */
65static struct clk wdt_clk = {
66 .flags = ALWAYS_ENABLED,
67 .pclk = &osc_24m_clk,
68 .recalc = &follow_parent,
69};
70
71/* clock derived from pll1 clk */
72/* cpu clock */
73static struct clk cpu_clk = {
74 .flags = ALWAYS_ENABLED,
75 .pclk = &pll1_clk,
76 .recalc = &follow_parent,
77};
78
79/* ahb configuration structure */
80static struct bus_clk_config ahb_config = {
81 .reg = CORE_CLK_CFG,
82 .mask = PLL_HCLK_RATIO_MASK,
83 .shift = PLL_HCLK_RATIO_SHIFT,
84};
85
86/* ahb clock */
87static struct clk ahb_clk = {
88 .flags = ALWAYS_ENABLED,
89 .pclk = &pll1_clk,
90 .recalc = &bus_clk_recalc,
91 .private_data = &ahb_config,
92};
93
94/* uart configurations */
95static struct aux_clk_config uart_config = {
96 .synth_reg = UART_CLK_SYNT,
97};
98
99/* uart parents */
100static struct pclk_info uart_pclk_info[] = {
101 {
102 .pclk = &pll1_clk,
103 .pclk_mask = AUX_CLK_PLL1_MASK,
104 .scalable = 1,
105 }, {
106 .pclk = &pll3_48m_clk,
107 .pclk_mask = AUX_CLK_PLL3_MASK,
108 .scalable = 0,
109 },
110};
111
112/* uart parent select structure */
113static struct pclk_sel uart_pclk_sel = {
114 .pclk_info = uart_pclk_info,
115 .pclk_count = ARRAY_SIZE(uart_pclk_info),
116 .pclk_sel_reg = PERIP_CLK_CFG,
117 .pclk_sel_mask = UART_CLK_MASK,
118};
119
120/* uart clock */
121static struct clk uart_clk = {
122 .en_reg = PERIP1_CLK_ENB,
123 .en_reg_bit = UART_CLK_ENB,
124 .pclk_sel = &uart_pclk_sel,
125 .pclk_sel_shift = UART_CLK_SHIFT,
126 .recalc = &aux_clk_recalc,
127 .private_data = &uart_config,
128};
129
130/* firda configurations */
131static struct aux_clk_config firda_config = {
132 .synth_reg = FIRDA_CLK_SYNT,
133};
134
135/* firda parents */
136static struct pclk_info firda_pclk_info[] = {
137 {
138 .pclk = &pll1_clk,
139 .pclk_mask = AUX_CLK_PLL1_MASK,
140 .scalable = 1,
141 }, {
142 .pclk = &pll3_48m_clk,
143 .pclk_mask = AUX_CLK_PLL3_MASK,
144 .scalable = 0,
145 },
146};
147
148/* firda parent select structure */
149static struct pclk_sel firda_pclk_sel = {
150 .pclk_info = firda_pclk_info,
151 .pclk_count = ARRAY_SIZE(firda_pclk_info),
152 .pclk_sel_reg = PERIP_CLK_CFG,
153 .pclk_sel_mask = FIRDA_CLK_MASK,
154};
155
156/* firda clock */
157static struct clk firda_clk = {
158 .en_reg = PERIP1_CLK_ENB,
159 .en_reg_bit = FIRDA_CLK_ENB,
160 .pclk_sel = &firda_pclk_sel,
161 .pclk_sel_shift = FIRDA_CLK_SHIFT,
162 .recalc = &aux_clk_recalc,
163 .private_data = &firda_config,
164};
165
166/* gpt parents */
167static struct pclk_info gpt_pclk_info[] = {
168 {
169 .pclk = &pll1_clk,
170 .pclk_mask = AUX_CLK_PLL1_MASK,
171 .scalable = 1,
172 }, {
173 .pclk = &pll3_48m_clk,
174 .pclk_mask = AUX_CLK_PLL3_MASK,
175 .scalable = 0,
176 },
177};
178
179/* gpt parent select structure */
180static struct pclk_sel gpt_pclk_sel = {
181 .pclk_info = gpt_pclk_info,
182 .pclk_count = ARRAY_SIZE(gpt_pclk_info),
183 .pclk_sel_reg = PERIP_CLK_CFG,
184 .pclk_sel_mask = GPT_CLK_MASK,
185};
186
187/* gpt0 configurations */
188static struct aux_clk_config gpt0_config = {
189 .synth_reg = PRSC1_CLK_CFG,
190};
191
192/* gpt0 timer clock */
193static struct clk gpt0_clk = {
194 .flags = ALWAYS_ENABLED,
195 .pclk_sel = &gpt_pclk_sel,
196 .pclk_sel_shift = GPT0_CLK_SHIFT,
197 .recalc = &gpt_clk_recalc,
198 .private_data = &gpt0_config,
199};
200
201/* gpt1 configurations */
202static struct aux_clk_config gpt1_config = {
203 .synth_reg = PRSC2_CLK_CFG,
204};
205
206/* gpt1 timer clock */
207static struct clk gpt1_clk = {
208 .en_reg = PERIP1_CLK_ENB,
209 .en_reg_bit = GPT1_CLK_ENB,
210 .pclk_sel = &gpt_pclk_sel,
211 .pclk_sel_shift = GPT1_CLK_SHIFT,
212 .recalc = &gpt_clk_recalc,
213 .private_data = &gpt1_config,
214};
215
216/* gpt2 configurations */
217static struct aux_clk_config gpt2_config = {
218 .synth_reg = PRSC3_CLK_CFG,
219};
220
221/* gpt2 timer clock */
222static struct clk gpt2_clk = {
223 .en_reg = PERIP1_CLK_ENB,
224 .en_reg_bit = GPT2_CLK_ENB,
225 .pclk_sel = &gpt_pclk_sel,
226 .pclk_sel_shift = GPT2_CLK_SHIFT,
227 .recalc = &gpt_clk_recalc,
228 .private_data = &gpt2_config,
229};
230
231/* clock derived from pll3 clk */
232/* usbh clock */
233static struct clk usbh_clk = {
234 .pclk = &pll3_48m_clk,
235 .en_reg = PERIP1_CLK_ENB,
236 .en_reg_bit = USBH_CLK_ENB,
237 .recalc = &follow_parent,
238};
239
240/* usbd clock */
241static struct clk usbd_clk = {
242 .pclk = &pll3_48m_clk,
243 .en_reg = PERIP1_CLK_ENB,
244 .en_reg_bit = USBD_CLK_ENB,
245 .recalc = &follow_parent,
246};
247
248/* clcd clock */
249static struct clk clcd_clk = {
250 .flags = ALWAYS_ENABLED,
251 .pclk = &pll3_48m_clk,
252 .recalc = &follow_parent,
253};
254
255/* clock derived from ahb clk */
256/* apb configuration structure */
257static struct bus_clk_config apb_config = {
258 .reg = CORE_CLK_CFG,
259 .mask = HCLK_PCLK_RATIO_MASK,
260 .shift = HCLK_PCLK_RATIO_SHIFT,
261};
262
263/* apb clock */
264static struct clk apb_clk = {
265 .flags = ALWAYS_ENABLED,
266 .pclk = &ahb_clk,
267 .recalc = &bus_clk_recalc,
268 .private_data = &apb_config,
269};
270
271/* i2c clock */
272static struct clk i2c_clk = {
273 .pclk = &ahb_clk,
274 .en_reg = PERIP1_CLK_ENB,
275 .en_reg_bit = I2C_CLK_ENB,
276 .recalc = &follow_parent,
277};
278
279/* dma clock */
280static struct clk dma_clk = {
281 .pclk = &ahb_clk,
282 .en_reg = PERIP1_CLK_ENB,
283 .en_reg_bit = DMA_CLK_ENB,
284 .recalc = &follow_parent,
285};
286
287/* jpeg clock */
288static struct clk jpeg_clk = {
289 .pclk = &ahb_clk,
290 .en_reg = PERIP1_CLK_ENB,
291 .en_reg_bit = JPEG_CLK_ENB,
292 .recalc = &follow_parent,
293};
294
295/* gmac clock */
296static struct clk gmac_clk = {
297 .pclk = &ahb_clk,
298 .en_reg = PERIP1_CLK_ENB,
299 .en_reg_bit = GMAC_CLK_ENB,
300 .recalc = &follow_parent,
301};
302
303/* smi clock */
304static struct clk smi_clk = {
305 .pclk = &ahb_clk,
306 .en_reg = PERIP1_CLK_ENB,
307 .en_reg_bit = SMI_CLK_ENB,
308 .recalc = &follow_parent,
309};
310
311/* c3 clock */
312static struct clk c3_clk = {
313 .pclk = &ahb_clk,
314 .en_reg = PERIP1_CLK_ENB,
315 .en_reg_bit = C3_CLK_ENB,
316 .recalc = &follow_parent,
317};
318
319/* clock derived from apb clk */
320/* adc clock */
321static struct clk adc_clk = {
322 .pclk = &apb_clk,
323 .en_reg = PERIP1_CLK_ENB,
324 .en_reg_bit = ADC_CLK_ENB,
325 .recalc = &follow_parent,
326};
327
328/* ssp clock */
329static struct clk ssp_clk = {
330 .pclk = &apb_clk,
331 .en_reg = PERIP1_CLK_ENB,
332 .en_reg_bit = SSP_CLK_ENB,
333 .recalc = &follow_parent,
334};
335
336/* gpio clock */
337static struct clk gpio_clk = {
338 .pclk = &apb_clk,
339 .en_reg = PERIP1_CLK_ENB,
340 .en_reg_bit = GPIO_CLK_ENB,
341 .recalc = &follow_parent,
342};
343
344/* array of all spear 3xx clock lookups */
345static struct clk_lookup spear_clk_lookups[] = {
346 /* root clks */
347 { .con_id = "osc_32k_clk", .clk = &osc_32k_clk},
348 { .con_id = "osc_24m_clk", .clk = &osc_24m_clk},
349 /* clock derived from 32 KHz osc clk */
350 { .dev_id = "rtc", .clk = &rtc_clk},
351 /* clock derived from 24 MHz osc clk */
352 { .con_id = "pll1_clk", .clk = &pll1_clk},
353 { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk},
354 { .dev_id = "wdt", .clk = &wdt_clk},
355 /* clock derived from pll1 clk */
356 { .con_id = "cpu_clk", .clk = &cpu_clk},
357 { .con_id = "ahb_clk", .clk = &ahb_clk},
358 { .dev_id = "uart", .clk = &uart_clk},
359 { .dev_id = "firda", .clk = &firda_clk},
360 { .dev_id = "gpt0", .clk = &gpt0_clk},
361 { .dev_id = "gpt1", .clk = &gpt1_clk},
362 { .dev_id = "gpt2", .clk = &gpt2_clk},
363 /* clock derived from pll3 clk */
364 { .dev_id = "usbh", .clk = &usbh_clk},
365 { .dev_id = "usbd", .clk = &usbd_clk},
366 { .dev_id = "clcd", .clk = &clcd_clk},
367 /* clock derived from ahb clk */
368 { .con_id = "apb_clk", .clk = &apb_clk},
369 { .dev_id = "i2c", .clk = &i2c_clk},
370 { .dev_id = "dma", .clk = &dma_clk},
371 { .dev_id = "jpeg", .clk = &jpeg_clk},
372 { .dev_id = "gmac", .clk = &gmac_clk},
373 { .dev_id = "smi", .clk = &smi_clk},
374 { .dev_id = "c3", .clk = &c3_clk},
375 /* clock derived from apb clk */
376 { .dev_id = "adc", .clk = &adc_clk},
377 { .dev_id = "ssp", .clk = &ssp_clk},
378 { .dev_id = "gpio", .clk = &gpio_clk},
379};
380
381void __init clk_init(void)
382{
383 int i;
384
385 for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++)
386 clk_register(&spear_clk_lookups[i]);
387
388 recalc_root_clocks();
389}
diff --git a/arch/arm/mach-spear3xx/include/mach/clkdev.h b/arch/arm/mach-spear3xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..a3d07339d9f1
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/clkdev.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/clkdev.h
3 *
4 * Clock Dev framework definitions for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_CLKDEV_H
15#define __MACH_CLKDEV_H
16
17#include <plat/clkdev.h>
18
19#endif /* __MACH_CLKDEV_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/debug-macro.S b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
new file mode 100644
index 000000000000..590519f10d6e
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
@@ -0,0 +1,14 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/debug-macro.S
3 *
4 * Debugging macro include header spear3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
new file mode 100644
index 000000000000..947625d6b48d
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -0,0 +1,46 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <mach/hardware.h>
15#include <mach/spear.h>
16#include <asm/hardware/vic.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
29 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
30 teq \irqstat, #0
31 beq 1001f @ this will set/reset
32 @ zero register
33 /*
34 * Following code will find bit position of least significang
35 * bit set in irqstat, using following equation
36 * least significant bit set in n = (n & ~(n-1))
37 */
38 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
39 mvn \tmp, \tmp @ tmp = ~tmp
40 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
41 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
42 clz \tmp, \irqstat @ tmp = leading zeros
43 rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
44
451001: /* EQ will be set if no irqs pending */
46 .endm
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
new file mode 100644
index 000000000000..af7e02c909a3
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -0,0 +1,205 @@
1/*
2 * arch/arm/mach-spear3xx/generic.h
3 *
4 * SPEAr3XX machine family generic header file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_GENERIC_H
15#define __MACH_GENERIC_H
16
17#include <asm/mach/time.h>
18#include <asm/mach/map.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/amba/bus.h>
22#include <plat/padmux.h>
23
24/* spear3xx declarations */
25/*
26 * Each GPT has 2 timer channels
27 * Following GPT channels will be used as clock source and clockevent
28 */
29#define SPEAR_GPT0_BASE SPEAR3XX_ML1_TMR_BASE
30#define SPEAR_GPT0_CHAN0_IRQ IRQ_CPU_GPT1_1
31#define SPEAR_GPT0_CHAN1_IRQ IRQ_CPU_GPT1_2
32
33/* Add spear3xx family device structure declarations here */
34extern struct amba_device gpio_device;
35extern struct amba_device uart_device;
36extern struct sys_timer spear_sys_timer;
37
38/* Add spear3xx family function declarations here */
39void __init clk_init(void);
40void __init spear3xx_map_io(void);
41void __init spear3xx_init_irq(void);
42void __init spear3xx_init(void);
43void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size);
44
45/* pad mux declarations */
46#define PMX_FIRDA_MASK (1 << 14)
47#define PMX_I2C_MASK (1 << 13)
48#define PMX_SSP_CS_MASK (1 << 12)
49#define PMX_SSP_MASK (1 << 11)
50#define PMX_MII_MASK (1 << 10)
51#define PMX_GPIO_PIN0_MASK (1 << 9)
52#define PMX_GPIO_PIN1_MASK (1 << 8)
53#define PMX_GPIO_PIN2_MASK (1 << 7)
54#define PMX_GPIO_PIN3_MASK (1 << 6)
55#define PMX_GPIO_PIN4_MASK (1 << 5)
56#define PMX_GPIO_PIN5_MASK (1 << 4)
57#define PMX_UART0_MODEM_MASK (1 << 3)
58#define PMX_UART0_MASK (1 << 2)
59#define PMX_TIMER_3_4_MASK (1 << 1)
60#define PMX_TIMER_1_2_MASK (1 << 0)
61
62/* pad mux devices */
63extern struct pmx_dev pmx_firda;
64extern struct pmx_dev pmx_i2c;
65extern struct pmx_dev pmx_ssp_cs;
66extern struct pmx_dev pmx_ssp;
67extern struct pmx_dev pmx_mii;
68extern struct pmx_dev pmx_gpio_pin0;
69extern struct pmx_dev pmx_gpio_pin1;
70extern struct pmx_dev pmx_gpio_pin2;
71extern struct pmx_dev pmx_gpio_pin3;
72extern struct pmx_dev pmx_gpio_pin4;
73extern struct pmx_dev pmx_gpio_pin5;
74extern struct pmx_dev pmx_uart0_modem;
75extern struct pmx_dev pmx_uart0;
76extern struct pmx_dev pmx_timer_3_4;
77extern struct pmx_dev pmx_timer_1_2;
78
79#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
80/* padmux plgpio devices */
81extern struct pmx_dev pmx_plgpio_0_1;
82extern struct pmx_dev pmx_plgpio_2_3;
83extern struct pmx_dev pmx_plgpio_4_5;
84extern struct pmx_dev pmx_plgpio_6_9;
85extern struct pmx_dev pmx_plgpio_10_27;
86extern struct pmx_dev pmx_plgpio_28;
87extern struct pmx_dev pmx_plgpio_29;
88extern struct pmx_dev pmx_plgpio_30;
89extern struct pmx_dev pmx_plgpio_31;
90extern struct pmx_dev pmx_plgpio_32;
91extern struct pmx_dev pmx_plgpio_33;
92extern struct pmx_dev pmx_plgpio_34_36;
93extern struct pmx_dev pmx_plgpio_37_42;
94extern struct pmx_dev pmx_plgpio_43_44_47_48;
95extern struct pmx_dev pmx_plgpio_45_46_49_50;
96#endif
97
98extern struct pmx_driver pmx_driver;
99
100/* spear300 declarations */
101#ifdef CONFIG_MACH_SPEAR300
102/* Add spear300 machine device structure declarations here */
103extern struct amba_device gpio1_device;
104
105/* pad mux modes */
106extern struct pmx_mode nand_mode;
107extern struct pmx_mode nor_mode;
108extern struct pmx_mode photo_frame_mode;
109extern struct pmx_mode lend_ip_phone_mode;
110extern struct pmx_mode hend_ip_phone_mode;
111extern struct pmx_mode lend_wifi_phone_mode;
112extern struct pmx_mode hend_wifi_phone_mode;
113extern struct pmx_mode ata_pabx_wi2s_mode;
114extern struct pmx_mode ata_pabx_i2s_mode;
115extern struct pmx_mode caml_lcdw_mode;
116extern struct pmx_mode camu_lcd_mode;
117extern struct pmx_mode camu_wlcd_mode;
118extern struct pmx_mode caml_lcd_mode;
119
120/* pad mux devices */
121extern struct pmx_dev pmx_fsmc_2_chips;
122extern struct pmx_dev pmx_fsmc_4_chips;
123extern struct pmx_dev pmx_keyboard;
124extern struct pmx_dev pmx_clcd;
125extern struct pmx_dev pmx_telecom_gpio;
126extern struct pmx_dev pmx_telecom_tdm;
127extern struct pmx_dev pmx_telecom_spi_cs_i2c_clk;
128extern struct pmx_dev pmx_telecom_camera;
129extern struct pmx_dev pmx_telecom_dac;
130extern struct pmx_dev pmx_telecom_i2s;
131extern struct pmx_dev pmx_telecom_boot_pins;
132extern struct pmx_dev pmx_telecom_sdio_4bit;
133extern struct pmx_dev pmx_telecom_sdio_8bit;
134extern struct pmx_dev pmx_gpio1;
135
136void spear300_pmx_init(void);
137
138/* Add spear300 machine function declarations here */
139void __init spear300_init(void);
140
141#endif /* CONFIG_MACH_SPEAR300 */
142
143/* spear310 declarations */
144#ifdef CONFIG_MACH_SPEAR310
145/* Add spear310 machine device structure declarations here */
146
147/* pad mux devices */
148extern struct pmx_dev pmx_emi_cs_0_1_4_5;
149extern struct pmx_dev pmx_emi_cs_2_3;
150extern struct pmx_dev pmx_uart1;
151extern struct pmx_dev pmx_uart2;
152extern struct pmx_dev pmx_uart3_4_5;
153extern struct pmx_dev pmx_fsmc;
154extern struct pmx_dev pmx_rs485_0_1;
155extern struct pmx_dev pmx_tdm0;
156
157void spear310_pmx_init(void);
158
159/* Add spear310 machine function declarations here */
160void __init spear310_init(void);
161
162#endif /* CONFIG_MACH_SPEAR310 */
163
164/* spear320 declarations */
165#ifdef CONFIG_MACH_SPEAR320
166/* Add spear320 machine device structure declarations here */
167
168/* pad mux modes */
169extern struct pmx_mode auto_net_smii_mode;
170extern struct pmx_mode auto_net_mii_mode;
171extern struct pmx_mode auto_exp_mode;
172extern struct pmx_mode small_printers_mode;
173
174/* pad mux devices */
175extern struct pmx_dev pmx_clcd;
176extern struct pmx_dev pmx_emi;
177extern struct pmx_dev pmx_fsmc;
178extern struct pmx_dev pmx_spp;
179extern struct pmx_dev pmx_sdio;
180extern struct pmx_dev pmx_i2s;
181extern struct pmx_dev pmx_uart1;
182extern struct pmx_dev pmx_uart1_modem;
183extern struct pmx_dev pmx_uart2;
184extern struct pmx_dev pmx_touchscreen;
185extern struct pmx_dev pmx_can;
186extern struct pmx_dev pmx_sdio_led;
187extern struct pmx_dev pmx_pwm0;
188extern struct pmx_dev pmx_pwm1;
189extern struct pmx_dev pmx_pwm2;
190extern struct pmx_dev pmx_pwm3;
191extern struct pmx_dev pmx_ssp1;
192extern struct pmx_dev pmx_ssp2;
193extern struct pmx_dev pmx_mii1;
194extern struct pmx_dev pmx_smii0;
195extern struct pmx_dev pmx_smii1;
196extern struct pmx_dev pmx_i2c1;
197
198void spear320_pmx_init(void);
199
200/* Add spear320 machine function declarations here */
201void __init spear320_init(void);
202
203#endif /* CONFIG_MACH_SPEAR320 */
204
205#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/gpio.h b/arch/arm/mach-spear3xx/include/mach/gpio.h
new file mode 100644
index 000000000000..451b2081bfc9
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/gpio.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/gpio.h
3 *
4 * GPIO macros for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_GPIO_H
15#define __MACH_GPIO_H
16
17#include <plat/gpio.h>
18
19#endif /* __MACH_GPIO_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h
new file mode 100644
index 000000000000..4a86e6a3c444
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/hardware.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/hardware.h
3 *
4 * Hardware definitions for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_HARDWARE_H
15#define __MACH_HARDWARE_H
16
17/* Vitual to physical translation of statically mapped space */
18#define IO_ADDRESS(x) (x | 0xF0000000)
19
20#endif /* __MACH_HARDWARE_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/io.h b/arch/arm/mach-spear3xx/include/mach/io.h
new file mode 100644
index 000000000000..30cff8a1f6b5
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/io.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/io.h
3 *
4 * IO definitions for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IO_H
15#define __MACH_IO_H
16
17#include <plat/io.h>
18
19#endif /* __MACH_IO_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
new file mode 100644
index 000000000000..7f940b818473
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -0,0 +1,152 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/irqs.h
3 *
4 * IRQ helper macros for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IRQS_H
15#define __MACH_IRQS_H
16
17/* SPEAr3xx IRQ definitions */
18#define IRQ_HW_ACCEL_MOD_0 0
19#define IRQ_INTRCOMM_RAS_ARM 1
20#define IRQ_CPU_GPT1_1 2
21#define IRQ_CPU_GPT1_2 3
22#define IRQ_BASIC_GPT1_1 4
23#define IRQ_BASIC_GPT1_2 5
24#define IRQ_BASIC_GPT2_1 6
25#define IRQ_BASIC_GPT2_2 7
26#define IRQ_BASIC_DMA 8
27#define IRQ_BASIC_SMI 9
28#define IRQ_BASIC_RTC 10
29#define IRQ_BASIC_GPIO 11
30#define IRQ_BASIC_WDT 12
31#define IRQ_DDR_CONTROLLER 13
32#define IRQ_SYS_ERROR 14
33#define IRQ_WAKEUP_RCV 15
34#define IRQ_JPEG 16
35#define IRQ_IRDA 17
36#define IRQ_ADC 18
37#define IRQ_UART 19
38#define IRQ_SSP 20
39#define IRQ_I2C 21
40#define IRQ_MAC_1 22
41#define IRQ_MAC_2 23
42#define IRQ_USB_DEV 24
43#define IRQ_USB_H_OHCI_0 25
44#define IRQ_USB_H_EHCI_0 26
45#define IRQ_USB_H_EHCI_1 IRQ_USB_H_EHCI_0
46#define IRQ_USB_H_OHCI_1 27
47#define IRQ_GEN_RAS_1 28
48#define IRQ_GEN_RAS_2 29
49#define IRQ_GEN_RAS_3 30
50#define IRQ_HW_ACCEL_MOD_1 31
51#define IRQ_VIC_END 32
52
53#define VIRQ_START IRQ_VIC_END
54
55/* SPEAr300 Virtual irq definitions */
56#ifdef CONFIG_MACH_SPEAR300
57/* IRQs sharing IRQ_GEN_RAS_1 */
58#define VIRQ_IT_PERS_S (VIRQ_START + 0)
59#define VIRQ_IT_CHANGE_S (VIRQ_START + 1)
60#define VIRQ_I2S (VIRQ_START + 2)
61#define VIRQ_TDM (VIRQ_START + 3)
62#define VIRQ_CAMERA_L (VIRQ_START + 4)
63#define VIRQ_CAMERA_F (VIRQ_START + 5)
64#define VIRQ_CAMERA_V (VIRQ_START + 6)
65#define VIRQ_KEYBOARD (VIRQ_START + 7)
66#define VIRQ_GPIO1 (VIRQ_START + 8)
67
68/* IRQs sharing IRQ_GEN_RAS_3 */
69#define IRQ_CLCD IRQ_GEN_RAS_3
70
71/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
72#define IRQ_SDIO IRQ_INTRCOMM_RAS_ARM
73
74/* GPIO pins virtual irqs */
75#define SPEAR_GPIO_INT_BASE (VIRQ_START + 9)
76#define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO_INT_BASE + 8)
77#define SPEAR_GPIO_INT_END (SPEAR_GPIO1_INT_BASE + 8)
78
79/* SPEAr310 Virtual irq definitions */
80#elif defined(CONFIG_MACH_SPEAR310)
81/* IRQs sharing IRQ_GEN_RAS_1 */
82#define VIRQ_SMII0 (VIRQ_START + 0)
83#define VIRQ_SMII1 (VIRQ_START + 1)
84#define VIRQ_SMII2 (VIRQ_START + 2)
85#define VIRQ_SMII3 (VIRQ_START + 3)
86#define VIRQ_WAKEUP_SMII0 (VIRQ_START + 4)
87#define VIRQ_WAKEUP_SMII1 (VIRQ_START + 5)
88#define VIRQ_WAKEUP_SMII2 (VIRQ_START + 6)
89#define VIRQ_WAKEUP_SMII3 (VIRQ_START + 7)
90
91/* IRQs sharing IRQ_GEN_RAS_2 */
92#define VIRQ_UART1 (VIRQ_START + 8)
93#define VIRQ_UART2 (VIRQ_START + 9)
94#define VIRQ_UART3 (VIRQ_START + 10)
95#define VIRQ_UART4 (VIRQ_START + 11)
96#define VIRQ_UART5 (VIRQ_START + 12)
97
98/* IRQs sharing IRQ_GEN_RAS_3 */
99#define VIRQ_EMI (VIRQ_START + 13)
100#define VIRQ_PLGPIO (VIRQ_START + 14)
101
102/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
103#define VIRQ_TDM_HDLC (VIRQ_START + 15)
104#define VIRQ_RS485_0 (VIRQ_START + 16)
105#define VIRQ_RS485_1 (VIRQ_START + 17)
106
107/* GPIO pins virtual irqs */
108#define SPEAR_GPIO_INT_BASE (VIRQ_START + 18)
109
110/* SPEAr320 Virtual irq definitions */
111#else
112/* IRQs sharing IRQ_GEN_RAS_1 */
113#define VIRQ_EMI (VIRQ_START + 0)
114#define VIRQ_CLCD (VIRQ_START + 1)
115#define VIRQ_SPP (VIRQ_START + 2)
116
117/* IRQs sharing IRQ_GEN_RAS_2 */
118#define IRQ_SDIO IRQ_GEN_RAS_2
119
120/* IRQs sharing IRQ_GEN_RAS_3 */
121#define VIRQ_PLGPIO (VIRQ_START + 3)
122#define VIRQ_I2S_PLAY (VIRQ_START + 4)
123#define VIRQ_I2S_REC (VIRQ_START + 5)
124
125/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
126#define VIRQ_CANU (VIRQ_START + 6)
127#define VIRQ_CANL (VIRQ_START + 7)
128#define VIRQ_UART1 (VIRQ_START + 8)
129#define VIRQ_UART2 (VIRQ_START + 9)
130#define VIRQ_SSP1 (VIRQ_START + 10)
131#define VIRQ_SSP2 (VIRQ_START + 11)
132#define VIRQ_SMII0 (VIRQ_START + 12)
133#define VIRQ_MII1_SMII1 (VIRQ_START + 13)
134#define VIRQ_WAKEUP_SMII0 (VIRQ_START + 14)
135#define VIRQ_WAKEUP_MII1_SMII1 (VIRQ_START + 15)
136#define VIRQ_I2C (VIRQ_START + 16)
137
138/* GPIO pins virtual irqs */
139#define SPEAR_GPIO_INT_BASE (VIRQ_START + 17)
140
141#endif
142
143/* PLGPIO Virtual IRQs */
144#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
145#define SPEAR_PLGPIO_INT_BASE (SPEAR_GPIO_INT_BASE + 8)
146#define SPEAR_GPIO_INT_END (SPEAR_PLGPIO_INT_BASE + 102)
147#endif
148
149#define VIRQ_END SPEAR_GPIO_INT_END
150#define NR_IRQS VIRQ_END
151
152#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/memory.h b/arch/arm/mach-spear3xx/include/mach/memory.h
new file mode 100644
index 000000000000..51735221ea19
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/memory.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/memory.h
3 *
4 * Memory map for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_MEMORY_H
15#define __MACH_MEMORY_H
16
17#include <plat/memory.h>
18
19#endif /* __MACH_MEMORY_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
new file mode 100644
index 000000000000..38d767a1aba0
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
@@ -0,0 +1,163 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/misc_regs.h
3 *
4 * Miscellaneous registers definitions for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_MISC_REGS_H
15#define __MACH_MISC_REGS_H
16
17#include <mach/spear.h>
18
19#define MISC_BASE VA_SPEAR3XX_ICM3_MISC_REG_BASE
20
21#define SOC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x000))
22#define DIAG_CFG_CTR ((unsigned int *)(MISC_BASE + 0x004))
23#define PLL1_CTR ((unsigned int *)(MISC_BASE + 0x008))
24#define PLL1_FRQ ((unsigned int *)(MISC_BASE + 0x00C))
25#define PLL1_MOD ((unsigned int *)(MISC_BASE + 0x010))
26#define PLL2_CTR ((unsigned int *)(MISC_BASE + 0x014))
27/* PLL_CTR register masks */
28#define PLL_ENABLE 2
29#define PLL_MODE_SHIFT 4
30#define PLL_MODE_MASK 0x3
31#define PLL_MODE_NORMAL 0
32#define PLL_MODE_FRACTION 1
33#define PLL_MODE_DITH_DSB 2
34#define PLL_MODE_DITH_SSB 3
35
36#define PLL2_FRQ ((unsigned int *)(MISC_BASE + 0x018))
37/* PLL FRQ register masks */
38#define PLL_DIV_N_SHIFT 0
39#define PLL_DIV_N_MASK 0xFF
40#define PLL_DIV_P_SHIFT 8
41#define PLL_DIV_P_MASK 0x7
42#define PLL_NORM_FDBK_M_SHIFT 24
43#define PLL_NORM_FDBK_M_MASK 0xFF
44#define PLL_DITH_FDBK_M_SHIFT 16
45#define PLL_DITH_FDBK_M_MASK 0xFFFF
46
47#define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C))
48#define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020))
49#define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024))
50/* CORE CLK CFG register masks */
51#define PLL_HCLK_RATIO_SHIFT 10
52#define PLL_HCLK_RATIO_MASK 0x3
53#define HCLK_PCLK_RATIO_SHIFT 8
54#define HCLK_PCLK_RATIO_MASK 0x3
55
56#define PERIP_CLK_CFG ((unsigned int *)(MISC_BASE + 0x028))
57/* PERIP_CLK_CFG register masks */
58#define UART_CLK_SHIFT 4
59#define UART_CLK_MASK 0x1
60#define FIRDA_CLK_SHIFT 5
61#define FIRDA_CLK_MASK 0x3
62#define GPT0_CLK_SHIFT 8
63#define GPT1_CLK_SHIFT 11
64#define GPT2_CLK_SHIFT 12
65#define GPT_CLK_MASK 0x1
66#define AUX_CLK_PLL3_MASK 0
67#define AUX_CLK_PLL1_MASK 1
68
69#define PERIP1_CLK_ENB ((unsigned int *)(MISC_BASE + 0x02C))
70/* PERIP1_CLK_ENB register masks */
71#define UART_CLK_ENB 3
72#define SSP_CLK_ENB 5
73#define I2C_CLK_ENB 7
74#define JPEG_CLK_ENB 8
75#define FIRDA_CLK_ENB 10
76#define GPT1_CLK_ENB 11
77#define GPT2_CLK_ENB 12
78#define ADC_CLK_ENB 15
79#define RTC_CLK_ENB 17
80#define GPIO_CLK_ENB 18
81#define DMA_CLK_ENB 19
82#define SMI_CLK_ENB 21
83#define GMAC_CLK_ENB 23
84#define USBD_CLK_ENB 24
85#define USBH_CLK_ENB 25
86#define C3_CLK_ENB 31
87
88#define SOC_CORE_ID ((unsigned int *)(MISC_BASE + 0x030))
89#define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x034))
90#define PERIP1_SOF_RST ((unsigned int *)(MISC_BASE + 0x038))
91/* PERIP1_SOF_RST register masks */
92#define JPEG_SOF_RST 8
93
94#define SOC_USER_ID ((unsigned int *)(MISC_BASE + 0x03C))
95#define RAS_SOF_RST ((unsigned int *)(MISC_BASE + 0x040))
96#define PRSC1_CLK_CFG ((unsigned int *)(MISC_BASE + 0x044))
97#define PRSC2_CLK_CFG ((unsigned int *)(MISC_BASE + 0x048))
98#define PRSC3_CLK_CFG ((unsigned int *)(MISC_BASE + 0x04C))
99/* gpt synthesizer register masks */
100#define GPT_MSCALE_SHIFT 0
101#define GPT_MSCALE_MASK 0xFFF
102#define GPT_NSCALE_SHIFT 12
103#define GPT_NSCALE_MASK 0xF
104
105#define AMEM_CLK_CFG ((unsigned int *)(MISC_BASE + 0x050))
106#define EXPI_CLK_CFG ((unsigned int *)(MISC_BASE + 0x054))
107#define CLCD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x05C))
108#define FIRDA_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x060))
109#define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x064))
110#define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x068))
111#define RAS1_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x06C))
112#define RAS2_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x070))
113#define RAS3_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x074))
114#define RAS4_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x078))
115/* aux clk synthesiser register masks for irda to ras4 */
116#define AUX_EQ_SEL_SHIFT 30
117#define AUX_EQ_SEL_MASK 1
118#define AUX_EQ1_SEL 0
119#define AUX_EQ2_SEL 1
120#define AUX_XSCALE_SHIFT 16
121#define AUX_XSCALE_MASK 0xFFF
122#define AUX_YSCALE_SHIFT 0
123#define AUX_YSCALE_MASK 0xFFF
124
125#define ICM1_ARB_CFG ((unsigned int *)(MISC_BASE + 0x07C))
126#define ICM2_ARB_CFG ((unsigned int *)(MISC_BASE + 0x080))
127#define ICM3_ARB_CFG ((unsigned int *)(MISC_BASE + 0x084))
128#define ICM4_ARB_CFG ((unsigned int *)(MISC_BASE + 0x088))
129#define ICM5_ARB_CFG ((unsigned int *)(MISC_BASE + 0x08C))
130#define ICM6_ARB_CFG ((unsigned int *)(MISC_BASE + 0x090))
131#define ICM7_ARB_CFG ((unsigned int *)(MISC_BASE + 0x094))
132#define ICM8_ARB_CFG ((unsigned int *)(MISC_BASE + 0x098))
133#define ICM9_ARB_CFG ((unsigned int *)(MISC_BASE + 0x09C))
134#define DMA_CHN_CFG ((unsigned int *)(MISC_BASE + 0x0A0))
135#define USB2_PHY_CFG ((unsigned int *)(MISC_BASE + 0x0A4))
136#define GMAC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0A8))
137#define EXPI_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0AC))
138#define PRC1_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C0))
139#define PRC2_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C4))
140#define PRC3_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C8))
141#define PRC4_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0CC))
142#define PRC1_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D0))
143#define PRC2_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D4))
144#define PRC3_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D8))
145#define PRC4_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0DC))
146#define PWRDOWN_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0E0))
147#define COMPSSTL_1V8_CFG ((unsigned int *)(MISC_BASE + 0x0E4))
148#define COMPSSTL_2V5_CFG ((unsigned int *)(MISC_BASE + 0x0E8))
149#define COMPCOR_3V3_CFG ((unsigned int *)(MISC_BASE + 0x0EC))
150#define SSTLPAD_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F0))
151#define BIST1_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F4))
152#define BIST2_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F8))
153#define BIST3_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0FC))
154#define BIST4_CFG_CTR ((unsigned int *)(MISC_BASE + 0x100))
155#define BIST5_CFG_CTR ((unsigned int *)(MISC_BASE + 0x104))
156#define BIST1_STS_RES ((unsigned int *)(MISC_BASE + 0x108))
157#define BIST2_STS_RES ((unsigned int *)(MISC_BASE + 0x10C))
158#define BIST3_STS_RES ((unsigned int *)(MISC_BASE + 0x110))
159#define BIST4_STS_RES ((unsigned int *)(MISC_BASE + 0x114))
160#define BIST5_STS_RES ((unsigned int *)(MISC_BASE + 0x118))
161#define SYSERR_CFG_CTR ((unsigned int *)(MISC_BASE + 0x11C))
162
163#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
new file mode 100644
index 000000000000..dcca8568a486
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -0,0 +1,144 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/spear.h
3 *
4 * SPEAr3xx Machine family specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SPEAR3XX_H
15#define __MACH_SPEAR3XX_H
16
17#include <mach/hardware.h>
18#include <mach/spear300.h>
19#include <mach/spear310.h>
20#include <mach/spear320.h>
21
22#define SPEAR3XX_ML_SDRAM_BASE 0x00000000
23#define SPEAR3XX_ML_SDRAM_SIZE 0x40000000
24
25#define SPEAR3XX_ICM9_BASE 0xC0000000
26#define SPEAR3XX_ICM9_SIZE 0x10000000
27
28/* ICM1 - Low speed connection */
29#define SPEAR3XX_ICM1_2_BASE 0xD0000000
30#define SPEAR3XX_ICM1_2_SIZE 0x10000000
31
32#define SPEAR3XX_ICM1_UART_BASE 0xD0000000
33#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)
34#define SPEAR3XX_ICM1_UART_SIZE 0x00080000
35
36#define SPEAR3XX_ICM1_ADC_BASE 0xD0080000
37#define SPEAR3XX_ICM1_ADC_SIZE 0x00080000
38
39#define SPEAR3XX_ICM1_SSP_BASE 0xD0100000
40#define SPEAR3XX_ICM1_SSP_SIZE 0x00080000
41
42#define SPEAR3XX_ICM1_I2C_BASE 0xD0180000
43#define SPEAR3XX_ICM1_I2C_SIZE 0x00080000
44
45#define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000
46#define SPEAR3XX_ICM1_JPEG_SIZE 0x00800000
47
48#define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000
49#define SPEAR3XX_ICM1_IRDA_SIZE 0x00080000
50
51#define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000
52#define SPEAR3XX_ICM1_SRAM_SIZE 0x05800000
53
54/* ICM2 - Application Subsystem */
55#define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000
56#define SPEAR3XX_ICM2_HWACCEL0_SIZE 0x00800000
57
58#define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000
59#define SPEAR3XX_ICM2_HWACCEL1_SIZE 0x00800000
60
61/* ICM4 - High Speed Connection */
62#define SPEAR3XX_ICM4_BASE 0xE0000000
63#define SPEAR3XX_ICM4_SIZE 0x08000000
64
65#define SPEAR3XX_ICM4_MII_BASE 0xE0800000
66#define SPEAR3XX_ICM4_MII_SIZE 0x00800000
67
68#define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000
69#define SPEAR3XX_ICM4_USBD_FIFO_SIZE 0x00100000
70
71#define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000
72#define SPEAR3XX_ICM4_USBD_CSR_SIZE 0x00100000
73
74#define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000
75#define SPEAR3XX_ICM4_USBD_PLDT_SIZE 0x00100000
76
77#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000
78#define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE 0x00100000
79
80#define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000
81#define SPEAR3XX_ICM4_USB_OHCI0_SIZE 0x00100000
82
83#define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000
84#define SPEAR3XX_ICM4_USB_OHCI1_SIZE 0x00100000
85
86#define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000
87#define SPEAR3XX_ICM4_USB_ARB_SIZE 0x00010000
88
89/* ML1 - Multi Layer CPU Subsystem */
90#define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000
91#define SPEAR3XX_ICM3_ML1_2_SIZE 0x0F000000
92
93#define SPEAR3XX_ML1_TMR_BASE 0xF0000000
94#define SPEAR3XX_ML1_TMR_SIZE 0x00100000
95
96#define SPEAR3XX_ML1_VIC_BASE 0xF1100000
97#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)
98#define SPEAR3XX_ML1_VIC_SIZE 0x00100000
99
100/* ICM3 - Basic Subsystem */
101#define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000
102#define SPEAR3XX_ICM3_SMEM_SIZE 0x04000000
103
104#define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000
105#define SPEAR3XX_ICM3_SMI_CTRL_SIZE 0x00200000
106
107#define SPEAR3XX_ICM3_DMA_BASE 0xFC400000
108#define SPEAR3XX_ICM3_DMA_SIZE 0x00200000
109
110#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
111#define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE 0x00200000
112
113#define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000
114#define SPEAR3XX_ICM3_TMR0_SIZE 0x00080000
115
116#define SPEAR3XX_ICM3_WDT_BASE 0xFC880000
117#define SPEAR3XX_ICM3_WDT_SIZE 0x00080000
118
119#define SPEAR3XX_ICM3_RTC_BASE 0xFC900000
120#define SPEAR3XX_ICM3_RTC_SIZE 0x00080000
121
122#define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000
123#define SPEAR3XX_ICM3_GPIO_SIZE 0x00080000
124
125#define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000
126#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)
127#define SPEAR3XX_ICM3_SYS_CTRL_SIZE 0x00080000
128
129#define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000
130#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)
131#define SPEAR3XX_ICM3_MISC_REG_SIZE 0x00080000
132
133#define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000
134#define SPEAR3XX_ICM3_TMR1_SIZE 0x00080000
135
136/* Debug uart for linux, will be used for debug and uncompress messages */
137#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
138#define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE
139
140/* Sysctl base for spear platform */
141#define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE
142#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
143
144#endif /* __MACH_SPEAR3XX_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
new file mode 100644
index 000000000000..ccaa76522ee2
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -0,0 +1,83 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/spear300.h
3 *
4 * SPEAr300 Machine specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifdef CONFIG_MACH_SPEAR300
15
16#ifndef __MACH_SPEAR300_H
17#define __MACH_SPEAR300_H
18
19/* Base address of various IPs */
20#define SPEAR300_TELECOM_BASE 0x50000000
21#define SPEAR300_TELECOM_SIZE 0x10000000
22
23/* Interrupt registers offsets and masks */
24#define SPEAR300_TELECOM_REG_SIZE 0x00010000
25#define INT_ENB_MASK_REG 0x54
26#define INT_STS_MASK_REG 0x58
27#define IT_PERS_S_IRQ_MASK (1 << 0)
28#define IT_CHANGE_S_IRQ_MASK (1 << 1)
29#define I2S_IRQ_MASK (1 << 2)
30#define TDM_IRQ_MASK (1 << 3)
31#define CAMERA_L_IRQ_MASK (1 << 4)
32#define CAMERA_F_IRQ_MASK (1 << 5)
33#define CAMERA_V_IRQ_MASK (1 << 6)
34#define KEYBOARD_IRQ_MASK (1 << 7)
35#define GPIO1_IRQ_MASK (1 << 8)
36
37#define SHIRQ_RAS1_MASK 0x1FF
38
39#define SPEAR300_CLCD_BASE 0x60000000
40#define SPEAR300_CLCD_SIZE 0x10000000
41
42#define SPEAR300_SDIO_BASE 0x70000000
43#define SPEAR300_SDIO_SIZE 0x10000000
44
45#define SPEAR300_NAND_0_BASE 0x80000000
46#define SPEAR300_NAND_0_SIZE 0x04000000
47
48#define SPEAR300_NAND_1_BASE 0x84000000
49#define SPEAR300_NAND_1_SIZE 0x04000000
50
51#define SPEAR300_NAND_2_BASE 0x88000000
52#define SPEAR300_NAND_2_SIZE 0x04000000
53
54#define SPEAR300_NAND_3_BASE 0x8c000000
55#define SPEAR300_NAND_3_SIZE 0x04000000
56
57#define SPEAR300_NOR_0_BASE 0x90000000
58#define SPEAR300_NOR_0_SIZE 0x01000000
59
60#define SPEAR300_NOR_1_BASE 0x91000000
61#define SPEAR300_NOR_1_SIZE 0x01000000
62
63#define SPEAR300_NOR_2_BASE 0x92000000
64#define SPEAR300_NOR_2_SIZE 0x01000000
65
66#define SPEAR300_NOR_3_BASE 0x93000000
67#define SPEAR300_NOR_3_SIZE 0x01000000
68
69#define SPEAR300_FSMC_BASE 0x94000000
70#define SPEAR300_FSMC_SIZE 0x05000000
71
72#define SPEAR300_SOC_CONFIG_BASE 0x99000000
73#define SPEAR300_SOC_CONFIG_SIZE 0x00000008
74
75#define SPEAR300_KEYBOARD_BASE 0xA0000000
76#define SPEAR300_KEYBOARD_SIZE 0x09000000
77
78#define SPEAR300_GPIO_BASE 0xA9000000
79#define SPEAR300_GPIO_SIZE 0x07000000
80
81#endif /* __MACH_SPEAR300_H */
82
83#endif /* CONFIG_MACH_SPEAR300 */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h
new file mode 100644
index 000000000000..b27bb8af3309
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/spear310.h
@@ -0,0 +1,70 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/spear310.h
3 *
4 * SPEAr310 Machine specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifdef CONFIG_MACH_SPEAR310
15
16#ifndef __MACH_SPEAR310_H
17#define __MACH_SPEAR310_H
18
19#define SPEAR310_NAND_BASE 0x40000000
20#define SPEAR310_NAND_SIZE 0x04000000
21
22#define SPEAR310_FSMC_BASE 0x44000000
23#define SPEAR310_FSMC_SIZE 0x01000000
24
25#define SPEAR310_UART1_BASE 0xB2000000
26#define SPEAR310_UART2_BASE 0xB2080000
27#define SPEAR310_UART3_BASE 0xB2100000
28#define SPEAR310_UART4_BASE 0xB2180000
29#define SPEAR310_UART5_BASE 0xB2200000
30#define SPEAR310_UART_SIZE 0x00080000
31
32#define SPEAR310_HDLC_BASE 0xB2800000
33#define SPEAR310_HDLC_SIZE 0x00800000
34
35#define SPEAR310_RS485_0_BASE 0xB3000000
36#define SPEAR310_RS485_0_SIZE 0x00800000
37
38#define SPEAR310_RS485_1_BASE 0xB3800000
39#define SPEAR310_RS485_1_SIZE 0x00800000
40
41#define SPEAR310_SOC_CONFIG_BASE 0xB4000000
42#define SPEAR310_SOC_CONFIG_SIZE 0x00000070
43/* Interrupt registers offsets and masks */
44#define INT_STS_MASK_REG 0x04
45#define SMII0_IRQ_MASK (1 << 0)
46#define SMII1_IRQ_MASK (1 << 1)
47#define SMII2_IRQ_MASK (1 << 2)
48#define SMII3_IRQ_MASK (1 << 3)
49#define WAKEUP_SMII0_IRQ_MASK (1 << 4)
50#define WAKEUP_SMII1_IRQ_MASK (1 << 5)
51#define WAKEUP_SMII2_IRQ_MASK (1 << 6)
52#define WAKEUP_SMII3_IRQ_MASK (1 << 7)
53#define UART1_IRQ_MASK (1 << 8)
54#define UART2_IRQ_MASK (1 << 9)
55#define UART3_IRQ_MASK (1 << 10)
56#define UART4_IRQ_MASK (1 << 11)
57#define UART5_IRQ_MASK (1 << 12)
58#define EMI_IRQ_MASK (1 << 13)
59#define TDM_HDLC_IRQ_MASK (1 << 14)
60#define RS485_0_IRQ_MASK (1 << 15)
61#define RS485_1_IRQ_MASK (1 << 16)
62
63#define SHIRQ_RAS1_MASK 0x000FF
64#define SHIRQ_RAS2_MASK 0x01F00
65#define SHIRQ_RAS3_MASK 0x02000
66#define SHIRQ_INTRCOMM_RAS_MASK 0x1C000
67
68#endif /* __MACH_SPEAR310_H */
69
70#endif /* CONFIG_MACH_SPEAR310 */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
new file mode 100644
index 000000000000..cacf17a958cd
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -0,0 +1,96 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/spear320.h
3 *
4 * SPEAr320 Machine specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifdef CONFIG_MACH_SPEAR320
15
16#ifndef __MACH_SPEAR320_H
17#define __MACH_SPEAR320_H
18
19#define SPEAR320_EMI_CTRL_BASE 0x40000000
20#define SPEAR320_EMI_CTRL_SIZE 0x08000000
21
22#define SPEAR320_FSMC_BASE 0x4C000000
23#define SPEAR320_FSMC_SIZE 0x01000000
24
25#define SPEAR320_I2S_BASE 0x60000000
26#define SPEAR320_I2S_SIZE 0x10000000
27
28#define SPEAR320_SDIO_BASE 0x70000000
29#define SPEAR320_SDIO_SIZE 0x10000000
30
31#define SPEAR320_CLCD_BASE 0x90000000
32#define SPEAR320_CLCD_SIZE 0x10000000
33
34#define SPEAR320_PAR_PORT_BASE 0xA0000000
35#define SPEAR320_PAR_PORT_SIZE 0x01000000
36
37#define SPEAR320_CAN0_BASE 0xA1000000
38#define SPEAR320_CAN0_SIZE 0x01000000
39
40#define SPEAR320_CAN1_BASE 0xA2000000
41#define SPEAR320_CAN1_SIZE 0x01000000
42
43#define SPEAR320_UART1_BASE 0xA3000000
44#define SPEAR320_UART2_BASE 0xA4000000
45#define SPEAR320_UART_SIZE 0x01000000
46
47#define SPEAR320_SSP0_BASE 0xA5000000
48#define SPEAR320_SSP0_SIZE 0x01000000
49
50#define SPEAR320_SSP1_BASE 0xA6000000
51#define SPEAR320_SSP1_SIZE 0x01000000
52
53#define SPEAR320_I2C_BASE 0xA7000000
54#define SPEAR320_I2C_SIZE 0x01000000
55
56#define SPEAR320_PWM_BASE 0xA8000000
57#define SPEAR320_PWM_SIZE 0x01000000
58
59#define SPEAR320_SMII0_BASE 0xAA000000
60#define SPEAR320_SMII0_SIZE 0x01000000
61
62#define SPEAR320_SMII1_BASE 0xAB000000
63#define SPEAR320_SMII1_SIZE 0x01000000
64
65#define SPEAR320_SOC_CONFIG_BASE 0xB4000000
66#define SPEAR320_SOC_CONFIG_SIZE 0x00000070
67/* Interrupt registers offsets and masks */
68#define INT_STS_MASK_REG 0x04
69#define INT_CLR_MASK_REG 0x04
70#define INT_ENB_MASK_REG 0x08
71#define GPIO_IRQ_MASK (1 << 0)
72#define I2S_PLAY_IRQ_MASK (1 << 1)
73#define I2S_REC_IRQ_MASK (1 << 2)
74#define EMI_IRQ_MASK (1 << 7)
75#define CLCD_IRQ_MASK (1 << 8)
76#define SPP_IRQ_MASK (1 << 9)
77#define SDIO_IRQ_MASK (1 << 10)
78#define CAN_U_IRQ_MASK (1 << 11)
79#define CAN_L_IRQ_MASK (1 << 12)
80#define UART1_IRQ_MASK (1 << 13)
81#define UART2_IRQ_MASK (1 << 14)
82#define SSP1_IRQ_MASK (1 << 15)
83#define SSP2_IRQ_MASK (1 << 16)
84#define SMII0_IRQ_MASK (1 << 17)
85#define MII1_SMII1_IRQ_MASK (1 << 18)
86#define WAKEUP_SMII0_IRQ_MASK (1 << 19)
87#define WAKEUP_MII1_SMII1_IRQ_MASK (1 << 20)
88#define I2C1_IRQ_MASK (1 << 21)
89
90#define SHIRQ_RAS1_MASK 0x000380
91#define SHIRQ_RAS3_MASK 0x000007
92#define SHIRQ_INTRCOMM_RAS_MASK 0x3FF800
93
94#endif /* __MACH_SPEAR320_H */
95
96#endif /* CONFIG_MACH_SPEAR320 */
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h
new file mode 100644
index 000000000000..92cee6335c90
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/system.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/system.h
3 *
4 * SPEAr3xx Machine family specific architecture functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SYSTEM_H
15#define __MACH_SYSTEM_H
16
17#include <plat/system.h>
18
19#endif /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/timex.h b/arch/arm/mach-spear3xx/include/mach/timex.h
new file mode 100644
index 000000000000..a38cc9de876f
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/timex.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/timex.h
3 *
4 * SPEAr3XX machine family specific timex definitions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_TIMEX_H
15#define __MACH_TIMEX_H
16
17#include <plat/timex.h>
18
19#endif /* __MACH_TIMEX_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/uncompress.h b/arch/arm/mach-spear3xx/include/mach/uncompress.h
new file mode 100644
index 000000000000..53ba8bbc0dfa
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/uncompress.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_UNCOMPRESS_H
15#define __MACH_UNCOMPRESS_H
16
17#include <plat/uncompress.h>
18
19#endif /* __MACH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/vmalloc.h b/arch/arm/mach-spear3xx/include/mach/vmalloc.h
new file mode 100644
index 000000000000..df977b3c9a63
--- /dev/null
+++ b/arch/arm/mach-spear3xx/include/mach/vmalloc.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_VMALLOC_H
15#define __MACH_VMALLOC_H
16
17#include <plat/vmalloc.h>
18
19#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
new file mode 100644
index 000000000000..3560f8c1e723
--- /dev/null
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -0,0 +1,468 @@
1/*
2 * arch/arm/mach-spear3xx/spear300.c
3 *
4 * SPEAr300 machine source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/types.h>
15#include <linux/amba/pl061.h>
16#include <linux/ptrace.h>
17#include <asm/irq.h>
18#include <mach/generic.h>
19#include <mach/spear.h>
20#include <plat/shirq.h>
21
22/* pad multiplexing support */
23/* muxing registers */
24#define PAD_MUX_CONFIG_REG 0x00
25#define MODE_CONFIG_REG 0x04
26
27/* modes */
28#define NAND_MODE (1 << 0)
29#define NOR_MODE (1 << 1)
30#define PHOTO_FRAME_MODE (1 << 2)
31#define LEND_IP_PHONE_MODE (1 << 3)
32#define HEND_IP_PHONE_MODE (1 << 4)
33#define LEND_WIFI_PHONE_MODE (1 << 5)
34#define HEND_WIFI_PHONE_MODE (1 << 6)
35#define ATA_PABX_WI2S_MODE (1 << 7)
36#define ATA_PABX_I2S_MODE (1 << 8)
37#define CAML_LCDW_MODE (1 << 9)
38#define CAMU_LCD_MODE (1 << 10)
39#define CAMU_WLCD_MODE (1 << 11)
40#define CAML_LCD_MODE (1 << 12)
41#define ALL_MODES 0x1FFF
42
43struct pmx_mode nand_mode = {
44 .id = NAND_MODE,
45 .name = "nand mode",
46 .mask = 0x00,
47};
48
49struct pmx_mode nor_mode = {
50 .id = NOR_MODE,
51 .name = "nor mode",
52 .mask = 0x01,
53};
54
55struct pmx_mode photo_frame_mode = {
56 .id = PHOTO_FRAME_MODE,
57 .name = "photo frame mode",
58 .mask = 0x02,
59};
60
61struct pmx_mode lend_ip_phone_mode = {
62 .id = LEND_IP_PHONE_MODE,
63 .name = "lend ip phone mode",
64 .mask = 0x03,
65};
66
67struct pmx_mode hend_ip_phone_mode = {
68 .id = HEND_IP_PHONE_MODE,
69 .name = "hend ip phone mode",
70 .mask = 0x04,
71};
72
73struct pmx_mode lend_wifi_phone_mode = {
74 .id = LEND_WIFI_PHONE_MODE,
75 .name = "lend wifi phone mode",
76 .mask = 0x05,
77};
78
79struct pmx_mode hend_wifi_phone_mode = {
80 .id = HEND_WIFI_PHONE_MODE,
81 .name = "hend wifi phone mode",
82 .mask = 0x06,
83};
84
85struct pmx_mode ata_pabx_wi2s_mode = {
86 .id = ATA_PABX_WI2S_MODE,
87 .name = "ata pabx wi2s mode",
88 .mask = 0x07,
89};
90
91struct pmx_mode ata_pabx_i2s_mode = {
92 .id = ATA_PABX_I2S_MODE,
93 .name = "ata pabx i2s mode",
94 .mask = 0x08,
95};
96
97struct pmx_mode caml_lcdw_mode = {
98 .id = CAML_LCDW_MODE,
99 .name = "caml lcdw mode",
100 .mask = 0x0C,
101};
102
103struct pmx_mode camu_lcd_mode = {
104 .id = CAMU_LCD_MODE,
105 .name = "camu lcd mode",
106 .mask = 0x0D,
107};
108
109struct pmx_mode camu_wlcd_mode = {
110 .id = CAMU_WLCD_MODE,
111 .name = "camu wlcd mode",
112 .mask = 0x0E,
113};
114
115struct pmx_mode caml_lcd_mode = {
116 .id = CAML_LCD_MODE,
117 .name = "caml lcd mode",
118 .mask = 0x0F,
119};
120
121/* devices */
122struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
123 {
124 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
125 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
126 .mask = PMX_FIRDA_MASK,
127 },
128};
129
130struct pmx_dev pmx_fsmc_2_chips = {
131 .name = "fsmc_2_chips",
132 .modes = pmx_fsmc_2_chips_modes,
133 .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
134 .enb_on_reset = 1,
135};
136
137struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
138 {
139 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
140 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
141 .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
142 },
143};
144
145struct pmx_dev pmx_fsmc_4_chips = {
146 .name = "fsmc_4_chips",
147 .modes = pmx_fsmc_4_chips_modes,
148 .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
149 .enb_on_reset = 1,
150};
151
152struct pmx_dev_mode pmx_keyboard_modes[] = {
153 {
154 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
155 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
156 CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
157 CAML_LCD_MODE,
158 .mask = 0x0,
159 },
160};
161
162struct pmx_dev pmx_keyboard = {
163 .name = "keyboard",
164 .modes = pmx_keyboard_modes,
165 .mode_count = ARRAY_SIZE(pmx_keyboard_modes),
166 .enb_on_reset = 1,
167};
168
169struct pmx_dev_mode pmx_clcd_modes[] = {
170 {
171 .ids = PHOTO_FRAME_MODE,
172 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
173 }, {
174 .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
175 CAMU_LCD_MODE | CAML_LCD_MODE,
176 .mask = PMX_TIMER_3_4_MASK,
177 },
178};
179
180struct pmx_dev pmx_clcd = {
181 .name = "clcd",
182 .modes = pmx_clcd_modes,
183 .mode_count = ARRAY_SIZE(pmx_clcd_modes),
184 .enb_on_reset = 1,
185};
186
187struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
188 {
189 .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
190 .mask = PMX_MII_MASK,
191 }, {
192 .ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
193 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
194 }, {
195 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
196 .mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
197 }, {
198 .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
199 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
200 }, {
201 .ids = ATA_PABX_WI2S_MODE,
202 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
203 | PMX_UART0_MODEM_MASK,
204 },
205};
206
207struct pmx_dev pmx_telecom_gpio = {
208 .name = "telecom_gpio",
209 .modes = pmx_telecom_gpio_modes,
210 .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
211 .enb_on_reset = 1,
212};
213
214struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
215 {
216 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
217 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
218 | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
219 | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
220 | CAMU_WLCD_MODE | CAML_LCD_MODE,
221 .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
222 },
223};
224
225struct pmx_dev pmx_telecom_tdm = {
226 .name = "telecom_tdm",
227 .modes = pmx_telecom_tdm_modes,
228 .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
229 .enb_on_reset = 1,
230};
231
232struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
233 {
234 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
235 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
236 | ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
237 CAML_LCDW_MODE | CAML_LCD_MODE,
238 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
239 },
240};
241
242struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {
243 .name = "telecom_spi_cs_i2c_clk",
244 .modes = pmx_telecom_spi_cs_i2c_clk_modes,
245 .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
246 .enb_on_reset = 1,
247};
248
249struct pmx_dev_mode pmx_telecom_camera_modes[] = {
250 {
251 .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
252 .mask = PMX_MII_MASK,
253 }, {
254 .ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
255 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
256 },
257};
258
259struct pmx_dev pmx_telecom_camera = {
260 .name = "telecom_camera",
261 .modes = pmx_telecom_camera_modes,
262 .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
263 .enb_on_reset = 1,
264};
265
266struct pmx_dev_mode pmx_telecom_dac_modes[] = {
267 {
268 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
269 | CAMU_WLCD_MODE | CAML_LCD_MODE,
270 .mask = PMX_TIMER_1_2_MASK,
271 },
272};
273
274struct pmx_dev pmx_telecom_dac = {
275 .name = "telecom_dac",
276 .modes = pmx_telecom_dac_modes,
277 .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
278 .enb_on_reset = 1,
279};
280
281struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
282 {
283 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
284 | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
285 ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
286 | CAMU_WLCD_MODE | CAML_LCD_MODE,
287 .mask = PMX_UART0_MODEM_MASK,
288 },
289};
290
291struct pmx_dev pmx_telecom_i2s = {
292 .name = "telecom_i2s",
293 .modes = pmx_telecom_i2s_modes,
294 .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
295 .enb_on_reset = 1,
296};
297
298struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
299 {
300 .ids = NAND_MODE | NOR_MODE,
301 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
302 PMX_TIMER_3_4_MASK,
303 },
304};
305
306struct pmx_dev pmx_telecom_boot_pins = {
307 .name = "telecom_boot_pins",
308 .modes = pmx_telecom_boot_pins_modes,
309 .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
310 .enb_on_reset = 1,
311};
312
313struct pmx_dev_mode pmx_telecom_sdio_4bit_modes[] = {
314 {
315 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
316 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
317 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
318 CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
319 ATA_PABX_I2S_MODE,
320 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
321 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
322 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
323 },
324};
325
326struct pmx_dev pmx_telecom_sdio_4bit = {
327 .name = "telecom_sdio_4bit",
328 .modes = pmx_telecom_sdio_4bit_modes,
329 .mode_count = ARRAY_SIZE(pmx_telecom_sdio_4bit_modes),
330 .enb_on_reset = 1,
331};
332
333struct pmx_dev_mode pmx_telecom_sdio_8bit_modes[] = {
334 {
335 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
336 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
337 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
338 CAMU_WLCD_MODE | CAML_LCD_MODE,
339 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
340 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
341 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
342 },
343};
344
345struct pmx_dev pmx_telecom_sdio_8bit = {
346 .name = "telecom_sdio_8bit",
347 .modes = pmx_telecom_sdio_8bit_modes,
348 .mode_count = ARRAY_SIZE(pmx_telecom_sdio_8bit_modes),
349 .enb_on_reset = 1,
350};
351
352struct pmx_dev_mode pmx_gpio1_modes[] = {
353 {
354 .ids = PHOTO_FRAME_MODE,
355 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
356 PMX_TIMER_3_4_MASK,
357 },
358};
359
360struct pmx_dev pmx_gpio1 = {
361 .name = "arm gpio1",
362 .modes = pmx_gpio1_modes,
363 .mode_count = ARRAY_SIZE(pmx_gpio1_modes),
364 .enb_on_reset = 1,
365};
366
367/* pmx driver structure */
368struct pmx_driver pmx_driver = {
369 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
370 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
371};
372
373/* Add spear300 specific devices here */
374/* arm gpio1 device registeration */
375static struct pl061_platform_data gpio1_plat_data = {
376 .gpio_base = 8,
377 .irq_base = SPEAR_GPIO1_INT_BASE,
378};
379
380struct amba_device gpio1_device = {
381 .dev = {
382 .init_name = "gpio1",
383 .platform_data = &gpio1_plat_data,
384 },
385 .res = {
386 .start = SPEAR300_GPIO_BASE,
387 .end = SPEAR300_GPIO_BASE + SPEAR300_GPIO_SIZE - 1,
388 .flags = IORESOURCE_MEM,
389 },
390 .irq = {VIRQ_GPIO1, NO_IRQ},
391};
392
393/* spear3xx shared irq */
394struct shirq_dev_config shirq_ras1_config[] = {
395 {
396 .virq = VIRQ_IT_PERS_S,
397 .enb_mask = IT_PERS_S_IRQ_MASK,
398 .status_mask = IT_PERS_S_IRQ_MASK,
399 }, {
400 .virq = VIRQ_IT_CHANGE_S,
401 .enb_mask = IT_CHANGE_S_IRQ_MASK,
402 .status_mask = IT_CHANGE_S_IRQ_MASK,
403 }, {
404 .virq = VIRQ_I2S,
405 .enb_mask = I2S_IRQ_MASK,
406 .status_mask = I2S_IRQ_MASK,
407 }, {
408 .virq = VIRQ_TDM,
409 .enb_mask = TDM_IRQ_MASK,
410 .status_mask = TDM_IRQ_MASK,
411 }, {
412 .virq = VIRQ_CAMERA_L,
413 .enb_mask = CAMERA_L_IRQ_MASK,
414 .status_mask = CAMERA_L_IRQ_MASK,
415 }, {
416 .virq = VIRQ_CAMERA_F,
417 .enb_mask = CAMERA_F_IRQ_MASK,
418 .status_mask = CAMERA_F_IRQ_MASK,
419 }, {
420 .virq = VIRQ_CAMERA_V,
421 .enb_mask = CAMERA_V_IRQ_MASK,
422 .status_mask = CAMERA_V_IRQ_MASK,
423 }, {
424 .virq = VIRQ_KEYBOARD,
425 .enb_mask = KEYBOARD_IRQ_MASK,
426 .status_mask = KEYBOARD_IRQ_MASK,
427 }, {
428 .virq = VIRQ_GPIO1,
429 .enb_mask = GPIO1_IRQ_MASK,
430 .status_mask = GPIO1_IRQ_MASK,
431 },
432};
433
434struct spear_shirq shirq_ras1 = {
435 .irq = IRQ_GEN_RAS_1,
436 .dev_config = shirq_ras1_config,
437 .dev_count = ARRAY_SIZE(shirq_ras1_config),
438 .regs = {
439 .enb_reg = INT_ENB_MASK_REG,
440 .status_reg = INT_STS_MASK_REG,
441 .status_reg_mask = SHIRQ_RAS1_MASK,
442 .clear_reg = -1,
443 },
444};
445
446/* spear300 routines */
447void __init spear300_init(void)
448{
449 int ret = 0;
450
451 /* call spear3xx family common init function */
452 spear3xx_init();
453
454 /* shared irq registeration */
455 shirq_ras1.regs.base =
456 ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE);
457 if (shirq_ras1.regs.base) {
458 ret = spear_shirq_register(&shirq_ras1);
459 if (ret)
460 printk(KERN_ERR "Error registering Shared IRQ\n");
461 }
462}
463
464void spear300_pmx_init(void)
465{
466 spear_pmx_init(&pmx_driver, SPEAR300_SOC_CONFIG_BASE,
467 SPEAR300_SOC_CONFIG_SIZE);
468}
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
new file mode 100644
index 000000000000..bb21db152a23
--- /dev/null
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -0,0 +1,77 @@
1/*
2 * arch/arm/mach-spear3xx/spear300_evb.c
3 *
4 * SPEAr300 evaluation board source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <asm/mach/arch.h>
15#include <asm/mach-types.h>
16#include <mach/generic.h>
17#include <mach/spear.h>
18
19/* padmux devices to enable */
20static struct pmx_dev *pmx_devs[] = {
21 /* spear3xx specific devices */
22 &pmx_i2c,
23 &pmx_ssp_cs,
24 &pmx_ssp,
25 &pmx_mii,
26 &pmx_uart0,
27
28 /* spear300 specific devices */
29 &pmx_fsmc_2_chips,
30 &pmx_clcd,
31 &pmx_telecom_sdio_4bit,
32 &pmx_gpio1,
33};
34
35static struct amba_device *amba_devs[] __initdata = {
36 /* spear3xx specific devices */
37 &gpio_device,
38 &uart_device,
39
40 /* spear300 specific devices */
41 &gpio1_device,
42};
43
44static struct platform_device *plat_devs[] __initdata = {
45 /* spear3xx specific devices */
46
47 /* spear300 specific devices */
48};
49
50static void __init spear300_evb_init(void)
51{
52 unsigned int i;
53
54 /* call spear300 machine init function */
55 spear300_init();
56
57 /* padmux initialization */
58 pmx_driver.mode = &photo_frame_mode;
59 pmx_driver.devs = pmx_devs;
60 pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
61 spear300_pmx_init();
62
63 /* Add Platform Devices */
64 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
65
66 /* Add Amba Devices */
67 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
68 amba_device_register(amba_devs[i], &iomem_resource);
69}
70
71MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
72 .boot_params = 0x00000100,
73 .map_io = spear3xx_map_io,
74 .init_irq = spear3xx_init_irq,
75 .timer = &spear_sys_timer,
76 .init_machine = spear300_evb_init,
77MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
new file mode 100644
index 000000000000..96a1ab824bac
--- /dev/null
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -0,0 +1,302 @@
1/*
2 * arch/arm/mach-spear3xx/spear310.c
3 *
4 * SPEAr310 machine source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/ptrace.h>
15#include <asm/irq.h>
16#include <mach/generic.h>
17#include <mach/spear.h>
18#include <plat/shirq.h>
19
20/* pad multiplexing support */
21/* muxing registers */
22#define PAD_MUX_CONFIG_REG 0x08
23
24/* devices */
25struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
26 {
27 .ids = 0x00,
28 .mask = PMX_TIMER_3_4_MASK,
29 },
30};
31
32struct pmx_dev pmx_emi_cs_0_1_4_5 = {
33 .name = "emi_cs_0_1_4_5",
34 .modes = pmx_emi_cs_0_1_4_5_modes,
35 .mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),
36 .enb_on_reset = 1,
37};
38
39struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
40 {
41 .ids = 0x00,
42 .mask = PMX_TIMER_1_2_MASK,
43 },
44};
45
46struct pmx_dev pmx_emi_cs_2_3 = {
47 .name = "emi_cs_2_3",
48 .modes = pmx_emi_cs_2_3_modes,
49 .mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),
50 .enb_on_reset = 1,
51};
52
53struct pmx_dev_mode pmx_uart1_modes[] = {
54 {
55 .ids = 0x00,
56 .mask = PMX_FIRDA_MASK,
57 },
58};
59
60struct pmx_dev pmx_uart1 = {
61 .name = "uart1",
62 .modes = pmx_uart1_modes,
63 .mode_count = ARRAY_SIZE(pmx_uart1_modes),
64 .enb_on_reset = 1,
65};
66
67struct pmx_dev_mode pmx_uart2_modes[] = {
68 {
69 .ids = 0x00,
70 .mask = PMX_TIMER_1_2_MASK,
71 },
72};
73
74struct pmx_dev pmx_uart2 = {
75 .name = "uart2",
76 .modes = pmx_uart2_modes,
77 .mode_count = ARRAY_SIZE(pmx_uart2_modes),
78 .enb_on_reset = 1,
79};
80
81struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
82 {
83 .ids = 0x00,
84 .mask = PMX_UART0_MODEM_MASK,
85 },
86};
87
88struct pmx_dev pmx_uart3_4_5 = {
89 .name = "uart3_4_5",
90 .modes = pmx_uart3_4_5_modes,
91 .mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),
92 .enb_on_reset = 1,
93};
94
95struct pmx_dev_mode pmx_fsmc_modes[] = {
96 {
97 .ids = 0x00,
98 .mask = PMX_SSP_CS_MASK,
99 },
100};
101
102struct pmx_dev pmx_fsmc = {
103 .name = "fsmc",
104 .modes = pmx_fsmc_modes,
105 .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
106 .enb_on_reset = 1,
107};
108
109struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
110 {
111 .ids = 0x00,
112 .mask = PMX_MII_MASK,
113 },
114};
115
116struct pmx_dev pmx_rs485_0_1 = {
117 .name = "rs485_0_1",
118 .modes = pmx_rs485_0_1_modes,
119 .mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),
120 .enb_on_reset = 1,
121};
122
123struct pmx_dev_mode pmx_tdm0_modes[] = {
124 {
125 .ids = 0x00,
126 .mask = PMX_MII_MASK,
127 },
128};
129
130struct pmx_dev pmx_tdm0 = {
131 .name = "tdm0",
132 .modes = pmx_tdm0_modes,
133 .mode_count = ARRAY_SIZE(pmx_tdm0_modes),
134 .enb_on_reset = 1,
135};
136
137/* pmx driver structure */
138struct pmx_driver pmx_driver = {
139 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
140};
141
142/* Add spear310 specific devices here */
143
144/* spear3xx shared irq */
145struct shirq_dev_config shirq_ras1_config[] = {
146 {
147 .virq = VIRQ_SMII0,
148 .status_mask = SMII0_IRQ_MASK,
149 }, {
150 .virq = VIRQ_SMII1,
151 .status_mask = SMII1_IRQ_MASK,
152 }, {
153 .virq = VIRQ_SMII2,
154 .status_mask = SMII2_IRQ_MASK,
155 }, {
156 .virq = VIRQ_SMII3,
157 .status_mask = SMII3_IRQ_MASK,
158 }, {
159 .virq = VIRQ_WAKEUP_SMII0,
160 .status_mask = WAKEUP_SMII0_IRQ_MASK,
161 }, {
162 .virq = VIRQ_WAKEUP_SMII1,
163 .status_mask = WAKEUP_SMII1_IRQ_MASK,
164 }, {
165 .virq = VIRQ_WAKEUP_SMII2,
166 .status_mask = WAKEUP_SMII2_IRQ_MASK,
167 }, {
168 .virq = VIRQ_WAKEUP_SMII3,
169 .status_mask = WAKEUP_SMII3_IRQ_MASK,
170 },
171};
172
173struct spear_shirq shirq_ras1 = {
174 .irq = IRQ_GEN_RAS_1,
175 .dev_config = shirq_ras1_config,
176 .dev_count = ARRAY_SIZE(shirq_ras1_config),
177 .regs = {
178 .enb_reg = -1,
179 .status_reg = INT_STS_MASK_REG,
180 .status_reg_mask = SHIRQ_RAS1_MASK,
181 .clear_reg = -1,
182 },
183};
184
185struct shirq_dev_config shirq_ras2_config[] = {
186 {
187 .virq = VIRQ_UART1,
188 .status_mask = UART1_IRQ_MASK,
189 }, {
190 .virq = VIRQ_UART2,
191 .status_mask = UART2_IRQ_MASK,
192 }, {
193 .virq = VIRQ_UART3,
194 .status_mask = UART3_IRQ_MASK,
195 }, {
196 .virq = VIRQ_UART4,
197 .status_mask = UART4_IRQ_MASK,
198 }, {
199 .virq = VIRQ_UART5,
200 .status_mask = UART5_IRQ_MASK,
201 },
202};
203
204struct spear_shirq shirq_ras2 = {
205 .irq = IRQ_GEN_RAS_2,
206 .dev_config = shirq_ras2_config,
207 .dev_count = ARRAY_SIZE(shirq_ras2_config),
208 .regs = {
209 .enb_reg = -1,
210 .status_reg = INT_STS_MASK_REG,
211 .status_reg_mask = SHIRQ_RAS2_MASK,
212 .clear_reg = -1,
213 },
214};
215
216struct shirq_dev_config shirq_ras3_config[] = {
217 {
218 .virq = VIRQ_EMI,
219 .status_mask = EMI_IRQ_MASK,
220 },
221};
222
223struct spear_shirq shirq_ras3 = {
224 .irq = IRQ_GEN_RAS_3,
225 .dev_config = shirq_ras3_config,
226 .dev_count = ARRAY_SIZE(shirq_ras3_config),
227 .regs = {
228 .enb_reg = -1,
229 .status_reg = INT_STS_MASK_REG,
230 .status_reg_mask = SHIRQ_RAS3_MASK,
231 .clear_reg = -1,
232 },
233};
234
235struct shirq_dev_config shirq_intrcomm_ras_config[] = {
236 {
237 .virq = VIRQ_TDM_HDLC,
238 .status_mask = TDM_HDLC_IRQ_MASK,
239 }, {
240 .virq = VIRQ_RS485_0,
241 .status_mask = RS485_0_IRQ_MASK,
242 }, {
243 .virq = VIRQ_RS485_1,
244 .status_mask = RS485_1_IRQ_MASK,
245 },
246};
247
248struct spear_shirq shirq_intrcomm_ras = {
249 .irq = IRQ_INTRCOMM_RAS_ARM,
250 .dev_config = shirq_intrcomm_ras_config,
251 .dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
252 .regs = {
253 .enb_reg = -1,
254 .status_reg = INT_STS_MASK_REG,
255 .status_reg_mask = SHIRQ_INTRCOMM_RAS_MASK,
256 .clear_reg = -1,
257 },
258};
259
260/* spear310 routines */
261void __init spear310_init(void)
262{
263 void __iomem *base;
264 int ret = 0;
265
266 /* call spear3xx family common init function */
267 spear3xx_init();
268
269 /* shared irq registeration */
270 base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE);
271 if (base) {
272 /* shirq 1 */
273 shirq_ras1.regs.base = base;
274 ret = spear_shirq_register(&shirq_ras1);
275 if (ret)
276 printk(KERN_ERR "Error registering Shared IRQ 1\n");
277
278 /* shirq 2 */
279 shirq_ras2.regs.base = base;
280 ret = spear_shirq_register(&shirq_ras2);
281 if (ret)
282 printk(KERN_ERR "Error registering Shared IRQ 2\n");
283
284 /* shirq 3 */
285 shirq_ras3.regs.base = base;
286 ret = spear_shirq_register(&shirq_ras3);
287 if (ret)
288 printk(KERN_ERR "Error registering Shared IRQ 3\n");
289
290 /* shirq 4 */
291 shirq_intrcomm_ras.regs.base = base;
292 ret = spear_shirq_register(&shirq_intrcomm_ras);
293 if (ret)
294 printk(KERN_ERR "Error registering Shared IRQ 4\n");
295 }
296}
297
298void spear310_pmx_init(void)
299{
300 spear_pmx_init(&pmx_driver, SPEAR310_SOC_CONFIG_BASE,
301 SPEAR310_SOC_CONFIG_SIZE);
302}
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
new file mode 100644
index 000000000000..7facf6643199
--- /dev/null
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -0,0 +1,84 @@
1/*
2 * arch/arm/mach-spear3xx/spear310_evb.c
3 *
4 * SPEAr310 evaluation board source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <asm/mach/arch.h>
15#include <asm/mach-types.h>
16#include <mach/generic.h>
17#include <mach/spear.h>
18
19/* padmux devices to enable */
20static struct pmx_dev *pmx_devs[] = {
21 /* spear3xx specific devices */
22 &pmx_i2c,
23 &pmx_ssp,
24 &pmx_gpio_pin0,
25 &pmx_gpio_pin1,
26 &pmx_gpio_pin2,
27 &pmx_gpio_pin3,
28 &pmx_gpio_pin4,
29 &pmx_gpio_pin5,
30 &pmx_uart0,
31
32 /* spear310 specific devices */
33 &pmx_emi_cs_0_1_4_5,
34 &pmx_emi_cs_2_3,
35 &pmx_uart1,
36 &pmx_uart2,
37 &pmx_uart3_4_5,
38 &pmx_fsmc,
39 &pmx_rs485_0_1,
40 &pmx_tdm0,
41};
42
43static struct amba_device *amba_devs[] __initdata = {
44 /* spear3xx specific devices */
45 &gpio_device,
46 &uart_device,
47
48 /* spear310 specific devices */
49};
50
51static struct platform_device *plat_devs[] __initdata = {
52 /* spear3xx specific devices */
53
54 /* spear310 specific devices */
55};
56
57static void __init spear310_evb_init(void)
58{
59 unsigned int i;
60
61 /* call spear310 machine init function */
62 spear310_init();
63
64 /* padmux initialization */
65 pmx_driver.mode = NULL;
66 pmx_driver.devs = pmx_devs;
67 pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
68 spear310_pmx_init();
69
70 /* Add Platform Devices */
71 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
72
73 /* Add Amba Devices */
74 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
75 amba_device_register(amba_devs[i], &iomem_resource);
76}
77
78MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
79 .boot_params = 0x00000100,
80 .map_io = spear3xx_map_io,
81 .init_irq = spear3xx_init_irq,
82 .timer = &spear_sys_timer,
83 .init_machine = spear310_evb_init,
84MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
new file mode 100644
index 000000000000..6a1219549369
--- /dev/null
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -0,0 +1,549 @@
1/*
2 * arch/arm/mach-spear3xx/spear320.c
3 *
4 * SPEAr320 machine source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/ptrace.h>
15#include <asm/irq.h>
16#include <mach/generic.h>
17#include <mach/spear.h>
18#include <plat/shirq.h>
19
20/* pad multiplexing support */
21/* muxing registers */
22#define PAD_MUX_CONFIG_REG 0x0C
23#define MODE_CONFIG_REG 0x10
24
25/* modes */
26#define AUTO_NET_SMII_MODE (1 << 0)
27#define AUTO_NET_MII_MODE (1 << 1)
28#define AUTO_EXP_MODE (1 << 2)
29#define SMALL_PRINTERS_MODE (1 << 3)
30#define ALL_MODES 0xF
31
32struct pmx_mode auto_net_smii_mode = {
33 .id = AUTO_NET_SMII_MODE,
34 .name = "Automation Networking SMII Mode",
35 .mask = 0x00,
36};
37
38struct pmx_mode auto_net_mii_mode = {
39 .id = AUTO_NET_MII_MODE,
40 .name = "Automation Networking MII Mode",
41 .mask = 0x01,
42};
43
44struct pmx_mode auto_exp_mode = {
45 .id = AUTO_EXP_MODE,
46 .name = "Automation Expanded Mode",
47 .mask = 0x02,
48};
49
50struct pmx_mode small_printers_mode = {
51 .id = SMALL_PRINTERS_MODE,
52 .name = "Small Printers Mode",
53 .mask = 0x03,
54};
55
56/* devices */
57struct pmx_dev_mode pmx_clcd_modes[] = {
58 {
59 .ids = AUTO_NET_SMII_MODE,
60 .mask = 0x0,
61 },
62};
63
64struct pmx_dev pmx_clcd = {
65 .name = "clcd",
66 .modes = pmx_clcd_modes,
67 .mode_count = ARRAY_SIZE(pmx_clcd_modes),
68 .enb_on_reset = 1,
69};
70
71struct pmx_dev_mode pmx_emi_modes[] = {
72 {
73 .ids = AUTO_EXP_MODE,
74 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
75 },
76};
77
78struct pmx_dev pmx_emi = {
79 .name = "emi",
80 .modes = pmx_emi_modes,
81 .mode_count = ARRAY_SIZE(pmx_emi_modes),
82 .enb_on_reset = 1,
83};
84
85struct pmx_dev_mode pmx_fsmc_modes[] = {
86 {
87 .ids = ALL_MODES,
88 .mask = 0x0,
89 },
90};
91
92struct pmx_dev pmx_fsmc = {
93 .name = "fsmc",
94 .modes = pmx_fsmc_modes,
95 .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
96 .enb_on_reset = 1,
97};
98
99struct pmx_dev_mode pmx_spp_modes[] = {
100 {
101 .ids = SMALL_PRINTERS_MODE,
102 .mask = 0x0,
103 },
104};
105
106struct pmx_dev pmx_spp = {
107 .name = "spp",
108 .modes = pmx_spp_modes,
109 .mode_count = ARRAY_SIZE(pmx_spp_modes),
110 .enb_on_reset = 1,
111};
112
113struct pmx_dev_mode pmx_sdio_modes[] = {
114 {
115 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |
116 SMALL_PRINTERS_MODE,
117 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
118 },
119};
120
121struct pmx_dev pmx_sdio = {
122 .name = "sdio",
123 .modes = pmx_sdio_modes,
124 .mode_count = ARRAY_SIZE(pmx_sdio_modes),
125 .enb_on_reset = 1,
126};
127
128struct pmx_dev_mode pmx_i2s_modes[] = {
129 {
130 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
131 .mask = PMX_UART0_MODEM_MASK,
132 },
133};
134
135struct pmx_dev pmx_i2s = {
136 .name = "i2s",
137 .modes = pmx_i2s_modes,
138 .mode_count = ARRAY_SIZE(pmx_i2s_modes),
139 .enb_on_reset = 1,
140};
141
142struct pmx_dev_mode pmx_uart1_modes[] = {
143 {
144 .ids = ALL_MODES,
145 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,
146 },
147};
148
149struct pmx_dev pmx_uart1 = {
150 .name = "uart1",
151 .modes = pmx_uart1_modes,
152 .mode_count = ARRAY_SIZE(pmx_uart1_modes),
153 .enb_on_reset = 1,
154};
155
156struct pmx_dev_mode pmx_uart1_modem_modes[] = {
157 {
158 .ids = AUTO_EXP_MODE,
159 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK |
160 PMX_SSP_CS_MASK,
161 }, {
162 .ids = SMALL_PRINTERS_MODE,
163 .mask = PMX_GPIO_PIN3_MASK | PMX_GPIO_PIN4_MASK |
164 PMX_GPIO_PIN5_MASK | PMX_SSP_CS_MASK,
165 },
166};
167
168struct pmx_dev pmx_uart1_modem = {
169 .name = "uart1_modem",
170 .modes = pmx_uart1_modem_modes,
171 .mode_count = ARRAY_SIZE(pmx_uart1_modem_modes),
172 .enb_on_reset = 1,
173};
174
175struct pmx_dev_mode pmx_uart2_modes[] = {
176 {
177 .ids = ALL_MODES,
178 .mask = PMX_FIRDA_MASK,
179 },
180};
181
182struct pmx_dev pmx_uart2 = {
183 .name = "uart2",
184 .modes = pmx_uart2_modes,
185 .mode_count = ARRAY_SIZE(pmx_uart2_modes),
186 .enb_on_reset = 1,
187};
188
189struct pmx_dev_mode pmx_touchscreen_modes[] = {
190 {
191 .ids = AUTO_NET_SMII_MODE,
192 .mask = PMX_SSP_CS_MASK,
193 },
194};
195
196struct pmx_dev pmx_touchscreen = {
197 .name = "touchscreen",
198 .modes = pmx_touchscreen_modes,
199 .mode_count = ARRAY_SIZE(pmx_touchscreen_modes),
200 .enb_on_reset = 1,
201};
202
203struct pmx_dev_mode pmx_can_modes[] = {
204 {
205 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,
206 .mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
207 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
208 },
209};
210
211struct pmx_dev pmx_can = {
212 .name = "can",
213 .modes = pmx_can_modes,
214 .mode_count = ARRAY_SIZE(pmx_can_modes),
215 .enb_on_reset = 1,
216};
217
218struct pmx_dev_mode pmx_sdio_led_modes[] = {
219 {
220 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
221 .mask = PMX_SSP_CS_MASK,
222 },
223};
224
225struct pmx_dev pmx_sdio_led = {
226 .name = "sdio_led",
227 .modes = pmx_sdio_led_modes,
228 .mode_count = ARRAY_SIZE(pmx_sdio_led_modes),
229 .enb_on_reset = 1,
230};
231
232struct pmx_dev_mode pmx_pwm0_modes[] = {
233 {
234 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
235 .mask = PMX_UART0_MODEM_MASK,
236 }, {
237 .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
238 .mask = PMX_MII_MASK,
239 },
240};
241
242struct pmx_dev pmx_pwm0 = {
243 .name = "pwm0",
244 .modes = pmx_pwm0_modes,
245 .mode_count = ARRAY_SIZE(pmx_pwm0_modes),
246 .enb_on_reset = 1,
247};
248
249struct pmx_dev_mode pmx_pwm1_modes[] = {
250 {
251 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
252 .mask = PMX_UART0_MODEM_MASK,
253 }, {
254 .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
255 .mask = PMX_MII_MASK,
256 },
257};
258
259struct pmx_dev pmx_pwm1 = {
260 .name = "pwm1",
261 .modes = pmx_pwm1_modes,
262 .mode_count = ARRAY_SIZE(pmx_pwm1_modes),
263 .enb_on_reset = 1,
264};
265
266struct pmx_dev_mode pmx_pwm2_modes[] = {
267 {
268 .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
269 .mask = PMX_SSP_CS_MASK,
270 }, {
271 .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
272 .mask = PMX_MII_MASK,
273 },
274};
275
276struct pmx_dev pmx_pwm2 = {
277 .name = "pwm2",
278 .modes = pmx_pwm2_modes,
279 .mode_count = ARRAY_SIZE(pmx_pwm2_modes),
280 .enb_on_reset = 1,
281};
282
283struct pmx_dev_mode pmx_pwm3_modes[] = {
284 {
285 .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
286 .mask = PMX_MII_MASK,
287 },
288};
289
290struct pmx_dev pmx_pwm3 = {
291 .name = "pwm3",
292 .modes = pmx_pwm3_modes,
293 .mode_count = ARRAY_SIZE(pmx_pwm3_modes),
294 .enb_on_reset = 1,
295};
296
297struct pmx_dev_mode pmx_ssp1_modes[] = {
298 {
299 .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
300 .mask = PMX_MII_MASK,
301 },
302};
303
304struct pmx_dev pmx_ssp1 = {
305 .name = "ssp1",
306 .modes = pmx_ssp1_modes,
307 .mode_count = ARRAY_SIZE(pmx_ssp1_modes),
308 .enb_on_reset = 1,
309};
310
311struct pmx_dev_mode pmx_ssp2_modes[] = {
312 {
313 .ids = AUTO_NET_SMII_MODE,
314 .mask = PMX_MII_MASK,
315 },
316};
317
318struct pmx_dev pmx_ssp2 = {
319 .name = "ssp2",
320 .modes = pmx_ssp2_modes,
321 .mode_count = ARRAY_SIZE(pmx_ssp2_modes),
322 .enb_on_reset = 1,
323};
324
325struct pmx_dev_mode pmx_mii1_modes[] = {
326 {
327 .ids = AUTO_NET_MII_MODE,
328 .mask = 0x0,
329 },
330};
331
332struct pmx_dev pmx_mii1 = {
333 .name = "mii1",
334 .modes = pmx_mii1_modes,
335 .mode_count = ARRAY_SIZE(pmx_mii1_modes),
336 .enb_on_reset = 1,
337};
338
339struct pmx_dev_mode pmx_smii0_modes[] = {
340 {
341 .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
342 .mask = PMX_MII_MASK,
343 },
344};
345
346struct pmx_dev pmx_smii0 = {
347 .name = "smii0",
348 .modes = pmx_smii0_modes,
349 .mode_count = ARRAY_SIZE(pmx_smii0_modes),
350 .enb_on_reset = 1,
351};
352
353struct pmx_dev_mode pmx_smii1_modes[] = {
354 {
355 .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,
356 .mask = PMX_MII_MASK,
357 },
358};
359
360struct pmx_dev pmx_smii1 = {
361 .name = "smii1",
362 .modes = pmx_smii1_modes,
363 .mode_count = ARRAY_SIZE(pmx_smii1_modes),
364 .enb_on_reset = 1,
365};
366
367struct pmx_dev_mode pmx_i2c1_modes[] = {
368 {
369 .ids = AUTO_EXP_MODE,
370 .mask = 0x0,
371 },
372};
373
374struct pmx_dev pmx_i2c1 = {
375 .name = "i2c1",
376 .modes = pmx_i2c1_modes,
377 .mode_count = ARRAY_SIZE(pmx_i2c1_modes),
378 .enb_on_reset = 1,
379};
380
381/* pmx driver structure */
382struct pmx_driver pmx_driver = {
383 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007},
384 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
385};
386
387/* Add spear320 specific devices here */
388
389/* spear3xx shared irq */
390struct shirq_dev_config shirq_ras1_config[] = {
391 {
392 .virq = VIRQ_EMI,
393 .status_mask = EMI_IRQ_MASK,
394 .clear_mask = EMI_IRQ_MASK,
395 }, {
396 .virq = VIRQ_CLCD,
397 .status_mask = CLCD_IRQ_MASK,
398 .clear_mask = CLCD_IRQ_MASK,
399 }, {
400 .virq = VIRQ_SPP,
401 .status_mask = SPP_IRQ_MASK,
402 .clear_mask = SPP_IRQ_MASK,
403 },
404};
405
406struct spear_shirq shirq_ras1 = {
407 .irq = IRQ_GEN_RAS_1,
408 .dev_config = shirq_ras1_config,
409 .dev_count = ARRAY_SIZE(shirq_ras1_config),
410 .regs = {
411 .enb_reg = -1,
412 .status_reg = INT_STS_MASK_REG,
413 .status_reg_mask = SHIRQ_RAS1_MASK,
414 .clear_reg = INT_CLR_MASK_REG,
415 .reset_to_clear = 1,
416 },
417};
418
419struct shirq_dev_config shirq_ras3_config[] = {
420 {
421 .virq = VIRQ_PLGPIO,
422 .enb_mask = GPIO_IRQ_MASK,
423 .status_mask = GPIO_IRQ_MASK,
424 .clear_mask = GPIO_IRQ_MASK,
425 }, {
426 .virq = VIRQ_I2S_PLAY,
427 .enb_mask = I2S_PLAY_IRQ_MASK,
428 .status_mask = I2S_PLAY_IRQ_MASK,
429 .clear_mask = I2S_PLAY_IRQ_MASK,
430 }, {
431 .virq = VIRQ_I2S_REC,
432 .enb_mask = I2S_REC_IRQ_MASK,
433 .status_mask = I2S_REC_IRQ_MASK,
434 .clear_mask = I2S_REC_IRQ_MASK,
435 },
436};
437
438struct spear_shirq shirq_ras3 = {
439 .irq = IRQ_GEN_RAS_3,
440 .dev_config = shirq_ras3_config,
441 .dev_count = ARRAY_SIZE(shirq_ras3_config),
442 .regs = {
443 .enb_reg = INT_ENB_MASK_REG,
444 .reset_to_enb = 1,
445 .status_reg = INT_STS_MASK_REG,
446 .status_reg_mask = SHIRQ_RAS3_MASK,
447 .clear_reg = INT_CLR_MASK_REG,
448 .reset_to_clear = 1,
449 },
450};
451
452struct shirq_dev_config shirq_intrcomm_ras_config[] = {
453 {
454 .virq = VIRQ_CANU,
455 .status_mask = CAN_U_IRQ_MASK,
456 .clear_mask = CAN_U_IRQ_MASK,
457 }, {
458 .virq = VIRQ_CANL,
459 .status_mask = CAN_L_IRQ_MASK,
460 .clear_mask = CAN_L_IRQ_MASK,
461 }, {
462 .virq = VIRQ_UART1,
463 .status_mask = UART1_IRQ_MASK,
464 .clear_mask = UART1_IRQ_MASK,
465 }, {
466 .virq = VIRQ_UART2,
467 .status_mask = UART2_IRQ_MASK,
468 .clear_mask = UART2_IRQ_MASK,
469 }, {
470 .virq = VIRQ_SSP1,
471 .status_mask = SSP1_IRQ_MASK,
472 .clear_mask = SSP1_IRQ_MASK,
473 }, {
474 .virq = VIRQ_SSP2,
475 .status_mask = SSP2_IRQ_MASK,
476 .clear_mask = SSP2_IRQ_MASK,
477 }, {
478 .virq = VIRQ_SMII0,
479 .status_mask = SMII0_IRQ_MASK,
480 .clear_mask = SMII0_IRQ_MASK,
481 }, {
482 .virq = VIRQ_MII1_SMII1,
483 .status_mask = MII1_SMII1_IRQ_MASK,
484 .clear_mask = MII1_SMII1_IRQ_MASK,
485 }, {
486 .virq = VIRQ_WAKEUP_SMII0,
487 .status_mask = WAKEUP_SMII0_IRQ_MASK,
488 .clear_mask = WAKEUP_SMII0_IRQ_MASK,
489 }, {
490 .virq = VIRQ_WAKEUP_MII1_SMII1,
491 .status_mask = WAKEUP_MII1_SMII1_IRQ_MASK,
492 .clear_mask = WAKEUP_MII1_SMII1_IRQ_MASK,
493 }, {
494 .virq = VIRQ_I2C,
495 .status_mask = I2C1_IRQ_MASK,
496 .clear_mask = I2C1_IRQ_MASK,
497 },
498};
499
500struct spear_shirq shirq_intrcomm_ras = {
501 .irq = IRQ_INTRCOMM_RAS_ARM,
502 .dev_config = shirq_intrcomm_ras_config,
503 .dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
504 .regs = {
505 .enb_reg = -1,
506 .status_reg = INT_STS_MASK_REG,
507 .status_reg_mask = SHIRQ_INTRCOMM_RAS_MASK,
508 .clear_reg = INT_CLR_MASK_REG,
509 .reset_to_clear = 1,
510 },
511};
512
513/* spear320 routines */
514void __init spear320_init(void)
515{
516 void __iomem *base;
517 int ret = 0;
518
519 /* call spear3xx family common init function */
520 spear3xx_init();
521
522 /* shared irq registeration */
523 base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE);
524 if (base) {
525 /* shirq 1 */
526 shirq_ras1.regs.base = base;
527 ret = spear_shirq_register(&shirq_ras1);
528 if (ret)
529 printk(KERN_ERR "Error registering Shared IRQ 1\n");
530
531 /* shirq 3 */
532 shirq_ras3.regs.base = base;
533 ret = spear_shirq_register(&shirq_ras3);
534 if (ret)
535 printk(KERN_ERR "Error registering Shared IRQ 3\n");
536
537 /* shirq 4 */
538 shirq_intrcomm_ras.regs.base = base;
539 ret = spear_shirq_register(&shirq_intrcomm_ras);
540 if (ret)
541 printk(KERN_ERR "Error registering Shared IRQ 4\n");
542 }
543}
544
545void spear320_pmx_init(void)
546{
547 spear_pmx_init(&pmx_driver, SPEAR320_SOC_CONFIG_BASE,
548 SPEAR320_SOC_CONFIG_SIZE);
549}
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
new file mode 100644
index 000000000000..62ac685a4135
--- /dev/null
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -0,0 +1,81 @@
1/*
2 * arch/arm/mach-spear3xx/spear320_evb.c
3 *
4 * SPEAr320 evaluation board source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <asm/mach/arch.h>
15#include <asm/mach-types.h>
16#include <mach/generic.h>
17#include <mach/spear.h>
18
19/* padmux devices to enable */
20static struct pmx_dev *pmx_devs[] = {
21 /* spear3xx specific devices */
22 &pmx_i2c,
23 &pmx_ssp,
24 &pmx_mii,
25 &pmx_uart0,
26
27 /* spear320 specific devices */
28 &pmx_fsmc,
29 &pmx_sdio,
30 &pmx_i2s,
31 &pmx_uart1,
32 &pmx_uart2,
33 &pmx_can,
34 &pmx_pwm0,
35 &pmx_pwm1,
36 &pmx_pwm2,
37 &pmx_mii1,
38};
39
40static struct amba_device *amba_devs[] __initdata = {
41 /* spear3xx specific devices */
42 &gpio_device,
43 &uart_device,
44
45 /* spear320 specific devices */
46};
47
48static struct platform_device *plat_devs[] __initdata = {
49 /* spear3xx specific devices */
50
51 /* spear320 specific devices */
52};
53
54static void __init spear320_evb_init(void)
55{
56 unsigned int i;
57
58 /* call spear320 machine init function */
59 spear320_init();
60
61 /* padmux initialization */
62 pmx_driver.mode = &auto_net_mii_mode;
63 pmx_driver.devs = pmx_devs;
64 pmx_driver.devs_count = ARRAY_SIZE(pmx_devs);
65 spear320_pmx_init();
66
67 /* Add Platform Devices */
68 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
69
70 /* Add Amba Devices */
71 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
72 amba_device_register(amba_devs[i], &iomem_resource);
73}
74
75MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
76 .boot_params = 0x00000100,
77 .map_io = spear3xx_map_io,
78 .init_irq = spear3xx_init_irq,
79 .timer = &spear_sys_timer,
80 .init_machine = spear320_evb_init,
81MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
new file mode 100644
index 000000000000..e87313aeae20
--- /dev/null
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -0,0 +1,548 @@
1/*
2 * arch/arm/mach-spear3xx/spear3xx.c
3 *
4 * SPEAr3XX machines common source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/types.h>
15#include <linux/amba/pl061.h>
16#include <linux/ptrace.h>
17#include <linux/io.h>
18#include <asm/hardware/vic.h>
19#include <asm/irq.h>
20#include <asm/mach/arch.h>
21#include <mach/generic.h>
22#include <mach/spear.h>
23
24/* Add spear3xx machines common devices here */
25/* gpio device registeration */
26static struct pl061_platform_data gpio_plat_data = {
27 .gpio_base = 0,
28 .irq_base = SPEAR_GPIO_INT_BASE,
29};
30
31struct amba_device gpio_device = {
32 .dev = {
33 .init_name = "gpio",
34 .platform_data = &gpio_plat_data,
35 },
36 .res = {
37 .start = SPEAR3XX_ICM3_GPIO_BASE,
38 .end = SPEAR3XX_ICM3_GPIO_BASE + SPEAR3XX_ICM3_GPIO_SIZE - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 .irq = {IRQ_BASIC_GPIO, NO_IRQ},
42};
43
44/* uart device registeration */
45struct amba_device uart_device = {
46 .dev = {
47 .init_name = "uart",
48 },
49 .res = {
50 .start = SPEAR3XX_ICM1_UART_BASE,
51 .end = SPEAR3XX_ICM1_UART_BASE + SPEAR3XX_ICM1_UART_SIZE - 1,
52 .flags = IORESOURCE_MEM,
53 },
54 .irq = {IRQ_UART, NO_IRQ},
55};
56
57/* Do spear3xx familiy common initialization part here */
58void __init spear3xx_init(void)
59{
60 /* nothing to do for now */
61}
62
63/* This will initialize vic */
64void __init spear3xx_init_irq(void)
65{
66 vic_init((void __iomem *)VA_SPEAR3XX_ML1_VIC_BASE, 0, ~0, 0);
67}
68
69/* Following will create static virtual/physical mappings */
70struct map_desc spear3xx_io_desc[] __initdata = {
71 {
72 .virtual = VA_SPEAR3XX_ICM1_UART_BASE,
73 .pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE),
74 .length = SPEAR3XX_ICM1_UART_SIZE,
75 .type = MT_DEVICE
76 }, {
77 .virtual = VA_SPEAR3XX_ML1_VIC_BASE,
78 .pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE),
79 .length = SPEAR3XX_ML1_VIC_SIZE,
80 .type = MT_DEVICE
81 }, {
82 .virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE,
83 .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE),
84 .length = SPEAR3XX_ICM3_SYS_CTRL_SIZE,
85 .type = MT_DEVICE
86 }, {
87 .virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE,
88 .pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE),
89 .length = SPEAR3XX_ICM3_MISC_REG_SIZE,
90 .type = MT_DEVICE
91 },
92};
93
94/* This will create static memory mapping for selected devices */
95void __init spear3xx_map_io(void)
96{
97 iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));
98
99 /* This will initialize clock framework */
100 clk_init();
101}
102
103/* pad multiplexing support */
104/* devices */
105struct pmx_dev_mode pmx_firda_modes[] = {
106 {
107 .ids = 0xffffffff,
108 .mask = PMX_FIRDA_MASK,
109 },
110};
111
112struct pmx_dev pmx_firda = {
113 .name = "firda",
114 .modes = pmx_firda_modes,
115 .mode_count = ARRAY_SIZE(pmx_firda_modes),
116 .enb_on_reset = 0,
117};
118
119struct pmx_dev_mode pmx_i2c_modes[] = {
120 {
121 .ids = 0xffffffff,
122 .mask = PMX_I2C_MASK,
123 },
124};
125
126struct pmx_dev pmx_i2c = {
127 .name = "i2c",
128 .modes = pmx_i2c_modes,
129 .mode_count = ARRAY_SIZE(pmx_i2c_modes),
130 .enb_on_reset = 0,
131};
132
133struct pmx_dev_mode pmx_ssp_cs_modes[] = {
134 {
135 .ids = 0xffffffff,
136 .mask = PMX_SSP_CS_MASK,
137 },
138};
139
140struct pmx_dev pmx_ssp_cs = {
141 .name = "ssp_chip_selects",
142 .modes = pmx_ssp_cs_modes,
143 .mode_count = ARRAY_SIZE(pmx_ssp_cs_modes),
144 .enb_on_reset = 0,
145};
146
147struct pmx_dev_mode pmx_ssp_modes[] = {
148 {
149 .ids = 0xffffffff,
150 .mask = PMX_SSP_MASK,
151 },
152};
153
154struct pmx_dev pmx_ssp = {
155 .name = "ssp",
156 .modes = pmx_ssp_modes,
157 .mode_count = ARRAY_SIZE(pmx_ssp_modes),
158 .enb_on_reset = 0,
159};
160
161struct pmx_dev_mode pmx_mii_modes[] = {
162 {
163 .ids = 0xffffffff,
164 .mask = PMX_MII_MASK,
165 },
166};
167
168struct pmx_dev pmx_mii = {
169 .name = "mii",
170 .modes = pmx_mii_modes,
171 .mode_count = ARRAY_SIZE(pmx_mii_modes),
172 .enb_on_reset = 0,
173};
174
175struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
176 {
177 .ids = 0xffffffff,
178 .mask = PMX_GPIO_PIN0_MASK,
179 },
180};
181
182struct pmx_dev pmx_gpio_pin0 = {
183 .name = "gpio_pin0",
184 .modes = pmx_gpio_pin0_modes,
185 .mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes),
186 .enb_on_reset = 0,
187};
188
189struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
190 {
191 .ids = 0xffffffff,
192 .mask = PMX_GPIO_PIN1_MASK,
193 },
194};
195
196struct pmx_dev pmx_gpio_pin1 = {
197 .name = "gpio_pin1",
198 .modes = pmx_gpio_pin1_modes,
199 .mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes),
200 .enb_on_reset = 0,
201};
202
203struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
204 {
205 .ids = 0xffffffff,
206 .mask = PMX_GPIO_PIN2_MASK,
207 },
208};
209
210struct pmx_dev pmx_gpio_pin2 = {
211 .name = "gpio_pin2",
212 .modes = pmx_gpio_pin2_modes,
213 .mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes),
214 .enb_on_reset = 0,
215};
216
217struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
218 {
219 .ids = 0xffffffff,
220 .mask = PMX_GPIO_PIN3_MASK,
221 },
222};
223
224struct pmx_dev pmx_gpio_pin3 = {
225 .name = "gpio_pin3",
226 .modes = pmx_gpio_pin3_modes,
227 .mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes),
228 .enb_on_reset = 0,
229};
230
231struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
232 {
233 .ids = 0xffffffff,
234 .mask = PMX_GPIO_PIN4_MASK,
235 },
236};
237
238struct pmx_dev pmx_gpio_pin4 = {
239 .name = "gpio_pin4",
240 .modes = pmx_gpio_pin4_modes,
241 .mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes),
242 .enb_on_reset = 0,
243};
244
245struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
246 {
247 .ids = 0xffffffff,
248 .mask = PMX_GPIO_PIN5_MASK,
249 },
250};
251
252struct pmx_dev pmx_gpio_pin5 = {
253 .name = "gpio_pin5",
254 .modes = pmx_gpio_pin5_modes,
255 .mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes),
256 .enb_on_reset = 0,
257};
258
259struct pmx_dev_mode pmx_uart0_modem_modes[] = {
260 {
261 .ids = 0xffffffff,
262 .mask = PMX_UART0_MODEM_MASK,
263 },
264};
265
266struct pmx_dev pmx_uart0_modem = {
267 .name = "uart0_modem",
268 .modes = pmx_uart0_modem_modes,
269 .mode_count = ARRAY_SIZE(pmx_uart0_modem_modes),
270 .enb_on_reset = 0,
271};
272
273struct pmx_dev_mode pmx_uart0_modes[] = {
274 {
275 .ids = 0xffffffff,
276 .mask = PMX_UART0_MASK,
277 },
278};
279
280struct pmx_dev pmx_uart0 = {
281 .name = "uart0",
282 .modes = pmx_uart0_modes,
283 .mode_count = ARRAY_SIZE(pmx_uart0_modes),
284 .enb_on_reset = 0,
285};
286
287struct pmx_dev_mode pmx_timer_3_4_modes[] = {
288 {
289 .ids = 0xffffffff,
290 .mask = PMX_TIMER_3_4_MASK,
291 },
292};
293
294struct pmx_dev pmx_timer_3_4 = {
295 .name = "timer_3_4",
296 .modes = pmx_timer_3_4_modes,
297 .mode_count = ARRAY_SIZE(pmx_timer_3_4_modes),
298 .enb_on_reset = 0,
299};
300
301struct pmx_dev_mode pmx_timer_1_2_modes[] = {
302 {
303 .ids = 0xffffffff,
304 .mask = PMX_TIMER_1_2_MASK,
305 },
306};
307
308struct pmx_dev pmx_timer_1_2 = {
309 .name = "timer_1_2",
310 .modes = pmx_timer_1_2_modes,
311 .mode_count = ARRAY_SIZE(pmx_timer_1_2_modes),
312 .enb_on_reset = 0,
313};
314
315#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
316/* plgpios devices */
317struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
318 {
319 .ids = 0x00,
320 .mask = PMX_FIRDA_MASK,
321 },
322};
323
324struct pmx_dev pmx_plgpio_0_1 = {
325 .name = "plgpio 0 and 1",
326 .modes = pmx_plgpio_0_1_modes,
327 .mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes),
328 .enb_on_reset = 1,
329};
330
331struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
332 {
333 .ids = 0x00,
334 .mask = PMX_UART0_MASK,
335 },
336};
337
338struct pmx_dev pmx_plgpio_2_3 = {
339 .name = "plgpio 2 and 3",
340 .modes = pmx_plgpio_2_3_modes,
341 .mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes),
342 .enb_on_reset = 1,
343};
344
345struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
346 {
347 .ids = 0x00,
348 .mask = PMX_I2C_MASK,
349 },
350};
351
352struct pmx_dev pmx_plgpio_4_5 = {
353 .name = "plgpio 4 and 5",
354 .modes = pmx_plgpio_4_5_modes,
355 .mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes),
356 .enb_on_reset = 1,
357};
358
359struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
360 {
361 .ids = 0x00,
362 .mask = PMX_SSP_MASK,
363 },
364};
365
366struct pmx_dev pmx_plgpio_6_9 = {
367 .name = "plgpio 6 to 9",
368 .modes = pmx_plgpio_6_9_modes,
369 .mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes),
370 .enb_on_reset = 1,
371};
372
373struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
374 {
375 .ids = 0x00,
376 .mask = PMX_MII_MASK,
377 },
378};
379
380struct pmx_dev pmx_plgpio_10_27 = {
381 .name = "plgpio 10 to 27",
382 .modes = pmx_plgpio_10_27_modes,
383 .mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes),
384 .enb_on_reset = 1,
385};
386
387struct pmx_dev_mode pmx_plgpio_28_modes[] = {
388 {
389 .ids = 0x00,
390 .mask = PMX_GPIO_PIN0_MASK,
391 },
392};
393
394struct pmx_dev pmx_plgpio_28 = {
395 .name = "plgpio 28",
396 .modes = pmx_plgpio_28_modes,
397 .mode_count = ARRAY_SIZE(pmx_plgpio_28_modes),
398 .enb_on_reset = 1,
399};
400
401struct pmx_dev_mode pmx_plgpio_29_modes[] = {
402 {
403 .ids = 0x00,
404 .mask = PMX_GPIO_PIN1_MASK,
405 },
406};
407
408struct pmx_dev pmx_plgpio_29 = {
409 .name = "plgpio 29",
410 .modes = pmx_plgpio_29_modes,
411 .mode_count = ARRAY_SIZE(pmx_plgpio_29_modes),
412 .enb_on_reset = 1,
413};
414
415struct pmx_dev_mode pmx_plgpio_30_modes[] = {
416 {
417 .ids = 0x00,
418 .mask = PMX_GPIO_PIN2_MASK,
419 },
420};
421
422struct pmx_dev pmx_plgpio_30 = {
423 .name = "plgpio 30",
424 .modes = pmx_plgpio_30_modes,
425 .mode_count = ARRAY_SIZE(pmx_plgpio_30_modes),
426 .enb_on_reset = 1,
427};
428
429struct pmx_dev_mode pmx_plgpio_31_modes[] = {
430 {
431 .ids = 0x00,
432 .mask = PMX_GPIO_PIN3_MASK,
433 },
434};
435
436struct pmx_dev pmx_plgpio_31 = {
437 .name = "plgpio 31",
438 .modes = pmx_plgpio_31_modes,
439 .mode_count = ARRAY_SIZE(pmx_plgpio_31_modes),
440 .enb_on_reset = 1,
441};
442
443struct pmx_dev_mode pmx_plgpio_32_modes[] = {
444 {
445 .ids = 0x00,
446 .mask = PMX_GPIO_PIN4_MASK,
447 },
448};
449
450struct pmx_dev pmx_plgpio_32 = {
451 .name = "plgpio 32",
452 .modes = pmx_plgpio_32_modes,
453 .mode_count = ARRAY_SIZE(pmx_plgpio_32_modes),
454 .enb_on_reset = 1,
455};
456
457struct pmx_dev_mode pmx_plgpio_33_modes[] = {
458 {
459 .ids = 0x00,
460 .mask = PMX_GPIO_PIN5_MASK,
461 },
462};
463
464struct pmx_dev pmx_plgpio_33 = {
465 .name = "plgpio 33",
466 .modes = pmx_plgpio_33_modes,
467 .mode_count = ARRAY_SIZE(pmx_plgpio_33_modes),
468 .enb_on_reset = 1,
469};
470
471struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
472 {
473 .ids = 0x00,
474 .mask = PMX_SSP_CS_MASK,
475 },
476};
477
478struct pmx_dev pmx_plgpio_34_36 = {
479 .name = "plgpio 34 to 36",
480 .modes = pmx_plgpio_34_36_modes,
481 .mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes),
482 .enb_on_reset = 1,
483};
484
485struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
486 {
487 .ids = 0x00,
488 .mask = PMX_UART0_MODEM_MASK,
489 },
490};
491
492struct pmx_dev pmx_plgpio_37_42 = {
493 .name = "plgpio 37 to 42",
494 .modes = pmx_plgpio_37_42_modes,
495 .mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes),
496 .enb_on_reset = 1,
497};
498
499struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
500 {
501 .ids = 0x00,
502 .mask = PMX_TIMER_1_2_MASK,
503 },
504};
505
506struct pmx_dev pmx_plgpio_43_44_47_48 = {
507 .name = "plgpio 43, 44, 47 and 48",
508 .modes = pmx_plgpio_43_44_47_48_modes,
509 .mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes),
510 .enb_on_reset = 1,
511};
512
513struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
514 {
515 .ids = 0x00,
516 .mask = PMX_TIMER_3_4_MASK,
517 },
518};
519
520struct pmx_dev pmx_plgpio_45_46_49_50 = {
521 .name = "plgpio 45, 46, 49 and 50",
522 .modes = pmx_plgpio_45_46_49_50_modes,
523 .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes),
524 .enb_on_reset = 1,
525};
526
527#endif
528
529/* spear padmux initialization function */
530void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size)
531{
532 int ret = 0;
533
534 /* pad mux initialization */
535 pmx_driver->base = ioremap(base, size);
536 if (!pmx_driver->base) {
537 ret = -ENOMEM;
538 goto pmx_fail;
539 }
540
541 ret = pmx_register(pmx_driver);
542 iounmap(pmx_driver->base);
543
544pmx_fail:
545 if (ret)
546 printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
547 ret);
548}
diff --git a/arch/arm/mach-spear6xx/Kconfig b/arch/arm/mach-spear6xx/Kconfig
new file mode 100644
index 000000000000..bddba034f862
--- /dev/null
+++ b/arch/arm/mach-spear6xx/Kconfig
@@ -0,0 +1,20 @@
1#
2# SPEAr6XX Machine configuration file
3#
4
5if ARCH_SPEAR6XX
6
7choice
8 prompt "SPEAr6XX Family"
9 default MACH_SPEAR600
10
11config MACH_SPEAR600
12 bool "SPEAr600"
13 help
14 Supports ST SPEAr600 Machine
15endchoice
16
17# Adding SPEAr6XX machine specific configuration files
18source "arch/arm/mach-spear6xx/Kconfig600"
19
20endif #ARCH_SPEAR6XX
diff --git a/arch/arm/mach-spear6xx/Kconfig600 b/arch/arm/mach-spear6xx/Kconfig600
new file mode 100644
index 000000000000..9e19f65eb78e
--- /dev/null
+++ b/arch/arm/mach-spear6xx/Kconfig600
@@ -0,0 +1,17 @@
1#
2# SPEAr600 machine configuration file
3#
4
5if MACH_SPEAR600
6
7choice
8 prompt "SPEAr600 Boards"
9 default BOARD_SPEAR600_EVB
10
11config BOARD_SPEAR600_EVB
12 bool "SPEAr600 Evaluation Board"
13 help
14 Supports ST SPEAr600 Evaluation Board
15endchoice
16
17endif #MACH_SPEAR600
diff --git a/arch/arm/mach-spear6xx/Makefile b/arch/arm/mach-spear6xx/Makefile
new file mode 100644
index 000000000000..cc1a4d82d459
--- /dev/null
+++ b/arch/arm/mach-spear6xx/Makefile
@@ -0,0 +1,12 @@
1#
2# Makefile for SPEAr6XX machine series
3#
4
5# common files
6obj-y += clock.o spear6xx.o
7
8# spear600 specific files
9obj-$(CONFIG_MACH_SPEAR600) += spear600.o
10
11# spear600 boards files
12obj-$(CONFIG_BOARD_SPEAR600_EVB) += spear600_evb.o
diff --git a/arch/arm/mach-spear6xx/Makefile.boot b/arch/arm/mach-spear6xx/Makefile.boot
new file mode 100644
index 000000000000..7a1f3c0eadb8
--- /dev/null
+++ b/arch/arm/mach-spear6xx/Makefile.boot
@@ -0,0 +1,3 @@
1zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
new file mode 100644
index 000000000000..13e27c769685
--- /dev/null
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -0,0 +1,483 @@
1/*
2 * arch/arm/mach-spear6xx/clock.c
3 *
4 * SPEAr6xx machines clock framework source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <mach/misc_regs.h>
17#include <plat/clock.h>
18
19/* root clks */
20/* 32 KHz oscillator clock */
21static struct clk osc_32k_clk = {
22 .flags = ALWAYS_ENABLED,
23 .rate = 32000,
24};
25
26/* 30 MHz oscillator clock */
27static struct clk osc_30m_clk = {
28 .flags = ALWAYS_ENABLED,
29 .rate = 30000000,
30};
31
32/* clock derived from 32 KHz osc clk */
33/* rtc clock */
34static struct clk rtc_clk = {
35 .pclk = &osc_32k_clk,
36 .en_reg = PERIP1_CLK_ENB,
37 .en_reg_bit = RTC_CLK_ENB,
38 .recalc = &follow_parent,
39};
40
41/* clock derived from 30 MHz osc clk */
42/* pll1 configuration structure */
43static struct pll_clk_config pll1_config = {
44 .mode_reg = PLL1_CTR,
45 .cfg_reg = PLL1_FRQ,
46};
47
48/* PLL1 clock */
49static struct clk pll1_clk = {
50 .pclk = &osc_30m_clk,
51 .en_reg = PLL1_CTR,
52 .en_reg_bit = PLL_ENABLE,
53 .recalc = &pll1_clk_recalc,
54 .private_data = &pll1_config,
55};
56
57/* PLL3 48 MHz clock */
58static struct clk pll3_48m_clk = {
59 .flags = ALWAYS_ENABLED,
60 .pclk = &osc_30m_clk,
61 .rate = 48000000,
62};
63
64/* watch dog timer clock */
65static struct clk wdt_clk = {
66 .flags = ALWAYS_ENABLED,
67 .pclk = &osc_30m_clk,
68 .recalc = &follow_parent,
69};
70
71/* clock derived from pll1 clk */
72/* cpu clock */
73static struct clk cpu_clk = {
74 .flags = ALWAYS_ENABLED,
75 .pclk = &pll1_clk,
76 .recalc = &follow_parent,
77};
78
79/* ahb configuration structure */
80static struct bus_clk_config ahb_config = {
81 .reg = CORE_CLK_CFG,
82 .mask = PLL_HCLK_RATIO_MASK,
83 .shift = PLL_HCLK_RATIO_SHIFT,
84};
85
86/* ahb clock */
87static struct clk ahb_clk = {
88 .flags = ALWAYS_ENABLED,
89 .pclk = &pll1_clk,
90 .recalc = &bus_clk_recalc,
91 .private_data = &ahb_config,
92};
93
94/* uart parents */
95static struct pclk_info uart_pclk_info[] = {
96 {
97 .pclk = &pll1_clk,
98 .pclk_mask = AUX_CLK_PLL1_MASK,
99 .scalable = 1,
100 }, {
101 .pclk = &pll3_48m_clk,
102 .pclk_mask = AUX_CLK_PLL3_MASK,
103 .scalable = 0,
104 },
105};
106
107/* uart parent select structure */
108static struct pclk_sel uart_pclk_sel = {
109 .pclk_info = uart_pclk_info,
110 .pclk_count = ARRAY_SIZE(uart_pclk_info),
111 .pclk_sel_reg = PERIP_CLK_CFG,
112 .pclk_sel_mask = UART_CLK_MASK,
113};
114
115/* uart configurations */
116static struct aux_clk_config uart_config = {
117 .synth_reg = UART_CLK_SYNT,
118};
119
120/* uart0 clock */
121static struct clk uart0_clk = {
122 .en_reg = PERIP1_CLK_ENB,
123 .en_reg_bit = UART0_CLK_ENB,
124 .pclk_sel = &uart_pclk_sel,
125 .pclk_sel_shift = UART_CLK_SHIFT,
126 .recalc = &aux_clk_recalc,
127 .private_data = &uart_config,
128};
129
130/* uart1 clock */
131static struct clk uart1_clk = {
132 .en_reg = PERIP1_CLK_ENB,
133 .en_reg_bit = UART1_CLK_ENB,
134 .pclk_sel = &uart_pclk_sel,
135 .pclk_sel_shift = UART_CLK_SHIFT,
136 .recalc = &aux_clk_recalc,
137 .private_data = &uart_config,
138};
139
140/* firda configurations */
141static struct aux_clk_config firda_config = {
142 .synth_reg = FIRDA_CLK_SYNT,
143};
144
145/* firda parents */
146static struct pclk_info firda_pclk_info[] = {
147 {
148 .pclk = &pll1_clk,
149 .pclk_mask = AUX_CLK_PLL1_MASK,
150 .scalable = 1,
151 }, {
152 .pclk = &pll3_48m_clk,
153 .pclk_mask = AUX_CLK_PLL3_MASK,
154 .scalable = 0,
155 },
156};
157
158/* firda parent select structure */
159static struct pclk_sel firda_pclk_sel = {
160 .pclk_info = firda_pclk_info,
161 .pclk_count = ARRAY_SIZE(firda_pclk_info),
162 .pclk_sel_reg = PERIP_CLK_CFG,
163 .pclk_sel_mask = FIRDA_CLK_MASK,
164};
165
166/* firda clock */
167static struct clk firda_clk = {
168 .en_reg = PERIP1_CLK_ENB,
169 .en_reg_bit = FIRDA_CLK_ENB,
170 .pclk_sel = &firda_pclk_sel,
171 .pclk_sel_shift = FIRDA_CLK_SHIFT,
172 .recalc = &aux_clk_recalc,
173 .private_data = &firda_config,
174};
175
176/* clcd configurations */
177static struct aux_clk_config clcd_config = {
178 .synth_reg = CLCD_CLK_SYNT,
179};
180
181/* clcd parents */
182static struct pclk_info clcd_pclk_info[] = {
183 {
184 .pclk = &pll1_clk,
185 .pclk_mask = AUX_CLK_PLL1_MASK,
186 .scalable = 1,
187 }, {
188 .pclk = &pll3_48m_clk,
189 .pclk_mask = AUX_CLK_PLL3_MASK,
190 .scalable = 0,
191 },
192};
193
194/* clcd parent select structure */
195static struct pclk_sel clcd_pclk_sel = {
196 .pclk_info = clcd_pclk_info,
197 .pclk_count = ARRAY_SIZE(clcd_pclk_info),
198 .pclk_sel_reg = PERIP_CLK_CFG,
199 .pclk_sel_mask = CLCD_CLK_MASK,
200};
201
202/* clcd clock */
203static struct clk clcd_clk = {
204 .en_reg = PERIP1_CLK_ENB,
205 .en_reg_bit = CLCD_CLK_ENB,
206 .pclk_sel = &clcd_pclk_sel,
207 .pclk_sel_shift = CLCD_CLK_SHIFT,
208 .recalc = &aux_clk_recalc,
209 .private_data = &clcd_config,
210};
211
212/* gpt parents */
213static struct pclk_info gpt_pclk_info[] = {
214 {
215 .pclk = &pll1_clk,
216 .pclk_mask = AUX_CLK_PLL1_MASK,
217 .scalable = 1,
218 }, {
219 .pclk = &pll3_48m_clk,
220 .pclk_mask = AUX_CLK_PLL3_MASK,
221 .scalable = 0,
222 },
223};
224
225/* gpt parent select structure */
226static struct pclk_sel gpt_pclk_sel = {
227 .pclk_info = gpt_pclk_info,
228 .pclk_count = ARRAY_SIZE(gpt_pclk_info),
229 .pclk_sel_reg = PERIP_CLK_CFG,
230 .pclk_sel_mask = GPT_CLK_MASK,
231};
232
233/* gpt0_1 configurations */
234static struct aux_clk_config gpt0_1_config = {
235 .synth_reg = PRSC1_CLK_CFG,
236};
237
238/* gpt0 ARM1 subsystem timer clock */
239static struct clk gpt0_clk = {
240 .flags = ALWAYS_ENABLED,
241 .pclk_sel = &gpt_pclk_sel,
242 .pclk_sel_shift = GPT0_CLK_SHIFT,
243 .recalc = &gpt_clk_recalc,
244 .private_data = &gpt0_1_config,
245};
246
247/* gpt1 timer clock */
248static struct clk gpt1_clk = {
249 .flags = ALWAYS_ENABLED,
250 .pclk_sel = &gpt_pclk_sel,
251 .pclk_sel_shift = GPT1_CLK_SHIFT,
252 .recalc = &gpt_clk_recalc,
253 .private_data = &gpt0_1_config,
254};
255
256/* gpt2 configurations */
257static struct aux_clk_config gpt2_config = {
258 .synth_reg = PRSC2_CLK_CFG,
259};
260
261/* gpt2 timer clock */
262static struct clk gpt2_clk = {
263 .en_reg = PERIP1_CLK_ENB,
264 .en_reg_bit = GPT2_CLK_ENB,
265 .pclk_sel = &gpt_pclk_sel,
266 .pclk_sel_shift = GPT2_CLK_SHIFT,
267 .recalc = &gpt_clk_recalc,
268 .private_data = &gpt2_config,
269};
270
271/* gpt3 configurations */
272static struct aux_clk_config gpt3_config = {
273 .synth_reg = PRSC3_CLK_CFG,
274};
275
276/* gpt3 timer clock */
277static struct clk gpt3_clk = {
278 .en_reg = PERIP1_CLK_ENB,
279 .en_reg_bit = GPT3_CLK_ENB,
280 .pclk_sel = &gpt_pclk_sel,
281 .pclk_sel_shift = GPT3_CLK_SHIFT,
282 .recalc = &gpt_clk_recalc,
283 .private_data = &gpt3_config,
284};
285
286/* clock derived from pll3 clk */
287/* usbh0 clock */
288static struct clk usbh0_clk = {
289 .pclk = &pll3_48m_clk,
290 .en_reg = PERIP1_CLK_ENB,
291 .en_reg_bit = USBH0_CLK_ENB,
292 .recalc = &follow_parent,
293};
294
295/* usbh1 clock */
296static struct clk usbh1_clk = {
297 .pclk = &pll3_48m_clk,
298 .en_reg = PERIP1_CLK_ENB,
299 .en_reg_bit = USBH1_CLK_ENB,
300 .recalc = &follow_parent,
301};
302
303/* usbd clock */
304static struct clk usbd_clk = {
305 .pclk = &pll3_48m_clk,
306 .en_reg = PERIP1_CLK_ENB,
307 .en_reg_bit = USBD_CLK_ENB,
308 .recalc = &follow_parent,
309};
310
311/* clock derived from ahb clk */
312/* apb configuration structure */
313static struct bus_clk_config apb_config = {
314 .reg = CORE_CLK_CFG,
315 .mask = HCLK_PCLK_RATIO_MASK,
316 .shift = HCLK_PCLK_RATIO_SHIFT,
317};
318
319/* apb clock */
320static struct clk apb_clk = {
321 .flags = ALWAYS_ENABLED,
322 .pclk = &ahb_clk,
323 .recalc = &bus_clk_recalc,
324 .private_data = &apb_config,
325};
326
327/* i2c clock */
328static struct clk i2c_clk = {
329 .pclk = &ahb_clk,
330 .en_reg = PERIP1_CLK_ENB,
331 .en_reg_bit = I2C_CLK_ENB,
332 .recalc = &follow_parent,
333};
334
335/* dma clock */
336static struct clk dma_clk = {
337 .pclk = &ahb_clk,
338 .en_reg = PERIP1_CLK_ENB,
339 .en_reg_bit = DMA_CLK_ENB,
340 .recalc = &follow_parent,
341};
342
343/* jpeg clock */
344static struct clk jpeg_clk = {
345 .pclk = &ahb_clk,
346 .en_reg = PERIP1_CLK_ENB,
347 .en_reg_bit = JPEG_CLK_ENB,
348 .recalc = &follow_parent,
349};
350
351/* gmac clock */
352static struct clk gmac_clk = {
353 .pclk = &ahb_clk,
354 .en_reg = PERIP1_CLK_ENB,
355 .en_reg_bit = GMAC_CLK_ENB,
356 .recalc = &follow_parent,
357};
358
359/* smi clock */
360static struct clk smi_clk = {
361 .pclk = &ahb_clk,
362 .en_reg = PERIP1_CLK_ENB,
363 .en_reg_bit = SMI_CLK_ENB,
364 .recalc = &follow_parent,
365};
366
367/* fsmc clock */
368static struct clk fsmc_clk = {
369 .pclk = &ahb_clk,
370 .en_reg = PERIP1_CLK_ENB,
371 .en_reg_bit = FSMC_CLK_ENB,
372 .recalc = &follow_parent,
373};
374
375/* clock derived from apb clk */
376/* adc clock */
377static struct clk adc_clk = {
378 .pclk = &apb_clk,
379 .en_reg = PERIP1_CLK_ENB,
380 .en_reg_bit = ADC_CLK_ENB,
381 .recalc = &follow_parent,
382};
383
384/* ssp0 clock */
385static struct clk ssp0_clk = {
386 .pclk = &apb_clk,
387 .en_reg = PERIP1_CLK_ENB,
388 .en_reg_bit = SSP0_CLK_ENB,
389 .recalc = &follow_parent,
390};
391
392/* ssp1 clock */
393static struct clk ssp1_clk = {
394 .pclk = &apb_clk,
395 .en_reg = PERIP1_CLK_ENB,
396 .en_reg_bit = SSP1_CLK_ENB,
397 .recalc = &follow_parent,
398};
399
400/* ssp2 clock */
401static struct clk ssp2_clk = {
402 .pclk = &apb_clk,
403 .en_reg = PERIP1_CLK_ENB,
404 .en_reg_bit = SSP2_CLK_ENB,
405 .recalc = &follow_parent,
406};
407
408/* gpio0 ARM subsystem clock */
409static struct clk gpio0_clk = {
410 .flags = ALWAYS_ENABLED,
411 .pclk = &apb_clk,
412 .recalc = &follow_parent,
413};
414
415/* gpio1 clock */
416static struct clk gpio1_clk = {
417 .pclk = &apb_clk,
418 .en_reg = PERIP1_CLK_ENB,
419 .en_reg_bit = GPIO1_CLK_ENB,
420 .recalc = &follow_parent,
421};
422
423/* gpio2 clock */
424static struct clk gpio2_clk = {
425 .pclk = &apb_clk,
426 .en_reg = PERIP1_CLK_ENB,
427 .en_reg_bit = GPIO2_CLK_ENB,
428 .recalc = &follow_parent,
429};
430
431/* array of all spear 6xx clock lookups */
432static struct clk_lookup spear_clk_lookups[] = {
433 /* root clks */
434 { .con_id = "osc_32k_clk", .clk = &osc_32k_clk},
435 { .con_id = "osc_30m_clk", .clk = &osc_30m_clk},
436 /* clock derived from 32 KHz os clk */
437 { .dev_id = "rtc", .clk = &rtc_clk},
438 /* clock derived from 30 MHz os clk */
439 { .con_id = "pll1_clk", .clk = &pll1_clk},
440 { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk},
441 { .dev_id = "wdt", .clk = &wdt_clk},
442 /* clock derived from pll1 clk */
443 { .con_id = "cpu_clk", .clk = &cpu_clk},
444 { .con_id = "ahb_clk", .clk = &ahb_clk},
445 { .dev_id = "uart0", .clk = &uart0_clk},
446 { .dev_id = "uart1", .clk = &uart1_clk},
447 { .dev_id = "firda", .clk = &firda_clk},
448 { .dev_id = "clcd", .clk = &clcd_clk},
449 { .dev_id = "gpt0", .clk = &gpt0_clk},
450 { .dev_id = "gpt1", .clk = &gpt1_clk},
451 { .dev_id = "gpt2", .clk = &gpt2_clk},
452 { .dev_id = "gpt3", .clk = &gpt3_clk},
453 /* clock derived from pll3 clk */
454 { .dev_id = "usbh0", .clk = &usbh0_clk},
455 { .dev_id = "usbh1", .clk = &usbh1_clk},
456 { .dev_id = "usbd", .clk = &usbd_clk},
457 /* clock derived from ahb clk */
458 { .con_id = "apb_clk", .clk = &apb_clk},
459 { .dev_id = "i2c", .clk = &i2c_clk},
460 { .dev_id = "dma", .clk = &dma_clk},
461 { .dev_id = "jpeg", .clk = &jpeg_clk},
462 { .dev_id = "gmac", .clk = &gmac_clk},
463 { .dev_id = "smi", .clk = &smi_clk},
464 { .dev_id = "fsmc", .clk = &fsmc_clk},
465 /* clock derived from apb clk */
466 { .dev_id = "adc", .clk = &adc_clk},
467 { .dev_id = "ssp0", .clk = &ssp0_clk},
468 { .dev_id = "ssp1", .clk = &ssp1_clk},
469 { .dev_id = "ssp2", .clk = &ssp2_clk},
470 { .dev_id = "gpio0", .clk = &gpio0_clk},
471 { .dev_id = "gpio1", .clk = &gpio1_clk},
472 { .dev_id = "gpio2", .clk = &gpio2_clk},
473};
474
475void __init clk_init(void)
476{
477 int i;
478
479 for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++)
480 clk_register(&spear_clk_lookups[i]);
481
482 recalc_root_clocks();
483}
diff --git a/arch/arm/mach-spear6xx/include/mach/clkdev.h b/arch/arm/mach-spear6xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..05676bf440d3
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/clkdev.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/clkdev.h
3 *
4 * Clock Dev framework definitions for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_CLKDEV_H
15#define __MACH_CLKDEV_H
16
17#include <plat/clkdev.h>
18
19#endif /* __MACH_CLKDEV_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/debug-macro.S b/arch/arm/mach-spear6xx/include/mach/debug-macro.S
new file mode 100644
index 000000000000..0f3ea39edd96
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/debug-macro.S
@@ -0,0 +1,14 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/debug-macro.S
3 *
4 * Debugging macro include header for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
new file mode 100644
index 000000000000..9eaecaeafcf0
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -0,0 +1,55 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <mach/hardware.h>
15#include <mach/spear.h>
16#include <asm/hardware/vic.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
29 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
30 mov \irqnr, #0
31 teq \irqstat, #0
32 bne 1001f
33 ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
34 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
35 teq \irqstat, #0
36 beq 1002f @ this will set/reset
37 @ zero register
38 mov \irqnr, #32
391001:
40 /*
41 * Following code will find bit position of least significang
42 * bit set in irqstat, using following equation
43 * least significant bit set in n = (n & ~(n-1))
44 */
45 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
46 mvn \tmp, \tmp @ tmp = ~tmp
47 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
48 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
49 clz \tmp, \irqstat @ tmp = leading zeros
50
51 rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1
52 add \irqnr, \irqnr, \tmp
53
541002: /* EQ will be set if no irqs pending */
55 .endm
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
new file mode 100644
index 000000000000..16205a538756
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -0,0 +1,45 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/generic.h
3 *
4 * SPEAr6XX machine family specific generic header file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_GENERIC_H
15#define __MACH_GENERIC_H
16
17#include <asm/mach/time.h>
18#include <asm/mach/map.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/amba/bus.h>
22
23/*
24 * Each GPT has 2 timer channels
25 * Following GPT channels will be used as clock source and clockevent
26 */
27#define SPEAR_GPT0_BASE SPEAR6XX_CPU_TMR_BASE
28#define SPEAR_GPT0_CHAN0_IRQ IRQ_CPU_GPT1_1
29#define SPEAR_GPT0_CHAN1_IRQ IRQ_CPU_GPT1_2
30
31/* Add spear6xx family device structure declarations here */
32extern struct amba_device gpio_device[];
33extern struct amba_device uart_device[];
34extern struct sys_timer spear_sys_timer;
35
36/* Add spear6xx family function declarations here */
37void __init spear6xx_map_io(void);
38void __init spear6xx_init_irq(void);
39void __init spear6xx_init(void);
40void __init spear600_init(void);
41void __init clk_init(void);
42
43/* Add spear600 machine device structure declarations here */
44
45#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/gpio.h b/arch/arm/mach-spear6xx/include/mach/gpio.h
new file mode 100644
index 000000000000..3a789dbb69f7
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/gpio.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/gpio.h
3 *
4 * GPIO macros for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_GPIO_H
15#define __MACH_GPIO_H
16
17#include <plat/gpio.h>
18
19#endif /* __MACH_GPIO_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/hardware.h b/arch/arm/mach-spear6xx/include/mach/hardware.h
new file mode 100644
index 000000000000..7545116deca9
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/hardware.h
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/hardware.h
3 *
4 * Hardware definitions for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_HARDWARE_H
15#define __MACH_HARDWARE_H
16
17/* Vitual to physical translation of statically mapped space */
18#define IO_ADDRESS(x) (x | 0xF0000000)
19
20#endif /* __MACH_HARDWARE_H */
21
diff --git a/arch/arm/mach-spear6xx/include/mach/io.h b/arch/arm/mach-spear6xx/include/mach/io.h
new file mode 100644
index 000000000000..fb7c106cea94
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/io.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/io.h
3 *
4 * IO definitions for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IO_H
15#define __MACH_IO_H
16
17#include <plat/io.h>
18
19#endif /* __MACH_IO_H */
20
diff --git a/arch/arm/mach-spear6xx/include/mach/irqs.h b/arch/arm/mach-spear6xx/include/mach/irqs.h
new file mode 100644
index 000000000000..8f214b03d75d
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/irqs.h
@@ -0,0 +1,97 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/irqs.h
3 *
4 * IRQ helper macros for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IRQS_H
15#define __MACH_IRQS_H
16
17/* IRQ definitions */
18/* VIC 1 */
19#define IRQ_INTRCOMM_SW_IRQ 0
20#define IRQ_INTRCOMM_CPU_1 1
21#define IRQ_INTRCOMM_CPU_2 2
22#define IRQ_INTRCOMM_RAS2A11_1 3
23#define IRQ_INTRCOMM_RAS2A11_2 4
24#define IRQ_INTRCOMM_RAS2A12_1 5
25#define IRQ_INTRCOMM_RAS2A12_2 6
26#define IRQ_GEN_RAS_0 7
27#define IRQ_GEN_RAS_1 8
28#define IRQ_GEN_RAS_2 9
29#define IRQ_GEN_RAS_3 10
30#define IRQ_GEN_RAS_4 11
31#define IRQ_GEN_RAS_5 12
32#define IRQ_GEN_RAS_6 13
33#define IRQ_GEN_RAS_7 14
34#define IRQ_GEN_RAS_8 15
35#define IRQ_CPU_GPT1_1 16
36#define IRQ_CPU_GPT1_2 17
37#define IRQ_LOCAL_GPIO 18
38#define IRQ_PLL_UNLOCK 19
39#define IRQ_JPEG 20
40#define IRQ_FSMC 21
41#define IRQ_IRDA 22
42#define IRQ_RESERVED 23
43#define IRQ_UART_0 24
44#define IRQ_UART_1 25
45#define IRQ_SSP_1 26
46#define IRQ_SSP_2 27
47#define IRQ_I2C 28
48#define IRQ_GEN_RAS_9 29
49#define IRQ_GEN_RAS_10 30
50#define IRQ_GEN_RAS_11 31
51
52/* VIC 2 */
53#define IRQ_APPL_GPT1_1 32
54#define IRQ_APPL_GPT1_2 33
55#define IRQ_APPL_GPT2_1 34
56#define IRQ_APPL_GPT2_2 35
57#define IRQ_APPL_GPIO 36
58#define IRQ_APPL_SSP 37
59#define IRQ_APPL_ADC 38
60#define IRQ_APPL_RESERVED 39
61#define IRQ_AHB_EXP_MASTER 40
62#define IRQ_DDR_CONTROLLER 41
63#define IRQ_BASIC_DMA 42
64#define IRQ_BASIC_RESERVED1 43
65#define IRQ_BASIC_SMI 44
66#define IRQ_BASIC_CLCD 45
67#define IRQ_EXP_AHB_1 46
68#define IRQ_EXP_AHB_2 47
69#define IRQ_BASIC_GPT1_1 48
70#define IRQ_BASIC_GPT1_2 49
71#define IRQ_BASIC_RTC 50
72#define IRQ_BASIC_GPIO 51
73#define IRQ_BASIC_WDT 52
74#define IRQ_BASIC_RESERVED 53
75#define IRQ_AHB_EXP_SLAVE 54
76#define IRQ_GMAC_1 55
77#define IRQ_GMAC_2 56
78#define IRQ_USB_DEV 57
79#define IRQ_USB_H_OHCI_0 58
80#define IRQ_USB_H_EHCI_0 59
81#define IRQ_USB_H_OHCI_1 60
82#define IRQ_USB_H_EHCI_1 61
83#define IRQ_EXP_AHB_3 62
84#define IRQ_EXP_AHB_4 63
85
86#define IRQ_VIC_END 64
87
88/* GPIO pins virtual irqs */
89#define SPEAR_GPIO_INT_BASE IRQ_VIC_END
90#define SPEAR_GPIO0_INT_BASE SPEAR_GPIO_INT_BASE
91#define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO0_INT_BASE + 8)
92#define SPEAR_GPIO2_INT_BASE (SPEAR_GPIO1_INT_BASE + 8)
93#define SPEAR_GPIO_INT_END (SPEAR_GPIO2_INT_BASE + 8)
94#define VIRTUAL_IRQS (SPEAR_GPIO_INT_END - IRQ_VIC_END)
95#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS)
96
97#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/memory.h b/arch/arm/mach-spear6xx/include/mach/memory.h
new file mode 100644
index 000000000000..781f088fc228
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/memory.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/memory.h
3 *
4 * Memory map for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_MEMORY_H
15#define __MACH_MEMORY_H
16
17#include <plat/memory.h>
18
19#endif /* __MACH_MEMORY_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
new file mode 100644
index 000000000000..03908036b0d0
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
@@ -0,0 +1,173 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/misc_regs.h
3 *
4 * Miscellaneous registers definitions for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_MISC_REGS_H
15#define __MACH_MISC_REGS_H
16
17#include <mach/spear.h>
18
19#define MISC_BASE VA_SPEAR6XX_ICM3_MISC_REG_BASE
20
21#define SOC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x000))
22#define DIAG_CFG_CTR ((unsigned int *)(MISC_BASE + 0x004))
23#define PLL1_CTR ((unsigned int *)(MISC_BASE + 0x008))
24#define PLL1_FRQ ((unsigned int *)(MISC_BASE + 0x00C))
25#define PLL1_MOD ((unsigned int *)(MISC_BASE + 0x010))
26#define PLL2_CTR ((unsigned int *)(MISC_BASE + 0x014))
27/* PLL_CTR register masks */
28#define PLL_ENABLE 2
29#define PLL_MODE_SHIFT 4
30#define PLL_MODE_MASK 0x3
31#define PLL_MODE_NORMAL 0
32#define PLL_MODE_FRACTION 1
33#define PLL_MODE_DITH_DSB 2
34#define PLL_MODE_DITH_SSB 3
35
36#define PLL2_FRQ ((unsigned int *)(MISC_BASE + 0x018))
37/* PLL FRQ register masks */
38#define PLL_DIV_N_SHIFT 0
39#define PLL_DIV_N_MASK 0xFF
40#define PLL_DIV_P_SHIFT 8
41#define PLL_DIV_P_MASK 0x7
42#define PLL_NORM_FDBK_M_SHIFT 24
43#define PLL_NORM_FDBK_M_MASK 0xFF
44#define PLL_DITH_FDBK_M_SHIFT 16
45#define PLL_DITH_FDBK_M_MASK 0xFFFF
46
47#define PLL2_MOD ((unsigned int *)(MISC_BASE + 0x01C))
48#define PLL_CLK_CFG ((unsigned int *)(MISC_BASE + 0x020))
49#define CORE_CLK_CFG ((unsigned int *)(MISC_BASE + 0x024))
50/* CORE CLK CFG register masks */
51#define PLL_HCLK_RATIO_SHIFT 10
52#define PLL_HCLK_RATIO_MASK 0x3
53#define HCLK_PCLK_RATIO_SHIFT 8
54#define HCLK_PCLK_RATIO_MASK 0x3
55
56#define PERIP_CLK_CFG ((unsigned int *)(MISC_BASE + 0x028))
57/* PERIP_CLK_CFG register masks */
58#define CLCD_CLK_SHIFT 2
59#define CLCD_CLK_MASK 0x3
60#define UART_CLK_SHIFT 4
61#define UART_CLK_MASK 0x1
62#define FIRDA_CLK_SHIFT 5
63#define FIRDA_CLK_MASK 0x3
64#define GPT0_CLK_SHIFT 8
65#define GPT1_CLK_SHIFT 10
66#define GPT2_CLK_SHIFT 11
67#define GPT3_CLK_SHIFT 12
68#define GPT_CLK_MASK 0x1
69#define AUX_CLK_PLL3_MASK 0
70#define AUX_CLK_PLL1_MASK 1
71
72#define PERIP1_CLK_ENB ((unsigned int *)(MISC_BASE + 0x02C))
73/* PERIP1_CLK_ENB register masks */
74#define UART0_CLK_ENB 3
75#define UART1_CLK_ENB 4
76#define SSP0_CLK_ENB 5
77#define SSP1_CLK_ENB 6
78#define I2C_CLK_ENB 7
79#define JPEG_CLK_ENB 8
80#define FSMC_CLK_ENB 9
81#define FIRDA_CLK_ENB 10
82#define GPT2_CLK_ENB 11
83#define GPT3_CLK_ENB 12
84#define GPIO2_CLK_ENB 13
85#define SSP2_CLK_ENB 14
86#define ADC_CLK_ENB 15
87#define GPT1_CLK_ENB 11
88#define RTC_CLK_ENB 17
89#define GPIO1_CLK_ENB 18
90#define DMA_CLK_ENB 19
91#define SMI_CLK_ENB 21
92#define CLCD_CLK_ENB 22
93#define GMAC_CLK_ENB 23
94#define USBD_CLK_ENB 24
95#define USBH0_CLK_ENB 25
96#define USBH1_CLK_ENB 26
97
98#define SOC_CORE_ID ((unsigned int *)(MISC_BASE + 0x030))
99#define RAS_CLK_ENB ((unsigned int *)(MISC_BASE + 0x034))
100#define PERIP1_SOF_RST ((unsigned int *)(MISC_BASE + 0x038))
101/* PERIP1_SOF_RST register masks */
102#define JPEG_SOF_RST 8
103
104#define SOC_USER_ID ((unsigned int *)(MISC_BASE + 0x03C))
105#define RAS_SOF_RST ((unsigned int *)(MISC_BASE + 0x040))
106#define PRSC1_CLK_CFG ((unsigned int *)(MISC_BASE + 0x044))
107#define PRSC2_CLK_CFG ((unsigned int *)(MISC_BASE + 0x048))
108#define PRSC3_CLK_CFG ((unsigned int *)(MISC_BASE + 0x04C))
109/* gpt synthesizer register masks */
110#define GPT_MSCALE_SHIFT 0
111#define GPT_MSCALE_MASK 0xFFF
112#define GPT_NSCALE_SHIFT 12
113#define GPT_NSCALE_MASK 0xF
114
115#define AMEM_CLK_CFG ((unsigned int *)(MISC_BASE + 0x050))
116#define EXPI_CLK_CFG ((unsigned int *)(MISC_BASE + 0x054))
117#define CLCD_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x05C))
118#define FIRDA_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x060))
119#define UART_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x064))
120#define GMAC_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x068))
121#define RAS1_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x06C))
122#define RAS2_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x070))
123#define RAS3_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x074))
124#define RAS4_CLK_SYNT ((unsigned int *)(MISC_BASE + 0x078))
125/* aux clk synthesiser register masks for irda to ras4 */
126#define AUX_EQ_SEL_SHIFT 30
127#define AUX_EQ_SEL_MASK 1
128#define AUX_EQ1_SEL 0
129#define AUX_EQ2_SEL 1
130#define AUX_XSCALE_SHIFT 16
131#define AUX_XSCALE_MASK 0xFFF
132#define AUX_YSCALE_SHIFT 0
133#define AUX_YSCALE_MASK 0xFFF
134
135#define ICM1_ARB_CFG ((unsigned int *)(MISC_BASE + 0x07C))
136#define ICM2_ARB_CFG ((unsigned int *)(MISC_BASE + 0x080))
137#define ICM3_ARB_CFG ((unsigned int *)(MISC_BASE + 0x084))
138#define ICM4_ARB_CFG ((unsigned int *)(MISC_BASE + 0x088))
139#define ICM5_ARB_CFG ((unsigned int *)(MISC_BASE + 0x08C))
140#define ICM6_ARB_CFG ((unsigned int *)(MISC_BASE + 0x090))
141#define ICM7_ARB_CFG ((unsigned int *)(MISC_BASE + 0x094))
142#define ICM8_ARB_CFG ((unsigned int *)(MISC_BASE + 0x098))
143#define ICM9_ARB_CFG ((unsigned int *)(MISC_BASE + 0x09C))
144#define DMA_CHN_CFG ((unsigned int *)(MISC_BASE + 0x0A0))
145#define USB2_PHY_CFG ((unsigned int *)(MISC_BASE + 0x0A4))
146#define GMAC_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0A8))
147#define EXPI_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0AC))
148#define PRC1_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C0))
149#define PRC2_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C4))
150#define PRC3_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0C8))
151#define PRC4_LOCK_CTR ((unsigned int *)(MISC_BASE + 0x0CC))
152#define PRC1_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D0))
153#define PRC2_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D4))
154#define PRC3_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0D8))
155#define PRC4_IRQ_CTR ((unsigned int *)(MISC_BASE + 0x0DC))
156#define PWRDOWN_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0E0))
157#define COMPSSTL_1V8_CFG ((unsigned int *)(MISC_BASE + 0x0E4))
158#define COMPSSTL_2V5_CFG ((unsigned int *)(MISC_BASE + 0x0E8))
159#define COMPCOR_3V3_CFG ((unsigned int *)(MISC_BASE + 0x0EC))
160#define SSTLPAD_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F0))
161#define BIST1_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F4))
162#define BIST2_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0F8))
163#define BIST3_CFG_CTR ((unsigned int *)(MISC_BASE + 0x0FC))
164#define BIST4_CFG_CTR ((unsigned int *)(MISC_BASE + 0x100))
165#define BIST5_CFG_CTR ((unsigned int *)(MISC_BASE + 0x104))
166#define BIST1_STS_RES ((unsigned int *)(MISC_BASE + 0x108))
167#define BIST2_STS_RES ((unsigned int *)(MISC_BASE + 0x10C))
168#define BIST3_STS_RES ((unsigned int *)(MISC_BASE + 0x110))
169#define BIST4_STS_RES ((unsigned int *)(MISC_BASE + 0x114))
170#define BIST5_STS_RES ((unsigned int *)(MISC_BASE + 0x118))
171#define SYSERR_CFG_CTR ((unsigned int *)(MISC_BASE + 0x11C))
172
173#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h
new file mode 100644
index 000000000000..a835f5b6b182
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/spear.h
@@ -0,0 +1,173 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/spear.h
3 *
4 * SPEAr6xx Machine family specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SPEAR6XX_H
15#define __MACH_SPEAR6XX_H
16
17#include <mach/hardware.h>
18#include <mach/spear600.h>
19
20#define SPEAR6XX_ML_SDRAM_BASE 0x00000000
21#define SPEAR6XX_ML_SDRAM_SIZE 0x40000000
22
23/* ICM1 - Low speed connection */
24#define SPEAR6XX_ICM1_BASE 0xD0000000
25#define SPEAR6XX_ICM1_SIZE 0x08000000
26
27#define SPEAR6XX_ICM1_UART0_BASE 0xD0000000
28#define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
29#define SPEAR6XX_ICM1_UART0_SIZE 0x00080000
30
31#define SPEAR6XX_ICM1_UART1_BASE 0xD0080000
32#define SPEAR6XX_ICM1_UART1_SIZE 0x00080000
33
34#define SPEAR6XX_ICM1_SSP0_BASE 0xD0100000
35#define SPEAR6XX_ICM1_SSP0_SIZE 0x00080000
36
37#define SPEAR6XX_ICM1_SSP1_BASE 0xD0180000
38#define SPEAR6XX_ICM1_SSP1_SIZE 0x00080000
39
40#define SPEAR6XX_ICM1_I2C_BASE 0xD0200000
41#define SPEAR6XX_ICM1_I2C_SIZE 0x00080000
42
43#define SPEAR6XX_ICM1_JPEG_BASE 0xD0800000
44#define SPEAR6XX_ICM1_JPEG_SIZE 0x00800000
45
46#define SPEAR6XX_ICM1_IRDA_BASE 0xD1000000
47#define SPEAR6XX_ICM1_IRDA_SIZE 0x00800000
48
49#define SPEAR6XX_ICM1_FSMC_BASE 0xD1800000
50#define SPEAR6XX_ICM1_FSMC_SIZE 0x00800000
51
52#define SPEAR6XX_ICM1_NAND_BASE 0xD2000000
53#define SPEAR6XX_ICM1_NAND_SIZE 0x00800000
54
55#define SPEAR6XX_ICM1_SRAM_BASE 0xD2800000
56#define SPEAR6XX_ICM1_SRAM_SIZE 0x00800000
57
58/* ICM2 - Application Subsystem */
59#define SPEAR6XX_ICM2_BASE 0xD8000000
60#define SPEAR6XX_ICM2_SIZE 0x08000000
61
62#define SPEAR6XX_ICM2_TMR0_BASE 0xD8000000
63#define SPEAR6XX_ICM2_TMR0_SIZE 0x00080000
64
65#define SPEAR6XX_ICM2_TMR1_BASE 0xD8080000
66#define SPEAR6XX_ICM2_TMR1_SIZE 0x00080000
67
68#define SPEAR6XX_ICM2_GPIO_BASE 0xD8100000
69#define SPEAR6XX_ICM2_GPIO_SIZE 0x00080000
70
71#define SPEAR6XX_ICM2_SPI2_BASE 0xD8180000
72#define SPEAR6XX_ICM2_SPI2_SIZE 0x00080000
73
74#define SPEAR6XX_ICM2_ADC_BASE 0xD8200000
75#define SPEAR6XX_ICM2_ADC_SIZE 0x00080000
76
77/* ML-1, 2 - Multi Layer CPU Subsystem */
78#define SPEAR6XX_ML_CPU_BASE 0xF0000000
79#define SPEAR6XX_ML_CPU_SIZE 0x08000000
80
81#define SPEAR6XX_CPU_TMR_BASE 0xF0000000
82#define SPEAR6XX_CPU_TMR_SIZE 0x00100000
83
84#define SPEAR6XX_CPU_GPIO_BASE 0xF0100000
85#define SPEAR6XX_CPU_GPIO_SIZE 0x00100000
86
87#define SPEAR6XX_CPU_VIC_SEC_BASE 0xF1000000
88#define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
89#define SPEAR6XX_CPU_VIC_SEC_SIZE 0x00100000
90
91#define SPEAR6XX_CPU_VIC_PRI_BASE 0xF1100000
92#define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
93#define SPEAR6XX_CPU_VIC_PRI_SIZE 0x00100000
94
95/* ICM3 - Basic Subsystem */
96#define SPEAR6XX_ICM3_BASE 0xF8000000
97#define SPEAR6XX_ICM3_SIZE 0x08000000
98
99#define SPEAR6XX_ICM3_SMEM_BASE 0xF8000000
100#define SPEAR6XX_ICM3_SMEM_SIZE 0x04000000
101
102#define SPEAR6XX_ICM3_SMI_CTRL_BASE 0xFC000000
103#define SPEAR6XX_ICM3_SMI_CTRL_SIZE 0x00200000
104
105#define SPEAR6XX_ICM3_CLCD_BASE 0xFC200000
106#define SPEAR6XX_ICM3_CLCD_SIZE 0x00200000
107
108#define SPEAR6XX_ICM3_DMA_BASE 0xFC400000
109#define SPEAR6XX_ICM3_DMA_SIZE 0x00200000
110
111#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
112#define SPEAR6XX_ICM3_SDRAM_CTRL_SIZE 0x00200000
113
114#define SPEAR6XX_ICM3_TMR_BASE 0xFC800000
115#define SPEAR6XX_ICM3_TMR_SIZE 0x00080000
116
117#define SPEAR6XX_ICM3_WDT_BASE 0xFC880000
118#define SPEAR6XX_ICM3_WDT_SIZE 0x00080000
119
120#define SPEAR6XX_ICM3_RTC_BASE 0xFC900000
121#define SPEAR6XX_ICM3_RTC_SIZE 0x00080000
122
123#define SPEAR6XX_ICM3_GPIO_BASE 0xFC980000
124#define SPEAR6XX_ICM3_GPIO_SIZE 0x00080000
125
126#define SPEAR6XX_ICM3_SYS_CTRL_BASE 0xFCA00000
127#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
128#define SPEAR6XX_ICM3_SYS_CTRL_SIZE 0x00080000
129
130#define SPEAR6XX_ICM3_MISC_REG_BASE 0xFCA80000
131#define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
132#define SPEAR6XX_ICM3_MISC_REG_SIZE 0x00080000
133
134/* ICM4 - High Speed Connection */
135#define SPEAR6XX_ICM4_BASE 0xE0000000
136#define SPEAR6XX_ICM4_SIZE 0x08000000
137
138#define SPEAR6XX_ICM4_GMAC_BASE 0xE0800000
139#define SPEAR6XX_ICM4_GMAC_SIZE 0x00800000
140
141#define SPEAR6XX_ICM4_USBD_FIFO_BASE 0xE1000000
142#define SPEAR6XX_ICM4_USBD_FIFO_SIZE 0x00100000
143
144#define SPEAR6XX_ICM4_USBD_CSR_BASE 0xE1100000
145#define SPEAR6XX_ICM4_USBD_CSR_SIZE 0x00100000
146
147#define SPEAR6XX_ICM4_USBD_PLDT_BASE 0xE1200000
148#define SPEAR6XX_ICM4_USBD_PLDT_SIZE 0x00100000
149
150#define SPEAR6XX_ICM4_USB_EHCI0_BASE 0xE1800000
151#define SPEAR6XX_ICM4_USB_EHCI0_SIZE 0x00100000
152
153#define SPEAR6XX_ICM4_USB_OHCI0_BASE 0xE1900000
154#define SPEAR6XX_ICM4_USB_OHCI0_SIZE 0x00100000
155
156#define SPEAR6XX_ICM4_USB_EHCI1_BASE 0xE2000000
157#define SPEAR6XX_ICM4_USB_EHCI1_SIZE 0x00100000
158
159#define SPEAR6XX_ICM4_USB_OHCI1_BASE 0xE2100000
160#define SPEAR6XX_ICM4_USB_OHCI1_SIZE 0x00100000
161
162#define SPEAR6XX_ICM4_USB_ARB_BASE 0xE2800000
163#define SPEAR6XX_ICM4_USB_ARB_SIZE 0x00010000
164
165/* Debug uart for linux, will be used for debug and uncompress messages */
166#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE
167#define VA_SPEAR_DBG_UART_BASE VA_SPEAR6XX_ICM1_UART0_BASE
168
169/* Sysctl base for spear platform */
170#define SPEAR_SYS_CTRL_BASE SPEAR6XX_ICM3_SYS_CTRL_BASE
171#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR6XX_ICM3_SYS_CTRL_BASE
172
173#endif /* __MACH_SPEAR6XX_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/spear600.h b/arch/arm/mach-spear6xx/include/mach/spear600.h
new file mode 100644
index 000000000000..c068cc50b0fb
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/spear600.h
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/mach-spear66xx/include/mach/spear600.h
3 *
4 * SPEAr600 Machine specific definition
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifdef CONFIG_MACH_SPEAR600
15
16#ifndef __MACH_SPEAR600_H
17#define __MACH_SPEAR600_H
18
19#endif /* __MACH_SPEAR600_H */
20
21#endif /* CONFIG_MACH_SPEAR600 */
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h
new file mode 100644
index 000000000000..0b1d2be81cfb
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/system.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/system.h
3 *
4 * SPEAr6xx Machine family specific architecture functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SYSTEM_H
15#define __MACH_SYSTEM_H
16
17#include <plat/system.h>
18
19#endif /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/timex.h b/arch/arm/mach-spear6xx/include/mach/timex.h
new file mode 100644
index 000000000000..ac1c5b005695
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/timex.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/timex.h
3 *
4 * SPEAr6XX machine family specific timex definitions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_TIMEX_H
15#define __MACH_TIMEX_H
16
17#include <plat/timex.h>
18
19#endif /* __MACH_TIMEX_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/uncompress.h b/arch/arm/mach-spear6xx/include/mach/uncompress.h
new file mode 100644
index 000000000000..77f0765e21e1
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/uncompress.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_UNCOMPRESS_H
15#define __MACH_UNCOMPRESS_H
16
17#include <plat/uncompress.h>
18
19#endif /* __MACH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/vmalloc.h b/arch/arm/mach-spear6xx/include/mach/vmalloc.h
new file mode 100644
index 000000000000..4a0b56cb2a91
--- /dev/null
+++ b/arch/arm/mach-spear6xx/include/mach/vmalloc.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_VMALLOC_H
15#define __MACH_VMALLOC_H
16
17#include <plat/vmalloc.h>
18
19#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear6xx/spear600.c b/arch/arm/mach-spear6xx/spear600.c
new file mode 100644
index 000000000000..5c484c433dc1
--- /dev/null
+++ b/arch/arm/mach-spear6xx/spear600.c
@@ -0,0 +1,25 @@
1/*
2 * arch/arm/mach-spear6xx/spear600.c
3 *
4 * SPEAr600 machine source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/ptrace.h>
15#include <asm/irq.h>
16#include <mach/generic.h>
17#include <mach/spear.h>
18
19/* Add spear600 specific devices here */
20
21void __init spear600_init(void)
22{
23 /* call spear6xx family common init function */
24 spear6xx_init();
25}
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
new file mode 100644
index 000000000000..daff8d04f7b6
--- /dev/null
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -0,0 +1,51 @@
1/*
2 * arch/arm/mach-spear6xx/spear600_evb.c
3 *
4 * SPEAr600 evaluation board source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <asm/mach/arch.h>
15#include <asm/mach-types.h>
16#include <mach/generic.h>
17#include <mach/spear.h>
18
19static struct amba_device *amba_devs[] __initdata = {
20 &gpio_device[0],
21 &gpio_device[1],
22 &gpio_device[2],
23 &uart_device[0],
24 &uart_device[1],
25};
26
27static struct platform_device *plat_devs[] __initdata = {
28};
29
30static void __init spear600_evb_init(void)
31{
32 unsigned int i;
33
34 /* call spear600 machine init function */
35 spear600_init();
36
37 /* Add Platform Devices */
38 platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
39
40 /* Add Amba Devices */
41 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
42 amba_device_register(amba_devs[i], &iomem_resource);
43}
44
45MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
46 .boot_params = 0x00000100,
47 .map_io = spear6xx_map_io,
48 .init_irq = spear6xx_init_irq,
49 .timer = &spear_sys_timer,
50 .init_machine = spear600_evb_init,
51MACHINE_END
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
new file mode 100644
index 000000000000..b67e571d4bf7
--- /dev/null
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -0,0 +1,158 @@
1/*
2 * arch/arm/mach-spear6xx/spear6xx.c
3 *
4 * SPEAr6XX machines common source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/types.h>
15#include <linux/amba/pl061.h>
16#include <linux/types.h>
17#include <linux/ptrace.h>
18#include <linux/io.h>
19#include <asm/hardware/vic.h>
20#include <asm/irq.h>
21#include <asm/mach/arch.h>
22#include <mach/irqs.h>
23#include <mach/generic.h>
24#include <mach/spear.h>
25
26/* Add spear6xx machines common devices here */
27/* uart device registeration */
28struct amba_device uart_device[] = {
29 {
30 .dev = {
31 .init_name = "uart0",
32 },
33 .res = {
34 .start = SPEAR6XX_ICM1_UART0_BASE,
35 .end = SPEAR6XX_ICM1_UART0_BASE +
36 SPEAR6XX_ICM1_UART0_SIZE - 1,
37 .flags = IORESOURCE_MEM,
38 },
39 .irq = {IRQ_UART_0, NO_IRQ},
40 }, {
41 .dev = {
42 .init_name = "uart1",
43 },
44 .res = {
45 .start = SPEAR6XX_ICM1_UART1_BASE,
46 .end = SPEAR6XX_ICM1_UART1_BASE +
47 SPEAR6XX_ICM1_UART1_SIZE - 1,
48 .flags = IORESOURCE_MEM,
49 },
50 .irq = {IRQ_UART_1, NO_IRQ},
51 }
52};
53
54/* gpio device registeration */
55static struct pl061_platform_data gpio_plat_data[] = {
56 {
57 .gpio_base = 0,
58 .irq_base = SPEAR_GPIO0_INT_BASE,
59 }, {
60 .gpio_base = 8,
61 .irq_base = SPEAR_GPIO1_INT_BASE,
62 }, {
63 .gpio_base = 16,
64 .irq_base = SPEAR_GPIO2_INT_BASE,
65 },
66};
67
68struct amba_device gpio_device[] = {
69 {
70 .dev = {
71 .init_name = "gpio0",
72 .platform_data = &gpio_plat_data[0],
73 },
74 .res = {
75 .start = SPEAR6XX_CPU_GPIO_BASE,
76 .end = SPEAR6XX_CPU_GPIO_BASE +
77 SPEAR6XX_CPU_GPIO_SIZE - 1,
78 .flags = IORESOURCE_MEM,
79 },
80 .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
81 }, {
82 .dev = {
83 .init_name = "gpio1",
84 .platform_data = &gpio_plat_data[1],
85 },
86 .res = {
87 .start = SPEAR6XX_ICM3_GPIO_BASE,
88 .end = SPEAR6XX_ICM3_GPIO_BASE +
89 SPEAR6XX_ICM3_GPIO_SIZE - 1,
90 .flags = IORESOURCE_MEM,
91 },
92 .irq = {IRQ_BASIC_GPIO, NO_IRQ},
93 }, {
94 .dev = {
95 .init_name = "gpio2",
96 .platform_data = &gpio_plat_data[2],
97 },
98 .res = {
99 .start = SPEAR6XX_ICM2_GPIO_BASE,
100 .end = SPEAR6XX_ICM2_GPIO_BASE +
101 SPEAR6XX_ICM2_GPIO_SIZE - 1,
102 .flags = IORESOURCE_MEM,
103 },
104 .irq = {IRQ_APPL_GPIO, NO_IRQ},
105 }
106};
107
108/* This will add devices, and do machine specific tasks */
109void __init spear6xx_init(void)
110{
111 /* nothing to do for now */
112}
113
114/* This will initialize vic */
115void __init spear6xx_init_irq(void)
116{
117 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
118 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
119}
120
121/* Following will create static virtual/physical mappings */
122static struct map_desc spear6xx_io_desc[] __initdata = {
123 {
124 .virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
125 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
126 .length = SPEAR6XX_ICM1_UART0_SIZE,
127 .type = MT_DEVICE
128 }, {
129 .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
130 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
131 .length = SPEAR6XX_CPU_VIC_PRI_SIZE,
132 .type = MT_DEVICE
133 }, {
134 .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
135 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
136 .length = SPEAR6XX_CPU_VIC_SEC_SIZE,
137 .type = MT_DEVICE
138 }, {
139 .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
140 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
141 .length = SPEAR6XX_ICM3_MISC_REG_BASE,
142 .type = MT_DEVICE
143 }, {
144 .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
145 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
146 .length = SPEAR6XX_ICM3_MISC_REG_SIZE,
147 .type = MT_DEVICE
148 },
149};
150
151/* This will create static memory mapping for selected devices */
152void __init spear6xx_map_io(void)
153{
154 iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
155
156 /* This will initialize clock framework */
157 clk_init();
158}
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 77fbb1e0e528..88506d030596 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -102,11 +102,12 @@ int __devinit mmc_init(struct amba_device *adev)
102 * we have a regulator we can control instead. 102 * we have a regulator we can control instead.
103 */ 103 */
104 /* Nominally 2.85V on our platform */ 104 /* Nominally 2.85V on our platform */
105 mmci_card->mmc0_plat_data.f_max = 24000000;
105 mmci_card->mmc0_plat_data.status = mmc_status; 106 mmci_card->mmc0_plat_data.status = mmc_status;
106 mmci_card->mmc0_plat_data.gpio_wp = -1; 107 mmci_card->mmc0_plat_data.gpio_wp = -1;
107 mmci_card->mmc0_plat_data.gpio_cd = -1; 108 mmci_card->mmc0_plat_data.gpio_cd = -1;
108 mmci_card->mmc0_plat_data.capabilities = MMC_CAP_MMC_HIGHSPEED | 109 mmci_card->mmc0_plat_data.capabilities = MMC_CAP_MMC_HIGHSPEED |
109 MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA; 110 MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
110 111
111 mmcsd_device->platform_data = (void *) &mmci_card->mmc0_plat_data; 112 mmcsd_device->platform_data = (void *) &mmci_card->mmc0_plat_data;
112 113
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 03625d744857..6625e5bbf4d6 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -1,15 +1,42 @@
1menu "ST-Ericsson platform type" 1if ARCH_U8500
2 depends on ARCH_U8500
3 2
4comment "ST-Ericsson Multicore Mobile Platforms" 3config UX500_SOC_COMMON
5 4 bool
6config MACH_U8500_MOP
7 bool "U8500 Early Development platform"
8 default y 5 default y
9 select ARM_GIC 6 select ARM_GIC
10 select HAS_MTU 7 select HAS_MTU
8 select NOMADIK_GPIO
9
10config UX500_SOC_DB8500
11 bool
12
13config UX500_SOC_DB5500
14 bool
15
16choice
17 prompt "Ux500 target platform"
18 default MACH_U8500_MOP
19
20config MACH_U8500_MOP
21 bool "U8500 Development platform"
22 select UX500_SOC_DB8500
11 help 23 help
12 Include support for mop500 development platform 24 Include support for mop500 development platform
13 based on U8500 architecture. The platform is based 25 based on U8500 architecture. The platform is based
14 on early drop silicon version of 8500. 26 on early drop silicon version of 8500.
15endmenu 27
28config MACH_U5500
29 bool "U5500 Development platform"
30 select UX500_SOC_DB5500
31 help
32 Include support for the U5500 development platform.
33endchoice
34
35config UX500_DEBUG_UART
36 int "Ux500 UART to use for low-level debug"
37 default 2
38 help
39 Choose the UART on which kernel low-level debug messages should be
40 output.
41
42endif
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index 95e6e24c0042..c7bc4199e3a8 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -2,7 +2,9 @@
2# Makefile for the linux kernel, U8500 machine. 2# Makefile for the linux kernel, U8500 machine.
3# 3#
4 4
5obj-y := clock.o 5obj-y := clock.o cpu.o devices.o
6obj-$(CONFIG_ARCH_U8500) += cpu-u8500.o 6obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o devices-db5500.o
7obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
7obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o 8obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o
9obj-$(CONFIG_MACH_U5500) += board-u5500.o
8obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o 10obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 803aec1d6728..072196c57263 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -17,37 +17,14 @@
17#include <linux/amba/pl022.h> 17#include <linux/amba/pl022.h>
18#include <linux/spi/spi.h> 18#include <linux/spi/spi.h>
19 19
20#include <asm/localtimer.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
24#include <plat/mtu.h>
25#include <plat/i2c.h> 23#include <plat/i2c.h>
26 24
27#include <mach/hardware.h> 25#include <mach/hardware.h>
28#include <mach/setup.h> 26#include <mach/setup.h>
29 27#include <mach/devices.h>
30#define __MEM_4K_RESOURCE(x) \
31 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
32
33/* These are active devices on this board */
34static struct amba_device uart0_device = {
35 .dev = { .init_name = "uart0" },
36 __MEM_4K_RESOURCE(U8500_UART0_BASE),
37 .irq = {IRQ_UART0, NO_IRQ},
38};
39
40static struct amba_device uart1_device = {
41 .dev = { .init_name = "uart1" },
42 __MEM_4K_RESOURCE(U8500_UART1_BASE),
43 .irq = {IRQ_UART1, NO_IRQ},
44};
45
46static struct amba_device uart2_device = {
47 .dev = { .init_name = "uart2" },
48 __MEM_4K_RESOURCE(U8500_UART2_BASE),
49 .irq = {IRQ_UART2, NO_IRQ},
50};
51 28
52static void ab4500_spi_cs_control(u32 command) 29static void ab4500_spi_cs_control(u32 command)
53{ 30{
@@ -93,55 +70,8 @@ static struct pl022_ssp_controller ssp0_platform_data = {
93 .num_chipselect = 5, 70 .num_chipselect = 5,
94}; 71};
95 72
96static struct amba_device pl022_device = {
97 .dev = {
98 .coherent_dma_mask = ~0,
99 .init_name = "pl022",
100 .platform_data = &ssp0_platform_data,
101 },
102 .res = {
103 .start = U8500_SSP0_BASE,
104 .end = U8500_SSP0_BASE + SZ_4K - 1,
105 .flags = IORESOURCE_MEM,
106 },
107 .irq = {IRQ_SSP0, NO_IRQ },
108 /* ST-Ericsson modified id */
109 .periphid = SSP_PER_ID,
110};
111
112static struct amba_device pl031_device = {
113 .dev = {
114 .init_name = "pl031",
115 },
116 .res = {
117 .start = U8500_RTC_BASE,
118 .end = U8500_RTC_BASE + SZ_4K - 1,
119 .flags = IORESOURCE_MEM,
120 },
121 .irq = {IRQ_RTC_RTT, NO_IRQ},
122};
123
124#define U8500_I2C_RESOURCES(id, size) \
125static struct resource u8500_i2c_resources_##id[] = { \
126 [0] = { \
127 .start = U8500_I2C##id##_BASE, \
128 .end = U8500_I2C##id##_BASE + size - 1, \
129 .flags = IORESOURCE_MEM, \
130 }, \
131 [1] = { \
132 .start = IRQ_I2C##id, \
133 .end = IRQ_I2C##id, \
134 .flags = IORESOURCE_IRQ \
135 } \
136}
137
138U8500_I2C_RESOURCES(0, SZ_4K);
139U8500_I2C_RESOURCES(1, SZ_4K);
140U8500_I2C_RESOURCES(2, SZ_4K);
141U8500_I2C_RESOURCES(3, SZ_4K);
142
143#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \ 73#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
144static struct nmk_i2c_controller u8500_i2c_##id = { \ 74static struct nmk_i2c_controller u8500_i2c##id##_data = { \
145 /* \ 75 /* \
146 * slave data setup time, which is \ 76 * slave data setup time, which is \
147 * 250 ns,100ns,10ns which is 14,6,2 \ 77 * 250 ns,100ns,10ns which is 14,6,2 \
@@ -169,58 +99,32 @@ U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
169U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD); 99U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
170U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD); 100U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
171 101
172#define U8500_I2C_PDEVICE(cid) \
173static struct platform_device i2c_controller##cid = { \
174 .name = "nmk-i2c", \
175 .id = cid, \
176 .num_resources = 2, \
177 .resource = u8500_i2c_resources_##cid, \
178 .dev = { \
179 .platform_data = &u8500_i2c_##cid \
180 } \
181}
182
183U8500_I2C_PDEVICE(0);
184U8500_I2C_PDEVICE(1);
185U8500_I2C_PDEVICE(2);
186U8500_I2C_PDEVICE(3);
187
188static struct amba_device *amba_devs[] __initdata = { 102static struct amba_device *amba_devs[] __initdata = {
189 &uart0_device, 103 &ux500_uart0_device,
190 &uart1_device, 104 &ux500_uart1_device,
191 &uart2_device, 105 &ux500_uart2_device,
192 &pl022_device, 106 &u8500_ssp0_device,
193 &pl031_device,
194}; 107};
195 108
196/* add any platform devices here - TODO */ 109/* add any platform devices here - TODO */
197static struct platform_device *platform_devs[] __initdata = { 110static struct platform_device *platform_devs[] __initdata = {
198 &i2c_controller0, 111 &u8500_i2c0_device,
199 &i2c_controller1, 112 &ux500_i2c1_device,
200 &i2c_controller2, 113 &ux500_i2c2_device,
201 &i2c_controller3, 114 &ux500_i2c3_device,
202};
203
204static void __init u8500_timer_init(void)
205{
206#ifdef CONFIG_LOCAL_TIMERS
207 /* Setup the local timer base */
208 twd_base = __io_address(U8500_TWD_BASE);
209#endif
210 /* Setup the MTU base */
211 mtu_base = __io_address(U8500_MTU0_BASE);
212
213 nmdk_timer_init();
214}
215
216static struct sys_timer u8500_timer = {
217 .init = u8500_timer_init,
218}; 115};
219 116
220static void __init u8500_init_machine(void) 117static void __init u8500_init_machine(void)
221{ 118{
222 int i; 119 int i;
223 120
121 u8500_i2c0_device.dev.platform_data = &u8500_i2c0_data;
122 ux500_i2c1_device.dev.platform_data = &u8500_i2c1_data;
123 ux500_i2c2_device.dev.platform_data = &u8500_i2c2_data;
124 ux500_i2c3_device.dev.platform_data = &u8500_i2c3_data;
125
126 u8500_ssp0_device.dev.platform_data = &ssp0_platform_data;
127
224 /* Register the active AMBA devices on this board */ 128 /* Register the active AMBA devices on this board */
225 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) 129 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
226 amba_device_register(amba_devs[i], &iomem_resource); 130 amba_device_register(amba_devs[i], &iomem_resource);
@@ -239,8 +143,8 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
239 .io_pg_offst = (IO_ADDRESS(U8500_UART2_BASE) >> 18) & 0xfffc, 143 .io_pg_offst = (IO_ADDRESS(U8500_UART2_BASE) >> 18) & 0xfffc,
240 .boot_params = 0x100, 144 .boot_params = 0x100,
241 .map_io = u8500_map_io, 145 .map_io = u8500_map_io,
242 .init_irq = u8500_init_irq, 146 .init_irq = ux500_init_irq,
243 /* we re-use nomadik timer here */ 147 /* we re-use nomadik timer here */
244 .timer = &u8500_timer, 148 .timer = &ux500_timer,
245 .init_machine = u8500_init_machine, 149 .init_machine = u8500_init_machine,
246MACHINE_END 150MACHINE_END
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
new file mode 100644
index 000000000000..4430e69cf538
--- /dev/null
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -0,0 +1,41 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#include <linux/init.h>
9#include <linux/platform_device.h>
10#include <linux/amba/bus.h>
11#include <linux/gpio.h>
12
13#include <asm/mach/arch.h>
14#include <asm/mach-types.h>
15
16#include <mach/hardware.h>
17#include <mach/devices.h>
18#include <mach/setup.h>
19
20static struct amba_device *amba_board_devs[] __initdata = {
21 &ux500_uart0_device,
22 &ux500_uart1_device,
23 &ux500_uart2_device,
24};
25
26static void __init u5500_init_machine(void)
27{
28 u5500_init_devices();
29
30 amba_add_devices(amba_board_devs, ARRAY_SIZE(amba_board_devs));
31}
32
33MACHINE_START(U8500, "ST-Ericsson U5500 Platform")
34 .phys_io = UX500_UART0_BASE,
35 .io_pg_offst = (IO_ADDRESS(UX500_UART0_BASE) >> 18) & 0xfffc,
36 .boot_params = 0x00000100,
37 .map_io = u5500_map_io,
38 .init_irq = ux500_init_irq,
39 .timer = &ux500_timer,
40 .init_machine = u5500_init_machine,
41MACHINE_END
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 8359a73d0041..1b2c9890e8b4 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (C) 2009 ST-Ericsson 2 * Copyright (C) 2009 ST-Ericsson
3 * heavily based on realview platform 3 * Copyright (C) 2009 STMicroelectronics
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as 6 * it under the terms of the GNU General Public License version 2 as
@@ -12,33 +12,130 @@
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/err.h> 13#include <linux/err.h>
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/mutex.h> 15#include <linux/io.h>
16 16
17#include <asm/clkdev.h> 17#include <asm/clkdev.h>
18 18
19/* currently the clk structure 19#include <mach/hardware.h>
20 * just supports rate. This would 20#include "clock.h"
21 * be extended as and when new devices are 21
22 * added - TODO 22#define PRCC_PCKEN 0x00
23 */ 23#define PRCC_PCKDIS 0x04
24struct clk { 24#define PRCC_KCKEN 0x08
25 unsigned long rate; 25#define PRCC_KCKDIS 0x0C
26}; 26
27#define PRCM_YYCLKEN0_MGT_SET 0x510
28#define PRCM_YYCLKEN1_MGT_SET 0x514
29#define PRCM_YYCLKEN0_MGT_CLR 0x518
30#define PRCM_YYCLKEN1_MGT_CLR 0x51C
31#define PRCM_YYCLKEN0_MGT_VAL 0x520
32#define PRCM_YYCLKEN1_MGT_VAL 0x524
33
34#define PRCM_SVAMMDSPCLK_MGT 0x008
35#define PRCM_SIAMMDSPCLK_MGT 0x00C
36#define PRCM_SGACLK_MGT 0x014
37#define PRCM_UARTCLK_MGT 0x018
38#define PRCM_MSP02CLK_MGT 0x01C
39#define PRCM_MSP1CLK_MGT 0x288
40#define PRCM_I2CCLK_MGT 0x020
41#define PRCM_SDMMCCLK_MGT 0x024
42#define PRCM_SLIMCLK_MGT 0x028
43#define PRCM_PER1CLK_MGT 0x02C
44#define PRCM_PER2CLK_MGT 0x030
45#define PRCM_PER3CLK_MGT 0x034
46#define PRCM_PER5CLK_MGT 0x038
47#define PRCM_PER6CLK_MGT 0x03C
48#define PRCM_PER7CLK_MGT 0x040
49#define PRCM_LCDCLK_MGT 0x044
50#define PRCM_BMLCLK_MGT 0x04C
51#define PRCM_HSITXCLK_MGT 0x050
52#define PRCM_HSIRXCLK_MGT 0x054
53#define PRCM_HDMICLK_MGT 0x058
54#define PRCM_APEATCLK_MGT 0x05C
55#define PRCM_APETRACECLK_MGT 0x060
56#define PRCM_MCDECLK_MGT 0x064
57#define PRCM_IPI2CCLK_MGT 0x068
58#define PRCM_DSIALTCLK_MGT 0x06C
59#define PRCM_DMACLK_MGT 0x074
60#define PRCM_B2R2CLK_MGT 0x078
61#define PRCM_TVCLK_MGT 0x07C
62#define PRCM_UNIPROCLK_MGT 0x278
63#define PRCM_SSPCLK_MGT 0x280
64#define PRCM_RNGCLK_MGT 0x284
65#define PRCM_UICCCLK_MGT 0x27C
66
67#define PRCM_MGT_ENABLE (1 << 8)
68
69static DEFINE_SPINLOCK(clocks_lock);
70
71static void __clk_enable(struct clk *clk)
72{
73 if (clk->enabled++ == 0) {
74 if (clk->parent_cluster)
75 __clk_enable(clk->parent_cluster);
76
77 if (clk->parent_periph)
78 __clk_enable(clk->parent_periph);
79
80 if (clk->ops && clk->ops->enable)
81 clk->ops->enable(clk);
82 }
83}
27 84
28int clk_enable(struct clk *clk) 85int clk_enable(struct clk *clk)
29{ 86{
87 unsigned long flags;
88
89 spin_lock_irqsave(&clocks_lock, flags);
90 __clk_enable(clk);
91 spin_unlock_irqrestore(&clocks_lock, flags);
92
30 return 0; 93 return 0;
31} 94}
32EXPORT_SYMBOL(clk_enable); 95EXPORT_SYMBOL(clk_enable);
33 96
97static void __clk_disable(struct clk *clk)
98{
99 if (--clk->enabled == 0) {
100 if (clk->ops && clk->ops->disable)
101 clk->ops->disable(clk);
102
103 if (clk->parent_periph)
104 __clk_disable(clk->parent_periph);
105
106 if (clk->parent_cluster)
107 __clk_disable(clk->parent_cluster);
108 }
109}
110
34void clk_disable(struct clk *clk) 111void clk_disable(struct clk *clk)
35{ 112{
113 unsigned long flags;
114
115 WARN_ON(!clk->enabled);
116
117 spin_lock_irqsave(&clocks_lock, flags);
118 __clk_disable(clk);
119 spin_unlock_irqrestore(&clocks_lock, flags);
36} 120}
37EXPORT_SYMBOL(clk_disable); 121EXPORT_SYMBOL(clk_disable);
38 122
39unsigned long clk_get_rate(struct clk *clk) 123unsigned long clk_get_rate(struct clk *clk)
40{ 124{
41 return clk->rate; 125 unsigned long rate;
126
127 if (clk->ops && clk->ops->get_rate)
128 return clk->ops->get_rate(clk);
129
130 rate = clk->rate;
131 if (!rate) {
132 if (clk->parent_periph)
133 rate = clk_get_rate(clk->parent_periph);
134 else if (clk->parent_cluster)
135 rate = clk_get_rate(clk->parent_cluster);
136 }
137
138 return rate;
42} 139}
43EXPORT_SYMBOL(clk_get_rate); 140EXPORT_SYMBOL(clk_get_rate);
44 141
@@ -56,37 +153,373 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
56} 153}
57EXPORT_SYMBOL(clk_set_rate); 154EXPORT_SYMBOL(clk_set_rate);
58 155
59/* ssp clock */ 156static void clk_prcmu_enable(struct clk *clk)
60static struct clk ssp_clk = { 157{
61 .rate = 48000000, 158 void __iomem *cg_set_reg = __io_address(U8500_PRCMU_BASE)
159 + PRCM_YYCLKEN0_MGT_SET + clk->prcmu_cg_off;
160
161 writel(1 << clk->prcmu_cg_bit, cg_set_reg);
162}
163
164static void clk_prcmu_disable(struct clk *clk)
165{
166 void __iomem *cg_clr_reg = __io_address(U8500_PRCMU_BASE)
167 + PRCM_YYCLKEN0_MGT_CLR + clk->prcmu_cg_off;
168
169 writel(1 << clk->prcmu_cg_bit, cg_clr_reg);
170}
171
172/* ED doesn't have the combined set/clr registers */
173static void clk_prcmu_ed_enable(struct clk *clk)
174{
175 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
176 + clk->prcmu_cg_mgt;
177
178 writel(readl(addr) | PRCM_MGT_ENABLE, addr);
179}
180
181static void clk_prcmu_ed_disable(struct clk *clk)
182{
183 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
184 + clk->prcmu_cg_mgt;
185
186 writel(readl(addr) & ~PRCM_MGT_ENABLE, addr);
187}
188
189static struct clkops clk_prcmu_ops = {
190 .enable = clk_prcmu_enable,
191 .disable = clk_prcmu_disable,
62}; 192};
63 193
64/* fixed clock */ 194static unsigned int clkrst_base[] = {
65static struct clk f38_clk = { 195 [1] = U8500_CLKRST1_BASE,
66 .rate = 38400000, 196 [2] = U8500_CLKRST2_BASE,
197 [3] = U8500_CLKRST3_BASE,
198 [5] = U8500_CLKRST5_BASE,
199 [6] = U8500_CLKRST6_BASE,
200 [7] = U8500_CLKRST7_BASE_ED,
67}; 201};
68 202
69static struct clk_lookup lookups[] = { 203static void clk_prcc_enable(struct clk *clk)
70 { 204{
71 /* UART0 */ 205 void __iomem *addr = __io_address(clkrst_base[clk->cluster]);
72 .dev_id = "uart0", 206
73 .clk = &f38_clk, 207 if (clk->prcc_kernel != -1)
74 }, { /* UART1 */ 208 writel(1 << clk->prcc_kernel, addr + PRCC_KCKEN);
75 .dev_id = "uart1", 209
76 .clk = &f38_clk, 210 if (clk->prcc_bus != -1)
77 }, { /* UART2 */ 211 writel(1 << clk->prcc_bus, addr + PRCC_PCKEN);
78 .dev_id = "uart2", 212}
79 .clk = &f38_clk, 213
80 }, { /* SSP */ 214static void clk_prcc_disable(struct clk *clk)
81 .dev_id = "pl022", 215{
82 .clk = &ssp_clk, 216 void __iomem *addr = __io_address(clkrst_base[clk->cluster]);
83 } 217
218 if (clk->prcc_bus != -1)
219 writel(1 << clk->prcc_bus, addr + PRCC_PCKDIS);
220
221 if (clk->prcc_kernel != -1)
222 writel(1 << clk->prcc_kernel, addr + PRCC_KCKDIS);
223}
224
225static struct clkops clk_prcc_ops = {
226 .enable = clk_prcc_enable,
227 .disable = clk_prcc_disable,
228};
229
230static struct clk clk_32khz = {
231 .rate = 32000,
232};
233
234/*
235 * PRCMU level clock gating
236 */
237
238/* Bank 0 */
239static DEFINE_PRCMU_CLK(svaclk, 0x0, 2, SVAMMDSPCLK);
240static DEFINE_PRCMU_CLK(siaclk, 0x0, 3, SIAMMDSPCLK);
241static DEFINE_PRCMU_CLK(sgaclk, 0x0, 4, SGACLK);
242static DEFINE_PRCMU_CLK_RATE(uartclk, 0x0, 5, UARTCLK, 38400000);
243static DEFINE_PRCMU_CLK(msp02clk, 0x0, 6, MSP02CLK);
244static DEFINE_PRCMU_CLK(msp1clk, 0x0, 7, MSP1CLK); /* v1 */
245static DEFINE_PRCMU_CLK_RATE(i2cclk, 0x0, 8, I2CCLK, 48000000);
246static DEFINE_PRCMU_CLK_RATE(sdmmcclk, 0x0, 9, SDMMCCLK, 50000000);
247static DEFINE_PRCMU_CLK(slimclk, 0x0, 10, SLIMCLK);
248static DEFINE_PRCMU_CLK(per1clk, 0x0, 11, PER1CLK);
249static DEFINE_PRCMU_CLK(per2clk, 0x0, 12, PER2CLK);
250static DEFINE_PRCMU_CLK(per3clk, 0x0, 13, PER3CLK);
251static DEFINE_PRCMU_CLK(per5clk, 0x0, 14, PER5CLK);
252static DEFINE_PRCMU_CLK_RATE(per6clk, 0x0, 15, PER6CLK, 133330000);
253static DEFINE_PRCMU_CLK_RATE(per7clk, 0x0, 16, PER7CLK, 100000000);
254static DEFINE_PRCMU_CLK(lcdclk, 0x0, 17, LCDCLK);
255static DEFINE_PRCMU_CLK(bmlclk, 0x0, 18, BMLCLK);
256static DEFINE_PRCMU_CLK(hsitxclk, 0x0, 19, HSITXCLK);
257static DEFINE_PRCMU_CLK(hsirxclk, 0x0, 20, HSIRXCLK);
258static DEFINE_PRCMU_CLK(hdmiclk, 0x0, 21, HDMICLK);
259static DEFINE_PRCMU_CLK(apeatclk, 0x0, 22, APEATCLK);
260static DEFINE_PRCMU_CLK(apetraceclk, 0x0, 23, APETRACECLK);
261static DEFINE_PRCMU_CLK(mcdeclk, 0x0, 24, MCDECLK);
262static DEFINE_PRCMU_CLK(ipi2clk, 0x0, 25, IPI2CCLK);
263static DEFINE_PRCMU_CLK(dsialtclk, 0x0, 26, DSIALTCLK); /* v1 */
264static DEFINE_PRCMU_CLK(dmaclk, 0x0, 27, DMACLK);
265static DEFINE_PRCMU_CLK(b2r2clk, 0x0, 28, B2R2CLK);
266static DEFINE_PRCMU_CLK(tvclk, 0x0, 29, TVCLK);
267static DEFINE_PRCMU_CLK(uniproclk, 0x0, 30, UNIPROCLK); /* v1 */
268static DEFINE_PRCMU_CLK_RATE(sspclk, 0x0, 31, SSPCLK, 48000000); /* v1 */
269
270/* Bank 1 */
271static DEFINE_PRCMU_CLK(rngclk, 0x4, 0, RNGCLK); /* v1 */
272static DEFINE_PRCMU_CLK(uiccclk, 0x4, 1, UICCCLK); /* v1 */
273
274/*
275 * PRCC level clock gating
276 * Format: per#, clk, PCKEN bit, KCKEN bit, parent
277 */
278
279/* Peripheral Cluster #1 */
280static DEFINE_PRCC_CLK(1, i2c4, 10, 9, &clk_i2cclk);
281static DEFINE_PRCC_CLK(1, gpio0, 9, -1, NULL);
282static DEFINE_PRCC_CLK(1, slimbus0, 8, 8, &clk_slimclk);
283static DEFINE_PRCC_CLK(1, spi3_ed, 7, 7, NULL);
284static DEFINE_PRCC_CLK(1, spi3_v1, 7, -1, NULL);
285static DEFINE_PRCC_CLK(1, i2c2, 6, 6, &clk_i2cclk);
286static DEFINE_PRCC_CLK(1, sdi0, 5, 5, &clk_sdmmcclk);
287static DEFINE_PRCC_CLK(1, msp1_ed, 4, 4, &clk_msp02clk);
288static DEFINE_PRCC_CLK(1, msp1_v1, 4, 4, &clk_msp1clk);
289static DEFINE_PRCC_CLK(1, msp0, 3, 3, &clk_msp02clk);
290static DEFINE_PRCC_CLK(1, i2c1, 2, 2, &clk_i2cclk);
291static DEFINE_PRCC_CLK(1, uart1, 1, 1, &clk_uartclk);
292static DEFINE_PRCC_CLK(1, uart0, 0, 0, &clk_uartclk);
293
294/* Peripheral Cluster #2 */
295
296static DEFINE_PRCC_CLK(2, gpio1_ed, 12, -1, NULL);
297static DEFINE_PRCC_CLK(2, ssitx_ed, 11, -1, NULL);
298static DEFINE_PRCC_CLK(2, ssirx_ed, 10, -1, NULL);
299static DEFINE_PRCC_CLK(2, spi0_ed, 9, -1, NULL);
300static DEFINE_PRCC_CLK(2, sdi3_ed, 8, 6, &clk_sdmmcclk);
301static DEFINE_PRCC_CLK(2, sdi1_ed, 7, 5, &clk_sdmmcclk);
302static DEFINE_PRCC_CLK(2, msp2_ed, 6, 4, &clk_msp02clk);
303static DEFINE_PRCC_CLK(2, sdi4_ed, 4, 2, &clk_sdmmcclk);
304static DEFINE_PRCC_CLK(2, pwl_ed, 3, 1, NULL);
305static DEFINE_PRCC_CLK(2, spi1_ed, 2, -1, NULL);
306static DEFINE_PRCC_CLK(2, spi2_ed, 1, -1, NULL);
307static DEFINE_PRCC_CLK(2, i2c3_ed, 0, 0, &clk_i2cclk);
308
309static DEFINE_PRCC_CLK(2, gpio1_v1, 11, -1, NULL);
310static DEFINE_PRCC_CLK(2, ssitx_v1, 10, 7, NULL);
311static DEFINE_PRCC_CLK(2, ssirx_v1, 9, 6, NULL);
312static DEFINE_PRCC_CLK(2, spi0_v1, 8, -1, NULL);
313static DEFINE_PRCC_CLK(2, sdi3_v1, 7, 5, &clk_sdmmcclk);
314static DEFINE_PRCC_CLK(2, sdi1_v1, 6, 4, &clk_sdmmcclk);
315static DEFINE_PRCC_CLK(2, msp2_v1, 5, 3, &clk_msp02clk);
316static DEFINE_PRCC_CLK(2, sdi4_v1, 4, 2, &clk_sdmmcclk);
317static DEFINE_PRCC_CLK(2, pwl_v1, 3, 1, NULL);
318static DEFINE_PRCC_CLK(2, spi1_v1, 2, -1, NULL);
319static DEFINE_PRCC_CLK(2, spi2_v1, 1, -1, NULL);
320static DEFINE_PRCC_CLK(2, i2c3_v1, 0, 0, &clk_i2cclk);
321
322/* Peripheral Cluster #3 */
323static DEFINE_PRCC_CLK(3, gpio2, 8, -1, NULL);
324static DEFINE_PRCC_CLK(3, sdi5, 7, 7, &clk_sdmmcclk);
325static DEFINE_PRCC_CLK(3, uart2, 6, 6, &clk_uartclk);
326static DEFINE_PRCC_CLK(3, ske, 5, 5, &clk_32khz);
327static DEFINE_PRCC_CLK(3, sdi2, 4, 4, &clk_sdmmcclk);
328static DEFINE_PRCC_CLK(3, i2c0, 3, 3, &clk_i2cclk);
329static DEFINE_PRCC_CLK(3, ssp1_ed, 2, 2, &clk_i2cclk);
330static DEFINE_PRCC_CLK(3, ssp0_ed, 1, 1, &clk_i2cclk);
331static DEFINE_PRCC_CLK(3, ssp1_v1, 2, 2, &clk_sspclk);
332static DEFINE_PRCC_CLK(3, ssp0_v1, 1, 1, &clk_sspclk);
333static DEFINE_PRCC_CLK(3, fsmc, 0, -1, NULL);
334
335/* Peripheral Cluster #4 is in the always on domain */
336
337/* Peripheral Cluster #5 */
338static DEFINE_PRCC_CLK(5, gpio3, 1, -1, NULL);
339static DEFINE_PRCC_CLK(5, usb_ed, 0, 0, &clk_i2cclk);
340static DEFINE_PRCC_CLK(5, usb_v1, 0, 0, NULL);
341
342/* Peripheral Cluster #6 */
343
344static DEFINE_PRCC_CLK(6, mtu1_v1, 8, -1, NULL);
345static DEFINE_PRCC_CLK(6, mtu0_v1, 7, -1, NULL);
346static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL);
347static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL);
348static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL);
349static DEFINE_PRCC_CLK(6, unipro_v1, 4, 1, &clk_uniproclk);
350static DEFINE_PRCC_CLK(6, cryp1_ed, 4, -1, NULL);
351static DEFINE_PRCC_CLK(6, pka, 3, -1, NULL);
352static DEFINE_PRCC_CLK(6, hash0, 2, -1, NULL);
353static DEFINE_PRCC_CLK(6, cryp0, 1, -1, NULL);
354static DEFINE_PRCC_CLK(6, rng_ed, 0, 0, &clk_i2cclk);
355static DEFINE_PRCC_CLK(6, rng_v1, 0, 0, &clk_rngclk);
356
357/* Peripheral Cluster #7 */
358
359static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL);
360static DEFINE_PRCC_CLK(7, mtu1_ed, 3, -1, NULL);
361static DEFINE_PRCC_CLK(7, mtu0_ed, 2, -1, NULL);
362static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL);
363static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL);
364
365static struct clk_lookup u8500_common_clks[] = {
366 /* Peripheral Cluster #1 */
367 CLK(gpio0, "gpio.0", NULL),
368 CLK(gpio0, "gpio.1", NULL),
369 CLK(slimbus0, "slimbus0", NULL),
370 CLK(i2c2, "nmk-i2c.2", NULL),
371 CLK(sdi0, "sdi0", NULL),
372 CLK(msp0, "msp0", NULL),
373 CLK(i2c1, "nmk-i2c.1", NULL),
374 CLK(uart1, "uart1", NULL),
375 CLK(uart0, "uart0", NULL),
376
377 /* Peripheral Cluster #3 */
378 CLK(gpio2, "gpio.2", NULL),
379 CLK(gpio2, "gpio.3", NULL),
380 CLK(gpio2, "gpio.4", NULL),
381 CLK(gpio2, "gpio.5", NULL),
382 CLK(sdi5, "sdi5", NULL),
383 CLK(uart2, "uart2", NULL),
384 CLK(ske, "ske", NULL),
385 CLK(sdi2, "sdi2", NULL),
386 CLK(i2c0, "nmk-i2c.0", NULL),
387 CLK(fsmc, "fsmc", NULL),
388
389 /* Peripheral Cluster #5 */
390 CLK(gpio3, "gpio.8", NULL),
391
392 /* Peripheral Cluster #6 */
393 CLK(hash1, "hash1", NULL),
394 CLK(pka, "pka", NULL),
395 CLK(hash0, "hash0", NULL),
396 CLK(cryp0, "cryp0", NULL),
397
398 /* PRCMU level clock gating */
399
400 /* Bank 0 */
401 CLK(svaclk, "sva", NULL),
402 CLK(siaclk, "sia", NULL),
403 CLK(sgaclk, "sga", NULL),
404 CLK(slimclk, "slim", NULL),
405 CLK(lcdclk, "lcd", NULL),
406 CLK(bmlclk, "bml", NULL),
407 CLK(hsitxclk, "stm-hsi.0", NULL),
408 CLK(hsirxclk, "stm-hsi.1", NULL),
409 CLK(hdmiclk, "hdmi", NULL),
410 CLK(apeatclk, "apeat", NULL),
411 CLK(apetraceclk, "apetrace", NULL),
412 CLK(mcdeclk, "mcde", NULL),
413 CLK(ipi2clk, "ipi2", NULL),
414 CLK(dmaclk, "dma40", NULL),
415 CLK(b2r2clk, "b2r2", NULL),
416 CLK(tvclk, "tv", NULL),
417};
418
419static struct clk_lookup u8500_ed_clks[] = {
420 /* Peripheral Cluster #1 */
421 CLK(spi3_ed, "spi3", NULL),
422 CLK(msp1_ed, "msp1", NULL),
423
424 /* Peripheral Cluster #2 */
425 CLK(gpio1_ed, "gpio.6", NULL),
426 CLK(gpio1_ed, "gpio.7", NULL),
427 CLK(ssitx_ed, "ssitx", NULL),
428 CLK(ssirx_ed, "ssirx", NULL),
429 CLK(spi0_ed, "spi0", NULL),
430 CLK(sdi3_ed, "sdi3", NULL),
431 CLK(sdi1_ed, "sdi1", NULL),
432 CLK(msp2_ed, "msp2", NULL),
433 CLK(sdi4_ed, "sdi4", NULL),
434 CLK(pwl_ed, "pwl", NULL),
435 CLK(spi1_ed, "spi1", NULL),
436 CLK(spi2_ed, "spi2", NULL),
437 CLK(i2c3_ed, "nmk-i2c.3", NULL),
438
439 /* Peripheral Cluster #3 */
440 CLK(ssp1_ed, "ssp1", NULL),
441 CLK(ssp0_ed, "ssp0", NULL),
442
443 /* Peripheral Cluster #5 */
444 CLK(usb_ed, "musb_hdrc.0", "usb"),
445
446 /* Peripheral Cluster #6 */
447 CLK(dmc_ed, "dmc", NULL),
448 CLK(cryp1_ed, "cryp1", NULL),
449 CLK(rng_ed, "rng", NULL),
450
451 /* Peripheral Cluster #7 */
452 CLK(tzpc0_ed, "tzpc0", NULL),
453 CLK(mtu1_ed, "mtu1", NULL),
454 CLK(mtu0_ed, "mtu0", NULL),
455 CLK(wdg_ed, "wdg", NULL),
456 CLK(cfgreg_ed, "cfgreg", NULL),
457};
458
459static struct clk_lookup u8500_v1_clks[] = {
460 /* Peripheral Cluster #1 */
461 CLK(i2c4, "nmk-i2c.4", NULL),
462 CLK(spi3_v1, "spi3", NULL),
463 CLK(msp1_v1, "msp1", NULL),
464
465 /* Peripheral Cluster #2 */
466 CLK(gpio1_v1, "gpio.6", NULL),
467 CLK(gpio1_v1, "gpio.7", NULL),
468 CLK(ssitx_v1, "ssitx", NULL),
469 CLK(ssirx_v1, "ssirx", NULL),
470 CLK(spi0_v1, "spi0", NULL),
471 CLK(sdi3_v1, "sdi3", NULL),
472 CLK(sdi1_v1, "sdi1", NULL),
473 CLK(msp2_v1, "msp2", NULL),
474 CLK(sdi4_v1, "sdi4", NULL),
475 CLK(pwl_v1, "pwl", NULL),
476 CLK(spi1_v1, "spi1", NULL),
477 CLK(spi2_v1, "spi2", NULL),
478 CLK(i2c3_v1, "nmk-i2c.3", NULL),
479
480 /* Peripheral Cluster #3 */
481 CLK(ssp1_v1, "ssp1", NULL),
482 CLK(ssp0_v1, "ssp0", NULL),
483
484 /* Peripheral Cluster #5 */
485 CLK(usb_v1, "musb_hdrc.0", "usb"),
486
487 /* Peripheral Cluster #6 */
488 CLK(mtu1_v1, "mtu1", NULL),
489 CLK(mtu0_v1, "mtu0", NULL),
490 CLK(cfgreg_v1, "cfgreg", NULL),
491 CLK(hash1, "hash1", NULL),
492 CLK(unipro_v1, "unipro", NULL),
493 CLK(rng_v1, "rng", NULL),
494
495 /* PRCMU level clock gating */
496
497 /* Bank 0 */
498 CLK(uniproclk, "uniproclk", NULL),
499 CLK(dsialtclk, "dsialt", NULL),
500
501 /* Bank 1 */
502 CLK(rngclk, "rng", NULL),
503 CLK(uiccclk, "uicc", NULL),
84}; 504};
85 505
86static int __init clk_init(void) 506static int __init clk_init(void)
87{ 507{
88 /* register the clock lookups */ 508 if (cpu_is_u8500ed()) {
89 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 509 clk_prcmu_ops.enable = clk_prcmu_ed_enable;
510 clk_prcmu_ops.disable = clk_prcmu_ed_disable;
511 } else if (cpu_is_u5500()) {
512 /* Clock tree for U5500 not implemented yet */
513 clk_prcc_ops.enable = clk_prcc_ops.disable = NULL;
514 clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL;
515 }
516
517 clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks));
518 if (cpu_is_u8500ed())
519 clkdev_add_table(u8500_ed_clks, ARRAY_SIZE(u8500_ed_clks));
520 else
521 clkdev_add_table(u8500_v1_clks, ARRAY_SIZE(u8500_v1_clks));
522
90 return 0; 523 return 0;
91} 524}
92arch_initcall(clk_init); 525arch_initcall(clk_init);
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h
new file mode 100644
index 000000000000..e4f99b65026f
--- /dev/null
+++ b/arch/arm/mach-ux500/clock.h
@@ -0,0 +1,125 @@
1/*
2 * Copyright (C) 2010 ST-Ericsson
3 * Copyright (C) 2009 STMicroelectronics
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10/**
11 * struct clkops - ux500 clock operations
12 * @enable: function to enable the clock
13 * @disable: function to disable the clock
14 * @get_rate: function to get the current clock rate
15 *
16 * This structure contains function pointers to functions that will be used to
17 * control the clock. All of these functions are optional. If get_rate is
18 * NULL, the rate in the struct clk will be used.
19 */
20struct clkops {
21 void (*enable) (struct clk *);
22 void (*disable) (struct clk *);
23 unsigned long (*get_rate) (struct clk *);
24};
25
26/**
27 * struct clk - ux500 clock structure
28 * @ops: pointer to clkops struct used to control this clock
29 * @name: name, for debugging
30 * @enabled: refcount. positive if enabled, zero if disabled
31 * @rate: fixed rate for clocks which don't implement
32 * ops->getrate
33 * @prcmu_cg_off: address offset of the combined enable/disable register
34 * (used on u8500v1)
35 * @prcmu_cg_bit: bit in the combined enable/disable register (used on
36 * u8500v1)
37 * @prcmu_cg_mgt: address of the enable/disable register (used on
38 * u8500ed)
39 * @cluster: peripheral cluster number
40 * @prcc_bus: bit for the bus clock in the peripheral's CLKRST
41 * @prcc_kernel: bit for the kernel clock in the peripheral's CLKRST.
42 * -1 if no kernel clock exists.
43 * @parent_cluster: pointer to parent's cluster clk struct
44 * @parent_periph: pointer to parent's peripheral clk struct
45 *
46 * Peripherals are organised into clusters, and each cluster has an associated
47 * bus clock. Some peripherals also have a parent peripheral clock.
48 *
49 * In order to enable a clock for a peripheral, we need to enable:
50 * (1) the parent cluster (bus) clock at the PRCMU level
51 * (2) the parent peripheral clock (if any) at the PRCMU level
52 * (3) the peripheral's bus & kernel clock at the PRCC level
53 *
54 * (1) and (2) are handled by defining clk structs (DEFINE_PRCMU_CLK) for each
55 * of the cluster and peripheral clocks, and hooking these as the parents of
56 * the individual peripheral clocks.
57 *
58 * (3) is handled by specifying the bits in the PRCC control registers required
59 * to enable these clocks and modifying them in the ->enable and
60 * ->disable callbacks of the peripheral clocks (DEFINE_PRCC_CLK).
61 *
62 * This structure describes both the PRCMU-level clocks and PRCC-level clocks.
63 * The prcmu_* fields are only used for the PRCMU clocks, and the cluster,
64 * prcc, and parent pointers are only used for the PRCC-level clocks.
65 */
66struct clk {
67 const struct clkops *ops;
68 const char *name;
69 unsigned int enabled;
70
71 unsigned long rate;
72 struct list_head list;
73
74 /* These three are only for PRCMU clks */
75
76 unsigned int prcmu_cg_off;
77 unsigned int prcmu_cg_bit;
78 unsigned int prcmu_cg_mgt;
79
80 /* The rest are only for PRCC clks */
81
82 int cluster;
83 unsigned int prcc_bus;
84 unsigned int prcc_kernel;
85
86 struct clk *parent_cluster;
87 struct clk *parent_periph;
88};
89
90#define DEFINE_PRCMU_CLK(_name, _cg_off, _cg_bit, _reg) \
91struct clk clk_##_name = { \
92 .name = #_name, \
93 .ops = &clk_prcmu_ops, \
94 .prcmu_cg_off = _cg_off, \
95 .prcmu_cg_bit = _cg_bit, \
96 .prcmu_cg_mgt = PRCM_##_reg##_MGT \
97 }
98
99#define DEFINE_PRCMU_CLK_RATE(_name, _cg_off, _cg_bit, _reg, _rate) \
100struct clk clk_##_name = { \
101 .name = #_name, \
102 .ops = &clk_prcmu_ops, \
103 .prcmu_cg_off = _cg_off, \
104 .prcmu_cg_bit = _cg_bit, \
105 .rate = _rate, \
106 .prcmu_cg_mgt = PRCM_##_reg##_MGT \
107 }
108
109#define DEFINE_PRCC_CLK(_pclust, _name, _bus_en, _kernel_en, _kernclk) \
110struct clk clk_##_name = { \
111 .name = #_name, \
112 .ops = &clk_prcc_ops, \
113 .cluster = _pclust, \
114 .prcc_bus = _bus_en, \
115 .prcc_kernel = _kernel_en, \
116 .parent_cluster = &clk_per##_pclust##clk, \
117 .parent_periph = _kernclk \
118 }
119
120#define CLK(_clk, _devname, _conname) \
121 { \
122 .clk = &clk_##_clk, \
123 .dev_id = _devname, \
124 .con_id = _conname, \
125 }
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
new file mode 100644
index 000000000000..6a3ac4539f16
--- /dev/null
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -0,0 +1,50 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#include <linux/platform_device.h>
9#include <linux/amba/bus.h>
10#include <linux/io.h>
11
12#include <asm/mach/map.h>
13
14#include <mach/hardware.h>
15#include <mach/devices.h>
16#include <mach/setup.h>
17
18static struct map_desc u5500_io_desc[] __initdata = {
19 __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),
20 __IO_DEV_DESC(U5500_GPIO1_BASE, SZ_4K),
21 __IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K),
22 __IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K),
23 __IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K),
24};
25
26static struct platform_device *u5500_platform_devs[] __initdata = {
27 &u5500_gpio_devs[0],
28 &u5500_gpio_devs[1],
29 &u5500_gpio_devs[2],
30 &u5500_gpio_devs[3],
31 &u5500_gpio_devs[4],
32 &u5500_gpio_devs[5],
33 &u5500_gpio_devs[6],
34 &u5500_gpio_devs[7],
35};
36
37void __init u5500_map_io(void)
38{
39 ux500_map_io();
40
41 iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc));
42}
43
44void __init u5500_init_devices(void)
45{
46 ux500_init_devices();
47
48 platform_add_devices(u5500_platform_devs,
49 ARRAY_SIZE(u5500_platform_devs));
50}
diff --git a/arch/arm/mach-ux500/cpu-u8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 397bc1f9ed94..d04299f3b6b5 100644
--- a/arch/arm/mach-ux500/cpu-u8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -13,44 +13,55 @@
13#include <linux/device.h> 13#include <linux/device.h>
14#include <linux/amba/bus.h> 14#include <linux/amba/bus.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/gpio.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/io.h>
17 19
18#include <asm/hardware/gic.h>
19#include <asm/mach/map.h> 20#include <asm/mach/map.h>
20#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <mach/setup.h>
23#include <mach/devices.h>
21 24
22/* add any platform devices here - TODO */
23static struct platform_device *platform_devs[] __initdata = { 25static struct platform_device *platform_devs[] __initdata = {
24 /* yet to be added, add i2c0, gpio.. */ 26 &u8500_gpio_devs[0],
27 &u8500_gpio_devs[1],
28 &u8500_gpio_devs[2],
29 &u8500_gpio_devs[3],
30 &u8500_gpio_devs[4],
31 &u8500_gpio_devs[5],
32 &u8500_gpio_devs[6],
33 &u8500_gpio_devs[7],
34 &u8500_gpio_devs[8],
25}; 35};
26 36
27#define __IO_DEV_DESC(x, sz) { \
28 .virtual = IO_ADDRESS(x), \
29 .pfn = __phys_to_pfn(x), \
30 .length = sz, \
31 .type = MT_DEVICE, \
32}
33
34/* minimum static i/o mapping required to boot U8500 platforms */ 37/* minimum static i/o mapping required to boot U8500 platforms */
35static struct map_desc u8500_io_desc[] __initdata = { 38static struct map_desc u8500_io_desc[] __initdata = {
36 __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), 39 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
37 __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), 40 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
38 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 41 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
42 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
43 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
44};
45
46static struct map_desc u8500ed_io_desc[] __initdata = {
47 __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
48 __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K),
49};
50
51static struct map_desc u8500v1_io_desc[] __initdata = {
39 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 52 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
40 __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
41 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
42 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
43}; 53};
44 54
45void __init u8500_map_io(void) 55void __init u8500_map_io(void)
46{ 56{
57 ux500_map_io();
58
47 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 59 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
48}
49 60
50void __init u8500_init_irq(void) 61 if (cpu_is_u8500ed())
51{ 62 iotable_init(u8500ed_io_desc, ARRAY_SIZE(u8500ed_io_desc));
52 gic_dist_init(0, __io_address(U8500_GIC_DIST_BASE), 29); 63 else
53 gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE)); 64 iotable_init(u8500v1_io_desc, ARRAY_SIZE(u8500v1_io_desc));
54} 65}
55 66
56/* 67/*
@@ -58,6 +69,8 @@ void __init u8500_init_irq(void)
58 */ 69 */
59void __init u8500_init_devices(void) 70void __init u8500_init_devices(void)
60{ 71{
72 ux500_init_devices();
73
61 /* Register the platform devices */ 74 /* Register the platform devices */
62 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 75 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
63 76
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
new file mode 100644
index 000000000000..d81ad023963c
--- /dev/null
+++ b/arch/arm/mach-ux500/cpu.c
@@ -0,0 +1,99 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#include <linux/platform_device.h>
9#include <linux/amba/bus.h>
10#include <linux/io.h>
11#include <linux/clk.h>
12
13#include <asm/hardware/cache-l2x0.h>
14#include <asm/hardware/gic.h>
15#include <asm/mach/map.h>
16#include <asm/localtimer.h>
17
18#include <plat/mtu.h>
19#include <mach/hardware.h>
20#include <mach/setup.h>
21#include <mach/devices.h>
22
23#include "clock.h"
24
25static struct map_desc ux500_io_desc[] __initdata = {
26 __IO_DEV_DESC(UX500_UART0_BASE, SZ_4K),
27 __IO_DEV_DESC(UX500_UART2_BASE, SZ_4K),
28
29 __IO_DEV_DESC(UX500_GIC_CPU_BASE, SZ_4K),
30 __IO_DEV_DESC(UX500_GIC_DIST_BASE, SZ_4K),
31 __IO_DEV_DESC(UX500_L2CC_BASE, SZ_4K),
32 __IO_DEV_DESC(UX500_TWD_BASE, SZ_4K),
33 __IO_DEV_DESC(UX500_SCU_BASE, SZ_4K),
34
35 __IO_DEV_DESC(UX500_CLKRST1_BASE, SZ_4K),
36 __IO_DEV_DESC(UX500_CLKRST2_BASE, SZ_4K),
37 __IO_DEV_DESC(UX500_CLKRST3_BASE, SZ_4K),
38 __IO_DEV_DESC(UX500_CLKRST5_BASE, SZ_4K),
39 __IO_DEV_DESC(UX500_CLKRST6_BASE, SZ_4K),
40
41 __IO_DEV_DESC(UX500_MTU0_BASE, SZ_4K),
42 __IO_DEV_DESC(UX500_MTU1_BASE, SZ_4K),
43
44 __IO_DEV_DESC(UX500_BACKUPRAM0_BASE, SZ_8K),
45};
46
47static struct amba_device *ux500_amba_devs[] __initdata = {
48 &ux500_pl031_device,
49};
50
51void __init ux500_map_io(void)
52{
53 iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc));
54}
55
56void __init ux500_init_devices(void)
57{
58 amba_add_devices(ux500_amba_devs, ARRAY_SIZE(ux500_amba_devs));
59}
60
61void __init ux500_init_irq(void)
62{
63 gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
64 gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
65}
66
67#ifdef CONFIG_CACHE_L2X0
68static int ux500_l2x0_init(void)
69{
70 void __iomem *l2x0_base;
71
72 l2x0_base = __io_address(UX500_L2CC_BASE);
73
74 /* 64KB way size, 8 way associativity, force WA */
75 l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
76
77 return 0;
78}
79early_initcall(ux500_l2x0_init);
80#endif
81
82static void __init ux500_timer_init(void)
83{
84#ifdef CONFIG_LOCAL_TIMERS
85 /* Setup the local timer base */
86 twd_base = __io_address(UX500_TWD_BASE);
87#endif
88 /* Setup the MTU base */
89 if (cpu_is_u8500ed())
90 mtu_base = __io_address(U8500_MTU0_BASE_ED);
91 else
92 mtu_base = __io_address(UX500_MTU0_BASE);
93
94 nmdk_timer_init();
95}
96
97struct sys_timer ux500_timer = {
98 .init = ux500_timer_init,
99};
diff --git a/arch/arm/mach-ux500/devices-db5500.c b/arch/arm/mach-ux500/devices-db5500.c
new file mode 100644
index 000000000000..33e5b56bebb6
--- /dev/null
+++ b/arch/arm/mach-ux500/devices-db5500.c
@@ -0,0 +1,46 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#include <linux/platform_device.h>
9#include <linux/interrupt.h>
10#include <linux/gpio.h>
11
12#include <mach/hardware.h>
13#include <mach/devices.h>
14
15static struct nmk_gpio_platform_data u5500_gpio_data[] = {
16 GPIO_DATA("GPIO-0-31", 0),
17 GPIO_DATA("GPIO-32-63", 32), /* 36..63 not routed to pin */
18 GPIO_DATA("GPIO-64-95", 64), /* 83..95 not routed to pin */
19 GPIO_DATA("GPIO-96-127", 96), /* 102..127 not routed to pin */
20 GPIO_DATA("GPIO-128-159", 128), /* 149..159 not routed to pin */
21 GPIO_DATA("GPIO-160-191", 160),
22 GPIO_DATA("GPIO-192-223", 192),
23 GPIO_DATA("GPIO-224-255", 224), /* 228..255 not routed to pin */
24};
25
26static struct resource u5500_gpio_resources[] = {
27 GPIO_RESOURCE(0),
28 GPIO_RESOURCE(1),
29 GPIO_RESOURCE(2),
30 GPIO_RESOURCE(3),
31 GPIO_RESOURCE(4),
32 GPIO_RESOURCE(5),
33 GPIO_RESOURCE(6),
34 GPIO_RESOURCE(7),
35};
36
37struct platform_device u5500_gpio_devs[] = {
38 GPIO_DEVICE(0),
39 GPIO_DEVICE(1),
40 GPIO_DEVICE(2),
41 GPIO_DEVICE(3),
42 GPIO_DEVICE(4),
43 GPIO_DEVICE(5),
44 GPIO_DEVICE(6),
45 GPIO_DEVICE(7),
46};
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
new file mode 100644
index 000000000000..20334236afce
--- /dev/null
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -0,0 +1,107 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#include <linux/kernel.h>
9#include <linux/platform_device.h>
10#include <linux/interrupt.h>
11#include <linux/io.h>
12#include <linux/gpio.h>
13#include <linux/amba/bus.h>
14
15#include <mach/hardware.h>
16#include <mach/setup.h>
17
18static struct nmk_gpio_platform_data u8500_gpio_data[] = {
19 GPIO_DATA("GPIO-0-31", 0),
20 GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
21 GPIO_DATA("GPIO-64-95", 64),
22 GPIO_DATA("GPIO-96-127", 96), /* 98..127 not routed to pin */
23 GPIO_DATA("GPIO-128-159", 128),
24 GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
25 GPIO_DATA("GPIO-192-223", 192),
26 GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
27 GPIO_DATA("GPIO-256-288", 256), /* 268..288 not routed to pin */
28};
29
30static struct resource u8500_gpio_resources[] = {
31 GPIO_RESOURCE(0),
32 GPIO_RESOURCE(1),
33 GPIO_RESOURCE(2),
34 GPIO_RESOURCE(3),
35 GPIO_RESOURCE(4),
36 GPIO_RESOURCE(5),
37 GPIO_RESOURCE(6),
38 GPIO_RESOURCE(7),
39 GPIO_RESOURCE(8),
40};
41
42struct platform_device u8500_gpio_devs[] = {
43 GPIO_DEVICE(0),
44 GPIO_DEVICE(1),
45 GPIO_DEVICE(2),
46 GPIO_DEVICE(3),
47 GPIO_DEVICE(4),
48 GPIO_DEVICE(5),
49 GPIO_DEVICE(6),
50 GPIO_DEVICE(7),
51 GPIO_DEVICE(8),
52};
53
54struct amba_device u8500_ssp0_device = {
55 .dev = {
56 .coherent_dma_mask = ~0,
57 .init_name = "ssp0",
58 },
59 .res = {
60 .start = U8500_SSP0_BASE,
61 .end = U8500_SSP0_BASE + SZ_4K - 1,
62 .flags = IORESOURCE_MEM,
63 },
64 .irq = {IRQ_SSP0, NO_IRQ },
65 /* ST-Ericsson modified id */
66 .periphid = SSP_PER_ID,
67};
68
69static struct resource u8500_i2c0_resources[] = {
70 [0] = {
71 .start = U8500_I2C0_BASE,
72 .end = U8500_I2C0_BASE + SZ_4K - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 [1] = {
76 .start = IRQ_I2C0,
77 .end = IRQ_I2C0,
78 .flags = IORESOURCE_IRQ,
79 }
80};
81
82struct platform_device u8500_i2c0_device = {
83 .name = "nmk-i2c",
84 .id = 0,
85 .resource = u8500_i2c0_resources,
86 .num_resources = ARRAY_SIZE(u8500_i2c0_resources),
87};
88
89static struct resource u8500_i2c4_resources[] = {
90 [0] = {
91 .start = U8500_I2C4_BASE,
92 .end = U8500_I2C4_BASE + SZ_4K - 1,
93 .flags = IORESOURCE_MEM,
94 },
95 [1] = {
96 .start = IRQ_I2C4,
97 .end = IRQ_I2C4,
98 .flags = IORESOURCE_IRQ,
99 }
100};
101
102struct platform_device u8500_i2c4_device = {
103 .name = "nmk-i2c",
104 .id = 4,
105 .resource = u8500_i2c4_resources,
106 .num_resources = ARRAY_SIZE(u8500_i2c4_resources),
107};
diff --git a/arch/arm/mach-ux500/devices.c b/arch/arm/mach-ux500/devices.c
new file mode 100644
index 000000000000..8a268893cb7f
--- /dev/null
+++ b/arch/arm/mach-ux500/devices.c
@@ -0,0 +1,88 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8#include <linux/kernel.h>
9#include <linux/platform_device.h>
10#include <linux/interrupt.h>
11#include <linux/io.h>
12#include <linux/amba/bus.h>
13
14#include <mach/hardware.h>
15#include <mach/setup.h>
16
17#define __MEM_4K_RESOURCE(x) \
18 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
19
20struct amba_device ux500_pl031_device = {
21 .dev = {
22 .init_name = "pl031",
23 },
24 .res = {
25 .start = UX500_RTC_BASE,
26 .end = UX500_RTC_BASE + SZ_4K - 1,
27 .flags = IORESOURCE_MEM,
28 },
29 .irq = {IRQ_RTC_RTT, NO_IRQ},
30};
31
32struct amba_device ux500_uart0_device = {
33 .dev = { .init_name = "uart0" },
34 __MEM_4K_RESOURCE(UX500_UART0_BASE),
35 .irq = {IRQ_UART0, NO_IRQ},
36};
37
38struct amba_device ux500_uart1_device = {
39 .dev = { .init_name = "uart1" },
40 __MEM_4K_RESOURCE(UX500_UART1_BASE),
41 .irq = {IRQ_UART1, NO_IRQ},
42};
43
44struct amba_device ux500_uart2_device = {
45 .dev = { .init_name = "uart2" },
46 __MEM_4K_RESOURCE(UX500_UART2_BASE),
47 .irq = {IRQ_UART2, NO_IRQ},
48};
49
50#define UX500_I2C_RESOURCES(id, size) \
51static struct resource ux500_i2c##id##_resources[] = { \
52 [0] = { \
53 .start = UX500_I2C##id##_BASE, \
54 .end = UX500_I2C##id##_BASE + size - 1, \
55 .flags = IORESOURCE_MEM, \
56 }, \
57 [1] = { \
58 .start = IRQ_I2C##id, \
59 .end = IRQ_I2C##id, \
60 .flags = IORESOURCE_IRQ \
61 } \
62}
63
64UX500_I2C_RESOURCES(1, SZ_4K);
65UX500_I2C_RESOURCES(2, SZ_4K);
66UX500_I2C_RESOURCES(3, SZ_4K);
67
68#define UX500_I2C_PDEVICE(cid) \
69struct platform_device ux500_i2c##cid##_device = { \
70 .name = "nmk-i2c", \
71 .id = cid, \
72 .num_resources = 2, \
73 .resource = ux500_i2c##cid##_resources, \
74}
75
76UX500_I2C_PDEVICE(1);
77UX500_I2C_PDEVICE(2);
78UX500_I2C_PDEVICE(3);
79
80void __init amba_add_devices(struct amba_device *devs[], int num)
81{
82 int i;
83
84 for (i = 0; i < num; i++) {
85 struct amba_device *d = devs[i];
86 amba_device_register(d, &iomem_resource);
87 }
88}
diff --git a/arch/arm/mach-ux500/include/mach/db5500-regs.h b/arch/arm/mach-ux500/include/mach/db5500-regs.h
new file mode 100644
index 000000000000..545c80fc8024
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/db5500-regs.h
@@ -0,0 +1,103 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 */
6
7#ifndef __MACH_DB5500_REGS_H
8#define __MACH_DB5500_REGS_H
9
10#define U5500_PER1_BASE 0xA0020000
11#define U5500_PER2_BASE 0xA0010000
12#define U5500_PER3_BASE 0x80140000
13#define U5500_PER4_BASE 0x80150000
14#define U5500_PER5_BASE 0x80100000
15#define U5500_PER6_BASE 0x80120000
16
17#define U5500_GIC_DIST_BASE 0xA0411000
18#define U5500_GIC_CPU_BASE 0xA0410100
19#define U5500_DMA_BASE 0x90030000
20#define U5500_MCDE_BASE 0xA0400000
21#define U5500_MODEM_BASE 0xB0000000
22#define U5500_L2CC_BASE 0xA0412000
23#define U5500_SCU_BASE 0xA0410000
24#define U5500_DSI1_BASE 0xA0401000
25#define U5500_DSI2_BASE 0xA0402000
26#define U5500_SIA_BASE 0xA0100000
27#define U5500_SVA_BASE 0x80200000
28#define U5500_HSEM_BASE 0xA0000000
29#define U5500_NAND0_BASE 0x60000000
30#define U5500_NAND1_BASE 0x70000000
31#define U5500_TWD_BASE 0xa0410600
32#define U5500_B2R2_BASE 0xa0200000
33
34#define U5500_FSMC_BASE (U5500_PER1_BASE + 0x0000)
35#define U5500_SDI0_BASE (U5500_PER1_BASE + 0x1000)
36#define U5500_SDI2_BASE (U5500_PER1_BASE + 0x2000)
37#define U5500_UART0_BASE (U5500_PER1_BASE + 0x3000)
38#define U5500_I2C1_BASE (U5500_PER1_BASE + 0x4000)
39#define U5500_MSP0_BASE (U5500_PER1_BASE + 0x5000)
40#define U5500_GPIO0_BASE (U5500_PER1_BASE + 0xE000)
41#define U5500_CLKRST1_BASE (U5500_PER1_BASE + 0xF000)
42
43#define U5500_USBOTG_BASE (U5500_PER2_BASE + 0x0000)
44#define U5500_GPIO1_BASE (U5500_PER2_BASE + 0xE000)
45#define U5500_CLKRST2_BASE (U5500_PER2_BASE + 0xF000)
46
47#define U5500_KEYPAD_BASE (U5500_PER3_BASE + 0x0000)
48#define U5500_PWM_BASE (U5500_PER3_BASE + 0x1000)
49#define U5500_GPIO3_BASE (U5500_PER3_BASE + 0xE000)
50#define U5500_CLKRST3_BASE (U5500_PER3_BASE + 0xF000)
51
52#define U5500_BACKUPRAM0_BASE (U5500_PER4_BASE + 0x0000)
53#define U5500_BACKUPRAM1_BASE (U5500_PER4_BASE + 0x1000)
54#define U5500_RTT0_BASE (U5500_PER4_BASE + 0x2000)
55#define U5500_RTT1_BASE (U5500_PER4_BASE + 0x3000)
56#define U5500_RTC_BASE (U5500_PER4_BASE + 0x4000)
57#define U5500_SCR_BASE (U5500_PER4_BASE + 0x5000)
58#define U5500_DMC_BASE (U5500_PER4_BASE + 0x6000)
59#define U5500_PRCMU_BASE (U5500_PER4_BASE + 0x7000)
60#define U5500_MSP1_BASE (U5500_PER4_BASE + 0x9000)
61#define U5500_GPIO2_BASE (U5500_PER4_BASE + 0xA000)
62#define U5500_CDETECT_BASE (U5500_PER4_BASE + 0xF000)
63
64#define U5500_SPI0_BASE (U5500_PER5_BASE + 0x0000)
65#define U5500_SPI1_BASE (U5500_PER5_BASE + 0x1000)
66#define U5500_SPI2_BASE (U5500_PER5_BASE + 0x2000)
67#define U5500_SPI3_BASE (U5500_PER5_BASE + 0x3000)
68#define U5500_UART1_BASE (U5500_PER5_BASE + 0x4000)
69#define U5500_UART2_BASE (U5500_PER5_BASE + 0x5000)
70#define U5500_UART3_BASE (U5500_PER5_BASE + 0x6000)
71#define U5500_SDI1_BASE (U5500_PER5_BASE + 0x7000)
72#define U5500_SDI3_BASE (U5500_PER5_BASE + 0x8000)
73#define U5500_SDI4_BASE (U5500_PER5_BASE + 0x9000)
74#define U5500_I2C2_BASE (U5500_PER5_BASE + 0xA000)
75#define U5500_I2C3_BASE (U5500_PER5_BASE + 0xB000)
76#define U5500_MSP2_BASE (U5500_PER5_BASE + 0xC000)
77#define U5500_IRDA_BASE (U5500_PER5_BASE + 0xD000)
78#define U5500_IRRC_BASE (U5500_PER5_BASE + 0x10000)
79#define U5500_GPIO4_BASE (U5500_PER5_BASE + 0x1E000)
80#define U5500_CLKRST5_BASE (U5500_PER5_BASE + 0x1F000)
81
82#define U5500_RNG_BASE (U5500_PER6_BASE + 0x0000)
83#define U5500_HASH0_BASE (U5500_PER6_BASE + 0x1000)
84#define U5500_HASH1_BASE (U5500_PER6_BASE + 0x2000)
85#define U5500_PKA_BASE (U5500_PER6_BASE + 0x4000)
86#define U5500_PKAM_BASE (U5500_PER6_BASE + 0x5000)
87#define U5500_MTU0_BASE (U5500_PER6_BASE + 0x6000)
88#define U5500_MTU1_BASE (U5500_PER6_BASE + 0x7000)
89#define U5500_CR_BASE (U5500_PER6_BASE + 0x8000)
90#define U5500_CRYP0_BASE (U5500_PER6_BASE + 0xA000)
91#define U5500_CRYP1_BASE (U5500_PER6_BASE + 0xB000)
92#define U5500_CLKRST6_BASE (U5500_PER6_BASE + 0xF000)
93
94#define U5500_GPIOBANK0_BASE U5500_GPIO0_BASE
95#define U5500_GPIOBANK1_BASE (U5500_GPIO0_BASE + 0x80)
96#define U5500_GPIOBANK2_BASE U5500_GPIO1_BASE
97#define U5500_GPIOBANK3_BASE U5500_GPIO2_BASE
98#define U5500_GPIOBANK4_BASE U5500_GPIO3_BASE
99#define U5500_GPIOBANK5_BASE U5500_GPIO4_BASE
100#define U5500_GPIOBANK6_BASE (U5500_GPIO4_BASE + 0x80)
101#define U5500_GPIOBANK7_BASE (U5500_GPIO4_BASE + 0x100)
102
103#endif
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
new file mode 100644
index 000000000000..9169e1e382a3
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -0,0 +1,135 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 */
6
7#ifndef __MACH_DB8500_REGS_H
8#define __MACH_DB8500_REGS_H
9
10#define U8500_PER3_BASE 0x80000000
11#define U8500_STM_BASE 0x80100000
12#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)
13#define U8500_PER2_BASE 0x80110000
14#define U8500_PER1_BASE 0x80120000
15#define U8500_B2R2_BASE 0x80130000
16#define U8500_HSEM_BASE 0x80140000
17#define U8500_PER4_BASE 0x80150000
18#define U8500_ICN_BASE 0x81000000
19
20#define U8500_BOOT_ROM_BASE 0x90000000
21/* ASIC ID is at 0xff4 offset within this region */
22#define U8500_ASIC_ID_BASE 0x9001F000
23
24#define U8500_PER6_BASE 0xa03c0000
25#define U8500_PER5_BASE 0xa03e0000
26#define U8500_PER7_BASE_ED 0xa03d0000
27
28#define U8500_SVA_BASE 0xa0100000
29#define U8500_SIA_BASE 0xa0200000
30
31#define U8500_SGA_BASE 0xa0300000
32#define U8500_MCDE_BASE 0xa0350000
33#define U8500_DMA_BASE_ED 0xa0362000
34#define U8500_DMA_BASE 0x801C0000 /* v1 */
35
36#define U8500_SBAG_BASE 0xa0390000
37
38#define U8500_SCU_BASE 0xa0410000
39#define U8500_GIC_CPU_BASE 0xa0410100
40#define U8500_TWD_BASE 0xa0410600
41#define U8500_GIC_DIST_BASE 0xa0411000
42#define U8500_L2CC_BASE 0xa0412000
43
44#define U8500_MODEM_I2C 0xb7e02000
45
46#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000)
47#define U8500_GPIO1_BASE (U8500_PER3_BASE + 0xE000)
48#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000)
49#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000)
50
51/* per7 base addressess */
52#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000)
53#define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000)
54#define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000)
55#define U8500_TZPC0_BASE_ED (U8500_PER7_BASE_ED + 0xc000)
56#define U8500_CLKRST7_BASE_ED (U8500_PER7_BASE_ED + 0xf000)
57
58#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
59#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
60
61/* per6 base addressess */
62#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
63#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
64#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
65#define U8500_MTU0_BASE (U8500_PER6_BASE + 0x6000) /* v1 */
66#define U8500_MTU1_BASE (U8500_PER6_BASE + 0x7000) /* v1 */
67#define U8500_CR_BASE (U8500_PER6_BASE + 0x8000) /* v1 */
68#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000)
69#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
70#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
71
72/* per5 base addressess */
73#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
74#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000)
75
76/* per4 base addressess */
77#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000)
78#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000)
79#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000)
80#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x03000)
81#define U8500_RTC_BASE (U8500_PER4_BASE + 0x04000)
82#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000)
83#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000)
84#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
85#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x0f000)
86
87/* per3 base addresses */
88#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
89#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000)
90#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000)
91#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000)
92#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000)
93#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000)
94#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000)
95#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
96#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
97
98/* per2 base addressess */
99#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
100#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
101#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)
102#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000)
103#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000)
104#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000)
105#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000)
106#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000)
107#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000)
108#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000)
109#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000)
110#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000)
111
112/* per1 base addresses */
113#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000)
114#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000)
115#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000)
116#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000)
117#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000)
118#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000)
119#define U8500_I2C4_BASE (U8500_PER1_BASE + 0xa000)
120#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xb000)
121#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000)
122
123#define U8500_SHRM_GOP_INTERRUPT_BASE 0xB7C00040
124
125#define U8500_GPIOBANK0_BASE U8500_GPIO0_BASE
126#define U8500_GPIOBANK1_BASE (U8500_GPIO0_BASE + 0x80)
127#define U8500_GPIOBANK2_BASE U8500_GPIO1_BASE
128#define U8500_GPIOBANK3_BASE (U8500_GPIO1_BASE + 0x80)
129#define U8500_GPIOBANK4_BASE (U8500_GPIO1_BASE + 0x100)
130#define U8500_GPIOBANK5_BASE (U8500_GPIO1_BASE + 0x180)
131#define U8500_GPIOBANK6_BASE U8500_GPIO2_BASE
132#define U8500_GPIOBANK7_BASE (U8500_GPIO2_BASE + 0x80)
133#define U8500_GPIOBANK8_BASE U8500_GPIO3_BASE
134
135#endif
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S
index 09cbfda8aee5..c5203b7ea552 100644
--- a/arch/arm/mach-ux500/include/mach/debug-macro.S
+++ b/arch/arm/mach-ux500/include/mach/debug-macro.S
@@ -10,11 +10,19 @@
10 */ 10 */
11#include <mach/hardware.h> 11#include <mach/hardware.h>
12 12
13#if CONFIG_UX500_DEBUG_UART > 2
14#error Invalid Ux500 debug UART
15#endif
16
17#define __UX500_UART(n) UX500_UART##n##_BASE
18#define UX500_UART(n) __UX500_UART(n)
19#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART)
20
13 .macro addruart, rx, tmp 21 .macro addruart, rx, tmp
14 mrc p15, 0, \rx, c1, c0 22 mrc p15, 0, \rx, c1, c0
15 tst \rx, #1 @ MMU enabled? 23 tst \rx, #1 @ MMU enabled?
16 ldreq \rx, =U8500_UART2_BASE @ no, physical address 24 ldreq \rx, =UART_BASE @ no, physical address
17 ldrne \rx, =IO_ADDRESS(U8500_UART2_BASE) @ yes, virtual address 25 ldrne \rx, =IO_ADDRESS(UART_BASE) @ yes, virtual address
18 .endm 26 .endm
19 27
20#include <asm/hardware/debug-pl01x.S> 28#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h
new file mode 100644
index 000000000000..0422af00a56e
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/devices.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 */
6
7#ifndef __ASM_ARCH_DEVICES_H__
8#define __ASM_ARCH_DEVICES_H__
9
10struct platform_device;
11struct amba_device;
12
13extern struct platform_device u5500_gpio_devs[];
14extern struct platform_device u8500_gpio_devs[];
15
16extern struct amba_device ux500_pl031_device;
17extern struct amba_device u8500_ssp0_device;
18extern struct amba_device ux500_uart0_device;
19extern struct amba_device ux500_uart1_device;
20extern struct amba_device ux500_uart2_device;
21
22extern struct platform_device ux500_i2c1_device;
23extern struct platform_device ux500_i2c2_device;
24extern struct platform_device ux500_i2c3_device;
25
26extern struct platform_device u8500_i2c0_device;
27extern struct platform_device u8500_i2c4_device;
28
29#endif
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index eece3301fef7..60ea88db8283 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -17,7 +17,7 @@
17 .endm 17 .endm
18 18
19 .macro get_irqnr_preamble, base, tmp 19 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =IO_ADDRESS(U8500_GIC_CPU_BASE) 20 ldr \base, =IO_ADDRESS(UX500_GIC_CPU_BASE)
21 .endm 21 .endm
22 22
23 .macro arch_ret_to_user, tmp1, tmp2 23 .macro arch_ret_to_user, tmp1, tmp2
diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h
new file mode 100644
index 000000000000..d548a622e7d2
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/gpio.h
@@ -0,0 +1,50 @@
1#ifndef __ASM_ARCH_GPIO_H
2#define __ASM_ARCH_GPIO_H
3
4/*
5 * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough
6 * room for a couple of GPIO expanders.
7 */
8#define ARCH_NR_GPIOS 350
9
10#include <plat/gpio.h>
11
12#define __GPIO_RESOURCE(soc, block) \
13 { \
14 .start = soc##_GPIOBANK##block##_BASE, \
15 .end = soc##_GPIOBANK##block##_BASE + 127, \
16 .flags = IORESOURCE_MEM, \
17 }, \
18 { \
19 .start = IRQ_GPIO##block, \
20 .end = IRQ_GPIO##block, \
21 .flags = IORESOURCE_IRQ, \
22 }
23
24#define __GPIO_DEVICE(soc, block) \
25 { \
26 .name = "gpio", \
27 .id = block, \
28 .num_resources = 2, \
29 .resource = &soc##_gpio_resources[block * 2], \
30 .dev = { \
31 .platform_data = &soc##_gpio_data[block], \
32 }, \
33 }
34
35#define GPIO_DATA(_name, first) \
36 { \
37 .name = _name, \
38 .first_gpio = first, \
39 .first_irq = NOMADIK_GPIO_TO_IRQ(first), \
40 }
41
42#ifdef CONFIG_UX500_SOC_DB8500
43#define GPIO_RESOURCE(block) __GPIO_RESOURCE(U8500, block)
44#define GPIO_DEVICE(block) __GPIO_DEVICE(u8500, block)
45#elif defined(CONFIG_UX500_SOC_DB5500)
46#define GPIO_RESOURCE(block) __GPIO_RESOURCE(U5500, block)
47#define GPIO_DEVICE(block) __GPIO_DEVICE(u5500, block)
48#endif
49
50#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 04ea836969b3..8656379a8309 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -23,109 +23,106 @@
23 23
24/* typesafe io address */ 24/* typesafe io address */
25#define __io_address(n) __io(IO_ADDRESS(n)) 25#define __io_address(n) __io(IO_ADDRESS(n))
26/* used by some plat-nomadik code */
27#define io_p2v(n) __io_address(n)
26 28
27/* 29#include <mach/db8500-regs.h>
28 * Base address definitions for U8500 Onchip IPs. All the 30#include <mach/db5500-regs.h>
29 * peripherals are contained in a single 1 Mbyte region, with 31
30 * AHB peripherals at the bottom and APB peripherals at the 32#ifdef CONFIG_UX500_SOC_DB8500
31 * top of the region. PER stands for PERIPHERAL region which 33#define UX500(periph) U8500_##periph##_BASE
32 * itself divided into sub regions. 34#elif defined(CONFIG_UX500_SOC_DB5500)
33 */ 35#define UX500(periph) U5500_##periph##_BASE
34#define U8500_PER3_BASE 0x80000000 36#endif
35#define U8500_PER2_BASE 0x80110000 37
36#define U8500_PER1_BASE 0x80120000 38#define UX500_BACKUPRAM0_BASE UX500(BACKUPRAM0)
37#define U8500_PER4_BASE 0x80150000 39#define UX500_BACKUPRAM1_BASE UX500(BACKUPRAM1)
38 40#define UX500_B2R2_BASE UX500(B2R2)
39#define U8500_PER6_BASE 0xa03c0000 41
40#define U8500_PER5_BASE 0xa03e0000 42#define UX500_CLKRST1_BASE UX500(CLKRST1)
41#define U8500_PER7_BASE 0xa03d0000 43#define UX500_CLKRST2_BASE UX500(CLKRST2)
42 44#define UX500_CLKRST3_BASE UX500(CLKRST3)
43#define U8500_SVA_BASE 0xa0100000 45#define UX500_CLKRST5_BASE UX500(CLKRST5)
44#define U8500_SIA_BASE 0xa0200000 46#define UX500_CLKRST6_BASE UX500(CLKRST6)
45 47
46#define U8500_SGA_BASE 0xa0300000 48#define UX500_DMA_BASE UX500(DMA)
47#define U8500_MCDE_BASE 0xa0350000 49#define UX500_FSMC_BASE UX500(FSMC)
48#define U8500_DMA_BASE 0xa0362000 50
49 51#define UX500_GIC_CPU_BASE UX500(GIC_CPU)
50#define U8500_SCU_BASE 0xa0410000 52#define UX500_GIC_DIST_BASE UX500(GIC_DIST)
51#define U8500_GIC_CPU_BASE 0xa0410100 53
52#define U8500_TWD_BASE 0xa0410600 54#define UX500_I2C1_BASE UX500(I2C1)
53#define U8500_GIC_DIST_BASE 0xa0411000 55#define UX500_I2C2_BASE UX500(I2C2)
54#define U8500_L2CC_BASE 0xa0412000 56#define UX500_I2C3_BASE UX500(I2C3)
55 57
56#define U8500_TWD_SIZE 0x100 58#define UX500_L2CC_BASE UX500(L2CC)
57 59#define UX500_MCDE_BASE UX500(MCDE)
58/* per7 base addressess */ 60#define UX500_MTU0_BASE UX500(MTU0)
59#define U8500_CR_BASE (U8500_PER7_BASE + 0x8000) 61#define UX500_MTU1_BASE UX500(MTU1)
60#define U8500_MTU0_BASE (U8500_PER7_BASE + 0xa000) 62#define UX500_PRCMU_BASE UX500(PRCMU)
61#define U8500_MTU1_BASE (U8500_PER7_BASE + 0xb000) 63
62#define U8500_TZPC0_BASE (U8500_PER7_BASE + 0xc000) 64#define UX500_RNG_BASE UX500(RNG)
63#define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000) 65#define UX500_RTC_BASE UX500(RTC)
64 66
65/* per6 base addressess */ 67#define UX500_SCU_BASE UX500(SCU)
66#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) 68
67#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) 69#define UX500_SDI0_BASE UX500(SDI0)
68#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) 70#define UX500_SDI1_BASE UX500(SDI1)
69#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000) 71#define UX500_SDI2_BASE UX500(SDI2)
70#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) 72#define UX500_SDI3_BASE UX500(SDI3)
71#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) 73#define UX500_SDI4_BASE UX500(SDI4)
72 74
73/* per5 base addressess */ 75#define UX500_SPI0_BASE UX500(SPI0)
74#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) 76#define UX500_SPI1_BASE UX500(SPI1)
75#define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000) 77#define UX500_SPI2_BASE UX500(SPI2)
76#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) 78#define UX500_SPI3_BASE UX500(SPI3)
77 79
78/* per4 base addressess */ 80#define UX500_SIA_BASE UX500(SIA)
79#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000) 81#define UX500_SVA_BASE UX500(SVA)
80#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x1000) 82
81#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x2000) 83#define UX500_TWD_BASE UX500(TWD)
82#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x3000) 84
83#define U8500_RTC_BASE (U8500_PER4_BASE + 0x4000) 85#define UX500_UART0_BASE UX500(UART0)
84#define U8500_SCR_BASE (U8500_PER4_BASE + 0x5000) 86#define UX500_UART1_BASE UX500(UART1)
85#define U8500_DMC_BASE (U8500_PER4_BASE + 0x6000) 87#define UX500_UART2_BASE UX500(UART2)
86#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x7000) 88
87 89#define UX500_USBOTG_BASE UX500(USBOTG)
88/* per3 base addressess */
89#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
90#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000)
91#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000)
92#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000)
93#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000)
94#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000)
95#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000)
96#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
97#define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000)
98#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
99
100/* per2 base addressess */
101#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
102#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
103#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)
104#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000)
105#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000)
106#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000)
107#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000)
108#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000)
109#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000)
110#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000)
111#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000)
112#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xe000)
113#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000)
114
115/* per1 base addresses */
116#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
117#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
118#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000)
119#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000)
120#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000)
121#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000)
122#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000)
123#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000)
124#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000)
125#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000)
126#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000)
127 90
128/* ST-Ericsson modified pl022 id */ 91/* ST-Ericsson modified pl022 id */
129#define SSP_PER_ID 0x01080022 92#define SSP_PER_ID 0x01080022
130 93
94#ifndef __ASSEMBLY__
95
96#include <asm/cputype.h>
97
98static inline bool cpu_is_u8500(void)
99{
100#ifdef CONFIG_UX500_SOC_DB8500
101 return 1;
102#else
103 return 0;
104#endif
105}
106
107static inline bool cpu_is_u8500ed(void)
108{
109 return cpu_is_u8500() && (read_cpuid_id() & 15) == 0;
110}
111
112static inline bool cpu_is_u8500v1(void)
113{
114 return cpu_is_u8500() && (read_cpuid_id() & 15) == 1;
115}
116
117static inline bool cpu_is_u5500(void)
118{
119#ifdef CONFIG_UX500_SOC_DB5500
120 return 1;
121#else
122 return 0;
123#endif
124}
125
126#endif
127
131#endif /* __MACH_HARDWARE_H */ 128#endif /* __MACH_HARDWARE_H */
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h
index 394b5dd2200f..7970684b1d09 100644
--- a/arch/arm/mach-ux500/include/mach/irqs.h
+++ b/arch/arm/mach-ux500/include/mach/irqs.h
@@ -42,6 +42,7 @@
42#define IRQ_AB4500 (IRQ_SHPI_START + 40) 42#define IRQ_AB4500 (IRQ_SHPI_START + 40)
43#define IRQ_DISP (IRQ_SHPI_START + 48) 43#define IRQ_DISP (IRQ_SHPI_START + 48)
44#define IRQ_SiPI3 (IRQ_SHPI_START + 49) 44#define IRQ_SiPI3 (IRQ_SHPI_START + 49)
45#define IRQ_I2C4 (IRQ_SHPI_START + 51)
45#define IRQ_SSP1 (IRQ_SHPI_START + 52) 46#define IRQ_SSP1 (IRQ_SHPI_START + 52)
46#define IRQ_I2C2 (IRQ_SHPI_START + 55) 47#define IRQ_I2C2 (IRQ_SHPI_START + 55)
47#define IRQ_SDMMC0 (IRQ_SHPI_START + 60) 48#define IRQ_SDMMC0 (IRQ_SHPI_START + 60)
@@ -66,6 +67,12 @@
66/* There are 128 shared peripheral interrupts assigned to 67/* There are 128 shared peripheral interrupts assigned to
67 * INTID[160:32]. The first 32 interrupts are reserved. 68 * INTID[160:32]. The first 32 interrupts are reserved.
68 */ 69 */
69#define NR_IRQS 161 70#define U8500_SOC_NR_IRQS 161
71
72/* After chip-specific IRQ numbers we have the GPIO ones */
73#define NOMADIK_NR_GPIO 288
74#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + U8500_SOC_NR_IRQS)
75#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - U8500_SOC_NR_IRQS)
76#define NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
70 77
71#endif /*ASM_ARCH_IRQS_H*/ 78#endif /*ASM_ARCH_IRQS_H*/
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
index cf0ce1687f24..e978dbd9e210 100644
--- a/arch/arm/mach-ux500/include/mach/setup.h
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -14,10 +14,28 @@
14#include <asm/mach/time.h> 14#include <asm/mach/time.h>
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17extern void u8500_map_io(void); 17extern void __init ux500_map_io(void);
18extern void u8500_init_devices(void); 18extern void __init u5500_map_io(void);
19extern void u8500_init_irq(void); 19extern void __init u8500_map_io(void);
20
21extern void __init ux500_init_devices(void);
22extern void __init u5500_init_devices(void);
23extern void __init u8500_init_devices(void);
24
25extern void __init ux500_init_irq(void);
20/* We re-use nomadik_timer for this platform */ 26/* We re-use nomadik_timer for this platform */
21extern void nmdk_timer_init(void); 27extern void nmdk_timer_init(void);
22 28
29extern void __init amba_add_devices(struct amba_device *devs[], int num);
30
31struct sys_timer;
32extern struct sys_timer ux500_timer;
33
34#define __IO_DEV_DESC(x, sz) { \
35 .virtual = IO_ADDRESS(x), \
36 .pfn = __phys_to_pfn(x), \
37 .length = sz, \
38 .type = MT_DEVICE, \
39}
40
23#endif /* __ASM_ARCH_SETUP_H */ 41#endif /* __ASM_ARCH_SETUP_H */
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 8dfe7ca245d8..438ef16aec90 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -30,7 +30,7 @@ volatile int __cpuinitdata pen_release = -1;
30 30
31static unsigned int __init get_core_count(void) 31static unsigned int __init get_core_count(void)
32{ 32{
33 return scu_get_core_count(__io_address(U8500_SCU_BASE)); 33 return scu_get_core_count(__io_address(UX500_SCU_BASE));
34} 34}
35 35
36static DEFINE_SPINLOCK(boot_lock); 36static DEFINE_SPINLOCK(boot_lock);
@@ -44,7 +44,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
44 * core (e.g. timer irq), then they will not have been enabled 44 * core (e.g. timer irq), then they will not have been enabled
45 * for us: do so 45 * for us: do so
46 */ 46 */
47 gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE)); 47 gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
48 48
49 /* 49 /*
50 * let the primary processor know we're out of the 50 * let the primary processor know we're out of the
@@ -75,7 +75,8 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
75 * that it has been released by resetting pen_release. 75 * that it has been released by resetting pen_release.
76 */ 76 */
77 pen_release = cpu; 77 pen_release = cpu;
78 flush_cache_all(); 78 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
79 outer_clean_range(__pa(&pen_release), __pa(&pen_release) + 1);
79 80
80 timeout = jiffies + (1 * HZ); 81 timeout = jiffies + (1 * HZ);
81 while (time_before(jiffies, timeout)) { 82 while (time_before(jiffies, timeout)) {
@@ -105,12 +106,12 @@ static void __init wakeup_secondary(void)
105 */ 106 */
106#define U8500_CPU1_JUMPADDR_OFFSET 0x1FF4 107#define U8500_CPU1_JUMPADDR_OFFSET 0x1FF4
107 __raw_writel(virt_to_phys(u8500_secondary_startup), 108 __raw_writel(virt_to_phys(u8500_secondary_startup),
108 (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) + 109 __io_address(UX500_BACKUPRAM0_BASE) +
109 U8500_CPU1_JUMPADDR_OFFSET); 110 U8500_CPU1_JUMPADDR_OFFSET);
110 111
111#define U8500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 112#define U8500_CPU1_WAKEMAGIC_OFFSET 0x1FF0
112 __raw_writel(0xA1FEED01, 113 __raw_writel(0xA1FEED01,
113 (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) + 114 __io_address(UX500_BACKUPRAM0_BASE) +
114 U8500_CPU1_WAKEMAGIC_OFFSET); 115 U8500_CPU1_WAKEMAGIC_OFFSET);
115 116
116 /* make sure write buffer is drained */ 117 /* make sure write buffer is drained */
@@ -171,7 +172,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
171 * boot CPU, but only if we have more than one CPU. 172 * boot CPU, but only if we have more than one CPU.
172 */ 173 */
173 percpu_timer_setup(); 174 percpu_timer_setup();
174 scu_enable(__io_address(U8500_SCU_BASE)); 175 scu_enable(__io_address(UX500_SCU_BASE));
175 wakeup_secondary(); 176 wakeup_secondary();
176 } 177 }
177} 178}
diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile
index ba81e70ed813..97cf4d831b0c 100644
--- a/arch/arm/mach-versatile/Makefile
+++ b/arch/arm/mach-versatile/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := core.o clock.o 5obj-y := core.o
6obj-$(CONFIG_ARCH_VERSATILE_PB) += versatile_pb.o 6obj-$(CONFIG_ARCH_VERSATILE_PB) += versatile_pb.o
7obj-$(CONFIG_MACH_VERSATILE_AB) += versatile_ab.o 7obj-$(CONFIG_MACH_VERSATILE_AB) += versatile_ab.o
8obj-$(CONFIG_PCI) += pci.o 8obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
deleted file mode 100644
index c50a44ea7ee6..000000000000
--- a/arch/arm/mach-versatile/clock.c
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * linux/arch/arm/mach-versatile/clock.c
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/device.h>
14#include <linux/list.h>
15#include <linux/errno.h>
16#include <linux/err.h>
17#include <linux/string.h>
18#include <linux/clk.h>
19#include <linux/mutex.h>
20
21#include <asm/clkdev.h>
22#include <asm/hardware/icst307.h>
23
24#include "clock.h"
25
26int clk_enable(struct clk *clk)
27{
28 return 0;
29}
30EXPORT_SYMBOL(clk_enable);
31
32void clk_disable(struct clk *clk)
33{
34}
35EXPORT_SYMBOL(clk_disable);
36
37unsigned long clk_get_rate(struct clk *clk)
38{
39 return clk->rate;
40}
41EXPORT_SYMBOL(clk_get_rate);
42
43long clk_round_rate(struct clk *clk, unsigned long rate)
44{
45 struct icst307_vco vco;
46 vco = icst307_khz_to_vco(clk->params, rate / 1000);
47 return icst307_khz(clk->params, vco) * 1000;
48}
49EXPORT_SYMBOL(clk_round_rate);
50
51int clk_set_rate(struct clk *clk, unsigned long rate)
52{
53 int ret = -EIO;
54
55 if (clk->setvco) {
56 struct icst307_vco vco;
57
58 vco = icst307_khz_to_vco(clk->params, rate / 1000);
59 clk->rate = icst307_khz(clk->params, vco) * 1000;
60 clk->setvco(clk, vco);
61 ret = 0;
62 }
63 return ret;
64}
65EXPORT_SYMBOL(clk_set_rate);
diff --git a/arch/arm/mach-versatile/clock.h b/arch/arm/mach-versatile/clock.h
deleted file mode 100644
index 03468fdc3e58..000000000000
--- a/arch/arm/mach-versatile/clock.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * linux/arch/arm/mach-versatile/clock.h
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11struct module;
12struct icst307_params;
13
14struct clk {
15 unsigned long rate;
16 const struct icst307_params *params;
17 u32 oscoff;
18 void *data;
19 void (*setvco)(struct clk *, struct icst307_vco vco);
20};
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 3b1a4ee01815..3dff8641b03f 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -28,19 +28,15 @@
28#include <linux/amba/clcd.h> 28#include <linux/amba/clcd.h>
29#include <linux/amba/pl061.h> 29#include <linux/amba/pl061.h>
30#include <linux/amba/mmci.h> 30#include <linux/amba/mmci.h>
31#include <linux/clocksource.h>
32#include <linux/clockchips.h>
33#include <linux/cnt32_to_63.h>
34#include <linux/io.h> 31#include <linux/io.h>
35#include <linux/gfp.h> 32#include <linux/gfp.h>
36 33
37#include <asm/clkdev.h> 34#include <asm/clkdev.h>
38#include <asm/system.h> 35#include <asm/system.h>
39#include <mach/hardware.h>
40#include <asm/irq.h> 36#include <asm/irq.h>
41#include <asm/leds.h> 37#include <asm/leds.h>
42#include <asm/hardware/arm_timer.h> 38#include <asm/hardware/arm_timer.h>
43#include <asm/hardware/icst307.h> 39#include <asm/hardware/icst.h>
44#include <asm/hardware/vic.h> 40#include <asm/hardware/vic.h>
45#include <asm/mach-types.h> 41#include <asm/mach-types.h>
46 42
@@ -49,9 +45,12 @@
49#include <asm/mach/irq.h> 45#include <asm/mach/irq.h>
50#include <asm/mach/time.h> 46#include <asm/mach/time.h>
51#include <asm/mach/map.h> 47#include <asm/mach/map.h>
48#include <mach/clkdev.h>
49#include <mach/hardware.h>
50#include <mach/platform.h>
51#include <plat/timer-sp.h>
52 52
53#include "core.h" 53#include "core.h"
54#include "clock.h"
55 54
56/* 55/*
57 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx 56 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
@@ -59,7 +58,6 @@
59 * 58 *
60 * Setup a VA for the Versatile Vectored Interrupt Controller. 59 * Setup a VA for the Versatile Vectored Interrupt Controller.
61 */ 60 */
62#define __io_address(n) __io(IO_ADDRESS(n))
63#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) 61#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
64#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) 62#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
65 63
@@ -229,27 +227,6 @@ void __init versatile_map_io(void)
229 iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc)); 227 iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc));
230} 228}
231 229
232#define VERSATILE_REFCOUNTER (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_24MHz_OFFSET)
233
234/*
235 * This is the Versatile sched_clock implementation. This has
236 * a resolution of 41.7ns, and a maximum value of about 35583 days.
237 *
238 * The return value is guaranteed to be monotonic in that range as
239 * long as there is always less than 89 seconds between successive
240 * calls to this function.
241 */
242unsigned long long sched_clock(void)
243{
244 unsigned long long v = cnt32_to_63(readl(VERSATILE_REFCOUNTER));
245
246 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
247 v *= 125<<1;
248 do_div(v, 3<<1);
249
250 return v;
251}
252
253 230
254#define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET) 231#define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET)
255 232
@@ -380,33 +357,40 @@ static struct mmci_platform_data mmc0_plat_data = {
380/* 357/*
381 * Clock handling 358 * Clock handling
382 */ 359 */
383static const struct icst307_params versatile_oscvco_params = { 360static const struct icst_params versatile_oscvco_params = {
384 .ref = 24000, 361 .ref = 24000000,
385 .vco_max = 200000, 362 .vco_max = ICST307_VCO_MAX,
363 .vco_min = ICST307_VCO_MIN,
386 .vd_min = 4 + 8, 364 .vd_min = 4 + 8,
387 .vd_max = 511 + 8, 365 .vd_max = 511 + 8,
388 .rd_min = 1 + 2, 366 .rd_min = 1 + 2,
389 .rd_max = 127 + 2, 367 .rd_max = 127 + 2,
368 .s2div = icst307_s2div,
369 .idx2s = icst307_idx2s,
390}; 370};
391 371
392static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco) 372static void versatile_oscvco_set(struct clk *clk, struct icst_vco vco)
393{ 373{
394 void __iomem *sys = __io_address(VERSATILE_SYS_BASE); 374 void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET;
395 void __iomem *sys_lock = sys + VERSATILE_SYS_LOCK_OFFSET;
396 u32 val; 375 u32 val;
397 376
398 val = readl(sys + clk->oscoff) & ~0x7ffff; 377 val = readl(clk->vcoreg) & ~0x7ffff;
399 val |= vco.v | (vco.r << 9) | (vco.s << 16); 378 val |= vco.v | (vco.r << 9) | (vco.s << 16);
400 379
401 writel(0xa05f, sys_lock); 380 writel(0xa05f, sys_lock);
402 writel(val, sys + clk->oscoff); 381 writel(val, clk->vcoreg);
403 writel(0, sys_lock); 382 writel(0, sys_lock);
404} 383}
405 384
385static const struct clk_ops osc4_clk_ops = {
386 .round = icst_clk_round,
387 .set = icst_clk_set,
388 .setvco = versatile_oscvco_set,
389};
390
406static struct clk osc4_clk = { 391static struct clk osc4_clk = {
392 .ops = &osc4_clk_ops,
407 .params = &versatile_oscvco_params, 393 .params = &versatile_oscvco_params,
408 .oscoff = VERSATILE_SYS_OSCCLCD_OFFSET,
409 .setvco = versatile_oscvco_set,
410}; 394};
411 395
412/* 396/*
@@ -852,6 +836,8 @@ void __init versatile_init(void)
852{ 836{
853 int i; 837 int i;
854 838
839 osc4_clk.vcoreg = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET;
840
855 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 841 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
856 842
857 platform_device_register(&versatile_flash_device); 843 platform_device_register(&versatile_flash_device);
@@ -875,120 +861,6 @@ void __init versatile_init(void)
875#define TIMER1_VA_BASE (__io_address(VERSATILE_TIMER0_1_BASE) + 0x20) 861#define TIMER1_VA_BASE (__io_address(VERSATILE_TIMER0_1_BASE) + 0x20)
876#define TIMER2_VA_BASE __io_address(VERSATILE_TIMER2_3_BASE) 862#define TIMER2_VA_BASE __io_address(VERSATILE_TIMER2_3_BASE)
877#define TIMER3_VA_BASE (__io_address(VERSATILE_TIMER2_3_BASE) + 0x20) 863#define TIMER3_VA_BASE (__io_address(VERSATILE_TIMER2_3_BASE) + 0x20)
878#define VA_IC_BASE __io_address(VERSATILE_VIC_BASE)
879
880/*
881 * How long is the timer interval?
882 */
883#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
884#if TIMER_INTERVAL >= 0x100000
885#define TIMER_RELOAD (TIMER_INTERVAL >> 8)
886#define TIMER_DIVISOR (TIMER_CTRL_DIV256)
887#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
888#elif TIMER_INTERVAL >= 0x10000
889#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */
890#define TIMER_DIVISOR (TIMER_CTRL_DIV16)
891#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
892#else
893#define TIMER_RELOAD (TIMER_INTERVAL)
894#define TIMER_DIVISOR (TIMER_CTRL_DIV1)
895#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
896#endif
897
898static void timer_set_mode(enum clock_event_mode mode,
899 struct clock_event_device *clk)
900{
901 unsigned long ctrl;
902
903 switch(mode) {
904 case CLOCK_EVT_MODE_PERIODIC:
905 writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
906
907 ctrl = TIMER_CTRL_PERIODIC;
908 ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE;
909 break;
910 case CLOCK_EVT_MODE_ONESHOT:
911 /* period set, and timer enabled in 'next_event' hook */
912 ctrl = TIMER_CTRL_ONESHOT;
913 ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE;
914 break;
915 case CLOCK_EVT_MODE_UNUSED:
916 case CLOCK_EVT_MODE_SHUTDOWN:
917 default:
918 ctrl = 0;
919 }
920
921 writel(ctrl, TIMER0_VA_BASE + TIMER_CTRL);
922}
923
924static int timer_set_next_event(unsigned long evt,
925 struct clock_event_device *unused)
926{
927 unsigned long ctrl = readl(TIMER0_VA_BASE + TIMER_CTRL);
928
929 writel(evt, TIMER0_VA_BASE + TIMER_LOAD);
930 writel(ctrl | TIMER_CTRL_ENABLE, TIMER0_VA_BASE + TIMER_CTRL);
931
932 return 0;
933}
934
935static struct clock_event_device timer0_clockevent = {
936 .name = "timer0",
937 .shift = 32,
938 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
939 .set_mode = timer_set_mode,
940 .set_next_event = timer_set_next_event,
941};
942
943/*
944 * IRQ handler for the timer
945 */
946static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id)
947{
948 struct clock_event_device *evt = &timer0_clockevent;
949
950 writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
951
952 evt->event_handler(evt);
953
954 return IRQ_HANDLED;
955}
956
957static struct irqaction versatile_timer_irq = {
958 .name = "Versatile Timer Tick",
959 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
960 .handler = versatile_timer_interrupt,
961};
962
963static cycle_t versatile_get_cycles(struct clocksource *cs)
964{
965 return ~readl(TIMER3_VA_BASE + TIMER_VALUE);
966}
967
968static struct clocksource clocksource_versatile = {
969 .name = "timer3",
970 .rating = 200,
971 .read = versatile_get_cycles,
972 .mask = CLOCKSOURCE_MASK(32),
973 .shift = 20,
974 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
975};
976
977static int __init versatile_clocksource_init(void)
978{
979 /* setup timer3 as free-running clocksource */
980 writel(0, TIMER3_VA_BASE + TIMER_CTRL);
981 writel(0xffffffff, TIMER3_VA_BASE + TIMER_LOAD);
982 writel(0xffffffff, TIMER3_VA_BASE + TIMER_VALUE);
983 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
984 TIMER3_VA_BASE + TIMER_CTRL);
985
986 clocksource_versatile.mult =
987 clocksource_khz2mult(1000, clocksource_versatile.shift);
988 clocksource_register(&clocksource_versatile);
989
990 return 0;
991}
992 864
993/* 865/*
994 * Set up timer interrupt, and return the current time in seconds. 866 * Set up timer interrupt, and return the current time in seconds.
@@ -1017,22 +889,8 @@ static void __init versatile_timer_init(void)
1017 writel(0, TIMER2_VA_BASE + TIMER_CTRL); 889 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
1018 writel(0, TIMER3_VA_BASE + TIMER_CTRL); 890 writel(0, TIMER3_VA_BASE + TIMER_CTRL);
1019 891
1020 /* 892 sp804_clocksource_init(TIMER3_VA_BASE);
1021 * Make irqs happen for the system timer 893 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1);
1022 */
1023 setup_irq(IRQ_TIMERINT0_1, &versatile_timer_irq);
1024
1025 versatile_clocksource_init();
1026
1027 timer0_clockevent.mult =
1028 div_sc(1000000, NSEC_PER_SEC, timer0_clockevent.shift);
1029 timer0_clockevent.max_delta_ns =
1030 clockevent_delta2ns(0xffffffff, &timer0_clockevent);
1031 timer0_clockevent.min_delta_ns =
1032 clockevent_delta2ns(0xf, &timer0_clockevent);
1033
1034 timer0_clockevent.cpumask = cpumask_of(0);
1035 clockevents_register_device(&timer0_clockevent);
1036} 894}
1037 895
1038struct sys_timer versatile_timer = { 896struct sys_timer versatile_timer = {
diff --git a/arch/arm/mach-versatile/include/mach/clkdev.h b/arch/arm/mach-versatile/include/mach/clkdev.h
index 04b37a89801c..e58d0771b64e 100644
--- a/arch/arm/mach-versatile/include/mach/clkdev.h
+++ b/arch/arm/mach-versatile/include/mach/clkdev.h
@@ -1,6 +1,15 @@
1#ifndef __ASM_MACH_CLKDEV_H 1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H 2#define __ASM_MACH_CLKDEV_H
3 3
4#include <plat/clock.h>
5
6struct clk {
7 unsigned long rate;
8 const struct clk_ops *ops;
9 const struct icst_params *params;
10 void __iomem *vcoreg;
11};
12
4#define __clk_get(clk) ({ 1; }) 13#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0) 14#define __clk_put(clk) do { } while (0)
6 15
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
index 8c8020980585..e6f7c1663160 100644
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ b/arch/arm/mach-versatile/include/mach/entry-macro.S
@@ -8,6 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h> 10#include <mach/hardware.h>
11#include <mach/platform.h>
11#include <asm/hardware/vic.h> 12#include <asm/hardware/vic.h>
12 13
13 .macro disable_fiq 14 .macro disable_fiq
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index 7aa906c93154..4f8f99aac938 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -23,7 +23,6 @@
23#define __ASM_ARCH_HARDWARE_H 23#define __ASM_ARCH_HARDWARE_H
24 24
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26#include <mach/platform.h>
27 26
28/* 27/*
29 * PCI space virtual addresses 28 * PCI space virtual addresses
@@ -49,4 +48,6 @@
49/* macro to get at IO space when running virtually */ 48/* macro to get at IO space when running virtually */
50#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 49#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
51 50
51#define __io_address(n) __io(IO_ADDRESS(n))
52
52#endif 53#endif
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index 83207395191a..ec087407b163 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -205,7 +205,7 @@
205#define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */ 205#define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */
206#define VERSATILE_DMAC_BASE 0x10130000 /* DMA controller */ 206#define VERSATILE_DMAC_BASE 0x10130000 /* DMA controller */
207#define VERSATILE_VIC_BASE 0x10140000 /* Vectored interrupt controller */ 207#define VERSATILE_VIC_BASE 0x10140000 /* Vectored interrupt controller */
208#define VERSATILE_PERIPH_BASE 0x10150000 /* off-chip peripherals alias from */ 208#define VERSATILE_PERIPH_BASE 0x10150000 /* off-chip peripherals alias from */
209 /* 0x10000000 - 0x100FFFFF */ 209 /* 0x10000000 - 0x100FFFFF */
210#define VERSATILE_AHBM_BASE 0x101D0000 /* AHB monitor */ 210#define VERSATILE_AHBM_BASE 0x101D0000 /* AHB monitor */
211#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ 211#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
@@ -213,7 +213,7 @@
213#define VERSATILE_TIMER0_1_BASE 0x101E2000 /* Timer 0 and 1 */ 213#define VERSATILE_TIMER0_1_BASE 0x101E2000 /* Timer 0 and 1 */
214#define VERSATILE_TIMER2_3_BASE 0x101E3000 /* Timer 2 and 3 */ 214#define VERSATILE_TIMER2_3_BASE 0x101E3000 /* Timer 2 and 3 */
215#define VERSATILE_GPIO0_BASE 0x101E4000 /* GPIO port 0 */ 215#define VERSATILE_GPIO0_BASE 0x101E4000 /* GPIO port 0 */
216#define VERSATILE_GPIO1_BASE 0x101E5000 /* GPIO port 1 */ 216#define VERSATILE_GPIO1_BASE 0x101E5000 /* GPIO port 1 */
217#define VERSATILE_GPIO2_BASE 0x101E6000 /* GPIO port 2 */ 217#define VERSATILE_GPIO2_BASE 0x101E6000 /* GPIO port 2 */
218#define VERSATILE_GPIO3_BASE 0x101E7000 /* GPIO port 3 */ 218#define VERSATILE_GPIO3_BASE 0x101E7000 /* GPIO port 3 */
219#define VERSATILE_RTC_BASE 0x101E8000 /* Real Time Clock */ 219#define VERSATILE_RTC_BASE 0x101E8000 /* Real Time Clock */
@@ -379,12 +379,6 @@
379#define SIC_INT_PCI3 30 379#define SIC_INT_PCI3 30
380 380
381 381
382/*
383 * Clean base - dummy
384 *
385 */
386#define CLEAN_BASE VERSATILE_BOOT_ROM_HI
387
388/* 382/*
389 * System controller bit assignment 383 * System controller bit assignment
390 */ 384 */
@@ -397,20 +391,6 @@
397#define VERSATILE_TIMER4_EnSel 21 391#define VERSATILE_TIMER4_EnSel 21
398 392
399 393
400#define MAX_TIMER 2
401#define MAX_PERIOD 699050
402#define TICKS_PER_uSEC 1
403
404/*
405 * These are useconds NOT ticks.
406 *
407 */
408#define mSEC_1 1000
409#define mSEC_5 (mSEC_1 * 5)
410#define mSEC_10 (mSEC_1 * 10)
411#define mSEC_25 (mSEC_1 * 25)
412#define SEC_1 (mSEC_1 * 1000)
413
414#define VERSATILE_CSR_BASE 0x10000000 394#define VERSATILE_CSR_BASE 0x10000000
415#define VERSATILE_CSR_SIZE 0x10000000 395#define VERSATILE_CSR_SIZE 0x10000000
416 396
@@ -432,5 +412,3 @@
432#endif 412#endif
433 413
434#endif 414#endif
435
436/* END */
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
new file mode 100644
index 000000000000..3f19b660a165
--- /dev/null
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -0,0 +1,9 @@
1menu "Versatile Express platform type"
2 depends on ARCH_VEXPRESS
3
4config ARCH_VEXPRESS_CA9X4
5 bool "Versatile Express Cortex-A9x4 tile"
6 select CPU_V7
7 select ARM_GIC
8
9endmenu
diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile
new file mode 100644
index 000000000000..1b71b77ade22
--- /dev/null
+++ b/arch/arm/mach-vexpress/Makefile
@@ -0,0 +1,8 @@
1#
2# Makefile for the linux kernel.
3#
4
5obj-y := v2m.o
6obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o
7obj-$(CONFIG_SMP) += platsmp.o headsmp.o
8obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
diff --git a/arch/arm/mach-vexpress/Makefile.boot b/arch/arm/mach-vexpress/Makefile.boot
new file mode 100644
index 000000000000..07c2d9c457ec
--- /dev/null
+++ b/arch/arm/mach-vexpress/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x60008000
2params_phys-y := 0x60000100
3initrd_phys-y := 0x60800000
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
new file mode 100644
index 000000000000..57dd95ce41f9
--- /dev/null
+++ b/arch/arm/mach-vexpress/core.h
@@ -0,0 +1,26 @@
1#define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000)
2#define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x))
3
4#define AMBA_DEVICE(name,busid,base,plat) \
5struct amba_device name##_device = { \
6 .dev = { \
7 .coherent_dma_mask = ~0UL, \
8 .init_name = busid, \
9 .platform_data = plat, \
10 }, \
11 .res = { \
12 .start = base, \
13 .end = base + SZ_4K - 1, \
14 .flags = IORESOURCE_MEM, \
15 }, \
16 .dma_mask = ~0UL, \
17 .irq = IRQ_##base, \
18 /* .dma = DMA_##base,*/ \
19}
20
21struct map_desc;
22
23void v2m_map_io(struct map_desc *tile, size_t num);
24extern struct sys_timer v2m_timer;
25
26extern void __iomem *gic_cpu_base_addr;
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
new file mode 100644
index 000000000000..e6f73030d5f0
--- /dev/null
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -0,0 +1,249 @@
1/*
2 * Versatile Express Core Tile Cortex A9x4 Support
3 */
4#include <linux/init.h>
5#include <linux/device.h>
6#include <linux/dma-mapping.h>
7#include <linux/platform_device.h>
8#include <linux/amba/bus.h>
9#include <linux/amba/clcd.h>
10
11#include <asm/clkdev.h>
12#include <asm/hardware/arm_timer.h>
13#include <asm/hardware/cache-l2x0.h>
14#include <asm/hardware/gic.h>
15#include <asm/mach-types.h>
16#include <asm/pmu.h>
17
18#include <mach/clkdev.h>
19#include <mach/ct-ca9x4.h>
20
21#include <plat/timer-sp.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/time.h>
26
27#include "core.h"
28
29#include <mach/motherboard.h>
30
31#define V2M_PA_CS7 0x10000000
32
33static struct map_desc ct_ca9x4_io_desc[] __initdata = {
34 {
35 .virtual = __MMIO_P2V(CT_CA9X4_MPIC),
36 .pfn = __phys_to_pfn(CT_CA9X4_MPIC),
37 .length = SZ_16K,
38 .type = MT_DEVICE,
39 }, {
40 .virtual = __MMIO_P2V(CT_CA9X4_SP804_TIMER),
41 .pfn = __phys_to_pfn(CT_CA9X4_SP804_TIMER),
42 .length = SZ_4K,
43 .type = MT_DEVICE,
44 }, {
45 .virtual = __MMIO_P2V(CT_CA9X4_L2CC),
46 .pfn = __phys_to_pfn(CT_CA9X4_L2CC),
47 .length = SZ_4K,
48 .type = MT_DEVICE,
49 },
50};
51
52static void __init ct_ca9x4_map_io(void)
53{
54 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
55}
56
57void __iomem *gic_cpu_base_addr;
58
59static void __init ct_ca9x4_init_irq(void)
60{
61 gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU);
62 gic_dist_init(0, MMIO_P2V(A9_MPCORE_GIC_DIST), 29);
63 gic_cpu_init(0, gic_cpu_base_addr);
64}
65
66#if 0
67static void ct_ca9x4_timer_init(void)
68{
69 writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL);
70 writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL);
71
72 sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1));
73 sp804_clockevents_init(MMIO_P2V(CT_CA9X4_TIMER0), IRQ_CT_CA9X4_TIMER0);
74}
75
76static struct sys_timer ct_ca9x4_timer = {
77 .init = ct_ca9x4_timer_init,
78};
79#endif
80
81static struct clcd_panel xvga_panel = {
82 .mode = {
83 .name = "XVGA",
84 .refresh = 60,
85 .xres = 1024,
86 .yres = 768,
87 .pixclock = 15384,
88 .left_margin = 168,
89 .right_margin = 8,
90 .upper_margin = 29,
91 .lower_margin = 3,
92 .hsync_len = 144,
93 .vsync_len = 6,
94 .sync = 0,
95 .vmode = FB_VMODE_NONINTERLACED,
96 },
97 .width = -1,
98 .height = -1,
99 .tim2 = TIM2_BCD | TIM2_IPC,
100 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
101 .bpp = 16,
102};
103
104static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
105{
106 v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0);
107 v2m_cfg_write(SYS_CFG_DVIMODE | SYS_CFG_SITE_DB1, 2);
108}
109
110static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
111{
112 unsigned long framesize = 1024 * 768 * 2;
113 dma_addr_t dma;
114
115 fb->panel = &xvga_panel;
116
117 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
118 &dma, GFP_KERNEL);
119 if (!fb->fb.screen_base) {
120 printk(KERN_ERR "CLCD: unable to map frame buffer\n");
121 return -ENOMEM;
122 }
123 fb->fb.fix.smem_start = dma;
124 fb->fb.fix.smem_len = framesize;
125
126 return 0;
127}
128
129static int ct_ca9x4_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
130{
131 return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
132 fb->fb.fix.smem_start, fb->fb.fix.smem_len);
133}
134
135static void ct_ca9x4_clcd_remove(struct clcd_fb *fb)
136{
137 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
138 fb->fb.screen_base, fb->fb.fix.smem_start);
139}
140
141static struct clcd_board ct_ca9x4_clcd_data = {
142 .name = "CT-CA9X4",
143 .check = clcdfb_check,
144 .decode = clcdfb_decode,
145 .enable = ct_ca9x4_clcd_enable,
146 .setup = ct_ca9x4_clcd_setup,
147 .mmap = ct_ca9x4_clcd_mmap,
148 .remove = ct_ca9x4_clcd_remove,
149};
150
151static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
152static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL);
153static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL);
154static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL);
155
156static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
157 &clcd_device,
158 &dmc_device,
159 &smc_device,
160 &gpio_device,
161};
162
163
164static long ct_round(struct clk *clk, unsigned long rate)
165{
166 return rate;
167}
168
169static int ct_set(struct clk *clk, unsigned long rate)
170{
171 return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_DB1 | 1, rate);
172}
173
174static const struct clk_ops osc1_clk_ops = {
175 .round = ct_round,
176 .set = ct_set,
177};
178
179static struct clk osc1_clk = {
180 .ops = &osc1_clk_ops,
181 .rate = 24000000,
182};
183
184static struct clk_lookup lookups[] = {
185 { /* CLCD */
186 .dev_id = "ct:clcd",
187 .clk = &osc1_clk,
188 },
189};
190
191static struct resource pmu_resources[] = {
192 [0] = {
193 .start = IRQ_CT_CA9X4_PMU_CPU0,
194 .end = IRQ_CT_CA9X4_PMU_CPU0,
195 .flags = IORESOURCE_IRQ,
196 },
197 [1] = {
198 .start = IRQ_CT_CA9X4_PMU_CPU1,
199 .end = IRQ_CT_CA9X4_PMU_CPU1,
200 .flags = IORESOURCE_IRQ,
201 },
202 [2] = {
203 .start = IRQ_CT_CA9X4_PMU_CPU2,
204 .end = IRQ_CT_CA9X4_PMU_CPU2,
205 .flags = IORESOURCE_IRQ,
206 },
207 [3] = {
208 .start = IRQ_CT_CA9X4_PMU_CPU3,
209 .end = IRQ_CT_CA9X4_PMU_CPU3,
210 .flags = IORESOURCE_IRQ,
211 },
212};
213
214static struct platform_device pmu_device = {
215 .name = "arm-pmu",
216 .id = ARM_PMU_DEVICE_CPU,
217 .num_resources = ARRAY_SIZE(pmu_resources),
218 .resource = pmu_resources,
219};
220
221static void ct_ca9x4_init(void)
222{
223 int i;
224
225#ifdef CONFIG_CACHE_L2X0
226 l2x0_init(MMIO_P2V(CT_CA9X4_L2CC), 0x00000000, 0xfe0fffff);
227#endif
228
229 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
230
231 for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
232 amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
233
234 platform_device_register(&pmu_device);
235}
236
237MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
238 .phys_io = V2M_UART0,
239 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
240 .boot_params = PHYS_OFFSET + 0x00000100,
241 .map_io = ct_ca9x4_map_io,
242 .init_irq = ct_ca9x4_init_irq,
243#if 0
244 .timer = &ct_ca9x4_timer,
245#else
246 .timer = &v2m_timer,
247#endif
248 .init_machine = ct_ca9x4_init,
249MACHINE_END
diff --git a/arch/arm/mach-vexpress/headsmp.S b/arch/arm/mach-vexpress/headsmp.S
new file mode 100644
index 000000000000..8a78ff68e1ee
--- /dev/null
+++ b/arch/arm/mach-vexpress/headsmp.S
@@ -0,0 +1,39 @@
1/*
2 * linux/arch/arm/mach-vexpress/headsmp.S
3 *
4 * Copyright (c) 2003 ARM Limited
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/linkage.h>
12#include <linux/init.h>
13
14 __INIT
15
16/*
17 * Versatile Express specific entry point for secondary CPUs. This
18 * provides a "holding pen" into which all secondary cores are held
19 * until we're ready for them to initialise.
20 */
21ENTRY(vexpress_secondary_startup)
22 mrc p15, 0, r0, c0, c0, 5
23 and r0, r0, #15
24 adr r4, 1f
25 ldmia r4, {r5, r6}
26 sub r4, r4, r5
27 add r6, r6, r4
28pen: ldr r7, [r6]
29 cmp r7, r0
30 bne pen
31
32 /*
33 * we've been released from the holding pen: secondary_stack
34 * should now contain the SVC stack for this core
35 */
36 b secondary_startup
37
381: .long .
39 .long pen_release
diff --git a/arch/arm/mach-vexpress/include/mach/clkdev.h b/arch/arm/mach-vexpress/include/mach/clkdev.h
new file mode 100644
index 000000000000..3f8307d73cad
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/clkdev.h
@@ -0,0 +1,15 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#include <plat/clock.h>
5
6struct clk {
7 const struct clk_ops *ops;
8 unsigned long rate;
9 const struct icst_params *params;
10};
11
12#define __clk_get(clk) ({ 1; })
13#define __clk_put(clk) do { } while (0)
14
15#endif
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
new file mode 100644
index 000000000000..8650f04136ef
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -0,0 +1,47 @@
1#ifndef __MACH_CT_CA9X4_H
2#define __MACH_CT_CA9X4_H
3
4/*
5 * Physical base addresses
6 */
7#define CT_CA9X4_CLCDC (0x10020000)
8#define CT_CA9X4_AXIRAM (0x10060000)
9#define CT_CA9X4_DMC (0x100e0000)
10#define CT_CA9X4_SMC (0x100e1000)
11#define CT_CA9X4_SCC (0x100e2000)
12#define CT_CA9X4_SP804_TIMER (0x100e4000)
13#define CT_CA9X4_SP805_WDT (0x100e5000)
14#define CT_CA9X4_TZPC (0x100e6000)
15#define CT_CA9X4_GPIO (0x100e8000)
16#define CT_CA9X4_FASTAXI (0x100e9000)
17#define CT_CA9X4_SLOWAXI (0x100ea000)
18#define CT_CA9X4_TZASC (0x100ec000)
19#define CT_CA9X4_CORESIGHT (0x10200000)
20#define CT_CA9X4_MPIC (0x1e000000)
21#define CT_CA9X4_SYSTIMER (0x1e004000)
22#define CT_CA9X4_SYSWDT (0x1e007000)
23#define CT_CA9X4_L2CC (0x1e00a000)
24
25#define CT_CA9X4_TIMER0 (CT_CA9X4_SP804_TIMER + 0x000)
26#define CT_CA9X4_TIMER1 (CT_CA9X4_SP804_TIMER + 0x020)
27
28#define A9_MPCORE_SCU (CT_CA9X4_MPIC + 0x0000)
29#define A9_MPCORE_GIC_CPU (CT_CA9X4_MPIC + 0x0100)
30#define A9_MPCORE_GIT (CT_CA9X4_MPIC + 0x0200)
31#define A9_MPCORE_GIC_DIST (CT_CA9X4_MPIC + 0x1000)
32
33/*
34 * Interrupts. Those in {} are for AMBA devices
35 */
36#define IRQ_CT_CA9X4_CLCDC { 76 }
37#define IRQ_CT_CA9X4_DMC { -1 }
38#define IRQ_CT_CA9X4_SMC { 77, 78 }
39#define IRQ_CT_CA9X4_TIMER0 80
40#define IRQ_CT_CA9X4_TIMER1 81
41#define IRQ_CT_CA9X4_GPIO { 82 }
42#define IRQ_CT_CA9X4_PMU_CPU0 92
43#define IRQ_CT_CA9X4_PMU_CPU1 93
44#define IRQ_CT_CA9X4_PMU_CPU2 94
45#define IRQ_CT_CA9X4_PMU_CPU3 95
46
47#endif
diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S
new file mode 100644
index 000000000000..5167e2aceeba
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S
@@ -0,0 +1,23 @@
1/* arch/arm/mach-realview/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#define DEBUG_LL_UART_OFFSET 0x00009000
14
15 .macro addruart,rx,tmp
16 mrc p15, 0, \rx, c1, c0
17 tst \rx, #1 @ MMU enabled?
18 moveq \rx, #0x10000000
19 movne \rx, #0xf8000000 @ virtual base
20 orr \rx, \rx, #DEBUG_LL_UART_OFFSET
21 .endm
22
23#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
new file mode 100644
index 000000000000..20e9fb514f0a
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -0,0 +1,67 @@
1#include <asm/hardware/gic.h>
2
3 .macro disable_fiq
4 .endm
5
6 .macro get_irqnr_preamble, base, tmp
7 ldr \base, =gic_cpu_base_addr
8 ldr \base, [\base]
9 .endm
10
11 .macro arch_ret_to_user, tmp1, tmp2
12 .endm
13
14 /*
15 * The interrupt numbering scheme is defined in the
16 * interrupt controller spec. To wit:
17 *
18 * Interrupts 0-15 are IPI
19 * 16-28 are reserved
20 * 29-31 are local. We allow 30 to be used for the watchdog.
21 * 32-1020 are global
22 * 1021-1022 are reserved
23 * 1023 is "spurious" (no interrupt)
24 *
25 * For now, we ignore all local interrupts so only return an interrupt if it's
26 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
27 *
28 * A simple read from the controller will tell us the number of the highest
29 * priority enabled interrupt. We then just need to check whether it is in the
30 * valid range for an IRQ (30-1020 inclusive).
31 */
32
33 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
34 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
35 ldr \tmp, =1021
36 bic \irqnr, \irqstat, #0x1c00
37 cmp \irqnr, #29
38 cmpcc \irqnr, \irqnr
39 cmpne \irqnr, \tmp
40 cmpcs \irqnr, \irqnr
41 .endm
42
43 /* We assume that irqstat (the raw value of the IRQ acknowledge
44 * register) is preserved from the macro above.
45 * If there is an IPI, we immediately signal end of interrupt on the
46 * controller, since this requires the original irqstat value which
47 * we won't easily be able to recreate later.
48 */
49
50 .macro test_for_ipi, irqnr, irqstat, base, tmp
51 bic \irqnr, \irqstat, #0x1c00
52 cmp \irqnr, #16
53 strcc \irqstat, [\base, #GIC_CPU_EOI]
54 cmpcs \irqnr, \irqnr
55 .endm
56
57 /* As above, this assumes that irqstat and base are preserved.. */
58
59 .macro test_for_ltirq, irqnr, irqstat, base, tmp
60 bic \irqnr, \irqstat, #0x1c00
61 mov \tmp, #0
62 cmp \irqnr, #29
63 moveq \tmp, #1
64 streq \irqstat, [\base, #GIC_CPU_EOI]
65 cmp \tmp, #0
66 .endm
67
diff --git a/arch/arm/mach-vexpress/include/mach/hardware.h b/arch/arm/mach-vexpress/include/mach/hardware.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/hardware.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h
new file mode 100644
index 000000000000..748bb524ee71
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/io.h
@@ -0,0 +1,28 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25#define __io(a) __typesafe_io(a)
26#define __mem_pci(a) (a)
27
28#endif
diff --git a/arch/arm/mach-vexpress/include/mach/irqs.h b/arch/arm/mach-vexpress/include/mach/irqs.h
new file mode 100644
index 000000000000..7054cbfc9de5
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/irqs.h
@@ -0,0 +1,4 @@
1#define IRQ_LOCALTIMER 29
2#define IRQ_LOCALWDOG 30
3
4#define NR_IRQS 128
diff --git a/arch/arm/mach-vexpress/include/mach/memory.h b/arch/arm/mach-vexpress/include/mach/memory.h
new file mode 100644
index 000000000000..be28232ae639
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/memory.h
@@ -0,0 +1,25 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/memory.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_MEMORY_H
21#define __ASM_ARCH_MEMORY_H
22
23#define PHYS_OFFSET UL(0x60000000)
24
25#endif
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
new file mode 100644
index 000000000000..98a8ded055bf
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -0,0 +1,121 @@
1#ifndef __MACH_MOTHERBOARD_H
2#define __MACH_MOTHERBOARD_H
3
4/*
5 * Physical addresses, offset from V2M_PA_CS0-3
6 */
7#define V2M_NOR0 (V2M_PA_CS0)
8#define V2M_NOR1 (V2M_PA_CS1)
9#define V2M_SRAM (V2M_PA_CS2)
10#define V2M_VIDEO_SRAM (V2M_PA_CS3 + 0x00000000)
11#define V2M_LAN9118 (V2M_PA_CS3 + 0x02000000)
12#define V2M_ISP1761 (V2M_PA_CS3 + 0x03000000)
13
14/*
15 * Physical addresses, offset from V2M_PA_CS7
16 */
17#define V2M_SYSREGS (V2M_PA_CS7 + 0x00000000)
18#define V2M_SYSCTL (V2M_PA_CS7 + 0x00001000)
19#define V2M_SERIAL_BUS_PCI (V2M_PA_CS7 + 0x00002000)
20
21#define V2M_AACI (V2M_PA_CS7 + 0x00004000)
22#define V2M_MMCI (V2M_PA_CS7 + 0x00005000)
23#define V2M_KMI0 (V2M_PA_CS7 + 0x00006000)
24#define V2M_KMI1 (V2M_PA_CS7 + 0x00007000)
25
26#define V2M_UART0 (V2M_PA_CS7 + 0x00009000)
27#define V2M_UART1 (V2M_PA_CS7 + 0x0000a000)
28#define V2M_UART2 (V2M_PA_CS7 + 0x0000b000)
29#define V2M_UART3 (V2M_PA_CS7 + 0x0000c000)
30
31#define V2M_WDT (V2M_PA_CS7 + 0x0000f000)
32
33#define V2M_TIMER01 (V2M_PA_CS7 + 0x00011000)
34#define V2M_TIMER23 (V2M_PA_CS7 + 0x00012000)
35
36#define V2M_SERIAL_BUS_DVI (V2M_PA_CS7 + 0x00016000)
37#define V2M_RTC (V2M_PA_CS7 + 0x00017000)
38
39#define V2M_CF (V2M_PA_CS7 + 0x0001a000)
40#define V2M_CLCD (V2M_PA_CS7 + 0x0001f000)
41
42#define V2M_SYS_ID (V2M_SYSREGS + 0x000)
43#define V2M_SYS_SW (V2M_SYSREGS + 0x004)
44#define V2M_SYS_LED (V2M_SYSREGS + 0x008)
45#define V2M_SYS_100HZ (V2M_SYSREGS + 0x024)
46#define V2M_SYS_FLAGS (V2M_SYSREGS + 0x030)
47#define V2M_SYS_FLAGSSET (V2M_SYSREGS + 0x030)
48#define V2M_SYS_FLAGSCLR (V2M_SYSREGS + 0x034)
49#define V2M_SYS_NVFLAGS (V2M_SYSREGS + 0x038)
50#define V2M_SYS_NVFLAGSSET (V2M_SYSREGS + 0x038)
51#define V2M_SYS_NVFLAGSCLR (V2M_SYSREGS + 0x03c)
52#define V2M_SYS_MCI (V2M_SYSREGS + 0x048)
53#define V2M_SYS_FLASH (V2M_SYSREGS + 0x03c)
54#define V2M_SYS_CFGSW (V2M_SYSREGS + 0x058)
55#define V2M_SYS_24MHZ (V2M_SYSREGS + 0x05c)
56#define V2M_SYS_MISC (V2M_SYSREGS + 0x060)
57#define V2M_SYS_DMA (V2M_SYSREGS + 0x064)
58#define V2M_SYS_PROCID0 (V2M_SYSREGS + 0x084)
59#define V2M_SYS_PROCID1 (V2M_SYSREGS + 0x088)
60#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
61#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
62#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
63
64#define V2M_TIMER0 (V2M_TIMER01 + 0x000)
65#define V2M_TIMER1 (V2M_TIMER01 + 0x020)
66
67#define V2M_TIMER2 (V2M_TIMER23 + 0x000)
68#define V2M_TIMER3 (V2M_TIMER23 + 0x020)
69
70
71/*
72 * Interrupts. Those in {} are for AMBA devices
73 */
74#define IRQ_V2M_WDT { (32 + 0) }
75#define IRQ_V2M_TIMER0 (32 + 2)
76#define IRQ_V2M_TIMER1 (32 + 2)
77#define IRQ_V2M_TIMER2 (32 + 3)
78#define IRQ_V2M_TIMER3 (32 + 3)
79#define IRQ_V2M_RTC { (32 + 4) }
80#define IRQ_V2M_UART0 { (32 + 5) }
81#define IRQ_V2M_UART1 { (32 + 6) }
82#define IRQ_V2M_UART2 { (32 + 7) }
83#define IRQ_V2M_UART3 { (32 + 8) }
84#define IRQ_V2M_MMCI { (32 + 9), (32 + 10) }
85#define IRQ_V2M_AACI { (32 + 11) }
86#define IRQ_V2M_KMI0 { (32 + 12) }
87#define IRQ_V2M_KMI1 { (32 + 13) }
88#define IRQ_V2M_CLCD { (32 + 14) }
89#define IRQ_V2M_LAN9118 (32 + 15)
90#define IRQ_V2M_ISP1761 (32 + 16)
91#define IRQ_V2M_PCIE (32 + 17)
92
93
94/*
95 * Configuration
96 */
97#define SYS_CFG_START (1 << 31)
98#define SYS_CFG_WRITE (1 << 30)
99#define SYS_CFG_OSC (1 << 20)
100#define SYS_CFG_VOLT (2 << 20)
101#define SYS_CFG_AMP (3 << 20)
102#define SYS_CFG_TEMP (4 << 20)
103#define SYS_CFG_RESET (5 << 20)
104#define SYS_CFG_SCC (6 << 20)
105#define SYS_CFG_MUXFPGA (7 << 20)
106#define SYS_CFG_SHUTDOWN (8 << 20)
107#define SYS_CFG_REBOOT (9 << 20)
108#define SYS_CFG_DVIMODE (11 << 20)
109#define SYS_CFG_POWER (12 << 20)
110#define SYS_CFG_SITE_MB (0 << 16)
111#define SYS_CFG_SITE_DB1 (1 << 16)
112#define SYS_CFG_SITE_DB2 (2 << 16)
113#define SYS_CFG_STACK(n) ((n) << 12)
114
115#define SYS_CFG_ERR (1 << 1)
116#define SYS_CFG_COMPLETE (1 << 0)
117
118int v2m_cfg_write(u32 devfn, u32 data);
119int v2m_cfg_read(u32 devfn, u32 *data);
120
121#endif
diff --git a/arch/arm/mach-vexpress/include/mach/smp.h b/arch/arm/mach-vexpress/include/mach/smp.h
new file mode 100644
index 000000000000..72a9621ed087
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/smp.h
@@ -0,0 +1,21 @@
1#ifndef __MACH_SMP_H
2#define __MACH_SMP_H
3
4#include <asm/hardware/gic.h>
5
6#define hard_smp_processor_id() \
7 ({ \
8 unsigned int cpunum; \
9 __asm__("mrc p15, 0, %0, c0, c0, 5" \
10 : "=r" (cpunum)); \
11 cpunum &= 0x0F; \
12 })
13
14/*
15 * We use IRQ1 as the IPI
16 */
17static inline void smp_cross_call(const struct cpumask *mask)
18{
19 gic_raise_softirq(mask, 1);
20}
21#endif
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
new file mode 100644
index 000000000000..899a4e628a4c
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/system.h
@@ -0,0 +1,37 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30 cpu_do_idle();
31}
32
33static inline void arch_reset(char mode, const char *cmd)
34{
35}
36
37#endif
diff --git a/arch/arm/mach-vexpress/include/mach/timex.h b/arch/arm/mach-vexpress/include/mach/timex.h
new file mode 100644
index 000000000000..00029bacd43c
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/timex.h
@@ -0,0 +1,23 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/timex.h
3 *
4 * RealView architecture timex specifications
5 *
6 * Copyright (C) 2003 ARM Limited
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/arch/arm/mach-vexpress/include/mach/uncompress.h b/arch/arm/mach-vexpress/include/mach/uncompress.h
new file mode 100644
index 000000000000..7972c5748d0e
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/uncompress.h
@@ -0,0 +1,52 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/uncompress.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
21#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
22#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
23#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
24
25#define get_uart_base() (0x10000000 + 0x00009000)
26
27/*
28 * This does not append a newline
29 */
30static inline void putc(int c)
31{
32 unsigned long base = get_uart_base();
33
34 while (AMBA_UART_FR(base) & (1 << 5))
35 barrier();
36
37 AMBA_UART_DR(base) = c;
38}
39
40static inline void flush(void)
41{
42 unsigned long base = get_uart_base();
43
44 while (AMBA_UART_FR(base) & (1 << 3))
45 barrier();
46}
47
48/*
49 * nothing to do
50 */
51#define arch_decomp_setup()
52#define arch_decomp_wdog()
diff --git a/arch/arm/mach-vexpress/include/mach/vmalloc.h b/arch/arm/mach-vexpress/include/mach/vmalloc.h
new file mode 100644
index 000000000000..f43a36ef678b
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/vmalloc.h
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END 0xf8000000UL
diff --git a/arch/arm/mach-vexpress/localtimer.c b/arch/arm/mach-vexpress/localtimer.c
new file mode 100644
index 000000000000..c0e3a59a0bfc
--- /dev/null
+++ b/arch/arm/mach-vexpress/localtimer.c
@@ -0,0 +1,26 @@
1/*
2 * linux/arch/arm/mach-vexpress/localtimer.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/smp.h>
13#include <linux/clockchips.h>
14
15#include <asm/smp_twd.h>
16#include <asm/localtimer.h>
17#include <mach/irqs.h>
18
19/*
20 * Setup the local clock events for a CPU.
21 */
22void __cpuinit local_timer_setup(struct clock_event_device *evt)
23{
24 evt->irq = IRQ_LOCALTIMER;
25 twd_timer_setup(evt);
26}
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
new file mode 100644
index 000000000000..670970699ba9
--- /dev/null
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -0,0 +1,190 @@
1/*
2 * linux/arch/arm/mach-vexpress/platsmp.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/jiffies.h>
16#include <linux/smp.h>
17#include <linux/io.h>
18
19#include <asm/cacheflush.h>
20#include <asm/localtimer.h>
21#include <asm/smp_scu.h>
22#include <asm/unified.h>
23
24#include <mach/ct-ca9x4.h>
25#include <mach/motherboard.h>
26#define V2M_PA_CS7 0x10000000
27
28#include "core.h"
29
30extern void vexpress_secondary_startup(void);
31
32/*
33 * control for which core is the next to come out of the secondary
34 * boot "holding pen"
35 */
36volatile int __cpuinitdata pen_release = -1;
37
38static void __iomem *scu_base_addr(void)
39{
40 return MMIO_P2V(A9_MPCORE_SCU);
41}
42
43static DEFINE_SPINLOCK(boot_lock);
44
45void __cpuinit platform_secondary_init(unsigned int cpu)
46{
47 trace_hardirqs_off();
48
49 /*
50 * if any interrupts are already enabled for the primary
51 * core (e.g. timer irq), then they will not have been enabled
52 * for us: do so
53 */
54 gic_cpu_init(0, gic_cpu_base_addr);
55
56 /*
57 * let the primary processor know we're out of the
58 * pen, then head off into the C entry point
59 */
60 pen_release = -1;
61 smp_wmb();
62
63 /*
64 * Synchronise with the boot thread.
65 */
66 spin_lock(&boot_lock);
67 spin_unlock(&boot_lock);
68}
69
70int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
71{
72 unsigned long timeout;
73
74 /*
75 * Set synchronisation state between this boot processor
76 * and the secondary one
77 */
78 spin_lock(&boot_lock);
79
80 /*
81 * This is really belt and braces; we hold unintended secondary
82 * CPUs in the holding pen until we're ready for them. However,
83 * since we haven't sent them a soft interrupt, they shouldn't
84 * be there.
85 */
86 pen_release = cpu;
87 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
88 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
89
90 /*
91 * Send the secondary CPU a soft interrupt, thereby causing
92 * the boot monitor to read the system wide flags register,
93 * and branch to the address found there.
94 */
95 smp_cross_call(cpumask_of(cpu));
96
97 timeout = jiffies + (1 * HZ);
98 while (time_before(jiffies, timeout)) {
99 smp_rmb();
100 if (pen_release == -1)
101 break;
102
103 udelay(10);
104 }
105
106 /*
107 * now the secondary core is starting up let it run its
108 * calibrations, then wait for it to finish
109 */
110 spin_unlock(&boot_lock);
111
112 return pen_release != -1 ? -ENOSYS : 0;
113}
114
115/*
116 * Initialise the CPU possible map early - this describes the CPUs
117 * which may be present or become present in the system.
118 */
119void __init smp_init_cpus(void)
120{
121 void __iomem *scu_base = scu_base_addr();
122 unsigned int i, ncores;
123
124 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
125
126 /* sanity check */
127 if (ncores == 0) {
128 printk(KERN_ERR
129 "vexpress: strange CM count of 0? Default to 1\n");
130
131 ncores = 1;
132 }
133
134 if (ncores > NR_CPUS) {
135 printk(KERN_WARNING
136 "vexpress: no. of cores (%d) greater than configured "
137 "maximum of %d - clipping\n",
138 ncores, NR_CPUS);
139 ncores = NR_CPUS;
140 }
141
142 for (i = 0; i < ncores; i++)
143 set_cpu_possible(i, true);
144}
145
146void __init smp_prepare_cpus(unsigned int max_cpus)
147{
148 unsigned int ncores = num_possible_cpus();
149 unsigned int cpu = smp_processor_id();
150 int i;
151
152 smp_store_cpu_info(cpu);
153
154 /*
155 * are we trying to boot more cores than exist?
156 */
157 if (max_cpus > ncores)
158 max_cpus = ncores;
159
160 /*
161 * Initialise the present map, which describes the set of CPUs
162 * actually populated at the present time.
163 */
164 for (i = 0; i < max_cpus; i++)
165 set_cpu_present(i, true);
166
167 /*
168 * Initialise the SCU if there are more than one CPU and let
169 * them know where to start.
170 */
171 if (max_cpus > 1) {
172 /*
173 * Enable the local timer or broadcast device for the
174 * boot CPU, but only if we have more than one CPU.
175 */
176 percpu_timer_setup();
177
178 scu_enable(scu_base_addr());
179
180 /*
181 * Write the address of secondary startup into the
182 * system-wide flags register. The boot monitor waits
183 * until it receives a soft interrupt, and then the
184 * secondary CPU branches to this address.
185 */
186 writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
187 writel(BSYM(virt_to_phys(vexpress_secondary_startup)),
188 MMIO_P2V(V2M_SYS_FLAGSSET));
189 }
190}
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
new file mode 100644
index 000000000000..d250711b8c7a
--- /dev/null
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -0,0 +1,361 @@
1/*
2 * Versatile Express V2M Motherboard Support
3 */
4#include <linux/device.h>
5#include <linux/amba/bus.h>
6#include <linux/amba/mmci.h>
7#include <linux/io.h>
8#include <linux/init.h>
9#include <linux/platform_device.h>
10#include <linux/smsc911x.h>
11#include <linux/spinlock.h>
12#include <linux/sysdev.h>
13#include <linux/usb/isp1760.h>
14
15#include <asm/clkdev.h>
16#include <asm/sizes.h>
17#include <asm/mach/flash.h>
18#include <asm/mach/map.h>
19#include <asm/mach/time.h>
20#include <asm/hardware/arm_timer.h>
21
22#include <mach/clkdev.h>
23#include <mach/motherboard.h>
24
25#include <plat/timer-sp.h>
26
27#include "core.h"
28
29#define V2M_PA_CS0 0x40000000
30#define V2M_PA_CS1 0x44000000
31#define V2M_PA_CS2 0x48000000
32#define V2M_PA_CS3 0x4c000000
33#define V2M_PA_CS7 0x10000000
34
35static struct map_desc v2m_io_desc[] __initdata = {
36 {
37 .virtual = __MMIO_P2V(V2M_PA_CS7),
38 .pfn = __phys_to_pfn(V2M_PA_CS7),
39 .length = SZ_128K,
40 .type = MT_DEVICE,
41 },
42};
43
44void __init v2m_map_io(struct map_desc *tile, size_t num)
45{
46 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
47 iotable_init(tile, num);
48}
49
50
51static void v2m_timer_init(void)
52{
53 writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
54 writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
55
56 sp804_clocksource_init(MMIO_P2V(V2M_TIMER1));
57 sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
58}
59
60struct sys_timer v2m_timer = {
61 .init = v2m_timer_init,
62};
63
64
65static DEFINE_SPINLOCK(v2m_cfg_lock);
66
67int v2m_cfg_write(u32 devfn, u32 data)
68{
69 /* Configuration interface broken? */
70 u32 val;
71
72 printk("%s: writing %08x to %08x\n", __func__, data, devfn);
73
74 devfn |= SYS_CFG_START | SYS_CFG_WRITE;
75
76 spin_lock(&v2m_cfg_lock);
77 val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
78 writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
79
80 writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
81 writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
82
83 do {
84 val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
85 } while (val == 0);
86 spin_unlock(&v2m_cfg_lock);
87
88 return !!(val & SYS_CFG_ERR);
89}
90
91int v2m_cfg_read(u32 devfn, u32 *data)
92{
93 u32 val;
94
95 devfn |= SYS_CFG_START;
96
97 spin_lock(&v2m_cfg_lock);
98 writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
99 writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
100
101 mb();
102
103 do {
104 cpu_relax();
105 val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
106 } while (val == 0);
107
108 *data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
109 spin_unlock(&v2m_cfg_lock);
110
111 return !!(val & SYS_CFG_ERR);
112}
113
114
115static struct resource v2m_pcie_i2c_resource = {
116 .start = V2M_SERIAL_BUS_PCI,
117 .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
118 .flags = IORESOURCE_MEM,
119};
120
121static struct platform_device v2m_pcie_i2c_device = {
122 .name = "versatile-i2c",
123 .id = 0,
124 .num_resources = 1,
125 .resource = &v2m_pcie_i2c_resource,
126};
127
128static struct resource v2m_ddc_i2c_resource = {
129 .start = V2M_SERIAL_BUS_DVI,
130 .end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
131 .flags = IORESOURCE_MEM,
132};
133
134static struct platform_device v2m_ddc_i2c_device = {
135 .name = "versatile-i2c",
136 .id = 1,
137 .num_resources = 1,
138 .resource = &v2m_ddc_i2c_resource,
139};
140
141static struct resource v2m_eth_resources[] = {
142 {
143 .start = V2M_LAN9118,
144 .end = V2M_LAN9118 + SZ_64K - 1,
145 .flags = IORESOURCE_MEM,
146 }, {
147 .start = IRQ_V2M_LAN9118,
148 .end = IRQ_V2M_LAN9118,
149 .flags = IORESOURCE_IRQ,
150 },
151};
152
153static struct smsc911x_platform_config v2m_eth_config = {
154 .flags = SMSC911X_USE_32BIT,
155 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
156 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
157 .phy_interface = PHY_INTERFACE_MODE_MII,
158};
159
160static struct platform_device v2m_eth_device = {
161 .name = "smsc911x",
162 .id = -1,
163 .resource = v2m_eth_resources,
164 .num_resources = ARRAY_SIZE(v2m_eth_resources),
165 .dev.platform_data = &v2m_eth_config,
166};
167
168static struct resource v2m_usb_resources[] = {
169 {
170 .start = V2M_ISP1761,
171 .end = V2M_ISP1761 + SZ_128K - 1,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_V2M_ISP1761,
175 .end = IRQ_V2M_ISP1761,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180static struct isp1760_platform_data v2m_usb_config = {
181 .is_isp1761 = true,
182 .bus_width_16 = false,
183 .port1_otg = true,
184 .analog_oc = false,
185 .dack_polarity_high = false,
186 .dreq_polarity_high = false,
187};
188
189static struct platform_device v2m_usb_device = {
190 .name = "isp1760",
191 .id = -1,
192 .resource = v2m_usb_resources,
193 .num_resources = ARRAY_SIZE(v2m_usb_resources),
194 .dev.platform_data = &v2m_usb_config,
195};
196
197static int v2m_flash_init(void)
198{
199 writel(0, MMIO_P2V(V2M_SYS_FLASH));
200 return 0;
201}
202
203static void v2m_flash_exit(void)
204{
205 writel(0, MMIO_P2V(V2M_SYS_FLASH));
206}
207
208static void v2m_flash_set_vpp(int on)
209{
210 writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
211}
212
213static struct flash_platform_data v2m_flash_data = {
214 .map_name = "cfi_probe",
215 .width = 4,
216 .init = v2m_flash_init,
217 .exit = v2m_flash_exit,
218 .set_vpp = v2m_flash_set_vpp,
219};
220
221static struct resource v2m_flash_resources[] = {
222 {
223 .start = V2M_NOR0,
224 .end = V2M_NOR0 + SZ_64M - 1,
225 .flags = IORESOURCE_MEM,
226 }, {
227 .start = V2M_NOR1,
228 .end = V2M_NOR1 + SZ_64M - 1,
229 .flags = IORESOURCE_MEM,
230 },
231};
232
233static struct platform_device v2m_flash_device = {
234 .name = "armflash",
235 .id = -1,
236 .resource = v2m_flash_resources,
237 .num_resources = ARRAY_SIZE(v2m_flash_resources),
238 .dev.platform_data = &v2m_flash_data,
239};
240
241
242static unsigned int v2m_mmci_status(struct device *dev)
243{
244 return !(readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0));
245}
246
247static struct mmci_platform_data v2m_mmci_data = {
248 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
249 .status = v2m_mmci_status,
250};
251
252static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL);
253static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data);
254static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL);
255static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL);
256static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
257static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
258static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
259static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
260static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL);
261static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL);
262
263static struct amba_device *v2m_amba_devs[] __initdata = {
264 &aaci_device,
265 &mmci_device,
266 &kmi0_device,
267 &kmi1_device,
268 &uart0_device,
269 &uart1_device,
270 &uart2_device,
271 &uart3_device,
272 &wdt_device,
273 &rtc_device,
274};
275
276
277static long v2m_osc_round(struct clk *clk, unsigned long rate)
278{
279 return rate;
280}
281
282static int v2m_osc1_set(struct clk *clk, unsigned long rate)
283{
284 return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
285}
286
287static const struct clk_ops osc1_clk_ops = {
288 .round = v2m_osc_round,
289 .set = v2m_osc1_set,
290};
291
292static struct clk osc1_clk = {
293 .ops = &osc1_clk_ops,
294 .rate = 24000000,
295};
296
297static struct clk osc2_clk = {
298 .rate = 24000000,
299};
300
301static struct clk_lookup v2m_lookups[] = {
302 { /* UART0 */
303 .dev_id = "mb:uart0",
304 .clk = &osc2_clk,
305 }, { /* UART1 */
306 .dev_id = "mb:uart1",
307 .clk = &osc2_clk,
308 }, { /* UART2 */
309 .dev_id = "mb:uart2",
310 .clk = &osc2_clk,
311 }, { /* UART3 */
312 .dev_id = "mb:uart3",
313 .clk = &osc2_clk,
314 }, { /* KMI0 */
315 .dev_id = "mb:kmi0",
316 .clk = &osc2_clk,
317 }, { /* KMI1 */
318 .dev_id = "mb:kmi1",
319 .clk = &osc2_clk,
320 }, { /* MMC0 */
321 .dev_id = "mb:mmci",
322 .clk = &osc2_clk,
323 }, { /* CLCD */
324 .dev_id = "mb:clcd",
325 .clk = &osc1_clk,
326 },
327};
328
329static void v2m_power_off(void)
330{
331 if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
332 printk(KERN_EMERG "Unable to shutdown\n");
333}
334
335static void v2m_restart(char str, const char *cmd)
336{
337 if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
338 printk(KERN_EMERG "Unable to reboot\n");
339}
340
341static int __init v2m_init(void)
342{
343 int i;
344
345 clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
346
347 platform_device_register(&v2m_pcie_i2c_device);
348 platform_device_register(&v2m_ddc_i2c_device);
349 platform_device_register(&v2m_flash_device);
350 platform_device_register(&v2m_eth_device);
351 platform_device_register(&v2m_usb_device);
352
353 for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
354 amba_device_register(v2m_amba_devs[i], &iomem_resource);
355
356 pm_power_off = v2m_power_off;
357 arm_pm_restart = v2m_restart;
358
359 return 0;
360}
361arch_initcall(v2m_init);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 5bd7c89a6045..346ae14824a5 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -572,6 +572,8 @@ config CPU_TLB_V6
572config CPU_TLB_V7 572config CPU_TLB_V7
573 bool 573 bool
574 574
575config VERIFY_PERMISSION_FAULT
576 bool
575endif 577endif
576 578
577config CPU_HAS_ASID 579config CPU_HAS_ASID
@@ -760,7 +762,8 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
760config CACHE_L2X0 762config CACHE_L2X0
761 bool "Enable the L2x0 outer cache controller" 763 bool "Enable the L2x0 outer cache controller"
762 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ 764 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
763 REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4 765 REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
766 ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
764 default y 767 default y
765 select OUTER_CACHE 768 select OUTER_CACHE
766 select OUTER_CACHE_SYNC 769 select OUTER_CACHE_SYNC
@@ -769,7 +772,7 @@ config CACHE_L2X0
769 772
770config CACHE_TAUROS2 773config CACHE_TAUROS2
771 bool "Enable the Tauros2 L2 cache controller" 774 bool "Enable the Tauros2 L2 cache controller"
772 depends on ARCH_DOVE 775 depends on (ARCH_DOVE || ARCH_MMP)
773 default y 776 default y
774 select OUTER_CACHE 777 select OUTER_CACHE
775 help 778 help
@@ -789,6 +792,25 @@ config ARM_L1_CACHE_SHIFT
789 default 6 if ARM_L1_CACHE_SHIFT_6 792 default 6 if ARM_L1_CACHE_SHIFT_6
790 default 5 793 default 5
791 794
795config ARM_DMA_MEM_BUFFERABLE
796 bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7
797 default y if CPU_V6 || CPU_V7
798 help
799 Historically, the kernel has used strongly ordered mappings to
800 provide DMA coherent memory. With the advent of ARMv7, mapping
801 memory with differing types results in unpredictable behaviour,
802 so on these CPUs, this option is forced on.
803
804 Multiple mappings with differing attributes is also unpredictable
805 on ARMv6 CPUs, but since they do not have aggressive speculative
806 prefetch, no harm appears to occur.
807
808 However, drivers may be missing the necessary barriers for ARMv6,
809 and therefore turning this on may result in unpredictable driver
810 behaviour. Therefore, we offer this as an option.
811
812 You are recommended say 'Y' here and debug any affected drivers.
813
792config ARCH_HAS_BARRIERS 814config ARCH_HAS_BARRIERS
793 bool 815 bool
794 help 816 help
diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
index 2e6dc040c654..ec88b157d3bb 100644
--- a/arch/arm/mm/abort-ev7.S
+++ b/arch/arm/mm/abort-ev7.S
@@ -29,5 +29,26 @@ ENTRY(v7_early_abort)
29 * V6 code adjusts the returned DFSR. 29 * V6 code adjusts the returned DFSR.
30 * New designs should not need to patch up faults. 30 * New designs should not need to patch up faults.
31 */ 31 */
32
33#if defined(CONFIG_VERIFY_PERMISSION_FAULT)
34 /*
35 * Detect erroneous permission failures and fix
36 */
37 ldr r3, =0x40d @ On permission fault
38 and r3, r1, r3
39 cmp r3, #0x0d
40 movne pc, lr
41
42 mcr p15, 0, r0, c7, c8, 0 @ Retranslate FAR
43 isb
44 mrc p15, 0, r2, c7, c4, 0 @ Read the PAR
45 and r3, r2, #0x7b @ On translation fault
46 cmp r3, #0x0b
47 movne pc, lr
48 bic r1, r1, #0xf @ Fix up FSR FS[5:0]
49 and r2, r2, #0x7e
50 orr r1, r1, r2, LSR #1
51#endif
52
32 mov pc, lr 53 mov pc, lr
33ENDPROC(v7_early_abort) 54ENDPROC(v7_early_abort)
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index a2ab51fa73e2..6f98c358989a 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -17,6 +17,7 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/string.h> 18#include <linux/string.h>
19#include <linux/proc_fs.h> 19#include <linux/proc_fs.h>
20#include <linux/seq_file.h>
20#include <linux/init.h> 21#include <linux/init.h>
21#include <linux/sched.h> 22#include <linux/sched.h>
22#include <linux/uaccess.h> 23#include <linux/uaccess.h>
@@ -94,36 +95,29 @@ static const char *usermode_action[] = {
94 "signal+warn" 95 "signal+warn"
95}; 96};
96 97
97static int 98static int alignment_proc_show(struct seq_file *m, void *v)
98proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
99 void *data)
100{ 99{
101 char *p = page; 100 seq_printf(m, "User:\t\t%lu\n", ai_user);
102 int len; 101 seq_printf(m, "System:\t\t%lu\n", ai_sys);
103 102 seq_printf(m, "Skipped:\t%lu\n", ai_skipped);
104 p += sprintf(p, "User:\t\t%lu\n", ai_user); 103 seq_printf(m, "Half:\t\t%lu\n", ai_half);
105 p += sprintf(p, "System:\t\t%lu\n", ai_sys); 104 seq_printf(m, "Word:\t\t%lu\n", ai_word);
106 p += sprintf(p, "Skipped:\t%lu\n", ai_skipped);
107 p += sprintf(p, "Half:\t\t%lu\n", ai_half);
108 p += sprintf(p, "Word:\t\t%lu\n", ai_word);
109 if (cpu_architecture() >= CPU_ARCH_ARMv5TE) 105 if (cpu_architecture() >= CPU_ARCH_ARMv5TE)
110 p += sprintf(p, "DWord:\t\t%lu\n", ai_dword); 106 seq_printf(m, "DWord:\t\t%lu\n", ai_dword);
111 p += sprintf(p, "Multi:\t\t%lu\n", ai_multi); 107 seq_printf(m, "Multi:\t\t%lu\n", ai_multi);
112 p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode, 108 seq_printf(m, "User faults:\t%i (%s)\n", ai_usermode,
113 usermode_action[ai_usermode]); 109 usermode_action[ai_usermode]);
114 110
115 len = (p - page) - off; 111 return 0;
116 if (len < 0) 112}
117 len = 0;
118
119 *eof = (len <= count) ? 1 : 0;
120 *start = page + off;
121 113
122 return len; 114static int alignment_proc_open(struct inode *inode, struct file *file)
115{
116 return single_open(file, alignment_proc_show, NULL);
123} 117}
124 118
125static int proc_alignment_write(struct file *file, const char __user *buffer, 119static ssize_t alignment_proc_write(struct file *file, const char __user *buffer,
126 unsigned long count, void *data) 120 size_t count, loff_t *pos)
127{ 121{
128 char mode; 122 char mode;
129 123
@@ -136,6 +130,13 @@ static int proc_alignment_write(struct file *file, const char __user *buffer,
136 return count; 130 return count;
137} 131}
138 132
133static const struct file_operations alignment_proc_fops = {
134 .open = alignment_proc_open,
135 .read = seq_read,
136 .llseek = seq_lseek,
137 .release = single_release,
138 .write = alignment_proc_write,
139};
139#endif /* CONFIG_PROC_FS */ 140#endif /* CONFIG_PROC_FS */
140 141
141union offset_union { 142union offset_union {
@@ -901,12 +902,10 @@ static int __init alignment_init(void)
901#ifdef CONFIG_PROC_FS 902#ifdef CONFIG_PROC_FS
902 struct proc_dir_entry *res; 903 struct proc_dir_entry *res;
903 904
904 res = create_proc_entry("cpu/alignment", S_IWUSR | S_IRUGO, NULL); 905 res = proc_create("cpu/alignment", S_IWUSR | S_IRUGO, NULL,
906 &alignment_proc_fops);
905 if (!res) 907 if (!res)
906 return -ENOMEM; 908 return -ENOMEM;
907
908 res->read_proc = proc_alignment_read;
909 res->write_proc = proc_alignment_write;
910#endif 909#endif
911 910
912 /* 911 /*
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 21ad68ba22ba..9819869d2bc9 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -27,6 +27,7 @@
27 27
28static void __iomem *l2x0_base; 28static void __iomem *l2x0_base;
29static DEFINE_SPINLOCK(l2x0_lock); 29static DEFINE_SPINLOCK(l2x0_lock);
30static uint32_t l2x0_way_mask; /* Bitmask of active ways */
30 31
31static inline void cache_wait(void __iomem *reg, unsigned long mask) 32static inline void cache_wait(void __iomem *reg, unsigned long mask)
32{ 33{
@@ -108,8 +109,8 @@ static inline void l2x0_inv_all(void)
108 109
109 /* invalidate all ways */ 110 /* invalidate all ways */
110 spin_lock_irqsave(&l2x0_lock, flags); 111 spin_lock_irqsave(&l2x0_lock, flags);
111 writel(0xff, l2x0_base + L2X0_INV_WAY); 112 writel(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
112 cache_wait(l2x0_base + L2X0_INV_WAY, 0xff); 113 cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
113 cache_sync(); 114 cache_sync();
114 spin_unlock_irqrestore(&l2x0_lock, flags); 115 spin_unlock_irqrestore(&l2x0_lock, flags);
115} 116}
@@ -208,9 +209,37 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
208void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) 209void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
209{ 210{
210 __u32 aux; 211 __u32 aux;
212 __u32 cache_id;
213 int ways;
214 const char *type;
211 215
212 l2x0_base = base; 216 l2x0_base = base;
213 217
218 cache_id = readl(l2x0_base + L2X0_CACHE_ID);
219 aux = readl(l2x0_base + L2X0_AUX_CTRL);
220
221 /* Determine the number of ways */
222 switch (cache_id & L2X0_CACHE_ID_PART_MASK) {
223 case L2X0_CACHE_ID_PART_L310:
224 if (aux & (1 << 16))
225 ways = 16;
226 else
227 ways = 8;
228 type = "L310";
229 break;
230 case L2X0_CACHE_ID_PART_L210:
231 ways = (aux >> 13) & 0xf;
232 type = "L210";
233 break;
234 default:
235 /* Assume unknown chips have 8 ways */
236 ways = 8;
237 type = "L2x0 series";
238 break;
239 }
240
241 l2x0_way_mask = (1 << ways) - 1;
242
214 /* 243 /*
215 * Check if l2x0 controller is already enabled. 244 * Check if l2x0 controller is already enabled.
216 * If you are booting from non-secure mode 245 * If you are booting from non-secure mode
@@ -219,8 +248,6 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
219 if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { 248 if (!(readl(l2x0_base + L2X0_CTRL) & 1)) {
220 249
221 /* l2x0 controller is disabled */ 250 /* l2x0 controller is disabled */
222
223 aux = readl(l2x0_base + L2X0_AUX_CTRL);
224 aux &= aux_mask; 251 aux &= aux_mask;
225 aux |= aux_val; 252 aux |= aux_val;
226 writel(aux, l2x0_base + L2X0_AUX_CTRL); 253 writel(aux, l2x0_base + L2X0_AUX_CTRL);
@@ -236,5 +263,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
236 outer_cache.flush_range = l2x0_flush_range; 263 outer_cache.flush_range = l2x0_flush_range;
237 outer_cache.sync = l2x0_cache_sync; 264 outer_cache.sync = l2x0_cache_sync;
238 265
239 printk(KERN_INFO "L2X0 cache controller enabled\n"); 266 printk(KERN_INFO "%s cache controller enabled\n", type);
267 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x\n",
268 ways, cache_id, aux);
240} 269}
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 9d89c67a1cc3..e46ecd847138 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -211,6 +211,9 @@ v6_dma_inv_range:
211 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line 211 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
212#endif 212#endif
2131: 2131:
214#ifdef CONFIG_SMP
215 str r0, [r0] @ write for ownership
216#endif
214#ifdef HARVARD_CACHE 217#ifdef HARVARD_CACHE
215 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line 218 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
216#else 219#else
@@ -231,6 +234,9 @@ v6_dma_inv_range:
231v6_dma_clean_range: 234v6_dma_clean_range:
232 bic r0, r0, #D_CACHE_LINE_SIZE - 1 235 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2331: 2361:
237#ifdef CONFIG_SMP
238 ldr r2, [r0] @ read for ownership
239#endif
234#ifdef HARVARD_CACHE 240#ifdef HARVARD_CACHE
235 mcr p15, 0, r0, c7, c10, 1 @ clean D line 241 mcr p15, 0, r0, c7, c10, 1 @ clean D line
236#else 242#else
@@ -251,6 +257,10 @@ v6_dma_clean_range:
251ENTRY(v6_dma_flush_range) 257ENTRY(v6_dma_flush_range)
252 bic r0, r0, #D_CACHE_LINE_SIZE - 1 258 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2531: 2591:
260#ifdef CONFIG_SMP
261 ldr r2, [r0] @ read for ownership
262 str r2, [r0] @ write for ownership
263#endif
254#ifdef HARVARD_CACHE 264#ifdef HARVARD_CACHE
255 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line 265 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
256#else 266#else
@@ -273,7 +283,9 @@ ENTRY(v6_dma_map_area)
273 add r1, r1, r0 283 add r1, r1, r0
274 teq r2, #DMA_FROM_DEVICE 284 teq r2, #DMA_FROM_DEVICE
275 beq v6_dma_inv_range 285 beq v6_dma_inv_range
276 b v6_dma_clean_range 286 teq r2, #DMA_TO_DEVICE
287 beq v6_dma_clean_range
288 b v6_dma_flush_range
277ENDPROC(v6_dma_map_area) 289ENDPROC(v6_dma_map_area)
278 290
279/* 291/*
@@ -283,9 +295,6 @@ ENDPROC(v6_dma_map_area)
283 * - dir - DMA direction 295 * - dir - DMA direction
284 */ 296 */
285ENTRY(v6_dma_unmap_area) 297ENTRY(v6_dma_unmap_area)
286 add r1, r1, r0
287 teq r2, #DMA_TO_DEVICE
288 bne v6_dma_inv_range
289 mov pc, lr 298 mov pc, lr
290ENDPROC(v6_dma_unmap_area) 299ENDPROC(v6_dma_unmap_area)
291 300
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index bcd64f265870..06a90dcfc60a 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -167,7 +167,11 @@ ENTRY(v7_coherent_user_range)
167 cmp r0, r1 167 cmp r0, r1
168 blo 1b 168 blo 1b
169 mov r0, #0 169 mov r0, #0
170#ifdef CONFIG_SMP
171 mcr p15, 0, r0, c7, c1, 6 @ invalidate BTB Inner Shareable
172#else
170 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB 173 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
174#endif
171 dsb 175 dsb
172 isb 176 isb
173 mov pc, lr 177 mov pc, lr
diff --git a/arch/arm/mm/copypage-fa.c b/arch/arm/mm/copypage-fa.c
index b2a6008b0111..d2852e1635b1 100644
--- a/arch/arm/mm/copypage-fa.c
+++ b/arch/arm/mm/copypage-fa.c
@@ -40,7 +40,7 @@ fa_copy_user_page(void *kto, const void *kfrom)
40} 40}
41 41
42void fa_copy_user_highpage(struct page *to, struct page *from, 42void fa_copy_user_highpage(struct page *to, struct page *from,
43 unsigned long vaddr) 43 unsigned long vaddr, struct vm_area_struct *vma)
44{ 44{
45 void *kto, *kfrom; 45 void *kto, *kfrom;
46 46
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 0d414c28eb2c..9b906dec1ca1 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -134,8 +134,6 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
134 flush_dcache_mmap_unlock(mapping); 134 flush_dcache_mmap_unlock(mapping);
135 if (aliases) 135 if (aliases)
136 do_adjust_pte(vma, addr, pfn, ptep); 136 do_adjust_pte(vma, addr, pfn, ptep);
137 else
138 flush_cache_page(vma, addr, pfn);
139} 137}
140 138
141/* 139/*
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 9d40c341e07e..92f5801f99c1 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -463,7 +463,12 @@ static struct fsr_info {
463 { do_bad, SIGILL, BUS_ADRALN, "alignment exception" }, 463 { do_bad, SIGILL, BUS_ADRALN, "alignment exception" },
464 { do_bad, SIGKILL, 0, "terminal exception" }, 464 { do_bad, SIGKILL, 0, "terminal exception" },
465 { do_bad, SIGILL, BUS_ADRALN, "alignment exception" }, 465 { do_bad, SIGILL, BUS_ADRALN, "alignment exception" },
466/* Do we need runtime check ? */
467#if __LINUX_ARM_ARCH__ < 6
466 { do_bad, SIGBUS, 0, "external abort on linefetch" }, 468 { do_bad, SIGBUS, 0, "external abort on linefetch" },
469#else
470 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "I-cache maintenance fault" },
471#endif
467 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" }, 472 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
468 { do_bad, SIGBUS, 0, "external abort on linefetch" }, 473 { do_bad, SIGBUS, 0, "external abort on linefetch" },
469 { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" }, 474 { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 0ed29bfeba1c..1ba6cf5a2c02 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -15,7 +15,6 @@
15#include <linux/mman.h> 15#include <linux/mman.h>
16#include <linux/nodemask.h> 16#include <linux/nodemask.h>
17#include <linux/initrd.h> 17#include <linux/initrd.h>
18#include <linux/sort.h>
19#include <linux/highmem.h> 18#include <linux/highmem.h>
20#include <linux/gfp.h> 19#include <linux/gfp.h>
21 20
@@ -224,20 +223,6 @@ static int __init check_initrd(struct meminfo *mi)
224 return initrd_node; 223 return initrd_node;
225} 224}
226 225
227static inline void map_memory_bank(struct membank *bank)
228{
229#ifdef CONFIG_MMU
230 struct map_desc map;
231
232 map.pfn = bank_pfn_start(bank);
233 map.virtual = __phys_to_virt(bank_phys_start(bank));
234 map.length = bank_phys_size(bank);
235 map.type = MT_MEMORY;
236
237 create_mapping(&map);
238#endif
239}
240
241static void __init bootmem_init_node(int node, struct meminfo *mi, 226static void __init bootmem_init_node(int node, struct meminfo *mi,
242 unsigned long start_pfn, unsigned long end_pfn) 227 unsigned long start_pfn, unsigned long end_pfn)
243{ 228{
@@ -247,16 +232,6 @@ static void __init bootmem_init_node(int node, struct meminfo *mi,
247 int i; 232 int i;
248 233
249 /* 234 /*
250 * Map the memory banks for this node.
251 */
252 for_each_nodebank(i, mi, node) {
253 struct membank *bank = &mi->bank[i];
254
255 if (!bank->highmem)
256 map_memory_bank(bank);
257 }
258
259 /*
260 * Allocate the bootmem bitmap page. 235 * Allocate the bootmem bitmap page.
261 */ 236 */
262 boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn); 237 boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
@@ -385,21 +360,12 @@ static void arm_memory_present(struct meminfo *mi, int node)
385} 360}
386#endif 361#endif
387 362
388static int __init meminfo_cmp(const void *_a, const void *_b)
389{
390 const struct membank *a = _a, *b = _b;
391 long cmp = bank_pfn_start(a) - bank_pfn_start(b);
392 return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
393}
394
395void __init bootmem_init(void) 363void __init bootmem_init(void)
396{ 364{
397 struct meminfo *mi = &meminfo; 365 struct meminfo *mi = &meminfo;
398 unsigned long min, max_low, max_high; 366 unsigned long min, max_low, max_high;
399 int node, initrd_node; 367 int node, initrd_node;
400 368
401 sort(&mi->bank, mi->nr_banks, sizeof(mi->bank[0]), meminfo_cmp, NULL);
402
403 /* 369 /*
404 * Locate which node contains the ramdisk image, if any. 370 * Locate which node contains the ramdisk image, if any.
405 */ 371 */
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index a888363398f8..815d08eecbb0 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -28,10 +28,7 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
28 28
29#endif 29#endif
30 30
31struct map_desc;
32struct meminfo;
33struct pglist_data; 31struct pglist_data;
34 32
35void __init create_mapping(struct map_desc *md);
36void __init bootmem_init(void); 33void __init bootmem_init(void);
37void reserve_node_zero(struct pglist_data *pgdat); 34void reserve_node_zero(struct pglist_data *pgdat);
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 241c24a1c18f..285894171186 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -14,6 +14,7 @@
14#include <linux/bootmem.h> 14#include <linux/bootmem.h>
15#include <linux/mman.h> 15#include <linux/mman.h>
16#include <linux/nodemask.h> 16#include <linux/nodemask.h>
17#include <linux/sort.h>
17 18
18#include <asm/cputype.h> 19#include <asm/cputype.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
@@ -603,7 +604,7 @@ static void __init create_36bit_mapping(struct map_desc *md,
603 * offsets, and we take full advantage of sections and 604 * offsets, and we take full advantage of sections and
604 * supersections. 605 * supersections.
605 */ 606 */
606void __init create_mapping(struct map_desc *md) 607static void __init create_mapping(struct map_desc *md)
607{ 608{
608 unsigned long phys, addr, length, end; 609 unsigned long phys, addr, length, end;
609 const struct mem_type *type; 610 const struct mem_type *type;
@@ -869,9 +870,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
869 if (machine_is_p720t()) 870 if (machine_is_p720t())
870 res_size = 0x00014000; 871 res_size = 0x00014000;
871 872
872 /* H1940 and RX3715 need to reserve this for suspend */ 873 /* H1940, RX3715 and RX1950 need to reserve this for suspend */
873 874
874 if (machine_is_h1940() || machine_is_rx3715()) { 875 if (machine_is_h1940() || machine_is_rx3715()
876 || machine_is_rx1950()) {
875 reserve_bootmem_node(pgdat, 0x30003000, 0x1000, 877 reserve_bootmem_node(pgdat, 0x30003000, 0x1000,
876 BOOTMEM_DEFAULT); 878 BOOTMEM_DEFAULT);
877 reserve_bootmem_node(pgdat, 0x30081000, 0x1000, 879 reserve_bootmem_node(pgdat, 0x30081000, 0x1000,
@@ -1017,6 +1019,39 @@ static void __init kmap_init(void)
1017#endif 1019#endif
1018} 1020}
1019 1021
1022static inline void map_memory_bank(struct membank *bank)
1023{
1024 struct map_desc map;
1025
1026 map.pfn = bank_pfn_start(bank);
1027 map.virtual = __phys_to_virt(bank_phys_start(bank));
1028 map.length = bank_phys_size(bank);
1029 map.type = MT_MEMORY;
1030
1031 create_mapping(&map);
1032}
1033
1034static void __init map_lowmem(void)
1035{
1036 struct meminfo *mi = &meminfo;
1037 int i;
1038
1039 /* Map all the lowmem memory banks. */
1040 for (i = 0; i < mi->nr_banks; i++) {
1041 struct membank *bank = &mi->bank[i];
1042
1043 if (!bank->highmem)
1044 map_memory_bank(bank);
1045 }
1046}
1047
1048static int __init meminfo_cmp(const void *_a, const void *_b)
1049{
1050 const struct membank *a = _a, *b = _b;
1051 long cmp = bank_pfn_start(a) - bank_pfn_start(b);
1052 return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
1053}
1054
1020/* 1055/*
1021 * paging_init() sets up the page tables, initialises the zone memory 1056 * paging_init() sets up the page tables, initialises the zone memory
1022 * maps, and sets up the zero page, bad page and bad page tables. 1057 * maps, and sets up the zero page, bad page and bad page tables.
@@ -1025,9 +1060,12 @@ void __init paging_init(struct machine_desc *mdesc)
1025{ 1060{
1026 void *zero_page; 1061 void *zero_page;
1027 1062
1063 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
1064
1028 build_mem_type_table(); 1065 build_mem_type_table();
1029 sanity_check_meminfo(); 1066 sanity_check_meminfo();
1030 prepare_page_table(); 1067 prepare_page_table();
1068 map_lowmem();
1031 bootmem_init(); 1069 bootmem_init();
1032 devicemaps_init(mdesc); 1070 devicemaps_init(mdesc);
1033 kmap_init(); 1071 kmap_init();
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 9bfeb6b9509a..33b327379f07 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -65,6 +65,15 @@ void flush_dcache_page(struct page *page)
65} 65}
66EXPORT_SYMBOL(flush_dcache_page); 66EXPORT_SYMBOL(flush_dcache_page);
67 67
68void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
69 unsigned long uaddr, void *dst, const void *src,
70 unsigned long len)
71{
72 memcpy(dst, src, len);
73 if (vma->vm_flags & VM_EXEC)
74 __cpuc_coherent_user_range(uaddr, uaddr + len);
75}
76
68void __iomem *__arm_ioremap_pfn(unsigned long pfn, unsigned long offset, 77void __iomem *__arm_ioremap_pfn(unsigned long pfn, unsigned long offset,
69 size_t size, unsigned int mtype) 78 size_t size, unsigned int mtype)
70{ 79{
@@ -87,8 +96,8 @@ void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size,
87} 96}
88EXPORT_SYMBOL(__arm_ioremap); 97EXPORT_SYMBOL(__arm_ioremap);
89 98
90void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size, 99void __iomem *__arm_ioremap_caller(unsigned long phys_addr, size_t size,
91 unsigned int mtype, void *caller) 100 unsigned int mtype, void *caller)
92{ 101{
93 return __arm_ioremap(phys_addr, size, mtype); 102 return __arm_ioremap(phys_addr, size, mtype);
94} 103}
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index 0cb1848bd876..f3f288a9546d 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -50,7 +50,11 @@ ENTRY(v7wbi_flush_user_tlb_range)
50 cmp r0, r1 50 cmp r0, r1
51 blo 1b 51 blo 1b
52 mov ip, #0 52 mov ip, #0
53#ifdef CONFIG_SMP
54 mcr p15, 0, ip, c7, c1, 6 @ flush BTAC/BTB Inner Shareable
55#else
53 mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB 56 mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB
57#endif
54 dsb 58 dsb
55 mov pc, lr 59 mov pc, lr
56ENDPROC(v7wbi_flush_user_tlb_range) 60ENDPROC(v7wbi_flush_user_tlb_range)
@@ -79,7 +83,11 @@ ENTRY(v7wbi_flush_kern_tlb_range)
79 cmp r0, r1 83 cmp r0, r1
80 blo 1b 84 blo 1b
81 mov r2, #0 85 mov r2, #0
86#ifdef CONFIG_SMP
87 mcr p15, 0, r2, c7, c1, 6 @ flush BTAC/BTB Inner Shareable
88#else
82 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB 89 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
90#endif
83 dsb 91 dsb
84 isb 92 isb
85 mov pc, lr 93 mov pc, lr
diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c
index 4c0ab50f399a..cb7658e8acc5 100644
--- a/arch/arm/nwfpe/fpmodule.c
+++ b/arch/arm/nwfpe/fpmodule.c
@@ -24,6 +24,7 @@
24#include "fpa11.h" 24#include "fpa11.h"
25 25
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/moduleparam.h>
27 28
28/* XXX */ 29/* XXX */
29#include <linux/errno.h> 30#include <linux/errno.h>
@@ -134,13 +135,17 @@ a SIGFPE exception if necessary. If not the relevant bits in the
134cumulative exceptions flag byte are set and we return. 135cumulative exceptions flag byte are set and we return.
135*/ 136*/
136 137
138#ifdef CONFIG_DEBUG_USER
139/* By default, ignore inexact errors as there are far too many of them to log */
140static int debug = ~BIT_IXC;
141#endif
142
137void float_raise(signed char flags) 143void float_raise(signed char flags)
138{ 144{
139 register unsigned int fpsr, cumulativeTraps; 145 register unsigned int fpsr, cumulativeTraps;
140 146
141#ifdef CONFIG_DEBUG_USER 147#ifdef CONFIG_DEBUG_USER
142 /* Ignore inexact errors as there are far too many of them to log */ 148 if (flags & debug)
143 if (flags & ~BIT_IXC)
144 printk(KERN_DEBUG 149 printk(KERN_DEBUG
145 "NWFPE: %s[%d] takes exception %08x at %p from %08lx\n", 150 "NWFPE: %s[%d] takes exception %08x at %p from %08lx\n",
146 current->comm, current->pid, flags, 151 current->comm, current->pid, flags,
@@ -179,3 +184,7 @@ module_exit(fpe_exit);
179MODULE_AUTHOR("Scott Bambrough <scottb@rebel.com>"); 184MODULE_AUTHOR("Scott Bambrough <scottb@rebel.com>");
180MODULE_DESCRIPTION("NWFPE floating point emulator (" NWFPE_BITS " precision)"); 185MODULE_DESCRIPTION("NWFPE floating point emulator (" NWFPE_BITS " precision)");
181MODULE_LICENSE("GPL"); 186MODULE_LICENSE("GPL");
187
188#ifdef CONFIG_DEBUG_USER
189module_param(debug, int, 0644);
190#endif
diff --git a/arch/arm/oprofile/Makefile b/arch/arm/oprofile/Makefile
index 88e31f549f50..e666eafed152 100644
--- a/arch/arm/oprofile/Makefile
+++ b/arch/arm/oprofile/Makefile
@@ -6,9 +6,4 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
6 oprofilefs.o oprofile_stats.o \ 6 oprofilefs.o oprofile_stats.o \
7 timer_int.o ) 7 timer_int.o )
8 8
9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o 9oprofile-y := $(DRIVER_OBJS) common.o
10oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o
11oprofile-$(CONFIG_OPROFILE_ARM11_CORE) += op_model_arm11_core.o
12oprofile-$(CONFIG_OPROFILE_ARMV6) += op_model_v6.o
13oprofile-$(CONFIG_OPROFILE_MPCORE) += op_model_mpcore.o
14oprofile-$(CONFIG_OPROFILE_ARMV7) += op_model_v7.o
diff --git a/arch/arm/oprofile/backtrace.c b/arch/arm/oprofile/backtrace.c
deleted file mode 100644
index d805a52b5032..000000000000
--- a/arch/arm/oprofile/backtrace.c
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * Arm specific backtracing code for oprofile
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * Based on i386 oprofile backtrace code by John Levon, David Smith
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#include <linux/oprofile.h>
17#include <linux/sched.h>
18#include <linux/mm.h>
19#include <linux/uaccess.h>
20#include <asm/ptrace.h>
21#include <asm/stacktrace.h>
22
23static int report_trace(struct stackframe *frame, void *d)
24{
25 unsigned int *depth = d;
26
27 if (*depth) {
28 oprofile_add_trace(frame->pc);
29 (*depth)--;
30 }
31
32 return *depth == 0;
33}
34
35/*
36 * The registers we're interested in are at the end of the variable
37 * length saved register structure. The fp points at the end of this
38 * structure so the address of this struct is:
39 * (struct frame_tail *)(xxx->fp)-1
40 */
41struct frame_tail {
42 struct frame_tail *fp;
43 unsigned long sp;
44 unsigned long lr;
45} __attribute__((packed));
46
47static struct frame_tail* user_backtrace(struct frame_tail *tail)
48{
49 struct frame_tail buftail[2];
50
51 /* Also check accessibility of one struct frame_tail beyond */
52 if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
53 return NULL;
54 if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail)))
55 return NULL;
56
57 oprofile_add_trace(buftail[0].lr);
58
59 /* frame pointers should strictly progress back up the stack
60 * (towards higher addresses) */
61 if (tail >= buftail[0].fp)
62 return NULL;
63
64 return buftail[0].fp-1;
65}
66
67void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
68{
69 struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1;
70
71 if (!user_mode(regs)) {
72 struct stackframe frame;
73 frame.fp = regs->ARM_fp;
74 frame.sp = regs->ARM_sp;
75 frame.lr = regs->ARM_lr;
76 frame.pc = regs->ARM_pc;
77 walk_stackframe(&frame, report_trace, &depth);
78 return;
79 }
80
81 while (depth-- && tail && !((unsigned long) tail & 3))
82 tail = user_backtrace(tail);
83}
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 3fcd752d6146..0691176899ff 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -2,32 +2,184 @@
2 * @file common.c 2 * @file common.c
3 * 3 *
4 * @remark Copyright 2004 Oprofile Authors 4 * @remark Copyright 2004 Oprofile Authors
5 * @remark Copyright 2010 ARM Ltd.
5 * @remark Read the file COPYING 6 * @remark Read the file COPYING
6 * 7 *
7 * @author Zwane Mwaikambo 8 * @author Zwane Mwaikambo
9 * @author Will Deacon [move to perf]
8 */ 10 */
9 11
12#include <linux/cpumask.h>
13#include <linux/err.h>
14#include <linux/errno.h>
10#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/mutex.h>
11#include <linux/oprofile.h> 17#include <linux/oprofile.h>
12#include <linux/errno.h> 18#include <linux/perf_event.h>
19#include <linux/platform_device.h>
13#include <linux/slab.h> 20#include <linux/slab.h>
14#include <linux/sysdev.h> 21#include <asm/stacktrace.h>
15#include <linux/mutex.h> 22#include <linux/uaccess.h>
16 23
17#include "op_counter.h" 24#include <asm/perf_event.h>
18#include "op_arm_model.h" 25#include <asm/ptrace.h>
26
27#ifdef CONFIG_HW_PERF_EVENTS
28/*
29 * Per performance monitor configuration as set via oprofilefs.
30 */
31struct op_counter_config {
32 unsigned long count;
33 unsigned long enabled;
34 unsigned long event;
35 unsigned long unit_mask;
36 unsigned long kernel;
37 unsigned long user;
38 struct perf_event_attr attr;
39};
19 40
20static struct op_arm_model_spec *op_arm_model;
21static int op_arm_enabled; 41static int op_arm_enabled;
22static DEFINE_MUTEX(op_arm_mutex); 42static DEFINE_MUTEX(op_arm_mutex);
23 43
24struct op_counter_config *counter_config; 44static struct op_counter_config *counter_config;
45static struct perf_event **perf_events[nr_cpumask_bits];
46static int perf_num_counters;
47
48/*
49 * Overflow callback for oprofile.
50 */
51static void op_overflow_handler(struct perf_event *event, int unused,
52 struct perf_sample_data *data, struct pt_regs *regs)
53{
54 int id;
55 u32 cpu = smp_processor_id();
56
57 for (id = 0; id < perf_num_counters; ++id)
58 if (perf_events[cpu][id] == event)
59 break;
60
61 if (id != perf_num_counters)
62 oprofile_add_sample(regs, id);
63 else
64 pr_warning("oprofile: ignoring spurious overflow "
65 "on cpu %u\n", cpu);
66}
67
68/*
69 * Called by op_arm_setup to create perf attributes to mirror the oprofile
70 * settings in counter_config. Attributes are created as `pinned' events and
71 * so are permanently scheduled on the PMU.
72 */
73static void op_perf_setup(void)
74{
75 int i;
76 u32 size = sizeof(struct perf_event_attr);
77 struct perf_event_attr *attr;
78
79 for (i = 0; i < perf_num_counters; ++i) {
80 attr = &counter_config[i].attr;
81 memset(attr, 0, size);
82 attr->type = PERF_TYPE_RAW;
83 attr->size = size;
84 attr->config = counter_config[i].event;
85 attr->sample_period = counter_config[i].count;
86 attr->pinned = 1;
87 }
88}
89
90static int op_create_counter(int cpu, int event)
91{
92 int ret = 0;
93 struct perf_event *pevent;
94
95 if (!counter_config[event].enabled || (perf_events[cpu][event] != NULL))
96 return ret;
97
98 pevent = perf_event_create_kernel_counter(&counter_config[event].attr,
99 cpu, -1,
100 op_overflow_handler);
101
102 if (IS_ERR(pevent)) {
103 ret = PTR_ERR(pevent);
104 } else if (pevent->state != PERF_EVENT_STATE_ACTIVE) {
105 pr_warning("oprofile: failed to enable event %d "
106 "on CPU %d\n", event, cpu);
107 ret = -EBUSY;
108 } else {
109 perf_events[cpu][event] = pevent;
110 }
111
112 return ret;
113}
114
115static void op_destroy_counter(int cpu, int event)
116{
117 struct perf_event *pevent = perf_events[cpu][event];
118
119 if (pevent) {
120 perf_event_release_kernel(pevent);
121 perf_events[cpu][event] = NULL;
122 }
123}
124
125/*
126 * Called by op_arm_start to create active perf events based on the
127 * perviously configured attributes.
128 */
129static int op_perf_start(void)
130{
131 int cpu, event, ret = 0;
132
133 for_each_online_cpu(cpu) {
134 for (event = 0; event < perf_num_counters; ++event) {
135 ret = op_create_counter(cpu, event);
136 if (ret)
137 goto out;
138 }
139 }
140
141out:
142 return ret;
143}
144
145/*
146 * Called by op_arm_stop at the end of a profiling run.
147 */
148static void op_perf_stop(void)
149{
150 int cpu, event;
151
152 for_each_online_cpu(cpu)
153 for (event = 0; event < perf_num_counters; ++event)
154 op_destroy_counter(cpu, event);
155}
156
157
158static char *op_name_from_perf_id(enum arm_perf_pmu_ids id)
159{
160 switch (id) {
161 case ARM_PERF_PMU_ID_XSCALE1:
162 return "arm/xscale1";
163 case ARM_PERF_PMU_ID_XSCALE2:
164 return "arm/xscale2";
165 case ARM_PERF_PMU_ID_V6:
166 return "arm/armv6";
167 case ARM_PERF_PMU_ID_V6MP:
168 return "arm/mpcore";
169 case ARM_PERF_PMU_ID_CA8:
170 return "arm/armv7";
171 case ARM_PERF_PMU_ID_CA9:
172 return "arm/armv7-ca9";
173 default:
174 return NULL;
175 }
176}
25 177
26static int op_arm_create_files(struct super_block *sb, struct dentry *root) 178static int op_arm_create_files(struct super_block *sb, struct dentry *root)
27{ 179{
28 unsigned int i; 180 unsigned int i;
29 181
30 for (i = 0; i < op_arm_model->num_counters; i++) { 182 for (i = 0; i < perf_num_counters; i++) {
31 struct dentry *dir; 183 struct dentry *dir;
32 char buf[4]; 184 char buf[4];
33 185
@@ -46,12 +198,10 @@ static int op_arm_create_files(struct super_block *sb, struct dentry *root)
46 198
47static int op_arm_setup(void) 199static int op_arm_setup(void)
48{ 200{
49 int ret;
50
51 spin_lock(&oprofilefs_lock); 201 spin_lock(&oprofilefs_lock);
52 ret = op_arm_model->setup_ctrs(); 202 op_perf_setup();
53 spin_unlock(&oprofilefs_lock); 203 spin_unlock(&oprofilefs_lock);
54 return ret; 204 return 0;
55} 205}
56 206
57static int op_arm_start(void) 207static int op_arm_start(void)
@@ -60,8 +210,9 @@ static int op_arm_start(void)
60 210
61 mutex_lock(&op_arm_mutex); 211 mutex_lock(&op_arm_mutex);
62 if (!op_arm_enabled) { 212 if (!op_arm_enabled) {
63 ret = op_arm_model->start(); 213 ret = 0;
64 op_arm_enabled = !ret; 214 op_perf_start();
215 op_arm_enabled = 1;
65 } 216 }
66 mutex_unlock(&op_arm_mutex); 217 mutex_unlock(&op_arm_mutex);
67 return ret; 218 return ret;
@@ -71,113 +222,205 @@ static void op_arm_stop(void)
71{ 222{
72 mutex_lock(&op_arm_mutex); 223 mutex_lock(&op_arm_mutex);
73 if (op_arm_enabled) 224 if (op_arm_enabled)
74 op_arm_model->stop(); 225 op_perf_stop();
75 op_arm_enabled = 0; 226 op_arm_enabled = 0;
76 mutex_unlock(&op_arm_mutex); 227 mutex_unlock(&op_arm_mutex);
77} 228}
78 229
79#ifdef CONFIG_PM 230#ifdef CONFIG_PM
80static int op_arm_suspend(struct sys_device *dev, pm_message_t state) 231static int op_arm_suspend(struct platform_device *dev, pm_message_t state)
81{ 232{
82 mutex_lock(&op_arm_mutex); 233 mutex_lock(&op_arm_mutex);
83 if (op_arm_enabled) 234 if (op_arm_enabled)
84 op_arm_model->stop(); 235 op_perf_stop();
85 mutex_unlock(&op_arm_mutex); 236 mutex_unlock(&op_arm_mutex);
86 return 0; 237 return 0;
87} 238}
88 239
89static int op_arm_resume(struct sys_device *dev) 240static int op_arm_resume(struct platform_device *dev)
90{ 241{
91 mutex_lock(&op_arm_mutex); 242 mutex_lock(&op_arm_mutex);
92 if (op_arm_enabled && op_arm_model->start()) 243 if (op_arm_enabled && op_perf_start())
93 op_arm_enabled = 0; 244 op_arm_enabled = 0;
94 mutex_unlock(&op_arm_mutex); 245 mutex_unlock(&op_arm_mutex);
95 return 0; 246 return 0;
96} 247}
97 248
98static struct sysdev_class oprofile_sysclass = { 249static struct platform_driver oprofile_driver = {
99 .name = "oprofile", 250 .driver = {
251 .name = "arm-oprofile",
252 },
100 .resume = op_arm_resume, 253 .resume = op_arm_resume,
101 .suspend = op_arm_suspend, 254 .suspend = op_arm_suspend,
102}; 255};
103 256
104static struct sys_device device_oprofile = { 257static struct platform_device *oprofile_pdev;
105 .id = 0,
106 .cls = &oprofile_sysclass,
107};
108 258
109static int __init init_driverfs(void) 259static int __init init_driverfs(void)
110{ 260{
111 int ret; 261 int ret;
112 262
113 if (!(ret = sysdev_class_register(&oprofile_sysclass))) 263 ret = platform_driver_register(&oprofile_driver);
114 ret = sysdev_register(&device_oprofile); 264 if (ret)
265 goto out;
115 266
267 oprofile_pdev = platform_device_register_simple(
268 oprofile_driver.driver.name, 0, NULL, 0);
269 if (IS_ERR(oprofile_pdev)) {
270 ret = PTR_ERR(oprofile_pdev);
271 platform_driver_unregister(&oprofile_driver);
272 }
273
274out:
116 return ret; 275 return ret;
117} 276}
118 277
119static void exit_driverfs(void) 278static void exit_driverfs(void)
120{ 279{
121 sysdev_unregister(&device_oprofile); 280 platform_device_unregister(oprofile_pdev);
122 sysdev_class_unregister(&oprofile_sysclass); 281 platform_driver_unregister(&oprofile_driver);
123} 282}
124#else 283#else
125#define init_driverfs() do { } while (0) 284static int __init init_driverfs(void) { return 0; }
126#define exit_driverfs() do { } while (0) 285#define exit_driverfs() do { } while (0)
127#endif /* CONFIG_PM */ 286#endif /* CONFIG_PM */
128 287
129int __init oprofile_arch_init(struct oprofile_operations *ops) 288static int report_trace(struct stackframe *frame, void *d)
130{ 289{
131 struct op_arm_model_spec *spec = NULL; 290 unsigned int *depth = d;
132 int ret = -ENODEV;
133 291
134 ops->backtrace = arm_backtrace; 292 if (*depth) {
293 oprofile_add_trace(frame->pc);
294 (*depth)--;
295 }
135 296
136#ifdef CONFIG_CPU_XSCALE 297 return *depth == 0;
137 spec = &op_xscale_spec; 298}
138#endif
139 299
140#ifdef CONFIG_OPROFILE_ARMV6 300/*
141 spec = &op_armv6_spec; 301 * The registers we're interested in are at the end of the variable
142#endif 302 * length saved register structure. The fp points at the end of this
303 * structure so the address of this struct is:
304 * (struct frame_tail *)(xxx->fp)-1
305 */
306struct frame_tail {
307 struct frame_tail *fp;
308 unsigned long sp;
309 unsigned long lr;
310} __attribute__((packed));
143 311
144#ifdef CONFIG_OPROFILE_MPCORE 312static struct frame_tail* user_backtrace(struct frame_tail *tail)
145 spec = &op_mpcore_spec; 313{
146#endif 314 struct frame_tail buftail[2];
147 315
148#ifdef CONFIG_OPROFILE_ARMV7 316 /* Also check accessibility of one struct frame_tail beyond */
149 spec = &op_armv7_spec; 317 if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
150#endif 318 return NULL;
319 if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail)))
320 return NULL;
151 321
152 if (spec) { 322 oprofile_add_trace(buftail[0].lr);
153 ret = spec->init();
154 if (ret < 0)
155 return ret;
156 323
157 counter_config = kcalloc(spec->num_counters, sizeof(struct op_counter_config), 324 /* frame pointers should strictly progress back up the stack
158 GFP_KERNEL); 325 * (towards higher addresses) */
159 if (!counter_config) 326 if (tail >= buftail[0].fp)
160 return -ENOMEM; 327 return NULL;
161 328
162 op_arm_model = spec; 329 return buftail[0].fp-1;
163 init_driverfs(); 330}
164 ops->create_files = op_arm_create_files; 331
165 ops->setup = op_arm_setup; 332static void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
166 ops->shutdown = op_arm_stop; 333{
167 ops->start = op_arm_start; 334 struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1;
168 ops->stop = op_arm_stop; 335
169 ops->cpu_type = op_arm_model->name; 336 if (!user_mode(regs)) {
170 printk(KERN_INFO "oprofile: using %s\n", spec->name); 337 struct stackframe frame;
338 frame.fp = regs->ARM_fp;
339 frame.sp = regs->ARM_sp;
340 frame.lr = regs->ARM_lr;
341 frame.pc = regs->ARM_pc;
342 walk_stackframe(&frame, report_trace, &depth);
343 return;
171 } 344 }
172 345
346 while (depth-- && tail && !((unsigned long) tail & 3))
347 tail = user_backtrace(tail);
348}
349
350int __init oprofile_arch_init(struct oprofile_operations *ops)
351{
352 int cpu, ret = 0;
353
354 perf_num_counters = armpmu_get_max_events();
355
356 counter_config = kcalloc(perf_num_counters,
357 sizeof(struct op_counter_config), GFP_KERNEL);
358
359 if (!counter_config) {
360 pr_info("oprofile: failed to allocate %d "
361 "counters\n", perf_num_counters);
362 return -ENOMEM;
363 }
364
365 ret = init_driverfs();
366 if (ret) {
367 kfree(counter_config);
368 return ret;
369 }
370
371 for_each_possible_cpu(cpu) {
372 perf_events[cpu] = kcalloc(perf_num_counters,
373 sizeof(struct perf_event *), GFP_KERNEL);
374 if (!perf_events[cpu]) {
375 pr_info("oprofile: failed to allocate %d perf events "
376 "for cpu %d\n", perf_num_counters, cpu);
377 while (--cpu >= 0)
378 kfree(perf_events[cpu]);
379 return -ENOMEM;
380 }
381 }
382
383 ops->backtrace = arm_backtrace;
384 ops->create_files = op_arm_create_files;
385 ops->setup = op_arm_setup;
386 ops->start = op_arm_start;
387 ops->stop = op_arm_stop;
388 ops->shutdown = op_arm_stop;
389 ops->cpu_type = op_name_from_perf_id(armpmu_get_pmu_id());
390
391 if (!ops->cpu_type)
392 ret = -ENODEV;
393 else
394 pr_info("oprofile: using %s\n", ops->cpu_type);
395
173 return ret; 396 return ret;
174} 397}
175 398
176void oprofile_arch_exit(void) 399void oprofile_arch_exit(void)
177{ 400{
178 if (op_arm_model) { 401 int cpu, id;
402 struct perf_event *event;
403
404 if (*perf_events) {
179 exit_driverfs(); 405 exit_driverfs();
180 op_arm_model = NULL; 406 for_each_possible_cpu(cpu) {
407 for (id = 0; id < perf_num_counters; ++id) {
408 event = perf_events[cpu][id];
409 if (event != NULL)
410 perf_event_release_kernel(event);
411 }
412 kfree(perf_events[cpu]);
413 }
181 } 414 }
182 kfree(counter_config); 415
416 if (counter_config)
417 kfree(counter_config);
418}
419#else
420int __init oprofile_arch_init(struct oprofile_operations *ops)
421{
422 pr_info("oprofile: hardware counters not available\n");
423 return -ENODEV;
183} 424}
425void oprofile_arch_exit(void) {}
426#endif /* CONFIG_HW_PERF_EVENTS */
diff --git a/arch/arm/oprofile/op_arm_model.h b/arch/arm/oprofile/op_arm_model.h
deleted file mode 100644
index 8c4e4f6a1de3..000000000000
--- a/arch/arm/oprofile/op_arm_model.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/**
2 * @file op_arm_model.h
3 * interface to ARM machine specific operations
4 *
5 * @remark Copyright 2004 Oprofile Authors
6 * @remark Read the file COPYING
7 *
8 * @author Zwane Mwaikambo
9 */
10
11#ifndef OP_ARM_MODEL_H
12#define OP_ARM_MODEL_H
13
14struct op_arm_model_spec {
15 int (*init)(void);
16 unsigned int num_counters;
17 int (*setup_ctrs)(void);
18 int (*start)(void);
19 void (*stop)(void);
20 char *name;
21};
22
23#ifdef CONFIG_CPU_XSCALE
24extern struct op_arm_model_spec op_xscale_spec;
25#endif
26
27extern struct op_arm_model_spec op_armv6_spec;
28extern struct op_arm_model_spec op_mpcore_spec;
29extern struct op_arm_model_spec op_armv7_spec;
30
31extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth);
32
33extern int __init op_arm_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec);
34extern void op_arm_exit(void);
35#endif /* OP_ARM_MODEL_H */
diff --git a/arch/arm/oprofile/op_counter.h b/arch/arm/oprofile/op_counter.h
deleted file mode 100644
index ca942a63b52f..000000000000
--- a/arch/arm/oprofile/op_counter.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/**
2 * @file op_counter.h
3 *
4 * @remark Copyright 2004 Oprofile Authors
5 * @remark Read the file COPYING
6 *
7 * @author Zwane Mwaikambo
8 */
9
10#ifndef OP_COUNTER_H
11#define OP_COUNTER_H
12
13/* Per performance monitor configuration as set via
14 * oprofilefs.
15 */
16struct op_counter_config {
17 unsigned long count;
18 unsigned long enabled;
19 unsigned long event;
20 unsigned long unit_mask;
21 unsigned long kernel;
22 unsigned long user;
23};
24
25extern struct op_counter_config *counter_config;
26
27#endif /* OP_COUNTER_H */
diff --git a/arch/arm/oprofile/op_model_arm11_core.c b/arch/arm/oprofile/op_model_arm11_core.c
deleted file mode 100644
index ef3e2653b90c..000000000000
--- a/arch/arm/oprofile/op_model_arm11_core.c
+++ /dev/null
@@ -1,162 +0,0 @@
1/**
2 * @file op_model_arm11_core.c
3 * ARM11 Event Monitor Driver
4 * @remark Copyright 2004 ARM SMP Development Team
5 */
6#include <linux/types.h>
7#include <linux/errno.h>
8#include <linux/oprofile.h>
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/smp.h>
12
13#include "op_counter.h"
14#include "op_arm_model.h"
15#include "op_model_arm11_core.h"
16
17/*
18 * ARM11 PMU support
19 */
20static inline void arm11_write_pmnc(u32 val)
21{
22 /* upper 4bits and 7, 11 are write-as-0 */
23 val &= 0x0ffff77f;
24 asm volatile("mcr p15, 0, %0, c15, c12, 0" : : "r" (val));
25}
26
27static inline u32 arm11_read_pmnc(void)
28{
29 u32 val;
30 asm volatile("mrc p15, 0, %0, c15, c12, 0" : "=r" (val));
31 return val;
32}
33
34static void arm11_reset_counter(unsigned int cnt)
35{
36 u32 val = -(u32)counter_config[CPU_COUNTER(smp_processor_id(), cnt)].count;
37 switch (cnt) {
38 case CCNT:
39 asm volatile("mcr p15, 0, %0, c15, c12, 1" : : "r" (val));
40 break;
41
42 case PMN0:
43 asm volatile("mcr p15, 0, %0, c15, c12, 2" : : "r" (val));
44 break;
45
46 case PMN1:
47 asm volatile("mcr p15, 0, %0, c15, c12, 3" : : "r" (val));
48 break;
49 }
50}
51
52int arm11_setup_pmu(void)
53{
54 unsigned int cnt;
55 u32 pmnc;
56
57 if (arm11_read_pmnc() & PMCR_E) {
58 printk(KERN_ERR "oprofile: CPU%u PMU still enabled when setup new event counter.\n", smp_processor_id());
59 return -EBUSY;
60 }
61
62 /* initialize PMNC, reset overflow, D bit, C bit and P bit. */
63 arm11_write_pmnc(PMCR_OFL_PMN0 | PMCR_OFL_PMN1 | PMCR_OFL_CCNT |
64 PMCR_C | PMCR_P);
65
66 for (pmnc = 0, cnt = PMN0; cnt <= CCNT; cnt++) {
67 unsigned long event;
68
69 if (!counter_config[CPU_COUNTER(smp_processor_id(), cnt)].enabled)
70 continue;
71
72 event = counter_config[CPU_COUNTER(smp_processor_id(), cnt)].event & 255;
73
74 /*
75 * Set event (if destined for PMNx counters)
76 */
77 if (cnt == PMN0) {
78 pmnc |= event << 20;
79 } else if (cnt == PMN1) {
80 pmnc |= event << 12;
81 }
82
83 /*
84 * We don't need to set the event if it's a cycle count
85 * Enable interrupt for this counter
86 */
87 pmnc |= PMCR_IEN_PMN0 << cnt;
88 arm11_reset_counter(cnt);
89 }
90 arm11_write_pmnc(pmnc);
91
92 return 0;
93}
94
95int arm11_start_pmu(void)
96{
97 arm11_write_pmnc(arm11_read_pmnc() | PMCR_E);
98 return 0;
99}
100
101int arm11_stop_pmu(void)
102{
103 unsigned int cnt;
104
105 arm11_write_pmnc(arm11_read_pmnc() & ~PMCR_E);
106
107 for (cnt = PMN0; cnt <= CCNT; cnt++)
108 arm11_reset_counter(cnt);
109
110 return 0;
111}
112
113/*
114 * CPU counters' IRQ handler (one IRQ per CPU)
115 */
116static irqreturn_t arm11_pmu_interrupt(int irq, void *arg)
117{
118 struct pt_regs *regs = get_irq_regs();
119 unsigned int cnt;
120 u32 pmnc;
121
122 pmnc = arm11_read_pmnc();
123
124 for (cnt = PMN0; cnt <= CCNT; cnt++) {
125 if ((pmnc & (PMCR_OFL_PMN0 << cnt)) && (pmnc & (PMCR_IEN_PMN0 << cnt))) {
126 arm11_reset_counter(cnt);
127 oprofile_add_sample(regs, CPU_COUNTER(smp_processor_id(), cnt));
128 }
129 }
130 /* Clear counter flag(s) */
131 arm11_write_pmnc(pmnc);
132 return IRQ_HANDLED;
133}
134
135int arm11_request_interrupts(const int *irqs, int nr)
136{
137 unsigned int i;
138 int ret = 0;
139
140 for(i = 0; i < nr; i++) {
141 ret = request_irq(irqs[i], arm11_pmu_interrupt, IRQF_DISABLED, "CP15 PMU", NULL);
142 if (ret != 0) {
143 printk(KERN_ERR "oprofile: unable to request IRQ%u for MPCORE-EM\n",
144 irqs[i]);
145 break;
146 }
147 }
148
149 if (i != nr)
150 while (i-- != 0)
151 free_irq(irqs[i], NULL);
152
153 return ret;
154}
155
156void arm11_release_interrupts(const int *irqs, int nr)
157{
158 unsigned int i;
159
160 for (i = 0; i < nr; i++)
161 free_irq(irqs[i], NULL);
162}
diff --git a/arch/arm/oprofile/op_model_arm11_core.h b/arch/arm/oprofile/op_model_arm11_core.h
deleted file mode 100644
index 1902b99d9dfd..000000000000
--- a/arch/arm/oprofile/op_model_arm11_core.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/**
2 * @file op_model_arm11_core.h
3 * ARM11 Event Monitor Driver
4 * @remark Copyright 2004 ARM SMP Development Team
5 * @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
6 * @remark Copyright 2000-2004 MontaVista Software Inc
7 * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
8 * @remark Copyright 2004 Intel Corporation
9 * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
10 * @remark Copyright 2004 Oprofile Authors
11 *
12 * @remark Read the file COPYING
13 *
14 * @author Zwane Mwaikambo
15 */
16#ifndef OP_MODEL_ARM11_CORE_H
17#define OP_MODEL_ARM11_CORE_H
18
19/*
20 * Per-CPU PMCR
21 */
22#define PMCR_E (1 << 0) /* Enable */
23#define PMCR_P (1 << 1) /* Count reset */
24#define PMCR_C (1 << 2) /* Cycle counter reset */
25#define PMCR_D (1 << 3) /* Cycle counter counts every 64th cpu cycle */
26#define PMCR_IEN_PMN0 (1 << 4) /* Interrupt enable count reg 0 */
27#define PMCR_IEN_PMN1 (1 << 5) /* Interrupt enable count reg 1 */
28#define PMCR_IEN_CCNT (1 << 6) /* Interrupt enable cycle counter */
29#define PMCR_OFL_PMN0 (1 << 8) /* Count reg 0 overflow */
30#define PMCR_OFL_PMN1 (1 << 9) /* Count reg 1 overflow */
31#define PMCR_OFL_CCNT (1 << 10) /* Cycle counter overflow */
32
33#define PMN0 0
34#define PMN1 1
35#define CCNT 2
36
37#define CPU_COUNTER(cpu, counter) ((cpu) * 3 + (counter))
38
39int arm11_setup_pmu(void);
40int arm11_start_pmu(void);
41int arm11_stop_pmu(void);
42int arm11_request_interrupts(const int *, int);
43void arm11_release_interrupts(const int *, int);
44
45#endif
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
deleted file mode 100644
index f73ce875a395..000000000000
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ /dev/null
@@ -1,306 +0,0 @@
1/**
2 * @file op_model_mpcore.c
3 * MPCORE Event Monitor Driver
4 * @remark Copyright 2004 ARM SMP Development Team
5 * @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
6 * @remark Copyright 2000-2004 MontaVista Software Inc
7 * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
8 * @remark Copyright 2004 Intel Corporation
9 * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
10 * @remark Copyright 2004 Oprofile Authors
11 *
12 * @remark Read the file COPYING
13 *
14 * @author Zwane Mwaikambo
15 *
16 * Counters:
17 * 0: PMN0 on CPU0, per-cpu configurable event counter
18 * 1: PMN1 on CPU0, per-cpu configurable event counter
19 * 2: CCNT on CPU0
20 * 3: PMN0 on CPU1
21 * 4: PMN1 on CPU1
22 * 5: CCNT on CPU1
23 * 6: PMN0 on CPU1
24 * 7: PMN1 on CPU1
25 * 8: CCNT on CPU1
26 * 9: PMN0 on CPU1
27 * 10: PMN1 on CPU1
28 * 11: CCNT on CPU1
29 * 12-19: configurable SCU event counters
30 */
31
32/* #define DEBUG */
33#include <linux/types.h>
34#include <linux/errno.h>
35#include <linux/err.h>
36#include <linux/sched.h>
37#include <linux/oprofile.h>
38#include <linux/interrupt.h>
39#include <linux/smp.h>
40#include <linux/io.h>
41
42#include <asm/irq.h>
43#include <asm/mach/irq.h>
44#include <mach/hardware.h>
45#include <mach/board-eb.h>
46#include <asm/system.h>
47#include <asm/pmu.h>
48
49#include "op_counter.h"
50#include "op_arm_model.h"
51#include "op_model_arm11_core.h"
52#include "op_model_mpcore.h"
53
54/*
55 * MPCore SCU event monitor support
56 */
57#define SCU_EVENTMONITORS_VA_BASE __io_address(REALVIEW_EB11MP_SCU_BASE + 0x10)
58
59/*
60 * Bitmask of used SCU counters
61 */
62static unsigned int scu_em_used;
63static const struct pmu_irqs *pmu_irqs;
64
65/*
66 * 2 helper fns take a counter number from 0-7 (not the userspace-visible counter number)
67 */
68static inline void scu_reset_counter(struct eventmonitor __iomem *emc, unsigned int n)
69{
70 writel(-(u32)counter_config[SCU_COUNTER(n)].count, &emc->MC[n]);
71}
72
73static inline void scu_set_event(struct eventmonitor __iomem *emc, unsigned int n, u32 event)
74{
75 event &= 0xff;
76 writeb(event, &emc->MCEB[n]);
77}
78
79/*
80 * SCU counters' IRQ handler (one IRQ per counter => 2 IRQs per CPU)
81 */
82static irqreturn_t scu_em_interrupt(int irq, void *arg)
83{
84 struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE;
85 unsigned int cnt;
86
87 cnt = irq - IRQ_EB11MP_PMU_SCU0;
88 oprofile_add_sample(get_irq_regs(), SCU_COUNTER(cnt));
89 scu_reset_counter(emc, cnt);
90
91 /* Clear overflow flag for this counter */
92 writel(1 << (cnt + 16), &emc->PMCR);
93
94 return IRQ_HANDLED;
95}
96
97/* Configure just the SCU counters that the user has requested */
98static void scu_setup(void)
99{
100 struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE;
101 unsigned int i;
102
103 scu_em_used = 0;
104
105 for (i = 0; i < NUM_SCU_COUNTERS; i++) {
106 if (counter_config[SCU_COUNTER(i)].enabled &&
107 counter_config[SCU_COUNTER(i)].event) {
108 scu_set_event(emc, i, 0); /* disable counter for now */
109 scu_em_used |= 1 << i;
110 }
111 }
112}
113
114static int scu_start(void)
115{
116 struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE;
117 unsigned int temp, i;
118 unsigned long event;
119 int ret = 0;
120
121 /*
122 * request the SCU counter interrupts that we need
123 */
124 for (i = 0; i < NUM_SCU_COUNTERS; i++) {
125 if (scu_em_used & (1 << i)) {
126 ret = request_irq(IRQ_EB11MP_PMU_SCU0 + i, scu_em_interrupt, IRQF_DISABLED, "SCU PMU", NULL);
127 if (ret) {
128 printk(KERN_ERR "oprofile: unable to request IRQ%u for SCU Event Monitor\n",
129 IRQ_EB11MP_PMU_SCU0 + i);
130 goto err_free_scu;
131 }
132 }
133 }
134
135 /*
136 * clear overflow and enable interrupt for all used counters
137 */
138 temp = readl(&emc->PMCR);
139 for (i = 0; i < NUM_SCU_COUNTERS; i++) {
140 if (scu_em_used & (1 << i)) {
141 scu_reset_counter(emc, i);
142 event = counter_config[SCU_COUNTER(i)].event;
143 scu_set_event(emc, i, event);
144
145 /* clear overflow/interrupt */
146 temp |= 1 << (i + 16);
147 /* enable interrupt*/
148 temp |= 1 << (i + 8);
149 }
150 }
151
152 /* Enable all 8 counters */
153 temp |= PMCR_E;
154 writel(temp, &emc->PMCR);
155
156 return 0;
157
158 err_free_scu:
159 while (i--)
160 free_irq(IRQ_EB11MP_PMU_SCU0 + i, NULL);
161 return ret;
162}
163
164static void scu_stop(void)
165{
166 struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE;
167 unsigned int temp, i;
168
169 /* Disable counter interrupts */
170 /* Don't disable all 8 counters (with the E bit) as they may be in use */
171 temp = readl(&emc->PMCR);
172 for (i = 0; i < NUM_SCU_COUNTERS; i++) {
173 if (scu_em_used & (1 << i))
174 temp &= ~(1 << (i + 8));
175 }
176 writel(temp, &emc->PMCR);
177
178 /* Free counter interrupts and reset counters */
179 for (i = 0; i < NUM_SCU_COUNTERS; i++) {
180 if (scu_em_used & (1 << i)) {
181 scu_reset_counter(emc, i);
182 free_irq(IRQ_EB11MP_PMU_SCU0 + i, NULL);
183 }
184 }
185}
186
187struct em_function_data {
188 int (*fn)(void);
189 int ret;
190};
191
192static void em_func(void *data)
193{
194 struct em_function_data *d = data;
195 int ret = d->fn();
196 if (ret)
197 d->ret = ret;
198}
199
200static int em_call_function(int (*fn)(void))
201{
202 struct em_function_data data;
203
204 data.fn = fn;
205 data.ret = 0;
206
207 preempt_disable();
208 smp_call_function(em_func, &data, 1);
209 em_func(&data);
210 preempt_enable();
211
212 return data.ret;
213}
214
215/*
216 * Glue to stick the individual ARM11 PMUs and the SCU
217 * into the oprofile framework.
218 */
219static int em_setup_ctrs(void)
220{
221 int ret;
222
223 /* Configure CPU counters by cross-calling to the other CPUs */
224 ret = em_call_function(arm11_setup_pmu);
225 if (ret == 0)
226 scu_setup();
227
228 return 0;
229}
230
231static int em_start(void)
232{
233 int ret;
234
235 pmu_irqs = reserve_pmu();
236 if (IS_ERR(pmu_irqs)) {
237 ret = PTR_ERR(pmu_irqs);
238 goto out;
239 }
240
241 ret = arm11_request_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
242 if (ret == 0) {
243 em_call_function(arm11_start_pmu);
244
245 ret = scu_start();
246 if (ret) {
247 arm11_release_interrupts(pmu_irqs->irqs,
248 pmu_irqs->num_irqs);
249 } else {
250 release_pmu(pmu_irqs);
251 pmu_irqs = NULL;
252 }
253 }
254
255out:
256 return ret;
257}
258
259static void em_stop(void)
260{
261 em_call_function(arm11_stop_pmu);
262 arm11_release_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
263 scu_stop();
264 release_pmu(pmu_irqs);
265}
266
267/*
268 * Why isn't there a function to route an IRQ to a specific CPU in
269 * genirq?
270 */
271static void em_route_irq(int irq, unsigned int cpu)
272{
273 struct irq_desc *desc = irq_desc + irq;
274 const struct cpumask *mask = cpumask_of(cpu);
275
276 spin_lock_irq(&desc->lock);
277 cpumask_copy(desc->affinity, mask);
278 desc->chip->set_affinity(irq, mask);
279 spin_unlock_irq(&desc->lock);
280}
281
282static int em_setup(void)
283{
284 /*
285 * Send SCU PMU interrupts to the "owner" CPU.
286 */
287 em_route_irq(IRQ_EB11MP_PMU_SCU0, 0);
288 em_route_irq(IRQ_EB11MP_PMU_SCU1, 0);
289 em_route_irq(IRQ_EB11MP_PMU_SCU2, 1);
290 em_route_irq(IRQ_EB11MP_PMU_SCU3, 1);
291 em_route_irq(IRQ_EB11MP_PMU_SCU4, 2);
292 em_route_irq(IRQ_EB11MP_PMU_SCU5, 2);
293 em_route_irq(IRQ_EB11MP_PMU_SCU6, 3);
294 em_route_irq(IRQ_EB11MP_PMU_SCU7, 3);
295
296 return init_pmu();
297}
298
299struct op_arm_model_spec op_mpcore_spec = {
300 .init = em_setup,
301 .num_counters = MPCORE_NUM_COUNTERS,
302 .setup_ctrs = em_setup_ctrs,
303 .start = em_start,
304 .stop = em_stop,
305 .name = "arm/mpcore",
306};
diff --git a/arch/arm/oprofile/op_model_mpcore.h b/arch/arm/oprofile/op_model_mpcore.h
deleted file mode 100644
index 73d811023688..000000000000
--- a/arch/arm/oprofile/op_model_mpcore.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/**
2 * @file op_model_mpcore.c
3 * MPCORE Event Monitor Driver
4 * @remark Copyright 2004 ARM SMP Development Team
5 * @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
6 * @remark Copyright 2000-2004 MontaVista Software Inc
7 * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
8 * @remark Copyright 2004 Intel Corporation
9 * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
10 * @remark Copyright 2004 Oprofile Authors
11 *
12 * @remark Read the file COPYING
13 *
14 * @author Zwane Mwaikambo
15 */
16#ifndef OP_MODEL_MPCORE_H
17#define OP_MODEL_MPCORE_H
18
19struct eventmonitor {
20 unsigned long PMCR;
21 unsigned char MCEB[8];
22 unsigned long MC[8];
23};
24
25/*
26 * List of userspace counter numbers: note that the structure is important.
27 * The code relies on CPUn's counters being CPU0's counters + 3n
28 * and on CPU0's counters starting at 0
29 */
30
31#define COUNTER_CPU0_PMN0 0
32#define COUNTER_CPU0_PMN1 1
33#define COUNTER_CPU0_CCNT 2
34
35#define COUNTER_CPU1_PMN0 3
36#define COUNTER_CPU1_PMN1 4
37#define COUNTER_CPU1_CCNT 5
38
39#define COUNTER_CPU2_PMN0 6
40#define COUNTER_CPU2_PMN1 7
41#define COUNTER_CPU2_CCNT 8
42
43#define COUNTER_CPU3_PMN0 9
44#define COUNTER_CPU3_PMN1 10
45#define COUNTER_CPU3_CCNT 11
46
47#define COUNTER_SCU_MN0 12
48#define COUNTER_SCU_MN1 13
49#define COUNTER_SCU_MN2 14
50#define COUNTER_SCU_MN3 15
51#define COUNTER_SCU_MN4 16
52#define COUNTER_SCU_MN5 17
53#define COUNTER_SCU_MN6 18
54#define COUNTER_SCU_MN7 19
55#define NUM_SCU_COUNTERS 8
56
57#define SCU_COUNTER(number) ((number) + COUNTER_SCU_MN0)
58
59#define MPCORE_NUM_COUNTERS SCU_COUNTER(NUM_SCU_COUNTERS)
60
61#endif
diff --git a/arch/arm/oprofile/op_model_v6.c b/arch/arm/oprofile/op_model_v6.c
deleted file mode 100644
index a22357a2fd08..000000000000
--- a/arch/arm/oprofile/op_model_v6.c
+++ /dev/null
@@ -1,78 +0,0 @@
1/**
2 * @file op_model_v6.c
3 * ARM11 Performance Monitor Driver
4 *
5 * Based on op_model_xscale.c
6 *
7 * @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
8 * @remark Copyright 2000-2004 MontaVista Software Inc
9 * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
10 * @remark Copyright 2004 Intel Corporation
11 * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
12 * @remark Copyright 2004 OProfile Authors
13 *
14 * @remark Read the file COPYING
15 *
16 * @author Tony Lindgren <tony@atomide.com>
17 */
18
19/* #define DEBUG */
20#include <linux/types.h>
21#include <linux/errno.h>
22#include <linux/err.h>
23#include <linux/sched.h>
24#include <linux/oprofile.h>
25#include <linux/interrupt.h>
26#include <asm/irq.h>
27#include <asm/system.h>
28#include <asm/pmu.h>
29
30#include "op_counter.h"
31#include "op_arm_model.h"
32#include "op_model_arm11_core.h"
33
34static const struct pmu_irqs *pmu_irqs;
35
36static void armv6_pmu_stop(void)
37{
38 arm11_stop_pmu();
39 arm11_release_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
40 release_pmu(pmu_irqs);
41 pmu_irqs = NULL;
42}
43
44static int armv6_pmu_start(void)
45{
46 int ret;
47
48 pmu_irqs = reserve_pmu();
49 if (IS_ERR(pmu_irqs)) {
50 ret = PTR_ERR(pmu_irqs);
51 goto out;
52 }
53
54 ret = arm11_request_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
55 if (ret >= 0) {
56 ret = arm11_start_pmu();
57 } else {
58 release_pmu(pmu_irqs);
59 pmu_irqs = NULL;
60 }
61
62out:
63 return ret;
64}
65
66static int armv6_detect_pmu(void)
67{
68 return 0;
69}
70
71struct op_arm_model_spec op_armv6_spec = {
72 .init = armv6_detect_pmu,
73 .num_counters = 3,
74 .setup_ctrs = arm11_setup_pmu,
75 .start = armv6_pmu_start,
76 .stop = armv6_pmu_stop,
77 .name = "arm/armv6",
78};
diff --git a/arch/arm/oprofile/op_model_v7.c b/arch/arm/oprofile/op_model_v7.c
deleted file mode 100644
index 8642d0891ae1..000000000000
--- a/arch/arm/oprofile/op_model_v7.c
+++ /dev/null
@@ -1,415 +0,0 @@
1/**
2 * op_model_v7.c
3 * ARM V7 (Cortex A8) Event Monitor Driver
4 *
5 * Copyright 2008 Jean Pihet <jpihet@mvista.com>
6 * Copyright 2004 ARM SMP Development Team
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/types.h>
13#include <linux/errno.h>
14#include <linux/err.h>
15#include <linux/oprofile.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/smp.h>
19
20#include <asm/pmu.h>
21
22#include "op_counter.h"
23#include "op_arm_model.h"
24#include "op_model_v7.h"
25
26/* #define DEBUG */
27
28
29/*
30 * ARM V7 PMNC support
31 */
32
33static u32 cnt_en[CNTMAX];
34
35static inline void armv7_pmnc_write(u32 val)
36{
37 val &= PMNC_MASK;
38 asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (val));
39}
40
41static inline u32 armv7_pmnc_read(void)
42{
43 u32 val;
44
45 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
46 return val;
47}
48
49static inline u32 armv7_pmnc_enable_counter(unsigned int cnt)
50{
51 u32 val;
52
53 if (cnt >= CNTMAX) {
54 printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter"
55 " %d\n", smp_processor_id(), cnt);
56 return -1;
57 }
58
59 if (cnt == CCNT)
60 val = CNTENS_C;
61 else
62 val = (1 << (cnt - CNT0));
63
64 val &= CNTENS_MASK;
65 asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val));
66
67 return cnt;
68}
69
70static inline u32 armv7_pmnc_disable_counter(unsigned int cnt)
71{
72 u32 val;
73
74 if (cnt >= CNTMAX) {
75 printk(KERN_ERR "oprofile: CPU%u disabling wrong PMNC counter"
76 " %d\n", smp_processor_id(), cnt);
77 return -1;
78 }
79
80 if (cnt == CCNT)
81 val = CNTENC_C;
82 else
83 val = (1 << (cnt - CNT0));
84
85 val &= CNTENC_MASK;
86 asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val));
87
88 return cnt;
89}
90
91static inline u32 armv7_pmnc_enable_intens(unsigned int cnt)
92{
93 u32 val;
94
95 if (cnt >= CNTMAX) {
96 printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter"
97 " interrupt enable %d\n", smp_processor_id(), cnt);
98 return -1;
99 }
100
101 if (cnt == CCNT)
102 val = INTENS_C;
103 else
104 val = (1 << (cnt - CNT0));
105
106 val &= INTENS_MASK;
107 asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (val));
108
109 return cnt;
110}
111
112static inline u32 armv7_pmnc_getreset_flags(void)
113{
114 u32 val;
115
116 /* Read */
117 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
118
119 /* Write to clear flags */
120 val &= FLAG_MASK;
121 asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (val));
122
123 return val;
124}
125
126static inline int armv7_pmnc_select_counter(unsigned int cnt)
127{
128 u32 val;
129
130 if ((cnt == CCNT) || (cnt >= CNTMAX)) {
131 printk(KERN_ERR "oprofile: CPU%u selecting wrong PMNC counteri"
132 " %d\n", smp_processor_id(), cnt);
133 return -1;
134 }
135
136 val = (cnt - CNT0) & SELECT_MASK;
137 asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
138
139 return cnt;
140}
141
142static inline void armv7_pmnc_write_evtsel(unsigned int cnt, u32 val)
143{
144 if (armv7_pmnc_select_counter(cnt) == cnt) {
145 val &= EVTSEL_MASK;
146 asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
147 }
148}
149
150static void armv7_pmnc_reset_counter(unsigned int cnt)
151{
152 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
153 u32 val = -(u32)counter_config[cpu_cnt].count;
154
155 switch (cnt) {
156 case CCNT:
157 armv7_pmnc_disable_counter(cnt);
158
159 asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val));
160
161 if (cnt_en[cnt] != 0)
162 armv7_pmnc_enable_counter(cnt);
163
164 break;
165
166 case CNT0:
167 case CNT1:
168 case CNT2:
169 case CNT3:
170 armv7_pmnc_disable_counter(cnt);
171
172 if (armv7_pmnc_select_counter(cnt) == cnt)
173 asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (val));
174
175 if (cnt_en[cnt] != 0)
176 armv7_pmnc_enable_counter(cnt);
177
178 break;
179
180 default:
181 printk(KERN_ERR "oprofile: CPU%u resetting wrong PMNC counter"
182 " %d\n", smp_processor_id(), cnt);
183 break;
184 }
185}
186
187int armv7_setup_pmnc(void)
188{
189 unsigned int cnt;
190
191 if (armv7_pmnc_read() & PMNC_E) {
192 printk(KERN_ERR "oprofile: CPU%u PMNC still enabled when setup"
193 " new event counter.\n", smp_processor_id());
194 return -EBUSY;
195 }
196
197 /* Initialize & Reset PMNC: C bit and P bit */
198 armv7_pmnc_write(PMNC_P | PMNC_C);
199
200
201 for (cnt = CCNT; cnt < CNTMAX; cnt++) {
202 unsigned long event;
203 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
204
205 /*
206 * Disable counter
207 */
208 armv7_pmnc_disable_counter(cnt);
209 cnt_en[cnt] = 0;
210
211 if (!counter_config[cpu_cnt].enabled)
212 continue;
213
214 event = counter_config[cpu_cnt].event & 255;
215
216 /*
217 * Set event (if destined for PMNx counters)
218 * We don't need to set the event if it's a cycle count
219 */
220 if (cnt != CCNT)
221 armv7_pmnc_write_evtsel(cnt, event);
222
223 /*
224 * Enable interrupt for this counter
225 */
226 armv7_pmnc_enable_intens(cnt);
227
228 /*
229 * Reset counter
230 */
231 armv7_pmnc_reset_counter(cnt);
232
233 /*
234 * Enable counter
235 */
236 armv7_pmnc_enable_counter(cnt);
237 cnt_en[cnt] = 1;
238 }
239
240 return 0;
241}
242
243static inline void armv7_start_pmnc(void)
244{
245 armv7_pmnc_write(armv7_pmnc_read() | PMNC_E);
246}
247
248static inline void armv7_stop_pmnc(void)
249{
250 armv7_pmnc_write(armv7_pmnc_read() & ~PMNC_E);
251}
252
253/*
254 * CPU counters' IRQ handler (one IRQ per CPU)
255 */
256static irqreturn_t armv7_pmnc_interrupt(int irq, void *arg)
257{
258 struct pt_regs *regs = get_irq_regs();
259 unsigned int cnt;
260 u32 flags;
261
262
263 /*
264 * Stop IRQ generation
265 */
266 armv7_stop_pmnc();
267
268 /*
269 * Get and reset overflow status flags
270 */
271 flags = armv7_pmnc_getreset_flags();
272
273 /*
274 * Cycle counter
275 */
276 if (flags & FLAG_C) {
277 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), CCNT);
278 armv7_pmnc_reset_counter(CCNT);
279 oprofile_add_sample(regs, cpu_cnt);
280 }
281
282 /*
283 * PMNC counters 0:3
284 */
285 for (cnt = CNT0; cnt < CNTMAX; cnt++) {
286 if (flags & (1 << (cnt - CNT0))) {
287 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
288 armv7_pmnc_reset_counter(cnt);
289 oprofile_add_sample(regs, cpu_cnt);
290 }
291 }
292
293 /*
294 * Allow IRQ generation
295 */
296 armv7_start_pmnc();
297
298 return IRQ_HANDLED;
299}
300
301int armv7_request_interrupts(const int *irqs, int nr)
302{
303 unsigned int i;
304 int ret = 0;
305
306 for (i = 0; i < nr; i++) {
307 ret = request_irq(irqs[i], armv7_pmnc_interrupt,
308 IRQF_DISABLED, "CP15 PMNC", NULL);
309 if (ret != 0) {
310 printk(KERN_ERR "oprofile: unable to request IRQ%u"
311 " for ARMv7\n",
312 irqs[i]);
313 break;
314 }
315 }
316
317 if (i != nr)
318 while (i-- != 0)
319 free_irq(irqs[i], NULL);
320
321 return ret;
322}
323
324void armv7_release_interrupts(const int *irqs, int nr)
325{
326 unsigned int i;
327
328 for (i = 0; i < nr; i++)
329 free_irq(irqs[i], NULL);
330}
331
332#ifdef DEBUG
333static void armv7_pmnc_dump_regs(void)
334{
335 u32 val;
336 unsigned int cnt;
337
338 printk(KERN_INFO "PMNC registers dump:\n");
339
340 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
341 printk(KERN_INFO "PMNC =0x%08x\n", val);
342
343 asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val));
344 printk(KERN_INFO "CNTENS=0x%08x\n", val);
345
346 asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val));
347 printk(KERN_INFO "INTENS=0x%08x\n", val);
348
349 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
350 printk(KERN_INFO "FLAGS =0x%08x\n", val);
351
352 asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val));
353 printk(KERN_INFO "SELECT=0x%08x\n", val);
354
355 asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
356 printk(KERN_INFO "CCNT =0x%08x\n", val);
357
358 for (cnt = CNT0; cnt < CNTMAX; cnt++) {
359 armv7_pmnc_select_counter(cnt);
360 asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val));
361 printk(KERN_INFO "CNT[%d] count =0x%08x\n", cnt-CNT0, val);
362 asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val));
363 printk(KERN_INFO "CNT[%d] evtsel=0x%08x\n", cnt-CNT0, val);
364 }
365}
366#endif
367
368static const struct pmu_irqs *pmu_irqs;
369
370static void armv7_pmnc_stop(void)
371{
372#ifdef DEBUG
373 armv7_pmnc_dump_regs();
374#endif
375 armv7_stop_pmnc();
376 armv7_release_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
377 release_pmu(pmu_irqs);
378 pmu_irqs = NULL;
379}
380
381static int armv7_pmnc_start(void)
382{
383 int ret;
384
385 pmu_irqs = reserve_pmu();
386 if (IS_ERR(pmu_irqs))
387 return PTR_ERR(pmu_irqs);
388
389#ifdef DEBUG
390 armv7_pmnc_dump_regs();
391#endif
392 ret = armv7_request_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
393 if (ret >= 0) {
394 armv7_start_pmnc();
395 } else {
396 release_pmu(pmu_irqs);
397 pmu_irqs = NULL;
398 }
399
400 return ret;
401}
402
403static int armv7_detect_pmnc(void)
404{
405 return 0;
406}
407
408struct op_arm_model_spec op_armv7_spec = {
409 .init = armv7_detect_pmnc,
410 .num_counters = 5,
411 .setup_ctrs = armv7_setup_pmnc,
412 .start = armv7_pmnc_start,
413 .stop = armv7_pmnc_stop,
414 .name = "arm/armv7",
415};
diff --git a/arch/arm/oprofile/op_model_v7.h b/arch/arm/oprofile/op_model_v7.h
deleted file mode 100644
index 9ca334b39c75..000000000000
--- a/arch/arm/oprofile/op_model_v7.h
+++ /dev/null
@@ -1,103 +0,0 @@
1/**
2 * op_model_v7.h
3 * ARM v7 (Cortex A8) Event Monitor Driver
4 *
5 * Copyright 2008 Jean Pihet <jpihet@mvista.com>
6 * Copyright 2004 ARM SMP Development Team
7 * Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
8 * Copyright 2000-2004 MontaVista Software Inc
9 * Copyright 2004 Dave Jiang <dave.jiang@intel.com>
10 * Copyright 2004 Intel Corporation
11 * Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
12 * Copyright 2004 Oprofile Authors
13 *
14 * Read the file COPYING
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20#ifndef OP_MODEL_V7_H
21#define OP_MODEL_V7_H
22
23/*
24 * Per-CPU PMNC: config reg
25 */
26#define PMNC_E (1 << 0) /* Enable all counters */
27#define PMNC_P (1 << 1) /* Reset all counters */
28#define PMNC_C (1 << 2) /* Cycle counter reset */
29#define PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */
30#define PMNC_X (1 << 4) /* Export to ETM */
31#define PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/
32#define PMNC_MASK 0x3f /* Mask for writable bits */
33
34/*
35 * Available counters
36 */
37#define CCNT 0
38#define CNT0 1
39#define CNT1 2
40#define CNT2 3
41#define CNT3 4
42#define CNTMAX 5
43
44#define CPU_COUNTER(cpu, counter) ((cpu) * CNTMAX + (counter))
45
46/*
47 * CNTENS: counters enable reg
48 */
49#define CNTENS_P0 (1 << 0)
50#define CNTENS_P1 (1 << 1)
51#define CNTENS_P2 (1 << 2)
52#define CNTENS_P3 (1 << 3)
53#define CNTENS_C (1 << 31)
54#define CNTENS_MASK 0x8000000f /* Mask for writable bits */
55
56/*
57 * CNTENC: counters disable reg
58 */
59#define CNTENC_P0 (1 << 0)
60#define CNTENC_P1 (1 << 1)
61#define CNTENC_P2 (1 << 2)
62#define CNTENC_P3 (1 << 3)
63#define CNTENC_C (1 << 31)
64#define CNTENC_MASK 0x8000000f /* Mask for writable bits */
65
66/*
67 * INTENS: counters overflow interrupt enable reg
68 */
69#define INTENS_P0 (1 << 0)
70#define INTENS_P1 (1 << 1)
71#define INTENS_P2 (1 << 2)
72#define INTENS_P3 (1 << 3)
73#define INTENS_C (1 << 31)
74#define INTENS_MASK 0x8000000f /* Mask for writable bits */
75
76/*
77 * EVTSEL: Event selection reg
78 */
79#define EVTSEL_MASK 0x7f /* Mask for writable bits */
80
81/*
82 * SELECT: Counter selection reg
83 */
84#define SELECT_MASK 0x1f /* Mask for writable bits */
85
86/*
87 * FLAG: counters overflow flag status reg
88 */
89#define FLAG_P0 (1 << 0)
90#define FLAG_P1 (1 << 1)
91#define FLAG_P2 (1 << 2)
92#define FLAG_P3 (1 << 3)
93#define FLAG_C (1 << 31)
94#define FLAG_MASK 0x8000000f /* Mask for writable bits */
95
96
97int armv7_setup_pmu(void);
98int armv7_start_pmu(void);
99int armv7_stop_pmu(void);
100int armv7_request_interrupts(const int *, int);
101void armv7_release_interrupts(const int *, int);
102
103#endif
diff --git a/arch/arm/oprofile/op_model_xscale.c b/arch/arm/oprofile/op_model_xscale.c
deleted file mode 100644
index 1d34a02048bd..000000000000
--- a/arch/arm/oprofile/op_model_xscale.c
+++ /dev/null
@@ -1,444 +0,0 @@
1/**
2 * @file op_model_xscale.c
3 * XScale Performance Monitor Driver
4 *
5 * @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
6 * @remark Copyright 2000-2004 MontaVista Software Inc
7 * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
8 * @remark Copyright 2004 Intel Corporation
9 * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
10 * @remark Copyright 2004 OProfile Authors
11 *
12 * @remark Read the file COPYING
13 *
14 * @author Zwane Mwaikambo
15 */
16
17/* #define DEBUG */
18#include <linux/types.h>
19#include <linux/errno.h>
20#include <linux/err.h>
21#include <linux/sched.h>
22#include <linux/oprofile.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25
26#include <asm/cputype.h>
27#include <asm/pmu.h>
28
29#include "op_counter.h"
30#include "op_arm_model.h"
31
32#define PMU_ENABLE 0x001 /* Enable counters */
33#define PMN_RESET 0x002 /* Reset event counters */
34#define CCNT_RESET 0x004 /* Reset clock counter */
35#define PMU_RESET (CCNT_RESET | PMN_RESET)
36#define PMU_CNT64 0x008 /* Make CCNT count every 64th cycle */
37
38/*
39 * Different types of events that can be counted by the XScale PMU
40 * as used by Oprofile userspace. Here primarily for documentation
41 * purposes.
42 */
43
44#define EVT_ICACHE_MISS 0x00
45#define EVT_ICACHE_NO_DELIVER 0x01
46#define EVT_DATA_STALL 0x02
47#define EVT_ITLB_MISS 0x03
48#define EVT_DTLB_MISS 0x04
49#define EVT_BRANCH 0x05
50#define EVT_BRANCH_MISS 0x06
51#define EVT_INSTRUCTION 0x07
52#define EVT_DCACHE_FULL_STALL 0x08
53#define EVT_DCACHE_FULL_STALL_CONTIG 0x09
54#define EVT_DCACHE_ACCESS 0x0A
55#define EVT_DCACHE_MISS 0x0B
56#define EVT_DCACE_WRITE_BACK 0x0C
57#define EVT_PC_CHANGED 0x0D
58#define EVT_BCU_REQUEST 0x10
59#define EVT_BCU_FULL 0x11
60#define EVT_BCU_DRAIN 0x12
61#define EVT_BCU_ECC_NO_ELOG 0x14
62#define EVT_BCU_1_BIT_ERR 0x15
63#define EVT_RMW 0x16
64/* EVT_CCNT is not hardware defined */
65#define EVT_CCNT 0xFE
66#define EVT_UNUSED 0xFF
67
68struct pmu_counter {
69 volatile unsigned long ovf;
70 unsigned long reset_counter;
71};
72
73enum { CCNT, PMN0, PMN1, PMN2, PMN3, MAX_COUNTERS };
74
75static struct pmu_counter results[MAX_COUNTERS];
76
77/*
78 * There are two versions of the PMU in current XScale processors
79 * with differing register layouts and number of performance counters.
80 * e.g. IOP32x is xsc1 whilst IOP33x is xsc2.
81 * We detect which register layout to use in xscale_detect_pmu()
82 */
83enum { PMU_XSC1, PMU_XSC2 };
84
85struct pmu_type {
86 int id;
87 char *name;
88 int num_counters;
89 unsigned int int_enable;
90 unsigned int cnt_ovf[MAX_COUNTERS];
91 unsigned int int_mask[MAX_COUNTERS];
92};
93
94static struct pmu_type pmu_parms[] = {
95 {
96 .id = PMU_XSC1,
97 .name = "arm/xscale1",
98 .num_counters = 3,
99 .int_mask = { [PMN0] = 0x10, [PMN1] = 0x20,
100 [CCNT] = 0x40 },
101 .cnt_ovf = { [CCNT] = 0x400, [PMN0] = 0x100,
102 [PMN1] = 0x200},
103 },
104 {
105 .id = PMU_XSC2,
106 .name = "arm/xscale2",
107 .num_counters = 5,
108 .int_mask = { [CCNT] = 0x01, [PMN0] = 0x02,
109 [PMN1] = 0x04, [PMN2] = 0x08,
110 [PMN3] = 0x10 },
111 .cnt_ovf = { [CCNT] = 0x01, [PMN0] = 0x02,
112 [PMN1] = 0x04, [PMN2] = 0x08,
113 [PMN3] = 0x10 },
114 },
115};
116
117static struct pmu_type *pmu;
118
119static void write_pmnc(u32 val)
120{
121 if (pmu->id == PMU_XSC1) {
122 /* upper 4bits and 7, 11 are write-as-0 */
123 val &= 0xffff77f;
124 __asm__ __volatile__ ("mcr p14, 0, %0, c0, c0, 0" : : "r" (val));
125 } else {
126 /* bits 4-23 are write-as-0, 24-31 are write ignored */
127 val &= 0xf;
128 __asm__ __volatile__ ("mcr p14, 0, %0, c0, c1, 0" : : "r" (val));
129 }
130}
131
132static u32 read_pmnc(void)
133{
134 u32 val;
135
136 if (pmu->id == PMU_XSC1)
137 __asm__ __volatile__ ("mrc p14, 0, %0, c0, c0, 0" : "=r" (val));
138 else {
139 __asm__ __volatile__ ("mrc p14, 0, %0, c0, c1, 0" : "=r" (val));
140 /* bits 1-2 and 4-23 are read-unpredictable */
141 val &= 0xff000009;
142 }
143
144 return val;
145}
146
147static u32 __xsc1_read_counter(int counter)
148{
149 u32 val = 0;
150
151 switch (counter) {
152 case CCNT:
153 __asm__ __volatile__ ("mrc p14, 0, %0, c1, c0, 0" : "=r" (val));
154 break;
155 case PMN0:
156 __asm__ __volatile__ ("mrc p14, 0, %0, c2, c0, 0" : "=r" (val));
157 break;
158 case PMN1:
159 __asm__ __volatile__ ("mrc p14, 0, %0, c3, c0, 0" : "=r" (val));
160 break;
161 }
162 return val;
163}
164
165static u32 __xsc2_read_counter(int counter)
166{
167 u32 val = 0;
168
169 switch (counter) {
170 case CCNT:
171 __asm__ __volatile__ ("mrc p14, 0, %0, c1, c1, 0" : "=r" (val));
172 break;
173 case PMN0:
174 __asm__ __volatile__ ("mrc p14, 0, %0, c0, c2, 0" : "=r" (val));
175 break;
176 case PMN1:
177 __asm__ __volatile__ ("mrc p14, 0, %0, c1, c2, 0" : "=r" (val));
178 break;
179 case PMN2:
180 __asm__ __volatile__ ("mrc p14, 0, %0, c2, c2, 0" : "=r" (val));
181 break;
182 case PMN3:
183 __asm__ __volatile__ ("mrc p14, 0, %0, c3, c2, 0" : "=r" (val));
184 break;
185 }
186 return val;
187}
188
189static u32 read_counter(int counter)
190{
191 u32 val;
192
193 if (pmu->id == PMU_XSC1)
194 val = __xsc1_read_counter(counter);
195 else
196 val = __xsc2_read_counter(counter);
197
198 return val;
199}
200
201static void __xsc1_write_counter(int counter, u32 val)
202{
203 switch (counter) {
204 case CCNT:
205 __asm__ __volatile__ ("mcr p14, 0, %0, c1, c0, 0" : : "r" (val));
206 break;
207 case PMN0:
208 __asm__ __volatile__ ("mcr p14, 0, %0, c2, c0, 0" : : "r" (val));
209 break;
210 case PMN1:
211 __asm__ __volatile__ ("mcr p14, 0, %0, c3, c0, 0" : : "r" (val));
212 break;
213 }
214}
215
216static void __xsc2_write_counter(int counter, u32 val)
217{
218 switch (counter) {
219 case CCNT:
220 __asm__ __volatile__ ("mcr p14, 0, %0, c1, c1, 0" : : "r" (val));
221 break;
222 case PMN0:
223 __asm__ __volatile__ ("mcr p14, 0, %0, c0, c2, 0" : : "r" (val));
224 break;
225 case PMN1:
226 __asm__ __volatile__ ("mcr p14, 0, %0, c1, c2, 0" : : "r" (val));
227 break;
228 case PMN2:
229 __asm__ __volatile__ ("mcr p14, 0, %0, c2, c2, 0" : : "r" (val));
230 break;
231 case PMN3:
232 __asm__ __volatile__ ("mcr p14, 0, %0, c3, c2, 0" : : "r" (val));
233 break;
234 }
235}
236
237static void write_counter(int counter, u32 val)
238{
239 if (pmu->id == PMU_XSC1)
240 __xsc1_write_counter(counter, val);
241 else
242 __xsc2_write_counter(counter, val);
243}
244
245static int xscale_setup_ctrs(void)
246{
247 u32 evtsel, pmnc;
248 int i;
249
250 for (i = CCNT; i < MAX_COUNTERS; i++) {
251 if (counter_config[i].enabled)
252 continue;
253
254 counter_config[i].event = EVT_UNUSED;
255 }
256
257 switch (pmu->id) {
258 case PMU_XSC1:
259 pmnc = (counter_config[PMN1].event << 20) | (counter_config[PMN0].event << 12);
260 pr_debug("xscale_setup_ctrs: pmnc: %#08x\n", pmnc);
261 write_pmnc(pmnc);
262 break;
263
264 case PMU_XSC2:
265 evtsel = counter_config[PMN0].event | (counter_config[PMN1].event << 8) |
266 (counter_config[PMN2].event << 16) | (counter_config[PMN3].event << 24);
267
268 pr_debug("xscale_setup_ctrs: evtsel %#08x\n", evtsel);
269 __asm__ __volatile__ ("mcr p14, 0, %0, c8, c1, 0" : : "r" (evtsel));
270 break;
271 }
272
273 for (i = CCNT; i < MAX_COUNTERS; i++) {
274 if (counter_config[i].event == EVT_UNUSED) {
275 counter_config[i].event = 0;
276 pmu->int_enable &= ~pmu->int_mask[i];
277 continue;
278 }
279
280 results[i].reset_counter = counter_config[i].count;
281 write_counter(i, -(u32)counter_config[i].count);
282 pmu->int_enable |= pmu->int_mask[i];
283 pr_debug("xscale_setup_ctrs: counter%d %#08x from %#08lx\n", i,
284 read_counter(i), counter_config[i].count);
285 }
286
287 return 0;
288}
289
290static void inline __xsc1_check_ctrs(void)
291{
292 int i;
293 u32 pmnc = read_pmnc();
294
295 /* NOTE: there's an A stepping errata that states if an overflow */
296 /* bit already exists and another occurs, the previous */
297 /* Overflow bit gets cleared. There's no workaround. */
298 /* Fixed in B stepping or later */
299
300 /* Write the value back to clear the overflow flags. Overflow */
301 /* flags remain in pmnc for use below */
302 write_pmnc(pmnc & ~PMU_ENABLE);
303
304 for (i = CCNT; i <= PMN1; i++) {
305 if (!(pmu->int_mask[i] & pmu->int_enable))
306 continue;
307
308 if (pmnc & pmu->cnt_ovf[i])
309 results[i].ovf++;
310 }
311}
312
313static void inline __xsc2_check_ctrs(void)
314{
315 int i;
316 u32 flag = 0, pmnc = read_pmnc();
317
318 pmnc &= ~PMU_ENABLE;
319 write_pmnc(pmnc);
320
321 /* read overflow flag register */
322 __asm__ __volatile__ ("mrc p14, 0, %0, c5, c1, 0" : "=r" (flag));
323
324 for (i = CCNT; i <= PMN3; i++) {
325 if (!(pmu->int_mask[i] & pmu->int_enable))
326 continue;
327
328 if (flag & pmu->cnt_ovf[i])
329 results[i].ovf++;
330 }
331
332 /* writeback clears overflow bits */
333 __asm__ __volatile__ ("mcr p14, 0, %0, c5, c1, 0" : : "r" (flag));
334}
335
336static irqreturn_t xscale_pmu_interrupt(int irq, void *arg)
337{
338 int i;
339 u32 pmnc;
340
341 if (pmu->id == PMU_XSC1)
342 __xsc1_check_ctrs();
343 else
344 __xsc2_check_ctrs();
345
346 for (i = CCNT; i < MAX_COUNTERS; i++) {
347 if (!results[i].ovf)
348 continue;
349
350 write_counter(i, -(u32)results[i].reset_counter);
351 oprofile_add_sample(get_irq_regs(), i);
352 results[i].ovf--;
353 }
354
355 pmnc = read_pmnc() | PMU_ENABLE;
356 write_pmnc(pmnc);
357
358 return IRQ_HANDLED;
359}
360
361static const struct pmu_irqs *pmu_irqs;
362
363static void xscale_pmu_stop(void)
364{
365 u32 pmnc = read_pmnc();
366
367 pmnc &= ~PMU_ENABLE;
368 write_pmnc(pmnc);
369
370 free_irq(pmu_irqs->irqs[0], results);
371 release_pmu(pmu_irqs);
372 pmu_irqs = NULL;
373}
374
375static int xscale_pmu_start(void)
376{
377 int ret;
378 u32 pmnc;
379
380 pmu_irqs = reserve_pmu();
381 if (IS_ERR(pmu_irqs))
382 return PTR_ERR(pmu_irqs);
383
384 pmnc = read_pmnc();
385
386 ret = request_irq(pmu_irqs->irqs[0], xscale_pmu_interrupt,
387 IRQF_DISABLED, "XScale PMU", (void *)results);
388
389 if (ret < 0) {
390 printk(KERN_ERR "oprofile: unable to request IRQ%d for XScale PMU\n",
391 pmu_irqs->irqs[0]);
392 release_pmu(pmu_irqs);
393 pmu_irqs = NULL;
394 return ret;
395 }
396
397 if (pmu->id == PMU_XSC1)
398 pmnc |= pmu->int_enable;
399 else {
400 __asm__ __volatile__ ("mcr p14, 0, %0, c4, c1, 0" : : "r" (pmu->int_enable));
401 pmnc &= ~PMU_CNT64;
402 }
403
404 pmnc |= PMU_ENABLE;
405 write_pmnc(pmnc);
406 pr_debug("xscale_pmu_start: pmnc: %#08x mask: %08x\n", pmnc, pmu->int_enable);
407 return 0;
408}
409
410static int xscale_detect_pmu(void)
411{
412 int ret = 0;
413 u32 id;
414
415 id = (read_cpuid(CPUID_ID) >> 13) & 0x7;
416
417 switch (id) {
418 case 1:
419 pmu = &pmu_parms[PMU_XSC1];
420 break;
421 case 2:
422 pmu = &pmu_parms[PMU_XSC2];
423 break;
424 default:
425 ret = -ENODEV;
426 break;
427 }
428
429 if (!ret) {
430 op_xscale_spec.name = pmu->name;
431 op_xscale_spec.num_counters = pmu->num_counters;
432 pr_debug("xscale_detect_pmu: detected %s PMU\n", pmu->name);
433 }
434
435 return ret;
436}
437
438struct op_arm_model_spec op_xscale_spec = {
439 .init = xscale_detect_pmu,
440 .setup_ctrs = xscale_setup_ctrs,
441 .start = xscale_pmu_start,
442 .stop = xscale_pmu_stop,
443};
444
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 36bff0325959..69b09c1cec8b 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_IOP32X) += time.o
13obj-$(CONFIG_ARCH_IOP32X) += io.o 13obj-$(CONFIG_ARCH_IOP32X) += io.o
14obj-$(CONFIG_ARCH_IOP32X) += cp6.o 14obj-$(CONFIG_ARCH_IOP32X) += cp6.o
15obj-$(CONFIG_ARCH_IOP32X) += adma.o 15obj-$(CONFIG_ARCH_IOP32X) += adma.o
16obj-$(CONFIG_ARCH_IOP32X) += pmu.o
16 17
17# IOP33X 18# IOP33X
18obj-$(CONFIG_ARCH_IOP33X) += gpio.o 19obj-$(CONFIG_ARCH_IOP33X) += gpio.o
@@ -23,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += time.o
23obj-$(CONFIG_ARCH_IOP33X) += io.o 24obj-$(CONFIG_ARCH_IOP33X) += io.o
24obj-$(CONFIG_ARCH_IOP33X) += cp6.o 25obj-$(CONFIG_ARCH_IOP33X) += cp6.o
25obj-$(CONFIG_ARCH_IOP33X) += adma.o 26obj-$(CONFIG_ARCH_IOP33X) += adma.o
27obj-$(CONFIG_ARCH_IOP33X) += pmu.o
26 28
27# IOP13XX 29# IOP13XX
28obj-$(CONFIG_ARCH_IOP13XX) += cp6.o 30obj-$(CONFIG_ARCH_IOP13XX) += cp6.o
diff --git a/arch/arm/plat-iop/pmu.c b/arch/arm/plat-iop/pmu.c
new file mode 100644
index 000000000000..a2024b8685a1
--- /dev/null
+++ b/arch/arm/plat-iop/pmu.c
@@ -0,0 +1,40 @@
1/*
2 * PMU IRQ registration for the iop3xx xscale PMU families.
3 * Copyright (C) 2010 Will Deacon, ARM Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 */
10
11#include <linux/platform_device.h>
12#include <asm/pmu.h>
13#include <mach/irqs.h>
14
15static struct resource pmu_resource = {
16#ifdef CONFIG_ARCH_IOP32X
17 .start = IRQ_IOP32X_CORE_PMU,
18 .end = IRQ_IOP32X_CORE_PMU,
19#endif
20#ifdef CONFIG_ARCH_IOP33X
21 .start = IRQ_IOP33X_CORE_PMU,
22 .end = IRQ_IOP33X_CORE_PMU,
23#endif
24 .flags = IORESOURCE_IRQ,
25};
26
27static struct platform_device pmu_device = {
28 .name = "arm-pmu",
29 .id = ARM_PMU_DEVICE_CPU,
30 .resource = &pmu_resource,
31 .num_resources = 1,
32};
33
34static int __init iop3xx_pmu_init(void)
35{
36 platform_device_register(&pmu_device);
37 return 0;
38}
39
40arch_initcall(iop3xx_pmu_init);
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
index 159daf583f85..5da3f97c537b 100644
--- a/arch/arm/plat-nomadik/Kconfig
+++ b/arch/arm/plat-nomadik/Kconfig
@@ -19,4 +19,9 @@ config HAS_MTU
19 to multiple interrupt generating programmable 19 to multiple interrupt generating programmable
20 32-bit free running decrementing counters. 20 32-bit free running decrementing counters.
21 21
22config NOMADIK_GPIO
23 bool
24 help
25 Support for the Nomadik GPIO controller.
26
22endif 27endif
diff --git a/arch/arm/plat-nomadik/Makefile b/arch/arm/plat-nomadik/Makefile
index 37c7cdd0f8f0..c33547361bd7 100644
--- a/arch/arm/plat-nomadik/Makefile
+++ b/arch/arm/plat-nomadik/Makefile
@@ -3,3 +3,4 @@
3# Licensed under GPLv2 3# Licensed under GPLv2
4 4
5obj-$(CONFIG_HAS_MTU) += timer.o 5obj-$(CONFIG_HAS_MTU) += timer.o
6obj-$(CONFIG_NOMADIK_GPIO) += gpio.o
diff --git a/arch/arm/mach-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index 66b1c91ccc74..5a6ef252c38b 100644
--- a/arch/arm/mach-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -13,8 +13,10 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/amba/bus.h> 16#include <linux/platform_device.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/clk.h>
19#include <linux/err.h>
18#include <linux/gpio.h> 20#include <linux/gpio.h>
19#include <linux/spinlock.h> 21#include <linux/spinlock.h>
20#include <linux/interrupt.h> 22#include <linux/interrupt.h>
@@ -36,8 +38,9 @@
36struct nmk_gpio_chip { 38struct nmk_gpio_chip {
37 struct gpio_chip chip; 39 struct gpio_chip chip;
38 void __iomem *addr; 40 void __iomem *addr;
41 struct clk *clk;
39 unsigned int parent_irq; 42 unsigned int parent_irq;
40 spinlock_t *lock; 43 spinlock_t lock;
41 /* Keep track of configured edges */ 44 /* Keep track of configured edges */
42 u32 edge_rising; 45 u32 edge_rising;
43 u32 edge_falling; 46 u32 edge_falling;
@@ -108,40 +111,37 @@ static void nmk_gpio_irq_ack(unsigned int irq)
108 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC); 111 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
109} 112}
110 113
111static void nmk_gpio_irq_mask(unsigned int irq) 114static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
115 int gpio, bool enable)
112{ 116{
113 int gpio; 117 u32 bitmask = nmk_gpio_get_bitmask(gpio);
114 struct nmk_gpio_chip *nmk_chip; 118 u32 reg;
115 unsigned long flags;
116 u32 bitmask, reg;
117
118 gpio = NOMADIK_IRQ_TO_GPIO(irq);
119 nmk_chip = get_irq_chip_data(irq);
120 bitmask = nmk_gpio_get_bitmask(gpio);
121 if (!nmk_chip)
122 return;
123 119
124 /* we must individually clear the two edges */ 120 /* we must individually set/clear the two edges */
125 spin_lock_irqsave(&nmk_chip->lock, flags);
126 if (nmk_chip->edge_rising & bitmask) { 121 if (nmk_chip->edge_rising & bitmask) {
127 reg = readl(nmk_chip->addr + NMK_GPIO_RWIMSC); 122 reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC);
128 reg &= ~bitmask; 123 if (enable)
129 writel(reg, nmk_chip->addr + NMK_GPIO_RWIMSC); 124 reg |= bitmask;
125 else
126 reg &= ~bitmask;
127 writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC);
130 } 128 }
131 if (nmk_chip->edge_falling & bitmask) { 129 if (nmk_chip->edge_falling & bitmask) {
132 reg = readl(nmk_chip->addr + NMK_GPIO_FWIMSC); 130 reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC);
133 reg &= ~bitmask; 131 if (enable)
134 writel(reg, nmk_chip->addr + NMK_GPIO_FWIMSC); 132 reg |= bitmask;
133 else
134 reg &= ~bitmask;
135 writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC);
135 } 136 }
136 spin_unlock_irqrestore(&nmk_chip->lock, flags); 137}
137};
138 138
139static void nmk_gpio_irq_unmask(unsigned int irq) 139static void nmk_gpio_irq_modify(unsigned int irq, bool enable)
140{ 140{
141 int gpio; 141 int gpio;
142 struct nmk_gpio_chip *nmk_chip; 142 struct nmk_gpio_chip *nmk_chip;
143 unsigned long flags; 143 unsigned long flags;
144 u32 bitmask, reg; 144 u32 bitmask;
145 145
146 gpio = NOMADIK_IRQ_TO_GPIO(irq); 146 gpio = NOMADIK_IRQ_TO_GPIO(irq);
147 nmk_chip = get_irq_chip_data(irq); 147 nmk_chip = get_irq_chip_data(irq);
@@ -149,23 +149,24 @@ static void nmk_gpio_irq_unmask(unsigned int irq)
149 if (!nmk_chip) 149 if (!nmk_chip)
150 return; 150 return;
151 151
152 /* we must individually set the two edges */
153 spin_lock_irqsave(&nmk_chip->lock, flags); 152 spin_lock_irqsave(&nmk_chip->lock, flags);
154 if (nmk_chip->edge_rising & bitmask) { 153 __nmk_gpio_irq_modify(nmk_chip, gpio, enable);
155 reg = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
156 reg |= bitmask;
157 writel(reg, nmk_chip->addr + NMK_GPIO_RWIMSC);
158 }
159 if (nmk_chip->edge_falling & bitmask) {
160 reg = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
161 reg |= bitmask;
162 writel(reg, nmk_chip->addr + NMK_GPIO_FWIMSC);
163 }
164 spin_unlock_irqrestore(&nmk_chip->lock, flags); 154 spin_unlock_irqrestore(&nmk_chip->lock, flags);
165} 155}
166 156
157static void nmk_gpio_irq_mask(unsigned int irq)
158{
159 nmk_gpio_irq_modify(irq, false);
160};
161
162static void nmk_gpio_irq_unmask(unsigned int irq)
163{
164 nmk_gpio_irq_modify(irq, true);
165}
166
167static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) 167static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
168{ 168{
169 bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
169 int gpio; 170 int gpio;
170 struct nmk_gpio_chip *nmk_chip; 171 struct nmk_gpio_chip *nmk_chip;
171 unsigned long flags; 172 unsigned long flags;
@@ -184,19 +185,21 @@ static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
184 185
185 spin_lock_irqsave(&nmk_chip->lock, flags); 186 spin_lock_irqsave(&nmk_chip->lock, flags);
186 187
188 if (enabled)
189 __nmk_gpio_irq_modify(nmk_chip, gpio, false);
190
187 nmk_chip->edge_rising &= ~bitmask; 191 nmk_chip->edge_rising &= ~bitmask;
188 if (type & IRQ_TYPE_EDGE_RISING) 192 if (type & IRQ_TYPE_EDGE_RISING)
189 nmk_chip->edge_rising |= bitmask; 193 nmk_chip->edge_rising |= bitmask;
190 writel(nmk_chip->edge_rising, nmk_chip->addr + NMK_GPIO_RIMSC);
191 194
192 nmk_chip->edge_falling &= ~bitmask; 195 nmk_chip->edge_falling &= ~bitmask;
193 if (type & IRQ_TYPE_EDGE_FALLING) 196 if (type & IRQ_TYPE_EDGE_FALLING)
194 nmk_chip->edge_falling |= bitmask; 197 nmk_chip->edge_falling |= bitmask;
195 writel(nmk_chip->edge_falling, nmk_chip->addr + NMK_GPIO_FIMSC);
196 198
197 spin_unlock_irqrestore(&nmk_chip->lock, flags); 199 if (enabled)
200 __nmk_gpio_irq_modify(nmk_chip, gpio, true);
198 201
199 nmk_gpio_irq_unmask(irq); 202 spin_unlock_irqrestore(&nmk_chip->lock, flags);
200 203
201 return 0; 204 return 0;
202} 205}
@@ -212,21 +215,27 @@ static struct irq_chip nmk_gpio_irq_chip = {
212static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 215static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
213{ 216{
214 struct nmk_gpio_chip *nmk_chip; 217 struct nmk_gpio_chip *nmk_chip;
215 struct irq_chip *host_chip; 218 struct irq_chip *host_chip = get_irq_chip(irq);
216 unsigned int gpio_irq; 219 unsigned int gpio_irq;
217 u32 pending; 220 u32 pending;
218 unsigned int first_irq; 221 unsigned int first_irq;
219 222
223 if (host_chip->mask_ack)
224 host_chip->mask_ack(irq);
225 else {
226 host_chip->mask(irq);
227 if (host_chip->ack)
228 host_chip->ack(irq);
229 }
230
220 nmk_chip = get_irq_data(irq); 231 nmk_chip = get_irq_data(irq);
221 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); 232 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
222 while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) { 233 while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
223 gpio_irq = first_irq + __ffs(pending); 234 gpio_irq = first_irq + __ffs(pending);
224 generic_handle_irq(gpio_irq); 235 generic_handle_irq(gpio_irq);
225 } 236 }
226 if (0) {/* don't ack parent irq, as ack == disable */ 237
227 host_chip = get_irq_chip(irq); 238 host_chip->unmask(irq);
228 host_chip->ack(irq);
229 }
230} 239}
231 240
232static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) 241static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
@@ -240,6 +249,7 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
240 set_irq_handler(i, handle_edge_irq); 249 set_irq_handler(i, handle_edge_irq);
241 set_irq_flags(i, IRQF_VALID); 250 set_irq_flags(i, IRQF_VALID);
242 set_irq_chip_data(i, nmk_chip); 251 set_irq_chip_data(i, nmk_chip);
252 set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
243 } 253 }
244 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); 254 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
245 set_irq_data(nmk_chip->parent_irq, nmk_chip); 255 set_irq_data(nmk_chip->parent_irq, nmk_chip);
@@ -298,30 +308,59 @@ static struct gpio_chip nmk_gpio_template = {
298 .can_sleep = 0, 308 .can_sleep = 0,
299}; 309};
300 310
301static int __init nmk_gpio_probe(struct amba_device *dev, struct amba_id *id) 311static int __init nmk_gpio_probe(struct platform_device *dev)
302{ 312{
303 struct nmk_gpio_platform_data *pdata; 313 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
304 struct nmk_gpio_chip *nmk_chip; 314 struct nmk_gpio_chip *nmk_chip;
305 struct gpio_chip *chip; 315 struct gpio_chip *chip;
316 struct resource *res;
317 struct clk *clk;
318 int irq;
306 int ret; 319 int ret;
307 320
308 pdata = dev->dev.platform_data; 321 if (!pdata)
309 ret = amba_request_regions(dev, pdata->name); 322 return -ENODEV;
310 if (ret) 323
311 return ret; 324 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
325 if (!res) {
326 ret = -ENOENT;
327 goto out;
328 }
329
330 irq = platform_get_irq(dev, 0);
331 if (irq < 0) {
332 ret = irq;
333 goto out;
334 }
335
336 if (request_mem_region(res->start, resource_size(res),
337 dev_name(&dev->dev)) == NULL) {
338 ret = -EBUSY;
339 goto out;
340 }
341
342 clk = clk_get(&dev->dev, NULL);
343 if (IS_ERR(clk)) {
344 ret = PTR_ERR(clk);
345 goto out_release;
346 }
347
348 clk_enable(clk);
312 349
313 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL); 350 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
314 if (!nmk_chip) { 351 if (!nmk_chip) {
315 ret = -ENOMEM; 352 ret = -ENOMEM;
316 goto out_amba; 353 goto out_clk;
317 } 354 }
318 /* 355 /*
319 * The virt address in nmk_chip->addr is in the nomadik register space, 356 * The virt address in nmk_chip->addr is in the nomadik register space,
320 * so we can simply convert the resource address, without remapping 357 * so we can simply convert the resource address, without remapping
321 */ 358 */
322 nmk_chip->addr = io_p2v(dev->res.start); 359 nmk_chip->clk = clk;
360 nmk_chip->addr = io_p2v(res->start);
323 nmk_chip->chip = nmk_gpio_template; 361 nmk_chip->chip = nmk_gpio_template;
324 nmk_chip->parent_irq = pdata->parent_irq; 362 nmk_chip->parent_irq = irq;
363 spin_lock_init(&nmk_chip->lock);
325 364
326 chip = &nmk_chip->chip; 365 chip = &nmk_chip->chip;
327 chip->base = pdata->first_gpio; 366 chip->base = pdata->first_gpio;
@@ -333,7 +372,7 @@ static int __init nmk_gpio_probe(struct amba_device *dev, struct amba_id *id)
333 if (ret) 372 if (ret)
334 goto out_free; 373 goto out_free;
335 374
336 amba_set_drvdata(dev, nmk_chip); 375 platform_set_drvdata(dev, nmk_chip);
337 376
338 nmk_gpio_init_irq(nmk_chip); 377 nmk_gpio_init_irq(nmk_chip);
339 378
@@ -341,51 +380,50 @@ static int __init nmk_gpio_probe(struct amba_device *dev, struct amba_id *id)
341 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr); 380 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
342 return 0; 381 return 0;
343 382
344 out_free: 383out_free:
345 kfree(nmk_chip); 384 kfree(nmk_chip);
346 out_amba: 385out_clk:
347 amba_release_regions(dev); 386 clk_disable(clk);
387 clk_put(clk);
388out_release:
389 release_mem_region(res->start, resource_size(res));
390out:
348 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret, 391 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
349 pdata->first_gpio, pdata->first_gpio+31); 392 pdata->first_gpio, pdata->first_gpio+31);
350 return ret; 393 return ret;
351} 394}
352 395
353static int nmk_gpio_remove(struct amba_device *dev) 396static int __exit nmk_gpio_remove(struct platform_device *dev)
354{ 397{
355 struct nmk_gpio_chip *nmk_chip; 398 struct nmk_gpio_chip *nmk_chip;
399 struct resource *res;
356 400
357 nmk_chip = amba_get_drvdata(dev); 401 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
402
403 nmk_chip = platform_get_drvdata(dev);
358 gpiochip_remove(&nmk_chip->chip); 404 gpiochip_remove(&nmk_chip->chip);
405 clk_disable(nmk_chip->clk);
406 clk_put(nmk_chip->clk);
359 kfree(nmk_chip); 407 kfree(nmk_chip);
360 amba_release_regions(dev); 408 release_mem_region(res->start, resource_size(res));
361 return 0; 409 return 0;
362} 410}
363 411
364 412
365/* We have 0x1f080060 and 0x1f180060, accept both using the mask */ 413static struct platform_driver nmk_gpio_driver = {
366static struct amba_id nmk_gpio_ids[] = { 414 .driver = {
367 {
368 .id = 0x1f080060,
369 .mask = 0xffefffff,
370 },
371 {0, 0},
372};
373
374static struct amba_driver nmk_gpio_driver = {
375 .drv = {
376 .owner = THIS_MODULE, 415 .owner = THIS_MODULE,
377 .name = "gpio", 416 .name = "gpio",
378 }, 417 },
379 .probe = nmk_gpio_probe, 418 .probe = nmk_gpio_probe,
380 .remove = nmk_gpio_remove, 419 .remove = __exit_p(nmk_gpio_remove),
381 .suspend = NULL, /* to be done */ 420 .suspend = NULL, /* to be done */
382 .resume = NULL, 421 .resume = NULL,
383 .id_table = nmk_gpio_ids,
384}; 422};
385 423
386static int __init nmk_gpio_init(void) 424static int __init nmk_gpio_init(void)
387{ 425{
388 return amba_driver_register(&nmk_gpio_driver); 426 return platform_driver_register(&nmk_gpio_driver);
389} 427}
390 428
391arch_initcall(nmk_gpio_init); 429arch_initcall(nmk_gpio_init);
diff --git a/arch/arm/plat-nomadik/include/plat/gpio.h b/arch/arm/plat-nomadik/include/plat/gpio.h
new file mode 100644
index 000000000000..4200811249ca
--- /dev/null
+++ b/arch/arm/plat-nomadik/include/plat/gpio.h
@@ -0,0 +1,70 @@
1/*
2 * Structures and registers for GPIO access in the Nomadik SoC
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 * Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
6 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef __ASM_PLAT_GPIO_H
13#define __ASM_PLAT_GPIO_H
14
15#include <asm-generic/gpio.h>
16
17/*
18 * These currently cause a function call to happen, they may be optimized
19 * if needed by adding cpu-specific defines to identify blocks
20 * (see mach-pxa/include/mach/gpio.h as an example using GPLR etc)
21 */
22#define gpio_get_value __gpio_get_value
23#define gpio_set_value __gpio_set_value
24#define gpio_cansleep __gpio_cansleep
25#define gpio_to_irq __gpio_to_irq
26
27/*
28 * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
29 * the "gpio" namespace for generic and cross-machine functions
30 */
31
32/* Register in the logic block */
33#define NMK_GPIO_DAT 0x00
34#define NMK_GPIO_DATS 0x04
35#define NMK_GPIO_DATC 0x08
36#define NMK_GPIO_PDIS 0x0c
37#define NMK_GPIO_DIR 0x10
38#define NMK_GPIO_DIRS 0x14
39#define NMK_GPIO_DIRC 0x18
40#define NMK_GPIO_SLPC 0x1c
41#define NMK_GPIO_AFSLA 0x20
42#define NMK_GPIO_AFSLB 0x24
43
44#define NMK_GPIO_RIMSC 0x40
45#define NMK_GPIO_FIMSC 0x44
46#define NMK_GPIO_IS 0x48
47#define NMK_GPIO_IC 0x4c
48#define NMK_GPIO_RWIMSC 0x50
49#define NMK_GPIO_FWIMSC 0x54
50#define NMK_GPIO_WKS 0x58
51
52/* Alternate functions: function C is set in hw by setting both A and B */
53#define NMK_GPIO_ALT_GPIO 0
54#define NMK_GPIO_ALT_A 1
55#define NMK_GPIO_ALT_B 2
56#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
57
58extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
59extern int nmk_gpio_get_mode(int gpio);
60
61/*
62 * Platform data to register a block: only the initial gpio/irq number.
63 */
64struct nmk_gpio_platform_data {
65 char *name;
66 int first_gpio;
67 int first_irq;
68};
69
70#endif /* __ASM_PLAT_GPIO_H */
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index fa7cb3a57cbf..0ff3798769ab 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -2,7 +2,7 @@
2 * linux/arch/arm/mach-nomadik/timer.c 2 * linux/arch/arm/mach-nomadik/timer.c
3 * 3 *
4 * Copyright (C) 2008 STMicroelectronics 4 * Copyright (C) 2008 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini, somewhat based on at91sam926x 5 * Copyright (C) 2010 Alessandro Rubini
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2, as 8 * it under the terms of the GNU General Public License version 2, as
@@ -18,123 +18,150 @@
18 18
19#include <plat/mtu.h> 19#include <plat/mtu.h>
20 20
21static u32 nmdk_count; /* accumulated count */ 21void __iomem *mtu_base; /* ssigned by machine code */
22static u32 nmdk_cycle; /* write-once */
23
24/* setup by the platform code */
25void __iomem *mtu_base;
26 22
27/* 23/*
28 * clocksource: the MTU device is a decrementing counters, so we negate 24 * Kernel assumes that sched_clock can be called early
29 * the value being read. 25 * but the MTU may not yet be initialized.
30 */ 26 */
31static cycle_t nmdk_read_timer(struct clocksource *cs) 27static cycle_t nmdk_read_timer_dummy(struct clocksource *cs)
32{ 28{
33 u32 count = readl(mtu_base + MTU_VAL(0)); 29 return 0;
34 return nmdk_count + nmdk_cycle - count; 30}
35 31
32/* clocksource: MTU decrements, so we negate the value being read. */
33static cycle_t nmdk_read_timer(struct clocksource *cs)
34{
35 return -readl(mtu_base + MTU_VAL(0));
36} 36}
37 37
38static struct clocksource nmdk_clksrc = { 38static struct clocksource nmdk_clksrc = {
39 .name = "mtu_0", 39 .name = "mtu_0",
40 .rating = 120, 40 .rating = 200,
41 .read = nmdk_read_timer, 41 .read = nmdk_read_timer_dummy,
42 .mask = CLOCKSOURCE_MASK(32),
42 .shift = 20, 43 .shift = 20,
43 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 44 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
44}; 45};
45 46
46/* 47/*
47 * Clockevent device: currently only periodic mode is supported 48 * Override the global weak sched_clock symbol with this
49 * local implementation which uses the clocksource to get some
50 * better resolution when scheduling the kernel. We accept that
51 * this wraps around for now, since it is just a relative time
52 * stamp. (Inspired by OMAP implementation.)
48 */ 53 */
54unsigned long long notrace sched_clock(void)
55{
56 return clocksource_cyc2ns(nmdk_clksrc.read(
57 &nmdk_clksrc),
58 nmdk_clksrc.mult,
59 nmdk_clksrc.shift);
60}
61
62/* Clockevent device: use one-shot mode */
49static void nmdk_clkevt_mode(enum clock_event_mode mode, 63static void nmdk_clkevt_mode(enum clock_event_mode mode,
50 struct clock_event_device *dev) 64 struct clock_event_device *dev)
51{ 65{
66 u32 cr;
67
52 switch (mode) { 68 switch (mode) {
53 case CLOCK_EVT_MODE_PERIODIC: 69 case CLOCK_EVT_MODE_PERIODIC:
54 /* count current value? */ 70 pr_err("%s: periodic mode not supported\n", __func__);
55 writel(readl(mtu_base + MTU_IMSC) | 1, mtu_base + MTU_IMSC);
56 break; 71 break;
57 case CLOCK_EVT_MODE_ONESHOT: 72 case CLOCK_EVT_MODE_ONESHOT:
58 BUG(); /* Not supported, yet */ 73 /* Load highest value, enable device, enable interrupts */
59 /* FALLTHROUGH */ 74 cr = readl(mtu_base + MTU_CR(1));
75 writel(0, mtu_base + MTU_LR(1));
76 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1));
77 writel(0x2, mtu_base + MTU_IMSC);
78 break;
60 case CLOCK_EVT_MODE_SHUTDOWN: 79 case CLOCK_EVT_MODE_SHUTDOWN:
61 case CLOCK_EVT_MODE_UNUSED: 80 case CLOCK_EVT_MODE_UNUSED:
62 writel(readl(mtu_base + MTU_IMSC) & ~1, mtu_base + MTU_IMSC); 81 /* disable irq */
82 writel(0, mtu_base + MTU_IMSC);
63 break; 83 break;
64 case CLOCK_EVT_MODE_RESUME: 84 case CLOCK_EVT_MODE_RESUME:
65 break; 85 break;
66 } 86 }
67} 87}
68 88
89static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
90{
91 /* writing the value has immediate effect */
92 writel(evt, mtu_base + MTU_LR(1));
93 return 0;
94}
95
69static struct clock_event_device nmdk_clkevt = { 96static struct clock_event_device nmdk_clkevt = {
70 .name = "mtu_0", 97 .name = "mtu_1",
71 .features = CLOCK_EVT_FEAT_PERIODIC, 98 .features = CLOCK_EVT_FEAT_ONESHOT,
72 .shift = 32, 99 .shift = 32,
73 .rating = 100, 100 .rating = 200,
74 .set_mode = nmdk_clkevt_mode, 101 .set_mode = nmdk_clkevt_mode,
102 .set_next_event = nmdk_clkevt_next,
75}; 103};
76 104
77/* 105/*
78 * IRQ Handler for the timer 0 of the MTU block. The irq is not shared 106 * IRQ Handler for timer 1 of the MTU block.
79 * as we are the only users of mtu0 by now.
80 */ 107 */
81static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) 108static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id)
82{ 109{
83 /* ack: "interrupt clear register" */ 110 struct clock_event_device *evdev = dev_id;
84 writel(1 << 0, mtu_base + MTU_ICR);
85
86 /* we can't count lost ticks, unfortunately */
87 nmdk_count += nmdk_cycle;
88 nmdk_clkevt.event_handler(&nmdk_clkevt);
89 111
112 writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */
113 evdev->event_handler(evdev);
90 return IRQ_HANDLED; 114 return IRQ_HANDLED;
91} 115}
92 116
93/*
94 * Set up timer interrupt, and return the current time in seconds.
95 */
96static struct irqaction nmdk_timer_irq = { 117static struct irqaction nmdk_timer_irq = {
97 .name = "Nomadik Timer Tick", 118 .name = "Nomadik Timer Tick",
98 .flags = IRQF_DISABLED | IRQF_TIMER, 119 .flags = IRQF_DISABLED | IRQF_TIMER,
99 .handler = nmdk_timer_interrupt, 120 .handler = nmdk_timer_interrupt,
121 .dev_id = &nmdk_clkevt,
100}; 122};
101 123
102static void nmdk_timer_reset(void)
103{
104 u32 cr;
105
106 writel(0, mtu_base + MTU_CR(0)); /* off */
107
108 /* configure load and background-load, and fire it up */
109 writel(nmdk_cycle, mtu_base + MTU_LR(0));
110 writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
111 cr = MTU_CRn_PERIODIC | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS;
112 writel(cr, mtu_base + MTU_CR(0));
113 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
114}
115
116void __init nmdk_timer_init(void) 124void __init nmdk_timer_init(void)
117{ 125{
118 unsigned long rate; 126 unsigned long rate;
119 int bits; 127 u32 cr = MTU_CRn_32BITS;;
120 128
121 rate = CLOCK_TICK_RATE; /* 2.4MHz */ 129 /*
122 nmdk_cycle = (rate + HZ/2) / HZ; 130 * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500:
131 * use a divide-by-16 counter if it's more than 16MHz
132 */
133 rate = CLOCK_TICK_RATE;
134 if (rate > 16 << 20) {
135 rate /= 16;
136 cr |= MTU_CRn_PRESCALE_16;
137 } else {
138 cr |= MTU_CRn_PRESCALE_1;
139 }
123 140
124 /* Init the timer and register clocksource */ 141 /* Timer 0 is the free running clocksource */
125 nmdk_timer_reset(); 142 writel(cr, mtu_base + MTU_CR(0));
143 writel(0, mtu_base + MTU_LR(0));
144 writel(0, mtu_base + MTU_BGLR(0));
145 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
126 146
127 nmdk_clksrc.mult = clocksource_hz2mult(rate, nmdk_clksrc.shift); 147 nmdk_clksrc.mult = clocksource_hz2mult(rate, nmdk_clksrc.shift);
128 bits = 8*sizeof(nmdk_count); 148 /* Now the scheduling clock is ready */
129 nmdk_clksrc.mask = CLOCKSOURCE_MASK(bits); 149 nmdk_clksrc.read = nmdk_read_timer;
130 150
131 if (clocksource_register(&nmdk_clksrc)) 151 if (clocksource_register(&nmdk_clksrc))
132 printk(KERN_ERR "timer: failed to initialize clock " 152 pr_err("timer: failed to initialize clock source %s\n",
133 "source %s\n", nmdk_clksrc.name); 153 nmdk_clksrc.name);
154
155 /* Timer 1 is used for events, fix according to rate */
156 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
157 nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift);
158 nmdk_clkevt.max_delta_ns =
159 clockevent_delta2ns(0xffffffff, &nmdk_clkevt);
160 nmdk_clkevt.min_delta_ns =
161 clockevent_delta2ns(0x00000002, &nmdk_clkevt);
162 nmdk_clkevt.cpumask = cpumask_of(0);
134 163
135 /* Register irq and clockevents */ 164 /* Register irq and clockevents */
136 setup_irq(IRQ_MTU0, &nmdk_timer_irq); 165 setup_irq(IRQ_MTU0, &nmdk_timer_irq);
137 nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift);
138 nmdk_clkevt.cpumask = cpumask_of(0);
139 clockevents_register_device(&nmdk_clkevt); 166 clockevents_register_device(&nmdk_clkevt);
140} 167}
diff --git a/arch/arm/plat-pxa/Kconfig b/arch/arm/plat-pxa/Kconfig
index b158e98038ed..da53395a17c6 100644
--- a/arch/arm/plat-pxa/Kconfig
+++ b/arch/arm/plat-pxa/Kconfig
@@ -1,3 +1,8 @@
1if PLAT_PXA 1if PLAT_PXA
2 2
3config PXA_SSP
4 tristate
5 help
6 Enable support for PXA2xx SSP ports
7
3endif 8endif
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index 0264bfb0ca4f..6187edfbcb77 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -2,10 +2,11 @@
2# Makefile for code common across different PXA processor families 2# Makefile for code common across different PXA processor families
3# 3#
4 4
5obj-y := dma.o 5obj-y := dma.o pmu.o
6 6
7obj-$(CONFIG_GENERIC_GPIO) += gpio.o 7obj-$(CONFIG_GENERIC_GPIO) += gpio.o
8obj-$(CONFIG_PXA3xx) += mfp.o 8obj-$(CONFIG_PXA3xx) += mfp.o
9obj-$(CONFIG_ARCH_MMP) += mfp.o 9obj-$(CONFIG_ARCH_MMP) += mfp.o
10 10
11obj-$(CONFIG_HAVE_PWM) += pwm.o 11obj-$(CONFIG_HAVE_PWM) += pwm.o
12obj-$(CONFIG_PXA_SSP) += ssp.o
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 857a6839071c..9e604c80618f 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -316,6 +316,13 @@ enum {
316 MFP_PIN_PMIC_INT, 316 MFP_PIN_PMIC_INT,
317 MFP_PIN_RDY, 317 MFP_PIN_RDY,
318 318
319 /* additional pins on MMP2 */
320 MFP_PIN_TWSI1_SCL,
321 MFP_PIN_TWSI1_SDA,
322 MFP_PIN_TWSI4_SCL,
323 MFP_PIN_TWSI4_SDA,
324 MFP_PIN_CLK_REQ,
325
319 MFP_PIN_MAX, 326 MFP_PIN_MAX,
320}; 327};
321 328
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/plat-pxa/include/plat/ssp.h
index 6a2ed35acd59..fe43150690ed 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/plat-pxa/include/plat/ssp.h
@@ -1,5 +1,26 @@
1#ifndef __ASM_ARCH_REGS_SSP_H 1/*
2#define __ASM_ARCH_REGS_SSP_H 2 * ssp.h
3 *
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This driver supports the following PXA CPU/SSP ports:-
11 *
12 * PXA250 SSP
13 * PXA255 SSP, NSSP
14 * PXA26x SSP, NSSP, ASSP
15 * PXA27x SSP1, SSP2, SSP3
16 * PXA3xx SSP1, SSP2, SSP3, SSP4
17 */
18
19#ifndef __ASM_ARCH_SSP_H
20#define __ASM_ARCH_SSP_H
21
22#include <linux/list.h>
23#include <linux/io.h>
3 24
4/* 25/*
5 * SSP Serial Port Registers 26 * SSP Serial Port Registers
@@ -19,10 +40,7 @@
19#define SSRSA (0x34) /* SSP Rx Timeslot Active */ 40#define SSRSA (0x34) /* SSP Rx Timeslot Active */
20#define SSTSS (0x38) /* SSP Timeslot Status */ 41#define SSTSS (0x38) /* SSP Timeslot Status */
21#define SSACD (0x3C) /* SSP Audio Clock Divider */ 42#define SSACD (0x3C) /* SSP Audio Clock Divider */
22
23#if defined(CONFIG_PXA3xx)
24#define SSACDD (0x40) /* SSP Audio Clock Dither Divider */ 43#define SSACDD (0x40) /* SSP Audio Clock Dither Divider */
25#endif
26 44
27/* Common PXA2xx bits first */ 45/* Common PXA2xx bits first */
28#define SSCR0_DSS (0x0000000f) /* Data Size Select (mask) */ 46#define SSCR0_DSS (0x0000000f) /* Data Size Select (mask) */
@@ -33,29 +51,19 @@
33#define SSCR0_National (0x2 << 4) /* National Microwire */ 51#define SSCR0_National (0x2 << 4) /* National Microwire */
34#define SSCR0_ECS (1 << 6) /* External clock select */ 52#define SSCR0_ECS (1 << 6) /* External clock select */
35#define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */ 53#define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */
54#define SSCR0_SCR(x) ((x) << 8) /* Serial Clock Rate (mask) */
36 55
37#if defined(CONFIG_PXA25x) 56/* PXA27x, PXA3xx */
38#define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */
39#define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */
40#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
41#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */
42#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
43#endif
44
45#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
46#define SSCR0_EDSS (1 << 20) /* Extended data size select */ 57#define SSCR0_EDSS (1 << 20) /* Extended data size select */
47#define SSCR0_NCS (1 << 21) /* Network clock select */ 58#define SSCR0_NCS (1 << 21) /* Network clock select */
48#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ 59#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
49#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ 60#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
50#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ 61#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
51#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ 62#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
63#define SSCR0_FPCKE (1 << 29) /* FIFO packing enable */
52#define SSCR0_ACS (1 << 30) /* Audio clock select */ 64#define SSCR0_ACS (1 << 30) /* Audio clock select */
53#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ 65#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
54#endif
55 66
56#if defined(CONFIG_PXA3xx)
57#define SSCR0_FPCKE (1 << 29) /* FIFO packing enable */
58#endif
59 67
60#define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */ 68#define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */
61#define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ 69#define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */
@@ -75,10 +83,6 @@
75#define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */ 83#define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */
76#define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */ 84#define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */
77 85
78#define SSCR0_TIM (1 << 23) /* Transmit FIFO Under Run Interrupt Mask */
79#define SSCR0_RIM (1 << 22) /* Receive FIFO Over Run interrupt Mask */
80#define SSCR0_NCS (1 << 21) /* Network Clock Select */
81#define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */
82 86
83/* extra bits in PXA255, PXA26x and PXA27x SSP ports */ 87/* extra bits in PXA255, PXA26x and PXA27x SSP ports */
84#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ 88#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */
@@ -108,27 +112,75 @@
108#define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */ 112#define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */
109#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ 113#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */
110 114
111#if defined(CONFIG_PXA3xx)
112#define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */
113#define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */
114#endif
115 115
116#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */
117#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */
118#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */
119#define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */
120#define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */
121#define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */
122#define SSPSP_ETDS (1 << 3) /* End of Transfer data State */
123#define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */
124#define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */ 116#define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */
117#define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */
118#define SSPSP_ETDS (1 << 3) /* End of Transfer data State */
119#define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */
120#define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */
121#define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */
122#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */
123#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */
124#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */
125
126/* PXA3xx */
127#define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */
128#define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */
129#define SSPSP_TIMING_MASK (0x7f8001f0)
125 130
126#define SSACD_SCDB (1 << 3) /* SSPSYSCLK Divider Bypass */ 131#define SSACD_SCDB (1 << 3) /* SSPSYSCLK Divider Bypass */
127#define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */ 132#define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */
128#define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ 133#define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */
129#if defined(CONFIG_PXA3xx)
130#define SSACD_SCDX8 (1 << 7) /* SYSCLK division ratio select */ 134#define SSACD_SCDX8 (1 << 7) /* SYSCLK division ratio select */
131#endif
132
133 135
134#endif /* __ASM_ARCH_REGS_SSP_H */ 136enum pxa_ssp_type {
137 SSP_UNDEFINED = 0,
138 PXA25x_SSP, /* pxa 210, 250, 255, 26x */
139 PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
140 PXA27x_SSP,
141 PXA168_SSP,
142};
143
144struct ssp_device {
145 struct platform_device *pdev;
146 struct list_head node;
147
148 struct clk *clk;
149 void __iomem *mmio_base;
150 unsigned long phys_base;
151
152 const char *label;
153 int port_id;
154 int type;
155 int use_count;
156 int irq;
157 int drcmr_rx;
158 int drcmr_tx;
159};
160
161/**
162 * pxa_ssp_write_reg - Write to a SSP register
163 *
164 * @dev: SSP device to access
165 * @reg: Register to write to
166 * @val: Value to be written.
167 */
168static inline void pxa_ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
169{
170 __raw_writel(val, dev->mmio_base + reg);
171}
172
173/**
174 * pxa_ssp_read_reg - Read from a SSP register
175 *
176 * @dev: SSP device to access
177 * @reg: Register to read from
178 */
179static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg)
180{
181 return __raw_readl(dev->mmio_base + reg);
182}
183
184struct ssp_device *pxa_ssp_request(int port, const char *label);
185void pxa_ssp_free(struct ssp_device *);
186#endif /* __ASM_ARCH_SSP_H */
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index be58f9fe65b0..b77e018d36c1 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -110,6 +110,7 @@ static const unsigned long mfpr_lpm[] = {
110 MFPR_LPM_PULL_LOW, 110 MFPR_LPM_PULL_LOW,
111 MFPR_LPM_PULL_HIGH, 111 MFPR_LPM_PULL_HIGH,
112 MFPR_LPM_FLOAT, 112 MFPR_LPM_FLOAT,
113 MFPR_LPM_INPUT,
113}; 114};
114 115
115/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */ 116/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
diff --git a/arch/arm/plat-pxa/pmu.c b/arch/arm/plat-pxa/pmu.c
new file mode 100644
index 000000000000..267ceb6feb2f
--- /dev/null
+++ b/arch/arm/plat-pxa/pmu.c
@@ -0,0 +1,33 @@
1/*
2 * PMU IRQ registration for the PXA xscale PMU families.
3 * Copyright (C) 2010 Will Deacon, ARM Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 */
10
11#include <linux/platform_device.h>
12#include <asm/pmu.h>
13#include <mach/irqs.h>
14
15static struct resource pmu_resource = {
16 .start = IRQ_PMU,
17 .end = IRQ_PMU,
18 .flags = IORESOURCE_IRQ,
19};
20
21static struct platform_device pmu_device = {
22 .name = "arm-pmu",
23 .id = ARM_PMU_DEVICE_CPU,
24 .resource = &pmu_resource,
25 .num_resources = 1,
26};
27
28static int __init pxa_pmu_init(void)
29{
30 platform_device_register(&pmu_device);
31 return 0;
32}
33arch_initcall(pxa_pmu_init);
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
new file mode 100644
index 000000000000..c6357e554aba
--- /dev/null
+++ b/arch/arm/plat-pxa/ssp.c
@@ -0,0 +1,224 @@
1/*
2 * linux/arch/arm/mach-pxa/ssp.c
3 *
4 * based on linux/arch/arm/mach-sa1100/ssp.c by Russell King
5 *
6 * Copyright (C) 2003 Russell King.
7 * Copyright (C) 2003 Wolfson Microelectronics PLC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * PXA2xx SSP driver. This provides the generic core for simple
14 * IO-based SSP applications and allows easy port setup for DMA access.
15 *
16 * Author: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
17 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/slab.h>
23#include <linux/errno.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/init.h>
27#include <linux/mutex.h>
28#include <linux/clk.h>
29#include <linux/err.h>
30#include <linux/platform_device.h>
31#include <linux/io.h>
32
33#include <asm/irq.h>
34#include <mach/hardware.h>
35#include <plat/ssp.h>
36
37static DEFINE_MUTEX(ssp_lock);
38static LIST_HEAD(ssp_list);
39
40struct ssp_device *pxa_ssp_request(int port, const char *label)
41{
42 struct ssp_device *ssp = NULL;
43
44 mutex_lock(&ssp_lock);
45
46 list_for_each_entry(ssp, &ssp_list, node) {
47 if (ssp->port_id == port && ssp->use_count == 0) {
48 ssp->use_count++;
49 ssp->label = label;
50 break;
51 }
52 }
53
54 mutex_unlock(&ssp_lock);
55
56 if (&ssp->node == &ssp_list)
57 return NULL;
58
59 return ssp;
60}
61EXPORT_SYMBOL(pxa_ssp_request);
62
63void pxa_ssp_free(struct ssp_device *ssp)
64{
65 mutex_lock(&ssp_lock);
66 if (ssp->use_count) {
67 ssp->use_count--;
68 ssp->label = NULL;
69 } else
70 dev_err(&ssp->pdev->dev, "device already free\n");
71 mutex_unlock(&ssp_lock);
72}
73EXPORT_SYMBOL(pxa_ssp_free);
74
75static int __devinit pxa_ssp_probe(struct platform_device *pdev)
76{
77 const struct platform_device_id *id = platform_get_device_id(pdev);
78 struct resource *res;
79 struct ssp_device *ssp;
80 int ret = 0;
81
82 ssp = kzalloc(sizeof(struct ssp_device), GFP_KERNEL);
83 if (ssp == NULL) {
84 dev_err(&pdev->dev, "failed to allocate memory");
85 return -ENOMEM;
86 }
87 ssp->pdev = pdev;
88
89 ssp->clk = clk_get(&pdev->dev, NULL);
90 if (IS_ERR(ssp->clk)) {
91 ret = PTR_ERR(ssp->clk);
92 goto err_free;
93 }
94
95 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
96 if (res == NULL) {
97 dev_err(&pdev->dev, "no SSP RX DRCMR defined\n");
98 ret = -ENODEV;
99 goto err_free_clk;
100 }
101 ssp->drcmr_rx = res->start;
102
103 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
104 if (res == NULL) {
105 dev_err(&pdev->dev, "no SSP TX DRCMR defined\n");
106 ret = -ENODEV;
107 goto err_free_clk;
108 }
109 ssp->drcmr_tx = res->start;
110
111 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
112 if (res == NULL) {
113 dev_err(&pdev->dev, "no memory resource defined\n");
114 ret = -ENODEV;
115 goto err_free_clk;
116 }
117
118 res = request_mem_region(res->start, resource_size(res),
119 pdev->name);
120 if (res == NULL) {
121 dev_err(&pdev->dev, "failed to request memory resource\n");
122 ret = -EBUSY;
123 goto err_free_clk;
124 }
125
126 ssp->phys_base = res->start;
127
128 ssp->mmio_base = ioremap(res->start, resource_size(res));
129 if (ssp->mmio_base == NULL) {
130 dev_err(&pdev->dev, "failed to ioremap() registers\n");
131 ret = -ENODEV;
132 goto err_free_mem;
133 }
134
135 ssp->irq = platform_get_irq(pdev, 0);
136 if (ssp->irq < 0) {
137 dev_err(&pdev->dev, "no IRQ resource defined\n");
138 ret = -ENODEV;
139 goto err_free_io;
140 }
141
142 /* PXA2xx/3xx SSP ports starts from 1 and the internal pdev->id
143 * starts from 0, do a translation here
144 */
145 ssp->port_id = pdev->id + 1;
146 ssp->use_count = 0;
147 ssp->type = (int)id->driver_data;
148
149 mutex_lock(&ssp_lock);
150 list_add(&ssp->node, &ssp_list);
151 mutex_unlock(&ssp_lock);
152
153 platform_set_drvdata(pdev, ssp);
154 return 0;
155
156err_free_io:
157 iounmap(ssp->mmio_base);
158err_free_mem:
159 release_mem_region(res->start, resource_size(res));
160err_free_clk:
161 clk_put(ssp->clk);
162err_free:
163 kfree(ssp);
164 return ret;
165}
166
167static int __devexit pxa_ssp_remove(struct platform_device *pdev)
168{
169 struct resource *res;
170 struct ssp_device *ssp;
171
172 ssp = platform_get_drvdata(pdev);
173 if (ssp == NULL)
174 return -ENODEV;
175
176 iounmap(ssp->mmio_base);
177
178 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
179 release_mem_region(res->start, resource_size(res));
180
181 clk_put(ssp->clk);
182
183 mutex_lock(&ssp_lock);
184 list_del(&ssp->node);
185 mutex_unlock(&ssp_lock);
186
187 kfree(ssp);
188 return 0;
189}
190
191static const struct platform_device_id ssp_id_table[] = {
192 { "pxa25x-ssp", PXA25x_SSP },
193 { "pxa25x-nssp", PXA25x_NSSP },
194 { "pxa27x-ssp", PXA27x_SSP },
195 { "pxa168-ssp", PXA168_SSP },
196 { },
197};
198
199static struct platform_driver pxa_ssp_driver = {
200 .probe = pxa_ssp_probe,
201 .remove = __devexit_p(pxa_ssp_remove),
202 .driver = {
203 .owner = THIS_MODULE,
204 .name = "pxa2xx-ssp",
205 },
206 .id_table = ssp_id_table,
207};
208
209static int __init pxa_ssp_init(void)
210{
211 return platform_driver_register(&pxa_ssp_driver);
212}
213
214static void __exit pxa_ssp_exit(void)
215{
216 platform_driver_unregister(&pxa_ssp_driver);
217}
218
219arch_initcall(pxa_ssp_init);
220module_exit(pxa_ssp_exit);
221
222MODULE_DESCRIPTION("PXA SSP driver");
223MODULE_AUTHOR("Liam Girdwood");
224MODULE_LICENSE("GPL");
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 6e93ef8f3d43..984bf66826d2 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -9,6 +9,7 @@ config PLAT_S3C24XX
9 select NO_IOPORT 9 select NO_IOPORT
10 select ARCH_REQUIRE_GPIOLIB 10 select ARCH_REQUIRE_GPIOLIB
11 select S3C_DEVICE_NAND 11 select S3C_DEVICE_NAND
12 select S3C_GPIO_CFG_S3C24XX
12 help 13 help
13 Base platform code for any Samsung S3C24XX device 14 Base platform code for any Samsung S3C24XX device
14 15
@@ -44,6 +45,12 @@ config S3C2410_CLOCK
44 Clock code for the S3C2410, and similar processors which 45 Clock code for the S3C2410, and similar processors which
45 is currently includes the S3C2410, S3C2440, S3C2442. 46 is currently includes the S3C2410, S3C2440, S3C2442.
46 47
48config S3C2443_CLOCK
49 bool
50 help
51 Clock code for the S3C2443 and similar processors, which includes
52 the S3C2416 and S3C2450.
53
47config S3C24XX_DCLK 54config S3C24XX_DCLK
48 bool 55 bool
49 help 56 help
@@ -157,4 +164,9 @@ config S3C24XX_SIMTEC_AUDIO
157 help 164 help
158 Add audio devices for common Simtec S3C24XX boards 165 Add audio devices for common Simtec S3C24XX boards
159 166
167config S3C2410_SETUP_TS
168 bool
169 help
170 Compile in platform device definition for Samsung TouchScreen.
171
160endif 172endif
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index c2237c41141f..c2064c308719 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_PM) += pm.o
30obj-$(CONFIG_PM) += irq-pm.o 30obj-$(CONFIG_PM) += irq-pm.o
31obj-$(CONFIG_PM) += sleep.o 31obj-$(CONFIG_PM) += sleep.o
32obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o 32obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
33obj-$(CONFIG_S3C2443_CLOCK) += s3c2443-clock.o
33obj-$(CONFIG_S3C2410_DMA) += dma.o 34obj-$(CONFIG_S3C2410_DMA) += dma.o
34obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o 35obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o
35obj-$(CONFIG_S3C2412_IOTIMING) += s3c2412-iotiming.o 36obj-$(CONFIG_S3C2412_IOTIMING) += s3c2412-iotiming.o
@@ -37,6 +38,7 @@ obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o
37 38
38# device specific setup and/or initialisation 39# device specific setup and/or initialisation
39obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o 40obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o
41obj-$(CONFIG_S3C2410_SETUP_TS) += setup-ts.o
40 42
41# SPI gpio central GPIO functions 43# SPI gpio central GPIO functions
42 44
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index 9e0e20ad2e46..7b44d0c592b5 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -42,6 +42,7 @@
42#include <plat/nand.h> 42#include <plat/nand.h>
43 43
44#include <plat/common-smdk.h> 44#include <plat/common-smdk.h>
45#include <plat/gpio-cfg.h>
45#include <plat/devs.h> 46#include <plat/devs.h>
46#include <plat/pm.h> 47#include <plat/pm.h>
47 48
@@ -185,10 +186,10 @@ void __init smdk_machine_init(void)
185{ 186{
186 /* Configure the LEDs (even if we have no LED support)*/ 187 /* Configure the LEDs (even if we have no LED support)*/
187 188
188 s3c2410_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT); 189 s3c_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT);
189 s3c2410_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT); 190 s3c_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT);
190 s3c2410_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT); 191 s3c_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT);
191 s3c2410_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT); 192 s3c_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT);
192 193
193 s3c2410_gpio_setpin(S3C2410_GPF(4), 1); 194 s3c2410_gpio_setpin(S3C2410_GPF(4), 1);
194 s3c2410_gpio_setpin(S3C2410_GPF(5), 1); 195 s3c2410_gpio_setpin(S3C2410_GPF(5), 1);
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 9ca64df35bf6..76d0858c3cbb 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -49,6 +49,7 @@
49#include <plat/s3c2400.h> 49#include <plat/s3c2400.h>
50#include <plat/s3c2410.h> 50#include <plat/s3c2410.h>
51#include <plat/s3c2412.h> 51#include <plat/s3c2412.h>
52#include <plat/s3c2416.h>
52#include <plat/s3c244x.h> 53#include <plat/s3c244x.h>
53#include <plat/s3c2443.h> 54#include <plat/s3c2443.h>
54 55
@@ -57,6 +58,7 @@
57static const char name_s3c2400[] = "S3C2400"; 58static const char name_s3c2400[] = "S3C2400";
58static const char name_s3c2410[] = "S3C2410"; 59static const char name_s3c2410[] = "S3C2410";
59static const char name_s3c2412[] = "S3C2412"; 60static const char name_s3c2412[] = "S3C2412";
61static const char name_s3c2416[] = "S3C2416/S3C2450";
60static const char name_s3c2440[] = "S3C2440"; 62static const char name_s3c2440[] = "S3C2440";
61static const char name_s3c2442[] = "S3C2442"; 63static const char name_s3c2442[] = "S3C2442";
62static const char name_s3c2442b[] = "S3C2442B"; 64static const char name_s3c2442b[] = "S3C2442B";
@@ -137,6 +139,15 @@ static struct cpu_table cpu_ids[] __initdata = {
137 .init = s3c2412_init, 139 .init = s3c2412_init,
138 .name = name_s3c2412, 140 .name = name_s3c2412,
139 }, 141 },
142 { /* a strange version of the s3c2416 */
143 .idcode = 0x32450003,
144 .idmask = 0xffffffff,
145 .map_io = s3c2416_map_io,
146 .init_clocks = s3c2416_init_clocks,
147 .init_uarts = s3c2416_init_uarts,
148 .init = s3c2416_init,
149 .name = name_s3c2416,
150 },
140 { 151 {
141 .idcode = 0x32443001, 152 .idcode = 0x32443001,
142 .idmask = 0xffffffff, 153 .idmask = 0xffffffff,
@@ -170,6 +181,16 @@ static struct map_desc s3c_iodesc[] __initdata = {
170 181
171static unsigned long s3c24xx_read_idcode_v5(void) 182static unsigned long s3c24xx_read_idcode_v5(void)
172{ 183{
184#if defined(CONFIG_CPU_S3C2416)
185 /* s3c2416 is v5, with S3C24XX_GSTATUS1 instead of S3C2412_GSTATUS1 */
186
187 u32 gs = __raw_readl(S3C24XX_GSTATUS1);
188
189 /* test for s3c2416 or similar device */
190 if ((gs >> 16) == 0x3245)
191 return gs;
192#endif
193
173#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) 194#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
174 return __raw_readl(S3C2412_GSTATUS1); 195 return __raw_readl(S3C2412_GSTATUS1);
175#else 196#else
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 9265f09bfa58..58583732b29a 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -21,6 +21,7 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/string.h>
24 25
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
@@ -38,8 +39,7 @@
38#include <plat/devs.h> 39#include <plat/devs.h>
39#include <plat/cpu.h> 40#include <plat/cpu.h>
40#include <plat/regs-spi.h> 41#include <plat/regs-spi.h>
41 42#include <plat/ts.h>
42#include <mach/ts.h>
43 43
44/* Serial port registrations */ 44/* Serial port registrations */
45 45
@@ -149,10 +149,14 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
149{ 149{
150 struct s3c2410fb_mach_info *npd; 150 struct s3c2410fb_mach_info *npd;
151 151
152 npd = kmalloc(sizeof(*npd), GFP_KERNEL); 152 npd = kmemdup(pd, sizeof(*npd), GFP_KERNEL);
153 if (npd) { 153 if (npd) {
154 memcpy(npd, pd, sizeof(*npd));
155 s3c_device_lcd.dev.platform_data = npd; 154 s3c_device_lcd.dev.platform_data = npd;
155 npd->displays = kmemdup(pd->displays,
156 sizeof(struct s3c2410fb_display) * npd->num_displays,
157 GFP_KERNEL);
158 if (!npd->displays)
159 printk(KERN_ERR "no memory for LCD display data\n");
156 } else { 160 } else {
157 printk(KERN_ERR "no memory for LCD platform data\n"); 161 printk(KERN_ERR "no memory for LCD platform data\n");
158 } 162 }
@@ -338,14 +342,6 @@ struct platform_device s3c_device_adc = {
338 .resource = s3c_adc_resource, 342 .resource = s3c_adc_resource,
339}; 343};
340 344
341/* HWMON */
342
343struct platform_device s3c_device_hwmon = {
344 .name = "s3c-hwmon",
345 .id = -1,
346 .dev.parent = &s3c_device_adc.dev,
347};
348
349/* SDI */ 345/* SDI */
350 346
351static struct resource s3c_sdi_resource[] = { 347static struct resource s3c_sdi_resource[] = {
@@ -371,7 +367,7 @@ struct platform_device s3c_device_sdi = {
371 367
372EXPORT_SYMBOL(s3c_device_sdi); 368EXPORT_SYMBOL(s3c_device_sdi);
373 369
374void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) 370void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
375{ 371{
376 struct s3c24xx_mci_pdata *npd; 372 struct s3c24xx_mci_pdata *npd;
377 373
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 93827b3d4e84..6ad274e7593d 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1104,7 +1104,7 @@ EXPORT_SYMBOL(s3c2410_dma_config);
1104 * devaddr: physical address of the source 1104 * devaddr: physical address of the source
1105*/ 1105*/
1106 1106
1107int s3c2410_dma_devconfig(int channel, 1107int s3c2410_dma_devconfig(unsigned int channel,
1108 enum s3c2410_dmasrc source, 1108 enum s3c2410_dmasrc source,
1109 unsigned long devaddr) 1109 unsigned long devaddr)
1110{ 1110{
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c
index 5467470badfd..2f3d7c089dfa 100644
--- a/arch/arm/plat-s3c24xx/gpio.c
+++ b/arch/arm/plat-s3c24xx/gpio.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c24xx/gpio.c 1/* linux/arch/arm/plat-s3c24xx/gpio.c
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * S3C24XX GPIO support 6 * S3C24XX GPIO support
@@ -20,12 +20,12 @@
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21*/ 21*/
22 22
23
24#include <linux/kernel.h> 23#include <linux/kernel.h>
25#include <linux/init.h> 24#include <linux/init.h>
26#include <linux/module.h> 25#include <linux/module.h>
27#include <linux/interrupt.h> 26#include <linux/interrupt.h>
28#include <linux/ioport.h> 27#include <linux/ioport.h>
28#include <linux/gpio.h>
29#include <linux/io.h> 29#include <linux/io.h>
30 30
31#include <mach/hardware.h> 31#include <mach/hardware.h>
@@ -34,133 +34,46 @@
34 34
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36 36
37void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) 37#include <plat/gpio-core.h>
38{
39 void __iomem *base = S3C24XX_GPIO_BASE(pin);
40 unsigned long mask;
41 unsigned long con;
42 unsigned long flags;
43 38
44 if (pin < S3C2410_GPIO_BANKB) { 39/* gpiolib wrappers until these are totally eliminated */
45 mask = 1 << S3C2410_GPIO_OFFSET(pin);
46 } else {
47 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
48 }
49
50 switch (function) {
51 case S3C2410_GPIO_LEAVE:
52 mask = 0;
53 function = 0;
54 break;
55
56 case S3C2410_GPIO_INPUT:
57 case S3C2410_GPIO_OUTPUT:
58 case S3C2410_GPIO_SFN2:
59 case S3C2410_GPIO_SFN3:
60 if (pin < S3C2410_GPIO_BANKB) {
61 function -= 1;
62 function &= 1;
63 function <<= S3C2410_GPIO_OFFSET(pin);
64 } else {
65 function &= 3;
66 function <<= S3C2410_GPIO_OFFSET(pin)*2;
67 }
68 }
69
70 /* modify the specified register wwith IRQs off */
71
72 local_irq_save(flags);
73
74 con = __raw_readl(base + 0x00);
75 con &= ~mask;
76 con |= function;
77
78 __raw_writel(con, base + 0x00);
79
80 local_irq_restore(flags);
81}
82
83EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
84
85unsigned int s3c2410_gpio_getcfg(unsigned int pin)
86{
87 void __iomem *base = S3C24XX_GPIO_BASE(pin);
88 unsigned long val = __raw_readl(base);
89
90 if (pin < S3C2410_GPIO_BANKB) {
91 val >>= S3C2410_GPIO_OFFSET(pin);
92 val &= 1;
93 val += 1;
94 } else {
95 val >>= S3C2410_GPIO_OFFSET(pin)*2;
96 val &= 3;
97 }
98
99 return val | S3C2410_GPIO_INPUT;
100}
101
102EXPORT_SYMBOL(s3c2410_gpio_getcfg);
103 40
104void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) 41void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
105{ 42{
106 void __iomem *base = S3C24XX_GPIO_BASE(pin); 43 int ret;
107 unsigned long offs = S3C2410_GPIO_OFFSET(pin);
108 unsigned long flags;
109 unsigned long up;
110 44
111 if (pin < S3C2410_GPIO_BANKB) 45 WARN_ON(to); /* should be none of these left */
112 return;
113 46
114 local_irq_save(flags); 47 if (!to) {
115 48 /* if pull is enabled, try first with up, and if that
116 up = __raw_readl(base + 0x08); 49 * fails, try using down */
117 up &= ~(1L << offs);
118 up |= to << offs;
119 __raw_writel(up, base + 0x08);
120 50
121 local_irq_restore(flags); 51 ret = s3c_gpio_setpull(pin, S3C_GPIO_PULL_UP);
52 if (ret)
53 s3c_gpio_setpull(pin, S3C_GPIO_PULL_DOWN);
54 } else {
55 s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);
56 }
122} 57}
123
124EXPORT_SYMBOL(s3c2410_gpio_pullup); 58EXPORT_SYMBOL(s3c2410_gpio_pullup);
125 59
126int s3c2410_gpio_getpull(unsigned int pin)
127{
128 void __iomem *base = S3C24XX_GPIO_BASE(pin);
129 unsigned long offs = S3C2410_GPIO_OFFSET(pin);
130
131 if (pin < S3C2410_GPIO_BANKB)
132 return -EINVAL;
133
134 return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0;
135}
136
137EXPORT_SYMBOL(s3c2410_gpio_getpull);
138
139void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) 60void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
140{ 61{
141 void __iomem *base = S3C24XX_GPIO_BASE(pin); 62 /* do this via gpiolib until all users removed */
142 unsigned long offs = S3C2410_GPIO_OFFSET(pin);
143 unsigned long flags;
144 unsigned long dat;
145 63
146 local_irq_save(flags); 64 gpio_request(pin, "temporary");
147 65 gpio_set_value(pin, to);
148 dat = __raw_readl(base + 0x04); 66 gpio_free(pin);
149 dat &= ~(1 << offs);
150 dat |= to << offs;
151 __raw_writel(dat, base + 0x04);
152
153 local_irq_restore(flags);
154} 67}
155 68
156EXPORT_SYMBOL(s3c2410_gpio_setpin); 69EXPORT_SYMBOL(s3c2410_gpio_setpin);
157 70
158unsigned int s3c2410_gpio_getpin(unsigned int pin) 71unsigned int s3c2410_gpio_getpin(unsigned int pin)
159{ 72{
160 void __iomem *base = S3C24XX_GPIO_BASE(pin); 73 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
161 unsigned long offs = S3C2410_GPIO_OFFSET(pin); 74 unsigned long offs = pin - chip->chip.base;
162 75
163 return __raw_readl(base + 0x04) & (1<< offs); 76 return __raw_readl(chip->base + 0x04) & (1<< offs);
164} 77}
165 78
166EXPORT_SYMBOL(s3c2410_gpio_getpin); 79EXPORT_SYMBOL(s3c2410_gpio_getpin);
@@ -181,22 +94,3 @@ unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
181} 94}
182 95
183EXPORT_SYMBOL(s3c2410_modify_misccr); 96EXPORT_SYMBOL(s3c2410_modify_misccr);
184
185int s3c2410_gpio_getirq(unsigned int pin)
186{
187 if (pin < S3C2410_GPF(0) || pin > S3C2410_GPG(15))
188 return -EINVAL; /* not valid interrupts */
189
190 if (pin < S3C2410_GPG(0) && pin > S3C2410_GPF(7))
191 return -EINVAL; /* not valid pin */
192
193 if (pin < S3C2410_GPF(4))
194 return (pin - S3C2410_GPF(0)) + IRQ_EINT0;
195
196 if (pin < S3C2410_GPG(0))
197 return (pin - S3C2410_GPF(4)) + IRQ_EINT4;
198
199 return (pin - S3C2410_GPG(0)) + IRQ_EINT8;
200}
201
202EXPORT_SYMBOL(s3c2410_gpio_getirq);
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 4f0f11a6a677..4c0896f2572d 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c24xx/gpiolib.c 1/* linux/arch/arm/plat-s3c24xx/gpiolib.c
2 * 2 *
3 * Copyright (c) 2008 Simtec Electronics 3 * Copyright (c) 2008-2010 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
@@ -21,6 +21,8 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22 22
23#include <plat/gpio-core.h> 23#include <plat/gpio-core.h>
24#include <plat/gpio-cfg.h>
25#include <plat/gpio-cfg-helpers.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25#include <asm/irq.h> 27#include <asm/irq.h>
26#include <plat/pm.h> 28#include <plat/pm.h>
@@ -77,10 +79,21 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
77 return IRQ_EINT8 + offset; 79 return IRQ_EINT8 + offset;
78} 80}
79 81
82static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
83 .set_config = s3c_gpio_setcfg_s3c24xx_a,
84 .get_config = s3c_gpio_getcfg_s3c24xx_a,
85};
86
87struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
88 .set_config = s3c_gpio_setcfg_s3c24xx,
89 .get_config = s3c_gpio_getcfg_s3c24xx,
90};
91
80struct s3c_gpio_chip s3c24xx_gpios[] = { 92struct s3c_gpio_chip s3c24xx_gpios[] = {
81 [0] = { 93 [0] = {
82 .base = S3C2410_GPACON, 94 .base = S3C2410_GPACON,
83 .pm = __gpio_pm(&s3c_gpio_pm_1bit), 95 .pm = __gpio_pm(&s3c_gpio_pm_1bit),
96 .config = &s3c24xx_gpiocfg_banka,
84 .chip = { 97 .chip = {
85 .base = S3C2410_GPA(0), 98 .base = S3C2410_GPA(0),
86 .owner = THIS_MODULE, 99 .owner = THIS_MODULE,
@@ -161,15 +174,58 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
161 .ngpio = 11, 174 .ngpio = 11,
162 }, 175 },
163 }, 176 },
177 /* GPIOS for the S3C2443 and later devices. */
178 {
179 .base = S3C2440_GPJCON,
180 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
181 .chip = {
182 .base = S3C2410_GPJ(0),
183 .owner = THIS_MODULE,
184 .label = "GPIOJ",
185 .ngpio = 16,
186 },
187 }, {
188 .base = S3C2443_GPKCON,
189 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
190 .chip = {
191 .base = S3C2410_GPK(0),
192 .owner = THIS_MODULE,
193 .label = "GPIOK",
194 .ngpio = 16,
195 },
196 }, {
197 .base = S3C2443_GPLCON,
198 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
199 .chip = {
200 .base = S3C2410_GPL(0),
201 .owner = THIS_MODULE,
202 .label = "GPIOL",
203 .ngpio = 15,
204 },
205 }, {
206 .base = S3C2443_GPMCON,
207 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
208 .chip = {
209 .base = S3C2410_GPM(0),
210 .owner = THIS_MODULE,
211 .label = "GPIOM",
212 .ngpio = 2,
213 },
214 },
164}; 215};
165 216
217
166static __init int s3c24xx_gpiolib_init(void) 218static __init int s3c24xx_gpiolib_init(void)
167{ 219{
168 struct s3c_gpio_chip *chip = s3c24xx_gpios; 220 struct s3c_gpio_chip *chip = s3c24xx_gpios;
169 int gpn; 221 int gpn;
170 222
171 for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) 223 for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
224 if (!chip->config)
225 chip->config = &s3c24xx_gpiocfg_default;
226
172 s3c_gpiolib_add(chip); 227 s3c_gpiolib_add(chip);
228 }
173 229
174 return 0; 230 return 0;
175} 231}
diff --git a/arch/arm/plat-s3c24xx/include/plat/pll.h b/arch/arm/plat-s3c24xx/include/plat/pll.h
index 7ea8bffa7a9c..005729a1077a 100644
--- a/arch/arm/plat-s3c24xx/include/plat/pll.h
+++ b/arch/arm/plat-s3c24xx/include/plat/pll.h
@@ -35,3 +35,28 @@ s3c24xx_get_pll(unsigned int pllval, unsigned int baseclk)
35 35
36 return (unsigned int)fvco; 36 return (unsigned int)fvco;
37} 37}
38
39#define S3C2416_PLL_M_SHIFT (14)
40#define S3C2416_PLL_P_SHIFT (5)
41#define S3C2416_PLL_S_MASK (7)
42#define S3C2416_PLL_M_MASK ((1 << 10) - 1)
43#define S3C2416_PLL_P_MASK (63)
44
45static inline unsigned int
46s3c2416_get_pll(unsigned int pllval, unsigned int baseclk)
47{
48 unsigned int m, p, s;
49 uint64_t fvco;
50
51 m = pllval >> S3C2416_PLL_M_SHIFT;
52 p = pllval >> S3C2416_PLL_P_SHIFT;
53
54 s = pllval & S3C2416_PLL_S_MASK;
55 m &= S3C2416_PLL_M_MASK;
56 p &= S3C2416_PLL_P_MASK;
57
58 fvco = (uint64_t)baseclk * m;
59 do_div(fvco, (p << s));
60
61 return (unsigned int)fvco;
62}
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2416.h b/arch/arm/plat-s3c24xx/include/plat/s3c2416.h
new file mode 100644
index 000000000000..dc3c0907d221
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2416.h
@@ -0,0 +1,31 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>
4 *
5 * Header file for s3c2416 cpu support
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifdef CONFIG_CPU_S3C2416
13
14struct s3c2410_uartcfg;
15
16extern int s3c2416_init(void);
17
18extern void s3c2416_map_io(void);
19
20extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
21
22extern void s3c2416_init_clocks(int xtal);
23
24extern int s3c2416_baseclk_add(void);
25
26#else
27#define s3c2416_init_clocks NULL
28#define s3c2416_init_uarts NULL
29#define s3c2416_map_io NULL
30#define s3c2416_init NULL
31#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
index 815b107ed890..a19715feb798 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
@@ -30,3 +30,22 @@ extern int s3c2443_baseclk_add(void);
30#define s3c2443_map_io NULL 30#define s3c2443_map_io NULL
31#define s3c2443_init NULL 31#define s3c2443_init NULL
32#endif 32#endif
33
34/* common code used by s3c2443 and others.
35 * note, not to be used outside of arch/arm/mach-s3c* */
36
37struct clk; /* some files don't need clk.h otherwise */
38
39typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base);
40typedef unsigned int (*fdiv_fn)(unsigned long clkcon0);
41
42extern void s3c2443_common_setup_clocks(pll_fn get_mpll, fdiv_fn fdiv);
43extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, fdiv_fn fdiv);
44
45extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable);
46extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable);
47extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
48
49extern struct clksrc_clk clk_epllref;
50extern struct clksrc_clk clk_esysclk;
51extern struct clksrc_clk clk_msysclk;
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c
index 3620dd299095..60627e63a254 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/plat-s3c24xx/pm.c
@@ -43,6 +43,7 @@
43 43
44#include <asm/mach/time.h> 44#include <asm/mach/time.h>
45 45
46#include <plat/gpio-cfg.h>
46#include <plat/pm.h> 47#include <plat/pm.h>
47 48
48#define PFX "s3c24xx-pm: " 49#define PFX "s3c24xx-pm: "
@@ -90,22 +91,22 @@ static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)
90{ 91{
91 unsigned long irqstate; 92 unsigned long irqstate;
92 unsigned long pinstate; 93 unsigned long pinstate;
93 int irq = s3c2410_gpio_getirq(pin); 94 int irq = gpio_to_irq(pin);
94 95
95 if (irqoffs < 4) 96 if (irqoffs < 4)
96 irqstate = s3c_irqwake_intmask & (1L<<irqoffs); 97 irqstate = s3c_irqwake_intmask & (1L<<irqoffs);
97 else 98 else
98 irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); 99 irqstate = s3c_irqwake_eintmask & (1L<<irqoffs);
99 100
100 pinstate = s3c2410_gpio_getcfg(pin); 101 pinstate = s3c_gpio_getcfg(pin);
101 102
102 if (!irqstate) { 103 if (!irqstate) {
103 if (pinstate == S3C2410_GPIO_IRQ) 104 if (pinstate == S3C2410_GPIO_IRQ)
104 S3C_PMDBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); 105 S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin);
105 } else { 106 } else {
106 if (pinstate == S3C2410_GPIO_IRQ) { 107 if (pinstate == S3C2410_GPIO_IRQ) {
107 S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); 108 S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin);
108 s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); 109 s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT);
109 } 110 }
110 } 111 }
111} 112}
diff --git a/arch/arm/plat-s3c24xx/s3c2410-clock.c b/arch/arm/plat-s3c24xx/s3c2410-clock.c
index b61bdb793734..9ecc5d913679 100644
--- a/arch/arm/plat-s3c24xx/s3c2410-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2410-clock.c
@@ -87,7 +87,7 @@ static int s3c2410_upll_enable(struct clk *clk, int enable)
87 87
88/* standard clock definitions */ 88/* standard clock definitions */
89 89
90static struct clk init_clocks_disable[] = { 90static struct clk init_clocks_off[] = {
91 { 91 {
92 .name = "nand", 92 .name = "nand",
93 .id = -1, 93 .id = -1,
@@ -249,17 +249,8 @@ int __init s3c2410_baseclk_add(void)
249 249
250 /* install (and disable) the clocks we do not need immediately */ 250 /* install (and disable) the clocks we do not need immediately */
251 251
252 clkp = init_clocks_disable; 252 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
253 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { 253 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
254
255 ret = s3c24xx_register_clock(clkp);
256 if (ret < 0) {
257 printk(KERN_ERR "Failed to register clock %s (%d)\n",
258 clkp->name, ret);
259 }
260
261 s3c2410_clkcon_enable(clkp, 0);
262 }
263 254
264 /* show the clock-slow value */ 255 /* show the clock-slow value */
265 256
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
new file mode 100644
index 000000000000..461f070eb62d
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -0,0 +1,472 @@
1/* linux/arch/arm/plat-s3c24xx/s3c2443-clock.c
2 *
3 * Copyright (c) 2007, 2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2443 Clock control suport - common code
7 */
8
9#include <linux/init.h>
10#include <linux/clk.h>
11#include <linux/io.h>
12
13#include <mach/regs-s3c2443-clock.h>
14
15#include <plat/s3c2443.h>
16#include <plat/clock.h>
17#include <plat/clock-clksrc.h>
18#include <plat/cpu.h>
19
20#include <plat/cpu-freq.h>
21
22
23static int s3c2443_gate(void __iomem *reg, struct clk *clk, int enable)
24{
25 u32 ctrlbit = clk->ctrlbit;
26 u32 con = __raw_readl(reg);
27
28 if (enable)
29 con |= ctrlbit;
30 else
31 con &= ~ctrlbit;
32
33 __raw_writel(con, reg);
34 return 0;
35}
36
37int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
38{
39 return s3c2443_gate(S3C2443_HCLKCON, clk, enable);
40}
41
42int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
43{
44 return s3c2443_gate(S3C2443_PCLKCON, clk, enable);
45}
46
47int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
48{
49 return s3c2443_gate(S3C2443_SCLKCON, clk, enable);
50}
51
52/* mpllref is a direct descendant of clk_xtal by default, but it is not
53 * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as
54 * such directly equating the two source clocks is impossible.
55 */
56struct clk clk_mpllref = {
57 .name = "mpllref",
58 .parent = &clk_xtal,
59 .id = -1,
60};
61
62static struct clk *clk_epllref_sources[] = {
63 [0] = &clk_mpllref,
64 [1] = &clk_mpllref,
65 [2] = &clk_xtal,
66 [3] = &clk_ext,
67};
68
69struct clksrc_clk clk_epllref = {
70 .clk = {
71 .name = "epllref",
72 .id = -1,
73 },
74 .sources = &(struct clksrc_sources) {
75 .sources = clk_epllref_sources,
76 .nr_sources = ARRAY_SIZE(clk_epllref_sources),
77 },
78 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 7 },
79};
80
81/* esysclk
82 *
83 * this is sourced from either the EPLL or the EPLLref clock
84*/
85
86static struct clk *clk_sysclk_sources[] = {
87 [0] = &clk_epllref.clk,
88 [1] = &clk_epll,
89};
90
91struct clksrc_clk clk_esysclk = {
92 .clk = {
93 .name = "esysclk",
94 .parent = &clk_epll,
95 .id = -1,
96 },
97 .sources = &(struct clksrc_sources) {
98 .sources = clk_sysclk_sources,
99 .nr_sources = ARRAY_SIZE(clk_sysclk_sources),
100 },
101 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 6 },
102};
103
104static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
105{
106 unsigned long parent_rate = clk_get_rate(clk->parent);
107 unsigned long div = __raw_readl(S3C2443_CLKDIV0);
108
109 div &= S3C2443_CLKDIV0_EXTDIV_MASK;
110 div >>= (S3C2443_CLKDIV0_EXTDIV_SHIFT-1); /* x2 */
111
112 return parent_rate / (div + 1);
113}
114
115static struct clk clk_mdivclk = {
116 .name = "mdivclk",
117 .parent = &clk_mpllref,
118 .id = -1,
119 .ops = &(struct clk_ops) {
120 .get_rate = s3c2443_getrate_mdivclk,
121 },
122};
123
124static struct clk *clk_msysclk_sources[] = {
125 [0] = &clk_mpllref,
126 [1] = &clk_mpll,
127 [2] = &clk_mdivclk,
128 [3] = &clk_mpllref,
129};
130
131struct clksrc_clk clk_msysclk = {
132 .clk = {
133 .name = "msysclk",
134 .parent = &clk_xtal,
135 .id = -1,
136 },
137 .sources = &(struct clksrc_sources) {
138 .sources = clk_msysclk_sources,
139 .nr_sources = ARRAY_SIZE(clk_msysclk_sources),
140 },
141 .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 3 },
142};
143
144/* prediv
145 *
146 * this divides the msysclk down to pass to h/p/etc.
147 */
148
149static unsigned long s3c2443_prediv_getrate(struct clk *clk)
150{
151 unsigned long rate = clk_get_rate(clk->parent);
152 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
153
154 clkdiv0 &= S3C2443_CLKDIV0_PREDIV_MASK;
155 clkdiv0 >>= S3C2443_CLKDIV0_PREDIV_SHIFT;
156
157 return rate / (clkdiv0 + 1);
158}
159
160static struct clk clk_prediv = {
161 .name = "prediv",
162 .id = -1,
163 .parent = &clk_msysclk.clk,
164 .ops = &(struct clk_ops) {
165 .get_rate = s3c2443_prediv_getrate,
166 },
167};
168
169/* usbhost
170 *
171 * usb host bus-clock, usually 48MHz to provide USB bus clock timing
172*/
173
174static struct clksrc_clk clk_usb_bus_host = {
175 .clk = {
176 .name = "usb-bus-host-parent",
177 .id = -1,
178 .parent = &clk_esysclk.clk,
179 .ctrlbit = S3C2443_SCLKCON_USBHOST,
180 .enable = s3c2443_clkcon_enable_s,
181 },
182 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
183};
184
185/* common clksrc clocks */
186
187static struct clksrc_clk clksrc_clks[] = {
188 {
189 /* ART baud-rate clock sourced from esysclk via a divisor */
190 .clk = {
191 .name = "uartclk",
192 .id = -1,
193 .parent = &clk_esysclk.clk,
194 },
195 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
196 }, {
197 /* camera interface bus-clock, divided down from esysclk */
198 .clk = {
199 .name = "camif-upll", /* same as 2440 name */
200 .id = -1,
201 .parent = &clk_esysclk.clk,
202 .ctrlbit = S3C2443_SCLKCON_CAMCLK,
203 .enable = s3c2443_clkcon_enable_s,
204 },
205 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 26 },
206 }, {
207 .clk = {
208 .name = "display-if",
209 .id = -1,
210 .parent = &clk_esysclk.clk,
211 .ctrlbit = S3C2443_SCLKCON_DISPCLK,
212 .enable = s3c2443_clkcon_enable_s,
213 },
214 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 8, .shift = 16 },
215 },
216};
217
218
219static struct clk init_clocks_off[] = {
220 {
221 .name = "adc",
222 .id = -1,
223 .parent = &clk_p,
224 .enable = s3c2443_clkcon_enable_p,
225 .ctrlbit = S3C2443_PCLKCON_ADC,
226 }, {
227 .name = "i2c",
228 .id = -1,
229 .parent = &clk_p,
230 .enable = s3c2443_clkcon_enable_p,
231 .ctrlbit = S3C2443_PCLKCON_IIC,
232 }
233};
234
235static struct clk init_clocks[] = {
236 {
237 .name = "dma",
238 .id = 0,
239 .parent = &clk_h,
240 .enable = s3c2443_clkcon_enable_h,
241 .ctrlbit = S3C2443_HCLKCON_DMA0,
242 }, {
243 .name = "dma",
244 .id = 1,
245 .parent = &clk_h,
246 .enable = s3c2443_clkcon_enable_h,
247 .ctrlbit = S3C2443_HCLKCON_DMA1,
248 }, {
249 .name = "dma",
250 .id = 2,
251 .parent = &clk_h,
252 .enable = s3c2443_clkcon_enable_h,
253 .ctrlbit = S3C2443_HCLKCON_DMA2,
254 }, {
255 .name = "dma",
256 .id = 3,
257 .parent = &clk_h,
258 .enable = s3c2443_clkcon_enable_h,
259 .ctrlbit = S3C2443_HCLKCON_DMA3,
260 }, {
261 .name = "dma",
262 .id = 4,
263 .parent = &clk_h,
264 .enable = s3c2443_clkcon_enable_h,
265 .ctrlbit = S3C2443_HCLKCON_DMA4,
266 }, {
267 .name = "dma",
268 .id = 5,
269 .parent = &clk_h,
270 .enable = s3c2443_clkcon_enable_h,
271 .ctrlbit = S3C2443_HCLKCON_DMA5,
272 }, {
273 .name = "hsmmc",
274 .id = 0,
275 .parent = &clk_h,
276 .enable = s3c2443_clkcon_enable_h,
277 .ctrlbit = S3C2443_HCLKCON_HSMMC,
278 }, {
279 .name = "gpio",
280 .id = -1,
281 .parent = &clk_p,
282 .enable = s3c2443_clkcon_enable_p,
283 .ctrlbit = S3C2443_PCLKCON_GPIO,
284 }, {
285 .name = "usb-host",
286 .id = -1,
287 .parent = &clk_h,
288 .enable = s3c2443_clkcon_enable_h,
289 .ctrlbit = S3C2443_HCLKCON_USBH,
290 }, {
291 .name = "usb-device",
292 .id = -1,
293 .parent = &clk_h,
294 .enable = s3c2443_clkcon_enable_h,
295 .ctrlbit = S3C2443_HCLKCON_USBD,
296 }, {
297 .name = "lcd",
298 .id = -1,
299 .parent = &clk_h,
300 .enable = s3c2443_clkcon_enable_h,
301 .ctrlbit = S3C2443_HCLKCON_LCDC,
302
303 }, {
304 .name = "timers",
305 .id = -1,
306 .parent = &clk_p,
307 .enable = s3c2443_clkcon_enable_p,
308 .ctrlbit = S3C2443_PCLKCON_PWMT,
309 }, {
310 .name = "cfc",
311 .id = -1,
312 .parent = &clk_h,
313 .enable = s3c2443_clkcon_enable_h,
314 .ctrlbit = S3C2443_HCLKCON_CFC,
315 }, {
316 .name = "ssmc",
317 .id = -1,
318 .parent = &clk_h,
319 .enable = s3c2443_clkcon_enable_h,
320 .ctrlbit = S3C2443_HCLKCON_SSMC,
321 }, {
322 .name = "uart",
323 .id = 0,
324 .parent = &clk_p,
325 .enable = s3c2443_clkcon_enable_p,
326 .ctrlbit = S3C2443_PCLKCON_UART0,
327 }, {
328 .name = "uart",
329 .id = 1,
330 .parent = &clk_p,
331 .enable = s3c2443_clkcon_enable_p,
332 .ctrlbit = S3C2443_PCLKCON_UART1,
333 }, {
334 .name = "uart",
335 .id = 2,
336 .parent = &clk_p,
337 .enable = s3c2443_clkcon_enable_p,
338 .ctrlbit = S3C2443_PCLKCON_UART2,
339 }, {
340 .name = "uart",
341 .id = 3,
342 .parent = &clk_p,
343 .enable = s3c2443_clkcon_enable_p,
344 .ctrlbit = S3C2443_PCLKCON_UART3,
345 }, {
346 .name = "rtc",
347 .id = -1,
348 .parent = &clk_p,
349 .enable = s3c2443_clkcon_enable_p,
350 .ctrlbit = S3C2443_PCLKCON_RTC,
351 }, {
352 .name = "watchdog",
353 .id = -1,
354 .parent = &clk_p,
355 .ctrlbit = S3C2443_PCLKCON_WDT,
356 }, {
357 .name = "ac97",
358 .id = -1,
359 .parent = &clk_p,
360 .ctrlbit = S3C2443_PCLKCON_AC97,
361 }, {
362 .name = "nand",
363 .id = -1,
364 .parent = &clk_h,
365 }, {
366 .name = "usb-bus-host",
367 .id = -1,
368 .parent = &clk_usb_bus_host.clk,
369 }
370};
371
372static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
373{
374 clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK;
375
376 return clkcon0 + 1;
377}
378
379/* EPLLCON compatible enough to get on/off information */
380
381void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll,
382 fdiv_fn get_fdiv)
383{
384 unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
385 unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON);
386 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
387 struct clk *xtal_clk;
388 unsigned long xtal;
389 unsigned long pll;
390 unsigned long fclk;
391 unsigned long hclk;
392 unsigned long pclk;
393 int ptr;
394
395 xtal_clk = clk_get(NULL, "xtal");
396 xtal = clk_get_rate(xtal_clk);
397 clk_put(xtal_clk);
398
399 pll = get_mpll(mpllcon, xtal);
400 clk_msysclk.clk.rate = pll;
401
402 fclk = pll / get_fdiv(clkdiv0);
403 hclk = s3c2443_prediv_getrate(&clk_prediv);
404 hclk /= s3c2443_get_hdiv(clkdiv0);
405 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);
406
407 s3c24xx_setup_clocks(fclk, hclk, pclk);
408
409 printk("CPU: MPLL %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n",
410 (mpllcon & S3C2443_PLLCON_OFF) ? "off":"on",
411 print_mhz(pll), print_mhz(fclk),
412 print_mhz(hclk), print_mhz(pclk));
413
414 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++)
415 s3c_set_clksrc(&clksrc_clks[ptr], true);
416
417 /* ensure usb bus clock is within correct rate of 48MHz */
418
419 if (clk_get_rate(&clk_usb_bus_host.clk) != (48 * 1000 * 1000)) {
420 printk(KERN_INFO "Warning: USB host bus not at 48MHz\n");
421 clk_set_rate(&clk_usb_bus_host.clk, 48*1000*1000);
422 }
423
424 printk("CPU: EPLL %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n",
425 (epllcon & S3C2443_PLLCON_OFF) ? "off":"on",
426 print_mhz(clk_get_rate(&clk_epll)),
427 print_mhz(clk_get_rate(&clk_usb_bus)));
428}
429
430static struct clk *clks[] __initdata = {
431 &clk_prediv,
432 &clk_mpllref,
433 &clk_mdivclk,
434 &clk_ext,
435 &clk_epll,
436 &clk_usb_bus,
437};
438
439static struct clksrc_clk *clksrcs[] __initdata = {
440 &clk_usb_bus_host,
441 &clk_epllref,
442 &clk_esysclk,
443 &clk_msysclk,
444};
445
446void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
447 fdiv_fn get_fdiv)
448{
449 int ptr;
450
451 /* s3c2443 parents h and p clocks from prediv */
452 clk_h.parent = &clk_prediv;
453 clk_p.parent = &clk_prediv;
454
455 clk_usb_bus.parent = &clk_usb_bus_host.clk;
456 clk_epll.parent = &clk_epllref.clk;
457
458 s3c24xx_register_baseclocks(xtal);
459 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
460
461 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
462 s3c_register_clksrc(clksrcs[ptr], 1);
463
464 s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks));
465 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
466
467 /* See s3c2443/etc notes on disabling clocks at init time */
468 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
469 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
470
471 s3c2443_common_setup_clocks(get_mpll, get_fdiv);
472}
diff --git a/arch/arm/plat-s3c24xx/setup-i2c.c b/arch/arm/plat-s3c24xx/setup-i2c.c
index 71a6accf114e..9e90a7cbd1d6 100644
--- a/arch/arm/plat-s3c24xx/setup-i2c.c
+++ b/arch/arm/plat-s3c24xx/setup-i2c.c
@@ -15,12 +15,13 @@
15 15
16struct platform_device; 16struct platform_device;
17 17
18#include <plat/gpio-cfg.h>
18#include <plat/iic.h> 19#include <plat/iic.h>
19#include <mach/hardware.h> 20#include <mach/hardware.h>
20#include <mach/regs-gpio.h> 21#include <mach/regs-gpio.h>
21 22
22void s3c_i2c0_cfg_gpio(struct platform_device *dev) 23void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{ 24{
24 s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA); 25 s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA);
25 s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL); 26 s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL);
26} 27}
diff --git a/arch/arm/plat-s3c24xx/setup-ts.c b/arch/arm/plat-s3c24xx/setup-ts.c
new file mode 100644
index 000000000000..ed2638663675
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/setup-ts.c
@@ -0,0 +1,34 @@
1/* linux/arch/arm/plat-s3c24xx/setup-ts.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on S3C24XX setup for i2c device
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/gpio.h>
15
16struct platform_device; /* don't need the contents */
17
18#include <mach/hardware.h>
19#include <mach/regs-gpio.h>
20
21/**
22 * s3c24xx_ts_cfg_gpio - configure gpio for s3c2410 systems
23 *
24 * Configure the GPIO for the S3C2410 system, where we have external FETs
25 * connected to the device (later systems such as the S3C2440 integrate
26 * these into the device).
27 */
28void s3c24xx_ts_cfg_gpio(struct platform_device *dev)
29{
30 s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON);
31 s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPG13_nXPON);
32 s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON);
33 s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON);
34}
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
index da7a61728c18..9793544a6ace 100644
--- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
+++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
@@ -21,16 +21,16 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
21 int enable) 21 int enable)
22{ 22{
23 if (enable) { 23 if (enable) {
24 s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0); 24 s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0);
25 s3c2410_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0); 25 s3c_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0);
26 s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0); 26 s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0);
27 s3c2410_gpio_pullup(S3C2410_GPE(11), 0); 27 s3c2410_gpio_pullup(S3C2410_GPE(11), 0);
28 s3c2410_gpio_pullup(S3C2410_GPE(13), 0); 28 s3c2410_gpio_pullup(S3C2410_GPE(13), 0);
29 } else { 29 } else {
30 s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); 30 s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT);
31 s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); 31 s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT);
32 s3c2410_gpio_pullup(S3C2410_GPE(11), 1); 32 s3c_gpio_cfgpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE);
33 s3c2410_gpio_pullup(S3C2410_GPE(12), 1); 33 s3c_gpio_cfgpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE);
34 s3c2410_gpio_pullup(S3C2410_GPE(13), 1); 34 s3c_gpio_cfgpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE);
35 } 35 }
36} 36}
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c
index 89fcf5308cf6..db9e9e477ec1 100644
--- a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c
+++ b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c
@@ -23,16 +23,16 @@ void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi,
23 23
24 printk(KERN_INFO "%s(%d)\n", __func__, enable); 24 printk(KERN_INFO "%s(%d)\n", __func__, enable);
25 if (enable) { 25 if (enable) {
26 s3c2410_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1); 26 s3c_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1);
27 s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1); 27 s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1);
28 s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1); 28 s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1);
29 s3c2410_gpio_pullup(S3C2410_GPD(10), 0); 29 s3c2410_gpio_pullup(S3C2410_GPD(10), 0);
30 s3c2410_gpio_pullup(S3C2410_GPD(9), 0); 30 s3c2410_gpio_pullup(S3C2410_GPD(9), 0);
31 } else { 31 } else {
32 s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); 32 s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT);
33 s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); 33 s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT);
34 s3c2410_gpio_pullup(S3C2410_GPD(10), 1); 34 s3c_gpio_cfgpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE);
35 s3c2410_gpio_pullup(S3C2410_GPD(9), 1); 35 s3c_gpio_cfgpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE);
36 s3c2410_gpio_pullup(S3C2410_GPD(8), 1); 36 s3c_gpio_cfgpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE);
37 } 37 }
38} 38}
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
index 86b9edc67413..8ea663a438bb 100644
--- a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
+++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
@@ -21,16 +21,16 @@ void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
21 int enable) 21 int enable)
22{ 22{
23 if (enable) { 23 if (enable) {
24 s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPG7_SPICLK1); 24 s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPG7_SPICLK1);
25 s3c2410_gpio_cfgpin(S3C2410_GPG(6), S3C2410_GPG6_SPIMOSI1); 25 s3c_gpio_cfgpin(S3C2410_GPG(6), S3C2410_GPG6_SPIMOSI1);
26 s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPG5_SPIMISO1); 26 s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPG5_SPIMISO1);
27 s3c2410_gpio_pullup(S3C2410_GPG(5), 0); 27 s3c2410_gpio_pullup(S3C2410_GPG(5), 0);
28 s3c2410_gpio_pullup(S3C2410_GPG(6), 0); 28 s3c2410_gpio_pullup(S3C2410_GPG(6), 0);
29 } else { 29 } else {
30 s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); 30 s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT);
31 s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); 31 s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT);
32 s3c2410_gpio_pullup(S3C2410_GPG(5), 1); 32 s3c_gpio_cfgpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE);
33 s3c2410_gpio_pullup(S3C2410_GPG(6), 1); 33 s3c_gpio_cfgpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE);
34 s3c2410_gpio_pullup(S3C2410_GPG(7), 1); 34 s3c_gpio_cfgpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE);
35 } 35 }
36} 36}
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index d400a6a20fe4..92bd75607b43 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -13,6 +13,7 @@ config PLAT_S5P
13 select NO_IOPORT 13 select NO_IOPORT
14 select ARCH_REQUIRE_GPIOLIB 14 select ARCH_REQUIRE_GPIOLIB
15 select S3C_GPIO_TRACK 15 select S3C_GPIO_TRACK
16 select S5P_GPIO_DRVSTR
16 select SAMSUNG_GPIOLIB_4BIT 17 select SAMSUNG_GPIOLIB_4BIT
17 select S3C_GPIO_CFG_S3C64XX 18 select S3C_GPIO_CFG_S3C64XX
18 select S3C_GPIO_PULL_UPDOWN 19 select S3C_GPIO_PULL_UPDOWN
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index a7c54b332d27..0ec09a9c36bd 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -16,4 +16,3 @@ obj-y += dev-uart.o
16obj-y += cpu.o 16obj-y += cpu.o
17obj-y += clock.o 17obj-y += clock.o
18obj-y += irq.o 18obj-y += irq.o
19obj-y += setup-i2c0.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index aa96e335073b..24a931fd8d3b 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -33,7 +33,12 @@ struct clk clk_ext_xtal_mux = {
33 .id = -1, 33 .id = -1,
34}; 34};
35 35
36static struct clk s5p_clk_27m = { 36struct clk clk_xusbxti = {
37 .name = "xusbxti",
38 .id = -1,
39};
40
41struct clk s5p_clk_27m = {
37 .name = "clk_27m", 42 .name = "clk_27m",
38 .id = -1, 43 .id = -1,
39 .rate = 27000000, 44 .rate = 27000000,
@@ -69,6 +74,13 @@ struct clk clk_fout_epll = {
69 .ctrlbit = (1 << 31), 74 .ctrlbit = (1 << 31),
70}; 75};
71 76
77/* VPLL clock output */
78struct clk clk_fout_vpll = {
79 .name = "fout_vpll",
80 .id = -1,
81 .ctrlbit = (1 << 31),
82};
83
72/* ARM clock */ 84/* ARM clock */
73struct clk clk_arm = { 85struct clk clk_arm = {
74 .name = "armclk", 86 .name = "armclk",
@@ -133,6 +145,7 @@ static struct clk *s5p_clks[] __initdata = {
133 &clk_fout_apll, 145 &clk_fout_apll,
134 &clk_fout_mpll, 146 &clk_fout_mpll,
135 &clk_fout_epll, 147 &clk_fout_epll,
148 &clk_fout_vpll,
136 &clk_arm, 149 &clk_arm,
137 &clk_vpll, 150 &clk_vpll,
138}; 151};
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 42e757f2e40c..9ff3d718be39 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -79,7 +79,7 @@
79#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) 79#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
80#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) 80#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
81 81
82#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x)) 82#define S5P_TIMER_IRQ(x) (11 + (x))
83 83
84#define IRQ_TIMER0 S5P_TIMER_IRQ(0) 84#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
85#define IRQ_TIMER1 S5P_TIMER_IRQ(1) 85#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
index d48325bb29e2..7db322726bc2 100644
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -81,3 +81,25 @@ static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
81 81
82 return result; 82 return result;
83} 83}
84
85#define PLL65XX_MDIV_MASK (0x3FF)
86#define PLL65XX_PDIV_MASK (0x3F)
87#define PLL65XX_SDIV_MASK (0x7)
88#define PLL65XX_MDIV_SHIFT (16)
89#define PLL65XX_PDIV_SHIFT (8)
90#define PLL65XX_SDIV_SHIFT (0)
91
92static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con)
93{
94 u32 mdiv, pdiv, sdiv;
95 u64 fvco = baseclk;
96
97 mdiv = (pll_con >> PLL65XX_MDIV_SHIFT) & PLL65XX_MDIV_MASK;
98 pdiv = (pll_con >> PLL65XX_PDIV_SHIFT) & PLL65XX_PDIV_MASK;
99 sdiv = (pll_con >> PLL65XX_SDIV_SHIFT) & PLL65XX_SDIV_MASK;
100
101 fvco *= mdiv;
102 do_div(fvco, (pdiv << sdiv));
103
104 return (unsigned long)fvco;
105}
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
index 56fb8b414d41..09418b1101fe 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -21,12 +21,16 @@
21#define clk_fin_mpll clk_ext_xtal_mux 21#define clk_fin_mpll clk_ext_xtal_mux
22#define clk_fin_epll clk_ext_xtal_mux 22#define clk_fin_epll clk_ext_xtal_mux
23#define clk_fin_vpll clk_ext_xtal_mux 23#define clk_fin_vpll clk_ext_xtal_mux
24#define clk_fin_hpll clk_ext_xtal_mux
24 25
25extern struct clk clk_ext_xtal_mux; 26extern struct clk clk_ext_xtal_mux;
27extern struct clk clk_xusbxti;
26extern struct clk clk_48m; 28extern struct clk clk_48m;
29extern struct clk s5p_clk_27m;
27extern struct clk clk_fout_apll; 30extern struct clk clk_fout_apll;
28extern struct clk clk_fout_mpll; 31extern struct clk clk_fout_mpll;
29extern struct clk clk_fout_epll; 32extern struct clk clk_fout_epll;
33extern struct clk clk_fout_vpll;
30extern struct clk clk_arm; 34extern struct clk clk_arm;
31extern struct clk clk_vpll; 35extern struct clk clk_vpll;
32 36
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index c7ccdf22eefa..c7bd2bbda239 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -16,9 +16,10 @@ config PLAT_S5PC1XX
16 select SAMSUNG_IRQ_VIC_TIMER 16 select SAMSUNG_IRQ_VIC_TIMER
17 select S3C_GPIO_TRACK 17 select S3C_GPIO_TRACK
18 select S3C_GPIO_PULL_UPDOWN 18 select S3C_GPIO_PULL_UPDOWN
19 select S5P_GPIO_DRVSTR
19 select S3C_GPIO_CFG_S3C24XX 20 select S3C_GPIO_CFG_S3C24XX
20 select S3C_GPIO_CFG_S3C64XX 21 select S3C_GPIO_CFG_S3C64XX
21 select S5P_GPIO_CFG_S5PC1XX 22 select SAMSUNG_GPIOLIB_4BIT
22 help 23 help
23 Base platform code for any Samsung S5PC1XX device 24 Base platform code for any Samsung S5PC1XX device
24 25
@@ -38,25 +39,6 @@ config CPU_S5PC100_CLOCK
38 39
39# platform specific device setup 40# platform specific device setup
40 41
41config S5PC1XX_SETUP_FB_24BPP
42 bool
43 help
44 Common setup code for S5PC1XX with an 24bpp RGB display helper.
45
46config S5PC1XX_SETUP_I2C0
47 bool
48 default y
49 help
50 Common setup code for i2c bus 0.
51
52 Note, currently since i2c0 is always compiled, this setup helper
53 is always compiled with it.
54
55config S5PC1XX_SETUP_I2C1
56 bool
57 help
58 Common setup code for i2c bus 1.
59
60config S5PC1XX_SETUP_SDHCI_GPIO 42config S5PC1XX_SETUP_SDHCI_GPIO
61 bool 43 bool
62 help 44 help
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile
index 278f26806089..9ce6409a9e02 100644
--- a/arch/arm/plat-s5pc1xx/Makefile
+++ b/arch/arm/plat-s5pc1xx/Makefile
@@ -13,9 +13,8 @@ obj- :=
13 13
14obj-y += dev-uart.o 14obj-y += dev-uart.o
15obj-y += cpu.o 15obj-y += cpu.o
16obj-y += irq.o irq-gpio.o irq-eint.o 16obj-y += irq.o
17obj-y += clock.o 17obj-y += clock.o
18obj-y += gpiolib.o
19 18
20# CPU support 19# CPU support
21 20
@@ -24,8 +23,4 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK) += s5pc100-clock.o
24 23
25# Device setup 24# Device setup
26 25
27obj-$(CONFIG_S5P_GPIO_CFG_S5PC1XX) += gpio-config.o
28obj-$(CONFIG_S5PC1XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
29obj-$(CONFIG_S5PC1XX_SETUP_I2C0) += setup-i2c0.o
30obj-$(CONFIG_S5PC1XX_SETUP_I2C1) += setup-i2c1.o
31obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 26obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/plat-s5pc1xx/gpio-config.c b/arch/arm/plat-s5pc1xx/gpio-config.c
deleted file mode 100644
index a4f67e80a150..000000000000
--- a/arch/arm/plat-s5pc1xx/gpio-config.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* linux/arch/arm/plat-s5pc1xx/gpio-config.c
2 *
3 * Copyright 2009 Samsung Electronics
4 *
5 * S5PC1XX GPIO Configuration.
6 *
7 * Based on plat-s3c64xx/gpio-config.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/gpio.h>
17#include <linux/io.h>
18
19#include <plat/gpio-core.h>
20#include <plat/gpio-cfg-s5pc1xx.h>
21
22s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off)
23{
24 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
25 void __iomem *reg;
26 int shift = off * 2;
27 u32 drvstr;
28
29 if (!chip)
30 return -EINVAL;
31
32 reg = chip->base + 0x0C;
33
34 drvstr = __raw_readl(reg);
35 drvstr = 0xffff & (0x3 << shift);
36 drvstr = drvstr >> shift;
37
38 return (__force s5p_gpio_drvstr_t)drvstr;
39}
40EXPORT_SYMBOL(s5p_gpio_get_drvstr);
41
42int s5p_gpio_set_drvstr(unsigned int pin, unsigned int off,
43 s5p_gpio_drvstr_t drvstr)
44{
45 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
46 void __iomem *reg;
47 int shift = off * 2;
48 u32 tmp;
49
50 if (!chip)
51 return -EINVAL;
52
53 reg = chip->base + 0x0C;
54
55 tmp = __raw_readl(reg);
56 tmp |= drvstr << shift;
57
58 __raw_writel(tmp, reg);
59
60 return 0;
61}
62EXPORT_SYMBOL(s5p_gpio_set_drvstr);
diff --git a/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h b/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h
deleted file mode 100644
index 72ad59f61efc..000000000000
--- a/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* linux/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg.h
2 *
3 * Copyright 2009 Samsung Electronic
4 *
5 * S5PC1XX Platform - GPIO pin configuration
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/* This file contains the necessary definitions to get the basic gpio
13 * pin configuration done such as setting a pin to input or output or
14 * changing the pull-{up,down} configurations.
15 */
16
17#ifndef __GPIO_CFG_S5PC1XX_H
18#define __GPIO_CFG_S5PC1XX_H __FILE__
19
20typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
21
22#define S5P_GPIO_DRVSTR_LV1 0x00
23#define S5P_GPIO_DRVSTR_LV2 0x01
24#define S5P_GPIO_DRVSTR_LV3 0x10
25#define S5P_GPIO_DRVSTR_LV4 0x11
26
27extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off);
28
29extern int s5p_gpio_set_drvstr(unsigned int pin, unsigned int off,
30 s5p_gpio_drvstr_t drvstr);
31
32#endif /* __GPIO_CFG_S5PC1XX_H */
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index d552c65fa1b0..229919e9744c 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -90,12 +90,6 @@ config S3C_GPIO_CFG_S3C64XX
90 Internal configuration to enable S3C64XX style GPIO configuration 90 Internal configuration to enable S3C64XX style GPIO configuration
91 functions. 91 functions.
92 92
93config S5P_GPIO_CFG_S5PC1XX
94 bool
95 help
96 Internal configuration to enable S5PC1XX style GPIO configuration
97 functions.
98
99config S3C_GPIO_PULL_UPDOWN 93config S3C_GPIO_PULL_UPDOWN
100 bool 94 bool
101 help 95 help
@@ -111,6 +105,12 @@ config S3C_GPIO_PULL_UP
111 help 105 help
112 Internal configuration to enable the correct GPIO pull helper 106 Internal configuration to enable the correct GPIO pull helper
113 107
108config S5P_GPIO_DRVSTR
109 bool
110 help
111 Internal configuration to get and set correct GPIO driver strength
112 helper
113
114config SAMSUNG_GPIO_EXTRA 114config SAMSUNG_GPIO_EXTRA
115 int "Number of additional GPIO pins" 115 int "Number of additional GPIO pins"
116 default 0 116 default 0
@@ -160,6 +160,11 @@ config S3C_DEV_HSMMC2
160 help 160 help
161 Compile in platform device definitions for HSMMC channel 2 161 Compile in platform device definitions for HSMMC channel 2
162 162
163config S3C_DEV_HWMON
164 bool
165 help
166 Compile in platform device definitions for HWMON
167
163config S3C_DEV_I2C1 168config S3C_DEV_I2C1
164 bool 169 bool
165 help 170 help
@@ -185,12 +190,27 @@ config S3C_DEV_NAND
185 help 190 help
186 Compile in platform device definition for NAND controller 191 Compile in platform device definition for NAND controller
187 192
193config S3C_DEV_RTC
194 bool
195 help
196 Complie in platform device definition for RTC
197
198config SAMSUNG_DEV_ADC
199 bool
200 help
201 Compile in platform device definition for ADC controller
202
188config S3C64XX_DEV_SPI 203config S3C64XX_DEV_SPI
189 bool 204 bool
190 help 205 help
191 Compile in platform device definitions for S3C64XX's type 206 Compile in platform device definitions for S3C64XX's type
192 SPI controllers. 207 SPI controllers.
193 208
209config SAMSUNG_DEV_TS
210 bool
211 help
212 Common in platform device definitions for touchscreen device
213
194# DMA 214# DMA
195 215
196config S3C_DMA 216config S3C_DMA
@@ -198,6 +218,12 @@ config S3C_DMA
198 help 218 help
199 Internal configuration for S3C DMA core 219 Internal configuration for S3C DMA core
200 220
221config S3C_PL330_DMA
222 bool
223 select PL330
224 help
225 S3C DMA API Driver for PL330 DMAC.
226
201comment "Power management" 227comment "Power management"
202 228
203config SAMSUNG_PM_DEBUG 229config SAMSUNG_PM_DEBUG
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 22c89d08f6e5..48288499a3b9 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_S3C_ADC) += adc.o
33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o 33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o 34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
35obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o 35obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
36obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o
36obj-y += dev-i2c0.o 37obj-y += dev-i2c0.o
37obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o 38obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
38obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o 39obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
@@ -40,11 +41,17 @@ obj-y += dev-uart.o
40obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o 41obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
41obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o 42obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
42obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o 43obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
44obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o
45
46obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o
47obj-$(CONFIG_SAMSUNG_DEV_TS) += dev-ts.o
43 48
44# DMA support 49# DMA support
45 50
46obj-$(CONFIG_S3C_DMA) += dma.o 51obj-$(CONFIG_S3C_DMA) += dma.o
47 52
53obj-$(CONFIG_S3C_PL330_DMA) += s3c-pl330.o
54
48# PM support 55# PM support
49 56
50obj-$(CONFIG_PM) += pm.o 57obj-$(CONFIG_PM) += pm.o
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 1b25c9d8c403..8bf79f3efdfb 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -376,6 +376,21 @@ void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
376 } 376 }
377} 377}
378 378
379/**
380 * s3c_disable_clocks() - disable an array of clocks
381 * @clkp: Pointer to the first clock in the array.
382 * @nr_clks: Number of clocks to register.
383 *
384 * for internal use only at initialisation time. disable the clocks in the
385 * @clkp array.
386 */
387
388void __init s3c_disable_clocks(struct clk *clkp, int nr_clks)
389{
390 for (; nr_clks > 0; nr_clks--, clkp++)
391 (clkp->enable)(clkp, 0);
392}
393
379/* initalise all the clocks */ 394/* initalise all the clocks */
380 395
381int __init s3c24xx_register_baseclocks(unsigned long xtal) 396int __init s3c24xx_register_baseclocks(unsigned long xtal)
diff --git a/arch/arm/mach-s3c64xx/dev-adc.c b/arch/arm/plat-samsung/dev-adc.c
index fafef9b6bcfa..9d903d4095ed 100644
--- a/arch/arm/mach-s3c64xx/dev-adc.c
+++ b/arch/arm/plat-samsung/dev-adc.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/dev-adc.c 1/* linux/arch/arm/plat-samsung/dev-adc.c
2 * 2 *
3 * Copyright 2010 Maurus Cuelenaere 3 * Copyright 2010 Maurus Cuelenaere
4 * 4 *
@@ -22,8 +22,8 @@
22 22
23static struct resource s3c_adc_resource[] = { 23static struct resource s3c_adc_resource[] = {
24 [0] = { 24 [0] = {
25 .start = S3C64XX_PA_ADC, 25 .start = SAMSUNG_PA_ADC,
26 .end = S3C64XX_PA_ADC + SZ_256 - 1, 26 .end = SAMSUNG_PA_ADC + SZ_256 - 1,
27 .flags = IORESOURCE_MEM, 27 .flags = IORESOURCE_MEM,
28 }, 28 },
29 [1] = { 29 [1] = {
@@ -39,7 +39,7 @@ static struct resource s3c_adc_resource[] = {
39}; 39};
40 40
41struct platform_device s3c_device_adc = { 41struct platform_device s3c_device_adc = {
42 .name = "s3c64xx-adc", 42 .name = "samsung-adc",
43 .id = -1, 43 .id = -1,
44 .num_resources = ARRAY_SIZE(s3c_adc_resource), 44 .num_resources = ARRAY_SIZE(s3c_adc_resource),
45 .resource = s3c_adc_resource, 45 .resource = s3c_adc_resource,
diff --git a/arch/arm/plat-samsung/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c
index 002a15f313f3..bf60204c6297 100644
--- a/arch/arm/plat-samsung/dev-fb.c
+++ b/arch/arm/plat-samsung/dev-fb.c
@@ -19,7 +19,6 @@
19 19
20#include <mach/irqs.h> 20#include <mach/irqs.h>
21#include <mach/map.h> 21#include <mach/map.h>
22#include <mach/regs-fb.h>
23 22
24#include <plat/fb.h> 23#include <plat/fb.h>
25#include <plat/devs.h> 24#include <plat/devs.h>
diff --git a/arch/arm/plat-samsung/dev-hwmon.c b/arch/arm/plat-samsung/dev-hwmon.c
new file mode 100644
index 000000000000..b3ffb9587250
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -0,0 +1,42 @@
1/* linux/arch/arm/plat-samsung/dev-hwmon.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Adapted for HWMON by Maurus Cuelenaere
8 *
9 * Samsung series device definition for HWMON
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <plat/devs.h>
20#include <plat/hwmon.h>
21
22struct platform_device s3c_device_hwmon = {
23 .name = "s3c-hwmon",
24 .id = -1,
25 .dev.parent = &s3c_device_adc.dev,
26};
27
28void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
29{
30 struct s3c_hwmon_pdata *npd;
31
32 if (!pd) {
33 printk(KERN_ERR "%s: no platform data\n", __func__);
34 return;
35 }
36
37 npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
38 if (!npd)
39 printk(KERN_ERR "%s: no memory for platform data\n", __func__);
40
41 s3c_device_hwmon.dev.platform_data = npd;
42}
diff --git a/arch/arm/mach-s3c64xx/dev-rtc.c b/arch/arm/plat-samsung/dev-rtc.c
index b9e7a05f0129..bf4e2267333c 100644
--- a/arch/arm/mach-s3c64xx/dev-rtc.c
+++ b/arch/arm/plat-samsung/dev-rtc.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/dev-rtc.c 1/* linux/arch/arm/plat-samsung/dev-rtc.c
2 * 2 *
3 * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com> 3 * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com>
4 * 4 *
@@ -18,26 +18,26 @@
18 18
19static struct resource s3c_rtc_resource[] = { 19static struct resource s3c_rtc_resource[] = {
20 [0] = { 20 [0] = {
21 .start = S3C64XX_PA_RTC, 21 .start = S3C_PA_RTC,
22 .end = S3C64XX_PA_RTC + 0xff, 22 .end = S3C_PA_RTC + 0xff,
23 .flags = IORESOURCE_MEM, 23 .flags = IORESOURCE_MEM,
24 }, 24 },
25 [1] = { 25 [1] = {
26 .start = IRQ_RTC_ALARM, 26 .start = IRQ_RTC_ALARM,
27 .end = IRQ_RTC_ALARM, 27 .end = IRQ_RTC_ALARM,
28 .flags = IORESOURCE_IRQ, 28 .flags = IORESOURCE_IRQ,
29 }, 29 },
30 [2] = { 30 [2] = {
31 .start = IRQ_RTC_TIC, 31 .start = IRQ_RTC_TIC,
32 .end = IRQ_RTC_TIC, 32 .end = IRQ_RTC_TIC,
33 .flags = IORESOURCE_IRQ 33 .flags = IORESOURCE_IRQ
34 } 34 }
35}; 35};
36 36
37struct platform_device s3c_device_rtc = { 37struct platform_device s3c_device_rtc = {
38 .name = "s3c64xx-rtc", 38 .name = "s3c64xx-rtc",
39 .id = -1, 39 .id = -1,
40 .num_resources = ARRAY_SIZE(s3c_rtc_resource), 40 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
41 .resource = s3c_rtc_resource, 41 .resource = s3c_rtc_resource,
42}; 42};
43EXPORT_SYMBOL(s3c_device_rtc); 43EXPORT_SYMBOL(s3c_device_rtc);
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c
new file mode 100644
index 000000000000..236ef8427d7d
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-ts.c
@@ -0,0 +1,61 @@
1/* linux/arch/arm/mach-s3c64xx/dev-ts.c
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
6 *
7 * Adapted by Maurus Cuelenaere for s3c64xx
8 *
9 * S3C64XX series device definition for touchscreen device
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/kernel.h>
17#include <linux/string.h>
18#include <linux/platform_device.h>
19
20#include <mach/irqs.h>
21#include <mach/map.h>
22
23#include <plat/devs.h>
24#include <plat/ts.h>
25
26static struct resource s3c_ts_resource[] = {
27 [0] = {
28 .start = SAMSUNG_PA_ADC,
29 .end = SAMSUNG_PA_ADC + SZ_256 - 1,
30 .flags = IORESOURCE_MEM,
31 },
32 [1] = {
33 .start = IRQ_TC,
34 .end = IRQ_TC,
35 .flags = IORESOURCE_IRQ,
36 },
37};
38
39struct platform_device s3c_device_ts = {
40 .name = "s3c64xx-ts",
41 .id = -1,
42 .num_resources = ARRAY_SIZE(s3c_ts_resource),
43 .resource = s3c_ts_resource,
44};
45
46void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
47{
48 struct s3c2410_ts_mach_info *npd;
49
50 if (!pd) {
51 printk(KERN_ERR "%s: no platform data\n", __func__);
52 return;
53 }
54
55 npd = kmemdup(pd, sizeof(struct s3c2410_ts_mach_info), GFP_KERNEL);
56 if (!npd)
57 printk(KERN_ERR "%s: no memory for platform data\n", __func__);
58
59 s3c_device_ts.dev.platform_data = npd;
60}
61EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 44a84e896546..57b68a50f45e 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -1,7 +1,7 @@
1/* linux/arch/arm/plat-s3c/gpio-config.c 1/* linux/arch/arm/plat-s3c/gpio-config.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008-2010 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
@@ -33,14 +33,34 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
33 33
34 offset = pin - chip->chip.base; 34 offset = pin - chip->chip.base;
35 35
36 local_irq_save(flags); 36 s3c_gpio_lock(chip, flags);
37 ret = s3c_gpio_do_setcfg(chip, offset, config); 37 ret = s3c_gpio_do_setcfg(chip, offset, config);
38 local_irq_restore(flags); 38 s3c_gpio_unlock(chip, flags);
39 39
40 return ret; 40 return ret;
41} 41}
42EXPORT_SYMBOL(s3c_gpio_cfgpin); 42EXPORT_SYMBOL(s3c_gpio_cfgpin);
43 43
44unsigned s3c_gpio_getcfg(unsigned int pin)
45{
46 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
47 unsigned long flags;
48 unsigned ret = 0;
49 int offset;
50
51 if (chip) {
52 offset = pin - chip->chip.base;
53
54 s3c_gpio_lock(chip, flags);
55 ret = s3c_gpio_do_getcfg(chip, offset);
56 s3c_gpio_unlock(chip, flags);
57 }
58
59 return ret;
60}
61EXPORT_SYMBOL(s3c_gpio_getcfg);
62
63
44int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) 64int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
45{ 65{
46 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); 66 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
@@ -52,17 +72,17 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
52 72
53 offset = pin - chip->chip.base; 73 offset = pin - chip->chip.base;
54 74
55 local_irq_save(flags); 75 s3c_gpio_lock(chip, flags);
56 ret = s3c_gpio_do_setpull(chip, offset, pull); 76 ret = s3c_gpio_do_setpull(chip, offset, pull);
57 local_irq_restore(flags); 77 s3c_gpio_unlock(chip, flags);
58 78
59 return ret; 79 return ret;
60} 80}
61EXPORT_SYMBOL(s3c_gpio_setpull); 81EXPORT_SYMBOL(s3c_gpio_setpull);
62 82
63#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX 83#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
64int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip, 84int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
65 unsigned int off, unsigned int cfg) 85 unsigned int off, unsigned int cfg)
66{ 86{
67 void __iomem *reg = chip->base; 87 void __iomem *reg = chip->base;
68 unsigned int shift = off; 88 unsigned int shift = off;
@@ -87,6 +107,19 @@ int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
87 return 0; 107 return 0;
88} 108}
89 109
110unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
111 unsigned int off)
112{
113 u32 con;
114
115 con = __raw_readl(chip->base);
116 con >>= off;
117 con &= 1;
118 con++;
119
120 return S3C_GPIO_SFN(con);
121}
122
90int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, 123int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
91 unsigned int off, unsigned int cfg) 124 unsigned int off, unsigned int cfg)
92{ 125{
@@ -109,6 +142,19 @@ int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
109 142
110 return 0; 143 return 0;
111} 144}
145
146unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
147 unsigned int off)
148{
149 u32 con;
150
151 con = __raw_readl(chip->base);
152 con >>= off * 2;
153 con &= 3;
154
155 /* this conversion works for IN and OUT as well as special mode */
156 return S3C_GPIO_SPECIAL(con);
157}
112#endif 158#endif
113 159
114#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX 160#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
@@ -134,6 +180,25 @@ int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
134 180
135 return 0; 181 return 0;
136} 182}
183
184unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
185 unsigned int off)
186{
187 void __iomem *reg = chip->base;
188 unsigned int shift = (off & 7) * 4;
189 u32 con;
190
191 if (off < 8 && chip->chip.ngpio > 8)
192 reg -= 4;
193
194 con = __raw_readl(reg);
195 con >>= shift;
196 con &= 0xf;
197
198 /* this conversion works for IN and OUT as well as special mode */
199 return S3C_GPIO_SPECIAL(con);
200}
201
137#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */ 202#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
138 203
139#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN 204#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
@@ -164,3 +229,83 @@ s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
164 return (__force s3c_gpio_pull_t)pup; 229 return (__force s3c_gpio_pull_t)pup;
165} 230}
166#endif 231#endif
232
233#ifdef CONFIG_S3C_GPIO_PULL_UP
234int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
235 unsigned int off, s3c_gpio_pull_t pull)
236{
237 void __iomem *reg = chip->base + 0x08;
238 u32 pup = __raw_readl(reg);
239
240 pup = __raw_readl(reg);
241
242 if (pup == S3C_GPIO_PULL_UP)
243 pup &= ~(1 << off);
244 else if (pup == S3C_GPIO_PULL_NONE)
245 pup |= (1 << off);
246 else
247 return -EINVAL;
248
249 __raw_writel(pup, reg);
250 return 0;
251}
252
253s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
254 unsigned int off)
255{
256 void __iomem *reg = chip->base + 0x08;
257 u32 pup = __raw_readl(reg);
258
259 pup &= (1 << off);
260 return pup ? S3C_GPIO_PULL_NONE : S3C_GPIO_PULL_UP;
261}
262#endif /* CONFIG_S3C_GPIO_PULL_UP */
263
264#ifdef CONFIG_S5P_GPIO_DRVSTR
265s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
266{
267 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
268 unsigned int off;
269 void __iomem *reg;
270 int shift;
271 u32 drvstr;
272
273 if (!chip)
274 return -EINVAL;
275
276 off = chip->chip.base - pin;
277 shift = off * 2;
278 reg = chip->base + 0x0C;
279
280 drvstr = __raw_readl(reg);
281 drvstr = 0xffff & (0x3 << shift);
282 drvstr = drvstr >> shift;
283
284 return (__force s5p_gpio_drvstr_t)drvstr;
285}
286EXPORT_SYMBOL(s5p_gpio_get_drvstr);
287
288int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr)
289{
290 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
291 unsigned int off;
292 void __iomem *reg;
293 int shift;
294 u32 tmp;
295
296 if (!chip)
297 return -EINVAL;
298
299 off = chip->chip.base - pin;
300 shift = off * 2;
301 reg = chip->base + 0x0C;
302
303 tmp = __raw_readl(reg);
304 tmp |= drvstr << shift;
305
306 __raw_writel(tmp, reg);
307
308 return 0;
309}
310EXPORT_SYMBOL(s5p_gpio_set_drvstr);
311#endif /* CONFIG_S5P_GPIO_DRVSTR */
diff --git a/arch/arm/plat-samsung/gpio.c b/arch/arm/plat-samsung/gpio.c
index 28d2ab8a08db..b83a83351cea 100644
--- a/arch/arm/plat-samsung/gpio.c
+++ b/arch/arm/plat-samsung/gpio.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/spinlock.h>
18 19
19#include <plat/gpio-core.h> 20#include <plat/gpio-core.h>
20 21
@@ -52,14 +53,14 @@ static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
52 unsigned long flags; 53 unsigned long flags;
53 unsigned long con; 54 unsigned long con;
54 55
55 local_irq_save(flags); 56 s3c_gpio_lock(ourchip, flags);
56 57
57 con = __raw_readl(base + 0x00); 58 con = __raw_readl(base + 0x00);
58 con &= ~(3 << (offset * 2)); 59 con &= ~(3 << (offset * 2));
59 60
60 __raw_writel(con, base + 0x00); 61 __raw_writel(con, base + 0x00);
61 62
62 local_irq_restore(flags); 63 s3c_gpio_unlock(ourchip, flags);
63 return 0; 64 return 0;
64} 65}
65 66
@@ -72,7 +73,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
72 unsigned long dat; 73 unsigned long dat;
73 unsigned long con; 74 unsigned long con;
74 75
75 local_irq_save(flags); 76 s3c_gpio_lock(ourchip, flags);
76 77
77 dat = __raw_readl(base + 0x04); 78 dat = __raw_readl(base + 0x04);
78 dat &= ~(1 << offset); 79 dat &= ~(1 << offset);
@@ -87,7 +88,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
87 __raw_writel(con, base + 0x00); 88 __raw_writel(con, base + 0x00);
88 __raw_writel(dat, base + 0x04); 89 __raw_writel(dat, base + 0x04);
89 90
90 local_irq_restore(flags); 91 s3c_gpio_unlock(ourchip, flags);
91 return 0; 92 return 0;
92} 93}
93 94
@@ -99,7 +100,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
99 unsigned long flags; 100 unsigned long flags;
100 unsigned long dat; 101 unsigned long dat;
101 102
102 local_irq_save(flags); 103 s3c_gpio_lock(ourchip, flags);
103 104
104 dat = __raw_readl(base + 0x04); 105 dat = __raw_readl(base + 0x04);
105 dat &= ~(1 << offset); 106 dat &= ~(1 << offset);
@@ -107,7 +108,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
107 dat |= 1 << offset; 108 dat |= 1 << offset;
108 __raw_writel(dat, base + 0x04); 109 __raw_writel(dat, base + 0x04);
109 110
110 local_irq_restore(flags); 111 s3c_gpio_unlock(ourchip, flags);
111} 112}
112 113
113static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) 114static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
@@ -131,6 +132,8 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
131 BUG_ON(!gc->label); 132 BUG_ON(!gc->label);
132 BUG_ON(!gc->ngpio); 133 BUG_ON(!gc->ngpio);
133 134
135 spin_lock_init(&chip->lock);
136
134 if (!gc->direction_input) 137 if (!gc->direction_input)
135 gc->direction_input = s3c_gpiolib_input; 138 gc->direction_input = s3c_gpiolib_input;
136 if (!gc->direction_output) 139 if (!gc->direction_output)
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 60b62692ac7a..0fbcd0effd8e 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -74,6 +74,7 @@ extern struct clk clk_ext;
74extern struct clk clk_h2; 74extern struct clk clk_h2;
75extern struct clk clk_27m; 75extern struct clk clk_27m;
76extern struct clk clk_48m; 76extern struct clk clk_48m;
77extern struct clk clk_xusbxti;
77 78
78extern int clk_default_setrate(struct clk *clk, unsigned long rate); 79extern int clk_default_setrate(struct clk *clk, unsigned long rate);
79extern struct clk_ops clk_ops_def_setrate; 80extern struct clk_ops clk_ops_def_setrate;
@@ -91,6 +92,7 @@ extern int s3c24xx_register_clock(struct clk *clk);
91extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); 92extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
92 93
93extern void s3c_register_clocks(struct clk *clk, int nr_clks); 94extern void s3c_register_clocks(struct clk *clk, int nr_clks);
95extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
94 96
95extern int s3c24xx_register_baseclocks(unsigned long xtal); 97extern int s3c24xx_register_baseclocks(unsigned long xtal);
96 98
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index d316b4a579f4..6412933d6fbb 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -73,11 +73,15 @@ extern struct sys_timer s3c24xx_timer;
73extern struct sysdev_class s3c2410_sysclass; 73extern struct sysdev_class s3c2410_sysclass;
74extern struct sysdev_class s3c2410a_sysclass; 74extern struct sysdev_class s3c2410a_sysclass;
75extern struct sysdev_class s3c2412_sysclass; 75extern struct sysdev_class s3c2412_sysclass;
76extern struct sysdev_class s3c2416_sysclass;
76extern struct sysdev_class s3c2440_sysclass; 77extern struct sysdev_class s3c2440_sysclass;
77extern struct sysdev_class s3c2442_sysclass; 78extern struct sysdev_class s3c2442_sysclass;
78extern struct sysdev_class s3c2443_sysclass; 79extern struct sysdev_class s3c2443_sysclass;
79extern struct sysdev_class s3c6410_sysclass; 80extern struct sysdev_class s3c6410_sysclass;
80extern struct sysdev_class s3c64xx_sysclass; 81extern struct sysdev_class s3c64xx_sysclass;
82extern struct sysdev_class s5p6440_sysclass;
83extern struct sysdev_class s5p6442_sysclass;
84extern struct sysdev_class s5pv210_sysclass;
81 85
82extern void (*s5pc1xx_idle)(void); 86extern void (*s5pc1xx_idle)(void);
83 87
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 796d24258313..ef69e56b2885 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -64,6 +64,22 @@ extern struct platform_device s3c_device_nand;
64extern struct platform_device s3c_device_usbgadget; 64extern struct platform_device s3c_device_usbgadget;
65extern struct platform_device s3c_device_usb_hsotg; 65extern struct platform_device s3c_device_usb_hsotg;
66 66
67extern struct platform_device s5pv210_device_ac97;
68extern struct platform_device s5pv210_device_pcm0;
69extern struct platform_device s5pv210_device_pcm1;
70extern struct platform_device s5pv210_device_pcm2;
71extern struct platform_device s5pv210_device_iis0;
72extern struct platform_device s5pv210_device_iis1;
73extern struct platform_device s5pv210_device_iis2;
74
75extern struct platform_device s5p6442_device_pcm0;
76extern struct platform_device s5p6442_device_pcm1;
77extern struct platform_device s5p6442_device_iis0;
78extern struct platform_device s5p6442_device_iis1;
79
80extern struct platform_device s5p6440_device_pcm;
81extern struct platform_device s5p6440_device_iis;
82
67/* s3c2440 specific devices */ 83/* s3c2440 specific devices */
68 84
69#ifdef CONFIG_CPU_S3C2440 85#ifdef CONFIG_CPU_S3C2440
diff --git a/arch/arm/plat-samsung/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h
index 7584d751ed51..2e8f8c6560d7 100644
--- a/arch/arm/plat-samsung/include/plat/dma.h
+++ b/arch/arm/plat-samsung/include/plat/dma.h
@@ -110,8 +110,8 @@ extern int s3c2410_dma_config(unsigned int channel, int xferunit);
110 * configure the device we're talking to 110 * configure the device we're talking to
111*/ 111*/
112 112
113extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, 113extern int s3c2410_dma_devconfig(unsigned int channel,
114 unsigned long devaddr); 114 enum s3c2410_dmasrc source, unsigned long devaddr);
115 115
116/* s3c2410_dma_getposition 116/* s3c2410_dma_getposition
117 * 117 *
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index ffc01a76b7ce..1f85649d8c18 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -15,6 +15,13 @@
15#ifndef __PLAT_S3C_FB_H 15#ifndef __PLAT_S3C_FB_H
16#define __PLAT_S3C_FB_H __FILE__ 16#define __PLAT_S3C_FB_H __FILE__
17 17
18/* S3C_FB_MAX_WIN
19 * Set to the maximum number of windows that any of the supported hardware
20 * can use. Since the platform data uses this for an array size, having it
21 * set to the maximum of any version of the hardware can do is safe.
22 */
23#define S3C_FB_MAX_WIN (5)
24
18/** 25/**
19 * struct s3c_fb_pd_win - per window setup data 26 * struct s3c_fb_pd_win - per window setup data
20 * @win_mode: The display parameters to initialise (not for window 0) 27 * @win_mode: The display parameters to initialise (not for window 0)
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index dda19da037ad..3e21c75feefa 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -30,6 +30,12 @@ static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip,
30 return (chip->config->set_config)(chip, off, config); 30 return (chip->config->set_config)(chip, off, config);
31} 31}
32 32
33static inline unsigned s3c_gpio_do_getcfg(struct s3c_gpio_chip *chip,
34 unsigned int off)
35{
36 return (chip->config->get_config)(chip, off);
37}
38
33static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip, 39static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip,
34 unsigned int off, s3c_gpio_pull_t pull) 40 unsigned int off, s3c_gpio_pull_t pull)
35{ 41{
@@ -53,6 +59,18 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
53 unsigned int off, unsigned int cfg); 59 unsigned int off, unsigned int cfg);
54 60
55/** 61/**
62 * s3c_gpio_getcfg_s3c24xx - S3C24XX style GPIO configuration read.
63 * @chip: The gpio chip that is being configured.
64 * @off: The offset for the GPIO being configured.
65 *
66 * The reverse of s3c_gpio_setcfg_s3c24xx(). Will return a value whicg
67 * could be directly passed back to s3c_gpio_setcfg_s3c24xx(), from the
68 * S3C_GPIO_SPECIAL() macro.
69 */
70unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
71 unsigned int off);
72
73/**
56 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) 74 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A)
57 * @chip: The gpio chip that is being configured. 75 * @chip: The gpio chip that is being configured.
58 * @off: The offset for the GPIO being configured. 76 * @off: The offset for the GPIO being configured.
@@ -65,6 +83,21 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
65extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, 83extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
66 unsigned int off, unsigned int cfg); 84 unsigned int off, unsigned int cfg);
67 85
86
87/**
88 * s3c_gpio_getcfg_s3c24xx_a - S3C24XX style GPIO configuration read (Bank A)
89 * @chip: The gpio chip that is being configured.
90 * @off: The offset for the GPIO being configured.
91 *
92 * The reverse of s3c_gpio_setcfg_s3c24xx_a() turning an GPIO into a usable
93 * GPIO configuration value.
94 *
95 * @sa s3c_gpio_getcfg_s3c24xx
96 * @sa s3c_gpio_getcfg_s3c64xx_4bit
97 */
98extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
99 unsigned int off);
100
68/** 101/**
69 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. 102 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config.
70 * @chip: The gpio chip that is being configured. 103 * @chip: The gpio chip that is being configured.
@@ -85,6 +118,20 @@ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
85 unsigned int off, unsigned int cfg); 118 unsigned int off, unsigned int cfg);
86 119
87 120
121/**
122 * s3c_gpio_getcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config read.
123 * @chip: The gpio chip that is being configured.
124 * @off: The offset for the GPIO being configured.
125 *
126 * The reverse of s3c_gpio_setcfg_s3c64xx_4bit(), turning a gpio configuration
127 * register setting into a value the software can use, such as could be passed
128 * to s3c_gpio_setcfg_s3c64xx_4bit().
129 *
130 * @sa s3c_gpio_getcfg_s3c24xx
131 */
132extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
133 unsigned int off);
134
88/* Pull-{up,down} resistor controls. 135/* Pull-{up,down} resistor controls.
89 * 136 *
90 * S3C2410,S3C2440,S3C24A0 = Pull-UP, 137 * S3C2410,S3C2440,S3C24A0 = Pull-UP,
@@ -146,6 +193,17 @@ extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
146 unsigned int off); 193 unsigned int off);
147 194
148/** 195/**
196 * s3c_gpio_getpull_1up() - Get configuration for choice of up or none
197 * @chip: The gpio chip that the GPIO pin belongs to
198 * @off: The offset to the pin to get the configuration of.
199 *
200 * This helper function reads the state of the pull-up resistor for the
201 * given GPIO in the same case as s3c_gpio_setpull_1up.
202*/
203extern s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
204 unsigned int off);
205
206/**
149 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. 207 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443.
150 * @chip: The gpio chip that is being configured. 208 * @chip: The gpio chip that is being configured.
151 * @off: The offset for the GPIO being configured. 209 * @off: The offset for the GPIO being configured.
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 29cd6a86cade..34efdd2b032c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -25,6 +25,7 @@
25#define __PLAT_GPIO_CFG_H __FILE__ 25#define __PLAT_GPIO_CFG_H __FILE__
26 26
27typedef unsigned int __bitwise__ s3c_gpio_pull_t; 27typedef unsigned int __bitwise__ s3c_gpio_pull_t;
28typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
28 29
29/* forward declaration if gpio-core.h hasn't been included */ 30/* forward declaration if gpio-core.h hasn't been included */
30struct s3c_gpio_chip; 31struct s3c_gpio_chip;
@@ -77,6 +78,17 @@ struct s3c_gpio_cfg {
77 */ 78 */
78extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); 79extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
79 80
81/**
82 * s3c_gpio_getcfg - Read the current function for a GPIO pin
83 * @pin: The pin to read the configuration value for.
84 *
85 * Read the configuration state of the given @pin, returning a value that
86 * could be passed back to s3c_gpio_cfgpin().
87 *
88 * @sa s3c_gpio_cfgpin
89 */
90extern unsigned s3c_gpio_getcfg(unsigned int pin);
91
80/* Define values for the pull-{up,down} available for each gpio pin. 92/* Define values for the pull-{up,down} available for each gpio pin.
81 * 93 *
82 * These values control the state of the weak pull-{up,down} resistors 94 * These values control the state of the weak pull-{up,down} resistors
@@ -107,4 +119,33 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
107*/ 119*/
108extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); 120extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
109 121
122/* Define values for the drvstr available for each gpio pin.
123 *
124 * These values control the value of the output signal driver strength,
125 * configurable on most pins on the S5C series.
126 */
127#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x00)
128#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x01)
129#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x10)
130#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x11)
131
132/**
133 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
134 * @pin: The pin number to get the settings for
135 *
136 * Read the driver streght value for the specified pin.
137*/
138extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
139
140/**
141 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
142 * @pin: The pin number to configure the driver streght value
143 * @drvstr: The new value of the driver strength
144 *
145 * This function sets the driver strength value for the specified pin.
146 * It will return 0 if successfull, or a negative error code if the pin
147 * cannot support the requested setting.
148*/
149extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
150
110#endif /* __PLAT_GPIO_CFG_H */ 151#endif /* __PLAT_GPIO_CFG_H */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index 49ff406a7066..f3a68d1a07b9 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -44,16 +44,26 @@ struct s3c_gpio_cfg;
44 * @chip: The chip structure to be exported via gpiolib. 44 * @chip: The chip structure to be exported via gpiolib.
45 * @base: The base pointer to the gpio configuration registers. 45 * @base: The base pointer to the gpio configuration registers.
46 * @config: special function and pull-resistor control information. 46 * @config: special function and pull-resistor control information.
47 * @lock: Lock for exclusive access to this gpio bank.
47 * @pm_save: Save information for suspend/resume support. 48 * @pm_save: Save information for suspend/resume support.
48 * 49 *
49 * This wrapper provides the necessary information for the Samsung 50 * This wrapper provides the necessary information for the Samsung
50 * specific gpios being registered with gpiolib. 51 * specific gpios being registered with gpiolib.
52 *
53 * The lock protects each gpio bank from multiple access of the shared
54 * configuration registers, or from reading of data whilst another thread
55 * is writing to the register set.
56 *
57 * Each chip has its own lock to avoid any contention between different
58 * CPU cores trying to get one lock for different GPIO banks, where each
59 * bank of GPIO has its own register space and configuration registers.
51 */ 60 */
52struct s3c_gpio_chip { 61struct s3c_gpio_chip {
53 struct gpio_chip chip; 62 struct gpio_chip chip;
54 struct s3c_gpio_cfg *config; 63 struct s3c_gpio_cfg *config;
55 struct s3c_gpio_pm *pm; 64 struct s3c_gpio_pm *pm;
56 void __iomem *base; 65 void __iomem *base;
66 spinlock_t lock;
57#ifdef CONFIG_PM 67#ifdef CONFIG_PM
58 u32 pm_save[4]; 68 u32 pm_save[4];
59#endif 69#endif
@@ -108,6 +118,9 @@ extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
108extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); 118extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
109extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); 119extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
110 120
121/* exported for core SoC support to change */
122extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
123
111#ifdef CONFIG_S3C_GPIO_TRACK 124#ifdef CONFIG_S3C_GPIO_TRACK
112extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; 125extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
113 126
@@ -135,3 +148,7 @@ extern struct s3c_gpio_pm s3c_gpio_pm_4bit;
135#define __gpio_pm(x) NULL 148#define __gpio_pm(x) NULL
136 149
137#endif /* CONFIG_PM */ 150#endif /* CONFIG_PM */
151
152/* locking wrappers to deal with multiple access to the same gpio bank */
153#define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
154#define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
diff --git a/arch/arm/plat-samsung/include/plat/hwmon.h b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea0aa31..c167e4429bc7 100644
--- a/arch/arm/plat-samsung/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
@@ -37,5 +37,15 @@ struct s3c_hwmon_pdata {
37 struct s3c_hwmon_chcfg *in[8]; 37 struct s3c_hwmon_chcfg *in[8];
38}; 38};
39 39
40/**
41 * s3c_hwmon_set_platdata - Set platform data for S3C HWMON device
42 * @pd: Platform data to register to device.
43 *
44 * Register the given platform data for use with the S3C HWMON device.
45 * The call will copy the platform data, so the board definitions can
46 * make the structure itself __initdata.
47 */
48extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd);
49
40#endif /* __ASM_ARCH_ADC_HWMON_H */ 50#endif /* __ASM_ARCH_ADC_HWMON_H */
41 51
diff --git a/arch/arm/plat-samsung/include/plat/pll6553x.h b/arch/arm/plat-samsung/include/plat/pll6553x.h
new file mode 100644
index 000000000000..b8b7e1d884f8
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/pll6553x.h
@@ -0,0 +1,51 @@
1/* arch/arm/plat-samsung/include/plat/pll6553x.h
2 * partially from arch/arm/mach-s3c64xx/include/mach/pll.h
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * Samsung PLL6553x PLL code
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16/* S3C6400 and compatible (S3C2416, etc.) EPLL code */
17
18#define PLL6553X_MDIV_MASK ((1 << (23-16)) - 1)
19#define PLL6553X_PDIV_MASK ((1 << (13-8)) - 1)
20#define PLL6553X_SDIV_MASK ((1 << (2-0)) - 1)
21#define PLL6553X_MDIV_SHIFT (16)
22#define PLL6553X_PDIV_SHIFT (8)
23#define PLL6553X_SDIV_SHIFT (0)
24#define PLL6553X_KDIV_MASK (0xffff)
25
26static inline unsigned long s3c_get_pll6553x(unsigned long baseclk,
27 u32 pll0, u32 pll1)
28{
29 unsigned long result;
30 u32 mdiv, pdiv, sdiv, kdiv;
31 u64 tmp;
32
33 mdiv = (pll0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK;
34 pdiv = (pll0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK;
35 sdiv = (pll0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK;
36 kdiv = pll1 & PLL6553X_KDIV_MASK;
37
38 /* We need to multiple baseclk by mdiv (the integer part) and kdiv
39 * which is in 2^16ths, so shift mdiv up (does not overflow) and
40 * add kdiv before multiplying. The use of tmp is to avoid any
41 * overflows before shifting bac down into result when multipling
42 * by the mdiv and kdiv pair.
43 */
44
45 tmp = baseclk;
46 tmp *= (mdiv << 16) + kdiv;
47 do_div(tmp, (pdiv << sdiv));
48 result = tmp >> 16;
49
50 return result;
51}
diff --git a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
new file mode 100644
index 000000000000..5fe6721b57f7
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
@@ -0,0 +1,78 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#ifndef __S3C_DMA_PL330_H_
12#define __S3C_DMA_PL330_H_
13
14#define S3C2410_DMAF_AUTOSTART (1 << 0)
15#define S3C2410_DMAF_CIRCULAR (1 << 1)
16
17/*
18 * PL330 can assign any channel to communicate with
19 * any of the peripherals attched to the DMAC.
20 * For the sake of consistency across client drivers,
21 * We keep the channel names unchanged and only add
22 * missing peripherals are added.
23 * Order is not important since S3C PL330 API driver
24 * use these just as IDs.
25 */
26enum dma_ch {
27 DMACH_UART0_RX,
28 DMACH_UART0_TX,
29 DMACH_UART1_RX,
30 DMACH_UART1_TX,
31 DMACH_UART2_RX,
32 DMACH_UART2_TX,
33 DMACH_UART3_RX,
34 DMACH_UART3_TX,
35 DMACH_IRDA,
36 DMACH_I2S0_RX,
37 DMACH_I2S0_TX,
38 DMACH_I2S0S_TX,
39 DMACH_I2S1_RX,
40 DMACH_I2S1_TX,
41 DMACH_I2S2_RX,
42 DMACH_I2S2_TX,
43 DMACH_SPI0_RX,
44 DMACH_SPI0_TX,
45 DMACH_SPI1_RX,
46 DMACH_SPI1_TX,
47 DMACH_SPI2_RX,
48 DMACH_SPI2_TX,
49 DMACH_AC97_MICIN,
50 DMACH_AC97_PCMIN,
51 DMACH_AC97_PCMOUT,
52 DMACH_EXTERNAL,
53 DMACH_PWM,
54 DMACH_SPDIF,
55 DMACH_HSI_RX,
56 DMACH_HSI_TX,
57 DMACH_PCM0_TX,
58 DMACH_PCM0_RX,
59 DMACH_PCM1_TX,
60 DMACH_PCM1_RX,
61 DMACH_PCM2_TX,
62 DMACH_PCM2_RX,
63 DMACH_MSM_REQ3,
64 DMACH_MSM_REQ2,
65 DMACH_MSM_REQ1,
66 DMACH_MSM_REQ0,
67 /* END Marker, also used to denote a reserved channel */
68 DMACH_MAX,
69};
70
71static inline bool s3c_dma_has_circular(void)
72{
73 return true;
74}
75
76#include <plat/dma.h>
77
78#endif /* __S3C_DMA_PL330_H_ */
diff --git a/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h b/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h
new file mode 100644
index 000000000000..bf5e2a9d408d
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h
@@ -0,0 +1,32 @@
1/* linux/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __S3C_PL330_PDATA_H
13#define __S3C_PL330_PDATA_H
14
15#include <plat/s3c-dma-pl330.h>
16
17/*
18 * Every PL330 DMAC has max 32 peripheral interfaces,
19 * of which some may be not be really used in your
20 * DMAC's configuration.
21 * Populate this array of 32 peri i/fs with relevant
22 * channel IDs for used peri i/f and DMACH_MAX for
23 * those unused.
24 *
25 * The platforms just need to provide this info
26 * to the S3C DMA API driver for PL330.
27 */
28struct s3c_pl330_platdata {
29 enum dma_ch peri[32];
30};
31
32#endif /* __S3C_PL330_PDATA_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/ts.h b/arch/arm/plat-samsung/include/plat/ts.h
index dc361700d695..26fdb22e0fc2 100644
--- a/arch/arm/mach-s3c2410/include/mach/ts.h
+++ b/arch/arm/plat-samsung/include/plat/ts.h
@@ -1,4 +1,4 @@
1/* linux/include/asm/arch-s3c2410/ts.h 1/* arch/arm/plat-samsung/include/plat/ts.h
2 * 2 *
3 * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org> 3 * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
4 * 4 *
@@ -14,8 +14,12 @@ struct s3c2410_ts_mach_info {
14 int delay; 14 int delay;
15 int presc; 15 int presc;
16 int oversampling_shift; 16 int oversampling_shift;
17 void (*cfg_gpio)(struct platform_device *dev);
17}; 18};
18 19
19extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *); 20extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *);
20 21
22/* defined by architecture to configure gpio */
23extern void s3c24xx_ts_cfg_gpio(struct platform_device *dev);
24
21#endif /* __ASM_ARM_TS_H */ 25#endif /* __ASM_ARM_TS_H */
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index 69a4c7f02e25..d50ab9d2af53 100644
--- a/arch/arm/plat-samsung/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -329,7 +329,7 @@ void s3c_pm_save_gpios(void)
329 struct s3c_gpio_chip *ourchip; 329 struct s3c_gpio_chip *ourchip;
330 unsigned int gpio_nr; 330 unsigned int gpio_nr;
331 331
332 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { 332 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
333 ourchip = s3c_gpiolib_getchip(gpio_nr); 333 ourchip = s3c_gpiolib_getchip(gpio_nr);
334 if (!ourchip) 334 if (!ourchip)
335 continue; 335 continue;
@@ -367,7 +367,7 @@ void s3c_pm_restore_gpios(void)
367 struct s3c_gpio_chip *ourchip; 367 struct s3c_gpio_chip *ourchip;
368 unsigned int gpio_nr; 368 unsigned int gpio_nr;
369 369
370 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { 370 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
371 ourchip = s3c_gpiolib_getchip(gpio_nr); 371 ourchip = s3c_gpiolib_getchip(gpio_nr);
372 if (!ourchip) 372 if (!ourchip)
373 continue; 373 continue;
diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c
new file mode 100644
index 000000000000..a91305a60aed
--- /dev/null
+++ b/arch/arm/plat-samsung/s3c-pl330.c
@@ -0,0 +1,1224 @@
1/* linux/arch/arm/plat-samsung/s3c-pl330.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <linux/platform_device.h>
18
19#include <asm/hardware/pl330.h>
20
21#include <plat/s3c-pl330-pdata.h>
22
23/**
24 * struct s3c_pl330_dmac - Logical representation of a PL330 DMAC.
25 * @busy_chan: Number of channels currently busy.
26 * @peri: List of IDs of peripherals this DMAC can work with.
27 * @node: To attach to the global list of DMACs.
28 * @pi: PL330 configuration info for the DMAC.
29 * @kmcache: Pool to quickly allocate xfers for all channels in the dmac.
30 */
31struct s3c_pl330_dmac {
32 unsigned busy_chan;
33 enum dma_ch *peri;
34 struct list_head node;
35 struct pl330_info *pi;
36 struct kmem_cache *kmcache;
37};
38
39/**
40 * struct s3c_pl330_xfer - A request submitted by S3C DMA clients.
41 * @token: Xfer ID provided by the client.
42 * @node: To attach to the list of xfers on a channel.
43 * @px: Xfer for PL330 core.
44 * @chan: Owner channel of this xfer.
45 */
46struct s3c_pl330_xfer {
47 void *token;
48 struct list_head node;
49 struct pl330_xfer px;
50 struct s3c_pl330_chan *chan;
51};
52
53/**
54 * struct s3c_pl330_chan - Logical channel to communicate with
55 * a Physical peripheral.
56 * @pl330_chan_id: Token of a hardware channel thread of PL330 DMAC.
57 * NULL if the channel is available to be acquired.
58 * @id: ID of the peripheral that this channel can communicate with.
59 * @options: Options specified by the client.
60 * @sdaddr: Address provided via s3c2410_dma_devconfig.
61 * @node: To attach to the global list of channels.
62 * @lrq: Pointer to the last submitted pl330_req to PL330 core.
63 * @xfer_list: To manage list of xfers enqueued.
64 * @req: Two requests to communicate with the PL330 engine.
65 * @callback_fn: Callback function to the client.
66 * @rqcfg: Channel configuration for the xfers.
67 * @xfer_head: Pointer to the xfer to be next excecuted.
68 * @dmac: Pointer to the DMAC that manages this channel, NULL if the
69 * channel is available to be acquired.
70 * @client: Client of this channel. NULL if the
71 * channel is available to be acquired.
72 */
73struct s3c_pl330_chan {
74 void *pl330_chan_id;
75 enum dma_ch id;
76 unsigned int options;
77 unsigned long sdaddr;
78 struct list_head node;
79 struct pl330_req *lrq;
80 struct list_head xfer_list;
81 struct pl330_req req[2];
82 s3c2410_dma_cbfn_t callback_fn;
83 struct pl330_reqcfg rqcfg;
84 struct s3c_pl330_xfer *xfer_head;
85 struct s3c_pl330_dmac *dmac;
86 struct s3c2410_dma_client *client;
87};
88
89/* All DMACs in the platform */
90static LIST_HEAD(dmac_list);
91
92/* All channels to peripherals in the platform */
93static LIST_HEAD(chan_list);
94
95/*
96 * Since we add resources(DMACs and Channels) to the global pool,
97 * we need to guard access to the resources using a global lock
98 */
99static DEFINE_SPINLOCK(res_lock);
100
101/* Returns the channel with ID 'id' in the chan_list */
102static struct s3c_pl330_chan *id_to_chan(const enum dma_ch id)
103{
104 struct s3c_pl330_chan *ch;
105
106 list_for_each_entry(ch, &chan_list, node)
107 if (ch->id == id)
108 return ch;
109
110 return NULL;
111}
112
113/* Allocate a new channel with ID 'id' and add to chan_list */
114static void chan_add(const enum dma_ch id)
115{
116 struct s3c_pl330_chan *ch = id_to_chan(id);
117
118 /* Return if the channel already exists */
119 if (ch)
120 return;
121
122 ch = kmalloc(sizeof(*ch), GFP_KERNEL);
123 /* Return silently to work with other channels */
124 if (!ch)
125 return;
126
127 ch->id = id;
128 ch->dmac = NULL;
129
130 list_add_tail(&ch->node, &chan_list);
131}
132
133/* If the channel is not yet acquired by any client */
134static bool chan_free(struct s3c_pl330_chan *ch)
135{
136 if (!ch)
137 return false;
138
139 /* Channel points to some DMAC only when it's acquired */
140 return ch->dmac ? false : true;
141}
142
143/*
144 * Returns 0 is peripheral i/f is invalid or not present on the dmac.
145 * Index + 1, otherwise.
146 */
147static unsigned iface_of_dmac(struct s3c_pl330_dmac *dmac, enum dma_ch ch_id)
148{
149 enum dma_ch *id = dmac->peri;
150 int i;
151
152 /* Discount invalid markers */
153 if (ch_id == DMACH_MAX)
154 return 0;
155
156 for (i = 0; i < PL330_MAX_PERI; i++)
157 if (id[i] == ch_id)
158 return i + 1;
159
160 return 0;
161}
162
163/* If all channel threads of the DMAC are busy */
164static inline bool dmac_busy(struct s3c_pl330_dmac *dmac)
165{
166 struct pl330_info *pi = dmac->pi;
167
168 return (dmac->busy_chan < pi->pcfg.num_chan) ? false : true;
169}
170
171/*
172 * Returns the number of free channels that
173 * can be handled by this dmac only.
174 */
175static unsigned ch_onlyby_dmac(struct s3c_pl330_dmac *dmac)
176{
177 enum dma_ch *id = dmac->peri;
178 struct s3c_pl330_dmac *d;
179 struct s3c_pl330_chan *ch;
180 unsigned found, count = 0;
181 enum dma_ch p;
182 int i;
183
184 for (i = 0; i < PL330_MAX_PERI; i++) {
185 p = id[i];
186 ch = id_to_chan(p);
187
188 if (p == DMACH_MAX || !chan_free(ch))
189 continue;
190
191 found = 0;
192 list_for_each_entry(d, &dmac_list, node) {
193 if (d != dmac && iface_of_dmac(d, ch->id)) {
194 found = 1;
195 break;
196 }
197 }
198 if (!found)
199 count++;
200 }
201
202 return count;
203}
204
205/*
206 * Measure of suitability of 'dmac' handling 'ch'
207 *
208 * 0 indicates 'dmac' can not handle 'ch' either
209 * because it is not supported by the hardware or
210 * because all dmac channels are currently busy.
211 *
212 * >0 vlaue indicates 'dmac' has the capability.
213 * The bigger the value the more suitable the dmac.
214 */
215#define MAX_SUIT UINT_MAX
216#define MIN_SUIT 0
217
218static unsigned suitablility(struct s3c_pl330_dmac *dmac,
219 struct s3c_pl330_chan *ch)
220{
221 struct pl330_info *pi = dmac->pi;
222 enum dma_ch *id = dmac->peri;
223 struct s3c_pl330_dmac *d;
224 unsigned s;
225 int i;
226
227 s = MIN_SUIT;
228 /* If all the DMAC channel threads are busy */
229 if (dmac_busy(dmac))
230 return s;
231
232 for (i = 0; i < PL330_MAX_PERI; i++)
233 if (id[i] == ch->id)
234 break;
235
236 /* If the 'dmac' can't talk to 'ch' */
237 if (i == PL330_MAX_PERI)
238 return s;
239
240 s = MAX_SUIT;
241 list_for_each_entry(d, &dmac_list, node) {
242 /*
243 * If some other dmac can talk to this
244 * peri and has some channel free.
245 */
246 if (d != dmac && iface_of_dmac(d, ch->id) && !dmac_busy(d)) {
247 s = 0;
248 break;
249 }
250 }
251 if (s)
252 return s;
253
254 s = 100;
255
256 /* Good if free chans are more, bad otherwise */
257 s += (pi->pcfg.num_chan - dmac->busy_chan) - ch_onlyby_dmac(dmac);
258
259 return s;
260}
261
262/* More than one DMAC may have capability to transfer data with the
263 * peripheral. This function assigns most suitable DMAC to manage the
264 * channel and hence communicate with the peripheral.
265 */
266static struct s3c_pl330_dmac *map_chan_to_dmac(struct s3c_pl330_chan *ch)
267{
268 struct s3c_pl330_dmac *d, *dmac = NULL;
269 unsigned sn, sl = MIN_SUIT;
270
271 list_for_each_entry(d, &dmac_list, node) {
272 sn = suitablility(d, ch);
273
274 if (sn == MAX_SUIT)
275 return d;
276
277 if (sn > sl)
278 dmac = d;
279 }
280
281 return dmac;
282}
283
284/* Acquire the channel for peripheral 'id' */
285static struct s3c_pl330_chan *chan_acquire(const enum dma_ch id)
286{
287 struct s3c_pl330_chan *ch = id_to_chan(id);
288 struct s3c_pl330_dmac *dmac;
289
290 /* If the channel doesn't exist or is already acquired */
291 if (!ch || !chan_free(ch)) {
292 ch = NULL;
293 goto acq_exit;
294 }
295
296 dmac = map_chan_to_dmac(ch);
297 /* If couldn't map */
298 if (!dmac) {
299 ch = NULL;
300 goto acq_exit;
301 }
302
303 dmac->busy_chan++;
304 ch->dmac = dmac;
305
306acq_exit:
307 return ch;
308}
309
310/* Delete xfer from the queue */
311static inline void del_from_queue(struct s3c_pl330_xfer *xfer)
312{
313 struct s3c_pl330_xfer *t;
314 struct s3c_pl330_chan *ch;
315 int found;
316
317 if (!xfer)
318 return;
319
320 ch = xfer->chan;
321
322 /* Make sure xfer is in the queue */
323 found = 0;
324 list_for_each_entry(t, &ch->xfer_list, node)
325 if (t == xfer) {
326 found = 1;
327 break;
328 }
329
330 if (!found)
331 return;
332
333 /* If xfer is last entry in the queue */
334 if (xfer->node.next == &ch->xfer_list)
335 t = list_entry(ch->xfer_list.next,
336 struct s3c_pl330_xfer, node);
337 else
338 t = list_entry(xfer->node.next,
339 struct s3c_pl330_xfer, node);
340
341 /* If there was only one node left */
342 if (t == xfer)
343 ch->xfer_head = NULL;
344 else if (ch->xfer_head == xfer)
345 ch->xfer_head = t;
346
347 list_del(&xfer->node);
348}
349
350/* Provides pointer to the next xfer in the queue.
351 * If CIRCULAR option is set, the list is left intact,
352 * otherwise the xfer is removed from the list.
353 * Forced delete 'pluck' can be set to override the CIRCULAR option.
354 */
355static struct s3c_pl330_xfer *get_from_queue(struct s3c_pl330_chan *ch,
356 int pluck)
357{
358 struct s3c_pl330_xfer *xfer = ch->xfer_head;
359
360 if (!xfer)
361 return NULL;
362
363 /* If xfer is last entry in the queue */
364 if (xfer->node.next == &ch->xfer_list)
365 ch->xfer_head = list_entry(ch->xfer_list.next,
366 struct s3c_pl330_xfer, node);
367 else
368 ch->xfer_head = list_entry(xfer->node.next,
369 struct s3c_pl330_xfer, node);
370
371 if (pluck || !(ch->options & S3C2410_DMAF_CIRCULAR))
372 del_from_queue(xfer);
373
374 return xfer;
375}
376
377static inline void add_to_queue(struct s3c_pl330_chan *ch,
378 struct s3c_pl330_xfer *xfer, int front)
379{
380 struct pl330_xfer *xt;
381
382 /* If queue empty */
383 if (ch->xfer_head == NULL)
384 ch->xfer_head = xfer;
385
386 xt = &ch->xfer_head->px;
387 /* If the head already submitted (CIRCULAR head) */
388 if (ch->options & S3C2410_DMAF_CIRCULAR &&
389 (xt == ch->req[0].x || xt == ch->req[1].x))
390 ch->xfer_head = xfer;
391
392 /* If this is a resubmission, it should go at the head */
393 if (front) {
394 ch->xfer_head = xfer;
395 list_add(&xfer->node, &ch->xfer_list);
396 } else {
397 list_add_tail(&xfer->node, &ch->xfer_list);
398 }
399}
400
401static inline void _finish_off(struct s3c_pl330_xfer *xfer,
402 enum s3c2410_dma_buffresult res, int ffree)
403{
404 struct s3c_pl330_chan *ch;
405
406 if (!xfer)
407 return;
408
409 ch = xfer->chan;
410
411 /* Do callback */
412 if (ch->callback_fn)
413 ch->callback_fn(NULL, xfer->token, xfer->px.bytes, res);
414
415 /* Force Free or if buffer is not needed anymore */
416 if (ffree || !(ch->options & S3C2410_DMAF_CIRCULAR))
417 kmem_cache_free(ch->dmac->kmcache, xfer);
418}
419
420static inline int s3c_pl330_submit(struct s3c_pl330_chan *ch,
421 struct pl330_req *r)
422{
423 struct s3c_pl330_xfer *xfer;
424 int ret = 0;
425
426 /* If already submitted */
427 if (r->x)
428 return 0;
429
430 xfer = get_from_queue(ch, 0);
431 if (xfer) {
432 r->x = &xfer->px;
433
434 /* Use max bandwidth for M<->M xfers */
435 if (r->rqtype == MEMTOMEM) {
436 struct pl330_info *pi = xfer->chan->dmac->pi;
437 int burst = 1 << ch->rqcfg.brst_size;
438 u32 bytes = r->x->bytes;
439 int bl;
440
441 bl = pi->pcfg.data_bus_width / 8;
442 bl *= pi->pcfg.data_buf_dep;
443 bl /= burst;
444
445 /* src/dst_burst_len can't be more than 16 */
446 if (bl > 16)
447 bl = 16;
448
449 while (bl > 1) {
450 if (!(bytes % (bl * burst)))
451 break;
452 bl--;
453 }
454
455 ch->rqcfg.brst_len = bl;
456 } else {
457 ch->rqcfg.brst_len = 1;
458 }
459
460 ret = pl330_submit_req(ch->pl330_chan_id, r);
461
462 /* If submission was successful */
463 if (!ret) {
464 ch->lrq = r; /* latest submitted req */
465 return 0;
466 }
467
468 r->x = NULL;
469
470 /* If both of the PL330 ping-pong buffers filled */
471 if (ret == -EAGAIN) {
472 dev_err(ch->dmac->pi->dev, "%s:%d!\n",
473 __func__, __LINE__);
474 /* Queue back again */
475 add_to_queue(ch, xfer, 1);
476 ret = 0;
477 } else {
478 dev_err(ch->dmac->pi->dev, "%s:%d!\n",
479 __func__, __LINE__);
480 _finish_off(xfer, S3C2410_RES_ERR, 0);
481 }
482 }
483
484 return ret;
485}
486
487static void s3c_pl330_rq(struct s3c_pl330_chan *ch,
488 struct pl330_req *r, enum pl330_op_err err)
489{
490 unsigned long flags;
491 struct s3c_pl330_xfer *xfer;
492 struct pl330_xfer *xl = r->x;
493 enum s3c2410_dma_buffresult res;
494
495 spin_lock_irqsave(&res_lock, flags);
496
497 r->x = NULL;
498
499 s3c_pl330_submit(ch, r);
500
501 spin_unlock_irqrestore(&res_lock, flags);
502
503 /* Map result to S3C DMA API */
504 if (err == PL330_ERR_NONE)
505 res = S3C2410_RES_OK;
506 else if (err == PL330_ERR_ABORT)
507 res = S3C2410_RES_ABORT;
508 else
509 res = S3C2410_RES_ERR;
510
511 /* If last request had some xfer */
512 if (xl) {
513 xfer = container_of(xl, struct s3c_pl330_xfer, px);
514 _finish_off(xfer, res, 0);
515 } else {
516 dev_info(ch->dmac->pi->dev, "%s:%d No Xfer?!\n",
517 __func__, __LINE__);
518 }
519}
520
521static void s3c_pl330_rq0(void *token, enum pl330_op_err err)
522{
523 struct pl330_req *r = token;
524 struct s3c_pl330_chan *ch = container_of(r,
525 struct s3c_pl330_chan, req[0]);
526 s3c_pl330_rq(ch, r, err);
527}
528
529static void s3c_pl330_rq1(void *token, enum pl330_op_err err)
530{
531 struct pl330_req *r = token;
532 struct s3c_pl330_chan *ch = container_of(r,
533 struct s3c_pl330_chan, req[1]);
534 s3c_pl330_rq(ch, r, err);
535}
536
537/* Release an acquired channel */
538static void chan_release(struct s3c_pl330_chan *ch)
539{
540 struct s3c_pl330_dmac *dmac;
541
542 if (chan_free(ch))
543 return;
544
545 dmac = ch->dmac;
546 ch->dmac = NULL;
547 dmac->busy_chan--;
548}
549
550int s3c2410_dma_ctrl(enum dma_ch id, enum s3c2410_chan_op op)
551{
552 struct s3c_pl330_xfer *xfer;
553 enum pl330_chan_op pl330op;
554 struct s3c_pl330_chan *ch;
555 unsigned long flags;
556 int idx, ret;
557
558 spin_lock_irqsave(&res_lock, flags);
559
560 ch = id_to_chan(id);
561
562 if (!ch || chan_free(ch)) {
563 ret = -EINVAL;
564 goto ctrl_exit;
565 }
566
567 switch (op) {
568 case S3C2410_DMAOP_START:
569 /* Make sure both reqs are enqueued */
570 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
571 s3c_pl330_submit(ch, &ch->req[idx]);
572 s3c_pl330_submit(ch, &ch->req[1 - idx]);
573 pl330op = PL330_OP_START;
574 break;
575
576 case S3C2410_DMAOP_STOP:
577 pl330op = PL330_OP_ABORT;
578 break;
579
580 case S3C2410_DMAOP_FLUSH:
581 pl330op = PL330_OP_FLUSH;
582 break;
583
584 case S3C2410_DMAOP_PAUSE:
585 case S3C2410_DMAOP_RESUME:
586 case S3C2410_DMAOP_TIMEOUT:
587 case S3C2410_DMAOP_STARTED:
588 spin_unlock_irqrestore(&res_lock, flags);
589 return 0;
590
591 default:
592 spin_unlock_irqrestore(&res_lock, flags);
593 return -EINVAL;
594 }
595
596 ret = pl330_chan_ctrl(ch->pl330_chan_id, pl330op);
597
598 if (pl330op == PL330_OP_START) {
599 spin_unlock_irqrestore(&res_lock, flags);
600 return ret;
601 }
602
603 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
604
605 /* Abort the current xfer */
606 if (ch->req[idx].x) {
607 xfer = container_of(ch->req[idx].x,
608 struct s3c_pl330_xfer, px);
609
610 /* Drop xfer during FLUSH */
611 if (pl330op == PL330_OP_FLUSH)
612 del_from_queue(xfer);
613
614 ch->req[idx].x = NULL;
615
616 spin_unlock_irqrestore(&res_lock, flags);
617 _finish_off(xfer, S3C2410_RES_ABORT,
618 pl330op == PL330_OP_FLUSH ? 1 : 0);
619 spin_lock_irqsave(&res_lock, flags);
620 }
621
622 /* Flush the whole queue */
623 if (pl330op == PL330_OP_FLUSH) {
624
625 if (ch->req[1 - idx].x) {
626 xfer = container_of(ch->req[1 - idx].x,
627 struct s3c_pl330_xfer, px);
628
629 del_from_queue(xfer);
630
631 ch->req[1 - idx].x = NULL;
632
633 spin_unlock_irqrestore(&res_lock, flags);
634 _finish_off(xfer, S3C2410_RES_ABORT, 1);
635 spin_lock_irqsave(&res_lock, flags);
636 }
637
638 /* Finish off the remaining in the queue */
639 xfer = ch->xfer_head;
640 while (xfer) {
641
642 del_from_queue(xfer);
643
644 spin_unlock_irqrestore(&res_lock, flags);
645 _finish_off(xfer, S3C2410_RES_ABORT, 1);
646 spin_lock_irqsave(&res_lock, flags);
647
648 xfer = ch->xfer_head;
649 }
650 }
651
652ctrl_exit:
653 spin_unlock_irqrestore(&res_lock, flags);
654
655 return ret;
656}
657EXPORT_SYMBOL(s3c2410_dma_ctrl);
658
659int s3c2410_dma_enqueue(enum dma_ch id, void *token,
660 dma_addr_t addr, int size)
661{
662 struct s3c_pl330_chan *ch;
663 struct s3c_pl330_xfer *xfer;
664 unsigned long flags;
665 int idx, ret = 0;
666
667 spin_lock_irqsave(&res_lock, flags);
668
669 ch = id_to_chan(id);
670
671 /* Error if invalid or free channel */
672 if (!ch || chan_free(ch)) {
673 ret = -EINVAL;
674 goto enq_exit;
675 }
676
677 /* Error if size is unaligned */
678 if (ch->rqcfg.brst_size && size % (1 << ch->rqcfg.brst_size)) {
679 ret = -EINVAL;
680 goto enq_exit;
681 }
682
683 xfer = kmem_cache_alloc(ch->dmac->kmcache, GFP_ATOMIC);
684 if (!xfer) {
685 ret = -ENOMEM;
686 goto enq_exit;
687 }
688
689 xfer->token = token;
690 xfer->chan = ch;
691 xfer->px.bytes = size;
692 xfer->px.next = NULL; /* Single request */
693
694 /* For S3C DMA API, direction is always fixed for all xfers */
695 if (ch->req[0].rqtype == MEMTODEV) {
696 xfer->px.src_addr = addr;
697 xfer->px.dst_addr = ch->sdaddr;
698 } else {
699 xfer->px.src_addr = ch->sdaddr;
700 xfer->px.dst_addr = addr;
701 }
702
703 add_to_queue(ch, xfer, 0);
704
705 /* Try submitting on either request */
706 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
707
708 if (!ch->req[idx].x)
709 s3c_pl330_submit(ch, &ch->req[idx]);
710 else
711 s3c_pl330_submit(ch, &ch->req[1 - idx]);
712
713 spin_unlock_irqrestore(&res_lock, flags);
714
715 if (ch->options & S3C2410_DMAF_AUTOSTART)
716 s3c2410_dma_ctrl(id, S3C2410_DMAOP_START);
717
718 return 0;
719
720enq_exit:
721 spin_unlock_irqrestore(&res_lock, flags);
722
723 return ret;
724}
725EXPORT_SYMBOL(s3c2410_dma_enqueue);
726
727int s3c2410_dma_request(enum dma_ch id,
728 struct s3c2410_dma_client *client,
729 void *dev)
730{
731 struct s3c_pl330_dmac *dmac;
732 struct s3c_pl330_chan *ch;
733 unsigned long flags;
734 int ret = 0;
735
736 spin_lock_irqsave(&res_lock, flags);
737
738 ch = chan_acquire(id);
739 if (!ch) {
740 ret = -EBUSY;
741 goto req_exit;
742 }
743
744 dmac = ch->dmac;
745
746 ch->pl330_chan_id = pl330_request_channel(dmac->pi);
747 if (!ch->pl330_chan_id) {
748 chan_release(ch);
749 ret = -EBUSY;
750 goto req_exit;
751 }
752
753 ch->client = client;
754 ch->options = 0; /* Clear any option */
755 ch->callback_fn = NULL; /* Clear any callback */
756 ch->lrq = NULL;
757
758 ch->rqcfg.brst_size = 2; /* Default word size */
759 ch->rqcfg.swap = SWAP_NO;
760 ch->rqcfg.scctl = SCCTRL0; /* Noncacheable and nonbufferable */
761 ch->rqcfg.dcctl = DCCTRL0; /* Noncacheable and nonbufferable */
762 ch->rqcfg.privileged = 0;
763 ch->rqcfg.insnaccess = 0;
764
765 /* Set invalid direction */
766 ch->req[0].rqtype = DEVTODEV;
767 ch->req[1].rqtype = ch->req[0].rqtype;
768
769 ch->req[0].cfg = &ch->rqcfg;
770 ch->req[1].cfg = ch->req[0].cfg;
771
772 ch->req[0].peri = iface_of_dmac(dmac, id) - 1; /* Original index */
773 ch->req[1].peri = ch->req[0].peri;
774
775 ch->req[0].token = &ch->req[0];
776 ch->req[0].xfer_cb = s3c_pl330_rq0;
777 ch->req[1].token = &ch->req[1];
778 ch->req[1].xfer_cb = s3c_pl330_rq1;
779
780 ch->req[0].x = NULL;
781 ch->req[1].x = NULL;
782
783 /* Reset xfer list */
784 INIT_LIST_HEAD(&ch->xfer_list);
785 ch->xfer_head = NULL;
786
787req_exit:
788 spin_unlock_irqrestore(&res_lock, flags);
789
790 return ret;
791}
792EXPORT_SYMBOL(s3c2410_dma_request);
793
794int s3c2410_dma_free(enum dma_ch id, struct s3c2410_dma_client *client)
795{
796 struct s3c_pl330_chan *ch;
797 struct s3c_pl330_xfer *xfer;
798 unsigned long flags;
799 int ret = 0;
800 unsigned idx;
801
802 spin_lock_irqsave(&res_lock, flags);
803
804 ch = id_to_chan(id);
805
806 if (!ch || chan_free(ch))
807 goto free_exit;
808
809 /* Refuse if someone else wanted to free the channel */
810 if (ch->client != client) {
811 ret = -EBUSY;
812 goto free_exit;
813 }
814
815 /* Stop any active xfer, Flushe the queue and do callbacks */
816 pl330_chan_ctrl(ch->pl330_chan_id, PL330_OP_FLUSH);
817
818 /* Abort the submitted requests */
819 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
820
821 if (ch->req[idx].x) {
822 xfer = container_of(ch->req[idx].x,
823 struct s3c_pl330_xfer, px);
824
825 ch->req[idx].x = NULL;
826 del_from_queue(xfer);
827
828 spin_unlock_irqrestore(&res_lock, flags);
829 _finish_off(xfer, S3C2410_RES_ABORT, 1);
830 spin_lock_irqsave(&res_lock, flags);
831 }
832
833 if (ch->req[1 - idx].x) {
834 xfer = container_of(ch->req[1 - idx].x,
835 struct s3c_pl330_xfer, px);
836
837 ch->req[1 - idx].x = NULL;
838 del_from_queue(xfer);
839
840 spin_unlock_irqrestore(&res_lock, flags);
841 _finish_off(xfer, S3C2410_RES_ABORT, 1);
842 spin_lock_irqsave(&res_lock, flags);
843 }
844
845 /* Pluck and Abort the queued requests in order */
846 do {
847 xfer = get_from_queue(ch, 1);
848
849 spin_unlock_irqrestore(&res_lock, flags);
850 _finish_off(xfer, S3C2410_RES_ABORT, 1);
851 spin_lock_irqsave(&res_lock, flags);
852 } while (xfer);
853
854 ch->client = NULL;
855
856 pl330_release_channel(ch->pl330_chan_id);
857
858 ch->pl330_chan_id = NULL;
859
860 chan_release(ch);
861
862free_exit:
863 spin_unlock_irqrestore(&res_lock, flags);
864
865 return ret;
866}
867EXPORT_SYMBOL(s3c2410_dma_free);
868
869int s3c2410_dma_config(enum dma_ch id, int xferunit)
870{
871 struct s3c_pl330_chan *ch;
872 struct pl330_info *pi;
873 unsigned long flags;
874 int i, dbwidth, ret = 0;
875
876 spin_lock_irqsave(&res_lock, flags);
877
878 ch = id_to_chan(id);
879
880 if (!ch || chan_free(ch)) {
881 ret = -EINVAL;
882 goto cfg_exit;
883 }
884
885 pi = ch->dmac->pi;
886 dbwidth = pi->pcfg.data_bus_width / 8;
887
888 /* Max size of xfer can be pcfg.data_bus_width */
889 if (xferunit > dbwidth) {
890 ret = -EINVAL;
891 goto cfg_exit;
892 }
893
894 i = 0;
895 while (xferunit != (1 << i))
896 i++;
897
898 /* If valid value */
899 if (xferunit == (1 << i))
900 ch->rqcfg.brst_size = i;
901 else
902 ret = -EINVAL;
903
904cfg_exit:
905 spin_unlock_irqrestore(&res_lock, flags);
906
907 return ret;
908}
909EXPORT_SYMBOL(s3c2410_dma_config);
910
911/* Options that are supported by this driver */
912#define S3C_PL330_FLAGS (S3C2410_DMAF_CIRCULAR | S3C2410_DMAF_AUTOSTART)
913
914int s3c2410_dma_setflags(enum dma_ch id, unsigned int options)
915{
916 struct s3c_pl330_chan *ch;
917 unsigned long flags;
918 int ret = 0;
919
920 spin_lock_irqsave(&res_lock, flags);
921
922 ch = id_to_chan(id);
923
924 if (!ch || chan_free(ch) || options & ~(S3C_PL330_FLAGS))
925 ret = -EINVAL;
926 else
927 ch->options = options;
928
929 spin_unlock_irqrestore(&res_lock, flags);
930
931 return 0;
932}
933EXPORT_SYMBOL(s3c2410_dma_setflags);
934
935int s3c2410_dma_set_buffdone_fn(enum dma_ch id, s3c2410_dma_cbfn_t rtn)
936{
937 struct s3c_pl330_chan *ch;
938 unsigned long flags;
939 int ret = 0;
940
941 spin_lock_irqsave(&res_lock, flags);
942
943 ch = id_to_chan(id);
944
945 if (!ch || chan_free(ch))
946 ret = -EINVAL;
947 else
948 ch->callback_fn = rtn;
949
950 spin_unlock_irqrestore(&res_lock, flags);
951
952 return ret;
953}
954EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn);
955
956int s3c2410_dma_devconfig(enum dma_ch id, enum s3c2410_dmasrc source,
957 unsigned long address)
958{
959 struct s3c_pl330_chan *ch;
960 unsigned long flags;
961 int ret = 0;
962
963 spin_lock_irqsave(&res_lock, flags);
964
965 ch = id_to_chan(id);
966
967 if (!ch || chan_free(ch)) {
968 ret = -EINVAL;
969 goto devcfg_exit;
970 }
971
972 switch (source) {
973 case S3C2410_DMASRC_HW: /* P->M */
974 ch->req[0].rqtype = DEVTOMEM;
975 ch->req[1].rqtype = DEVTOMEM;
976 ch->rqcfg.src_inc = 0;
977 ch->rqcfg.dst_inc = 1;
978 break;
979 case S3C2410_DMASRC_MEM: /* M->P */
980 ch->req[0].rqtype = MEMTODEV;
981 ch->req[1].rqtype = MEMTODEV;
982 ch->rqcfg.src_inc = 1;
983 ch->rqcfg.dst_inc = 0;
984 break;
985 default:
986 ret = -EINVAL;
987 goto devcfg_exit;
988 }
989
990 ch->sdaddr = address;
991
992devcfg_exit:
993 spin_unlock_irqrestore(&res_lock, flags);
994
995 return ret;
996}
997EXPORT_SYMBOL(s3c2410_dma_devconfig);
998
999int s3c2410_dma_getposition(enum dma_ch id, dma_addr_t *src, dma_addr_t *dst)
1000{
1001 struct s3c_pl330_chan *ch = id_to_chan(id);
1002 struct pl330_chanstatus status;
1003 int ret;
1004
1005 if (!ch || chan_free(ch))
1006 return -EINVAL;
1007
1008 ret = pl330_chan_status(ch->pl330_chan_id, &status);
1009 if (ret < 0)
1010 return ret;
1011
1012 *src = status.src_addr;
1013 *dst = status.dst_addr;
1014
1015 return 0;
1016}
1017EXPORT_SYMBOL(s3c2410_dma_getposition);
1018
1019static irqreturn_t pl330_irq_handler(int irq, void *data)
1020{
1021 if (pl330_update(data))
1022 return IRQ_HANDLED;
1023 else
1024 return IRQ_NONE;
1025}
1026
1027static int pl330_probe(struct platform_device *pdev)
1028{
1029 struct s3c_pl330_dmac *s3c_pl330_dmac;
1030 struct s3c_pl330_platdata *pl330pd;
1031 struct pl330_info *pl330_info;
1032 struct resource *res;
1033 int i, ret, irq;
1034
1035 pl330pd = pdev->dev.platform_data;
1036
1037 /* Can't do without the list of _32_ peripherals */
1038 if (!pl330pd || !pl330pd->peri) {
1039 dev_err(&pdev->dev, "platform data missing!\n");
1040 return -ENODEV;
1041 }
1042
1043 pl330_info = kzalloc(sizeof(*pl330_info), GFP_KERNEL);
1044 if (!pl330_info)
1045 return -ENOMEM;
1046
1047 pl330_info->pl330_data = NULL;
1048 pl330_info->dev = &pdev->dev;
1049
1050 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1051 if (!res) {
1052 ret = -ENODEV;
1053 goto probe_err1;
1054 }
1055
1056 request_mem_region(res->start, resource_size(res), pdev->name);
1057
1058 pl330_info->base = ioremap(res->start, resource_size(res));
1059 if (!pl330_info->base) {
1060 ret = -ENXIO;
1061 goto probe_err2;
1062 }
1063
1064 irq = platform_get_irq(pdev, 0);
1065 if (irq < 0) {
1066 ret = irq;
1067 goto probe_err3;
1068 }
1069
1070 ret = request_irq(irq, pl330_irq_handler, 0,
1071 dev_name(&pdev->dev), pl330_info);
1072 if (ret)
1073 goto probe_err4;
1074
1075 ret = pl330_add(pl330_info);
1076 if (ret)
1077 goto probe_err5;
1078
1079 /* Allocate a new DMAC */
1080 s3c_pl330_dmac = kmalloc(sizeof(*s3c_pl330_dmac), GFP_KERNEL);
1081 if (!s3c_pl330_dmac) {
1082 ret = -ENOMEM;
1083 goto probe_err6;
1084 }
1085
1086 /* Hook the info */
1087 s3c_pl330_dmac->pi = pl330_info;
1088
1089 /* No busy channels */
1090 s3c_pl330_dmac->busy_chan = 0;
1091
1092 s3c_pl330_dmac->kmcache = kmem_cache_create(dev_name(&pdev->dev),
1093 sizeof(struct s3c_pl330_xfer), 0, 0, NULL);
1094
1095 if (!s3c_pl330_dmac->kmcache) {
1096 ret = -ENOMEM;
1097 goto probe_err7;
1098 }
1099
1100 /* Get the list of peripherals */
1101 s3c_pl330_dmac->peri = pl330pd->peri;
1102
1103 /* Attach to the list of DMACs */
1104 list_add_tail(&s3c_pl330_dmac->node, &dmac_list);
1105
1106 /* Create a channel for each peripheral in the DMAC
1107 * that is, if it doesn't already exist
1108 */
1109 for (i = 0; i < PL330_MAX_PERI; i++)
1110 if (s3c_pl330_dmac->peri[i] != DMACH_MAX)
1111 chan_add(s3c_pl330_dmac->peri[i]);
1112
1113 printk(KERN_INFO
1114 "Loaded driver for PL330 DMAC-%d %s\n", pdev->id, pdev->name);
1115 printk(KERN_INFO
1116 "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n",
1117 pl330_info->pcfg.data_buf_dep,
1118 pl330_info->pcfg.data_bus_width / 8, pl330_info->pcfg.num_chan,
1119 pl330_info->pcfg.num_peri, pl330_info->pcfg.num_events);
1120
1121 return 0;
1122
1123probe_err7:
1124 kfree(s3c_pl330_dmac);
1125probe_err6:
1126 pl330_del(pl330_info);
1127probe_err5:
1128 free_irq(irq, pl330_info);
1129probe_err4:
1130probe_err3:
1131 iounmap(pl330_info->base);
1132probe_err2:
1133 release_mem_region(res->start, resource_size(res));
1134probe_err1:
1135 kfree(pl330_info);
1136
1137 return ret;
1138}
1139
1140static int pl330_remove(struct platform_device *pdev)
1141{
1142 struct s3c_pl330_dmac *dmac, *d;
1143 struct s3c_pl330_chan *ch;
1144 unsigned long flags;
1145 int del, found;
1146
1147 if (!pdev->dev.platform_data)
1148 return -EINVAL;
1149
1150 spin_lock_irqsave(&res_lock, flags);
1151
1152 found = 0;
1153 list_for_each_entry(d, &dmac_list, node)
1154 if (d->pi->dev == &pdev->dev) {
1155 found = 1;
1156 break;
1157 }
1158
1159 if (!found) {
1160 spin_unlock_irqrestore(&res_lock, flags);
1161 return 0;
1162 }
1163
1164 dmac = d;
1165
1166 /* Remove all Channels that are managed only by this DMAC */
1167 list_for_each_entry(ch, &chan_list, node) {
1168
1169 /* Only channels that are handled by this DMAC */
1170 if (iface_of_dmac(dmac, ch->id))
1171 del = 1;
1172 else
1173 continue;
1174
1175 /* Don't remove if some other DMAC has it too */
1176 list_for_each_entry(d, &dmac_list, node)
1177 if (d != dmac && iface_of_dmac(d, ch->id)) {
1178 del = 0;
1179 break;
1180 }
1181
1182 if (del) {
1183 spin_unlock_irqrestore(&res_lock, flags);
1184 s3c2410_dma_free(ch->id, ch->client);
1185 spin_lock_irqsave(&res_lock, flags);
1186 list_del(&ch->node);
1187 kfree(ch);
1188 }
1189 }
1190
1191 /* Remove the DMAC */
1192 list_del(&dmac->node);
1193 kfree(dmac);
1194
1195 spin_unlock_irqrestore(&res_lock, flags);
1196
1197 return 0;
1198}
1199
1200static struct platform_driver pl330_driver = {
1201 .driver = {
1202 .owner = THIS_MODULE,
1203 .name = "s3c-pl330",
1204 },
1205 .probe = pl330_probe,
1206 .remove = pl330_remove,
1207};
1208
1209static int __init pl330_init(void)
1210{
1211 return platform_driver_register(&pl330_driver);
1212}
1213module_init(pl330_init);
1214
1215static void __exit pl330_exit(void)
1216{
1217 platform_driver_unregister(&pl330_driver);
1218 return;
1219}
1220module_exit(pl330_exit);
1221
1222MODULE_AUTHOR("Jaswinder Singh <jassi.brar@samsung.com>");
1223MODULE_DESCRIPTION("Driver for PL330 DMA Controller");
1224MODULE_LICENSE("GPL");
diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig
new file mode 100644
index 000000000000..1bb3dbce8810
--- /dev/null
+++ b/arch/arm/plat-spear/Kconfig
@@ -0,0 +1,31 @@
1#
2# SPEAr Platform configuration file
3#
4
5if PLAT_SPEAR
6
7choice
8 prompt "ST SPEAr Family"
9 default ARCH_SPEAR3XX
10
11config ARCH_SPEAR3XX
12 bool "SPEAr3XX"
13 select ARM_VIC
14 select CPU_ARM926T
15 help
16 Supports for ARM's SPEAR3XX family
17
18config ARCH_SPEAR6XX
19 bool "SPEAr6XX"
20 select ARM_VIC
21 select CPU_ARM926T
22 help
23 Supports for ARM's SPEAR6XX family
24
25endchoice
26
27# Adding SPEAr machine specific configuration files
28source "arch/arm/mach-spear3xx/Kconfig"
29source "arch/arm/mach-spear6xx/Kconfig"
30
31endif
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile
new file mode 100644
index 000000000000..eb89540aeda9
--- /dev/null
+++ b/arch/arm/plat-spear/Makefile
@@ -0,0 +1,8 @@
1#
2# SPEAr Platform specific Makefile
3#
4
5# Common support
6obj-y := clock.o padmux.o time.o
7
8obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o
diff --git a/arch/arm/plat-spear/clock.c b/arch/arm/plat-spear/clock.c
new file mode 100644
index 000000000000..ee4f90e534d8
--- /dev/null
+++ b/arch/arm/plat-spear/clock.c
@@ -0,0 +1,435 @@
1/*
2 * arch/arm/plat-spear/clock.c
3 *
4 * Clock framework for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/bug.h>
15#include <linux/err.h>
16#include <linux/io.h>
17#include <linux/list.h>
18#include <linux/module.h>
19#include <linux/spinlock.h>
20#include <mach/misc_regs.h>
21#include <plat/clock.h>
22
23static DEFINE_SPINLOCK(clocks_lock);
24static LIST_HEAD(root_clks);
25
26static void propagate_rate(struct list_head *);
27
28static int generic_clk_enable(struct clk *clk)
29{
30 unsigned int val;
31
32 if (!clk->en_reg)
33 return -EFAULT;
34
35 val = readl(clk->en_reg);
36 if (unlikely(clk->flags & RESET_TO_ENABLE))
37 val &= ~(1 << clk->en_reg_bit);
38 else
39 val |= 1 << clk->en_reg_bit;
40
41 writel(val, clk->en_reg);
42
43 return 0;
44}
45
46static void generic_clk_disable(struct clk *clk)
47{
48 unsigned int val;
49
50 if (!clk->en_reg)
51 return;
52
53 val = readl(clk->en_reg);
54 if (unlikely(clk->flags & RESET_TO_ENABLE))
55 val |= 1 << clk->en_reg_bit;
56 else
57 val &= ~(1 << clk->en_reg_bit);
58
59 writel(val, clk->en_reg);
60}
61
62/* generic clk ops */
63static struct clkops generic_clkops = {
64 .enable = generic_clk_enable,
65 .disable = generic_clk_disable,
66};
67
68/*
69 * clk_enable - inform the system when the clock source should be running.
70 * @clk: clock source
71 *
72 * If the clock can not be enabled/disabled, this should return success.
73 *
74 * Returns success (0) or negative errno.
75 */
76int clk_enable(struct clk *clk)
77{
78 unsigned long flags;
79 int ret = 0;
80
81 if (!clk || IS_ERR(clk))
82 return -EFAULT;
83
84 spin_lock_irqsave(&clocks_lock, flags);
85 if (clk->usage_count == 0) {
86 if (clk->ops && clk->ops->enable)
87 ret = clk->ops->enable(clk);
88 }
89 clk->usage_count++;
90 spin_unlock_irqrestore(&clocks_lock, flags);
91
92 return ret;
93}
94EXPORT_SYMBOL(clk_enable);
95
96/*
97 * clk_disable - inform the system when the clock source is no longer required.
98 * @clk: clock source
99 *
100 * Inform the system that a clock source is no longer required by
101 * a driver and may be shut down.
102 *
103 * Implementation detail: if the clock source is shared between
104 * multiple drivers, clk_enable() calls must be balanced by the
105 * same number of clk_disable() calls for the clock source to be
106 * disabled.
107 */
108void clk_disable(struct clk *clk)
109{
110 unsigned long flags;
111
112 if (!clk || IS_ERR(clk))
113 return;
114
115 WARN_ON(clk->usage_count == 0);
116
117 spin_lock_irqsave(&clocks_lock, flags);
118 clk->usage_count--;
119 if (clk->usage_count == 0) {
120 if (clk->ops && clk->ops->disable)
121 clk->ops->disable(clk);
122 }
123 spin_unlock_irqrestore(&clocks_lock, flags);
124}
125EXPORT_SYMBOL(clk_disable);
126
127/**
128 * clk_get_rate - obtain the current clock rate (in Hz) for a clock source.
129 * This is only valid once the clock source has been enabled.
130 * @clk: clock source
131 */
132unsigned long clk_get_rate(struct clk *clk)
133{
134 unsigned long flags, rate;
135
136 spin_lock_irqsave(&clocks_lock, flags);
137 rate = clk->rate;
138 spin_unlock_irqrestore(&clocks_lock, flags);
139
140 return rate;
141}
142EXPORT_SYMBOL(clk_get_rate);
143
144/**
145 * clk_set_parent - set the parent clock source for this clock
146 * @clk: clock source
147 * @parent: parent clock source
148 *
149 * Returns success (0) or negative errno.
150 */
151int clk_set_parent(struct clk *clk, struct clk *parent)
152{
153 int i, found = 0, val = 0;
154 unsigned long flags;
155
156 if (!clk || IS_ERR(clk) || !parent || IS_ERR(parent))
157 return -EFAULT;
158 if (clk->usage_count)
159 return -EBUSY;
160 if (!clk->pclk_sel)
161 return -EPERM;
162 if (clk->pclk == parent)
163 return 0;
164
165 for (i = 0; i < clk->pclk_sel->pclk_count; i++) {
166 if (clk->pclk_sel->pclk_info[i].pclk == parent) {
167 found = 1;
168 break;
169 }
170 }
171
172 if (!found)
173 return -EINVAL;
174
175 spin_lock_irqsave(&clocks_lock, flags);
176 /* reflect parent change in hardware */
177 val = readl(clk->pclk_sel->pclk_sel_reg);
178 val &= ~(clk->pclk_sel->pclk_sel_mask << clk->pclk_sel_shift);
179 val |= clk->pclk_sel->pclk_info[i].pclk_mask << clk->pclk_sel_shift;
180 writel(val, clk->pclk_sel->pclk_sel_reg);
181 spin_unlock_irqrestore(&clocks_lock, flags);
182
183 /* reflect parent change in software */
184 clk->recalc(clk);
185 propagate_rate(&clk->children);
186 return 0;
187}
188EXPORT_SYMBOL(clk_set_parent);
189
190/* registers clock in platform clock framework */
191void clk_register(struct clk_lookup *cl)
192{
193 struct clk *clk = cl->clk;
194 unsigned long flags;
195
196 if (!clk || IS_ERR(clk))
197 return;
198
199 spin_lock_irqsave(&clocks_lock, flags);
200
201 INIT_LIST_HEAD(&clk->children);
202 if (clk->flags & ALWAYS_ENABLED)
203 clk->ops = NULL;
204 else if (!clk->ops)
205 clk->ops = &generic_clkops;
206
207 /* root clock don't have any parents */
208 if (!clk->pclk && !clk->pclk_sel) {
209 list_add(&clk->sibling, &root_clks);
210 /* add clocks with only one parent to parent's children list */
211 } else if (clk->pclk && !clk->pclk_sel) {
212 list_add(&clk->sibling, &clk->pclk->children);
213 } else {
214 /* add clocks with > 1 parent to 1st parent's children list */
215 list_add(&clk->sibling,
216 &clk->pclk_sel->pclk_info[0].pclk->children);
217 }
218 spin_unlock_irqrestore(&clocks_lock, flags);
219
220 /* add clock to arm clockdev framework */
221 clkdev_add(cl);
222}
223
224/**
225 * propagate_rate - recalculate and propagate all clocks in list head
226 *
227 * Recalculates all root clocks in list head, which if the clock's .recalc is
228 * set correctly, should also propagate their rates.
229 */
230static void propagate_rate(struct list_head *lhead)
231{
232 struct clk *clkp, *_temp;
233
234 list_for_each_entry_safe(clkp, _temp, lhead, sibling) {
235 if (clkp->recalc)
236 clkp->recalc(clkp);
237 propagate_rate(&clkp->children);
238 }
239}
240
241/* returns current programmed clocks clock info structure */
242static struct pclk_info *pclk_info_get(struct clk *clk)
243{
244 unsigned int mask, i;
245 unsigned long flags;
246 struct pclk_info *info = NULL;
247
248 spin_lock_irqsave(&clocks_lock, flags);
249 mask = (readl(clk->pclk_sel->pclk_sel_reg) >> clk->pclk_sel_shift)
250 & clk->pclk_sel->pclk_sel_mask;
251
252 for (i = 0; i < clk->pclk_sel->pclk_count; i++) {
253 if (clk->pclk_sel->pclk_info[i].pclk_mask == mask)
254 info = &clk->pclk_sel->pclk_info[i];
255 }
256 spin_unlock_irqrestore(&clocks_lock, flags);
257
258 return info;
259}
260
261/*
262 * Set pclk as cclk's parent and add clock sibling node to current parents
263 * children list
264 */
265static void change_parent(struct clk *cclk, struct clk *pclk)
266{
267 unsigned long flags;
268
269 spin_lock_irqsave(&clocks_lock, flags);
270 list_del(&cclk->sibling);
271 list_add(&cclk->sibling, &pclk->children);
272
273 cclk->pclk = pclk;
274 spin_unlock_irqrestore(&clocks_lock, flags);
275}
276
277/*
278 * calculates current programmed rate of pll1
279 *
280 * In normal mode
281 * rate = (2 * M[15:8] * Fin)/(N * 2^P)
282 *
283 * In Dithered mode
284 * rate = (2 * M[15:0] * Fin)/(256 * N * 2^P)
285 */
286void pll1_clk_recalc(struct clk *clk)
287{
288 struct pll_clk_config *config = clk->private_data;
289 unsigned int num = 2, den = 0, val, mode = 0;
290 unsigned long flags;
291
292 spin_lock_irqsave(&clocks_lock, flags);
293 mode = (readl(config->mode_reg) >> PLL_MODE_SHIFT) &
294 PLL_MODE_MASK;
295
296 val = readl(config->cfg_reg);
297 /* calculate denominator */
298 den = (val >> PLL_DIV_P_SHIFT) & PLL_DIV_P_MASK;
299 den = 1 << den;
300 den *= (val >> PLL_DIV_N_SHIFT) & PLL_DIV_N_MASK;
301
302 /* calculate numerator & denominator */
303 if (!mode) {
304 /* Normal mode */
305 num *= (val >> PLL_NORM_FDBK_M_SHIFT) & PLL_NORM_FDBK_M_MASK;
306 } else {
307 /* Dithered mode */
308 num *= (val >> PLL_DITH_FDBK_M_SHIFT) & PLL_DITH_FDBK_M_MASK;
309 den *= 256;
310 }
311
312 clk->rate = (((clk->pclk->rate/10000) * num) / den) * 10000;
313 spin_unlock_irqrestore(&clocks_lock, flags);
314}
315
316/* calculates current programmed rate of ahb or apb bus */
317void bus_clk_recalc(struct clk *clk)
318{
319 struct bus_clk_config *config = clk->private_data;
320 unsigned int div;
321 unsigned long flags;
322
323 spin_lock_irqsave(&clocks_lock, flags);
324 div = ((readl(config->reg) >> config->shift) & config->mask) + 1;
325 clk->rate = (unsigned long)clk->pclk->rate / div;
326 spin_unlock_irqrestore(&clocks_lock, flags);
327}
328
329/*
330 * calculates current programmed rate of auxiliary synthesizers
331 * used by: UART, FIRDA
332 *
333 * Fout from synthesizer can be given from two equations:
334 * Fout1 = (Fin * X/Y)/2
335 * Fout2 = Fin * X/Y
336 *
337 * Selection of eqn 1 or 2 is programmed in register
338 */
339void aux_clk_recalc(struct clk *clk)
340{
341 struct aux_clk_config *config = clk->private_data;
342 struct pclk_info *pclk_info = NULL;
343 unsigned int num = 1, den = 1, val, eqn;
344 unsigned long flags;
345
346 /* get current programmed parent */
347 pclk_info = pclk_info_get(clk);
348 if (!pclk_info) {
349 spin_lock_irqsave(&clocks_lock, flags);
350 clk->pclk = NULL;
351 clk->rate = 0;
352 spin_unlock_irqrestore(&clocks_lock, flags);
353 return;
354 }
355
356 change_parent(clk, pclk_info->pclk);
357
358 spin_lock_irqsave(&clocks_lock, flags);
359 if (pclk_info->scalable) {
360 val = readl(config->synth_reg);
361
362 eqn = (val >> AUX_EQ_SEL_SHIFT) & AUX_EQ_SEL_MASK;
363 if (eqn == AUX_EQ1_SEL)
364 den *= 2;
365
366 /* calculate numerator */
367 num = (val >> AUX_XSCALE_SHIFT) & AUX_XSCALE_MASK;
368
369 /* calculate denominator */
370 den *= (val >> AUX_YSCALE_SHIFT) & AUX_YSCALE_MASK;
371 val = (((clk->pclk->rate/10000) * num) / den) * 10000;
372 } else
373 val = clk->pclk->rate;
374
375 clk->rate = val;
376 spin_unlock_irqrestore(&clocks_lock, flags);
377}
378
379/*
380 * calculates current programmed rate of gpt synthesizers
381 * Fout from synthesizer can be given from below equations:
382 * Fout= Fin/((2 ^ (N+1)) * (M+1))
383 */
384void gpt_clk_recalc(struct clk *clk)
385{
386 struct aux_clk_config *config = clk->private_data;
387 struct pclk_info *pclk_info = NULL;
388 unsigned int div = 1, val;
389 unsigned long flags;
390
391 pclk_info = pclk_info_get(clk);
392 if (!pclk_info) {
393 spin_lock_irqsave(&clocks_lock, flags);
394 clk->pclk = NULL;
395 clk->rate = 0;
396 spin_unlock_irqrestore(&clocks_lock, flags);
397 return;
398 }
399
400 change_parent(clk, pclk_info->pclk);
401
402 spin_lock_irqsave(&clocks_lock, flags);
403 if (pclk_info->scalable) {
404 val = readl(config->synth_reg);
405 div += (val >> GPT_MSCALE_SHIFT) & GPT_MSCALE_MASK;
406 div *= 1 << (((val >> GPT_NSCALE_SHIFT) & GPT_NSCALE_MASK) + 1);
407 }
408
409 clk->rate = (unsigned long)clk->pclk->rate / div;
410 spin_unlock_irqrestore(&clocks_lock, flags);
411}
412
413/*
414 * Used for clocks that always have same value as the parent clock divided by a
415 * fixed divisor
416 */
417void follow_parent(struct clk *clk)
418{
419 unsigned long flags;
420
421 spin_lock_irqsave(&clocks_lock, flags);
422 clk->rate = clk->pclk->rate;
423 spin_unlock_irqrestore(&clocks_lock, flags);
424}
425
426/**
427 * recalc_root_clocks - recalculate and propagate all root clocks
428 *
429 * Recalculates all root clocks (clocks with no parent), which if the
430 * clock's .recalc is set correctly, should also propagate their rates.
431 */
432void recalc_root_clocks(void)
433{
434 propagate_rate(&root_clks);
435}
diff --git a/arch/arm/plat-spear/include/plat/clkdev.h b/arch/arm/plat-spear/include/plat/clkdev.h
new file mode 100644
index 000000000000..a2d0112fcaf7
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/clkdev.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/plat-spear/include/plat/clkdev.h
3 *
4 * Clock Dev framework definitions for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_CLKDEV_H
15#define __PLAT_CLKDEV_H
16
17#define __clk_get(clk) ({ 1; })
18#define __clk_put(clk) do { } while (0)
19
20#endif /* __PLAT_CLKDEV_H */
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
new file mode 100644
index 000000000000..298bafc0a52f
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -0,0 +1,126 @@
1/*
2 * arch/arm/plat-spear/include/plat/clock.h
3 *
4 * Clock framework definitions for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_CLOCK_H
15#define __PLAT_CLOCK_H
16
17#include <linux/list.h>
18#include <asm/clkdev.h>
19#include <linux/types.h>
20
21/* clk structure flags */
22#define ALWAYS_ENABLED (1 << 0) /* clock always enabled */
23#define RESET_TO_ENABLE (1 << 1) /* reset register bit to enable clk */
24
25/**
26 * struct clkops - clock operations
27 * @enable: pointer to clock enable function
28 * @disable: pointer to clock disable function
29 */
30struct clkops {
31 int (*enable) (struct clk *);
32 void (*disable) (struct clk *);
33};
34
35/**
36 * struct pclk_info - parents info
37 * @pclk: pointer to parent clk
38 * @pclk_mask: value to be written for selecting this parent
39 * @scalable: Is parent scalable (1 - YES, 0 - NO)
40 */
41struct pclk_info {
42 struct clk *pclk;
43 u8 pclk_mask;
44 u8 scalable;
45};
46
47/**
48 * struct pclk_sel - parents selection configuration
49 * @pclk_info: pointer to array of parent clock info
50 * @pclk_count: number of parents
51 * @pclk_sel_reg: register for selecting a parent
52 * @pclk_sel_mask: mask for selecting parent (can be used to clear bits also)
53 */
54struct pclk_sel {
55 struct pclk_info *pclk_info;
56 u8 pclk_count;
57 unsigned int *pclk_sel_reg;
58 unsigned int pclk_sel_mask;
59};
60
61/**
62 * struct clk - clock structure
63 * @usage_count: num of users who enabled this clock
64 * @flags: flags for clock properties
65 * @rate: programmed clock rate in Hz
66 * @en_reg: clk enable/disable reg
67 * @en_reg_bit: clk enable/disable bit
68 * @ops: clk enable/disable ops - generic_clkops selected if NULL
69 * @recalc: pointer to clock rate recalculate function
70 * @pclk: current parent clk
71 * @pclk_sel: pointer to parent selection structure
72 * @pclk_sel_shift: register shift for selecting parent of this clock
73 * @children: list for childrens or this clock
74 * @sibling: node for list of clocks having same parents
75 * @private_data: clock specific private data
76 */
77struct clk {
78 unsigned int usage_count;
79 unsigned int flags;
80 unsigned long rate;
81 unsigned int *en_reg;
82 u8 en_reg_bit;
83 const struct clkops *ops;
84 void (*recalc) (struct clk *);
85
86 struct clk *pclk;
87 struct pclk_sel *pclk_sel;
88 unsigned int pclk_sel_shift;
89
90 struct list_head children;
91 struct list_head sibling;
92 void *private_data;
93};
94
95/* pll configuration structure */
96struct pll_clk_config {
97 unsigned int *mode_reg;
98 unsigned int *cfg_reg;
99};
100
101/* ahb and apb bus configuration structure */
102struct bus_clk_config {
103 unsigned int *reg;
104 unsigned int mask;
105 unsigned int shift;
106};
107
108/*
109 * Aux clk configuration structure: applicable to GPT, UART and FIRDA
110 */
111struct aux_clk_config {
112 unsigned int *synth_reg;
113};
114
115/* platform specific clock functions */
116void clk_register(struct clk_lookup *cl);
117void recalc_root_clocks(void);
118
119/* clock recalc functions */
120void follow_parent(struct clk *clk);
121void pll1_clk_recalc(struct clk *clk);
122void bus_clk_recalc(struct clk *clk);
123void gpt_clk_recalc(struct clk *clk);
124void aux_clk_recalc(struct clk *clk);
125
126#endif /* __PLAT_CLOCK_H */
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
new file mode 100644
index 000000000000..1670734b7e51
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -0,0 +1,38 @@
1/*
2 * arch/arm/plat-spear/include/plat/debug-macro.S
3 *
4 * Debugging macro include header for spear platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/amba/serial.h>
15#include <mach/spear.h>
16
17 .macro addruart, rx
18 mrc p15, 0, \rx, c1, c0
19 tst \rx, #1 @ MMU enabled?
20 moveq \rx, =SPEAR_DBG_UART_BASE @ Physical base
21 movne \rx, =VA_SPEAR_DBG_UART_BASE @ Virtual base
22 .endm
23
24 .macro senduart, rd, rx
25 strb \rd, [\rx, #UART01x_DR] @ ASC_TX_BUFFER
26 .endm
27
28 .macro waituart, rd, rx
291001: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER
30 tst \rd, #UART01x_FR_TXFF @ TX_FULL
31 bne 1001b
32 .endm
33
34 .macro busyuart, rd, rx
351002: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER
36 tst \rd, #UART011_FR_TXFE @ TX_EMPTY
37 beq 1002b
38 .endm
diff --git a/arch/arm/plat-spear/include/plat/gpio.h b/arch/arm/plat-spear/include/plat/gpio.h
new file mode 100644
index 000000000000..b857c91257dd
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/gpio.h
@@ -0,0 +1,24 @@
1/*
2 * arch/arm/plat-spear/include/plat/gpio.h
3 *
4 * GPIO macros for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_GPIO_H
15#define __PLAT_GPIO_H
16
17#include <asm-generic/gpio.h>
18
19#define gpio_get_value __gpio_get_value
20#define gpio_set_value __gpio_set_value
21#define gpio_cansleep __gpio_cansleep
22#define gpio_to_irq __gpio_to_irq
23
24#endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-spear/include/plat/io.h b/arch/arm/plat-spear/include/plat/io.h
new file mode 100644
index 000000000000..4d4ba822b3eb
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/io.h
@@ -0,0 +1,22 @@
1/*
2 * arch/arm/plat-spear/include/plat/io.h
3 *
4 * IO definitions for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_IO_H
15#define __PLAT_IO_H
16
17#define IO_SPACE_LIMIT 0xFFFFFFFF
18
19#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a)
21
22#endif /* __PLAT_IO_H */
diff --git a/arch/arm/plat-spear/include/plat/memory.h b/arch/arm/plat-spear/include/plat/memory.h
new file mode 100644
index 000000000000..27a4aba77343
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/memory.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/plat-spear/include/plat/memory.h
3 *
4 * Memory map for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_MEMORY_H
15#define __PLAT_MEMORY_H
16
17/* Physical DRAM offset */
18#define PHYS_OFFSET UL(0x00000000)
19
20#endif /* __PLAT_MEMORY_H */
diff --git a/arch/arm/plat-spear/include/plat/padmux.h b/arch/arm/plat-spear/include/plat/padmux.h
new file mode 100644
index 000000000000..877f3adcf610
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/padmux.h
@@ -0,0 +1,92 @@
1/*
2 * arch/arm/plat-spear/include/plat/padmux.h
3 *
4 * SPEAr platform specific gpio pads muxing file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_PADMUX_H
15#define __PLAT_PADMUX_H
16
17#include <linux/types.h>
18
19/*
20 * struct pmx_reg: configuration structure for mode reg and mux reg
21 *
22 * offset: offset of mode reg
23 * mask: mask of mode reg
24 */
25struct pmx_reg {
26 u32 offset;
27 u32 mask;
28};
29
30/*
31 * struct pmx_dev_mode: configuration structure every group of modes of a device
32 *
33 * ids: all modes for this configuration
34 * mask: mask for supported mode
35 */
36struct pmx_dev_mode {
37 u32 ids;
38 u32 mask;
39};
40
41/*
42 * struct pmx_mode: mode definition structure
43 *
44 * name: mode name
45 * mask: mode mask
46 */
47struct pmx_mode {
48 char *name;
49 u32 id;
50 u32 mask;
51};
52
53/*
54 * struct pmx_dev: device definition structure
55 *
56 * name: device name
57 * modes: device configuration array for different modes supported
58 * mode_count: size of modes array
59 * is_active: is peripheral active/enabled
60 * enb_on_reset: if 1, mask bits to be cleared in reg otherwise to be set in reg
61 */
62struct pmx_dev {
63 char *name;
64 struct pmx_dev_mode *modes;
65 u8 mode_count;
66 bool is_active;
67 bool enb_on_reset;
68};
69
70/*
71 * struct pmx_driver: driver definition structure
72 *
73 * mode: mode to be set
74 * devs: array of pointer to pmx devices
75 * devs_count: ARRAY_SIZE of devs
76 * base: base address of soc config registers
77 * mode_reg: structure of mode config register
78 * mux_reg: structure of device mux config register
79 */
80struct pmx_driver {
81 struct pmx_mode *mode;
82 struct pmx_dev **devs;
83 u8 devs_count;
84 u32 *base;
85 struct pmx_reg mode_reg;
86 struct pmx_reg mux_reg;
87};
88
89/* pmx functions */
90int pmx_register(struct pmx_driver *driver);
91
92#endif /* __PLAT_PADMUX_H */
diff --git a/arch/arm/plat-spear/include/plat/shirq.h b/arch/arm/plat-spear/include/plat/shirq.h
new file mode 100644
index 000000000000..03ed8b585dcf
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/shirq.h
@@ -0,0 +1,73 @@
1/*
2 * arch/arm/plat-spear/include/plat/shirq.h
3 *
4 * SPEAr platform shared irq layer header file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_SHIRQ_H
15#define __PLAT_SHIRQ_H
16
17#include <linux/irq.h>
18#include <linux/types.h>
19
20/*
21 * struct shirq_dev_config: shared irq device configuration
22 *
23 * virq: virtual irq number of device
24 * enb_mask: enable mask of device
25 * status_mask: status mask of device
26 * clear_mask: clear mask of device
27 */
28struct shirq_dev_config {
29 u32 virq;
30 u32 enb_mask;
31 u32 status_mask;
32 u32 clear_mask;
33};
34
35/*
36 * struct shirq_regs: shared irq register configuration
37 *
38 * base: base address of shared irq register
39 * enb_reg: enable register offset
40 * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt
41 * status_reg: status register offset
42 * status_reg_mask: status register valid mask
43 * clear_reg: clear register offset
44 * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt
45 */
46struct shirq_regs {
47 void __iomem *base;
48 u32 enb_reg;
49 u32 reset_to_enb;
50 u32 status_reg;
51 u32 status_reg_mask;
52 u32 clear_reg;
53 u32 reset_to_clear;
54};
55
56/*
57 * struct spear_shirq: shared irq structure
58 *
59 * irq: hardware irq number
60 * dev_config: array of device config structures which are using "irq" line
61 * dev_count: size of dev_config array
62 * regs: register configuration for shared irq block
63 */
64struct spear_shirq {
65 u32 irq;
66 struct shirq_dev_config *dev_config;
67 u32 dev_count;
68 struct shirq_regs regs;
69};
70
71int spear_shirq_register(struct spear_shirq *shirq);
72
73#endif /* __PLAT_SHIRQ_H */
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
new file mode 100644
index 000000000000..55a4e405d578
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -0,0 +1,41 @@
1/*
2 * arch/arm/plat-spear/include/plat/system.h
3 *
4 * SPEAr platform specific architecture functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_SYSTEM_H
15#define __PLAT_SYSTEM_H
16
17#include <asm/hardware/sp810.h>
18#include <linux/io.h>
19#include <mach/spear.h>
20
21static inline void arch_idle(void)
22{
23 /*
24 * This should do all the clock switching
25 * and wait for interrupt tricks
26 */
27 cpu_do_idle();
28}
29
30static inline void arch_reset(char mode, const char *cmd)
31{
32 if (mode == 's') {
33 /* software reset, Jump into ROM at address 0 */
34 cpu_reset(0);
35 } else {
36 /* hardware reset, Use on-chip reset capability */
37 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
38 }
39}
40
41#endif /* __PLAT_SYSTEM_H */
diff --git a/arch/arm/plat-spear/include/plat/timex.h b/arch/arm/plat-spear/include/plat/timex.h
new file mode 100644
index 000000000000..914d09dd50fd
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/timex.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/plat-spear/include/plat/timex.h
3 *
4 * SPEAr platform specific timex definitions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_TIMEX_H
15#define __PLAT_TIMEX_H
16
17#define CLOCK_TICK_RATE 48000000
18
19#endif /* __PLAT_TIMEX_H */
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h
new file mode 100644
index 000000000000..99ba6789cc97
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/uncompress.h
@@ -0,0 +1,43 @@
1/*
2 * arch/arm/plat-spear/include/plat/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/io.h>
15#include <linux/amba/serial.h>
16#include <mach/spear.h>
17
18#ifndef __PLAT_UNCOMPRESS_H
19#define __PLAT_UNCOMPRESS_H
20/*
21 * This does not append a newline
22 */
23static inline void putc(int c)
24{
25 void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE;
26
27 while (readl(base + UART01x_FR) & UART01x_FR_TXFF)
28 barrier();
29
30 writel(c, base + UART01x_DR);
31}
32
33static inline void flush(void)
34{
35}
36
37/*
38 * nothing to do
39 */
40#define arch_decomp_setup()
41#define arch_decomp_wdog()
42
43#endif /* __PLAT_UNCOMPRESS_H */
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h
new file mode 100644
index 000000000000..09e9372aea21
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/vmalloc.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/plat-spear/include/plat/vmalloc.h
3 *
4 * Defining Vmalloc area for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_VMALLOC_H
15#define __PLAT_VMALLOC_H
16
17#define VMALLOC_END 0xF0000000
18
19#endif /* __PLAT_VMALLOC_H */
diff --git a/arch/arm/plat-spear/padmux.c b/arch/arm/plat-spear/padmux.c
new file mode 100644
index 000000000000..d2aab3adcdeb
--- /dev/null
+++ b/arch/arm/plat-spear/padmux.c
@@ -0,0 +1,164 @@
1/*
2 * arch/arm/plat-spear/include/plat/padmux.c
3 *
4 * SPEAr platform specific gpio pads muxing source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/err.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <plat/padmux.h>
18
19/*
20 * struct pmx: pmx definition structure
21 *
22 * base: base address of configuration registers
23 * mode_reg: mode configurations
24 * mux_reg: muxing configurations
25 * active_mode: pointer to current active mode
26 */
27struct pmx {
28 u32 base;
29 struct pmx_reg mode_reg;
30 struct pmx_reg mux_reg;
31 struct pmx_mode *active_mode;
32};
33
34static struct pmx *pmx;
35
36/**
37 * pmx_mode_set - Enables an multiplexing mode
38 * @mode - pointer to pmx mode
39 *
40 * It will set mode of operation in hardware.
41 * Returns -ve on Err otherwise 0
42 */
43static int pmx_mode_set(struct pmx_mode *mode)
44{
45 u32 val;
46
47 if (!mode->name)
48 return -EFAULT;
49
50 pmx->active_mode = mode;
51
52 val = readl(pmx->base + pmx->mode_reg.offset);
53 val &= ~pmx->mode_reg.mask;
54 val |= mode->mask & pmx->mode_reg.mask;
55 writel(val, pmx->base + pmx->mode_reg.offset);
56
57 return 0;
58}
59
60/**
61 * pmx_devs_enable - Enables list of devices
62 * @devs - pointer to pmx device array
63 * @count - number of devices to enable
64 *
65 * It will enable pads for all required peripherals once and only once.
66 * If peripheral is not supported by current mode then request is rejected.
67 * Conflicts between peripherals are not handled and peripherals will be
68 * enabled in the order they are present in pmx_dev array.
69 * In case of conflicts last peripheral enalbed will be present.
70 * Returns -ve on Err otherwise 0
71 */
72static int pmx_devs_enable(struct pmx_dev **devs, u8 count)
73{
74 u32 val, i, mask;
75
76 if (!count)
77 return -EINVAL;
78
79 val = readl(pmx->base + pmx->mux_reg.offset);
80 for (i = 0; i < count; i++) {
81 u8 j = 0;
82
83 if (!devs[i]->name || !devs[i]->modes) {
84 printk(KERN_ERR "padmux: dev name or modes is null\n");
85 continue;
86 }
87 /* check if peripheral exists in active mode */
88 if (pmx->active_mode) {
89 bool found = false;
90 for (j = 0; j < devs[i]->mode_count; j++) {
91 if (devs[i]->modes[j].ids &
92 pmx->active_mode->id) {
93 found = true;
94 break;
95 }
96 }
97 if (found == false) {
98 printk(KERN_ERR "%s device not available in %s"\
99 "mode\n", devs[i]->name,
100 pmx->active_mode->name);
101 continue;
102 }
103 }
104
105 /* enable peripheral */
106 mask = devs[i]->modes[j].mask & pmx->mux_reg.mask;
107 if (devs[i]->enb_on_reset)
108 val &= ~mask;
109 else
110 val |= mask;
111
112 devs[i]->is_active = true;
113 }
114 writel(val, pmx->base + pmx->mux_reg.offset);
115 kfree(pmx);
116
117 /* this will ensure that multiplexing can't be changed now */
118 pmx = (struct pmx *)-1;
119
120 return 0;
121}
122
123/**
124 * pmx_register - registers a platform requesting pad mux feature
125 * @driver - pointer to driver structure containing driver specific parameters
126 *
127 * Also this must be called only once. This will allocate memory for pmx
128 * structure, will call pmx_mode_set, will call pmx_devs_enable.
129 * Returns -ve on Err otherwise 0
130 */
131int pmx_register(struct pmx_driver *driver)
132{
133 int ret = 0;
134
135 if (pmx)
136 return -EPERM;
137 if (!driver->base || !driver->devs)
138 return -EFAULT;
139
140 pmx = kzalloc(sizeof(*pmx), GFP_KERNEL);
141 if (!pmx)
142 return -ENOMEM;
143
144 pmx->base = (u32)driver->base;
145 pmx->mode_reg.offset = driver->mode_reg.offset;
146 pmx->mode_reg.mask = driver->mode_reg.mask;
147 pmx->mux_reg.offset = driver->mux_reg.offset;
148 pmx->mux_reg.mask = driver->mux_reg.mask;
149
150 /* choose mode to enable */
151 if (driver->mode) {
152 ret = pmx_mode_set(driver->mode);
153 if (ret)
154 goto pmx_fail;
155 }
156 ret = pmx_devs_enable(driver->devs, driver->devs_count);
157 if (ret)
158 goto pmx_fail;
159
160 return 0;
161
162pmx_fail:
163 return ret;
164}
diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
new file mode 100644
index 000000000000..2172d6946aea
--- /dev/null
+++ b/arch/arm/plat-spear/shirq.c
@@ -0,0 +1,118 @@
1/*
2 * arch/arm/plat-spear/shirq.c
3 *
4 * SPEAr platform shared irq layer source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/err.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/spinlock.h>
18#include <plat/shirq.h>
19
20struct spear_shirq *shirq;
21static DEFINE_SPINLOCK(lock);
22
23static void shirq_irq_mask(unsigned irq)
24{
25 struct spear_shirq *shirq = get_irq_chip_data(irq);
26 u32 val, id = irq - shirq->dev_config[0].virq;
27 unsigned long flags;
28
29 if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1)
30 return;
31
32 spin_lock_irqsave(&lock, flags);
33 val = readl(shirq->regs.base + shirq->regs.enb_reg);
34 if (shirq->regs.reset_to_enb)
35 val |= shirq->dev_config[id].enb_mask;
36 else
37 val &= ~(shirq->dev_config[id].enb_mask);
38 writel(val, shirq->regs.base + shirq->regs.enb_reg);
39 spin_unlock_irqrestore(&lock, flags);
40}
41
42static void shirq_irq_unmask(unsigned irq)
43{
44 struct spear_shirq *shirq = get_irq_chip_data(irq);
45 u32 val, id = irq - shirq->dev_config[0].virq;
46 unsigned long flags;
47
48 if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1)
49 return;
50
51 spin_lock_irqsave(&lock, flags);
52 val = readl(shirq->regs.base + shirq->regs.enb_reg);
53 if (shirq->regs.reset_to_enb)
54 val &= ~(shirq->dev_config[id].enb_mask);
55 else
56 val |= shirq->dev_config[id].enb_mask;
57 writel(val, shirq->regs.base + shirq->regs.enb_reg);
58 spin_unlock_irqrestore(&lock, flags);
59}
60
61static struct irq_chip shirq_chip = {
62 .name = "spear_shirq",
63 .ack = shirq_irq_mask,
64 .mask = shirq_irq_mask,
65 .unmask = shirq_irq_unmask,
66};
67
68static void shirq_handler(unsigned irq, struct irq_desc *desc)
69{
70 u32 i, val, mask;
71 struct spear_shirq *shirq = get_irq_data(irq);
72
73 desc->chip->ack(irq);
74 while ((val = readl(shirq->regs.base + shirq->regs.status_reg) &
75 shirq->regs.status_reg_mask)) {
76 for (i = 0; (i < shirq->dev_count) && val; i++) {
77 if (!(shirq->dev_config[i].status_mask & val))
78 continue;
79
80 generic_handle_irq(shirq->dev_config[i].virq);
81
82 /* clear interrupt */
83 val &= ~shirq->dev_config[i].status_mask;
84 if ((shirq->regs.clear_reg == -1) ||
85 shirq->dev_config[i].clear_mask == -1)
86 continue;
87 mask = readl(shirq->regs.base + shirq->regs.clear_reg);
88 if (shirq->regs.reset_to_clear)
89 mask &= ~shirq->dev_config[i].clear_mask;
90 else
91 mask |= shirq->dev_config[i].clear_mask;
92 writel(mask, shirq->regs.base + shirq->regs.clear_reg);
93 }
94 }
95 desc->chip->unmask(irq);
96}
97
98int spear_shirq_register(struct spear_shirq *shirq)
99{
100 int i;
101
102 if (!shirq || !shirq->dev_config || !shirq->regs.base)
103 return -EFAULT;
104
105 if (!shirq->dev_count)
106 return -EINVAL;
107
108 set_irq_chained_handler(shirq->irq, shirq_handler);
109 for (i = 0; i < shirq->dev_count; i++) {
110 set_irq_chip(shirq->dev_config[i].virq, &shirq_chip);
111 set_irq_handler(shirq->dev_config[i].virq, handle_simple_irq);
112 set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID);
113 set_irq_chip_data(shirq->dev_config[i].virq, shirq);
114 }
115
116 set_irq_data(shirq->irq, shirq);
117 return 0;
118}
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
new file mode 100644
index 000000000000..a1025d38f383
--- /dev/null
+++ b/arch/arm/plat-spear/time.c
@@ -0,0 +1,292 @@
1/*
2 * arch/arm/plat-spear/time.c
3 *
4 * Copyright (C) 2009 ST Microelectronics
5 * Shiraz Hashim<shiraz.hashim@st.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/clk.h>
13#include <linux/clockchips.h>
14#include <linux/clocksource.h>
15#include <linux/err.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/time.h>
21#include <linux/irq.h>
22#include <asm/mach/time.h>
23#include <mach/irqs.h>
24#include <mach/hardware.h>
25#include <mach/spear.h>
26#include <mach/generic.h>
27
28/*
29 * We would use TIMER0 and TIMER1 as clockevent and clocksource.
30 * Timer0 and Timer1 both belong to same gpt block in cpu subbsystem. Further
31 * they share same functional clock. Any change in one's functional clock will
32 * also affect other timer.
33 */
34
35#define CLKEVT 0 /* gpt0, channel0 as clockevent */
36#define CLKSRC 1 /* gpt0, channel1 as clocksource */
37
38/* Register offsets, x is channel number */
39#define CR(x) ((x) * 0x80 + 0x80)
40#define IR(x) ((x) * 0x80 + 0x84)
41#define LOAD(x) ((x) * 0x80 + 0x88)
42#define COUNT(x) ((x) * 0x80 + 0x8C)
43
44/* Reg bit definitions */
45#define CTRL_INT_ENABLE 0x0100
46#define CTRL_ENABLE 0x0020
47#define CTRL_ONE_SHOT 0x0010
48
49#define CTRL_PRESCALER1 0x0
50#define CTRL_PRESCALER2 0x1
51#define CTRL_PRESCALER4 0x2
52#define CTRL_PRESCALER8 0x3
53#define CTRL_PRESCALER16 0x4
54#define CTRL_PRESCALER32 0x5
55#define CTRL_PRESCALER64 0x6
56#define CTRL_PRESCALER128 0x7
57#define CTRL_PRESCALER256 0x8
58
59#define INT_STATUS 0x1
60
61static __iomem void *gpt_base;
62static struct clk *gpt_clk;
63
64static void clockevent_set_mode(enum clock_event_mode mode,
65 struct clock_event_device *clk_event_dev);
66static int clockevent_next_event(unsigned long evt,
67 struct clock_event_device *clk_event_dev);
68
69/*
70 * Following clocksource_set_clock and clockevent_set_clock picked
71 * from arch/mips/kernel/time.c
72 */
73
74void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
75{
76 u64 temp;
77 u32 shift;
78
79 /* Find a shift value */
80 for (shift = 32; shift > 0; shift--) {
81 temp = (u64) NSEC_PER_SEC << shift;
82 do_div(temp, clock);
83 if ((temp >> 32) == 0)
84 break;
85 }
86 cs->shift = shift;
87 cs->mult = (u32) temp;
88}
89
90void __init clockevent_set_clock(struct clock_event_device *cd,
91 unsigned int clock)
92{
93 u64 temp;
94 u32 shift;
95
96 /* Find a shift value */
97 for (shift = 32; shift > 0; shift--) {
98 temp = (u64) clock << shift;
99 do_div(temp, NSEC_PER_SEC);
100 if ((temp >> 32) == 0)
101 break;
102 }
103 cd->shift = shift;
104 cd->mult = (u32) temp;
105}
106
107static cycle_t clocksource_read_cycles(struct clocksource *cs)
108{
109 return (cycle_t) readw(gpt_base + COUNT(CLKSRC));
110}
111
112static struct clocksource clksrc = {
113 .name = "tmr1",
114 .rating = 200, /* its a pretty decent clock */
115 .read = clocksource_read_cycles,
116 .mask = 0xFFFF, /* 16 bits */
117 .mult = 0, /* to be computed */
118 .shift = 0, /* to be computed */
119 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
120};
121
122static void spear_clocksource_init(void)
123{
124 u32 tick_rate;
125 u16 val;
126
127 /* program the prescaler (/256)*/
128 writew(CTRL_PRESCALER256, gpt_base + CR(CLKSRC));
129
130 /* find out actual clock driving Timer */
131 tick_rate = clk_get_rate(gpt_clk);
132 tick_rate >>= CTRL_PRESCALER256;
133
134 writew(0xFFFF, gpt_base + LOAD(CLKSRC));
135
136 val = readw(gpt_base + CR(CLKSRC));
137 val &= ~CTRL_ONE_SHOT; /* autoreload mode */
138 val |= CTRL_ENABLE ;
139 writew(val, gpt_base + CR(CLKSRC));
140
141 clocksource_set_clock(&clksrc, tick_rate);
142
143 /* register the clocksource */
144 clocksource_register(&clksrc);
145}
146
147static struct clock_event_device clkevt = {
148 .name = "tmr0",
149 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
150 .set_mode = clockevent_set_mode,
151 .set_next_event = clockevent_next_event,
152 .shift = 0, /* to be computed */
153};
154
155static void clockevent_set_mode(enum clock_event_mode mode,
156 struct clock_event_device *clk_event_dev)
157{
158 u32 period;
159 u16 val;
160
161 /* stop the timer */
162 val = readw(gpt_base + CR(CLKEVT));
163 val &= ~CTRL_ENABLE;
164 writew(val, gpt_base + CR(CLKEVT));
165
166 switch (mode) {
167 case CLOCK_EVT_MODE_PERIODIC:
168 period = clk_get_rate(gpt_clk) / HZ;
169 period >>= CTRL_PRESCALER16;
170 writew(period, gpt_base + LOAD(CLKEVT));
171
172 val = readw(gpt_base + CR(CLKEVT));
173 val &= ~CTRL_ONE_SHOT;
174 val |= CTRL_ENABLE | CTRL_INT_ENABLE;
175 writew(val, gpt_base + CR(CLKEVT));
176
177 break;
178 case CLOCK_EVT_MODE_ONESHOT:
179 val = readw(gpt_base + CR(CLKEVT));
180 val |= CTRL_ONE_SHOT;
181 writew(val, gpt_base + CR(CLKEVT));
182
183 break;
184 case CLOCK_EVT_MODE_UNUSED:
185 case CLOCK_EVT_MODE_SHUTDOWN:
186 case CLOCK_EVT_MODE_RESUME:
187
188 break;
189 default:
190 pr_err("Invalid mode requested\n");
191 break;
192 }
193}
194
195static int clockevent_next_event(unsigned long cycles,
196 struct clock_event_device *clk_event_dev)
197{
198 u16 val;
199
200 writew(cycles, gpt_base + LOAD(CLKEVT));
201
202 val = readw(gpt_base + CR(CLKEVT));
203 val |= CTRL_ENABLE | CTRL_INT_ENABLE;
204 writew(val, gpt_base + CR(CLKEVT));
205
206 return 0;
207}
208
209static irqreturn_t spear_timer_interrupt(int irq, void *dev_id)
210{
211 struct clock_event_device *evt = &clkevt;
212
213 writew(INT_STATUS, gpt_base + IR(CLKEVT));
214
215 evt->event_handler(evt);
216
217 return IRQ_HANDLED;
218}
219
220static struct irqaction spear_timer_irq = {
221 .name = "timer",
222 .flags = IRQF_DISABLED | IRQF_TIMER,
223 .handler = spear_timer_interrupt
224};
225
226static void __init spear_clockevent_init(void)
227{
228 u32 tick_rate;
229
230 /* program the prescaler */
231 writew(CTRL_PRESCALER16, gpt_base + CR(CLKEVT));
232
233 tick_rate = clk_get_rate(gpt_clk);
234 tick_rate >>= CTRL_PRESCALER16;
235
236 clockevent_set_clock(&clkevt, tick_rate);
237
238 clkevt.max_delta_ns = clockevent_delta2ns(0xfff0,
239 &clkevt);
240 clkevt.min_delta_ns = clockevent_delta2ns(3, &clkevt);
241
242 clkevt.cpumask = cpumask_of(0);
243
244 clockevents_register_device(&clkevt);
245
246 setup_irq(SPEAR_GPT0_CHAN0_IRQ, &spear_timer_irq);
247}
248
249void __init spear_setup_timer(void)
250{
251 struct clk *pll3_clk;
252
253 if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) {
254 pr_err("%s:cannot get IO addr\n", __func__);
255 return;
256 }
257
258 gpt_base = (void __iomem *)ioremap(SPEAR_GPT0_BASE, SZ_1K);
259 if (!gpt_base) {
260 pr_err("%s:ioremap failed for gpt\n", __func__);
261 goto err_mem;
262 }
263
264 gpt_clk = clk_get_sys("gpt0", NULL);
265 if (!gpt_clk) {
266 pr_err("%s:couldn't get clk for gpt\n", __func__);
267 goto err_iomap;
268 }
269
270 pll3_clk = clk_get(NULL, "pll3_48m_clk");
271 if (!pll3_clk) {
272 pr_err("%s:couldn't get PLL3 as parent for gpt\n", __func__);
273 goto err_iomap;
274 }
275
276 clk_set_parent(gpt_clk, pll3_clk);
277
278 spear_clockevent_init();
279 spear_clocksource_init();
280
281 return;
282
283err_iomap:
284 iounmap(gpt_base);
285
286err_mem:
287 release_mem_region(SPEAR_GPT0_BASE, SZ_1K);
288}
289
290struct sys_timer spear_sys_timer = {
291 .init = spear_setup_timer,
292};
diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile
new file mode 100644
index 000000000000..9b1a66816aa6
--- /dev/null
+++ b/arch/arm/plat-versatile/Makefile
@@ -0,0 +1,4 @@
1obj-y := clock.o
2obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
3obj-$(CONFIG_ARCH_REALVIEW) += sched-clock.o
4obj-$(CONFIG_ARCH_VERSATILE) += sched-clock.o
diff --git a/arch/arm/mach-integrator/clock.c b/arch/arm/plat-versatile/clock.c
index 989ecf5f5c46..5c8b6564fdc2 100644
--- a/arch/arm/mach-integrator/clock.c
+++ b/arch/arm/plat-versatile/clock.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-integrator/clock.c 2 * linux/arch/arm/plat-versatile/clock.c
3 * 3 *
4 * Copyright (C) 2004 ARM Limited. 4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited. 5 * Written by Deep Blue Solutions Limited.
@@ -14,7 +14,8 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/mutex.h> 15#include <linux/mutex.h>
16 16
17#include <asm/clkdev.h> 17#include <asm/hardware/icst.h>
18
18#include <mach/clkdev.h> 19#include <mach/clkdev.h>
19 20
20int clk_enable(struct clk *clk) 21int clk_enable(struct clk *clk)
@@ -36,24 +37,38 @@ EXPORT_SYMBOL(clk_get_rate);
36 37
37long clk_round_rate(struct clk *clk, unsigned long rate) 38long clk_round_rate(struct clk *clk, unsigned long rate)
38{ 39{
39 struct icst525_vco vco; 40 long ret = -EIO;
40 vco = icst525_khz_to_vco(clk->params, rate / 1000); 41 if (clk->ops && clk->ops->round)
41 return icst525_khz(clk->params, vco) * 1000; 42 ret = clk->ops->round(clk, rate);
43 return ret;
42} 44}
43EXPORT_SYMBOL(clk_round_rate); 45EXPORT_SYMBOL(clk_round_rate);
44 46
45int clk_set_rate(struct clk *clk, unsigned long rate) 47int clk_set_rate(struct clk *clk, unsigned long rate)
46{ 48{
47 int ret = -EIO; 49 int ret = -EIO;
48 50 if (clk->ops && clk->ops->set)
49 if (clk->setvco) { 51 ret = clk->ops->set(clk, rate);
50 struct icst525_vco vco;
51
52 vco = icst525_khz_to_vco(clk->params, rate / 1000);
53 clk->rate = icst525_khz(clk->params, vco) * 1000;
54 clk->setvco(clk, vco);
55 ret = 0;
56 }
57 return ret; 52 return ret;
58} 53}
59EXPORT_SYMBOL(clk_set_rate); 54EXPORT_SYMBOL(clk_set_rate);
55
56long icst_clk_round(struct clk *clk, unsigned long rate)
57{
58 struct icst_vco vco;
59 vco = icst_hz_to_vco(clk->params, rate);
60 return icst_hz(clk->params, vco);
61}
62EXPORT_SYMBOL(icst_clk_round);
63
64int icst_clk_set(struct clk *clk, unsigned long rate)
65{
66 struct icst_vco vco;
67
68 vco = icst_hz_to_vco(clk->params, rate);
69 clk->rate = icst_hz(clk->params, vco);
70 clk->ops->setvco(clk, vco);
71
72 return 0;
73}
74EXPORT_SYMBOL(icst_clk_set);
diff --git a/arch/arm/plat-versatile/include/plat/clock.h b/arch/arm/plat-versatile/include/plat/clock.h
new file mode 100644
index 000000000000..3cfb024ccd70
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/clock.h
@@ -0,0 +1,15 @@
1#ifndef PLAT_CLOCK_H
2#define PLAT_CLOCK_H
3
4#include <asm/hardware/icst.h>
5
6struct clk_ops {
7 long (*round)(struct clk *, unsigned long);
8 int (*set)(struct clk *, unsigned long);
9 void (*setvco)(struct clk *, struct icst_vco);
10};
11
12int icst_clk_set(struct clk *, unsigned long);
13long icst_clk_round(struct clk *, unsigned long);
14
15#endif
diff --git a/arch/arm/plat-versatile/include/plat/timer-sp.h b/arch/arm/plat-versatile/include/plat/timer-sp.h
new file mode 100644
index 000000000000..21e75e30d497
--- /dev/null
+++ b/arch/arm/plat-versatile/include/plat/timer-sp.h
@@ -0,0 +1,2 @@
1void sp804_clocksource_init(void __iomem *);
2void sp804_clockevents_init(void __iomem *, unsigned int);
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
new file mode 100644
index 000000000000..9768cf7e83d7
--- /dev/null
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -0,0 +1,53 @@
1/*
2 * linux/arch/arm/plat-versatile/sched-clock.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/cnt32_to_63.h>
22#include <linux/io.h>
23#include <asm/div64.h>
24
25#include <mach/hardware.h>
26#include <mach/platform.h>
27
28#ifdef VERSATILE_SYS_BASE
29#define REFCOUNTER (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_24MHz_OFFSET)
30#endif
31
32#ifdef REALVIEW_SYS_BASE
33#define REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
34#endif
35
36/*
37 * This is the Realview and Versatile sched_clock implementation. This
38 * has a resolution of 41.7ns, and a maximum value of about 35583 days.
39 *
40 * The return value is guaranteed to be monotonic in that range as
41 * long as there is always less than 89 seconds between successive
42 * calls to this function.
43 */
44unsigned long long sched_clock(void)
45{
46 unsigned long long v = cnt32_to_63(readl(REFCOUNTER));
47
48 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
49 v *= 125<<1;
50 do_div(v, 3<<1);
51
52 return v;
53}
diff --git a/arch/arm/plat-versatile/timer-sp.c b/arch/arm/plat-versatile/timer-sp.c
new file mode 100644
index 000000000000..fb0d1c299718
--- /dev/null
+++ b/arch/arm/plat-versatile/timer-sp.c
@@ -0,0 +1,156 @@
1/*
2 * linux/arch/arm/plat-versatile/timer-sp.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/clocksource.h>
22#include <linux/clockchips.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/io.h>
26
27#include <asm/hardware/arm_timer.h>
28
29#include <plat/timer-sp.h>
30
31/*
32 * These timers are currently always setup to be clocked at 1MHz.
33 */
34#define TIMER_FREQ_KHZ (1000)
35#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
36
37static void __iomem *clksrc_base;
38
39static cycle_t sp804_read(struct clocksource *cs)
40{
41 return ~readl(clksrc_base + TIMER_VALUE);
42}
43
44static struct clocksource clocksource_sp804 = {
45 .name = "timer3",
46 .rating = 200,
47 .read = sp804_read,
48 .mask = CLOCKSOURCE_MASK(32),
49 .shift = 20,
50 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
51};
52
53void __init sp804_clocksource_init(void __iomem *base)
54{
55 struct clocksource *cs = &clocksource_sp804;
56
57 clksrc_base = base;
58
59 /* setup timer 0 as free-running clocksource */
60 writel(0, clksrc_base + TIMER_CTRL);
61 writel(0xffffffff, clksrc_base + TIMER_LOAD);
62 writel(0xffffffff, clksrc_base + TIMER_VALUE);
63 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
64 clksrc_base + TIMER_CTRL);
65
66 cs->mult = clocksource_khz2mult(TIMER_FREQ_KHZ, cs->shift);
67 clocksource_register(cs);
68}
69
70
71static void __iomem *clkevt_base;
72
73/*
74 * IRQ handler for the timer
75 */
76static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id)
77{
78 struct clock_event_device *evt = dev_id;
79
80 /* clear the interrupt */
81 writel(1, clkevt_base + TIMER_INTCLR);
82
83 evt->event_handler(evt);
84
85 return IRQ_HANDLED;
86}
87
88static void sp804_set_mode(enum clock_event_mode mode,
89 struct clock_event_device *evt)
90{
91 unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE;
92
93 writel(ctrl, clkevt_base + TIMER_CTRL);
94
95 switch (mode) {
96 case CLOCK_EVT_MODE_PERIODIC:
97 writel(TIMER_RELOAD, clkevt_base + TIMER_LOAD);
98 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
99 break;
100
101 case CLOCK_EVT_MODE_ONESHOT:
102 /* period set, and timer enabled in 'next_event' hook */
103 ctrl |= TIMER_CTRL_ONESHOT;
104 break;
105
106 case CLOCK_EVT_MODE_UNUSED:
107 case CLOCK_EVT_MODE_SHUTDOWN:
108 default:
109 break;
110 }
111
112 writel(ctrl, clkevt_base + TIMER_CTRL);
113}
114
115static int sp804_set_next_event(unsigned long next,
116 struct clock_event_device *evt)
117{
118 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
119
120 writel(next, clkevt_base + TIMER_LOAD);
121 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
122
123 return 0;
124}
125
126static struct clock_event_device sp804_clockevent = {
127 .name = "timer0",
128 .shift = 32,
129 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
130 .set_mode = sp804_set_mode,
131 .set_next_event = sp804_set_next_event,
132 .rating = 300,
133 .cpumask = cpu_all_mask,
134};
135
136static struct irqaction sp804_timer_irq = {
137 .name = "timer",
138 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
139 .handler = sp804_timer_interrupt,
140 .dev_id = &sp804_clockevent,
141};
142
143void __init sp804_clockevents_init(void __iomem *base, unsigned int timer_irq)
144{
145 struct clock_event_device *evt = &sp804_clockevent;
146
147 clkevt_base = base;
148
149 evt->irq = timer_irq;
150 evt->mult = div_sc(TIMER_FREQ_KHZ, NSEC_PER_MSEC, evt->shift);
151 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
152 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
153
154 setup_irq(timer_irq, &sp804_timer_irq);
155 clockevents_register_device(evt);
156}
diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h
index b131c27ddf57..bbce6a1c6bb6 100644
--- a/arch/avr32/include/asm/atomic.h
+++ b/arch/avr32/include/asm/atomic.h
@@ -19,7 +19,7 @@
19 19
20#define ATOMIC_INIT(i) { (i) } 20#define ATOMIC_INIT(i) { (i) }
21 21
22#define atomic_read(v) ((v)->counter) 22#define atomic_read(v) (*(volatile int *)&(v)->counter)
23#define atomic_set(v, i) (((v)->counter) = i) 23#define atomic_set(v, i) (((v)->counter) = i)
24 24
25/* 25/*
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
index f27aa3b259fa..668ed2817e51 100644
--- a/arch/avr32/kernel/time.c
+++ b/arch/avr32/kernel/time.c
@@ -110,17 +110,17 @@ static struct clock_event_device comparator = {
110 .set_mode = comparator_mode, 110 .set_mode = comparator_mode,
111}; 111};
112 112
113void read_persistent_clock(struct timespec *ts)
114{
115 ts->tv_sec = mktime(2007, 1, 1, 0, 0, 0);
116 ts->tv_nsec = 0;
117}
118
113void __init time_init(void) 119void __init time_init(void)
114{ 120{
115 unsigned long counter_hz; 121 unsigned long counter_hz;
116 int ret; 122 int ret;
117 123
118 xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0);
119 xtime.tv_nsec = 0;
120
121 set_normalized_timespec(&wall_to_monotonic,
122 -xtime.tv_sec, -xtime.tv_nsec);
123
124 /* figure rate for counter */ 124 /* figure rate for counter */
125 counter_hz = clk_get_rate(boot_cpu_data.clk); 125 counter_hz = clk_get_rate(boot_cpu_data.clk);
126 counter.mult = clocksource_hz2mult(counter_hz, counter.shift); 126 counter.mult = clocksource_hz2mult(counter_hz, counter.shift);
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index cb7a01d4f009..8c9a43daf80f 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -353,9 +353,15 @@ void bfin_coretmr_clockevent_init(void)
353#endif /* CONFIG_TICKSOURCE_CORETMR */ 353#endif /* CONFIG_TICKSOURCE_CORETMR */
354 354
355 355
356void __init time_init(void) 356void read_persistent_clock(struct timespec *ts)
357{ 357{
358 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */ 358 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
359 ts->tv_sec = secs_since_1970;
360 ts->tv_nsec = 0;
361}
362
363void __init time_init(void)
364{
359 365
360#ifdef CONFIG_RTC_DRV_BFIN 366#ifdef CONFIG_RTC_DRV_BFIN
361 /* [#2663] hack to filter junk RTC values that would cause 367 /* [#2663] hack to filter junk RTC values that would cause
@@ -368,11 +374,6 @@ void __init time_init(void)
368 } 374 }
369#endif 375#endif
370 376
371 /* Initialize xtime. From now on, xtime is updated with timer interrupts */
372 xtime.tv_sec = secs_since_1970;
373 xtime.tv_nsec = 0;
374 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
375
376 bfin_cs_cycles_init(); 377 bfin_cs_cycles_init();
377 bfin_cs_gptimer0_init(); 378 bfin_cs_gptimer0_init();
378 379
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 13c1ee3e6408..c9113619029f 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -112,11 +112,6 @@ u32 arch_gettimeoffset(void)
112} 112}
113#endif 113#endif
114 114
115static inline int set_rtc_mmss(unsigned long nowtime)
116{
117 return 0;
118}
119
120/* 115/*
121 * timer_interrupt() needs to keep up the real-time clock, 116 * timer_interrupt() needs to keep up the real-time clock,
122 * as well as call the "do_timer()" routine every clocktick 117 * as well as call the "do_timer()" routine every clocktick
@@ -126,29 +121,8 @@ __attribute__((l1_text))
126#endif 121#endif
127irqreturn_t timer_interrupt(int irq, void *dummy) 122irqreturn_t timer_interrupt(int irq, void *dummy)
128{ 123{
129 /* last time the cmos clock got updated */
130 static long last_rtc_update;
131
132 write_seqlock(&xtime_lock); 124 write_seqlock(&xtime_lock);
133 do_timer(1); 125 do_timer(1);
134
135 /*
136 * If we have an externally synchronized Linux clock, then update
137 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
138 * called as close as possible to 500 ms before the new second starts.
139 */
140 if (ntp_synced() &&
141 xtime.tv_sec > last_rtc_update + 660 &&
142 (xtime.tv_nsec / NSEC_PER_USEC) >=
143 500000 - ((unsigned)TICK_SIZE) / 2
144 && (xtime.tv_nsec / NSEC_PER_USEC) <=
145 500000 + ((unsigned)TICK_SIZE) / 2) {
146 if (set_rtc_mmss(xtime.tv_sec) == 0)
147 last_rtc_update = xtime.tv_sec;
148 else
149 /* Do it again in 60s. */
150 last_rtc_update = xtime.tv_sec - 600;
151 }
152 write_sequnlock(&xtime_lock); 126 write_sequnlock(&xtime_lock);
153 127
154#ifdef CONFIG_IPIPE 128#ifdef CONFIG_IPIPE
@@ -161,10 +135,15 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
161 return IRQ_HANDLED; 135 return IRQ_HANDLED;
162} 136}
163 137
164void __init time_init(void) 138void read_persistent_clock(struct timespec *ts)
165{ 139{
166 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */ 140 time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
141 ts->tv_sec = secs_since_1970;
142 ts->tv_nsec = 0;
143}
167 144
145void __init time_init(void)
146{
168#ifdef CONFIG_RTC_DRV_BFIN 147#ifdef CONFIG_RTC_DRV_BFIN
169 /* [#2663] hack to filter junk RTC values that would cause 148 /* [#2663] hack to filter junk RTC values that would cause
170 * userspace to have to deal with time values greater than 149 * userspace to have to deal with time values greater than
@@ -176,11 +155,5 @@ void __init time_init(void)
176 } 155 }
177#endif 156#endif
178 157
179 /* Initialize xtime. From now on, xtime is updated with timer interrupts */
180 xtime.tv_sec = secs_since_1970;
181 xtime.tv_nsec = 0;
182
183 wall_to_monotonic.tv_sec = -xtime.tv_sec;
184
185 time_sched_init(timer_interrupt); 158 time_sched_init(timer_interrupt);
186} 159}
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index 059eac6abda1..e25bf4440b51 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -23,6 +23,9 @@ config RWSEM_XCHGADD_ALGORITHM
23config GENERIC_TIME 23config GENERIC_TIME
24 def_bool y 24 def_bool y
25 25
26config GENERIC_CMOS_UPDATE
27 def_bool y
28
26config ARCH_USES_GETTIMEOFFSET 29config ARCH_USES_GETTIMEOFFSET
27 def_bool y 30 def_bool y
28 31
diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c
index 31ca1418d5a7..30adae594aef 100644
--- a/arch/cris/arch-v10/kernel/time.c
+++ b/arch/cris/arch-v10/kernel/time.c
@@ -26,7 +26,6 @@
26/* it will make jiffies at 96 hz instead of 100 hz though */ 26/* it will make jiffies at 96 hz instead of 100 hz though */
27#undef USE_CASCADE_TIMERS 27#undef USE_CASCADE_TIMERS
28 28
29extern void update_xtime_from_cmos(void);
30extern int set_rtc_mmss(unsigned long nowtime); 29extern int set_rtc_mmss(unsigned long nowtime);
31extern int have_rtc; 30extern int have_rtc;
32 31
@@ -188,8 +187,6 @@ stop_watchdog(void)
188#endif 187#endif
189} 188}
190 189
191/* last time the cmos clock got updated */
192static long last_rtc_update = 0;
193 190
194/* 191/*
195 * timer_interrupt() needs to keep up the real-time clock, 192 * timer_interrupt() needs to keep up the real-time clock,
@@ -232,24 +229,6 @@ timer_interrupt(int irq, void *dev_id)
232 do_timer(1); 229 do_timer(1);
233 230
234 cris_do_profile(regs); /* Save profiling information */ 231 cris_do_profile(regs); /* Save profiling information */
235
236 /*
237 * If we have an externally synchronized Linux clock, then update
238 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
239 * called as close as possible to 500 ms before the new second starts.
240 *
241 * The division here is not time critical since it will run once in
242 * 11 minutes
243 */
244 if (ntp_synced() &&
245 xtime.tv_sec > last_rtc_update + 660 &&
246 (xtime.tv_nsec / 1000) >= 500000 - (tick_nsec / 1000) / 2 &&
247 (xtime.tv_nsec / 1000) <= 500000 + (tick_nsec / 1000) / 2) {
248 if (set_rtc_mmss(xtime.tv_sec) == 0)
249 last_rtc_update = xtime.tv_sec;
250 else
251 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
252 }
253 return IRQ_HANDLED; 232 return IRQ_HANDLED;
254} 233}
255 234
@@ -274,22 +253,10 @@ time_init(void)
274 */ 253 */
275 loops_per_usec = 50; 254 loops_per_usec = 50;
276 255
277 if(RTC_INIT() < 0) { 256 if(RTC_INIT() < 0)
278 /* no RTC, start at 1980 */
279 xtime.tv_sec = 0;
280 xtime.tv_nsec = 0;
281 have_rtc = 0; 257 have_rtc = 0;
282 } else { 258 else
283 /* get the current time */
284 have_rtc = 1; 259 have_rtc = 1;
285 update_xtime_from_cmos();
286 }
287
288 /*
289 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
290 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
291 */
292 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
293 260
294 /* Setup the etrax timers 261 /* Setup the etrax timers
295 * Base frequency is 25000 hz, divider 250 -> 100 HZ 262 * Base frequency is 25000 hz, divider 250 -> 100 HZ
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index b1920d8de403..1ee0e1010228 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -44,7 +44,6 @@ unsigned long timer_regs[NR_CPUS] =
44#endif 44#endif
45}; 45};
46 46
47extern void update_xtime_from_cmos(void);
48extern int set_rtc_mmss(unsigned long nowtime); 47extern int set_rtc_mmss(unsigned long nowtime);
49extern int have_rtc; 48extern int have_rtc;
50 49
@@ -198,9 +197,6 @@ handle_watchdog_bite(struct pt_regs* regs)
198#endif 197#endif
199} 198}
200 199
201/* Last time the cmos clock got updated. */
202static long last_rtc_update = 0;
203
204/* 200/*
205 * timer_interrupt() needs to keep up the real-time clock, 201 * timer_interrupt() needs to keep up the real-time clock,
206 * as well as call the "do_timer()" routine every clocktick. 202 * as well as call the "do_timer()" routine every clocktick.
@@ -238,25 +234,6 @@ timer_interrupt(int irq, void *dev_id)
238 234
239 /* Call the real timer interrupt handler */ 235 /* Call the real timer interrupt handler */
240 do_timer(1); 236 do_timer(1);
241
242 /*
243 * If we have an externally synchronized Linux clock, then update
244 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
245 * called as close as possible to 500 ms before the new second starts.
246 *
247 * The division here is not time critical since it will run once in
248 * 11 minutes
249 */
250 if ((time_status & STA_UNSYNC) == 0 &&
251 xtime.tv_sec > last_rtc_update + 660 &&
252 (xtime.tv_nsec / 1000) >= 500000 - (tick_nsec / 1000) / 2 &&
253 (xtime.tv_nsec / 1000) <= 500000 + (tick_nsec / 1000) / 2) {
254 if (set_rtc_mmss(xtime.tv_sec) == 0)
255 last_rtc_update = xtime.tv_sec;
256 else
257 /* Do it again in 60 s */
258 last_rtc_update = xtime.tv_sec - 600;
259 }
260 return IRQ_HANDLED; 237 return IRQ_HANDLED;
261} 238}
262 239
@@ -309,23 +286,10 @@ time_init(void)
309 */ 286 */
310 loops_per_usec = 50; 287 loops_per_usec = 50;
311 288
312 if(RTC_INIT() < 0) { 289 if(RTC_INIT() < 0)
313 /* No RTC, start at 1980 */
314 xtime.tv_sec = 0;
315 xtime.tv_nsec = 0;
316 have_rtc = 0; 290 have_rtc = 0;
317 } else { 291 else
318 /* Get the current time */
319 have_rtc = 1; 292 have_rtc = 1;
320 update_xtime_from_cmos();
321 }
322
323 /*
324 * Initialize wall_to_monotonic such that adding it to
325 * xtime will yield zero, the tv_nsec field must be normalized
326 * (i.e., 0 <= nsec < NSEC_PER_SEC).
327 */
328 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
329 293
330 /* Start CPU local timer. */ 294 /* Start CPU local timer. */
331 cris_timer_init(); 295 cris_timer_init();
diff --git a/arch/cris/include/asm/atomic.h b/arch/cris/include/asm/atomic.h
index a6aca819e9f3..88dc9b9c4ba0 100644
--- a/arch/cris/include/asm/atomic.h
+++ b/arch/cris/include/asm/atomic.h
@@ -15,7 +15,7 @@
15 15
16#define ATOMIC_INIT(i) { (i) } 16#define ATOMIC_INIT(i) { (i) }
17 17
18#define atomic_read(v) ((v)->counter) 18#define atomic_read(v) (*(volatile int *)&(v)->counter)
19#define atomic_set(v,i) (((v)->counter) = (i)) 19#define atomic_set(v,i) (((v)->counter) = (i))
20 20
21/* These should be written in asm but we do it in C for now. */ 21/* These should be written in asm but we do it in C for now. */
diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c
index a05dd31f3efb..c72730d20ef6 100644
--- a/arch/cris/kernel/time.c
+++ b/arch/cris/kernel/time.c
@@ -98,6 +98,8 @@ unsigned long
98get_cmos_time(void) 98get_cmos_time(void)
99{ 99{
100 unsigned int year, mon, day, hour, min, sec; 100 unsigned int year, mon, day, hour, min, sec;
101 if(!have_rtc)
102 return 0;
101 103
102 sec = CMOS_READ(RTC_SECONDS); 104 sec = CMOS_READ(RTC_SECONDS);
103 min = CMOS_READ(RTC_MINUTES); 105 min = CMOS_READ(RTC_MINUTES);
@@ -119,19 +121,19 @@ get_cmos_time(void)
119 return mktime(year, mon, day, hour, min, sec); 121 return mktime(year, mon, day, hour, min, sec);
120} 122}
121 123
122/* update xtime from the CMOS settings. used when /dev/rtc gets a SET_TIME.
123 * TODO: this doesn't reset the fancy NTP phase stuff as do_settimeofday does.
124 */
125 124
126void 125int update_persistent_clock(struct timespec now)
127update_xtime_from_cmos(void)
128{ 126{
129 if(have_rtc) { 127 return set_rtc_mmss(now.tv_sec);
130 xtime.tv_sec = get_cmos_time();
131 xtime.tv_nsec = 0;
132 }
133} 128}
134 129
130void read_persistent_clock(struct timespec *ts)
131{
132 ts->tv_sec = get_cmos_time();
133 ts->tv_nsec = 0;
134}
135
136
135extern void cris_profile_sample(struct pt_regs* regs); 137extern void cris_profile_sample(struct pt_regs* regs);
136 138
137void 139void
diff --git a/arch/frv/include/asm/atomic.h b/arch/frv/include/asm/atomic.h
index 00a57af79afc..fae32c7fdcb6 100644
--- a/arch/frv/include/asm/atomic.h
+++ b/arch/frv/include/asm/atomic.h
@@ -36,7 +36,7 @@
36#define smp_mb__after_atomic_inc() barrier() 36#define smp_mb__after_atomic_inc() barrier()
37 37
38#define ATOMIC_INIT(i) { (i) } 38#define ATOMIC_INIT(i) { (i) }
39#define atomic_read(v) ((v)->counter) 39#define atomic_read(v) (*(volatile int *)&(v)->counter)
40#define atomic_set(v, i) (((v)->counter) = (i)) 40#define atomic_set(v, i) (((v)->counter) = (i))
41 41
42#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS 42#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
diff --git a/arch/frv/kernel/time.c b/arch/frv/kernel/time.c
index fb0ce7577225..0ddbbae83cb2 100644
--- a/arch/frv/kernel/time.c
+++ b/arch/frv/kernel/time.c
@@ -48,20 +48,12 @@ static struct irqaction timer_irq = {
48 .name = "timer", 48 .name = "timer",
49}; 49};
50 50
51static inline int set_rtc_mmss(unsigned long nowtime)
52{
53 return -1;
54}
55
56/* 51/*
57 * timer_interrupt() needs to keep up the real-time clock, 52 * timer_interrupt() needs to keep up the real-time clock,
58 * as well as call the "do_timer()" routine every clocktick 53 * as well as call the "do_timer()" routine every clocktick
59 */ 54 */
60static irqreturn_t timer_interrupt(int irq, void *dummy) 55static irqreturn_t timer_interrupt(int irq, void *dummy)
61{ 56{
62 /* last time the cmos clock got updated */
63 static long last_rtc_update = 0;
64
65 profile_tick(CPU_PROFILING); 57 profile_tick(CPU_PROFILING);
66 /* 58 /*
67 * Here we are in the timer irq handler. We just have irqs locally 59 * Here we are in the timer irq handler. We just have irqs locally
@@ -74,22 +66,6 @@ static irqreturn_t timer_interrupt(int irq, void *dummy)
74 66
75 do_timer(1); 67 do_timer(1);
76 68
77 /*
78 * If we have an externally synchronized Linux clock, then update
79 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
80 * called as close as possible to 500 ms before the new second starts.
81 */
82 if (ntp_synced() &&
83 xtime.tv_sec > last_rtc_update + 660 &&
84 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
85 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2
86 ) {
87 if (set_rtc_mmss(xtime.tv_sec) == 0)
88 last_rtc_update = xtime.tv_sec;
89 else
90 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
91 }
92
93#ifdef CONFIG_HEARTBEAT 69#ifdef CONFIG_HEARTBEAT
94 static unsigned short n; 70 static unsigned short n;
95 n++; 71 n++;
@@ -119,7 +95,8 @@ void time_divisor_init(void)
119 __set_TCSR_DATA(0, base >> 8); 95 __set_TCSR_DATA(0, base >> 8);
120} 96}
121 97
122void time_init(void) 98
99void read_persistent_clock(struct timespec *ts)
123{ 100{
124 unsigned int year, mon, day, hour, min, sec; 101 unsigned int year, mon, day, hour, min, sec;
125 102
@@ -135,9 +112,12 @@ void time_init(void)
135 112
136 if ((year += 1900) < 1970) 113 if ((year += 1900) < 1970)
137 year += 100; 114 year += 100;
138 xtime.tv_sec = mktime(year, mon, day, hour, min, sec); 115 ts->tv_sec = mktime(year, mon, day, hour, min, sec);
139 xtime.tv_nsec = 0; 116 ts->tv_nsec = 0;
117}
140 118
119void time_init(void)
120{
141 /* install scheduling interrupt handler */ 121 /* install scheduling interrupt handler */
142 setup_irq(IRQ_CPU_TIMER0, &timer_irq); 122 setup_irq(IRQ_CPU_TIMER0, &timer_irq);
143 123
diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index 33c8c0fa9583..e936804b7508 100644
--- a/arch/h8300/include/asm/atomic.h
+++ b/arch/h8300/include/asm/atomic.h
@@ -10,7 +10,7 @@
10 10
11#define ATOMIC_INIT(i) { (i) } 11#define ATOMIC_INIT(i) { (i) }
12 12
13#define atomic_read(v) ((v)->counter) 13#define atomic_read(v) (*(volatile int *)&(v)->counter)
14#define atomic_set(v, i) (((v)->counter) = i) 14#define atomic_set(v, i) (((v)->counter) = i)
15 15
16#include <asm/system.h> 16#include <asm/system.h>
diff --git a/arch/h8300/kernel/time.c b/arch/h8300/kernel/time.c
index 7f2d6cfbb4b6..165005aff9df 100644
--- a/arch/h8300/kernel/time.c
+++ b/arch/h8300/kernel/time.c
@@ -41,7 +41,7 @@ void h8300_timer_tick(void)
41 update_process_times(user_mode(get_irq_regs())); 41 update_process_times(user_mode(get_irq_regs()));
42} 42}
43 43
44void __init time_init(void) 44void read_persistent_clock(struct timespec *ts)
45{ 45{
46 unsigned int year, mon, day, hour, min, sec; 46 unsigned int year, mon, day, hour, min, sec;
47 47
@@ -56,8 +56,12 @@ void __init time_init(void)
56#endif 56#endif
57 if ((year += 1900) < 1970) 57 if ((year += 1900) < 1970)
58 year += 100; 58 year += 100;
59 xtime.tv_sec = mktime(year, mon, day, hour, min, sec); 59 ts->tv_sec = mktime(year, mon, day, hour, min, sec);
60 xtime.tv_nsec = 0; 60 ts->tv_nsec = 0;
61}
62
63void __init time_init(void)
64{
61 65
62 h8300_timer_setup(); 66 h8300_timer_setup();
63} 67}
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 4d4f4188cdf1..9676100b83ee 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -59,9 +59,6 @@ config NEED_DMA_MAP_STATE
59config SWIOTLB 59config SWIOTLB
60 bool 60 bool
61 61
62config IOMMU_HELPER
63 bool
64
65config GENERIC_LOCKBREAK 62config GENERIC_LOCKBREAK
66 def_bool n 63 def_bool n
67 64
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index e14c492a8a93..4ce8d1358fee 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -2046,13 +2046,13 @@ acpi_sba_ioc_add(struct acpi_device *device)
2046 struct ioc *ioc; 2046 struct ioc *ioc;
2047 acpi_status status; 2047 acpi_status status;
2048 u64 hpa, length; 2048 u64 hpa, length;
2049 struct acpi_device_info *dev_info; 2049 struct acpi_device_info *adi;
2050 2050
2051 status = hp_acpi_csr_space(device->handle, &hpa, &length); 2051 status = hp_acpi_csr_space(device->handle, &hpa, &length);
2052 if (ACPI_FAILURE(status)) 2052 if (ACPI_FAILURE(status))
2053 return 1; 2053 return 1;
2054 2054
2055 status = acpi_get_object_info(device->handle, &dev_info); 2055 status = acpi_get_object_info(device->handle, &adi);
2056 if (ACPI_FAILURE(status)) 2056 if (ACPI_FAILURE(status))
2057 return 1; 2057 return 1;
2058 2058
@@ -2060,13 +2060,13 @@ acpi_sba_ioc_add(struct acpi_device *device)
2060 * For HWP0001, only SBA appears in ACPI namespace. It encloses the PCI 2060 * For HWP0001, only SBA appears in ACPI namespace. It encloses the PCI
2061 * root bridges, and its CSR space includes the IOC function. 2061 * root bridges, and its CSR space includes the IOC function.
2062 */ 2062 */
2063 if (strncmp("HWP0001", dev_info->hardware_id.string, 7) == 0) { 2063 if (strncmp("HWP0001", adi->hardware_id.string, 7) == 0) {
2064 hpa += ZX1_IOC_OFFSET; 2064 hpa += ZX1_IOC_OFFSET;
2065 /* zx1 based systems default to kernel page size iommu pages */ 2065 /* zx1 based systems default to kernel page size iommu pages */
2066 if (!iovp_shift) 2066 if (!iovp_shift)
2067 iovp_shift = min(PAGE_SHIFT, 16); 2067 iovp_shift = min(PAGE_SHIFT, 16);
2068 } 2068 }
2069 kfree(dev_info); 2069 kfree(adi);
2070 2070
2071 /* 2071 /*
2072 * default anything not caught above or specified on cmdline to 4k 2072 * default anything not caught above or specified on cmdline to 4k
diff --git a/arch/ia64/include/asm/atomic.h b/arch/ia64/include/asm/atomic.h
index 88405cb0832a..4e1948447a00 100644
--- a/arch/ia64/include/asm/atomic.h
+++ b/arch/ia64/include/asm/atomic.h
@@ -21,8 +21,8 @@
21#define ATOMIC_INIT(i) ((atomic_t) { (i) }) 21#define ATOMIC_INIT(i) ((atomic_t) { (i) })
22#define ATOMIC64_INIT(i) ((atomic64_t) { (i) }) 22#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
23 23
24#define atomic_read(v) ((v)->counter) 24#define atomic_read(v) (*(volatile int *)&(v)->counter)
25#define atomic64_read(v) ((v)->counter) 25#define atomic64_read(v) (*(volatile long *)&(v)->counter)
26 26
27#define atomic_set(v,i) (((v)->counter) = (i)) 27#define atomic_set(v,i) (((v)->counter) = (i))
28#define atomic64_set(v,i) (((v)->counter) = (i)) 28#define atomic64_set(v,i) (((v)->counter) = (i))
diff --git a/arch/ia64/include/asm/bitops.h b/arch/ia64/include/asm/bitops.h
index 6ebc229a1c51..9da3df6f1a52 100644
--- a/arch/ia64/include/asm/bitops.h
+++ b/arch/ia64/include/asm/bitops.h
@@ -437,17 +437,18 @@ __fls (unsigned long x)
437 * hweightN: returns the hamming weight (i.e. the number 437 * hweightN: returns the hamming weight (i.e. the number
438 * of bits set) of a N-bit word 438 * of bits set) of a N-bit word
439 */ 439 */
440static __inline__ unsigned long 440static __inline__ unsigned long __arch_hweight64(unsigned long x)
441hweight64 (unsigned long x)
442{ 441{
443 unsigned long result; 442 unsigned long result;
444 result = ia64_popcnt(x); 443 result = ia64_popcnt(x);
445 return result; 444 return result;
446} 445}
447 446
448#define hweight32(x) (unsigned int) hweight64((x) & 0xfffffffful) 447#define __arch_hweight32(x) ((unsigned int) __arch_hweight64((x) & 0xfffffffful))
449#define hweight16(x) (unsigned int) hweight64((x) & 0xfffful) 448#define __arch_hweight16(x) ((unsigned int) __arch_hweight64((x) & 0xfffful))
450#define hweight8(x) (unsigned int) hweight64((x) & 0xfful) 449#define __arch_hweight8(x) ((unsigned int) __arch_hweight64((x) & 0xfful))
450
451#include <asm-generic/bitops/const_hweight.h>
451 452
452#endif /* __KERNEL__ */ 453#endif /* __KERNEL__ */
453 454
diff --git a/arch/ia64/include/asm/mmzone.h b/arch/ia64/include/asm/mmzone.h
index f2ca32069b3f..e0de61709cf1 100644
--- a/arch/ia64/include/asm/mmzone.h
+++ b/arch/ia64/include/asm/mmzone.h
@@ -19,16 +19,12 @@
19 19
20static inline int pfn_to_nid(unsigned long pfn) 20static inline int pfn_to_nid(unsigned long pfn)
21{ 21{
22#ifdef CONFIG_NUMA
23 extern int paddr_to_nid(unsigned long); 22 extern int paddr_to_nid(unsigned long);
24 int nid = paddr_to_nid(pfn << PAGE_SHIFT); 23 int nid = paddr_to_nid(pfn << PAGE_SHIFT);
25 if (nid < 0) 24 if (nid < 0)
26 return 0; 25 return 0;
27 else 26 else
28 return nid; 27 return nid;
29#else
30 return 0;
31#endif
32} 28}
33 29
34#ifdef CONFIG_IA64_DIG /* DIG systems are small */ 30#ifdef CONFIG_IA64_DIG /* DIG systems are small */
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 4d1a7e9314cf..c6c90f39f4d9 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -785,6 +785,14 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
785 return 0; 785 return 0;
786} 786}
787 787
788int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
789{
790 if (isa_irq >= 16)
791 return -1;
792 *gsi = isa_irq;
793 return 0;
794}
795
788/* 796/*
789 * ACPI based hotplug CPU support 797 * ACPI based hotplug CPU support
790 */ 798 */
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
index b0b4e6e710f2..22f61526a8e1 100644
--- a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
+++ b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
@@ -113,7 +113,7 @@ processor_get_freq (
113 dprintk("processor_get_freq\n"); 113 dprintk("processor_get_freq\n");
114 114
115 saved_mask = current->cpus_allowed; 115 saved_mask = current->cpus_allowed;
116 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 116 set_cpus_allowed_ptr(current, cpumask_of(cpu));
117 if (smp_processor_id() != cpu) 117 if (smp_processor_id() != cpu)
118 goto migrate_end; 118 goto migrate_end;
119 119
@@ -121,7 +121,7 @@ processor_get_freq (
121 ret = processor_get_pstate(&value); 121 ret = processor_get_pstate(&value);
122 122
123 if (ret) { 123 if (ret) {
124 set_cpus_allowed(current, saved_mask); 124 set_cpus_allowed_ptr(current, &saved_mask);
125 printk(KERN_WARNING "get performance failed with error %d\n", 125 printk(KERN_WARNING "get performance failed with error %d\n",
126 ret); 126 ret);
127 ret = 0; 127 ret = 0;
@@ -131,7 +131,7 @@ processor_get_freq (
131 ret = (clock_freq*1000); 131 ret = (clock_freq*1000);
132 132
133migrate_end: 133migrate_end:
134 set_cpus_allowed(current, saved_mask); 134 set_cpus_allowed_ptr(current, &saved_mask);
135 return ret; 135 return ret;
136} 136}
137 137
@@ -151,7 +151,7 @@ processor_set_freq (
151 dprintk("processor_set_freq\n"); 151 dprintk("processor_set_freq\n");
152 152
153 saved_mask = current->cpus_allowed; 153 saved_mask = current->cpus_allowed;
154 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 154 set_cpus_allowed_ptr(current, cpumask_of(cpu));
155 if (smp_processor_id() != cpu) { 155 if (smp_processor_id() != cpu) {
156 retval = -EAGAIN; 156 retval = -EAGAIN;
157 goto migrate_end; 157 goto migrate_end;
@@ -208,7 +208,7 @@ processor_set_freq (
208 retval = 0; 208 retval = 0;
209 209
210migrate_end: 210migrate_end:
211 set_cpus_allowed(current, saved_mask); 211 set_cpus_allowed_ptr(current, &saved_mask);
212 return (retval); 212 return (retval);
213} 213}
214 214
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 640479304ac0..f14c35f9b03a 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -29,6 +29,7 @@
29#include <linux/threads.h> 29#include <linux/threads.h>
30#include <linux/bitops.h> 30#include <linux/bitops.h>
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <linux/ratelimit.h>
32 33
33#include <asm/delay.h> 34#include <asm/delay.h>
34#include <asm/intrinsics.h> 35#include <asm/intrinsics.h>
@@ -467,13 +468,9 @@ ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
467 sp = ia64_getreg(_IA64_REG_SP); 468 sp = ia64_getreg(_IA64_REG_SP);
468 469
469 if ((sp - bsp) < 1024) { 470 if ((sp - bsp) < 1024) {
470 static unsigned char count; 471 static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
471 static long last_time;
472 472
473 if (time_after(jiffies, last_time + 5 * HZ)) 473 if (__ratelimit(&ratelimit)) {
474 count = 0;
475 if (++count < 5) {
476 last_time = jiffies;
477 printk("ia64_handle_irq: DANGER: less than " 474 printk("ia64_handle_irq: DANGER: less than "
478 "1KB of free stack space!!\n" 475 "1KB of free stack space!!\n"
479 "(bsp=0x%lx, sp=%lx)\n", bsp, sp); 476 "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
diff --git a/arch/ia64/kernel/salinfo.c b/arch/ia64/kernel/salinfo.c
index e6676fca4828..aa8b5fa1a8de 100644
--- a/arch/ia64/kernel/salinfo.c
+++ b/arch/ia64/kernel/salinfo.c
@@ -404,10 +404,9 @@ static void
404call_on_cpu(int cpu, void (*fn)(void *), void *arg) 404call_on_cpu(int cpu, void (*fn)(void *), void *arg)
405{ 405{
406 cpumask_t save_cpus_allowed = current->cpus_allowed; 406 cpumask_t save_cpus_allowed = current->cpus_allowed;
407 cpumask_t new_cpus_allowed = cpumask_of_cpu(cpu); 407 set_cpus_allowed_ptr(current, cpumask_of(cpu));
408 set_cpus_allowed(current, new_cpus_allowed);
409 (*fn)(arg); 408 (*fn)(arg);
410 set_cpus_allowed(current, save_cpus_allowed); 409 set_cpus_allowed_ptr(current, &save_cpus_allowed);
411} 410}
412 411
413static void 412static void
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 47a192781b0a..653b3c46ea82 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -430,18 +430,16 @@ static int __init rtc_init(void)
430} 430}
431module_init(rtc_init); 431module_init(rtc_init);
432 432
433void read_persistent_clock(struct timespec *ts)
434{
435 efi_gettimeofday(ts);
436}
437
433void __init 438void __init
434time_init (void) 439time_init (void)
435{ 440{
436 register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction); 441 register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
437 efi_gettimeofday(&xtime);
438 ia64_init_itm(); 442 ia64_init_itm();
439
440 /*
441 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
442 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
443 */
444 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
445} 443}
446 444
447/* 445/*
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 28f299de2903..0baa1bbb65fe 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -361,12 +361,12 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
361 return 0; 361 return 0;
362 362
363 oldmask = current->cpus_allowed; 363 oldmask = current->cpus_allowed;
364 retval = set_cpus_allowed(current, cpumask_of_cpu(cpu)); 364 retval = set_cpus_allowed_ptr(current, cpumask_of(cpu));
365 if (unlikely(retval)) 365 if (unlikely(retval))
366 return retval; 366 return retval;
367 367
368 retval = cpu_cache_sysfs_init(cpu); 368 retval = cpu_cache_sysfs_init(cpu);
369 set_cpus_allowed(current, oldmask); 369 set_cpus_allowed_ptr(current, &oldmask);
370 if (unlikely(retval < 0)) 370 if (unlikely(retval < 0))
371 return retval; 371 return retval;
372 372
diff --git a/arch/ia64/kernel/unaligned.c b/arch/ia64/kernel/unaligned.c
index 776dd40397e2..622772b7fb6c 100644
--- a/arch/ia64/kernel/unaligned.c
+++ b/arch/ia64/kernel/unaligned.c
@@ -17,6 +17,7 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/sched.h> 18#include <linux/sched.h>
19#include <linux/tty.h> 19#include <linux/tty.h>
20#include <linux/ratelimit.h>
20 21
21#include <asm/intrinsics.h> 22#include <asm/intrinsics.h>
22#include <asm/processor.h> 23#include <asm/processor.h>
@@ -1283,24 +1284,9 @@ emulate_store_float (unsigned long ifa, load_store_t ld, struct pt_regs *regs)
1283/* 1284/*
1284 * Make sure we log the unaligned access, so that user/sysadmin can notice it and 1285 * Make sure we log the unaligned access, so that user/sysadmin can notice it and
1285 * eventually fix the program. However, we don't want to do that for every access so we 1286 * eventually fix the program. However, we don't want to do that for every access so we
1286 * pace it with jiffies. This isn't really MP-safe, but it doesn't really have to be 1287 * pace it with jiffies.
1287 * either...
1288 */ 1288 */
1289static int 1289static DEFINE_RATELIMIT_STATE(logging_rate_limit, 5 * HZ, 5);
1290within_logging_rate_limit (void)
1291{
1292 static unsigned long count, last_time;
1293
1294 if (time_after(jiffies, last_time + 5 * HZ))
1295 count = 0;
1296 if (count < 5) {
1297 last_time = jiffies;
1298 count++;
1299 return 1;
1300 }
1301 return 0;
1302
1303}
1304 1290
1305void 1291void
1306ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) 1292ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs)
@@ -1337,7 +1323,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs)
1337 1323
1338 if (!no_unaligned_warning && 1324 if (!no_unaligned_warning &&
1339 !(current->thread.flags & IA64_THREAD_UAC_NOPRINT) && 1325 !(current->thread.flags & IA64_THREAD_UAC_NOPRINT) &&
1340 within_logging_rate_limit()) 1326 __ratelimit(&logging_rate_limit))
1341 { 1327 {
1342 char buf[200]; /* comm[] is at most 16 bytes... */ 1328 char buf[200]; /* comm[] is at most 16 bytes... */
1343 size_t len; 1329 size_t len;
@@ -1370,7 +1356,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs)
1370 } 1356 }
1371 } 1357 }
1372 } else { 1358 } else {
1373 if (within_logging_rate_limit()) { 1359 if (__ratelimit(&logging_rate_limit)) {
1374 printk(KERN_WARNING "kernel unaligned access to 0x%016lx, ip=0x%016lx\n", 1360 printk(KERN_WARNING "kernel unaligned access to 0x%016lx, ip=0x%016lx\n",
1375 ifa, regs->cr_iip + ipsr->ri); 1361 ifa, regs->cr_iip + ipsr->ri);
1376 if (unaligned_dump_stack) 1362 if (unaligned_dump_stack)
diff --git a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c
index 19261a99e623..0799fea4c588 100644
--- a/arch/ia64/mm/fault.c
+++ b/arch/ia64/mm/fault.c
@@ -148,7 +148,6 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re
148 if ((vma->vm_flags & mask) != mask) 148 if ((vma->vm_flags & mask) != mask)
149 goto bad_area; 149 goto bad_area;
150 150
151 survive:
152 /* 151 /*
153 * If for any reason at all we couldn't handle the fault, make 152 * If for any reason at all we couldn't handle the fault, make
154 * sure we exit gracefully rather than endlessly redo the 153 * sure we exit gracefully rather than endlessly redo the
@@ -276,13 +275,7 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re
276 275
277 out_of_memory: 276 out_of_memory:
278 up_read(&mm->mmap_sem); 277 up_read(&mm->mmap_sem);
279 if (is_global_init(current)) { 278 if (!user_mode(regs))
280 yield(); 279 goto no_context;
281 down_read(&mm->mmap_sem); 280 pagefault_out_of_memory();
282 goto survive;
283 }
284 printk(KERN_CRIT "VM: killing process %s\n", current->comm);
285 if (user_mode(regs))
286 do_group_exit(SIGKILL);
287 goto no_context;
288} 281}
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
index 55ac3c4e11d2..f6c1c5fd075d 100644
--- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c
+++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
@@ -629,9 +629,9 @@ static int sn_hwperf_op_cpu(struct sn_hwperf_op_info *op_info)
629 else { 629 else {
630 /* migrate the task before calling SAL */ 630 /* migrate the task before calling SAL */
631 save_allowed = current->cpus_allowed; 631 save_allowed = current->cpus_allowed;
632 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 632 set_cpus_allowed_ptr(current, cpumask_of(cpu));
633 sn_hwperf_call_sal(op_info); 633 sn_hwperf_call_sal(op_info);
634 set_cpus_allowed(current, save_allowed); 634 set_cpus_allowed_ptr(current, &save_allowed);
635 } 635 }
636 } 636 }
637 r = op_info->ret; 637 r = op_info->ret;
diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h
index 63f0cf0f50dd..d44a51e5271b 100644
--- a/arch/m32r/include/asm/atomic.h
+++ b/arch/m32r/include/asm/atomic.h
@@ -26,7 +26,7 @@
26 * 26 *
27 * Atomically reads the value of @v. 27 * Atomically reads the value of @v.
28 */ 28 */
29#define atomic_read(v) ((v)->counter) 29#define atomic_read(v) (*(volatile int *)&(v)->counter)
30 30
31/** 31/**
32 * atomic_set - set atomic variable 32 * atomic_set - set atomic variable
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c
index 9cedcef11575..bda86820bffd 100644
--- a/arch/m32r/kernel/time.c
+++ b/arch/m32r/kernel/time.c
@@ -106,24 +106,6 @@ u32 arch_gettimeoffset(void)
106} 106}
107 107
108/* 108/*
109 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
110 * called 500 ms after the second nowtime has started, because when
111 * nowtime is written into the registers of the CMOS clock, it will
112 * jump to the next second precisely 500 ms later. Check the Motorola
113 * MC146818A or Dallas DS12887 data sheet for details.
114 *
115 * BUG: This routine does not handle hour overflow properly; it just
116 * sets the minutes. Usually you won't notice until after reboot!
117 */
118static inline int set_rtc_mmss(unsigned long nowtime)
119{
120 return 0;
121}
122
123/* last time the cmos clock got updated */
124static long last_rtc_update = 0;
125
126/*
127 * timer_interrupt() needs to keep up the real-time clock, 109 * timer_interrupt() needs to keep up the real-time clock,
128 * as well as call the "do_timer()" routine every clocktick 110 * as well as call the "do_timer()" routine every clocktick
129 */ 111 */
@@ -138,23 +120,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
138#ifndef CONFIG_SMP 120#ifndef CONFIG_SMP
139 update_process_times(user_mode(get_irq_regs())); 121 update_process_times(user_mode(get_irq_regs()));
140#endif 122#endif
141 /*
142 * If we have an externally synchronized Linux clock, then update
143 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
144 * called as close as possible to 500 ms before the new second starts.
145 */
146 write_seqlock(&xtime_lock);
147 if (ntp_synced()
148 && xtime.tv_sec > last_rtc_update + 660
149 && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned)TICK_SIZE) / 2
150 && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned)TICK_SIZE) / 2)
151 {
152 if (set_rtc_mmss(xtime.tv_sec) == 0)
153 last_rtc_update = xtime.tv_sec;
154 else /* do it again in 60 s */
155 last_rtc_update = xtime.tv_sec - 600;
156 }
157 write_sequnlock(&xtime_lock);
158 /* As we return to user mode fire off the other CPU schedulers.. 123 /* As we return to user mode fire off the other CPU schedulers..
159 this is basically because we don't yet share IRQ's around. 124 this is basically because we don't yet share IRQ's around.
160 This message is rigged to be safe on the 386 - basically it's 125 This message is rigged to be safe on the 386 - basically it's
@@ -174,7 +139,7 @@ static struct irqaction irq0 = {
174 .name = "MFT2", 139 .name = "MFT2",
175}; 140};
176 141
177void __init time_init(void) 142void read_persistent_clock(struct timespec *ts)
178{ 143{
179 unsigned int epoch, year, mon, day, hour, min, sec; 144 unsigned int epoch, year, mon, day, hour, min, sec;
180 145
@@ -194,11 +159,13 @@ void __init time_init(void)
194 epoch = 1952; 159 epoch = 1952;
195 year += epoch; 160 year += epoch;
196 161
197 xtime.tv_sec = mktime(year, mon, day, hour, min, sec); 162 ts->tv_sec = mktime(year, mon, day, hour, min, sec);
198 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 163 ts->tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
199 set_normalized_timespec(&wall_to_monotonic, 164}
200 -xtime.tv_sec, -xtime.tv_nsec);
201 165
166
167void __init time_init(void)
168{
202#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ 169#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
203 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ 170 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
204 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) 171 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
diff --git a/arch/m68k/amiga/Makefile b/arch/m68k/amiga/Makefile
index 6a0d7650f980..11dd30b16b3b 100644
--- a/arch/m68k/amiga/Makefile
+++ b/arch/m68k/amiga/Makefile
@@ -2,6 +2,6 @@
2# Makefile for Linux arch/m68k/amiga source directory 2# Makefile for Linux arch/m68k/amiga source directory
3# 3#
4 4
5obj-y := config.o amiints.o cia.o chipram.o amisound.o 5obj-y := config.o amiints.o cia.o chipram.o amisound.o platform.o
6 6
7obj-$(CONFIG_AMIGA_PCMCIA) += pcmcia.o 7obj-$(CONFIG_AMIGA_PCMCIA) += pcmcia.o
diff --git a/arch/m68k/amiga/platform.c b/arch/m68k/amiga/platform.c
new file mode 100644
index 000000000000..38f18bf14737
--- /dev/null
+++ b/arch/m68k/amiga/platform.c
@@ -0,0 +1,83 @@
1/*
2 * Copyright (C) 2007-2009 Geert Uytterhoeven
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 */
8
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/zorro.h>
12
13#include <asm/amigahw.h>
14
15
16#ifdef CONFIG_ZORRO
17
18static const struct resource zorro_resources[] __initconst = {
19 /* Zorro II regions (on Zorro II/III) */
20 {
21 .name = "Zorro II exp",
22 .start = 0x00e80000,
23 .end = 0x00efffff,
24 .flags = IORESOURCE_MEM,
25 }, {
26 .name = "Zorro II mem",
27 .start = 0x00200000,
28 .end = 0x009fffff,
29 .flags = IORESOURCE_MEM,
30 },
31 /* Zorro III regions (on Zorro III only) */
32 {
33 .name = "Zorro III exp",
34 .start = 0xff000000,
35 .end = 0xffffffff,
36 .flags = IORESOURCE_MEM,
37 }, {
38 .name = "Zorro III cfg",
39 .start = 0x40000000,
40 .end = 0x7fffffff,
41 .flags = IORESOURCE_MEM,
42 }
43};
44
45
46static int __init amiga_init_bus(void)
47{
48 if (!MACH_IS_AMIGA || !AMIGAHW_PRESENT(ZORRO))
49 return -ENODEV;
50
51 platform_device_register_simple("amiga-zorro", -1, zorro_resources,
52 AMIGAHW_PRESENT(ZORRO3) ? 4 : 2);
53 return 0;
54}
55
56subsys_initcall(amiga_init_bus);
57
58#endif /* CONFIG_ZORRO */
59
60
61static int __init amiga_init_devices(void)
62{
63 if (!MACH_IS_AMIGA)
64 return -ENODEV;
65
66 /* video hardware */
67 if (AMIGAHW_PRESENT(AMI_VIDEO))
68 platform_device_register_simple("amiga-video", -1, NULL, 0);
69
70
71 /* sound hardware */
72 if (AMIGAHW_PRESENT(AMI_AUDIO))
73 platform_device_register_simple("amiga-audio", -1, NULL, 0);
74
75
76 /* storage interfaces */
77 if (AMIGAHW_PRESENT(AMI_FLOPPY))
78 platform_device_register_simple("amiga-floppy", -1, NULL, 0);
79
80 return 0;
81}
82
83device_initcall(amiga_init_devices);
diff --git a/arch/m68k/bvme6000/rtc.c b/arch/m68k/bvme6000/rtc.c
index b46ea1714a89..cb8617bb194b 100644
--- a/arch/m68k/bvme6000/rtc.c
+++ b/arch/m68k/bvme6000/rtc.c
@@ -9,7 +9,6 @@
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/errno.h> 10#include <linux/errno.h>
11#include <linux/miscdevice.h> 11#include <linux/miscdevice.h>
12#include <linux/smp_lock.h>
13#include <linux/ioport.h> 12#include <linux/ioport.h>
14#include <linux/capability.h> 13#include <linux/capability.h>
15#include <linux/fcntl.h> 14#include <linux/fcntl.h>
@@ -35,10 +34,9 @@
35static unsigned char days_in_mo[] = 34static unsigned char days_in_mo[] =
36{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; 35{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
37 36
38static char rtc_status; 37static atomic_t rtc_status = ATOMIC_INIT(1);
39 38
40static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, 39static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
41 unsigned long arg)
42{ 40{
43 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 41 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
44 unsigned char msr; 42 unsigned char msr;
@@ -132,29 +130,20 @@ static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
132} 130}
133 131
134/* 132/*
135 * We enforce only one user at a time here with the open/close. 133 * We enforce only one user at a time here with the open/close.
136 * Also clear the previous interrupt data on an open, and clean
137 * up things on a close.
138 */ 134 */
139
140static int rtc_open(struct inode *inode, struct file *file) 135static int rtc_open(struct inode *inode, struct file *file)
141{ 136{
142 lock_kernel(); 137 if (!atomic_dec_and_test(&rtc_status)) {
143 if(rtc_status) { 138 atomic_inc(&rtc_status);
144 unlock_kernel();
145 return -EBUSY; 139 return -EBUSY;
146 } 140 }
147
148 rtc_status = 1;
149 unlock_kernel();
150 return 0; 141 return 0;
151} 142}
152 143
153static int rtc_release(struct inode *inode, struct file *file) 144static int rtc_release(struct inode *inode, struct file *file)
154{ 145{
155 lock_kernel(); 146 atomic_inc(&rtc_status);
156 rtc_status = 0;
157 unlock_kernel();
158 return 0; 147 return 0;
159} 148}
160 149
@@ -163,9 +152,9 @@ static int rtc_release(struct inode *inode, struct file *file)
163 */ 152 */
164 153
165static const struct file_operations rtc_fops = { 154static const struct file_operations rtc_fops = {
166 .ioctl = rtc_ioctl, 155 .unlocked_ioctl = rtc_ioctl,
167 .open = rtc_open, 156 .open = rtc_open,
168 .release = rtc_release, 157 .release = rtc_release,
169}; 158};
170 159
171static struct miscdevice rtc_dev = { 160static struct miscdevice rtc_dev = {
diff --git a/arch/m68k/hp300/time.h b/arch/m68k/hp300/time.h
index f5b3d098b0f5..7b98242960de 100644
--- a/arch/m68k/hp300/time.h
+++ b/arch/m68k/hp300/time.h
@@ -1,4 +1,2 @@
1extern void hp300_sched_init(irq_handler_t vector); 1extern void hp300_sched_init(irq_handler_t vector);
2extern unsigned long hp300_gettimeoffset (void); 2extern unsigned long hp300_gettimeoffset(void);
3
4
diff --git a/arch/m68k/include/asm/atomic_mm.h b/arch/m68k/include/asm/atomic_mm.h
index d9d2ed647435..6a223b3f7e74 100644
--- a/arch/m68k/include/asm/atomic_mm.h
+++ b/arch/m68k/include/asm/atomic_mm.h
@@ -15,7 +15,7 @@
15 15
16#define ATOMIC_INIT(i) { (i) } 16#define ATOMIC_INIT(i) { (i) }
17 17
18#define atomic_read(v) ((v)->counter) 18#define atomic_read(v) (*(volatile int *)&(v)->counter)
19#define atomic_set(v, i) (((v)->counter) = i) 19#define atomic_set(v, i) (((v)->counter) = i)
20 20
21static inline void atomic_add(int i, atomic_t *v) 21static inline void atomic_add(int i, atomic_t *v)
diff --git a/arch/m68k/include/asm/atomic_no.h b/arch/m68k/include/asm/atomic_no.h
index 5674cb9449bd..289310c63a8a 100644
--- a/arch/m68k/include/asm/atomic_no.h
+++ b/arch/m68k/include/asm/atomic_no.h
@@ -15,7 +15,7 @@
15 15
16#define ATOMIC_INIT(i) { (i) } 16#define ATOMIC_INIT(i) { (i) }
17 17
18#define atomic_read(v) ((v)->counter) 18#define atomic_read(v) (*(volatile int *)&(v)->counter)
19#define atomic_set(v, i) (((v)->counter) = i) 19#define atomic_set(v, i) (((v)->counter) = i)
20 20
21static __inline__ void atomic_add(int i, atomic_t *v) 21static __inline__ void atomic_add(int i, atomic_t *v)
diff --git a/arch/m68k/include/asm/bitops_mm.h b/arch/m68k/include/asm/bitops_mm.h
index 9bde784e7bad..b4ecdaada520 100644
--- a/arch/m68k/include/asm/bitops_mm.h
+++ b/arch/m68k/include/asm/bitops_mm.h
@@ -365,6 +365,10 @@ static inline int minix_test_bit(int nr, const void *vaddr)
365#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 24, (unsigned long *)(addr)) 365#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 24, (unsigned long *)(addr))
366#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) 366#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr))
367#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) 367#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr))
368#define ext2_find_next_zero_bit(addr, size, offset) \
369 generic_find_next_zero_le_bit((unsigned long *)addr, size, offset)
370#define ext2_find_next_bit(addr, size, offset) \
371 generic_find_next_le_bit((unsigned long *)addr, size, offset)
368 372
369static inline int ext2_test_bit(int nr, const void *vaddr) 373static inline int ext2_test_bit(int nr, const void *vaddr)
370{ 374{
@@ -394,10 +398,9 @@ static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size)
394 return (p - addr) * 32 + res; 398 return (p - addr) * 32 + res;
395} 399}
396 400
397static inline int ext2_find_next_zero_bit(const void *vaddr, unsigned size, 401static inline unsigned long generic_find_next_zero_le_bit(const unsigned long *addr,
398 unsigned offset) 402 unsigned long size, unsigned long offset)
399{ 403{
400 const unsigned long *addr = vaddr;
401 const unsigned long *p = addr + (offset >> 5); 404 const unsigned long *p = addr + (offset >> 5);
402 int bit = offset & 31UL, res; 405 int bit = offset & 31UL, res;
403 406
@@ -437,10 +440,9 @@ static inline int ext2_find_first_bit(const void *vaddr, unsigned size)
437 return (p - addr) * 32 + res; 440 return (p - addr) * 32 + res;
438} 441}
439 442
440static inline int ext2_find_next_bit(const void *vaddr, unsigned size, 443static inline unsigned long generic_find_next_le_bit(const unsigned long *addr,
441 unsigned offset) 444 unsigned long size, unsigned long offset)
442{ 445{
443 const unsigned long *addr = vaddr;
444 const unsigned long *p = addr + (offset >> 5); 446 const unsigned long *p = addr + (offset >> 5);
445 int bit = offset & 31UL, res; 447 int bit = offset & 31UL, res;
446 448
diff --git a/arch/m68k/include/asm/param.h b/arch/m68k/include/asm/param.h
index 85c41b75aa78..36265ccf5c7b 100644
--- a/arch/m68k/include/asm/param.h
+++ b/arch/m68k/include/asm/param.h
@@ -1,26 +1,12 @@
1#ifndef _M68K_PARAM_H 1#ifndef _M68K_PARAM_H
2#define _M68K_PARAM_H 2#define _M68K_PARAM_H
3 3
4#ifdef __KERNEL__
5# define HZ CONFIG_HZ /* Internal kernel timer frequency */
6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#ifdef __uClinux__ 4#ifdef __uClinux__
15#define EXEC_PAGESIZE 4096 5#define EXEC_PAGESIZE 4096
16#else 6#else
17#define EXEC_PAGESIZE 8192 7#define EXEC_PAGESIZE 8192
18#endif 8#endif
19 9
20#ifndef NOGROUP 10#include <asm-generic/param.h>
21#define NOGROUP (-1)
22#endif
23
24#define MAXHOSTNAMELEN 64 /* max length of hostname */
25 11
26#endif /* _M68K_PARAM_H */ 12#endif /* _M68K_PARAM_H */
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 17dc2a31a7ca..4926b3856c15 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -73,21 +73,24 @@ static irqreturn_t timer_interrupt(int irq, void *dummy)
73 return IRQ_HANDLED; 73 return IRQ_HANDLED;
74} 74}
75 75
76void __init time_init(void) 76void read_persistent_clock(struct timespec *ts)
77{ 77{
78 struct rtc_time time; 78 struct rtc_time time;
79 ts->tv_sec = 0;
80 ts->tv_nsec = 0;
79 81
80 if (mach_hwclk) { 82 if (mach_hwclk) {
81 mach_hwclk(0, &time); 83 mach_hwclk(0, &time);
82 84
83 if ((time.tm_year += 1900) < 1970) 85 if ((time.tm_year += 1900) < 1970)
84 time.tm_year += 100; 86 time.tm_year += 100;
85 xtime.tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday, 87 ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
86 time.tm_hour, time.tm_min, time.tm_sec); 88 time.tm_hour, time.tm_min, time.tm_sec);
87 xtime.tv_nsec = 0;
88 } 89 }
89 wall_to_monotonic.tv_sec = -xtime.tv_sec; 90}
90 91
92void __init time_init(void)
93{
91 mach_sched_init(timer_interrupt); 94 mach_sched_init(timer_interrupt);
92} 95}
93 96
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index aacd6d17b833..ada4f4cca811 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -455,7 +455,7 @@ static inline void access_error040(struct frame *fp)
455 455
456 if (do_page_fault(&fp->ptregs, addr, errorcode)) { 456 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
457#ifdef DEBUG 457#ifdef DEBUG
458 printk("do_page_fault() !=0 \n"); 458 printk("do_page_fault() !=0\n");
459#endif 459#endif
460 if (user_mode(&fp->ptregs)){ 460 if (user_mode(&fp->ptregs)){
461 /* delay writebacks after signal delivery */ 461 /* delay writebacks after signal delivery */
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index 0356da9bf763..1c16b1baf8db 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -148,7 +148,7 @@ static void mac_cache_card_flush(int writeback)
148void __init config_mac(void) 148void __init config_mac(void)
149{ 149{
150 if (!MACH_IS_MAC) 150 if (!MACH_IS_MAC)
151 printk(KERN_ERR "ERROR: no Mac, but config_mac() called!! \n"); 151 printk(KERN_ERR "ERROR: no Mac, but config_mac() called!!\n");
152 152
153 mach_sched_init = mac_sched_init; 153 mach_sched_init = mac_sched_init;
154 mach_init_IRQ = mac_init_IRQ; 154 mach_init_IRQ = mac_init_IRQ;
@@ -867,7 +867,7 @@ static void __init mac_identify(void)
867 */ 867 */
868 iop_preinit(); 868 iop_preinit();
869 869
870 printk(KERN_INFO "Detected Macintosh model: %d \n", model); 870 printk(KERN_INFO "Detected Macintosh model: %d\n", model);
871 871
872 /* 872 /*
873 * Report booter data: 873 * Report booter data:
@@ -878,12 +878,12 @@ static void __init mac_identify(void)
878 mac_bi_data.videoaddr, mac_bi_data.videorow, 878 mac_bi_data.videoaddr, mac_bi_data.videorow,
879 mac_bi_data.videodepth, mac_bi_data.dimensions & 0xFFFF, 879 mac_bi_data.videodepth, mac_bi_data.dimensions & 0xFFFF,
880 mac_bi_data.dimensions >> 16); 880 mac_bi_data.dimensions >> 16);
881 printk(KERN_DEBUG " Videological 0x%lx phys. 0x%lx, SCC at 0x%lx \n", 881 printk(KERN_DEBUG " Videological 0x%lx phys. 0x%lx, SCC at 0x%lx\n",
882 mac_bi_data.videological, mac_orig_videoaddr, 882 mac_bi_data.videological, mac_orig_videoaddr,
883 mac_bi_data.sccbase); 883 mac_bi_data.sccbase);
884 printk(KERN_DEBUG " Boottime: 0x%lx GMTBias: 0x%lx \n", 884 printk(KERN_DEBUG " Boottime: 0x%lx GMTBias: 0x%lx\n",
885 mac_bi_data.boottime, mac_bi_data.gmtbias); 885 mac_bi_data.boottime, mac_bi_data.gmtbias);
886 printk(KERN_DEBUG " Machine ID: %ld CPUid: 0x%lx memory size: 0x%lx \n", 886 printk(KERN_DEBUG " Machine ID: %ld CPUid: 0x%lx memory size: 0x%lx\n",
887 mac_bi_data.id, mac_bi_data.cpuid, mac_bi_data.memsize); 887 mac_bi_data.id, mac_bi_data.cpuid, mac_bi_data.memsize);
888 888
889 iop_init(); 889 iop_init();
diff --git a/arch/m68k/mm/fault.c b/arch/m68k/mm/fault.c
index d0e35cf99fc6..a96394a0333d 100644
--- a/arch/m68k/mm/fault.c
+++ b/arch/m68k/mm/fault.c
@@ -154,7 +154,6 @@ good_area:
154 * the fault. 154 * the fault.
155 */ 155 */
156 156
157 survive:
158 fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); 157 fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0);
159#ifdef DEBUG 158#ifdef DEBUG
160 printk("handle_mm_fault returns %d\n",fault); 159 printk("handle_mm_fault returns %d\n",fault);
@@ -180,15 +179,10 @@ good_area:
180 */ 179 */
181out_of_memory: 180out_of_memory:
182 up_read(&mm->mmap_sem); 181 up_read(&mm->mmap_sem);
183 if (is_global_init(current)) { 182 if (!user_mode(regs))
184 yield(); 183 goto no_context;
185 down_read(&mm->mmap_sem); 184 pagefault_out_of_memory();
186 goto survive; 185 return 0;
187 }
188
189 printk("VM: killing process %s\n", current->comm);
190 if (user_mode(regs))
191 do_group_exit(SIGKILL);
192 186
193no_context: 187no_context:
194 current->thread.signo = SIGBUS; 188 current->thread.signo = SIGBUS;
diff --git a/arch/m68k/mvme16x/rtc.c b/arch/m68k/mvme16x/rtc.c
index 8da9c250d3e1..11ac6f63967a 100644
--- a/arch/m68k/mvme16x/rtc.c
+++ b/arch/m68k/mvme16x/rtc.c
@@ -9,7 +9,6 @@
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/errno.h> 10#include <linux/errno.h>
11#include <linux/miscdevice.h> 11#include <linux/miscdevice.h>
12#include <linux/smp_lock.h>
13#include <linux/ioport.h> 12#include <linux/ioport.h>
14#include <linux/capability.h> 13#include <linux/capability.h>
15#include <linux/fcntl.h> 14#include <linux/fcntl.h>
@@ -36,8 +35,7 @@ static const unsigned char days_in_mo[] =
36 35
37static atomic_t rtc_ready = ATOMIC_INIT(1); 36static atomic_t rtc_ready = ATOMIC_INIT(1);
38 37
39static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, 38static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
40 unsigned long arg)
41{ 39{
42 volatile MK48T08ptr_t rtc = (MK48T08ptr_t)MVME_RTC_BASE; 40 volatile MK48T08ptr_t rtc = (MK48T08ptr_t)MVME_RTC_BASE;
43 unsigned long flags; 41 unsigned long flags;
@@ -120,22 +118,15 @@ static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
120} 118}
121 119
122/* 120/*
123 * We enforce only one user at a time here with the open/close. 121 * We enforce only one user at a time here with the open/close.
124 * Also clear the previous interrupt data on an open, and clean
125 * up things on a close.
126 */ 122 */
127
128static int rtc_open(struct inode *inode, struct file *file) 123static int rtc_open(struct inode *inode, struct file *file)
129{ 124{
130 lock_kernel();
131 if( !atomic_dec_and_test(&rtc_ready) ) 125 if( !atomic_dec_and_test(&rtc_ready) )
132 { 126 {
133 atomic_inc( &rtc_ready ); 127 atomic_inc( &rtc_ready );
134 unlock_kernel();
135 return -EBUSY; 128 return -EBUSY;
136 } 129 }
137 unlock_kernel();
138
139 return 0; 130 return 0;
140} 131}
141 132
@@ -150,9 +141,9 @@ static int rtc_release(struct inode *inode, struct file *file)
150 */ 141 */
151 142
152static const struct file_operations rtc_fops = { 143static const struct file_operations rtc_fops = {
153 .ioctl = rtc_ioctl, 144 .unlocked_ioctl = rtc_ioctl,
154 .open = rtc_open, 145 .open = rtc_open,
155 .release = rtc_release, 146 .release = rtc_release,
156}; 147};
157 148
158static struct miscdevice rtc_dev= 149static struct miscdevice rtc_dev=
diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c
index 31ab3f08bbda..ad10fecec2fe 100644
--- a/arch/m68k/q40/config.c
+++ b/arch/m68k/q40/config.c
@@ -126,7 +126,7 @@ static void q40_reset(void)
126{ 126{
127 halted = 1; 127 halted = 1;
128 printk("\n\n*******************************************\n" 128 printk("\n\n*******************************************\n"
129 "Called q40_reset : press the RESET button!! \n" 129 "Called q40_reset : press the RESET button!!\n"
130 "*******************************************\n"); 130 "*******************************************\n");
131 Q40_LED_ON(); 131 Q40_LED_ON();
132 while (1) 132 while (1)
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 519197ede089..59dc0c7ef733 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -29,7 +29,7 @@
29 * 29 *
30 * Atomically reads the value of @v. 30 * Atomically reads the value of @v.
31 */ 31 */
32#define atomic_read(v) ((v)->counter) 32#define atomic_read(v) (*(volatile int *)&(v)->counter)
33 33
34/* 34/*
35 * atomic_set - set atomic variable 35 * atomic_set - set atomic variable
@@ -410,7 +410,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
410 * @v: pointer of type atomic64_t 410 * @v: pointer of type atomic64_t
411 * 411 *
412 */ 412 */
413#define atomic64_read(v) ((v)->counter) 413#define atomic64_read(v) (*(volatile long *)&(v)->counter)
414 414
415/* 415/*
416 * atomic64_set - set atomic variable 416 * atomic64_set - set atomic variable
diff --git a/arch/mips/include/asm/i8253.h b/arch/mips/include/asm/i8253.h
index 032ca73f181b..48bb82372994 100644
--- a/arch/mips/include/asm/i8253.h
+++ b/arch/mips/include/asm/i8253.h
@@ -12,7 +12,7 @@
12#define PIT_CH0 0x40 12#define PIT_CH0 0x40
13#define PIT_CH2 0x42 13#define PIT_CH2 0x42
14 14
15extern spinlock_t i8253_lock; 15extern raw_spinlock_t i8253_lock;
16 16
17extern void setup_pit_timer(void); 17extern void setup_pit_timer(void);
18 18
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 49382d5e891a..c6e3c93ce7c7 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -135,6 +135,12 @@
135#define FPU_CSR_COND7 0x80000000 /* $fcc7 */ 135#define FPU_CSR_COND7 0x80000000 /* $fcc7 */
136 136
137/* 137/*
138 * Bits 18 - 20 of the FPU Status Register will be read as 0,
139 * and should be written as zero.
140 */
141#define FPU_CSR_RSVD 0x001c0000
142
143/*
138 * X the exception cause indicator 144 * X the exception cause indicator
139 * E the exception enable 145 * E the exception enable
140 * S the sticky/flag bit 146 * S the sticky/flag bit
@@ -161,7 +167,8 @@
161#define FPU_CSR_UDF_S 0x00000008 167#define FPU_CSR_UDF_S 0x00000008
162#define FPU_CSR_INE_S 0x00000004 168#define FPU_CSR_INE_S 0x00000004
163 169
164/* rounding mode */ 170/* Bits 0 and 1 of FPU Status Register specify the rounding mode */
171#define FPU_CSR_RM 0x00000003
165#define FPU_CSR_RN 0x0 /* nearest */ 172#define FPU_CSR_RN 0x0 /* nearest */
166#define FPU_CSR_RZ 0x1 /* towards zero */ 173#define FPU_CSR_RZ 0x1 /* towards zero */
167#define FPU_CSR_RU 0x2 /* towards +Infinity */ 174#define FPU_CSR_RU 0x2 /* towards +Infinity */
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index ed5c441615e4..94794062a177 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -15,7 +15,7 @@
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/time.h> 16#include <asm/time.h>
17 17
18DEFINE_SPINLOCK(i8253_lock); 18DEFINE_RAW_SPINLOCK(i8253_lock);
19EXPORT_SYMBOL(i8253_lock); 19EXPORT_SYMBOL(i8253_lock);
20 20
21/* 21/*
@@ -26,7 +26,7 @@ EXPORT_SYMBOL(i8253_lock);
26static void init_pit_timer(enum clock_event_mode mode, 26static void init_pit_timer(enum clock_event_mode mode,
27 struct clock_event_device *evt) 27 struct clock_event_device *evt)
28{ 28{
29 spin_lock(&i8253_lock); 29 raw_spin_lock(&i8253_lock);
30 30
31 switch(mode) { 31 switch(mode) {
32 case CLOCK_EVT_MODE_PERIODIC: 32 case CLOCK_EVT_MODE_PERIODIC:
@@ -55,7 +55,7 @@ static void init_pit_timer(enum clock_event_mode mode,
55 /* Nothing to do here */ 55 /* Nothing to do here */
56 break; 56 break;
57 } 57 }
58 spin_unlock(&i8253_lock); 58 raw_spin_unlock(&i8253_lock);
59} 59}
60 60
61/* 61/*
@@ -65,10 +65,10 @@ static void init_pit_timer(enum clock_event_mode mode,
65 */ 65 */
66static int pit_next_event(unsigned long delta, struct clock_event_device *evt) 66static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
67{ 67{
68 spin_lock(&i8253_lock); 68 raw_spin_lock(&i8253_lock);
69 outb_p(delta & 0xff , PIT_CH0); /* LSB */ 69 outb_p(delta & 0xff , PIT_CH0); /* LSB */
70 outb(delta >> 8 , PIT_CH0); /* MSB */ 70 outb(delta >> 8 , PIT_CH0); /* MSB */
71 spin_unlock(&i8253_lock); 71 raw_spin_unlock(&i8253_lock);
72 72
73 return 0; 73 return 0;
74} 74}
@@ -137,7 +137,7 @@ static cycle_t pit_read(struct clocksource *cs)
137 static int old_count; 137 static int old_count;
138 static u32 old_jifs; 138 static u32 old_jifs;
139 139
140 spin_lock_irqsave(&i8253_lock, flags); 140 raw_spin_lock_irqsave(&i8253_lock, flags);
141 /* 141 /*
142 * Although our caller may have the read side of xtime_lock, 142 * Although our caller may have the read side of xtime_lock,
143 * this is now a seqlock, and we are cheating in this routine 143 * this is now a seqlock, and we are cheating in this routine
@@ -183,7 +183,7 @@ static cycle_t pit_read(struct clocksource *cs)
183 old_count = count; 183 old_count = count;
184 old_jifs = jifs; 184 old_jifs = jifs;
185 185
186 spin_unlock_irqrestore(&i8253_lock, flags); 186 raw_spin_unlock_irqrestore(&i8253_lock, flags);
187 187
188 count = (LATCH - 1) - count; 188 count = (LATCH - 1) - count;
189 189
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 44337ba03717..a5297e2a353a 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -385,7 +385,7 @@ EXPORT(sysn32_call_table)
385 PTR sys_fchmodat 385 PTR sys_fchmodat
386 PTR sys_faccessat 386 PTR sys_faccessat
387 PTR compat_sys_pselect6 387 PTR compat_sys_pselect6
388 PTR sys_ppoll /* 6265 */ 388 PTR compat_sys_ppoll /* 6265 */
389 PTR sys_unshare 389 PTR sys_unshare
390 PTR sys_splice 390 PTR sys_splice
391 PTR sys_sync_file_range 391 PTR sys_sync_file_range
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 8f2f8e9d8b21..f2338d1c0b48 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -78,6 +78,9 @@ DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
78#define FPCREG_RID 0 /* $0 = revision id */ 78#define FPCREG_RID 0 /* $0 = revision id */
79#define FPCREG_CSR 31 /* $31 = csr */ 79#define FPCREG_CSR 31 /* $31 = csr */
80 80
81/* Determine rounding mode from the RM bits of the FCSR */
82#define modeindex(v) ((v) & FPU_CSR_RM)
83
81/* Convert Mips rounding mode (0..3) to IEEE library modes. */ 84/* Convert Mips rounding mode (0..3) to IEEE library modes. */
82static const unsigned char ieee_rm[4] = { 85static const unsigned char ieee_rm[4] = {
83 [FPU_CSR_RN] = IEEE754_RN, 86 [FPU_CSR_RN] = IEEE754_RN,
@@ -384,10 +387,14 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
384 (void *) (xcp->cp0_epc), 387 (void *) (xcp->cp0_epc),
385 MIPSInst_RT(ir), value); 388 MIPSInst_RT(ir), value);
386#endif 389#endif
387 value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); 390
388 ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); 391 /*
389 /* convert to ieee library modes */ 392 * Don't write reserved bits,
390 ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3]; 393 * and convert to ieee library modes
394 */
395 ctx->fcr31 = (value &
396 ~(FPU_CSR_RSVD | FPU_CSR_RM)) |
397 ieee_rm[modeindex(value)];
391 } 398 }
392 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 399 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
393 return SIGFPE; 400 return SIGFPE;
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
index 29e2326b6257..fa3bf661ae29 100644
--- a/arch/mips/oprofile/op_model_loongson2.c
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -122,7 +122,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
122 */ 122 */
123 123
124 /* Check whether the irq belongs to me */ 124 /* Check whether the irq belongs to me */
125 enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN; 125 enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN;
126 if (!enabled) 126 if (!enabled)
127 return IRQ_NONE; 127 return IRQ_NONE;
128 enabled = reg.cnt1_enabled | reg.cnt2_enabled; 128 enabled = reg.cnt1_enabled | reg.cnt2_enabled;
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 89faacad5d17..1c4565a9102b 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -37,6 +37,9 @@ config GENERIC_HARDIRQS_NO__DO_IRQ
37config GENERIC_CALIBRATE_DELAY 37config GENERIC_CALIBRATE_DELAY
38 def_bool y 38 def_bool y
39 39
40config GENERIC_CMOS_UPDATE
41 def_bool y
42
40config GENERIC_FIND_NEXT_BIT 43config GENERIC_FIND_NEXT_BIT
41 def_bool y 44 def_bool y
42 45
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h
index 5bf5be9566de..e41222d6c2fd 100644
--- a/arch/mn10300/include/asm/atomic.h
+++ b/arch/mn10300/include/asm/atomic.h
@@ -31,7 +31,7 @@
31 * Atomically reads the value of @v. Note that the guaranteed 31 * Atomically reads the value of @v. Note that the guaranteed
32 * useful range of an atomic_t is only 24 bits. 32 * useful range of an atomic_t is only 24 bits.
33 */ 33 */
34#define atomic_read(v) ((v)->counter) 34#define atomic_read(v) (*(volatile int *)&(v)->counter)
35 35
36/** 36/**
37 * atomic_set - set atomic variable 37 * atomic_set - set atomic variable
diff --git a/arch/mn10300/kernel/rtc.c b/arch/mn10300/kernel/rtc.c
index 7978470b5749..815a933aafa8 100644
--- a/arch/mn10300/kernel/rtc.c
+++ b/arch/mn10300/kernel/rtc.c
@@ -26,17 +26,15 @@ static long last_rtc_update;
26/* time for RTC to update itself in ioclks */ 26/* time for RTC to update itself in ioclks */
27static unsigned long mn10300_rtc_update_period; 27static unsigned long mn10300_rtc_update_period;
28 28
29/* 29void read_persistent_clock(struct timespec *ts)
30 * read the current RTC time
31 */
32unsigned long __init get_initial_rtc_time(void)
33{ 30{
34 struct rtc_time tm; 31 struct rtc_time tm;
35 32
36 get_rtc_time(&tm); 33 get_rtc_time(&tm);
37 34
38 return mktime(tm.tm_year, tm.tm_mon, tm.tm_mday, 35 ts->tv_sec = mktime(tm.tm_year, tm.tm_mon, tm.tm_mday,
39 tm.tm_hour, tm.tm_min, tm.tm_sec); 36 tm.tm_hour, tm.tm_min, tm.tm_sec);
37 ts->tv_nsec = 0;
40} 38}
41 39
42/* 40/*
@@ -110,24 +108,9 @@ static int set_rtc_mmss(unsigned long nowtime)
110 return retval; 108 return retval;
111} 109}
112 110
113void check_rtc_time(void) 111int update_persistent_clock(struct timespec now)
114{ 112{
115 /* the RTC clock just finished ticking over again this second 113 return set_rtc_mms(now.tv_sec);
116 * - if we have an externally synchronized Linux clock, then update
117 * RTC clock accordingly every ~11 minutes. set_rtc_mmss() has to be
118 * called as close as possible to 500 ms before the new second starts.
119 */
120 if ((time_status & STA_UNSYNC) == 0 &&
121 xtime.tv_sec > last_rtc_update + 660 &&
122 xtime.tv_nsec / 1000 >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
123 xtime.tv_nsec / 1000 <= 500000 + ((unsigned) TICK_SIZE) / 2
124 ) {
125 if (set_rtc_mmss(xtime.tv_sec) == 0)
126 last_rtc_update = xtime.tv_sec;
127 else
128 /* do it again in 60s */
129 last_rtc_update = xtime.tv_sec - 600;
130 }
131} 114}
132 115
133/* 116/*
diff --git a/arch/mn10300/kernel/time.c b/arch/mn10300/kernel/time.c
index 395caf01b909..8f7f6d22783d 100644
--- a/arch/mn10300/kernel/time.c
+++ b/arch/mn10300/kernel/time.c
@@ -111,7 +111,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
111 /* advance the kernel's time tracking system */ 111 /* advance the kernel's time tracking system */
112 profile_tick(CPU_PROFILING); 112 profile_tick(CPU_PROFILING);
113 do_timer(1); 113 do_timer(1);
114 check_rtc_time();
115 } 114 }
116 115
117 write_sequnlock(&xtime_lock); 116 write_sequnlock(&xtime_lock);
@@ -139,9 +138,6 @@ void __init time_init(void)
139 " (calibrated against RTC)\n", 138 " (calibrated against RTC)\n",
140 MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100); 139 MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100);
141 140
142 xtime.tv_sec = get_initial_rtc_time();
143 xtime.tv_nsec = 0;
144
145 mn10300_last_tsc = TMTSCBC; 141 mn10300_last_tsc = TMTSCBC;
146 142
147 /* use timer 0 & 1 cascaded to tick at as close to HZ as possible */ 143 /* use timer 0 & 1 cascaded to tick at as close to HZ as possible */
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index 716634d1f546..f81955934aeb 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -189,7 +189,7 @@ static __inline__ void atomic_set(atomic_t *v, int i)
189 189
190static __inline__ int atomic_read(const atomic_t *v) 190static __inline__ int atomic_read(const atomic_t *v)
191{ 191{
192 return v->counter; 192 return (*(volatile int *)&(v)->counter);
193} 193}
194 194
195/* exported interface */ 195/* exported interface */
@@ -286,7 +286,7 @@ atomic64_set(atomic64_t *v, s64 i)
286static __inline__ s64 286static __inline__ s64
287atomic64_read(const atomic64_t *v) 287atomic64_read(const atomic64_t *v)
288{ 288{
289 return v->counter; 289 return (*(volatile long *)&(v)->counter);
290} 290}
291 291
292#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)(i)),(v)))) 292#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)(i)),(v))))
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c
index 08460a2e9f41..43b83c35cf54 100644
--- a/arch/powerpc/kernel/perf_event.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -35,6 +35,9 @@ struct cpu_hw_events {
35 u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES]; 35 u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
36 unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES]; 36 unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
37 unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES]; 37 unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
38
39 unsigned int group_flag;
40 int n_txn_start;
38}; 41};
39DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); 42DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
40 43
@@ -718,66 +721,6 @@ static int collect_events(struct perf_event *group, int max_count,
718 return n; 721 return n;
719} 722}
720 723
721static void event_sched_in(struct perf_event *event)
722{
723 event->state = PERF_EVENT_STATE_ACTIVE;
724 event->oncpu = smp_processor_id();
725 event->tstamp_running += event->ctx->time - event->tstamp_stopped;
726 if (is_software_event(event))
727 event->pmu->enable(event);
728}
729
730/*
731 * Called to enable a whole group of events.
732 * Returns 1 if the group was enabled, or -EAGAIN if it could not be.
733 * Assumes the caller has disabled interrupts and has
734 * frozen the PMU with hw_perf_save_disable.
735 */
736int hw_perf_group_sched_in(struct perf_event *group_leader,
737 struct perf_cpu_context *cpuctx,
738 struct perf_event_context *ctx)
739{
740 struct cpu_hw_events *cpuhw;
741 long i, n, n0;
742 struct perf_event *sub;
743
744 if (!ppmu)
745 return 0;
746 cpuhw = &__get_cpu_var(cpu_hw_events);
747 n0 = cpuhw->n_events;
748 n = collect_events(group_leader, ppmu->n_counter - n0,
749 &cpuhw->event[n0], &cpuhw->events[n0],
750 &cpuhw->flags[n0]);
751 if (n < 0)
752 return -EAGAIN;
753 if (check_excludes(cpuhw->event, cpuhw->flags, n0, n))
754 return -EAGAIN;
755 i = power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n + n0);
756 if (i < 0)
757 return -EAGAIN;
758 cpuhw->n_events = n0 + n;
759 cpuhw->n_added += n;
760
761 /*
762 * OK, this group can go on; update event states etc.,
763 * and enable any software events
764 */
765 for (i = n0; i < n0 + n; ++i)
766 cpuhw->event[i]->hw.config = cpuhw->events[i];
767 cpuctx->active_oncpu += n;
768 n = 1;
769 event_sched_in(group_leader);
770 list_for_each_entry(sub, &group_leader->sibling_list, group_entry) {
771 if (sub->state != PERF_EVENT_STATE_OFF) {
772 event_sched_in(sub);
773 ++n;
774 }
775 }
776 ctx->nr_active += n;
777
778 return 1;
779}
780
781/* 724/*
782 * Add a event to the PMU. 725 * Add a event to the PMU.
783 * If all events are not already frozen, then we disable and 726 * If all events are not already frozen, then we disable and
@@ -805,12 +748,22 @@ static int power_pmu_enable(struct perf_event *event)
805 cpuhw->event[n0] = event; 748 cpuhw->event[n0] = event;
806 cpuhw->events[n0] = event->hw.config; 749 cpuhw->events[n0] = event->hw.config;
807 cpuhw->flags[n0] = event->hw.event_base; 750 cpuhw->flags[n0] = event->hw.event_base;
751
752 /*
753 * If group events scheduling transaction was started,
754 * skip the schedulability test here, it will be peformed
755 * at commit time(->commit_txn) as a whole
756 */
757 if (cpuhw->group_flag & PERF_EVENT_TXN_STARTED)
758 goto nocheck;
759
808 if (check_excludes(cpuhw->event, cpuhw->flags, n0, 1)) 760 if (check_excludes(cpuhw->event, cpuhw->flags, n0, 1))
809 goto out; 761 goto out;
810 if (power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n0 + 1)) 762 if (power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n0 + 1))
811 goto out; 763 goto out;
812
813 event->hw.config = cpuhw->events[n0]; 764 event->hw.config = cpuhw->events[n0];
765
766nocheck:
814 ++cpuhw->n_events; 767 ++cpuhw->n_events;
815 ++cpuhw->n_added; 768 ++cpuhw->n_added;
816 769
@@ -896,11 +849,65 @@ static void power_pmu_unthrottle(struct perf_event *event)
896 local_irq_restore(flags); 849 local_irq_restore(flags);
897} 850}
898 851
852/*
853 * Start group events scheduling transaction
854 * Set the flag to make pmu::enable() not perform the
855 * schedulability test, it will be performed at commit time
856 */
857void power_pmu_start_txn(const struct pmu *pmu)
858{
859 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
860
861 cpuhw->group_flag |= PERF_EVENT_TXN_STARTED;
862 cpuhw->n_txn_start = cpuhw->n_events;
863}
864
865/*
866 * Stop group events scheduling transaction
867 * Clear the flag and pmu::enable() will perform the
868 * schedulability test.
869 */
870void power_pmu_cancel_txn(const struct pmu *pmu)
871{
872 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
873
874 cpuhw->group_flag &= ~PERF_EVENT_TXN_STARTED;
875}
876
877/*
878 * Commit group events scheduling transaction
879 * Perform the group schedulability test as a whole
880 * Return 0 if success
881 */
882int power_pmu_commit_txn(const struct pmu *pmu)
883{
884 struct cpu_hw_events *cpuhw;
885 long i, n;
886
887 if (!ppmu)
888 return -EAGAIN;
889 cpuhw = &__get_cpu_var(cpu_hw_events);
890 n = cpuhw->n_events;
891 if (check_excludes(cpuhw->event, cpuhw->flags, 0, n))
892 return -EAGAIN;
893 i = power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n);
894 if (i < 0)
895 return -EAGAIN;
896
897 for (i = cpuhw->n_txn_start; i < n; ++i)
898 cpuhw->event[i]->hw.config = cpuhw->events[i];
899
900 return 0;
901}
902
899struct pmu power_pmu = { 903struct pmu power_pmu = {
900 .enable = power_pmu_enable, 904 .enable = power_pmu_enable,
901 .disable = power_pmu_disable, 905 .disable = power_pmu_disable,
902 .read = power_pmu_read, 906 .read = power_pmu_read,
903 .unthrottle = power_pmu_unthrottle, 907 .unthrottle = power_pmu_unthrottle,
908 .start_txn = power_pmu_start_txn,
909 .cancel_txn = power_pmu_cancel_txn,
910 .commit_txn = power_pmu_commit_txn,
904}; 911};
905 912
906/* 913/*
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 0d8cd9bbe101..79d0ca086820 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -444,13 +444,6 @@ config FORCE_MAX_ZONEORDER
444 int 444 int
445 default "9" 445 default "9"
446 446
447config PROCESS_DEBUG
448 bool "Show crashed user process info"
449 help
450 Say Y to print all process fault locations to the console. This is
451 a debugging option; you probably do not want to set it unless you
452 are an S390 port maintainer.
453
454config PFAULT 447config PFAULT
455 bool "Pseudo page fault support" 448 bool "Pseudo page fault support"
456 help 449 help
diff --git a/arch/s390/Makefile b/arch/s390/Makefile
index 0da10746e0e5..30c5f01f93b0 100644
--- a/arch/s390/Makefile
+++ b/arch/s390/Makefile
@@ -116,6 +116,12 @@ image bzImage: vmlinux
116zfcpdump: 116zfcpdump:
117 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 117 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
118 118
119vdso_install:
120ifeq ($(CONFIG_64BIT),y)
121 $(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso64 $@
122endif
123 $(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso32 $@
124
119archclean: 125archclean:
120 $(Q)$(MAKE) $(clean)=$(boot) 126 $(Q)$(MAKE) $(clean)=$(boot)
121 127
diff --git a/arch/s390/hypfs/hypfs.h b/arch/s390/hypfs/hypfs.h
index aea572009d60..fa487d4cc08b 100644
--- a/arch/s390/hypfs/hypfs.h
+++ b/arch/s390/hypfs/hypfs.h
@@ -11,6 +11,7 @@
11 11
12#include <linux/fs.h> 12#include <linux/fs.h>
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/debugfs.h>
14 15
15#define REG_FILE_MODE 0440 16#define REG_FILE_MODE 0440
16#define UPDATE_FILE_MODE 0220 17#define UPDATE_FILE_MODE 0220
@@ -34,6 +35,9 @@ extern int hypfs_diag_create_files(struct super_block *sb, struct dentry *root);
34 35
35/* VM Hypervisor */ 36/* VM Hypervisor */
36extern int hypfs_vm_init(void); 37extern int hypfs_vm_init(void);
38extern void hypfs_vm_exit(void);
37extern int hypfs_vm_create_files(struct super_block *sb, struct dentry *root); 39extern int hypfs_vm_create_files(struct super_block *sb, struct dentry *root);
38 40
41/* Directory for debugfs files */
42extern struct dentry *hypfs_dbfs_dir;
39#endif /* _HYPFS_H_ */ 43#endif /* _HYPFS_H_ */
diff --git a/arch/s390/hypfs/hypfs_diag.c b/arch/s390/hypfs/hypfs_diag.c
index 5b1acdba6495..1211bb1d2f24 100644
--- a/arch/s390/hypfs/hypfs_diag.c
+++ b/arch/s390/hypfs/hypfs_diag.c
@@ -15,6 +15,7 @@
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/string.h> 16#include <linux/string.h>
17#include <linux/vmalloc.h> 17#include <linux/vmalloc.h>
18#include <linux/mm.h>
18#include <asm/ebcdic.h> 19#include <asm/ebcdic.h>
19#include "hypfs.h" 20#include "hypfs.h"
20 21
@@ -22,6 +23,8 @@
22#define CPU_NAME_LEN 16 /* type name len of cpus in diag224 name table */ 23#define CPU_NAME_LEN 16 /* type name len of cpus in diag224 name table */
23#define TMP_SIZE 64 /* size of temporary buffers */ 24#define TMP_SIZE 64 /* size of temporary buffers */
24 25
26#define DBFS_D204_HDR_VERSION 0
27
25/* diag 204 subcodes */ 28/* diag 204 subcodes */
26enum diag204_sc { 29enum diag204_sc {
27 SUBC_STIB4 = 4, 30 SUBC_STIB4 = 4,
@@ -47,6 +50,8 @@ static void *diag204_buf; /* 4K aligned buffer for diag204 data */
47static void *diag204_buf_vmalloc; /* vmalloc pointer for diag204 data */ 50static void *diag204_buf_vmalloc; /* vmalloc pointer for diag204 data */
48static int diag204_buf_pages; /* number of pages for diag204 data */ 51static int diag204_buf_pages; /* number of pages for diag204 data */
49 52
53static struct dentry *dbfs_d204_file;
54
50/* 55/*
51 * DIAG 204 data structures and member access functions. 56 * DIAG 204 data structures and member access functions.
52 * 57 *
@@ -364,18 +369,21 @@ static void diag204_free_buffer(void)
364 } else { 369 } else {
365 free_pages((unsigned long) diag204_buf, 0); 370 free_pages((unsigned long) diag204_buf, 0);
366 } 371 }
367 diag204_buf_pages = 0;
368 diag204_buf = NULL; 372 diag204_buf = NULL;
369} 373}
370 374
375static void *page_align_ptr(void *ptr)
376{
377 return (void *) PAGE_ALIGN((unsigned long) ptr);
378}
379
371static void *diag204_alloc_vbuf(int pages) 380static void *diag204_alloc_vbuf(int pages)
372{ 381{
373 /* The buffer has to be page aligned! */ 382 /* The buffer has to be page aligned! */
374 diag204_buf_vmalloc = vmalloc(PAGE_SIZE * (pages + 1)); 383 diag204_buf_vmalloc = vmalloc(PAGE_SIZE * (pages + 1));
375 if (!diag204_buf_vmalloc) 384 if (!diag204_buf_vmalloc)
376 return ERR_PTR(-ENOMEM); 385 return ERR_PTR(-ENOMEM);
377 diag204_buf = (void*)((unsigned long)diag204_buf_vmalloc 386 diag204_buf = page_align_ptr(diag204_buf_vmalloc);
378 & ~0xfffUL) + 0x1000;
379 diag204_buf_pages = pages; 387 diag204_buf_pages = pages;
380 return diag204_buf; 388 return diag204_buf;
381} 389}
@@ -468,17 +476,26 @@ fail_alloc:
468 return rc; 476 return rc;
469} 477}
470 478
479static int diag204_do_store(void *buf, int pages)
480{
481 int rc;
482
483 rc = diag204((unsigned long) diag204_store_sc |
484 (unsigned long) diag204_info_type, pages, buf);
485 return rc < 0 ? -ENOSYS : 0;
486}
487
471static void *diag204_store(void) 488static void *diag204_store(void)
472{ 489{
473 void *buf; 490 void *buf;
474 int pages; 491 int pages, rc;
475 492
476 buf = diag204_get_buffer(diag204_info_type, &pages); 493 buf = diag204_get_buffer(diag204_info_type, &pages);
477 if (IS_ERR(buf)) 494 if (IS_ERR(buf))
478 goto out; 495 goto out;
479 if (diag204((unsigned long)diag204_store_sc | 496 rc = diag204_do_store(buf, pages);
480 (unsigned long)diag204_info_type, pages, buf) < 0) 497 if (rc)
481 return ERR_PTR(-ENOSYS); 498 return ERR_PTR(rc);
482out: 499out:
483 return buf; 500 return buf;
484} 501}
@@ -526,6 +543,92 @@ static int diag224_idx2name(int index, char *name)
526 return 0; 543 return 0;
527} 544}
528 545
546struct dbfs_d204_hdr {
547 u64 len; /* Length of d204 buffer without header */
548 u16 version; /* Version of header */
549 u8 sc; /* Used subcode */
550 char reserved[53];
551} __attribute__ ((packed));
552
553struct dbfs_d204 {
554 struct dbfs_d204_hdr hdr; /* 64 byte header */
555 char buf[]; /* d204 buffer */
556} __attribute__ ((packed));
557
558struct dbfs_d204_private {
559 struct dbfs_d204 *d204; /* Aligned d204 data with header */
560 void *base; /* Base pointer (needed for vfree) */
561};
562
563static int dbfs_d204_open(struct inode *inode, struct file *file)
564{
565 struct dbfs_d204_private *data;
566 struct dbfs_d204 *d204;
567 int rc, buf_size;
568
569 data = kzalloc(sizeof(*data), GFP_KERNEL);
570 if (!data)
571 return -ENOMEM;
572 buf_size = PAGE_SIZE * (diag204_buf_pages + 1) + sizeof(d204->hdr);
573 data->base = vmalloc(buf_size);
574 if (!data->base) {
575 rc = -ENOMEM;
576 goto fail_kfree_data;
577 }
578 memset(data->base, 0, buf_size);
579 d204 = page_align_ptr(data->base + sizeof(d204->hdr))
580 - sizeof(d204->hdr);
581 rc = diag204_do_store(&d204->buf, diag204_buf_pages);
582 if (rc)
583 goto fail_vfree_base;
584 d204->hdr.version = DBFS_D204_HDR_VERSION;
585 d204->hdr.len = PAGE_SIZE * diag204_buf_pages;
586 d204->hdr.sc = diag204_store_sc;
587 data->d204 = d204;
588 file->private_data = data;
589 return nonseekable_open(inode, file);
590
591fail_vfree_base:
592 vfree(data->base);
593fail_kfree_data:
594 kfree(data);
595 return rc;
596}
597
598static int dbfs_d204_release(struct inode *inode, struct file *file)
599{
600 struct dbfs_d204_private *data = file->private_data;
601
602 vfree(data->base);
603 kfree(data);
604 return 0;
605}
606
607static ssize_t dbfs_d204_read(struct file *file, char __user *buf,
608 size_t size, loff_t *ppos)
609{
610 struct dbfs_d204_private *data = file->private_data;
611
612 return simple_read_from_buffer(buf, size, ppos, data->d204,
613 data->d204->hdr.len +
614 sizeof(data->d204->hdr));
615}
616
617static const struct file_operations dbfs_d204_ops = {
618 .open = dbfs_d204_open,
619 .read = dbfs_d204_read,
620 .release = dbfs_d204_release,
621};
622
623static int hypfs_dbfs_init(void)
624{
625 dbfs_d204_file = debugfs_create_file("diag_204", 0400, hypfs_dbfs_dir,
626 NULL, &dbfs_d204_ops);
627 if (IS_ERR(dbfs_d204_file))
628 return PTR_ERR(dbfs_d204_file);
629 return 0;
630}
631
529__init int hypfs_diag_init(void) 632__init int hypfs_diag_init(void)
530{ 633{
531 int rc; 634 int rc;
@@ -540,11 +643,17 @@ __init int hypfs_diag_init(void)
540 pr_err("The hardware system does not provide all " 643 pr_err("The hardware system does not provide all "
541 "functions required by hypfs\n"); 644 "functions required by hypfs\n");
542 } 645 }
646 if (diag204_info_type == INFO_EXT) {
647 rc = hypfs_dbfs_init();
648 if (rc)
649 diag204_free_buffer();
650 }
543 return rc; 651 return rc;
544} 652}
545 653
546void hypfs_diag_exit(void) 654void hypfs_diag_exit(void)
547{ 655{
656 debugfs_remove(dbfs_d204_file);
548 diag224_delete_name_table(); 657 diag224_delete_name_table();
549 diag204_free_buffer(); 658 diag204_free_buffer();
550} 659}
diff --git a/arch/s390/hypfs/hypfs_vm.c b/arch/s390/hypfs/hypfs_vm.c
index f0b0d31f0b48..ee5ab1a578e7 100644
--- a/arch/s390/hypfs/hypfs_vm.c
+++ b/arch/s390/hypfs/hypfs_vm.c
@@ -10,14 +10,18 @@
10#include <linux/string.h> 10#include <linux/string.h>
11#include <linux/vmalloc.h> 11#include <linux/vmalloc.h>
12#include <asm/ebcdic.h> 12#include <asm/ebcdic.h>
13#include <asm/timex.h>
13#include "hypfs.h" 14#include "hypfs.h"
14 15
15#define NAME_LEN 8 16#define NAME_LEN 8
17#define DBFS_D2FC_HDR_VERSION 0
16 18
17static char local_guest[] = " "; 19static char local_guest[] = " ";
18static char all_guests[] = "* "; 20static char all_guests[] = "* ";
19static char *guest_query; 21static char *guest_query;
20 22
23static struct dentry *dbfs_d2fc_file;
24
21struct diag2fc_data { 25struct diag2fc_data {
22 __u32 version; 26 __u32 version;
23 __u32 flags; 27 __u32 flags;
@@ -76,23 +80,26 @@ static int diag2fc(int size, char* query, void *addr)
76 return -residual_cnt; 80 return -residual_cnt;
77} 81}
78 82
79static struct diag2fc_data *diag2fc_store(char *query, int *count) 83/*
84 * Allocate buffer for "query" and store diag 2fc at "offset"
85 */
86static void *diag2fc_store(char *query, unsigned int *count, int offset)
80{ 87{
88 void *data;
81 int size; 89 int size;
82 struct diag2fc_data *data;
83 90
84 do { 91 do {
85 size = diag2fc(0, query, NULL); 92 size = diag2fc(0, query, NULL);
86 if (size < 0) 93 if (size < 0)
87 return ERR_PTR(-EACCES); 94 return ERR_PTR(-EACCES);
88 data = vmalloc(size); 95 data = vmalloc(size + offset);
89 if (!data) 96 if (!data)
90 return ERR_PTR(-ENOMEM); 97 return ERR_PTR(-ENOMEM);
91 if (diag2fc(size, query, data) == 0) 98 if (diag2fc(size, query, data + offset) == 0)
92 break; 99 break;
93 vfree(data); 100 vfree(data);
94 } while (1); 101 } while (1);
95 *count = (size / sizeof(*data)); 102 *count = (size / sizeof(struct diag2fc_data));
96 103
97 return data; 104 return data;
98} 105}
@@ -168,9 +175,10 @@ int hypfs_vm_create_files(struct super_block *sb, struct dentry *root)
168{ 175{
169 struct dentry *dir, *file; 176 struct dentry *dir, *file;
170 struct diag2fc_data *data; 177 struct diag2fc_data *data;
171 int rc, i, count = 0; 178 unsigned int count = 0;
179 int rc, i;
172 180
173 data = diag2fc_store(guest_query, &count); 181 data = diag2fc_store(guest_query, &count, 0);
174 if (IS_ERR(data)) 182 if (IS_ERR(data))
175 return PTR_ERR(data); 183 return PTR_ERR(data);
176 184
@@ -218,8 +226,61 @@ failed:
218 return rc; 226 return rc;
219} 227}
220 228
229struct dbfs_d2fc_hdr {
230 u64 len; /* Length of d2fc buffer without header */
231 u16 version; /* Version of header */
232 char tod_ext[16]; /* TOD clock for d2fc */
233 u64 count; /* Number of VM guests in d2fc buffer */
234 char reserved[30];
235} __attribute__ ((packed));
236
237struct dbfs_d2fc {
238 struct dbfs_d2fc_hdr hdr; /* 64 byte header */
239 char buf[]; /* d2fc buffer */
240} __attribute__ ((packed));
241
242static int dbfs_d2fc_open(struct inode *inode, struct file *file)
243{
244 struct dbfs_d2fc *data;
245 unsigned int count;
246
247 data = diag2fc_store(guest_query, &count, sizeof(data->hdr));
248 if (IS_ERR(data))
249 return PTR_ERR(data);
250 get_clock_ext(data->hdr.tod_ext);
251 data->hdr.len = count * sizeof(struct diag2fc_data);
252 data->hdr.version = DBFS_D2FC_HDR_VERSION;
253 data->hdr.count = count;
254 memset(&data->hdr.reserved, 0, sizeof(data->hdr.reserved));
255 file->private_data = data;
256 return nonseekable_open(inode, file);
257}
258
259static int dbfs_d2fc_release(struct inode *inode, struct file *file)
260{
261 diag2fc_free(file->private_data);
262 return 0;
263}
264
265static ssize_t dbfs_d2fc_read(struct file *file, char __user *buf,
266 size_t size, loff_t *ppos)
267{
268 struct dbfs_d2fc *data = file->private_data;
269
270 return simple_read_from_buffer(buf, size, ppos, data, data->hdr.len +
271 sizeof(struct dbfs_d2fc_hdr));
272}
273
274static const struct file_operations dbfs_d2fc_ops = {
275 .open = dbfs_d2fc_open,
276 .read = dbfs_d2fc_read,
277 .release = dbfs_d2fc_release,
278};
279
221int hypfs_vm_init(void) 280int hypfs_vm_init(void)
222{ 281{
282 if (!MACHINE_IS_VM)
283 return 0;
223 if (diag2fc(0, all_guests, NULL) > 0) 284 if (diag2fc(0, all_guests, NULL) > 0)
224 guest_query = all_guests; 285 guest_query = all_guests;
225 else if (diag2fc(0, local_guest, NULL) > 0) 286 else if (diag2fc(0, local_guest, NULL) > 0)
@@ -227,5 +288,17 @@ int hypfs_vm_init(void)
227 else 288 else
228 return -EACCES; 289 return -EACCES;
229 290
291 dbfs_d2fc_file = debugfs_create_file("diag_2fc", 0400, hypfs_dbfs_dir,
292 NULL, &dbfs_d2fc_ops);
293 if (IS_ERR(dbfs_d2fc_file))
294 return PTR_ERR(dbfs_d2fc_file);
295
230 return 0; 296 return 0;
231} 297}
298
299void hypfs_vm_exit(void)
300{
301 if (!MACHINE_IS_VM)
302 return;
303 debugfs_remove(dbfs_d2fc_file);
304}
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index c53f8ac825ca..6b120f073043 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -46,6 +46,8 @@ static const struct super_operations hypfs_s_ops;
46/* start of list of all dentries, which have to be deleted on update */ 46/* start of list of all dentries, which have to be deleted on update */
47static struct dentry *hypfs_last_dentry; 47static struct dentry *hypfs_last_dentry;
48 48
49struct dentry *hypfs_dbfs_dir;
50
49static void hypfs_update_update(struct super_block *sb) 51static void hypfs_update_update(struct super_block *sb)
50{ 52{
51 struct hypfs_sb_info *sb_info = sb->s_fs_info; 53 struct hypfs_sb_info *sb_info = sb->s_fs_info;
@@ -145,7 +147,7 @@ static int hypfs_open(struct inode *inode, struct file *filp)
145 } 147 }
146 mutex_unlock(&fs_info->lock); 148 mutex_unlock(&fs_info->lock);
147 } 149 }
148 return 0; 150 return nonseekable_open(inode, filp);
149} 151}
150 152
151static ssize_t hypfs_aio_read(struct kiocb *iocb, const struct iovec *iov, 153static ssize_t hypfs_aio_read(struct kiocb *iocb, const struct iovec *iov,
@@ -468,20 +470,22 @@ static int __init hypfs_init(void)
468{ 470{
469 int rc; 471 int rc;
470 472
471 if (MACHINE_IS_VM) { 473 hypfs_dbfs_dir = debugfs_create_dir("s390_hypfs", NULL);
472 if (hypfs_vm_init()) 474 if (IS_ERR(hypfs_dbfs_dir))
473 /* no diag 2fc, just exit */ 475 return PTR_ERR(hypfs_dbfs_dir);
474 return -ENODATA; 476
475 } else { 477 if (hypfs_diag_init()) {
476 if (hypfs_diag_init()) { 478 rc = -ENODATA;
477 rc = -ENODATA; 479 goto fail_debugfs_remove;
478 goto fail_diag; 480 }
479 } 481 if (hypfs_vm_init()) {
482 rc = -ENODATA;
483 goto fail_hypfs_diag_exit;
480 } 484 }
481 s390_kobj = kobject_create_and_add("s390", hypervisor_kobj); 485 s390_kobj = kobject_create_and_add("s390", hypervisor_kobj);
482 if (!s390_kobj) { 486 if (!s390_kobj) {
483 rc = -ENOMEM; 487 rc = -ENOMEM;
484 goto fail_sysfs; 488 goto fail_hypfs_vm_exit;
485 } 489 }
486 rc = register_filesystem(&hypfs_type); 490 rc = register_filesystem(&hypfs_type);
487 if (rc) 491 if (rc)
@@ -490,18 +494,22 @@ static int __init hypfs_init(void)
490 494
491fail_filesystem: 495fail_filesystem:
492 kobject_put(s390_kobj); 496 kobject_put(s390_kobj);
493fail_sysfs: 497fail_hypfs_vm_exit:
494 if (!MACHINE_IS_VM) 498 hypfs_vm_exit();
495 hypfs_diag_exit(); 499fail_hypfs_diag_exit:
496fail_diag: 500 hypfs_diag_exit();
501fail_debugfs_remove:
502 debugfs_remove(hypfs_dbfs_dir);
503
497 pr_err("Initialization of hypfs failed with rc=%i\n", rc); 504 pr_err("Initialization of hypfs failed with rc=%i\n", rc);
498 return rc; 505 return rc;
499} 506}
500 507
501static void __exit hypfs_exit(void) 508static void __exit hypfs_exit(void)
502{ 509{
503 if (!MACHINE_IS_VM) 510 hypfs_diag_exit();
504 hypfs_diag_exit(); 511 hypfs_vm_exit();
512 debugfs_remove(hypfs_dbfs_dir);
505 unregister_filesystem(&hypfs_type); 513 unregister_filesystem(&hypfs_type);
506 kobject_put(s390_kobj); 514 kobject_put(s390_kobj);
507} 515}
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 258ba88b7b50..8b1a52a137c5 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -188,15 +188,16 @@ struct s390_idle_data {
188 188
189DECLARE_PER_CPU(struct s390_idle_data, s390_idle); 189DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
190 190
191void vtime_start_cpu(void); 191void vtime_start_cpu(__u64 int_clock, __u64 enter_timer);
192cputime64_t s390_get_idle_time(int cpu); 192cputime64_t s390_get_idle_time(int cpu);
193 193
194#define arch_idle_time(cpu) s390_get_idle_time(cpu) 194#define arch_idle_time(cpu) s390_get_idle_time(cpu)
195 195
196static inline void s390_idle_check(void) 196static inline void s390_idle_check(struct pt_regs *regs, __u64 int_clock,
197 __u64 enter_timer)
197{ 198{
198 if ((&__get_cpu_var(s390_idle))->idle_enter != 0ULL) 199 if (regs->psw.mask & PSW_MASK_WAIT)
199 vtime_start_cpu(); 200 vtime_start_cpu(int_clock, enter_timer);
200} 201}
201 202
202static inline int s390_nohz_delay(int cpu) 203static inline int s390_nohz_delay(int cpu)
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 05527c040b7a..0f97ef2d92ac 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -104,38 +104,39 @@ struct _lowcore {
104 /* CPU time accounting values */ 104 /* CPU time accounting values */
105 __u64 sync_enter_timer; /* 0x0250 */ 105 __u64 sync_enter_timer; /* 0x0250 */
106 __u64 async_enter_timer; /* 0x0258 */ 106 __u64 async_enter_timer; /* 0x0258 */
107 __u64 exit_timer; /* 0x0260 */ 107 __u64 mcck_enter_timer; /* 0x0260 */
108 __u64 user_timer; /* 0x0268 */ 108 __u64 exit_timer; /* 0x0268 */
109 __u64 system_timer; /* 0x0270 */ 109 __u64 user_timer; /* 0x0270 */
110 __u64 steal_timer; /* 0x0278 */ 110 __u64 system_timer; /* 0x0278 */
111 __u64 last_update_timer; /* 0x0280 */ 111 __u64 steal_timer; /* 0x0280 */
112 __u64 last_update_clock; /* 0x0288 */ 112 __u64 last_update_timer; /* 0x0288 */
113 __u64 last_update_clock; /* 0x0290 */
113 114
114 /* Current process. */ 115 /* Current process. */
115 __u32 current_task; /* 0x0290 */ 116 __u32 current_task; /* 0x0298 */
116 __u32 thread_info; /* 0x0294 */ 117 __u32 thread_info; /* 0x029c */
117 __u32 kernel_stack; /* 0x0298 */ 118 __u32 kernel_stack; /* 0x02a0 */
118 119
119 /* Interrupt and panic stack. */ 120 /* Interrupt and panic stack. */
120 __u32 async_stack; /* 0x029c */ 121 __u32 async_stack; /* 0x02a4 */
121 __u32 panic_stack; /* 0x02a0 */ 122 __u32 panic_stack; /* 0x02a8 */
122 123
123 /* Address space pointer. */ 124 /* Address space pointer. */
124 __u32 kernel_asce; /* 0x02a4 */ 125 __u32 kernel_asce; /* 0x02ac */
125 __u32 user_asce; /* 0x02a8 */ 126 __u32 user_asce; /* 0x02b0 */
126 __u32 user_exec_asce; /* 0x02ac */ 127 __u32 user_exec_asce; /* 0x02b4 */
127 128
128 /* SMP info area */ 129 /* SMP info area */
129 struct cpuid cpu_id; /* 0x02b0 */
130 __u32 cpu_nr; /* 0x02b8 */ 130 __u32 cpu_nr; /* 0x02b8 */
131 __u32 softirq_pending; /* 0x02bc */ 131 __u32 softirq_pending; /* 0x02bc */
132 __u32 percpu_offset; /* 0x02c0 */ 132 __u32 percpu_offset; /* 0x02c0 */
133 __u32 ext_call_fast; /* 0x02c4 */ 133 __u32 ext_call_fast; /* 0x02c4 */
134 __u64 int_clock; /* 0x02c8 */ 134 __u64 int_clock; /* 0x02c8 */
135 __u64 clock_comparator; /* 0x02d0 */ 135 __u64 mcck_clock; /* 0x02d0 */
136 __u32 machine_flags; /* 0x02d8 */ 136 __u64 clock_comparator; /* 0x02d8 */
137 __u32 ftrace_func; /* 0x02dc */ 137 __u32 machine_flags; /* 0x02e0 */
138 __u8 pad_0x02e0[0x0300-0x02e0]; /* 0x02e0 */ 138 __u32 ftrace_func; /* 0x02e4 */
139 __u8 pad_0x02e8[0x0300-0x02e8]; /* 0x02e8 */
139 140
140 /* Interrupt response block */ 141 /* Interrupt response block */
141 __u8 irb[64]; /* 0x0300 */ 142 __u8 irb[64]; /* 0x0300 */
@@ -189,14 +190,14 @@ struct _lowcore {
189 __u32 data_exc_code; /* 0x0090 */ 190 __u32 data_exc_code; /* 0x0090 */
190 __u16 mon_class_num; /* 0x0094 */ 191 __u16 mon_class_num; /* 0x0094 */
191 __u16 per_perc_atmid; /* 0x0096 */ 192 __u16 per_perc_atmid; /* 0x0096 */
192 addr_t per_address; /* 0x0098 */ 193 __u64 per_address; /* 0x0098 */
193 __u8 exc_access_id; /* 0x00a0 */ 194 __u8 exc_access_id; /* 0x00a0 */
194 __u8 per_access_id; /* 0x00a1 */ 195 __u8 per_access_id; /* 0x00a1 */
195 __u8 op_access_id; /* 0x00a2 */ 196 __u8 op_access_id; /* 0x00a2 */
196 __u8 ar_access_id; /* 0x00a3 */ 197 __u8 ar_access_id; /* 0x00a3 */
197 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ 198 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
198 addr_t trans_exc_code; /* 0x00a8 */ 199 __u64 trans_exc_code; /* 0x00a8 */
199 addr_t monitor_code; /* 0x00b0 */ 200 __u64 monitor_code; /* 0x00b0 */
200 __u16 subchannel_id; /* 0x00b8 */ 201 __u16 subchannel_id; /* 0x00b8 */
201 __u16 subchannel_nr; /* 0x00ba */ 202 __u16 subchannel_nr; /* 0x00ba */
202 __u32 io_int_parm; /* 0x00bc */ 203 __u32 io_int_parm; /* 0x00bc */
@@ -207,7 +208,7 @@ struct _lowcore {
207 __u32 mcck_interruption_code[2]; /* 0x00e8 */ 208 __u32 mcck_interruption_code[2]; /* 0x00e8 */
208 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ 209 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
209 __u32 external_damage_code; /* 0x00f4 */ 210 __u32 external_damage_code; /* 0x00f4 */
210 addr_t failing_storage_address; /* 0x00f8 */ 211 __u64 failing_storage_address; /* 0x00f8 */
211 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */ 212 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
212 __u64 breaking_event_addr; /* 0x0110 */ 213 __u64 breaking_event_addr; /* 0x0110 */
213 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */ 214 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
@@ -233,39 +234,41 @@ struct _lowcore {
233 /* CPU accounting and timing values. */ 234 /* CPU accounting and timing values. */
234 __u64 sync_enter_timer; /* 0x02a0 */ 235 __u64 sync_enter_timer; /* 0x02a0 */
235 __u64 async_enter_timer; /* 0x02a8 */ 236 __u64 async_enter_timer; /* 0x02a8 */
236 __u64 exit_timer; /* 0x02b0 */ 237 __u64 mcck_enter_timer; /* 0x02b0 */
237 __u64 user_timer; /* 0x02b8 */ 238 __u64 exit_timer; /* 0x02b8 */
238 __u64 system_timer; /* 0x02c0 */ 239 __u64 user_timer; /* 0x02c0 */
239 __u64 steal_timer; /* 0x02c8 */ 240 __u64 system_timer; /* 0x02c8 */
240 __u64 last_update_timer; /* 0x02d0 */ 241 __u64 steal_timer; /* 0x02d0 */
241 __u64 last_update_clock; /* 0x02d8 */ 242 __u64 last_update_timer; /* 0x02d8 */
243 __u64 last_update_clock; /* 0x02e0 */
242 244
243 /* Current process. */ 245 /* Current process. */
244 __u64 current_task; /* 0x02e0 */ 246 __u64 current_task; /* 0x02e8 */
245 __u64 thread_info; /* 0x02e8 */ 247 __u64 thread_info; /* 0x02f0 */
246 __u64 kernel_stack; /* 0x02f0 */ 248 __u64 kernel_stack; /* 0x02f8 */
247 249
248 /* Interrupt and panic stack. */ 250 /* Interrupt and panic stack. */
249 __u64 async_stack; /* 0x02f8 */ 251 __u64 async_stack; /* 0x0300 */
250 __u64 panic_stack; /* 0x0300 */ 252 __u64 panic_stack; /* 0x0308 */
251 253
252 /* Address space pointer. */ 254 /* Address space pointer. */
253 __u64 kernel_asce; /* 0x0308 */ 255 __u64 kernel_asce; /* 0x0310 */
254 __u64 user_asce; /* 0x0310 */ 256 __u64 user_asce; /* 0x0318 */
255 __u64 user_exec_asce; /* 0x0318 */ 257 __u64 user_exec_asce; /* 0x0320 */
256 258
257 /* SMP info area */ 259 /* SMP info area */
258 struct cpuid cpu_id; /* 0x0320 */
259 __u32 cpu_nr; /* 0x0328 */ 260 __u32 cpu_nr; /* 0x0328 */
260 __u32 softirq_pending; /* 0x032c */ 261 __u32 softirq_pending; /* 0x032c */
261 __u64 percpu_offset; /* 0x0330 */ 262 __u64 percpu_offset; /* 0x0330 */
262 __u64 ext_call_fast; /* 0x0338 */ 263 __u64 ext_call_fast; /* 0x0338 */
263 __u64 int_clock; /* 0x0340 */ 264 __u64 int_clock; /* 0x0340 */
264 __u64 clock_comparator; /* 0x0348 */ 265 __u64 mcck_clock; /* 0x0348 */
265 __u64 vdso_per_cpu_data; /* 0x0350 */ 266 __u64 clock_comparator; /* 0x0350 */
266 __u64 machine_flags; /* 0x0358 */ 267 __u64 vdso_per_cpu_data; /* 0x0358 */
267 __u64 ftrace_func; /* 0x0360 */ 268 __u64 machine_flags; /* 0x0360 */
268 __u8 pad_0x0368[0x0380-0x0368]; /* 0x0368 */ 269 __u64 ftrace_func; /* 0x0368 */
270 __u64 sie_hook; /* 0x0370 */
271 __u64 cmf_hpp; /* 0x0378 */
269 272
270 /* Interrupt response block. */ 273 /* Interrupt response block. */
271 __u8 irb[64]; /* 0x0380 */ 274 __u8 irb[64]; /* 0x0380 */
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index fef9b33cdd59..e2c218dc68a6 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -328,8 +328,8 @@ struct pt_regs
328 psw_t psw; 328 psw_t psw;
329 unsigned long gprs[NUM_GPRS]; 329 unsigned long gprs[NUM_GPRS];
330 unsigned long orig_gpr2; 330 unsigned long orig_gpr2;
331 unsigned short svcnr;
332 unsigned short ilc; 331 unsigned short ilc;
332 unsigned short svcnr;
333}; 333};
334#endif 334#endif
335 335
@@ -436,6 +436,7 @@ typedef struct
436#define PTRACE_PEEKDATA_AREA 0x5003 436#define PTRACE_PEEKDATA_AREA 0x5003
437#define PTRACE_POKETEXT_AREA 0x5004 437#define PTRACE_POKETEXT_AREA 0x5004
438#define PTRACE_POKEDATA_AREA 0x5005 438#define PTRACE_POKEDATA_AREA 0x5005
439#define PTRACE_GET_LAST_BREAK 0x5006
439 440
440/* 441/*
441 * PT_PROT definition is loosely based on hppa bsd definition in 442 * PT_PROT definition is loosely based on hppa bsd definition in
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index 9b04b1102bbc..0eaae6260274 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -368,14 +368,12 @@ struct qdio_initialize {
368#define QDIO_FLAG_SYNC_OUTPUT 0x02 368#define QDIO_FLAG_SYNC_OUTPUT 0x02
369#define QDIO_FLAG_PCI_OUT 0x10 369#define QDIO_FLAG_PCI_OUT 0x10
370 370
371extern int qdio_initialize(struct qdio_initialize *);
372extern int qdio_allocate(struct qdio_initialize *); 371extern int qdio_allocate(struct qdio_initialize *);
373extern int qdio_establish(struct qdio_initialize *); 372extern int qdio_establish(struct qdio_initialize *);
374extern int qdio_activate(struct ccw_device *); 373extern int qdio_activate(struct ccw_device *);
375 374
376extern int do_QDIO(struct ccw_device *cdev, unsigned int callflags, 375extern int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
377 int q_nr, unsigned int bufnr, unsigned int count); 376 int q_nr, unsigned int bufnr, unsigned int count);
378extern int qdio_cleanup(struct ccw_device*, int);
379extern int qdio_shutdown(struct ccw_device*, int); 377extern int qdio_shutdown(struct ccw_device*, int);
380extern int qdio_free(struct ccw_device *); 378extern int qdio_free(struct ccw_device *);
381extern int qdio_get_ssqd_desc(struct ccw_device *dev, struct qdio_ssqd_desc*); 379extern int qdio_get_ssqd_desc(struct ccw_device *dev, struct qdio_ssqd_desc*);
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index 9ab6bd3a65d1..25e831d58e1e 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -2,7 +2,7 @@
2 * include/asm-s390/setup.h 2 * include/asm-s390/setup.h
3 * 3 *
4 * S390 version 4 * S390 version
5 * Copyright IBM Corp. 1999,2006 5 * Copyright IBM Corp. 1999,2010
6 */ 6 */
7 7
8#ifndef _ASM_S390_SETUP_H 8#ifndef _ASM_S390_SETUP_H
@@ -72,6 +72,7 @@ extern unsigned int user_mode;
72#define MACHINE_FLAG_HPAGE (1UL << 10) 72#define MACHINE_FLAG_HPAGE (1UL << 10)
73#define MACHINE_FLAG_PFMF (1UL << 11) 73#define MACHINE_FLAG_PFMF (1UL << 11)
74#define MACHINE_FLAG_LPAR (1UL << 12) 74#define MACHINE_FLAG_LPAR (1UL << 12)
75#define MACHINE_FLAG_SPP (1UL << 13)
75 76
76#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM) 77#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)
77#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM) 78#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)
@@ -88,6 +89,7 @@ extern unsigned int user_mode;
88#define MACHINE_HAS_MVCOS (0) 89#define MACHINE_HAS_MVCOS (0)
89#define MACHINE_HAS_HPAGE (0) 90#define MACHINE_HAS_HPAGE (0)
90#define MACHINE_HAS_PFMF (0) 91#define MACHINE_HAS_PFMF (0)
92#define MACHINE_HAS_SPP (0)
91#else /* __s390x__ */ 93#else /* __s390x__ */
92#define MACHINE_HAS_IEEE (1) 94#define MACHINE_HAS_IEEE (1)
93#define MACHINE_HAS_CSP (1) 95#define MACHINE_HAS_CSP (1)
@@ -97,6 +99,7 @@ extern unsigned int user_mode;
97#define MACHINE_HAS_MVCOS (S390_lowcore.machine_flags & MACHINE_FLAG_MVCOS) 99#define MACHINE_HAS_MVCOS (S390_lowcore.machine_flags & MACHINE_FLAG_MVCOS)
98#define MACHINE_HAS_HPAGE (S390_lowcore.machine_flags & MACHINE_FLAG_HPAGE) 100#define MACHINE_HAS_HPAGE (S390_lowcore.machine_flags & MACHINE_FLAG_HPAGE)
99#define MACHINE_HAS_PFMF (S390_lowcore.machine_flags & MACHINE_FLAG_PFMF) 101#define MACHINE_HAS_PFMF (S390_lowcore.machine_flags & MACHINE_FLAG_PFMF)
102#define MACHINE_HAS_SPP (S390_lowcore.machine_flags & MACHINE_FLAG_SPP)
100#endif /* __s390x__ */ 103#endif /* __s390x__ */
101 104
102#define ZFCPDUMP_HSA_SIZE (32UL<<20) 105#define ZFCPDUMP_HSA_SIZE (32UL<<20)
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index 1741c1556a4e..cef66210c846 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -459,11 +459,6 @@ extern void (*_machine_power_off)(void);
459 459
460#define arch_align_stack(x) (x) 460#define arch_align_stack(x) (x)
461 461
462#ifdef CONFIG_TRACE_IRQFLAGS
463extern psw_t sysc_restore_trace_psw;
464extern psw_t io_restore_trace_psw;
465#endif
466
467static inline int tprot(unsigned long addr) 462static inline int tprot(unsigned long addr)
468{ 463{
469 int rc = -EFAULT; 464 int rc = -EFAULT;
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index 34f0873d6525..be3d3f91d86c 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -50,6 +50,7 @@ struct thread_info {
50 struct restart_block restart_block; 50 struct restart_block restart_block;
51 __u64 user_timer; 51 __u64 user_timer;
52 __u64 system_timer; 52 __u64 system_timer;
53 unsigned long last_break; /* last breaking-event-address. */
53}; 54};
54 55
55/* 56/*
diff --git a/arch/s390/include/asm/timex.h b/arch/s390/include/asm/timex.h
index f174bdaa6b59..09d345a701dc 100644
--- a/arch/s390/include/asm/timex.h
+++ b/arch/s390/include/asm/timex.h
@@ -61,11 +61,15 @@ static inline unsigned long long get_clock (void)
61 return clk; 61 return clk;
62} 62}
63 63
64static inline void get_clock_ext(char *clk)
65{
66 asm volatile("stcke %0" : "=Q" (*clk) : : "cc");
67}
68
64static inline unsigned long long get_clock_xt(void) 69static inline unsigned long long get_clock_xt(void)
65{ 70{
66 unsigned char clk[16]; 71 unsigned char clk[16];
67 72 get_clock_ext(clk);
68 asm volatile("stcke %0" : "=Q" (clk) : : "cc");
69 return *((unsigned long long *)&clk[1]); 73 return *((unsigned long long *)&clk[1]);
70} 74}
71 75
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index 6e7211abd950..dc8a67297d0f 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -7,8 +7,10 @@
7 7
8const struct cpumask *cpu_coregroup_mask(unsigned int cpu); 8const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
9 9
10extern unsigned char cpu_core_id[NR_CPUS];
10extern cpumask_t cpu_core_map[NR_CPUS]; 11extern cpumask_t cpu_core_map[NR_CPUS];
11 12
13#define topology_core_id(cpu) (cpu_core_id[cpu])
12#define topology_core_cpumask(cpu) (&cpu_core_map[cpu]) 14#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
13 15
14int topology_set_cpu_management(int fc); 16int topology_set_cpu_management(int fc);
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index a09408952ed0..d9b490a2716e 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -39,6 +39,7 @@ int main(void)
39 DEFINE(__TI_precount, offsetof(struct thread_info, preempt_count)); 39 DEFINE(__TI_precount, offsetof(struct thread_info, preempt_count));
40 DEFINE(__TI_user_timer, offsetof(struct thread_info, user_timer)); 40 DEFINE(__TI_user_timer, offsetof(struct thread_info, user_timer));
41 DEFINE(__TI_system_timer, offsetof(struct thread_info, system_timer)); 41 DEFINE(__TI_system_timer, offsetof(struct thread_info, system_timer));
42 DEFINE(__TI_last_break, offsetof(struct thread_info, last_break));
42 BLANK(); 43 BLANK();
43 DEFINE(__PT_ARGS, offsetof(struct pt_regs, args)); 44 DEFINE(__PT_ARGS, offsetof(struct pt_regs, args));
44 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw)); 45 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw));
@@ -112,6 +113,7 @@ int main(void)
112 DEFINE(__LC_RETURN_MCCK_PSW, offsetof(struct _lowcore, return_mcck_psw)); 113 DEFINE(__LC_RETURN_MCCK_PSW, offsetof(struct _lowcore, return_mcck_psw));
113 DEFINE(__LC_SYNC_ENTER_TIMER, offsetof(struct _lowcore, sync_enter_timer)); 114 DEFINE(__LC_SYNC_ENTER_TIMER, offsetof(struct _lowcore, sync_enter_timer));
114 DEFINE(__LC_ASYNC_ENTER_TIMER, offsetof(struct _lowcore, async_enter_timer)); 115 DEFINE(__LC_ASYNC_ENTER_TIMER, offsetof(struct _lowcore, async_enter_timer));
116 DEFINE(__LC_MCCK_ENTER_TIMER, offsetof(struct _lowcore, mcck_enter_timer));
115 DEFINE(__LC_EXIT_TIMER, offsetof(struct _lowcore, exit_timer)); 117 DEFINE(__LC_EXIT_TIMER, offsetof(struct _lowcore, exit_timer));
116 DEFINE(__LC_USER_TIMER, offsetof(struct _lowcore, user_timer)); 118 DEFINE(__LC_USER_TIMER, offsetof(struct _lowcore, user_timer));
117 DEFINE(__LC_SYSTEM_TIMER, offsetof(struct _lowcore, system_timer)); 119 DEFINE(__LC_SYSTEM_TIMER, offsetof(struct _lowcore, system_timer));
@@ -126,10 +128,12 @@ int main(void)
126 DEFINE(__LC_KERNEL_ASCE, offsetof(struct _lowcore, kernel_asce)); 128 DEFINE(__LC_KERNEL_ASCE, offsetof(struct _lowcore, kernel_asce));
127 DEFINE(__LC_USER_ASCE, offsetof(struct _lowcore, user_asce)); 129 DEFINE(__LC_USER_ASCE, offsetof(struct _lowcore, user_asce));
128 DEFINE(__LC_USER_EXEC_ASCE, offsetof(struct _lowcore, user_exec_asce)); 130 DEFINE(__LC_USER_EXEC_ASCE, offsetof(struct _lowcore, user_exec_asce));
129 DEFINE(__LC_CPUID, offsetof(struct _lowcore, cpu_id));
130 DEFINE(__LC_INT_CLOCK, offsetof(struct _lowcore, int_clock)); 131 DEFINE(__LC_INT_CLOCK, offsetof(struct _lowcore, int_clock));
132 DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock));
131 DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags)); 133 DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags));
132 DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func)); 134 DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func));
135 DEFINE(__LC_SIE_HOOK, offsetof(struct _lowcore, sie_hook));
136 DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp));
133 DEFINE(__LC_IRB, offsetof(struct _lowcore, irb)); 137 DEFINE(__LC_IRB, offsetof(struct _lowcore, irb));
134 DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area)); 138 DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area));
135 DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area)); 139 DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area));
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index 0168472b2fdf..98192261491d 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -655,6 +655,7 @@ found:
655 p_info->act_entry_offset = 0; 655 p_info->act_entry_offset = 0;
656 file->private_data = p_info; 656 file->private_data = p_info;
657 debug_info_get(debug_info); 657 debug_info_get(debug_info);
658 nonseekable_open(inode, file);
658out: 659out:
659 mutex_unlock(&debug_mutex); 660 mutex_unlock(&debug_mutex);
660 return rc; 661 return rc;
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 2d92c2cf92d7..c00856ad4e5a 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -356,6 +356,7 @@ static __init void detect_machine_facilities(void)
356{ 356{
357#ifdef CONFIG_64BIT 357#ifdef CONFIG_64BIT
358 unsigned int facilities; 358 unsigned int facilities;
359 unsigned long long facility_bits;
359 360
360 facilities = stfl(); 361 facilities = stfl();
361 if (facilities & (1 << 28)) 362 if (facilities & (1 << 28))
@@ -364,6 +365,9 @@ static __init void detect_machine_facilities(void)
364 S390_lowcore.machine_flags |= MACHINE_FLAG_PFMF; 365 S390_lowcore.machine_flags |= MACHINE_FLAG_PFMF;
365 if (facilities & (1 << 4)) 366 if (facilities & (1 << 4))
366 S390_lowcore.machine_flags |= MACHINE_FLAG_MVCOS; 367 S390_lowcore.machine_flags |= MACHINE_FLAG_MVCOS;
368 if ((stfle(&facility_bits, 1) > 0) &&
369 (facility_bits & (1ULL << (63 - 40))))
370 S390_lowcore.machine_flags |= MACHINE_FLAG_SPP;
367#endif 371#endif
368} 372}
369 373
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 6af7045280a8..d5e3e6007447 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -73,21 +73,24 @@ STACK_SIZE = 1 << STACK_SHIFT
73 basr %r14,%r1 73 basr %r14,%r1
74 .endm 74 .endm
75 75
76 .macro TRACE_IRQS_CHECK 76 .macro TRACE_IRQS_CHECK_ON
77 basr %r2,%r0
78 tm SP_PSW(%r15),0x03 # irqs enabled? 77 tm SP_PSW(%r15),0x03 # irqs enabled?
79 jz 0f 78 bz BASED(0f)
80 l %r1,BASED(.Ltrace_irq_on_caller) 79 TRACE_IRQS_ON
81 basr %r14,%r1 800:
82 j 1f 81 .endm
830: l %r1,BASED(.Ltrace_irq_off_caller) 82
84 basr %r14,%r1 83 .macro TRACE_IRQS_CHECK_OFF
851: 84 tm SP_PSW(%r15),0x03 # irqs enabled?
85 bz BASED(0f)
86 TRACE_IRQS_OFF
870:
86 .endm 88 .endm
87#else 89#else
88#define TRACE_IRQS_ON 90#define TRACE_IRQS_ON
89#define TRACE_IRQS_OFF 91#define TRACE_IRQS_OFF
90#define TRACE_IRQS_CHECK 92#define TRACE_IRQS_CHECK_ON
93#define TRACE_IRQS_CHECK_OFF
91#endif 94#endif
92 95
93#ifdef CONFIG_LOCKDEP 96#ifdef CONFIG_LOCKDEP
@@ -177,9 +180,9 @@ STACK_SIZE = 1 << STACK_SHIFT
177 s %r15,BASED(.Lc_spsize) # make room for registers & psw 180 s %r15,BASED(.Lc_spsize) # make room for registers & psw
178 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 181 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
179 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 182 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
180 icm %r12,3,__LC_SVC_ILC 183 icm %r12,12,__LC_SVC_ILC
181 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 184 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
182 st %r12,SP_SVCNR(%r15) 185 st %r12,SP_ILC(%r15)
183 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack 186 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
184 la %r12,0 187 la %r12,0
185 st %r12,__SF_BACKCHAIN(%r15) # clear back chain 188 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
@@ -273,66 +276,45 @@ sysc_do_restart:
273 st %r2,SP_R2(%r15) # store return value (change R2 on stack) 276 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
274 277
275sysc_return: 278sysc_return:
279 LOCKDEP_SYS_EXIT
280sysc_tif:
276 tm __TI_flags+3(%r9),_TIF_WORK_SVC 281 tm __TI_flags+3(%r9),_TIF_WORK_SVC
277 bnz BASED(sysc_work) # there is work to do (signals etc.) 282 bnz BASED(sysc_work) # there is work to do (signals etc.)
278sysc_restore: 283sysc_restore:
279#ifdef CONFIG_TRACE_IRQFLAGS
280 la %r1,BASED(sysc_restore_trace_psw_addr)
281 l %r1,0(%r1)
282 lpsw 0(%r1)
283sysc_restore_trace:
284 TRACE_IRQS_CHECK
285 LOCKDEP_SYS_EXIT
286#endif
287sysc_leave:
288 RESTORE_ALL __LC_RETURN_PSW,1 284 RESTORE_ALL __LC_RETURN_PSW,1
289sysc_done: 285sysc_done:
290 286
291#ifdef CONFIG_TRACE_IRQFLAGS
292sysc_restore_trace_psw_addr:
293 .long sysc_restore_trace_psw
294
295 .section .data,"aw",@progbits
296 .align 8
297 .globl sysc_restore_trace_psw
298sysc_restore_trace_psw:
299 .long 0, sysc_restore_trace + 0x80000000
300 .previous
301#endif
302
303#
304# recheck if there is more work to do
305# 287#
306sysc_work_loop: 288# There is work to do, but first we need to check if we return to userspace.
307 tm __TI_flags+3(%r9),_TIF_WORK_SVC
308 bz BASED(sysc_restore) # there is no work to do
309#
310# One of the work bits is on. Find out which one.
311# 289#
312sysc_work: 290sysc_work:
313 tm SP_PSW+1(%r15),0x01 # returning to user ? 291 tm SP_PSW+1(%r15),0x01 # returning to user ?
314 bno BASED(sysc_restore) 292 bno BASED(sysc_restore)
293
294#
295# One of the work bits is on. Find out which one.
296#
297sysc_work_tif:
315 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 298 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
316 bo BASED(sysc_mcck_pending) 299 bo BASED(sysc_mcck_pending)
317 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 300 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
318 bo BASED(sysc_reschedule) 301 bo BASED(sysc_reschedule)
319 tm __TI_flags+3(%r9),_TIF_SIGPENDING 302 tm __TI_flags+3(%r9),_TIF_SIGPENDING
320 bnz BASED(sysc_sigpending) 303 bo BASED(sysc_sigpending)
321 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME 304 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
322 bnz BASED(sysc_notify_resume) 305 bo BASED(sysc_notify_resume)
323 tm __TI_flags+3(%r9),_TIF_RESTART_SVC 306 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
324 bo BASED(sysc_restart) 307 bo BASED(sysc_restart)
325 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 308 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
326 bo BASED(sysc_singlestep) 309 bo BASED(sysc_singlestep)
327 b BASED(sysc_restore) 310 b BASED(sysc_return) # beware of critical section cleanup
328sysc_work_done:
329 311
330# 312#
331# _TIF_NEED_RESCHED is set, call schedule 313# _TIF_NEED_RESCHED is set, call schedule
332# 314#
333sysc_reschedule: 315sysc_reschedule:
334 l %r1,BASED(.Lschedule) 316 l %r1,BASED(.Lschedule)
335 la %r14,BASED(sysc_work_loop) 317 la %r14,BASED(sysc_return)
336 br %r1 # call scheduler 318 br %r1 # call scheduler
337 319
338# 320#
@@ -340,7 +322,7 @@ sysc_reschedule:
340# 322#
341sysc_mcck_pending: 323sysc_mcck_pending:
342 l %r1,BASED(.Ls390_handle_mcck) 324 l %r1,BASED(.Ls390_handle_mcck)
343 la %r14,BASED(sysc_work_loop) 325 la %r14,BASED(sysc_return)
344 br %r1 # TIF bit will be cleared by handler 326 br %r1 # TIF bit will be cleared by handler
345 327
346# 328#
@@ -355,7 +337,7 @@ sysc_sigpending:
355 bo BASED(sysc_restart) 337 bo BASED(sysc_restart)
356 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 338 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
357 bo BASED(sysc_singlestep) 339 bo BASED(sysc_singlestep)
358 b BASED(sysc_work_loop) 340 b BASED(sysc_return)
359 341
360# 342#
361# _TIF_NOTIFY_RESUME is set, call do_notify_resume 343# _TIF_NOTIFY_RESUME is set, call do_notify_resume
@@ -363,7 +345,7 @@ sysc_sigpending:
363sysc_notify_resume: 345sysc_notify_resume:
364 la %r2,SP_PTREGS(%r15) # load pt_regs 346 la %r2,SP_PTREGS(%r15) # load pt_regs
365 l %r1,BASED(.Ldo_notify_resume) 347 l %r1,BASED(.Ldo_notify_resume)
366 la %r14,BASED(sysc_work_loop) 348 la %r14,BASED(sysc_return)
367 br %r1 # call do_notify_resume 349 br %r1 # call do_notify_resume
368 350
369 351
@@ -458,11 +440,13 @@ kernel_execve:
458 br %r14 440 br %r14
459 # execve succeeded. 441 # execve succeeded.
4600: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts 4420: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
443 TRACE_IRQS_OFF
461 l %r15,__LC_KERNEL_STACK # load ksp 444 l %r15,__LC_KERNEL_STACK # load ksp
462 s %r15,BASED(.Lc_spsize) # make room for registers & psw 445 s %r15,BASED(.Lc_spsize) # make room for registers & psw
463 l %r9,__LC_THREAD_INFO 446 l %r9,__LC_THREAD_INFO
464 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs 447 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
465 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) 448 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
449 TRACE_IRQS_ON
466 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 450 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
467 l %r1,BASED(.Lexecve_tail) 451 l %r1,BASED(.Lexecve_tail)
468 basr %r14,%r1 452 basr %r14,%r1
@@ -499,8 +483,8 @@ pgm_check_handler:
499 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 483 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
500 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 484 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
501pgm_no_vtime: 485pgm_no_vtime:
486 TRACE_IRQS_CHECK_OFF
502 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 487 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
503 TRACE_IRQS_OFF
504 l %r3,__LC_PGM_ILC # load program interruption code 488 l %r3,__LC_PGM_ILC # load program interruption code
505 la %r8,0x7f 489 la %r8,0x7f
506 nr %r8,%r3 490 nr %r8,%r3
@@ -509,8 +493,10 @@ pgm_do_call:
509 sll %r8,2 493 sll %r8,2
510 l %r7,0(%r8,%r7) # load address of handler routine 494 l %r7,0(%r8,%r7) # load address of handler routine
511 la %r2,SP_PTREGS(%r15) # address of register-save area 495 la %r2,SP_PTREGS(%r15) # address of register-save area
512 la %r14,BASED(sysc_return) 496 basr %r14,%r7 # branch to interrupt-handler
513 br %r7 # branch to interrupt-handler 497pgm_exit:
498 TRACE_IRQS_CHECK_ON
499 b BASED(sysc_return)
514 500
515# 501#
516# handle per exception 502# handle per exception
@@ -537,19 +523,19 @@ pgm_per_std:
537 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 523 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
538 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 524 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
539pgm_no_vtime2: 525pgm_no_vtime2:
526 TRACE_IRQS_CHECK_OFF
540 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 527 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
541 TRACE_IRQS_OFF
542 l %r1,__TI_task(%r9) 528 l %r1,__TI_task(%r9)
529 tm SP_PSW+1(%r15),0x01 # kernel per event ?
530 bz BASED(kernel_per)
543 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 531 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
544 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS 532 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
545 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 533 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
546 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 534 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
547 tm SP_PSW+1(%r15),0x01 # kernel per event ?
548 bz BASED(kernel_per)
549 l %r3,__LC_PGM_ILC # load program interruption code 535 l %r3,__LC_PGM_ILC # load program interruption code
550 la %r8,0x7f 536 la %r8,0x7f
551 nr %r8,%r3 # clear per-event-bit and ilc 537 nr %r8,%r3 # clear per-event-bit and ilc
552 be BASED(sysc_return) # only per or per+check ? 538 be BASED(pgm_exit) # only per or per+check ?
553 b BASED(pgm_do_call) 539 b BASED(pgm_do_call)
554 540
555# 541#
@@ -570,8 +556,8 @@ pgm_svcper:
570 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID 556 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
571 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 557 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
572 TRACE_IRQS_ON 558 TRACE_IRQS_ON
573 lm %r2,%r6,SP_R2(%r15) # load svc arguments
574 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 559 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
560 lm %r2,%r6,SP_R2(%r15) # load svc arguments
575 b BASED(sysc_do_svc) 561 b BASED(sysc_do_svc)
576 562
577# 563#
@@ -582,8 +568,8 @@ kernel_per:
582 mvi SP_SVCNR+1(%r15),0xff 568 mvi SP_SVCNR+1(%r15),0xff
583 la %r2,SP_PTREGS(%r15) # address of register-save area 569 la %r2,SP_PTREGS(%r15) # address of register-save area
584 l %r1,BASED(.Lhandle_per) # load adr. of per handler 570 l %r1,BASED(.Lhandle_per) # load adr. of per handler
585 la %r14,BASED(sysc_restore)# load adr. of system return 571 basr %r14,%r1 # branch to do_single_step
586 br %r1 # branch to do_single_step 572 b BASED(pgm_exit)
587 573
588/* 574/*
589 * IO interrupt handler routine 575 * IO interrupt handler routine
@@ -602,134 +588,126 @@ io_int_handler:
602 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 588 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
603 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 589 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
604io_no_vtime: 590io_no_vtime:
605 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
606 TRACE_IRQS_OFF 591 TRACE_IRQS_OFF
592 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
607 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ 593 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
608 la %r2,SP_PTREGS(%r15) # address of register-save area 594 la %r2,SP_PTREGS(%r15) # address of register-save area
609 basr %r14,%r1 # branch to standard irq handler 595 basr %r14,%r1 # branch to standard irq handler
610io_return: 596io_return:
597 LOCKDEP_SYS_EXIT
598 TRACE_IRQS_ON
599io_tif:
611 tm __TI_flags+3(%r9),_TIF_WORK_INT 600 tm __TI_flags+3(%r9),_TIF_WORK_INT
612 bnz BASED(io_work) # there is work to do (signals etc.) 601 bnz BASED(io_work) # there is work to do (signals etc.)
613io_restore: 602io_restore:
614#ifdef CONFIG_TRACE_IRQFLAGS
615 la %r1,BASED(io_restore_trace_psw_addr)
616 l %r1,0(%r1)
617 lpsw 0(%r1)
618io_restore_trace:
619 TRACE_IRQS_CHECK
620 LOCKDEP_SYS_EXIT
621#endif
622io_leave:
623 RESTORE_ALL __LC_RETURN_PSW,0 603 RESTORE_ALL __LC_RETURN_PSW,0
624io_done: 604io_done:
625 605
626#ifdef CONFIG_TRACE_IRQFLAGS
627io_restore_trace_psw_addr:
628 .long io_restore_trace_psw
629
630 .section .data,"aw",@progbits
631 .align 8
632 .globl io_restore_trace_psw
633io_restore_trace_psw:
634 .long 0, io_restore_trace + 0x80000000
635 .previous
636#endif
637
638# 606#
639# switch to kernel stack, then check the TIF bits 607# There is work todo, find out in which context we have been interrupted:
608# 1) if we return to user space we can do all _TIF_WORK_INT work
609# 2) if we return to kernel code and preemptive scheduling is enabled check
610# the preemption counter and if it is zero call preempt_schedule_irq
611# Before any work can be done, a switch to the kernel stack is required.
640# 612#
641io_work: 613io_work:
642 tm SP_PSW+1(%r15),0x01 # returning to user ? 614 tm SP_PSW+1(%r15),0x01 # returning to user ?
643#ifndef CONFIG_PREEMPT 615 bo BASED(io_work_user) # yes -> do resched & signal
644 bno BASED(io_restore) # no-> skip resched & signal 616#ifdef CONFIG_PREEMPT
645#else
646 bnz BASED(io_work_user) # no -> check for preemptive scheduling
647 # check for preemptive scheduling 617 # check for preemptive scheduling
648 icm %r0,15,__TI_precount(%r9) 618 icm %r0,15,__TI_precount(%r9)
649 bnz BASED(io_restore) # preemption disabled 619 bnz BASED(io_restore) # preemption disabled
620 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
621 bno BASED(io_restore)
622 # switch to kernel stack
650 l %r1,SP_R15(%r15) 623 l %r1,SP_R15(%r15)
651 s %r1,BASED(.Lc_spsize) 624 s %r1,BASED(.Lc_spsize)
652 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 625 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
653 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 626 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
654 lr %r15,%r1 627 lr %r15,%r1
655io_resume_loop: 628 # TRACE_IRQS_ON already done at io_return, call
656 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 629 # TRACE_IRQS_OFF to keep things symmetrical
657 bno BASED(io_restore) 630 TRACE_IRQS_OFF
658 l %r1,BASED(.Lpreempt_schedule_irq) 631 l %r1,BASED(.Lpreempt_schedule_irq)
659 la %r14,BASED(io_resume_loop) 632 basr %r14,%r1 # call preempt_schedule_irq
660 br %r1 # call schedule 633 b BASED(io_return)
634#else
635 b BASED(io_restore)
661#endif 636#endif
662 637
638#
639# Need to do work before returning to userspace, switch to kernel stack
640#
663io_work_user: 641io_work_user:
664 l %r1,__LC_KERNEL_STACK 642 l %r1,__LC_KERNEL_STACK
665 s %r1,BASED(.Lc_spsize) 643 s %r1,BASED(.Lc_spsize)
666 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 644 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
667 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 645 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
668 lr %r15,%r1 646 lr %r15,%r1
647
669# 648#
670# One of the work bits is on. Find out which one. 649# One of the work bits is on. Find out which one.
671# Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED 650# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
672# and _TIF_MCCK_PENDING 651# and _TIF_MCCK_PENDING
673# 652#
674io_work_loop: 653io_work_tif:
675 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 654 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
676 bo BASED(io_mcck_pending) 655 bo BASED(io_mcck_pending)
677 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 656 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
678 bo BASED(io_reschedule) 657 bo BASED(io_reschedule)
679 tm __TI_flags+3(%r9),_TIF_SIGPENDING 658 tm __TI_flags+3(%r9),_TIF_SIGPENDING
680 bnz BASED(io_sigpending) 659 bo BASED(io_sigpending)
681 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME 660 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
682 bnz BASED(io_notify_resume) 661 bo BASED(io_notify_resume)
683 b BASED(io_restore) 662 b BASED(io_return) # beware of critical section cleanup
684io_work_done:
685 663
686# 664#
687# _TIF_MCCK_PENDING is set, call handler 665# _TIF_MCCK_PENDING is set, call handler
688# 666#
689io_mcck_pending: 667io_mcck_pending:
668 # TRACE_IRQS_ON already done at io_return
690 l %r1,BASED(.Ls390_handle_mcck) 669 l %r1,BASED(.Ls390_handle_mcck)
691 basr %r14,%r1 # TIF bit will be cleared by handler 670 basr %r14,%r1 # TIF bit will be cleared by handler
692 b BASED(io_work_loop) 671 TRACE_IRQS_OFF
672 b BASED(io_return)
693 673
694# 674#
695# _TIF_NEED_RESCHED is set, call schedule 675# _TIF_NEED_RESCHED is set, call schedule
696# 676#
697io_reschedule: 677io_reschedule:
698 TRACE_IRQS_ON 678 # TRACE_IRQS_ON already done at io_return
699 l %r1,BASED(.Lschedule) 679 l %r1,BASED(.Lschedule)
700 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 680 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
701 basr %r14,%r1 # call scheduler 681 basr %r14,%r1 # call scheduler
702 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 682 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
703 TRACE_IRQS_OFF 683 TRACE_IRQS_OFF
704 tm __TI_flags+3(%r9),_TIF_WORK_INT 684 b BASED(io_return)
705 bz BASED(io_restore) # there is no work to do
706 b BASED(io_work_loop)
707 685
708# 686#
709# _TIF_SIGPENDING is set, call do_signal 687# _TIF_SIGPENDING is set, call do_signal
710# 688#
711io_sigpending: 689io_sigpending:
712 TRACE_IRQS_ON 690 # TRACE_IRQS_ON already done at io_return
713 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 691 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
714 la %r2,SP_PTREGS(%r15) # load pt_regs 692 la %r2,SP_PTREGS(%r15) # load pt_regs
715 l %r1,BASED(.Ldo_signal) 693 l %r1,BASED(.Ldo_signal)
716 basr %r14,%r1 # call do_signal 694 basr %r14,%r1 # call do_signal
717 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 695 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
718 TRACE_IRQS_OFF 696 TRACE_IRQS_OFF
719 b BASED(io_work_loop) 697 b BASED(io_return)
720 698
721# 699#
722# _TIF_SIGPENDING is set, call do_signal 700# _TIF_SIGPENDING is set, call do_signal
723# 701#
724io_notify_resume: 702io_notify_resume:
725 TRACE_IRQS_ON 703 # TRACE_IRQS_ON already done at io_return
726 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 704 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
727 la %r2,SP_PTREGS(%r15) # load pt_regs 705 la %r2,SP_PTREGS(%r15) # load pt_regs
728 l %r1,BASED(.Ldo_notify_resume) 706 l %r1,BASED(.Ldo_notify_resume)
729 basr %r14,%r1 # call do_signal 707 basr %r14,%r1 # call do_signal
730 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 708 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
731 TRACE_IRQS_OFF 709 TRACE_IRQS_OFF
732 b BASED(io_work_loop) 710 b BASED(io_return)
733 711
734/* 712/*
735 * External interrupt handler routine 713 * External interrupt handler routine
@@ -764,15 +742,14 @@ __critical_end:
764 742
765 .globl mcck_int_handler 743 .globl mcck_int_handler
766mcck_int_handler: 744mcck_int_handler:
767 stck __LC_INT_CLOCK 745 stck __LC_MCCK_CLOCK
768 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer 746 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
769 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs 747 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
770 SAVE_ALL_BASE __LC_SAVE_AREA+32 748 SAVE_ALL_BASE __LC_SAVE_AREA+32
771 la %r12,__LC_MCK_OLD_PSW 749 la %r12,__LC_MCK_OLD_PSW
772 tm __LC_MCCK_CODE,0x80 # system damage? 750 tm __LC_MCCK_CODE,0x80 # system damage?
773 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid 751 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
774 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER 752 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
775 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
776 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 753 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
777 bo BASED(1f) 754 bo BASED(1f)
778 la %r14,__LC_SYNC_ENTER_TIMER 755 la %r14,__LC_SYNC_ENTER_TIMER
@@ -786,7 +763,7 @@ mcck_int_handler:
786 bl BASED(0f) 763 bl BASED(0f)
787 la %r14,__LC_LAST_UPDATE_TIMER 764 la %r14,__LC_LAST_UPDATE_TIMER
7880: spt 0(%r14) 7650: spt 0(%r14)
789 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) 766 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
7901: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 7671: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
791 bno BASED(mcck_int_main) # no -> skip cleanup critical 768 bno BASED(mcck_int_main) # no -> skip cleanup critical
792 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 769 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
@@ -808,9 +785,9 @@ mcck_int_main:
808 bno BASED(mcck_no_vtime) # no -> skip cleanup critical 785 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
809 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 786 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
810 bz BASED(mcck_no_vtime) 787 bz BASED(mcck_no_vtime)
811 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 788 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
812 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 789 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
813 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 790 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
814mcck_no_vtime: 791mcck_no_vtime:
815 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 792 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
816 la %r2,SP_PTREGS(%r15) # load pt_regs 793 la %r2,SP_PTREGS(%r15) # load pt_regs
@@ -833,7 +810,6 @@ mcck_no_vtime:
833mcck_return: 810mcck_return:
834 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW 811 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
835 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 812 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
836 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
837 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 813 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
838 bno BASED(0f) 814 bno BASED(0f)
839 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 815 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
@@ -917,18 +893,14 @@ stack_overflow:
917 893
918cleanup_table_system_call: 894cleanup_table_system_call:
919 .long system_call + 0x80000000, sysc_do_svc + 0x80000000 895 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
920cleanup_table_sysc_return: 896cleanup_table_sysc_tif:
921 .long sysc_return + 0x80000000, sysc_leave + 0x80000000 897 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000
922cleanup_table_sysc_leave: 898cleanup_table_sysc_restore:
923 .long sysc_leave + 0x80000000, sysc_done + 0x80000000 899 .long sysc_restore + 0x80000000, sysc_done + 0x80000000
924cleanup_table_sysc_work_loop: 900cleanup_table_io_tif:
925 .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000 901 .long io_tif + 0x80000000, io_restore + 0x80000000
926cleanup_table_io_return: 902cleanup_table_io_restore:
927 .long io_return + 0x80000000, io_leave + 0x80000000 903 .long io_restore + 0x80000000, io_done + 0x80000000
928cleanup_table_io_leave:
929 .long io_leave + 0x80000000, io_done + 0x80000000
930cleanup_table_io_work_loop:
931 .long io_work_loop + 0x80000000, io_work_done + 0x80000000
932 904
933cleanup_critical: 905cleanup_critical:
934 clc 4(4,%r12),BASED(cleanup_table_system_call) 906 clc 4(4,%r12),BASED(cleanup_table_system_call)
@@ -936,49 +908,40 @@ cleanup_critical:
936 clc 4(4,%r12),BASED(cleanup_table_system_call+4) 908 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
937 bl BASED(cleanup_system_call) 909 bl BASED(cleanup_system_call)
9380: 9100:
939 clc 4(4,%r12),BASED(cleanup_table_sysc_return) 911 clc 4(4,%r12),BASED(cleanup_table_sysc_tif)
940 bl BASED(0f)
941 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
942 bl BASED(cleanup_sysc_return)
9430:
944 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
945 bl BASED(0f)
946 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
947 bl BASED(cleanup_sysc_leave)
9480:
949 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
950 bl BASED(0f) 912 bl BASED(0f)
951 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) 913 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4)
952 bl BASED(cleanup_sysc_return) 914 bl BASED(cleanup_sysc_tif)
9530: 9150:
954 clc 4(4,%r12),BASED(cleanup_table_io_return) 916 clc 4(4,%r12),BASED(cleanup_table_sysc_restore)
955 bl BASED(0f) 917 bl BASED(0f)
956 clc 4(4,%r12),BASED(cleanup_table_io_return+4) 918 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4)
957 bl BASED(cleanup_io_return) 919 bl BASED(cleanup_sysc_restore)
9580: 9200:
959 clc 4(4,%r12),BASED(cleanup_table_io_leave) 921 clc 4(4,%r12),BASED(cleanup_table_io_tif)
960 bl BASED(0f) 922 bl BASED(0f)
961 clc 4(4,%r12),BASED(cleanup_table_io_leave+4) 923 clc 4(4,%r12),BASED(cleanup_table_io_tif+4)
962 bl BASED(cleanup_io_leave) 924 bl BASED(cleanup_io_tif)
9630: 9250:
964 clc 4(4,%r12),BASED(cleanup_table_io_work_loop) 926 clc 4(4,%r12),BASED(cleanup_table_io_restore)
965 bl BASED(0f) 927 bl BASED(0f)
966 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) 928 clc 4(4,%r12),BASED(cleanup_table_io_restore+4)
967 bl BASED(cleanup_io_work_loop) 929 bl BASED(cleanup_io_restore)
9680: 9300:
969 br %r14 931 br %r14
970 932
971cleanup_system_call: 933cleanup_system_call:
972 mvc __LC_RETURN_PSW(8),0(%r12) 934 mvc __LC_RETURN_PSW(8),0(%r12)
973 c %r12,BASED(.Lmck_old_psw)
974 be BASED(0f)
975 la %r12,__LC_SAVE_AREA+16
976 b BASED(1f)
9770: la %r12,__LC_SAVE_AREA+32
9781:
979 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) 935 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
980 bh BASED(0f) 936 bh BASED(0f)
937 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
938 c %r12,BASED(.Lmck_old_psw)
939 be BASED(0f)
981 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 940 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9410: c %r12,BASED(.Lmck_old_psw)
942 la %r12,__LC_SAVE_AREA+32
943 be BASED(0f)
944 la %r12,__LC_SAVE_AREA+16
9820: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) 9450: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
983 bhe BASED(cleanup_vtime) 946 bhe BASED(cleanup_vtime)
984 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) 947 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
@@ -1011,61 +974,54 @@ cleanup_system_call_insn:
1011 .long sysc_stime + 0x80000000 974 .long sysc_stime + 0x80000000
1012 .long sysc_update + 0x80000000 975 .long sysc_update + 0x80000000
1013 976
1014cleanup_sysc_return: 977cleanup_sysc_tif:
1015 mvc __LC_RETURN_PSW(4),0(%r12) 978 mvc __LC_RETURN_PSW(4),0(%r12)
1016 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) 979 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
1017 la %r12,__LC_RETURN_PSW 980 la %r12,__LC_RETURN_PSW
1018 br %r14 981 br %r14
1019 982
1020cleanup_sysc_leave: 983cleanup_sysc_restore:
1021 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) 984 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn)
1022 be BASED(2f) 985 be BASED(2f)
986 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
987 c %r12,BASED(.Lmck_old_psw)
988 be BASED(0f)
1023 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 989 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1024 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) 9900: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4)
1025 be BASED(2f) 991 be BASED(2f)
1026 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 992 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1027 c %r12,BASED(.Lmck_old_psw) 993 c %r12,BASED(.Lmck_old_psw)
1028 bne BASED(0f) 994 la %r12,__LC_SAVE_AREA+32
1029 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 995 be BASED(1f)
1030 b BASED(1f) 996 la %r12,__LC_SAVE_AREA+16
10310: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) 9971: mvc 0(16,%r12),SP_R12(%r15)
10321: lm %r0,%r11,SP_R0(%r15) 998 lm %r0,%r11,SP_R0(%r15)
1033 l %r15,SP_R15(%r15) 999 l %r15,SP_R15(%r15)
10342: la %r12,__LC_RETURN_PSW 10002: la %r12,__LC_RETURN_PSW
1035 br %r14 1001 br %r14
1036cleanup_sysc_leave_insn: 1002cleanup_sysc_restore_insn:
1037 .long sysc_done - 4 + 0x80000000 1003 .long sysc_done - 4 + 0x80000000
1038 .long sysc_done - 8 + 0x80000000 1004 .long sysc_done - 8 + 0x80000000
1039 1005
1040cleanup_io_return: 1006cleanup_io_tif:
1041 mvc __LC_RETURN_PSW(4),0(%r12) 1007 mvc __LC_RETURN_PSW(4),0(%r12)
1042 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_return) 1008 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
1043 la %r12,__LC_RETURN_PSW 1009 la %r12,__LC_RETURN_PSW
1044 br %r14 1010 br %r14
1045 1011
1046cleanup_io_work_loop: 1012cleanup_io_restore:
1047 mvc __LC_RETURN_PSW(4),0(%r12) 1013 clc 4(4,%r12),BASED(cleanup_io_restore_insn)
1048 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) 1014 be BASED(1f)
1049 la %r12,__LC_RETURN_PSW 1015 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1050 br %r14 1016 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4)
1051 1017 be BASED(1f)
1052cleanup_io_leave:
1053 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1054 be BASED(2f)
1055 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1056 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1057 be BASED(2f)
1058 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 1018 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1059 c %r12,BASED(.Lmck_old_psw)
1060 bne BASED(0f)
1061 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 1019 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1062 b BASED(1f) 1020 lm %r0,%r11,SP_R0(%r15)
10630: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
10641: lm %r0,%r11,SP_R0(%r15)
1065 l %r15,SP_R15(%r15) 1021 l %r15,SP_R15(%r15)
10662: la %r12,__LC_RETURN_PSW 10221: la %r12,__LC_RETURN_PSW
1067 br %r14 1023 br %r14
1068cleanup_io_leave_insn: 1024cleanup_io_restore_insn:
1069 .long io_done - 4 + 0x80000000 1025 .long io_done - 4 + 0x80000000
1070 .long io_done - 8 + 0x80000000 1026 .long io_done - 8 + 0x80000000
1071 1027
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 52106d53271c..178d92536d90 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -2,7 +2,7 @@
2 * arch/s390/kernel/entry64.S 2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points. 3 * S390 low-level entry points.
4 * 4 *
5 * Copyright (C) IBM Corp. 1999,2006 5 * Copyright (C) IBM Corp. 1999,2010
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com), 7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
@@ -59,30 +59,45 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
59 59
60#define BASED(name) name-system_call(%r13) 60#define BASED(name) name-system_call(%r13)
61 61
62 .macro HANDLE_SIE_INTERCEPT
63#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
64 lg %r3,__LC_SIE_HOOK
65 ltgr %r3,%r3
66 jz 0f
67 basr %r14,%r3
68 0:
69#endif
70 .endm
71
62#ifdef CONFIG_TRACE_IRQFLAGS 72#ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON 73 .macro TRACE_IRQS_ON
64 basr %r2,%r0 74 basr %r2,%r0
65 brasl %r14,trace_hardirqs_on_caller 75 brasl %r14,trace_hardirqs_on_caller
66 .endm 76 .endm
67 77
68 .macro TRACE_IRQS_OFF 78 .macro TRACE_IRQS_OFF
69 basr %r2,%r0 79 basr %r2,%r0
70 brasl %r14,trace_hardirqs_off_caller 80 brasl %r14,trace_hardirqs_off_caller
71 .endm 81 .endm
72 82
73 .macro TRACE_IRQS_CHECK 83 .macro TRACE_IRQS_CHECK_ON
74 basr %r2,%r0
75 tm SP_PSW(%r15),0x03 # irqs enabled? 84 tm SP_PSW(%r15),0x03 # irqs enabled?
76 jz 0f 85 jz 0f
77 brasl %r14,trace_hardirqs_on_caller 86 TRACE_IRQS_ON
78 j 1f 870:
790: brasl %r14,trace_hardirqs_off_caller 88 .endm
801: 89
90 .macro TRACE_IRQS_CHECK_OFF
91 tm SP_PSW(%r15),0x03 # irqs enabled?
92 jz 0f
93 TRACE_IRQS_OFF
940:
81 .endm 95 .endm
82#else 96#else
83#define TRACE_IRQS_ON 97#define TRACE_IRQS_ON
84#define TRACE_IRQS_OFF 98#define TRACE_IRQS_OFF
85#define TRACE_IRQS_CHECK 99#define TRACE_IRQS_CHECK_ON
100#define TRACE_IRQS_CHECK_OFF
86#endif 101#endif
87 102
88#ifdef CONFIG_LOCKDEP 103#ifdef CONFIG_LOCKDEP
@@ -111,31 +126,35 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
111 * R15 - kernel stack pointer 126 * R15 - kernel stack pointer
112 */ 127 */
113 128
114 .macro SAVE_ALL_BASE savearea
115 stmg %r12,%r15,\savearea
116 larl %r13,system_call
117 .endm
118
119 .macro SAVE_ALL_SVC psworg,savearea 129 .macro SAVE_ALL_SVC psworg,savearea
120 la %r12,\psworg 130 stmg %r11,%r15,\savearea
121 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp 131 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
132 aghi %r15,-SP_SIZE # make room for registers & psw
133 lg %r11,__LC_LAST_BREAK
122 .endm 134 .endm
123 135
124 .macro SAVE_ALL_SYNC psworg,savearea 136 .macro SAVE_ALL_PGM psworg,savearea
125 la %r12,\psworg 137 stmg %r11,%r15,\savearea
126 tm \psworg+1,0x01 # test problem state bit 138 tm \psworg+1,0x01 # test problem state bit
127 jz 2f # skip stack setup save
128 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
129#ifdef CONFIG_CHECK_STACK 139#ifdef CONFIG_CHECK_STACK
130 j 3f 140 jnz 1f
1312: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 141 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
132 jz stack_overflow 142 jnz 2f
1333: 143 la %r12,\psworg
144 j stack_overflow
145#else
146 jz 2f
134#endif 147#endif
1352: 1481: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
1492: aghi %r15,-SP_SIZE # make room for registers & psw
150 larl %r13,system_call
151 lg %r11,__LC_LAST_BREAK
136 .endm 152 .endm
137 153
138 .macro SAVE_ALL_ASYNC psworg,savearea 154 .macro SAVE_ALL_ASYNC psworg,savearea
155 stmg %r11,%r15,\savearea
156 larl %r13,system_call
157 lg %r11,__LC_LAST_BREAK
139 la %r12,\psworg 158 la %r12,\psworg
140 tm \psworg+1,0x01 # test problem state bit 159 tm \psworg+1,0x01 # test problem state bit
141 jnz 1f # from user -> load kernel stack 160 jnz 1f # from user -> load kernel stack
@@ -149,27 +168,23 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
1490: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? 1680: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
150 slgr %r14,%r15 169 slgr %r14,%r15
151 srag %r14,%r14,STACK_SHIFT 170 srag %r14,%r14,STACK_SHIFT
152 jz 2f
1531: lg %r15,__LC_ASYNC_STACK # load async stack
154#ifdef CONFIG_CHECK_STACK 171#ifdef CONFIG_CHECK_STACK
155 j 3f 172 jnz 1f
1562: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 173 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
157 jz stack_overflow 174 jnz 2f
1583: 175 j stack_overflow
176#else
177 jz 2f
159#endif 178#endif
1602: 1791: lg %r15,__LC_ASYNC_STACK # load async stack
1802: aghi %r15,-SP_SIZE # make room for registers & psw
161 .endm 181 .endm
162 182
163 .macro CREATE_STACK_FRAME psworg,savearea 183 .macro CREATE_STACK_FRAME savearea
164 aghi %r15,-SP_SIZE # make room for registers & psw 184 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
165 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
166 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 185 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
167 icm %r12,3,__LC_SVC_ILC 186 mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack
168 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 187 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
169 st %r12,SP_SVCNR(%r15)
170 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
171 la %r12,0
172 stg %r12,__SF_BACKCHAIN(%r15)
173 .endm 188 .endm
174 189
175 .macro RESTORE_ALL psworg,sync 190 .macro RESTORE_ALL psworg,sync
@@ -185,6 +200,13 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
185 lpswe \psworg # back to caller 200 lpswe \psworg # back to caller
186 .endm 201 .endm
187 202
203 .macro LAST_BREAK
204 srag %r10,%r11,23
205 jz 0f
206 stg %r11,__TI_last_break(%r12)
2070:
208 .endm
209
188/* 210/*
189 * Scheduler resume function, called by switch_to 211 * Scheduler resume function, called by switch_to
190 * gpr2 = (task_struct *) prev 212 * gpr2 = (task_struct *) prev
@@ -230,143 +252,129 @@ __critical_start:
230system_call: 252system_call:
231 stpt __LC_SYNC_ENTER_TIMER 253 stpt __LC_SYNC_ENTER_TIMER
232sysc_saveall: 254sysc_saveall:
233 SAVE_ALL_BASE __LC_SAVE_AREA
234 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 255 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
235 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 256 CREATE_STACK_FRAME __LC_SAVE_AREA
236 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore 257 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
258 mvc SP_ILC(4,%r15),__LC_SVC_ILC
259 stg %r7,SP_ARGS(%r15)
260 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
237sysc_vtime: 261sysc_vtime:
238 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 262 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
239sysc_stime: 263sysc_stime:
240 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 264 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
241sysc_update: 265sysc_update:
242 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 266 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
267 LAST_BREAK
243sysc_do_svc: 268sysc_do_svc:
244 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 269 llgh %r7,SP_SVCNR(%r15)
245 ltgr %r7,%r7 # test for svc 0 270 slag %r7,%r7,2 # shift and test for svc 0
246 jnz sysc_nr_ok 271 jnz sysc_nr_ok
247 # svc 0: system call number in %r1 272 # svc 0: system call number in %r1
248 cl %r1,BASED(.Lnr_syscalls) 273 llgfr %r1,%r1 # clear high word in r1
274 cghi %r1,NR_syscalls
249 jnl sysc_nr_ok 275 jnl sysc_nr_ok
250 lgfr %r7,%r1 # clear high word in r1 276 sth %r1,SP_SVCNR(%r15)
277 slag %r7,%r1,2 # shift and test for svc 0
251sysc_nr_ok: 278sysc_nr_ok:
252 mvc SP_ARGS(8,%r15),SP_R7(%r15)
253sysc_do_restart:
254 sth %r7,SP_SVCNR(%r15)
255 sllg %r7,%r7,2 # svc number * 4
256 larl %r10,sys_call_table 279 larl %r10,sys_call_table
257#ifdef CONFIG_COMPAT 280#ifdef CONFIG_COMPAT
258 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ? 281 tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ?
259 jno sysc_noemu 282 jno sysc_noemu
260 larl %r10,sys_call_table_emu # use 31 bit emulation system calls 283 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
261sysc_noemu: 284sysc_noemu:
262#endif 285#endif
263 tm __TI_flags+6(%r9),_TIF_SYSCALL 286 tm __TI_flags+6(%r12),_TIF_SYSCALL
264 lgf %r8,0(%r7,%r10) # load address of system call routine 287 lgf %r8,0(%r7,%r10) # load address of system call routine
265 jnz sysc_tracesys 288 jnz sysc_tracesys
266 basr %r14,%r8 # call sys_xxxx 289 basr %r14,%r8 # call sys_xxxx
267 stg %r2,SP_R2(%r15) # store return value (change R2 on stack) 290 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
268 291
269sysc_return: 292sysc_return:
270 tm __TI_flags+7(%r9),_TIF_WORK_SVC 293 LOCKDEP_SYS_EXIT
294sysc_tif:
295 tm __TI_flags+7(%r12),_TIF_WORK_SVC
271 jnz sysc_work # there is work to do (signals etc.) 296 jnz sysc_work # there is work to do (signals etc.)
272sysc_restore: 297sysc_restore:
273#ifdef CONFIG_TRACE_IRQFLAGS
274 larl %r1,sysc_restore_trace_psw
275 lpswe 0(%r1)
276sysc_restore_trace:
277 TRACE_IRQS_CHECK
278 LOCKDEP_SYS_EXIT
279#endif
280sysc_leave:
281 RESTORE_ALL __LC_RETURN_PSW,1 298 RESTORE_ALL __LC_RETURN_PSW,1
282sysc_done: 299sysc_done:
283 300
284#ifdef CONFIG_TRACE_IRQFLAGS
285 .section .data,"aw",@progbits
286 .align 8
287 .globl sysc_restore_trace_psw
288sysc_restore_trace_psw:
289 .quad 0, sysc_restore_trace
290 .previous
291#endif
292
293#
294# recheck if there is more work to do
295# 301#
296sysc_work_loop: 302# There is work to do, but first we need to check if we return to userspace.
297 tm __TI_flags+7(%r9),_TIF_WORK_SVC
298 jz sysc_restore # there is no work to do
299#
300# One of the work bits is on. Find out which one.
301# 303#
302sysc_work: 304sysc_work:
303 tm SP_PSW+1(%r15),0x01 # returning to user ? 305 tm SP_PSW+1(%r15),0x01 # returning to user ?
304 jno sysc_restore 306 jno sysc_restore
305 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 307
308#
309# One of the work bits is on. Find out which one.
310#
311sysc_work_tif:
312 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
306 jo sysc_mcck_pending 313 jo sysc_mcck_pending
307 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED 314 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
308 jo sysc_reschedule 315 jo sysc_reschedule
309 tm __TI_flags+7(%r9),_TIF_SIGPENDING 316 tm __TI_flags+7(%r12),_TIF_SIGPENDING
310 jnz sysc_sigpending 317 jo sysc_sigpending
311 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME 318 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
312 jnz sysc_notify_resume 319 jo sysc_notify_resume
313 tm __TI_flags+7(%r9),_TIF_RESTART_SVC 320 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
314 jo sysc_restart 321 jo sysc_restart
315 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP 322 tm __TI_flags+7(%r12),_TIF_SINGLE_STEP
316 jo sysc_singlestep 323 jo sysc_singlestep
317 j sysc_restore 324 j sysc_return # beware of critical section cleanup
318sysc_work_done:
319 325
320# 326#
321# _TIF_NEED_RESCHED is set, call schedule 327# _TIF_NEED_RESCHED is set, call schedule
322# 328#
323sysc_reschedule: 329sysc_reschedule:
324 larl %r14,sysc_work_loop 330 larl %r14,sysc_return
325 jg schedule # return point is sysc_return 331 jg schedule # return point is sysc_return
326 332
327# 333#
328# _TIF_MCCK_PENDING is set, call handler 334# _TIF_MCCK_PENDING is set, call handler
329# 335#
330sysc_mcck_pending: 336sysc_mcck_pending:
331 larl %r14,sysc_work_loop 337 larl %r14,sysc_return
332 jg s390_handle_mcck # TIF bit will be cleared by handler 338 jg s390_handle_mcck # TIF bit will be cleared by handler
333 339
334# 340#
335# _TIF_SIGPENDING is set, call do_signal 341# _TIF_SIGPENDING is set, call do_signal
336# 342#
337sysc_sigpending: 343sysc_sigpending:
338 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 344 ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
339 la %r2,SP_PTREGS(%r15) # load pt_regs 345 la %r2,SP_PTREGS(%r15) # load pt_regs
340 brasl %r14,do_signal # call do_signal 346 brasl %r14,do_signal # call do_signal
341 tm __TI_flags+7(%r9),_TIF_RESTART_SVC 347 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
342 jo sysc_restart 348 jo sysc_restart
343 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP 349 tm __TI_flags+7(%r12),_TIF_SINGLE_STEP
344 jo sysc_singlestep 350 jo sysc_singlestep
345 j sysc_work_loop 351 j sysc_return
346 352
347# 353#
348# _TIF_NOTIFY_RESUME is set, call do_notify_resume 354# _TIF_NOTIFY_RESUME is set, call do_notify_resume
349# 355#
350sysc_notify_resume: 356sysc_notify_resume:
351 la %r2,SP_PTREGS(%r15) # load pt_regs 357 la %r2,SP_PTREGS(%r15) # load pt_regs
352 larl %r14,sysc_work_loop 358 larl %r14,sysc_return
353 jg do_notify_resume # call do_notify_resume 359 jg do_notify_resume # call do_notify_resume
354 360
355# 361#
356# _TIF_RESTART_SVC is set, set up registers and restart svc 362# _TIF_RESTART_SVC is set, set up registers and restart svc
357# 363#
358sysc_restart: 364sysc_restart:
359 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC 365 ni __TI_flags+7(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
360 lg %r7,SP_R2(%r15) # load new svc number 366 lg %r7,SP_R2(%r15) # load new svc number
361 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument 367 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
362 lmg %r2,%r6,SP_R2(%r15) # load svc arguments 368 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
363 j sysc_do_restart # restart svc 369 sth %r7,SP_SVCNR(%r15)
370 slag %r7,%r7,2
371 j sysc_nr_ok # restart svc
364 372
365# 373#
366# _TIF_SINGLE_STEP is set, call do_single_step 374# _TIF_SINGLE_STEP is set, call do_single_step
367# 375#
368sysc_singlestep: 376sysc_singlestep:
369 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 377 ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
370 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number 378 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
371 la %r2,SP_PTREGS(%r15) # address of register-save area 379 la %r2,SP_PTREGS(%r15) # address of register-save area
372 larl %r14,sysc_return # load adr. of system return 380 larl %r14,sysc_return # load adr. of system return
@@ -379,8 +387,8 @@ sysc_singlestep:
379sysc_tracesys: 387sysc_tracesys:
380 la %r2,SP_PTREGS(%r15) # load pt_regs 388 la %r2,SP_PTREGS(%r15) # load pt_regs
381 la %r3,0 389 la %r3,0
382 srl %r7,2 390 llgh %r0,SP_SVCNR(%r15)
383 stg %r7,SP_R2(%r15) 391 stg %r0,SP_R2(%r15)
384 brasl %r14,do_syscall_trace_enter 392 brasl %r14,do_syscall_trace_enter
385 lghi %r0,NR_syscalls 393 lghi %r0,NR_syscalls
386 clgr %r0,%r2 394 clgr %r0,%r2
@@ -393,7 +401,7 @@ sysc_tracego:
393 basr %r14,%r8 # call sys_xxx 401 basr %r14,%r8 # call sys_xxx
394 stg %r2,SP_R2(%r15) # store return value 402 stg %r2,SP_R2(%r15) # store return value
395sysc_tracenogo: 403sysc_tracenogo:
396 tm __TI_flags+6(%r9),_TIF_SYSCALL 404 tm __TI_flags+6(%r12),_TIF_SYSCALL
397 jz sysc_return 405 jz sysc_return
398 la %r2,SP_PTREGS(%r15) # load pt_regs 406 la %r2,SP_PTREGS(%r15) # load pt_regs
399 larl %r14,sysc_return # return point is sysc_return 407 larl %r14,sysc_return # return point is sysc_return
@@ -405,7 +413,7 @@ sysc_tracenogo:
405 .globl ret_from_fork 413 .globl ret_from_fork
406ret_from_fork: 414ret_from_fork:
407 lg %r13,__LC_SVC_NEW_PSW+8 415 lg %r13,__LC_SVC_NEW_PSW+8
408 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 416 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
409 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? 417 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
410 jo 0f 418 jo 0f
411 stg %r15,SP_R15(%r15) # store stack pointer for new kthread 419 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
@@ -435,12 +443,14 @@ kernel_execve:
435 br %r14 443 br %r14
436 # execve succeeded. 444 # execve succeeded.
4370: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts 4450: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
446# TRACE_IRQS_OFF
438 lg %r15,__LC_KERNEL_STACK # load ksp 447 lg %r15,__LC_KERNEL_STACK # load ksp
439 aghi %r15,-SP_SIZE # make room for registers & psw 448 aghi %r15,-SP_SIZE # make room for registers & psw
440 lg %r13,__LC_SVC_NEW_PSW+8 449 lg %r13,__LC_SVC_NEW_PSW+8
441 lg %r9,__LC_THREAD_INFO
442 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs 450 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
451 lg %r12,__LC_THREAD_INFO
443 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 452 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
453# TRACE_IRQS_ON
444 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 454 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
445 brasl %r14,execve_tail 455 brasl %r14,execve_tail
446 j sysc_return 456 j sysc_return
@@ -465,20 +475,23 @@ pgm_check_handler:
465 * for LPSW?). 475 * for LPSW?).
466 */ 476 */
467 stpt __LC_SYNC_ENTER_TIMER 477 stpt __LC_SYNC_ENTER_TIMER
468 SAVE_ALL_BASE __LC_SAVE_AREA
469 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 478 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
470 jnz pgm_per # got per exception -> special case 479 jnz pgm_per # got per exception -> special case
471 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 480 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
472 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 481 CREATE_STACK_FRAME __LC_SAVE_AREA
482 xc SP_ILC(4,%r15),SP_ILC(%r15)
483 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
484 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
473 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 485 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
474 jz pgm_no_vtime 486 jz pgm_no_vtime
475 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 487 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
476 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 488 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
477 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 489 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
490 LAST_BREAK
478pgm_no_vtime: 491pgm_no_vtime:
479 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 492 HANDLE_SIE_INTERCEPT
480 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK 493 TRACE_IRQS_CHECK_OFF
481 TRACE_IRQS_OFF 494 stg %r11,SP_ARGS(%r15)
482 lgf %r3,__LC_PGM_ILC # load program interruption code 495 lgf %r3,__LC_PGM_ILC # load program interruption code
483 lghi %r8,0x7f 496 lghi %r8,0x7f
484 ngr %r8,%r3 497 ngr %r8,%r3
@@ -487,8 +500,10 @@ pgm_do_call:
487 larl %r1,pgm_check_table 500 larl %r1,pgm_check_table
488 lg %r1,0(%r8,%r1) # load address of handler routine 501 lg %r1,0(%r8,%r1) # load address of handler routine
489 la %r2,SP_PTREGS(%r15) # address of register-save area 502 la %r2,SP_PTREGS(%r15) # address of register-save area
490 larl %r14,sysc_return 503 basr %r14,%r1 # branch to interrupt-handler
491 br %r1 # branch to interrupt-handler 504pgm_exit:
505 TRACE_IRQS_CHECK_ON
506 j sysc_return
492 507
493# 508#
494# handle per exception 509# handle per exception
@@ -500,55 +515,60 @@ pgm_per:
500 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW 515 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
501 je pgm_svcper 516 je pgm_svcper
502# no interesting special case, ignore PER event 517# no interesting special case, ignore PER event
503 lmg %r12,%r15,__LC_SAVE_AREA
504 lpswe __LC_PGM_OLD_PSW 518 lpswe __LC_PGM_OLD_PSW
505 519
506# 520#
507# Normal per exception 521# Normal per exception
508# 522#
509pgm_per_std: 523pgm_per_std:
510 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 524 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
511 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 525 CREATE_STACK_FRAME __LC_SAVE_AREA
526 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
527 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
512 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 528 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
513 jz pgm_no_vtime2 529 jz pgm_no_vtime2
514 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 530 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
515 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 531 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
516 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 532 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
533 LAST_BREAK
517pgm_no_vtime2: 534pgm_no_vtime2:
518 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 535 HANDLE_SIE_INTERCEPT
519 TRACE_IRQS_OFF 536 TRACE_IRQS_CHECK_OFF
520 lg %r1,__TI_task(%r9) 537 lg %r1,__TI_task(%r12)
521 tm SP_PSW+1(%r15),0x01 # kernel per event ? 538 tm SP_PSW+1(%r15),0x01 # kernel per event ?
522 jz kernel_per 539 jz kernel_per
523 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 540 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
524 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS 541 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
525 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 542 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
526 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 543 oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
527 lgf %r3,__LC_PGM_ILC # load program interruption code 544 lgf %r3,__LC_PGM_ILC # load program interruption code
528 lghi %r8,0x7f 545 lghi %r8,0x7f
529 ngr %r8,%r3 # clear per-event-bit and ilc 546 ngr %r8,%r3 # clear per-event-bit and ilc
530 je sysc_return 547 je pgm_exit
531 j pgm_do_call 548 j pgm_do_call
532 549
533# 550#
534# it was a single stepped SVC that is causing all the trouble 551# it was a single stepped SVC that is causing all the trouble
535# 552#
536pgm_svcper: 553pgm_svcper:
537 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 554 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
538 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 555 CREATE_STACK_FRAME __LC_SAVE_AREA
556 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
557 mvc SP_ILC(4,%r15),__LC_SVC_ILC
558 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
539 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 559 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
540 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 560 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
541 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 561 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
542 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore 562 LAST_BREAK
543 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 563 TRACE_IRQS_OFF
544 lg %r8,__TI_task(%r9) 564 lg %r8,__TI_task(%r12)
545 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID 565 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
546 mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS 566 mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS
547 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID 567 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
548 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 568 oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
549 TRACE_IRQS_ON 569 TRACE_IRQS_ON
550 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
551 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 570 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
571 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
552 j sysc_do_svc 572 j sysc_do_svc
553 573
554# 574#
@@ -557,8 +577,8 @@ pgm_svcper:
557kernel_per: 577kernel_per:
558 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number 578 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
559 la %r2,SP_PTREGS(%r15) # address of register-save area 579 la %r2,SP_PTREGS(%r15) # address of register-save area
560 larl %r14,sysc_restore # load adr. of system ret, no work 580 brasl %r14,do_single_step
561 jg do_single_step # branch to do_single_step 581 j pgm_exit
562 582
563/* 583/*
564 * IO interrupt handler routine 584 * IO interrupt handler routine
@@ -567,162 +587,133 @@ kernel_per:
567io_int_handler: 587io_int_handler:
568 stck __LC_INT_CLOCK 588 stck __LC_INT_CLOCK
569 stpt __LC_ASYNC_ENTER_TIMER 589 stpt __LC_ASYNC_ENTER_TIMER
570 SAVE_ALL_BASE __LC_SAVE_AREA+32 590 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40
571 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 591 CREATE_STACK_FRAME __LC_SAVE_AREA+40
572 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 592 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
593 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
573 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 594 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
574 jz io_no_vtime 595 jz io_no_vtime
575 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 596 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
576 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 597 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
577 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 598 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
599 LAST_BREAK
578io_no_vtime: 600io_no_vtime:
579 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 601 HANDLE_SIE_INTERCEPT
580 TRACE_IRQS_OFF 602 TRACE_IRQS_OFF
581 la %r2,SP_PTREGS(%r15) # address of register-save area 603 la %r2,SP_PTREGS(%r15) # address of register-save area
582 brasl %r14,do_IRQ # call standard irq handler 604 brasl %r14,do_IRQ # call standard irq handler
583io_return: 605io_return:
584 tm __TI_flags+7(%r9),_TIF_WORK_INT 606 LOCKDEP_SYS_EXIT
607 TRACE_IRQS_ON
608io_tif:
609 tm __TI_flags+7(%r12),_TIF_WORK_INT
585 jnz io_work # there is work to do (signals etc.) 610 jnz io_work # there is work to do (signals etc.)
586io_restore: 611io_restore:
587#ifdef CONFIG_TRACE_IRQFLAGS
588 larl %r1,io_restore_trace_psw
589 lpswe 0(%r1)
590io_restore_trace:
591 TRACE_IRQS_CHECK
592 LOCKDEP_SYS_EXIT
593#endif
594io_leave:
595 RESTORE_ALL __LC_RETURN_PSW,0 612 RESTORE_ALL __LC_RETURN_PSW,0
596io_done: 613io_done:
597 614
598#ifdef CONFIG_TRACE_IRQFLAGS
599 .section .data,"aw",@progbits
600 .align 8
601 .globl io_restore_trace_psw
602io_restore_trace_psw:
603 .quad 0, io_restore_trace
604 .previous
605#endif
606
607# 615#
608# There is work todo, we need to check if we return to userspace, then 616# There is work todo, find out in which context we have been interrupted:
609# check, if we are in SIE, if yes leave it 617# 1) if we return to user space we can do all _TIF_WORK_INT work
618# 2) if we return to kernel code and kvm is enabled check if we need to
619# modify the psw to leave SIE
620# 3) if we return to kernel code and preemptive scheduling is enabled check
621# the preemption counter and if it is zero call preempt_schedule_irq
622# Before any work can be done, a switch to the kernel stack is required.
610# 623#
611io_work: 624io_work:
612 tm SP_PSW+1(%r15),0x01 # returning to user ? 625 tm SP_PSW+1(%r15),0x01 # returning to user ?
613#ifndef CONFIG_PREEMPT 626 jo io_work_user # yes -> do resched & signal
614#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) 627#ifdef CONFIG_PREEMPT
615 jnz io_work_user # yes -> no need to check for SIE
616 la %r1, BASED(sie_opcode) # we return to kernel here
617 lg %r2, SP_PSW+8(%r15)
618 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
619 jne io_restore # no-> return to kernel
620 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
621 aghi %r1, 4
622 stg %r1, SP_PSW+8(%r15)
623 j io_restore # return to kernel
624#else
625 jno io_restore # no-> skip resched & signal
626#endif
627#else
628 jnz io_work_user # yes -> do resched & signal
629#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
630 la %r1, BASED(sie_opcode)
631 lg %r2, SP_PSW+8(%r15)
632 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
633 jne 0f # no -> leave PSW alone
634 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
635 aghi %r1, 4
636 stg %r1, SP_PSW+8(%r15)
6370:
638#endif
639 # check for preemptive scheduling 628 # check for preemptive scheduling
640 icm %r0,15,__TI_precount(%r9) 629 icm %r0,15,__TI_precount(%r12)
641 jnz io_restore # preemption is disabled 630 jnz io_restore # preemption is disabled
631 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
632 jno io_restore
642 # switch to kernel stack 633 # switch to kernel stack
643 lg %r1,SP_R15(%r15) 634 lg %r1,SP_R15(%r15)
644 aghi %r1,-SP_SIZE 635 aghi %r1,-SP_SIZE
645 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 636 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
646 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 637 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
647 lgr %r15,%r1 638 lgr %r15,%r1
648io_resume_loop: 639 # TRACE_IRQS_ON already done at io_return, call
649 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED 640 # TRACE_IRQS_OFF to keep things symmetrical
650 jno io_restore 641 TRACE_IRQS_OFF
651 larl %r14,io_resume_loop 642 brasl %r14,preempt_schedule_irq
652 jg preempt_schedule_irq 643 j io_return
644#else
645 j io_restore
653#endif 646#endif
654 647
648#
649# Need to do work before returning to userspace, switch to kernel stack
650#
655io_work_user: 651io_work_user:
656 lg %r1,__LC_KERNEL_STACK 652 lg %r1,__LC_KERNEL_STACK
657 aghi %r1,-SP_SIZE 653 aghi %r1,-SP_SIZE
658 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 654 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
659 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 655 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
660 lgr %r15,%r1 656 lgr %r15,%r1
657
661# 658#
662# One of the work bits is on. Find out which one. 659# One of the work bits is on. Find out which one.
663# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED 660# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
664# and _TIF_MCCK_PENDING 661# and _TIF_MCCK_PENDING
665# 662#
666io_work_loop: 663io_work_tif:
667 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 664 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
668 jo io_mcck_pending 665 jo io_mcck_pending
669 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED 666 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
670 jo io_reschedule 667 jo io_reschedule
671 tm __TI_flags+7(%r9),_TIF_SIGPENDING 668 tm __TI_flags+7(%r12),_TIF_SIGPENDING
672 jnz io_sigpending 669 jo io_sigpending
673 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME 670 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
674 jnz io_notify_resume 671 jo io_notify_resume
675 j io_restore 672 j io_return # beware of critical section cleanup
676io_work_done:
677
678#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
679sie_opcode:
680 .long 0xb2140000
681#endif
682 673
683# 674#
684# _TIF_MCCK_PENDING is set, call handler 675# _TIF_MCCK_PENDING is set, call handler
685# 676#
686io_mcck_pending: 677io_mcck_pending:
678 # TRACE_IRQS_ON already done at io_return
687 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler 679 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
688 j io_work_loop 680 TRACE_IRQS_OFF
681 j io_return
689 682
690# 683#
691# _TIF_NEED_RESCHED is set, call schedule 684# _TIF_NEED_RESCHED is set, call schedule
692# 685#
693io_reschedule: 686io_reschedule:
694 TRACE_IRQS_ON 687 # TRACE_IRQS_ON already done at io_return
695 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 688 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
696 brasl %r14,schedule # call scheduler 689 brasl %r14,schedule # call scheduler
697 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 690 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
698 TRACE_IRQS_OFF 691 TRACE_IRQS_OFF
699 tm __TI_flags+7(%r9),_TIF_WORK_INT 692 j io_return
700 jz io_restore # there is no work to do
701 j io_work_loop
702 693
703# 694#
704# _TIF_SIGPENDING or is set, call do_signal 695# _TIF_SIGPENDING or is set, call do_signal
705# 696#
706io_sigpending: 697io_sigpending:
707 TRACE_IRQS_ON 698 # TRACE_IRQS_ON already done at io_return
708 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 699 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
709 la %r2,SP_PTREGS(%r15) # load pt_regs 700 la %r2,SP_PTREGS(%r15) # load pt_regs
710 brasl %r14,do_signal # call do_signal 701 brasl %r14,do_signal # call do_signal
711 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 702 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
712 TRACE_IRQS_OFF 703 TRACE_IRQS_OFF
713 j io_work_loop 704 j io_return
714 705
715# 706#
716# _TIF_NOTIFY_RESUME or is set, call do_notify_resume 707# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
717# 708#
718io_notify_resume: 709io_notify_resume:
719 TRACE_IRQS_ON 710 # TRACE_IRQS_ON already done at io_return
720 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 711 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
721 la %r2,SP_PTREGS(%r15) # load pt_regs 712 la %r2,SP_PTREGS(%r15) # load pt_regs
722 brasl %r14,do_notify_resume # call do_notify_resume 713 brasl %r14,do_notify_resume # call do_notify_resume
723 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 714 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
724 TRACE_IRQS_OFF 715 TRACE_IRQS_OFF
725 j io_work_loop 716 j io_return
726 717
727/* 718/*
728 * External interrupt handler routine 719 * External interrupt handler routine
@@ -731,16 +722,18 @@ io_notify_resume:
731ext_int_handler: 722ext_int_handler:
732 stck __LC_INT_CLOCK 723 stck __LC_INT_CLOCK
733 stpt __LC_ASYNC_ENTER_TIMER 724 stpt __LC_ASYNC_ENTER_TIMER
734 SAVE_ALL_BASE __LC_SAVE_AREA+32 725 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40
735 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 726 CREATE_STACK_FRAME __LC_SAVE_AREA+40
736 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 727 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
728 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
737 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 729 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
738 jz ext_no_vtime 730 jz ext_no_vtime
739 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 731 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
740 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 732 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
741 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 733 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
734 LAST_BREAK
742ext_no_vtime: 735ext_no_vtime:
743 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 736 HANDLE_SIE_INTERCEPT
744 TRACE_IRQS_OFF 737 TRACE_IRQS_OFF
745 la %r2,SP_PTREGS(%r15) # address of register-save area 738 la %r2,SP_PTREGS(%r15) # address of register-save area
746 llgh %r3,__LC_EXT_INT_CODE # get interruption code 739 llgh %r3,__LC_EXT_INT_CODE # get interruption code
@@ -754,17 +747,18 @@ __critical_end:
754 */ 747 */
755 .globl mcck_int_handler 748 .globl mcck_int_handler
756mcck_int_handler: 749mcck_int_handler:
757 stck __LC_INT_CLOCK 750 stck __LC_MCCK_CLOCK
758 la %r1,4095 # revalidate r1 751 la %r1,4095 # revalidate r1
759 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 752 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
760 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 753 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
761 SAVE_ALL_BASE __LC_SAVE_AREA+64 754 stmg %r11,%r15,__LC_SAVE_AREA+80
755 larl %r13,system_call
756 lg %r11,__LC_LAST_BREAK
762 la %r12,__LC_MCK_OLD_PSW 757 la %r12,__LC_MCK_OLD_PSW
763 tm __LC_MCCK_CODE,0x80 # system damage? 758 tm __LC_MCCK_CODE,0x80 # system damage?
764 jo mcck_int_main # yes -> rest of mcck code invalid 759 jo mcck_int_main # yes -> rest of mcck code invalid
765 la %r14,4095 760 la %r14,4095
766 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER 761 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
767 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
768 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 762 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
769 jo 1f 763 jo 1f
770 la %r14,__LC_SYNC_ENTER_TIMER 764 la %r14,__LC_SYNC_ENTER_TIMER
@@ -778,7 +772,7 @@ mcck_int_handler:
778 jl 0f 772 jl 0f
779 la %r14,__LC_LAST_UPDATE_TIMER 773 la %r14,__LC_LAST_UPDATE_TIMER
7800: spt 0(%r14) 7740: spt 0(%r14)
781 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) 775 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
7821: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 7761: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
783 jno mcck_int_main # no -> skip cleanup critical 777 jno mcck_int_main # no -> skip cleanup critical
784 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 778 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
@@ -794,16 +788,19 @@ mcck_int_main:
794 srag %r14,%r14,PAGE_SHIFT 788 srag %r14,%r14,PAGE_SHIFT
795 jz 0f 789 jz 0f
796 lg %r15,__LC_PANIC_STACK # load panic stack 790 lg %r15,__LC_PANIC_STACK # load panic stack
7970: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 7910: aghi %r15,-SP_SIZE # make room for registers & psw
792 CREATE_STACK_FRAME __LC_SAVE_AREA+80
793 mvc SP_PSW(16,%r15),0(%r12)
794 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
798 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? 795 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
799 jno mcck_no_vtime # no -> no timer update 796 jno mcck_no_vtime # no -> no timer update
800 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 797 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
801 jz mcck_no_vtime 798 jz mcck_no_vtime
802 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 799 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
803 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 800 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
804 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 801 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
802 LAST_BREAK
805mcck_no_vtime: 803mcck_no_vtime:
806 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
807 la %r2,SP_PTREGS(%r15) # load pt_regs 804 la %r2,SP_PTREGS(%r15) # load pt_regs
808 brasl %r14,s390_do_machine_check 805 brasl %r14,s390_do_machine_check
809 tm SP_PSW+1(%r15),0x01 # returning to user ? 806 tm SP_PSW+1(%r15),0x01 # returning to user ?
@@ -814,8 +811,9 @@ mcck_no_vtime:
814 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 811 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
815 lgr %r15,%r1 812 lgr %r15,%r1
816 stosm __SF_EMPTY(%r15),0x04 # turn dat on 813 stosm __SF_EMPTY(%r15),0x04 # turn dat on
817 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 814 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
818 jno mcck_return 815 jno mcck_return
816 HANDLE_SIE_INTERCEPT
819 TRACE_IRQS_OFF 817 TRACE_IRQS_OFF
820 brasl %r14,s390_handle_mcck 818 brasl %r14,s390_handle_mcck
821 TRACE_IRQS_ON 819 TRACE_IRQS_ON
@@ -823,11 +821,11 @@ mcck_return:
823 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW 821 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
824 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 822 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
825 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 823 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
826 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
827 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 824 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
828 jno 0f 825 jno 0f
829 stpt __LC_EXIT_TIMER 826 stpt __LC_EXIT_TIMER
8300: lpswe __LC_RETURN_MCCK_PSW # back to caller 8270: lpswe __LC_RETURN_MCCK_PSW # back to caller
828mcck_done:
831 829
832/* 830/*
833 * Restart interruption handler, kick starter for additional CPUs 831 * Restart interruption handler, kick starter for additional CPUs
@@ -883,14 +881,14 @@ stack_overflow:
883 lg %r15,__LC_PANIC_STACK # change to panic stack 881 lg %r15,__LC_PANIC_STACK # change to panic stack
884 aghi %r15,-SP_SIZE 882 aghi %r15,-SP_SIZE
885 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack 883 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
886 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 884 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
887 la %r1,__LC_SAVE_AREA 885 la %r1,__LC_SAVE_AREA
888 chi %r12,__LC_SVC_OLD_PSW 886 chi %r12,__LC_SVC_OLD_PSW
889 je 0f 887 je 0f
890 chi %r12,__LC_PGM_OLD_PSW 888 chi %r12,__LC_PGM_OLD_PSW
891 je 0f 889 je 0f
892 la %r1,__LC_SAVE_AREA+32 890 la %r1,__LC_SAVE_AREA+40
8930: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack 8910: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack
894 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK 892 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
895 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain 893 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
896 la %r2,SP_PTREGS(%r15) # load pt_regs 894 la %r2,SP_PTREGS(%r15) # load pt_regs
@@ -899,18 +897,14 @@ stack_overflow:
899 897
900cleanup_table_system_call: 898cleanup_table_system_call:
901 .quad system_call, sysc_do_svc 899 .quad system_call, sysc_do_svc
902cleanup_table_sysc_return: 900cleanup_table_sysc_tif:
903 .quad sysc_return, sysc_leave 901 .quad sysc_tif, sysc_restore
904cleanup_table_sysc_leave: 902cleanup_table_sysc_restore:
905 .quad sysc_leave, sysc_done 903 .quad sysc_restore, sysc_done
906cleanup_table_sysc_work_loop: 904cleanup_table_io_tif:
907 .quad sysc_work_loop, sysc_work_done 905 .quad io_tif, io_restore
908cleanup_table_io_return: 906cleanup_table_io_restore:
909 .quad io_return, io_leave 907 .quad io_restore, io_done
910cleanup_table_io_leave:
911 .quad io_leave, io_done
912cleanup_table_io_work_loop:
913 .quad io_work_loop, io_work_done
914 908
915cleanup_critical: 909cleanup_critical:
916 clc 8(8,%r12),BASED(cleanup_table_system_call) 910 clc 8(8,%r12),BASED(cleanup_table_system_call)
@@ -918,61 +912,54 @@ cleanup_critical:
918 clc 8(8,%r12),BASED(cleanup_table_system_call+8) 912 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
919 jl cleanup_system_call 913 jl cleanup_system_call
9200: 9140:
921 clc 8(8,%r12),BASED(cleanup_table_sysc_return) 915 clc 8(8,%r12),BASED(cleanup_table_sysc_tif)
922 jl 0f
923 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
924 jl cleanup_sysc_return
9250:
926 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
927 jl 0f 916 jl 0f
928 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8) 917 clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8)
929 jl cleanup_sysc_leave 918 jl cleanup_sysc_tif
9300: 9190:
931 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop) 920 clc 8(8,%r12),BASED(cleanup_table_sysc_restore)
932 jl 0f 921 jl 0f
933 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) 922 clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8)
934 jl cleanup_sysc_return 923 jl cleanup_sysc_restore
9350: 9240:
936 clc 8(8,%r12),BASED(cleanup_table_io_return) 925 clc 8(8,%r12),BASED(cleanup_table_io_tif)
937 jl 0f 926 jl 0f
938 clc 8(8,%r12),BASED(cleanup_table_io_return+8) 927 clc 8(8,%r12),BASED(cleanup_table_io_tif+8)
939 jl cleanup_io_return 928 jl cleanup_io_tif
9400: 9290:
941 clc 8(8,%r12),BASED(cleanup_table_io_leave) 930 clc 8(8,%r12),BASED(cleanup_table_io_restore)
942 jl 0f 931 jl 0f
943 clc 8(8,%r12),BASED(cleanup_table_io_leave+8) 932 clc 8(8,%r12),BASED(cleanup_table_io_restore+8)
944 jl cleanup_io_leave 933 jl cleanup_io_restore
9450:
946 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
947 jl 0f
948 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
949 jl cleanup_io_work_loop
9500: 9340:
951 br %r14 935 br %r14
952 936
953cleanup_system_call: 937cleanup_system_call:
954 mvc __LC_RETURN_PSW(16),0(%r12) 938 mvc __LC_RETURN_PSW(16),0(%r12)
955 cghi %r12,__LC_MCK_OLD_PSW
956 je 0f
957 la %r12,__LC_SAVE_AREA+32
958 j 1f
9590: la %r12,__LC_SAVE_AREA+64
9601:
961 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) 939 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
962 jh 0f 940 jh 0f
941 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
942 cghi %r12,__LC_MCK_OLD_PSW
943 je 0f
963 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 944 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9450: cghi %r12,__LC_MCK_OLD_PSW
946 la %r12,__LC_SAVE_AREA+80
947 je 0f
948 la %r12,__LC_SAVE_AREA+40
9640: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) 9490: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
965 jhe cleanup_vtime 950 jhe cleanup_vtime
966 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) 951 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
967 jh 0f 952 jh 0f
968 mvc __LC_SAVE_AREA(32),0(%r12) 953 mvc __LC_SAVE_AREA(40),0(%r12)
9690: stg %r13,8(%r12) 9540: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
970 stg %r12,__LC_SAVE_AREA+96 # argh 955 aghi %r15,-SP_SIZE # make room for registers & psw
971 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 956 stg %r15,32(%r12)
972 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 957 stg %r11,0(%r12)
973 lg %r12,__LC_SAVE_AREA+96 # argh 958 CREATE_STACK_FRAME __LC_SAVE_AREA
974 stg %r15,24(%r12) 959 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
975 llgh %r7,__LC_SVC_INT_CODE 960 mvc SP_ILC(4,%r15),__LC_SVC_ILC
961 stg %r7,SP_ARGS(%r15)
962 mvc 8(8,%r12),__LC_THREAD_INFO
976cleanup_vtime: 963cleanup_vtime:
977 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) 964 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
978 jhe cleanup_stime 965 jhe cleanup_stime
@@ -983,7 +970,11 @@ cleanup_stime:
983 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 970 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
984cleanup_update: 971cleanup_update:
985 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 972 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
986 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) 973 srag %r12,%r11,23
974 lg %r12,__LC_THREAD_INFO
975 jz 0f
976 stg %r11,__TI_last_break(%r12)
9770: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
987 la %r12,__LC_RETURN_PSW 978 la %r12,__LC_RETURN_PSW
988 br %r14 979 br %r14
989cleanup_system_call_insn: 980cleanup_system_call_insn:
@@ -993,61 +984,54 @@ cleanup_system_call_insn:
993 .quad sysc_stime 984 .quad sysc_stime
994 .quad sysc_update 985 .quad sysc_update
995 986
996cleanup_sysc_return: 987cleanup_sysc_tif:
997 mvc __LC_RETURN_PSW(8),0(%r12) 988 mvc __LC_RETURN_PSW(8),0(%r12)
998 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return) 989 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif)
999 la %r12,__LC_RETURN_PSW 990 la %r12,__LC_RETURN_PSW
1000 br %r14 991 br %r14
1001 992
1002cleanup_sysc_leave: 993cleanup_sysc_restore:
1003 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) 994 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn)
1004 je 3f 995 je 2f
1005 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) 996 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8)
1006 jhe 0f 997 jhe 0f
998 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
999 cghi %r12,__LC_MCK_OLD_PSW
1000 je 0f
1007 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1001 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
10080: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 10020: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1009 cghi %r12,__LC_MCK_OLD_PSW 1003 cghi %r12,__LC_MCK_OLD_PSW
1010 jne 1f 1004 la %r12,__LC_SAVE_AREA+80
1011 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) 1005 je 1f
1012 j 2f 1006 la %r12,__LC_SAVE_AREA+40
10131: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) 10071: mvc 0(40,%r12),SP_R11(%r15)
10142: lmg %r0,%r11,SP_R0(%r15) 1008 lmg %r0,%r10,SP_R0(%r15)
1015 lg %r15,SP_R15(%r15) 1009 lg %r15,SP_R15(%r15)
10163: la %r12,__LC_RETURN_PSW 10102: la %r12,__LC_RETURN_PSW
1017 br %r14 1011 br %r14
1018cleanup_sysc_leave_insn: 1012cleanup_sysc_restore_insn:
1019 .quad sysc_done - 4 1013 .quad sysc_done - 4
1020 .quad sysc_done - 16 1014 .quad sysc_done - 16
1021 1015
1022cleanup_io_return: 1016cleanup_io_tif:
1023 mvc __LC_RETURN_PSW(8),0(%r12)
1024 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_return)
1025 la %r12,__LC_RETURN_PSW
1026 br %r14
1027
1028cleanup_io_work_loop:
1029 mvc __LC_RETURN_PSW(8),0(%r12) 1017 mvc __LC_RETURN_PSW(8),0(%r12)
1030 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop) 1018 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif)
1031 la %r12,__LC_RETURN_PSW 1019 la %r12,__LC_RETURN_PSW
1032 br %r14 1020 br %r14
1033 1021
1034cleanup_io_leave: 1022cleanup_io_restore:
1035 clc 8(8,%r12),BASED(cleanup_io_leave_insn) 1023 clc 8(8,%r12),BASED(cleanup_io_restore_insn)
1036 je 3f 1024 je 1f
1037 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) 1025 clc 8(8,%r12),BASED(cleanup_io_restore_insn+8)
1038 jhe 0f 1026 jhe 0f
1039 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1027 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
10400: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 10280: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1041 cghi %r12,__LC_MCK_OLD_PSW 1029 mvc __LC_SAVE_AREA+80(40),SP_R11(%r15)
1042 jne 1f 1030 lmg %r0,%r10,SP_R0(%r15)
1043 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1044 j 2f
10451: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
10462: lmg %r0,%r11,SP_R0(%r15)
1047 lg %r15,SP_R15(%r15) 1031 lg %r15,SP_R15(%r15)
10483: la %r12,__LC_RETURN_PSW 10321: la %r12,__LC_RETURN_PSW
1049 br %r14 1033 br %r14
1050cleanup_io_leave_insn: 1034cleanup_io_restore_insn:
1051 .quad io_done - 4 1035 .quad io_done - 4
1052 .quad io_done - 16 1036 .quad io_done - 16
1053 1037
@@ -1055,13 +1039,6 @@ cleanup_io_leave_insn:
1055 * Integer constants 1039 * Integer constants
1056 */ 1040 */
1057 .align 4 1041 .align 4
1058.Lconst:
1059.Lnr_syscalls: .long NR_syscalls
1060.L0x0130: .short 0x130
1061.L0x0140: .short 0x140
1062.L0x0150: .short 0x150
1063.L0x0160: .short 0x160
1064.L0x0170: .short 0x170
1065.Lcritical_start: 1042.Lcritical_start:
1066 .quad __critical_start 1043 .quad __critical_start
1067.Lcritical_end: 1044.Lcritical_end:
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 9d1f76702d47..51838ad42d56 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -328,8 +328,8 @@ iplstart:
328# 328#
329# reset files in VM reader 329# reset files in VM reader
330# 330#
331 stidp __LC_CPUID # store cpuid 331 stidp __LC_SAVE_AREA # store cpuid
332 tm __LC_CPUID,0xff # running VM ? 332 tm __LC_SAVE_AREA,0xff # running VM ?
333 bno .Lnoreset 333 bno .Lnoreset
334 la %r2,.Lreset 334 la %r2,.Lreset
335 lhi %r3,26 335 lhi %r3,26
diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c
index 015e27da40eb..ac151399ef34 100644
--- a/arch/s390/kernel/nmi.c
+++ b/arch/s390/kernel/nmi.c
@@ -255,7 +255,8 @@ void notrace s390_do_machine_check(struct pt_regs *regs)
255 int umode; 255 int umode;
256 256
257 nmi_enter(); 257 nmi_enter();
258 s390_idle_check(); 258 s390_idle_check(regs, S390_lowcore.mcck_clock,
259 S390_lowcore.mcck_enter_timer);
259 260
260 mci = (struct mci *) &S390_lowcore.mcck_interruption_code; 261 mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
261 mcck = &__get_cpu_var(cpu_mcck); 262 mcck = &__get_cpu_var(cpu_mcck);
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
index 0729f36c2fe3..ecb2d02b02e4 100644
--- a/arch/s390/kernel/processor.c
+++ b/arch/s390/kernel/processor.c
@@ -18,24 +18,42 @@
18#include <asm/lowcore.h> 18#include <asm/lowcore.h>
19#include <asm/param.h> 19#include <asm/param.h>
20 20
21static DEFINE_PER_CPU(struct cpuid, cpu_id);
22
23/*
24 * cpu_init - initializes state that is per-CPU.
25 */
26void __cpuinit cpu_init(void)
27{
28 struct cpuid *id = &per_cpu(cpu_id, smp_processor_id());
29
30 get_cpu_id(id);
31 atomic_inc(&init_mm.mm_count);
32 current->active_mm = &init_mm;
33 BUG_ON(current->mm);
34 enter_lazy_tlb(&init_mm, current);
35}
36
37/*
38 * print_cpu_info - print basic information about a cpu
39 */
21void __cpuinit print_cpu_info(void) 40void __cpuinit print_cpu_info(void)
22{ 41{
42 struct cpuid *id = &per_cpu(cpu_id, smp_processor_id());
43
23 pr_info("Processor %d started, address %d, identification %06X\n", 44 pr_info("Processor %d started, address %d, identification %06X\n",
24 S390_lowcore.cpu_nr, S390_lowcore.cpu_addr, 45 S390_lowcore.cpu_nr, S390_lowcore.cpu_addr, id->ident);
25 S390_lowcore.cpu_id.ident);
26} 46}
27 47
28/* 48/*
29 * show_cpuinfo - Get information on one CPU for use by procfs. 49 * show_cpuinfo - Get information on one CPU for use by procfs.
30 */ 50 */
31
32static int show_cpuinfo(struct seq_file *m, void *v) 51static int show_cpuinfo(struct seq_file *m, void *v)
33{ 52{
34 static const char *hwcap_str[10] = { 53 static const char *hwcap_str[10] = {
35 "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp", 54 "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
36 "edat", "etf3eh", "highgprs" 55 "edat", "etf3eh", "highgprs"
37 }; 56 };
38 struct _lowcore *lc;
39 unsigned long n = (unsigned long) v - 1; 57 unsigned long n = (unsigned long) v - 1;
40 int i; 58 int i;
41 59
@@ -55,19 +73,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
55 } 73 }
56 74
57 if (cpu_online(n)) { 75 if (cpu_online(n)) {
58#ifdef CONFIG_SMP 76 struct cpuid *id = &per_cpu(cpu_id, n);
59 lc = (smp_processor_id() == n) ?
60 &S390_lowcore : lowcore_ptr[n];
61#else
62 lc = &S390_lowcore;
63#endif
64 seq_printf(m, "processor %li: " 77 seq_printf(m, "processor %li: "
65 "version = %02X, " 78 "version = %02X, "
66 "identification = %06X, " 79 "identification = %06X, "
67 "machine = %04X\n", 80 "machine = %04X\n",
68 n, lc->cpu_id.version, 81 n, id->version, id->ident, id->machine);
69 lc->cpu_id.ident,
70 lc->cpu_id.machine);
71 } 82 }
72 preempt_enable(); 83 preempt_enable();
73 return 0; 84 return 0;
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 9f654da4cecc..83339d33c4b1 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -57,6 +57,7 @@
57enum s390_regset { 57enum s390_regset {
58 REGSET_GENERAL, 58 REGSET_GENERAL,
59 REGSET_FP, 59 REGSET_FP,
60 REGSET_LAST_BREAK,
60 REGSET_GENERAL_EXTENDED, 61 REGSET_GENERAL_EXTENDED,
61}; 62};
62 63
@@ -381,6 +382,10 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
381 copied += sizeof(unsigned long); 382 copied += sizeof(unsigned long);
382 } 383 }
383 return 0; 384 return 0;
385 case PTRACE_GET_LAST_BREAK:
386 put_user(task_thread_info(child)->last_break,
387 (unsigned long __user *) data);
388 return 0;
384 default: 389 default:
385 /* Removing high order bit from addr (only for 31 bit). */ 390 /* Removing high order bit from addr (only for 31 bit). */
386 addr &= PSW_ADDR_INSN; 391 addr &= PSW_ADDR_INSN;
@@ -633,6 +638,10 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
633 copied += sizeof(unsigned int); 638 copied += sizeof(unsigned int);
634 } 639 }
635 return 0; 640 return 0;
641 case PTRACE_GET_LAST_BREAK:
642 put_user(task_thread_info(child)->last_break,
643 (unsigned int __user *) data);
644 return 0;
636 } 645 }
637 return compat_ptrace_request(child, request, addr, data); 646 return compat_ptrace_request(child, request, addr, data);
638} 647}
@@ -797,6 +806,28 @@ static int s390_fpregs_set(struct task_struct *target,
797 return rc; 806 return rc;
798} 807}
799 808
809#ifdef CONFIG_64BIT
810
811static int s390_last_break_get(struct task_struct *target,
812 const struct user_regset *regset,
813 unsigned int pos, unsigned int count,
814 void *kbuf, void __user *ubuf)
815{
816 if (count > 0) {
817 if (kbuf) {
818 unsigned long *k = kbuf;
819 *k = task_thread_info(target)->last_break;
820 } else {
821 unsigned long __user *u = ubuf;
822 if (__put_user(task_thread_info(target)->last_break, u))
823 return -EFAULT;
824 }
825 }
826 return 0;
827}
828
829#endif
830
800static const struct user_regset s390_regsets[] = { 831static const struct user_regset s390_regsets[] = {
801 [REGSET_GENERAL] = { 832 [REGSET_GENERAL] = {
802 .core_note_type = NT_PRSTATUS, 833 .core_note_type = NT_PRSTATUS,
@@ -814,6 +845,15 @@ static const struct user_regset s390_regsets[] = {
814 .get = s390_fpregs_get, 845 .get = s390_fpregs_get,
815 .set = s390_fpregs_set, 846 .set = s390_fpregs_set,
816 }, 847 },
848#ifdef CONFIG_64BIT
849 [REGSET_LAST_BREAK] = {
850 .core_note_type = NT_S390_LAST_BREAK,
851 .n = 1,
852 .size = sizeof(long),
853 .align = sizeof(long),
854 .get = s390_last_break_get,
855 },
856#endif
817}; 857};
818 858
819static const struct user_regset_view user_s390_view = { 859static const struct user_regset_view user_s390_view = {
@@ -948,6 +988,27 @@ static int s390_compat_regs_high_set(struct task_struct *target,
948 return rc; 988 return rc;
949} 989}
950 990
991static int s390_compat_last_break_get(struct task_struct *target,
992 const struct user_regset *regset,
993 unsigned int pos, unsigned int count,
994 void *kbuf, void __user *ubuf)
995{
996 compat_ulong_t last_break;
997
998 if (count > 0) {
999 last_break = task_thread_info(target)->last_break;
1000 if (kbuf) {
1001 unsigned long *k = kbuf;
1002 *k = last_break;
1003 } else {
1004 unsigned long __user *u = ubuf;
1005 if (__put_user(last_break, u))
1006 return -EFAULT;
1007 }
1008 }
1009 return 0;
1010}
1011
951static const struct user_regset s390_compat_regsets[] = { 1012static const struct user_regset s390_compat_regsets[] = {
952 [REGSET_GENERAL] = { 1013 [REGSET_GENERAL] = {
953 .core_note_type = NT_PRSTATUS, 1014 .core_note_type = NT_PRSTATUS,
@@ -965,6 +1026,13 @@ static const struct user_regset s390_compat_regsets[] = {
965 .get = s390_fpregs_get, 1026 .get = s390_fpregs_get,
966 .set = s390_fpregs_set, 1027 .set = s390_fpregs_set,
967 }, 1028 },
1029 [REGSET_LAST_BREAK] = {
1030 .core_note_type = NT_S390_LAST_BREAK,
1031 .n = 1,
1032 .size = sizeof(long),
1033 .align = sizeof(long),
1034 .get = s390_compat_last_break_get,
1035 },
968 [REGSET_GENERAL_EXTENDED] = { 1036 [REGSET_GENERAL_EXTENDED] = {
969 .core_note_type = NT_S390_HIGH_GPRS, 1037 .core_note_type = NT_S390_HIGH_GPRS,
970 .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t), 1038 .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t),
diff --git a/arch/s390/kernel/s390_ext.c b/arch/s390/kernel/s390_ext.c
index 59618bcd99b7..9ce641b5291f 100644
--- a/arch/s390/kernel/s390_ext.c
+++ b/arch/s390/kernel/s390_ext.c
@@ -120,7 +120,8 @@ void __irq_entry do_extint(struct pt_regs *regs, unsigned short code)
120 struct pt_regs *old_regs; 120 struct pt_regs *old_regs;
121 121
122 old_regs = set_irq_regs(regs); 122 old_regs = set_irq_regs(regs);
123 s390_idle_check(); 123 s390_idle_check(regs, S390_lowcore.int_clock,
124 S390_lowcore.async_enter_timer);
124 irq_enter(); 125 irq_enter();
125 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) 126 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
126 /* Serve timer interrupts first. */ 127 /* Serve timer interrupts first. */
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 91625f759ccd..7d893248d265 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -2,7 +2,7 @@
2 * arch/s390/kernel/setup.c 2 * arch/s390/kernel/setup.c
3 * 3 *
4 * S390 version 4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation 5 * Copyright (C) IBM Corp. 1999,2010
6 * Author(s): Hartmut Penner (hp@de.ibm.com), 6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com) 7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * 8 *
@@ -113,22 +113,6 @@ static struct resource data_resource = {
113}; 113};
114 114
115/* 115/*
116 * cpu_init() initializes state that is per-CPU.
117 */
118void __cpuinit cpu_init(void)
119{
120 /*
121 * Store processor id in lowcore (used e.g. in timer_interrupt)
122 */
123 get_cpu_id(&S390_lowcore.cpu_id);
124
125 atomic_inc(&init_mm.mm_count);
126 current->active_mm = &init_mm;
127 BUG_ON(current->mm);
128 enter_lazy_tlb(&init_mm, current);
129}
130
131/*
132 * condev= and conmode= setup parameter. 116 * condev= and conmode= setup parameter.
133 */ 117 */
134 118
@@ -385,10 +369,6 @@ static void setup_addressing_mode(void)
385 pr_info("Address spaces switched, " 369 pr_info("Address spaces switched, "
386 "mvcos not available\n"); 370 "mvcos not available\n");
387 } 371 }
388#ifdef CONFIG_TRACE_IRQFLAGS
389 sysc_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK;
390 io_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK;
391#endif
392} 372}
393 373
394static void __init 374static void __init
@@ -421,6 +401,7 @@ setup_lowcore(void)
421 lc->io_new_psw.mask = psw_kernel_bits; 401 lc->io_new_psw.mask = psw_kernel_bits;
422 lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; 402 lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler;
423 lc->clock_comparator = -1ULL; 403 lc->clock_comparator = -1ULL;
404 lc->cmf_hpp = -1ULL;
424 lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; 405 lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE;
425 lc->async_stack = (unsigned long) 406 lc->async_stack = (unsigned long)
426 __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; 407 __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE;
@@ -695,6 +676,7 @@ static void __init setup_hwcaps(void)
695 static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 }; 676 static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 };
696 unsigned long long facility_list_extended; 677 unsigned long long facility_list_extended;
697 unsigned int facility_list; 678 unsigned int facility_list;
679 struct cpuid cpu_id;
698 int i; 680 int i;
699 681
700 facility_list = stfl(); 682 facility_list = stfl();
@@ -756,7 +738,8 @@ static void __init setup_hwcaps(void)
756 */ 738 */
757 elf_hwcap |= HWCAP_S390_HIGH_GPRS; 739 elf_hwcap |= HWCAP_S390_HIGH_GPRS;
758 740
759 switch (S390_lowcore.cpu_id.machine) { 741 get_cpu_id(&cpu_id);
742 switch (cpu_id.machine) {
760 case 0x9672: 743 case 0x9672:
761#if !defined(CONFIG_64BIT) 744#if !defined(CONFIG_64BIT)
762 default: /* Use "g5" as default for 31 bit kernels. */ 745 default: /* Use "g5" as default for 31 bit kernels. */
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 6289945562b0..ee7ac8b11782 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -313,6 +313,7 @@ static int setup_frame(int sig, struct k_sigaction *ka,
313 To avoid breaking binary compatibility, they are passed as args. */ 313 To avoid breaking binary compatibility, they are passed as args. */
314 regs->gprs[4] = current->thread.trap_no; 314 regs->gprs[4] = current->thread.trap_no;
315 regs->gprs[5] = current->thread.prot_addr; 315 regs->gprs[5] = current->thread.prot_addr;
316 regs->gprs[6] = task_thread_info(current)->last_break;
316 317
317 /* Place signal number on stack to allow backtrace from handler. */ 318 /* Place signal number on stack to allow backtrace from handler. */
318 if (__put_user(regs->gprs[2], (int __user *) &frame->signo)) 319 if (__put_user(regs->gprs[2], (int __user *) &frame->signo))
@@ -376,6 +377,7 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
376 regs->gprs[2] = map_signal(sig); 377 regs->gprs[2] = map_signal(sig);
377 regs->gprs[3] = (unsigned long) &frame->info; 378 regs->gprs[3] = (unsigned long) &frame->info;
378 regs->gprs[4] = (unsigned long) &frame->uc; 379 regs->gprs[4] = (unsigned long) &frame->uc;
380 regs->gprs[5] = task_thread_info(current)->last_break;
379 return 0; 381 return 0;
380 382
381give_sigsegv: 383give_sigsegv:
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index d906bf19c14a..a2163c95eb98 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -391,7 +391,6 @@ static void __init time_init_wq(void)
391 if (time_sync_wq) 391 if (time_sync_wq)
392 return; 392 return;
393 time_sync_wq = create_singlethread_workqueue("timesync"); 393 time_sync_wq = create_singlethread_workqueue("timesync");
394 stop_machine_create();
395} 394}
396 395
397/* 396/*
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 247b4c2d1e51..bcef00766a64 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -37,7 +37,8 @@ struct tl_cpu {
37}; 37};
38 38
39struct tl_container { 39struct tl_container {
40 unsigned char reserved[8]; 40 unsigned char reserved[7];
41 unsigned char id;
41}; 42};
42 43
43union tl_entry { 44union tl_entry {
@@ -58,6 +59,7 @@ struct tl_info {
58 59
59struct core_info { 60struct core_info {
60 struct core_info *next; 61 struct core_info *next;
62 unsigned char id;
61 cpumask_t mask; 63 cpumask_t mask;
62}; 64};
63 65
@@ -73,6 +75,7 @@ static DECLARE_WORK(topology_work, topology_work_fn);
73static DEFINE_SPINLOCK(topology_lock); 75static DEFINE_SPINLOCK(topology_lock);
74 76
75cpumask_t cpu_core_map[NR_CPUS]; 77cpumask_t cpu_core_map[NR_CPUS];
78unsigned char cpu_core_id[NR_CPUS];
76 79
77static cpumask_t cpu_coregroup_map(unsigned int cpu) 80static cpumask_t cpu_coregroup_map(unsigned int cpu)
78{ 81{
@@ -116,6 +119,7 @@ static void add_cpus_to_core(struct tl_cpu *tl_cpu, struct core_info *core)
116 for_each_present_cpu(lcpu) { 119 for_each_present_cpu(lcpu) {
117 if (cpu_logical_map(lcpu) == rcpu) { 120 if (cpu_logical_map(lcpu) == rcpu) {
118 cpu_set(lcpu, core->mask); 121 cpu_set(lcpu, core->mask);
122 cpu_core_id[lcpu] = core->id;
119 smp_cpu_polarization[lcpu] = tl_cpu->pp; 123 smp_cpu_polarization[lcpu] = tl_cpu->pp;
120 } 124 }
121 } 125 }
@@ -158,6 +162,7 @@ static void tl_to_cores(struct tl_info *info)
158 break; 162 break;
159 case 1: 163 case 1:
160 core = core->next; 164 core = core->next;
165 core->id = tle->container.id;
161 break; 166 break;
162 case 0: 167 case 0:
163 add_cpus_to_core(&tle->cpu, core); 168 add_cpus_to_core(&tle->cpu, core);
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 6e7ad63854c0..5d8f0f3d0250 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -46,13 +46,7 @@
46 46
47pgm_check_handler_t *pgm_check_table[128]; 47pgm_check_handler_t *pgm_check_table[128];
48 48
49#ifdef CONFIG_SYSCTL 49int show_unhandled_signals;
50#ifdef CONFIG_PROCESS_DEBUG
51int sysctl_userprocess_debug = 1;
52#else
53int sysctl_userprocess_debug = 0;
54#endif
55#endif
56 50
57extern pgm_check_handler_t do_protection_exception; 51extern pgm_check_handler_t do_protection_exception;
58extern pgm_check_handler_t do_dat_exception; 52extern pgm_check_handler_t do_dat_exception;
@@ -315,18 +309,19 @@ void die(const char * str, struct pt_regs * regs, long err)
315 do_exit(SIGSEGV); 309 do_exit(SIGSEGV);
316} 310}
317 311
318static void inline 312static void inline report_user_fault(struct pt_regs *regs, long int_code,
319report_user_fault(long interruption_code, struct pt_regs *regs) 313 int signr)
320{ 314{
321#if defined(CONFIG_SYSCTL) 315 if ((task_pid_nr(current) > 1) && !show_unhandled_signals)
322 if (!sysctl_userprocess_debug)
323 return; 316 return;
324#endif 317 if (!unhandled_signal(current, signr))
325#if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG) 318 return;
326 printk("User process fault: interruption code 0x%lX\n", 319 if (!printk_ratelimit())
327 interruption_code); 320 return;
321 printk("User process fault: interruption code 0x%lX ", int_code);
322 print_vma_addr("in ", regs->psw.addr & PSW_ADDR_INSN);
323 printk("\n");
328 show_regs(regs); 324 show_regs(regs);
329#endif
330} 325}
331 326
332int is_valid_bugaddr(unsigned long addr) 327int is_valid_bugaddr(unsigned long addr)
@@ -354,7 +349,7 @@ static void __kprobes inline do_trap(long interruption_code, int signr,
354 349
355 tsk->thread.trap_no = interruption_code & 0xffff; 350 tsk->thread.trap_no = interruption_code & 0xffff;
356 force_sig_info(signr, info, tsk); 351 force_sig_info(signr, info, tsk);
357 report_user_fault(interruption_code, regs); 352 report_user_fault(regs, interruption_code, signr);
358 } else { 353 } else {
359 const struct exception_table_entry *fixup; 354 const struct exception_table_entry *fixup;
360 fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN); 355 fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
@@ -390,8 +385,8 @@ static void default_trap_handler(struct pt_regs * regs, long interruption_code)
390{ 385{
391 if (regs->psw.mask & PSW_MASK_PSTATE) { 386 if (regs->psw.mask & PSW_MASK_PSTATE) {
392 local_irq_enable(); 387 local_irq_enable();
388 report_user_fault(regs, interruption_code, SIGSEGV);
393 do_exit(SIGSEGV); 389 do_exit(SIGSEGV);
394 report_user_fault(interruption_code, regs);
395 } else 390 } else
396 die("Unknown program exception", regs, interruption_code); 391 die("Unknown program exception", regs, interruption_code);
397} 392}
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index 6bc9c197aa91..6b83870507d5 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -102,11 +102,7 @@ static void vdso_init_per_cpu_data(int cpu, struct vdso_per_cpu_data *vpcd)
102/* 102/*
103 * Allocate/free per cpu vdso data. 103 * Allocate/free per cpu vdso data.
104 */ 104 */
105#ifdef CONFIG_64BIT
106#define SEGMENT_ORDER 2 105#define SEGMENT_ORDER 2
107#else
108#define SEGMENT_ORDER 1
109#endif
110 106
111int vdso_alloc_per_cpu(int cpu, struct _lowcore *lowcore) 107int vdso_alloc_per_cpu(int cpu, struct _lowcore *lowcore)
112{ 108{
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index b59a812a010e..3479f1b0d4e0 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -121,32 +121,35 @@ void account_system_vtime(struct task_struct *tsk)
121} 121}
122EXPORT_SYMBOL_GPL(account_system_vtime); 122EXPORT_SYMBOL_GPL(account_system_vtime);
123 123
124void vtime_start_cpu(void) 124void vtime_start_cpu(__u64 int_clock, __u64 enter_timer)
125{ 125{
126 struct s390_idle_data *idle = &__get_cpu_var(s390_idle); 126 struct s390_idle_data *idle = &__get_cpu_var(s390_idle);
127 struct vtimer_queue *vq = &__get_cpu_var(virt_cpu_timer); 127 struct vtimer_queue *vq = &__get_cpu_var(virt_cpu_timer);
128 __u64 idle_time, expires; 128 __u64 idle_time, expires;
129 129
130 if (idle->idle_enter == 0ULL)
131 return;
132
130 /* Account time spent with enabled wait psw loaded as idle time. */ 133 /* Account time spent with enabled wait psw loaded as idle time. */
131 idle_time = S390_lowcore.int_clock - idle->idle_enter; 134 idle_time = int_clock - idle->idle_enter;
132 account_idle_time(idle_time); 135 account_idle_time(idle_time);
133 S390_lowcore.steal_timer += 136 S390_lowcore.steal_timer +=
134 idle->idle_enter - S390_lowcore.last_update_clock; 137 idle->idle_enter - S390_lowcore.last_update_clock;
135 S390_lowcore.last_update_clock = S390_lowcore.int_clock; 138 S390_lowcore.last_update_clock = int_clock;
136 139
137 /* Account system time spent going idle. */ 140 /* Account system time spent going idle. */
138 S390_lowcore.system_timer += S390_lowcore.last_update_timer - vq->idle; 141 S390_lowcore.system_timer += S390_lowcore.last_update_timer - vq->idle;
139 S390_lowcore.last_update_timer = S390_lowcore.async_enter_timer; 142 S390_lowcore.last_update_timer = enter_timer;
140 143
141 /* Restart vtime CPU timer */ 144 /* Restart vtime CPU timer */
142 if (vq->do_spt) { 145 if (vq->do_spt) {
143 /* Program old expire value but first save progress. */ 146 /* Program old expire value but first save progress. */
144 expires = vq->idle - S390_lowcore.async_enter_timer; 147 expires = vq->idle - enter_timer;
145 expires += get_vtimer(); 148 expires += get_vtimer();
146 set_vtimer(expires); 149 set_vtimer(expires);
147 } else { 150 } else {
148 /* Don't account the CPU timer delta while the cpu was idle. */ 151 /* Don't account the CPU timer delta while the cpu was idle. */
149 vq->elapsed -= vq->idle - S390_lowcore.async_enter_timer; 152 vq->elapsed -= vq->idle - enter_timer;
150 } 153 }
151 154
152 idle->sequence++; 155 idle->sequence++;
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig
index a7251580891c..2f4b687cc7fa 100644
--- a/arch/s390/kvm/Kconfig
+++ b/arch/s390/kvm/Kconfig
@@ -33,6 +33,17 @@ config KVM
33 33
34 If unsure, say N. 34 If unsure, say N.
35 35
36config KVM_AWARE_CMF
37 depends on KVM
38 bool "KVM aware sampling"
39 ---help---
40 This option enhances the sampling data from the CPU Measurement
41 Facility with additional information, that allows to distinguish
42 guest(s) and host when using the kernel based virtual machine
43 functionality.
44
45 If unsure, say N.
46
36# OK, it's a little counter-intuitive to do this, but it puts it neatly under 47# OK, it's a little counter-intuitive to do this, but it puts it neatly under
37# the virtualization menu. 48# the virtualization menu.
38source drivers/vhost/Kconfig 49source drivers/vhost/Kconfig
diff --git a/arch/s390/kvm/sie64a.S b/arch/s390/kvm/sie64a.S
index 934fd6a885f6..31646bd0e469 100644
--- a/arch/s390/kvm/sie64a.S
+++ b/arch/s390/kvm/sie64a.S
@@ -1,20 +1,60 @@
1/* 1/*
2 * sie64a.S - low level sie call 2 * sie64a.S - low level sie call
3 * 3 *
4 * Copyright IBM Corp. 2008 4 * Copyright IBM Corp. 2008,2010
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only) 7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation. 8 * as published by the Free Software Foundation.
9 * 9 *
10 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> 10 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
11 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
11 */ 12 */
12 13
13#include <linux/errno.h> 14#include <linux/errno.h>
14#include <asm/asm-offsets.h> 15#include <asm/asm-offsets.h>
16#include <asm/setup.h>
17#include <asm/asm-offsets.h>
18#include <asm/ptrace.h>
19#include <asm/thread_info.h>
20
21_TIF_EXIT_SIE = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)
22
23/*
24 * offsets into stackframe
25 * SP_ = offsets into stack sie64 is called with
26 * SPI_ = offsets into irq stack
27 */
28SP_GREGS = __SF_EMPTY
29SP_HOOK = __SF_EMPTY+8
30SP_GPP = __SF_EMPTY+16
31SPI_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
32
15 33
16SP_R5 = 5 * 8 # offset into stackframe 34 .macro SPP newpp
17SP_R6 = 6 * 8 35#ifdef CONFIG_KVM_AWARE_CMF
36 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP
37 jz 0f
38 .insn s,0xb2800000,\newpp
39 0:
40#endif
41 .endm
42
43sie_irq_handler:
44 SPP __LC_CMF_HPP # set host id
45 larl %r2,sie_inst
46 clg %r2,SPI_PSW+8(0,%r15) # intercepted sie
47 jne 1f
48 xc __LC_SIE_HOOK(8),__LC_SIE_HOOK
49 lg %r2,__LC_THREAD_INFO # pointer thread_info struct
50 tm __TI_flags+7(%r2),_TIF_EXIT_SIE
51 jz 0f
52 larl %r2,sie_exit # work pending, leave sie
53 stg %r2,__LC_RETURN_PSW+8
54 br %r14
550: larl %r2,sie_reenter # re-enter with guest id
56 stg %r2,__LC_RETURN_PSW+8
571: br %r14
18 58
19/* 59/*
20 * sie64a calling convention: 60 * sie64a calling convention:
@@ -23,23 +63,34 @@ SP_R6 = 6 * 8
23 */ 63 */
24 .globl sie64a 64 .globl sie64a
25sie64a: 65sie64a:
26 lgr %r5,%r3 66 stg %r3,SP_GREGS(%r15) # save guest register save area
27 stmg %r5,%r14,SP_R5(%r15) # save register on entry 67 stmg %r6,%r14,__SF_GPRS(%r15) # save registers on entry
28 lgr %r14,%r2 # pointer to sie control block 68 lgr %r14,%r2 # pointer to sie control block
29 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 69 larl %r5,sie_irq_handler
70 stg %r2,SP_GPP(%r15)
71 stg %r5,SP_HOOK(%r15) # save hook target
72 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
73sie_reenter:
74 mvc __LC_SIE_HOOK(8),SP_HOOK(%r15)
75 SPP SP_GPP(%r15) # set guest id
30sie_inst: 76sie_inst:
31 sie 0(%r14) 77 sie 0(%r14)
32 lg %r14,SP_R5(%r15) 78 xc __LC_SIE_HOOK(8),__LC_SIE_HOOK
33 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 79 SPP __LC_CMF_HPP # set host id
80sie_exit:
81 lg %r14,SP_GREGS(%r15)
82 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
34 lghi %r2,0 83 lghi %r2,0
35 lmg %r6,%r14,SP_R6(%r15) 84 lmg %r6,%r14,__SF_GPRS(%r15)
36 br %r14 85 br %r14
37 86
38sie_err: 87sie_err:
39 lg %r14,SP_R5(%r15) 88 xc __LC_SIE_HOOK(8),__LC_SIE_HOOK
40 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 89 SPP __LC_CMF_HPP # set host id
90 lg %r14,SP_GREGS(%r15)
91 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
41 lghi %r2,-EFAULT 92 lghi %r2,-EFAULT
42 lmg %r6,%r14,SP_R6(%r15) 93 lmg %r6,%r14,__SF_GPRS(%r15)
43 br %r14 94 br %r14
44 95
45 .section __ex_table,"a" 96 .section __ex_table,"a"
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 3040d7c78fe0..2505b2ea0ef1 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -48,10 +48,6 @@
48#define __PF_RES_FIELD 0x8000000000000000ULL 48#define __PF_RES_FIELD 0x8000000000000000ULL
49#endif /* CONFIG_64BIT */ 49#endif /* CONFIG_64BIT */
50 50
51#ifdef CONFIG_SYSCTL
52extern int sysctl_userprocess_debug;
53#endif
54
55#define VM_FAULT_BADCONTEXT 0x010000 51#define VM_FAULT_BADCONTEXT 0x010000
56#define VM_FAULT_BADMAP 0x020000 52#define VM_FAULT_BADMAP 0x020000
57#define VM_FAULT_BADACCESS 0x040000 53#define VM_FAULT_BADACCESS 0x040000
@@ -120,6 +116,22 @@ static inline int user_space_fault(unsigned long trans_exc_code)
120 return trans_exc_code != 3; 116 return trans_exc_code != 3;
121} 117}
122 118
119static inline void report_user_fault(struct pt_regs *regs, long int_code,
120 int signr, unsigned long address)
121{
122 if ((task_pid_nr(current) > 1) && !show_unhandled_signals)
123 return;
124 if (!unhandled_signal(current, signr))
125 return;
126 if (!printk_ratelimit())
127 return;
128 printk("User process fault: interruption code 0x%lX ", int_code);
129 print_vma_addr(KERN_CONT "in ", regs->psw.addr & PSW_ADDR_INSN);
130 printk("\n");
131 printk("failing address: %lX\n", address);
132 show_regs(regs);
133}
134
123/* 135/*
124 * Send SIGSEGV to task. This is an external routine 136 * Send SIGSEGV to task. This is an external routine
125 * to keep the stack usage of do_page_fault small. 137 * to keep the stack usage of do_page_fault small.
@@ -133,17 +145,7 @@ static noinline void do_sigsegv(struct pt_regs *regs, long int_code,
133 address = trans_exc_code & __FAIL_ADDR_MASK; 145 address = trans_exc_code & __FAIL_ADDR_MASK;
134 current->thread.prot_addr = address; 146 current->thread.prot_addr = address;
135 current->thread.trap_no = int_code; 147 current->thread.trap_no = int_code;
136#if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG) 148 report_user_fault(regs, int_code, SIGSEGV, address);
137#if defined(CONFIG_SYSCTL)
138 if (sysctl_userprocess_debug)
139#endif
140 {
141 printk("User process fault: interruption code 0x%lX\n",
142 int_code);
143 printk("failing address: %lX\n", address);
144 show_regs(regs);
145 }
146#endif
147 si.si_signo = SIGSEGV; 149 si.si_signo = SIGSEGV;
148 si.si_code = si_code; 150 si.si_code = si_code;
149 si.si_addr = (void __user *) address; 151 si.si_addr = (void __user *) address;
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 8d90564c2bcf..0e318c905eea 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -44,6 +44,7 @@ config SUPERH32
44 select HAVE_FUNCTION_GRAPH_TRACER 44 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_ARCH_KGDB 45 select HAVE_ARCH_KGDB
46 select HAVE_HW_BREAKPOINT 46 select HAVE_HW_BREAKPOINT
47 select HAVE_MIXED_BREAKPOINTS_REGS
47 select PERF_EVENTS if HAVE_HW_BREAKPOINT 48 select PERF_EVENTS if HAVE_HW_BREAKPOINT
48 select ARCH_HIBERNATION_POSSIBLE if MMU 49 select ARCH_HIBERNATION_POSSIBLE if MMU
49 50
@@ -157,7 +158,6 @@ config LOCKDEP_SUPPORT
157 158
158config HAVE_LATENCYTOP_SUPPORT 159config HAVE_LATENCYTOP_SUPPORT
159 def_bool y 160 def_bool y
160 depends on !SMP
161 161
162config ARCH_HAS_ILOG2_U32 162config ARCH_HAS_ILOG2_U32
163 def_bool n 163 def_bool n
@@ -237,6 +237,8 @@ config CPU_SHX2
237config CPU_SHX3 237config CPU_SHX3
238 bool 238 bool
239 select DMA_COHERENT 239 select DMA_COHERENT
240 select SYS_SUPPORTS_SMP
241 select SYS_SUPPORTS_NUMA
240 242
241config ARCH_SHMOBILE 243config ARCH_SHMOBILE
242 bool 244 bool
@@ -453,18 +455,12 @@ config CPU_SUBTYPE_SH7786
453 select CPU_SH4A 455 select CPU_SH4A
454 select CPU_SHX3 456 select CPU_SHX3
455 select CPU_HAS_PTEAEX 457 select CPU_HAS_PTEAEX
456 select ARCH_SPARSEMEM_ENABLE
457 select SYS_SUPPORTS_NUMA
458 select SYS_SUPPORTS_SMP
459 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 458 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
460 459
461config CPU_SUBTYPE_SHX3 460config CPU_SUBTYPE_SHX3
462 bool "Support SH-X3 processor" 461 bool "Support SH-X3 processor"
463 select CPU_SH4A 462 select CPU_SH4A
464 select CPU_SHX3 463 select CPU_SHX3
465 select ARCH_SPARSEMEM_ENABLE
466 select SYS_SUPPORTS_NUMA
467 select SYS_SUPPORTS_SMP
468 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 464 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
469 465
470# SH4AL-DSP Processor Support 466# SH4AL-DSP Processor Support
@@ -634,7 +630,7 @@ config KEXEC
634 630
635config CRASH_DUMP 631config CRASH_DUMP
636 bool "kernel crash dumps (EXPERIMENTAL)" 632 bool "kernel crash dumps (EXPERIMENTAL)"
637 depends on SUPERH32 && EXPERIMENTAL 633 depends on SUPERH32 && EXPERIMENTAL && BROKEN_ON_SMP
638 help 634 help
639 Generate crash dump after being started by kexec. 635 Generate crash dump after being started by kexec.
640 This should be normally only set in special crash dump kernels 636 This should be normally only set in special crash dump kernels
@@ -706,6 +702,13 @@ config NR_CPUS
706 This is purely to save memory - each supported CPU adds 702 This is purely to save memory - each supported CPU adds
707 approximately eight kilobytes to the kernel image. 703 approximately eight kilobytes to the kernel image.
708 704
705config HOTPLUG_CPU
706 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
707 depends on SMP && HOTPLUG && EXPERIMENTAL
708 help
709 Say Y here to experiment with turning CPUs off and on. CPUs
710 can be controlled through /sys/devices/system/cpu.
711
709source "kernel/Kconfig.preempt" 712source "kernel/Kconfig.preempt"
710 713
711config GUSA 714config GUSA
@@ -732,6 +735,8 @@ config GUSA_RB
732 LLSC, this should be more efficient than the other alternative of 735 LLSC, this should be more efficient than the other alternative of
733 disabling interrupts around the atomic sequence. 736 disabling interrupts around the atomic sequence.
734 737
738source "drivers/sh/Kconfig"
739
735endmenu 740endmenu
736 741
737menu "Boot options" 742menu "Boot options"
@@ -863,4 +868,20 @@ source "security/Kconfig"
863 868
864source "crypto/Kconfig" 869source "crypto/Kconfig"
865 870
871menuconfig VIRTUALIZATION
872 bool "Virtualization"
873 default n
874 ---help---
875 Say Y here to get to see options for using your Linux host to run other
876 operating systems inside virtual machines (guests).
877 This option alone does not add any kernel code.
878
879 If you say N, all options in this submenu will be skipped and disabled.
880
881if VIRTUALIZATION
882
883source drivers/virtio/Kconfig
884
885endif # VIRTUALIZATION
886
866source "lib/Kconfig" 887source "lib/Kconfig"
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 588579ac2e35..307b3a4a790b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -83,7 +83,6 @@ defaultimage-$(CONFIG_SH_AP325RXA) := uImage
83defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage 83defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage
84defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux 84defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux
85defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux 85defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux
86defaultimage-$(CONFIG_SH_SDK7786) := vmlinux.bin
87 86
88# Set some sensible Kbuild defaults 87# Set some sensible Kbuild defaults
89KBUILD_IMAGE := $(defaultimage-y) 88KBUILD_IMAGE := $(defaultimage-y)
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index a9bd6e3ee10b..d81c609decc7 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -24,6 +24,7 @@
24#include <cpu/sh7786.h> 24#include <cpu/sh7786.h>
25#include <asm/heartbeat.h> 25#include <asm/heartbeat.h>
26#include <asm/sizes.h> 26#include <asm/sizes.h>
27#include <asm/smp-ops.h>
27 28
28/* 29/*
29 * bit 1234 5678 30 * bit 1234 5678
@@ -203,6 +204,8 @@ static void __init urquell_setup(char **cmdline_p)
203 printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n"); 204 printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n");
204 205
205 pm_power_off = urquell_power_off; 206 pm_power_off = urquell_power_off;
207
208 register_smp_ops(&shx3_smp_ops);
206} 209}
207 210
208/* 211/*
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 6c13b92742e8..62123885a6fa 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -710,8 +710,6 @@ static struct clk_ops fsimck_clk_ops = {
710}; 710};
711 711
712static struct clk fsimckb_clk = { 712static struct clk fsimckb_clk = {
713 .name = "fsimckb_clk",
714 .id = -1,
715 .ops = &fsimck_clk_ops, 713 .ops = &fsimck_clk_ops,
716 .enable_reg = (void __iomem *)FCLKBCR, 714 .enable_reg = (void __iomem *)FCLKBCR,
717 .rate = 0, /* unknown */ 715 .rate = 0, /* unknown */
@@ -1138,16 +1136,20 @@ static int __init arch_setup(void)
1138 1136
1139 /* set SPU2 clock to 83.4 MHz */ 1137 /* set SPU2 clock to 83.4 MHz */
1140 clk = clk_get(NULL, "spu_clk"); 1138 clk = clk_get(NULL, "spu_clk");
1141 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 1139 if (clk) {
1142 clk_put(clk); 1140 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1141 clk_put(clk);
1142 }
1143 1143
1144 /* change parent of FSI B */ 1144 /* change parent of FSI B */
1145 clk = clk_get(NULL, "fsib_clk"); 1145 clk = clk_get(NULL, "fsib_clk");
1146 clk_register(&fsimckb_clk); 1146 if (clk) {
1147 clk_set_parent(clk, &fsimckb_clk); 1147 clk_register(&fsimckb_clk);
1148 clk_set_rate(clk, 11000); 1148 clk_set_parent(clk, &fsimckb_clk);
1149 clk_set_rate(&fsimckb_clk, 11000); 1149 clk_set_rate(clk, 11000);
1150 clk_put(clk); 1150 clk_set_rate(&fsimckb_clk, 11000);
1151 clk_put(clk);
1152 }
1151 1153
1152 gpio_request(GPIO_PTU0, NULL); 1154 gpio_request(GPIO_PTU0, NULL);
1153 gpio_direction_output(GPIO_PTU0, 0); 1155 gpio_direction_output(GPIO_PTU0, 0);
@@ -1159,8 +1161,10 @@ static int __init arch_setup(void)
1159 1161
1160 /* set VPU clock to 166 MHz */ 1162 /* set VPU clock to 166 MHz */
1161 clk = clk_get(NULL, "vpu_clk"); 1163 clk = clk_get(NULL, "vpu_clk");
1162 clk_set_rate(clk, clk_round_rate(clk, 166000000)); 1164 if (clk) {
1163 clk_put(clk); 1165 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1166 clk_put(clk);
1167 }
1164 1168
1165 /* enable IrDA */ 1169 /* enable IrDA */
1166 gpio_request(GPIO_FN_IRDA_OUT, NULL); 1170 gpio_request(GPIO_FN_IRDA_OUT, NULL);
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index affd66747ba3..a5ecfbacaf36 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -14,6 +14,7 @@
14 * for more details. 14 * for more details.
15 */ 15 */
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/io.h>
17#include <linux/platform_device.h> 18#include <linux/platform_device.h>
18#include <linux/ata_platform.h> 19#include <linux/ata_platform.h>
19#include <linux/types.h> 20#include <linux/types.h>
@@ -26,6 +27,7 @@
26#include <net/ax88796.h> 27#include <net/ax88796.h>
27#include <asm/machvec.h> 28#include <asm/machvec.h>
28#include <mach/highlander.h> 29#include <mach/highlander.h>
30#include <asm/clkdev.h>
29#include <asm/clock.h> 31#include <asm/clock.h>
30#include <asm/heartbeat.h> 32#include <asm/heartbeat.h>
31#include <asm/io.h> 33#include <asm/io.h>
@@ -326,7 +328,6 @@ static struct clk_ops ivdr_clk_ops = {
326}; 328};
327 329
328static struct clk ivdr_clk = { 330static struct clk ivdr_clk = {
329 .name = "ivdr_clk",
330 .ops = &ivdr_clk_ops, 331 .ops = &ivdr_clk_ops,
331}; 332};
332 333
@@ -334,6 +335,13 @@ static struct clk *r7780rp_clocks[] = {
334 &ivdr_clk, 335 &ivdr_clk,
335}; 336};
336 337
338#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
339
340static struct clk_lookup lookups[] = {
341 /* main clocks */
342 CLKDEV_CON_ID("ivdr_clk", &ivdr_clk),
343};
344
337static void r7780rp_power_off(void) 345static void r7780rp_power_off(void)
338{ 346{
339 if (mach_is_r7780mp() || mach_is_r7785rp()) 347 if (mach_is_r7780mp() || mach_is_r7785rp())
@@ -370,6 +378,8 @@ static void __init highlander_setup(char **cmdline_p)
370 clk_enable(clk); 378 clk_enable(clk);
371 } 379 }
372 380
381 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
382
373 __raw_writew(0x0000, PA_OBLED); /* Clear LED. */ 383 __raw_writew(0x0000, PA_OBLED); /* Clear LED. */
374 384
375 if (mach_is_r7780rp()) 385 if (mach_is_r7780rp())
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index f094ea2ee783..2ec1ea5cf8ef 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -21,6 +21,7 @@
21#include <asm/heartbeat.h> 21#include <asm/heartbeat.h>
22#include <asm/sizes.h> 22#include <asm/sizes.h>
23#include <asm/reboot.h> 23#include <asm/reboot.h>
24#include <asm/smp-ops.h>
24 25
25static struct resource heartbeat_resource = { 26static struct resource heartbeat_resource = {
26 .start = 0x07fff8b0, 27 .start = 0x07fff8b0,
@@ -165,6 +166,19 @@ static void sdk7786_restart(char *cmd)
165 fpga_write_reg(0xa5a5, SRSTR); 166 fpga_write_reg(0xa5a5, SRSTR);
166} 167}
167 168
169static void sdk7786_power_off(void)
170{
171 fpga_write_reg(fpga_read_reg(PWRCR) | PWRCR_PDWNREQ, PWRCR);
172
173 /*
174 * It can take up to 20us for the R8C to do its job, back off and
175 * wait a bit until we've been shut off. Even though newer FPGA
176 * versions don't set the ACK bit, the latency issue remains.
177 */
178 while ((fpga_read_reg(PWRCR) & PWRCR_PDWNACK) == 0)
179 cpu_sleep();
180}
181
168/* Initialize the board */ 182/* Initialize the board */
169static void __init sdk7786_setup(char **cmdline_p) 183static void __init sdk7786_setup(char **cmdline_p)
170{ 184{
@@ -175,6 +189,9 @@ static void __init sdk7786_setup(char **cmdline_p)
175 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf); 189 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf);
176 190
177 machine_ops.restart = sdk7786_restart; 191 machine_ops.restart = sdk7786_restart;
192 pm_power_off = sdk7786_power_off;
193
194 register_smp_ops(&shx3_smp_ops);
178} 195}
179 196
180/* 197/*
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index ccaa290e9aba..e74ae7b0d8bf 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -276,8 +276,6 @@ static struct clk_ops fsimck_clk_ops = {
276}; 276};
277 277
278static struct clk fsimcka_clk = { 278static struct clk fsimcka_clk = {
279 .name = "fsimcka_clk",
280 .id = -1,
281 .ops = &fsimck_clk_ops, 279 .ops = &fsimck_clk_ops,
282 .enable_reg = (void __iomem *)FCLKACR, 280 .enable_reg = (void __iomem *)FCLKACR,
283 .rate = 0, /* unknown */ 281 .rate = 0, /* unknown */
@@ -771,16 +769,20 @@ static int __init devices_setup(void)
771 769
772 /* set SPU2 clock to 83.4 MHz */ 770 /* set SPU2 clock to 83.4 MHz */
773 clk = clk_get(NULL, "spu_clk"); 771 clk = clk_get(NULL, "spu_clk");
774 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 772 if (clk) {
775 clk_put(clk); 773 clk_set_rate(clk, clk_round_rate(clk, 83333333));
774 clk_put(clk);
775 }
776 776
777 /* change parent of FSI A */ 777 /* change parent of FSI A */
778 clk = clk_get(NULL, "fsia_clk"); 778 clk = clk_get(NULL, "fsia_clk");
779 clk_register(&fsimcka_clk); 779 if (clk) {
780 clk_set_parent(clk, &fsimcka_clk); 780 clk_register(&fsimcka_clk);
781 clk_set_rate(clk, 11000); 781 clk_set_parent(clk, &fsimcka_clk);
782 clk_set_rate(&fsimcka_clk, 11000); 782 clk_set_rate(clk, 11000);
783 clk_put(clk); 783 clk_set_rate(&fsimcka_clk, 11000);
784 clk_put(clk);
785 }
784 786
785 /* SDHI0 connected to cn7 */ 787 /* SDHI0 connected to cn7 */
786 gpio_request(GPIO_FN_SDHI0CD, NULL); 788 gpio_request(GPIO_FN_SDHI0CD, NULL);
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index e284592fd42a..102bf56befb4 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -19,6 +19,7 @@
19#include <linux/usb/r8a66597.h> 19#include <linux/usb/r8a66597.h>
20#include <linux/usb/m66592.h> 20#include <linux/usb/m66592.h>
21#include <asm/ilsel.h> 21#include <asm/ilsel.h>
22#include <asm/smp-ops.h>
22 23
23static struct resource heartbeat_resources[] = { 24static struct resource heartbeat_resources[] = {
24 [0] = { 25 [0] = {
@@ -152,7 +153,13 @@ static void __init x3proto_init_irq(void)
152 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000); 153 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
153} 154}
154 155
156static void __init x3proto_setup(char **cmdline_p)
157{
158 register_smp_ops(&shx3_smp_ops);
159}
160
155static struct sh_machine_vector mv_x3proto __initmv = { 161static struct sh_machine_vector mv_x3proto __initmv = {
156 .mv_name = "x3proto", 162 .mv_name = "x3proto",
163 .mv_setup = x3proto_setup,
157 .mv_init_irq = x3proto_init_irq, 164 .mv_init_irq = x3proto_init_irq,
158}; 165};
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 5d660b90943b..cfa5a087a886 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -14,10 +14,16 @@ OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
14# 14#
15# IMAGE_OFFSET is the load offset of the compression loader 15# IMAGE_OFFSET is the load offset of the compression loader
16# 16#
17ifeq ($(CONFIG_32BIT),y)
18IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
19 $$[$(CONFIG_MEMORY_START) + \
20 $(CONFIG_BOOT_LINK_OFFSET)]')
21else
17IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \ 22IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
18 $$[$(CONFIG_PAGE_OFFSET) + \ 23 $$[$(CONFIG_PAGE_OFFSET) + \
19 $(KERNEL_MEMORY) + \ 24 $(KERNEL_MEMORY) + \
20 $(CONFIG_BOOT_LINK_OFFSET)]') 25 $(CONFIG_BOOT_LINK_OFFSET)]')
26endif
21 27
22LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) 28LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
23 29
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 02a30935f0b9..200c1d4f1efe 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -97,7 +97,11 @@ init_stack_addr:
97decompress_kernel_addr: 97decompress_kernel_addr:
98 .long decompress_kernel 98 .long decompress_kernel
99kernel_start_addr: 99kernel_start_addr:
100#ifdef CONFIG_32BIT
101 .long ___pa(_text+PAGE_SIZE)
102#else
100 .long _text+PAGE_SIZE 103 .long _text+PAGE_SIZE
104#endif
101 105
102 .align 9 106 .align 9
103fake_headers_as_bzImage: 107fake_headers_as_bzImage:
diff --git a/arch/sh/configs/ap325rxa_defconfig b/arch/sh/configs/ap325rxa_defconfig
index 8931a60e37a4..7fefa2b9e28c 100644
--- a/arch/sh/configs/ap325rxa_defconfig
+++ b/arch/sh/configs/ap325rxa_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:10:59 2010 4# Tue May 18 15:04:35 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION=""
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -71,11 +74,6 @@ CONFIG_RCU_FANOUT=32
71# CONFIG_TREE_RCU_TRACE is not set 74# CONFIG_TREE_RCU_TRACE is not set
72# CONFIG_IKCONFIG is not set 75# CONFIG_IKCONFIG is not set
73CONFIG_LOG_BUF_SHIFT=14 76CONFIG_LOG_BUF_SHIFT=14
74CONFIG_GROUP_SCHED=y
75CONFIG_FAIR_GROUP_SCHED=y
76# CONFIG_RT_GROUP_SCHED is not set
77CONFIG_USER_SCHED=y
78# CONFIG_CGROUP_SCHED is not set
79# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
80CONFIG_SYSFS_DEPRECATED=y 78CONFIG_SYSFS_DEPRECATED=y
81CONFIG_SYSFS_DEPRECATED_V2=y 79CONFIG_SYSFS_DEPRECATED_V2=y
@@ -107,7 +105,7 @@ CONFIG_PERF_USE_VMALLOC=y
107# 105#
108# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
109# 107#
110# CONFIG_PERF_EVENTS is not set 108CONFIG_PERF_EVENTS=y
111# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
112CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_COMPAT_BRK=y 111CONFIG_COMPAT_BRK=y
@@ -116,13 +114,13 @@ CONFIG_SLAB=y
116# CONFIG_SLOB is not set 114# CONFIG_SLOB is not set
117# CONFIG_PROFILING is not set 115# CONFIG_PROFILING is not set
118CONFIG_HAVE_OPROFILE=y 116CONFIG_HAVE_OPROFILE=y
119CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 117CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 118CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 119CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y 120CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
123CONFIG_HAVE_HW_BREAKPOINT=y
126 124
127# 125#
128# GCOV-based kernel profiling 126# GCOV-based kernel profiling
@@ -237,8 +235,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
237CONFIG_MEMORY_START=0x08000000 235CONFIG_MEMORY_START=0x08000000
238CONFIG_MEMORY_SIZE=0x08000000 236CONFIG_MEMORY_SIZE=0x08000000
239CONFIG_29BIT=y 237CONFIG_29BIT=y
240# CONFIG_PMB_ENABLE is not set 238# CONFIG_PMB is not set
241# CONFIG_X2TLB is not set 239CONFIG_X2TLB=y
242CONFIG_VSYSCALL=y 240CONFIG_VSYSCALL=y
243CONFIG_ARCH_FLATMEM_ENABLE=y 241CONFIG_ARCH_FLATMEM_ENABLE=y
244CONFIG_ARCH_SPARSEMEM_ENABLE=y 242CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -246,6 +244,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
246CONFIG_MAX_ACTIVE_REGIONS=1 244CONFIG_MAX_ACTIVE_REGIONS=1
247CONFIG_ARCH_POPULATES_NODE_MAP=y 245CONFIG_ARCH_POPULATES_NODE_MAP=y
248CONFIG_ARCH_SELECT_MEMORY_MODEL=y 246CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_IOREMAP_FIXED=y
248CONFIG_UNCACHED_MAPPING=y
249CONFIG_PAGE_SIZE_4KB=y 249CONFIG_PAGE_SIZE_4KB=y
250# CONFIG_PAGE_SIZE_8KB is not set 250# CONFIG_PAGE_SIZE_8KB is not set
251# CONFIG_PAGE_SIZE_16KB is not set 251# CONFIG_PAGE_SIZE_16KB is not set
@@ -261,7 +261,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
261CONFIG_SPLIT_PTLOCK_CPUS=4 261CONFIG_SPLIT_PTLOCK_CPUS=4
262# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
263CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
264CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=1
265# CONFIG_KSM is not set 265# CONFIG_KSM is not set
266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
267 267
@@ -335,7 +335,7 @@ CONFIG_SECCOMP=y
335# CONFIG_PREEMPT_VOLUNTARY is not set 335# CONFIG_PREEMPT_VOLUNTARY is not set
336CONFIG_PREEMPT=y 336CONFIG_PREEMPT=y
337CONFIG_GUSA=y 337CONFIG_GUSA=y
338# CONFIG_SPARSE_IRQ is not set 338# CONFIG_INTC_USERIMASK is not set
339 339
340# 340#
341# Boot options 341# Boot options
@@ -371,6 +371,7 @@ CONFIG_SUSPEND=y
371CONFIG_SUSPEND_FREEZER=y 371CONFIG_SUSPEND_FREEZER=y
372# CONFIG_HIBERNATION is not set 372# CONFIG_HIBERNATION is not set
373CONFIG_PM_RUNTIME=y 373CONFIG_PM_RUNTIME=y
374CONFIG_PM_OPS=y
374# CONFIG_CPU_IDLE is not set 375# CONFIG_CPU_IDLE is not set
375CONFIG_NET=y 376CONFIG_NET=y
376 377
@@ -378,7 +379,6 @@ CONFIG_NET=y
378# Networking options 379# Networking options
379# 380#
380CONFIG_PACKET=y 381CONFIG_PACKET=y
381# CONFIG_PACKET_MMAP is not set
382CONFIG_UNIX=y 382CONFIG_UNIX=y
383# CONFIG_NET_KEY is not set 383# CONFIG_NET_KEY is not set
384CONFIG_INET=y 384CONFIG_INET=y
@@ -594,6 +594,7 @@ CONFIG_MISC_DEVICES=y
594# CONFIG_ICS932S401 is not set 594# CONFIG_ICS932S401 is not set
595# CONFIG_ENCLOSURE_SERVICES is not set 595# CONFIG_ENCLOSURE_SERVICES is not set
596# CONFIG_ISL29003 is not set 596# CONFIG_ISL29003 is not set
597# CONFIG_SENSORS_TSL2550 is not set
597# CONFIG_DS1682 is not set 598# CONFIG_DS1682 is not set
598# CONFIG_TI_DAC7512 is not set 599# CONFIG_TI_DAC7512 is not set
599# CONFIG_C2PORT is not set 600# CONFIG_C2PORT is not set
@@ -613,6 +614,7 @@ CONFIG_HAVE_IDE=y
613# 614#
614# SCSI device support 615# SCSI device support
615# 616#
617CONFIG_SCSI_MOD=y
616# CONFIG_RAID_ATTRS is not set 618# CONFIG_RAID_ATTRS is not set
617CONFIG_SCSI=y 619CONFIG_SCSI=y
618CONFIG_SCSI_DMA=y 620CONFIG_SCSI_DMA=y
@@ -774,6 +776,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
774CONFIG_SERIAL_SH_SCI_CONSOLE=y 776CONFIG_SERIAL_SH_SCI_CONSOLE=y
775CONFIG_SERIAL_CORE=y 777CONFIG_SERIAL_CORE=y
776CONFIG_SERIAL_CORE_CONSOLE=y 778CONFIG_SERIAL_CORE_CONSOLE=y
779# CONFIG_SERIAL_TIMBERDALE is not set
777CONFIG_UNIX98_PTYS=y 780CONFIG_UNIX98_PTYS=y
778# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 781# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
779CONFIG_LEGACY_PTYS=y 782CONFIG_LEGACY_PTYS=y
@@ -802,6 +805,7 @@ CONFIG_I2C_HELPER_AUTO=y
802# CONFIG_I2C_OCORES is not set 805# CONFIG_I2C_OCORES is not set
803CONFIG_I2C_SH_MOBILE=y 806CONFIG_I2C_SH_MOBILE=y
804# CONFIG_I2C_SIMTEC is not set 807# CONFIG_I2C_SIMTEC is not set
808# CONFIG_I2C_XILINX is not set
805 809
806# 810#
807# External I2C/SMBus adapter drivers 811# External I2C/SMBus adapter drivers
@@ -814,15 +818,9 @@ CONFIG_I2C_SH_MOBILE=y
814# 818#
815# CONFIG_I2C_PCA_PLATFORM is not set 819# CONFIG_I2C_PCA_PLATFORM is not set
816# CONFIG_I2C_STUB is not set 820# CONFIG_I2C_STUB is not set
817
818#
819# Miscellaneous I2C Chip support
820#
821# CONFIG_SENSORS_TSL2550 is not set
822# CONFIG_I2C_DEBUG_CORE is not set 821# CONFIG_I2C_DEBUG_CORE is not set
823# CONFIG_I2C_DEBUG_ALGO is not set 822# CONFIG_I2C_DEBUG_ALGO is not set
824# CONFIG_I2C_DEBUG_BUS is not set 823# CONFIG_I2C_DEBUG_BUS is not set
825# CONFIG_I2C_DEBUG_CHIP is not set
826CONFIG_SPI=y 824CONFIG_SPI=y
827CONFIG_SPI_MASTER=y 825CONFIG_SPI_MASTER=y
828 826
@@ -853,13 +851,16 @@ CONFIG_GPIOLIB=y
853# 851#
854# Memory mapped GPIO expanders: 852# Memory mapped GPIO expanders:
855# 853#
854# CONFIG_GPIO_IT8761E is not set
856 855
857# 856#
858# I2C GPIO expanders: 857# I2C GPIO expanders:
859# 858#
859# CONFIG_GPIO_MAX7300 is not set
860# CONFIG_GPIO_MAX732X is not set 860# CONFIG_GPIO_MAX732X is not set
861# CONFIG_GPIO_PCA953X is not set 861# CONFIG_GPIO_PCA953X is not set
862# CONFIG_GPIO_PCF857X is not set 862# CONFIG_GPIO_PCF857X is not set
863# CONFIG_GPIO_ADP5588 is not set
863 864
864# 865#
865# PCI GPIO expanders: 866# PCI GPIO expanders:
@@ -891,22 +892,25 @@ CONFIG_SSB_POSSIBLE=y
891# Multifunction device drivers 892# Multifunction device drivers
892# 893#
893# CONFIG_MFD_CORE is not set 894# CONFIG_MFD_CORE is not set
895# CONFIG_MFD_88PM860X is not set
894# CONFIG_MFD_SM501 is not set 896# CONFIG_MFD_SM501 is not set
895# CONFIG_MFD_SH_MOBILE_SDHI is not set 897# CONFIG_MFD_SH_MOBILE_SDHI is not set
896# CONFIG_HTC_PASIC3 is not set 898# CONFIG_HTC_PASIC3 is not set
899# CONFIG_HTC_I2CPLD is not set
897# CONFIG_TPS65010 is not set 900# CONFIG_TPS65010 is not set
898# CONFIG_TWL4030_CORE is not set 901# CONFIG_TWL4030_CORE is not set
899# CONFIG_MFD_TMIO is not set 902# CONFIG_MFD_TMIO is not set
900# CONFIG_PMIC_DA903X is not set 903# CONFIG_PMIC_DA903X is not set
901# CONFIG_PMIC_ADP5520 is not set 904# CONFIG_PMIC_ADP5520 is not set
905# CONFIG_MFD_MAX8925 is not set
902# CONFIG_MFD_WM8400 is not set 906# CONFIG_MFD_WM8400 is not set
903# CONFIG_MFD_WM831X is not set 907# CONFIG_MFD_WM831X is not set
904# CONFIG_MFD_WM8350_I2C is not set 908# CONFIG_MFD_WM8350_I2C is not set
909# CONFIG_MFD_WM8994 is not set
905# CONFIG_MFD_PCF50633 is not set 910# CONFIG_MFD_PCF50633 is not set
906# CONFIG_MFD_MC13783 is not set 911# CONFIG_MFD_MC13783 is not set
907# CONFIG_AB3100_CORE is not set 912# CONFIG_AB3100_CORE is not set
908# CONFIG_EZX_PCAP is not set 913# CONFIG_EZX_PCAP is not set
909# CONFIG_MFD_88PM8607 is not set
910# CONFIG_AB4500_CORE is not set 914# CONFIG_AB4500_CORE is not set
911# CONFIG_REGULATOR is not set 915# CONFIG_REGULATOR is not set
912CONFIG_MEDIA_SUPPORT=y 916CONFIG_MEDIA_SUPPORT=y
@@ -1041,10 +1045,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1041# MMC/SD/SDIO Host Controller Drivers 1045# MMC/SD/SDIO Host Controller Drivers
1042# 1046#
1043# CONFIG_MMC_SDHCI is not set 1047# CONFIG_MMC_SDHCI is not set
1044# CONFIG_MMC_AT91 is not set
1045# CONFIG_MMC_ATMELMCI is not set
1046CONFIG_MMC_SPI=y 1048CONFIG_MMC_SPI=y
1047# CONFIG_MMC_TMIO is not set
1048# CONFIG_MEMSTICK is not set 1049# CONFIG_MEMSTICK is not set
1049# CONFIG_NEW_LEDS is not set 1050# CONFIG_NEW_LEDS is not set
1050# CONFIG_ACCESSIBILITY is not set 1051# CONFIG_ACCESSIBILITY is not set
@@ -1120,8 +1121,6 @@ CONFIG_RTC_DRV_PCF8563=y
1120CONFIG_UIO=y 1121CONFIG_UIO=y
1121# CONFIG_UIO_PDRV is not set 1122# CONFIG_UIO_PDRV is not set
1122CONFIG_UIO_PDRV_GENIRQ=y 1123CONFIG_UIO_PDRV_GENIRQ=y
1123# CONFIG_UIO_SMX is not set
1124# CONFIG_UIO_SERCOS3 is not set
1125 1124
1126# 1125#
1127# TI VLYNQ 1126# TI VLYNQ
@@ -1206,6 +1205,7 @@ CONFIG_MISC_FILESYSTEMS=y
1206# CONFIG_EFS_FS is not set 1205# CONFIG_EFS_FS is not set
1207# CONFIG_JFFS2_FS is not set 1206# CONFIG_JFFS2_FS is not set
1208# CONFIG_UBIFS_FS is not set 1207# CONFIG_UBIFS_FS is not set
1208# CONFIG_LOGFS is not set
1209# CONFIG_CRAMFS is not set 1209# CONFIG_CRAMFS is not set
1210# CONFIG_SQUASHFS is not set 1210# CONFIG_SQUASHFS is not set
1211# CONFIG_VXFS_FS is not set 1211# CONFIG_VXFS_FS is not set
@@ -1234,6 +1234,7 @@ CONFIG_SUNRPC=y
1234# CONFIG_RPCSEC_GSS_KRB5 is not set 1234# CONFIG_RPCSEC_GSS_KRB5 is not set
1235# CONFIG_RPCSEC_GSS_SPKM3 is not set 1235# CONFIG_RPCSEC_GSS_SPKM3 is not set
1236# CONFIG_SMB_FS is not set 1236# CONFIG_SMB_FS is not set
1237# CONFIG_CEPH_FS is not set
1237# CONFIG_CIFS is not set 1238# CONFIG_CIFS is not set
1238# CONFIG_NCP_FS is not set 1239# CONFIG_NCP_FS is not set
1239# CONFIG_CODA_FS is not set 1240# CONFIG_CODA_FS is not set
@@ -1426,6 +1427,7 @@ CONFIG_CRYPTO_CBC=y
1426# 1427#
1427# CONFIG_CRYPTO_ANSI_CPRNG is not set 1428# CONFIG_CRYPTO_ANSI_CPRNG is not set
1428CONFIG_CRYPTO_HW=y 1429CONFIG_CRYPTO_HW=y
1430# CONFIG_VIRTUALIZATION is not set
1429# CONFIG_BINARY_PRINTF is not set 1431# CONFIG_BINARY_PRINTF is not set
1430 1432
1431# 1433#
diff --git a/arch/sh/configs/cayman_defconfig b/arch/sh/configs/cayman_defconfig
index 92589a950d07..edae0a6830da 100644
--- a/arch/sh/configs/cayman_defconfig
+++ b/arch/sh/configs/cayman_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:14:50 2010 4# Tue May 18 18:01:02 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7# CONFIG_SUPERH32 is not set 7# CONFIG_SUPERH32 is not set
@@ -13,7 +13,6 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
18# CONFIG_GENERIC_GPIO is not set 17# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 18CONFIG_GENERIC_TIME=y
@@ -32,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
37 37
@@ -47,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
47CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 55CONFIG_SWAP=y
54# CONFIG_SYSVIPC is not set 56# CONFIG_SYSVIPC is not set
55CONFIG_POSIX_MQUEUE=y 57CONFIG_POSIX_MQUEUE=y
@@ -70,7 +72,6 @@ CONFIG_RCU_FANOUT=32
70# CONFIG_TREE_RCU_TRACE is not set 72# CONFIG_TREE_RCU_TRACE is not set
71# CONFIG_IKCONFIG is not set 73# CONFIG_IKCONFIG is not set
72CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
73# CONFIG_GROUP_SCHED is not set
74# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
75CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
76CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -114,7 +115,6 @@ CONFIG_SLAB=y
114# CONFIG_SLOB is not set 115# CONFIG_SLOB is not set
115# CONFIG_PROFILING is not set 116# CONFIG_PROFILING is not set
116CONFIG_HAVE_OPROFILE=y 117CONFIG_HAVE_OPROFILE=y
117CONFIG_HAVE_IOREMAP_PROT=y
118CONFIG_HAVE_ARCH_TRACEHOOK=y 118CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_DMA_ATTRS=y 119CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 120CONFIG_HAVE_CLK=y
@@ -204,6 +204,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
204CONFIG_MAX_ACTIVE_REGIONS=1 204CONFIG_MAX_ACTIVE_REGIONS=1
205CONFIG_ARCH_POPULATES_NODE_MAP=y 205CONFIG_ARCH_POPULATES_NODE_MAP=y
206CONFIG_ARCH_SELECT_MEMORY_MODEL=y 206CONFIG_ARCH_SELECT_MEMORY_MODEL=y
207CONFIG_IOREMAP_FIXED=y
207CONFIG_PAGE_SIZE_4KB=y 208CONFIG_PAGE_SIZE_4KB=y
208# CONFIG_PAGE_SIZE_8KB is not set 209# CONFIG_PAGE_SIZE_8KB is not set
209# CONFIG_PAGE_SIZE_16KB is not set 210# CONFIG_PAGE_SIZE_16KB is not set
@@ -225,7 +226,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
225CONFIG_SPLIT_PTLOCK_CPUS=4 226CONFIG_SPLIT_PTLOCK_CPUS=4
226# CONFIG_PHYS_ADDR_T_64BIT is not set 227# CONFIG_PHYS_ADDR_T_64BIT is not set
227CONFIG_ZONE_DMA_FLAG=0 228CONFIG_ZONE_DMA_FLAG=0
228CONFIG_NR_QUICK=2 229CONFIG_NR_QUICK=1
229# CONFIG_KSM is not set 230# CONFIG_KSM is not set
230CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 231CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
231 232
@@ -294,7 +295,6 @@ CONFIG_HZ=250
294# CONFIG_PREEMPT_NONE is not set 295# CONFIG_PREEMPT_NONE is not set
295# CONFIG_PREEMPT_VOLUNTARY is not set 296# CONFIG_PREEMPT_VOLUNTARY is not set
296CONFIG_PREEMPT=y 297CONFIG_PREEMPT=y
297# CONFIG_SPARSE_IRQ is not set
298 298
299# 299#
300# Boot options 300# Boot options
@@ -309,9 +309,9 @@ CONFIG_ENTRY_OFFSET=0x00001000
309# Bus options 309# Bus options
310# 310#
311CONFIG_PCI=y 311CONFIG_PCI=y
312CONFIG_PCI_DOMAINS=y
312# CONFIG_PCIEPORTBUS is not set 313# CONFIG_PCIEPORTBUS is not set
313# CONFIG_ARCH_SUPPORTS_MSI is not set 314# CONFIG_ARCH_SUPPORTS_MSI is not set
314CONFIG_PCI_LEGACY=y
315# CONFIG_PCI_DEBUG is not set 315# CONFIG_PCI_DEBUG is not set
316# CONFIG_PCI_STUB is not set 316# CONFIG_PCI_STUB is not set
317# CONFIG_PCI_IOV is not set 317# CONFIG_PCI_IOV is not set
@@ -337,7 +337,6 @@ CONFIG_NET=y
337# Networking options 337# Networking options
338# 338#
339CONFIG_PACKET=y 339CONFIG_PACKET=y
340# CONFIG_PACKET_MMAP is not set
341CONFIG_UNIX=y 340CONFIG_UNIX=y
342CONFIG_XFRM=y 341CONFIG_XFRM=y
343# CONFIG_XFRM_USER is not set 342# CONFIG_XFRM_USER is not set
@@ -463,6 +462,7 @@ CONFIG_MISC_DEVICES=y
463# CONFIG_ENCLOSURE_SERVICES is not set 462# CONFIG_ENCLOSURE_SERVICES is not set
464# CONFIG_HP_ILO is not set 463# CONFIG_HP_ILO is not set
465# CONFIG_ISL29003 is not set 464# CONFIG_ISL29003 is not set
465# CONFIG_SENSORS_TSL2550 is not set
466# CONFIG_DS1682 is not set 466# CONFIG_DS1682 is not set
467# CONFIG_C2PORT is not set 467# CONFIG_C2PORT is not set
468 468
@@ -480,6 +480,7 @@ CONFIG_HAVE_IDE=y
480# 480#
481# SCSI device support 481# SCSI device support
482# 482#
483CONFIG_SCSI_MOD=y
483# CONFIG_RAID_ATTRS is not set 484# CONFIG_RAID_ATTRS is not set
484CONFIG_SCSI=y 485CONFIG_SCSI=y
485CONFIG_SCSI_DMA=y 486CONFIG_SCSI_DMA=y
@@ -569,7 +570,7 @@ CONFIG_SCSI_LOWLEVEL=y
569# 570#
570 571
571# 572#
572# See the help texts for more information. 573# The newer stack is recommended.
573# 574#
574# CONFIG_FIREWIRE is not set 575# CONFIG_FIREWIRE is not set
575# CONFIG_IEEE1394 is not set 576# CONFIG_IEEE1394 is not set
@@ -638,6 +639,8 @@ CONFIG_NETDEV_10000=y
638# CONFIG_CHELSIO_T1 is not set 639# CONFIG_CHELSIO_T1 is not set
639CONFIG_CHELSIO_T3_DEPENDS=y 640CONFIG_CHELSIO_T3_DEPENDS=y
640# CONFIG_CHELSIO_T3 is not set 641# CONFIG_CHELSIO_T3 is not set
642CONFIG_CHELSIO_T4_DEPENDS=y
643# CONFIG_CHELSIO_T4 is not set
641# CONFIG_ENIC is not set 644# CONFIG_ENIC is not set
642# CONFIG_IXGBE is not set 645# CONFIG_IXGBE is not set
643# CONFIG_IXGB is not set 646# CONFIG_IXGB is not set
@@ -650,6 +653,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
650# CONFIG_MLX4_CORE is not set 653# CONFIG_MLX4_CORE is not set
651# CONFIG_TEHUTI is not set 654# CONFIG_TEHUTI is not set
652# CONFIG_BNX2X is not set 655# CONFIG_BNX2X is not set
656# CONFIG_QLCNIC is not set
653# CONFIG_QLGE is not set 657# CONFIG_QLGE is not set
654# CONFIG_SFC is not set 658# CONFIG_SFC is not set
655# CONFIG_BE2NET is not set 659# CONFIG_BE2NET is not set
@@ -732,6 +736,7 @@ CONFIG_DEVKMEM=y
732# 736#
733# CONFIG_SERIAL_SH_SCI is not set 737# CONFIG_SERIAL_SH_SCI is not set
734# CONFIG_SERIAL_JSM is not set 738# CONFIG_SERIAL_JSM is not set
739# CONFIG_SERIAL_TIMBERDALE is not set
735CONFIG_UNIX98_PTYS=y 740CONFIG_UNIX98_PTYS=y
736# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 741# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
737CONFIG_LEGACY_PTYS=y 742CONFIG_LEGACY_PTYS=y
@@ -779,6 +784,7 @@ CONFIG_I2C_HELPER_AUTO=y
779# CONFIG_I2C_OCORES is not set 784# CONFIG_I2C_OCORES is not set
780# CONFIG_I2C_SH_MOBILE is not set 785# CONFIG_I2C_SH_MOBILE is not set
781# CONFIG_I2C_SIMTEC is not set 786# CONFIG_I2C_SIMTEC is not set
787# CONFIG_I2C_XILINX is not set
782 788
783# 789#
784# External I2C/SMBus adapter drivers 790# External I2C/SMBus adapter drivers
@@ -791,15 +797,9 @@ CONFIG_I2C_HELPER_AUTO=y
791# 797#
792# CONFIG_I2C_PCA_PLATFORM is not set 798# CONFIG_I2C_PCA_PLATFORM is not set
793# CONFIG_I2C_STUB is not set 799# CONFIG_I2C_STUB is not set
794
795#
796# Miscellaneous I2C Chip support
797#
798# CONFIG_SENSORS_TSL2550 is not set
799# CONFIG_I2C_DEBUG_CORE is not set 800# CONFIG_I2C_DEBUG_CORE is not set
800# CONFIG_I2C_DEBUG_ALGO is not set 801# CONFIG_I2C_DEBUG_ALGO is not set
801# CONFIG_I2C_DEBUG_BUS is not set 802# CONFIG_I2C_DEBUG_BUS is not set
802# CONFIG_I2C_DEBUG_CHIP is not set
803# CONFIG_SPI is not set 803# CONFIG_SPI is not set
804 804
805# 805#
@@ -823,10 +823,11 @@ CONFIG_HWMON=y
823# CONFIG_SENSORS_ADM1029 is not set 823# CONFIG_SENSORS_ADM1029 is not set
824# CONFIG_SENSORS_ADM1031 is not set 824# CONFIG_SENSORS_ADM1031 is not set
825# CONFIG_SENSORS_ADM9240 is not set 825# CONFIG_SENSORS_ADM9240 is not set
826# CONFIG_SENSORS_ADT7411 is not set
826# CONFIG_SENSORS_ADT7462 is not set 827# CONFIG_SENSORS_ADT7462 is not set
827# CONFIG_SENSORS_ADT7470 is not set 828# CONFIG_SENSORS_ADT7470 is not set
828# CONFIG_SENSORS_ADT7473 is not set
829# CONFIG_SENSORS_ADT7475 is not set 829# CONFIG_SENSORS_ADT7475 is not set
830# CONFIG_SENSORS_ASC7621 is not set
830# CONFIG_SENSORS_ATXP1 is not set 831# CONFIG_SENSORS_ATXP1 is not set
831# CONFIG_SENSORS_DS1621 is not set 832# CONFIG_SENSORS_DS1621 is not set
832# CONFIG_SENSORS_I5K_AMB is not set 833# CONFIG_SENSORS_I5K_AMB is not set
@@ -863,6 +864,7 @@ CONFIG_HWMON=y
863# CONFIG_SENSORS_SMSC47M192 is not set 864# CONFIG_SENSORS_SMSC47M192 is not set
864# CONFIG_SENSORS_SMSC47B397 is not set 865# CONFIG_SENSORS_SMSC47B397 is not set
865# CONFIG_SENSORS_ADS7828 is not set 866# CONFIG_SENSORS_ADS7828 is not set
867# CONFIG_SENSORS_AMC6821 is not set
866# CONFIG_SENSORS_THMC50 is not set 868# CONFIG_SENSORS_THMC50 is not set
867# CONFIG_SENSORS_TMP401 is not set 869# CONFIG_SENSORS_TMP401 is not set
868# CONFIG_SENSORS_TMP421 is not set 870# CONFIG_SENSORS_TMP421 is not set
@@ -909,9 +911,9 @@ CONFIG_SSB_POSSIBLE=y
909# CONFIG_HTC_PASIC3 is not set 911# CONFIG_HTC_PASIC3 is not set
910# CONFIG_MFD_TMIO is not set 912# CONFIG_MFD_TMIO is not set
911# CONFIG_MFD_WM8400 is not set 913# CONFIG_MFD_WM8400 is not set
912# CONFIG_MFD_WM8350_I2C is not set 914# CONFIG_MFD_WM8994 is not set
913# CONFIG_MFD_PCF50633 is not set 915# CONFIG_MFD_PCF50633 is not set
914# CONFIG_AB3100_CORE is not set 916# CONFIG_LPC_SCH is not set
915# CONFIG_REGULATOR is not set 917# CONFIG_REGULATOR is not set
916# CONFIG_MEDIA_SUPPORT is not set 918# CONFIG_MEDIA_SUPPORT is not set
917 919
@@ -919,6 +921,7 @@ CONFIG_SSB_POSSIBLE=y
919# Graphics support 921# Graphics support
920# 922#
921CONFIG_VGA_ARB=y 923CONFIG_VGA_ARB=y
924CONFIG_VGA_ARB_MAX_GPUS=16
922# CONFIG_DRM is not set 925# CONFIG_DRM is not set
923# CONFIG_VGASTATE is not set 926# CONFIG_VGASTATE is not set
924CONFIG_VIDEO_OUTPUT_CONTROL=y 927CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1125,6 +1128,7 @@ CONFIG_MISC_FILESYSTEMS=y
1125# CONFIG_BEFS_FS is not set 1128# CONFIG_BEFS_FS is not set
1126# CONFIG_BFS_FS is not set 1129# CONFIG_BFS_FS is not set
1127# CONFIG_EFS_FS is not set 1130# CONFIG_EFS_FS is not set
1131# CONFIG_LOGFS is not set
1128# CONFIG_CRAMFS is not set 1132# CONFIG_CRAMFS is not set
1129# CONFIG_SQUASHFS is not set 1133# CONFIG_SQUASHFS is not set
1130# CONFIG_VXFS_FS is not set 1134# CONFIG_VXFS_FS is not set
@@ -1153,6 +1157,7 @@ CONFIG_SUNRPC=y
1153# CONFIG_RPCSEC_GSS_KRB5 is not set 1157# CONFIG_RPCSEC_GSS_KRB5 is not set
1154# CONFIG_RPCSEC_GSS_SPKM3 is not set 1158# CONFIG_RPCSEC_GSS_SPKM3 is not set
1155# CONFIG_SMB_FS is not set 1159# CONFIG_SMB_FS is not set
1160# CONFIG_CEPH_FS is not set
1156# CONFIG_CIFS is not set 1161# CONFIG_CIFS is not set
1157# CONFIG_NCP_FS is not set 1162# CONFIG_NCP_FS is not set
1158# CONFIG_CODA_FS is not set 1163# CONFIG_CODA_FS is not set
@@ -1208,6 +1213,7 @@ CONFIG_SCHEDSTATS=y
1208# CONFIG_TIMER_STATS is not set 1213# CONFIG_TIMER_STATS is not set
1209# CONFIG_DEBUG_OBJECTS is not set 1214# CONFIG_DEBUG_OBJECTS is not set
1210# CONFIG_DEBUG_SLAB is not set 1215# CONFIG_DEBUG_SLAB is not set
1216# CONFIG_DEBUG_KMEMLEAK is not set
1211CONFIG_DEBUG_PREEMPT=y 1217CONFIG_DEBUG_PREEMPT=y
1212# CONFIG_DEBUG_RT_MUTEXES is not set 1218# CONFIG_DEBUG_RT_MUTEXES is not set
1213# CONFIG_RT_MUTEX_TESTER is not set 1219# CONFIG_RT_MUTEX_TESTER is not set
@@ -1234,6 +1240,7 @@ CONFIG_FRAME_POINTER=y
1234# CONFIG_BACKTRACE_SELF_TEST is not set 1240# CONFIG_BACKTRACE_SELF_TEST is not set
1235# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1241# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1236# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1242# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1243# CONFIG_LKDTM is not set
1237# CONFIG_FAULT_INJECTION is not set 1244# CONFIG_FAULT_INJECTION is not set
1238# CONFIG_LATENCYTOP is not set 1245# CONFIG_LATENCYTOP is not set
1239# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1246# CONFIG_SYSCTL_SYSCALL_CHECK is not set
@@ -1361,6 +1368,7 @@ CONFIG_CRYPTO=y
1361# CONFIG_CRYPTO_ANSI_CPRNG is not set 1368# CONFIG_CRYPTO_ANSI_CPRNG is not set
1362CONFIG_CRYPTO_HW=y 1369CONFIG_CRYPTO_HW=y
1363# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1370# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1371# CONFIG_VIRTUALIZATION is not set
1364# CONFIG_BINARY_PRINTF is not set 1372# CONFIG_BINARY_PRINTF is not set
1365 1373
1366# 1374#
diff --git a/arch/sh/configs/dreamcast_defconfig b/arch/sh/configs/dreamcast_defconfig
index 55f652be954b..b96bf3d2cd01 100644
--- a/arch/sh/configs/dreamcast_defconfig
+++ b/arch/sh/configs/dreamcast_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:17:35 2010 4# Tue May 18 15:11:55 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -48,9 +49,11 @@ CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y 49CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y 50CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y 51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
51CONFIG_KERNEL_GZIP=y 53CONFIG_KERNEL_GZIP=y
52# CONFIG_KERNEL_BZIP2 is not set 54# CONFIG_KERNEL_BZIP2 is not set
53# CONFIG_KERNEL_LZMA is not set 55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
54CONFIG_SWAP=y 57CONFIG_SWAP=y
55CONFIG_SYSVIPC=y 58CONFIG_SYSVIPC=y
56CONFIG_SYSVIPC_SYSCTL=y 59CONFIG_SYSVIPC_SYSCTL=y
@@ -72,7 +75,6 @@ CONFIG_RCU_FANOUT=32
72# CONFIG_TREE_RCU_TRACE is not set 75# CONFIG_TREE_RCU_TRACE is not set
73# CONFIG_IKCONFIG is not set 76# CONFIG_IKCONFIG is not set
74CONFIG_LOG_BUF_SHIFT=14 77CONFIG_LOG_BUF_SHIFT=14
75# CONFIG_GROUP_SCHED is not set
76# CONFIG_CGROUPS is not set 78# CONFIG_CGROUPS is not set
77CONFIG_SYSFS_DEPRECATED=y 79CONFIG_SYSFS_DEPRECATED=y
78CONFIG_SYSFS_DEPRECATED_V2=y 80CONFIG_SYSFS_DEPRECATED_V2=y
@@ -124,6 +126,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y 126CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 127CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 128CONFIG_HAVE_DMA_API_DEBUG=y
129CONFIG_HAVE_HW_BREAKPOINT=y
127 130
128# 131#
129# GCOV-based kernel profiling 132# GCOV-based kernel profiling
@@ -242,6 +245,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
242CONFIG_MAX_ACTIVE_REGIONS=1 245CONFIG_MAX_ACTIVE_REGIONS=1
243CONFIG_ARCH_POPULATES_NODE_MAP=y 246CONFIG_ARCH_POPULATES_NODE_MAP=y
244CONFIG_ARCH_SELECT_MEMORY_MODEL=y 247CONFIG_ARCH_SELECT_MEMORY_MODEL=y
248CONFIG_UNCACHED_MAPPING=y
245CONFIG_PAGE_SIZE_4KB=y 249CONFIG_PAGE_SIZE_4KB=y
246# CONFIG_PAGE_SIZE_8KB is not set 250# CONFIG_PAGE_SIZE_8KB is not set
247# CONFIG_PAGE_SIZE_16KB is not set 251# CONFIG_PAGE_SIZE_16KB is not set
@@ -263,7 +267,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
263CONFIG_SPLIT_PTLOCK_CPUS=4 267CONFIG_SPLIT_PTLOCK_CPUS=4
264# CONFIG_PHYS_ADDR_T_64BIT is not set 268# CONFIG_PHYS_ADDR_T_64BIT is not set
265CONFIG_ZONE_DMA_FLAG=0 269CONFIG_ZONE_DMA_FLAG=0
266CONFIG_NR_QUICK=2 270CONFIG_NR_QUICK=1
267# CONFIG_KSM is not set 271# CONFIG_KSM is not set
268CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 272CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
269 273
@@ -360,7 +364,6 @@ CONFIG_SECCOMP=y
360CONFIG_PREEMPT=y 364CONFIG_PREEMPT=y
361CONFIG_GUSA=y 365CONFIG_GUSA=y
362# CONFIG_GUSA_RB is not set 366# CONFIG_GUSA_RB is not set
363# CONFIG_SPARSE_IRQ is not set
364 367
365# 368#
366# Boot options 369# Boot options
@@ -377,9 +380,9 @@ CONFIG_CMDLINE="console=ttySC1,115200 panic=3"
377# 380#
378CONFIG_MAPLE=y 381CONFIG_MAPLE=y
379CONFIG_PCI=y 382CONFIG_PCI=y
383CONFIG_PCI_DOMAINS=y
380# CONFIG_PCIEPORTBUS is not set 384# CONFIG_PCIEPORTBUS is not set
381# CONFIG_ARCH_SUPPORTS_MSI is not set 385# CONFIG_ARCH_SUPPORTS_MSI is not set
382CONFIG_PCI_LEGACY=y
383# CONFIG_PCI_STUB is not set 386# CONFIG_PCI_STUB is not set
384# CONFIG_PCI_IOV is not set 387# CONFIG_PCI_IOV is not set
385# CONFIG_PCCARD is not set 388# CONFIG_PCCARD is not set
@@ -404,7 +407,6 @@ CONFIG_NET=y
404# Networking options 407# Networking options
405# 408#
406CONFIG_PACKET=y 409CONFIG_PACKET=y
407# CONFIG_PACKET_MMAP is not set
408CONFIG_UNIX=y 410CONFIG_UNIX=y
409CONFIG_XFRM=y 411CONFIG_XFRM=y
410# CONFIG_XFRM_USER is not set 412# CONFIG_XFRM_USER is not set
@@ -532,6 +534,7 @@ CONFIG_HAVE_IDE=y
532# 534#
533# SCSI device support 535# SCSI device support
534# 536#
537CONFIG_SCSI_MOD=y
535# CONFIG_RAID_ATTRS is not set 538# CONFIG_RAID_ATTRS is not set
536# CONFIG_SCSI is not set 539# CONFIG_SCSI is not set
537# CONFIG_SCSI_DMA is not set 540# CONFIG_SCSI_DMA is not set
@@ -549,7 +552,7 @@ CONFIG_HAVE_IDE=y
549# 552#
550 553
551# 554#
552# See the help texts for more information. 555# The newer stack is recommended.
553# 556#
554# CONFIG_FIREWIRE is not set 557# CONFIG_FIREWIRE is not set
555# CONFIG_IEEE1394 is not set 558# CONFIG_IEEE1394 is not set
@@ -589,6 +592,7 @@ CONFIG_NET_PCI=y
589# CONFIG_PCNET32 is not set 592# CONFIG_PCNET32 is not set
590# CONFIG_AMD8111_ETH is not set 593# CONFIG_AMD8111_ETH is not set
591# CONFIG_ADAPTEC_STARFIRE is not set 594# CONFIG_ADAPTEC_STARFIRE is not set
595# CONFIG_KSZ884X_PCI is not set
592# CONFIG_B44 is not set 596# CONFIG_B44 is not set
593# CONFIG_FORCEDETH is not set 597# CONFIG_FORCEDETH is not set
594# CONFIG_E100 is not set 598# CONFIG_E100 is not set
@@ -717,6 +721,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
717CONFIG_SERIAL_CORE=y 721CONFIG_SERIAL_CORE=y
718CONFIG_SERIAL_CORE_CONSOLE=y 722CONFIG_SERIAL_CORE_CONSOLE=y
719# CONFIG_SERIAL_JSM is not set 723# CONFIG_SERIAL_JSM is not set
724# CONFIG_SERIAL_TIMBERDALE is not set
720CONFIG_UNIX98_PTYS=y 725CONFIG_UNIX98_PTYS=y
721# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 726# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
722CONFIG_LEGACY_PTYS=y 727CONFIG_LEGACY_PTYS=y
@@ -771,6 +776,7 @@ CONFIG_SSB_POSSIBLE=y
771# CONFIG_MFD_SH_MOBILE_SDHI is not set 776# CONFIG_MFD_SH_MOBILE_SDHI is not set
772# CONFIG_HTC_PASIC3 is not set 777# CONFIG_HTC_PASIC3 is not set
773# CONFIG_MFD_TMIO is not set 778# CONFIG_MFD_TMIO is not set
779# CONFIG_LPC_SCH is not set
774# CONFIG_REGULATOR is not set 780# CONFIG_REGULATOR is not set
775# CONFIG_MEDIA_SUPPORT is not set 781# CONFIG_MEDIA_SUPPORT is not set
776 782
@@ -778,6 +784,7 @@ CONFIG_SSB_POSSIBLE=y
778# Graphics support 784# Graphics support
779# 785#
780CONFIG_VGA_ARB=y 786CONFIG_VGA_ARB=y
787CONFIG_VGA_ARB_MAX_GPUS=16
781# CONFIG_DRM is not set 788# CONFIG_DRM is not set
782# CONFIG_VGASTATE is not set 789# CONFIG_VGASTATE is not set
783CONFIG_VIDEO_OUTPUT_CONTROL=m 790CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -918,7 +925,6 @@ CONFIG_RTC_LIB=y
918# CONFIG_EXT2_FS is not set 925# CONFIG_EXT2_FS is not set
919# CONFIG_EXT3_FS is not set 926# CONFIG_EXT3_FS is not set
920# CONFIG_EXT4_FS is not set 927# CONFIG_EXT4_FS is not set
921CONFIG_EXT4_USE_FOR_EXT23=y
922# CONFIG_REISERFS_FS is not set 928# CONFIG_REISERFS_FS is not set
923# CONFIG_JFS_FS is not set 929# CONFIG_JFS_FS is not set
924# CONFIG_FS_POSIX_ACL is not set 930# CONFIG_FS_POSIX_ACL is not set
@@ -976,6 +982,7 @@ CONFIG_MISC_FILESYSTEMS=y
976# CONFIG_BEFS_FS is not set 982# CONFIG_BEFS_FS is not set
977# CONFIG_BFS_FS is not set 983# CONFIG_BFS_FS is not set
978# CONFIG_EFS_FS is not set 984# CONFIG_EFS_FS is not set
985# CONFIG_LOGFS is not set
979# CONFIG_CRAMFS is not set 986# CONFIG_CRAMFS is not set
980# CONFIG_SQUASHFS is not set 987# CONFIG_SQUASHFS is not set
981# CONFIG_VXFS_FS is not set 988# CONFIG_VXFS_FS is not set
@@ -990,6 +997,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
990# CONFIG_NFS_FS is not set 997# CONFIG_NFS_FS is not set
991# CONFIG_NFSD is not set 998# CONFIG_NFSD is not set
992# CONFIG_SMB_FS is not set 999# CONFIG_SMB_FS is not set
1000# CONFIG_CEPH_FS is not set
993# CONFIG_CIFS is not set 1001# CONFIG_CIFS is not set
994# CONFIG_NCP_FS is not set 1002# CONFIG_NCP_FS is not set
995# CONFIG_CODA_FS is not set 1003# CONFIG_CODA_FS is not set
@@ -1135,6 +1143,7 @@ CONFIG_CRYPTO=y
1135# CONFIG_CRYPTO_ANSI_CPRNG is not set 1143# CONFIG_CRYPTO_ANSI_CPRNG is not set
1136CONFIG_CRYPTO_HW=y 1144CONFIG_CRYPTO_HW=y
1137# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1145# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1146# CONFIG_VIRTUALIZATION is not set
1138# CONFIG_BINARY_PRINTF is not set 1147# CONFIG_BINARY_PRINTF is not set
1139 1148
1140# 1149#
diff --git a/arch/sh/configs/ecovec24-romimage_defconfig b/arch/sh/configs/ecovec24-romimage_defconfig
index 662c1ad20494..58aec9dd5630 100644
--- a/arch/sh/configs/ecovec24-romimage_defconfig
+++ b/arch/sh/configs/ecovec24-romimage_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:18:17 2010 4# Tue May 18 15:14:56 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION=""
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54CONFIG_SYSVIPC_SYSCTL=y 57CONFIG_SYSVIPC_SYSCTL=y
@@ -71,11 +74,6 @@ CONFIG_RCU_FANOUT=32
71CONFIG_IKCONFIG=y 74CONFIG_IKCONFIG=y
72CONFIG_IKCONFIG_PROC=y 75CONFIG_IKCONFIG_PROC=y
73CONFIG_LOG_BUF_SHIFT=14 76CONFIG_LOG_BUF_SHIFT=14
74CONFIG_GROUP_SCHED=y
75CONFIG_FAIR_GROUP_SCHED=y
76# CONFIG_RT_GROUP_SCHED is not set
77CONFIG_USER_SCHED=y
78# CONFIG_CGROUP_SCHED is not set
79# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
80CONFIG_SYSFS_DEPRECATED=y 78CONFIG_SYSFS_DEPRECATED=y
81CONFIG_SYSFS_DEPRECATED_V2=y 79CONFIG_SYSFS_DEPRECATED_V2=y
@@ -86,6 +84,7 @@ CONFIG_INITRAMFS_SOURCE=""
86CONFIG_RD_GZIP=y 84CONFIG_RD_GZIP=y
87# CONFIG_RD_BZIP2 is not set 85# CONFIG_RD_BZIP2 is not set
88# CONFIG_RD_LZMA is not set 86# CONFIG_RD_LZMA is not set
87# CONFIG_RD_LZO is not set
89CONFIG_CC_OPTIMIZE_FOR_SIZE=y 88CONFIG_CC_OPTIMIZE_FOR_SIZE=y
90CONFIG_SYSCTL=y 89CONFIG_SYSCTL=y
91CONFIG_ANON_INODES=y 90CONFIG_ANON_INODES=y
@@ -111,7 +110,7 @@ CONFIG_PERF_USE_VMALLOC=y
111# 110#
112# Kernel Performance Events And Counters 111# Kernel Performance Events And Counters
113# 112#
114# CONFIG_PERF_EVENTS is not set 113CONFIG_PERF_EVENTS=y
115# CONFIG_PERF_COUNTERS is not set 114# CONFIG_PERF_COUNTERS is not set
116CONFIG_VM_EVENT_COUNTERS=y 115CONFIG_VM_EVENT_COUNTERS=y
117CONFIG_COMPAT_BRK=y 116CONFIG_COMPAT_BRK=y
@@ -120,13 +119,13 @@ CONFIG_SLAB=y
120# CONFIG_SLOB is not set 119# CONFIG_SLOB is not set
121# CONFIG_PROFILING is not set 120# CONFIG_PROFILING is not set
122CONFIG_HAVE_OPROFILE=y 121CONFIG_HAVE_OPROFILE=y
123CONFIG_HAVE_IOREMAP_PROT=y
124CONFIG_HAVE_KPROBES=y 122CONFIG_HAVE_KPROBES=y
125CONFIG_HAVE_KRETPROBES=y 123CONFIG_HAVE_KRETPROBES=y
126CONFIG_HAVE_ARCH_TRACEHOOK=y 124CONFIG_HAVE_ARCH_TRACEHOOK=y
127CONFIG_HAVE_DMA_ATTRS=y 125CONFIG_HAVE_DMA_ATTRS=y
128CONFIG_HAVE_CLK=y 126CONFIG_HAVE_CLK=y
129CONFIG_HAVE_DMA_API_DEBUG=y 127CONFIG_HAVE_DMA_API_DEBUG=y
128CONFIG_HAVE_HW_BREAKPOINT=y
130 129
131# 130#
132# GCOV-based kernel profiling 131# GCOV-based kernel profiling
@@ -237,8 +236,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
237CONFIG_MEMORY_START=0x08000000 236CONFIG_MEMORY_START=0x08000000
238CONFIG_MEMORY_SIZE=0x10000000 237CONFIG_MEMORY_SIZE=0x10000000
239CONFIG_29BIT=y 238CONFIG_29BIT=y
240# CONFIG_PMB_ENABLE is not set 239# CONFIG_PMB is not set
241# CONFIG_X2TLB is not set 240CONFIG_X2TLB=y
242CONFIG_VSYSCALL=y 241CONFIG_VSYSCALL=y
243CONFIG_ARCH_FLATMEM_ENABLE=y 242CONFIG_ARCH_FLATMEM_ENABLE=y
244CONFIG_ARCH_SPARSEMEM_ENABLE=y 243CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -246,6 +245,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
246CONFIG_MAX_ACTIVE_REGIONS=1 245CONFIG_MAX_ACTIVE_REGIONS=1
247CONFIG_ARCH_POPULATES_NODE_MAP=y 246CONFIG_ARCH_POPULATES_NODE_MAP=y
248CONFIG_ARCH_SELECT_MEMORY_MODEL=y 247CONFIG_ARCH_SELECT_MEMORY_MODEL=y
248CONFIG_IOREMAP_FIXED=y
249CONFIG_UNCACHED_MAPPING=y
249CONFIG_PAGE_SIZE_4KB=y 250CONFIG_PAGE_SIZE_4KB=y
250# CONFIG_PAGE_SIZE_8KB is not set 251# CONFIG_PAGE_SIZE_8KB is not set
251# CONFIG_PAGE_SIZE_16KB is not set 252# CONFIG_PAGE_SIZE_16KB is not set
@@ -261,7 +262,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
261CONFIG_SPLIT_PTLOCK_CPUS=4 262CONFIG_SPLIT_PTLOCK_CPUS=4
262# CONFIG_PHYS_ADDR_T_64BIT is not set 263# CONFIG_PHYS_ADDR_T_64BIT is not set
263CONFIG_ZONE_DMA_FLAG=0 264CONFIG_ZONE_DMA_FLAG=0
264CONFIG_NR_QUICK=2 265CONFIG_NR_QUICK=1
265# CONFIG_KSM is not set 266# CONFIG_KSM is not set
266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 267CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
267 268
@@ -336,7 +337,7 @@ CONFIG_PREEMPT_NONE=y
336# CONFIG_PREEMPT_VOLUNTARY is not set 337# CONFIG_PREEMPT_VOLUNTARY is not set
337# CONFIG_PREEMPT is not set 338# CONFIG_PREEMPT is not set
338CONFIG_GUSA=y 339CONFIG_GUSA=y
339# CONFIG_SPARSE_IRQ is not set 340# CONFIG_INTC_USERIMASK is not set
340 341
341# 342#
342# Boot options 343# Boot options
@@ -370,6 +371,7 @@ CONFIG_PM=y
370# CONFIG_SUSPEND is not set 371# CONFIG_SUSPEND is not set
371# CONFIG_HIBERNATION is not set 372# CONFIG_HIBERNATION is not set
372CONFIG_PM_RUNTIME=y 373CONFIG_PM_RUNTIME=y
374CONFIG_PM_OPS=y
373# CONFIG_CPU_IDLE is not set 375# CONFIG_CPU_IDLE is not set
374CONFIG_NET=y 376CONFIG_NET=y
375 377
@@ -377,7 +379,6 @@ CONFIG_NET=y
377# Networking options 379# Networking options
378# 380#
379CONFIG_PACKET=y 381CONFIG_PACKET=y
380CONFIG_PACKET_MMAP=y
381CONFIG_UNIX=y 382CONFIG_UNIX=y
382# CONFIG_NET_KEY is not set 383# CONFIG_NET_KEY is not set
383CONFIG_INET=y 384CONFIG_INET=y
@@ -485,6 +486,7 @@ CONFIG_HAVE_IDE=y
485# 486#
486# SCSI device support 487# SCSI device support
487# 488#
489CONFIG_SCSI_MOD=y
488# CONFIG_RAID_ATTRS is not set 490# CONFIG_RAID_ATTRS is not set
489CONFIG_SCSI=y 491CONFIG_SCSI=y
490CONFIG_SCSI_DMA=y 492CONFIG_SCSI_DMA=y
@@ -585,6 +587,7 @@ CONFIG_WLAN=y
585# CONFIG_USB_PEGASUS is not set 587# CONFIG_USB_PEGASUS is not set
586# CONFIG_USB_RTL8150 is not set 588# CONFIG_USB_RTL8150 is not set
587# CONFIG_USB_USBNET is not set 589# CONFIG_USB_USBNET is not set
590# CONFIG_USB_IPHETH is not set
588# CONFIG_WAN is not set 591# CONFIG_WAN is not set
589# CONFIG_PPP is not set 592# CONFIG_PPP is not set
590# CONFIG_SLIP is not set 593# CONFIG_SLIP is not set
@@ -650,6 +653,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
650CONFIG_SERIAL_SH_SCI_CONSOLE=y 653CONFIG_SERIAL_SH_SCI_CONSOLE=y
651CONFIG_SERIAL_CORE=y 654CONFIG_SERIAL_CORE=y
652CONFIG_SERIAL_CORE_CONSOLE=y 655CONFIG_SERIAL_CORE_CONSOLE=y
656# CONFIG_SERIAL_TIMBERDALE is not set
653CONFIG_UNIX98_PTYS=y 657CONFIG_UNIX98_PTYS=y
654# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 658# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
655CONFIG_LEGACY_PTYS=y 659CONFIG_LEGACY_PTYS=y
@@ -678,6 +682,7 @@ CONFIG_I2C_HELPER_AUTO=y
678# CONFIG_I2C_OCORES is not set 682# CONFIG_I2C_OCORES is not set
679CONFIG_I2C_SH_MOBILE=y 683CONFIG_I2C_SH_MOBILE=y
680# CONFIG_I2C_SIMTEC is not set 684# CONFIG_I2C_SIMTEC is not set
685# CONFIG_I2C_XILINX is not set
681 686
682# 687#
683# External I2C/SMBus adapter drivers 688# External I2C/SMBus adapter drivers
@@ -690,15 +695,9 @@ CONFIG_I2C_SH_MOBILE=y
690# Other I2C/SMBus bus drivers 695# Other I2C/SMBus bus drivers
691# 696#
692# CONFIG_I2C_PCA_PLATFORM is not set 697# CONFIG_I2C_PCA_PLATFORM is not set
693
694#
695# Miscellaneous I2C Chip support
696#
697# CONFIG_SENSORS_TSL2550 is not set
698# CONFIG_I2C_DEBUG_CORE is not set 698# CONFIG_I2C_DEBUG_CORE is not set
699# CONFIG_I2C_DEBUG_ALGO is not set 699# CONFIG_I2C_DEBUG_ALGO is not set
700# CONFIG_I2C_DEBUG_BUS is not set 700# CONFIG_I2C_DEBUG_BUS is not set
701# CONFIG_I2C_DEBUG_CHIP is not set
702# CONFIG_SPI is not set 701# CONFIG_SPI is not set
703 702
704# 703#
@@ -712,13 +711,16 @@ CONFIG_GPIO_SYSFS=y
712# 711#
713# Memory mapped GPIO expanders: 712# Memory mapped GPIO expanders:
714# 713#
714# CONFIG_GPIO_IT8761E is not set
715 715
716# 716#
717# I2C GPIO expanders: 717# I2C GPIO expanders:
718# 718#
719# CONFIG_GPIO_MAX7300 is not set
719# CONFIG_GPIO_MAX732X is not set 720# CONFIG_GPIO_MAX732X is not set
720# CONFIG_GPIO_PCA953X is not set 721# CONFIG_GPIO_PCA953X is not set
721# CONFIG_GPIO_PCF857X is not set 722# CONFIG_GPIO_PCF857X is not set
723# CONFIG_GPIO_ADP5588 is not set
722 724
723# 725#
724# PCI GPIO expanders: 726# PCI GPIO expanders:
@@ -747,20 +749,23 @@ CONFIG_SSB_POSSIBLE=y
747# Multifunction device drivers 749# Multifunction device drivers
748# 750#
749# CONFIG_MFD_CORE is not set 751# CONFIG_MFD_CORE is not set
752# CONFIG_MFD_88PM860X is not set
750# CONFIG_MFD_SM501 is not set 753# CONFIG_MFD_SM501 is not set
751# CONFIG_MFD_SH_MOBILE_SDHI is not set 754# CONFIG_MFD_SH_MOBILE_SDHI is not set
752# CONFIG_HTC_PASIC3 is not set 755# CONFIG_HTC_PASIC3 is not set
756# CONFIG_HTC_I2CPLD is not set
753# CONFIG_TPS65010 is not set 757# CONFIG_TPS65010 is not set
754# CONFIG_TWL4030_CORE is not set 758# CONFIG_TWL4030_CORE is not set
755# CONFIG_MFD_TMIO is not set 759# CONFIG_MFD_TMIO is not set
756# CONFIG_PMIC_DA903X is not set 760# CONFIG_PMIC_DA903X is not set
757# CONFIG_PMIC_ADP5520 is not set 761# CONFIG_PMIC_ADP5520 is not set
762# CONFIG_MFD_MAX8925 is not set
758# CONFIG_MFD_WM8400 is not set 763# CONFIG_MFD_WM8400 is not set
759# CONFIG_MFD_WM831X is not set 764# CONFIG_MFD_WM831X is not set
760# CONFIG_MFD_WM8350_I2C is not set 765# CONFIG_MFD_WM8350_I2C is not set
766# CONFIG_MFD_WM8994 is not set
761# CONFIG_MFD_PCF50633 is not set 767# CONFIG_MFD_PCF50633 is not set
762# CONFIG_AB3100_CORE is not set 768# CONFIG_AB3100_CORE is not set
763# CONFIG_MFD_88PM8607 is not set
764# CONFIG_REGULATOR is not set 769# CONFIG_REGULATOR is not set
765# CONFIG_MEDIA_SUPPORT is not set 770# CONFIG_MEDIA_SUPPORT is not set
766 771
@@ -868,7 +873,6 @@ CONFIG_USB_STORAGE=y
868# CONFIG_USB_RIO500 is not set 873# CONFIG_USB_RIO500 is not set
869# CONFIG_USB_LEGOTOWER is not set 874# CONFIG_USB_LEGOTOWER is not set
870# CONFIG_USB_LCD is not set 875# CONFIG_USB_LCD is not set
871# CONFIG_USB_BERRY_CHARGE is not set
872# CONFIG_USB_LED is not set 876# CONFIG_USB_LED is not set
873# CONFIG_USB_CYPRESS_CY7C63 is not set 877# CONFIG_USB_CYPRESS_CY7C63 is not set
874# CONFIG_USB_CYTHERM is not set 878# CONFIG_USB_CYTHERM is not set
@@ -880,7 +884,6 @@ CONFIG_USB_STORAGE=y
880# CONFIG_USB_IOWARRIOR is not set 884# CONFIG_USB_IOWARRIOR is not set
881# CONFIG_USB_TEST is not set 885# CONFIG_USB_TEST is not set
882# CONFIG_USB_ISIGHTFW is not set 886# CONFIG_USB_ISIGHTFW is not set
883# CONFIG_USB_VST is not set
884# CONFIG_USB_GADGET is not set 887# CONFIG_USB_GADGET is not set
885 888
886# 889#
@@ -911,7 +914,6 @@ CONFIG_EXT2_FS=y
911# CONFIG_EXT2_FS_XIP is not set 914# CONFIG_EXT2_FS_XIP is not set
912# CONFIG_EXT3_FS is not set 915# CONFIG_EXT3_FS is not set
913# CONFIG_EXT4_FS is not set 916# CONFIG_EXT4_FS is not set
914CONFIG_EXT4_USE_FOR_EXT23=y
915# CONFIG_REISERFS_FS is not set 917# CONFIG_REISERFS_FS is not set
916# CONFIG_JFS_FS is not set 918# CONFIG_JFS_FS is not set
917# CONFIG_FS_POSIX_ACL is not set 919# CONFIG_FS_POSIX_ACL is not set
@@ -1027,6 +1029,7 @@ CONFIG_DEBUG_FS=y
1027CONFIG_DEBUG_BUGVERBOSE=y 1029CONFIG_DEBUG_BUGVERBOSE=y
1028# CONFIG_DEBUG_MEMORY_INIT is not set 1030# CONFIG_DEBUG_MEMORY_INIT is not set
1029# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1031# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1032# CONFIG_LKDTM is not set
1030# CONFIG_LATENCYTOP is not set 1033# CONFIG_LATENCYTOP is not set
1031# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1034# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1032CONFIG_HAVE_FUNCTION_TRACER=y 1035CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1056,6 +1059,7 @@ CONFIG_HAVE_ARCH_KGDB=y
1056CONFIG_DEFAULT_SECURITY_DAC=y 1059CONFIG_DEFAULT_SECURITY_DAC=y
1057CONFIG_DEFAULT_SECURITY="" 1060CONFIG_DEFAULT_SECURITY=""
1058# CONFIG_CRYPTO is not set 1061# CONFIG_CRYPTO is not set
1062# CONFIG_VIRTUALIZATION is not set
1059# CONFIG_BINARY_PRINTF is not set 1063# CONFIG_BINARY_PRINTF is not set
1060 1064
1061# 1065#
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index 6041c66dd10e..67c665671c6c 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Mar 29 02:21:58 2010 4# Tue May 18 15:17:28 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -336,6 +336,7 @@ CONFIG_SECCOMP=y
336# CONFIG_PREEMPT_VOLUNTARY is not set 336# CONFIG_PREEMPT_VOLUNTARY is not set
337CONFIG_PREEMPT=y 337CONFIG_PREEMPT=y
338CONFIG_GUSA=y 338CONFIG_GUSA=y
339# CONFIG_INTC_USERIMASK is not set
339 340
340# 341#
341# Boot options 342# Boot options
@@ -762,6 +763,7 @@ CONFIG_WLAN=y
762# CONFIG_USB_PEGASUS is not set 763# CONFIG_USB_PEGASUS is not set
763# CONFIG_USB_RTL8150 is not set 764# CONFIG_USB_RTL8150 is not set
764# CONFIG_USB_USBNET is not set 765# CONFIG_USB_USBNET is not set
766# CONFIG_USB_IPHETH is not set
765# CONFIG_WAN is not set 767# CONFIG_WAN is not set
766# CONFIG_PPP is not set 768# CONFIG_PPP is not set
767# CONFIG_SLIP is not set 769# CONFIG_SLIP is not set
@@ -1755,6 +1757,7 @@ CONFIG_CRYPTO_CBC=y
1755# 1757#
1756# CONFIG_CRYPTO_ANSI_CPRNG is not set 1758# CONFIG_CRYPTO_ANSI_CPRNG is not set
1757CONFIG_CRYPTO_HW=y 1759CONFIG_CRYPTO_HW=y
1760# CONFIG_VIRTUALIZATION is not set
1758# CONFIG_BINARY_PRINTF is not set 1761# CONFIG_BINARY_PRINTF is not set
1759 1762
1760# 1763#
diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig
index 72f8718dd738..0883d873ea64 100644
--- a/arch/sh/configs/edosk7705_defconfig
+++ b/arch/sh/configs/edosk7705_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:24:26 2010 4# Tue May 18 15:21:52 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -12,8 +12,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_IRQ_PER_CPU=y 15CONFIG_IRQ_PER_CPU=y
16CONFIG_SPARSE_IRQ=y
17# CONFIG_GENERIC_GPIO is not set 17# CONFIG_GENERIC_GPIO is not set
18CONFIG_GENERIC_TIME=y 18CONFIG_GENERIC_TIME=y
19CONFIG_GENERIC_CLOCKEVENTS=y 19CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,6 +29,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
29CONFIG_ARCH_HAS_DEFAULT_IDLE=y 29CONFIG_ARCH_HAS_DEFAULT_IDLE=y
30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
31CONFIG_DMA_NONCOHERENT=y 31CONFIG_DMA_NONCOHERENT=y
32CONFIG_NEED_DMA_MAP_STATE=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -43,9 +44,11 @@ CONFIG_LOCALVERSION=""
43CONFIG_HAVE_KERNEL_GZIP=y 44CONFIG_HAVE_KERNEL_GZIP=y
44CONFIG_HAVE_KERNEL_BZIP2=y 45CONFIG_HAVE_KERNEL_BZIP2=y
45CONFIG_HAVE_KERNEL_LZMA=y 46CONFIG_HAVE_KERNEL_LZMA=y
47CONFIG_HAVE_KERNEL_LZO=y
46CONFIG_KERNEL_GZIP=y 48CONFIG_KERNEL_GZIP=y
47# CONFIG_KERNEL_BZIP2 is not set 49# CONFIG_KERNEL_BZIP2 is not set
48# CONFIG_KERNEL_LZMA is not set 50# CONFIG_KERNEL_LZMA is not set
51# CONFIG_KERNEL_LZO is not set
49# CONFIG_SYSVIPC is not set 52# CONFIG_SYSVIPC is not set
50# CONFIG_BSD_PROCESS_ACCT is not set 53# CONFIG_BSD_PROCESS_ACCT is not set
51 54
@@ -61,11 +64,11 @@ CONFIG_RCU_FANOUT=32
61# CONFIG_TREE_RCU_TRACE is not set 64# CONFIG_TREE_RCU_TRACE is not set
62# CONFIG_IKCONFIG is not set 65# CONFIG_IKCONFIG is not set
63CONFIG_LOG_BUF_SHIFT=17 66CONFIG_LOG_BUF_SHIFT=17
64# CONFIG_CGROUPS is not set
65# CONFIG_RELAY is not set 67# CONFIG_RELAY is not set
66# CONFIG_NAMESPACES is not set 68# CONFIG_NAMESPACES is not set
67# CONFIG_BLK_DEV_INITRD is not set 69# CONFIG_BLK_DEV_INITRD is not set
68# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 70# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
71CONFIG_ANON_INODES=y
69CONFIG_EMBEDDED=y 72CONFIG_EMBEDDED=y
70# CONFIG_UID16 is not set 73# CONFIG_UID16 is not set
71# CONFIG_KALLSYMS is not set 74# CONFIG_KALLSYMS is not set
@@ -87,7 +90,7 @@ CONFIG_PERF_USE_VMALLOC=y
87# 90#
88# Kernel Performance Events And Counters 91# Kernel Performance Events And Counters
89# 92#
90# CONFIG_PERF_EVENTS is not set 93CONFIG_PERF_EVENTS=y
91# CONFIG_PERF_COUNTERS is not set 94# CONFIG_PERF_COUNTERS is not set
92# CONFIG_VM_EVENT_COUNTERS is not set 95# CONFIG_VM_EVENT_COUNTERS is not set
93# CONFIG_COMPAT_BRK is not set 96# CONFIG_COMPAT_BRK is not set
@@ -103,6 +106,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
103CONFIG_HAVE_DMA_ATTRS=y 106CONFIG_HAVE_DMA_ATTRS=y
104CONFIG_HAVE_CLK=y 107CONFIG_HAVE_CLK=y
105CONFIG_HAVE_DMA_API_DEBUG=y 108CONFIG_HAVE_DMA_API_DEBUG=y
109CONFIG_HAVE_HW_BREAKPOINT=y
106 110
107# 111#
108# GCOV-based kernel profiling 112# GCOV-based kernel profiling
@@ -202,6 +206,7 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
202CONFIG_ARCH_SELECT_MEMORY_MODEL=y 206CONFIG_ARCH_SELECT_MEMORY_MODEL=y
203CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 207CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
204CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 208CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
209CONFIG_UNCACHED_MAPPING=y
205CONFIG_PAGE_SIZE_4KB=y 210CONFIG_PAGE_SIZE_4KB=y
206# CONFIG_PAGE_SIZE_8KB is not set 211# CONFIG_PAGE_SIZE_8KB is not set
207# CONFIG_PAGE_SIZE_16KB is not set 212# CONFIG_PAGE_SIZE_16KB is not set
@@ -217,7 +222,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
217CONFIG_MIGRATION=y 222CONFIG_MIGRATION=y
218# CONFIG_PHYS_ADDR_T_64BIT is not set 223# CONFIG_PHYS_ADDR_T_64BIT is not set
219CONFIG_ZONE_DMA_FLAG=0 224CONFIG_ZONE_DMA_FLAG=0
220CONFIG_NR_QUICK=2 225CONFIG_NR_QUICK=1
221# CONFIG_KSM is not set 226# CONFIG_KSM is not set
222CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 227CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
223 228
@@ -330,6 +335,7 @@ CONFIG_HAVE_IDE=y
330# 335#
331# SCSI device support 336# SCSI device support
332# 337#
338CONFIG_SCSI_MOD=y
333# CONFIG_SCSI_DMA is not set 339# CONFIG_SCSI_DMA is not set
334# CONFIG_SCSI_NETLINK is not set 340# CONFIG_SCSI_NETLINK is not set
335# CONFIG_PHONE is not set 341# CONFIG_PHONE is not set
@@ -361,6 +367,7 @@ CONFIG_HAVE_IDE=y
361# Non-8250 serial port support 367# Non-8250 serial port support
362# 368#
363# CONFIG_SERIAL_SH_SCI is not set 369# CONFIG_SERIAL_SH_SCI is not set
370# CONFIG_SERIAL_TIMBERDALE is not set
364# CONFIG_UNIX98_PTYS is not set 371# CONFIG_UNIX98_PTYS is not set
365# CONFIG_LEGACY_PTYS is not set 372# CONFIG_LEGACY_PTYS is not set
366# CONFIG_IPMI_HANDLER is not set 373# CONFIG_IPMI_HANDLER is not set
@@ -440,6 +447,7 @@ CONFIG_INOTIFY_USER=y
440# 447#
441# Caches 448# Caches
442# 449#
450# CONFIG_FSCACHE is not set
443 451
444# 452#
445# Pseudo filesystems 453# Pseudo filesystems
@@ -491,6 +499,7 @@ CONFIG_HAVE_ARCH_KGDB=y
491CONFIG_DEFAULT_SECURITY_DAC=y 499CONFIG_DEFAULT_SECURITY_DAC=y
492CONFIG_DEFAULT_SECURITY="" 500CONFIG_DEFAULT_SECURITY=""
493# CONFIG_CRYPTO is not set 501# CONFIG_CRYPTO is not set
502# CONFIG_VIRTUALIZATION is not set
494# CONFIG_BINARY_PRINTF is not set 503# CONFIG_BINARY_PRINTF is not set
495 504
496# 505#
diff --git a/arch/sh/configs/edosk7760_defconfig b/arch/sh/configs/edosk7760_defconfig
index 0932e6d656eb..8257f5776374 100644
--- a/arch/sh/configs/edosk7760_defconfig
+++ b/arch/sh/configs/edosk7760_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:24:44 2010 4# Tue May 18 15:23:10 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54CONFIG_SYSVIPC_SYSCTL=y 57CONFIG_SYSVIPC_SYSCTL=y
@@ -72,7 +75,6 @@ CONFIG_RCU_FANOUT=32
72CONFIG_IKCONFIG=y 75CONFIG_IKCONFIG=y
73CONFIG_IKCONFIG_PROC=y 76CONFIG_IKCONFIG_PROC=y
74CONFIG_LOG_BUF_SHIFT=17 77CONFIG_LOG_BUF_SHIFT=17
75# CONFIG_GROUP_SCHED is not set
76# CONFIG_CGROUPS is not set 78# CONFIG_CGROUPS is not set
77CONFIG_SYSFS_DEPRECATED=y 79CONFIG_SYSFS_DEPRECATED=y
78CONFIG_SYSFS_DEPRECATED_V2=y 80CONFIG_SYSFS_DEPRECATED_V2=y
@@ -83,6 +85,7 @@ CONFIG_INITRAMFS_SOURCE=""
83CONFIG_RD_GZIP=y 85CONFIG_RD_GZIP=y
84# CONFIG_RD_BZIP2 is not set 86# CONFIG_RD_BZIP2 is not set
85# CONFIG_RD_LZMA is not set 87# CONFIG_RD_LZMA is not set
88# CONFIG_RD_LZO is not set
86CONFIG_CC_OPTIMIZE_FOR_SIZE=y 89CONFIG_CC_OPTIMIZE_FOR_SIZE=y
87CONFIG_SYSCTL=y 90CONFIG_SYSCTL=y
88CONFIG_ANON_INODES=y 91CONFIG_ANON_INODES=y
@@ -110,8 +113,9 @@ CONFIG_PERF_USE_VMALLOC=y
110# 113#
111# Kernel Performance Events And Counters 114# Kernel Performance Events And Counters
112# 115#
113# CONFIG_PERF_EVENTS is not set 116CONFIG_PERF_EVENTS=y
114# CONFIG_PERF_COUNTERS is not set 117# CONFIG_PERF_COUNTERS is not set
118# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
115CONFIG_VM_EVENT_COUNTERS=y 119CONFIG_VM_EVENT_COUNTERS=y
116CONFIG_SLUB_DEBUG=y 120CONFIG_SLUB_DEBUG=y
117CONFIG_COMPAT_BRK=y 121CONFIG_COMPAT_BRK=y
@@ -128,6 +132,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
128CONFIG_HAVE_DMA_ATTRS=y 132CONFIG_HAVE_DMA_ATTRS=y
129CONFIG_HAVE_CLK=y 133CONFIG_HAVE_CLK=y
130CONFIG_HAVE_DMA_API_DEBUG=y 134CONFIG_HAVE_DMA_API_DEBUG=y
135CONFIG_HAVE_HW_BREAKPOINT=y
131 136
132# 137#
133# GCOV-based kernel profiling 138# GCOV-based kernel profiling
@@ -246,6 +251,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
246CONFIG_MAX_ACTIVE_REGIONS=1 251CONFIG_MAX_ACTIVE_REGIONS=1
247CONFIG_ARCH_POPULATES_NODE_MAP=y 252CONFIG_ARCH_POPULATES_NODE_MAP=y
248CONFIG_ARCH_SELECT_MEMORY_MODEL=y 253CONFIG_ARCH_SELECT_MEMORY_MODEL=y
254CONFIG_UNCACHED_MAPPING=y
249CONFIG_PAGE_SIZE_4KB=y 255CONFIG_PAGE_SIZE_4KB=y
250# CONFIG_PAGE_SIZE_8KB is not set 256# CONFIG_PAGE_SIZE_8KB is not set
251# CONFIG_PAGE_SIZE_16KB is not set 257# CONFIG_PAGE_SIZE_16KB is not set
@@ -261,7 +267,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
261CONFIG_SPLIT_PTLOCK_CPUS=4 267CONFIG_SPLIT_PTLOCK_CPUS=4
262# CONFIG_PHYS_ADDR_T_64BIT is not set 268# CONFIG_PHYS_ADDR_T_64BIT is not set
263CONFIG_ZONE_DMA_FLAG=0 269CONFIG_ZONE_DMA_FLAG=0
264CONFIG_NR_QUICK=2 270CONFIG_NR_QUICK=1
265# CONFIG_KSM is not set 271# CONFIG_KSM is not set
266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 272CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
267 273
@@ -342,7 +348,6 @@ CONFIG_SCHED_HRTICK=y
342CONFIG_PREEMPT=y 348CONFIG_PREEMPT=y
343CONFIG_GUSA=y 349CONFIG_GUSA=y
344# CONFIG_GUSA_RB is not set 350# CONFIG_GUSA_RB is not set
345# CONFIG_SPARSE_IRQ is not set
346 351
347# 352#
348# Boot options 353# Boot options
@@ -379,7 +384,6 @@ CONFIG_NET=y
379# Networking options 384# Networking options
380# 385#
381CONFIG_PACKET=y 386CONFIG_PACKET=y
382# CONFIG_PACKET_MMAP is not set
383CONFIG_UNIX=y 387CONFIG_UNIX=y
384# CONFIG_NET_KEY is not set 388# CONFIG_NET_KEY is not set
385CONFIG_INET=y 389CONFIG_INET=y
@@ -579,6 +583,7 @@ CONFIG_HAVE_IDE=y
579# 583#
580# SCSI device support 584# SCSI device support
581# 585#
586CONFIG_SCSI_MOD=y
582# CONFIG_RAID_ATTRS is not set 587# CONFIG_RAID_ATTRS is not set
583# CONFIG_SCSI is not set 588# CONFIG_SCSI is not set
584# CONFIG_SCSI_DMA is not set 589# CONFIG_SCSI_DMA is not set
@@ -685,6 +690,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
685CONFIG_SERIAL_SH_SCI_CONSOLE=y 690CONFIG_SERIAL_SH_SCI_CONSOLE=y
686CONFIG_SERIAL_CORE=y 691CONFIG_SERIAL_CORE=y
687CONFIG_SERIAL_CORE_CONSOLE=y 692CONFIG_SERIAL_CORE_CONSOLE=y
693# CONFIG_SERIAL_TIMBERDALE is not set
688CONFIG_UNIX98_PTYS=y 694CONFIG_UNIX98_PTYS=y
689# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 695# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
690CONFIG_LEGACY_PTYS=y 696CONFIG_LEGACY_PTYS=y
@@ -713,6 +719,7 @@ CONFIG_I2C_HELPER_AUTO=y
713CONFIG_I2C_SH7760=y 719CONFIG_I2C_SH7760=y
714# CONFIG_I2C_SH_MOBILE is not set 720# CONFIG_I2C_SH_MOBILE is not set
715# CONFIG_I2C_SIMTEC is not set 721# CONFIG_I2C_SIMTEC is not set
722# CONFIG_I2C_XILINX is not set
716 723
717# 724#
718# External I2C/SMBus adapter drivers 725# External I2C/SMBus adapter drivers
@@ -725,15 +732,9 @@ CONFIG_I2C_SH7760=y
725# 732#
726# CONFIG_I2C_PCA_PLATFORM is not set 733# CONFIG_I2C_PCA_PLATFORM is not set
727# CONFIG_I2C_STUB is not set 734# CONFIG_I2C_STUB is not set
728
729#
730# Miscellaneous I2C Chip support
731#
732# CONFIG_SENSORS_TSL2550 is not set
733CONFIG_I2C_DEBUG_CORE=y 735CONFIG_I2C_DEBUG_CORE=y
734CONFIG_I2C_DEBUG_ALGO=y 736CONFIG_I2C_DEBUG_ALGO=y
735CONFIG_I2C_DEBUG_BUS=y 737CONFIG_I2C_DEBUG_BUS=y
736CONFIG_I2C_DEBUG_CHIP=y
737# CONFIG_SPI is not set 738# CONFIG_SPI is not set
738 739
739# 740#
@@ -756,6 +757,7 @@ CONFIG_SSB_POSSIBLE=y
756# Multifunction device drivers 757# Multifunction device drivers
757# 758#
758# CONFIG_MFD_CORE is not set 759# CONFIG_MFD_CORE is not set
760# CONFIG_MFD_88PM860X is not set
759# CONFIG_MFD_SM501 is not set 761# CONFIG_MFD_SM501 is not set
760# CONFIG_MFD_SH_MOBILE_SDHI is not set 762# CONFIG_MFD_SH_MOBILE_SDHI is not set
761# CONFIG_HTC_PASIC3 is not set 763# CONFIG_HTC_PASIC3 is not set
@@ -763,12 +765,13 @@ CONFIG_SSB_POSSIBLE=y
763# CONFIG_MFD_TMIO is not set 765# CONFIG_MFD_TMIO is not set
764# CONFIG_PMIC_DA903X is not set 766# CONFIG_PMIC_DA903X is not set
765# CONFIG_PMIC_ADP5520 is not set 767# CONFIG_PMIC_ADP5520 is not set
768# CONFIG_MFD_MAX8925 is not set
766# CONFIG_MFD_WM8400 is not set 769# CONFIG_MFD_WM8400 is not set
767# CONFIG_MFD_WM831X is not set 770# CONFIG_MFD_WM831X is not set
768# CONFIG_MFD_WM8350_I2C is not set 771# CONFIG_MFD_WM8350_I2C is not set
772# CONFIG_MFD_WM8994 is not set
769# CONFIG_MFD_PCF50633 is not set 773# CONFIG_MFD_PCF50633 is not set
770# CONFIG_AB3100_CORE is not set 774# CONFIG_AB3100_CORE is not set
771# CONFIG_MFD_88PM8607 is not set
772# CONFIG_REGULATOR is not set 775# CONFIG_REGULATOR is not set
773# CONFIG_MEDIA_SUPPORT is not set 776# CONFIG_MEDIA_SUPPORT is not set
774 777
@@ -947,6 +950,7 @@ CONFIG_MISC_FILESYSTEMS=y
947# CONFIG_BFS_FS is not set 950# CONFIG_BFS_FS is not set
948# CONFIG_EFS_FS is not set 951# CONFIG_EFS_FS is not set
949# CONFIG_JFFS2_FS is not set 952# CONFIG_JFFS2_FS is not set
953# CONFIG_LOGFS is not set
950# CONFIG_CRAMFS is not set 954# CONFIG_CRAMFS is not set
951# CONFIG_SQUASHFS is not set 955# CONFIG_SQUASHFS is not set
952# CONFIG_VXFS_FS is not set 956# CONFIG_VXFS_FS is not set
@@ -969,6 +973,7 @@ CONFIG_SUNRPC=y
969# CONFIG_RPCSEC_GSS_KRB5 is not set 973# CONFIG_RPCSEC_GSS_KRB5 is not set
970# CONFIG_RPCSEC_GSS_SPKM3 is not set 974# CONFIG_RPCSEC_GSS_SPKM3 is not set
971# CONFIG_SMB_FS is not set 975# CONFIG_SMB_FS is not set
976# CONFIG_CEPH_FS is not set
972# CONFIG_CIFS is not set 977# CONFIG_CIFS is not set
973# CONFIG_NCP_FS is not set 978# CONFIG_NCP_FS is not set
974# CONFIG_CODA_FS is not set 979# CONFIG_CODA_FS is not set
@@ -1048,6 +1053,7 @@ CONFIG_TIMER_STATS=y
1048# CONFIG_DEBUG_OBJECTS is not set 1053# CONFIG_DEBUG_OBJECTS is not set
1049# CONFIG_SLUB_DEBUG_ON is not set 1054# CONFIG_SLUB_DEBUG_ON is not set
1050# CONFIG_SLUB_STATS is not set 1055# CONFIG_SLUB_STATS is not set
1056# CONFIG_DEBUG_KMEMLEAK is not set
1051CONFIG_DEBUG_PREEMPT=y 1057CONFIG_DEBUG_PREEMPT=y
1052# CONFIG_DEBUG_RT_MUTEXES is not set 1058# CONFIG_DEBUG_RT_MUTEXES is not set
1053# CONFIG_RT_MUTEX_TESTER is not set 1059# CONFIG_RT_MUTEX_TESTER is not set
@@ -1096,6 +1102,7 @@ CONFIG_FTRACE=y
1096CONFIG_BRANCH_PROFILE_NONE=y 1102CONFIG_BRANCH_PROFILE_NONE=y
1097# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1103# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1098# CONFIG_PROFILE_ALL_BRANCHES is not set 1104# CONFIG_PROFILE_ALL_BRANCHES is not set
1105# CONFIG_KSYM_TRACER is not set
1099# CONFIG_STACK_TRACER is not set 1106# CONFIG_STACK_TRACER is not set
1100# CONFIG_KMEMTRACE is not set 1107# CONFIG_KMEMTRACE is not set
1101# CONFIG_WORKQUEUE_TRACER is not set 1108# CONFIG_WORKQUEUE_TRACER is not set
@@ -1214,6 +1221,7 @@ CONFIG_CRYPTO_DES=y
1214# 1221#
1215# CONFIG_CRYPTO_ANSI_CPRNG is not set 1222# CONFIG_CRYPTO_ANSI_CPRNG is not set
1216CONFIG_CRYPTO_HW=y 1223CONFIG_CRYPTO_HW=y
1224# CONFIG_VIRTUALIZATION is not set
1217# CONFIG_BINARY_PRINTF is not set 1225# CONFIG_BINARY_PRINTF is not set
1218 1226
1219# 1227#
diff --git a/arch/sh/configs/espt_defconfig b/arch/sh/configs/espt_defconfig
index f899e5613f86..8acdc374d033 100644
--- a/arch/sh/configs/espt_defconfig
+++ b/arch/sh/configs/espt_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:26:55 2010 4# Tue May 18 15:27:14 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION_AUTO=y
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51CONFIG_SWAP=y 54CONFIG_SWAP=y
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
@@ -69,11 +72,6 @@ CONFIG_RCU_FANOUT=32
69CONFIG_IKCONFIG=y 72CONFIG_IKCONFIG=y
70CONFIG_IKCONFIG_PROC=y 73CONFIG_IKCONFIG_PROC=y
71CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
72CONFIG_GROUP_SCHED=y
73CONFIG_FAIR_GROUP_SCHED=y
74# CONFIG_RT_GROUP_SCHED is not set
75CONFIG_USER_SCHED=y
76# CONFIG_CGROUP_SCHED is not set
77# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
78CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
79CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -112,7 +110,6 @@ CONFIG_PERF_USE_VMALLOC=y
112# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
113# 111#
114CONFIG_PERF_EVENTS=y 112CONFIG_PERF_EVENTS=y
115CONFIG_EVENT_PROFILE=y
116# CONFIG_PERF_COUNTERS is not set 113# CONFIG_PERF_COUNTERS is not set
117CONFIG_VM_EVENT_COUNTERS=y 114CONFIG_VM_EVENT_COUNTERS=y
118CONFIG_COMPAT_BRK=y 115CONFIG_COMPAT_BRK=y
@@ -120,7 +117,6 @@ CONFIG_SLAB=y
120# CONFIG_SLUB is not set 117# CONFIG_SLUB is not set
121# CONFIG_SLOB is not set 118# CONFIG_SLOB is not set
122CONFIG_PROFILING=y 119CONFIG_PROFILING=y
123CONFIG_TRACEPOINTS=y
124CONFIG_OPROFILE=y 120CONFIG_OPROFILE=y
125CONFIG_HAVE_OPROFILE=y 121CONFIG_HAVE_OPROFILE=y
126# CONFIG_KPROBES is not set 122# CONFIG_KPROBES is not set
@@ -131,6 +127,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y 127CONFIG_HAVE_DMA_ATTRS=y
132CONFIG_HAVE_CLK=y 128CONFIG_HAVE_CLK=y
133CONFIG_HAVE_DMA_API_DEBUG=y 129CONFIG_HAVE_DMA_API_DEBUG=y
130CONFIG_HAVE_HW_BREAKPOINT=y
134 131
135# 132#
136# GCOV-based kernel profiling 133# GCOV-based kernel profiling
@@ -243,7 +240,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
243CONFIG_MEMORY_START=0x0c000000 240CONFIG_MEMORY_START=0x0c000000
244CONFIG_MEMORY_SIZE=0x04000000 241CONFIG_MEMORY_SIZE=0x04000000
245CONFIG_29BIT=y 242CONFIG_29BIT=y
246# CONFIG_PMB_ENABLE is not set 243# CONFIG_PMB is not set
247CONFIG_VSYSCALL=y 244CONFIG_VSYSCALL=y
248CONFIG_ARCH_FLATMEM_ENABLE=y 245CONFIG_ARCH_FLATMEM_ENABLE=y
249CONFIG_ARCH_SPARSEMEM_ENABLE=y 246CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -253,6 +250,7 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
253CONFIG_ARCH_SELECT_MEMORY_MODEL=y 250CONFIG_ARCH_SELECT_MEMORY_MODEL=y
254CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 251CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
255CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 252CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
253CONFIG_UNCACHED_MAPPING=y
256CONFIG_PAGE_SIZE_4KB=y 254CONFIG_PAGE_SIZE_4KB=y
257# CONFIG_PAGE_SIZE_8KB is not set 255# CONFIG_PAGE_SIZE_8KB is not set
258# CONFIG_PAGE_SIZE_16KB is not set 256# CONFIG_PAGE_SIZE_16KB is not set
@@ -269,7 +267,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
269CONFIG_MIGRATION=y 267CONFIG_MIGRATION=y
270# CONFIG_PHYS_ADDR_T_64BIT is not set 268# CONFIG_PHYS_ADDR_T_64BIT is not set
271CONFIG_ZONE_DMA_FLAG=0 269CONFIG_ZONE_DMA_FLAG=0
272CONFIG_NR_QUICK=2 270CONFIG_NR_QUICK=1
273# CONFIG_KSM is not set 271# CONFIG_KSM is not set
274CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 272CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
275 273
@@ -344,7 +342,7 @@ CONFIG_PREEMPT_NONE=y
344# CONFIG_PREEMPT_VOLUNTARY is not set 342# CONFIG_PREEMPT_VOLUNTARY is not set
345# CONFIG_PREEMPT is not set 343# CONFIG_PREEMPT is not set
346CONFIG_GUSA=y 344CONFIG_GUSA=y
347# CONFIG_SPARSE_IRQ is not set 345# CONFIG_INTC_USERIMASK is not set
348 346
349# 347#
350# Boot options 348# Boot options
@@ -381,7 +379,6 @@ CONFIG_NET=y
381# Networking options 379# Networking options
382# 380#
383CONFIG_PACKET=y 381CONFIG_PACKET=y
384# CONFIG_PACKET_MMAP is not set
385CONFIG_UNIX=y 382CONFIG_UNIX=y
386CONFIG_XFRM=y 383CONFIG_XFRM=y
387# CONFIG_XFRM_USER is not set 384# CONFIG_XFRM_USER is not set
@@ -444,7 +441,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
444# Network testing 441# Network testing
445# 442#
446# CONFIG_NET_PKTGEN is not set 443# CONFIG_NET_PKTGEN is not set
447# CONFIG_NET_DROP_MONITOR is not set
448# CONFIG_HAMRADIO is not set 444# CONFIG_HAMRADIO is not set
449# CONFIG_CAN is not set 445# CONFIG_CAN is not set
450# CONFIG_IRDA is not set 446# CONFIG_IRDA is not set
@@ -584,6 +580,7 @@ CONFIG_HAVE_IDE=y
584# 580#
585# SCSI device support 581# SCSI device support
586# 582#
583CONFIG_SCSI_MOD=y
587# CONFIG_RAID_ATTRS is not set 584# CONFIG_RAID_ATTRS is not set
588CONFIG_SCSI=y 585CONFIG_SCSI=y
589CONFIG_SCSI_DMA=y 586CONFIG_SCSI_DMA=y
@@ -688,6 +685,7 @@ CONFIG_WLAN=y
688# CONFIG_USB_PEGASUS is not set 685# CONFIG_USB_PEGASUS is not set
689# CONFIG_USB_RTL8150 is not set 686# CONFIG_USB_RTL8150 is not set
690# CONFIG_USB_USBNET is not set 687# CONFIG_USB_USBNET is not set
688# CONFIG_USB_IPHETH is not set
691# CONFIG_WAN is not set 689# CONFIG_WAN is not set
692# CONFIG_PPP is not set 690# CONFIG_PPP is not set
693# CONFIG_SLIP is not set 691# CONFIG_SLIP is not set
@@ -753,6 +751,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
753CONFIG_SERIAL_SH_SCI_CONSOLE=y 751CONFIG_SERIAL_SH_SCI_CONSOLE=y
754CONFIG_SERIAL_CORE=y 752CONFIG_SERIAL_CORE=y
755CONFIG_SERIAL_CORE_CONSOLE=y 753CONFIG_SERIAL_CORE_CONSOLE=y
754# CONFIG_SERIAL_TIMBERDALE is not set
756CONFIG_UNIX98_PTYS=y 755CONFIG_UNIX98_PTYS=y
757# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 756# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
758CONFIG_LEGACY_PTYS=y 757CONFIG_LEGACY_PTYS=y
@@ -944,7 +943,6 @@ CONFIG_USB_STORAGE=y
944# CONFIG_USB_RIO500 is not set 943# CONFIG_USB_RIO500 is not set
945# CONFIG_USB_LEGOTOWER is not set 944# CONFIG_USB_LEGOTOWER is not set
946# CONFIG_USB_LCD is not set 945# CONFIG_USB_LCD is not set
947# CONFIG_USB_BERRY_CHARGE is not set
948# CONFIG_USB_LED is not set 946# CONFIG_USB_LED is not set
949# CONFIG_USB_CYPRESS_CY7C63 is not set 947# CONFIG_USB_CYPRESS_CY7C63 is not set
950# CONFIG_USB_CYTHERM is not set 948# CONFIG_USB_CYTHERM is not set
@@ -956,7 +954,6 @@ CONFIG_USB_STORAGE=y
956# CONFIG_USB_IOWARRIOR is not set 954# CONFIG_USB_IOWARRIOR is not set
957# CONFIG_USB_TEST is not set 955# CONFIG_USB_TEST is not set
958# CONFIG_USB_ISIGHTFW is not set 956# CONFIG_USB_ISIGHTFW is not set
959# CONFIG_USB_VST is not set
960# CONFIG_USB_GADGET is not set 957# CONFIG_USB_GADGET is not set
961 958
962# 959#
@@ -1052,6 +1049,7 @@ CONFIG_MISC_FILESYSTEMS=y
1052# CONFIG_BFS_FS is not set 1049# CONFIG_BFS_FS is not set
1053# CONFIG_EFS_FS is not set 1050# CONFIG_EFS_FS is not set
1054# CONFIG_JFFS2_FS is not set 1051# CONFIG_JFFS2_FS is not set
1052# CONFIG_LOGFS is not set
1055CONFIG_CRAMFS=y 1053CONFIG_CRAMFS=y
1056# CONFIG_SQUASHFS is not set 1054# CONFIG_SQUASHFS is not set
1057# CONFIG_VXFS_FS is not set 1055# CONFIG_VXFS_FS is not set
@@ -1078,6 +1076,7 @@ CONFIG_SUNRPC=y
1078# CONFIG_RPCSEC_GSS_KRB5 is not set 1076# CONFIG_RPCSEC_GSS_KRB5 is not set
1079# CONFIG_RPCSEC_GSS_SPKM3 is not set 1077# CONFIG_RPCSEC_GSS_SPKM3 is not set
1080# CONFIG_SMB_FS is not set 1078# CONFIG_SMB_FS is not set
1079# CONFIG_CEPH_FS is not set
1081# CONFIG_CIFS is not set 1080# CONFIG_CIFS is not set
1082# CONFIG_NCP_FS is not set 1081# CONFIG_NCP_FS is not set
1083# CONFIG_CODA_FS is not set 1082# CONFIG_CODA_FS is not set
@@ -1144,13 +1143,12 @@ CONFIG_FRAME_WARN=1024
1144CONFIG_DEBUG_FS=y 1143CONFIG_DEBUG_FS=y
1145# CONFIG_HEADERS_CHECK is not set 1144# CONFIG_HEADERS_CHECK is not set
1146# CONFIG_DEBUG_KERNEL is not set 1145# CONFIG_DEBUG_KERNEL is not set
1147CONFIG_STACKTRACE=y
1148CONFIG_DEBUG_BUGVERBOSE=y 1146CONFIG_DEBUG_BUGVERBOSE=y
1149# CONFIG_DEBUG_MEMORY_INIT is not set 1147# CONFIG_DEBUG_MEMORY_INIT is not set
1150# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1148# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1149# CONFIG_LKDTM is not set
1151# CONFIG_LATENCYTOP is not set 1150# CONFIG_LATENCYTOP is not set
1152# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1151# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1153CONFIG_NOP_TRACER=y
1154CONFIG_HAVE_FUNCTION_TRACER=y 1152CONFIG_HAVE_FUNCTION_TRACER=y
1155CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1153CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1156CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1154CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1158,10 +1156,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1158CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1156CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1159CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1157CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1160CONFIG_RING_BUFFER=y 1158CONFIG_RING_BUFFER=y
1161CONFIG_EVENT_TRACING=y
1162CONFIG_CONTEXT_SWITCH_TRACER=y
1163CONFIG_RING_BUFFER_ALLOW_SWAP=y 1159CONFIG_RING_BUFFER_ALLOW_SWAP=y
1164CONFIG_TRACING=y
1165CONFIG_TRACING_SUPPORT=y 1160CONFIG_TRACING_SUPPORT=y
1166# CONFIG_FTRACE is not set 1161# CONFIG_FTRACE is not set
1167# CONFIG_DYNAMIC_DEBUG is not set 1162# CONFIG_DYNAMIC_DEBUG is not set
@@ -1269,7 +1264,8 @@ CONFIG_CRYPTO=y
1269# 1264#
1270# CONFIG_CRYPTO_ANSI_CPRNG is not set 1265# CONFIG_CRYPTO_ANSI_CPRNG is not set
1271CONFIG_CRYPTO_HW=y 1266CONFIG_CRYPTO_HW=y
1272CONFIG_BINARY_PRINTF=y 1267# CONFIG_VIRTUALIZATION is not set
1268# CONFIG_BINARY_PRINTF is not set
1273 1269
1274# 1270#
1275# Library routines 1271# Library routines
diff --git a/arch/sh/configs/hp6xx_defconfig b/arch/sh/configs/hp6xx_defconfig
index 06644908631e..f894bdc97a65 100644
--- a/arch/sh/configs/hp6xx_defconfig
+++ b/arch/sh/configs/hp6xx_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:30:31 2010 4# Tue May 18 15:30:50 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION_AUTO=y
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51CONFIG_SWAP=y 54CONFIG_SWAP=y
52# CONFIG_SYSVIPC is not set 55# CONFIG_SYSVIPC is not set
53CONFIG_BSD_PROCESS_ACCT=y 56CONFIG_BSD_PROCESS_ACCT=y
@@ -66,7 +69,6 @@ CONFIG_RCU_FANOUT=32
66CONFIG_IKCONFIG=y 69CONFIG_IKCONFIG=y
67CONFIG_IKCONFIG_PROC=y 70CONFIG_IKCONFIG_PROC=y
68CONFIG_LOG_BUF_SHIFT=14 71CONFIG_LOG_BUF_SHIFT=14
69# CONFIG_GROUP_SCHED is not set
70# CONFIG_CGROUPS is not set 72# CONFIG_CGROUPS is not set
71CONFIG_SYSFS_DEPRECATED=y 73CONFIG_SYSFS_DEPRECATED=y
72CONFIG_SYSFS_DEPRECATED_V2=y 74CONFIG_SYSFS_DEPRECATED_V2=y
@@ -99,7 +101,7 @@ CONFIG_PERF_USE_VMALLOC=y
99# 101#
100# Kernel Performance Events And Counters 102# Kernel Performance Events And Counters
101# 103#
102# CONFIG_PERF_EVENTS is not set 104CONFIG_PERF_EVENTS=y
103# CONFIG_PERF_COUNTERS is not set 105# CONFIG_PERF_COUNTERS is not set
104CONFIG_VM_EVENT_COUNTERS=y 106CONFIG_VM_EVENT_COUNTERS=y
105CONFIG_COMPAT_BRK=y 107CONFIG_COMPAT_BRK=y
@@ -115,6 +117,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
115CONFIG_HAVE_DMA_ATTRS=y 117CONFIG_HAVE_DMA_ATTRS=y
116CONFIG_HAVE_CLK=y 118CONFIG_HAVE_CLK=y
117CONFIG_HAVE_DMA_API_DEBUG=y 119CONFIG_HAVE_DMA_API_DEBUG=y
120CONFIG_HAVE_HW_BREAKPOINT=y
118 121
119# 122#
120# GCOV-based kernel profiling 123# GCOV-based kernel profiling
@@ -228,6 +231,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
228CONFIG_MAX_ACTIVE_REGIONS=1 231CONFIG_MAX_ACTIVE_REGIONS=1
229CONFIG_ARCH_POPULATES_NODE_MAP=y 232CONFIG_ARCH_POPULATES_NODE_MAP=y
230CONFIG_ARCH_SELECT_MEMORY_MODEL=y 233CONFIG_ARCH_SELECT_MEMORY_MODEL=y
234CONFIG_UNCACHED_MAPPING=y
231CONFIG_PAGE_SIZE_4KB=y 235CONFIG_PAGE_SIZE_4KB=y
232# CONFIG_PAGE_SIZE_8KB is not set 236# CONFIG_PAGE_SIZE_8KB is not set
233# CONFIG_PAGE_SIZE_16KB is not set 237# CONFIG_PAGE_SIZE_16KB is not set
@@ -243,7 +247,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
243CONFIG_SPLIT_PTLOCK_CPUS=4 247CONFIG_SPLIT_PTLOCK_CPUS=4
244# CONFIG_PHYS_ADDR_T_64BIT is not set 248# CONFIG_PHYS_ADDR_T_64BIT is not set
245CONFIG_ZONE_DMA_FLAG=0 249CONFIG_ZONE_DMA_FLAG=0
246CONFIG_NR_QUICK=2 250CONFIG_NR_QUICK=1
247# CONFIG_KSM is not set 251# CONFIG_KSM is not set
248CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 252CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
249 253
@@ -326,7 +330,6 @@ CONFIG_PREEMPT_NONE=y
326# CONFIG_PREEMPT is not set 330# CONFIG_PREEMPT is not set
327CONFIG_GUSA=y 331CONFIG_GUSA=y
328# CONFIG_GUSA_RB is not set 332# CONFIG_GUSA_RB is not set
329# CONFIG_SPARSE_IRQ is not set
330 333
331# 334#
332# Boot options 335# Boot options
@@ -344,7 +347,6 @@ CONFIG_ENTRY_OFFSET=0x00001000
344CONFIG_PCCARD=y 347CONFIG_PCCARD=y
345CONFIG_PCMCIA=y 348CONFIG_PCMCIA=y
346CONFIG_PCMCIA_LOAD_CIS=y 349CONFIG_PCMCIA_LOAD_CIS=y
347CONFIG_PCMCIA_IOCTL=y
348 350
349# 351#
350# PC-card bridges 352# PC-card bridges
@@ -369,6 +371,7 @@ CONFIG_SUSPEND_FREEZER=y
369# CONFIG_HIBERNATION is not set 371# CONFIG_HIBERNATION is not set
370CONFIG_APM_EMULATION=y 372CONFIG_APM_EMULATION=y
371# CONFIG_PM_RUNTIME is not set 373# CONFIG_PM_RUNTIME is not set
374CONFIG_PM_OPS=y
372# CONFIG_CPU_IDLE is not set 375# CONFIG_CPU_IDLE is not set
373# CONFIG_NET is not set 376# CONFIG_NET is not set
374 377
@@ -412,6 +415,7 @@ CONFIG_HAVE_IDE=y
412# 415#
413# SCSI device support 416# SCSI device support
414# 417#
418CONFIG_SCSI_MOD=y
415# CONFIG_RAID_ATTRS is not set 419# CONFIG_RAID_ATTRS is not set
416CONFIG_SCSI=y 420CONFIG_SCSI=y
417CONFIG_SCSI_DMA=y 421CONFIG_SCSI_DMA=y
@@ -544,6 +548,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
544CONFIG_SERIAL_SH_SCI_CONSOLE=y 548CONFIG_SERIAL_SH_SCI_CONSOLE=y
545CONFIG_SERIAL_CORE=y 549CONFIG_SERIAL_CORE=y
546CONFIG_SERIAL_CORE_CONSOLE=y 550CONFIG_SERIAL_CORE_CONSOLE=y
551# CONFIG_SERIAL_TIMBERDALE is not set
547CONFIG_UNIX98_PTYS=y 552CONFIG_UNIX98_PTYS=y
548# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 553# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
549CONFIG_LEGACY_PTYS=y 554CONFIG_LEGACY_PTYS=y
@@ -722,7 +727,6 @@ CONFIG_EXT2_FS=y
722# CONFIG_EXT2_FS_XIP is not set 727# CONFIG_EXT2_FS_XIP is not set
723# CONFIG_EXT3_FS is not set 728# CONFIG_EXT3_FS is not set
724# CONFIG_EXT4_FS is not set 729# CONFIG_EXT4_FS is not set
725CONFIG_EXT4_USE_FOR_EXT23=y
726# CONFIG_REISERFS_FS is not set 730# CONFIG_REISERFS_FS is not set
727# CONFIG_JFS_FS is not set 731# CONFIG_JFS_FS is not set
728# CONFIG_FS_POSIX_ACL is not set 732# CONFIG_FS_POSIX_ACL is not set
@@ -780,6 +784,7 @@ CONFIG_MISC_FILESYSTEMS=y
780# CONFIG_BEFS_FS is not set 784# CONFIG_BEFS_FS is not set
781# CONFIG_BFS_FS is not set 785# CONFIG_BFS_FS is not set
782# CONFIG_EFS_FS is not set 786# CONFIG_EFS_FS is not set
787# CONFIG_LOGFS is not set
783# CONFIG_CRAMFS is not set 788# CONFIG_CRAMFS is not set
784# CONFIG_SQUASHFS is not set 789# CONFIG_SQUASHFS is not set
785# CONFIG_VXFS_FS is not set 790# CONFIG_VXFS_FS is not set
@@ -977,6 +982,7 @@ CONFIG_CRYPTO_MD5=y
977# 982#
978# CONFIG_CRYPTO_ANSI_CPRNG is not set 983# CONFIG_CRYPTO_ANSI_CPRNG is not set
979# CONFIG_CRYPTO_HW is not set 984# CONFIG_CRYPTO_HW is not set
985# CONFIG_VIRTUALIZATION is not set
980# CONFIG_BINARY_PRINTF is not set 986# CONFIG_BINARY_PRINTF is not set
981 987
982# 988#
diff --git a/arch/sh/configs/kfr2r09-romimage_defconfig b/arch/sh/configs/kfr2r09-romimage_defconfig
index 3d834e59e8f9..8c54e1620e95 100644
--- a/arch/sh/configs/kfr2r09-romimage_defconfig
+++ b/arch/sh/configs/kfr2r09-romimage_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:31:09 2010 4# Tue May 18 15:33:23 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION=""
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
54# CONFIG_POSIX_MQUEUE is not set 57# CONFIG_POSIX_MQUEUE is not set
@@ -70,11 +73,6 @@ CONFIG_RCU_FANOUT=32
70CONFIG_IKCONFIG=y 73CONFIG_IKCONFIG=y
71CONFIG_IKCONFIG_PROC=y 74CONFIG_IKCONFIG_PROC=y
72CONFIG_LOG_BUF_SHIFT=14 75CONFIG_LOG_BUF_SHIFT=14
73CONFIG_GROUP_SCHED=y
74CONFIG_FAIR_GROUP_SCHED=y
75# CONFIG_RT_GROUP_SCHED is not set
76CONFIG_USER_SCHED=y
77# CONFIG_CGROUP_SCHED is not set
78# CONFIG_CGROUPS is not set 76# CONFIG_CGROUPS is not set
79CONFIG_SYSFS_DEPRECATED=y 77CONFIG_SYSFS_DEPRECATED=y
80CONFIG_SYSFS_DEPRECATED_V2=y 78CONFIG_SYSFS_DEPRECATED_V2=y
@@ -85,6 +83,7 @@ CONFIG_INITRAMFS_SOURCE=""
85CONFIG_RD_GZIP=y 83CONFIG_RD_GZIP=y
86# CONFIG_RD_BZIP2 is not set 84# CONFIG_RD_BZIP2 is not set
87# CONFIG_RD_LZMA is not set 85# CONFIG_RD_LZMA is not set
86# CONFIG_RD_LZO is not set
88CONFIG_CC_OPTIMIZE_FOR_SIZE=y 87CONFIG_CC_OPTIMIZE_FOR_SIZE=y
89CONFIG_SYSCTL=y 88CONFIG_SYSCTL=y
90CONFIG_ANON_INODES=y 89CONFIG_ANON_INODES=y
@@ -110,7 +109,7 @@ CONFIG_PERF_USE_VMALLOC=y
110# 109#
111# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
112# 111#
113# CONFIG_PERF_EVENTS is not set 112CONFIG_PERF_EVENTS=y
114# CONFIG_PERF_COUNTERS is not set 113# CONFIG_PERF_COUNTERS is not set
115CONFIG_VM_EVENT_COUNTERS=y 114CONFIG_VM_EVENT_COUNTERS=y
116CONFIG_COMPAT_BRK=y 115CONFIG_COMPAT_BRK=y
@@ -119,13 +118,13 @@ CONFIG_SLAB=y
119# CONFIG_SLOB is not set 118# CONFIG_SLOB is not set
120# CONFIG_PROFILING is not set 119# CONFIG_PROFILING is not set
121CONFIG_HAVE_OPROFILE=y 120CONFIG_HAVE_OPROFILE=y
122CONFIG_HAVE_IOREMAP_PROT=y
123CONFIG_HAVE_KPROBES=y 121CONFIG_HAVE_KPROBES=y
124CONFIG_HAVE_KRETPROBES=y 122CONFIG_HAVE_KRETPROBES=y
125CONFIG_HAVE_ARCH_TRACEHOOK=y 123CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y 124CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
127CONFIG_HAVE_HW_BREAKPOINT=y
129 128
130# 129#
131# GCOV-based kernel profiling 130# GCOV-based kernel profiling
@@ -222,8 +221,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
222CONFIG_MEMORY_START=0x08000000 221CONFIG_MEMORY_START=0x08000000
223CONFIG_MEMORY_SIZE=0x08000000 222CONFIG_MEMORY_SIZE=0x08000000
224CONFIG_29BIT=y 223CONFIG_29BIT=y
225# CONFIG_PMB_ENABLE is not set 224# CONFIG_PMB is not set
226# CONFIG_X2TLB is not set 225CONFIG_X2TLB=y
227CONFIG_VSYSCALL=y 226CONFIG_VSYSCALL=y
228CONFIG_ARCH_FLATMEM_ENABLE=y 227CONFIG_ARCH_FLATMEM_ENABLE=y
229CONFIG_ARCH_SPARSEMEM_ENABLE=y 228CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -231,6 +230,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
231CONFIG_MAX_ACTIVE_REGIONS=1 230CONFIG_MAX_ACTIVE_REGIONS=1
232CONFIG_ARCH_POPULATES_NODE_MAP=y 231CONFIG_ARCH_POPULATES_NODE_MAP=y
233CONFIG_ARCH_SELECT_MEMORY_MODEL=y 232CONFIG_ARCH_SELECT_MEMORY_MODEL=y
233CONFIG_IOREMAP_FIXED=y
234CONFIG_UNCACHED_MAPPING=y
234CONFIG_PAGE_SIZE_4KB=y 235CONFIG_PAGE_SIZE_4KB=y
235# CONFIG_PAGE_SIZE_8KB is not set 236# CONFIG_PAGE_SIZE_8KB is not set
236# CONFIG_PAGE_SIZE_16KB is not set 237# CONFIG_PAGE_SIZE_16KB is not set
@@ -246,7 +247,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
246CONFIG_SPLIT_PTLOCK_CPUS=4 247CONFIG_SPLIT_PTLOCK_CPUS=4
247# CONFIG_PHYS_ADDR_T_64BIT is not set 248# CONFIG_PHYS_ADDR_T_64BIT is not set
248CONFIG_ZONE_DMA_FLAG=0 249CONFIG_ZONE_DMA_FLAG=0
249CONFIG_NR_QUICK=2 250CONFIG_NR_QUICK=1
250# CONFIG_KSM is not set 251# CONFIG_KSM is not set
251CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 252CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
252 253
@@ -321,7 +322,7 @@ CONFIG_PREEMPT_NONE=y
321# CONFIG_PREEMPT_VOLUNTARY is not set 322# CONFIG_PREEMPT_VOLUNTARY is not set
322# CONFIG_PREEMPT is not set 323# CONFIG_PREEMPT is not set
323CONFIG_GUSA=y 324CONFIG_GUSA=y
324# CONFIG_SPARSE_IRQ is not set 325# CONFIG_INTC_USERIMASK is not set
325 326
326# 327#
327# Boot options 328# Boot options
@@ -354,6 +355,7 @@ CONFIG_PM=y
354# CONFIG_PM_DEBUG is not set 355# CONFIG_PM_DEBUG is not set
355# CONFIG_SUSPEND is not set 356# CONFIG_SUSPEND is not set
356CONFIG_PM_RUNTIME=y 357CONFIG_PM_RUNTIME=y
358CONFIG_PM_OPS=y
357# CONFIG_CPU_IDLE is not set 359# CONFIG_CPU_IDLE is not set
358CONFIG_NET=y 360CONFIG_NET=y
359 361
@@ -361,7 +363,6 @@ CONFIG_NET=y
361# Networking options 363# Networking options
362# 364#
363CONFIG_PACKET=y 365CONFIG_PACKET=y
364CONFIG_PACKET_MMAP=y
365CONFIG_UNIX=y 366CONFIG_UNIX=y
366# CONFIG_NET_KEY is not set 367# CONFIG_NET_KEY is not set
367CONFIG_INET=y 368CONFIG_INET=y
@@ -449,6 +450,7 @@ CONFIG_HAVE_IDE=y
449# 450#
450# SCSI device support 451# SCSI device support
451# 452#
453CONFIG_SCSI_MOD=y
452# CONFIG_SCSI_DMA is not set 454# CONFIG_SCSI_DMA is not set
453# CONFIG_SCSI_NETLINK is not set 455# CONFIG_SCSI_NETLINK is not set
454# CONFIG_NETDEVICES is not set 456# CONFIG_NETDEVICES is not set
@@ -511,6 +513,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
511CONFIG_SERIAL_SH_SCI_CONSOLE=y 513CONFIG_SERIAL_SH_SCI_CONSOLE=y
512CONFIG_SERIAL_CORE=y 514CONFIG_SERIAL_CORE=y
513CONFIG_SERIAL_CORE_CONSOLE=y 515CONFIG_SERIAL_CORE_CONSOLE=y
516# CONFIG_SERIAL_TIMBERDALE is not set
514CONFIG_UNIX98_PTYS=y 517CONFIG_UNIX98_PTYS=y
515# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 518# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
516CONFIG_LEGACY_PTYS=y 519CONFIG_LEGACY_PTYS=y
@@ -538,6 +541,7 @@ CONFIG_I2C_HELPER_AUTO=y
538# CONFIG_I2C_OCORES is not set 541# CONFIG_I2C_OCORES is not set
539CONFIG_I2C_SH_MOBILE=y 542CONFIG_I2C_SH_MOBILE=y
540# CONFIG_I2C_SIMTEC is not set 543# CONFIG_I2C_SIMTEC is not set
544# CONFIG_I2C_XILINX is not set
541 545
542# 546#
543# External I2C/SMBus adapter drivers 547# External I2C/SMBus adapter drivers
@@ -549,15 +553,9 @@ CONFIG_I2C_SH_MOBILE=y
549# Other I2C/SMBus bus drivers 553# Other I2C/SMBus bus drivers
550# 554#
551# CONFIG_I2C_PCA_PLATFORM is not set 555# CONFIG_I2C_PCA_PLATFORM is not set
552
553#
554# Miscellaneous I2C Chip support
555#
556# CONFIG_SENSORS_TSL2550 is not set
557# CONFIG_I2C_DEBUG_CORE is not set 556# CONFIG_I2C_DEBUG_CORE is not set
558# CONFIG_I2C_DEBUG_ALGO is not set 557# CONFIG_I2C_DEBUG_ALGO is not set
559# CONFIG_I2C_DEBUG_BUS is not set 558# CONFIG_I2C_DEBUG_BUS is not set
560# CONFIG_I2C_DEBUG_CHIP is not set
561# CONFIG_SPI is not set 559# CONFIG_SPI is not set
562 560
563# 561#
@@ -571,13 +569,16 @@ CONFIG_GPIO_SYSFS=y
571# 569#
572# Memory mapped GPIO expanders: 570# Memory mapped GPIO expanders:
573# 571#
572# CONFIG_GPIO_IT8761E is not set
574 573
575# 574#
576# I2C GPIO expanders: 575# I2C GPIO expanders:
577# 576#
577# CONFIG_GPIO_MAX7300 is not set
578# CONFIG_GPIO_MAX732X is not set 578# CONFIG_GPIO_MAX732X is not set
579# CONFIG_GPIO_PCA953X is not set 579# CONFIG_GPIO_PCA953X is not set
580# CONFIG_GPIO_PCF857X is not set 580# CONFIG_GPIO_PCF857X is not set
581# CONFIG_GPIO_ADP5588 is not set
581 582
582# 583#
583# PCI GPIO expanders: 584# PCI GPIO expanders:
@@ -606,20 +607,23 @@ CONFIG_SSB_POSSIBLE=y
606# Multifunction device drivers 607# Multifunction device drivers
607# 608#
608# CONFIG_MFD_CORE is not set 609# CONFIG_MFD_CORE is not set
610# CONFIG_MFD_88PM860X is not set
609# CONFIG_MFD_SM501 is not set 611# CONFIG_MFD_SM501 is not set
610# CONFIG_MFD_SH_MOBILE_SDHI is not set 612# CONFIG_MFD_SH_MOBILE_SDHI is not set
611# CONFIG_HTC_PASIC3 is not set 613# CONFIG_HTC_PASIC3 is not set
614# CONFIG_HTC_I2CPLD is not set
612# CONFIG_TPS65010 is not set 615# CONFIG_TPS65010 is not set
613# CONFIG_TWL4030_CORE is not set 616# CONFIG_TWL4030_CORE is not set
614# CONFIG_MFD_TMIO is not set 617# CONFIG_MFD_TMIO is not set
615# CONFIG_PMIC_DA903X is not set 618# CONFIG_PMIC_DA903X is not set
616# CONFIG_PMIC_ADP5520 is not set 619# CONFIG_PMIC_ADP5520 is not set
620# CONFIG_MFD_MAX8925 is not set
617# CONFIG_MFD_WM8400 is not set 621# CONFIG_MFD_WM8400 is not set
618# CONFIG_MFD_WM831X is not set 622# CONFIG_MFD_WM831X is not set
619# CONFIG_MFD_WM8350_I2C is not set 623# CONFIG_MFD_WM8350_I2C is not set
624# CONFIG_MFD_WM8994 is not set
620# CONFIG_MFD_PCF50633 is not set 625# CONFIG_MFD_PCF50633 is not set
621# CONFIG_AB3100_CORE is not set 626# CONFIG_AB3100_CORE is not set
622# CONFIG_MFD_88PM8607 is not set
623# CONFIG_REGULATOR is not set 627# CONFIG_REGULATOR is not set
624# CONFIG_MEDIA_SUPPORT is not set 628# CONFIG_MEDIA_SUPPORT is not set
625 629
@@ -690,6 +694,7 @@ CONFIG_USB_GADGET_DUALSPEED=y
690# CONFIG_USB_MIDI_GADGET is not set 694# CONFIG_USB_MIDI_GADGET is not set
691# CONFIG_USB_G_PRINTER is not set 695# CONFIG_USB_G_PRINTER is not set
692CONFIG_USB_CDC_COMPOSITE=y 696CONFIG_USB_CDC_COMPOSITE=y
697# CONFIG_USB_G_NOKIA is not set
693# CONFIG_USB_G_MULTI is not set 698# CONFIG_USB_G_MULTI is not set
694 699
695# 700#
@@ -794,6 +799,7 @@ CONFIG_HAVE_ARCH_KGDB=y
794CONFIG_DEFAULT_SECURITY_DAC=y 799CONFIG_DEFAULT_SECURITY_DAC=y
795CONFIG_DEFAULT_SECURITY="" 800CONFIG_DEFAULT_SECURITY=""
796# CONFIG_CRYPTO is not set 801# CONFIG_CRYPTO is not set
802# CONFIG_VIRTUALIZATION is not set
797# CONFIG_BINARY_PRINTF is not set 803# CONFIG_BINARY_PRINTF is not set
798 804
799# 805#
diff --git a/arch/sh/configs/kfr2r09_defconfig b/arch/sh/configs/kfr2r09_defconfig
index f22be494ed99..2e74b08ca14d 100644
--- a/arch/sh/configs/kfr2r09_defconfig
+++ b/arch/sh/configs/kfr2r09_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:32:55 2010 4# Tue May 18 15:35:20 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION=""
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -72,11 +75,6 @@ CONFIG_RCU_FANOUT=32
72CONFIG_IKCONFIG=y 75CONFIG_IKCONFIG=y
73CONFIG_IKCONFIG_PROC=y 76CONFIG_IKCONFIG_PROC=y
74CONFIG_LOG_BUF_SHIFT=14 77CONFIG_LOG_BUF_SHIFT=14
75CONFIG_GROUP_SCHED=y
76CONFIG_FAIR_GROUP_SCHED=y
77# CONFIG_RT_GROUP_SCHED is not set
78CONFIG_USER_SCHED=y
79# CONFIG_CGROUP_SCHED is not set
80# CONFIG_CGROUPS is not set 78# CONFIG_CGROUPS is not set
81CONFIG_SYSFS_DEPRECATED=y 79CONFIG_SYSFS_DEPRECATED=y
82CONFIG_SYSFS_DEPRECATED_V2=y 80CONFIG_SYSFS_DEPRECATED_V2=y
@@ -87,6 +85,7 @@ CONFIG_INITRAMFS_SOURCE=""
87CONFIG_RD_GZIP=y 85CONFIG_RD_GZIP=y
88# CONFIG_RD_BZIP2 is not set 86# CONFIG_RD_BZIP2 is not set
89# CONFIG_RD_LZMA is not set 87# CONFIG_RD_LZMA is not set
88# CONFIG_RD_LZO is not set
90CONFIG_CC_OPTIMIZE_FOR_SIZE=y 89CONFIG_CC_OPTIMIZE_FOR_SIZE=y
91CONFIG_SYSCTL=y 90CONFIG_SYSCTL=y
92CONFIG_ANON_INODES=y 91CONFIG_ANON_INODES=y
@@ -112,7 +111,7 @@ CONFIG_PERF_USE_VMALLOC=y
112# 111#
113# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
114# 113#
115# CONFIG_PERF_EVENTS is not set 114CONFIG_PERF_EVENTS=y
116# CONFIG_PERF_COUNTERS is not set 115# CONFIG_PERF_COUNTERS is not set
117CONFIG_VM_EVENT_COUNTERS=y 116CONFIG_VM_EVENT_COUNTERS=y
118CONFIG_COMPAT_BRK=y 117CONFIG_COMPAT_BRK=y
@@ -121,13 +120,13 @@ CONFIG_SLAB=y
121# CONFIG_SLOB is not set 120# CONFIG_SLOB is not set
122# CONFIG_PROFILING is not set 121# CONFIG_PROFILING is not set
123CONFIG_HAVE_OPROFILE=y 122CONFIG_HAVE_OPROFILE=y
124CONFIG_HAVE_IOREMAP_PROT=y
125CONFIG_HAVE_KPROBES=y 123CONFIG_HAVE_KPROBES=y
126CONFIG_HAVE_KRETPROBES=y 124CONFIG_HAVE_KRETPROBES=y
127CONFIG_HAVE_ARCH_TRACEHOOK=y 125CONFIG_HAVE_ARCH_TRACEHOOK=y
128CONFIG_HAVE_DMA_ATTRS=y 126CONFIG_HAVE_DMA_ATTRS=y
129CONFIG_HAVE_CLK=y 127CONFIG_HAVE_CLK=y
130CONFIG_HAVE_DMA_API_DEBUG=y 128CONFIG_HAVE_DMA_API_DEBUG=y
129CONFIG_HAVE_HW_BREAKPOINT=y
131 130
132# 131#
133# GCOV-based kernel profiling 132# GCOV-based kernel profiling
@@ -243,8 +242,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
243CONFIG_MEMORY_START=0x08000000 242CONFIG_MEMORY_START=0x08000000
244CONFIG_MEMORY_SIZE=0x08000000 243CONFIG_MEMORY_SIZE=0x08000000
245CONFIG_29BIT=y 244CONFIG_29BIT=y
246# CONFIG_PMB_ENABLE is not set 245# CONFIG_PMB is not set
247# CONFIG_X2TLB is not set 246CONFIG_X2TLB=y
248CONFIG_VSYSCALL=y 247CONFIG_VSYSCALL=y
249CONFIG_ARCH_FLATMEM_ENABLE=y 248CONFIG_ARCH_FLATMEM_ENABLE=y
250CONFIG_ARCH_SPARSEMEM_ENABLE=y 249CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -252,6 +251,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
252CONFIG_MAX_ACTIVE_REGIONS=1 251CONFIG_MAX_ACTIVE_REGIONS=1
253CONFIG_ARCH_POPULATES_NODE_MAP=y 252CONFIG_ARCH_POPULATES_NODE_MAP=y
254CONFIG_ARCH_SELECT_MEMORY_MODEL=y 253CONFIG_ARCH_SELECT_MEMORY_MODEL=y
254CONFIG_IOREMAP_FIXED=y
255CONFIG_UNCACHED_MAPPING=y
255CONFIG_PAGE_SIZE_4KB=y 256CONFIG_PAGE_SIZE_4KB=y
256# CONFIG_PAGE_SIZE_8KB is not set 257# CONFIG_PAGE_SIZE_8KB is not set
257# CONFIG_PAGE_SIZE_16KB is not set 258# CONFIG_PAGE_SIZE_16KB is not set
@@ -267,7 +268,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
267CONFIG_SPLIT_PTLOCK_CPUS=4 268CONFIG_SPLIT_PTLOCK_CPUS=4
268# CONFIG_PHYS_ADDR_T_64BIT is not set 269# CONFIG_PHYS_ADDR_T_64BIT is not set
269CONFIG_ZONE_DMA_FLAG=0 270CONFIG_ZONE_DMA_FLAG=0
270CONFIG_NR_QUICK=2 271CONFIG_NR_QUICK=1
271# CONFIG_KSM is not set 272# CONFIG_KSM is not set
272CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 273CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
273 274
@@ -343,7 +344,7 @@ CONFIG_KEXEC=y
343# CONFIG_PREEMPT_VOLUNTARY is not set 344# CONFIG_PREEMPT_VOLUNTARY is not set
344CONFIG_PREEMPT=y 345CONFIG_PREEMPT=y
345CONFIG_GUSA=y 346CONFIG_GUSA=y
346# CONFIG_SPARSE_IRQ is not set 347# CONFIG_INTC_USERIMASK is not set
347 348
348# 349#
349# Boot options 350# Boot options
@@ -377,6 +378,7 @@ CONFIG_PM=y
377# CONFIG_SUSPEND is not set 378# CONFIG_SUSPEND is not set
378# CONFIG_HIBERNATION is not set 379# CONFIG_HIBERNATION is not set
379CONFIG_PM_RUNTIME=y 380CONFIG_PM_RUNTIME=y
381CONFIG_PM_OPS=y
380CONFIG_CPU_IDLE=y 382CONFIG_CPU_IDLE=y
381CONFIG_CPU_IDLE_GOV_LADDER=y 383CONFIG_CPU_IDLE_GOV_LADDER=y
382CONFIG_CPU_IDLE_GOV_MENU=y 384CONFIG_CPU_IDLE_GOV_MENU=y
@@ -386,7 +388,6 @@ CONFIG_NET=y
386# Networking options 388# Networking options
387# 389#
388CONFIG_PACKET=y 390CONFIG_PACKET=y
389CONFIG_PACKET_MMAP=y
390CONFIG_UNIX=y 391CONFIG_UNIX=y
391# CONFIG_NET_KEY is not set 392# CONFIG_NET_KEY is not set
392CONFIG_INET=y 393CONFIG_INET=y
@@ -580,6 +581,7 @@ CONFIG_HAVE_IDE=y
580# 581#
581# SCSI device support 582# SCSI device support
582# 583#
584CONFIG_SCSI_MOD=y
583# CONFIG_RAID_ATTRS is not set 585# CONFIG_RAID_ATTRS is not set
584# CONFIG_SCSI is not set 586# CONFIG_SCSI is not set
585# CONFIG_SCSI_DMA is not set 587# CONFIG_SCSI_DMA is not set
@@ -659,6 +661,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
659CONFIG_SERIAL_SH_SCI_CONSOLE=y 661CONFIG_SERIAL_SH_SCI_CONSOLE=y
660CONFIG_SERIAL_CORE=y 662CONFIG_SERIAL_CORE=y
661CONFIG_SERIAL_CORE_CONSOLE=y 663CONFIG_SERIAL_CORE_CONSOLE=y
664# CONFIG_SERIAL_TIMBERDALE is not set
662CONFIG_UNIX98_PTYS=y 665CONFIG_UNIX98_PTYS=y
663# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 666# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
664CONFIG_LEGACY_PTYS=y 667CONFIG_LEGACY_PTYS=y
@@ -687,6 +690,7 @@ CONFIG_I2C_HELPER_AUTO=y
687# CONFIG_I2C_OCORES is not set 690# CONFIG_I2C_OCORES is not set
688CONFIG_I2C_SH_MOBILE=y 691CONFIG_I2C_SH_MOBILE=y
689# CONFIG_I2C_SIMTEC is not set 692# CONFIG_I2C_SIMTEC is not set
693# CONFIG_I2C_XILINX is not set
690 694
691# 695#
692# External I2C/SMBus adapter drivers 696# External I2C/SMBus adapter drivers
@@ -699,15 +703,9 @@ CONFIG_I2C_SH_MOBILE=y
699# 703#
700# CONFIG_I2C_PCA_PLATFORM is not set 704# CONFIG_I2C_PCA_PLATFORM is not set
701# CONFIG_I2C_STUB is not set 705# CONFIG_I2C_STUB is not set
702
703#
704# Miscellaneous I2C Chip support
705#
706# CONFIG_SENSORS_TSL2550 is not set
707# CONFIG_I2C_DEBUG_CORE is not set 706# CONFIG_I2C_DEBUG_CORE is not set
708# CONFIG_I2C_DEBUG_ALGO is not set 707# CONFIG_I2C_DEBUG_ALGO is not set
709# CONFIG_I2C_DEBUG_BUS is not set 708# CONFIG_I2C_DEBUG_BUS is not set
710# CONFIG_I2C_DEBUG_CHIP is not set
711# CONFIG_SPI is not set 709# CONFIG_SPI is not set
712 710
713# 711#
@@ -721,13 +719,16 @@ CONFIG_GPIO_SYSFS=y
721# 719#
722# Memory mapped GPIO expanders: 720# Memory mapped GPIO expanders:
723# 721#
722# CONFIG_GPIO_IT8761E is not set
724 723
725# 724#
726# I2C GPIO expanders: 725# I2C GPIO expanders:
727# 726#
727# CONFIG_GPIO_MAX7300 is not set
728# CONFIG_GPIO_MAX732X is not set 728# CONFIG_GPIO_MAX732X is not set
729# CONFIG_GPIO_PCA953X is not set 729# CONFIG_GPIO_PCA953X is not set
730# CONFIG_GPIO_PCF857X is not set 730# CONFIG_GPIO_PCF857X is not set
731# CONFIG_GPIO_ADP5588 is not set
731 732
732# 733#
733# PCI GPIO expanders: 734# PCI GPIO expanders:
@@ -756,20 +757,23 @@ CONFIG_SSB_POSSIBLE=y
756# Multifunction device drivers 757# Multifunction device drivers
757# 758#
758# CONFIG_MFD_CORE is not set 759# CONFIG_MFD_CORE is not set
760# CONFIG_MFD_88PM860X is not set
759# CONFIG_MFD_SM501 is not set 761# CONFIG_MFD_SM501 is not set
760# CONFIG_MFD_SH_MOBILE_SDHI is not set 762# CONFIG_MFD_SH_MOBILE_SDHI is not set
761# CONFIG_HTC_PASIC3 is not set 763# CONFIG_HTC_PASIC3 is not set
764# CONFIG_HTC_I2CPLD is not set
762# CONFIG_TPS65010 is not set 765# CONFIG_TPS65010 is not set
763# CONFIG_TWL4030_CORE is not set 766# CONFIG_TWL4030_CORE is not set
764# CONFIG_MFD_TMIO is not set 767# CONFIG_MFD_TMIO is not set
765# CONFIG_PMIC_DA903X is not set 768# CONFIG_PMIC_DA903X is not set
766# CONFIG_PMIC_ADP5520 is not set 769# CONFIG_PMIC_ADP5520 is not set
770# CONFIG_MFD_MAX8925 is not set
767# CONFIG_MFD_WM8400 is not set 771# CONFIG_MFD_WM8400 is not set
768# CONFIG_MFD_WM831X is not set 772# CONFIG_MFD_WM831X is not set
769# CONFIG_MFD_WM8350_I2C is not set 773# CONFIG_MFD_WM8350_I2C is not set
774# CONFIG_MFD_WM8994 is not set
770# CONFIG_MFD_PCF50633 is not set 775# CONFIG_MFD_PCF50633 is not set
771# CONFIG_AB3100_CORE is not set 776# CONFIG_AB3100_CORE is not set
772# CONFIG_MFD_88PM8607 is not set
773# CONFIG_REGULATOR is not set 777# CONFIG_REGULATOR is not set
774# CONFIG_MEDIA_SUPPORT is not set 778# CONFIG_MEDIA_SUPPORT is not set
775 779
@@ -889,6 +893,7 @@ CONFIG_USB_GADGET_DUALSPEED=y
889# CONFIG_USB_MIDI_GADGET is not set 893# CONFIG_USB_MIDI_GADGET is not set
890# CONFIG_USB_G_PRINTER is not set 894# CONFIG_USB_G_PRINTER is not set
891CONFIG_USB_CDC_COMPOSITE=m 895CONFIG_USB_CDC_COMPOSITE=m
896# CONFIG_USB_G_NOKIA is not set
892# CONFIG_USB_G_MULTI is not set 897# CONFIG_USB_G_MULTI is not set
893 898
894# 899#
@@ -912,9 +917,6 @@ CONFIG_MMC_BLOCK_BOUNCE=y
912# MMC/SD/SDIO Host Controller Drivers 917# MMC/SD/SDIO Host Controller Drivers
913# 918#
914# CONFIG_MMC_SDHCI is not set 919# CONFIG_MMC_SDHCI is not set
915# CONFIG_MMC_AT91 is not set
916# CONFIG_MMC_ATMELMCI is not set
917# CONFIG_MMC_TMIO is not set
918# CONFIG_MEMSTICK is not set 920# CONFIG_MEMSTICK is not set
919# CONFIG_NEW_LEDS is not set 921# CONFIG_NEW_LEDS is not set
920# CONFIG_ACCESSIBILITY is not set 922# CONFIG_ACCESSIBILITY is not set
@@ -982,8 +984,6 @@ CONFIG_RTC_DRV_SH=y
982CONFIG_UIO=y 984CONFIG_UIO=y
983# CONFIG_UIO_PDRV is not set 985# CONFIG_UIO_PDRV is not set
984CONFIG_UIO_PDRV_GENIRQ=y 986CONFIG_UIO_PDRV_GENIRQ=y
985# CONFIG_UIO_SMX is not set
986# CONFIG_UIO_SERCOS3 is not set
987 987
988# 988#
989# TI VLYNQ 989# TI VLYNQ
@@ -996,7 +996,6 @@ CONFIG_UIO_PDRV_GENIRQ=y
996# CONFIG_EXT2_FS is not set 996# CONFIG_EXT2_FS is not set
997# CONFIG_EXT3_FS is not set 997# CONFIG_EXT3_FS is not set
998# CONFIG_EXT4_FS is not set 998# CONFIG_EXT4_FS is not set
999CONFIG_EXT4_USE_FOR_EXT23=y
1000# CONFIG_REISERFS_FS is not set 999# CONFIG_REISERFS_FS is not set
1001# CONFIG_JFS_FS is not set 1000# CONFIG_JFS_FS is not set
1002# CONFIG_FS_POSIX_ACL is not set 1001# CONFIG_FS_POSIX_ACL is not set
@@ -1074,6 +1073,7 @@ CONFIG_DEBUG_FS=y
1074CONFIG_DEBUG_BUGVERBOSE=y 1073CONFIG_DEBUG_BUGVERBOSE=y
1075# CONFIG_DEBUG_MEMORY_INIT is not set 1074# CONFIG_DEBUG_MEMORY_INIT is not set
1076# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1075# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1076# CONFIG_LKDTM is not set
1077# CONFIG_LATENCYTOP is not set 1077# CONFIG_LATENCYTOP is not set
1078# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1078# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1079CONFIG_HAVE_FUNCTION_TRACER=y 1079CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1103,6 +1103,7 @@ CONFIG_HAVE_ARCH_KGDB=y
1103CONFIG_DEFAULT_SECURITY_DAC=y 1103CONFIG_DEFAULT_SECURITY_DAC=y
1104CONFIG_DEFAULT_SECURITY="" 1104CONFIG_DEFAULT_SECURITY=""
1105# CONFIG_CRYPTO is not set 1105# CONFIG_CRYPTO is not set
1106# CONFIG_VIRTUALIZATION is not set
1106# CONFIG_BINARY_PRINTF is not set 1107# CONFIG_BINARY_PRINTF is not set
1107 1108
1108# 1109#
diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig
index 2a42d4977fe4..87789345d47f 100644
--- a/arch/sh/configs/landisk_defconfig
+++ b/arch/sh/configs/landisk_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:35:31 2010 4# Tue May 18 15:38:08 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54CONFIG_SYSVIPC_SYSCTL=y 57CONFIG_SYSVIPC_SYSCTL=y
@@ -69,7 +72,6 @@ CONFIG_RCU_FANOUT=32
69# CONFIG_TREE_RCU_TRACE is not set 72# CONFIG_TREE_RCU_TRACE is not set
70# CONFIG_IKCONFIG is not set 73# CONFIG_IKCONFIG is not set
71CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
72# CONFIG_GROUP_SCHED is not set
73# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
74CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
75CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -102,7 +104,7 @@ CONFIG_PERF_USE_VMALLOC=y
102# 104#
103# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
104# 106#
105# CONFIG_PERF_EVENTS is not set 107CONFIG_PERF_EVENTS=y
106# CONFIG_PERF_COUNTERS is not set 108# CONFIG_PERF_COUNTERS is not set
107CONFIG_VM_EVENT_COUNTERS=y 109CONFIG_VM_EVENT_COUNTERS=y
108CONFIG_PCI_QUIRKS=y 110CONFIG_PCI_QUIRKS=y
@@ -120,6 +122,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
120CONFIG_HAVE_DMA_ATTRS=y 122CONFIG_HAVE_DMA_ATTRS=y
121CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
122CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
125CONFIG_HAVE_HW_BREAKPOINT=y
123 126
124# 127#
125# GCOV-based kernel profiling 128# GCOV-based kernel profiling
@@ -238,6 +241,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
238CONFIG_MAX_ACTIVE_REGIONS=1 241CONFIG_MAX_ACTIVE_REGIONS=1
239CONFIG_ARCH_POPULATES_NODE_MAP=y 242CONFIG_ARCH_POPULATES_NODE_MAP=y
240CONFIG_ARCH_SELECT_MEMORY_MODEL=y 243CONFIG_ARCH_SELECT_MEMORY_MODEL=y
244CONFIG_UNCACHED_MAPPING=y
241CONFIG_PAGE_SIZE_4KB=y 245CONFIG_PAGE_SIZE_4KB=y
242# CONFIG_PAGE_SIZE_8KB is not set 246# CONFIG_PAGE_SIZE_8KB is not set
243# CONFIG_PAGE_SIZE_16KB is not set 247# CONFIG_PAGE_SIZE_16KB is not set
@@ -253,7 +257,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
253CONFIG_SPLIT_PTLOCK_CPUS=4 257CONFIG_SPLIT_PTLOCK_CPUS=4
254# CONFIG_PHYS_ADDR_T_64BIT is not set 258# CONFIG_PHYS_ADDR_T_64BIT is not set
255CONFIG_ZONE_DMA_FLAG=0 259CONFIG_ZONE_DMA_FLAG=0
256CONFIG_NR_QUICK=2 260CONFIG_NR_QUICK=1
257# CONFIG_KSM is not set 261# CONFIG_KSM is not set
258CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
259 263
@@ -333,7 +337,6 @@ CONFIG_PREEMPT_NONE=y
333# CONFIG_PREEMPT is not set 337# CONFIG_PREEMPT is not set
334CONFIG_GUSA=y 338CONFIG_GUSA=y
335# CONFIG_GUSA_RB is not set 339# CONFIG_GUSA_RB is not set
336# CONFIG_SPARSE_IRQ is not set
337 340
338# 341#
339# Boot options 342# Boot options
@@ -348,15 +351,14 @@ CONFIG_ENTRY_OFFSET=0x00001000
348# Bus options 351# Bus options
349# 352#
350CONFIG_PCI=y 353CONFIG_PCI=y
354CONFIG_PCI_DOMAINS=y
351# CONFIG_PCIEPORTBUS is not set 355# CONFIG_PCIEPORTBUS is not set
352# CONFIG_ARCH_SUPPORTS_MSI is not set 356# CONFIG_ARCH_SUPPORTS_MSI is not set
353CONFIG_PCI_LEGACY=y
354# CONFIG_PCI_STUB is not set 357# CONFIG_PCI_STUB is not set
355# CONFIG_PCI_IOV is not set 358# CONFIG_PCI_IOV is not set
356CONFIG_PCCARD=y 359CONFIG_PCCARD=y
357CONFIG_PCMCIA=y 360CONFIG_PCMCIA=y
358CONFIG_PCMCIA_LOAD_CIS=y 361CONFIG_PCMCIA_LOAD_CIS=y
359CONFIG_PCMCIA_IOCTL=y
360CONFIG_CARDBUS=y 362CONFIG_CARDBUS=y
361 363
362# 364#
@@ -392,7 +394,6 @@ CONFIG_NET=y
392# Networking options 394# Networking options
393# 395#
394CONFIG_PACKET=y 396CONFIG_PACKET=y
395# CONFIG_PACKET_MMAP is not set
396CONFIG_UNIX=y 397CONFIG_UNIX=y
397CONFIG_XFRM=y 398CONFIG_XFRM=y
398# CONFIG_XFRM_USER is not set 399# CONFIG_XFRM_USER is not set
@@ -612,6 +613,7 @@ CONFIG_BLK_DEV_IDEDMA=y
612# 613#
613# SCSI device support 614# SCSI device support
614# 615#
616CONFIG_SCSI_MOD=y
615# CONFIG_RAID_ATTRS is not set 617# CONFIG_RAID_ATTRS is not set
616CONFIG_SCSI=y 618CONFIG_SCSI=y
617CONFIG_SCSI_DMA=y 619CONFIG_SCSI_DMA=y
@@ -711,7 +713,7 @@ CONFIG_MD_RAID1=m
711# 713#
712 714
713# 715#
714# See the help texts for more information. 716# The newer stack is recommended.
715# 717#
716# CONFIG_FIREWIRE is not set 718# CONFIG_FIREWIRE is not set
717# CONFIG_IEEE1394 is not set 719# CONFIG_IEEE1394 is not set
@@ -751,6 +753,7 @@ CONFIG_NET_PCI=y
751# CONFIG_PCNET32 is not set 753# CONFIG_PCNET32 is not set
752# CONFIG_AMD8111_ETH is not set 754# CONFIG_AMD8111_ETH is not set
753# CONFIG_ADAPTEC_STARFIRE is not set 755# CONFIG_ADAPTEC_STARFIRE is not set
756# CONFIG_KSZ884X_PCI is not set
754# CONFIG_B44 is not set 757# CONFIG_B44 is not set
755# CONFIG_FORCEDETH is not set 758# CONFIG_FORCEDETH is not set
756# CONFIG_E100 is not set 759# CONFIG_E100 is not set
@@ -798,6 +801,8 @@ CONFIG_NETDEV_10000=y
798# CONFIG_CHELSIO_T1 is not set 801# CONFIG_CHELSIO_T1 is not set
799CONFIG_CHELSIO_T3_DEPENDS=y 802CONFIG_CHELSIO_T3_DEPENDS=y
800# CONFIG_CHELSIO_T3 is not set 803# CONFIG_CHELSIO_T3 is not set
804CONFIG_CHELSIO_T4_DEPENDS=y
805# CONFIG_CHELSIO_T4 is not set
801# CONFIG_ENIC is not set 806# CONFIG_ENIC is not set
802# CONFIG_IXGBE is not set 807# CONFIG_IXGBE is not set
803# CONFIG_IXGB is not set 808# CONFIG_IXGB is not set
@@ -810,6 +815,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
810# CONFIG_MLX4_CORE is not set 815# CONFIG_MLX4_CORE is not set
811# CONFIG_TEHUTI is not set 816# CONFIG_TEHUTI is not set
812# CONFIG_BNX2X is not set 817# CONFIG_BNX2X is not set
818# CONFIG_QLCNIC is not set
813# CONFIG_QLGE is not set 819# CONFIG_QLGE is not set
814# CONFIG_SFC is not set 820# CONFIG_SFC is not set
815# CONFIG_BE2NET is not set 821# CONFIG_BE2NET is not set
@@ -835,6 +841,7 @@ CONFIG_WLAN=y
835CONFIG_USB_PEGASUS=m 841CONFIG_USB_PEGASUS=m
836CONFIG_USB_RTL8150=m 842CONFIG_USB_RTL8150=m
837# CONFIG_USB_USBNET is not set 843# CONFIG_USB_USBNET is not set
844# CONFIG_USB_IPHETH is not set
838# CONFIG_NET_PCMCIA is not set 845# CONFIG_NET_PCMCIA is not set
839# CONFIG_WAN is not set 846# CONFIG_WAN is not set
840# CONFIG_FDDI is not set 847# CONFIG_FDDI is not set
@@ -910,6 +917,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
910CONFIG_SERIAL_CORE=y 917CONFIG_SERIAL_CORE=y
911CONFIG_SERIAL_CORE_CONSOLE=y 918CONFIG_SERIAL_CORE_CONSOLE=y
912# CONFIG_SERIAL_JSM is not set 919# CONFIG_SERIAL_JSM is not set
920# CONFIG_SERIAL_TIMBERDALE is not set
913CONFIG_UNIX98_PTYS=y 921CONFIG_UNIX98_PTYS=y
914# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 922# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
915CONFIG_LEGACY_PTYS=y 923CONFIG_LEGACY_PTYS=y
@@ -977,6 +985,7 @@ CONFIG_SSB_POSSIBLE=y
977# CONFIG_MFD_SH_MOBILE_SDHI is not set 985# CONFIG_MFD_SH_MOBILE_SDHI is not set
978# CONFIG_HTC_PASIC3 is not set 986# CONFIG_HTC_PASIC3 is not set
979# CONFIG_MFD_TMIO is not set 987# CONFIG_MFD_TMIO is not set
988# CONFIG_LPC_SCH is not set
980# CONFIG_REGULATOR is not set 989# CONFIG_REGULATOR is not set
981# CONFIG_MEDIA_SUPPORT is not set 990# CONFIG_MEDIA_SUPPORT is not set
982 991
@@ -984,6 +993,7 @@ CONFIG_SSB_POSSIBLE=y
984# Graphics support 993# Graphics support
985# 994#
986CONFIG_VGA_ARB=y 995CONFIG_VGA_ARB=y
996CONFIG_VGA_ARB_MAX_GPUS=16
987# CONFIG_DRM is not set 997# CONFIG_DRM is not set
988# CONFIG_VGASTATE is not set 998# CONFIG_VGASTATE is not set
989# CONFIG_VIDEO_OUTPUT_CONTROL is not set 999# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1025,6 +1035,7 @@ CONFIG_USB_HID=m
1025# 1035#
1026# Special HID drivers 1036# Special HID drivers
1027# 1037#
1038# CONFIG_HID_3M_PCT is not set
1028CONFIG_HID_A4TECH=m 1039CONFIG_HID_A4TECH=m
1029CONFIG_HID_APPLE=m 1040CONFIG_HID_APPLE=m
1030CONFIG_HID_BELKIN=m 1041CONFIG_HID_BELKIN=m
@@ -1040,14 +1051,19 @@ CONFIG_HID_GYRATION=m
1040CONFIG_HID_LOGITECH=m 1051CONFIG_HID_LOGITECH=m
1041# CONFIG_LOGITECH_FF is not set 1052# CONFIG_LOGITECH_FF is not set
1042# CONFIG_LOGIRUMBLEPAD2_FF is not set 1053# CONFIG_LOGIRUMBLEPAD2_FF is not set
1054# CONFIG_LOGIG940_FF is not set
1043CONFIG_HID_MICROSOFT=m 1055CONFIG_HID_MICROSOFT=m
1056# CONFIG_HID_MOSART is not set
1044CONFIG_HID_MONTEREY=m 1057CONFIG_HID_MONTEREY=m
1045# CONFIG_HID_NTRIG is not set 1058# CONFIG_HID_NTRIG is not set
1059# CONFIG_HID_ORTEK is not set
1046CONFIG_HID_PANTHERLORD=m 1060CONFIG_HID_PANTHERLORD=m
1047# CONFIG_PANTHERLORD_FF is not set 1061# CONFIG_PANTHERLORD_FF is not set
1048CONFIG_HID_PETALYNX=m 1062CONFIG_HID_PETALYNX=m
1063# CONFIG_HID_QUANTA is not set
1049CONFIG_HID_SAMSUNG=m 1064CONFIG_HID_SAMSUNG=m
1050CONFIG_HID_SONY=m 1065CONFIG_HID_SONY=m
1066# CONFIG_HID_STANTUM is not set
1051CONFIG_HID_SUNPLUS=m 1067CONFIG_HID_SUNPLUS=m
1052# CONFIG_HID_GREENASIA is not set 1068# CONFIG_HID_GREENASIA is not set
1053# CONFIG_HID_SMARTJOYPLUS is not set 1069# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1169,6 +1185,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=m
1169# CONFIG_USB_SERIAL_NAVMAN is not set 1185# CONFIG_USB_SERIAL_NAVMAN is not set
1170CONFIG_USB_SERIAL_PL2303=m 1186CONFIG_USB_SERIAL_PL2303=m
1171# CONFIG_USB_SERIAL_OTI6858 is not set 1187# CONFIG_USB_SERIAL_OTI6858 is not set
1188# CONFIG_USB_SERIAL_QCAUX is not set
1172# CONFIG_USB_SERIAL_QUALCOMM is not set 1189# CONFIG_USB_SERIAL_QUALCOMM is not set
1173# CONFIG_USB_SERIAL_SPCP8X5 is not set 1190# CONFIG_USB_SERIAL_SPCP8X5 is not set
1174# CONFIG_USB_SERIAL_HP4X is not set 1191# CONFIG_USB_SERIAL_HP4X is not set
@@ -1182,6 +1199,7 @@ CONFIG_USB_SERIAL_PL2303=m
1182# CONFIG_USB_SERIAL_OPTION is not set 1199# CONFIG_USB_SERIAL_OPTION is not set
1183# CONFIG_USB_SERIAL_OMNINET is not set 1200# CONFIG_USB_SERIAL_OMNINET is not set
1184# CONFIG_USB_SERIAL_OPTICON is not set 1201# CONFIG_USB_SERIAL_OPTICON is not set
1202# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
1185# CONFIG_USB_SERIAL_DEBUG is not set 1203# CONFIG_USB_SERIAL_DEBUG is not set
1186 1204
1187# 1205#
@@ -1194,7 +1212,6 @@ CONFIG_USB_EMI26=m
1194# CONFIG_USB_RIO500 is not set 1212# CONFIG_USB_RIO500 is not set
1195# CONFIG_USB_LEGOTOWER is not set 1213# CONFIG_USB_LEGOTOWER is not set
1196# CONFIG_USB_LCD is not set 1214# CONFIG_USB_LCD is not set
1197# CONFIG_USB_BERRY_CHARGE is not set
1198# CONFIG_USB_LED is not set 1215# CONFIG_USB_LED is not set
1199# CONFIG_USB_CYPRESS_CY7C63 is not set 1216# CONFIG_USB_CYPRESS_CY7C63 is not set
1200# CONFIG_USB_CYTHERM is not set 1217# CONFIG_USB_CYTHERM is not set
@@ -1208,7 +1225,6 @@ CONFIG_USB_SISUSBVGA_CON=y
1208# CONFIG_USB_IOWARRIOR is not set 1225# CONFIG_USB_IOWARRIOR is not set
1209# CONFIG_USB_TEST is not set 1226# CONFIG_USB_TEST is not set
1210# CONFIG_USB_ISIGHTFW is not set 1227# CONFIG_USB_ISIGHTFW is not set
1211# CONFIG_USB_VST is not set
1212# CONFIG_USB_GADGET is not set 1228# CONFIG_USB_GADGET is not set
1213 1229
1214# 1230#
@@ -1313,6 +1329,7 @@ CONFIG_MISC_FILESYSTEMS=y
1313# CONFIG_BEFS_FS is not set 1329# CONFIG_BEFS_FS is not set
1314# CONFIG_BFS_FS is not set 1330# CONFIG_BFS_FS is not set
1315# CONFIG_EFS_FS is not set 1331# CONFIG_EFS_FS is not set
1332# CONFIG_LOGFS is not set
1316# CONFIG_CRAMFS is not set 1333# CONFIG_CRAMFS is not set
1317# CONFIG_SQUASHFS is not set 1334# CONFIG_SQUASHFS is not set
1318# CONFIG_VXFS_FS is not set 1335# CONFIG_VXFS_FS is not set
@@ -1347,6 +1364,7 @@ CONFIG_SUNRPC=m
1347# CONFIG_RPCSEC_GSS_SPKM3 is not set 1364# CONFIG_RPCSEC_GSS_SPKM3 is not set
1348CONFIG_SMB_FS=m 1365CONFIG_SMB_FS=m
1349# CONFIG_SMB_NLS_DEFAULT is not set 1366# CONFIG_SMB_NLS_DEFAULT is not set
1367# CONFIG_CEPH_FS is not set
1350# CONFIG_CIFS is not set 1368# CONFIG_CIFS is not set
1351# CONFIG_NCP_FS is not set 1369# CONFIG_NCP_FS is not set
1352# CONFIG_CODA_FS is not set 1370# CONFIG_CODA_FS is not set
@@ -1531,6 +1549,7 @@ CONFIG_CRYPTO=y
1531# CONFIG_CRYPTO_ANSI_CPRNG is not set 1549# CONFIG_CRYPTO_ANSI_CPRNG is not set
1532CONFIG_CRYPTO_HW=y 1550CONFIG_CRYPTO_HW=y
1533# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1551# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1552# CONFIG_VIRTUALIZATION is not set
1534# CONFIG_BINARY_PRINTF is not set 1553# CONFIG_BINARY_PRINTF is not set
1535 1554
1536# 1555#
diff --git a/arch/sh/configs/lboxre2_defconfig b/arch/sh/configs/lboxre2_defconfig
index f2f1f8c73b2f..6088a76bd21c 100644
--- a/arch/sh/configs/lboxre2_defconfig
+++ b/arch/sh/configs/lboxre2_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:37:01 2010 4# Tue May 18 15:42:57 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54CONFIG_SYSVIPC_SYSCTL=y 57CONFIG_SYSVIPC_SYSCTL=y
@@ -69,7 +72,6 @@ CONFIG_RCU_FANOUT=32
69# CONFIG_TREE_RCU_TRACE is not set 72# CONFIG_TREE_RCU_TRACE is not set
70# CONFIG_IKCONFIG is not set 73# CONFIG_IKCONFIG is not set
71CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
72# CONFIG_GROUP_SCHED is not set
73# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
74CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
75CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -102,7 +104,7 @@ CONFIG_PERF_USE_VMALLOC=y
102# 104#
103# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
104# 106#
105# CONFIG_PERF_EVENTS is not set 107CONFIG_PERF_EVENTS=y
106# CONFIG_PERF_COUNTERS is not set 108# CONFIG_PERF_COUNTERS is not set
107CONFIG_VM_EVENT_COUNTERS=y 109CONFIG_VM_EVENT_COUNTERS=y
108CONFIG_PCI_QUIRKS=y 110CONFIG_PCI_QUIRKS=y
@@ -120,6 +122,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
120CONFIG_HAVE_DMA_ATTRS=y 122CONFIG_HAVE_DMA_ATTRS=y
121CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
122CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
125CONFIG_HAVE_HW_BREAKPOINT=y
123 126
124# 127#
125# GCOV-based kernel profiling 128# GCOV-based kernel profiling
@@ -238,6 +241,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
238CONFIG_MAX_ACTIVE_REGIONS=1 241CONFIG_MAX_ACTIVE_REGIONS=1
239CONFIG_ARCH_POPULATES_NODE_MAP=y 242CONFIG_ARCH_POPULATES_NODE_MAP=y
240CONFIG_ARCH_SELECT_MEMORY_MODEL=y 243CONFIG_ARCH_SELECT_MEMORY_MODEL=y
244CONFIG_UNCACHED_MAPPING=y
241CONFIG_PAGE_SIZE_4KB=y 245CONFIG_PAGE_SIZE_4KB=y
242# CONFIG_PAGE_SIZE_8KB is not set 246# CONFIG_PAGE_SIZE_8KB is not set
243# CONFIG_PAGE_SIZE_16KB is not set 247# CONFIG_PAGE_SIZE_16KB is not set
@@ -253,7 +257,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
253CONFIG_SPLIT_PTLOCK_CPUS=4 257CONFIG_SPLIT_PTLOCK_CPUS=4
254# CONFIG_PHYS_ADDR_T_64BIT is not set 258# CONFIG_PHYS_ADDR_T_64BIT is not set
255CONFIG_ZONE_DMA_FLAG=0 259CONFIG_ZONE_DMA_FLAG=0
256CONFIG_NR_QUICK=2 260CONFIG_NR_QUICK=1
257# CONFIG_KSM is not set 261# CONFIG_KSM is not set
258CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
259 263
@@ -333,7 +337,6 @@ CONFIG_PREEMPT_NONE=y
333# CONFIG_PREEMPT is not set 337# CONFIG_PREEMPT is not set
334CONFIG_GUSA=y 338CONFIG_GUSA=y
335# CONFIG_GUSA_RB is not set 339# CONFIG_GUSA_RB is not set
336# CONFIG_SPARSE_IRQ is not set
337 340
338# 341#
339# Boot options 342# Boot options
@@ -349,15 +352,14 @@ CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/sda1"
349# Bus options 352# Bus options
350# 353#
351CONFIG_PCI=y 354CONFIG_PCI=y
355CONFIG_PCI_DOMAINS=y
352# CONFIG_PCIEPORTBUS is not set 356# CONFIG_PCIEPORTBUS is not set
353# CONFIG_ARCH_SUPPORTS_MSI is not set 357# CONFIG_ARCH_SUPPORTS_MSI is not set
354CONFIG_PCI_LEGACY=y
355# CONFIG_PCI_STUB is not set 358# CONFIG_PCI_STUB is not set
356# CONFIG_PCI_IOV is not set 359# CONFIG_PCI_IOV is not set
357CONFIG_PCCARD=y 360CONFIG_PCCARD=y
358CONFIG_PCMCIA=y 361CONFIG_PCMCIA=y
359CONFIG_PCMCIA_LOAD_CIS=y 362CONFIG_PCMCIA_LOAD_CIS=y
360CONFIG_PCMCIA_IOCTL=y
361CONFIG_CARDBUS=y 363CONFIG_CARDBUS=y
362 364
363# 365#
@@ -392,7 +394,6 @@ CONFIG_NET=y
392# Networking options 394# Networking options
393# 395#
394CONFIG_PACKET=y 396CONFIG_PACKET=y
395# CONFIG_PACKET_MMAP is not set
396CONFIG_UNIX=y 397CONFIG_UNIX=y
397CONFIG_XFRM=y 398CONFIG_XFRM=y
398# CONFIG_XFRM_USER is not set 399# CONFIG_XFRM_USER is not set
@@ -552,6 +553,7 @@ CONFIG_HAVE_IDE=y
552# 553#
553# SCSI device support 554# SCSI device support
554# 555#
556CONFIG_SCSI_MOD=y
555# CONFIG_RAID_ATTRS is not set 557# CONFIG_RAID_ATTRS is not set
556CONFIG_SCSI=y 558CONFIG_SCSI=y
557CONFIG_SCSI_DMA=y 559CONFIG_SCSI_DMA=y
@@ -670,6 +672,7 @@ CONFIG_ATA_SFF=y
670# CONFIG_PATA_IT821X is not set 672# CONFIG_PATA_IT821X is not set
671# CONFIG_PATA_IT8213 is not set 673# CONFIG_PATA_IT8213 is not set
672# CONFIG_PATA_JMICRON is not set 674# CONFIG_PATA_JMICRON is not set
675# CONFIG_PATA_LEGACY is not set
673# CONFIG_PATA_TRIFLEX is not set 676# CONFIG_PATA_TRIFLEX is not set
674# CONFIG_PATA_MARVELL is not set 677# CONFIG_PATA_MARVELL is not set
675# CONFIG_PATA_MPIIX is not set 678# CONFIG_PATA_MPIIX is not set
@@ -707,7 +710,7 @@ CONFIG_PATA_PLATFORM=y
707# 710#
708 711
709# 712#
710# See the help texts for more information. 713# The newer stack is recommended.
711# 714#
712# CONFIG_FIREWIRE is not set 715# CONFIG_FIREWIRE is not set
713# CONFIG_IEEE1394 is not set 716# CONFIG_IEEE1394 is not set
@@ -747,6 +750,7 @@ CONFIG_NET_PCI=y
747# CONFIG_PCNET32 is not set 750# CONFIG_PCNET32 is not set
748# CONFIG_AMD8111_ETH is not set 751# CONFIG_AMD8111_ETH is not set
749# CONFIG_ADAPTEC_STARFIRE is not set 752# CONFIG_ADAPTEC_STARFIRE is not set
753# CONFIG_KSZ884X_PCI is not set
750# CONFIG_B44 is not set 754# CONFIG_B44 is not set
751# CONFIG_FORCEDETH is not set 755# CONFIG_FORCEDETH is not set
752# CONFIG_E100 is not set 756# CONFIG_E100 is not set
@@ -798,6 +802,8 @@ CONFIG_NETDEV_10000=y
798# CONFIG_CHELSIO_T1 is not set 802# CONFIG_CHELSIO_T1 is not set
799CONFIG_CHELSIO_T3_DEPENDS=y 803CONFIG_CHELSIO_T3_DEPENDS=y
800# CONFIG_CHELSIO_T3 is not set 804# CONFIG_CHELSIO_T3 is not set
805CONFIG_CHELSIO_T4_DEPENDS=y
806# CONFIG_CHELSIO_T4 is not set
801# CONFIG_ENIC is not set 807# CONFIG_ENIC is not set
802# CONFIG_IXGBE is not set 808# CONFIG_IXGBE is not set
803# CONFIG_IXGB is not set 809# CONFIG_IXGB is not set
@@ -810,6 +816,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
810# CONFIG_MLX4_CORE is not set 816# CONFIG_MLX4_CORE is not set
811# CONFIG_TEHUTI is not set 817# CONFIG_TEHUTI is not set
812# CONFIG_BNX2X is not set 818# CONFIG_BNX2X is not set
819# CONFIG_QLCNIC is not set
813# CONFIG_QLGE is not set 820# CONFIG_QLGE is not set
814# CONFIG_SFC is not set 821# CONFIG_SFC is not set
815# CONFIG_BE2NET is not set 822# CONFIG_BE2NET is not set
@@ -908,6 +915,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
908CONFIG_SERIAL_CORE=y 915CONFIG_SERIAL_CORE=y
909CONFIG_SERIAL_CORE_CONSOLE=y 916CONFIG_SERIAL_CORE_CONSOLE=y
910# CONFIG_SERIAL_JSM is not set 917# CONFIG_SERIAL_JSM is not set
918# CONFIG_SERIAL_TIMBERDALE is not set
911CONFIG_UNIX98_PTYS=y 919CONFIG_UNIX98_PTYS=y
912# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 920# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
913CONFIG_LEGACY_PTYS=y 921CONFIG_LEGACY_PTYS=y
@@ -975,6 +983,7 @@ CONFIG_SSB_POSSIBLE=y
975# CONFIG_MFD_SH_MOBILE_SDHI is not set 983# CONFIG_MFD_SH_MOBILE_SDHI is not set
976# CONFIG_HTC_PASIC3 is not set 984# CONFIG_HTC_PASIC3 is not set
977# CONFIG_MFD_TMIO is not set 985# CONFIG_MFD_TMIO is not set
986# CONFIG_LPC_SCH is not set
978# CONFIG_REGULATOR is not set 987# CONFIG_REGULATOR is not set
979# CONFIG_MEDIA_SUPPORT is not set 988# CONFIG_MEDIA_SUPPORT is not set
980 989
@@ -982,6 +991,7 @@ CONFIG_SSB_POSSIBLE=y
982# Graphics support 991# Graphics support
983# 992#
984CONFIG_VGA_ARB=y 993CONFIG_VGA_ARB=y
994CONFIG_VGA_ARB_MAX_GPUS=16
985# CONFIG_DRM is not set 995# CONFIG_DRM is not set
986# CONFIG_VGASTATE is not set 996# CONFIG_VGASTATE is not set
987# CONFIG_VIDEO_OUTPUT_CONTROL is not set 997# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1155,6 +1165,7 @@ CONFIG_MISC_FILESYSTEMS=y
1155# CONFIG_BEFS_FS is not set 1165# CONFIG_BEFS_FS is not set
1156# CONFIG_BFS_FS is not set 1166# CONFIG_BFS_FS is not set
1157# CONFIG_EFS_FS is not set 1167# CONFIG_EFS_FS is not set
1168# CONFIG_LOGFS is not set
1158# CONFIG_CRAMFS is not set 1169# CONFIG_CRAMFS is not set
1159# CONFIG_SQUASHFS is not set 1170# CONFIG_SQUASHFS is not set
1160# CONFIG_VXFS_FS is not set 1171# CONFIG_VXFS_FS is not set
@@ -1173,6 +1184,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
1173# CONFIG_NFS_FS is not set 1184# CONFIG_NFS_FS is not set
1174# CONFIG_NFSD is not set 1185# CONFIG_NFSD is not set
1175# CONFIG_SMB_FS is not set 1186# CONFIG_SMB_FS is not set
1187# CONFIG_CEPH_FS is not set
1176# CONFIG_CIFS is not set 1188# CONFIG_CIFS is not set
1177# CONFIG_NCP_FS is not set 1189# CONFIG_NCP_FS is not set
1178# CONFIG_CODA_FS is not set 1190# CONFIG_CODA_FS is not set
@@ -1357,6 +1369,7 @@ CONFIG_CRYPTO=y
1357# CONFIG_CRYPTO_ANSI_CPRNG is not set 1369# CONFIG_CRYPTO_ANSI_CPRNG is not set
1358CONFIG_CRYPTO_HW=y 1370CONFIG_CRYPTO_HW=y
1359# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1371# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1372# CONFIG_VIRTUALIZATION is not set
1360# CONFIG_BINARY_PRINTF is not set 1373# CONFIG_BINARY_PRINTF is not set
1361 1374
1362# 1375#
diff --git a/arch/sh/configs/magicpanelr2_defconfig b/arch/sh/configs/magicpanelr2_defconfig
index a7a16ce357ad..28c104da0ba1 100644
--- a/arch/sh/configs/magicpanelr2_defconfig
+++ b/arch/sh/configs/magicpanelr2_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:37:42 2010 4# Tue May 18 15:44:00 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION=""
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51CONFIG_SWAP=y 54CONFIG_SWAP=y
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
@@ -71,7 +74,6 @@ CONFIG_RCU_FANOUT=32
71# CONFIG_TREE_RCU_TRACE is not set 74# CONFIG_TREE_RCU_TRACE is not set
72# CONFIG_IKCONFIG is not set 75# CONFIG_IKCONFIG is not set
73CONFIG_LOG_BUF_SHIFT=17 76CONFIG_LOG_BUF_SHIFT=17
74# CONFIG_GROUP_SCHED is not set
75# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
76CONFIG_SYSFS_DEPRECATED=y 78CONFIG_SYSFS_DEPRECATED=y
77CONFIG_SYSFS_DEPRECATED_V2=y 79CONFIG_SYSFS_DEPRECATED_V2=y
@@ -82,6 +84,7 @@ CONFIG_INITRAMFS_SOURCE=""
82CONFIG_RD_GZIP=y 84CONFIG_RD_GZIP=y
83# CONFIG_RD_BZIP2 is not set 85# CONFIG_RD_BZIP2 is not set
84# CONFIG_RD_LZMA is not set 86# CONFIG_RD_LZMA is not set
87# CONFIG_RD_LZO is not set
85# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 88# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
86CONFIG_SYSCTL=y 89CONFIG_SYSCTL=y
87CONFIG_ANON_INODES=y 90CONFIG_ANON_INODES=y
@@ -109,8 +112,9 @@ CONFIG_PERF_USE_VMALLOC=y
109# 112#
110# Kernel Performance Events And Counters 113# Kernel Performance Events And Counters
111# 114#
112# CONFIG_PERF_EVENTS is not set 115CONFIG_PERF_EVENTS=y
113# CONFIG_PERF_COUNTERS is not set 116# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
114CONFIG_VM_EVENT_COUNTERS=y 118CONFIG_VM_EVENT_COUNTERS=y
115CONFIG_COMPAT_BRK=y 119CONFIG_COMPAT_BRK=y
116CONFIG_SLAB=y 120CONFIG_SLAB=y
@@ -126,6 +130,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y 130CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 131CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 132CONFIG_HAVE_DMA_API_DEBUG=y
133CONFIG_HAVE_HW_BREAKPOINT=y
129 134
130# 135#
131# GCOV-based kernel profiling 136# GCOV-based kernel profiling
@@ -244,6 +249,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
244CONFIG_MAX_ACTIVE_REGIONS=1 249CONFIG_MAX_ACTIVE_REGIONS=1
245CONFIG_ARCH_POPULATES_NODE_MAP=y 250CONFIG_ARCH_POPULATES_NODE_MAP=y
246CONFIG_ARCH_SELECT_MEMORY_MODEL=y 251CONFIG_ARCH_SELECT_MEMORY_MODEL=y
252CONFIG_UNCACHED_MAPPING=y
247CONFIG_PAGE_SIZE_4KB=y 253CONFIG_PAGE_SIZE_4KB=y
248# CONFIG_PAGE_SIZE_8KB is not set 254# CONFIG_PAGE_SIZE_8KB is not set
249# CONFIG_PAGE_SIZE_16KB is not set 255# CONFIG_PAGE_SIZE_16KB is not set
@@ -259,7 +265,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
259CONFIG_SPLIT_PTLOCK_CPUS=4 265CONFIG_SPLIT_PTLOCK_CPUS=4
260# CONFIG_PHYS_ADDR_T_64BIT is not set 266# CONFIG_PHYS_ADDR_T_64BIT is not set
261CONFIG_ZONE_DMA_FLAG=0 267CONFIG_ZONE_DMA_FLAG=0
262CONFIG_NR_QUICK=2 268CONFIG_NR_QUICK=1
263# CONFIG_KSM is not set 269# CONFIG_KSM is not set
264CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 270CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
265 271
@@ -344,7 +350,6 @@ CONFIG_PREEMPT_NONE=y
344# CONFIG_PREEMPT is not set 350# CONFIG_PREEMPT is not set
345CONFIG_GUSA=y 351CONFIG_GUSA=y
346# CONFIG_GUSA_RB is not set 352# CONFIG_GUSA_RB is not set
347# CONFIG_SPARSE_IRQ is not set
348 353
349# 354#
350# Boot options 355# Boot options
@@ -380,7 +385,6 @@ CONFIG_NET=y
380# Networking options 385# Networking options
381# 386#
382CONFIG_PACKET=y 387CONFIG_PACKET=y
383CONFIG_PACKET_MMAP=y
384CONFIG_UNIX=y 388CONFIG_UNIX=y
385# CONFIG_NET_KEY is not set 389# CONFIG_NET_KEY is not set
386CONFIG_INET=y 390CONFIG_INET=y
@@ -586,6 +590,7 @@ CONFIG_HAVE_IDE=y
586# 590#
587# SCSI device support 591# SCSI device support
588# 592#
593CONFIG_SCSI_MOD=y
589# CONFIG_RAID_ATTRS is not set 594# CONFIG_RAID_ATTRS is not set
590# CONFIG_SCSI is not set 595# CONFIG_SCSI is not set
591# CONFIG_SCSI_DMA is not set 596# CONFIG_SCSI_DMA is not set
@@ -741,6 +746,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
741CONFIG_SERIAL_SH_SCI_CONSOLE=y 746CONFIG_SERIAL_SH_SCI_CONSOLE=y
742CONFIG_SERIAL_CORE=y 747CONFIG_SERIAL_CORE=y
743CONFIG_SERIAL_CORE_CONSOLE=y 748CONFIG_SERIAL_CORE_CONSOLE=y
749# CONFIG_SERIAL_TIMBERDALE is not set
744CONFIG_UNIX98_PTYS=y 750CONFIG_UNIX98_PTYS=y
745# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 751# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
746CONFIG_LEGACY_PTYS=y 752CONFIG_LEGACY_PTYS=y
@@ -765,6 +771,7 @@ CONFIG_GPIOLIB=y
765# 771#
766# Memory mapped GPIO expanders: 772# Memory mapped GPIO expanders:
767# 773#
774# CONFIG_GPIO_IT8761E is not set
768 775
769# 776#
770# I2C GPIO expanders: 777# I2C GPIO expanders:
@@ -953,6 +960,7 @@ CONFIG_JFFS2_ZLIB=y
953# CONFIG_JFFS2_LZO is not set 960# CONFIG_JFFS2_LZO is not set
954CONFIG_JFFS2_RTIME=y 961CONFIG_JFFS2_RTIME=y
955# CONFIG_JFFS2_RUBIN is not set 962# CONFIG_JFFS2_RUBIN is not set
963# CONFIG_LOGFS is not set
956# CONFIG_CRAMFS is not set 964# CONFIG_CRAMFS is not set
957# CONFIG_SQUASHFS is not set 965# CONFIG_SQUASHFS is not set
958# CONFIG_VXFS_FS is not set 966# CONFIG_VXFS_FS is not set
@@ -977,6 +985,7 @@ CONFIG_SUNRPC=y
977# CONFIG_RPCSEC_GSS_KRB5 is not set 985# CONFIG_RPCSEC_GSS_KRB5 is not set
978# CONFIG_RPCSEC_GSS_SPKM3 is not set 986# CONFIG_RPCSEC_GSS_SPKM3 is not set
979# CONFIG_SMB_FS is not set 987# CONFIG_SMB_FS is not set
988# CONFIG_CEPH_FS is not set
980# CONFIG_CIFS is not set 989# CONFIG_CIFS is not set
981# CONFIG_NCP_FS is not set 990# CONFIG_NCP_FS is not set
982# CONFIG_CODA_FS is not set 991# CONFIG_CODA_FS is not set
@@ -1051,6 +1060,7 @@ CONFIG_DEBUG_KERNEL=y
1051# CONFIG_TIMER_STATS is not set 1060# CONFIG_TIMER_STATS is not set
1052# CONFIG_DEBUG_OBJECTS is not set 1061# CONFIG_DEBUG_OBJECTS is not set
1053# CONFIG_DEBUG_SLAB is not set 1062# CONFIG_DEBUG_SLAB is not set
1063# CONFIG_DEBUG_KMEMLEAK is not set
1054# CONFIG_DEBUG_RT_MUTEXES is not set 1064# CONFIG_DEBUG_RT_MUTEXES is not set
1055# CONFIG_RT_MUTEX_TESTER is not set 1065# CONFIG_RT_MUTEX_TESTER is not set
1056# CONFIG_DEBUG_SPINLOCK is not set 1066# CONFIG_DEBUG_SPINLOCK is not set
@@ -1097,6 +1107,7 @@ CONFIG_FTRACE=y
1097CONFIG_BRANCH_PROFILE_NONE=y 1107CONFIG_BRANCH_PROFILE_NONE=y
1098# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1108# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1099# CONFIG_PROFILE_ALL_BRANCHES is not set 1109# CONFIG_PROFILE_ALL_BRANCHES is not set
1110# CONFIG_KSYM_TRACER is not set
1100# CONFIG_STACK_TRACER is not set 1111# CONFIG_STACK_TRACER is not set
1101# CONFIG_KMEMTRACE is not set 1112# CONFIG_KMEMTRACE is not set
1102# CONFIG_WORKQUEUE_TRACER is not set 1113# CONFIG_WORKQUEUE_TRACER is not set
@@ -1125,6 +1136,7 @@ CONFIG_DUMP_CODE=y
1125CONFIG_DEFAULT_SECURITY_DAC=y 1136CONFIG_DEFAULT_SECURITY_DAC=y
1126CONFIG_DEFAULT_SECURITY="" 1137CONFIG_DEFAULT_SECURITY=""
1127# CONFIG_CRYPTO is not set 1138# CONFIG_CRYPTO is not set
1139# CONFIG_VIRTUALIZATION is not set
1128# CONFIG_BINARY_PRINTF is not set 1140# CONFIG_BINARY_PRINTF is not set
1129 1141
1130# 1142#
diff --git a/arch/sh/configs/microdev_defconfig b/arch/sh/configs/microdev_defconfig
index 7d43fabdc073..41cefa490ec1 100644
--- a/arch/sh/configs/microdev_defconfig
+++ b/arch/sh/configs/microdev_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:40:41 2010 4# Tue May 18 15:48:22 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53# CONFIG_SYSVIPC is not set 56# CONFIG_SYSVIPC is not set
54# CONFIG_POSIX_MQUEUE is not set 57# CONFIG_POSIX_MQUEUE is not set
@@ -69,7 +72,6 @@ CONFIG_RCU_FANOUT=32
69# CONFIG_TREE_RCU_TRACE is not set 72# CONFIG_TREE_RCU_TRACE is not set
70# CONFIG_IKCONFIG is not set 73# CONFIG_IKCONFIG is not set
71CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
72# CONFIG_GROUP_SCHED is not set
73# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
74CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
75CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -80,6 +82,7 @@ CONFIG_INITRAMFS_SOURCE=""
80CONFIG_RD_GZIP=y 82CONFIG_RD_GZIP=y
81# CONFIG_RD_BZIP2 is not set 83# CONFIG_RD_BZIP2 is not set
82# CONFIG_RD_LZMA is not set 84# CONFIG_RD_LZMA is not set
85# CONFIG_RD_LZO is not set
83# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 86# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
84CONFIG_SYSCTL=y 87CONFIG_SYSCTL=y
85CONFIG_ANON_INODES=y 88CONFIG_ANON_INODES=y
@@ -106,7 +109,7 @@ CONFIG_PERF_USE_VMALLOC=y
106# 109#
107# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
108# 111#
109# CONFIG_PERF_EVENTS is not set 112CONFIG_PERF_EVENTS=y
110# CONFIG_PERF_COUNTERS is not set 113# CONFIG_PERF_COUNTERS is not set
111CONFIG_VM_EVENT_COUNTERS=y 114CONFIG_VM_EVENT_COUNTERS=y
112CONFIG_COMPAT_BRK=y 115CONFIG_COMPAT_BRK=y
@@ -122,6 +125,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
122CONFIG_HAVE_DMA_ATTRS=y 125CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 126CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 127CONFIG_HAVE_DMA_API_DEBUG=y
128CONFIG_HAVE_HW_BREAKPOINT=y
125 129
126# 130#
127# GCOV-based kernel profiling 131# GCOV-based kernel profiling
@@ -235,6 +239,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
235CONFIG_MAX_ACTIVE_REGIONS=1 239CONFIG_MAX_ACTIVE_REGIONS=1
236CONFIG_ARCH_POPULATES_NODE_MAP=y 240CONFIG_ARCH_POPULATES_NODE_MAP=y
237CONFIG_ARCH_SELECT_MEMORY_MODEL=y 241CONFIG_ARCH_SELECT_MEMORY_MODEL=y
242CONFIG_UNCACHED_MAPPING=y
238CONFIG_PAGE_SIZE_4KB=y 243CONFIG_PAGE_SIZE_4KB=y
239# CONFIG_PAGE_SIZE_8KB is not set 244# CONFIG_PAGE_SIZE_8KB is not set
240# CONFIG_PAGE_SIZE_16KB is not set 245# CONFIG_PAGE_SIZE_16KB is not set
@@ -256,7 +261,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
256CONFIG_SPLIT_PTLOCK_CPUS=4 261CONFIG_SPLIT_PTLOCK_CPUS=4
257# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
258CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
259CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=1
260# CONFIG_KSM is not set 265# CONFIG_KSM is not set
261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
262 267
@@ -334,7 +339,6 @@ CONFIG_HZ=250
334CONFIG_PREEMPT=y 339CONFIG_PREEMPT=y
335CONFIG_GUSA=y 340CONFIG_GUSA=y
336# CONFIG_GUSA_RB is not set 341# CONFIG_GUSA_RB is not set
337# CONFIG_SPARSE_IRQ is not set
338 342
339# 343#
340# Boot options 344# Boot options
@@ -515,6 +519,7 @@ CONFIG_IDE_PROC_FS=y
515# 519#
516# SCSI device support 520# SCSI device support
517# 521#
522CONFIG_SCSI_MOD=y
518# CONFIG_RAID_ATTRS is not set 523# CONFIG_RAID_ATTRS is not set
519# CONFIG_SCSI is not set 524# CONFIG_SCSI is not set
520# CONFIG_SCSI_DMA is not set 525# CONFIG_SCSI_DMA is not set
@@ -596,6 +601,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
596CONFIG_SERIAL_SH_SCI_CONSOLE=y 601CONFIG_SERIAL_SH_SCI_CONSOLE=y
597CONFIG_SERIAL_CORE=y 602CONFIG_SERIAL_CORE=y
598CONFIG_SERIAL_CORE_CONSOLE=y 603CONFIG_SERIAL_CORE_CONSOLE=y
604# CONFIG_SERIAL_TIMBERDALE is not set
599CONFIG_UNIX98_PTYS=y 605CONFIG_UNIX98_PTYS=y
600# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 606# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
601CONFIG_LEGACY_PTYS=y 607CONFIG_LEGACY_PTYS=y
@@ -774,6 +780,7 @@ CONFIG_MISC_FILESYSTEMS=y
774# CONFIG_BEFS_FS is not set 780# CONFIG_BEFS_FS is not set
775# CONFIG_BFS_FS is not set 781# CONFIG_BFS_FS is not set
776# CONFIG_EFS_FS is not set 782# CONFIG_EFS_FS is not set
783# CONFIG_LOGFS is not set
777# CONFIG_CRAMFS is not set 784# CONFIG_CRAMFS is not set
778# CONFIG_SQUASHFS is not set 785# CONFIG_SQUASHFS is not set
779# CONFIG_VXFS_FS is not set 786# CONFIG_VXFS_FS is not set
@@ -800,6 +807,7 @@ CONFIG_SUNRPC_GSS=y
800CONFIG_RPCSEC_GSS_KRB5=y 807CONFIG_RPCSEC_GSS_KRB5=y
801# CONFIG_RPCSEC_GSS_SPKM3 is not set 808# CONFIG_RPCSEC_GSS_SPKM3 is not set
802# CONFIG_SMB_FS is not set 809# CONFIG_SMB_FS is not set
810# CONFIG_CEPH_FS is not set
803# CONFIG_CIFS is not set 811# CONFIG_CIFS is not set
804# CONFIG_NCP_FS is not set 812# CONFIG_NCP_FS is not set
805# CONFIG_CODA_FS is not set 813# CONFIG_CODA_FS is not set
@@ -992,6 +1000,7 @@ CONFIG_CRYPTO_DES=y
992# 1000#
993# CONFIG_CRYPTO_ANSI_CPRNG is not set 1001# CONFIG_CRYPTO_ANSI_CPRNG is not set
994CONFIG_CRYPTO_HW=y 1002CONFIG_CRYPTO_HW=y
1003# CONFIG_VIRTUALIZATION is not set
995# CONFIG_BINARY_PRINTF is not set 1004# CONFIG_BINARY_PRINTF is not set
996 1005
997# 1006#
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig
index d2b183117771..1c889b74cd57 100644
--- a/arch/sh/configs/migor_defconfig
+++ b/arch/sh/configs/migor_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:41:41 2010 4# Tue May 18 18:01:29 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION_AUTO=y
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -71,7 +74,6 @@ CONFIG_RCU_FANOUT=32
71CONFIG_IKCONFIG=y 74CONFIG_IKCONFIG=y
72CONFIG_IKCONFIG_PROC=y 75CONFIG_IKCONFIG_PROC=y
73CONFIG_LOG_BUF_SHIFT=14 76CONFIG_LOG_BUF_SHIFT=14
74# CONFIG_GROUP_SCHED is not set
75# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
76CONFIG_SYSFS_DEPRECATED=y 78CONFIG_SYSFS_DEPRECATED=y
77CONFIG_SYSFS_DEPRECATED_V2=y 79CONFIG_SYSFS_DEPRECATED_V2=y
@@ -82,6 +84,7 @@ CONFIG_INITRAMFS_SOURCE=""
82CONFIG_RD_GZIP=y 84CONFIG_RD_GZIP=y
83# CONFIG_RD_BZIP2 is not set 85# CONFIG_RD_BZIP2 is not set
84# CONFIG_RD_LZMA is not set 86# CONFIG_RD_LZMA is not set
87# CONFIG_RD_LZO is not set
85# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 88# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
86CONFIG_SYSCTL=y 89CONFIG_SYSCTL=y
87CONFIG_ANON_INODES=y 90CONFIG_ANON_INODES=y
@@ -109,7 +112,6 @@ CONFIG_PERF_USE_VMALLOC=y
109# Kernel Performance Events And Counters 112# Kernel Performance Events And Counters
110# 113#
111CONFIG_PERF_EVENTS=y 114CONFIG_PERF_EVENTS=y
112CONFIG_EVENT_PROFILE=y
113# CONFIG_PERF_COUNTERS is not set 115# CONFIG_PERF_COUNTERS is not set
114CONFIG_VM_EVENT_COUNTERS=y 116CONFIG_VM_EVENT_COUNTERS=y
115CONFIG_COMPAT_BRK=y 117CONFIG_COMPAT_BRK=y
@@ -117,17 +119,16 @@ CONFIG_SLAB=y
117# CONFIG_SLUB is not set 119# CONFIG_SLUB is not set
118# CONFIG_SLOB is not set 120# CONFIG_SLOB is not set
119CONFIG_PROFILING=y 121CONFIG_PROFILING=y
120CONFIG_TRACEPOINTS=y
121CONFIG_OPROFILE=y 122CONFIG_OPROFILE=y
122CONFIG_HAVE_OPROFILE=y 123CONFIG_HAVE_OPROFILE=y
123# CONFIG_KPROBES is not set 124# CONFIG_KPROBES is not set
124CONFIG_HAVE_IOREMAP_PROT=y
125CONFIG_HAVE_KPROBES=y 125CONFIG_HAVE_KPROBES=y
126CONFIG_HAVE_KRETPROBES=y 126CONFIG_HAVE_KRETPROBES=y
127CONFIG_HAVE_ARCH_TRACEHOOK=y 127CONFIG_HAVE_ARCH_TRACEHOOK=y
128CONFIG_HAVE_DMA_ATTRS=y 128CONFIG_HAVE_DMA_ATTRS=y
129CONFIG_HAVE_CLK=y 129CONFIG_HAVE_CLK=y
130CONFIG_HAVE_DMA_API_DEBUG=y 130CONFIG_HAVE_DMA_API_DEBUG=y
131CONFIG_HAVE_HW_BREAKPOINT=y
131 132
132# 133#
133# GCOV-based kernel profiling 134# GCOV-based kernel profiling
@@ -243,7 +244,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
243CONFIG_MEMORY_START=0x0c000000 244CONFIG_MEMORY_START=0x0c000000
244CONFIG_MEMORY_SIZE=0x04000000 245CONFIG_MEMORY_SIZE=0x04000000
245CONFIG_29BIT=y 246CONFIG_29BIT=y
246# CONFIG_X2TLB is not set 247CONFIG_X2TLB=y
247CONFIG_VSYSCALL=y 248CONFIG_VSYSCALL=y
248CONFIG_NUMA=y 249CONFIG_NUMA=y
249CONFIG_NODES_SHIFT=1 250CONFIG_NODES_SHIFT=1
@@ -254,6 +255,8 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
254CONFIG_ARCH_SELECT_MEMORY_MODEL=y 255CONFIG_ARCH_SELECT_MEMORY_MODEL=y
255CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 256CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
256CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 257CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
258CONFIG_IOREMAP_FIXED=y
259CONFIG_UNCACHED_MAPPING=y
257CONFIG_PAGE_SIZE_4KB=y 260CONFIG_PAGE_SIZE_4KB=y
258# CONFIG_PAGE_SIZE_8KB is not set 261# CONFIG_PAGE_SIZE_8KB is not set
259# CONFIG_PAGE_SIZE_16KB is not set 262# CONFIG_PAGE_SIZE_16KB is not set
@@ -271,7 +274,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
271# CONFIG_MIGRATION is not set 274# CONFIG_MIGRATION is not set
272# CONFIG_PHYS_ADDR_T_64BIT is not set 275# CONFIG_PHYS_ADDR_T_64BIT is not set
273CONFIG_ZONE_DMA_FLAG=0 276CONFIG_ZONE_DMA_FLAG=0
274CONFIG_NR_QUICK=2 277CONFIG_NR_QUICK=1
275# CONFIG_KSM is not set 278# CONFIG_KSM is not set
276CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 279CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
277 280
@@ -348,7 +351,7 @@ CONFIG_PREEMPT_NONE=y
348# CONFIG_PREEMPT_VOLUNTARY is not set 351# CONFIG_PREEMPT_VOLUNTARY is not set
349# CONFIG_PREEMPT is not set 352# CONFIG_PREEMPT is not set
350CONFIG_GUSA=y 353CONFIG_GUSA=y
351# CONFIG_SPARSE_IRQ is not set 354# CONFIG_INTC_USERIMASK is not set
352 355
353# 356#
354# Boot options 357# Boot options
@@ -384,6 +387,7 @@ CONFIG_SUSPEND=y
384CONFIG_SUSPEND_FREEZER=y 387CONFIG_SUSPEND_FREEZER=y
385# CONFIG_HIBERNATION is not set 388# CONFIG_HIBERNATION is not set
386CONFIG_PM_RUNTIME=y 389CONFIG_PM_RUNTIME=y
390CONFIG_PM_OPS=y
387# CONFIG_CPU_IDLE is not set 391# CONFIG_CPU_IDLE is not set
388CONFIG_NET=y 392CONFIG_NET=y
389 393
@@ -391,7 +395,6 @@ CONFIG_NET=y
391# Networking options 395# Networking options
392# 396#
393CONFIG_PACKET=y 397CONFIG_PACKET=y
394# CONFIG_PACKET_MMAP is not set
395CONFIG_UNIX=y 398CONFIG_UNIX=y
396CONFIG_XFRM=y 399CONFIG_XFRM=y
397# CONFIG_XFRM_USER is not set 400# CONFIG_XFRM_USER is not set
@@ -454,7 +457,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
454# Network testing 457# Network testing
455# 458#
456# CONFIG_NET_PKTGEN is not set 459# CONFIG_NET_PKTGEN is not set
457# CONFIG_NET_DROP_MONITOR is not set
458# CONFIG_HAMRADIO is not set 460# CONFIG_HAMRADIO is not set
459# CONFIG_CAN is not set 461# CONFIG_CAN is not set
460# CONFIG_IRDA is not set 462# CONFIG_IRDA is not set
@@ -564,6 +566,7 @@ CONFIG_MTD_NAND_IDS=y
564# CONFIG_MTD_NAND_DISKONCHIP is not set 566# CONFIG_MTD_NAND_DISKONCHIP is not set
565# CONFIG_MTD_NAND_NANDSIM is not set 567# CONFIG_MTD_NAND_NANDSIM is not set
566CONFIG_MTD_NAND_PLATFORM=y 568CONFIG_MTD_NAND_PLATFORM=y
569# CONFIG_MTD_NAND_SH_FLCTL is not set
567# CONFIG_MTD_ONENAND is not set 570# CONFIG_MTD_ONENAND is not set
568 571
569# 572#
@@ -596,6 +599,7 @@ CONFIG_MISC_DEVICES=y
596# CONFIG_ICS932S401 is not set 599# CONFIG_ICS932S401 is not set
597# CONFIG_ENCLOSURE_SERVICES is not set 600# CONFIG_ENCLOSURE_SERVICES is not set
598# CONFIG_ISL29003 is not set 601# CONFIG_ISL29003 is not set
602# CONFIG_SENSORS_TSL2550 is not set
599# CONFIG_DS1682 is not set 603# CONFIG_DS1682 is not set
600# CONFIG_C2PORT is not set 604# CONFIG_C2PORT is not set
601 605
@@ -612,6 +616,7 @@ CONFIG_HAVE_IDE=y
612# 616#
613# SCSI device support 617# SCSI device support
614# 618#
619CONFIG_SCSI_MOD=y
615# CONFIG_RAID_ATTRS is not set 620# CONFIG_RAID_ATTRS is not set
616CONFIG_SCSI=y 621CONFIG_SCSI=y
617CONFIG_SCSI_DMA=y 622CONFIG_SCSI_DMA=y
@@ -764,6 +769,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
764CONFIG_SERIAL_SH_SCI_CONSOLE=y 769CONFIG_SERIAL_SH_SCI_CONSOLE=y
765CONFIG_SERIAL_CORE=y 770CONFIG_SERIAL_CORE=y
766CONFIG_SERIAL_CORE_CONSOLE=y 771CONFIG_SERIAL_CORE_CONSOLE=y
772# CONFIG_SERIAL_TIMBERDALE is not set
767CONFIG_UNIX98_PTYS=y 773CONFIG_UNIX98_PTYS=y
768# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 774# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
769CONFIG_LEGACY_PTYS=y 775CONFIG_LEGACY_PTYS=y
@@ -792,6 +798,7 @@ CONFIG_I2C_HELPER_AUTO=y
792# CONFIG_I2C_OCORES is not set 798# CONFIG_I2C_OCORES is not set
793CONFIG_I2C_SH_MOBILE=y 799CONFIG_I2C_SH_MOBILE=y
794# CONFIG_I2C_SIMTEC is not set 800# CONFIG_I2C_SIMTEC is not set
801# CONFIG_I2C_XILINX is not set
795 802
796# 803#
797# External I2C/SMBus adapter drivers 804# External I2C/SMBus adapter drivers
@@ -804,15 +811,9 @@ CONFIG_I2C_SH_MOBILE=y
804# 811#
805# CONFIG_I2C_PCA_PLATFORM is not set 812# CONFIG_I2C_PCA_PLATFORM is not set
806# CONFIG_I2C_STUB is not set 813# CONFIG_I2C_STUB is not set
807
808#
809# Miscellaneous I2C Chip support
810#
811# CONFIG_SENSORS_TSL2550 is not set
812# CONFIG_I2C_DEBUG_CORE is not set 814# CONFIG_I2C_DEBUG_CORE is not set
813# CONFIG_I2C_DEBUG_ALGO is not set 815# CONFIG_I2C_DEBUG_ALGO is not set
814# CONFIG_I2C_DEBUG_BUS is not set 816# CONFIG_I2C_DEBUG_BUS is not set
815# CONFIG_I2C_DEBUG_CHIP is not set
816# CONFIG_SPI is not set 817# CONFIG_SPI is not set
817 818
818# 819#
@@ -826,13 +827,16 @@ CONFIG_GPIOLIB=y
826# 827#
827# Memory mapped GPIO expanders: 828# Memory mapped GPIO expanders:
828# 829#
830# CONFIG_GPIO_IT8761E is not set
829 831
830# 832#
831# I2C GPIO expanders: 833# I2C GPIO expanders:
832# 834#
835# CONFIG_GPIO_MAX7300 is not set
833# CONFIG_GPIO_MAX732X is not set 836# CONFIG_GPIO_MAX732X is not set
834# CONFIG_GPIO_PCA953X is not set 837# CONFIG_GPIO_PCA953X is not set
835# CONFIG_GPIO_PCF857X is not set 838# CONFIG_GPIO_PCF857X is not set
839# CONFIG_GPIO_ADP5588 is not set
836 840
837# 841#
838# PCI GPIO expanders: 842# PCI GPIO expanders:
@@ -861,20 +865,23 @@ CONFIG_SSB_POSSIBLE=y
861# Multifunction device drivers 865# Multifunction device drivers
862# 866#
863# CONFIG_MFD_CORE is not set 867# CONFIG_MFD_CORE is not set
868# CONFIG_MFD_88PM860X is not set
864# CONFIG_MFD_SM501 is not set 869# CONFIG_MFD_SM501 is not set
865# CONFIG_MFD_SH_MOBILE_SDHI is not set 870# CONFIG_MFD_SH_MOBILE_SDHI is not set
866# CONFIG_HTC_PASIC3 is not set 871# CONFIG_HTC_PASIC3 is not set
872# CONFIG_HTC_I2CPLD is not set
867# CONFIG_TPS65010 is not set 873# CONFIG_TPS65010 is not set
868# CONFIG_TWL4030_CORE is not set 874# CONFIG_TWL4030_CORE is not set
869# CONFIG_MFD_TMIO is not set 875# CONFIG_MFD_TMIO is not set
870# CONFIG_PMIC_DA903X is not set 876# CONFIG_PMIC_DA903X is not set
871# CONFIG_PMIC_ADP5520 is not set 877# CONFIG_PMIC_ADP5520 is not set
878# CONFIG_MFD_MAX8925 is not set
872# CONFIG_MFD_WM8400 is not set 879# CONFIG_MFD_WM8400 is not set
873# CONFIG_MFD_WM831X is not set 880# CONFIG_MFD_WM831X is not set
874# CONFIG_MFD_WM8350_I2C is not set 881# CONFIG_MFD_WM8350_I2C is not set
882# CONFIG_MFD_WM8994 is not set
875# CONFIG_MFD_PCF50633 is not set 883# CONFIG_MFD_PCF50633 is not set
876# CONFIG_AB3100_CORE is not set 884# CONFIG_AB3100_CORE is not set
877# CONFIG_MFD_88PM8607 is not set
878# CONFIG_REGULATOR is not set 885# CONFIG_REGULATOR is not set
879CONFIG_MEDIA_SUPPORT=y 886CONFIG_MEDIA_SUPPORT=y
880 887
@@ -1054,6 +1061,7 @@ CONFIG_USB_G_SERIAL=m
1054# CONFIG_USB_MIDI_GADGET is not set 1061# CONFIG_USB_MIDI_GADGET is not set
1055# CONFIG_USB_G_PRINTER is not set 1062# CONFIG_USB_G_PRINTER is not set
1056# CONFIG_USB_CDC_COMPOSITE is not set 1063# CONFIG_USB_CDC_COMPOSITE is not set
1064# CONFIG_USB_G_NOKIA is not set
1057# CONFIG_USB_G_MULTI is not set 1065# CONFIG_USB_G_MULTI is not set
1058 1066
1059# 1067#
@@ -1129,8 +1137,6 @@ CONFIG_RTC_DRV_SH=y
1129CONFIG_UIO=y 1137CONFIG_UIO=y
1130# CONFIG_UIO_PDRV is not set 1138# CONFIG_UIO_PDRV is not set
1131CONFIG_UIO_PDRV_GENIRQ=y 1139CONFIG_UIO_PDRV_GENIRQ=y
1132# CONFIG_UIO_SMX is not set
1133# CONFIG_UIO_SERCOS3 is not set
1134 1140
1135# 1141#
1136# TI VLYNQ 1142# TI VLYNQ
@@ -1143,7 +1149,6 @@ CONFIG_UIO_PDRV_GENIRQ=y
1143# CONFIG_EXT2_FS is not set 1149# CONFIG_EXT2_FS is not set
1144# CONFIG_EXT3_FS is not set 1150# CONFIG_EXT3_FS is not set
1145# CONFIG_EXT4_FS is not set 1151# CONFIG_EXT4_FS is not set
1146CONFIG_EXT4_USE_FOR_EXT23=y
1147# CONFIG_REISERFS_FS is not set 1152# CONFIG_REISERFS_FS is not set
1148# CONFIG_JFS_FS is not set 1153# CONFIG_JFS_FS is not set
1149# CONFIG_FS_POSIX_ACL is not set 1154# CONFIG_FS_POSIX_ACL is not set
@@ -1202,6 +1207,7 @@ CONFIG_MISC_FILESYSTEMS=y
1202# CONFIG_BFS_FS is not set 1207# CONFIG_BFS_FS is not set
1203# CONFIG_EFS_FS is not set 1208# CONFIG_EFS_FS is not set
1204# CONFIG_JFFS2_FS is not set 1209# CONFIG_JFFS2_FS is not set
1210# CONFIG_LOGFS is not set
1205# CONFIG_CRAMFS is not set 1211# CONFIG_CRAMFS is not set
1206# CONFIG_SQUASHFS is not set 1212# CONFIG_SQUASHFS is not set
1207# CONFIG_VXFS_FS is not set 1213# CONFIG_VXFS_FS is not set
@@ -1224,6 +1230,7 @@ CONFIG_SUNRPC=y
1224# CONFIG_RPCSEC_GSS_KRB5 is not set 1230# CONFIG_RPCSEC_GSS_KRB5 is not set
1225# CONFIG_RPCSEC_GSS_SPKM3 is not set 1231# CONFIG_RPCSEC_GSS_SPKM3 is not set
1226# CONFIG_SMB_FS is not set 1232# CONFIG_SMB_FS is not set
1233# CONFIG_CEPH_FS is not set
1227# CONFIG_CIFS is not set 1234# CONFIG_CIFS is not set
1228# CONFIG_NCP_FS is not set 1235# CONFIG_NCP_FS is not set
1229# CONFIG_CODA_FS is not set 1236# CONFIG_CODA_FS is not set
@@ -1251,13 +1258,12 @@ CONFIG_FRAME_WARN=1024
1251CONFIG_DEBUG_FS=y 1258CONFIG_DEBUG_FS=y
1252# CONFIG_HEADERS_CHECK is not set 1259# CONFIG_HEADERS_CHECK is not set
1253# CONFIG_DEBUG_KERNEL is not set 1260# CONFIG_DEBUG_KERNEL is not set
1254CONFIG_STACKTRACE=y
1255CONFIG_DEBUG_BUGVERBOSE=y 1261CONFIG_DEBUG_BUGVERBOSE=y
1256# CONFIG_DEBUG_MEMORY_INIT is not set 1262# CONFIG_DEBUG_MEMORY_INIT is not set
1257# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1263# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1264# CONFIG_LKDTM is not set
1258# CONFIG_LATENCYTOP is not set 1265# CONFIG_LATENCYTOP is not set
1259# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1266# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1260CONFIG_NOP_TRACER=y
1261CONFIG_HAVE_FUNCTION_TRACER=y 1267CONFIG_HAVE_FUNCTION_TRACER=y
1262CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1268CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1263CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1269CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1265,10 +1271,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1265CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1271CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1266CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1272CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1267CONFIG_RING_BUFFER=y 1273CONFIG_RING_BUFFER=y
1268CONFIG_EVENT_TRACING=y
1269CONFIG_CONTEXT_SWITCH_TRACER=y
1270CONFIG_RING_BUFFER_ALLOW_SWAP=y 1274CONFIG_RING_BUFFER_ALLOW_SWAP=y
1271CONFIG_TRACING=y
1272CONFIG_TRACING_SUPPORT=y 1275CONFIG_TRACING_SUPPORT=y
1273# CONFIG_FTRACE is not set 1276# CONFIG_FTRACE is not set
1274# CONFIG_DYNAMIC_DEBUG is not set 1277# CONFIG_DYNAMIC_DEBUG is not set
@@ -1383,7 +1386,8 @@ CONFIG_CRYPTO_WORKQUEUE=y
1383# 1386#
1384# CONFIG_CRYPTO_ANSI_CPRNG is not set 1387# CONFIG_CRYPTO_ANSI_CPRNG is not set
1385# CONFIG_CRYPTO_HW is not set 1388# CONFIG_CRYPTO_HW is not set
1386CONFIG_BINARY_PRINTF=y 1389# CONFIG_VIRTUALIZATION is not set
1390# CONFIG_BINARY_PRINTF is not set
1387 1391
1388# 1392#
1389# Library routines 1393# Library routines
diff --git a/arch/sh/configs/polaris_defconfig b/arch/sh/configs/polaris_defconfig
index d50c0314281e..826b1198959f 100644
--- a/arch/sh/configs/polaris_defconfig
+++ b/arch/sh/configs/polaris_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 11:45:25 2010 4# Tue May 18 15:53:51 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -30,6 +30,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y 32CONFIG_DMA_NONCOHERENT=y
33CONFIG_NEED_DMA_MAP_STATE=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION=""
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51# CONFIG_SWAP is not set 54# CONFIG_SWAP is not set
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
@@ -71,11 +74,6 @@ CONFIG_RCU_FANOUT=32
71# CONFIG_TREE_RCU_TRACE is not set 74# CONFIG_TREE_RCU_TRACE is not set
72# CONFIG_IKCONFIG is not set 75# CONFIG_IKCONFIG is not set
73CONFIG_LOG_BUF_SHIFT=14 76CONFIG_LOG_BUF_SHIFT=14
74CONFIG_GROUP_SCHED=y
75CONFIG_FAIR_GROUP_SCHED=y
76# CONFIG_RT_GROUP_SCHED is not set
77CONFIG_USER_SCHED=y
78# CONFIG_CGROUP_SCHED is not set
79# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
80CONFIG_SYSFS_DEPRECATED=y 78CONFIG_SYSFS_DEPRECATED=y
81CONFIG_SYSFS_DEPRECATED_V2=y 79CONFIG_SYSFS_DEPRECATED_V2=y
@@ -109,8 +107,9 @@ CONFIG_PERF_USE_VMALLOC=y
109# 107#
110# Kernel Performance Events And Counters 108# Kernel Performance Events And Counters
111# 109#
112# CONFIG_PERF_EVENTS is not set 110CONFIG_PERF_EVENTS=y
113# CONFIG_PERF_COUNTERS is not set 111# CONFIG_PERF_COUNTERS is not set
112# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
114CONFIG_VM_EVENT_COUNTERS=y 113CONFIG_VM_EVENT_COUNTERS=y
115CONFIG_COMPAT_BRK=y 114CONFIG_COMPAT_BRK=y
116CONFIG_SLAB=y 115CONFIG_SLAB=y
@@ -126,6 +125,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y 125CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 126CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 127CONFIG_HAVE_DMA_API_DEBUG=y
128CONFIG_HAVE_HW_BREAKPOINT=y
129 129
130# 130#
131# GCOV-based kernel profiling 131# GCOV-based kernel profiling
@@ -244,6 +244,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
244CONFIG_MAX_ACTIVE_REGIONS=1 244CONFIG_MAX_ACTIVE_REGIONS=1
245CONFIG_ARCH_POPULATES_NODE_MAP=y 245CONFIG_ARCH_POPULATES_NODE_MAP=y
246CONFIG_ARCH_SELECT_MEMORY_MODEL=y 246CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_UNCACHED_MAPPING=y
247CONFIG_PAGE_SIZE_4KB=y 248CONFIG_PAGE_SIZE_4KB=y
248# CONFIG_PAGE_SIZE_8KB is not set 249# CONFIG_PAGE_SIZE_8KB is not set
249# CONFIG_PAGE_SIZE_16KB is not set 250# CONFIG_PAGE_SIZE_16KB is not set
@@ -259,7 +260,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
259CONFIG_SPLIT_PTLOCK_CPUS=999999 260CONFIG_SPLIT_PTLOCK_CPUS=999999
260# CONFIG_PHYS_ADDR_T_64BIT is not set 261# CONFIG_PHYS_ADDR_T_64BIT is not set
261CONFIG_ZONE_DMA_FLAG=0 262CONFIG_ZONE_DMA_FLAG=0
262CONFIG_NR_QUICK=2 263CONFIG_NR_QUICK=1
263# CONFIG_KSM is not set 264# CONFIG_KSM is not set
264CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 265CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
265 266
@@ -340,7 +341,6 @@ CONFIG_SCHED_HRTICK=y
340CONFIG_PREEMPT=y 341CONFIG_PREEMPT=y
341CONFIG_GUSA=y 342CONFIG_GUSA=y
342# CONFIG_GUSA_RB is not set 343# CONFIG_GUSA_RB is not set
343# CONFIG_SPARSE_IRQ is not set
344 344
345# 345#
346# Boot options 346# Boot options
@@ -377,7 +377,6 @@ CONFIG_NET=y
377# Networking options 377# Networking options
378# 378#
379CONFIG_PACKET=y 379CONFIG_PACKET=y
380CONFIG_PACKET_MMAP=y
381CONFIG_UNIX=y 380CONFIG_UNIX=y
382# CONFIG_NET_KEY is not set 381# CONFIG_NET_KEY is not set
383CONFIG_INET=y 382CONFIG_INET=y
@@ -583,6 +582,7 @@ CONFIG_HAVE_IDE=y
583# 582#
584# SCSI device support 583# SCSI device support
585# 584#
585CONFIG_SCSI_MOD=y
586# CONFIG_RAID_ATTRS is not set 586# CONFIG_RAID_ATTRS is not set
587# CONFIG_SCSI is not set 587# CONFIG_SCSI is not set
588# CONFIG_SCSI_DMA is not set 588# CONFIG_SCSI_DMA is not set
@@ -712,6 +712,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
712CONFIG_SERIAL_SH_SCI_CONSOLE=y 712CONFIG_SERIAL_SH_SCI_CONSOLE=y
713CONFIG_SERIAL_CORE=y 713CONFIG_SERIAL_CORE=y
714CONFIG_SERIAL_CORE_CONSOLE=y 714CONFIG_SERIAL_CORE_CONSOLE=y
715# CONFIG_SERIAL_TIMBERDALE is not set
715CONFIG_UNIX98_PTYS=y 716CONFIG_UNIX98_PTYS=y
716# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 717# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
717# CONFIG_LEGACY_PTYS is not set 718# CONFIG_LEGACY_PTYS is not set
@@ -829,7 +830,6 @@ CONFIG_RTC_DRV_SH=y
829# CONFIG_EXT2_FS is not set 830# CONFIG_EXT2_FS is not set
830# CONFIG_EXT3_FS is not set 831# CONFIG_EXT3_FS is not set
831# CONFIG_EXT4_FS is not set 832# CONFIG_EXT4_FS is not set
832CONFIG_EXT4_USE_FOR_EXT23=y
833# CONFIG_REISERFS_FS is not set 833# CONFIG_REISERFS_FS is not set
834# CONFIG_JFS_FS is not set 834# CONFIG_JFS_FS is not set
835# CONFIG_FS_POSIX_ACL is not set 835# CONFIG_FS_POSIX_ACL is not set
@@ -896,6 +896,7 @@ CONFIG_JFFS2_ZLIB=y
896# CONFIG_JFFS2_LZO is not set 896# CONFIG_JFFS2_LZO is not set
897CONFIG_JFFS2_RTIME=y 897CONFIG_JFFS2_RTIME=y
898# CONFIG_JFFS2_RUBIN is not set 898# CONFIG_JFFS2_RUBIN is not set
899# CONFIG_LOGFS is not set
899# CONFIG_CRAMFS is not set 900# CONFIG_CRAMFS is not set
900# CONFIG_SQUASHFS is not set 901# CONFIG_SQUASHFS is not set
901# CONFIG_VXFS_FS is not set 902# CONFIG_VXFS_FS is not set
@@ -919,6 +920,7 @@ CONFIG_SUNRPC=y
919# CONFIG_RPCSEC_GSS_KRB5 is not set 920# CONFIG_RPCSEC_GSS_KRB5 is not set
920# CONFIG_RPCSEC_GSS_SPKM3 is not set 921# CONFIG_RPCSEC_GSS_SPKM3 is not set
921# CONFIG_SMB_FS is not set 922# CONFIG_SMB_FS is not set
923# CONFIG_CEPH_FS is not set
922# CONFIG_CIFS is not set 924# CONFIG_CIFS is not set
923# CONFIG_NCP_FS is not set 925# CONFIG_NCP_FS is not set
924# CONFIG_CODA_FS is not set 926# CONFIG_CODA_FS is not set
@@ -958,6 +960,7 @@ CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
958# CONFIG_TIMER_STATS is not set 960# CONFIG_TIMER_STATS is not set
959# CONFIG_DEBUG_OBJECTS is not set 961# CONFIG_DEBUG_OBJECTS is not set
960# CONFIG_DEBUG_SLAB is not set 962# CONFIG_DEBUG_SLAB is not set
963# CONFIG_DEBUG_KMEMLEAK is not set
961CONFIG_DEBUG_PREEMPT=y 964CONFIG_DEBUG_PREEMPT=y
962CONFIG_DEBUG_RT_MUTEXES=y 965CONFIG_DEBUG_RT_MUTEXES=y
963CONFIG_DEBUG_PI_LIST=y 966CONFIG_DEBUG_PI_LIST=y
@@ -1010,6 +1013,7 @@ CONFIG_FTRACE=y
1010CONFIG_BRANCH_PROFILE_NONE=y 1013CONFIG_BRANCH_PROFILE_NONE=y
1011# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1014# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1012# CONFIG_PROFILE_ALL_BRANCHES is not set 1015# CONFIG_PROFILE_ALL_BRANCHES is not set
1016# CONFIG_KSYM_TRACER is not set
1013# CONFIG_STACK_TRACER is not set 1017# CONFIG_STACK_TRACER is not set
1014# CONFIG_KMEMTRACE is not set 1018# CONFIG_KMEMTRACE is not set
1015# CONFIG_WORKQUEUE_TRACER is not set 1019# CONFIG_WORKQUEUE_TRACER is not set
@@ -1038,6 +1042,7 @@ CONFIG_DUMP_CODE=y
1038CONFIG_DEFAULT_SECURITY_DAC=y 1042CONFIG_DEFAULT_SECURITY_DAC=y
1039CONFIG_DEFAULT_SECURITY="" 1043CONFIG_DEFAULT_SECURITY=""
1040# CONFIG_CRYPTO is not set 1044# CONFIG_CRYPTO is not set
1045# CONFIG_VIRTUALIZATION is not set
1041# CONFIG_BINARY_PRINTF is not set 1046# CONFIG_BINARY_PRINTF is not set
1042 1047
1043# 1048#
diff --git a/arch/sh/configs/r7780mp_defconfig b/arch/sh/configs/r7780mp_defconfig
index efda63d4070a..4b751bd37e20 100644
--- a/arch/sh/configs/r7780mp_defconfig
+++ b/arch/sh/configs/r7780mp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:16:13 2010 4# Tue May 18 15:58:09 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_IO_TRAPPED=y 34CONFIG_IO_TRAPPED=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -48,9 +49,11 @@ CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y 49CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y 50CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y 51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
51CONFIG_KERNEL_GZIP=y 53CONFIG_KERNEL_GZIP=y
52# CONFIG_KERNEL_BZIP2 is not set 54# CONFIG_KERNEL_BZIP2 is not set
53# CONFIG_KERNEL_LZMA is not set 55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
54CONFIG_SWAP=y 57CONFIG_SWAP=y
55CONFIG_SYSVIPC=y 58CONFIG_SYSVIPC=y
56CONFIG_SYSVIPC_SYSCTL=y 59CONFIG_SYSVIPC_SYSCTL=y
@@ -73,11 +76,6 @@ CONFIG_RCU_FANOUT=32
73CONFIG_IKCONFIG=y 76CONFIG_IKCONFIG=y
74CONFIG_IKCONFIG_PROC=y 77CONFIG_IKCONFIG_PROC=y
75CONFIG_LOG_BUF_SHIFT=14 78CONFIG_LOG_BUF_SHIFT=14
76CONFIG_GROUP_SCHED=y
77CONFIG_FAIR_GROUP_SCHED=y
78# CONFIG_RT_GROUP_SCHED is not set
79CONFIG_USER_SCHED=y
80# CONFIG_CGROUP_SCHED is not set
81# CONFIG_CGROUPS is not set 79# CONFIG_CGROUPS is not set
82CONFIG_SYSFS_DEPRECATED=y 80CONFIG_SYSFS_DEPRECATED=y
83CONFIG_SYSFS_DEPRECATED_V2=y 81CONFIG_SYSFS_DEPRECATED_V2=y
@@ -112,7 +110,6 @@ CONFIG_PERF_USE_VMALLOC=y
112# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
113# 111#
114CONFIG_PERF_EVENTS=y 112CONFIG_PERF_EVENTS=y
115CONFIG_EVENT_PROFILE=y
116# CONFIG_PERF_COUNTERS is not set 113# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set 114# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
118CONFIG_VM_EVENT_COUNTERS=y 115CONFIG_VM_EVENT_COUNTERS=y
@@ -122,7 +119,6 @@ CONFIG_SLAB=y
122# CONFIG_SLUB is not set 119# CONFIG_SLUB is not set
123# CONFIG_SLOB is not set 120# CONFIG_SLOB is not set
124CONFIG_PROFILING=y 121CONFIG_PROFILING=y
125CONFIG_TRACEPOINTS=y
126CONFIG_OPROFILE=m 122CONFIG_OPROFILE=m
127CONFIG_HAVE_OPROFILE=y 123CONFIG_HAVE_OPROFILE=y
128# CONFIG_KPROBES is not set 124# CONFIG_KPROBES is not set
@@ -133,6 +129,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
133CONFIG_HAVE_DMA_ATTRS=y 129CONFIG_HAVE_DMA_ATTRS=y
134CONFIG_HAVE_CLK=y 130CONFIG_HAVE_CLK=y
135CONFIG_HAVE_DMA_API_DEBUG=y 131CONFIG_HAVE_DMA_API_DEBUG=y
132CONFIG_HAVE_HW_BREAKPOINT=y
136 133
137# 134#
138# GCOV-based kernel profiling 135# GCOV-based kernel profiling
@@ -245,11 +242,8 @@ CONFIG_PAGE_OFFSET=0x80000000
245CONFIG_FORCE_MAX_ZONEORDER=11 242CONFIG_FORCE_MAX_ZONEORDER=11
246CONFIG_MEMORY_START=0x08000000 243CONFIG_MEMORY_START=0x08000000
247CONFIG_MEMORY_SIZE=0x08000000 244CONFIG_MEMORY_SIZE=0x08000000
248# CONFIG_29BIT is not set 245CONFIG_29BIT=y
249CONFIG_32BIT=y
250CONFIG_PMB_ENABLE=y
251# CONFIG_PMB is not set 246# CONFIG_PMB is not set
252CONFIG_PMB_FIXED=y
253CONFIG_VSYSCALL=y 247CONFIG_VSYSCALL=y
254CONFIG_ARCH_FLATMEM_ENABLE=y 248CONFIG_ARCH_FLATMEM_ENABLE=y
255CONFIG_ARCH_SPARSEMEM_ENABLE=y 249CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -257,6 +251,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
257CONFIG_MAX_ACTIVE_REGIONS=1 251CONFIG_MAX_ACTIVE_REGIONS=1
258CONFIG_ARCH_POPULATES_NODE_MAP=y 252CONFIG_ARCH_POPULATES_NODE_MAP=y
259CONFIG_ARCH_SELECT_MEMORY_MODEL=y 253CONFIG_ARCH_SELECT_MEMORY_MODEL=y
254CONFIG_UNCACHED_MAPPING=y
260CONFIG_PAGE_SIZE_4KB=y 255CONFIG_PAGE_SIZE_4KB=y
261# CONFIG_PAGE_SIZE_8KB is not set 256# CONFIG_PAGE_SIZE_8KB is not set
262# CONFIG_PAGE_SIZE_16KB is not set 257# CONFIG_PAGE_SIZE_16KB is not set
@@ -278,7 +273,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
278CONFIG_SPLIT_PTLOCK_CPUS=4 273CONFIG_SPLIT_PTLOCK_CPUS=4
279# CONFIG_PHYS_ADDR_T_64BIT is not set 274# CONFIG_PHYS_ADDR_T_64BIT is not set
280CONFIG_ZONE_DMA_FLAG=0 275CONFIG_ZONE_DMA_FLAG=0
281CONFIG_NR_QUICK=2 276CONFIG_NR_QUICK=1
282# CONFIG_KSM is not set 277# CONFIG_KSM is not set
283CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 278CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
284 279
@@ -358,7 +353,7 @@ CONFIG_KEXEC=y
358# CONFIG_PREEMPT_VOLUNTARY is not set 353# CONFIG_PREEMPT_VOLUNTARY is not set
359CONFIG_PREEMPT=y 354CONFIG_PREEMPT=y
360CONFIG_GUSA=y 355CONFIG_GUSA=y
361# CONFIG_SPARSE_IRQ is not set 356# CONFIG_INTC_USERIMASK is not set
362 357
363# 358#
364# Boot options 359# Boot options
@@ -374,9 +369,9 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
374# Bus options 369# Bus options
375# 370#
376CONFIG_PCI=y 371CONFIG_PCI=y
372CONFIG_PCI_DOMAINS=y
377# CONFIG_PCIEPORTBUS is not set 373# CONFIG_PCIEPORTBUS is not set
378# CONFIG_ARCH_SUPPORTS_MSI is not set 374# CONFIG_ARCH_SUPPORTS_MSI is not set
379CONFIG_PCI_LEGACY=y
380# CONFIG_PCI_DEBUG is not set 375# CONFIG_PCI_DEBUG is not set
381# CONFIG_PCI_STUB is not set 376# CONFIG_PCI_STUB is not set
382# CONFIG_PCI_IOV is not set 377# CONFIG_PCI_IOV is not set
@@ -402,7 +397,6 @@ CONFIG_NET=y
402# Networking options 397# Networking options
403# 398#
404CONFIG_PACKET=y 399CONFIG_PACKET=y
405# CONFIG_PACKET_MMAP is not set
406CONFIG_UNIX=y 400CONFIG_UNIX=y
407CONFIG_XFRM=y 401CONFIG_XFRM=y
408# CONFIG_XFRM_USER is not set 402# CONFIG_XFRM_USER is not set
@@ -452,6 +446,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
452# CONFIG_ATM is not set 446# CONFIG_ATM is not set
453CONFIG_STP=m 447CONFIG_STP=m
454CONFIG_BRIDGE=m 448CONFIG_BRIDGE=m
449CONFIG_BRIDGE_IGMP_SNOOPING=y
455# CONFIG_NET_DSA is not set 450# CONFIG_NET_DSA is not set
456# CONFIG_VLAN_8021Q is not set 451# CONFIG_VLAN_8021Q is not set
457# CONFIG_DECNET is not set 452# CONFIG_DECNET is not set
@@ -472,7 +467,6 @@ CONFIG_LLC=m
472# Network testing 467# Network testing
473# 468#
474# CONFIG_NET_PKTGEN is not set 469# CONFIG_NET_PKTGEN is not set
475# CONFIG_NET_DROP_MONITOR is not set
476# CONFIG_HAMRADIO is not set 470# CONFIG_HAMRADIO is not set
477# CONFIG_CAN is not set 471# CONFIG_CAN is not set
478# CONFIG_IRDA is not set 472# CONFIG_IRDA is not set
@@ -621,6 +615,7 @@ CONFIG_MISC_DEVICES=y
621# CONFIG_ENCLOSURE_SERVICES is not set 615# CONFIG_ENCLOSURE_SERVICES is not set
622# CONFIG_HP_ILO is not set 616# CONFIG_HP_ILO is not set
623# CONFIG_ISL29003 is not set 617# CONFIG_ISL29003 is not set
618# CONFIG_SENSORS_TSL2550 is not set
624# CONFIG_DS1682 is not set 619# CONFIG_DS1682 is not set
625# CONFIG_C2PORT is not set 620# CONFIG_C2PORT is not set
626 621
@@ -638,6 +633,7 @@ CONFIG_HAVE_IDE=y
638# 633#
639# SCSI device support 634# SCSI device support
640# 635#
636CONFIG_SCSI_MOD=y
641# CONFIG_RAID_ATTRS is not set 637# CONFIG_RAID_ATTRS is not set
642CONFIG_SCSI=y 638CONFIG_SCSI=y
643CONFIG_SCSI_DMA=y 639CONFIG_SCSI_DMA=y
@@ -755,6 +751,7 @@ CONFIG_SATA_SIL=y
755# CONFIG_PATA_IT821X is not set 751# CONFIG_PATA_IT821X is not set
756# CONFIG_PATA_IT8213 is not set 752# CONFIG_PATA_IT8213 is not set
757# CONFIG_PATA_JMICRON is not set 753# CONFIG_PATA_JMICRON is not set
754# CONFIG_PATA_LEGACY is not set
758# CONFIG_PATA_TRIFLEX is not set 755# CONFIG_PATA_TRIFLEX is not set
759# CONFIG_PATA_MARVELL is not set 756# CONFIG_PATA_MARVELL is not set
760# CONFIG_PATA_MPIIX is not set 757# CONFIG_PATA_MPIIX is not set
@@ -791,7 +788,7 @@ CONFIG_PATA_PLATFORM=y
791# 788#
792 789
793# 790#
794# See the help texts for more information. 791# The newer stack is recommended.
795# 792#
796# CONFIG_FIREWIRE is not set 793# CONFIG_FIREWIRE is not set
797# CONFIG_IEEE1394 is not set 794# CONFIG_IEEE1394 is not set
@@ -832,6 +829,7 @@ CONFIG_NET_PCI=y
832CONFIG_PCNET32=m 829CONFIG_PCNET32=m
833# CONFIG_AMD8111_ETH is not set 830# CONFIG_AMD8111_ETH is not set
834# CONFIG_ADAPTEC_STARFIRE is not set 831# CONFIG_ADAPTEC_STARFIRE is not set
832# CONFIG_KSZ884X_PCI is not set
835# CONFIG_B44 is not set 833# CONFIG_B44 is not set
836# CONFIG_FORCEDETH is not set 834# CONFIG_FORCEDETH is not set
837# CONFIG_E100 is not set 835# CONFIG_E100 is not set
@@ -884,6 +882,8 @@ CONFIG_NETDEV_10000=y
884# CONFIG_CHELSIO_T1 is not set 882# CONFIG_CHELSIO_T1 is not set
885CONFIG_CHELSIO_T3_DEPENDS=y 883CONFIG_CHELSIO_T3_DEPENDS=y
886# CONFIG_CHELSIO_T3 is not set 884# CONFIG_CHELSIO_T3 is not set
885CONFIG_CHELSIO_T4_DEPENDS=y
886# CONFIG_CHELSIO_T4 is not set
887# CONFIG_ENIC is not set 887# CONFIG_ENIC is not set
888# CONFIG_IXGBE is not set 888# CONFIG_IXGBE is not set
889# CONFIG_IXGB is not set 889# CONFIG_IXGB is not set
@@ -896,6 +896,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
896# CONFIG_MLX4_CORE is not set 896# CONFIG_MLX4_CORE is not set
897# CONFIG_TEHUTI is not set 897# CONFIG_TEHUTI is not set
898# CONFIG_BNX2X is not set 898# CONFIG_BNX2X is not set
899# CONFIG_QLCNIC is not set
899# CONFIG_QLGE is not set 900# CONFIG_QLGE is not set
900# CONFIG_SFC is not set 901# CONFIG_SFC is not set
901# CONFIG_BE2NET is not set 902# CONFIG_BE2NET is not set
@@ -995,6 +996,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
995CONFIG_SERIAL_CORE=y 996CONFIG_SERIAL_CORE=y
996CONFIG_SERIAL_CORE_CONSOLE=y 997CONFIG_SERIAL_CORE_CONSOLE=y
997# CONFIG_SERIAL_JSM is not set 998# CONFIG_SERIAL_JSM is not set
999# CONFIG_SERIAL_TIMBERDALE is not set
998CONFIG_UNIX98_PTYS=y 1000CONFIG_UNIX98_PTYS=y
999# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 1001# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1000CONFIG_LEGACY_PTYS=y 1002CONFIG_LEGACY_PTYS=y
@@ -1043,6 +1045,7 @@ CONFIG_I2C_HIGHLANDER=y
1043# CONFIG_I2C_OCORES is not set 1045# CONFIG_I2C_OCORES is not set
1044# CONFIG_I2C_SH_MOBILE is not set 1046# CONFIG_I2C_SH_MOBILE is not set
1045# CONFIG_I2C_SIMTEC is not set 1047# CONFIG_I2C_SIMTEC is not set
1048# CONFIG_I2C_XILINX is not set
1046 1049
1047# 1050#
1048# External I2C/SMBus adapter drivers 1051# External I2C/SMBus adapter drivers
@@ -1055,15 +1058,9 @@ CONFIG_I2C_HIGHLANDER=y
1055# 1058#
1056# CONFIG_I2C_PCA_PLATFORM is not set 1059# CONFIG_I2C_PCA_PLATFORM is not set
1057# CONFIG_I2C_STUB is not set 1060# CONFIG_I2C_STUB is not set
1058
1059#
1060# Miscellaneous I2C Chip support
1061#
1062# CONFIG_SENSORS_TSL2550 is not set
1063# CONFIG_I2C_DEBUG_CORE is not set 1061# CONFIG_I2C_DEBUG_CORE is not set
1064# CONFIG_I2C_DEBUG_ALGO is not set 1062# CONFIG_I2C_DEBUG_ALGO is not set
1065# CONFIG_I2C_DEBUG_BUS is not set 1063# CONFIG_I2C_DEBUG_BUS is not set
1066# CONFIG_I2C_DEBUG_CHIP is not set
1067# CONFIG_SPI is not set 1064# CONFIG_SPI is not set
1068 1065
1069# 1066#
@@ -1087,10 +1084,11 @@ CONFIG_HWMON=y
1087# CONFIG_SENSORS_ADM1029 is not set 1084# CONFIG_SENSORS_ADM1029 is not set
1088# CONFIG_SENSORS_ADM1031 is not set 1085# CONFIG_SENSORS_ADM1031 is not set
1089# CONFIG_SENSORS_ADM9240 is not set 1086# CONFIG_SENSORS_ADM9240 is not set
1087# CONFIG_SENSORS_ADT7411 is not set
1090# CONFIG_SENSORS_ADT7462 is not set 1088# CONFIG_SENSORS_ADT7462 is not set
1091# CONFIG_SENSORS_ADT7470 is not set 1089# CONFIG_SENSORS_ADT7470 is not set
1092# CONFIG_SENSORS_ADT7473 is not set
1093# CONFIG_SENSORS_ADT7475 is not set 1090# CONFIG_SENSORS_ADT7475 is not set
1091# CONFIG_SENSORS_ASC7621 is not set
1094# CONFIG_SENSORS_ATXP1 is not set 1092# CONFIG_SENSORS_ATXP1 is not set
1095# CONFIG_SENSORS_DS1621 is not set 1093# CONFIG_SENSORS_DS1621 is not set
1096# CONFIG_SENSORS_I5K_AMB is not set 1094# CONFIG_SENSORS_I5K_AMB is not set
@@ -1127,6 +1125,7 @@ CONFIG_HWMON=y
1127# CONFIG_SENSORS_SMSC47M192 is not set 1125# CONFIG_SENSORS_SMSC47M192 is not set
1128# CONFIG_SENSORS_SMSC47B397 is not set 1126# CONFIG_SENSORS_SMSC47B397 is not set
1129# CONFIG_SENSORS_ADS7828 is not set 1127# CONFIG_SENSORS_ADS7828 is not set
1128# CONFIG_SENSORS_AMC6821 is not set
1130# CONFIG_SENSORS_THMC50 is not set 1129# CONFIG_SENSORS_THMC50 is not set
1131# CONFIG_SENSORS_TMP401 is not set 1130# CONFIG_SENSORS_TMP401 is not set
1132# CONFIG_SENSORS_TMP421 is not set 1131# CONFIG_SENSORS_TMP421 is not set
@@ -1156,6 +1155,7 @@ CONFIG_SSB_POSSIBLE=y
1156# Multifunction device drivers 1155# Multifunction device drivers
1157# 1156#
1158# CONFIG_MFD_CORE is not set 1157# CONFIG_MFD_CORE is not set
1158# CONFIG_MFD_88PM860X is not set
1159# CONFIG_MFD_SM501 is not set 1159# CONFIG_MFD_SM501 is not set
1160# CONFIG_MFD_SH_MOBILE_SDHI is not set 1160# CONFIG_MFD_SH_MOBILE_SDHI is not set
1161# CONFIG_HTC_PASIC3 is not set 1161# CONFIG_HTC_PASIC3 is not set
@@ -1163,12 +1163,14 @@ CONFIG_SSB_POSSIBLE=y
1163# CONFIG_MFD_TMIO is not set 1163# CONFIG_MFD_TMIO is not set
1164# CONFIG_PMIC_DA903X is not set 1164# CONFIG_PMIC_DA903X is not set
1165# CONFIG_PMIC_ADP5520 is not set 1165# CONFIG_PMIC_ADP5520 is not set
1166# CONFIG_MFD_MAX8925 is not set
1166# CONFIG_MFD_WM8400 is not set 1167# CONFIG_MFD_WM8400 is not set
1167# CONFIG_MFD_WM831X is not set 1168# CONFIG_MFD_WM831X is not set
1168# CONFIG_MFD_WM8350_I2C is not set 1169# CONFIG_MFD_WM8350_I2C is not set
1170# CONFIG_MFD_WM8994 is not set
1169# CONFIG_MFD_PCF50633 is not set 1171# CONFIG_MFD_PCF50633 is not set
1170# CONFIG_AB3100_CORE is not set 1172# CONFIG_AB3100_CORE is not set
1171# CONFIG_MFD_88PM8607 is not set 1173# CONFIG_LPC_SCH is not set
1172# CONFIG_REGULATOR is not set 1174# CONFIG_REGULATOR is not set
1173# CONFIG_MEDIA_SUPPORT is not set 1175# CONFIG_MEDIA_SUPPORT is not set
1174 1176
@@ -1176,6 +1178,7 @@ CONFIG_SSB_POSSIBLE=y
1176# Graphics support 1178# Graphics support
1177# 1179#
1178CONFIG_VGA_ARB=y 1180CONFIG_VGA_ARB=y
1181CONFIG_VGA_ARB_MAX_GPUS=16
1179# CONFIG_DRM is not set 1182# CONFIG_DRM is not set
1180# CONFIG_VGASTATE is not set 1183# CONFIG_VGASTATE is not set
1181# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1184# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1372,6 +1375,7 @@ CONFIG_MISC_FILESYSTEMS=y
1372# CONFIG_BFS_FS is not set 1375# CONFIG_BFS_FS is not set
1373# CONFIG_EFS_FS is not set 1376# CONFIG_EFS_FS is not set
1374# CONFIG_JFFS2_FS is not set 1377# CONFIG_JFFS2_FS is not set
1378# CONFIG_LOGFS is not set
1375# CONFIG_CRAMFS is not set 1379# CONFIG_CRAMFS is not set
1376# CONFIG_SQUASHFS is not set 1380# CONFIG_SQUASHFS is not set
1377# CONFIG_VXFS_FS is not set 1381# CONFIG_VXFS_FS is not set
@@ -1402,6 +1406,7 @@ CONFIG_SUNRPC_GSS=y
1402CONFIG_RPCSEC_GSS_KRB5=y 1406CONFIG_RPCSEC_GSS_KRB5=y
1403# CONFIG_RPCSEC_GSS_SPKM3 is not set 1407# CONFIG_RPCSEC_GSS_SPKM3 is not set
1404# CONFIG_SMB_FS is not set 1408# CONFIG_SMB_FS is not set
1409# CONFIG_CEPH_FS is not set
1405# CONFIG_CIFS is not set 1410# CONFIG_CIFS is not set
1406# CONFIG_NCP_FS is not set 1411# CONFIG_NCP_FS is not set
1407# CONFIG_CODA_FS is not set 1412# CONFIG_CODA_FS is not set
@@ -1480,6 +1485,7 @@ CONFIG_SCHED_DEBUG=y
1480# CONFIG_TIMER_STATS is not set 1485# CONFIG_TIMER_STATS is not set
1481# CONFIG_DEBUG_OBJECTS is not set 1486# CONFIG_DEBUG_OBJECTS is not set
1482# CONFIG_DEBUG_SLAB is not set 1487# CONFIG_DEBUG_SLAB is not set
1488# CONFIG_DEBUG_KMEMLEAK is not set
1483# CONFIG_DEBUG_PREEMPT is not set 1489# CONFIG_DEBUG_PREEMPT is not set
1484# CONFIG_DEBUG_RT_MUTEXES is not set 1490# CONFIG_DEBUG_RT_MUTEXES is not set
1485# CONFIG_RT_MUTEX_TESTER is not set 1491# CONFIG_RT_MUTEX_TESTER is not set
@@ -1490,7 +1496,6 @@ CONFIG_SCHED_DEBUG=y
1490# CONFIG_LOCK_STAT is not set 1496# CONFIG_LOCK_STAT is not set
1491# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1497# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1492# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1498# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1493CONFIG_STACKTRACE=y
1494# CONFIG_DEBUG_KOBJECT is not set 1499# CONFIG_DEBUG_KOBJECT is not set
1495CONFIG_DEBUG_BUGVERBOSE=y 1500CONFIG_DEBUG_BUGVERBOSE=y
1496CONFIG_DEBUG_INFO=y 1501CONFIG_DEBUG_INFO=y
@@ -1507,11 +1512,11 @@ CONFIG_DEBUG_INFO=y
1507# CONFIG_BACKTRACE_SELF_TEST is not set 1512# CONFIG_BACKTRACE_SELF_TEST is not set
1508# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1513# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1509# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1514# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1515# CONFIG_LKDTM is not set
1510# CONFIG_FAULT_INJECTION is not set 1516# CONFIG_FAULT_INJECTION is not set
1511# CONFIG_LATENCYTOP is not set 1517# CONFIG_LATENCYTOP is not set
1512# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1518# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1513# CONFIG_PAGE_POISONING is not set 1519# CONFIG_PAGE_POISONING is not set
1514CONFIG_NOP_TRACER=y
1515CONFIG_HAVE_FUNCTION_TRACER=y 1520CONFIG_HAVE_FUNCTION_TRACER=y
1516CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1521CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1517CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1522CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1519,10 +1524,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1519CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1524CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1520CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1525CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1521CONFIG_RING_BUFFER=y 1526CONFIG_RING_BUFFER=y
1522CONFIG_EVENT_TRACING=y
1523CONFIG_CONTEXT_SWITCH_TRACER=y
1524CONFIG_RING_BUFFER_ALLOW_SWAP=y 1527CONFIG_RING_BUFFER_ALLOW_SWAP=y
1525CONFIG_TRACING=y
1526CONFIG_TRACING_SUPPORT=y 1528CONFIG_TRACING_SUPPORT=y
1527CONFIG_FTRACE=y 1529CONFIG_FTRACE=y
1528# CONFIG_FUNCTION_TRACER is not set 1530# CONFIG_FUNCTION_TRACER is not set
@@ -1535,6 +1537,7 @@ CONFIG_FTRACE=y
1535CONFIG_BRANCH_PROFILE_NONE=y 1537CONFIG_BRANCH_PROFILE_NONE=y
1536# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1538# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1537# CONFIG_PROFILE_ALL_BRANCHES is not set 1539# CONFIG_PROFILE_ALL_BRANCHES is not set
1540# CONFIG_KSYM_TRACER is not set
1538# CONFIG_STACK_TRACER is not set 1541# CONFIG_STACK_TRACER is not set
1539# CONFIG_KMEMTRACE is not set 1542# CONFIG_KMEMTRACE is not set
1540# CONFIG_WORKQUEUE_TRACER is not set 1543# CONFIG_WORKQUEUE_TRACER is not set
@@ -1662,7 +1665,8 @@ CONFIG_CRYPTO_DES=y
1662# CONFIG_CRYPTO_ANSI_CPRNG is not set 1665# CONFIG_CRYPTO_ANSI_CPRNG is not set
1663CONFIG_CRYPTO_HW=y 1666CONFIG_CRYPTO_HW=y
1664# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1667# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1665CONFIG_BINARY_PRINTF=y 1668# CONFIG_VIRTUALIZATION is not set
1669# CONFIG_BINARY_PRINTF is not set
1666 1670
1667# 1671#
1668# Library routines 1672# Library routines
diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig
index f4b00451dcee..f5e3819469e9 100644
--- a/arch/sh/configs/r7785rp_defconfig
+++ b/arch/sh/configs/r7785rp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:19:35 2010 4# Tue May 18 16:03:27 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -34,6 +34,7 @@ CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_IO_TRAPPED=y 35CONFIG_IO_TRAPPED=y
36CONFIG_DMA_NONCOHERENT=y 36CONFIG_DMA_NONCOHERENT=y
37CONFIG_NEED_DMA_MAP_STATE=y
37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
38CONFIG_CONSTRUCTORS=y 39CONFIG_CONSTRUCTORS=y
39 40
@@ -49,9 +50,11 @@ CONFIG_LOCALVERSION_AUTO=y
49CONFIG_HAVE_KERNEL_GZIP=y 50CONFIG_HAVE_KERNEL_GZIP=y
50CONFIG_HAVE_KERNEL_BZIP2=y 51CONFIG_HAVE_KERNEL_BZIP2=y
51CONFIG_HAVE_KERNEL_LZMA=y 52CONFIG_HAVE_KERNEL_LZMA=y
53CONFIG_HAVE_KERNEL_LZO=y
52CONFIG_KERNEL_GZIP=y 54CONFIG_KERNEL_GZIP=y
53# CONFIG_KERNEL_BZIP2 is not set 55# CONFIG_KERNEL_BZIP2 is not set
54# CONFIG_KERNEL_LZMA is not set 56# CONFIG_KERNEL_LZMA is not set
57# CONFIG_KERNEL_LZO is not set
55CONFIG_SWAP=y 58CONFIG_SWAP=y
56CONFIG_SYSVIPC=y 59CONFIG_SYSVIPC=y
57CONFIG_SYSVIPC_SYSCTL=y 60CONFIG_SYSVIPC_SYSCTL=y
@@ -77,7 +80,6 @@ CONFIG_TREE_RCU_TRACE=y
77CONFIG_IKCONFIG=y 80CONFIG_IKCONFIG=y
78CONFIG_IKCONFIG_PROC=y 81CONFIG_IKCONFIG_PROC=y
79CONFIG_LOG_BUF_SHIFT=14 82CONFIG_LOG_BUF_SHIFT=14
80# CONFIG_GROUP_SCHED is not set
81# CONFIG_CGROUPS is not set 83# CONFIG_CGROUPS is not set
82CONFIG_SYSFS_DEPRECATED=y 84CONFIG_SYSFS_DEPRECATED=y
83CONFIG_SYSFS_DEPRECATED_V2=y 85CONFIG_SYSFS_DEPRECATED_V2=y
@@ -112,7 +114,6 @@ CONFIG_PERF_USE_VMALLOC=y
112# Kernel Performance Events And Counters 114# Kernel Performance Events And Counters
113# 115#
114CONFIG_PERF_EVENTS=y 116CONFIG_PERF_EVENTS=y
115CONFIG_EVENT_PROFILE=y
116# CONFIG_PERF_COUNTERS is not set 117# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set 118# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
118CONFIG_VM_EVENT_COUNTERS=y 119CONFIG_VM_EVENT_COUNTERS=y
@@ -122,18 +123,17 @@ CONFIG_SLAB=y
122# CONFIG_SLUB is not set 123# CONFIG_SLUB is not set
123# CONFIG_SLOB is not set 124# CONFIG_SLOB is not set
124CONFIG_PROFILING=y 125CONFIG_PROFILING=y
125CONFIG_TRACEPOINTS=y
126CONFIG_OPROFILE=y 126CONFIG_OPROFILE=y
127CONFIG_HAVE_OPROFILE=y 127CONFIG_HAVE_OPROFILE=y
128CONFIG_KPROBES=y 128CONFIG_KPROBES=y
129CONFIG_KRETPROBES=y 129CONFIG_KRETPROBES=y
130CONFIG_HAVE_IOREMAP_PROT=y
131CONFIG_HAVE_KPROBES=y 130CONFIG_HAVE_KPROBES=y
132CONFIG_HAVE_KRETPROBES=y 131CONFIG_HAVE_KRETPROBES=y
133CONFIG_HAVE_ARCH_TRACEHOOK=y 132CONFIG_HAVE_ARCH_TRACEHOOK=y
134CONFIG_HAVE_DMA_ATTRS=y 133CONFIG_HAVE_DMA_ATTRS=y
135CONFIG_HAVE_CLK=y 134CONFIG_HAVE_CLK=y
136CONFIG_HAVE_DMA_API_DEBUG=y 135CONFIG_HAVE_DMA_API_DEBUG=y
136CONFIG_HAVE_HW_BREAKPOINT=y
137 137
138# 138#
139# GCOV-based kernel profiling 139# GCOV-based kernel profiling
@@ -247,12 +247,9 @@ CONFIG_PAGE_OFFSET=0x80000000
247CONFIG_FORCE_MAX_ZONEORDER=11 247CONFIG_FORCE_MAX_ZONEORDER=11
248CONFIG_MEMORY_START=0x08000000 248CONFIG_MEMORY_START=0x08000000
249CONFIG_MEMORY_SIZE=0x08000000 249CONFIG_MEMORY_SIZE=0x08000000
250# CONFIG_29BIT is not set 250CONFIG_29BIT=y
251CONFIG_32BIT=y
252CONFIG_PMB_ENABLE=y
253# CONFIG_PMB is not set 251# CONFIG_PMB is not set
254CONFIG_PMB_FIXED=y 252CONFIG_X2TLB=y
255# CONFIG_X2TLB is not set
256CONFIG_VSYSCALL=y 253CONFIG_VSYSCALL=y
257# CONFIG_NUMA is not set 254# CONFIG_NUMA is not set
258CONFIG_ARCH_FLATMEM_ENABLE=y 255CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -263,6 +260,8 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
263CONFIG_ARCH_SELECT_MEMORY_MODEL=y 260CONFIG_ARCH_SELECT_MEMORY_MODEL=y
264CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 261CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
265CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 262CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
263CONFIG_IOREMAP_FIXED=y
264CONFIG_UNCACHED_MAPPING=y
266CONFIG_PAGE_SIZE_4KB=y 265CONFIG_PAGE_SIZE_4KB=y
267# CONFIG_PAGE_SIZE_8KB is not set 266# CONFIG_PAGE_SIZE_8KB is not set
268# CONFIG_PAGE_SIZE_16KB is not set 267# CONFIG_PAGE_SIZE_16KB is not set
@@ -285,7 +284,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=999999
285CONFIG_MIGRATION=y 284CONFIG_MIGRATION=y
286# CONFIG_PHYS_ADDR_T_64BIT is not set 285# CONFIG_PHYS_ADDR_T_64BIT is not set
287CONFIG_ZONE_DMA_FLAG=0 286CONFIG_ZONE_DMA_FLAG=0
288CONFIG_NR_QUICK=2 287CONFIG_NR_QUICK=1
289# CONFIG_KSM is not set 288# CONFIG_KSM is not set
290CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 289CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
291 290
@@ -303,6 +302,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y
303# CONFIG_CPU_BIG_ENDIAN is not set 302# CONFIG_CPU_BIG_ENDIAN is not set
304CONFIG_SH_FPU=y 303CONFIG_SH_FPU=y
305CONFIG_SH_STORE_QUEUES=y 304CONFIG_SH_STORE_QUEUES=y
305# CONFIG_SPECULATIVE_EXECUTION is not set
306CONFIG_CPU_HAS_INTEVT=y 306CONFIG_CPU_HAS_INTEVT=y
307CONFIG_CPU_HAS_SR_RB=y 307CONFIG_CPU_HAS_SR_RB=y
308CONFIG_CPU_HAS_FPU=y 308CONFIG_CPU_HAS_FPU=y
@@ -377,7 +377,7 @@ CONFIG_KEXEC=y
377# CONFIG_PREEMPT_VOLUNTARY is not set 377# CONFIG_PREEMPT_VOLUNTARY is not set
378CONFIG_PREEMPT=y 378CONFIG_PREEMPT=y
379CONFIG_GUSA=y 379CONFIG_GUSA=y
380# CONFIG_SPARSE_IRQ is not set 380# CONFIG_INTC_USERIMASK is not set
381 381
382# 382#
383# Boot options 383# Boot options
@@ -393,9 +393,9 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
393# Bus options 393# Bus options
394# 394#
395CONFIG_PCI=y 395CONFIG_PCI=y
396CONFIG_PCI_DOMAINS=y
396# CONFIG_PCIEPORTBUS is not set 397# CONFIG_PCIEPORTBUS is not set
397# CONFIG_ARCH_SUPPORTS_MSI is not set 398# CONFIG_ARCH_SUPPORTS_MSI is not set
398# CONFIG_PCI_LEGACY is not set
399# CONFIG_PCI_DEBUG is not set 399# CONFIG_PCI_DEBUG is not set
400# CONFIG_PCI_STUB is not set 400# CONFIG_PCI_STUB is not set
401# CONFIG_PCI_IOV is not set 401# CONFIG_PCI_IOV is not set
@@ -421,7 +421,6 @@ CONFIG_NET=y
421# Networking options 421# Networking options
422# 422#
423CONFIG_PACKET=y 423CONFIG_PACKET=y
424# CONFIG_PACKET_MMAP is not set
425CONFIG_UNIX=y 424CONFIG_UNIX=y
426CONFIG_XFRM=y 425CONFIG_XFRM=y
427# CONFIG_XFRM_USER is not set 426# CONFIG_XFRM_USER is not set
@@ -471,6 +470,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
471# CONFIG_ATM is not set 470# CONFIG_ATM is not set
472CONFIG_STP=m 471CONFIG_STP=m
473CONFIG_BRIDGE=m 472CONFIG_BRIDGE=m
473CONFIG_BRIDGE_IGMP_SNOOPING=y
474# CONFIG_NET_DSA is not set 474# CONFIG_NET_DSA is not set
475# CONFIG_VLAN_8021Q is not set 475# CONFIG_VLAN_8021Q is not set
476# CONFIG_DECNET is not set 476# CONFIG_DECNET is not set
@@ -492,7 +492,6 @@ CONFIG_LLC=m
492# 492#
493# CONFIG_NET_PKTGEN is not set 493# CONFIG_NET_PKTGEN is not set
494# CONFIG_NET_TCPPROBE is not set 494# CONFIG_NET_TCPPROBE is not set
495# CONFIG_NET_DROP_MONITOR is not set
496# CONFIG_HAMRADIO is not set 495# CONFIG_HAMRADIO is not set
497# CONFIG_CAN is not set 496# CONFIG_CAN is not set
498# CONFIG_IRDA is not set 497# CONFIG_IRDA is not set
@@ -557,6 +556,7 @@ CONFIG_MISC_DEVICES=y
557# CONFIG_ENCLOSURE_SERVICES is not set 556# CONFIG_ENCLOSURE_SERVICES is not set
558# CONFIG_HP_ILO is not set 557# CONFIG_HP_ILO is not set
559# CONFIG_ISL29003 is not set 558# CONFIG_ISL29003 is not set
559# CONFIG_SENSORS_TSL2550 is not set
560# CONFIG_DS1682 is not set 560# CONFIG_DS1682 is not set
561# CONFIG_C2PORT is not set 561# CONFIG_C2PORT is not set
562 562
@@ -574,6 +574,7 @@ CONFIG_HAVE_IDE=y
574# 574#
575# SCSI device support 575# SCSI device support
576# 576#
577CONFIG_SCSI_MOD=y
577# CONFIG_RAID_ATTRS is not set 578# CONFIG_RAID_ATTRS is not set
578CONFIG_SCSI=y 579CONFIG_SCSI=y
579CONFIG_SCSI_DMA=y 580CONFIG_SCSI_DMA=y
@@ -691,6 +692,7 @@ CONFIG_SATA_SIL=y
691# CONFIG_PATA_IT821X is not set 692# CONFIG_PATA_IT821X is not set
692# CONFIG_PATA_IT8213 is not set 693# CONFIG_PATA_IT8213 is not set
693# CONFIG_PATA_JMICRON is not set 694# CONFIG_PATA_JMICRON is not set
695# CONFIG_PATA_LEGACY is not set
694# CONFIG_PATA_TRIFLEX is not set 696# CONFIG_PATA_TRIFLEX is not set
695# CONFIG_PATA_MARVELL is not set 697# CONFIG_PATA_MARVELL is not set
696# CONFIG_PATA_MPIIX is not set 698# CONFIG_PATA_MPIIX is not set
@@ -727,7 +729,7 @@ CONFIG_PATA_PLATFORM=y
727# 729#
728 730
729# 731#
730# See the help texts for more information. 732# The newer stack is recommended.
731# 733#
732# CONFIG_FIREWIRE is not set 734# CONFIG_FIREWIRE is not set
733# CONFIG_IEEE1394 is not set 735# CONFIG_IEEE1394 is not set
@@ -797,6 +799,8 @@ CONFIG_NETDEV_10000=y
797# CONFIG_CHELSIO_T1 is not set 799# CONFIG_CHELSIO_T1 is not set
798CONFIG_CHELSIO_T3_DEPENDS=y 800CONFIG_CHELSIO_T3_DEPENDS=y
799# CONFIG_CHELSIO_T3 is not set 801# CONFIG_CHELSIO_T3 is not set
802CONFIG_CHELSIO_T4_DEPENDS=y
803# CONFIG_CHELSIO_T4 is not set
800# CONFIG_ENIC is not set 804# CONFIG_ENIC is not set
801# CONFIG_IXGBE is not set 805# CONFIG_IXGBE is not set
802# CONFIG_IXGB is not set 806# CONFIG_IXGB is not set
@@ -809,6 +813,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
809# CONFIG_MLX4_CORE is not set 813# CONFIG_MLX4_CORE is not set
810# CONFIG_TEHUTI is not set 814# CONFIG_TEHUTI is not set
811# CONFIG_BNX2X is not set 815# CONFIG_BNX2X is not set
816# CONFIG_QLCNIC is not set
812# CONFIG_QLGE is not set 817# CONFIG_QLGE is not set
813# CONFIG_SFC is not set 818# CONFIG_SFC is not set
814# CONFIG_BE2NET is not set 819# CONFIG_BE2NET is not set
@@ -910,6 +915,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
910CONFIG_SERIAL_CORE=y 915CONFIG_SERIAL_CORE=y
911CONFIG_SERIAL_CORE_CONSOLE=y 916CONFIG_SERIAL_CORE_CONSOLE=y
912# CONFIG_SERIAL_JSM is not set 917# CONFIG_SERIAL_JSM is not set
918# CONFIG_SERIAL_TIMBERDALE is not set
913CONFIG_UNIX98_PTYS=y 919CONFIG_UNIX98_PTYS=y
914# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 920# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
915CONFIG_LEGACY_PTYS=y 921CONFIG_LEGACY_PTYS=y
@@ -959,6 +965,7 @@ CONFIG_I2C_HIGHLANDER=y
959# CONFIG_I2C_OCORES is not set 965# CONFIG_I2C_OCORES is not set
960# CONFIG_I2C_SH_MOBILE is not set 966# CONFIG_I2C_SH_MOBILE is not set
961# CONFIG_I2C_SIMTEC is not set 967# CONFIG_I2C_SIMTEC is not set
968# CONFIG_I2C_XILINX is not set
962 969
963# 970#
964# External I2C/SMBus adapter drivers 971# External I2C/SMBus adapter drivers
@@ -971,15 +978,9 @@ CONFIG_I2C_HIGHLANDER=y
971# 978#
972# CONFIG_I2C_PCA_PLATFORM is not set 979# CONFIG_I2C_PCA_PLATFORM is not set
973# CONFIG_I2C_STUB is not set 980# CONFIG_I2C_STUB is not set
974
975#
976# Miscellaneous I2C Chip support
977#
978# CONFIG_SENSORS_TSL2550 is not set
979# CONFIG_I2C_DEBUG_CORE is not set 981# CONFIG_I2C_DEBUG_CORE is not set
980# CONFIG_I2C_DEBUG_ALGO is not set 982# CONFIG_I2C_DEBUG_ALGO is not set
981# CONFIG_I2C_DEBUG_BUS is not set 983# CONFIG_I2C_DEBUG_BUS is not set
982# CONFIG_I2C_DEBUG_CHIP is not set
983# CONFIG_SPI is not set 984# CONFIG_SPI is not set
984 985
985# 986#
@@ -994,13 +995,17 @@ CONFIG_GPIOLIB=y
994# 995#
995# Memory mapped GPIO expanders: 996# Memory mapped GPIO expanders:
996# 997#
998# CONFIG_GPIO_IT8761E is not set
999# CONFIG_GPIO_SCH is not set
997 1000
998# 1001#
999# I2C GPIO expanders: 1002# I2C GPIO expanders:
1000# 1003#
1004# CONFIG_GPIO_MAX7300 is not set
1001# CONFIG_GPIO_MAX732X is not set 1005# CONFIG_GPIO_MAX732X is not set
1002# CONFIG_GPIO_PCA953X is not set 1006# CONFIG_GPIO_PCA953X is not set
1003# CONFIG_GPIO_PCF857X is not set 1007# CONFIG_GPIO_PCF857X is not set
1008# CONFIG_GPIO_ADP5588 is not set
1004 1009
1005# 1010#
1006# PCI GPIO expanders: 1011# PCI GPIO expanders:
@@ -1033,10 +1038,11 @@ CONFIG_HWMON=y
1033# CONFIG_SENSORS_ADM1029 is not set 1038# CONFIG_SENSORS_ADM1029 is not set
1034# CONFIG_SENSORS_ADM1031 is not set 1039# CONFIG_SENSORS_ADM1031 is not set
1035# CONFIG_SENSORS_ADM9240 is not set 1040# CONFIG_SENSORS_ADM9240 is not set
1041# CONFIG_SENSORS_ADT7411 is not set
1036# CONFIG_SENSORS_ADT7462 is not set 1042# CONFIG_SENSORS_ADT7462 is not set
1037# CONFIG_SENSORS_ADT7470 is not set 1043# CONFIG_SENSORS_ADT7470 is not set
1038# CONFIG_SENSORS_ADT7473 is not set
1039# CONFIG_SENSORS_ADT7475 is not set 1044# CONFIG_SENSORS_ADT7475 is not set
1045# CONFIG_SENSORS_ASC7621 is not set
1040# CONFIG_SENSORS_ATXP1 is not set 1046# CONFIG_SENSORS_ATXP1 is not set
1041# CONFIG_SENSORS_DS1621 is not set 1047# CONFIG_SENSORS_DS1621 is not set
1042# CONFIG_SENSORS_I5K_AMB is not set 1048# CONFIG_SENSORS_I5K_AMB is not set
@@ -1074,6 +1080,7 @@ CONFIG_HWMON=y
1074# CONFIG_SENSORS_SMSC47M192 is not set 1080# CONFIG_SENSORS_SMSC47M192 is not set
1075# CONFIG_SENSORS_SMSC47B397 is not set 1081# CONFIG_SENSORS_SMSC47B397 is not set
1076# CONFIG_SENSORS_ADS7828 is not set 1082# CONFIG_SENSORS_ADS7828 is not set
1083# CONFIG_SENSORS_AMC6821 is not set
1077# CONFIG_SENSORS_THMC50 is not set 1084# CONFIG_SENSORS_THMC50 is not set
1078# CONFIG_SENSORS_TMP401 is not set 1085# CONFIG_SENSORS_TMP401 is not set
1079# CONFIG_SENSORS_TMP421 is not set 1086# CONFIG_SENSORS_TMP421 is not set
@@ -1102,20 +1109,25 @@ CONFIG_SSB_POSSIBLE=y
1102# Multifunction device drivers 1109# Multifunction device drivers
1103# 1110#
1104# CONFIG_MFD_CORE is not set 1111# CONFIG_MFD_CORE is not set
1112# CONFIG_MFD_88PM860X is not set
1105# CONFIG_MFD_SM501 is not set 1113# CONFIG_MFD_SM501 is not set
1106# CONFIG_MFD_SH_MOBILE_SDHI is not set 1114# CONFIG_MFD_SH_MOBILE_SDHI is not set
1107# CONFIG_HTC_PASIC3 is not set 1115# CONFIG_HTC_PASIC3 is not set
1116# CONFIG_HTC_I2CPLD is not set
1108# CONFIG_TPS65010 is not set 1117# CONFIG_TPS65010 is not set
1109# CONFIG_TWL4030_CORE is not set 1118# CONFIG_TWL4030_CORE is not set
1110# CONFIG_MFD_TMIO is not set 1119# CONFIG_MFD_TMIO is not set
1111# CONFIG_PMIC_DA903X is not set 1120# CONFIG_PMIC_DA903X is not set
1112# CONFIG_PMIC_ADP5520 is not set 1121# CONFIG_PMIC_ADP5520 is not set
1122# CONFIG_MFD_MAX8925 is not set
1113# CONFIG_MFD_WM8400 is not set 1123# CONFIG_MFD_WM8400 is not set
1114# CONFIG_MFD_WM831X is not set 1124# CONFIG_MFD_WM831X is not set
1115# CONFIG_MFD_WM8350_I2C is not set 1125# CONFIG_MFD_WM8350_I2C is not set
1126# CONFIG_MFD_WM8994 is not set
1116# CONFIG_MFD_PCF50633 is not set 1127# CONFIG_MFD_PCF50633 is not set
1117# CONFIG_AB3100_CORE is not set 1128# CONFIG_AB3100_CORE is not set
1118# CONFIG_MFD_88PM8607 is not set 1129# CONFIG_MFD_TIMBERDALE is not set
1130# CONFIG_LPC_SCH is not set
1119# CONFIG_REGULATOR is not set 1131# CONFIG_REGULATOR is not set
1120# CONFIG_MEDIA_SUPPORT is not set 1132# CONFIG_MEDIA_SUPPORT is not set
1121 1133
@@ -1123,6 +1135,7 @@ CONFIG_SSB_POSSIBLE=y
1123# Graphics support 1135# Graphics support
1124# 1136#
1125CONFIG_VGA_ARB=y 1137CONFIG_VGA_ARB=y
1138CONFIG_VGA_ARB_MAX_GPUS=16
1126# CONFIG_DRM is not set 1139# CONFIG_DRM is not set
1127# CONFIG_VGASTATE is not set 1140# CONFIG_VGASTATE is not set
1128# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1141# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1371,6 +1384,7 @@ CONFIG_MISC_FILESYSTEMS=y
1371# CONFIG_BEFS_FS is not set 1384# CONFIG_BEFS_FS is not set
1372# CONFIG_BFS_FS is not set 1385# CONFIG_BFS_FS is not set
1373# CONFIG_EFS_FS is not set 1386# CONFIG_EFS_FS is not set
1387# CONFIG_LOGFS is not set
1374# CONFIG_CRAMFS is not set 1388# CONFIG_CRAMFS is not set
1375# CONFIG_SQUASHFS is not set 1389# CONFIG_SQUASHFS is not set
1376# CONFIG_VXFS_FS is not set 1390# CONFIG_VXFS_FS is not set
@@ -1401,6 +1415,7 @@ CONFIG_SUNRPC_GSS=y
1401CONFIG_RPCSEC_GSS_KRB5=y 1415CONFIG_RPCSEC_GSS_KRB5=y
1402# CONFIG_RPCSEC_GSS_SPKM3 is not set 1416# CONFIG_RPCSEC_GSS_SPKM3 is not set
1403# CONFIG_SMB_FS is not set 1417# CONFIG_SMB_FS is not set
1418# CONFIG_CEPH_FS is not set
1404# CONFIG_CIFS is not set 1419# CONFIG_CIFS is not set
1405# CONFIG_NCP_FS is not set 1420# CONFIG_NCP_FS is not set
1406# CONFIG_CODA_FS is not set 1421# CONFIG_CODA_FS is not set
@@ -1475,6 +1490,7 @@ CONFIG_SCHED_DEBUG=y
1475# CONFIG_TIMER_STATS is not set 1490# CONFIG_TIMER_STATS is not set
1476# CONFIG_DEBUG_OBJECTS is not set 1491# CONFIG_DEBUG_OBJECTS is not set
1477# CONFIG_DEBUG_SLAB is not set 1492# CONFIG_DEBUG_SLAB is not set
1493# CONFIG_DEBUG_KMEMLEAK is not set
1478# CONFIG_DEBUG_PREEMPT is not set 1494# CONFIG_DEBUG_PREEMPT is not set
1479# CONFIG_DEBUG_RT_MUTEXES is not set 1495# CONFIG_DEBUG_RT_MUTEXES is not set
1480# CONFIG_RT_MUTEX_TESTER is not set 1496# CONFIG_RT_MUTEX_TESTER is not set
@@ -1510,7 +1526,6 @@ CONFIG_FRAME_POINTER=y
1510# CONFIG_LATENCYTOP is not set 1526# CONFIG_LATENCYTOP is not set
1511# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1527# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1512# CONFIG_PAGE_POISONING is not set 1528# CONFIG_PAGE_POISONING is not set
1513CONFIG_NOP_TRACER=y
1514CONFIG_HAVE_FUNCTION_TRACER=y 1529CONFIG_HAVE_FUNCTION_TRACER=y
1515CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1530CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1516CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1531CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1518,10 +1533,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1518CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1533CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1519CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1534CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1520CONFIG_RING_BUFFER=y 1535CONFIG_RING_BUFFER=y
1521CONFIG_EVENT_TRACING=y
1522CONFIG_CONTEXT_SWITCH_TRACER=y
1523CONFIG_RING_BUFFER_ALLOW_SWAP=y 1536CONFIG_RING_BUFFER_ALLOW_SWAP=y
1524CONFIG_TRACING=y
1525CONFIG_TRACING_SUPPORT=y 1537CONFIG_TRACING_SUPPORT=y
1526CONFIG_FTRACE=y 1538CONFIG_FTRACE=y
1527# CONFIG_FUNCTION_TRACER is not set 1539# CONFIG_FUNCTION_TRACER is not set
@@ -1534,6 +1546,7 @@ CONFIG_FTRACE=y
1534CONFIG_BRANCH_PROFILE_NONE=y 1546CONFIG_BRANCH_PROFILE_NONE=y
1535# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1547# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1536# CONFIG_PROFILE_ALL_BRANCHES is not set 1548# CONFIG_PROFILE_ALL_BRANCHES is not set
1549# CONFIG_KSYM_TRACER is not set
1537# CONFIG_STACK_TRACER is not set 1550# CONFIG_STACK_TRACER is not set
1538# CONFIG_KMEMTRACE is not set 1551# CONFIG_KMEMTRACE is not set
1539# CONFIG_WORKQUEUE_TRACER is not set 1552# CONFIG_WORKQUEUE_TRACER is not set
@@ -1661,7 +1674,8 @@ CONFIG_CRYPTO_DES=y
1661# CONFIG_CRYPTO_ANSI_CPRNG is not set 1674# CONFIG_CRYPTO_ANSI_CPRNG is not set
1662CONFIG_CRYPTO_HW=y 1675CONFIG_CRYPTO_HW=y
1663# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1676# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1664CONFIG_BINARY_PRINTF=y 1677# CONFIG_VIRTUALIZATION is not set
1678# CONFIG_BINARY_PRINTF is not set
1665 1679
1666# 1680#
1667# Library routines 1681# Library routines
diff --git a/arch/sh/configs/rsk7201_defconfig b/arch/sh/configs/rsk7201_defconfig
index 2fc635a5a8c5..80e7b41ca620 100644
--- a/arch/sh/configs/rsk7201_defconfig
+++ b/arch/sh/configs/rsk7201_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:23:12 2010 4# Tue May 18 16:09:18 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -30,6 +30,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y 32CONFIG_DMA_NONCOHERENT=y
33CONFIG_NEED_DMA_MAP_STATE=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -44,9 +45,11 @@ CONFIG_LOCALVERSION=""
44CONFIG_HAVE_KERNEL_GZIP=y 45CONFIG_HAVE_KERNEL_GZIP=y
45CONFIG_HAVE_KERNEL_BZIP2=y 46CONFIG_HAVE_KERNEL_BZIP2=y
46CONFIG_HAVE_KERNEL_LZMA=y 47CONFIG_HAVE_KERNEL_LZMA=y
48CONFIG_HAVE_KERNEL_LZO=y
47CONFIG_KERNEL_GZIP=y 49CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_BZIP2 is not set 50# CONFIG_KERNEL_BZIP2 is not set
49# CONFIG_KERNEL_LZMA is not set 51# CONFIG_KERNEL_LZMA is not set
52# CONFIG_KERNEL_LZO is not set
50CONFIG_SYSVIPC=y 53CONFIG_SYSVIPC=y
51CONFIG_SYSVIPC_SYSCTL=y 54CONFIG_SYSVIPC_SYSCTL=y
52CONFIG_BSD_PROCESS_ACCT=y 55CONFIG_BSD_PROCESS_ACCT=y
@@ -65,7 +68,6 @@ CONFIG_RCU_FANOUT=32
65CONFIG_IKCONFIG=y 68CONFIG_IKCONFIG=y
66# CONFIG_IKCONFIG_PROC is not set 69# CONFIG_IKCONFIG_PROC is not set
67CONFIG_LOG_BUF_SHIFT=14 70CONFIG_LOG_BUF_SHIFT=14
68# CONFIG_GROUP_SCHED is not set
69# CONFIG_CGROUPS is not set 71# CONFIG_CGROUPS is not set
70# CONFIG_SYSFS_DEPRECATED_V2 is not set 72# CONFIG_SYSFS_DEPRECATED_V2 is not set
71# CONFIG_RELAY is not set 73# CONFIG_RELAY is not set
@@ -79,6 +81,7 @@ CONFIG_INITRAMFS_SOURCE=""
79CONFIG_RD_GZIP=y 81CONFIG_RD_GZIP=y
80# CONFIG_RD_BZIP2 is not set 82# CONFIG_RD_BZIP2 is not set
81# CONFIG_RD_LZMA is not set 83# CONFIG_RD_LZMA is not set
84# CONFIG_RD_LZO is not set
82CONFIG_CC_OPTIMIZE_FOR_SIZE=y 85CONFIG_CC_OPTIMIZE_FOR_SIZE=y
83CONFIG_SYSCTL=y 86CONFIG_SYSCTL=y
84CONFIG_ANON_INODES=y 87CONFIG_ANON_INODES=y
@@ -105,7 +108,6 @@ CONFIG_PERF_USE_VMALLOC=y
105# Kernel Performance Events And Counters 108# Kernel Performance Events And Counters
106# 109#
107CONFIG_PERF_EVENTS=y 110CONFIG_PERF_EVENTS=y
108CONFIG_EVENT_PROFILE=y
109# CONFIG_PERF_COUNTERS is not set 111# CONFIG_PERF_COUNTERS is not set
110CONFIG_VM_EVENT_COUNTERS=y 112CONFIG_VM_EVENT_COUNTERS=y
111CONFIG_COMPAT_BRK=y 113CONFIG_COMPAT_BRK=y
@@ -114,7 +116,6 @@ CONFIG_COMPAT_BRK=y
114CONFIG_SLOB=y 116CONFIG_SLOB=y
115# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set 117# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
116CONFIG_PROFILING=y 118CONFIG_PROFILING=y
117CONFIG_TRACEPOINTS=y
118CONFIG_OPROFILE=y 119CONFIG_OPROFILE=y
119CONFIG_HAVE_OPROFILE=y 120CONFIG_HAVE_OPROFILE=y
120# CONFIG_KPROBES is not set 121# CONFIG_KPROBES is not set
@@ -124,6 +125,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y 125CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 126CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 127CONFIG_HAVE_DMA_API_DEBUG=y
128CONFIG_HAVE_HW_BREAKPOINT=y
127 129
128# 130#
129# GCOV-based kernel profiling 131# GCOV-based kernel profiling
@@ -240,6 +242,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
240CONFIG_MAX_ACTIVE_REGIONS=1 242CONFIG_MAX_ACTIVE_REGIONS=1
241CONFIG_ARCH_POPULATES_NODE_MAP=y 243CONFIG_ARCH_POPULATES_NODE_MAP=y
242CONFIG_ARCH_SELECT_MEMORY_MODEL=y 244CONFIG_ARCH_SELECT_MEMORY_MODEL=y
245CONFIG_UNCACHED_MAPPING=y
243CONFIG_PAGE_SIZE_4KB=y 246CONFIG_PAGE_SIZE_4KB=y
244# CONFIG_PAGE_SIZE_8KB is not set 247# CONFIG_PAGE_SIZE_8KB is not set
245# CONFIG_PAGE_SIZE_16KB is not set 248# CONFIG_PAGE_SIZE_16KB is not set
@@ -255,7 +258,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
255CONFIG_SPLIT_PTLOCK_CPUS=4 258CONFIG_SPLIT_PTLOCK_CPUS=4
256# CONFIG_PHYS_ADDR_T_64BIT is not set 259# CONFIG_PHYS_ADDR_T_64BIT is not set
257CONFIG_ZONE_DMA_FLAG=0 260CONFIG_ZONE_DMA_FLAG=0
258CONFIG_NR_QUICK=2 261CONFIG_NR_QUICK=1
259CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 262CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
260 263
261# 264#
@@ -326,7 +329,6 @@ CONFIG_PREEMPT_NONE=y
326# CONFIG_PREEMPT_VOLUNTARY is not set 329# CONFIG_PREEMPT_VOLUNTARY is not set
327# CONFIG_PREEMPT is not set 330# CONFIG_PREEMPT is not set
328CONFIG_GUSA=y 331CONFIG_GUSA=y
329# CONFIG_SPARSE_IRQ is not set
330 332
331# 333#
332# Boot options 334# Boot options
@@ -485,6 +487,7 @@ CONFIG_HAVE_IDE=y
485# 487#
486# SCSI device support 488# SCSI device support
487# 489#
490CONFIG_SCSI_MOD=y
488# CONFIG_RAID_ATTRS is not set 491# CONFIG_RAID_ATTRS is not set
489# CONFIG_SCSI is not set 492# CONFIG_SCSI is not set
490# CONFIG_SCSI_DMA is not set 493# CONFIG_SCSI_DMA is not set
@@ -545,6 +548,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=8
545CONFIG_SERIAL_SH_SCI_CONSOLE=y 548CONFIG_SERIAL_SH_SCI_CONSOLE=y
546CONFIG_SERIAL_CORE=y 549CONFIG_SERIAL_CORE=y
547CONFIG_SERIAL_CORE_CONSOLE=y 550CONFIG_SERIAL_CORE_CONSOLE=y
551# CONFIG_SERIAL_TIMBERDALE is not set
548# CONFIG_UNIX98_PTYS is not set 552# CONFIG_UNIX98_PTYS is not set
549# CONFIG_LEGACY_PTYS is not set 553# CONFIG_LEGACY_PTYS is not set
550# CONFIG_IPMI_HANDLER is not set 554# CONFIG_IPMI_HANDLER is not set
@@ -657,7 +661,6 @@ CONFIG_EXT2_FS=y
657# CONFIG_EXT2_FS_XATTR is not set 661# CONFIG_EXT2_FS_XATTR is not set
658# CONFIG_EXT3_FS is not set 662# CONFIG_EXT3_FS is not set
659# CONFIG_EXT4_FS is not set 663# CONFIG_EXT4_FS is not set
660CONFIG_EXT4_USE_FOR_EXT23=y
661# CONFIG_REISERFS_FS is not set 664# CONFIG_REISERFS_FS is not set
662# CONFIG_JFS_FS is not set 665# CONFIG_JFS_FS is not set
663# CONFIG_FS_POSIX_ACL is not set 666# CONFIG_FS_POSIX_ACL is not set
@@ -720,6 +723,7 @@ CONFIG_JFFS2_ZLIB=y
720# CONFIG_JFFS2_LZO is not set 723# CONFIG_JFFS2_LZO is not set
721CONFIG_JFFS2_RTIME=y 724CONFIG_JFFS2_RTIME=y
722# CONFIG_JFFS2_RUBIN is not set 725# CONFIG_JFFS2_RUBIN is not set
726# CONFIG_LOGFS is not set
723# CONFIG_CRAMFS is not set 727# CONFIG_CRAMFS is not set
724# CONFIG_SQUASHFS is not set 728# CONFIG_SQUASHFS is not set
725# CONFIG_VXFS_FS is not set 729# CONFIG_VXFS_FS is not set
@@ -756,13 +760,12 @@ CONFIG_MAGIC_SYSRQ=y
756CONFIG_DEBUG_FS=y 760CONFIG_DEBUG_FS=y
757# CONFIG_HEADERS_CHECK is not set 761# CONFIG_HEADERS_CHECK is not set
758# CONFIG_DEBUG_KERNEL is not set 762# CONFIG_DEBUG_KERNEL is not set
759CONFIG_STACKTRACE=y
760CONFIG_DEBUG_BUGVERBOSE=y 763CONFIG_DEBUG_BUGVERBOSE=y
761# CONFIG_DEBUG_MEMORY_INIT is not set 764# CONFIG_DEBUG_MEMORY_INIT is not set
762# CONFIG_RCU_CPU_STALL_DETECTOR is not set 765# CONFIG_RCU_CPU_STALL_DETECTOR is not set
766# CONFIG_LKDTM is not set
763# CONFIG_LATENCYTOP is not set 767# CONFIG_LATENCYTOP is not set
764CONFIG_SYSCTL_SYSCALL_CHECK=y 768CONFIG_SYSCTL_SYSCALL_CHECK=y
765CONFIG_NOP_TRACER=y
766CONFIG_HAVE_FUNCTION_TRACER=y 769CONFIG_HAVE_FUNCTION_TRACER=y
767CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 770CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
768CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 771CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -770,10 +773,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
770CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 773CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
771CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 774CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
772CONFIG_RING_BUFFER=y 775CONFIG_RING_BUFFER=y
773CONFIG_EVENT_TRACING=y
774CONFIG_CONTEXT_SWITCH_TRACER=y
775CONFIG_RING_BUFFER_ALLOW_SWAP=y 776CONFIG_RING_BUFFER_ALLOW_SWAP=y
776CONFIG_TRACING=y
777CONFIG_TRACING_SUPPORT=y 777CONFIG_TRACING_SUPPORT=y
778# CONFIG_FTRACE is not set 778# CONFIG_FTRACE is not set
779# CONFIG_DYNAMIC_DEBUG is not set 779# CONFIG_DYNAMIC_DEBUG is not set
@@ -795,7 +795,8 @@ CONFIG_HAVE_ARCH_KGDB=y
795CONFIG_DEFAULT_SECURITY_DAC=y 795CONFIG_DEFAULT_SECURITY_DAC=y
796CONFIG_DEFAULT_SECURITY="" 796CONFIG_DEFAULT_SECURITY=""
797# CONFIG_CRYPTO is not set 797# CONFIG_CRYPTO is not set
798CONFIG_BINARY_PRINTF=y 798# CONFIG_VIRTUALIZATION is not set
799# CONFIG_BINARY_PRINTF is not set
799 800
800# 801#
801# Library routines 802# Library routines
diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig
index 0169e60e0947..66eb7d7dad44 100644
--- a/arch/sh/configs/rsk7203_defconfig
+++ b/arch/sh/configs/rsk7203_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:23:54 2010 4# Tue May 18 16:11:37 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION=""
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51CONFIG_SYSVIPC=y 54CONFIG_SYSVIPC=y
52CONFIG_SYSVIPC_SYSCTL=y 55CONFIG_SYSVIPC_SYSCTL=y
53CONFIG_POSIX_MQUEUE=y 56CONFIG_POSIX_MQUEUE=y
@@ -70,7 +73,6 @@ CONFIG_RCU_FANOUT=32
70CONFIG_IKCONFIG=y 73CONFIG_IKCONFIG=y
71# CONFIG_IKCONFIG_PROC is not set 74# CONFIG_IKCONFIG_PROC is not set
72CONFIG_LOG_BUF_SHIFT=14 75CONFIG_LOG_BUF_SHIFT=14
73# CONFIG_GROUP_SCHED is not set
74# CONFIG_CGROUPS is not set 76# CONFIG_CGROUPS is not set
75# CONFIG_SYSFS_DEPRECATED_V2 is not set 77# CONFIG_SYSFS_DEPRECATED_V2 is not set
76# CONFIG_RELAY is not set 78# CONFIG_RELAY is not set
@@ -85,6 +87,7 @@ CONFIG_INITRAMFS_SOURCE=""
85CONFIG_RD_GZIP=y 87CONFIG_RD_GZIP=y
86# CONFIG_RD_BZIP2 is not set 88# CONFIG_RD_BZIP2 is not set
87# CONFIG_RD_LZMA is not set 89# CONFIG_RD_LZMA is not set
90# CONFIG_RD_LZO is not set
88CONFIG_CC_OPTIMIZE_FOR_SIZE=y 91CONFIG_CC_OPTIMIZE_FOR_SIZE=y
89CONFIG_SYSCTL=y 92CONFIG_SYSCTL=y
90CONFIG_ANON_INODES=y 93CONFIG_ANON_INODES=y
@@ -112,7 +115,6 @@ CONFIG_PERF_USE_VMALLOC=y
112# Kernel Performance Events And Counters 115# Kernel Performance Events And Counters
113# 116#
114CONFIG_PERF_EVENTS=y 117CONFIG_PERF_EVENTS=y
115CONFIG_EVENT_PROFILE=y
116# CONFIG_PERF_COUNTERS is not set 118# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set 119# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
118CONFIG_VM_EVENT_COUNTERS=y 120CONFIG_VM_EVENT_COUNTERS=y
@@ -122,7 +124,6 @@ CONFIG_COMPAT_BRK=y
122CONFIG_SLOB=y 124CONFIG_SLOB=y
123# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set 125# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
124CONFIG_PROFILING=y 126CONFIG_PROFILING=y
125CONFIG_TRACEPOINTS=y
126CONFIG_OPROFILE=y 127CONFIG_OPROFILE=y
127CONFIG_HAVE_OPROFILE=y 128CONFIG_HAVE_OPROFILE=y
128# CONFIG_KPROBES is not set 129# CONFIG_KPROBES is not set
@@ -132,6 +133,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
132CONFIG_HAVE_DMA_ATTRS=y 133CONFIG_HAVE_DMA_ATTRS=y
133CONFIG_HAVE_CLK=y 134CONFIG_HAVE_CLK=y
134CONFIG_HAVE_DMA_API_DEBUG=y 135CONFIG_HAVE_DMA_API_DEBUG=y
136CONFIG_HAVE_HW_BREAKPOINT=y
135 137
136# 138#
137# GCOV-based kernel profiling 139# GCOV-based kernel profiling
@@ -248,6 +250,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
248CONFIG_MAX_ACTIVE_REGIONS=1 250CONFIG_MAX_ACTIVE_REGIONS=1
249CONFIG_ARCH_POPULATES_NODE_MAP=y 251CONFIG_ARCH_POPULATES_NODE_MAP=y
250CONFIG_ARCH_SELECT_MEMORY_MODEL=y 252CONFIG_ARCH_SELECT_MEMORY_MODEL=y
253CONFIG_UNCACHED_MAPPING=y
251CONFIG_PAGE_SIZE_4KB=y 254CONFIG_PAGE_SIZE_4KB=y
252# CONFIG_PAGE_SIZE_8KB is not set 255# CONFIG_PAGE_SIZE_8KB is not set
253# CONFIG_PAGE_SIZE_16KB is not set 256# CONFIG_PAGE_SIZE_16KB is not set
@@ -263,7 +266,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
263CONFIG_SPLIT_PTLOCK_CPUS=4 266CONFIG_SPLIT_PTLOCK_CPUS=4
264# CONFIG_PHYS_ADDR_T_64BIT is not set 267# CONFIG_PHYS_ADDR_T_64BIT is not set
265CONFIG_ZONE_DMA_FLAG=0 268CONFIG_ZONE_DMA_FLAG=0
266CONFIG_NR_QUICK=2 269CONFIG_NR_QUICK=1
267CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 270CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
268 271
269# 272#
@@ -350,7 +353,6 @@ CONFIG_PREEMPT_NONE=y
350# CONFIG_PREEMPT_VOLUNTARY is not set 353# CONFIG_PREEMPT_VOLUNTARY is not set
351# CONFIG_PREEMPT is not set 354# CONFIG_PREEMPT is not set
352CONFIG_GUSA=y 355CONFIG_GUSA=y
353# CONFIG_SPARSE_IRQ is not set
354 356
355# 357#
356# Boot options 358# Boot options
@@ -448,7 +450,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
448# Network testing 450# Network testing
449# 451#
450# CONFIG_NET_PKTGEN is not set 452# CONFIG_NET_PKTGEN is not set
451# CONFIG_NET_DROP_MONITOR is not set
452# CONFIG_HAMRADIO is not set 453# CONFIG_HAMRADIO is not set
453# CONFIG_CAN is not set 454# CONFIG_CAN is not set
454# CONFIG_IRDA is not set 455# CONFIG_IRDA is not set
@@ -592,6 +593,7 @@ CONFIG_HAVE_IDE=y
592# 593#
593# SCSI device support 594# SCSI device support
594# 595#
596CONFIG_SCSI_MOD=y
595# CONFIG_RAID_ATTRS is not set 597# CONFIG_RAID_ATTRS is not set
596# CONFIG_SCSI is not set 598# CONFIG_SCSI is not set
597# CONFIG_SCSI_DMA is not set 599# CONFIG_SCSI_DMA is not set
@@ -662,6 +664,7 @@ CONFIG_WLAN=y
662# CONFIG_USB_PEGASUS is not set 664# CONFIG_USB_PEGASUS is not set
663# CONFIG_USB_RTL8150 is not set 665# CONFIG_USB_RTL8150 is not set
664# CONFIG_USB_USBNET is not set 666# CONFIG_USB_USBNET is not set
667# CONFIG_USB_IPHETH is not set
665# CONFIG_WAN is not set 668# CONFIG_WAN is not set
666# CONFIG_PPP is not set 669# CONFIG_PPP is not set
667# CONFIG_SLIP is not set 670# CONFIG_SLIP is not set
@@ -723,6 +726,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=4
723CONFIG_SERIAL_SH_SCI_CONSOLE=y 726CONFIG_SERIAL_SH_SCI_CONSOLE=y
724CONFIG_SERIAL_CORE=y 727CONFIG_SERIAL_CORE=y
725CONFIG_SERIAL_CORE_CONSOLE=y 728CONFIG_SERIAL_CORE_CONSOLE=y
729# CONFIG_SERIAL_TIMBERDALE is not set
726# CONFIG_UNIX98_PTYS is not set 730# CONFIG_UNIX98_PTYS is not set
727# CONFIG_LEGACY_PTYS is not set 731# CONFIG_LEGACY_PTYS is not set
728# CONFIG_IPMI_HANDLER is not set 732# CONFIG_IPMI_HANDLER is not set
@@ -745,6 +749,7 @@ CONFIG_GPIOLIB=y
745# 749#
746# Memory mapped GPIO expanders: 750# Memory mapped GPIO expanders:
747# 751#
752# CONFIG_GPIO_IT8761E is not set
748 753
749# 754#
750# I2C GPIO expanders: 755# I2C GPIO expanders:
@@ -783,6 +788,7 @@ CONFIG_SSB_POSSIBLE=y
783# CONFIG_MFD_TMIO is not set 788# CONFIG_MFD_TMIO is not set
784CONFIG_REGULATOR=y 789CONFIG_REGULATOR=y
785# CONFIG_REGULATOR_DEBUG is not set 790# CONFIG_REGULATOR_DEBUG is not set
791# CONFIG_REGULATOR_DUMMY is not set
786# CONFIG_REGULATOR_FIXED_VOLTAGE is not set 792# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
787# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set 793# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
788# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set 794# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
@@ -816,6 +822,7 @@ CONFIG_USB_HID=y
816# 822#
817# Special HID drivers 823# Special HID drivers
818# 824#
825# CONFIG_HID_3M_PCT is not set
819CONFIG_HID_A4TECH=y 826CONFIG_HID_A4TECH=y
820CONFIG_HID_APPLE=y 827CONFIG_HID_APPLE=y
821CONFIG_HID_BELKIN=y 828CONFIG_HID_BELKIN=y
@@ -831,14 +838,19 @@ CONFIG_HID_GYRATION=y
831CONFIG_HID_LOGITECH=y 838CONFIG_HID_LOGITECH=y
832# CONFIG_LOGITECH_FF is not set 839# CONFIG_LOGITECH_FF is not set
833# CONFIG_LOGIRUMBLEPAD2_FF is not set 840# CONFIG_LOGIRUMBLEPAD2_FF is not set
841# CONFIG_LOGIG940_FF is not set
834CONFIG_HID_MICROSOFT=y 842CONFIG_HID_MICROSOFT=y
843# CONFIG_HID_MOSART is not set
835CONFIG_HID_MONTEREY=y 844CONFIG_HID_MONTEREY=y
836# CONFIG_HID_NTRIG is not set 845# CONFIG_HID_NTRIG is not set
846# CONFIG_HID_ORTEK is not set
837CONFIG_HID_PANTHERLORD=y 847CONFIG_HID_PANTHERLORD=y
838# CONFIG_PANTHERLORD_FF is not set 848# CONFIG_PANTHERLORD_FF is not set
839CONFIG_HID_PETALYNX=y 849CONFIG_HID_PETALYNX=y
850# CONFIG_HID_QUANTA is not set
840CONFIG_HID_SAMSUNG=y 851CONFIG_HID_SAMSUNG=y
841CONFIG_HID_SONY=y 852CONFIG_HID_SONY=y
853# CONFIG_HID_STANTUM is not set
842CONFIG_HID_SUNPLUS=y 854CONFIG_HID_SUNPLUS=y
843# CONFIG_HID_GREENASIA is not set 855# CONFIG_HID_GREENASIA is not set
844# CONFIG_HID_SMARTJOYPLUS is not set 856# CONFIG_HID_SMARTJOYPLUS is not set
@@ -859,7 +871,6 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
859CONFIG_USB_DEVICEFS=y 871CONFIG_USB_DEVICEFS=y
860CONFIG_USB_DEVICE_CLASS=y 872CONFIG_USB_DEVICE_CLASS=y
861# CONFIG_USB_DYNAMIC_MINORS is not set 873# CONFIG_USB_DYNAMIC_MINORS is not set
862# CONFIG_USB_SUSPEND is not set
863# CONFIG_USB_OTG is not set 874# CONFIG_USB_OTG is not set
864# CONFIG_USB_OTG_WHITELIST is not set 875# CONFIG_USB_OTG_WHITELIST is not set
865# CONFIG_USB_OTG_BLACKLIST_HUB is not set 876# CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -916,7 +927,6 @@ CONFIG_USB_R8A66597_HCD=y
916# CONFIG_USB_RIO500 is not set 927# CONFIG_USB_RIO500 is not set
917# CONFIG_USB_LEGOTOWER is not set 928# CONFIG_USB_LEGOTOWER is not set
918# CONFIG_USB_LCD is not set 929# CONFIG_USB_LCD is not set
919# CONFIG_USB_BERRY_CHARGE is not set
920# CONFIG_USB_LED is not set 930# CONFIG_USB_LED is not set
921# CONFIG_USB_CYPRESS_CY7C63 is not set 931# CONFIG_USB_CYPRESS_CY7C63 is not set
922# CONFIG_USB_CYTHERM is not set 932# CONFIG_USB_CYTHERM is not set
@@ -928,7 +938,6 @@ CONFIG_USB_R8A66597_HCD=y
928# CONFIG_USB_IOWARRIOR is not set 938# CONFIG_USB_IOWARRIOR is not set
929# CONFIG_USB_TEST is not set 939# CONFIG_USB_TEST is not set
930# CONFIG_USB_ISIGHTFW is not set 940# CONFIG_USB_ISIGHTFW is not set
931# CONFIG_USB_VST is not set
932# CONFIG_USB_GADGET is not set 941# CONFIG_USB_GADGET is not set
933 942
934# 943#
@@ -948,11 +957,11 @@ CONFIG_LEDS_GPIO=y
948CONFIG_LEDS_GPIO_PLATFORM=y 957CONFIG_LEDS_GPIO_PLATFORM=y
949# CONFIG_LEDS_REGULATOR is not set 958# CONFIG_LEDS_REGULATOR is not set
950# CONFIG_LEDS_LT3593 is not set 959# CONFIG_LEDS_LT3593 is not set
960CONFIG_LEDS_TRIGGERS=y
951 961
952# 962#
953# LED Triggers 963# LED Triggers
954# 964#
955CONFIG_LEDS_TRIGGERS=y
956CONFIG_LEDS_TRIGGER_TIMER=y 965CONFIG_LEDS_TRIGGER_TIMER=y
957CONFIG_LEDS_TRIGGER_HEARTBEAT=y 966CONFIG_LEDS_TRIGGER_HEARTBEAT=y
958CONFIG_LEDS_TRIGGER_BACKLIGHT=y 967CONFIG_LEDS_TRIGGER_BACKLIGHT=y
@@ -1018,7 +1027,6 @@ CONFIG_RTC_DRV_SH=y
1018# CONFIG_EXT2_FS is not set 1027# CONFIG_EXT2_FS is not set
1019# CONFIG_EXT3_FS is not set 1028# CONFIG_EXT3_FS is not set
1020# CONFIG_EXT4_FS is not set 1029# CONFIG_EXT4_FS is not set
1021CONFIG_EXT4_USE_FOR_EXT23=y
1022# CONFIG_REISERFS_FS is not set 1030# CONFIG_REISERFS_FS is not set
1023# CONFIG_JFS_FS is not set 1031# CONFIG_JFS_FS is not set
1024# CONFIG_FS_POSIX_ACL is not set 1032# CONFIG_FS_POSIX_ACL is not set
@@ -1072,6 +1080,7 @@ CONFIG_MISC_FILESYSTEMS=y
1072# CONFIG_BFS_FS is not set 1080# CONFIG_BFS_FS is not set
1073# CONFIG_EFS_FS is not set 1081# CONFIG_EFS_FS is not set
1074# CONFIG_JFFS2_FS is not set 1082# CONFIG_JFFS2_FS is not set
1083# CONFIG_LOGFS is not set
1075# CONFIG_CRAMFS is not set 1084# CONFIG_CRAMFS is not set
1076# CONFIG_SQUASHFS is not set 1085# CONFIG_SQUASHFS is not set
1077# CONFIG_VXFS_FS is not set 1086# CONFIG_VXFS_FS is not set
@@ -1098,6 +1107,7 @@ CONFIG_SUNRPC=y
1098# CONFIG_RPCSEC_GSS_KRB5 is not set 1107# CONFIG_RPCSEC_GSS_KRB5 is not set
1099# CONFIG_RPCSEC_GSS_SPKM3 is not set 1108# CONFIG_RPCSEC_GSS_SPKM3 is not set
1100# CONFIG_SMB_FS is not set 1109# CONFIG_SMB_FS is not set
1110# CONFIG_CEPH_FS is not set
1101# CONFIG_CIFS is not set 1111# CONFIG_CIFS is not set
1102# CONFIG_NCP_FS is not set 1112# CONFIG_NCP_FS is not set
1103# CONFIG_CODA_FS is not set 1113# CONFIG_CODA_FS is not set
@@ -1180,6 +1190,7 @@ CONFIG_DEBUG_OBJECTS=y
1180# CONFIG_DEBUG_OBJECTS_TIMERS is not set 1190# CONFIG_DEBUG_OBJECTS_TIMERS is not set
1181# CONFIG_DEBUG_OBJECTS_WORK is not set 1191# CONFIG_DEBUG_OBJECTS_WORK is not set
1182CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1 1192CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
1193# CONFIG_DEBUG_KMEMLEAK is not set
1183# CONFIG_DEBUG_RT_MUTEXES is not set 1194# CONFIG_DEBUG_RT_MUTEXES is not set
1184# CONFIG_RT_MUTEX_TESTER is not set 1195# CONFIG_RT_MUTEX_TESTER is not set
1185# CONFIG_DEBUG_SPINLOCK is not set 1196# CONFIG_DEBUG_SPINLOCK is not set
@@ -1189,7 +1200,6 @@ CONFIG_DEBUG_MUTEXES=y
1189# CONFIG_LOCK_STAT is not set 1200# CONFIG_LOCK_STAT is not set
1190CONFIG_DEBUG_SPINLOCK_SLEEP=y 1201CONFIG_DEBUG_SPINLOCK_SLEEP=y
1191# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1202# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1192CONFIG_STACKTRACE=y
1193# CONFIG_DEBUG_KOBJECT is not set 1203# CONFIG_DEBUG_KOBJECT is not set
1194CONFIG_DEBUG_BUGVERBOSE=y 1204CONFIG_DEBUG_BUGVERBOSE=y
1195CONFIG_DEBUG_INFO=y 1205CONFIG_DEBUG_INFO=y
@@ -1207,11 +1217,11 @@ CONFIG_FRAME_POINTER=y
1207# CONFIG_BACKTRACE_SELF_TEST is not set 1217# CONFIG_BACKTRACE_SELF_TEST is not set
1208# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1218# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1209# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1219# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1220# CONFIG_LKDTM is not set
1210# CONFIG_FAULT_INJECTION is not set 1221# CONFIG_FAULT_INJECTION is not set
1211# CONFIG_LATENCYTOP is not set 1222# CONFIG_LATENCYTOP is not set
1212CONFIG_SYSCTL_SYSCALL_CHECK=y 1223CONFIG_SYSCTL_SYSCALL_CHECK=y
1213# CONFIG_PAGE_POISONING is not set 1224# CONFIG_PAGE_POISONING is not set
1214CONFIG_NOP_TRACER=y
1215CONFIG_HAVE_FUNCTION_TRACER=y 1225CONFIG_HAVE_FUNCTION_TRACER=y
1216CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1226CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1217CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1227CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1219,10 +1229,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1219CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1229CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1220CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1230CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1221CONFIG_RING_BUFFER=y 1231CONFIG_RING_BUFFER=y
1222CONFIG_EVENT_TRACING=y
1223CONFIG_CONTEXT_SWITCH_TRACER=y
1224CONFIG_RING_BUFFER_ALLOW_SWAP=y 1232CONFIG_RING_BUFFER_ALLOW_SWAP=y
1225CONFIG_TRACING=y
1226CONFIG_TRACING_SUPPORT=y 1233CONFIG_TRACING_SUPPORT=y
1227CONFIG_FTRACE=y 1234CONFIG_FTRACE=y
1228# CONFIG_FUNCTION_TRACER is not set 1235# CONFIG_FUNCTION_TRACER is not set
@@ -1234,6 +1241,7 @@ CONFIG_FTRACE=y
1234CONFIG_BRANCH_PROFILE_NONE=y 1241CONFIG_BRANCH_PROFILE_NONE=y
1235# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1242# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1236# CONFIG_PROFILE_ALL_BRANCHES is not set 1243# CONFIG_PROFILE_ALL_BRANCHES is not set
1244# CONFIG_KSYM_TRACER is not set
1237# CONFIG_STACK_TRACER is not set 1245# CONFIG_STACK_TRACER is not set
1238# CONFIG_KMEMTRACE is not set 1246# CONFIG_KMEMTRACE is not set
1239# CONFIG_WORKQUEUE_TRACER is not set 1247# CONFIG_WORKQUEUE_TRACER is not set
@@ -1263,7 +1271,8 @@ CONFIG_DUMP_CODE=y
1263CONFIG_DEFAULT_SECURITY_DAC=y 1271CONFIG_DEFAULT_SECURITY_DAC=y
1264CONFIG_DEFAULT_SECURITY="" 1272CONFIG_DEFAULT_SECURITY=""
1265# CONFIG_CRYPTO is not set 1273# CONFIG_CRYPTO is not set
1266CONFIG_BINARY_PRINTF=y 1274# CONFIG_VIRTUALIZATION is not set
1275# CONFIG_BINARY_PRINTF is not set
1267 1276
1268# 1277#
1269# Library routines 1278# Library routines
diff --git a/arch/sh/configs/rts7751r2d1_defconfig b/arch/sh/configs/rts7751r2d1_defconfig
index dba024d72a89..6bd3d95d1518 100644
--- a/arch/sh/configs/rts7751r2d1_defconfig
+++ b/arch/sh/configs/rts7751r2d1_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:25:36 2010 4# Tue May 18 16:15:07 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_IO_TRAPPED=y 34CONFIG_IO_TRAPPED=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION_AUTO=y
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -70,7 +73,6 @@ CONFIG_RCU_FANOUT=32
70# CONFIG_TREE_RCU_TRACE is not set 73# CONFIG_TREE_RCU_TRACE is not set
71# CONFIG_IKCONFIG is not set 74# CONFIG_IKCONFIG is not set
72CONFIG_LOG_BUF_SHIFT=14 75CONFIG_LOG_BUF_SHIFT=14
73# CONFIG_GROUP_SCHED is not set
74# CONFIG_CGROUPS is not set 76# CONFIG_CGROUPS is not set
75CONFIG_SYSFS_DEPRECATED=y 77CONFIG_SYSFS_DEPRECATED=y
76CONFIG_SYSFS_DEPRECATED_V2=y 78CONFIG_SYSFS_DEPRECATED_V2=y
@@ -104,7 +106,6 @@ CONFIG_PERF_USE_VMALLOC=y
104# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
105# 107#
106CONFIG_PERF_EVENTS=y 108CONFIG_PERF_EVENTS=y
107CONFIG_EVENT_PROFILE=y
108# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
109CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
110CONFIG_PCI_QUIRKS=y 111CONFIG_PCI_QUIRKS=y
@@ -113,7 +114,6 @@ CONFIG_SLAB=y
113# CONFIG_SLUB is not set 114# CONFIG_SLUB is not set
114# CONFIG_SLOB is not set 115# CONFIG_SLOB is not set
115CONFIG_PROFILING=y 116CONFIG_PROFILING=y
116CONFIG_TRACEPOINTS=y
117CONFIG_OPROFILE=y 117CONFIG_OPROFILE=y
118CONFIG_HAVE_OPROFILE=y 118CONFIG_HAVE_OPROFILE=y
119# CONFIG_KPROBES is not set 119# CONFIG_KPROBES is not set
@@ -124,6 +124,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y 124CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
127CONFIG_HAVE_HW_BREAKPOINT=y
127 128
128# 129#
129# GCOV-based kernel profiling 130# GCOV-based kernel profiling
@@ -242,6 +243,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
242CONFIG_MAX_ACTIVE_REGIONS=1 243CONFIG_MAX_ACTIVE_REGIONS=1
243CONFIG_ARCH_POPULATES_NODE_MAP=y 244CONFIG_ARCH_POPULATES_NODE_MAP=y
244CONFIG_ARCH_SELECT_MEMORY_MODEL=y 245CONFIG_ARCH_SELECT_MEMORY_MODEL=y
246CONFIG_UNCACHED_MAPPING=y
245CONFIG_PAGE_SIZE_4KB=y 247CONFIG_PAGE_SIZE_4KB=y
246# CONFIG_PAGE_SIZE_8KB is not set 248# CONFIG_PAGE_SIZE_8KB is not set
247# CONFIG_PAGE_SIZE_16KB is not set 249# CONFIG_PAGE_SIZE_16KB is not set
@@ -257,7 +259,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
257CONFIG_SPLIT_PTLOCK_CPUS=4 259CONFIG_SPLIT_PTLOCK_CPUS=4
258# CONFIG_PHYS_ADDR_T_64BIT is not set 260# CONFIG_PHYS_ADDR_T_64BIT is not set
259CONFIG_ZONE_DMA_FLAG=0 261CONFIG_ZONE_DMA_FLAG=0
260CONFIG_NR_QUICK=2 262CONFIG_NR_QUICK=1
261# CONFIG_KSM is not set 263# CONFIG_KSM is not set
262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 264CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
263 265
@@ -343,7 +345,6 @@ CONFIG_PREEMPT_NONE=y
343# CONFIG_PREEMPT is not set 345# CONFIG_PREEMPT is not set
344CONFIG_GUSA=y 346CONFIG_GUSA=y
345# CONFIG_GUSA_RB is not set 347# CONFIG_GUSA_RB is not set
346# CONFIG_SPARSE_IRQ is not set
347 348
348# 349#
349# Boot options 350# Boot options
@@ -359,9 +360,9 @@ CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 root=/dev/sda1"
359# Bus options 360# Bus options
360# 361#
361CONFIG_PCI=y 362CONFIG_PCI=y
363CONFIG_PCI_DOMAINS=y
362# CONFIG_PCIEPORTBUS is not set 364# CONFIG_PCIEPORTBUS is not set
363# CONFIG_ARCH_SUPPORTS_MSI is not set 365# CONFIG_ARCH_SUPPORTS_MSI is not set
364CONFIG_PCI_LEGACY=y
365# CONFIG_PCI_STUB is not set 366# CONFIG_PCI_STUB is not set
366# CONFIG_PCI_IOV is not set 367# CONFIG_PCI_IOV is not set
367# CONFIG_PCCARD is not set 368# CONFIG_PCCARD is not set
@@ -389,7 +390,6 @@ CONFIG_NET=y
389# Networking options 390# Networking options
390# 391#
391CONFIG_PACKET=y 392CONFIG_PACKET=y
392# CONFIG_PACKET_MMAP is not set
393CONFIG_UNIX=y 393CONFIG_UNIX=y
394CONFIG_XFRM=y 394CONFIG_XFRM=y
395# CONFIG_XFRM_USER is not set 395# CONFIG_XFRM_USER is not set
@@ -449,7 +449,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
449# Network testing 449# Network testing
450# 450#
451# CONFIG_NET_PKTGEN is not set 451# CONFIG_NET_PKTGEN is not set
452# CONFIG_NET_DROP_MONITOR is not set
453# CONFIG_HAMRADIO is not set 452# CONFIG_HAMRADIO is not set
454# CONFIG_CAN is not set 453# CONFIG_CAN is not set
455# CONFIG_IRDA is not set 454# CONFIG_IRDA is not set
@@ -525,6 +524,7 @@ CONFIG_HAVE_IDE=y
525# 524#
526# SCSI device support 525# SCSI device support
527# 526#
527CONFIG_SCSI_MOD=y
528# CONFIG_RAID_ATTRS is not set 528# CONFIG_RAID_ATTRS is not set
529CONFIG_SCSI=y 529CONFIG_SCSI=y
530CONFIG_SCSI_DMA=y 530CONFIG_SCSI_DMA=y
@@ -642,6 +642,7 @@ CONFIG_ATA_SFF=y
642# CONFIG_PATA_IT821X is not set 642# CONFIG_PATA_IT821X is not set
643# CONFIG_PATA_IT8213 is not set 643# CONFIG_PATA_IT8213 is not set
644# CONFIG_PATA_JMICRON is not set 644# CONFIG_PATA_JMICRON is not set
645# CONFIG_PATA_LEGACY is not set
645# CONFIG_PATA_TRIFLEX is not set 646# CONFIG_PATA_TRIFLEX is not set
646# CONFIG_PATA_MARVELL is not set 647# CONFIG_PATA_MARVELL is not set
647# CONFIG_PATA_MPIIX is not set 648# CONFIG_PATA_MPIIX is not set
@@ -678,7 +679,7 @@ CONFIG_PATA_PLATFORM=y
678# 679#
679 680
680# 681#
681# See the help texts for more information. 682# The newer stack is recommended.
682# 683#
683# CONFIG_FIREWIRE is not set 684# CONFIG_FIREWIRE is not set
684# CONFIG_IEEE1394 is not set 685# CONFIG_IEEE1394 is not set
@@ -719,6 +720,7 @@ CONFIG_NET_PCI=y
719# CONFIG_PCNET32 is not set 720# CONFIG_PCNET32 is not set
720# CONFIG_AMD8111_ETH is not set 721# CONFIG_AMD8111_ETH is not set
721# CONFIG_ADAPTEC_STARFIRE is not set 722# CONFIG_ADAPTEC_STARFIRE is not set
723# CONFIG_KSZ884X_PCI is not set
722# CONFIG_B44 is not set 724# CONFIG_B44 is not set
723# CONFIG_FORCEDETH is not set 725# CONFIG_FORCEDETH is not set
724# CONFIG_E100 is not set 726# CONFIG_E100 is not set
@@ -771,6 +773,8 @@ CONFIG_NETDEV_10000=y
771# CONFIG_CHELSIO_T1 is not set 773# CONFIG_CHELSIO_T1 is not set
772CONFIG_CHELSIO_T3_DEPENDS=y 774CONFIG_CHELSIO_T3_DEPENDS=y
773# CONFIG_CHELSIO_T3 is not set 775# CONFIG_CHELSIO_T3 is not set
776CONFIG_CHELSIO_T4_DEPENDS=y
777# CONFIG_CHELSIO_T4 is not set
774# CONFIG_ENIC is not set 778# CONFIG_ENIC is not set
775# CONFIG_IXGBE is not set 779# CONFIG_IXGBE is not set
776# CONFIG_IXGB is not set 780# CONFIG_IXGB is not set
@@ -783,6 +787,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
783# CONFIG_MLX4_CORE is not set 787# CONFIG_MLX4_CORE is not set
784# CONFIG_TEHUTI is not set 788# CONFIG_TEHUTI is not set
785# CONFIG_BNX2X is not set 789# CONFIG_BNX2X is not set
790# CONFIG_QLCNIC is not set
786# CONFIG_QLGE is not set 791# CONFIG_QLGE is not set
787# CONFIG_SFC is not set 792# CONFIG_SFC is not set
788# CONFIG_BE2NET is not set 793# CONFIG_BE2NET is not set
@@ -805,6 +810,7 @@ CONFIG_WLAN=y
805# CONFIG_USB_PEGASUS is not set 810# CONFIG_USB_PEGASUS is not set
806# CONFIG_USB_RTL8150 is not set 811# CONFIG_USB_RTL8150 is not set
807# CONFIG_USB_USBNET is not set 812# CONFIG_USB_USBNET is not set
813# CONFIG_USB_IPHETH is not set
808# CONFIG_WAN is not set 814# CONFIG_WAN is not set
809# CONFIG_FDDI is not set 815# CONFIG_FDDI is not set
810# CONFIG_HIPPI is not set 816# CONFIG_HIPPI is not set
@@ -882,6 +888,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
882CONFIG_SERIAL_CORE=y 888CONFIG_SERIAL_CORE=y
883CONFIG_SERIAL_CORE_CONSOLE=y 889CONFIG_SERIAL_CORE_CONSOLE=y
884# CONFIG_SERIAL_JSM is not set 890# CONFIG_SERIAL_JSM is not set
891# CONFIG_SERIAL_TIMBERDALE is not set
885CONFIG_UNIX98_PTYS=y 892CONFIG_UNIX98_PTYS=y
886# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 893# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
887CONFIG_LEGACY_PTYS=y 894CONFIG_LEGACY_PTYS=y
@@ -964,6 +971,7 @@ CONFIG_MFD_SM501=y
964# CONFIG_MFD_MC13783 is not set 971# CONFIG_MFD_MC13783 is not set
965# CONFIG_EZX_PCAP is not set 972# CONFIG_EZX_PCAP is not set
966# CONFIG_AB4500_CORE is not set 973# CONFIG_AB4500_CORE is not set
974# CONFIG_LPC_SCH is not set
967# CONFIG_REGULATOR is not set 975# CONFIG_REGULATOR is not set
968# CONFIG_MEDIA_SUPPORT is not set 976# CONFIG_MEDIA_SUPPORT is not set
969 977
@@ -971,6 +979,7 @@ CONFIG_MFD_SM501=y
971# Graphics support 979# Graphics support
972# 980#
973CONFIG_VGA_ARB=y 981CONFIG_VGA_ARB=y
982CONFIG_VGA_ARB_MAX_GPUS=16
974# CONFIG_DRM is not set 983# CONFIG_DRM is not set
975# CONFIG_VGASTATE is not set 984# CONFIG_VGASTATE is not set
976CONFIG_VIDEO_OUTPUT_CONTROL=m 985CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1152,6 +1161,7 @@ CONFIG_SND_SPI=y
1152CONFIG_SND_SUPERH=y 1161CONFIG_SND_SUPERH=y
1153CONFIG_SND_USB=y 1162CONFIG_SND_USB=y
1154# CONFIG_SND_USB_AUDIO is not set 1163# CONFIG_SND_USB_AUDIO is not set
1164# CONFIG_SND_USB_UA101 is not set
1155# CONFIG_SND_USB_CAIAQ is not set 1165# CONFIG_SND_USB_CAIAQ is not set
1156# CONFIG_SND_SOC is not set 1166# CONFIG_SND_SOC is not set
1157CONFIG_SOUND_PRIME=m 1167CONFIG_SOUND_PRIME=m
@@ -1170,6 +1180,7 @@ CONFIG_USB_HID=y
1170# 1180#
1171# Special HID drivers 1181# Special HID drivers
1172# 1182#
1183# CONFIG_HID_3M_PCT is not set
1173CONFIG_HID_A4TECH=y 1184CONFIG_HID_A4TECH=y
1174CONFIG_HID_APPLE=y 1185CONFIG_HID_APPLE=y
1175CONFIG_HID_BELKIN=y 1186CONFIG_HID_BELKIN=y
@@ -1185,14 +1196,19 @@ CONFIG_HID_GYRATION=y
1185CONFIG_HID_LOGITECH=y 1196CONFIG_HID_LOGITECH=y
1186# CONFIG_LOGITECH_FF is not set 1197# CONFIG_LOGITECH_FF is not set
1187# CONFIG_LOGIRUMBLEPAD2_FF is not set 1198# CONFIG_LOGIRUMBLEPAD2_FF is not set
1199# CONFIG_LOGIG940_FF is not set
1188CONFIG_HID_MICROSOFT=y 1200CONFIG_HID_MICROSOFT=y
1201# CONFIG_HID_MOSART is not set
1189CONFIG_HID_MONTEREY=y 1202CONFIG_HID_MONTEREY=y
1190# CONFIG_HID_NTRIG is not set 1203# CONFIG_HID_NTRIG is not set
1204# CONFIG_HID_ORTEK is not set
1191CONFIG_HID_PANTHERLORD=y 1205CONFIG_HID_PANTHERLORD=y
1192# CONFIG_PANTHERLORD_FF is not set 1206# CONFIG_PANTHERLORD_FF is not set
1193CONFIG_HID_PETALYNX=y 1207CONFIG_HID_PETALYNX=y
1208# CONFIG_HID_QUANTA is not set
1194CONFIG_HID_SAMSUNG=y 1209CONFIG_HID_SAMSUNG=y
1195CONFIG_HID_SONY=y 1210CONFIG_HID_SONY=y
1211# CONFIG_HID_STANTUM is not set
1196CONFIG_HID_SUNPLUS=y 1212CONFIG_HID_SUNPLUS=y
1197# CONFIG_HID_GREENASIA is not set 1213# CONFIG_HID_GREENASIA is not set
1198# CONFIG_HID_SMARTJOYPLUS is not set 1214# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1291,7 +1307,6 @@ CONFIG_USB_LIBUSUAL=y
1291# CONFIG_USB_RIO500 is not set 1307# CONFIG_USB_RIO500 is not set
1292# CONFIG_USB_LEGOTOWER is not set 1308# CONFIG_USB_LEGOTOWER is not set
1293# CONFIG_USB_LCD is not set 1309# CONFIG_USB_LCD is not set
1294# CONFIG_USB_BERRY_CHARGE is not set
1295# CONFIG_USB_LED is not set 1310# CONFIG_USB_LED is not set
1296# CONFIG_USB_CYPRESS_CY7C63 is not set 1311# CONFIG_USB_CYPRESS_CY7C63 is not set
1297# CONFIG_USB_CYTHERM is not set 1312# CONFIG_USB_CYTHERM is not set
@@ -1303,7 +1318,6 @@ CONFIG_USB_LIBUSUAL=y
1303# CONFIG_USB_IOWARRIOR is not set 1318# CONFIG_USB_IOWARRIOR is not set
1304# CONFIG_USB_TEST is not set 1319# CONFIG_USB_TEST is not set
1305# CONFIG_USB_ISIGHTFW is not set 1320# CONFIG_USB_ISIGHTFW is not set
1306# CONFIG_USB_VST is not set
1307# CONFIG_USB_GADGET is not set 1321# CONFIG_USB_GADGET is not set
1308 1322
1309# 1323#
@@ -1381,7 +1395,6 @@ CONFIG_EXT2_FS=y
1381# CONFIG_EXT2_FS_XIP is not set 1395# CONFIG_EXT2_FS_XIP is not set
1382# CONFIG_EXT3_FS is not set 1396# CONFIG_EXT3_FS is not set
1383# CONFIG_EXT4_FS is not set 1397# CONFIG_EXT4_FS is not set
1384CONFIG_EXT4_USE_FOR_EXT23=y
1385# CONFIG_REISERFS_FS is not set 1398# CONFIG_REISERFS_FS is not set
1386# CONFIG_JFS_FS is not set 1399# CONFIG_JFS_FS is not set
1387# CONFIG_FS_POSIX_ACL is not set 1400# CONFIG_FS_POSIX_ACL is not set
@@ -1442,6 +1455,7 @@ CONFIG_MISC_FILESYSTEMS=y
1442# CONFIG_BEFS_FS is not set 1455# CONFIG_BEFS_FS is not set
1443# CONFIG_BFS_FS is not set 1456# CONFIG_BFS_FS is not set
1444# CONFIG_EFS_FS is not set 1457# CONFIG_EFS_FS is not set
1458# CONFIG_LOGFS is not set
1445# CONFIG_CRAMFS is not set 1459# CONFIG_CRAMFS is not set
1446# CONFIG_SQUASHFS is not set 1460# CONFIG_SQUASHFS is not set
1447# CONFIG_VXFS_FS is not set 1461# CONFIG_VXFS_FS is not set
@@ -1456,6 +1470,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
1456# CONFIG_NFS_FS is not set 1470# CONFIG_NFS_FS is not set
1457# CONFIG_NFSD is not set 1471# CONFIG_NFSD is not set
1458# CONFIG_SMB_FS is not set 1472# CONFIG_SMB_FS is not set
1473# CONFIG_CEPH_FS is not set
1459# CONFIG_CIFS is not set 1474# CONFIG_CIFS is not set
1460# CONFIG_NCP_FS is not set 1475# CONFIG_NCP_FS is not set
1461# CONFIG_CODA_FS is not set 1476# CONFIG_CODA_FS is not set
@@ -1522,13 +1537,12 @@ CONFIG_FRAME_WARN=1024
1522CONFIG_DEBUG_FS=y 1537CONFIG_DEBUG_FS=y
1523# CONFIG_HEADERS_CHECK is not set 1538# CONFIG_HEADERS_CHECK is not set
1524# CONFIG_DEBUG_KERNEL is not set 1539# CONFIG_DEBUG_KERNEL is not set
1525CONFIG_STACKTRACE=y
1526CONFIG_DEBUG_BUGVERBOSE=y 1540CONFIG_DEBUG_BUGVERBOSE=y
1527# CONFIG_DEBUG_MEMORY_INIT is not set 1541# CONFIG_DEBUG_MEMORY_INIT is not set
1528# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1542# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1543# CONFIG_LKDTM is not set
1529# CONFIG_LATENCYTOP is not set 1544# CONFIG_LATENCYTOP is not set
1530# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1545# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1531CONFIG_NOP_TRACER=y
1532CONFIG_HAVE_FUNCTION_TRACER=y 1546CONFIG_HAVE_FUNCTION_TRACER=y
1533CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1547CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1534CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1548CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1536,10 +1550,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1536CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1550CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1537CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1551CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1538CONFIG_RING_BUFFER=y 1552CONFIG_RING_BUFFER=y
1539CONFIG_EVENT_TRACING=y
1540CONFIG_CONTEXT_SWITCH_TRACER=y
1541CONFIG_RING_BUFFER_ALLOW_SWAP=y 1553CONFIG_RING_BUFFER_ALLOW_SWAP=y
1542CONFIG_TRACING=y
1543CONFIG_TRACING_SUPPORT=y 1554CONFIG_TRACING_SUPPORT=y
1544# CONFIG_FTRACE is not set 1555# CONFIG_FTRACE is not set
1545# CONFIG_DYNAMIC_DEBUG is not set 1556# CONFIG_DYNAMIC_DEBUG is not set
@@ -1648,7 +1659,8 @@ CONFIG_CRYPTO=y
1648# CONFIG_CRYPTO_ANSI_CPRNG is not set 1659# CONFIG_CRYPTO_ANSI_CPRNG is not set
1649CONFIG_CRYPTO_HW=y 1660CONFIG_CRYPTO_HW=y
1650# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1661# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1651CONFIG_BINARY_PRINTF=y 1662# CONFIG_VIRTUALIZATION is not set
1663# CONFIG_BINARY_PRINTF is not set
1652 1664
1653# 1665#
1654# Library routines 1666# Library routines
diff --git a/arch/sh/configs/rts7751r2dplus_defconfig b/arch/sh/configs/rts7751r2dplus_defconfig
index 6d511d06cbf6..487abcc4d4e7 100644
--- a/arch/sh/configs/rts7751r2dplus_defconfig
+++ b/arch/sh/configs/rts7751r2dplus_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:26:39 2010 4# Tue May 18 16:20:00 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_IO_TRAPPED=y 34CONFIG_IO_TRAPPED=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION_AUTO=y
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -70,7 +73,6 @@ CONFIG_RCU_FANOUT=32
70# CONFIG_TREE_RCU_TRACE is not set 73# CONFIG_TREE_RCU_TRACE is not set
71# CONFIG_IKCONFIG is not set 74# CONFIG_IKCONFIG is not set
72CONFIG_LOG_BUF_SHIFT=14 75CONFIG_LOG_BUF_SHIFT=14
73# CONFIG_GROUP_SCHED is not set
74# CONFIG_CGROUPS is not set 76# CONFIG_CGROUPS is not set
75CONFIG_SYSFS_DEPRECATED=y 77CONFIG_SYSFS_DEPRECATED=y
76CONFIG_SYSFS_DEPRECATED_V2=y 78CONFIG_SYSFS_DEPRECATED_V2=y
@@ -104,7 +106,6 @@ CONFIG_PERF_USE_VMALLOC=y
104# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
105# 107#
106CONFIG_PERF_EVENTS=y 108CONFIG_PERF_EVENTS=y
107CONFIG_EVENT_PROFILE=y
108# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
109CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
110CONFIG_PCI_QUIRKS=y 111CONFIG_PCI_QUIRKS=y
@@ -113,7 +114,6 @@ CONFIG_SLAB=y
113# CONFIG_SLUB is not set 114# CONFIG_SLUB is not set
114# CONFIG_SLOB is not set 115# CONFIG_SLOB is not set
115CONFIG_PROFILING=y 116CONFIG_PROFILING=y
116CONFIG_TRACEPOINTS=y
117CONFIG_OPROFILE=y 117CONFIG_OPROFILE=y
118CONFIG_HAVE_OPROFILE=y 118CONFIG_HAVE_OPROFILE=y
119# CONFIG_KPROBES is not set 119# CONFIG_KPROBES is not set
@@ -124,6 +124,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y 124CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 125CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 126CONFIG_HAVE_DMA_API_DEBUG=y
127CONFIG_HAVE_HW_BREAKPOINT=y
127 128
128# 129#
129# GCOV-based kernel profiling 130# GCOV-based kernel profiling
@@ -242,6 +243,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
242CONFIG_MAX_ACTIVE_REGIONS=1 243CONFIG_MAX_ACTIVE_REGIONS=1
243CONFIG_ARCH_POPULATES_NODE_MAP=y 244CONFIG_ARCH_POPULATES_NODE_MAP=y
244CONFIG_ARCH_SELECT_MEMORY_MODEL=y 245CONFIG_ARCH_SELECT_MEMORY_MODEL=y
246CONFIG_UNCACHED_MAPPING=y
245CONFIG_PAGE_SIZE_4KB=y 247CONFIG_PAGE_SIZE_4KB=y
246# CONFIG_PAGE_SIZE_8KB is not set 248# CONFIG_PAGE_SIZE_8KB is not set
247# CONFIG_PAGE_SIZE_16KB is not set 249# CONFIG_PAGE_SIZE_16KB is not set
@@ -257,7 +259,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
257CONFIG_SPLIT_PTLOCK_CPUS=4 259CONFIG_SPLIT_PTLOCK_CPUS=4
258# CONFIG_PHYS_ADDR_T_64BIT is not set 260# CONFIG_PHYS_ADDR_T_64BIT is not set
259CONFIG_ZONE_DMA_FLAG=0 261CONFIG_ZONE_DMA_FLAG=0
260CONFIG_NR_QUICK=2 262CONFIG_NR_QUICK=1
261# CONFIG_KSM is not set 263# CONFIG_KSM is not set
262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 264CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
263 265
@@ -343,7 +345,6 @@ CONFIG_PREEMPT_NONE=y
343# CONFIG_PREEMPT is not set 345# CONFIG_PREEMPT is not set
344CONFIG_GUSA=y 346CONFIG_GUSA=y
345# CONFIG_GUSA_RB is not set 347# CONFIG_GUSA_RB is not set
346# CONFIG_SPARSE_IRQ is not set
347 348
348# 349#
349# Boot options 350# Boot options
@@ -359,9 +360,9 @@ CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 root=/dev/sda1"
359# Bus options 360# Bus options
360# 361#
361CONFIG_PCI=y 362CONFIG_PCI=y
363CONFIG_PCI_DOMAINS=y
362# CONFIG_PCIEPORTBUS is not set 364# CONFIG_PCIEPORTBUS is not set
363# CONFIG_ARCH_SUPPORTS_MSI is not set 365# CONFIG_ARCH_SUPPORTS_MSI is not set
364CONFIG_PCI_LEGACY=y
365# CONFIG_PCI_STUB is not set 366# CONFIG_PCI_STUB is not set
366# CONFIG_PCI_IOV is not set 367# CONFIG_PCI_IOV is not set
367# CONFIG_PCCARD is not set 368# CONFIG_PCCARD is not set
@@ -389,7 +390,6 @@ CONFIG_NET=y
389# Networking options 390# Networking options
390# 391#
391CONFIG_PACKET=y 392CONFIG_PACKET=y
392# CONFIG_PACKET_MMAP is not set
393CONFIG_UNIX=y 393CONFIG_UNIX=y
394CONFIG_XFRM=y 394CONFIG_XFRM=y
395# CONFIG_XFRM_USER is not set 395# CONFIG_XFRM_USER is not set
@@ -449,7 +449,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
449# Network testing 449# Network testing
450# 450#
451# CONFIG_NET_PKTGEN is not set 451# CONFIG_NET_PKTGEN is not set
452# CONFIG_NET_DROP_MONITOR is not set
453# CONFIG_HAMRADIO is not set 452# CONFIG_HAMRADIO is not set
454# CONFIG_CAN is not set 453# CONFIG_CAN is not set
455# CONFIG_IRDA is not set 454# CONFIG_IRDA is not set
@@ -611,6 +610,7 @@ CONFIG_HAVE_IDE=y
611# 610#
612# SCSI device support 611# SCSI device support
613# 612#
613CONFIG_SCSI_MOD=y
614# CONFIG_RAID_ATTRS is not set 614# CONFIG_RAID_ATTRS is not set
615CONFIG_SCSI=y 615CONFIG_SCSI=y
616CONFIG_SCSI_DMA=y 616CONFIG_SCSI_DMA=y
@@ -728,6 +728,7 @@ CONFIG_ATA_SFF=y
728# CONFIG_PATA_IT821X is not set 728# CONFIG_PATA_IT821X is not set
729# CONFIG_PATA_IT8213 is not set 729# CONFIG_PATA_IT8213 is not set
730# CONFIG_PATA_JMICRON is not set 730# CONFIG_PATA_JMICRON is not set
731# CONFIG_PATA_LEGACY is not set
731# CONFIG_PATA_TRIFLEX is not set 732# CONFIG_PATA_TRIFLEX is not set
732# CONFIG_PATA_MARVELL is not set 733# CONFIG_PATA_MARVELL is not set
733# CONFIG_PATA_MPIIX is not set 734# CONFIG_PATA_MPIIX is not set
@@ -764,7 +765,7 @@ CONFIG_PATA_PLATFORM=y
764# 765#
765 766
766# 767#
767# See the help texts for more information. 768# The newer stack is recommended.
768# 769#
769# CONFIG_FIREWIRE is not set 770# CONFIG_FIREWIRE is not set
770# CONFIG_IEEE1394 is not set 771# CONFIG_IEEE1394 is not set
@@ -805,6 +806,7 @@ CONFIG_NET_PCI=y
805# CONFIG_PCNET32 is not set 806# CONFIG_PCNET32 is not set
806# CONFIG_AMD8111_ETH is not set 807# CONFIG_AMD8111_ETH is not set
807# CONFIG_ADAPTEC_STARFIRE is not set 808# CONFIG_ADAPTEC_STARFIRE is not set
809# CONFIG_KSZ884X_PCI is not set
808# CONFIG_B44 is not set 810# CONFIG_B44 is not set
809# CONFIG_FORCEDETH is not set 811# CONFIG_FORCEDETH is not set
810# CONFIG_E100 is not set 812# CONFIG_E100 is not set
@@ -857,6 +859,8 @@ CONFIG_NETDEV_10000=y
857# CONFIG_CHELSIO_T1 is not set 859# CONFIG_CHELSIO_T1 is not set
858CONFIG_CHELSIO_T3_DEPENDS=y 860CONFIG_CHELSIO_T3_DEPENDS=y
859# CONFIG_CHELSIO_T3 is not set 861# CONFIG_CHELSIO_T3 is not set
862CONFIG_CHELSIO_T4_DEPENDS=y
863# CONFIG_CHELSIO_T4 is not set
860# CONFIG_ENIC is not set 864# CONFIG_ENIC is not set
861# CONFIG_IXGBE is not set 865# CONFIG_IXGBE is not set
862# CONFIG_IXGB is not set 866# CONFIG_IXGB is not set
@@ -869,6 +873,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
869# CONFIG_MLX4_CORE is not set 873# CONFIG_MLX4_CORE is not set
870# CONFIG_TEHUTI is not set 874# CONFIG_TEHUTI is not set
871# CONFIG_BNX2X is not set 875# CONFIG_BNX2X is not set
876# CONFIG_QLCNIC is not set
872# CONFIG_QLGE is not set 877# CONFIG_QLGE is not set
873# CONFIG_SFC is not set 878# CONFIG_SFC is not set
874# CONFIG_BE2NET is not set 879# CONFIG_BE2NET is not set
@@ -891,6 +896,7 @@ CONFIG_WLAN=y
891# CONFIG_USB_PEGASUS is not set 896# CONFIG_USB_PEGASUS is not set
892# CONFIG_USB_RTL8150 is not set 897# CONFIG_USB_RTL8150 is not set
893# CONFIG_USB_USBNET is not set 898# CONFIG_USB_USBNET is not set
899# CONFIG_USB_IPHETH is not set
894# CONFIG_WAN is not set 900# CONFIG_WAN is not set
895# CONFIG_FDDI is not set 901# CONFIG_FDDI is not set
896# CONFIG_HIPPI is not set 902# CONFIG_HIPPI is not set
@@ -968,6 +974,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
968CONFIG_SERIAL_CORE=y 974CONFIG_SERIAL_CORE=y
969CONFIG_SERIAL_CORE_CONSOLE=y 975CONFIG_SERIAL_CORE_CONSOLE=y
970# CONFIG_SERIAL_JSM is not set 976# CONFIG_SERIAL_JSM is not set
977# CONFIG_SERIAL_TIMBERDALE is not set
971CONFIG_UNIX98_PTYS=y 978CONFIG_UNIX98_PTYS=y
972# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 979# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
973CONFIG_LEGACY_PTYS=y 980CONFIG_LEGACY_PTYS=y
@@ -1050,6 +1057,7 @@ CONFIG_MFD_SM501=y
1050# CONFIG_MFD_MC13783 is not set 1057# CONFIG_MFD_MC13783 is not set
1051# CONFIG_EZX_PCAP is not set 1058# CONFIG_EZX_PCAP is not set
1052# CONFIG_AB4500_CORE is not set 1059# CONFIG_AB4500_CORE is not set
1060# CONFIG_LPC_SCH is not set
1053# CONFIG_REGULATOR is not set 1061# CONFIG_REGULATOR is not set
1054# CONFIG_MEDIA_SUPPORT is not set 1062# CONFIG_MEDIA_SUPPORT is not set
1055 1063
@@ -1057,6 +1065,7 @@ CONFIG_MFD_SM501=y
1057# Graphics support 1065# Graphics support
1058# 1066#
1059CONFIG_VGA_ARB=y 1067CONFIG_VGA_ARB=y
1068CONFIG_VGA_ARB_MAX_GPUS=16
1060# CONFIG_DRM is not set 1069# CONFIG_DRM is not set
1061# CONFIG_VGASTATE is not set 1070# CONFIG_VGASTATE is not set
1062CONFIG_VIDEO_OUTPUT_CONTROL=m 1071CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1238,6 +1247,7 @@ CONFIG_SND_SPI=y
1238CONFIG_SND_SUPERH=y 1247CONFIG_SND_SUPERH=y
1239CONFIG_SND_USB=y 1248CONFIG_SND_USB=y
1240# CONFIG_SND_USB_AUDIO is not set 1249# CONFIG_SND_USB_AUDIO is not set
1250# CONFIG_SND_USB_UA101 is not set
1241# CONFIG_SND_USB_CAIAQ is not set 1251# CONFIG_SND_USB_CAIAQ is not set
1242# CONFIG_SND_SOC is not set 1252# CONFIG_SND_SOC is not set
1243CONFIG_SOUND_PRIME=m 1253CONFIG_SOUND_PRIME=m
@@ -1256,6 +1266,7 @@ CONFIG_USB_HID=y
1256# 1266#
1257# Special HID drivers 1267# Special HID drivers
1258# 1268#
1269# CONFIG_HID_3M_PCT is not set
1259CONFIG_HID_A4TECH=y 1270CONFIG_HID_A4TECH=y
1260CONFIG_HID_APPLE=y 1271CONFIG_HID_APPLE=y
1261CONFIG_HID_BELKIN=y 1272CONFIG_HID_BELKIN=y
@@ -1271,14 +1282,19 @@ CONFIG_HID_GYRATION=y
1271CONFIG_HID_LOGITECH=y 1282CONFIG_HID_LOGITECH=y
1272# CONFIG_LOGITECH_FF is not set 1283# CONFIG_LOGITECH_FF is not set
1273# CONFIG_LOGIRUMBLEPAD2_FF is not set 1284# CONFIG_LOGIRUMBLEPAD2_FF is not set
1285# CONFIG_LOGIG940_FF is not set
1274CONFIG_HID_MICROSOFT=y 1286CONFIG_HID_MICROSOFT=y
1287# CONFIG_HID_MOSART is not set
1275CONFIG_HID_MONTEREY=y 1288CONFIG_HID_MONTEREY=y
1276# CONFIG_HID_NTRIG is not set 1289# CONFIG_HID_NTRIG is not set
1290# CONFIG_HID_ORTEK is not set
1277CONFIG_HID_PANTHERLORD=y 1291CONFIG_HID_PANTHERLORD=y
1278# CONFIG_PANTHERLORD_FF is not set 1292# CONFIG_PANTHERLORD_FF is not set
1279CONFIG_HID_PETALYNX=y 1293CONFIG_HID_PETALYNX=y
1294# CONFIG_HID_QUANTA is not set
1280CONFIG_HID_SAMSUNG=y 1295CONFIG_HID_SAMSUNG=y
1281CONFIG_HID_SONY=y 1296CONFIG_HID_SONY=y
1297# CONFIG_HID_STANTUM is not set
1282CONFIG_HID_SUNPLUS=y 1298CONFIG_HID_SUNPLUS=y
1283# CONFIG_HID_GREENASIA is not set 1299# CONFIG_HID_GREENASIA is not set
1284# CONFIG_HID_SMARTJOYPLUS is not set 1300# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1377,7 +1393,6 @@ CONFIG_USB_LIBUSUAL=y
1377# CONFIG_USB_RIO500 is not set 1393# CONFIG_USB_RIO500 is not set
1378# CONFIG_USB_LEGOTOWER is not set 1394# CONFIG_USB_LEGOTOWER is not set
1379# CONFIG_USB_LCD is not set 1395# CONFIG_USB_LCD is not set
1380# CONFIG_USB_BERRY_CHARGE is not set
1381# CONFIG_USB_LED is not set 1396# CONFIG_USB_LED is not set
1382# CONFIG_USB_CYPRESS_CY7C63 is not set 1397# CONFIG_USB_CYPRESS_CY7C63 is not set
1383# CONFIG_USB_CYTHERM is not set 1398# CONFIG_USB_CYTHERM is not set
@@ -1389,7 +1404,6 @@ CONFIG_USB_LIBUSUAL=y
1389# CONFIG_USB_IOWARRIOR is not set 1404# CONFIG_USB_IOWARRIOR is not set
1390# CONFIG_USB_TEST is not set 1405# CONFIG_USB_TEST is not set
1391# CONFIG_USB_ISIGHTFW is not set 1406# CONFIG_USB_ISIGHTFW is not set
1392# CONFIG_USB_VST is not set
1393# CONFIG_USB_GADGET is not set 1407# CONFIG_USB_GADGET is not set
1394 1408
1395# 1409#
@@ -1467,7 +1481,6 @@ CONFIG_EXT2_FS=y
1467# CONFIG_EXT2_FS_XIP is not set 1481# CONFIG_EXT2_FS_XIP is not set
1468# CONFIG_EXT3_FS is not set 1482# CONFIG_EXT3_FS is not set
1469# CONFIG_EXT4_FS is not set 1483# CONFIG_EXT4_FS is not set
1470CONFIG_EXT4_USE_FOR_EXT23=y
1471# CONFIG_REISERFS_FS is not set 1484# CONFIG_REISERFS_FS is not set
1472# CONFIG_JFS_FS is not set 1485# CONFIG_JFS_FS is not set
1473# CONFIG_FS_POSIX_ACL is not set 1486# CONFIG_FS_POSIX_ACL is not set
@@ -1529,6 +1542,7 @@ CONFIG_MISC_FILESYSTEMS=y
1529# CONFIG_BFS_FS is not set 1542# CONFIG_BFS_FS is not set
1530# CONFIG_EFS_FS is not set 1543# CONFIG_EFS_FS is not set
1531# CONFIG_JFFS2_FS is not set 1544# CONFIG_JFFS2_FS is not set
1545# CONFIG_LOGFS is not set
1532# CONFIG_CRAMFS is not set 1546# CONFIG_CRAMFS is not set
1533# CONFIG_SQUASHFS is not set 1547# CONFIG_SQUASHFS is not set
1534# CONFIG_VXFS_FS is not set 1548# CONFIG_VXFS_FS is not set
@@ -1543,6 +1557,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
1543# CONFIG_NFS_FS is not set 1557# CONFIG_NFS_FS is not set
1544# CONFIG_NFSD is not set 1558# CONFIG_NFSD is not set
1545# CONFIG_SMB_FS is not set 1559# CONFIG_SMB_FS is not set
1560# CONFIG_CEPH_FS is not set
1546# CONFIG_CIFS is not set 1561# CONFIG_CIFS is not set
1547# CONFIG_NCP_FS is not set 1562# CONFIG_NCP_FS is not set
1548# CONFIG_CODA_FS is not set 1563# CONFIG_CODA_FS is not set
@@ -1609,13 +1624,12 @@ CONFIG_FRAME_WARN=1024
1609CONFIG_DEBUG_FS=y 1624CONFIG_DEBUG_FS=y
1610# CONFIG_HEADERS_CHECK is not set 1625# CONFIG_HEADERS_CHECK is not set
1611# CONFIG_DEBUG_KERNEL is not set 1626# CONFIG_DEBUG_KERNEL is not set
1612CONFIG_STACKTRACE=y
1613CONFIG_DEBUG_BUGVERBOSE=y 1627CONFIG_DEBUG_BUGVERBOSE=y
1614# CONFIG_DEBUG_MEMORY_INIT is not set 1628# CONFIG_DEBUG_MEMORY_INIT is not set
1615# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1629# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1630# CONFIG_LKDTM is not set
1616# CONFIG_LATENCYTOP is not set 1631# CONFIG_LATENCYTOP is not set
1617# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1632# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1618CONFIG_NOP_TRACER=y
1619CONFIG_HAVE_FUNCTION_TRACER=y 1633CONFIG_HAVE_FUNCTION_TRACER=y
1620CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1634CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1621CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1635CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1623,10 +1637,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1623CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1637CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1624CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1638CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1625CONFIG_RING_BUFFER=y 1639CONFIG_RING_BUFFER=y
1626CONFIG_EVENT_TRACING=y
1627CONFIG_CONTEXT_SWITCH_TRACER=y
1628CONFIG_RING_BUFFER_ALLOW_SWAP=y 1640CONFIG_RING_BUFFER_ALLOW_SWAP=y
1629CONFIG_TRACING=y
1630CONFIG_TRACING_SUPPORT=y 1641CONFIG_TRACING_SUPPORT=y
1631# CONFIG_FTRACE is not set 1642# CONFIG_FTRACE is not set
1632# CONFIG_DYNAMIC_DEBUG is not set 1643# CONFIG_DYNAMIC_DEBUG is not set
@@ -1735,7 +1746,8 @@ CONFIG_CRYPTO=y
1735# CONFIG_CRYPTO_ANSI_CPRNG is not set 1746# CONFIG_CRYPTO_ANSI_CPRNG is not set
1736CONFIG_CRYPTO_HW=y 1747CONFIG_CRYPTO_HW=y
1737# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1748# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1738CONFIG_BINARY_PRINTF=y 1749# CONFIG_VIRTUALIZATION is not set
1750# CONFIG_BINARY_PRINTF is not set
1739 1751
1740# 1752#
1741# Library routines 1753# Library routines
diff --git a/arch/sh/configs/sdk7780_defconfig b/arch/sh/configs/sdk7780_defconfig
index 1859ba099945..fe923142c2cc 100644
--- a/arch/sh/configs/sdk7780_defconfig
+++ b/arch/sh/configs/sdk7780_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:27:20 2010 4# Tue May 18 16:21:00 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION_AUTO=y
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -73,7 +76,6 @@ CONFIG_RCU_FANOUT=32
73CONFIG_IKCONFIG=y 76CONFIG_IKCONFIG=y
74CONFIG_IKCONFIG_PROC=y 77CONFIG_IKCONFIG_PROC=y
75CONFIG_LOG_BUF_SHIFT=18 78CONFIG_LOG_BUF_SHIFT=18
76# CONFIG_GROUP_SCHED is not set
77# CONFIG_CGROUPS is not set 79# CONFIG_CGROUPS is not set
78CONFIG_SYSFS_DEPRECATED=y 80CONFIG_SYSFS_DEPRECATED=y
79CONFIG_SYSFS_DEPRECATED_V2=y 81CONFIG_SYSFS_DEPRECATED_V2=y
@@ -107,8 +109,9 @@ CONFIG_PERF_USE_VMALLOC=y
107# 109#
108# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
109# 111#
110# CONFIG_PERF_EVENTS is not set 112CONFIG_PERF_EVENTS=y
111# CONFIG_PERF_COUNTERS is not set 113# CONFIG_PERF_COUNTERS is not set
114# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
112CONFIG_VM_EVENT_COUNTERS=y 115CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_PCI_QUIRKS=y 116CONFIG_PCI_QUIRKS=y
114CONFIG_SLUB_DEBUG=y 117CONFIG_SLUB_DEBUG=y
@@ -126,6 +129,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
126CONFIG_HAVE_DMA_ATTRS=y 129CONFIG_HAVE_DMA_ATTRS=y
127CONFIG_HAVE_CLK=y 130CONFIG_HAVE_CLK=y
128CONFIG_HAVE_DMA_API_DEBUG=y 131CONFIG_HAVE_DMA_API_DEBUG=y
132CONFIG_HAVE_HW_BREAKPOINT=y
129 133
130# 134#
131# GCOV-based kernel profiling 135# GCOV-based kernel profiling
@@ -237,11 +241,8 @@ CONFIG_PAGE_OFFSET=0x80000000
237CONFIG_FORCE_MAX_ZONEORDER=11 241CONFIG_FORCE_MAX_ZONEORDER=11
238CONFIG_MEMORY_START=0x08000000 242CONFIG_MEMORY_START=0x08000000
239CONFIG_MEMORY_SIZE=0x08000000 243CONFIG_MEMORY_SIZE=0x08000000
240# CONFIG_29BIT is not set 244CONFIG_29BIT=y
241CONFIG_32BIT=y
242CONFIG_PMB_ENABLE=y
243# CONFIG_PMB is not set 245# CONFIG_PMB is not set
244CONFIG_PMB_FIXED=y
245CONFIG_VSYSCALL=y 246CONFIG_VSYSCALL=y
246CONFIG_ARCH_FLATMEM_ENABLE=y 247CONFIG_ARCH_FLATMEM_ENABLE=y
247CONFIG_ARCH_SPARSEMEM_ENABLE=y 248CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -249,6 +250,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
249CONFIG_MAX_ACTIVE_REGIONS=1 250CONFIG_MAX_ACTIVE_REGIONS=1
250CONFIG_ARCH_POPULATES_NODE_MAP=y 251CONFIG_ARCH_POPULATES_NODE_MAP=y
251CONFIG_ARCH_SELECT_MEMORY_MODEL=y 252CONFIG_ARCH_SELECT_MEMORY_MODEL=y
253CONFIG_UNCACHED_MAPPING=y
252CONFIG_PAGE_SIZE_4KB=y 254CONFIG_PAGE_SIZE_4KB=y
253# CONFIG_PAGE_SIZE_8KB is not set 255# CONFIG_PAGE_SIZE_8KB is not set
254# CONFIG_PAGE_SIZE_16KB is not set 256# CONFIG_PAGE_SIZE_16KB is not set
@@ -270,7 +272,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
270CONFIG_SPLIT_PTLOCK_CPUS=4 272CONFIG_SPLIT_PTLOCK_CPUS=4
271# CONFIG_PHYS_ADDR_T_64BIT is not set 273# CONFIG_PHYS_ADDR_T_64BIT is not set
272CONFIG_ZONE_DMA_FLAG=0 274CONFIG_ZONE_DMA_FLAG=0
273CONFIG_NR_QUICK=2 275CONFIG_NR_QUICK=1
274# CONFIG_KSM is not set 276# CONFIG_KSM is not set
275CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 277CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
276 278
@@ -353,7 +355,7 @@ CONFIG_SCHED_HRTICK=y
353# CONFIG_PREEMPT_VOLUNTARY is not set 355# CONFIG_PREEMPT_VOLUNTARY is not set
354CONFIG_PREEMPT=y 356CONFIG_PREEMPT=y
355CONFIG_GUSA=y 357CONFIG_GUSA=y
356# CONFIG_SPARSE_IRQ is not set 358# CONFIG_INTC_USERIMASK is not set
357 359
358# 360#
359# Boot options 361# Boot options
@@ -369,16 +371,15 @@ CONFIG_CMDLINE="mem=128M console=tty0 console=ttySC0,115200 ip=bootp root=/dev/n
369# Bus options 371# Bus options
370# 372#
371CONFIG_PCI=y 373CONFIG_PCI=y
374CONFIG_PCI_DOMAINS=y
372# CONFIG_PCIEPORTBUS is not set 375# CONFIG_PCIEPORTBUS is not set
373# CONFIG_ARCH_SUPPORTS_MSI is not set 376# CONFIG_ARCH_SUPPORTS_MSI is not set
374# CONFIG_PCI_LEGACY is not set
375CONFIG_PCI_DEBUG=y 377CONFIG_PCI_DEBUG=y
376# CONFIG_PCI_STUB is not set 378# CONFIG_PCI_STUB is not set
377# CONFIG_PCI_IOV is not set 379# CONFIG_PCI_IOV is not set
378CONFIG_PCCARD=y 380CONFIG_PCCARD=y
379CONFIG_PCMCIA=y 381CONFIG_PCMCIA=y
380CONFIG_PCMCIA_LOAD_CIS=y 382CONFIG_PCMCIA_LOAD_CIS=y
381CONFIG_PCMCIA_IOCTL=y
382CONFIG_CARDBUS=y 383CONFIG_CARDBUS=y
383 384
384# 385#
@@ -417,7 +418,6 @@ CONFIG_NET=y
417# Networking options 418# Networking options
418# 419#
419CONFIG_PACKET=y 420CONFIG_PACKET=y
420# CONFIG_PACKET_MMAP is not set
421CONFIG_UNIX=y 421CONFIG_UNIX=y
422CONFIG_XFRM=y 422CONFIG_XFRM=y
423# CONFIG_XFRM_USER is not set 423# CONFIG_XFRM_USER is not set
@@ -659,6 +659,7 @@ CONFIG_BLK_DEV_GENERIC=y
659# 659#
660# SCSI device support 660# SCSI device support
661# 661#
662CONFIG_SCSI_MOD=y
662# CONFIG_RAID_ATTRS is not set 663# CONFIG_RAID_ATTRS is not set
663CONFIG_SCSI=y 664CONFIG_SCSI=y
664CONFIG_SCSI_DMA=y 665CONFIG_SCSI_DMA=y
@@ -777,6 +778,7 @@ CONFIG_ATA_SFF=y
777# CONFIG_PATA_IT821X is not set 778# CONFIG_PATA_IT821X is not set
778# CONFIG_PATA_IT8213 is not set 779# CONFIG_PATA_IT8213 is not set
779# CONFIG_PATA_JMICRON is not set 780# CONFIG_PATA_JMICRON is not set
781# CONFIG_PATA_LEGACY is not set
780# CONFIG_PATA_TRIFLEX is not set 782# CONFIG_PATA_TRIFLEX is not set
781# CONFIG_PATA_MARVELL is not set 783# CONFIG_PATA_MARVELL is not set
782# CONFIG_PATA_MPIIX is not set 784# CONFIG_PATA_MPIIX is not set
@@ -824,7 +826,7 @@ CONFIG_BLK_DEV_DM=y
824# 826#
825 827
826# 828#
827# See the help texts for more information. 829# The newer stack is recommended.
828# 830#
829# CONFIG_FIREWIRE is not set 831# CONFIG_FIREWIRE is not set
830# CONFIG_IEEE1394 is not set 832# CONFIG_IEEE1394 is not set
@@ -890,6 +892,7 @@ CONFIG_WLAN=y
890# CONFIG_USB_PEGASUS is not set 892# CONFIG_USB_PEGASUS is not set
891# CONFIG_USB_RTL8150 is not set 893# CONFIG_USB_RTL8150 is not set
892# CONFIG_USB_USBNET is not set 894# CONFIG_USB_USBNET is not set
895# CONFIG_USB_IPHETH is not set
893# CONFIG_NET_PCMCIA is not set 896# CONFIG_NET_PCMCIA is not set
894# CONFIG_WAN is not set 897# CONFIG_WAN is not set
895# CONFIG_FDDI is not set 898# CONFIG_FDDI is not set
@@ -995,6 +998,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
995CONFIG_SERIAL_CORE=y 998CONFIG_SERIAL_CORE=y
996CONFIG_SERIAL_CORE_CONSOLE=y 999CONFIG_SERIAL_CORE_CONSOLE=y
997# CONFIG_SERIAL_JSM is not set 1000# CONFIG_SERIAL_JSM is not set
1001# CONFIG_SERIAL_TIMBERDALE is not set
998CONFIG_UNIX98_PTYS=y 1002CONFIG_UNIX98_PTYS=y
999# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 1003# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1000CONFIG_LEGACY_PTYS=y 1004CONFIG_LEGACY_PTYS=y
@@ -1057,6 +1061,7 @@ CONFIG_SSB_DRIVER_PCICORE=y
1057# CONFIG_MFD_SH_MOBILE_SDHI is not set 1061# CONFIG_MFD_SH_MOBILE_SDHI is not set
1058# CONFIG_HTC_PASIC3 is not set 1062# CONFIG_HTC_PASIC3 is not set
1059# CONFIG_MFD_TMIO is not set 1063# CONFIG_MFD_TMIO is not set
1064# CONFIG_LPC_SCH is not set
1060# CONFIG_REGULATOR is not set 1065# CONFIG_REGULATOR is not set
1061# CONFIG_MEDIA_SUPPORT is not set 1066# CONFIG_MEDIA_SUPPORT is not set
1062 1067
@@ -1064,6 +1069,7 @@ CONFIG_SSB_DRIVER_PCICORE=y
1064# Graphics support 1069# Graphics support
1065# 1070#
1066CONFIG_VGA_ARB=y 1071CONFIG_VGA_ARB=y
1072CONFIG_VGA_ARB_MAX_GPUS=16
1067# CONFIG_DRM is not set 1073# CONFIG_DRM is not set
1068# CONFIG_VGASTATE is not set 1074# CONFIG_VGASTATE is not set
1069# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1075# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1167,6 +1173,7 @@ CONFIG_USB_HID=y
1167# 1173#
1168# Special HID drivers 1174# Special HID drivers
1169# 1175#
1176# CONFIG_HID_3M_PCT is not set
1170CONFIG_HID_A4TECH=y 1177CONFIG_HID_A4TECH=y
1171CONFIG_HID_APPLE=y 1178CONFIG_HID_APPLE=y
1172CONFIG_HID_BELKIN=y 1179CONFIG_HID_BELKIN=y
@@ -1182,14 +1189,19 @@ CONFIG_HID_GYRATION=y
1182CONFIG_HID_LOGITECH=y 1189CONFIG_HID_LOGITECH=y
1183# CONFIG_LOGITECH_FF is not set 1190# CONFIG_LOGITECH_FF is not set
1184# CONFIG_LOGIRUMBLEPAD2_FF is not set 1191# CONFIG_LOGIRUMBLEPAD2_FF is not set
1192# CONFIG_LOGIG940_FF is not set
1185CONFIG_HID_MICROSOFT=y 1193CONFIG_HID_MICROSOFT=y
1194# CONFIG_HID_MOSART is not set
1186CONFIG_HID_MONTEREY=y 1195CONFIG_HID_MONTEREY=y
1187# CONFIG_HID_NTRIG is not set 1196# CONFIG_HID_NTRIG is not set
1197# CONFIG_HID_ORTEK is not set
1188CONFIG_HID_PANTHERLORD=y 1198CONFIG_HID_PANTHERLORD=y
1189# CONFIG_PANTHERLORD_FF is not set 1199# CONFIG_PANTHERLORD_FF is not set
1190CONFIG_HID_PETALYNX=y 1200CONFIG_HID_PETALYNX=y
1201# CONFIG_HID_QUANTA is not set
1191CONFIG_HID_SAMSUNG=y 1202CONFIG_HID_SAMSUNG=y
1192CONFIG_HID_SONY=y 1203CONFIG_HID_SONY=y
1204# CONFIG_HID_STANTUM is not set
1193CONFIG_HID_SUNPLUS=y 1205CONFIG_HID_SUNPLUS=y
1194# CONFIG_HID_GREENASIA is not set 1206# CONFIG_HID_GREENASIA is not set
1195# CONFIG_HID_SMARTJOYPLUS is not set 1207# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1288,7 +1300,6 @@ CONFIG_USB_STORAGE=y
1288# CONFIG_USB_RIO500 is not set 1300# CONFIG_USB_RIO500 is not set
1289# CONFIG_USB_LEGOTOWER is not set 1301# CONFIG_USB_LEGOTOWER is not set
1290# CONFIG_USB_LCD is not set 1302# CONFIG_USB_LCD is not set
1291# CONFIG_USB_BERRY_CHARGE is not set
1292# CONFIG_USB_LED is not set 1303# CONFIG_USB_LED is not set
1293# CONFIG_USB_CYPRESS_CY7C63 is not set 1304# CONFIG_USB_CYPRESS_CY7C63 is not set
1294# CONFIG_USB_CYTHERM is not set 1305# CONFIG_USB_CYTHERM is not set
@@ -1301,7 +1312,6 @@ CONFIG_USB_STORAGE=y
1301# CONFIG_USB_IOWARRIOR is not set 1312# CONFIG_USB_IOWARRIOR is not set
1302# CONFIG_USB_TEST is not set 1313# CONFIG_USB_TEST is not set
1303# CONFIG_USB_ISIGHTFW is not set 1314# CONFIG_USB_ISIGHTFW is not set
1304# CONFIG_USB_VST is not set
1305# CONFIG_USB_GADGET is not set 1315# CONFIG_USB_GADGET is not set
1306 1316
1307# 1317#
@@ -1317,10 +1327,6 @@ CONFIG_LEDS_CLASS=y
1317# 1327#
1318# LED drivers 1328# LED drivers
1319# 1329#
1320
1321#
1322# LED Triggers
1323#
1324# CONFIG_LEDS_TRIGGERS is not set 1330# CONFIG_LEDS_TRIGGERS is not set
1325# CONFIG_ACCESSIBILITY is not set 1331# CONFIG_ACCESSIBILITY is not set
1326# CONFIG_INFINIBAND is not set 1332# CONFIG_INFINIBAND is not set
@@ -1416,6 +1422,7 @@ CONFIG_MISC_FILESYSTEMS=y
1416# CONFIG_BEFS_FS is not set 1422# CONFIG_BEFS_FS is not set
1417# CONFIG_BFS_FS is not set 1423# CONFIG_BFS_FS is not set
1418# CONFIG_EFS_FS is not set 1424# CONFIG_EFS_FS is not set
1425# CONFIG_LOGFS is not set
1419# CONFIG_CRAMFS is not set 1426# CONFIG_CRAMFS is not set
1420# CONFIG_SQUASHFS is not set 1427# CONFIG_SQUASHFS is not set
1421# CONFIG_VXFS_FS is not set 1428# CONFIG_VXFS_FS is not set
@@ -1444,6 +1451,7 @@ CONFIG_SUNRPC=y
1444# CONFIG_RPCSEC_GSS_KRB5 is not set 1451# CONFIG_RPCSEC_GSS_KRB5 is not set
1445# CONFIG_RPCSEC_GSS_SPKM3 is not set 1452# CONFIG_RPCSEC_GSS_SPKM3 is not set
1446# CONFIG_SMB_FS is not set 1453# CONFIG_SMB_FS is not set
1454# CONFIG_CEPH_FS is not set
1447# CONFIG_CIFS is not set 1455# CONFIG_CIFS is not set
1448# CONFIG_NCP_FS is not set 1456# CONFIG_NCP_FS is not set
1449# CONFIG_CODA_FS is not set 1457# CONFIG_CODA_FS is not set
@@ -1523,6 +1531,7 @@ CONFIG_TIMER_STATS=y
1523# CONFIG_DEBUG_OBJECTS is not set 1531# CONFIG_DEBUG_OBJECTS is not set
1524# CONFIG_SLUB_DEBUG_ON is not set 1532# CONFIG_SLUB_DEBUG_ON is not set
1525# CONFIG_SLUB_STATS is not set 1533# CONFIG_SLUB_STATS is not set
1534# CONFIG_DEBUG_KMEMLEAK is not set
1526CONFIG_DEBUG_PREEMPT=y 1535CONFIG_DEBUG_PREEMPT=y
1527# CONFIG_DEBUG_RT_MUTEXES is not set 1536# CONFIG_DEBUG_RT_MUTEXES is not set
1528# CONFIG_RT_MUTEX_TESTER is not set 1537# CONFIG_RT_MUTEX_TESTER is not set
@@ -1571,6 +1580,7 @@ CONFIG_FTRACE=y
1571CONFIG_BRANCH_PROFILE_NONE=y 1580CONFIG_BRANCH_PROFILE_NONE=y
1572# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1581# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1573# CONFIG_PROFILE_ALL_BRANCHES is not set 1582# CONFIG_PROFILE_ALL_BRANCHES is not set
1583# CONFIG_KSYM_TRACER is not set
1574# CONFIG_STACK_TRACER is not set 1584# CONFIG_STACK_TRACER is not set
1575# CONFIG_KMEMTRACE is not set 1585# CONFIG_KMEMTRACE is not set
1576# CONFIG_WORKQUEUE_TRACER is not set 1586# CONFIG_WORKQUEUE_TRACER is not set
@@ -1690,6 +1700,7 @@ CONFIG_CRYPTO_DES=y
1690# CONFIG_CRYPTO_ANSI_CPRNG is not set 1700# CONFIG_CRYPTO_ANSI_CPRNG is not set
1691CONFIG_CRYPTO_HW=y 1701CONFIG_CRYPTO_HW=y
1692# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1702# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1703# CONFIG_VIRTUALIZATION is not set
1693# CONFIG_BINARY_PRINTF is not set 1704# CONFIG_BINARY_PRINTF is not set
1694 1705
1695# 1706#
diff --git a/arch/sh/configs/sdk7786_defconfig b/arch/sh/configs/sdk7786_defconfig
index 9b331eab968e..269824598520 100644
--- a/arch/sh/configs/sdk7786_defconfig
+++ b/arch/sh/configs/sdk7786_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc7 3# Linux kernel version: 2.6.34-rc5
4# Tue Feb 9 15:27:06 2010 4# Tue May 18 18:03:37 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -18,6 +18,8 @@ CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
22CONFIG_GENERIC_LOCKBREAK=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 23# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y 24CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y 25CONFIG_SYS_SUPPORTS_HUGETLBFS=y
@@ -35,6 +37,7 @@ CONFIG_ARCH_HAS_DEFAULT_IDLE=y
35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 37CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
36CONFIG_DMA_COHERENT=y 38CONFIG_DMA_COHERENT=y
37# CONFIG_DMA_NONCOHERENT is not set 39# CONFIG_DMA_NONCOHERENT is not set
40# CONFIG_NEED_DMA_MAP_STATE is not set
38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 41CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
39CONFIG_CONSTRUCTORS=y 42CONFIG_CONSTRUCTORS=y
40 43
@@ -42,7 +45,6 @@ CONFIG_CONSTRUCTORS=y
42# General setup 45# General setup
43# 46#
44CONFIG_EXPERIMENTAL=y 47CONFIG_EXPERIMENTAL=y
45CONFIG_BROKEN_ON_SMP=y
46CONFIG_LOCK_KERNEL=y 48CONFIG_LOCK_KERNEL=y
47CONFIG_INIT_ENV_ARG_LIMIT=32 49CONFIG_INIT_ENV_ARG_LIMIT=32
48CONFIG_LOCALVERSION="" 50CONFIG_LOCALVERSION=""
@@ -51,25 +53,27 @@ CONFIG_HAVE_KERNEL_GZIP=y
51CONFIG_HAVE_KERNEL_BZIP2=y 53CONFIG_HAVE_KERNEL_BZIP2=y
52CONFIG_HAVE_KERNEL_LZMA=y 54CONFIG_HAVE_KERNEL_LZMA=y
53CONFIG_HAVE_KERNEL_LZO=y 55CONFIG_HAVE_KERNEL_LZO=y
54CONFIG_KERNEL_GZIP=y 56# CONFIG_KERNEL_GZIP is not set
55# CONFIG_KERNEL_BZIP2 is not set 57# CONFIG_KERNEL_BZIP2 is not set
56# CONFIG_KERNEL_LZMA is not set 58# CONFIG_KERNEL_LZMA is not set
57# CONFIG_KERNEL_LZO is not set 59CONFIG_KERNEL_LZO=y
58CONFIG_SWAP=y 60CONFIG_SWAP=y
59CONFIG_SYSVIPC=y 61CONFIG_SYSVIPC=y
60CONFIG_SYSVIPC_SYSCTL=y 62CONFIG_SYSVIPC_SYSCTL=y
61CONFIG_POSIX_MQUEUE=y 63CONFIG_POSIX_MQUEUE=y
62CONFIG_POSIX_MQUEUE_SYSCTL=y 64CONFIG_POSIX_MQUEUE_SYSCTL=y
63CONFIG_BSD_PROCESS_ACCT=y 65CONFIG_BSD_PROCESS_ACCT=y
64# CONFIG_BSD_PROCESS_ACCT_V3 is not set 66CONFIG_BSD_PROCESS_ACCT_V3=y
65# CONFIG_TASKSTATS is not set 67# CONFIG_TASKSTATS is not set
66# CONFIG_AUDIT is not set 68CONFIG_AUDIT=y
69CONFIG_AUDITSYSCALL=y
70CONFIG_AUDIT_TREE=y
67 71
68# 72#
69# RCU Subsystem 73# RCU Subsystem
70# 74#
71CONFIG_TREE_RCU=y 75# CONFIG_TREE_RCU is not set
72# CONFIG_TREE_PREEMPT_RCU is not set 76CONFIG_TREE_PREEMPT_RCU=y
73# CONFIG_TINY_RCU is not set 77# CONFIG_TINY_RCU is not set
74CONFIG_RCU_TRACE=y 78CONFIG_RCU_TRACE=y
75CONFIG_RCU_FANOUT=32 79CONFIG_RCU_FANOUT=32
@@ -77,32 +81,36 @@ CONFIG_RCU_FANOUT=32
77CONFIG_TREE_RCU_TRACE=y 81CONFIG_TREE_RCU_TRACE=y
78CONFIG_IKCONFIG=y 82CONFIG_IKCONFIG=y
79CONFIG_IKCONFIG_PROC=y 83CONFIG_IKCONFIG_PROC=y
80CONFIG_LOG_BUF_SHIFT=14 84CONFIG_LOG_BUF_SHIFT=17
81CONFIG_GROUP_SCHED=y
82CONFIG_FAIR_GROUP_SCHED=y
83CONFIG_RT_GROUP_SCHED=y
84CONFIG_USER_SCHED=y
85# CONFIG_CGROUP_SCHED is not set
86CONFIG_CGROUPS=y 85CONFIG_CGROUPS=y
87# CONFIG_CGROUP_DEBUG is not set 86CONFIG_CGROUP_DEBUG=y
88CONFIG_CGROUP_NS=y 87CONFIG_CGROUP_NS=y
89CONFIG_CGROUP_FREEZER=y 88CONFIG_CGROUP_FREEZER=y
90CONFIG_CGROUP_DEVICE=y 89CONFIG_CGROUP_DEVICE=y
91# CONFIG_CPUSETS is not set 90CONFIG_CPUSETS=y
91# CONFIG_PROC_PID_CPUSET is not set
92CONFIG_CGROUP_CPUACCT=y 92CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y 93CONFIG_RESOURCE_COUNTERS=y
94CONFIG_CGROUP_MEM_RES_CTLR=y 94CONFIG_CGROUP_MEM_RES_CTLR=y
95# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set 95CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
96CONFIG_CGROUP_SCHED=y
97CONFIG_FAIR_GROUP_SCHED=y
98CONFIG_RT_GROUP_SCHED=y
96CONFIG_MM_OWNER=y 99CONFIG_MM_OWNER=y
97# CONFIG_SYSFS_DEPRECATED_V2 is not set 100# CONFIG_SYSFS_DEPRECATED_V2 is not set
98# CONFIG_RELAY is not set 101CONFIG_RELAY=y
99CONFIG_NAMESPACES=y 102CONFIG_NAMESPACES=y
100CONFIG_UTS_NS=y 103CONFIG_UTS_NS=y
101CONFIG_IPC_NS=y 104CONFIG_IPC_NS=y
102CONFIG_USER_NS=y 105CONFIG_USER_NS=y
103CONFIG_PID_NS=y 106CONFIG_PID_NS=y
104CONFIG_NET_NS=y 107CONFIG_NET_NS=y
105# CONFIG_BLK_DEV_INITRD is not set 108CONFIG_BLK_DEV_INITRD=y
109CONFIG_INITRAMFS_SOURCE=""
110CONFIG_RD_GZIP=y
111CONFIG_RD_BZIP2=y
112CONFIG_RD_LZMA=y
113CONFIG_RD_LZO=y
106CONFIG_CC_OPTIMIZE_FOR_SIZE=y 114CONFIG_CC_OPTIMIZE_FOR_SIZE=y
107CONFIG_SYSCTL=y 115CONFIG_SYSCTL=y
108CONFIG_ANON_INODES=y 116CONFIG_ANON_INODES=y
@@ -131,7 +139,6 @@ CONFIG_PERF_USE_VMALLOC=y
131# Kernel Performance Events And Counters 139# Kernel Performance Events And Counters
132# 140#
133CONFIG_PERF_EVENTS=y 141CONFIG_PERF_EVENTS=y
134CONFIG_EVENT_PROFILE=y
135# CONFIG_PERF_COUNTERS is not set 142# CONFIG_PERF_COUNTERS is not set
136# CONFIG_DEBUG_PERF_USE_VMALLOC is not set 143# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
137CONFIG_VM_EVENT_COUNTERS=y 144CONFIG_VM_EVENT_COUNTERS=y
@@ -142,13 +149,15 @@ CONFIG_SLAB=y
142# CONFIG_SLOB is not set 149# CONFIG_SLOB is not set
143CONFIG_PROFILING=y 150CONFIG_PROFILING=y
144CONFIG_TRACEPOINTS=y 151CONFIG_TRACEPOINTS=y
145# CONFIG_OPROFILE is not set 152CONFIG_OPROFILE=m
146CONFIG_HAVE_OPROFILE=y 153CONFIG_HAVE_OPROFILE=y
147# CONFIG_KPROBES is not set 154CONFIG_KPROBES=y
155CONFIG_KRETPROBES=y
148CONFIG_HAVE_KPROBES=y 156CONFIG_HAVE_KPROBES=y
149CONFIG_HAVE_KRETPROBES=y 157CONFIG_HAVE_KRETPROBES=y
150CONFIG_HAVE_ARCH_TRACEHOOK=y 158CONFIG_HAVE_ARCH_TRACEHOOK=y
151CONFIG_HAVE_DMA_ATTRS=y 159CONFIG_HAVE_DMA_ATTRS=y
160CONFIG_USE_GENERIC_SMP_HELPERS=y
152CONFIG_HAVE_CLK=y 161CONFIG_HAVE_CLK=y
153CONFIG_HAVE_DMA_API_DEBUG=y 162CONFIG_HAVE_DMA_API_DEBUG=y
154CONFIG_HAVE_HW_BREAKPOINT=y 163CONFIG_HAVE_HW_BREAKPOINT=y
@@ -157,7 +166,8 @@ CONFIG_HAVE_HW_BREAKPOINT=y
157# GCOV-based kernel profiling 166# GCOV-based kernel profiling
158# 167#
159# CONFIG_GCOV_KERNEL is not set 168# CONFIG_GCOV_KERNEL is not set
160# CONFIG_SLOW_WORK is not set 169CONFIG_SLOW_WORK=y
170CONFIG_SLOW_WORK_DEBUG=y
161CONFIG_HAVE_GENERIC_DMA_COHERENT=y 171CONFIG_HAVE_GENERIC_DMA_COHERENT=y
162CONFIG_SLABINFO=y 172CONFIG_SLABINFO=y
163CONFIG_RT_MUTEXES=y 173CONFIG_RT_MUTEXES=y
@@ -168,9 +178,10 @@ CONFIG_MODULE_UNLOAD=y
168# CONFIG_MODULE_FORCE_UNLOAD is not set 178# CONFIG_MODULE_FORCE_UNLOAD is not set
169# CONFIG_MODVERSIONS is not set 179# CONFIG_MODVERSIONS is not set
170# CONFIG_MODULE_SRCVERSION_ALL is not set 180# CONFIG_MODULE_SRCVERSION_ALL is not set
181CONFIG_STOP_MACHINE=y
171CONFIG_BLOCK=y 182CONFIG_BLOCK=y
172# CONFIG_LBDAF is not set 183CONFIG_LBDAF=y
173# CONFIG_BLK_DEV_BSG is not set 184CONFIG_BLK_DEV_BSG=y
174# CONFIG_BLK_DEV_INTEGRITY is not set 185# CONFIG_BLK_DEV_INTEGRITY is not set
175CONFIG_BLK_CGROUP=y 186CONFIG_BLK_CGROUP=y
176# CONFIG_DEBUG_BLK_CGROUP is not set 187# CONFIG_DEBUG_BLK_CGROUP is not set
@@ -215,7 +226,7 @@ CONFIG_DEFAULT_IOSCHED="cfq"
215# CONFIG_INLINE_WRITE_UNLOCK_BH is not set 226# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
216# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set 227# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
217# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set 228# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
218# CONFIG_MUTEX_SPIN_ON_OWNER is not set 229CONFIG_MUTEX_SPIN_ON_OWNER=y
219CONFIG_FREEZER=y 230CONFIG_FREEZER=y
220 231
221# 232#
@@ -267,16 +278,15 @@ CONFIG_QUICKLIST=y
267CONFIG_MMU=y 278CONFIG_MMU=y
268CONFIG_PAGE_OFFSET=0x80000000 279CONFIG_PAGE_OFFSET=0x80000000
269CONFIG_FORCE_MAX_ZONEORDER=11 280CONFIG_FORCE_MAX_ZONEORDER=11
270CONFIG_MEMORY_START=0x60000000 281CONFIG_MEMORY_START=0x40000000
271CONFIG_MEMORY_SIZE=0x20000000 282CONFIG_MEMORY_SIZE=0x20000000
272# CONFIG_29BIT is not set 283# CONFIG_29BIT is not set
273CONFIG_32BIT=y 284CONFIG_32BIT=y
274CONFIG_PMB=y 285CONFIG_PMB=y
275# CONFIG_PMB_LEGACY is not set
276CONFIG_X2TLB=y 286CONFIG_X2TLB=y
277CONFIG_VSYSCALL=y 287CONFIG_VSYSCALL=y
278# CONFIG_NUMA is not set 288CONFIG_NUMA=y
279CONFIG_ARCH_FLATMEM_ENABLE=y 289CONFIG_NODES_SHIFT=1
280CONFIG_ARCH_SPARSEMEM_ENABLE=y 290CONFIG_ARCH_SPARSEMEM_ENABLE=y
281CONFIG_ARCH_SPARSEMEM_DEFAULT=y 291CONFIG_ARCH_SPARSEMEM_DEFAULT=y
282CONFIG_MAX_ACTIVE_REGIONS=1 292CONFIG_MAX_ACTIVE_REGIONS=1
@@ -286,21 +296,23 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
286CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 296CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
287CONFIG_ARCH_MEMORY_PROBE=y 297CONFIG_ARCH_MEMORY_PROBE=y
288CONFIG_IOREMAP_FIXED=y 298CONFIG_IOREMAP_FIXED=y
299CONFIG_UNCACHED_MAPPING=y
289CONFIG_PAGE_SIZE_4KB=y 300CONFIG_PAGE_SIZE_4KB=y
290# CONFIG_PAGE_SIZE_8KB is not set 301# CONFIG_PAGE_SIZE_8KB is not set
291# CONFIG_PAGE_SIZE_16KB is not set 302# CONFIG_PAGE_SIZE_16KB is not set
292# CONFIG_PAGE_SIZE_64KB is not set 303# CONFIG_PAGE_SIZE_64KB is not set
293# CONFIG_HUGETLB_PAGE_SIZE_64K is not set 304# CONFIG_HUGETLB_PAGE_SIZE_64K is not set
294# CONFIG_HUGETLB_PAGE_SIZE_256K is not set 305# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
295CONFIG_HUGETLB_PAGE_SIZE_1MB=y 306# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
296# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set 307# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
297# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set 308CONFIG_HUGETLB_PAGE_SIZE_64MB=y
298# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set 309# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
299CONFIG_SELECT_MEMORY_MODEL=y 310CONFIG_SELECT_MEMORY_MODEL=y
300# CONFIG_FLATMEM_MANUAL is not set 311# CONFIG_FLATMEM_MANUAL is not set
301# CONFIG_DISCONTIGMEM_MANUAL is not set 312# CONFIG_DISCONTIGMEM_MANUAL is not set
302CONFIG_SPARSEMEM_MANUAL=y 313CONFIG_SPARSEMEM_MANUAL=y
303CONFIG_SPARSEMEM=y 314CONFIG_SPARSEMEM=y
315CONFIG_NEED_MULTIPLE_NODES=y
304CONFIG_HAVE_MEMORY_PRESENT=y 316CONFIG_HAVE_MEMORY_PRESENT=y
305CONFIG_SPARSEMEM_STATIC=y 317CONFIG_SPARSEMEM_STATIC=y
306CONFIG_MEMORY_HOTPLUG=y 318CONFIG_MEMORY_HOTPLUG=y
@@ -313,6 +325,7 @@ CONFIG_ZONE_DMA_FLAG=0
313CONFIG_NR_QUICK=1 325CONFIG_NR_QUICK=1
314CONFIG_KSM=y 326CONFIG_KSM=y
315CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 327CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
328CONFIG_SCHED_MC=y
316 329
317# 330#
318# Cache configuration 331# Cache configuration
@@ -328,6 +341,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y
328# CONFIG_CPU_BIG_ENDIAN is not set 341# CONFIG_CPU_BIG_ENDIAN is not set
329CONFIG_SH_FPU=y 342CONFIG_SH_FPU=y
330CONFIG_SH_STORE_QUEUES=y 343CONFIG_SH_STORE_QUEUES=y
344CONFIG_SPECULATIVE_EXECUTION=y
331CONFIG_CPU_HAS_INTEVT=y 345CONFIG_CPU_HAS_INTEVT=y
332CONFIG_CPU_HAS_SR_RB=y 346CONFIG_CPU_HAS_SR_RB=y
333CONFIG_CPU_HAS_PTEAEX=y 347CONFIG_CPU_HAS_PTEAEX=y
@@ -372,7 +386,10 @@ CONFIG_SH_CPU_FREQ=y
372# 386#
373# DMA support 387# DMA support
374# 388#
375# CONFIG_SH_DMA is not set 389CONFIG_SH_DMA=y
390# CONFIG_SH_DMA_API is not set
391CONFIG_NR_ONCHIP_DMA_CHANNELS=6
392# CONFIG_NR_DMA_CHANNELS_BOOL is not set
376 393
377# 394#
378# Companion Chips 395# Companion Chips
@@ -388,19 +405,21 @@ CONFIG_HEARTBEAT=y
388# Kernel features 405# Kernel features
389# 406#
390# CONFIG_HZ_100 is not set 407# CONFIG_HZ_100 is not set
391CONFIG_HZ_250=y 408# CONFIG_HZ_250 is not set
392# CONFIG_HZ_300 is not set 409# CONFIG_HZ_300 is not set
393# CONFIG_HZ_1000 is not set 410CONFIG_HZ_1000=y
394CONFIG_HZ=250 411CONFIG_HZ=1000
395CONFIG_SCHED_HRTICK=y 412CONFIG_SCHED_HRTICK=y
396CONFIG_KEXEC=y 413CONFIG_KEXEC=y
397# CONFIG_CRASH_DUMP is not set
398CONFIG_SECCOMP=y 414CONFIG_SECCOMP=y
399# CONFIG_SMP is not set 415CONFIG_SMP=y
416CONFIG_NR_CPUS=2
417CONFIG_HOTPLUG_CPU=y
400# CONFIG_PREEMPT_NONE is not set 418# CONFIG_PREEMPT_NONE is not set
401# CONFIG_PREEMPT_VOLUNTARY is not set 419# CONFIG_PREEMPT_VOLUNTARY is not set
402CONFIG_PREEMPT=y 420CONFIG_PREEMPT=y
403CONFIG_GUSA=y 421CONFIG_INTC_USERIMASK=y
422CONFIG_INTC_BALANCING=y
404 423
405# 424#
406# Boot options 425# Boot options
@@ -410,7 +429,7 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
410CONFIG_ENTRY_OFFSET=0x00001000 429CONFIG_ENTRY_OFFSET=0x00001000
411CONFIG_CMDLINE_OVERWRITE=y 430CONFIG_CMDLINE_OVERWRITE=y
412# CONFIG_CMDLINE_EXTEND is not set 431# CONFIG_CMDLINE_EXTEND is not set
413CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200 root=/dev/sda1 nmi_debug=state,debounce rootdelay=10" 432CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200 root=/dev/sda1 nmi_debug=state,debounce rootdelay=5 pmb=iomap ignore_loglevel"
414 433
415# 434#
416# Bus options 435# Bus options
@@ -424,8 +443,7 @@ CONFIG_PCIEAER_INJECT=y
424CONFIG_PCIEASPM=y 443CONFIG_PCIEASPM=y
425CONFIG_PCIEASPM_DEBUG=y 444CONFIG_PCIEASPM_DEBUG=y
426# CONFIG_ARCH_SUPPORTS_MSI is not set 445# CONFIG_ARCH_SUPPORTS_MSI is not set
427# CONFIG_PCI_LEGACY is not set 446# CONFIG_PCI_DEBUG is not set
428CONFIG_PCI_DEBUG=y
429# CONFIG_PCI_STUB is not set 447# CONFIG_PCI_STUB is not set
430# CONFIG_PCI_IOV is not set 448# CONFIG_PCI_IOV is not set
431# CONFIG_PCCARD is not set 449# CONFIG_PCCARD is not set
@@ -435,7 +453,7 @@ CONFIG_PCI_DEBUG=y
435# Executable file formats 453# Executable file formats
436# 454#
437CONFIG_BINFMT_ELF=y 455CONFIG_BINFMT_ELF=y
438# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 456CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
439# CONFIG_HAVE_AOUT is not set 457# CONFIG_HAVE_AOUT is not set
440CONFIG_BINFMT_MISC=y 458CONFIG_BINFMT_MISC=y
441 459
@@ -444,9 +462,11 @@ CONFIG_BINFMT_MISC=y
444# 462#
445CONFIG_PM=y 463CONFIG_PM=y
446CONFIG_PM_DEBUG=y 464CONFIG_PM_DEBUG=y
465# CONFIG_PM_ADVANCED_DEBUG is not set
447CONFIG_PM_VERBOSE=y 466CONFIG_PM_VERBOSE=y
448# CONFIG_HIBERNATION is not set 467# CONFIG_HIBERNATION is not set
449CONFIG_PM_RUNTIME=y 468CONFIG_PM_RUNTIME=y
469CONFIG_PM_OPS=y
450CONFIG_CPU_IDLE=y 470CONFIG_CPU_IDLE=y
451CONFIG_CPU_IDLE_GOV_LADDER=y 471CONFIG_CPU_IDLE_GOV_LADDER=y
452CONFIG_CPU_IDLE_GOV_MENU=y 472CONFIG_CPU_IDLE_GOV_MENU=y
@@ -456,7 +476,6 @@ CONFIG_NET=y
456# Networking options 476# Networking options
457# 477#
458CONFIG_PACKET=y 478CONFIG_PACKET=y
459CONFIG_PACKET_MMAP=y
460CONFIG_UNIX=y 479CONFIG_UNIX=y
461CONFIG_XFRM=y 480CONFIG_XFRM=y
462# CONFIG_XFRM_USER is not set 481# CONFIG_XFRM_USER is not set
@@ -520,19 +539,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
520# Network testing 539# Network testing
521# 540#
522# CONFIG_NET_PKTGEN is not set 541# CONFIG_NET_PKTGEN is not set
542# CONFIG_NET_TCPPROBE is not set
523# CONFIG_NET_DROP_MONITOR is not set 543# CONFIG_NET_DROP_MONITOR is not set
524# CONFIG_HAMRADIO is not set 544# CONFIG_HAMRADIO is not set
525# CONFIG_CAN is not set 545# CONFIG_CAN is not set
526# CONFIG_IRDA is not set 546# CONFIG_IRDA is not set
527# CONFIG_BT is not set 547# CONFIG_BT is not set
528# CONFIG_AF_RXRPC is not set 548# CONFIG_AF_RXRPC is not set
529CONFIG_WIRELESS=y 549# CONFIG_WIRELESS is not set
530# CONFIG_CFG80211 is not set
531# CONFIG_LIB80211 is not set
532
533#
534# CFG80211 needs to be enabled for MAC80211
535#
536# CONFIG_WIMAX is not set 550# CONFIG_WIMAX is not set
537# CONFIG_RFKILL is not set 551# CONFIG_RFKILL is not set
538# CONFIG_NET_9P is not set 552# CONFIG_NET_9P is not set
@@ -553,14 +567,118 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
553# CONFIG_DEBUG_DEVRES is not set 567# CONFIG_DEBUG_DEVRES is not set
554# CONFIG_SYS_HYPERVISOR is not set 568# CONFIG_SYS_HYPERVISOR is not set
555# CONFIG_CONNECTOR is not set 569# CONFIG_CONNECTOR is not set
556# CONFIG_MTD is not set 570CONFIG_MTD=y
571# CONFIG_MTD_DEBUG is not set
572# CONFIG_MTD_TESTS is not set
573# CONFIG_MTD_CONCAT is not set
574CONFIG_MTD_PARTITIONS=y
575# CONFIG_MTD_REDBOOT_PARTS is not set
576CONFIG_MTD_CMDLINE_PARTS=y
577# CONFIG_MTD_AR7_PARTS is not set
578
579#
580# User Modules And Translation Layers
581#
582# CONFIG_MTD_CHAR is not set
583CONFIG_MTD_BLKDEVS=y
584CONFIG_MTD_BLOCK=y
585CONFIG_FTL=y
586CONFIG_NFTL=y
587# CONFIG_NFTL_RW is not set
588# CONFIG_INFTL is not set
589# CONFIG_RFD_FTL is not set
590# CONFIG_SSFDC is not set
591CONFIG_MTD_OOPS=m
592
593#
594# RAM/ROM/Flash chip drivers
595#
596CONFIG_MTD_CFI=y
597CONFIG_MTD_JEDECPROBE=y
598CONFIG_MTD_GEN_PROBE=y
599# CONFIG_MTD_CFI_ADV_OPTIONS is not set
600CONFIG_MTD_MAP_BANK_WIDTH_1=y
601CONFIG_MTD_MAP_BANK_WIDTH_2=y
602CONFIG_MTD_MAP_BANK_WIDTH_4=y
603# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
604# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
605# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
606CONFIG_MTD_CFI_I1=y
607CONFIG_MTD_CFI_I2=y
608# CONFIG_MTD_CFI_I4 is not set
609# CONFIG_MTD_CFI_I8 is not set
610CONFIG_MTD_CFI_INTELEXT=m
611CONFIG_MTD_CFI_AMDSTD=m
612CONFIG_MTD_CFI_STAA=m
613CONFIG_MTD_CFI_UTIL=y
614CONFIG_MTD_RAM=y
615CONFIG_MTD_ROM=m
616CONFIG_MTD_ABSENT=m
617
618#
619# Mapping drivers for chip access
620#
621# CONFIG_MTD_COMPLEX_MAPPINGS is not set
622# CONFIG_MTD_PHYSMAP is not set
623# CONFIG_MTD_INTEL_VR_NOR is not set
624CONFIG_MTD_PLATRAM=y
625
626#
627# Self-contained MTD device drivers
628#
629# CONFIG_MTD_PMC551 is not set
630# CONFIG_MTD_DATAFLASH is not set
631# CONFIG_MTD_M25P80 is not set
632# CONFIG_MTD_SST25L is not set
633# CONFIG_MTD_SLRAM is not set
634CONFIG_MTD_PHRAM=y
635# CONFIG_MTD_MTDRAM is not set
636# CONFIG_MTD_BLOCK2MTD is not set
637
638#
639# Disk-On-Chip Device Drivers
640#
641# CONFIG_MTD_DOC2000 is not set
642# CONFIG_MTD_DOC2001 is not set
643# CONFIG_MTD_DOC2001PLUS is not set
644CONFIG_MTD_NAND=y
645# CONFIG_MTD_NAND_VERIFY_WRITE is not set
646# CONFIG_MTD_NAND_ECC_SMC is not set
647# CONFIG_MTD_NAND_MUSEUM_IDS is not set
648CONFIG_MTD_NAND_IDS=y
649# CONFIG_MTD_NAND_DISKONCHIP is not set
650# CONFIG_MTD_NAND_CAFE is not set
651# CONFIG_MTD_NAND_NANDSIM is not set
652CONFIG_MTD_NAND_PLATFORM=y
653# CONFIG_MTD_ALAUDA is not set
654CONFIG_MTD_NAND_SH_FLCTL=m
655# CONFIG_MTD_ONENAND is not set
656
657#
658# LPDDR flash memory drivers
659#
660# CONFIG_MTD_LPDDR is not set
661
662#
663# UBI - Unsorted block images
664#
665CONFIG_MTD_UBI=y
666CONFIG_MTD_UBI_WL_THRESHOLD=4096
667CONFIG_MTD_UBI_BEB_RESERVE=1
668CONFIG_MTD_UBI_GLUEBI=m
669
670#
671# UBI debugging options
672#
673# CONFIG_MTD_UBI_DEBUG is not set
557# CONFIG_PARPORT is not set 674# CONFIG_PARPORT is not set
558CONFIG_BLK_DEV=y 675CONFIG_BLK_DEV=y
559# CONFIG_BLK_CPQ_CISS_DA is not set 676# CONFIG_BLK_CPQ_CISS_DA is not set
560# CONFIG_BLK_DEV_DAC960 is not set 677# CONFIG_BLK_DEV_DAC960 is not set
561# CONFIG_BLK_DEV_UMEM is not set 678# CONFIG_BLK_DEV_UMEM is not set
562# CONFIG_BLK_DEV_COW_COMMON is not set 679# CONFIG_BLK_DEV_COW_COMMON is not set
563# CONFIG_BLK_DEV_LOOP is not set 680CONFIG_BLK_DEV_LOOP=y
681CONFIG_BLK_DEV_CRYPTOLOOP=y
564 682
565# 683#
566# DRBD disabled because PROC_FS, INET or CONNECTOR not selected 684# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
@@ -575,34 +693,63 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
575# CONFIG_CDROM_PKTCDVD is not set 693# CONFIG_CDROM_PKTCDVD is not set
576# CONFIG_ATA_OVER_ETH is not set 694# CONFIG_ATA_OVER_ETH is not set
577# CONFIG_BLK_DEV_HD is not set 695# CONFIG_BLK_DEV_HD is not set
578CONFIG_MISC_DEVICES=y 696# CONFIG_MISC_DEVICES is not set
579# CONFIG_AD525X_DPOT is not set
580# CONFIG_PHANTOM is not set
581# CONFIG_SGI_IOC4 is not set
582# CONFIG_TIFM_CORE is not set
583# CONFIG_ICS932S401 is not set
584# CONFIG_ENCLOSURE_SERVICES is not set
585# CONFIG_HP_ILO is not set
586# CONFIG_ISL29003 is not set
587# CONFIG_DS1682 is not set
588# CONFIG_TI_DAC7512 is not set
589# CONFIG_C2PORT is not set
590
591#
592# EEPROM support
593#
594# CONFIG_EEPROM_AT24 is not set
595# CONFIG_EEPROM_AT25 is not set
596# CONFIG_EEPROM_LEGACY is not set
597# CONFIG_EEPROM_MAX6875 is not set
598# CONFIG_EEPROM_93CX6 is not set
599# CONFIG_CB710_CORE is not set
600CONFIG_HAVE_IDE=y 697CONFIG_HAVE_IDE=y
601# CONFIG_IDE is not set 698CONFIG_IDE=y
699
700#
701# Please see Documentation/ide/ide.txt for help/info on IDE drives
702#
703CONFIG_IDE_ATAPI=y
704# CONFIG_BLK_DEV_IDE_SATA is not set
705CONFIG_IDE_GD=y
706CONFIG_IDE_GD_ATA=y
707# CONFIG_IDE_GD_ATAPI is not set
708CONFIG_BLK_DEV_IDECD=y
709CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
710# CONFIG_BLK_DEV_IDETAPE is not set
711# CONFIG_IDE_TASK_IOCTL is not set
712CONFIG_IDE_PROC_FS=y
713
714#
715# IDE chipset support/bugfixes
716#
717CONFIG_BLK_DEV_PLATFORM=y
718
719#
720# PCI IDE chipsets support
721#
722# CONFIG_BLK_DEV_GENERIC is not set
723# CONFIG_BLK_DEV_OPTI621 is not set
724# CONFIG_BLK_DEV_AEC62XX is not set
725# CONFIG_BLK_DEV_ALI15X3 is not set
726# CONFIG_BLK_DEV_AMD74XX is not set
727# CONFIG_BLK_DEV_CMD64X is not set
728# CONFIG_BLK_DEV_TRIFLEX is not set
729# CONFIG_BLK_DEV_CS5520 is not set
730# CONFIG_BLK_DEV_CS5530 is not set
731# CONFIG_BLK_DEV_HPT366 is not set
732# CONFIG_BLK_DEV_JMICRON is not set
733# CONFIG_BLK_DEV_SC1200 is not set
734# CONFIG_BLK_DEV_PIIX is not set
735# CONFIG_BLK_DEV_IT8172 is not set
736# CONFIG_BLK_DEV_IT8213 is not set
737# CONFIG_BLK_DEV_IT821X is not set
738# CONFIG_BLK_DEV_NS87415 is not set
739# CONFIG_BLK_DEV_PDC202XX_OLD is not set
740# CONFIG_BLK_DEV_PDC202XX_NEW is not set
741# CONFIG_BLK_DEV_SVWKS is not set
742# CONFIG_BLK_DEV_SIIMAGE is not set
743# CONFIG_BLK_DEV_SLC90E66 is not set
744# CONFIG_BLK_DEV_TRM290 is not set
745# CONFIG_BLK_DEV_VIA82CXXX is not set
746# CONFIG_BLK_DEV_TC86C001 is not set
747# CONFIG_BLK_DEV_IDEDMA is not set
602 748
603# 749#
604# SCSI device support 750# SCSI device support
605# 751#
752CONFIG_SCSI_MOD=y
606# CONFIG_RAID_ATTRS is not set 753# CONFIG_RAID_ATTRS is not set
607CONFIG_SCSI=y 754CONFIG_SCSI=y
608CONFIG_SCSI_DMA=y 755CONFIG_SCSI_DMA=y
@@ -616,11 +763,12 @@ CONFIG_SCSI_PROC_FS=y
616CONFIG_BLK_DEV_SD=y 763CONFIG_BLK_DEV_SD=y
617# CONFIG_CHR_DEV_ST is not set 764# CONFIG_CHR_DEV_ST is not set
618# CONFIG_CHR_DEV_OSST is not set 765# CONFIG_CHR_DEV_OSST is not set
619# CONFIG_BLK_DEV_SR is not set 766CONFIG_BLK_DEV_SR=y
767# CONFIG_BLK_DEV_SR_VENDOR is not set
620# CONFIG_CHR_DEV_SG is not set 768# CONFIG_CHR_DEV_SG is not set
621# CONFIG_CHR_DEV_SCH is not set 769# CONFIG_CHR_DEV_SCH is not set
622# CONFIG_SCSI_MULTI_LUN is not set 770CONFIG_SCSI_MULTI_LUN=y
623# CONFIG_SCSI_CONSTANTS is not set 771CONFIG_SCSI_CONSTANTS=y
624# CONFIG_SCSI_LOGGING is not set 772# CONFIG_SCSI_LOGGING is not set
625# CONFIG_SCSI_SCAN_ASYNC is not set 773# CONFIG_SCSI_SCAN_ASYNC is not set
626CONFIG_SCSI_WAIT_SCAN=m 774CONFIG_SCSI_WAIT_SCAN=m
@@ -631,52 +779,10 @@ CONFIG_SCSI_WAIT_SCAN=m
631# CONFIG_SCSI_SPI_ATTRS is not set 779# CONFIG_SCSI_SPI_ATTRS is not set
632# CONFIG_SCSI_FC_ATTRS is not set 780# CONFIG_SCSI_FC_ATTRS is not set
633# CONFIG_SCSI_ISCSI_ATTRS is not set 781# CONFIG_SCSI_ISCSI_ATTRS is not set
782# CONFIG_SCSI_SAS_ATTRS is not set
634# CONFIG_SCSI_SAS_LIBSAS is not set 783# CONFIG_SCSI_SAS_LIBSAS is not set
635# CONFIG_SCSI_SRP_ATTRS is not set 784# CONFIG_SCSI_SRP_ATTRS is not set
636CONFIG_SCSI_LOWLEVEL=y 785# CONFIG_SCSI_LOWLEVEL is not set
637# CONFIG_ISCSI_TCP is not set
638# CONFIG_SCSI_BNX2_ISCSI is not set
639# CONFIG_BE2ISCSI is not set
640# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
641# CONFIG_SCSI_HPSA is not set
642# CONFIG_SCSI_3W_9XXX is not set
643# CONFIG_SCSI_3W_SAS is not set
644# CONFIG_SCSI_ACARD is not set
645# CONFIG_SCSI_AACRAID is not set
646# CONFIG_SCSI_AIC7XXX is not set
647# CONFIG_SCSI_AIC7XXX_OLD is not set
648# CONFIG_SCSI_AIC79XX is not set
649# CONFIG_SCSI_AIC94XX is not set
650# CONFIG_SCSI_MVSAS is not set
651# CONFIG_SCSI_ARCMSR is not set
652# CONFIG_MEGARAID_NEWGEN is not set
653# CONFIG_MEGARAID_LEGACY is not set
654# CONFIG_MEGARAID_SAS is not set
655# CONFIG_SCSI_MPT2SAS is not set
656# CONFIG_SCSI_HPTIOP is not set
657# CONFIG_LIBFC is not set
658# CONFIG_LIBFCOE is not set
659# CONFIG_FCOE is not set
660# CONFIG_SCSI_DMX3191D is not set
661# CONFIG_SCSI_FUTURE_DOMAIN is not set
662# CONFIG_SCSI_IPS is not set
663# CONFIG_SCSI_INITIO is not set
664# CONFIG_SCSI_INIA100 is not set
665# CONFIG_SCSI_STEX is not set
666# CONFIG_SCSI_SYM53C8XX_2 is not set
667# CONFIG_SCSI_IPR is not set
668# CONFIG_SCSI_QLOGIC_1280 is not set
669# CONFIG_SCSI_QLA_FC is not set
670# CONFIG_SCSI_QLA_ISCSI is not set
671# CONFIG_SCSI_LPFC is not set
672# CONFIG_SCSI_DC395x is not set
673# CONFIG_SCSI_DC390T is not set
674# CONFIG_SCSI_NSP32 is not set
675# CONFIG_SCSI_DEBUG is not set
676# CONFIG_SCSI_PMCRAID is not set
677# CONFIG_SCSI_PM8001 is not set
678# CONFIG_SCSI_SRP is not set
679# CONFIG_SCSI_BFA_FC is not set
680# CONFIG_SCSI_DH is not set 786# CONFIG_SCSI_DH is not set
681# CONFIG_SCSI_OSD_INITIATOR is not set 787# CONFIG_SCSI_OSD_INITIATOR is not set
682CONFIG_ATA=y 788CONFIG_ATA=y
@@ -719,6 +825,7 @@ CONFIG_ATA_SFF=y
719# CONFIG_PATA_IT821X is not set 825# CONFIG_PATA_IT821X is not set
720# CONFIG_PATA_IT8213 is not set 826# CONFIG_PATA_IT8213 is not set
721# CONFIG_PATA_JMICRON is not set 827# CONFIG_PATA_JMICRON is not set
828# CONFIG_PATA_LEGACY is not set
722# CONFIG_PATA_TRIFLEX is not set 829# CONFIG_PATA_TRIFLEX is not set
723# CONFIG_PATA_MARVELL is not set 830# CONFIG_PATA_MARVELL is not set
724# CONFIG_PATA_MPIIX is not set 831# CONFIG_PATA_MPIIX is not set
@@ -743,7 +850,17 @@ CONFIG_ATA_SFF=y
743# CONFIG_PATA_WINBOND is not set 850# CONFIG_PATA_WINBOND is not set
744CONFIG_PATA_PLATFORM=y 851CONFIG_PATA_PLATFORM=y
745# CONFIG_PATA_SCH is not set 852# CONFIG_PATA_SCH is not set
746# CONFIG_MD is not set 853CONFIG_MD=y
854# CONFIG_BLK_DEV_MD is not set
855CONFIG_BLK_DEV_DM=y
856CONFIG_DM_DEBUG=y
857# CONFIG_DM_CRYPT is not set
858# CONFIG_DM_SNAPSHOT is not set
859# CONFIG_DM_MIRROR is not set
860# CONFIG_DM_ZERO is not set
861# CONFIG_DM_MULTIPATH is not set
862# CONFIG_DM_DELAY is not set
863CONFIG_DM_UEVENT=y
747# CONFIG_FUSION is not set 864# CONFIG_FUSION is not set
748 865
749# 866#
@@ -820,11 +937,7 @@ CONFIG_SMSC911X=y
820# CONFIG_NETDEV_1000 is not set 937# CONFIG_NETDEV_1000 is not set
821# CONFIG_NETDEV_10000 is not set 938# CONFIG_NETDEV_10000 is not set
822# CONFIG_TR is not set 939# CONFIG_TR is not set
823CONFIG_WLAN=y 940# CONFIG_WLAN is not set
824# CONFIG_ATMEL is not set
825# CONFIG_PRISM54 is not set
826# CONFIG_USB_ZD1201 is not set
827# CONFIG_HOSTAP is not set
828 941
829# 942#
830# Enable WiMAX (Networking options) to see the WiMAX drivers 943# Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -838,6 +951,7 @@ CONFIG_WLAN=y
838# CONFIG_USB_PEGASUS is not set 951# CONFIG_USB_PEGASUS is not set
839# CONFIG_USB_RTL8150 is not set 952# CONFIG_USB_RTL8150 is not set
840# CONFIG_USB_USBNET is not set 953# CONFIG_USB_USBNET is not set
954# CONFIG_USB_IPHETH is not set
841# CONFIG_WAN is not set 955# CONFIG_WAN is not set
842# CONFIG_FDDI is not set 956# CONFIG_FDDI is not set
843# CONFIG_HIPPI is not set 957# CONFIG_HIPPI is not set
@@ -923,7 +1037,7 @@ CONFIG_VT=y
923CONFIG_CONSOLE_TRANSLATIONS=y 1037CONFIG_CONSOLE_TRANSLATIONS=y
924CONFIG_VT_CONSOLE=y 1038CONFIG_VT_CONSOLE=y
925CONFIG_HW_CONSOLE=y 1039CONFIG_HW_CONSOLE=y
926# CONFIG_VT_HW_CONSOLE_BINDING is not set 1040CONFIG_VT_HW_CONSOLE_BINDING=y
927CONFIG_DEVKMEM=y 1041CONFIG_DEVKMEM=y
928# CONFIG_SERIAL_NONSTANDARD is not set 1042# CONFIG_SERIAL_NONSTANDARD is not set
929# CONFIG_NOZOMI is not set 1043# CONFIG_NOZOMI is not set
@@ -940,9 +1054,11 @@ CONFIG_DEVKMEM=y
940CONFIG_SERIAL_SH_SCI=y 1054CONFIG_SERIAL_SH_SCI=y
941CONFIG_SERIAL_SH_SCI_NR_UARTS=6 1055CONFIG_SERIAL_SH_SCI_NR_UARTS=6
942CONFIG_SERIAL_SH_SCI_CONSOLE=y 1056CONFIG_SERIAL_SH_SCI_CONSOLE=y
1057CONFIG_SERIAL_SH_SCI_DMA=y
943CONFIG_SERIAL_CORE=y 1058CONFIG_SERIAL_CORE=y
944CONFIG_SERIAL_CORE_CONSOLE=y 1059CONFIG_SERIAL_CORE_CONSOLE=y
945# CONFIG_SERIAL_JSM is not set 1060# CONFIG_SERIAL_JSM is not set
1061# CONFIG_SERIAL_TIMBERDALE is not set
946CONFIG_UNIX98_PTYS=y 1062CONFIG_UNIX98_PTYS=y
947# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 1063# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
948# CONFIG_LEGACY_PTYS is not set 1064# CONFIG_LEGACY_PTYS is not set
@@ -988,6 +1104,7 @@ CONFIG_I2C_HELPER_AUTO=y
988# CONFIG_I2C_OCORES is not set 1104# CONFIG_I2C_OCORES is not set
989# CONFIG_I2C_SH_MOBILE is not set 1105# CONFIG_I2C_SH_MOBILE is not set
990# CONFIG_I2C_SIMTEC is not set 1106# CONFIG_I2C_SIMTEC is not set
1107# CONFIG_I2C_XILINX is not set
991 1108
992# 1109#
993# External I2C/SMBus adapter drivers 1110# External I2C/SMBus adapter drivers
@@ -1001,15 +1118,9 @@ CONFIG_I2C_HELPER_AUTO=y
1001# 1118#
1002# CONFIG_I2C_PCA_PLATFORM is not set 1119# CONFIG_I2C_PCA_PLATFORM is not set
1003# CONFIG_I2C_STUB is not set 1120# CONFIG_I2C_STUB is not set
1004
1005#
1006# Miscellaneous I2C Chip support
1007#
1008# CONFIG_SENSORS_TSL2550 is not set
1009# CONFIG_I2C_DEBUG_CORE is not set 1121# CONFIG_I2C_DEBUG_CORE is not set
1010# CONFIG_I2C_DEBUG_ALGO is not set 1122# CONFIG_I2C_DEBUG_ALGO is not set
1011# CONFIG_I2C_DEBUG_BUS is not set 1123# CONFIG_I2C_DEBUG_BUS is not set
1012# CONFIG_I2C_DEBUG_CHIP is not set
1013CONFIG_SPI=y 1124CONFIG_SPI=y
1014# CONFIG_SPI_DEBUG is not set 1125# CONFIG_SPI_DEBUG is not set
1015CONFIG_SPI_MASTER=y 1126CONFIG_SPI_MASTER=y
@@ -1045,7 +1156,8 @@ CONFIG_WATCHDOG=y
1045# 1156#
1046# CONFIG_SOFT_WATCHDOG is not set 1157# CONFIG_SOFT_WATCHDOG is not set
1047# CONFIG_ALIM7101_WDT is not set 1158# CONFIG_ALIM7101_WDT is not set
1048# CONFIG_SH_WDT is not set 1159CONFIG_SH_WDT=y
1160# CONFIG_SH_WDT_MMAP is not set
1049 1161
1050# 1162#
1051# PCI-based Watchdog Cards 1163# PCI-based Watchdog Cards
@@ -1068,6 +1180,7 @@ CONFIG_SSB_POSSIBLE=y
1068# Multifunction device drivers 1180# Multifunction device drivers
1069# 1181#
1070# CONFIG_MFD_CORE is not set 1182# CONFIG_MFD_CORE is not set
1183# CONFIG_MFD_88PM860X is not set
1071# CONFIG_MFD_SM501 is not set 1184# CONFIG_MFD_SM501 is not set
1072# CONFIG_MFD_SH_MOBILE_SDHI is not set 1185# CONFIG_MFD_SH_MOBILE_SDHI is not set
1073# CONFIG_HTC_PASIC3 is not set 1186# CONFIG_HTC_PASIC3 is not set
@@ -1075,15 +1188,17 @@ CONFIG_SSB_POSSIBLE=y
1075# CONFIG_MFD_TMIO is not set 1188# CONFIG_MFD_TMIO is not set
1076# CONFIG_PMIC_DA903X is not set 1189# CONFIG_PMIC_DA903X is not set
1077# CONFIG_PMIC_ADP5520 is not set 1190# CONFIG_PMIC_ADP5520 is not set
1191# CONFIG_MFD_MAX8925 is not set
1078# CONFIG_MFD_WM8400 is not set 1192# CONFIG_MFD_WM8400 is not set
1079# CONFIG_MFD_WM831X is not set 1193# CONFIG_MFD_WM831X is not set
1080# CONFIG_MFD_WM8350_I2C is not set 1194# CONFIG_MFD_WM8350_I2C is not set
1195# CONFIG_MFD_WM8994 is not set
1081# CONFIG_MFD_PCF50633 is not set 1196# CONFIG_MFD_PCF50633 is not set
1082# CONFIG_MFD_MC13783 is not set 1197# CONFIG_MFD_MC13783 is not set
1083# CONFIG_AB3100_CORE is not set 1198# CONFIG_AB3100_CORE is not set
1084# CONFIG_EZX_PCAP is not set 1199# CONFIG_EZX_PCAP is not set
1085# CONFIG_MFD_88PM8607 is not set
1086# CONFIG_AB4500_CORE is not set 1200# CONFIG_AB4500_CORE is not set
1201# CONFIG_LPC_SCH is not set
1087# CONFIG_REGULATOR is not set 1202# CONFIG_REGULATOR is not set
1088# CONFIG_MEDIA_SUPPORT is not set 1203# CONFIG_MEDIA_SUPPORT is not set
1089 1204
@@ -1091,6 +1206,7 @@ CONFIG_SSB_POSSIBLE=y
1091# Graphics support 1206# Graphics support
1092# 1207#
1093CONFIG_VGA_ARB=y 1208CONFIG_VGA_ARB=y
1209CONFIG_VGA_ARB_MAX_GPUS=16
1094# CONFIG_DRM is not set 1210# CONFIG_DRM is not set
1095# CONFIG_VGASTATE is not set 1211# CONFIG_VGASTATE is not set
1096CONFIG_VIDEO_OUTPUT_CONTROL=m 1212CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1121,6 +1237,7 @@ CONFIG_USB_HID=y
1121# 1237#
1122# Special HID drivers 1238# Special HID drivers
1123# 1239#
1240# CONFIG_HID_3M_PCT is not set
1124# CONFIG_HID_A4TECH is not set 1241# CONFIG_HID_A4TECH is not set
1125# CONFIG_HID_APPLE is not set 1242# CONFIG_HID_APPLE is not set
1126# CONFIG_HID_BELKIN is not set 1243# CONFIG_HID_BELKIN is not set
@@ -1135,12 +1252,16 @@ CONFIG_USB_HID=y
1135# CONFIG_HID_KENSINGTON is not set 1252# CONFIG_HID_KENSINGTON is not set
1136# CONFIG_HID_LOGITECH is not set 1253# CONFIG_HID_LOGITECH is not set
1137# CONFIG_HID_MICROSOFT is not set 1254# CONFIG_HID_MICROSOFT is not set
1255# CONFIG_HID_MOSART is not set
1138# CONFIG_HID_MONTEREY is not set 1256# CONFIG_HID_MONTEREY is not set
1139# CONFIG_HID_NTRIG is not set 1257# CONFIG_HID_NTRIG is not set
1258# CONFIG_HID_ORTEK is not set
1140# CONFIG_HID_PANTHERLORD is not set 1259# CONFIG_HID_PANTHERLORD is not set
1141# CONFIG_HID_PETALYNX is not set 1260# CONFIG_HID_PETALYNX is not set
1261# CONFIG_HID_QUANTA is not set
1142# CONFIG_HID_SAMSUNG is not set 1262# CONFIG_HID_SAMSUNG is not set
1143# CONFIG_HID_SONY is not set 1263# CONFIG_HID_SONY is not set
1264# CONFIG_HID_STANTUM is not set
1144# CONFIG_HID_SUNPLUS is not set 1265# CONFIG_HID_SUNPLUS is not set
1145# CONFIG_HID_GREENASIA is not set 1266# CONFIG_HID_GREENASIA is not set
1146# CONFIG_HID_SMARTJOYPLUS is not set 1267# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1241,7 +1362,6 @@ CONFIG_USB_STORAGE=y
1241# CONFIG_USB_RIO500 is not set 1362# CONFIG_USB_RIO500 is not set
1242# CONFIG_USB_LEGOTOWER is not set 1363# CONFIG_USB_LEGOTOWER is not set
1243# CONFIG_USB_LCD is not set 1364# CONFIG_USB_LCD is not set
1244# CONFIG_USB_BERRY_CHARGE is not set
1245# CONFIG_USB_LED is not set 1365# CONFIG_USB_LED is not set
1246# CONFIG_USB_CYPRESS_CY7C63 is not set 1366# CONFIG_USB_CYPRESS_CY7C63 is not set
1247# CONFIG_USB_CYTHERM is not set 1367# CONFIG_USB_CYTHERM is not set
@@ -1253,7 +1373,6 @@ CONFIG_USB_STORAGE=y
1253# CONFIG_USB_IOWARRIOR is not set 1373# CONFIG_USB_IOWARRIOR is not set
1254# CONFIG_USB_TEST is not set 1374# CONFIG_USB_TEST is not set
1255# CONFIG_USB_ISIGHTFW is not set 1375# CONFIG_USB_ISIGHTFW is not set
1256# CONFIG_USB_VST is not set
1257CONFIG_USB_GADGET=y 1376CONFIG_USB_GADGET=y
1258# CONFIG_USB_GADGET_DEBUG is not set 1377# CONFIG_USB_GADGET_DEBUG is not set
1259# CONFIG_USB_GADGET_DEBUG_FILES is not set 1378# CONFIG_USB_GADGET_DEBUG_FILES is not set
@@ -1291,6 +1410,7 @@ CONFIG_USB_GADGET_DUALSPEED=y
1291# CONFIG_USB_MIDI_GADGET is not set 1410# CONFIG_USB_MIDI_GADGET is not set
1292# CONFIG_USB_G_PRINTER is not set 1411# CONFIG_USB_G_PRINTER is not set
1293# CONFIG_USB_CDC_COMPOSITE is not set 1412# CONFIG_USB_CDC_COMPOSITE is not set
1413# CONFIG_USB_G_NOKIA is not set
1294# CONFIG_USB_G_MULTI is not set 1414# CONFIG_USB_G_MULTI is not set
1295 1415
1296# 1416#
@@ -1370,43 +1490,102 @@ CONFIG_RTC_DRV_MAX6900=y
1370# 1490#
1371CONFIG_RTC_DRV_SH=y 1491CONFIG_RTC_DRV_SH=y
1372# CONFIG_RTC_DRV_GENERIC is not set 1492# CONFIG_RTC_DRV_GENERIC is not set
1373# CONFIG_DMADEVICES is not set 1493CONFIG_DMADEVICES=y
1494# CONFIG_DMADEVICES_DEBUG is not set
1495
1496#
1497# DMA Devices
1498#
1499CONFIG_SH_DMAE=y
1500CONFIG_DMA_ENGINE=y
1501
1502#
1503# DMA Clients
1504#
1505# CONFIG_NET_DMA is not set
1506# CONFIG_ASYNC_TX_DMA is not set
1507# CONFIG_DMATEST is not set
1374# CONFIG_AUXDISPLAY is not set 1508# CONFIG_AUXDISPLAY is not set
1375CONFIG_UIO=m 1509CONFIG_UIO=m
1376# CONFIG_UIO_CIF is not set 1510# CONFIG_UIO_CIF is not set
1377# CONFIG_UIO_PDRV is not set 1511CONFIG_UIO_PDRV=m
1378# CONFIG_UIO_PDRV_GENIRQ is not set 1512CONFIG_UIO_PDRV_GENIRQ=m
1379# CONFIG_UIO_SMX is not set
1380# CONFIG_UIO_AEC is not set 1513# CONFIG_UIO_AEC is not set
1381# CONFIG_UIO_SERCOS3 is not set 1514# CONFIG_UIO_SERCOS3 is not set
1382# CONFIG_UIO_PCI_GENERIC is not set 1515CONFIG_UIO_PCI_GENERIC=m
1516# CONFIG_UIO_NETX is not set
1383 1517
1384# 1518#
1385# TI VLYNQ 1519# TI VLYNQ
1386# 1520#
1387# CONFIG_STAGING is not set 1521CONFIG_STAGING=y
1522# CONFIG_STAGING_EXCLUDE_BUILD is not set
1523# CONFIG_USB_IP_COMMON is not set
1524# CONFIG_ECHO is not set
1525# CONFIG_POCH is not set
1526# CONFIG_COMEDI is not set
1527# CONFIG_ASUS_OLED is not set
1528# CONFIG_TRANZPORT is not set
1529
1530#
1531# Qualcomm MSM Camera And Video
1532#
1533
1534#
1535# Camera Sensor Selection
1536#
1537# CONFIG_INPUT_GPIO is not set
1538# CONFIG_POHMELFS is not set
1539# CONFIG_IDE_PHISON is not set
1540# CONFIG_VME_BUS is not set
1541
1542#
1543# RAR Register Driver
1544#
1545# CONFIG_RAR_REGISTER is not set
1546# CONFIG_IIO is not set
1547CONFIG_RAMZSWAP=m
1548CONFIG_RAMZSWAP_STATS=y
1549# CONFIG_BATMAN_ADV is not set
1550# CONFIG_STRIP is not set
1551# CONFIG_DT3155 is not set
1552# CONFIG_CRYSTALHD is not set
1388 1553
1389# 1554#
1390# File systems 1555# File systems
1391# 1556#
1392CONFIG_EXT2_FS=y 1557CONFIG_EXT2_FS=y
1393# CONFIG_EXT2_FS_XATTR is not set 1558CONFIG_EXT2_FS_XATTR=y
1559# CONFIG_EXT2_FS_POSIX_ACL is not set
1560# CONFIG_EXT2_FS_SECURITY is not set
1394# CONFIG_EXT2_FS_XIP is not set 1561# CONFIG_EXT2_FS_XIP is not set
1395CONFIG_EXT3_FS=y 1562CONFIG_EXT3_FS=y
1396# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 1563# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1397CONFIG_EXT3_FS_XATTR=y 1564CONFIG_EXT3_FS_XATTR=y
1398# CONFIG_EXT3_FS_POSIX_ACL is not set 1565# CONFIG_EXT3_FS_POSIX_ACL is not set
1399# CONFIG_EXT3_FS_SECURITY is not set 1566# CONFIG_EXT3_FS_SECURITY is not set
1400# CONFIG_EXT4_FS is not set 1567CONFIG_EXT4_FS=y
1568CONFIG_EXT4_FS_XATTR=y
1569# CONFIG_EXT4_FS_POSIX_ACL is not set
1570# CONFIG_EXT4_FS_SECURITY is not set
1571# CONFIG_EXT4_DEBUG is not set
1401CONFIG_JBD=y 1572CONFIG_JBD=y
1402# CONFIG_JBD_DEBUG is not set 1573# CONFIG_JBD_DEBUG is not set
1574CONFIG_JBD2=y
1575# CONFIG_JBD2_DEBUG is not set
1403CONFIG_FS_MBCACHE=y 1576CONFIG_FS_MBCACHE=y
1404# CONFIG_REISERFS_FS is not set 1577# CONFIG_REISERFS_FS is not set
1405# CONFIG_JFS_FS is not set 1578# CONFIG_JFS_FS is not set
1406# CONFIG_FS_POSIX_ACL is not set 1579CONFIG_FS_POSIX_ACL=y
1407# CONFIG_XFS_FS is not set 1580CONFIG_XFS_FS=y
1581# CONFIG_XFS_QUOTA is not set
1582# CONFIG_XFS_POSIX_ACL is not set
1583# CONFIG_XFS_RT is not set
1584# CONFIG_XFS_DEBUG is not set
1585# CONFIG_GFS2_FS is not set
1408# CONFIG_OCFS2_FS is not set 1586# CONFIG_OCFS2_FS is not set
1409# CONFIG_BTRFS_FS is not set 1587CONFIG_BTRFS_FS=y
1588# CONFIG_BTRFS_FS_POSIX_ACL is not set
1410# CONFIG_NILFS2_FS is not set 1589# CONFIG_NILFS2_FS is not set
1411CONFIG_FILE_LOCKING=y 1590CONFIG_FILE_LOCKING=y
1412CONFIG_FSNOTIFY=y 1591CONFIG_FSNOTIFY=y
@@ -1415,19 +1594,30 @@ CONFIG_INOTIFY=y
1415CONFIG_INOTIFY_USER=y 1594CONFIG_INOTIFY_USER=y
1416# CONFIG_QUOTA is not set 1595# CONFIG_QUOTA is not set
1417# CONFIG_AUTOFS_FS is not set 1596# CONFIG_AUTOFS_FS is not set
1418# CONFIG_AUTOFS4_FS is not set 1597CONFIG_AUTOFS4_FS=m
1419# CONFIG_FUSE_FS is not set 1598CONFIG_FUSE_FS=y
1599CONFIG_CUSE=m
1420 1600
1421# 1601#
1422# Caches 1602# Caches
1423# 1603#
1424# CONFIG_FSCACHE is not set 1604CONFIG_FSCACHE=m
1605# CONFIG_FSCACHE_STATS is not set
1606# CONFIG_FSCACHE_HISTOGRAM is not set
1607# CONFIG_FSCACHE_DEBUG is not set
1608# CONFIG_FSCACHE_OBJECT_LIST is not set
1609CONFIG_CACHEFILES=m
1610# CONFIG_CACHEFILES_DEBUG is not set
1611# CONFIG_CACHEFILES_HISTOGRAM is not set
1425 1612
1426# 1613#
1427# CD-ROM/DVD Filesystems 1614# CD-ROM/DVD Filesystems
1428# 1615#
1429# CONFIG_ISO9660_FS is not set 1616CONFIG_ISO9660_FS=m
1430# CONFIG_UDF_FS is not set 1617CONFIG_JOLIET=y
1618CONFIG_ZISOFS=y
1619CONFIG_UDF_FS=m
1620CONFIG_UDF_NLS=y
1431 1621
1432# 1622#
1433# DOS/FAT/NT Filesystems 1623# DOS/FAT/NT Filesystems
@@ -1448,7 +1638,7 @@ CONFIG_TMPFS=y
1448# CONFIG_TMPFS_POSIX_ACL is not set 1638# CONFIG_TMPFS_POSIX_ACL is not set
1449CONFIG_HUGETLBFS=y 1639CONFIG_HUGETLBFS=y
1450CONFIG_HUGETLB_PAGE=y 1640CONFIG_HUGETLB_PAGE=y
1451# CONFIG_CONFIGFS_FS is not set 1641CONFIG_CONFIGFS_FS=y
1452CONFIG_MISC_FILESYSTEMS=y 1642CONFIG_MISC_FILESYSTEMS=y
1453# CONFIG_ADFS_FS is not set 1643# CONFIG_ADFS_FS is not set
1454# CONFIG_AFFS_FS is not set 1644# CONFIG_AFFS_FS is not set
@@ -1457,30 +1647,60 @@ CONFIG_MISC_FILESYSTEMS=y
1457# CONFIG_BEFS_FS is not set 1647# CONFIG_BEFS_FS is not set
1458# CONFIG_BFS_FS is not set 1648# CONFIG_BFS_FS is not set
1459# CONFIG_EFS_FS is not set 1649# CONFIG_EFS_FS is not set
1460# CONFIG_CRAMFS is not set 1650CONFIG_JFFS2_FS=m
1461# CONFIG_SQUASHFS is not set 1651CONFIG_JFFS2_FS_DEBUG=0
1652CONFIG_JFFS2_FS_WRITEBUFFER=y
1653# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1654# CONFIG_JFFS2_SUMMARY is not set
1655CONFIG_JFFS2_FS_XATTR=y
1656CONFIG_JFFS2_FS_POSIX_ACL=y
1657CONFIG_JFFS2_FS_SECURITY=y
1658# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1659CONFIG_JFFS2_ZLIB=y
1660# CONFIG_JFFS2_LZO is not set
1661CONFIG_JFFS2_RTIME=y
1662# CONFIG_JFFS2_RUBIN is not set
1663CONFIG_UBIFS_FS=m
1664# CONFIG_UBIFS_FS_XATTR is not set
1665# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
1666CONFIG_UBIFS_FS_LZO=y
1667CONFIG_UBIFS_FS_ZLIB=y
1668# CONFIG_UBIFS_FS_DEBUG is not set
1669CONFIG_LOGFS=m
1670CONFIG_CRAMFS=m
1671CONFIG_SQUASHFS=m
1672# CONFIG_SQUASHFS_EMBEDDED is not set
1673CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
1462# CONFIG_VXFS_FS is not set 1674# CONFIG_VXFS_FS is not set
1463# CONFIG_MINIX_FS is not set 1675# CONFIG_MINIX_FS is not set
1464# CONFIG_OMFS_FS is not set 1676# CONFIG_OMFS_FS is not set
1465# CONFIG_HPFS_FS is not set 1677# CONFIG_HPFS_FS is not set
1466# CONFIG_QNX4FS_FS is not set 1678# CONFIG_QNX4FS_FS is not set
1467# CONFIG_ROMFS_FS is not set 1679CONFIG_ROMFS_FS=m
1680CONFIG_ROMFS_BACKED_BY_BLOCK=y
1681# CONFIG_ROMFS_BACKED_BY_MTD is not set
1682# CONFIG_ROMFS_BACKED_BY_BOTH is not set
1683CONFIG_ROMFS_ON_BLOCK=y
1468# CONFIG_SYSV_FS is not set 1684# CONFIG_SYSV_FS is not set
1469# CONFIG_UFS_FS is not set 1685# CONFIG_UFS_FS is not set
1470CONFIG_NETWORK_FILESYSTEMS=y 1686CONFIG_NETWORK_FILESYSTEMS=y
1471CONFIG_NFS_FS=y 1687CONFIG_NFS_FS=y
1472CONFIG_NFS_V3=y 1688CONFIG_NFS_V3=y
1473# CONFIG_NFS_V3_ACL is not set 1689# CONFIG_NFS_V3_ACL is not set
1474# CONFIG_NFS_V4 is not set 1690CONFIG_NFS_V4=y
1691# CONFIG_NFS_V4_1 is not set
1475CONFIG_ROOT_NFS=y 1692CONFIG_ROOT_NFS=y
1476# CONFIG_NFSD is not set 1693# CONFIG_NFSD is not set
1477CONFIG_LOCKD=y 1694CONFIG_LOCKD=y
1478CONFIG_LOCKD_V4=y 1695CONFIG_LOCKD_V4=y
1696CONFIG_EXPORTFS=y
1479CONFIG_NFS_COMMON=y 1697CONFIG_NFS_COMMON=y
1480CONFIG_SUNRPC=y 1698CONFIG_SUNRPC=y
1481# CONFIG_RPCSEC_GSS_KRB5 is not set 1699CONFIG_SUNRPC_GSS=y
1700CONFIG_RPCSEC_GSS_KRB5=y
1482# CONFIG_RPCSEC_GSS_SPKM3 is not set 1701# CONFIG_RPCSEC_GSS_SPKM3 is not set
1483# CONFIG_SMB_FS is not set 1702# CONFIG_SMB_FS is not set
1703# CONFIG_CEPH_FS is not set
1484# CONFIG_CIFS is not set 1704# CONFIG_CIFS is not set
1485# CONFIG_NCP_FS is not set 1705# CONFIG_NCP_FS is not set
1486# CONFIG_CODA_FS is not set 1706# CONFIG_CODA_FS is not set
@@ -1493,7 +1713,7 @@ CONFIG_SUNRPC=y
1493CONFIG_MSDOS_PARTITION=y 1713CONFIG_MSDOS_PARTITION=y
1494CONFIG_NLS=y 1714CONFIG_NLS=y
1495CONFIG_NLS_DEFAULT="iso8859-1" 1715CONFIG_NLS_DEFAULT="iso8859-1"
1496# CONFIG_NLS_CODEPAGE_437 is not set 1716CONFIG_NLS_CODEPAGE_437=y
1497# CONFIG_NLS_CODEPAGE_737 is not set 1717# CONFIG_NLS_CODEPAGE_737 is not set
1498# CONFIG_NLS_CODEPAGE_775 is not set 1718# CONFIG_NLS_CODEPAGE_775 is not set
1499# CONFIG_NLS_CODEPAGE_850 is not set 1719# CONFIG_NLS_CODEPAGE_850 is not set
@@ -1508,16 +1728,16 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1508# CONFIG_NLS_CODEPAGE_865 is not set 1728# CONFIG_NLS_CODEPAGE_865 is not set
1509# CONFIG_NLS_CODEPAGE_866 is not set 1729# CONFIG_NLS_CODEPAGE_866 is not set
1510# CONFIG_NLS_CODEPAGE_869 is not set 1730# CONFIG_NLS_CODEPAGE_869 is not set
1511# CONFIG_NLS_CODEPAGE_936 is not set 1731CONFIG_NLS_CODEPAGE_936=m
1512# CONFIG_NLS_CODEPAGE_950 is not set 1732CONFIG_NLS_CODEPAGE_950=m
1513# CONFIG_NLS_CODEPAGE_932 is not set 1733CONFIG_NLS_CODEPAGE_932=y
1514# CONFIG_NLS_CODEPAGE_949 is not set 1734CONFIG_NLS_CODEPAGE_949=m
1515# CONFIG_NLS_CODEPAGE_874 is not set 1735# CONFIG_NLS_CODEPAGE_874 is not set
1516# CONFIG_NLS_ISO8859_8 is not set 1736# CONFIG_NLS_ISO8859_8 is not set
1517# CONFIG_NLS_CODEPAGE_1250 is not set 1737# CONFIG_NLS_CODEPAGE_1250 is not set
1518# CONFIG_NLS_CODEPAGE_1251 is not set 1738# CONFIG_NLS_CODEPAGE_1251 is not set
1519# CONFIG_NLS_ASCII is not set 1739CONFIG_NLS_ASCII=m
1520# CONFIG_NLS_ISO8859_1 is not set 1740CONFIG_NLS_ISO8859_1=y
1521# CONFIG_NLS_ISO8859_2 is not set 1741# CONFIG_NLS_ISO8859_2 is not set
1522# CONFIG_NLS_ISO8859_3 is not set 1742# CONFIG_NLS_ISO8859_3 is not set
1523# CONFIG_NLS_ISO8859_4 is not set 1743# CONFIG_NLS_ISO8859_4 is not set
@@ -1527,10 +1747,10 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1527# CONFIG_NLS_ISO8859_9 is not set 1747# CONFIG_NLS_ISO8859_9 is not set
1528# CONFIG_NLS_ISO8859_13 is not set 1748# CONFIG_NLS_ISO8859_13 is not set
1529# CONFIG_NLS_ISO8859_14 is not set 1749# CONFIG_NLS_ISO8859_14 is not set
1530# CONFIG_NLS_ISO8859_15 is not set 1750CONFIG_NLS_ISO8859_15=m
1531# CONFIG_NLS_KOI8_R is not set 1751# CONFIG_NLS_KOI8_R is not set
1532# CONFIG_NLS_KOI8_U is not set 1752# CONFIG_NLS_KOI8_U is not set
1533# CONFIG_NLS_UTF8 is not set 1753CONFIG_NLS_UTF8=m
1534# CONFIG_DLM is not set 1754# CONFIG_DLM is not set
1535 1755
1536# 1756#
@@ -1538,7 +1758,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1538# 1758#
1539CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1759CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1540CONFIG_PRINTK_TIME=y 1760CONFIG_PRINTK_TIME=y
1541CONFIG_ENABLE_WARN_DEPRECATED=y 1761# CONFIG_ENABLE_WARN_DEPRECATED is not set
1542# CONFIG_ENABLE_MUST_CHECK is not set 1762# CONFIG_ENABLE_MUST_CHECK is not set
1543CONFIG_FRAME_WARN=1024 1763CONFIG_FRAME_WARN=1024
1544CONFIG_MAGIC_SYSRQ=y 1764CONFIG_MAGIC_SYSRQ=y
@@ -1547,7 +1767,7 @@ CONFIG_MAGIC_SYSRQ=y
1547CONFIG_DEBUG_FS=y 1767CONFIG_DEBUG_FS=y
1548# CONFIG_HEADERS_CHECK is not set 1768# CONFIG_HEADERS_CHECK is not set
1549CONFIG_DEBUG_KERNEL=y 1769CONFIG_DEBUG_KERNEL=y
1550CONFIG_DEBUG_SHIRQ=y 1770# CONFIG_DEBUG_SHIRQ is not set
1551CONFIG_DETECT_SOFTLOCKUP=y 1771CONFIG_DETECT_SOFTLOCKUP=y
1552# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1772# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1553CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1773CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1555,8 +1775,8 @@ CONFIG_DETECT_HUNG_TASK=y
1555# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set 1775# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1556CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 1776CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1557CONFIG_SCHED_DEBUG=y 1777CONFIG_SCHED_DEBUG=y
1558# CONFIG_SCHEDSTATS is not set 1778CONFIG_SCHEDSTATS=y
1559# CONFIG_TIMER_STATS is not set 1779CONFIG_TIMER_STATS=y
1560# CONFIG_DEBUG_OBJECTS is not set 1780# CONFIG_DEBUG_OBJECTS is not set
1561# CONFIG_DEBUG_SLAB is not set 1781# CONFIG_DEBUG_SLAB is not set
1562CONFIG_DEBUG_PREEMPT=y 1782CONFIG_DEBUG_PREEMPT=y
@@ -1573,24 +1793,28 @@ CONFIG_STACKTRACE=y
1573# CONFIG_DEBUG_KOBJECT is not set 1793# CONFIG_DEBUG_KOBJECT is not set
1574CONFIG_DEBUG_BUGVERBOSE=y 1794CONFIG_DEBUG_BUGVERBOSE=y
1575# CONFIG_DEBUG_INFO is not set 1795# CONFIG_DEBUG_INFO is not set
1576CONFIG_DEBUG_VM=y 1796# CONFIG_DEBUG_VM is not set
1577# CONFIG_DEBUG_WRITECOUNT is not set 1797# CONFIG_DEBUG_WRITECOUNT is not set
1578# CONFIG_DEBUG_MEMORY_INIT is not set 1798CONFIG_DEBUG_MEMORY_INIT=y
1579# CONFIG_DEBUG_LIST is not set 1799# CONFIG_DEBUG_LIST is not set
1580# CONFIG_DEBUG_SG is not set 1800# CONFIG_DEBUG_SG is not set
1581# CONFIG_DEBUG_NOTIFIERS is not set 1801# CONFIG_DEBUG_NOTIFIERS is not set
1582# CONFIG_DEBUG_CREDENTIALS is not set 1802# CONFIG_DEBUG_CREDENTIALS is not set
1583CONFIG_FRAME_POINTER=y 1803CONFIG_FRAME_POINTER=y
1584# CONFIG_RCU_TORTURE_TEST is not set 1804# CONFIG_RCU_TORTURE_TEST is not set
1585# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1805CONFIG_RCU_CPU_STALL_DETECTOR=y
1806# CONFIG_RCU_CPU_STALL_VERBOSE is not set
1807# CONFIG_KPROBES_SANITY_TEST is not set
1586# CONFIG_BACKTRACE_SELF_TEST is not set 1808# CONFIG_BACKTRACE_SELF_TEST is not set
1587# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1809# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1588# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1810# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1811# CONFIG_LKDTM is not set
1589# CONFIG_FAULT_INJECTION is not set 1812# CONFIG_FAULT_INJECTION is not set
1590# CONFIG_LATENCYTOP is not set 1813CONFIG_LATENCYTOP=y
1591# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1814CONFIG_SYSCTL_SYSCALL_CHECK=y
1592# CONFIG_PAGE_POISONING is not set 1815# CONFIG_PAGE_POISONING is not set
1593CONFIG_NOP_TRACER=y 1816CONFIG_NOP_TRACER=y
1817CONFIG_HAVE_FTRACE_NMI_ENTER=y
1594CONFIG_HAVE_FUNCTION_TRACER=y 1818CONFIG_HAVE_FUNCTION_TRACER=y
1595CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1819CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1596CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1820CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1598,16 +1822,19 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1598CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1822CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1599CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1823CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1600CONFIG_RING_BUFFER=y 1824CONFIG_RING_BUFFER=y
1825CONFIG_FTRACE_NMI_ENTER=y
1601CONFIG_EVENT_TRACING=y 1826CONFIG_EVENT_TRACING=y
1602CONFIG_CONTEXT_SWITCH_TRACER=y 1827CONFIG_CONTEXT_SWITCH_TRACER=y
1828CONFIG_RING_BUFFER_ALLOW_SWAP=y
1603CONFIG_TRACING=y 1829CONFIG_TRACING=y
1830CONFIG_GENERIC_TRACER=y
1604CONFIG_TRACING_SUPPORT=y 1831CONFIG_TRACING_SUPPORT=y
1605CONFIG_FTRACE=y 1832CONFIG_FTRACE=y
1606# CONFIG_FUNCTION_TRACER is not set 1833CONFIG_FUNCTION_TRACER=y
1834# CONFIG_FUNCTION_GRAPH_TRACER is not set
1607# CONFIG_IRQSOFF_TRACER is not set 1835# CONFIG_IRQSOFF_TRACER is not set
1608# CONFIG_PREEMPT_TRACER is not set 1836# CONFIG_PREEMPT_TRACER is not set
1609# CONFIG_SCHED_TRACER is not set 1837# CONFIG_SCHED_TRACER is not set
1610# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1611# CONFIG_FTRACE_SYSCALLS is not set 1838# CONFIG_FTRACE_SYSCALLS is not set
1612# CONFIG_BOOT_TRACER is not set 1839# CONFIG_BOOT_TRACER is not set
1613CONFIG_BRANCH_PROFILE_NONE=y 1840CONFIG_BRANCH_PROFILE_NONE=y
@@ -1619,9 +1846,13 @@ CONFIG_KSYM_TRACER=y
1619# CONFIG_KMEMTRACE is not set 1846# CONFIG_KMEMTRACE is not set
1620# CONFIG_WORKQUEUE_TRACER is not set 1847# CONFIG_WORKQUEUE_TRACER is not set
1621# CONFIG_BLK_DEV_IO_TRACE is not set 1848# CONFIG_BLK_DEV_IO_TRACE is not set
1849CONFIG_DYNAMIC_FTRACE=y
1850# CONFIG_FUNCTION_PROFILER is not set
1851CONFIG_FTRACE_MCOUNT_RECORD=y
1852# CONFIG_FTRACE_STARTUP_TEST is not set
1622# CONFIG_RING_BUFFER_BENCHMARK is not set 1853# CONFIG_RING_BUFFER_BENCHMARK is not set
1623# CONFIG_DYNAMIC_DEBUG is not set 1854# CONFIG_DYNAMIC_DEBUG is not set
1624# CONFIG_DMA_API_DEBUG is not set 1855CONFIG_DMA_API_DEBUG=y
1625# CONFIG_SAMPLES is not set 1856# CONFIG_SAMPLES is not set
1626CONFIG_HAVE_ARCH_KGDB=y 1857CONFIG_HAVE_ARCH_KGDB=y
1627# CONFIG_KGDB is not set 1858# CONFIG_KGDB is not set
@@ -1632,6 +1863,7 @@ CONFIG_DEBUG_STACK_USAGE=y
1632CONFIG_DUMP_CODE=y 1863CONFIG_DUMP_CODE=y
1633CONFIG_DWARF_UNWINDER=y 1864CONFIG_DWARF_UNWINDER=y
1634# CONFIG_SH_NO_BSS_INIT is not set 1865# CONFIG_SH_NO_BSS_INIT is not set
1866CONFIG_MCOUNT=y
1635 1867
1636# 1868#
1637# Security options 1869# Security options
@@ -1649,10 +1881,21 @@ CONFIG_CRYPTO=y
1649# 1881#
1650# Crypto core or helper 1882# Crypto core or helper
1651# 1883#
1652# CONFIG_CRYPTO_MANAGER is not set 1884CONFIG_CRYPTO_ALGAPI=y
1653# CONFIG_CRYPTO_MANAGER2 is not set 1885CONFIG_CRYPTO_ALGAPI2=y
1886CONFIG_CRYPTO_AEAD2=y
1887CONFIG_CRYPTO_BLKCIPHER=y
1888CONFIG_CRYPTO_BLKCIPHER2=y
1889CONFIG_CRYPTO_HASH=y
1890CONFIG_CRYPTO_HASH2=y
1891CONFIG_CRYPTO_RNG2=y
1892CONFIG_CRYPTO_PCOMP=y
1893CONFIG_CRYPTO_MANAGER=y
1894CONFIG_CRYPTO_MANAGER2=y
1654# CONFIG_CRYPTO_GF128MUL is not set 1895# CONFIG_CRYPTO_GF128MUL is not set
1655# CONFIG_CRYPTO_NULL is not set 1896# CONFIG_CRYPTO_NULL is not set
1897# CONFIG_CRYPTO_PCRYPT is not set
1898CONFIG_CRYPTO_WORKQUEUE=y
1656# CONFIG_CRYPTO_CRYPTD is not set 1899# CONFIG_CRYPTO_CRYPTD is not set
1657# CONFIG_CRYPTO_AUTHENC is not set 1900# CONFIG_CRYPTO_AUTHENC is not set
1658# CONFIG_CRYPTO_TEST is not set 1901# CONFIG_CRYPTO_TEST is not set
@@ -1667,7 +1910,7 @@ CONFIG_CRYPTO=y
1667# 1910#
1668# Block modes 1911# Block modes
1669# 1912#
1670# CONFIG_CRYPTO_CBC is not set 1913CONFIG_CRYPTO_CBC=y
1671# CONFIG_CRYPTO_CTR is not set 1914# CONFIG_CRYPTO_CTR is not set
1672# CONFIG_CRYPTO_CTS is not set 1915# CONFIG_CRYPTO_CTS is not set
1673# CONFIG_CRYPTO_ECB is not set 1916# CONFIG_CRYPTO_ECB is not set
@@ -1685,10 +1928,10 @@ CONFIG_CRYPTO=y
1685# 1928#
1686# Digest 1929# Digest
1687# 1930#
1688# CONFIG_CRYPTO_CRC32C is not set 1931CONFIG_CRYPTO_CRC32C=y
1689# CONFIG_CRYPTO_GHASH is not set 1932# CONFIG_CRYPTO_GHASH is not set
1690# CONFIG_CRYPTO_MD4 is not set 1933# CONFIG_CRYPTO_MD4 is not set
1691# CONFIG_CRYPTO_MD5 is not set 1934CONFIG_CRYPTO_MD5=y
1692# CONFIG_CRYPTO_MICHAEL_MIC is not set 1935# CONFIG_CRYPTO_MICHAEL_MIC is not set
1693# CONFIG_CRYPTO_RMD128 is not set 1936# CONFIG_CRYPTO_RMD128 is not set
1694# CONFIG_CRYPTO_RMD160 is not set 1937# CONFIG_CRYPTO_RMD160 is not set
@@ -1710,7 +1953,7 @@ CONFIG_CRYPTO=y
1710# CONFIG_CRYPTO_CAMELLIA is not set 1953# CONFIG_CRYPTO_CAMELLIA is not set
1711# CONFIG_CRYPTO_CAST5 is not set 1954# CONFIG_CRYPTO_CAST5 is not set
1712# CONFIG_CRYPTO_CAST6 is not set 1955# CONFIG_CRYPTO_CAST6 is not set
1713# CONFIG_CRYPTO_DES is not set 1956CONFIG_CRYPTO_DES=y
1714# CONFIG_CRYPTO_FCRYPT is not set 1957# CONFIG_CRYPTO_FCRYPT is not set
1715# CONFIG_CRYPTO_KHAZAD is not set 1958# CONFIG_CRYPTO_KHAZAD is not set
1716# CONFIG_CRYPTO_SALSA20 is not set 1959# CONFIG_CRYPTO_SALSA20 is not set
@@ -1722,9 +1965,9 @@ CONFIG_CRYPTO=y
1722# 1965#
1723# Compression 1966# Compression
1724# 1967#
1725# CONFIG_CRYPTO_DEFLATE is not set 1968CONFIG_CRYPTO_DEFLATE=m
1726# CONFIG_CRYPTO_ZLIB is not set 1969# CONFIG_CRYPTO_ZLIB is not set
1727# CONFIG_CRYPTO_LZO is not set 1970CONFIG_CRYPTO_LZO=m
1728 1971
1729# 1972#
1730# Random Number Generation 1973# Random Number Generation
@@ -1732,6 +1975,7 @@ CONFIG_CRYPTO=y
1732# CONFIG_CRYPTO_ANSI_CPRNG is not set 1975# CONFIG_CRYPTO_ANSI_CPRNG is not set
1733CONFIG_CRYPTO_HW=y 1976CONFIG_CRYPTO_HW=y
1734# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1977# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1978# CONFIG_VIRTUALIZATION is not set
1735CONFIG_BINARY_PRINTF=y 1979CONFIG_BINARY_PRINTF=y
1736 1980
1737# 1981#
@@ -1740,12 +1984,22 @@ CONFIG_BINARY_PRINTF=y
1740CONFIG_BITREVERSE=y 1984CONFIG_BITREVERSE=y
1741CONFIG_GENERIC_FIND_LAST_BIT=y 1985CONFIG_GENERIC_FIND_LAST_BIT=y
1742# CONFIG_CRC_CCITT is not set 1986# CONFIG_CRC_CCITT is not set
1743# CONFIG_CRC16 is not set 1987CONFIG_CRC16=y
1744# CONFIG_CRC_T10DIF is not set 1988# CONFIG_CRC_T10DIF is not set
1745# CONFIG_CRC_ITU_T is not set 1989CONFIG_CRC_ITU_T=m
1746CONFIG_CRC32=y 1990CONFIG_CRC32=y
1747# CONFIG_CRC7 is not set 1991# CONFIG_CRC7 is not set
1748# CONFIG_LIBCRC32C is not set 1992CONFIG_LIBCRC32C=y
1993CONFIG_AUDIT_GENERIC=y
1994CONFIG_ZLIB_INFLATE=y
1995CONFIG_ZLIB_DEFLATE=y
1996CONFIG_LZO_COMPRESS=m
1997CONFIG_LZO_DECOMPRESS=y
1998CONFIG_DECOMPRESS_GZIP=y
1999CONFIG_DECOMPRESS_BZIP2=y
2000CONFIG_DECOMPRESS_LZMA=y
2001CONFIG_DECOMPRESS_LZO=y
2002CONFIG_BTREE=y
1749CONFIG_HAS_IOMEM=y 2003CONFIG_HAS_IOMEM=y
1750CONFIG_HAS_IOPORT=y 2004CONFIG_HAS_IOPORT=y
1751CONFIG_HAS_DMA=y 2005CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig
index 43e6780a89d1..910eaec934c9 100644
--- a/arch/sh/configs/se7206_defconfig
+++ b/arch/sh/configs/se7206_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:30:00 2010 4# Tue May 18 16:34:06 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
54CONFIG_POSIX_MQUEUE=y 57CONFIG_POSIX_MQUEUE=y
@@ -72,7 +75,6 @@ CONFIG_RCU_FANOUT=32
72CONFIG_TREE_RCU_TRACE=y 75CONFIG_TREE_RCU_TRACE=y
73# CONFIG_IKCONFIG is not set 76# CONFIG_IKCONFIG is not set
74CONFIG_LOG_BUF_SHIFT=14 77CONFIG_LOG_BUF_SHIFT=14
75# CONFIG_GROUP_SCHED is not set
76CONFIG_CGROUPS=y 78CONFIG_CGROUPS=y
77CONFIG_CGROUP_DEBUG=y 79CONFIG_CGROUP_DEBUG=y
78CONFIG_CGROUP_NS=y 80CONFIG_CGROUP_NS=y
@@ -82,6 +84,7 @@ CONFIG_CGROUP_DEVICE=y
82CONFIG_CGROUP_CPUACCT=y 84CONFIG_CGROUP_CPUACCT=y
83CONFIG_RESOURCE_COUNTERS=y 85CONFIG_RESOURCE_COUNTERS=y
84CONFIG_CGROUP_MEM_RES_CTLR=y 86CONFIG_CGROUP_MEM_RES_CTLR=y
87# CONFIG_CGROUP_SCHED is not set
85CONFIG_MM_OWNER=y 88CONFIG_MM_OWNER=y
86# CONFIG_SYSFS_DEPRECATED_V2 is not set 89# CONFIG_SYSFS_DEPRECATED_V2 is not set
87CONFIG_RELAY=y 90CONFIG_RELAY=y
@@ -96,6 +99,7 @@ CONFIG_INITRAMFS_SOURCE=""
96CONFIG_RD_GZIP=y 99CONFIG_RD_GZIP=y
97# CONFIG_RD_BZIP2 is not set 100# CONFIG_RD_BZIP2 is not set
98# CONFIG_RD_LZMA is not set 101# CONFIG_RD_LZMA is not set
102# CONFIG_RD_LZO is not set
99CONFIG_CC_OPTIMIZE_FOR_SIZE=y 103CONFIG_CC_OPTIMIZE_FOR_SIZE=y
100CONFIG_SYSCTL=y 104CONFIG_SYSCTL=y
101CONFIG_ANON_INODES=y 105CONFIG_ANON_INODES=y
@@ -123,7 +127,6 @@ CONFIG_PERF_USE_VMALLOC=y
123# Kernel Performance Events And Counters 127# Kernel Performance Events And Counters
124# 128#
125CONFIG_PERF_EVENTS=y 129CONFIG_PERF_EVENTS=y
126CONFIG_EVENT_PROFILE=y
127# CONFIG_PERF_COUNTERS is not set 130# CONFIG_PERF_COUNTERS is not set
128# CONFIG_DEBUG_PERF_USE_VMALLOC is not set 131# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
129CONFIG_VM_EVENT_COUNTERS=y 132CONFIG_VM_EVENT_COUNTERS=y
@@ -133,7 +136,6 @@ CONFIG_VM_EVENT_COUNTERS=y
133CONFIG_SLOB=y 136CONFIG_SLOB=y
134# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set 137# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set
135CONFIG_PROFILING=y 138CONFIG_PROFILING=y
136CONFIG_TRACEPOINTS=y
137CONFIG_OPROFILE=y 139CONFIG_OPROFILE=y
138CONFIG_HAVE_OPROFILE=y 140CONFIG_HAVE_OPROFILE=y
139# CONFIG_KPROBES is not set 141# CONFIG_KPROBES is not set
@@ -143,6 +145,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
143CONFIG_HAVE_DMA_ATTRS=y 145CONFIG_HAVE_DMA_ATTRS=y
144CONFIG_HAVE_CLK=y 146CONFIG_HAVE_CLK=y
145CONFIG_HAVE_DMA_API_DEBUG=y 147CONFIG_HAVE_DMA_API_DEBUG=y
148CONFIG_HAVE_HW_BREAKPOINT=y
146 149
147# 150#
148# GCOV-based kernel profiling 151# GCOV-based kernel profiling
@@ -162,7 +165,6 @@ CONFIG_BLOCK=y
162CONFIG_LBDAF=y 165CONFIG_LBDAF=y
163# CONFIG_BLK_DEV_BSG is not set 166# CONFIG_BLK_DEV_BSG is not set
164# CONFIG_BLK_DEV_INTEGRITY is not set 167# CONFIG_BLK_DEV_INTEGRITY is not set
165# CONFIG_BLK_CGROUP is not set
166 168
167# 169#
168# IO Schedulers 170# IO Schedulers
@@ -261,6 +263,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
261CONFIG_MAX_ACTIVE_REGIONS=1 263CONFIG_MAX_ACTIVE_REGIONS=1
262CONFIG_ARCH_POPULATES_NODE_MAP=y 264CONFIG_ARCH_POPULATES_NODE_MAP=y
263CONFIG_ARCH_SELECT_MEMORY_MODEL=y 265CONFIG_ARCH_SELECT_MEMORY_MODEL=y
266CONFIG_UNCACHED_MAPPING=y
264CONFIG_PAGE_SIZE_4KB=y 267CONFIG_PAGE_SIZE_4KB=y
265# CONFIG_PAGE_SIZE_8KB is not set 268# CONFIG_PAGE_SIZE_8KB is not set
266# CONFIG_PAGE_SIZE_16KB is not set 269# CONFIG_PAGE_SIZE_16KB is not set
@@ -276,7 +279,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
276CONFIG_SPLIT_PTLOCK_CPUS=4 279CONFIG_SPLIT_PTLOCK_CPUS=4
277# CONFIG_PHYS_ADDR_T_64BIT is not set 280# CONFIG_PHYS_ADDR_T_64BIT is not set
278CONFIG_ZONE_DMA_FLAG=0 281CONFIG_ZONE_DMA_FLAG=0
279CONFIG_NR_QUICK=2 282CONFIG_NR_QUICK=1
280CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 283CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
281 284
282# 285#
@@ -361,7 +364,6 @@ CONFIG_HZ=1000
361# CONFIG_PREEMPT_VOLUNTARY is not set 364# CONFIG_PREEMPT_VOLUNTARY is not set
362CONFIG_PREEMPT=y 365CONFIG_PREEMPT=y
363CONFIG_GUSA=y 366CONFIG_GUSA=y
364# CONFIG_SPARSE_IRQ is not set
365 367
366# 368#
367# Boot options 369# Boot options
@@ -400,7 +402,6 @@ CONFIG_NET=y
400# Networking options 402# Networking options
401# 403#
402CONFIG_PACKET=y 404CONFIG_PACKET=y
403# CONFIG_PACKET_MMAP is not set
404CONFIG_UNIX=y 405CONFIG_UNIX=y
405CONFIG_XFRM=y 406CONFIG_XFRM=y
406# CONFIG_XFRM_USER is not set 407# CONFIG_XFRM_USER is not set
@@ -463,7 +464,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
463# Network testing 464# Network testing
464# 465#
465# CONFIG_NET_PKTGEN is not set 466# CONFIG_NET_PKTGEN is not set
466# CONFIG_NET_DROP_MONITOR is not set
467# CONFIG_HAMRADIO is not set 467# CONFIG_HAMRADIO is not set
468# CONFIG_CAN is not set 468# CONFIG_CAN is not set
469# CONFIG_IRDA is not set 469# CONFIG_IRDA is not set
@@ -607,6 +607,7 @@ CONFIG_HAVE_IDE=y
607# 607#
608# SCSI device support 608# SCSI device support
609# 609#
610CONFIG_SCSI_MOD=y
610# CONFIG_RAID_ATTRS is not set 611# CONFIG_RAID_ATTRS is not set
611# CONFIG_SCSI is not set 612# CONFIG_SCSI is not set
612# CONFIG_SCSI_DMA is not set 613# CONFIG_SCSI_DMA is not set
@@ -688,6 +689,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=4
688CONFIG_SERIAL_SH_SCI_CONSOLE=y 689CONFIG_SERIAL_SH_SCI_CONSOLE=y
689CONFIG_SERIAL_CORE=y 690CONFIG_SERIAL_CORE=y
690CONFIG_SERIAL_CORE_CONSOLE=y 691CONFIG_SERIAL_CORE_CONSOLE=y
692# CONFIG_SERIAL_TIMBERDALE is not set
691# CONFIG_UNIX98_PTYS is not set 693# CONFIG_UNIX98_PTYS is not set
692# CONFIG_LEGACY_PTYS is not set 694# CONFIG_LEGACY_PTYS is not set
693# CONFIG_IPMI_HANDLER is not set 695# CONFIG_IPMI_HANDLER is not set
@@ -799,7 +801,6 @@ CONFIG_EXT2_FS=y
799# CONFIG_EXT2_FS_XATTR is not set 801# CONFIG_EXT2_FS_XATTR is not set
800# CONFIG_EXT3_FS is not set 802# CONFIG_EXT3_FS is not set
801# CONFIG_EXT4_FS is not set 803# CONFIG_EXT4_FS is not set
802CONFIG_EXT4_USE_FOR_EXT23=y
803# CONFIG_REISERFS_FS is not set 804# CONFIG_REISERFS_FS is not set
804# CONFIG_JFS_FS is not set 805# CONFIG_JFS_FS is not set
805# CONFIG_FS_POSIX_ACL is not set 806# CONFIG_FS_POSIX_ACL is not set
@@ -853,6 +854,7 @@ CONFIG_MISC_FILESYSTEMS=y
853# CONFIG_BFS_FS is not set 854# CONFIG_BFS_FS is not set
854# CONFIG_EFS_FS is not set 855# CONFIG_EFS_FS is not set
855# CONFIG_JFFS2_FS is not set 856# CONFIG_JFFS2_FS is not set
857# CONFIG_LOGFS is not set
856CONFIG_CRAMFS=y 858CONFIG_CRAMFS=y
857# CONFIG_SQUASHFS is not set 859# CONFIG_SQUASHFS is not set
858# CONFIG_VXFS_FS is not set 860# CONFIG_VXFS_FS is not set
@@ -881,6 +883,7 @@ CONFIG_SUNRPC=y
881# CONFIG_RPCSEC_GSS_KRB5 is not set 883# CONFIG_RPCSEC_GSS_KRB5 is not set
882# CONFIG_RPCSEC_GSS_SPKM3 is not set 884# CONFIG_RPCSEC_GSS_SPKM3 is not set
883# CONFIG_SMB_FS is not set 885# CONFIG_SMB_FS is not set
886# CONFIG_CEPH_FS is not set
884# CONFIG_CIFS is not set 887# CONFIG_CIFS is not set
885# CONFIG_NCP_FS is not set 888# CONFIG_NCP_FS is not set
886# CONFIG_CODA_FS is not set 889# CONFIG_CODA_FS is not set
@@ -919,6 +922,7 @@ CONFIG_SCHED_DEBUG=y
919# CONFIG_SCHEDSTATS is not set 922# CONFIG_SCHEDSTATS is not set
920# CONFIG_TIMER_STATS is not set 923# CONFIG_TIMER_STATS is not set
921# CONFIG_DEBUG_OBJECTS is not set 924# CONFIG_DEBUG_OBJECTS is not set
925# CONFIG_DEBUG_KMEMLEAK is not set
922CONFIG_DEBUG_PREEMPT=y 926CONFIG_DEBUG_PREEMPT=y
923# CONFIG_DEBUG_RT_MUTEXES is not set 927# CONFIG_DEBUG_RT_MUTEXES is not set
924# CONFIG_RT_MUTEX_TESTER is not set 928# CONFIG_RT_MUTEX_TESTER is not set
@@ -929,7 +933,6 @@ CONFIG_DEBUG_PREEMPT=y
929# CONFIG_LOCK_STAT is not set 933# CONFIG_LOCK_STAT is not set
930CONFIG_DEBUG_SPINLOCK_SLEEP=y 934CONFIG_DEBUG_SPINLOCK_SLEEP=y
931# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 935# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
932CONFIG_STACKTRACE=y
933# CONFIG_DEBUG_KOBJECT is not set 936# CONFIG_DEBUG_KOBJECT is not set
934CONFIG_DEBUG_BUGVERBOSE=y 937CONFIG_DEBUG_BUGVERBOSE=y
935# CONFIG_DEBUG_INFO is not set 938# CONFIG_DEBUG_INFO is not set
@@ -947,11 +950,11 @@ CONFIG_FRAME_POINTER=y
947# CONFIG_BACKTRACE_SELF_TEST is not set 950# CONFIG_BACKTRACE_SELF_TEST is not set
948# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 951# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
949# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 952# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
953# CONFIG_LKDTM is not set
950# CONFIG_FAULT_INJECTION is not set 954# CONFIG_FAULT_INJECTION is not set
951# CONFIG_LATENCYTOP is not set 955# CONFIG_LATENCYTOP is not set
952# CONFIG_SYSCTL_SYSCALL_CHECK is not set 956# CONFIG_SYSCTL_SYSCALL_CHECK is not set
953# CONFIG_PAGE_POISONING is not set 957# CONFIG_PAGE_POISONING is not set
954CONFIG_NOP_TRACER=y
955CONFIG_HAVE_FUNCTION_TRACER=y 958CONFIG_HAVE_FUNCTION_TRACER=y
956CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 959CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
957CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 960CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -959,10 +962,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
959CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 962CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
960CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 963CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
961CONFIG_RING_BUFFER=y 964CONFIG_RING_BUFFER=y
962CONFIG_EVENT_TRACING=y
963CONFIG_CONTEXT_SWITCH_TRACER=y
964CONFIG_RING_BUFFER_ALLOW_SWAP=y 965CONFIG_RING_BUFFER_ALLOW_SWAP=y
965CONFIG_TRACING=y
966CONFIG_TRACING_SUPPORT=y 966CONFIG_TRACING_SUPPORT=y
967CONFIG_FTRACE=y 967CONFIG_FTRACE=y
968# CONFIG_FUNCTION_TRACER is not set 968# CONFIG_FUNCTION_TRACER is not set
@@ -975,6 +975,7 @@ CONFIG_FTRACE=y
975CONFIG_BRANCH_PROFILE_NONE=y 975CONFIG_BRANCH_PROFILE_NONE=y
976# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 976# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
977# CONFIG_PROFILE_ALL_BRANCHES is not set 977# CONFIG_PROFILE_ALL_BRANCHES is not set
978# CONFIG_KSYM_TRACER is not set
978# CONFIG_STACK_TRACER is not set 979# CONFIG_STACK_TRACER is not set
979# CONFIG_KMEMTRACE is not set 980# CONFIG_KMEMTRACE is not set
980# CONFIG_WORKQUEUE_TRACER is not set 981# CONFIG_WORKQUEUE_TRACER is not set
@@ -1094,7 +1095,8 @@ CONFIG_CRYPTO_LZO=y
1094# 1095#
1095# CONFIG_CRYPTO_ANSI_CPRNG is not set 1096# CONFIG_CRYPTO_ANSI_CPRNG is not set
1096# CONFIG_CRYPTO_HW is not set 1097# CONFIG_CRYPTO_HW is not set
1097CONFIG_BINARY_PRINTF=y 1098# CONFIG_VIRTUALIZATION is not set
1099# CONFIG_BINARY_PRINTF is not set
1098 1100
1099# 1101#
1100# Library routines 1102# Library routines
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
index ec494e32fa2e..586cb1e02be0 100644
--- a/arch/sh/configs/se7343_defconfig
+++ b/arch/sh/configs/se7343_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:30:41 2010 4# Tue May 18 16:37:31 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52# CONFIG_SWAP is not set 55# CONFIG_SWAP is not set
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54CONFIG_SYSVIPC_SYSCTL=y 57CONFIG_SYSVIPC_SYSCTL=y
@@ -70,11 +73,6 @@ CONFIG_RCU_FANOUT=32
70# CONFIG_TREE_RCU_TRACE is not set 73# CONFIG_TREE_RCU_TRACE is not set
71# CONFIG_IKCONFIG is not set 74# CONFIG_IKCONFIG is not set
72CONFIG_LOG_BUF_SHIFT=14 75CONFIG_LOG_BUF_SHIFT=14
73CONFIG_GROUP_SCHED=y
74CONFIG_FAIR_GROUP_SCHED=y
75# CONFIG_RT_GROUP_SCHED is not set
76CONFIG_USER_SCHED=y
77# CONFIG_CGROUP_SCHED is not set
78# CONFIG_CGROUPS is not set 76# CONFIG_CGROUPS is not set
79CONFIG_SYSFS_DEPRECATED=y 77CONFIG_SYSFS_DEPRECATED=y
80CONFIG_SYSFS_DEPRECATED_V2=y 78CONFIG_SYSFS_DEPRECATED_V2=y
@@ -107,7 +105,7 @@ CONFIG_PERF_USE_VMALLOC=y
107# 105#
108# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
109# 107#
110# CONFIG_PERF_EVENTS is not set 108CONFIG_PERF_EVENTS=y
111# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
112CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_COMPAT_BRK=y 111CONFIG_COMPAT_BRK=y
@@ -124,6 +122,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y 122CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
125CONFIG_HAVE_HW_BREAKPOINT=y
127 126
128# 127#
129# GCOV-based kernel profiling 128# GCOV-based kernel profiling
@@ -245,6 +244,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
245CONFIG_MAX_ACTIVE_REGIONS=1 244CONFIG_MAX_ACTIVE_REGIONS=1
246CONFIG_ARCH_POPULATES_NODE_MAP=y 245CONFIG_ARCH_POPULATES_NODE_MAP=y
247CONFIG_ARCH_SELECT_MEMORY_MODEL=y 246CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_UNCACHED_MAPPING=y
248CONFIG_PAGE_SIZE_4KB=y 248CONFIG_PAGE_SIZE_4KB=y
249# CONFIG_PAGE_SIZE_8KB is not set 249# CONFIG_PAGE_SIZE_8KB is not set
250# CONFIG_PAGE_SIZE_16KB is not set 250# CONFIG_PAGE_SIZE_16KB is not set
@@ -260,7 +260,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
260CONFIG_SPLIT_PTLOCK_CPUS=4 260CONFIG_SPLIT_PTLOCK_CPUS=4
261# CONFIG_PHYS_ADDR_T_64BIT is not set 261# CONFIG_PHYS_ADDR_T_64BIT is not set
262CONFIG_ZONE_DMA_FLAG=0 262CONFIG_ZONE_DMA_FLAG=0
263CONFIG_NR_QUICK=2 263CONFIG_NR_QUICK=1
264# CONFIG_KSM is not set 264# CONFIG_KSM is not set
265CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 265CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
266 266
@@ -335,7 +335,7 @@ CONFIG_PREEMPT_NONE=y
335# CONFIG_PREEMPT_VOLUNTARY is not set 335# CONFIG_PREEMPT_VOLUNTARY is not set
336# CONFIG_PREEMPT is not set 336# CONFIG_PREEMPT is not set
337CONFIG_GUSA=y 337CONFIG_GUSA=y
338# CONFIG_SPARSE_IRQ is not set 338# CONFIG_INTC_USERIMASK is not set
339 339
340# 340#
341# Boot options 341# Boot options
@@ -370,6 +370,7 @@ CONFIG_PM_SLEEP=y
370CONFIG_SUSPEND=y 370CONFIG_SUSPEND=y
371CONFIG_SUSPEND_FREEZER=y 371CONFIG_SUSPEND_FREEZER=y
372CONFIG_PM_RUNTIME=y 372CONFIG_PM_RUNTIME=y
373CONFIG_PM_OPS=y
373# CONFIG_CPU_IDLE is not set 374# CONFIG_CPU_IDLE is not set
374CONFIG_NET=y 375CONFIG_NET=y
375 376
@@ -377,7 +378,6 @@ CONFIG_NET=y
377# Networking options 378# Networking options
378# 379#
379CONFIG_PACKET=y 380CONFIG_PACKET=y
380CONFIG_PACKET_MMAP=y
381CONFIG_UNIX=y 381CONFIG_UNIX=y
382CONFIG_XFRM=y 382CONFIG_XFRM=y
383# CONFIG_XFRM_USER is not set 383# CONFIG_XFRM_USER is not set
@@ -569,6 +569,7 @@ CONFIG_HAVE_IDE=y
569# 569#
570# SCSI device support 570# SCSI device support
571# 571#
572CONFIG_SCSI_MOD=y
572# CONFIG_RAID_ATTRS is not set 573# CONFIG_RAID_ATTRS is not set
573CONFIG_SCSI=y 574CONFIG_SCSI=y
574CONFIG_SCSI_DMA=y 575CONFIG_SCSI_DMA=y
@@ -635,6 +636,7 @@ CONFIG_USB_USBNET=y
635CONFIG_USB_NET_CDCETHER=y 636CONFIG_USB_NET_CDCETHER=y
636# CONFIG_USB_NET_CDC_EEM is not set 637# CONFIG_USB_NET_CDC_EEM is not set
637CONFIG_USB_NET_DM9601=y 638CONFIG_USB_NET_DM9601=y
639# CONFIG_USB_NET_SMSC75XX is not set
638# CONFIG_USB_NET_SMSC95XX is not set 640# CONFIG_USB_NET_SMSC95XX is not set
639# CONFIG_USB_NET_GL620A is not set 641# CONFIG_USB_NET_GL620A is not set
640# CONFIG_USB_NET_NET1080 is not set 642# CONFIG_USB_NET_NET1080 is not set
@@ -644,6 +646,7 @@ CONFIG_USB_NET_DM9601=y
644# CONFIG_USB_NET_CDC_SUBSET is not set 646# CONFIG_USB_NET_CDC_SUBSET is not set
645# CONFIG_USB_NET_ZAURUS is not set 647# CONFIG_USB_NET_ZAURUS is not set
646# CONFIG_USB_NET_INT51X1 is not set 648# CONFIG_USB_NET_INT51X1 is not set
649# CONFIG_USB_IPHETH is not set
647# CONFIG_WAN is not set 650# CONFIG_WAN is not set
648# CONFIG_PPP is not set 651# CONFIG_PPP is not set
649# CONFIG_SLIP is not set 652# CONFIG_SLIP is not set
@@ -713,6 +716,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=4
713CONFIG_SERIAL_SH_SCI_CONSOLE=y 716CONFIG_SERIAL_SH_SCI_CONSOLE=y
714CONFIG_SERIAL_CORE=y 717CONFIG_SERIAL_CORE=y
715CONFIG_SERIAL_CORE_CONSOLE=y 718CONFIG_SERIAL_CORE_CONSOLE=y
719# CONFIG_SERIAL_TIMBERDALE is not set
716# CONFIG_UNIX98_PTYS is not set 720# CONFIG_UNIX98_PTYS is not set
717CONFIG_LEGACY_PTYS=y 721CONFIG_LEGACY_PTYS=y
718CONFIG_LEGACY_PTY_COUNT=256 722CONFIG_LEGACY_PTY_COUNT=256
@@ -739,6 +743,7 @@ CONFIG_I2C_HELPER_AUTO=y
739# CONFIG_I2C_OCORES is not set 743# CONFIG_I2C_OCORES is not set
740CONFIG_I2C_SH_MOBILE=y 744CONFIG_I2C_SH_MOBILE=y
741# CONFIG_I2C_SIMTEC is not set 745# CONFIG_I2C_SIMTEC is not set
746# CONFIG_I2C_XILINX is not set
742 747
743# 748#
744# External I2C/SMBus adapter drivers 749# External I2C/SMBus adapter drivers
@@ -752,15 +757,9 @@ CONFIG_I2C_SH_MOBILE=y
752# 757#
753# CONFIG_I2C_PCA_PLATFORM is not set 758# CONFIG_I2C_PCA_PLATFORM is not set
754# CONFIG_I2C_STUB is not set 759# CONFIG_I2C_STUB is not set
755
756#
757# Miscellaneous I2C Chip support
758#
759# CONFIG_SENSORS_TSL2550 is not set
760# CONFIG_I2C_DEBUG_CORE is not set 760# CONFIG_I2C_DEBUG_CORE is not set
761# CONFIG_I2C_DEBUG_ALGO is not set 761# CONFIG_I2C_DEBUG_ALGO is not set
762# CONFIG_I2C_DEBUG_BUS is not set 762# CONFIG_I2C_DEBUG_BUS is not set
763# CONFIG_I2C_DEBUG_CHIP is not set
764# CONFIG_SPI is not set 763# CONFIG_SPI is not set
765 764
766# 765#
@@ -783,6 +782,7 @@ CONFIG_SSB_POSSIBLE=y
783# Multifunction device drivers 782# Multifunction device drivers
784# 783#
785# CONFIG_MFD_CORE is not set 784# CONFIG_MFD_CORE is not set
785# CONFIG_MFD_88PM860X is not set
786# CONFIG_MFD_SM501 is not set 786# CONFIG_MFD_SM501 is not set
787# CONFIG_MFD_SH_MOBILE_SDHI is not set 787# CONFIG_MFD_SH_MOBILE_SDHI is not set
788# CONFIG_HTC_PASIC3 is not set 788# CONFIG_HTC_PASIC3 is not set
@@ -790,12 +790,13 @@ CONFIG_SSB_POSSIBLE=y
790# CONFIG_MFD_TMIO is not set 790# CONFIG_MFD_TMIO is not set
791# CONFIG_PMIC_DA903X is not set 791# CONFIG_PMIC_DA903X is not set
792# CONFIG_PMIC_ADP5520 is not set 792# CONFIG_PMIC_ADP5520 is not set
793# CONFIG_MFD_MAX8925 is not set
793# CONFIG_MFD_WM8400 is not set 794# CONFIG_MFD_WM8400 is not set
794# CONFIG_MFD_WM831X is not set 795# CONFIG_MFD_WM831X is not set
795# CONFIG_MFD_WM8350_I2C is not set 796# CONFIG_MFD_WM8350_I2C is not set
797# CONFIG_MFD_WM8994 is not set
796# CONFIG_MFD_PCF50633 is not set 798# CONFIG_MFD_PCF50633 is not set
797# CONFIG_AB3100_CORE is not set 799# CONFIG_AB3100_CORE is not set
798# CONFIG_MFD_88PM8607 is not set
799# CONFIG_REGULATOR is not set 800# CONFIG_REGULATOR is not set
800# CONFIG_MEDIA_SUPPORT is not set 801# CONFIG_MEDIA_SUPPORT is not set
801 802
@@ -878,6 +879,7 @@ CONFIG_SND_DRIVERS=y
878CONFIG_SND_SUPERH=y 879CONFIG_SND_SUPERH=y
879CONFIG_SND_USB=y 880CONFIG_SND_USB=y
880# CONFIG_SND_USB_AUDIO is not set 881# CONFIG_SND_USB_AUDIO is not set
882# CONFIG_SND_USB_UA101 is not set
881# CONFIG_SND_USB_CAIAQ is not set 883# CONFIG_SND_USB_CAIAQ is not set
882# CONFIG_SND_SOC is not set 884# CONFIG_SND_SOC is not set
883# CONFIG_SOUND_PRIME is not set 885# CONFIG_SOUND_PRIME is not set
@@ -895,6 +897,7 @@ CONFIG_USB_HID=y
895# 897#
896# Special HID drivers 898# Special HID drivers
897# 899#
900# CONFIG_HID_3M_PCT is not set
898CONFIG_HID_A4TECH=y 901CONFIG_HID_A4TECH=y
899CONFIG_HID_APPLE=y 902CONFIG_HID_APPLE=y
900CONFIG_HID_BELKIN=y 903CONFIG_HID_BELKIN=y
@@ -910,14 +913,19 @@ CONFIG_HID_GYRATION=y
910CONFIG_HID_LOGITECH=y 913CONFIG_HID_LOGITECH=y
911# CONFIG_LOGITECH_FF is not set 914# CONFIG_LOGITECH_FF is not set
912# CONFIG_LOGIRUMBLEPAD2_FF is not set 915# CONFIG_LOGIRUMBLEPAD2_FF is not set
916# CONFIG_LOGIG940_FF is not set
913CONFIG_HID_MICROSOFT=y 917CONFIG_HID_MICROSOFT=y
918# CONFIG_HID_MOSART is not set
914CONFIG_HID_MONTEREY=y 919CONFIG_HID_MONTEREY=y
915# CONFIG_HID_NTRIG is not set 920# CONFIG_HID_NTRIG is not set
921# CONFIG_HID_ORTEK is not set
916CONFIG_HID_PANTHERLORD=y 922CONFIG_HID_PANTHERLORD=y
917# CONFIG_PANTHERLORD_FF is not set 923# CONFIG_PANTHERLORD_FF is not set
918CONFIG_HID_PETALYNX=y 924CONFIG_HID_PETALYNX=y
925# CONFIG_HID_QUANTA is not set
919CONFIG_HID_SAMSUNG=y 926CONFIG_HID_SAMSUNG=y
920CONFIG_HID_SONY=y 927CONFIG_HID_SONY=y
928# CONFIG_HID_STANTUM is not set
921CONFIG_HID_SUNPLUS=y 929CONFIG_HID_SUNPLUS=y
922# CONFIG_HID_GREENASIA is not set 930# CONFIG_HID_GREENASIA is not set
923# CONFIG_HID_SMARTJOYPLUS is not set 931# CONFIG_HID_SMARTJOYPLUS is not set
@@ -997,7 +1005,6 @@ CONFIG_USB_ISP116X_HCD=y
997# CONFIG_USB_RIO500 is not set 1005# CONFIG_USB_RIO500 is not set
998# CONFIG_USB_LEGOTOWER is not set 1006# CONFIG_USB_LEGOTOWER is not set
999# CONFIG_USB_LCD is not set 1007# CONFIG_USB_LCD is not set
1000# CONFIG_USB_BERRY_CHARGE is not set
1001# CONFIG_USB_LED is not set 1008# CONFIG_USB_LED is not set
1002# CONFIG_USB_CYPRESS_CY7C63 is not set 1009# CONFIG_USB_CYPRESS_CY7C63 is not set
1003# CONFIG_USB_CYTHERM is not set 1010# CONFIG_USB_CYTHERM is not set
@@ -1009,7 +1016,6 @@ CONFIG_USB_ISP116X_HCD=y
1009# CONFIG_USB_IOWARRIOR is not set 1016# CONFIG_USB_IOWARRIOR is not set
1010# CONFIG_USB_TEST is not set 1017# CONFIG_USB_TEST is not set
1011# CONFIG_USB_ISIGHTFW is not set 1018# CONFIG_USB_ISIGHTFW is not set
1012# CONFIG_USB_VST is not set
1013# CONFIG_USB_GADGET is not set 1019# CONFIG_USB_GADGET is not set
1014 1020
1015# 1021#
@@ -1027,8 +1033,6 @@ CONFIG_RTC_LIB=y
1027CONFIG_UIO=y 1033CONFIG_UIO=y
1028# CONFIG_UIO_PDRV is not set 1034# CONFIG_UIO_PDRV is not set
1029# CONFIG_UIO_PDRV_GENIRQ is not set 1035# CONFIG_UIO_PDRV_GENIRQ is not set
1030# CONFIG_UIO_SMX is not set
1031# CONFIG_UIO_SERCOS3 is not set
1032 1036
1033# 1037#
1034# TI VLYNQ 1038# TI VLYNQ
@@ -1115,6 +1119,7 @@ CONFIG_JFFS2_ZLIB=y
1115# CONFIG_JFFS2_LZO is not set 1119# CONFIG_JFFS2_LZO is not set
1116CONFIG_JFFS2_RTIME=y 1120CONFIG_JFFS2_RTIME=y
1117# CONFIG_JFFS2_RUBIN is not set 1121# CONFIG_JFFS2_RUBIN is not set
1122# CONFIG_LOGFS is not set
1118CONFIG_CRAMFS=y 1123CONFIG_CRAMFS=y
1119# CONFIG_SQUASHFS is not set 1124# CONFIG_SQUASHFS is not set
1120# CONFIG_VXFS_FS is not set 1125# CONFIG_VXFS_FS is not set
@@ -1141,6 +1146,7 @@ CONFIG_SUNRPC=y
1141# CONFIG_RPCSEC_GSS_KRB5 is not set 1146# CONFIG_RPCSEC_GSS_KRB5 is not set
1142# CONFIG_RPCSEC_GSS_SPKM3 is not set 1147# CONFIG_RPCSEC_GSS_SPKM3 is not set
1143# CONFIG_SMB_FS is not set 1148# CONFIG_SMB_FS is not set
1149# CONFIG_CEPH_FS is not set
1144# CONFIG_CIFS is not set 1150# CONFIG_CIFS is not set
1145# CONFIG_NCP_FS is not set 1151# CONFIG_NCP_FS is not set
1146# CONFIG_CODA_FS is not set 1152# CONFIG_CODA_FS is not set
@@ -1324,6 +1330,7 @@ CONFIG_CRYPTO=y
1324# 1330#
1325# CONFIG_CRYPTO_ANSI_CPRNG is not set 1331# CONFIG_CRYPTO_ANSI_CPRNG is not set
1326CONFIG_CRYPTO_HW=y 1332CONFIG_CRYPTO_HW=y
1333# CONFIG_VIRTUALIZATION is not set
1327# CONFIG_BINARY_PRINTF is not set 1334# CONFIG_BINARY_PRINTF is not set
1328 1335
1329# 1336#
diff --git a/arch/sh/configs/se7619_defconfig b/arch/sh/configs/se7619_defconfig
index ee87e2b2168f..acb3e02a7123 100644
--- a/arch/sh/configs/se7619_defconfig
+++ b/arch/sh/configs/se7619_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:34:15 2010 4# Tue May 18 16:41:13 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -30,6 +30,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y 32CONFIG_DMA_NONCOHERENT=y
33CONFIG_NEED_DMA_MAP_STATE=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -44,9 +45,11 @@ CONFIG_LOCALVERSION=""
44CONFIG_HAVE_KERNEL_GZIP=y 45CONFIG_HAVE_KERNEL_GZIP=y
45CONFIG_HAVE_KERNEL_BZIP2=y 46CONFIG_HAVE_KERNEL_BZIP2=y
46CONFIG_HAVE_KERNEL_LZMA=y 47CONFIG_HAVE_KERNEL_LZMA=y
48CONFIG_HAVE_KERNEL_LZO=y
47CONFIG_KERNEL_GZIP=y 49CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_BZIP2 is not set 50# CONFIG_KERNEL_BZIP2 is not set
49# CONFIG_KERNEL_LZMA is not set 51# CONFIG_KERNEL_LZMA is not set
52# CONFIG_KERNEL_LZO is not set
50# CONFIG_SYSVIPC is not set 53# CONFIG_SYSVIPC is not set
51# CONFIG_BSD_PROCESS_ACCT is not set 54# CONFIG_BSD_PROCESS_ACCT is not set
52 55
@@ -62,7 +65,6 @@ CONFIG_RCU_FANOUT=32
62# CONFIG_TREE_RCU_TRACE is not set 65# CONFIG_TREE_RCU_TRACE is not set
63# CONFIG_IKCONFIG is not set 66# CONFIG_IKCONFIG is not set
64CONFIG_LOG_BUF_SHIFT=14 67CONFIG_LOG_BUF_SHIFT=14
65# CONFIG_GROUP_SCHED is not set
66# CONFIG_CGROUPS is not set 68# CONFIG_CGROUPS is not set
67# CONFIG_RELAY is not set 69# CONFIG_RELAY is not set
68# CONFIG_NAMESPACES is not set 70# CONFIG_NAMESPACES is not set
@@ -91,7 +93,7 @@ CONFIG_PERF_USE_VMALLOC=y
91# 93#
92# Kernel Performance Events And Counters 94# Kernel Performance Events And Counters
93# 95#
94# CONFIG_PERF_EVENTS is not set 96CONFIG_PERF_EVENTS=y
95# CONFIG_PERF_COUNTERS is not set 97# CONFIG_PERF_COUNTERS is not set
96# CONFIG_VM_EVENT_COUNTERS is not set 98# CONFIG_VM_EVENT_COUNTERS is not set
97CONFIG_COMPAT_BRK=y 99CONFIG_COMPAT_BRK=y
@@ -107,6 +109,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
107CONFIG_HAVE_DMA_ATTRS=y 109CONFIG_HAVE_DMA_ATTRS=y
108CONFIG_HAVE_CLK=y 110CONFIG_HAVE_CLK=y
109CONFIG_HAVE_DMA_API_DEBUG=y 111CONFIG_HAVE_DMA_API_DEBUG=y
112CONFIG_HAVE_HW_BREAKPOINT=y
110 113
111# 114#
112# GCOV-based kernel profiling 115# GCOV-based kernel profiling
@@ -217,6 +220,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
217CONFIG_MAX_ACTIVE_REGIONS=1 220CONFIG_MAX_ACTIVE_REGIONS=1
218CONFIG_ARCH_POPULATES_NODE_MAP=y 221CONFIG_ARCH_POPULATES_NODE_MAP=y
219CONFIG_ARCH_SELECT_MEMORY_MODEL=y 222CONFIG_ARCH_SELECT_MEMORY_MODEL=y
223CONFIG_UNCACHED_MAPPING=y
220CONFIG_PAGE_SIZE_4KB=y 224CONFIG_PAGE_SIZE_4KB=y
221# CONFIG_PAGE_SIZE_8KB is not set 225# CONFIG_PAGE_SIZE_8KB is not set
222# CONFIG_PAGE_SIZE_16KB is not set 226# CONFIG_PAGE_SIZE_16KB is not set
@@ -232,7 +236,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
232CONFIG_SPLIT_PTLOCK_CPUS=4 236CONFIG_SPLIT_PTLOCK_CPUS=4
233# CONFIG_PHYS_ADDR_T_64BIT is not set 237# CONFIG_PHYS_ADDR_T_64BIT is not set
234CONFIG_ZONE_DMA_FLAG=0 238CONFIG_ZONE_DMA_FLAG=0
235CONFIG_NR_QUICK=2 239CONFIG_NR_QUICK=1
236CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 240CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
237 241
238# 242#
@@ -301,7 +305,6 @@ CONFIG_PREEMPT_NONE=y
301# CONFIG_PREEMPT_VOLUNTARY is not set 305# CONFIG_PREEMPT_VOLUNTARY is not set
302# CONFIG_PREEMPT is not set 306# CONFIG_PREEMPT is not set
303CONFIG_GUSA=y 307CONFIG_GUSA=y
304# CONFIG_SPARSE_IRQ is not set
305 308
306# 309#
307# Boot options 310# Boot options
@@ -453,6 +456,7 @@ CONFIG_HAVE_IDE=y
453# 456#
454# SCSI device support 457# SCSI device support
455# 458#
459CONFIG_SCSI_MOD=y
456# CONFIG_RAID_ATTRS is not set 460# CONFIG_RAID_ATTRS is not set
457# CONFIG_SCSI is not set 461# CONFIG_SCSI is not set
458# CONFIG_SCSI_DMA is not set 462# CONFIG_SCSI_DMA is not set
@@ -513,6 +517,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
513CONFIG_SERIAL_SH_SCI_CONSOLE=y 517CONFIG_SERIAL_SH_SCI_CONSOLE=y
514CONFIG_SERIAL_CORE=y 518CONFIG_SERIAL_CORE=y
515CONFIG_SERIAL_CORE_CONSOLE=y 519CONFIG_SERIAL_CORE_CONSOLE=y
520# CONFIG_SERIAL_TIMBERDALE is not set
516# CONFIG_UNIX98_PTYS is not set 521# CONFIG_UNIX98_PTYS is not set
517# CONFIG_LEGACY_PTYS is not set 522# CONFIG_LEGACY_PTYS is not set
518# CONFIG_IPMI_HANDLER is not set 523# CONFIG_IPMI_HANDLER is not set
@@ -612,7 +617,6 @@ CONFIG_RTC_LIB=y
612# CONFIG_EXT2_FS is not set 617# CONFIG_EXT2_FS is not set
613# CONFIG_EXT3_FS is not set 618# CONFIG_EXT3_FS is not set
614# CONFIG_EXT4_FS is not set 619# CONFIG_EXT4_FS is not set
615CONFIG_EXT4_USE_FOR_EXT23=y
616# CONFIG_REISERFS_FS is not set 620# CONFIG_REISERFS_FS is not set
617# CONFIG_JFS_FS is not set 621# CONFIG_JFS_FS is not set
618# CONFIG_FS_POSIX_ACL is not set 622# CONFIG_FS_POSIX_ACL is not set
@@ -664,6 +668,7 @@ CONFIG_MISC_FILESYSTEMS=y
664# CONFIG_BFS_FS is not set 668# CONFIG_BFS_FS is not set
665# CONFIG_EFS_FS is not set 669# CONFIG_EFS_FS is not set
666# CONFIG_JFFS2_FS is not set 670# CONFIG_JFFS2_FS is not set
671# CONFIG_LOGFS is not set
667# CONFIG_CRAMFS is not set 672# CONFIG_CRAMFS is not set
668# CONFIG_SQUASHFS is not set 673# CONFIG_SQUASHFS is not set
669# CONFIG_VXFS_FS is not set 674# CONFIG_VXFS_FS is not set
@@ -729,6 +734,7 @@ CONFIG_HAVE_ARCH_KGDB=y
729CONFIG_DEFAULT_SECURITY_DAC=y 734CONFIG_DEFAULT_SECURITY_DAC=y
730CONFIG_DEFAULT_SECURITY="" 735CONFIG_DEFAULT_SECURITY=""
731# CONFIG_CRYPTO is not set 736# CONFIG_CRYPTO is not set
737# CONFIG_VIRTUALIZATION is not set
732# CONFIG_BINARY_PRINTF is not set 738# CONFIG_BINARY_PRINTF is not set
733 739
734# 740#
diff --git a/arch/sh/configs/se7705_defconfig b/arch/sh/configs/se7705_defconfig
index 03f4219f2086..084fec9e9050 100644
--- a/arch/sh/configs/se7705_defconfig
+++ b/arch/sh/configs/se7705_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:34:37 2010 4# Tue May 18 16:42:43 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -30,6 +30,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y 32CONFIG_DMA_NONCOHERENT=y
33CONFIG_NEED_DMA_MAP_STATE=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION_AUTO=y
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51# CONFIG_SWAP is not set 54# CONFIG_SWAP is not set
52# CONFIG_SYSVIPC is not set 55# CONFIG_SYSVIPC is not set
53# CONFIG_POSIX_MQUEUE is not set 56# CONFIG_POSIX_MQUEUE is not set
@@ -67,7 +70,6 @@ CONFIG_RCU_FANOUT=32
67# CONFIG_TREE_RCU_TRACE is not set 70# CONFIG_TREE_RCU_TRACE is not set
68# CONFIG_IKCONFIG is not set 71# CONFIG_IKCONFIG is not set
69CONFIG_LOG_BUF_SHIFT=14 72CONFIG_LOG_BUF_SHIFT=14
70# CONFIG_GROUP_SCHED is not set
71# CONFIG_CGROUPS is not set 73# CONFIG_CGROUPS is not set
72# CONFIG_RELAY is not set 74# CONFIG_RELAY is not set
73# CONFIG_NAMESPACES is not set 75# CONFIG_NAMESPACES is not set
@@ -76,6 +78,7 @@ CONFIG_INITRAMFS_SOURCE=""
76CONFIG_RD_GZIP=y 78CONFIG_RD_GZIP=y
77# CONFIG_RD_BZIP2 is not set 79# CONFIG_RD_BZIP2 is not set
78# CONFIG_RD_LZMA is not set 80# CONFIG_RD_LZMA is not set
81# CONFIG_RD_LZO is not set
79# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 82# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
80CONFIG_SYSCTL=y 83CONFIG_SYSCTL=y
81CONFIG_ANON_INODES=y 84CONFIG_ANON_INODES=y
@@ -101,7 +104,7 @@ CONFIG_PERF_USE_VMALLOC=y
101# 104#
102# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
103# 106#
104# CONFIG_PERF_EVENTS is not set 107CONFIG_PERF_EVENTS=y
105# CONFIG_PERF_COUNTERS is not set 108# CONFIG_PERF_COUNTERS is not set
106CONFIG_VM_EVENT_COUNTERS=y 109CONFIG_VM_EVENT_COUNTERS=y
107CONFIG_COMPAT_BRK=y 110CONFIG_COMPAT_BRK=y
@@ -117,6 +120,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
117CONFIG_HAVE_DMA_ATTRS=y 120CONFIG_HAVE_DMA_ATTRS=y
118CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
119CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
123CONFIG_HAVE_HW_BREAKPOINT=y
120 124
121# 125#
122# GCOV-based kernel profiling 126# GCOV-based kernel profiling
@@ -234,6 +238,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
234CONFIG_MAX_ACTIVE_REGIONS=1 238CONFIG_MAX_ACTIVE_REGIONS=1
235CONFIG_ARCH_POPULATES_NODE_MAP=y 239CONFIG_ARCH_POPULATES_NODE_MAP=y
236CONFIG_ARCH_SELECT_MEMORY_MODEL=y 240CONFIG_ARCH_SELECT_MEMORY_MODEL=y
241CONFIG_UNCACHED_MAPPING=y
237CONFIG_PAGE_SIZE_4KB=y 242CONFIG_PAGE_SIZE_4KB=y
238# CONFIG_PAGE_SIZE_8KB is not set 243# CONFIG_PAGE_SIZE_8KB is not set
239# CONFIG_PAGE_SIZE_16KB is not set 244# CONFIG_PAGE_SIZE_16KB is not set
@@ -249,7 +254,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
249CONFIG_SPLIT_PTLOCK_CPUS=4 254CONFIG_SPLIT_PTLOCK_CPUS=4
250# CONFIG_PHYS_ADDR_T_64BIT is not set 255# CONFIG_PHYS_ADDR_T_64BIT is not set
251CONFIG_ZONE_DMA_FLAG=0 256CONFIG_ZONE_DMA_FLAG=0
252CONFIG_NR_QUICK=2 257CONFIG_NR_QUICK=1
253# CONFIG_KSM is not set 258# CONFIG_KSM is not set
254CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 259CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
255 260
@@ -327,7 +332,6 @@ CONFIG_HZ=250
327CONFIG_PREEMPT=y 332CONFIG_PREEMPT=y
328CONFIG_GUSA=y 333CONFIG_GUSA=y
329# CONFIG_GUSA_RB is not set 334# CONFIG_GUSA_RB is not set
330# CONFIG_SPARSE_IRQ is not set
331 335
332# 336#
333# Boot options 337# Boot options
@@ -362,7 +366,6 @@ CONFIG_NET=y
362# Networking options 366# Networking options
363# 367#
364CONFIG_PACKET=y 368CONFIG_PACKET=y
365# CONFIG_PACKET_MMAP is not set
366CONFIG_UNIX=y 369CONFIG_UNIX=y
367CONFIG_XFRM=y 370CONFIG_XFRM=y
368# CONFIG_XFRM_USER is not set 371# CONFIG_XFRM_USER is not set
@@ -562,6 +565,7 @@ CONFIG_HAVE_IDE=y
562# 565#
563# SCSI device support 566# SCSI device support
564# 567#
568CONFIG_SCSI_MOD=y
565# CONFIG_RAID_ATTRS is not set 569# CONFIG_RAID_ATTRS is not set
566# CONFIG_SCSI is not set 570# CONFIG_SCSI is not set
567# CONFIG_SCSI_DMA is not set 571# CONFIG_SCSI_DMA is not set
@@ -679,6 +683,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
679CONFIG_SERIAL_SH_SCI_CONSOLE=y 683CONFIG_SERIAL_SH_SCI_CONSOLE=y
680CONFIG_SERIAL_CORE=y 684CONFIG_SERIAL_CORE=y
681CONFIG_SERIAL_CORE_CONSOLE=y 685CONFIG_SERIAL_CORE_CONSOLE=y
686# CONFIG_SERIAL_TIMBERDALE is not set
682CONFIG_UNIX98_PTYS=y 687CONFIG_UNIX98_PTYS=y
683# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 688# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
684# CONFIG_LEGACY_PTYS is not set 689# CONFIG_LEGACY_PTYS is not set
@@ -798,7 +803,6 @@ CONFIG_EXT2_FS=y
798# CONFIG_EXT2_FS_XIP is not set 803# CONFIG_EXT2_FS_XIP is not set
799# CONFIG_EXT3_FS is not set 804# CONFIG_EXT3_FS is not set
800# CONFIG_EXT4_FS is not set 805# CONFIG_EXT4_FS is not set
801CONFIG_EXT4_USE_FOR_EXT23=y
802# CONFIG_REISERFS_FS is not set 806# CONFIG_REISERFS_FS is not set
803# CONFIG_JFS_FS is not set 807# CONFIG_JFS_FS is not set
804# CONFIG_FS_POSIX_ACL is not set 808# CONFIG_FS_POSIX_ACL is not set
@@ -863,6 +867,7 @@ CONFIG_JFFS2_ZLIB=y
863# CONFIG_JFFS2_LZO is not set 867# CONFIG_JFFS2_LZO is not set
864CONFIG_JFFS2_RTIME=y 868CONFIG_JFFS2_RTIME=y
865# CONFIG_JFFS2_RUBIN is not set 869# CONFIG_JFFS2_RUBIN is not set
870# CONFIG_LOGFS is not set
866# CONFIG_CRAMFS is not set 871# CONFIG_CRAMFS is not set
867# CONFIG_SQUASHFS is not set 872# CONFIG_SQUASHFS is not set
868# CONFIG_VXFS_FS is not set 873# CONFIG_VXFS_FS is not set
@@ -885,6 +890,7 @@ CONFIG_SUNRPC=y
885# CONFIG_RPCSEC_GSS_KRB5 is not set 890# CONFIG_RPCSEC_GSS_KRB5 is not set
886# CONFIG_RPCSEC_GSS_SPKM3 is not set 891# CONFIG_RPCSEC_GSS_SPKM3 is not set
887# CONFIG_SMB_FS is not set 892# CONFIG_SMB_FS is not set
893# CONFIG_CEPH_FS is not set
888# CONFIG_CIFS is not set 894# CONFIG_CIFS is not set
889# CONFIG_NCP_FS is not set 895# CONFIG_NCP_FS is not set
890# CONFIG_CODA_FS is not set 896# CONFIG_CODA_FS is not set
@@ -1026,6 +1032,7 @@ CONFIG_CRYPTO=y
1026# 1032#
1027# CONFIG_CRYPTO_ANSI_CPRNG is not set 1033# CONFIG_CRYPTO_ANSI_CPRNG is not set
1028CONFIG_CRYPTO_HW=y 1034CONFIG_CRYPTO_HW=y
1035# CONFIG_VIRTUALIZATION is not set
1029# CONFIG_BINARY_PRINTF is not set 1036# CONFIG_BINARY_PRINTF is not set
1030 1037
1031# 1038#
diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig
index cfa58199a368..4487a230466f 100644
--- a/arch/sh/configs/se7712_defconfig
+++ b/arch/sh/configs/se7712_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:44:56 2010 4# Tue May 18 18:05:15 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -12,8 +12,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_IRQ_PER_CPU=y 15CONFIG_IRQ_PER_CPU=y
16CONFIG_SPARSE_IRQ=y
17# CONFIG_GENERIC_GPIO is not set 17# CONFIG_GENERIC_GPIO is not set
18CONFIG_GENERIC_TIME=y 18CONFIG_GENERIC_TIME=y
19CONFIG_GENERIC_CLOCKEVENTS=y 19CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,6 +29,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
29CONFIG_ARCH_HAS_DEFAULT_IDLE=y 29CONFIG_ARCH_HAS_DEFAULT_IDLE=y
30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
31CONFIG_DMA_NONCOHERENT=y 31CONFIG_DMA_NONCOHERENT=y
32CONFIG_NEED_DMA_MAP_STATE=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -43,9 +44,11 @@ CONFIG_LOCALVERSION=""
43CONFIG_HAVE_KERNEL_GZIP=y 44CONFIG_HAVE_KERNEL_GZIP=y
44CONFIG_HAVE_KERNEL_BZIP2=y 45CONFIG_HAVE_KERNEL_BZIP2=y
45CONFIG_HAVE_KERNEL_LZMA=y 46CONFIG_HAVE_KERNEL_LZMA=y
47CONFIG_HAVE_KERNEL_LZO=y
46CONFIG_KERNEL_GZIP=y 48CONFIG_KERNEL_GZIP=y
47# CONFIG_KERNEL_BZIP2 is not set 49# CONFIG_KERNEL_BZIP2 is not set
48# CONFIG_KERNEL_LZMA is not set 50# CONFIG_KERNEL_LZMA is not set
51# CONFIG_KERNEL_LZO is not set
49# CONFIG_SWAP is not set 52# CONFIG_SWAP is not set
50CONFIG_SYSVIPC=y 53CONFIG_SYSVIPC=y
51CONFIG_SYSVIPC_SYSCTL=y 54CONFIG_SYSVIPC_SYSCTL=y
@@ -68,7 +71,6 @@ CONFIG_RCU_FANOUT=32
68# CONFIG_TREE_RCU_TRACE is not set 71# CONFIG_TREE_RCU_TRACE is not set
69# CONFIG_IKCONFIG is not set 72# CONFIG_IKCONFIG is not set
70CONFIG_LOG_BUF_SHIFT=14 73CONFIG_LOG_BUF_SHIFT=14
71# CONFIG_GROUP_SCHED is not set
72# CONFIG_CGROUPS is not set 74# CONFIG_CGROUPS is not set
73CONFIG_SYSFS_DEPRECATED=y 75CONFIG_SYSFS_DEPRECATED=y
74CONFIG_SYSFS_DEPRECATED_V2=y 76CONFIG_SYSFS_DEPRECATED_V2=y
@@ -102,8 +104,9 @@ CONFIG_PERF_USE_VMALLOC=y
102# 104#
103# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
104# 106#
105# CONFIG_PERF_EVENTS is not set 107CONFIG_PERF_EVENTS=y
106# CONFIG_PERF_COUNTERS is not set 108# CONFIG_PERF_COUNTERS is not set
109# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
107CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
108CONFIG_COMPAT_BRK=y 111CONFIG_COMPAT_BRK=y
109CONFIG_SLAB=y 112CONFIG_SLAB=y
@@ -119,6 +122,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_DMA_ATTRS=y 122CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
121CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
125CONFIG_HAVE_HW_BREAKPOINT=y
122 126
123# 127#
124# GCOV-based kernel profiling 128# GCOV-based kernel profiling
@@ -236,6 +240,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
236CONFIG_MAX_ACTIVE_REGIONS=1 240CONFIG_MAX_ACTIVE_REGIONS=1
237CONFIG_ARCH_POPULATES_NODE_MAP=y 241CONFIG_ARCH_POPULATES_NODE_MAP=y
238CONFIG_ARCH_SELECT_MEMORY_MODEL=y 242CONFIG_ARCH_SELECT_MEMORY_MODEL=y
243CONFIG_UNCACHED_MAPPING=y
239CONFIG_PAGE_SIZE_4KB=y 244CONFIG_PAGE_SIZE_4KB=y
240# CONFIG_PAGE_SIZE_8KB is not set 245# CONFIG_PAGE_SIZE_8KB is not set
241# CONFIG_PAGE_SIZE_16KB is not set 246# CONFIG_PAGE_SIZE_16KB is not set
@@ -251,7 +256,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
251CONFIG_SPLIT_PTLOCK_CPUS=4 256CONFIG_SPLIT_PTLOCK_CPUS=4
252# CONFIG_PHYS_ADDR_T_64BIT is not set 257# CONFIG_PHYS_ADDR_T_64BIT is not set
253CONFIG_ZONE_DMA_FLAG=0 258CONFIG_ZONE_DMA_FLAG=0
254CONFIG_NR_QUICK=2 259CONFIG_NR_QUICK=1
255# CONFIG_KSM is not set 260# CONFIG_KSM is not set
256CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
257 262
@@ -329,7 +334,6 @@ CONFIG_PREEMPT_VOLUNTARY=y
329# CONFIG_PREEMPT is not set 334# CONFIG_PREEMPT is not set
330CONFIG_GUSA=y 335CONFIG_GUSA=y
331# CONFIG_GUSA_RB is not set 336# CONFIG_GUSA_RB is not set
332# CONFIG_SPARSE_IRQ is not set
333 337
334# 338#
335# Boot options 339# Boot options
@@ -366,7 +370,6 @@ CONFIG_NET=y
366# Networking options 370# Networking options
367# 371#
368CONFIG_PACKET=y 372CONFIG_PACKET=y
369CONFIG_PACKET_MMAP=y
370CONFIG_UNIX=y 373CONFIG_UNIX=y
371CONFIG_XFRM=y 374CONFIG_XFRM=y
372# CONFIG_XFRM_USER is not set 375# CONFIG_XFRM_USER is not set
@@ -614,6 +617,7 @@ CONFIG_HAVE_IDE=y
614# 617#
615# SCSI device support 618# SCSI device support
616# 619#
620CONFIG_SCSI_MOD=y
617# CONFIG_RAID_ATTRS is not set 621# CONFIG_RAID_ATTRS is not set
618CONFIG_SCSI=y 622CONFIG_SCSI=y
619CONFIG_SCSI_DMA=y 623CONFIG_SCSI_DMA=y
@@ -754,6 +758,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
754CONFIG_SERIAL_SH_SCI_CONSOLE=y 758CONFIG_SERIAL_SH_SCI_CONSOLE=y
755CONFIG_SERIAL_CORE=y 759CONFIG_SERIAL_CORE=y
756CONFIG_SERIAL_CORE_CONSOLE=y 760CONFIG_SERIAL_CORE_CONSOLE=y
761# CONFIG_SERIAL_TIMBERDALE is not set
757CONFIG_UNIX98_PTYS=y 762CONFIG_UNIX98_PTYS=y
758# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 763# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
759# CONFIG_LEGACY_PTYS is not set 764# CONFIG_LEGACY_PTYS is not set
@@ -834,11 +839,11 @@ CONFIG_LEDS_CLASS=y
834# 839#
835# LED drivers 840# LED drivers
836# 841#
842CONFIG_LEDS_TRIGGERS=y
837 843
838# 844#
839# LED Triggers 845# LED Triggers
840# 846#
841CONFIG_LEDS_TRIGGERS=y
842# CONFIG_LEDS_TRIGGER_TIMER is not set 847# CONFIG_LEDS_TRIGGER_TIMER is not set
843# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set 848# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
844# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set 849# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
@@ -940,6 +945,7 @@ CONFIG_JFFS2_ZLIB=y
940# CONFIG_JFFS2_LZO is not set 945# CONFIG_JFFS2_LZO is not set
941CONFIG_JFFS2_RTIME=y 946CONFIG_JFFS2_RTIME=y
942# CONFIG_JFFS2_RUBIN is not set 947# CONFIG_JFFS2_RUBIN is not set
948# CONFIG_LOGFS is not set
943CONFIG_CRAMFS=y 949CONFIG_CRAMFS=y
944# CONFIG_SQUASHFS is not set 950# CONFIG_SQUASHFS is not set
945# CONFIG_VXFS_FS is not set 951# CONFIG_VXFS_FS is not set
@@ -962,6 +968,7 @@ CONFIG_SUNRPC=y
962# CONFIG_RPCSEC_GSS_KRB5 is not set 968# CONFIG_RPCSEC_GSS_KRB5 is not set
963# CONFIG_RPCSEC_GSS_SPKM3 is not set 969# CONFIG_RPCSEC_GSS_SPKM3 is not set
964# CONFIG_SMB_FS is not set 970# CONFIG_SMB_FS is not set
971# CONFIG_CEPH_FS is not set
965# CONFIG_CIFS is not set 972# CONFIG_CIFS is not set
966# CONFIG_NCP_FS is not set 973# CONFIG_NCP_FS is not set
967# CONFIG_CODA_FS is not set 974# CONFIG_CODA_FS is not set
@@ -997,6 +1004,7 @@ CONFIG_SCHED_DEBUG=y
997# CONFIG_TIMER_STATS is not set 1004# CONFIG_TIMER_STATS is not set
998# CONFIG_DEBUG_OBJECTS is not set 1005# CONFIG_DEBUG_OBJECTS is not set
999# CONFIG_DEBUG_SLAB is not set 1006# CONFIG_DEBUG_SLAB is not set
1007# CONFIG_DEBUG_KMEMLEAK is not set
1000# CONFIG_DEBUG_RT_MUTEXES is not set 1008# CONFIG_DEBUG_RT_MUTEXES is not set
1001# CONFIG_RT_MUTEX_TESTER is not set 1009# CONFIG_RT_MUTEX_TESTER is not set
1002# CONFIG_DEBUG_SPINLOCK is not set 1010# CONFIG_DEBUG_SPINLOCK is not set
@@ -1042,6 +1050,7 @@ CONFIG_FTRACE=y
1042CONFIG_BRANCH_PROFILE_NONE=y 1050CONFIG_BRANCH_PROFILE_NONE=y
1043# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1051# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1044# CONFIG_PROFILE_ALL_BRANCHES is not set 1052# CONFIG_PROFILE_ALL_BRANCHES is not set
1053# CONFIG_KSYM_TRACER is not set
1045# CONFIG_STACK_TRACER is not set 1054# CONFIG_STACK_TRACER is not set
1046# CONFIG_KMEMTRACE is not set 1055# CONFIG_KMEMTRACE is not set
1047# CONFIG_WORKQUEUE_TRACER is not set 1056# CONFIG_WORKQUEUE_TRACER is not set
@@ -1167,6 +1176,7 @@ CONFIG_CRYPTO_DEFLATE=y
1167# 1176#
1168# CONFIG_CRYPTO_ANSI_CPRNG is not set 1177# CONFIG_CRYPTO_ANSI_CPRNG is not set
1169CONFIG_CRYPTO_HW=y 1178CONFIG_CRYPTO_HW=y
1179# CONFIG_VIRTUALIZATION is not set
1170# CONFIG_BINARY_PRINTF is not set 1180# CONFIG_BINARY_PRINTF is not set
1171 1181
1172# 1182#
diff --git a/arch/sh/configs/se7721_defconfig b/arch/sh/configs/se7721_defconfig
index 201283c829a1..7c06b5c0b49b 100644
--- a/arch/sh/configs/se7721_defconfig
+++ b/arch/sh/configs/se7721_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:46:58 2010 4# Tue May 18 18:06:03 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -12,8 +12,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_IRQ_PER_CPU=y 15CONFIG_IRQ_PER_CPU=y
16CONFIG_SPARSE_IRQ=y
17# CONFIG_GENERIC_GPIO is not set 17# CONFIG_GENERIC_GPIO is not set
18CONFIG_GENERIC_TIME=y 18CONFIG_GENERIC_TIME=y
19CONFIG_GENERIC_CLOCKEVENTS=y 19CONFIG_GENERIC_CLOCKEVENTS=y
@@ -30,6 +30,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y 32CONFIG_DMA_NONCOHERENT=y
33CONFIG_NEED_DMA_MAP_STATE=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -44,9 +45,11 @@ CONFIG_LOCALVERSION=""
44CONFIG_HAVE_KERNEL_GZIP=y 45CONFIG_HAVE_KERNEL_GZIP=y
45CONFIG_HAVE_KERNEL_BZIP2=y 46CONFIG_HAVE_KERNEL_BZIP2=y
46CONFIG_HAVE_KERNEL_LZMA=y 47CONFIG_HAVE_KERNEL_LZMA=y
48CONFIG_HAVE_KERNEL_LZO=y
47CONFIG_KERNEL_GZIP=y 49CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_BZIP2 is not set 50# CONFIG_KERNEL_BZIP2 is not set
49# CONFIG_KERNEL_LZMA is not set 51# CONFIG_KERNEL_LZMA is not set
52# CONFIG_KERNEL_LZO is not set
50# CONFIG_SWAP is not set 53# CONFIG_SWAP is not set
51CONFIG_SYSVIPC=y 54CONFIG_SYSVIPC=y
52CONFIG_SYSVIPC_SYSCTL=y 55CONFIG_SYSVIPC_SYSCTL=y
@@ -69,11 +72,6 @@ CONFIG_RCU_FANOUT=32
69# CONFIG_TREE_RCU_TRACE is not set 72# CONFIG_TREE_RCU_TRACE is not set
70# CONFIG_IKCONFIG is not set 73# CONFIG_IKCONFIG is not set
71CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
72CONFIG_GROUP_SCHED=y
73CONFIG_FAIR_GROUP_SCHED=y
74# CONFIG_RT_GROUP_SCHED is not set
75CONFIG_USER_SCHED=y
76# CONFIG_CGROUP_SCHED is not set
77# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
78CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
79CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -107,8 +105,9 @@ CONFIG_PERF_USE_VMALLOC=y
107# 105#
108# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
109# 107#
110# CONFIG_PERF_EVENTS is not set 108CONFIG_PERF_EVENTS=y
111# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
110# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
112CONFIG_VM_EVENT_COUNTERS=y 111CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_COMPAT_BRK=y 112CONFIG_COMPAT_BRK=y
114CONFIG_SLAB=y 113CONFIG_SLAB=y
@@ -124,6 +123,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y 123CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 124CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 125CONFIG_HAVE_DMA_API_DEBUG=y
126CONFIG_HAVE_HW_BREAKPOINT=y
127 127
128# 128#
129# GCOV-based kernel profiling 129# GCOV-based kernel profiling
@@ -241,6 +241,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
241CONFIG_MAX_ACTIVE_REGIONS=1 241CONFIG_MAX_ACTIVE_REGIONS=1
242CONFIG_ARCH_POPULATES_NODE_MAP=y 242CONFIG_ARCH_POPULATES_NODE_MAP=y
243CONFIG_ARCH_SELECT_MEMORY_MODEL=y 243CONFIG_ARCH_SELECT_MEMORY_MODEL=y
244CONFIG_UNCACHED_MAPPING=y
244CONFIG_PAGE_SIZE_4KB=y 245CONFIG_PAGE_SIZE_4KB=y
245# CONFIG_PAGE_SIZE_8KB is not set 246# CONFIG_PAGE_SIZE_8KB is not set
246# CONFIG_PAGE_SIZE_16KB is not set 247# CONFIG_PAGE_SIZE_16KB is not set
@@ -256,7 +257,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
256CONFIG_SPLIT_PTLOCK_CPUS=4 257CONFIG_SPLIT_PTLOCK_CPUS=4
257# CONFIG_PHYS_ADDR_T_64BIT is not set 258# CONFIG_PHYS_ADDR_T_64BIT is not set
258CONFIG_ZONE_DMA_FLAG=0 259CONFIG_ZONE_DMA_FLAG=0
259CONFIG_NR_QUICK=2 260CONFIG_NR_QUICK=1
260# CONFIG_KSM is not set 261# CONFIG_KSM is not set
261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
262 263
@@ -334,7 +335,6 @@ CONFIG_PREEMPT_VOLUNTARY=y
334# CONFIG_PREEMPT is not set 335# CONFIG_PREEMPT is not set
335CONFIG_GUSA=y 336CONFIG_GUSA=y
336# CONFIG_GUSA_RB is not set 337# CONFIG_GUSA_RB is not set
337# CONFIG_SPARSE_IRQ is not set
338 338
339# 339#
340# Boot options 340# Boot options
@@ -371,7 +371,6 @@ CONFIG_NET=y
371# Networking options 371# Networking options
372# 372#
373CONFIG_PACKET=y 373CONFIG_PACKET=y
374CONFIG_PACKET_MMAP=y
375CONFIG_UNIX=y 374CONFIG_UNIX=y
376CONFIG_XFRM=y 375CONFIG_XFRM=y
377# CONFIG_XFRM_USER is not set 376# CONFIG_XFRM_USER is not set
@@ -620,6 +619,7 @@ CONFIG_HAVE_IDE=y
620# 619#
621# SCSI device support 620# SCSI device support
622# 621#
622CONFIG_SCSI_MOD=y
623# CONFIG_RAID_ATTRS is not set 623# CONFIG_RAID_ATTRS is not set
624CONFIG_SCSI=y 624CONFIG_SCSI=y
625CONFIG_SCSI_DMA=y 625CONFIG_SCSI_DMA=y
@@ -687,6 +687,7 @@ CONFIG_WLAN=y
687# CONFIG_USB_PEGASUS is not set 687# CONFIG_USB_PEGASUS is not set
688# CONFIG_USB_RTL8150 is not set 688# CONFIG_USB_RTL8150 is not set
689# CONFIG_USB_USBNET is not set 689# CONFIG_USB_USBNET is not set
690# CONFIG_USB_IPHETH is not set
690# CONFIG_WAN is not set 691# CONFIG_WAN is not set
691# CONFIG_PPP is not set 692# CONFIG_PPP is not set
692# CONFIG_SLIP is not set 693# CONFIG_SLIP is not set
@@ -764,6 +765,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
764CONFIG_SERIAL_SH_SCI_CONSOLE=y 765CONFIG_SERIAL_SH_SCI_CONSOLE=y
765CONFIG_SERIAL_CORE=y 766CONFIG_SERIAL_CORE=y
766CONFIG_SERIAL_CORE_CONSOLE=y 767CONFIG_SERIAL_CORE_CONSOLE=y
768# CONFIG_SERIAL_TIMBERDALE is not set
767CONFIG_UNIX98_PTYS=y 769CONFIG_UNIX98_PTYS=y
768# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 770# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
769# CONFIG_LEGACY_PTYS is not set 771# CONFIG_LEGACY_PTYS is not set
@@ -829,6 +831,7 @@ CONFIG_USB_HID=y
829# 831#
830# Special HID drivers 832# Special HID drivers
831# 833#
834# CONFIG_HID_3M_PCT is not set
832CONFIG_HID_A4TECH=y 835CONFIG_HID_A4TECH=y
833CONFIG_HID_APPLE=y 836CONFIG_HID_APPLE=y
834CONFIG_HID_BELKIN=y 837CONFIG_HID_BELKIN=y
@@ -844,14 +847,19 @@ CONFIG_HID_GYRATION=y
844CONFIG_HID_LOGITECH=y 847CONFIG_HID_LOGITECH=y
845# CONFIG_LOGITECH_FF is not set 848# CONFIG_LOGITECH_FF is not set
846# CONFIG_LOGIRUMBLEPAD2_FF is not set 849# CONFIG_LOGIRUMBLEPAD2_FF is not set
850# CONFIG_LOGIG940_FF is not set
847CONFIG_HID_MICROSOFT=y 851CONFIG_HID_MICROSOFT=y
852# CONFIG_HID_MOSART is not set
848CONFIG_HID_MONTEREY=y 853CONFIG_HID_MONTEREY=y
849# CONFIG_HID_NTRIG is not set 854# CONFIG_HID_NTRIG is not set
855# CONFIG_HID_ORTEK is not set
850CONFIG_HID_PANTHERLORD=y 856CONFIG_HID_PANTHERLORD=y
851# CONFIG_PANTHERLORD_FF is not set 857# CONFIG_PANTHERLORD_FF is not set
852CONFIG_HID_PETALYNX=y 858CONFIG_HID_PETALYNX=y
859# CONFIG_HID_QUANTA is not set
853CONFIG_HID_SAMSUNG=y 860CONFIG_HID_SAMSUNG=y
854CONFIG_HID_SONY=y 861CONFIG_HID_SONY=y
862# CONFIG_HID_STANTUM is not set
855CONFIG_HID_SUNPLUS=y 863CONFIG_HID_SUNPLUS=y
856# CONFIG_HID_GREENASIA is not set 864# CONFIG_HID_GREENASIA is not set
857# CONFIG_HID_SMARTJOYPLUS is not set 865# CONFIG_HID_SMARTJOYPLUS is not set
@@ -946,7 +954,6 @@ CONFIG_USB_STORAGE=y
946# CONFIG_USB_RIO500 is not set 954# CONFIG_USB_RIO500 is not set
947# CONFIG_USB_LEGOTOWER is not set 955# CONFIG_USB_LEGOTOWER is not set
948# CONFIG_USB_LCD is not set 956# CONFIG_USB_LCD is not set
949# CONFIG_USB_BERRY_CHARGE is not set
950# CONFIG_USB_LED is not set 957# CONFIG_USB_LED is not set
951# CONFIG_USB_CYPRESS_CY7C63 is not set 958# CONFIG_USB_CYPRESS_CY7C63 is not set
952# CONFIG_USB_CYTHERM is not set 959# CONFIG_USB_CYTHERM is not set
@@ -958,7 +965,6 @@ CONFIG_USB_STORAGE=y
958# CONFIG_USB_IOWARRIOR is not set 965# CONFIG_USB_IOWARRIOR is not set
959# CONFIG_USB_TEST is not set 966# CONFIG_USB_TEST is not set
960# CONFIG_USB_ISIGHTFW is not set 967# CONFIG_USB_ISIGHTFW is not set
961# CONFIG_USB_VST is not set
962# CONFIG_USB_GADGET is not set 968# CONFIG_USB_GADGET is not set
963 969
964# 970#
@@ -973,11 +979,11 @@ CONFIG_LEDS_CLASS=y
973# 979#
974# LED drivers 980# LED drivers
975# 981#
982CONFIG_LEDS_TRIGGERS=y
976 983
977# 984#
978# LED Triggers 985# LED Triggers
979# 986#
980CONFIG_LEDS_TRIGGERS=y
981# CONFIG_LEDS_TRIGGER_TIMER is not set 987# CONFIG_LEDS_TRIGGER_TIMER is not set
982# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set 988# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
983# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set 989# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
@@ -1082,6 +1088,7 @@ CONFIG_JFFS2_ZLIB=y
1082# CONFIG_JFFS2_LZO is not set 1088# CONFIG_JFFS2_LZO is not set
1083CONFIG_JFFS2_RTIME=y 1089CONFIG_JFFS2_RTIME=y
1084# CONFIG_JFFS2_RUBIN is not set 1090# CONFIG_JFFS2_RUBIN is not set
1091# CONFIG_LOGFS is not set
1085CONFIG_CRAMFS=y 1092CONFIG_CRAMFS=y
1086# CONFIG_SQUASHFS is not set 1093# CONFIG_SQUASHFS is not set
1087# CONFIG_VXFS_FS is not set 1094# CONFIG_VXFS_FS is not set
@@ -1163,6 +1170,7 @@ CONFIG_SCHED_DEBUG=y
1163# CONFIG_TIMER_STATS is not set 1170# CONFIG_TIMER_STATS is not set
1164# CONFIG_DEBUG_OBJECTS is not set 1171# CONFIG_DEBUG_OBJECTS is not set
1165# CONFIG_DEBUG_SLAB is not set 1172# CONFIG_DEBUG_SLAB is not set
1173# CONFIG_DEBUG_KMEMLEAK is not set
1166# CONFIG_DEBUG_RT_MUTEXES is not set 1174# CONFIG_DEBUG_RT_MUTEXES is not set
1167# CONFIG_RT_MUTEX_TESTER is not set 1175# CONFIG_RT_MUTEX_TESTER is not set
1168# CONFIG_DEBUG_SPINLOCK is not set 1176# CONFIG_DEBUG_SPINLOCK is not set
@@ -1208,6 +1216,7 @@ CONFIG_FTRACE=y
1208CONFIG_BRANCH_PROFILE_NONE=y 1216CONFIG_BRANCH_PROFILE_NONE=y
1209# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1217# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1210# CONFIG_PROFILE_ALL_BRANCHES is not set 1218# CONFIG_PROFILE_ALL_BRANCHES is not set
1219# CONFIG_KSYM_TRACER is not set
1211# CONFIG_STACK_TRACER is not set 1220# CONFIG_STACK_TRACER is not set
1212# CONFIG_KMEMTRACE is not set 1221# CONFIG_KMEMTRACE is not set
1213# CONFIG_WORKQUEUE_TRACER is not set 1222# CONFIG_WORKQUEUE_TRACER is not set
@@ -1333,6 +1342,7 @@ CONFIG_CRYPTO_DEFLATE=y
1333# 1342#
1334# CONFIG_CRYPTO_ANSI_CPRNG is not set 1343# CONFIG_CRYPTO_ANSI_CPRNG is not set
1335CONFIG_CRYPTO_HW=y 1344CONFIG_CRYPTO_HW=y
1345# CONFIG_VIRTUALIZATION is not set
1336# CONFIG_BINARY_PRINTF is not set 1346# CONFIG_BINARY_PRINTF is not set
1337 1347
1338# 1348#
diff --git a/arch/sh/configs/se7722_defconfig b/arch/sh/configs/se7722_defconfig
index 4a4efd261d03..42782e7ff8ba 100644
--- a/arch/sh/configs/se7722_defconfig
+++ b/arch/sh/configs/se7722_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 13:49:15 2010 4# Tue May 18 18:07:07 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -48,9 +49,11 @@ CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y 49CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y 50CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y 51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
51CONFIG_KERNEL_GZIP=y 53CONFIG_KERNEL_GZIP=y
52# CONFIG_KERNEL_BZIP2 is not set 54# CONFIG_KERNEL_BZIP2 is not set
53# CONFIG_KERNEL_LZMA is not set 55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
54CONFIG_SWAP=y 57CONFIG_SWAP=y
55CONFIG_SYSVIPC=y 58CONFIG_SYSVIPC=y
56CONFIG_SYSVIPC_SYSCTL=y 59CONFIG_SYSVIPC_SYSCTL=y
@@ -73,7 +76,6 @@ CONFIG_RCU_FANOUT=32
73CONFIG_IKCONFIG=y 76CONFIG_IKCONFIG=y
74CONFIG_IKCONFIG_PROC=y 77CONFIG_IKCONFIG_PROC=y
75CONFIG_LOG_BUF_SHIFT=14 78CONFIG_LOG_BUF_SHIFT=14
76# CONFIG_GROUP_SCHED is not set
77# CONFIG_CGROUPS is not set 79# CONFIG_CGROUPS is not set
78CONFIG_SYSFS_DEPRECATED=y 80CONFIG_SYSFS_DEPRECATED=y
79CONFIG_SYSFS_DEPRECATED_V2=y 81CONFIG_SYSFS_DEPRECATED_V2=y
@@ -84,6 +86,7 @@ CONFIG_INITRAMFS_SOURCE=""
84CONFIG_RD_GZIP=y 86CONFIG_RD_GZIP=y
85# CONFIG_RD_BZIP2 is not set 87# CONFIG_RD_BZIP2 is not set
86# CONFIG_RD_LZMA is not set 88# CONFIG_RD_LZMA is not set
89# CONFIG_RD_LZO is not set
87CONFIG_CC_OPTIMIZE_FOR_SIZE=y 90CONFIG_CC_OPTIMIZE_FOR_SIZE=y
88CONFIG_SYSCTL=y 91CONFIG_SYSCTL=y
89CONFIG_ANON_INODES=y 92CONFIG_ANON_INODES=y
@@ -122,13 +125,13 @@ CONFIG_PROFILING=y
122# CONFIG_OPROFILE is not set 125# CONFIG_OPROFILE is not set
123CONFIG_HAVE_OPROFILE=y 126CONFIG_HAVE_OPROFILE=y
124# CONFIG_KPROBES is not set 127# CONFIG_KPROBES is not set
125CONFIG_HAVE_IOREMAP_PROT=y
126CONFIG_HAVE_KPROBES=y 128CONFIG_HAVE_KPROBES=y
127CONFIG_HAVE_KRETPROBES=y 129CONFIG_HAVE_KRETPROBES=y
128CONFIG_HAVE_ARCH_TRACEHOOK=y 130CONFIG_HAVE_ARCH_TRACEHOOK=y
129CONFIG_HAVE_DMA_ATTRS=y 131CONFIG_HAVE_DMA_ATTRS=y
130CONFIG_HAVE_CLK=y 132CONFIG_HAVE_CLK=y
131CONFIG_HAVE_DMA_API_DEBUG=y 133CONFIG_HAVE_DMA_API_DEBUG=y
134CONFIG_HAVE_HW_BREAKPOINT=y
132 135
133# 136#
134# GCOV-based kernel profiling 137# GCOV-based kernel profiling
@@ -245,7 +248,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
245CONFIG_MEMORY_START=0x0c000000 248CONFIG_MEMORY_START=0x0c000000
246CONFIG_MEMORY_SIZE=0x04000000 249CONFIG_MEMORY_SIZE=0x04000000
247CONFIG_29BIT=y 250CONFIG_29BIT=y
248# CONFIG_X2TLB is not set 251CONFIG_X2TLB=y
249CONFIG_VSYSCALL=y 252CONFIG_VSYSCALL=y
250CONFIG_NUMA=y 253CONFIG_NUMA=y
251CONFIG_NODES_SHIFT=1 254CONFIG_NODES_SHIFT=1
@@ -256,6 +259,8 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
256CONFIG_ARCH_SELECT_MEMORY_MODEL=y 259CONFIG_ARCH_SELECT_MEMORY_MODEL=y
257CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 260CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
258CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 261CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
262CONFIG_IOREMAP_FIXED=y
263CONFIG_UNCACHED_MAPPING=y
259CONFIG_PAGE_SIZE_4KB=y 264CONFIG_PAGE_SIZE_4KB=y
260# CONFIG_PAGE_SIZE_8KB is not set 265# CONFIG_PAGE_SIZE_8KB is not set
261# CONFIG_PAGE_SIZE_16KB is not set 266# CONFIG_PAGE_SIZE_16KB is not set
@@ -279,7 +284,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
279CONFIG_MIGRATION=y 284CONFIG_MIGRATION=y
280# CONFIG_PHYS_ADDR_T_64BIT is not set 285# CONFIG_PHYS_ADDR_T_64BIT is not set
281CONFIG_ZONE_DMA_FLAG=0 286CONFIG_ZONE_DMA_FLAG=0
282CONFIG_NR_QUICK=2 287CONFIG_NR_QUICK=1
283# CONFIG_KSM is not set 288# CONFIG_KSM is not set
284CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 289CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
285 290
@@ -356,7 +361,7 @@ CONFIG_KEXEC=y
356# CONFIG_PREEMPT_VOLUNTARY is not set 361# CONFIG_PREEMPT_VOLUNTARY is not set
357CONFIG_PREEMPT=y 362CONFIG_PREEMPT=y
358CONFIG_GUSA=y 363CONFIG_GUSA=y
359# CONFIG_SPARSE_IRQ is not set 364# CONFIG_INTC_USERIMASK is not set
360 365
361# 366#
362# Boot options 367# Boot options
@@ -391,6 +396,7 @@ CONFIG_SUSPEND=y
391CONFIG_SUSPEND_FREEZER=y 396CONFIG_SUSPEND_FREEZER=y
392# CONFIG_HIBERNATION is not set 397# CONFIG_HIBERNATION is not set
393CONFIG_PM_RUNTIME=y 398CONFIG_PM_RUNTIME=y
399CONFIG_PM_OPS=y
394# CONFIG_CPU_IDLE is not set 400# CONFIG_CPU_IDLE is not set
395CONFIG_NET=y 401CONFIG_NET=y
396 402
@@ -398,7 +404,6 @@ CONFIG_NET=y
398# Networking options 404# Networking options
399# 405#
400CONFIG_PACKET=y 406CONFIG_PACKET=y
401CONFIG_PACKET_MMAP=y
402CONFIG_UNIX=y 407CONFIG_UNIX=y
403CONFIG_XFRM=y 408CONFIG_XFRM=y
404# CONFIG_XFRM_USER is not set 409# CONFIG_XFRM_USER is not set
@@ -519,6 +524,7 @@ CONFIG_HAVE_IDE=y
519# 524#
520# SCSI device support 525# SCSI device support
521# 526#
527CONFIG_SCSI_MOD=y
522# CONFIG_RAID_ATTRS is not set 528# CONFIG_RAID_ATTRS is not set
523CONFIG_SCSI=y 529CONFIG_SCSI=y
524CONFIG_SCSI_DMA=y 530CONFIG_SCSI_DMA=y
@@ -676,6 +682,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
676CONFIG_SERIAL_SH_SCI_CONSOLE=y 682CONFIG_SERIAL_SH_SCI_CONSOLE=y
677CONFIG_SERIAL_CORE=y 683CONFIG_SERIAL_CORE=y
678CONFIG_SERIAL_CORE_CONSOLE=y 684CONFIG_SERIAL_CORE_CONSOLE=y
685# CONFIG_SERIAL_TIMBERDALE is not set
679CONFIG_UNIX98_PTYS=y 686CONFIG_UNIX98_PTYS=y
680# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 687# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
681CONFIG_LEGACY_PTYS=y 688CONFIG_LEGACY_PTYS=y
@@ -898,6 +905,7 @@ CONFIG_MISC_FILESYSTEMS=y
898# CONFIG_BEFS_FS is not set 905# CONFIG_BEFS_FS is not set
899# CONFIG_BFS_FS is not set 906# CONFIG_BFS_FS is not set
900# CONFIG_EFS_FS is not set 907# CONFIG_EFS_FS is not set
908# CONFIG_LOGFS is not set
901# CONFIG_CRAMFS is not set 909# CONFIG_CRAMFS is not set
902# CONFIG_SQUASHFS is not set 910# CONFIG_SQUASHFS is not set
903# CONFIG_VXFS_FS is not set 911# CONFIG_VXFS_FS is not set
@@ -912,6 +920,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
912# CONFIG_NFS_FS is not set 920# CONFIG_NFS_FS is not set
913# CONFIG_NFSD is not set 921# CONFIG_NFSD is not set
914# CONFIG_SMB_FS is not set 922# CONFIG_SMB_FS is not set
923# CONFIG_CEPH_FS is not set
915# CONFIG_CIFS is not set 924# CONFIG_CIFS is not set
916# CONFIG_NCP_FS is not set 925# CONFIG_NCP_FS is not set
917# CONFIG_CODA_FS is not set 926# CONFIG_CODA_FS is not set
@@ -944,6 +953,7 @@ CONFIG_DEBUG_FS=y
944CONFIG_DEBUG_BUGVERBOSE=y 953CONFIG_DEBUG_BUGVERBOSE=y
945# CONFIG_DEBUG_MEMORY_INIT is not set 954# CONFIG_DEBUG_MEMORY_INIT is not set
946# CONFIG_RCU_CPU_STALL_DETECTOR is not set 955# CONFIG_RCU_CPU_STALL_DETECTOR is not set
956# CONFIG_LKDTM is not set
947# CONFIG_LATENCYTOP is not set 957# CONFIG_LATENCYTOP is not set
948# CONFIG_SYSCTL_SYSCALL_CHECK is not set 958# CONFIG_SYSCTL_SYSCALL_CHECK is not set
949CONFIG_HAVE_FUNCTION_TRACER=y 959CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1059,6 +1069,7 @@ CONFIG_CRYPTO=y
1059# 1069#
1060# CONFIG_CRYPTO_ANSI_CPRNG is not set 1070# CONFIG_CRYPTO_ANSI_CPRNG is not set
1061CONFIG_CRYPTO_HW=y 1071CONFIG_CRYPTO_HW=y
1072# CONFIG_VIRTUALIZATION is not set
1062# CONFIG_BINARY_PRINTF is not set 1073# CONFIG_BINARY_PRINTF is not set
1063 1074
1064# 1075#
diff --git a/arch/sh/configs/se7724_defconfig b/arch/sh/configs/se7724_defconfig
index ab371afe3595..ebb4ac4a7d8f 100644
--- a/arch/sh/configs/se7724_defconfig
+++ b/arch/sh/configs/se7724_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 14:36:56 2010 4# Tue May 18 16:55:41 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION=""
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -71,11 +74,6 @@ CONFIG_RCU_FANOUT=32
71# CONFIG_TREE_RCU_TRACE is not set 74# CONFIG_TREE_RCU_TRACE is not set
72# CONFIG_IKCONFIG is not set 75# CONFIG_IKCONFIG is not set
73CONFIG_LOG_BUF_SHIFT=14 76CONFIG_LOG_BUF_SHIFT=14
74CONFIG_GROUP_SCHED=y
75CONFIG_FAIR_GROUP_SCHED=y
76# CONFIG_RT_GROUP_SCHED is not set
77CONFIG_USER_SCHED=y
78# CONFIG_CGROUP_SCHED is not set
79# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
80CONFIG_SYSFS_DEPRECATED=y 78CONFIG_SYSFS_DEPRECATED=y
81CONFIG_SYSFS_DEPRECATED_V2=y 79CONFIG_SYSFS_DEPRECATED_V2=y
@@ -107,7 +105,7 @@ CONFIG_PERF_USE_VMALLOC=y
107# 105#
108# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
109# 107#
110# CONFIG_PERF_EVENTS is not set 108CONFIG_PERF_EVENTS=y
111# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
112CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_COMPAT_BRK=y 111CONFIG_COMPAT_BRK=y
@@ -116,13 +114,13 @@ CONFIG_SLAB=y
116# CONFIG_SLOB is not set 114# CONFIG_SLOB is not set
117# CONFIG_PROFILING is not set 115# CONFIG_PROFILING is not set
118CONFIG_HAVE_OPROFILE=y 116CONFIG_HAVE_OPROFILE=y
119CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 117CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 118CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 119CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y 120CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
123CONFIG_HAVE_HW_BREAKPOINT=y
126 124
127# 125#
128# GCOV-based kernel profiling 126# GCOV-based kernel profiling
@@ -237,8 +235,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
237CONFIG_MEMORY_START=0x08000000 235CONFIG_MEMORY_START=0x08000000
238CONFIG_MEMORY_SIZE=0x08000000 236CONFIG_MEMORY_SIZE=0x08000000
239CONFIG_29BIT=y 237CONFIG_29BIT=y
240# CONFIG_PMB_ENABLE is not set 238# CONFIG_PMB is not set
241# CONFIG_X2TLB is not set 239CONFIG_X2TLB=y
242CONFIG_VSYSCALL=y 240CONFIG_VSYSCALL=y
243CONFIG_ARCH_FLATMEM_ENABLE=y 241CONFIG_ARCH_FLATMEM_ENABLE=y
244CONFIG_ARCH_SPARSEMEM_ENABLE=y 242CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -246,6 +244,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
246CONFIG_MAX_ACTIVE_REGIONS=1 244CONFIG_MAX_ACTIVE_REGIONS=1
247CONFIG_ARCH_POPULATES_NODE_MAP=y 245CONFIG_ARCH_POPULATES_NODE_MAP=y
248CONFIG_ARCH_SELECT_MEMORY_MODEL=y 246CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_IOREMAP_FIXED=y
248CONFIG_UNCACHED_MAPPING=y
249CONFIG_PAGE_SIZE_4KB=y 249CONFIG_PAGE_SIZE_4KB=y
250# CONFIG_PAGE_SIZE_8KB is not set 250# CONFIG_PAGE_SIZE_8KB is not set
251# CONFIG_PAGE_SIZE_16KB is not set 251# CONFIG_PAGE_SIZE_16KB is not set
@@ -261,7 +261,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
261CONFIG_SPLIT_PTLOCK_CPUS=4 261CONFIG_SPLIT_PTLOCK_CPUS=4
262# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
263CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
264CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=1
265# CONFIG_KSM is not set 265# CONFIG_KSM is not set
266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
267 267
@@ -340,7 +340,7 @@ CONFIG_SECCOMP=y
340# CONFIG_PREEMPT_VOLUNTARY is not set 340# CONFIG_PREEMPT_VOLUNTARY is not set
341CONFIG_PREEMPT=y 341CONFIG_PREEMPT=y
342CONFIG_GUSA=y 342CONFIG_GUSA=y
343# CONFIG_SPARSE_IRQ is not set 343# CONFIG_INTC_USERIMASK is not set
344 344
345# 345#
346# Boot options 346# Boot options
@@ -376,6 +376,7 @@ CONFIG_SUSPEND=y
376CONFIG_SUSPEND_FREEZER=y 376CONFIG_SUSPEND_FREEZER=y
377# CONFIG_HIBERNATION is not set 377# CONFIG_HIBERNATION is not set
378CONFIG_PM_RUNTIME=y 378CONFIG_PM_RUNTIME=y
379CONFIG_PM_OPS=y
379# CONFIG_CPU_IDLE is not set 380# CONFIG_CPU_IDLE is not set
380CONFIG_NET=y 381CONFIG_NET=y
381 382
@@ -383,7 +384,6 @@ CONFIG_NET=y
383# Networking options 384# Networking options
384# 385#
385CONFIG_PACKET=y 386CONFIG_PACKET=y
386# CONFIG_PACKET_MMAP is not set
387CONFIG_UNIX=y 387CONFIG_UNIX=y
388# CONFIG_NET_KEY is not set 388# CONFIG_NET_KEY is not set
389CONFIG_INET=y 389CONFIG_INET=y
@@ -559,6 +559,7 @@ CONFIG_MTD_NAND_IDS=y
559# CONFIG_MTD_NAND_NANDSIM is not set 559# CONFIG_MTD_NAND_NANDSIM is not set
560# CONFIG_MTD_NAND_PLATFORM is not set 560# CONFIG_MTD_NAND_PLATFORM is not set
561# CONFIG_MTD_ALAUDA is not set 561# CONFIG_MTD_ALAUDA is not set
562# CONFIG_MTD_NAND_SH_FLCTL is not set
562# CONFIG_MTD_ONENAND is not set 563# CONFIG_MTD_ONENAND is not set
563 564
564# 565#
@@ -600,6 +601,7 @@ CONFIG_MISC_DEVICES=y
600# CONFIG_ICS932S401 is not set 601# CONFIG_ICS932S401 is not set
601# CONFIG_ENCLOSURE_SERVICES is not set 602# CONFIG_ENCLOSURE_SERVICES is not set
602# CONFIG_ISL29003 is not set 603# CONFIG_ISL29003 is not set
604# CONFIG_SENSORS_TSL2550 is not set
603# CONFIG_DS1682 is not set 605# CONFIG_DS1682 is not set
604# CONFIG_TI_DAC7512 is not set 606# CONFIG_TI_DAC7512 is not set
605# CONFIG_C2PORT is not set 607# CONFIG_C2PORT is not set
@@ -619,6 +621,7 @@ CONFIG_HAVE_IDE=y
619# 621#
620# SCSI device support 622# SCSI device support
621# 623#
624CONFIG_SCSI_MOD=y
622# CONFIG_RAID_ATTRS is not set 625# CONFIG_RAID_ATTRS is not set
623CONFIG_SCSI=y 626CONFIG_SCSI=y
624CONFIG_SCSI_DMA=y 627CONFIG_SCSI_DMA=y
@@ -726,6 +729,7 @@ CONFIG_WLAN=y
726# CONFIG_USB_PEGASUS is not set 729# CONFIG_USB_PEGASUS is not set
727# CONFIG_USB_RTL8150 is not set 730# CONFIG_USB_RTL8150 is not set
728# CONFIG_USB_USBNET is not set 731# CONFIG_USB_USBNET is not set
732# CONFIG_USB_IPHETH is not set
729# CONFIG_WAN is not set 733# CONFIG_WAN is not set
730# CONFIG_PPP is not set 734# CONFIG_PPP is not set
731# CONFIG_SLIP is not set 735# CONFIG_SLIP is not set
@@ -805,6 +809,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
805CONFIG_SERIAL_SH_SCI_CONSOLE=y 809CONFIG_SERIAL_SH_SCI_CONSOLE=y
806CONFIG_SERIAL_CORE=y 810CONFIG_SERIAL_CORE=y
807CONFIG_SERIAL_CORE_CONSOLE=y 811CONFIG_SERIAL_CORE_CONSOLE=y
812# CONFIG_SERIAL_TIMBERDALE is not set
808CONFIG_UNIX98_PTYS=y 813CONFIG_UNIX98_PTYS=y
809# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 814# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
810CONFIG_LEGACY_PTYS=y 815CONFIG_LEGACY_PTYS=y
@@ -833,6 +838,7 @@ CONFIG_I2C_HELPER_AUTO=y
833# CONFIG_I2C_OCORES is not set 838# CONFIG_I2C_OCORES is not set
834CONFIG_I2C_SH_MOBILE=y 839CONFIG_I2C_SH_MOBILE=y
835# CONFIG_I2C_SIMTEC is not set 840# CONFIG_I2C_SIMTEC is not set
841# CONFIG_I2C_XILINX is not set
836 842
837# 843#
838# External I2C/SMBus adapter drivers 844# External I2C/SMBus adapter drivers
@@ -846,15 +852,9 @@ CONFIG_I2C_SH_MOBILE=y
846# 852#
847# CONFIG_I2C_PCA_PLATFORM is not set 853# CONFIG_I2C_PCA_PLATFORM is not set
848# CONFIG_I2C_STUB is not set 854# CONFIG_I2C_STUB is not set
849
850#
851# Miscellaneous I2C Chip support
852#
853# CONFIG_SENSORS_TSL2550 is not set
854# CONFIG_I2C_DEBUG_CORE is not set 855# CONFIG_I2C_DEBUG_CORE is not set
855# CONFIG_I2C_DEBUG_ALGO is not set 856# CONFIG_I2C_DEBUG_ALGO is not set
856# CONFIG_I2C_DEBUG_BUS is not set 857# CONFIG_I2C_DEBUG_BUS is not set
857# CONFIG_I2C_DEBUG_CHIP is not set
858CONFIG_SPI=y 858CONFIG_SPI=y
859CONFIG_SPI_MASTER=y 859CONFIG_SPI_MASTER=y
860 860
@@ -885,13 +885,16 @@ CONFIG_GPIOLIB=y
885# 885#
886# Memory mapped GPIO expanders: 886# Memory mapped GPIO expanders:
887# 887#
888# CONFIG_GPIO_IT8761E is not set
888 889
889# 890#
890# I2C GPIO expanders: 891# I2C GPIO expanders:
891# 892#
893# CONFIG_GPIO_MAX7300 is not set
892# CONFIG_GPIO_MAX732X is not set 894# CONFIG_GPIO_MAX732X is not set
893# CONFIG_GPIO_PCA953X is not set 895# CONFIG_GPIO_PCA953X is not set
894# CONFIG_GPIO_PCF857X is not set 896# CONFIG_GPIO_PCF857X is not set
897# CONFIG_GPIO_ADP5588 is not set
895 898
896# 899#
897# PCI GPIO expanders: 900# PCI GPIO expanders:
@@ -923,22 +926,25 @@ CONFIG_SSB_POSSIBLE=y
923# Multifunction device drivers 926# Multifunction device drivers
924# 927#
925# CONFIG_MFD_CORE is not set 928# CONFIG_MFD_CORE is not set
929# CONFIG_MFD_88PM860X is not set
926# CONFIG_MFD_SM501 is not set 930# CONFIG_MFD_SM501 is not set
927# CONFIG_MFD_SH_MOBILE_SDHI is not set 931# CONFIG_MFD_SH_MOBILE_SDHI is not set
928# CONFIG_HTC_PASIC3 is not set 932# CONFIG_HTC_PASIC3 is not set
933# CONFIG_HTC_I2CPLD is not set
929# CONFIG_TPS65010 is not set 934# CONFIG_TPS65010 is not set
930# CONFIG_TWL4030_CORE is not set 935# CONFIG_TWL4030_CORE is not set
931# CONFIG_MFD_TMIO is not set 936# CONFIG_MFD_TMIO is not set
932# CONFIG_PMIC_DA903X is not set 937# CONFIG_PMIC_DA903X is not set
933# CONFIG_PMIC_ADP5520 is not set 938# CONFIG_PMIC_ADP5520 is not set
939# CONFIG_MFD_MAX8925 is not set
934# CONFIG_MFD_WM8400 is not set 940# CONFIG_MFD_WM8400 is not set
935# CONFIG_MFD_WM831X is not set 941# CONFIG_MFD_WM831X is not set
936# CONFIG_MFD_WM8350_I2C is not set 942# CONFIG_MFD_WM8350_I2C is not set
943# CONFIG_MFD_WM8994 is not set
937# CONFIG_MFD_PCF50633 is not set 944# CONFIG_MFD_PCF50633 is not set
938# CONFIG_MFD_MC13783 is not set 945# CONFIG_MFD_MC13783 is not set
939# CONFIG_AB3100_CORE is not set 946# CONFIG_AB3100_CORE is not set
940# CONFIG_EZX_PCAP is not set 947# CONFIG_EZX_PCAP is not set
941# CONFIG_MFD_88PM8607 is not set
942# CONFIG_AB4500_CORE is not set 948# CONFIG_AB4500_CORE is not set
943# CONFIG_REGULATOR is not set 949# CONFIG_REGULATOR is not set
944CONFIG_MEDIA_SUPPORT=y 950CONFIG_MEDIA_SUPPORT=y
@@ -1001,7 +1007,9 @@ CONFIG_USB_GSPCA=m
1001# CONFIG_USB_M5602 is not set 1007# CONFIG_USB_M5602 is not set
1002# CONFIG_USB_STV06XX is not set 1008# CONFIG_USB_STV06XX is not set
1003# CONFIG_USB_GL860 is not set 1009# CONFIG_USB_GL860 is not set
1010# CONFIG_USB_GSPCA_BENQ is not set
1004# CONFIG_USB_GSPCA_CONEX is not set 1011# CONFIG_USB_GSPCA_CONEX is not set
1012# CONFIG_USB_GSPCA_CPIA1 is not set
1005# CONFIG_USB_GSPCA_ETOMS is not set 1013# CONFIG_USB_GSPCA_ETOMS is not set
1006# CONFIG_USB_GSPCA_FINEPIX is not set 1014# CONFIG_USB_GSPCA_FINEPIX is not set
1007# CONFIG_USB_GSPCA_JEILINJ is not set 1015# CONFIG_USB_GSPCA_JEILINJ is not set
@@ -1009,9 +1017,11 @@ CONFIG_USB_GSPCA=m
1009# CONFIG_USB_GSPCA_MR97310A is not set 1017# CONFIG_USB_GSPCA_MR97310A is not set
1010# CONFIG_USB_GSPCA_OV519 is not set 1018# CONFIG_USB_GSPCA_OV519 is not set
1011# CONFIG_USB_GSPCA_OV534 is not set 1019# CONFIG_USB_GSPCA_OV534 is not set
1020# CONFIG_USB_GSPCA_OV534_9 is not set
1012# CONFIG_USB_GSPCA_PAC207 is not set 1021# CONFIG_USB_GSPCA_PAC207 is not set
1013# CONFIG_USB_GSPCA_PAC7302 is not set 1022# CONFIG_USB_GSPCA_PAC7302 is not set
1014# CONFIG_USB_GSPCA_PAC7311 is not set 1023# CONFIG_USB_GSPCA_PAC7311 is not set
1024# CONFIG_USB_GSPCA_SN9C2028 is not set
1015# CONFIG_USB_GSPCA_SN9C20X is not set 1025# CONFIG_USB_GSPCA_SN9C20X is not set
1016# CONFIG_USB_GSPCA_SONIXB is not set 1026# CONFIG_USB_GSPCA_SONIXB is not set
1017# CONFIG_USB_GSPCA_SONIXJ is not set 1027# CONFIG_USB_GSPCA_SONIXJ is not set
@@ -1033,6 +1043,7 @@ CONFIG_USB_GSPCA=m
1033# CONFIG_VIDEO_PVRUSB2 is not set 1043# CONFIG_VIDEO_PVRUSB2 is not set
1034# CONFIG_VIDEO_HDPVR is not set 1044# CONFIG_VIDEO_HDPVR is not set
1035# CONFIG_VIDEO_EM28XX is not set 1045# CONFIG_VIDEO_EM28XX is not set
1046# CONFIG_VIDEO_TLG2300 is not set
1036# CONFIG_VIDEO_CX231XX is not set 1047# CONFIG_VIDEO_CX231XX is not set
1037# CONFIG_VIDEO_USBVISION is not set 1048# CONFIG_VIDEO_USBVISION is not set
1038# CONFIG_USB_ET61X251 is not set 1049# CONFIG_USB_ET61X251 is not set
@@ -1147,6 +1158,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
1147# CONFIG_SND_SUPERH is not set 1158# CONFIG_SND_SUPERH is not set
1148CONFIG_SND_USB=y 1159CONFIG_SND_USB=y
1149# CONFIG_SND_USB_AUDIO is not set 1160# CONFIG_SND_USB_AUDIO is not set
1161# CONFIG_SND_USB_UA101 is not set
1150# CONFIG_SND_USB_CAIAQ is not set 1162# CONFIG_SND_USB_CAIAQ is not set
1151CONFIG_SND_SOC=m 1163CONFIG_SND_SOC=m
1152 1164
@@ -1155,6 +1167,7 @@ CONFIG_SND_SOC=m
1155# 1167#
1156CONFIG_SND_SOC_SH4_FSI=m 1168CONFIG_SND_SOC_SH4_FSI=m
1157CONFIG_SND_FSI_AK4642=y 1169CONFIG_SND_FSI_AK4642=y
1170# CONFIG_SND_FSI_DA7210 is not set
1158CONFIG_SND_SOC_I2C_AND_SPI=m 1171CONFIG_SND_SOC_I2C_AND_SPI=m
1159CONFIG_SND_SOC_ALL_CODECS=m 1172CONFIG_SND_SOC_ALL_CODECS=m
1160CONFIG_SND_SOC_WM_HUBS=m 1173CONFIG_SND_SOC_WM_HUBS=m
@@ -1167,6 +1180,7 @@ CONFIG_SND_SOC_AK4535=m
1167CONFIG_SND_SOC_AK4642=m 1180CONFIG_SND_SOC_AK4642=m
1168CONFIG_SND_SOC_AK4671=m 1181CONFIG_SND_SOC_AK4671=m
1169CONFIG_SND_SOC_CS4270=m 1182CONFIG_SND_SOC_CS4270=m
1183CONFIG_SND_SOC_DA7210=m
1170CONFIG_SND_SOC_L3=m 1184CONFIG_SND_SOC_L3=m
1171CONFIG_SND_SOC_PCM3008=m 1185CONFIG_SND_SOC_PCM3008=m
1172CONFIG_SND_SOC_SPDIF=m 1186CONFIG_SND_SOC_SPDIF=m
@@ -1189,17 +1203,21 @@ CONFIG_SND_SOC_WM8753=m
1189CONFIG_SND_SOC_WM8776=m 1203CONFIG_SND_SOC_WM8776=m
1190CONFIG_SND_SOC_WM8900=m 1204CONFIG_SND_SOC_WM8900=m
1191CONFIG_SND_SOC_WM8903=m 1205CONFIG_SND_SOC_WM8903=m
1206CONFIG_SND_SOC_WM8904=m
1192CONFIG_SND_SOC_WM8940=m 1207CONFIG_SND_SOC_WM8940=m
1208CONFIG_SND_SOC_WM8955=m
1193CONFIG_SND_SOC_WM8960=m 1209CONFIG_SND_SOC_WM8960=m
1194CONFIG_SND_SOC_WM8961=m 1210CONFIG_SND_SOC_WM8961=m
1195CONFIG_SND_SOC_WM8971=m 1211CONFIG_SND_SOC_WM8971=m
1196CONFIG_SND_SOC_WM8974=m 1212CONFIG_SND_SOC_WM8974=m
1213CONFIG_SND_SOC_WM8978=m
1197CONFIG_SND_SOC_WM8988=m 1214CONFIG_SND_SOC_WM8988=m
1198CONFIG_SND_SOC_WM8990=m 1215CONFIG_SND_SOC_WM8990=m
1199CONFIG_SND_SOC_WM8993=m 1216CONFIG_SND_SOC_WM8993=m
1200CONFIG_SND_SOC_WM9081=m 1217CONFIG_SND_SOC_WM9081=m
1201CONFIG_SND_SOC_MAX9877=m 1218CONFIG_SND_SOC_MAX9877=m
1202CONFIG_SND_SOC_TPA6130A2=m 1219CONFIG_SND_SOC_TPA6130A2=m
1220CONFIG_SND_SOC_WM2000=m
1203# CONFIG_SOUND_PRIME is not set 1221# CONFIG_SOUND_PRIME is not set
1204CONFIG_HID_SUPPORT=y 1222CONFIG_HID_SUPPORT=y
1205CONFIG_HID=y 1223CONFIG_HID=y
@@ -1215,6 +1233,7 @@ CONFIG_USB_HID=y
1215# 1233#
1216# Special HID drivers 1234# Special HID drivers
1217# 1235#
1236# CONFIG_HID_3M_PCT is not set
1218# CONFIG_HID_A4TECH is not set 1237# CONFIG_HID_A4TECH is not set
1219# CONFIG_HID_APPLE is not set 1238# CONFIG_HID_APPLE is not set
1220# CONFIG_HID_BELKIN is not set 1239# CONFIG_HID_BELKIN is not set
@@ -1229,12 +1248,16 @@ CONFIG_USB_HID=y
1229# CONFIG_HID_KENSINGTON is not set 1248# CONFIG_HID_KENSINGTON is not set
1230# CONFIG_HID_LOGITECH is not set 1249# CONFIG_HID_LOGITECH is not set
1231# CONFIG_HID_MICROSOFT is not set 1250# CONFIG_HID_MICROSOFT is not set
1251# CONFIG_HID_MOSART is not set
1232# CONFIG_HID_MONTEREY is not set 1252# CONFIG_HID_MONTEREY is not set
1233# CONFIG_HID_NTRIG is not set 1253# CONFIG_HID_NTRIG is not set
1254# CONFIG_HID_ORTEK is not set
1234# CONFIG_HID_PANTHERLORD is not set 1255# CONFIG_HID_PANTHERLORD is not set
1235# CONFIG_HID_PETALYNX is not set 1256# CONFIG_HID_PETALYNX is not set
1257# CONFIG_HID_QUANTA is not set
1236# CONFIG_HID_SAMSUNG is not set 1258# CONFIG_HID_SAMSUNG is not set
1237# CONFIG_HID_SONY is not set 1259# CONFIG_HID_SONY is not set
1260# CONFIG_HID_STANTUM is not set
1238# CONFIG_HID_SUNPLUS is not set 1261# CONFIG_HID_SUNPLUS is not set
1239# CONFIG_HID_GREENASIA is not set 1262# CONFIG_HID_GREENASIA is not set
1240# CONFIG_HID_SMARTJOYPLUS is not set 1263# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1327,7 +1350,6 @@ CONFIG_USB_STORAGE=y
1327# CONFIG_USB_RIO500 is not set 1350# CONFIG_USB_RIO500 is not set
1328# CONFIG_USB_LEGOTOWER is not set 1351# CONFIG_USB_LEGOTOWER is not set
1329# CONFIG_USB_LCD is not set 1352# CONFIG_USB_LCD is not set
1330# CONFIG_USB_BERRY_CHARGE is not set
1331# CONFIG_USB_LED is not set 1353# CONFIG_USB_LED is not set
1332# CONFIG_USB_CYPRESS_CY7C63 is not set 1354# CONFIG_USB_CYPRESS_CY7C63 is not set
1333# CONFIG_USB_CYTHERM is not set 1355# CONFIG_USB_CYTHERM is not set
@@ -1339,7 +1361,6 @@ CONFIG_USB_STORAGE=y
1339# CONFIG_USB_IOWARRIOR is not set 1361# CONFIG_USB_IOWARRIOR is not set
1340# CONFIG_USB_TEST is not set 1362# CONFIG_USB_TEST is not set
1341# CONFIG_USB_ISIGHTFW is not set 1363# CONFIG_USB_ISIGHTFW is not set
1342# CONFIG_USB_VST is not set
1343CONFIG_USB_GADGET=y 1364CONFIG_USB_GADGET=y
1344# CONFIG_USB_GADGET_DEBUG_FILES is not set 1365# CONFIG_USB_GADGET_DEBUG_FILES is not set
1345CONFIG_USB_GADGET_VBUS_DRAW=2 1366CONFIG_USB_GADGET_VBUS_DRAW=2
@@ -1378,6 +1399,7 @@ CONFIG_USB_G_SERIAL=m
1378# CONFIG_USB_MIDI_GADGET is not set 1399# CONFIG_USB_MIDI_GADGET is not set
1379# CONFIG_USB_G_PRINTER is not set 1400# CONFIG_USB_G_PRINTER is not set
1380# CONFIG_USB_CDC_COMPOSITE is not set 1401# CONFIG_USB_CDC_COMPOSITE is not set
1402# CONFIG_USB_G_NOKIA is not set
1381# CONFIG_USB_G_MULTI is not set 1403# CONFIG_USB_G_MULTI is not set
1382 1404
1383# 1405#
@@ -1401,10 +1423,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1401# MMC/SD/SDIO Host Controller Drivers 1423# MMC/SD/SDIO Host Controller Drivers
1402# 1424#
1403# CONFIG_MMC_SDHCI is not set 1425# CONFIG_MMC_SDHCI is not set
1404# CONFIG_MMC_AT91 is not set
1405# CONFIG_MMC_ATMELMCI is not set
1406CONFIG_MMC_SPI=y 1426CONFIG_MMC_SPI=y
1407# CONFIG_MMC_TMIO is not set
1408# CONFIG_MEMSTICK is not set 1427# CONFIG_MEMSTICK is not set
1409# CONFIG_NEW_LEDS is not set 1428# CONFIG_NEW_LEDS is not set
1410# CONFIG_ACCESSIBILITY is not set 1429# CONFIG_ACCESSIBILITY is not set
@@ -1480,8 +1499,6 @@ CONFIG_RTC_DRV_PCF8563=y
1480CONFIG_UIO=y 1499CONFIG_UIO=y
1481# CONFIG_UIO_PDRV is not set 1500# CONFIG_UIO_PDRV is not set
1482CONFIG_UIO_PDRV_GENIRQ=y 1501CONFIG_UIO_PDRV_GENIRQ=y
1483# CONFIG_UIO_SMX is not set
1484# CONFIG_UIO_SERCOS3 is not set
1485 1502
1486# 1503#
1487# TI VLYNQ 1504# TI VLYNQ
@@ -1566,6 +1583,7 @@ CONFIG_MISC_FILESYSTEMS=y
1566# CONFIG_EFS_FS is not set 1583# CONFIG_EFS_FS is not set
1567# CONFIG_JFFS2_FS is not set 1584# CONFIG_JFFS2_FS is not set
1568# CONFIG_UBIFS_FS is not set 1585# CONFIG_UBIFS_FS is not set
1586# CONFIG_LOGFS is not set
1569# CONFIG_CRAMFS is not set 1587# CONFIG_CRAMFS is not set
1570# CONFIG_SQUASHFS is not set 1588# CONFIG_SQUASHFS is not set
1571# CONFIG_VXFS_FS is not set 1589# CONFIG_VXFS_FS is not set
@@ -1594,6 +1612,7 @@ CONFIG_SUNRPC=y
1594# CONFIG_RPCSEC_GSS_KRB5 is not set 1612# CONFIG_RPCSEC_GSS_KRB5 is not set
1595# CONFIG_RPCSEC_GSS_SPKM3 is not set 1613# CONFIG_RPCSEC_GSS_SPKM3 is not set
1596# CONFIG_SMB_FS is not set 1614# CONFIG_SMB_FS is not set
1615# CONFIG_CEPH_FS is not set
1597# CONFIG_CIFS is not set 1616# CONFIG_CIFS is not set
1598# CONFIG_NCP_FS is not set 1617# CONFIG_NCP_FS is not set
1599# CONFIG_CODA_FS is not set 1618# CONFIG_CODA_FS is not set
@@ -1786,6 +1805,7 @@ CONFIG_CRYPTO_CBC=y
1786# 1805#
1787# CONFIG_CRYPTO_ANSI_CPRNG is not set 1806# CONFIG_CRYPTO_ANSI_CPRNG is not set
1788CONFIG_CRYPTO_HW=y 1807CONFIG_CRYPTO_HW=y
1808# CONFIG_VIRTUALIZATION is not set
1789# CONFIG_BINARY_PRINTF is not set 1809# CONFIG_BINARY_PRINTF is not set
1790 1810
1791# 1811#
diff --git a/arch/sh/configs/se7750_defconfig b/arch/sh/configs/se7750_defconfig
index b15a44e2ec43..e096c3e7e18c 100644
--- a/arch/sh/configs/se7750_defconfig
+++ b/arch/sh/configs/se7750_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 14:39:10 2010 4# Tue May 18 17:00:16 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION_AUTO=y
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51# CONFIG_SWAP is not set 54# CONFIG_SWAP is not set
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
@@ -70,7 +73,6 @@ CONFIG_RCU_FANOUT=32
70CONFIG_IKCONFIG=y 73CONFIG_IKCONFIG=y
71CONFIG_IKCONFIG_PROC=y 74CONFIG_IKCONFIG_PROC=y
72CONFIG_LOG_BUF_SHIFT=14 75CONFIG_LOG_BUF_SHIFT=14
73# CONFIG_GROUP_SCHED is not set
74# CONFIG_CGROUPS is not set 76# CONFIG_CGROUPS is not set
75CONFIG_SYSFS_DEPRECATED=y 77CONFIG_SYSFS_DEPRECATED=y
76CONFIG_SYSFS_DEPRECATED_V2=y 78CONFIG_SYSFS_DEPRECATED_V2=y
@@ -103,7 +105,7 @@ CONFIG_PERF_USE_VMALLOC=y
103# 105#
104# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
105# 107#
106# CONFIG_PERF_EVENTS is not set 108CONFIG_PERF_EVENTS=y
107# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
108CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
109CONFIG_COMPAT_BRK=y 111CONFIG_COMPAT_BRK=y
@@ -120,6 +122,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
120CONFIG_HAVE_DMA_ATTRS=y 122CONFIG_HAVE_DMA_ATTRS=y
121CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
122CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
125CONFIG_HAVE_HW_BREAKPOINT=y
123 126
124# 127#
125# GCOV-based kernel profiling 128# GCOV-based kernel profiling
@@ -237,6 +240,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
237CONFIG_MAX_ACTIVE_REGIONS=1 240CONFIG_MAX_ACTIVE_REGIONS=1
238CONFIG_ARCH_POPULATES_NODE_MAP=y 241CONFIG_ARCH_POPULATES_NODE_MAP=y
239CONFIG_ARCH_SELECT_MEMORY_MODEL=y 242CONFIG_ARCH_SELECT_MEMORY_MODEL=y
243CONFIG_UNCACHED_MAPPING=y
240CONFIG_PAGE_SIZE_4KB=y 244CONFIG_PAGE_SIZE_4KB=y
241# CONFIG_PAGE_SIZE_8KB is not set 245# CONFIG_PAGE_SIZE_8KB is not set
242# CONFIG_PAGE_SIZE_16KB is not set 246# CONFIG_PAGE_SIZE_16KB is not set
@@ -252,7 +256,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
252CONFIG_SPLIT_PTLOCK_CPUS=4 256CONFIG_SPLIT_PTLOCK_CPUS=4
253# CONFIG_PHYS_ADDR_T_64BIT is not set 257# CONFIG_PHYS_ADDR_T_64BIT is not set
254CONFIG_ZONE_DMA_FLAG=0 258CONFIG_ZONE_DMA_FLAG=0
255CONFIG_NR_QUICK=2 259CONFIG_NR_QUICK=1
256# CONFIG_KSM is not set 260# CONFIG_KSM is not set
257CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 261CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
258 262
@@ -329,7 +333,6 @@ CONFIG_PREEMPT_NONE=y
329# CONFIG_PREEMPT is not set 333# CONFIG_PREEMPT is not set
330CONFIG_GUSA=y 334CONFIG_GUSA=y
331# CONFIG_GUSA_RB is not set 335# CONFIG_GUSA_RB is not set
332# CONFIG_SPARSE_IRQ is not set
333 336
334# 337#
335# Boot options 338# Boot options
@@ -364,7 +367,6 @@ CONFIG_NET=y
364# Networking options 367# Networking options
365# 368#
366CONFIG_PACKET=y 369CONFIG_PACKET=y
367# CONFIG_PACKET_MMAP is not set
368CONFIG_UNIX=y 370CONFIG_UNIX=y
369CONFIG_XFRM=y 371CONFIG_XFRM=y
370# CONFIG_XFRM_USER is not set 372# CONFIG_XFRM_USER is not set
@@ -580,6 +582,7 @@ CONFIG_IDE_PROC_FS=y
580# 582#
581# SCSI device support 583# SCSI device support
582# 584#
585CONFIG_SCSI_MOD=y
583# CONFIG_RAID_ATTRS is not set 586# CONFIG_RAID_ATTRS is not set
584CONFIG_SCSI=y 587CONFIG_SCSI=y
585CONFIG_SCSI_DMA=y 588CONFIG_SCSI_DMA=y
@@ -698,6 +701,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
698CONFIG_SERIAL_SH_SCI_CONSOLE=y 701CONFIG_SERIAL_SH_SCI_CONSOLE=y
699CONFIG_SERIAL_CORE=y 702CONFIG_SERIAL_CORE=y
700CONFIG_SERIAL_CORE_CONSOLE=y 703CONFIG_SERIAL_CORE_CONSOLE=y
704# CONFIG_SERIAL_TIMBERDALE is not set
701CONFIG_UNIX98_PTYS=y 705CONFIG_UNIX98_PTYS=y
702# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 706# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
703CONFIG_LEGACY_PTYS=y 707CONFIG_LEGACY_PTYS=y
@@ -816,7 +820,6 @@ CONFIG_RTC_LIB=y
816# CONFIG_EXT2_FS is not set 820# CONFIG_EXT2_FS is not set
817# CONFIG_EXT3_FS is not set 821# CONFIG_EXT3_FS is not set
818# CONFIG_EXT4_FS is not set 822# CONFIG_EXT4_FS is not set
819CONFIG_EXT4_USE_FOR_EXT23=y
820# CONFIG_REISERFS_FS is not set 823# CONFIG_REISERFS_FS is not set
821# CONFIG_JFS_FS is not set 824# CONFIG_JFS_FS is not set
822# CONFIG_FS_POSIX_ACL is not set 825# CONFIG_FS_POSIX_ACL is not set
@@ -885,6 +888,7 @@ CONFIG_JFFS2_ZLIB=y
885# CONFIG_JFFS2_LZO is not set 888# CONFIG_JFFS2_LZO is not set
886CONFIG_JFFS2_RTIME=y 889CONFIG_JFFS2_RTIME=y
887# CONFIG_JFFS2_RUBIN is not set 890# CONFIG_JFFS2_RUBIN is not set
891# CONFIG_LOGFS is not set
888# CONFIG_CRAMFS is not set 892# CONFIG_CRAMFS is not set
889# CONFIG_SQUASHFS is not set 893# CONFIG_SQUASHFS is not set
890# CONFIG_VXFS_FS is not set 894# CONFIG_VXFS_FS is not set
@@ -907,6 +911,7 @@ CONFIG_SUNRPC=y
907# CONFIG_RPCSEC_GSS_KRB5 is not set 911# CONFIG_RPCSEC_GSS_KRB5 is not set
908# CONFIG_RPCSEC_GSS_SPKM3 is not set 912# CONFIG_RPCSEC_GSS_SPKM3 is not set
909# CONFIG_SMB_FS is not set 913# CONFIG_SMB_FS is not set
914# CONFIG_CEPH_FS is not set
910# CONFIG_CIFS is not set 915# CONFIG_CIFS is not set
911# CONFIG_NCP_FS is not set 916# CONFIG_NCP_FS is not set
912# CONFIG_CODA_FS is not set 917# CONFIG_CODA_FS is not set
@@ -1063,6 +1068,7 @@ CONFIG_CRYPTO=y
1063# 1068#
1064# CONFIG_CRYPTO_ANSI_CPRNG is not set 1069# CONFIG_CRYPTO_ANSI_CPRNG is not set
1065CONFIG_CRYPTO_HW=y 1070CONFIG_CRYPTO_HW=y
1071# CONFIG_VIRTUALIZATION is not set
1066# CONFIG_BINARY_PRINTF is not set 1072# CONFIG_BINARY_PRINTF is not set
1067 1073
1068# 1074#
diff --git a/arch/sh/configs/se7751_defconfig b/arch/sh/configs/se7751_defconfig
index d1effdeaa416..84d3facf6a30 100644
--- a/arch/sh/configs/se7751_defconfig
+++ b/arch/sh/configs/se7751_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 14:39:56 2010 4# Tue May 18 17:03:26 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION_AUTO=y
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51CONFIG_SWAP=y 54CONFIG_SWAP=y
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
@@ -69,7 +72,6 @@ CONFIG_RCU_FANOUT=32
69# CONFIG_TREE_RCU_TRACE is not set 72# CONFIG_TREE_RCU_TRACE is not set
70# CONFIG_IKCONFIG is not set 73# CONFIG_IKCONFIG is not set
71CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
72# CONFIG_GROUP_SCHED is not set
73# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
74CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
75CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -80,6 +82,7 @@ CONFIG_INITRAMFS_SOURCE=""
80CONFIG_RD_GZIP=y 82CONFIG_RD_GZIP=y
81# CONFIG_RD_BZIP2 is not set 83# CONFIG_RD_BZIP2 is not set
82# CONFIG_RD_LZMA is not set 84# CONFIG_RD_LZMA is not set
85# CONFIG_RD_LZO is not set
83# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 86# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
84CONFIG_SYSCTL=y 87CONFIG_SYSCTL=y
85CONFIG_ANON_INODES=y 88CONFIG_ANON_INODES=y
@@ -106,7 +109,7 @@ CONFIG_PERF_USE_VMALLOC=y
106# 109#
107# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
108# 111#
109# CONFIG_PERF_EVENTS is not set 112CONFIG_PERF_EVENTS=y
110# CONFIG_PERF_COUNTERS is not set 113# CONFIG_PERF_COUNTERS is not set
111CONFIG_VM_EVENT_COUNTERS=y 114CONFIG_VM_EVENT_COUNTERS=y
112CONFIG_COMPAT_BRK=y 115CONFIG_COMPAT_BRK=y
@@ -123,6 +126,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y 126CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 127CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 128CONFIG_HAVE_DMA_API_DEBUG=y
129CONFIG_HAVE_HW_BREAKPOINT=y
126 130
127# 131#
128# GCOV-based kernel profiling 132# GCOV-based kernel profiling
@@ -240,6 +244,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
240CONFIG_MAX_ACTIVE_REGIONS=1 244CONFIG_MAX_ACTIVE_REGIONS=1
241CONFIG_ARCH_POPULATES_NODE_MAP=y 245CONFIG_ARCH_POPULATES_NODE_MAP=y
242CONFIG_ARCH_SELECT_MEMORY_MODEL=y 246CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_UNCACHED_MAPPING=y
243CONFIG_PAGE_SIZE_4KB=y 248CONFIG_PAGE_SIZE_4KB=y
244# CONFIG_PAGE_SIZE_8KB is not set 249# CONFIG_PAGE_SIZE_8KB is not set
245# CONFIG_PAGE_SIZE_16KB is not set 250# CONFIG_PAGE_SIZE_16KB is not set
@@ -255,7 +260,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
255CONFIG_SPLIT_PTLOCK_CPUS=4 260CONFIG_SPLIT_PTLOCK_CPUS=4
256# CONFIG_PHYS_ADDR_T_64BIT is not set 261# CONFIG_PHYS_ADDR_T_64BIT is not set
257CONFIG_ZONE_DMA_FLAG=0 262CONFIG_ZONE_DMA_FLAG=0
258CONFIG_NR_QUICK=2 263CONFIG_NR_QUICK=1
259# CONFIG_KSM is not set 264# CONFIG_KSM is not set
260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 265CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
261 266
@@ -333,7 +338,6 @@ CONFIG_PREEMPT_NONE=y
333# CONFIG_PREEMPT is not set 338# CONFIG_PREEMPT is not set
334CONFIG_GUSA=y 339CONFIG_GUSA=y
335# CONFIG_GUSA_RB is not set 340# CONFIG_GUSA_RB is not set
336# CONFIG_SPARSE_IRQ is not set
337 341
338# 342#
339# Boot options 343# Boot options
@@ -369,7 +373,6 @@ CONFIG_NET=y
369# Networking options 373# Networking options
370# 374#
371CONFIG_PACKET=y 375CONFIG_PACKET=y
372# CONFIG_PACKET_MMAP is not set
373CONFIG_UNIX=y 376CONFIG_UNIX=y
374CONFIG_XFRM=y 377CONFIG_XFRM=y
375# CONFIG_XFRM_USER is not set 378# CONFIG_XFRM_USER is not set
@@ -589,6 +592,7 @@ CONFIG_HAVE_IDE=y
589# 592#
590# SCSI device support 593# SCSI device support
591# 594#
595CONFIG_SCSI_MOD=y
592# CONFIG_RAID_ATTRS is not set 596# CONFIG_RAID_ATTRS is not set
593# CONFIG_SCSI is not set 597# CONFIG_SCSI is not set
594# CONFIG_SCSI_DMA is not set 598# CONFIG_SCSI_DMA is not set
@@ -666,6 +670,7 @@ CONFIG_DEVKMEM=y
666# Non-8250 serial port support 670# Non-8250 serial port support
667# 671#
668# CONFIG_SERIAL_SH_SCI is not set 672# CONFIG_SERIAL_SH_SCI is not set
673# CONFIG_SERIAL_TIMBERDALE is not set
669CONFIG_UNIX98_PTYS=y 674CONFIG_UNIX98_PTYS=y
670# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 675# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
671CONFIG_LEGACY_PTYS=y 676CONFIG_LEGACY_PTYS=y
@@ -785,7 +790,6 @@ CONFIG_EXT2_FS=y
785# CONFIG_EXT2_FS_XIP is not set 790# CONFIG_EXT2_FS_XIP is not set
786# CONFIG_EXT3_FS is not set 791# CONFIG_EXT3_FS is not set
787# CONFIG_EXT4_FS is not set 792# CONFIG_EXT4_FS is not set
788CONFIG_EXT4_USE_FOR_EXT23=y
789# CONFIG_REISERFS_FS is not set 793# CONFIG_REISERFS_FS is not set
790# CONFIG_JFS_FS is not set 794# CONFIG_JFS_FS is not set
791# CONFIG_FS_POSIX_ACL is not set 795# CONFIG_FS_POSIX_ACL is not set
@@ -854,6 +858,7 @@ CONFIG_JFFS2_ZLIB=y
854# CONFIG_JFFS2_LZO is not set 858# CONFIG_JFFS2_LZO is not set
855CONFIG_JFFS2_RTIME=y 859CONFIG_JFFS2_RTIME=y
856# CONFIG_JFFS2_RUBIN is not set 860# CONFIG_JFFS2_RUBIN is not set
861# CONFIG_LOGFS is not set
857# CONFIG_CRAMFS is not set 862# CONFIG_CRAMFS is not set
858# CONFIG_SQUASHFS is not set 863# CONFIG_SQUASHFS is not set
859# CONFIG_VXFS_FS is not set 864# CONFIG_VXFS_FS is not set
@@ -868,6 +873,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
868# CONFIG_NFS_FS is not set 873# CONFIG_NFS_FS is not set
869# CONFIG_NFSD is not set 874# CONFIG_NFSD is not set
870# CONFIG_SMB_FS is not set 875# CONFIG_SMB_FS is not set
876# CONFIG_CEPH_FS is not set
871# CONFIG_CIFS is not set 877# CONFIG_CIFS is not set
872# CONFIG_NCP_FS is not set 878# CONFIG_NCP_FS is not set
873# CONFIG_CODA_FS is not set 879# CONFIG_CODA_FS is not set
@@ -1012,6 +1018,7 @@ CONFIG_CRYPTO=y
1012# 1018#
1013# CONFIG_CRYPTO_ANSI_CPRNG is not set 1019# CONFIG_CRYPTO_ANSI_CPRNG is not set
1014CONFIG_CRYPTO_HW=y 1020CONFIG_CRYPTO_HW=y
1021# CONFIG_VIRTUALIZATION is not set
1015# CONFIG_BINARY_PRINTF is not set 1022# CONFIG_BINARY_PRINTF is not set
1016 1023
1017# 1024#
diff --git a/arch/sh/configs/se7780_defconfig b/arch/sh/configs/se7780_defconfig
index 58533d50f06e..f0d7e679e75f 100644
--- a/arch/sh/configs/se7780_defconfig
+++ b/arch/sh/configs/se7780_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 14:40:32 2010 4# Tue May 18 17:06:12 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52# CONFIG_SWAP is not set 55# CONFIG_SWAP is not set
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54CONFIG_SYSVIPC_SYSCTL=y 57CONFIG_SYSVIPC_SYSCTL=y
@@ -100,7 +103,7 @@ CONFIG_PERF_USE_VMALLOC=y
100# 103#
101# Kernel Performance Events And Counters 104# Kernel Performance Events And Counters
102# 105#
103# CONFIG_PERF_EVENTS is not set 106CONFIG_PERF_EVENTS=y
104# CONFIG_PERF_COUNTERS is not set 107# CONFIG_PERF_COUNTERS is not set
105CONFIG_VM_EVENT_COUNTERS=y 108CONFIG_VM_EVENT_COUNTERS=y
106CONFIG_PCI_QUIRKS=y 109CONFIG_PCI_QUIRKS=y
@@ -117,6 +120,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
117CONFIG_HAVE_DMA_ATTRS=y 120CONFIG_HAVE_DMA_ATTRS=y
118CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
119CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
123CONFIG_HAVE_HW_BREAKPOINT=y
120 124
121# 125#
122# GCOV-based kernel profiling 126# GCOV-based kernel profiling
@@ -238,6 +242,7 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
238CONFIG_ARCH_SELECT_MEMORY_MODEL=y 242CONFIG_ARCH_SELECT_MEMORY_MODEL=y
239CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 243CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
240CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 244CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
245CONFIG_UNCACHED_MAPPING=y
241CONFIG_PAGE_SIZE_4KB=y 246CONFIG_PAGE_SIZE_4KB=y
242# CONFIG_PAGE_SIZE_8KB is not set 247# CONFIG_PAGE_SIZE_8KB is not set
243# CONFIG_PAGE_SIZE_16KB is not set 248# CONFIG_PAGE_SIZE_16KB is not set
@@ -253,7 +258,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
253CONFIG_MIGRATION=y 258CONFIG_MIGRATION=y
254# CONFIG_PHYS_ADDR_T_64BIT is not set 259# CONFIG_PHYS_ADDR_T_64BIT is not set
255CONFIG_ZONE_DMA_FLAG=0 260CONFIG_ZONE_DMA_FLAG=0
256CONFIG_NR_QUICK=2 261CONFIG_NR_QUICK=1
257# CONFIG_KSM is not set 262# CONFIG_KSM is not set
258CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 263CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
259 264
@@ -328,6 +333,7 @@ CONFIG_PREEMPT_NONE=y
328# CONFIG_PREEMPT_VOLUNTARY is not set 333# CONFIG_PREEMPT_VOLUNTARY is not set
329# CONFIG_PREEMPT is not set 334# CONFIG_PREEMPT is not set
330CONFIG_GUSA=y 335CONFIG_GUSA=y
336# CONFIG_INTC_USERIMASK is not set
331 337
332# 338#
333# Boot options 339# Boot options
@@ -343,9 +349,9 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
343# Bus options 349# Bus options
344# 350#
345CONFIG_PCI=y 351CONFIG_PCI=y
352CONFIG_PCI_DOMAINS=y
346# CONFIG_PCIEPORTBUS is not set 353# CONFIG_PCIEPORTBUS is not set
347# CONFIG_ARCH_SUPPORTS_MSI is not set 354# CONFIG_ARCH_SUPPORTS_MSI is not set
348CONFIG_PCI_LEGACY=y
349# CONFIG_PCI_STUB is not set 355# CONFIG_PCI_STUB is not set
350# CONFIG_PCI_IOV is not set 356# CONFIG_PCI_IOV is not set
351 357
@@ -362,7 +368,6 @@ CONFIG_NET=y
362# Networking options 368# Networking options
363# 369#
364CONFIG_PACKET=y 370CONFIG_PACKET=y
365# CONFIG_PACKET_MMAP is not set
366CONFIG_UNIX=y 371CONFIG_UNIX=y
367CONFIG_XFRM=y 372CONFIG_XFRM=y
368# CONFIG_XFRM_USER is not set 373# CONFIG_XFRM_USER is not set
@@ -571,6 +576,7 @@ CONFIG_HAVE_IDE=y
571# 576#
572# SCSI device support 577# SCSI device support
573# 578#
579CONFIG_SCSI_MOD=y
574# CONFIG_RAID_ATTRS is not set 580# CONFIG_RAID_ATTRS is not set
575CONFIG_SCSI=y 581CONFIG_SCSI=y
576CONFIG_SCSI_DMA=y 582CONFIG_SCSI_DMA=y
@@ -714,7 +720,7 @@ CONFIG_SATA_SIL=y
714# 720#
715 721
716# 722#
717# See the help texts for more information. 723# The newer stack is recommended.
718# 724#
719# CONFIG_FIREWIRE is not set 725# CONFIG_FIREWIRE is not set
720# CONFIG_IEEE1394 is not set 726# CONFIG_IEEE1394 is not set
@@ -772,6 +778,7 @@ CONFIG_NET_PCI=y
772# CONFIG_PCNET32 is not set 778# CONFIG_PCNET32 is not set
773# CONFIG_AMD8111_ETH is not set 779# CONFIG_AMD8111_ETH is not set
774# CONFIG_ADAPTEC_STARFIRE is not set 780# CONFIG_ADAPTEC_STARFIRE is not set
781# CONFIG_KSZ884X_PCI is not set
775# CONFIG_B44 is not set 782# CONFIG_B44 is not set
776# CONFIG_FORCEDETH is not set 783# CONFIG_FORCEDETH is not set
777# CONFIG_E100 is not set 784# CONFIG_E100 is not set
@@ -807,6 +814,7 @@ CONFIG_WLAN=y
807# CONFIG_USB_KAWETH is not set 814# CONFIG_USB_KAWETH is not set
808# CONFIG_USB_PEGASUS is not set 815# CONFIG_USB_PEGASUS is not set
809# CONFIG_USB_USBNET is not set 816# CONFIG_USB_USBNET is not set
817# CONFIG_USB_IPHETH is not set
810# CONFIG_WAN is not set 818# CONFIG_WAN is not set
811# CONFIG_FDDI is not set 819# CONFIG_FDDI is not set
812# CONFIG_PPP is not set 820# CONFIG_PPP is not set
@@ -878,6 +886,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
878CONFIG_SERIAL_CORE=y 886CONFIG_SERIAL_CORE=y
879CONFIG_SERIAL_CORE_CONSOLE=y 887CONFIG_SERIAL_CORE_CONSOLE=y
880# CONFIG_SERIAL_JSM is not set 888# CONFIG_SERIAL_JSM is not set
889# CONFIG_SERIAL_TIMBERDALE is not set
881CONFIG_UNIX98_PTYS=y 890CONFIG_UNIX98_PTYS=y
882# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 891# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
883# CONFIG_LEGACY_PTYS is not set 892# CONFIG_LEGACY_PTYS is not set
@@ -928,6 +937,7 @@ CONFIG_SSB_POSSIBLE=y
928# CONFIG_MFD_SH_MOBILE_SDHI is not set 937# CONFIG_MFD_SH_MOBILE_SDHI is not set
929# CONFIG_HTC_PASIC3 is not set 938# CONFIG_HTC_PASIC3 is not set
930# CONFIG_MFD_TMIO is not set 939# CONFIG_MFD_TMIO is not set
940# CONFIG_LPC_SCH is not set
931# CONFIG_REGULATOR is not set 941# CONFIG_REGULATOR is not set
932# CONFIG_MEDIA_SUPPORT is not set 942# CONFIG_MEDIA_SUPPORT is not set
933 943
@@ -935,6 +945,7 @@ CONFIG_SSB_POSSIBLE=y
935# Graphics support 945# Graphics support
936# 946#
937CONFIG_VGA_ARB=y 947CONFIG_VGA_ARB=y
948CONFIG_VGA_ARB_MAX_GPUS=16
938# CONFIG_DRM is not set 949# CONFIG_DRM is not set
939# CONFIG_VGASTATE is not set 950# CONFIG_VGASTATE is not set
940# CONFIG_VIDEO_OUTPUT_CONTROL is not set 951# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1032,6 +1043,7 @@ CONFIG_USB_HID=y
1032# 1043#
1033# Special HID drivers 1044# Special HID drivers
1034# 1045#
1046# CONFIG_HID_3M_PCT is not set
1035CONFIG_HID_A4TECH=y 1047CONFIG_HID_A4TECH=y
1036CONFIG_HID_APPLE=y 1048CONFIG_HID_APPLE=y
1037CONFIG_HID_BELKIN=y 1049CONFIG_HID_BELKIN=y
@@ -1047,14 +1059,19 @@ CONFIG_HID_GYRATION=y
1047CONFIG_HID_LOGITECH=y 1059CONFIG_HID_LOGITECH=y
1048# CONFIG_LOGITECH_FF is not set 1060# CONFIG_LOGITECH_FF is not set
1049# CONFIG_LOGIRUMBLEPAD2_FF is not set 1061# CONFIG_LOGIRUMBLEPAD2_FF is not set
1062# CONFIG_LOGIG940_FF is not set
1050CONFIG_HID_MICROSOFT=y 1063CONFIG_HID_MICROSOFT=y
1064# CONFIG_HID_MOSART is not set
1051CONFIG_HID_MONTEREY=y 1065CONFIG_HID_MONTEREY=y
1052# CONFIG_HID_NTRIG is not set 1066# CONFIG_HID_NTRIG is not set
1067# CONFIG_HID_ORTEK is not set
1053CONFIG_HID_PANTHERLORD=y 1068CONFIG_HID_PANTHERLORD=y
1054# CONFIG_PANTHERLORD_FF is not set 1069# CONFIG_PANTHERLORD_FF is not set
1055CONFIG_HID_PETALYNX=y 1070CONFIG_HID_PETALYNX=y
1071# CONFIG_HID_QUANTA is not set
1056CONFIG_HID_SAMSUNG=y 1072CONFIG_HID_SAMSUNG=y
1057CONFIG_HID_SONY=y 1073CONFIG_HID_SONY=y
1074# CONFIG_HID_STANTUM is not set
1058CONFIG_HID_SUNPLUS=y 1075CONFIG_HID_SUNPLUS=y
1059# CONFIG_HID_GREENASIA is not set 1076# CONFIG_HID_GREENASIA is not set
1060# CONFIG_HID_SMARTJOYPLUS is not set 1077# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1148,7 +1165,6 @@ CONFIG_USB_STORAGE=y
1148# CONFIG_USB_RIO500 is not set 1165# CONFIG_USB_RIO500 is not set
1149# CONFIG_USB_LEGOTOWER is not set 1166# CONFIG_USB_LEGOTOWER is not set
1150# CONFIG_USB_LCD is not set 1167# CONFIG_USB_LCD is not set
1151# CONFIG_USB_BERRY_CHARGE is not set
1152# CONFIG_USB_LED is not set 1168# CONFIG_USB_LED is not set
1153# CONFIG_USB_CYPRESS_CY7C63 is not set 1169# CONFIG_USB_CYPRESS_CY7C63 is not set
1154# CONFIG_USB_CYTHERM is not set 1170# CONFIG_USB_CYTHERM is not set
@@ -1161,7 +1177,6 @@ CONFIG_USB_STORAGE=y
1161# CONFIG_USB_IOWARRIOR is not set 1177# CONFIG_USB_IOWARRIOR is not set
1162# CONFIG_USB_TEST is not set 1178# CONFIG_USB_TEST is not set
1163# CONFIG_USB_ISIGHTFW is not set 1179# CONFIG_USB_ISIGHTFW is not set
1164# CONFIG_USB_VST is not set
1165# CONFIG_USB_GADGET is not set 1180# CONFIG_USB_GADGET is not set
1166 1181
1167# 1182#
@@ -1192,7 +1207,6 @@ CONFIG_EXT2_FS=y
1192# CONFIG_EXT2_FS_XIP is not set 1207# CONFIG_EXT2_FS_XIP is not set
1193# CONFIG_EXT3_FS is not set 1208# CONFIG_EXT3_FS is not set
1194# CONFIG_EXT4_FS is not set 1209# CONFIG_EXT4_FS is not set
1195CONFIG_EXT4_USE_FOR_EXT23=y
1196# CONFIG_REISERFS_FS is not set 1210# CONFIG_REISERFS_FS is not set
1197# CONFIG_JFS_FS is not set 1211# CONFIG_JFS_FS is not set
1198# CONFIG_FS_POSIX_ACL is not set 1212# CONFIG_FS_POSIX_ACL is not set
@@ -1211,6 +1225,7 @@ CONFIG_INOTIFY_USER=y
1211# 1225#
1212# Caches 1226# Caches
1213# 1227#
1228# CONFIG_FSCACHE is not set
1214 1229
1215# 1230#
1216# CD-ROM/DVD Filesystems 1231# CD-ROM/DVD Filesystems
@@ -1332,6 +1347,7 @@ CONFIG_DEBUG_FS=y
1332CONFIG_DEBUG_BUGVERBOSE=y 1347CONFIG_DEBUG_BUGVERBOSE=y
1333# CONFIG_DEBUG_MEMORY_INIT is not set 1348# CONFIG_DEBUG_MEMORY_INIT is not set
1334# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1349# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1350# CONFIG_LKDTM is not set
1335# CONFIG_LATENCYTOP is not set 1351# CONFIG_LATENCYTOP is not set
1336# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1352# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1337CONFIG_HAVE_FUNCTION_TRACER=y 1353CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1442,6 +1458,7 @@ CONFIG_CRYPTO=y
1442# CONFIG_CRYPTO_ANSI_CPRNG is not set 1458# CONFIG_CRYPTO_ANSI_CPRNG is not set
1443CONFIG_CRYPTO_HW=y 1459CONFIG_CRYPTO_HW=y
1444# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1460# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1461# CONFIG_VIRTUALIZATION is not set
1445# CONFIG_BINARY_PRINTF is not set 1462# CONFIG_BINARY_PRINTF is not set
1446 1463
1447# 1464#
diff --git a/arch/sh/configs/sh03_defconfig b/arch/sh/configs/sh03_defconfig
index 666fde110b27..562147d333e3 100644
--- a/arch/sh/configs/sh03_defconfig
+++ b/arch/sh/configs/sh03_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 14:41:25 2010 4# Tue May 18 17:10:00 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -48,9 +49,11 @@ CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y 49CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y 50CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y 51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
51CONFIG_KERNEL_GZIP=y 53CONFIG_KERNEL_GZIP=y
52# CONFIG_KERNEL_BZIP2 is not set 54# CONFIG_KERNEL_BZIP2 is not set
53# CONFIG_KERNEL_LZMA is not set 55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
54CONFIG_SWAP=y 57CONFIG_SWAP=y
55CONFIG_SYSVIPC=y 58CONFIG_SYSVIPC=y
56CONFIG_SYSVIPC_SYSCTL=y 59CONFIG_SYSVIPC_SYSCTL=y
@@ -73,7 +76,6 @@ CONFIG_RCU_FANOUT=32
73# CONFIG_TREE_RCU_TRACE is not set 76# CONFIG_TREE_RCU_TRACE is not set
74# CONFIG_IKCONFIG is not set 77# CONFIG_IKCONFIG is not set
75CONFIG_LOG_BUF_SHIFT=14 78CONFIG_LOG_BUF_SHIFT=14
76# CONFIG_GROUP_SCHED is not set
77# CONFIG_CGROUPS is not set 79# CONFIG_CGROUPS is not set
78CONFIG_SYSFS_DEPRECATED=y 80CONFIG_SYSFS_DEPRECATED=y
79CONFIG_SYSFS_DEPRECATED_V2=y 81CONFIG_SYSFS_DEPRECATED_V2=y
@@ -84,6 +86,7 @@ CONFIG_INITRAMFS_SOURCE=""
84CONFIG_RD_GZIP=y 86CONFIG_RD_GZIP=y
85# CONFIG_RD_BZIP2 is not set 87# CONFIG_RD_BZIP2 is not set
86# CONFIG_RD_LZMA is not set 88# CONFIG_RD_LZMA is not set
89# CONFIG_RD_LZO is not set
87CONFIG_CC_OPTIMIZE_FOR_SIZE=y 90CONFIG_CC_OPTIMIZE_FOR_SIZE=y
88CONFIG_SYSCTL=y 91CONFIG_SYSCTL=y
89CONFIG_ANON_INODES=y 92CONFIG_ANON_INODES=y
@@ -111,7 +114,6 @@ CONFIG_PERF_USE_VMALLOC=y
111# Kernel Performance Events And Counters 114# Kernel Performance Events And Counters
112# 115#
113CONFIG_PERF_EVENTS=y 116CONFIG_PERF_EVENTS=y
114CONFIG_EVENT_PROFILE=y
115# CONFIG_PERF_COUNTERS is not set 117# CONFIG_PERF_COUNTERS is not set
116CONFIG_VM_EVENT_COUNTERS=y 118CONFIG_VM_EVENT_COUNTERS=y
117CONFIG_PCI_QUIRKS=y 119CONFIG_PCI_QUIRKS=y
@@ -120,7 +122,6 @@ CONFIG_SLAB=y
120# CONFIG_SLUB is not set 122# CONFIG_SLUB is not set
121# CONFIG_SLOB is not set 123# CONFIG_SLOB is not set
122CONFIG_PROFILING=y 124CONFIG_PROFILING=y
123CONFIG_TRACEPOINTS=y
124CONFIG_OPROFILE=m 125CONFIG_OPROFILE=m
125CONFIG_HAVE_OPROFILE=y 126CONFIG_HAVE_OPROFILE=y
126# CONFIG_KPROBES is not set 127# CONFIG_KPROBES is not set
@@ -131,6 +132,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y 132CONFIG_HAVE_DMA_ATTRS=y
132CONFIG_HAVE_CLK=y 133CONFIG_HAVE_CLK=y
133CONFIG_HAVE_DMA_API_DEBUG=y 134CONFIG_HAVE_DMA_API_DEBUG=y
135CONFIG_HAVE_HW_BREAKPOINT=y
134 136
135# 137#
136# GCOV-based kernel profiling 138# GCOV-based kernel profiling
@@ -250,6 +252,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
250CONFIG_MAX_ACTIVE_REGIONS=1 252CONFIG_MAX_ACTIVE_REGIONS=1
251CONFIG_ARCH_POPULATES_NODE_MAP=y 253CONFIG_ARCH_POPULATES_NODE_MAP=y
252CONFIG_ARCH_SELECT_MEMORY_MODEL=y 254CONFIG_ARCH_SELECT_MEMORY_MODEL=y
255CONFIG_UNCACHED_MAPPING=y
253CONFIG_PAGE_SIZE_4KB=y 256CONFIG_PAGE_SIZE_4KB=y
254# CONFIG_PAGE_SIZE_8KB is not set 257# CONFIG_PAGE_SIZE_8KB is not set
255# CONFIG_PAGE_SIZE_16KB is not set 258# CONFIG_PAGE_SIZE_16KB is not set
@@ -265,7 +268,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
265CONFIG_SPLIT_PTLOCK_CPUS=4 268CONFIG_SPLIT_PTLOCK_CPUS=4
266# CONFIG_PHYS_ADDR_T_64BIT is not set 269# CONFIG_PHYS_ADDR_T_64BIT is not set
267CONFIG_ZONE_DMA_FLAG=0 270CONFIG_ZONE_DMA_FLAG=0
268CONFIG_NR_QUICK=2 271CONFIG_NR_QUICK=1
269# CONFIG_KSM is not set 272# CONFIG_KSM is not set
270CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 273CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
271 274
@@ -342,7 +345,6 @@ CONFIG_HZ=250
342CONFIG_PREEMPT=y 345CONFIG_PREEMPT=y
343CONFIG_GUSA=y 346CONFIG_GUSA=y
344# CONFIG_GUSA_RB is not set 347# CONFIG_GUSA_RB is not set
345# CONFIG_SPARSE_IRQ is not set
346 348
347# 349#
348# Boot options 350# Boot options
@@ -358,9 +360,9 @@ CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs"
358# Bus options 360# Bus options
359# 361#
360CONFIG_PCI=y 362CONFIG_PCI=y
363CONFIG_PCI_DOMAINS=y
361# CONFIG_PCIEPORTBUS is not set 364# CONFIG_PCIEPORTBUS is not set
362# CONFIG_ARCH_SUPPORTS_MSI is not set 365# CONFIG_ARCH_SUPPORTS_MSI is not set
363CONFIG_PCI_LEGACY=y
364# CONFIG_PCI_STUB is not set 366# CONFIG_PCI_STUB is not set
365# CONFIG_PCI_IOV is not set 367# CONFIG_PCI_IOV is not set
366# CONFIG_PCCARD is not set 368# CONFIG_PCCARD is not set
@@ -388,7 +390,6 @@ CONFIG_NET=y
388# Networking options 390# Networking options
389# 391#
390CONFIG_PACKET=y 392CONFIG_PACKET=y
391# CONFIG_PACKET_MMAP is not set
392CONFIG_UNIX=y 393CONFIG_UNIX=y
393CONFIG_XFRM=y 394CONFIG_XFRM=y
394# CONFIG_XFRM_USER is not set 395# CONFIG_XFRM_USER is not set
@@ -453,7 +454,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
453# Network testing 454# Network testing
454# 455#
455# CONFIG_NET_PKTGEN is not set 456# CONFIG_NET_PKTGEN is not set
456# CONFIG_NET_DROP_MONITOR is not set
457# CONFIG_HAMRADIO is not set 457# CONFIG_HAMRADIO is not set
458# CONFIG_CAN is not set 458# CONFIG_CAN is not set
459# CONFIG_IRDA is not set 459# CONFIG_IRDA is not set
@@ -574,6 +574,7 @@ CONFIG_IDE_PROC_FS=y
574# 574#
575# SCSI device support 575# SCSI device support
576# 576#
577CONFIG_SCSI_MOD=m
577# CONFIG_RAID_ATTRS is not set 578# CONFIG_RAID_ATTRS is not set
578CONFIG_SCSI=m 579CONFIG_SCSI=m
579CONFIG_SCSI_DMA=y 580CONFIG_SCSI_DMA=y
@@ -664,7 +665,7 @@ CONFIG_SCSI_LOWLEVEL=y
664# 665#
665 666
666# 667#
667# See the help texts for more information. 668# The newer stack is recommended.
668# 669#
669# CONFIG_FIREWIRE is not set 670# CONFIG_FIREWIRE is not set
670# CONFIG_IEEE1394 is not set 671# CONFIG_IEEE1394 is not set
@@ -704,6 +705,7 @@ CONFIG_NET_PCI=y
704# CONFIG_PCNET32 is not set 705# CONFIG_PCNET32 is not set
705# CONFIG_AMD8111_ETH is not set 706# CONFIG_AMD8111_ETH is not set
706# CONFIG_ADAPTEC_STARFIRE is not set 707# CONFIG_ADAPTEC_STARFIRE is not set
708# CONFIG_KSZ884X_PCI is not set
707# CONFIG_B44 is not set 709# CONFIG_B44 is not set
708# CONFIG_FORCEDETH is not set 710# CONFIG_FORCEDETH is not set
709# CONFIG_E100 is not set 711# CONFIG_E100 is not set
@@ -751,6 +753,8 @@ CONFIG_NETDEV_10000=y
751# CONFIG_CHELSIO_T1 is not set 753# CONFIG_CHELSIO_T1 is not set
752CONFIG_CHELSIO_T3_DEPENDS=y 754CONFIG_CHELSIO_T3_DEPENDS=y
753# CONFIG_CHELSIO_T3 is not set 755# CONFIG_CHELSIO_T3 is not set
756CONFIG_CHELSIO_T4_DEPENDS=y
757# CONFIG_CHELSIO_T4 is not set
754# CONFIG_ENIC is not set 758# CONFIG_ENIC is not set
755# CONFIG_IXGBE is not set 759# CONFIG_IXGBE is not set
756# CONFIG_IXGB is not set 760# CONFIG_IXGB is not set
@@ -763,6 +767,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
763# CONFIG_MLX4_CORE is not set 767# CONFIG_MLX4_CORE is not set
764# CONFIG_TEHUTI is not set 768# CONFIG_TEHUTI is not set
765# CONFIG_BNX2X is not set 769# CONFIG_BNX2X is not set
770# CONFIG_QLCNIC is not set
766# CONFIG_QLGE is not set 771# CONFIG_QLGE is not set
767# CONFIG_SFC is not set 772# CONFIG_SFC is not set
768# CONFIG_BE2NET is not set 773# CONFIG_BE2NET is not set
@@ -853,6 +858,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
853CONFIG_SERIAL_CORE=y 858CONFIG_SERIAL_CORE=y
854CONFIG_SERIAL_CORE_CONSOLE=y 859CONFIG_SERIAL_CORE_CONSOLE=y
855# CONFIG_SERIAL_JSM is not set 860# CONFIG_SERIAL_JSM is not set
861# CONFIG_SERIAL_TIMBERDALE is not set
856CONFIG_UNIX98_PTYS=y 862CONFIG_UNIX98_PTYS=y
857# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 863# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
858CONFIG_LEGACY_PTYS=y 864CONFIG_LEGACY_PTYS=y
@@ -927,6 +933,7 @@ CONFIG_SSB_POSSIBLE=y
927# CONFIG_MFD_SH_MOBILE_SDHI is not set 933# CONFIG_MFD_SH_MOBILE_SDHI is not set
928# CONFIG_HTC_PASIC3 is not set 934# CONFIG_HTC_PASIC3 is not set
929# CONFIG_MFD_TMIO is not set 935# CONFIG_MFD_TMIO is not set
936# CONFIG_LPC_SCH is not set
930# CONFIG_REGULATOR is not set 937# CONFIG_REGULATOR is not set
931# CONFIG_MEDIA_SUPPORT is not set 938# CONFIG_MEDIA_SUPPORT is not set
932 939
@@ -934,6 +941,7 @@ CONFIG_SSB_POSSIBLE=y
934# Graphics support 941# Graphics support
935# 942#
936CONFIG_VGA_ARB=y 943CONFIG_VGA_ARB=y
944CONFIG_VGA_ARB_MAX_GPUS=16
937# CONFIG_DRM is not set 945# CONFIG_DRM is not set
938# CONFIG_VGASTATE is not set 946# CONFIG_VGASTATE is not set
939# CONFIG_VIDEO_OUTPUT_CONTROL is not set 947# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1075,6 +1083,7 @@ CONFIG_MISC_FILESYSTEMS=y
1075# CONFIG_BEFS_FS is not set 1083# CONFIG_BEFS_FS is not set
1076# CONFIG_BFS_FS is not set 1084# CONFIG_BFS_FS is not set
1077# CONFIG_EFS_FS is not set 1085# CONFIG_EFS_FS is not set
1086# CONFIG_LOGFS is not set
1078# CONFIG_CRAMFS is not set 1087# CONFIG_CRAMFS is not set
1079# CONFIG_SQUASHFS is not set 1088# CONFIG_SQUASHFS is not set
1080# CONFIG_VXFS_FS is not set 1089# CONFIG_VXFS_FS is not set
@@ -1105,6 +1114,7 @@ CONFIG_SUNRPC_GSS=y
1105CONFIG_RPCSEC_GSS_KRB5=y 1114CONFIG_RPCSEC_GSS_KRB5=y
1106# CONFIG_RPCSEC_GSS_SPKM3 is not set 1115# CONFIG_RPCSEC_GSS_SPKM3 is not set
1107# CONFIG_SMB_FS is not set 1116# CONFIG_SMB_FS is not set
1117# CONFIG_CEPH_FS is not set
1108# CONFIG_CIFS is not set 1118# CONFIG_CIFS is not set
1109# CONFIG_NCP_FS is not set 1119# CONFIG_NCP_FS is not set
1110# CONFIG_CODA_FS is not set 1120# CONFIG_CODA_FS is not set
@@ -1187,13 +1197,12 @@ CONFIG_FRAME_WARN=1024
1187CONFIG_DEBUG_FS=y 1197CONFIG_DEBUG_FS=y
1188# CONFIG_HEADERS_CHECK is not set 1198# CONFIG_HEADERS_CHECK is not set
1189# CONFIG_DEBUG_KERNEL is not set 1199# CONFIG_DEBUG_KERNEL is not set
1190CONFIG_STACKTRACE=y
1191CONFIG_DEBUG_BUGVERBOSE=y 1200CONFIG_DEBUG_BUGVERBOSE=y
1192# CONFIG_DEBUG_MEMORY_INIT is not set 1201# CONFIG_DEBUG_MEMORY_INIT is not set
1193# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1202# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1203# CONFIG_LKDTM is not set
1194# CONFIG_LATENCYTOP is not set 1204# CONFIG_LATENCYTOP is not set
1195# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1205# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1196CONFIG_NOP_TRACER=y
1197CONFIG_HAVE_FUNCTION_TRACER=y 1206CONFIG_HAVE_FUNCTION_TRACER=y
1198CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1207CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1199CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1208CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1201,10 +1210,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1201CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1210CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1202CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1211CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1203CONFIG_RING_BUFFER=y 1212CONFIG_RING_BUFFER=y
1204CONFIG_EVENT_TRACING=y
1205CONFIG_CONTEXT_SWITCH_TRACER=y
1206CONFIG_RING_BUFFER_ALLOW_SWAP=y 1213CONFIG_RING_BUFFER_ALLOW_SWAP=y
1207CONFIG_TRACING=y
1208CONFIG_TRACING_SUPPORT=y 1214CONFIG_TRACING_SUPPORT=y
1209# CONFIG_FTRACE is not set 1215# CONFIG_FTRACE is not set
1210# CONFIG_DYNAMIC_DEBUG is not set 1216# CONFIG_DYNAMIC_DEBUG is not set
@@ -1323,7 +1329,8 @@ CONFIG_CRYPTO_DEFLATE=y
1323# CONFIG_CRYPTO_ANSI_CPRNG is not set 1329# CONFIG_CRYPTO_ANSI_CPRNG is not set
1324CONFIG_CRYPTO_HW=y 1330CONFIG_CRYPTO_HW=y
1325# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1331# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1326CONFIG_BINARY_PRINTF=y 1332# CONFIG_VIRTUALIZATION is not set
1333# CONFIG_BINARY_PRINTF is not set
1327 1334
1328# 1335#
1329# Library routines 1336# Library routines
diff --git a/arch/sh/configs/sh7710voipgw_defconfig b/arch/sh/configs/sh7710voipgw_defconfig
index 35a3beeba182..98485ca46390 100644
--- a/arch/sh/configs/sh7710voipgw_defconfig
+++ b/arch/sh/configs/sh7710voipgw_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 14:43:04 2010 4# Tue May 18 17:14:59 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -30,6 +30,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
30CONFIG_ARCH_HAS_DEFAULT_IDLE=y 30CONFIG_ARCH_HAS_DEFAULT_IDLE=y
31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 31CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
32CONFIG_DMA_NONCOHERENT=y 32CONFIG_DMA_NONCOHERENT=y
33CONFIG_NEED_DMA_MAP_STATE=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y 35CONFIG_CONSTRUCTORS=y
35 36
@@ -44,9 +45,11 @@ CONFIG_LOCALVERSION_AUTO=y
44CONFIG_HAVE_KERNEL_GZIP=y 45CONFIG_HAVE_KERNEL_GZIP=y
45CONFIG_HAVE_KERNEL_BZIP2=y 46CONFIG_HAVE_KERNEL_BZIP2=y
46CONFIG_HAVE_KERNEL_LZMA=y 47CONFIG_HAVE_KERNEL_LZMA=y
48CONFIG_HAVE_KERNEL_LZO=y
47CONFIG_KERNEL_GZIP=y 49CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_BZIP2 is not set 50# CONFIG_KERNEL_BZIP2 is not set
49# CONFIG_KERNEL_LZMA is not set 51# CONFIG_KERNEL_LZMA is not set
52# CONFIG_KERNEL_LZO is not set
50# CONFIG_SWAP is not set 53# CONFIG_SWAP is not set
51CONFIG_SYSVIPC=y 54CONFIG_SYSVIPC=y
52CONFIG_SYSVIPC_SYSCTL=y 55CONFIG_SYSVIPC_SYSCTL=y
@@ -68,11 +71,6 @@ CONFIG_RCU_FANOUT=32
68# CONFIG_TREE_RCU_TRACE is not set 71# CONFIG_TREE_RCU_TRACE is not set
69# CONFIG_IKCONFIG is not set 72# CONFIG_IKCONFIG is not set
70CONFIG_LOG_BUF_SHIFT=14 73CONFIG_LOG_BUF_SHIFT=14
71CONFIG_GROUP_SCHED=y
72CONFIG_FAIR_GROUP_SCHED=y
73# CONFIG_RT_GROUP_SCHED is not set
74CONFIG_USER_SCHED=y
75# CONFIG_CGROUP_SCHED is not set
76# CONFIG_CGROUPS is not set 74# CONFIG_CGROUPS is not set
77CONFIG_SYSFS_DEPRECATED=y 75CONFIG_SYSFS_DEPRECATED=y
78CONFIG_SYSFS_DEPRECATED_V2=y 76CONFIG_SYSFS_DEPRECATED_V2=y
@@ -105,7 +103,7 @@ CONFIG_PERF_USE_VMALLOC=y
105# 103#
106# Kernel Performance Events And Counters 104# Kernel Performance Events And Counters
107# 105#
108# CONFIG_PERF_EVENTS is not set 106CONFIG_PERF_EVENTS=y
109# CONFIG_PERF_COUNTERS is not set 107# CONFIG_PERF_COUNTERS is not set
110CONFIG_VM_EVENT_COUNTERS=y 108CONFIG_VM_EVENT_COUNTERS=y
111CONFIG_COMPAT_BRK=y 109CONFIG_COMPAT_BRK=y
@@ -122,6 +120,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
122CONFIG_HAVE_DMA_ATTRS=y 120CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
123CONFIG_HAVE_HW_BREAKPOINT=y
125 124
126# 125#
127# GCOV-based kernel profiling 126# GCOV-based kernel profiling
@@ -240,6 +239,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
240CONFIG_MAX_ACTIVE_REGIONS=1 239CONFIG_MAX_ACTIVE_REGIONS=1
241CONFIG_ARCH_POPULATES_NODE_MAP=y 240CONFIG_ARCH_POPULATES_NODE_MAP=y
242CONFIG_ARCH_SELECT_MEMORY_MODEL=y 241CONFIG_ARCH_SELECT_MEMORY_MODEL=y
242CONFIG_UNCACHED_MAPPING=y
243CONFIG_PAGE_SIZE_4KB=y 243CONFIG_PAGE_SIZE_4KB=y
244# CONFIG_PAGE_SIZE_8KB is not set 244# CONFIG_PAGE_SIZE_8KB is not set
245# CONFIG_PAGE_SIZE_16KB is not set 245# CONFIG_PAGE_SIZE_16KB is not set
@@ -255,7 +255,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
255CONFIG_SPLIT_PTLOCK_CPUS=4 255CONFIG_SPLIT_PTLOCK_CPUS=4
256# CONFIG_PHYS_ADDR_T_64BIT is not set 256# CONFIG_PHYS_ADDR_T_64BIT is not set
257CONFIG_ZONE_DMA_FLAG=0 257CONFIG_ZONE_DMA_FLAG=0
258CONFIG_NR_QUICK=2 258CONFIG_NR_QUICK=1
259# CONFIG_KSM is not set 259# CONFIG_KSM is not set
260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
261 261
@@ -331,7 +331,6 @@ CONFIG_PREEMPT_NONE=y
331# CONFIG_PREEMPT is not set 331# CONFIG_PREEMPT is not set
332CONFIG_GUSA=y 332CONFIG_GUSA=y
333# CONFIG_GUSA_RB is not set 333# CONFIG_GUSA_RB is not set
334# CONFIG_SPARSE_IRQ is not set
335 334
336# 335#
337# Boot options 336# Boot options
@@ -367,7 +366,6 @@ CONFIG_NET=y
367# Networking options 366# Networking options
368# 367#
369CONFIG_PACKET=y 368CONFIG_PACKET=y
370# CONFIG_PACKET_MMAP is not set
371CONFIG_UNIX=y 369CONFIG_UNIX=y
372CONFIG_XFRM=y 370CONFIG_XFRM=y
373# CONFIG_XFRM_USER is not set 371# CONFIG_XFRM_USER is not set
@@ -620,6 +618,7 @@ CONFIG_HAVE_IDE=y
620# 618#
621# SCSI device support 619# SCSI device support
622# 620#
621CONFIG_SCSI_MOD=y
623# CONFIG_RAID_ATTRS is not set 622# CONFIG_RAID_ATTRS is not set
624# CONFIG_SCSI is not set 623# CONFIG_SCSI is not set
625# CONFIG_SCSI_DMA is not set 624# CONFIG_SCSI_DMA is not set
@@ -723,6 +722,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
723CONFIG_SERIAL_SH_SCI_CONSOLE=y 722CONFIG_SERIAL_SH_SCI_CONSOLE=y
724CONFIG_SERIAL_CORE=y 723CONFIG_SERIAL_CORE=y
725CONFIG_SERIAL_CORE_CONSOLE=y 724CONFIG_SERIAL_CORE_CONSOLE=y
725# CONFIG_SERIAL_TIMBERDALE is not set
726# CONFIG_UNIX98_PTYS is not set 726# CONFIG_UNIX98_PTYS is not set
727CONFIG_LEGACY_PTYS=y 727CONFIG_LEGACY_PTYS=y
728CONFIG_LEGACY_PTY_COUNT=256 728CONFIG_LEGACY_PTY_COUNT=256
@@ -824,7 +824,6 @@ CONFIG_RTC_LIB=y
824# CONFIG_EXT2_FS is not set 824# CONFIG_EXT2_FS is not set
825# CONFIG_EXT3_FS is not set 825# CONFIG_EXT3_FS is not set
826# CONFIG_EXT4_FS is not set 826# CONFIG_EXT4_FS is not set
827CONFIG_EXT4_USE_FOR_EXT23=y
828# CONFIG_REISERFS_FS is not set 827# CONFIG_REISERFS_FS is not set
829# CONFIG_JFS_FS is not set 828# CONFIG_JFS_FS is not set
830# CONFIG_FS_POSIX_ACL is not set 829# CONFIG_FS_POSIX_ACL is not set
@@ -890,6 +889,7 @@ CONFIG_JFFS2_ZLIB=y
890# CONFIG_JFFS2_LZO is not set 889# CONFIG_JFFS2_LZO is not set
891CONFIG_JFFS2_RTIME=y 890CONFIG_JFFS2_RTIME=y
892# CONFIG_JFFS2_RUBIN is not set 891# CONFIG_JFFS2_RUBIN is not set
892# CONFIG_LOGFS is not set
893# CONFIG_CRAMFS is not set 893# CONFIG_CRAMFS is not set
894# CONFIG_SQUASHFS is not set 894# CONFIG_SQUASHFS is not set
895# CONFIG_VXFS_FS is not set 895# CONFIG_VXFS_FS is not set
@@ -904,6 +904,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
904# CONFIG_NFS_FS is not set 904# CONFIG_NFS_FS is not set
905# CONFIG_NFSD is not set 905# CONFIG_NFSD is not set
906# CONFIG_SMB_FS is not set 906# CONFIG_SMB_FS is not set
907# CONFIG_CEPH_FS is not set
907# CONFIG_CIFS is not set 908# CONFIG_CIFS is not set
908# CONFIG_NCP_FS is not set 909# CONFIG_NCP_FS is not set
909# CONFIG_CODA_FS is not set 910# CONFIG_CODA_FS is not set
@@ -934,6 +935,7 @@ CONFIG_DEBUG_FS=y
934CONFIG_DEBUG_BUGVERBOSE=y 935CONFIG_DEBUG_BUGVERBOSE=y
935# CONFIG_DEBUG_MEMORY_INIT is not set 936# CONFIG_DEBUG_MEMORY_INIT is not set
936# CONFIG_RCU_CPU_STALL_DETECTOR is not set 937# CONFIG_RCU_CPU_STALL_DETECTOR is not set
938# CONFIG_LKDTM is not set
937# CONFIG_LATENCYTOP is not set 939# CONFIG_LATENCYTOP is not set
938# CONFIG_SYSCTL_SYSCALL_CHECK is not set 940# CONFIG_SYSCTL_SYSCALL_CHECK is not set
939CONFIG_HAVE_FUNCTION_TRACER=y 941CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1049,6 +1051,7 @@ CONFIG_CRYPTO=y
1049# 1051#
1050# CONFIG_CRYPTO_ANSI_CPRNG is not set 1052# CONFIG_CRYPTO_ANSI_CPRNG is not set
1051CONFIG_CRYPTO_HW=y 1053CONFIG_CRYPTO_HW=y
1054# CONFIG_VIRTUALIZATION is not set
1052# CONFIG_BINARY_PRINTF is not set 1055# CONFIG_BINARY_PRINTF is not set
1053 1056
1054# 1057#
diff --git a/arch/sh/configs/sh7724_generic_defconfig b/arch/sh/configs/sh7724_generic_defconfig
index a3056b69d2ba..a6a9e6887ef8 100644
--- a/arch/sh/configs/sh7724_generic_defconfig
+++ b/arch/sh/configs/sh7724_generic_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:03:45 2010 4# Tue May 18 17:17:36 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION=""
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54# CONFIG_BSD_PROCESS_ACCT is not set 57# CONFIG_BSD_PROCESS_ACCT is not set
@@ -65,11 +68,6 @@ CONFIG_RCU_FANOUT=32
65# CONFIG_TREE_RCU_TRACE is not set 68# CONFIG_TREE_RCU_TRACE is not set
66# CONFIG_IKCONFIG is not set 69# CONFIG_IKCONFIG is not set
67CONFIG_LOG_BUF_SHIFT=17 70CONFIG_LOG_BUF_SHIFT=17
68CONFIG_GROUP_SCHED=y
69CONFIG_FAIR_GROUP_SCHED=y
70CONFIG_RT_GROUP_SCHED=y
71CONFIG_USER_SCHED=y
72# CONFIG_CGROUP_SCHED is not set
73CONFIG_CGROUPS=y 71CONFIG_CGROUPS=y
74# CONFIG_CGROUP_DEBUG is not set 72# CONFIG_CGROUP_DEBUG is not set
75# CONFIG_CGROUP_NS is not set 73# CONFIG_CGROUP_NS is not set
@@ -78,6 +76,7 @@ CONFIG_CGROUPS=y
78# CONFIG_CPUSETS is not set 76# CONFIG_CPUSETS is not set
79# CONFIG_CGROUP_CPUACCT is not set 77# CONFIG_CGROUP_CPUACCT is not set
80# CONFIG_RESOURCE_COUNTERS is not set 78# CONFIG_RESOURCE_COUNTERS is not set
79# CONFIG_CGROUP_SCHED is not set
81# CONFIG_RELAY is not set 80# CONFIG_RELAY is not set
82# CONFIG_NAMESPACES is not set 81# CONFIG_NAMESPACES is not set
83# CONFIG_BLK_DEV_INITRD is not set 82# CONFIG_BLK_DEV_INITRD is not set
@@ -106,7 +105,6 @@ CONFIG_PERF_USE_VMALLOC=y
106# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
107# 106#
108CONFIG_PERF_EVENTS=y 107CONFIG_PERF_EVENTS=y
109CONFIG_EVENT_PROFILE=y
110# CONFIG_PERF_COUNTERS is not set 108# CONFIG_PERF_COUNTERS is not set
111CONFIG_VM_EVENT_COUNTERS=y 109CONFIG_VM_EVENT_COUNTERS=y
112# CONFIG_COMPAT_BRK is not set 110# CONFIG_COMPAT_BRK is not set
@@ -114,21 +112,19 @@ CONFIG_VM_EVENT_COUNTERS=y
114CONFIG_SLUB=y 112CONFIG_SLUB=y
115# CONFIG_SLOB is not set 113# CONFIG_SLOB is not set
116CONFIG_PROFILING=y 114CONFIG_PROFILING=y
117CONFIG_TRACEPOINTS=y
118CONFIG_OPROFILE=y 115CONFIG_OPROFILE=y
119CONFIG_HAVE_OPROFILE=y 116CONFIG_HAVE_OPROFILE=y
120CONFIG_HAVE_IOREMAP_PROT=y
121CONFIG_HAVE_KPROBES=y 117CONFIG_HAVE_KPROBES=y
122CONFIG_HAVE_KRETPROBES=y 118CONFIG_HAVE_KRETPROBES=y
123CONFIG_HAVE_ARCH_TRACEHOOK=y 119CONFIG_HAVE_ARCH_TRACEHOOK=y
124CONFIG_HAVE_DMA_ATTRS=y 120CONFIG_HAVE_DMA_ATTRS=y
125CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
126CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
123CONFIG_HAVE_HW_BREAKPOINT=y
127 124
128# 125#
129# GCOV-based kernel profiling 126# GCOV-based kernel profiling
130# 127#
131# CONFIG_GCOV_KERNEL is not set
132# CONFIG_SLOW_WORK is not set 128# CONFIG_SLOW_WORK is not set
133CONFIG_HAVE_GENERIC_DMA_COHERENT=y 129CONFIG_HAVE_GENERIC_DMA_COHERENT=y
134CONFIG_RT_MUTEXES=y 130CONFIG_RT_MUTEXES=y
@@ -138,7 +134,6 @@ CONFIG_BLOCK=y
138CONFIG_LBDAF=y 134CONFIG_LBDAF=y
139# CONFIG_BLK_DEV_BSG is not set 135# CONFIG_BLK_DEV_BSG is not set
140# CONFIG_BLK_DEV_INTEGRITY is not set 136# CONFIG_BLK_DEV_INTEGRITY is not set
141# CONFIG_BLK_CGROUP is not set
142 137
143# 138#
144# IO Schedulers 139# IO Schedulers
@@ -235,8 +230,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
235CONFIG_MEMORY_START=0x08000000 230CONFIG_MEMORY_START=0x08000000
236CONFIG_MEMORY_SIZE=0x04000000 231CONFIG_MEMORY_SIZE=0x04000000
237CONFIG_29BIT=y 232CONFIG_29BIT=y
238# CONFIG_PMB_ENABLE is not set 233# CONFIG_PMB is not set
239# CONFIG_X2TLB is not set 234CONFIG_X2TLB=y
240CONFIG_VSYSCALL=y 235CONFIG_VSYSCALL=y
241CONFIG_ARCH_FLATMEM_ENABLE=y 236CONFIG_ARCH_FLATMEM_ENABLE=y
242CONFIG_ARCH_SPARSEMEM_ENABLE=y 237CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -246,6 +241,8 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
246CONFIG_ARCH_SELECT_MEMORY_MODEL=y 241CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 242CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
248CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 243CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
244CONFIG_IOREMAP_FIXED=y
245CONFIG_UNCACHED_MAPPING=y
249CONFIG_PAGE_SIZE_4KB=y 246CONFIG_PAGE_SIZE_4KB=y
250# CONFIG_PAGE_SIZE_8KB is not set 247# CONFIG_PAGE_SIZE_8KB is not set
251# CONFIG_PAGE_SIZE_16KB is not set 248# CONFIG_PAGE_SIZE_16KB is not set
@@ -262,7 +259,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
262CONFIG_MIGRATION=y 259CONFIG_MIGRATION=y
263# CONFIG_PHYS_ADDR_T_64BIT is not set 260# CONFIG_PHYS_ADDR_T_64BIT is not set
264CONFIG_ZONE_DMA_FLAG=0 261CONFIG_ZONE_DMA_FLAG=0
265CONFIG_NR_QUICK=2 262CONFIG_NR_QUICK=1
266# CONFIG_KSM is not set 263# CONFIG_KSM is not set
267CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 264CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
268 265
@@ -353,7 +350,7 @@ CONFIG_PREEMPT_NONE=y
353# CONFIG_PREEMPT_VOLUNTARY is not set 350# CONFIG_PREEMPT_VOLUNTARY is not set
354# CONFIG_PREEMPT is not set 351# CONFIG_PREEMPT is not set
355CONFIG_GUSA=y 352CONFIG_GUSA=y
356# CONFIG_SPARSE_IRQ is not set 353# CONFIG_INTC_USERIMASK is not set
357 354
358# 355#
359# Boot options 356# Boot options
@@ -390,6 +387,7 @@ CONFIG_HIBERNATION_NVS=y
390CONFIG_HIBERNATION=y 387CONFIG_HIBERNATION=y
391CONFIG_PM_STD_PARTITION="" 388CONFIG_PM_STD_PARTITION=""
392CONFIG_PM_RUNTIME=y 389CONFIG_PM_RUNTIME=y
390CONFIG_PM_OPS=y
393CONFIG_CPU_IDLE=y 391CONFIG_CPU_IDLE=y
394CONFIG_CPU_IDLE_GOV_LADDER=y 392CONFIG_CPU_IDLE_GOV_LADDER=y
395CONFIG_CPU_IDLE_GOV_MENU=y 393CONFIG_CPU_IDLE_GOV_MENU=y
@@ -428,6 +426,7 @@ CONFIG_HAVE_IDE=y
428# 426#
429# SCSI device support 427# SCSI device support
430# 428#
429CONFIG_SCSI_MOD=y
431# CONFIG_RAID_ATTRS is not set 430# CONFIG_RAID_ATTRS is not set
432# CONFIG_SCSI is not set 431# CONFIG_SCSI is not set
433# CONFIG_SCSI_DMA is not set 432# CONFIG_SCSI_DMA is not set
@@ -467,6 +466,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
467CONFIG_SERIAL_SH_SCI_CONSOLE=y 466CONFIG_SERIAL_SH_SCI_CONSOLE=y
468CONFIG_SERIAL_CORE=y 467CONFIG_SERIAL_CORE=y
469CONFIG_SERIAL_CORE_CONSOLE=y 468CONFIG_SERIAL_CORE_CONSOLE=y
469# CONFIG_SERIAL_TIMBERDALE is not set
470# CONFIG_UNIX98_PTYS is not set 470# CONFIG_UNIX98_PTYS is not set
471# CONFIG_LEGACY_PTYS is not set 471# CONFIG_LEGACY_PTYS is not set
472# CONFIG_IPMI_HANDLER is not set 472# CONFIG_IPMI_HANDLER is not set
@@ -491,6 +491,7 @@ CONFIG_I2C_HELPER_AUTO=y
491# CONFIG_I2C_OCORES is not set 491# CONFIG_I2C_OCORES is not set
492CONFIG_I2C_SH_MOBILE=y 492CONFIG_I2C_SH_MOBILE=y
493# CONFIG_I2C_SIMTEC is not set 493# CONFIG_I2C_SIMTEC is not set
494# CONFIG_I2C_XILINX is not set
494 495
495# 496#
496# External I2C/SMBus adapter drivers 497# External I2C/SMBus adapter drivers
@@ -502,15 +503,9 @@ CONFIG_I2C_SH_MOBILE=y
502# Other I2C/SMBus bus drivers 503# Other I2C/SMBus bus drivers
503# 504#
504# CONFIG_I2C_PCA_PLATFORM is not set 505# CONFIG_I2C_PCA_PLATFORM is not set
505
506#
507# Miscellaneous I2C Chip support
508#
509# CONFIG_SENSORS_TSL2550 is not set
510# CONFIG_I2C_DEBUG_CORE is not set 506# CONFIG_I2C_DEBUG_CORE is not set
511# CONFIG_I2C_DEBUG_ALGO is not set 507# CONFIG_I2C_DEBUG_ALGO is not set
512# CONFIG_I2C_DEBUG_BUS is not set 508# CONFIG_I2C_DEBUG_BUS is not set
513# CONFIG_I2C_DEBUG_CHIP is not set
514# CONFIG_SPI is not set 509# CONFIG_SPI is not set
515 510
516# 511#
@@ -533,6 +528,7 @@ CONFIG_SSB_POSSIBLE=y
533# Multifunction device drivers 528# Multifunction device drivers
534# 529#
535# CONFIG_MFD_CORE is not set 530# CONFIG_MFD_CORE is not set
531# CONFIG_MFD_88PM860X is not set
536# CONFIG_MFD_SM501 is not set 532# CONFIG_MFD_SM501 is not set
537# CONFIG_MFD_SH_MOBILE_SDHI is not set 533# CONFIG_MFD_SH_MOBILE_SDHI is not set
538# CONFIG_HTC_PASIC3 is not set 534# CONFIG_HTC_PASIC3 is not set
@@ -540,12 +536,13 @@ CONFIG_SSB_POSSIBLE=y
540# CONFIG_MFD_TMIO is not set 536# CONFIG_MFD_TMIO is not set
541# CONFIG_PMIC_DA903X is not set 537# CONFIG_PMIC_DA903X is not set
542# CONFIG_PMIC_ADP5520 is not set 538# CONFIG_PMIC_ADP5520 is not set
539# CONFIG_MFD_MAX8925 is not set
543# CONFIG_MFD_WM8400 is not set 540# CONFIG_MFD_WM8400 is not set
544# CONFIG_MFD_WM831X is not set 541# CONFIG_MFD_WM831X is not set
545# CONFIG_MFD_WM8350_I2C is not set 542# CONFIG_MFD_WM8350_I2C is not set
543# CONFIG_MFD_WM8994 is not set
546# CONFIG_MFD_PCF50633 is not set 544# CONFIG_MFD_PCF50633 is not set
547# CONFIG_AB3100_CORE is not set 545# CONFIG_AB3100_CORE is not set
548# CONFIG_MFD_88PM8607 is not set
549# CONFIG_REGULATOR is not set 546# CONFIG_REGULATOR is not set
550# CONFIG_MEDIA_SUPPORT is not set 547# CONFIG_MEDIA_SUPPORT is not set
551 548
@@ -629,8 +626,6 @@ CONFIG_RTC_DRV_SH=y
629CONFIG_UIO=y 626CONFIG_UIO=y
630# CONFIG_UIO_PDRV is not set 627# CONFIG_UIO_PDRV is not set
631CONFIG_UIO_PDRV_GENIRQ=y 628CONFIG_UIO_PDRV_GENIRQ=y
632# CONFIG_UIO_SMX is not set
633# CONFIG_UIO_SERCOS3 is not set
634 629
635# 630#
636# TI VLYNQ 631# TI VLYNQ
@@ -643,7 +638,6 @@ CONFIG_UIO_PDRV_GENIRQ=y
643# CONFIG_EXT2_FS is not set 638# CONFIG_EXT2_FS is not set
644# CONFIG_EXT3_FS is not set 639# CONFIG_EXT3_FS is not set
645# CONFIG_EXT4_FS is not set 640# CONFIG_EXT4_FS is not set
646CONFIG_EXT4_USE_FOR_EXT23=y
647# CONFIG_REISERFS_FS is not set 641# CONFIG_REISERFS_FS is not set
648# CONFIG_JFS_FS is not set 642# CONFIG_JFS_FS is not set
649# CONFIG_FS_POSIX_ACL is not set 643# CONFIG_FS_POSIX_ACL is not set
@@ -707,15 +701,12 @@ CONFIG_FRAME_WARN=1024
707# CONFIG_MAGIC_SYSRQ is not set 701# CONFIG_MAGIC_SYSRQ is not set
708# CONFIG_STRIP_ASM_SYMS is not set 702# CONFIG_STRIP_ASM_SYMS is not set
709# CONFIG_UNUSED_SYMBOLS is not set 703# CONFIG_UNUSED_SYMBOLS is not set
710CONFIG_DEBUG_FS=y
711# CONFIG_HEADERS_CHECK is not set 704# CONFIG_HEADERS_CHECK is not set
712# CONFIG_DEBUG_KERNEL is not set 705# CONFIG_DEBUG_KERNEL is not set
713CONFIG_STACKTRACE=y
714CONFIG_DEBUG_BUGVERBOSE=y 706CONFIG_DEBUG_BUGVERBOSE=y
715# CONFIG_DEBUG_MEMORY_INIT is not set 707# CONFIG_DEBUG_MEMORY_INIT is not set
716# CONFIG_RCU_CPU_STALL_DETECTOR is not set 708# CONFIG_RCU_CPU_STALL_DETECTOR is not set
717# CONFIG_LATENCYTOP is not set 709# CONFIG_LATENCYTOP is not set
718CONFIG_NOP_TRACER=y
719CONFIG_HAVE_FUNCTION_TRACER=y 710CONFIG_HAVE_FUNCTION_TRACER=y
720CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 711CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
721CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 712CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -723,13 +714,9 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
723CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 714CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
724CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 715CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
725CONFIG_RING_BUFFER=y 716CONFIG_RING_BUFFER=y
726CONFIG_EVENT_TRACING=y
727CONFIG_CONTEXT_SWITCH_TRACER=y
728CONFIG_RING_BUFFER_ALLOW_SWAP=y 717CONFIG_RING_BUFFER_ALLOW_SWAP=y
729CONFIG_TRACING=y
730CONFIG_TRACING_SUPPORT=y 718CONFIG_TRACING_SUPPORT=y
731# CONFIG_FTRACE is not set 719# CONFIG_FTRACE is not set
732# CONFIG_DYNAMIC_DEBUG is not set
733# CONFIG_DMA_API_DEBUG is not set 720# CONFIG_DMA_API_DEBUG is not set
734# CONFIG_SAMPLES is not set 721# CONFIG_SAMPLES is not set
735CONFIG_HAVE_ARCH_KGDB=y 722CONFIG_HAVE_ARCH_KGDB=y
@@ -747,7 +734,8 @@ CONFIG_HAVE_ARCH_KGDB=y
747CONFIG_DEFAULT_SECURITY_DAC=y 734CONFIG_DEFAULT_SECURITY_DAC=y
748CONFIG_DEFAULT_SECURITY="" 735CONFIG_DEFAULT_SECURITY=""
749# CONFIG_CRYPTO is not set 736# CONFIG_CRYPTO is not set
750CONFIG_BINARY_PRINTF=y 737# CONFIG_VIRTUALIZATION is not set
738# CONFIG_BINARY_PRINTF is not set
751 739
752# 740#
753# Library routines 741# Library routines
diff --git a/arch/sh/configs/sh7763rdp_defconfig b/arch/sh/configs/sh7763rdp_defconfig
index 04b841b29427..6f308b71f81a 100644
--- a/arch/sh/configs/sh7763rdp_defconfig
+++ b/arch/sh/configs/sh7763rdp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:05:29 2010 4# Tue May 18 17:19:21 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION_AUTO=y
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51CONFIG_SWAP=y 54CONFIG_SWAP=y
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53CONFIG_SYSVIPC_SYSCTL=y 56CONFIG_SYSVIPC_SYSCTL=y
@@ -69,11 +72,6 @@ CONFIG_RCU_FANOUT=32
69CONFIG_IKCONFIG=y 72CONFIG_IKCONFIG=y
70CONFIG_IKCONFIG_PROC=y 73CONFIG_IKCONFIG_PROC=y
71CONFIG_LOG_BUF_SHIFT=14 74CONFIG_LOG_BUF_SHIFT=14
72CONFIG_GROUP_SCHED=y
73CONFIG_FAIR_GROUP_SCHED=y
74# CONFIG_RT_GROUP_SCHED is not set
75CONFIG_USER_SCHED=y
76# CONFIG_CGROUP_SCHED is not set
77# CONFIG_CGROUPS is not set 75# CONFIG_CGROUPS is not set
78CONFIG_SYSFS_DEPRECATED=y 76CONFIG_SYSFS_DEPRECATED=y
79CONFIG_SYSFS_DEPRECATED_V2=y 77CONFIG_SYSFS_DEPRECATED_V2=y
@@ -112,7 +110,6 @@ CONFIG_PERF_USE_VMALLOC=y
112# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
113# 111#
114CONFIG_PERF_EVENTS=y 112CONFIG_PERF_EVENTS=y
115CONFIG_EVENT_PROFILE=y
116# CONFIG_PERF_COUNTERS is not set 113# CONFIG_PERF_COUNTERS is not set
117CONFIG_VM_EVENT_COUNTERS=y 114CONFIG_VM_EVENT_COUNTERS=y
118CONFIG_COMPAT_BRK=y 115CONFIG_COMPAT_BRK=y
@@ -120,7 +117,6 @@ CONFIG_SLAB=y
120# CONFIG_SLUB is not set 117# CONFIG_SLUB is not set
121# CONFIG_SLOB is not set 118# CONFIG_SLOB is not set
122CONFIG_PROFILING=y 119CONFIG_PROFILING=y
123CONFIG_TRACEPOINTS=y
124CONFIG_OPROFILE=y 120CONFIG_OPROFILE=y
125CONFIG_HAVE_OPROFILE=y 121CONFIG_HAVE_OPROFILE=y
126# CONFIG_KPROBES is not set 122# CONFIG_KPROBES is not set
@@ -131,6 +127,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y 127CONFIG_HAVE_DMA_ATTRS=y
132CONFIG_HAVE_CLK=y 128CONFIG_HAVE_CLK=y
133CONFIG_HAVE_DMA_API_DEBUG=y 129CONFIG_HAVE_DMA_API_DEBUG=y
130CONFIG_HAVE_HW_BREAKPOINT=y
134 131
135# 132#
136# GCOV-based kernel profiling 133# GCOV-based kernel profiling
@@ -243,7 +240,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
243CONFIG_MEMORY_START=0x0c000000 240CONFIG_MEMORY_START=0x0c000000
244CONFIG_MEMORY_SIZE=0x04000000 241CONFIG_MEMORY_SIZE=0x04000000
245CONFIG_29BIT=y 242CONFIG_29BIT=y
246# CONFIG_PMB_ENABLE is not set 243# CONFIG_PMB is not set
247CONFIG_VSYSCALL=y 244CONFIG_VSYSCALL=y
248CONFIG_ARCH_FLATMEM_ENABLE=y 245CONFIG_ARCH_FLATMEM_ENABLE=y
249CONFIG_ARCH_SPARSEMEM_ENABLE=y 246CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -253,6 +250,7 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
253CONFIG_ARCH_SELECT_MEMORY_MODEL=y 250CONFIG_ARCH_SELECT_MEMORY_MODEL=y
254CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 251CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
255CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 252CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
253CONFIG_UNCACHED_MAPPING=y
256CONFIG_PAGE_SIZE_4KB=y 254CONFIG_PAGE_SIZE_4KB=y
257# CONFIG_PAGE_SIZE_8KB is not set 255# CONFIG_PAGE_SIZE_8KB is not set
258# CONFIG_PAGE_SIZE_16KB is not set 256# CONFIG_PAGE_SIZE_16KB is not set
@@ -269,7 +267,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
269CONFIG_MIGRATION=y 267CONFIG_MIGRATION=y
270# CONFIG_PHYS_ADDR_T_64BIT is not set 268# CONFIG_PHYS_ADDR_T_64BIT is not set
271CONFIG_ZONE_DMA_FLAG=0 269CONFIG_ZONE_DMA_FLAG=0
272CONFIG_NR_QUICK=2 270CONFIG_NR_QUICK=1
273# CONFIG_KSM is not set 271# CONFIG_KSM is not set
274CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 272CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
275 273
@@ -344,7 +342,7 @@ CONFIG_PREEMPT_NONE=y
344# CONFIG_PREEMPT_VOLUNTARY is not set 342# CONFIG_PREEMPT_VOLUNTARY is not set
345# CONFIG_PREEMPT is not set 343# CONFIG_PREEMPT is not set
346CONFIG_GUSA=y 344CONFIG_GUSA=y
347# CONFIG_SPARSE_IRQ is not set 345# CONFIG_INTC_USERIMASK is not set
348 346
349# 347#
350# Boot options 348# Boot options
@@ -381,7 +379,6 @@ CONFIG_NET=y
381# Networking options 379# Networking options
382# 380#
383CONFIG_PACKET=y 381CONFIG_PACKET=y
384# CONFIG_PACKET_MMAP is not set
385CONFIG_UNIX=y 382CONFIG_UNIX=y
386CONFIG_XFRM=y 383CONFIG_XFRM=y
387# CONFIG_XFRM_USER is not set 384# CONFIG_XFRM_USER is not set
@@ -444,7 +441,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
444# Network testing 441# Network testing
445# 442#
446# CONFIG_NET_PKTGEN is not set 443# CONFIG_NET_PKTGEN is not set
447# CONFIG_NET_DROP_MONITOR is not set
448# CONFIG_HAMRADIO is not set 444# CONFIG_HAMRADIO is not set
449# CONFIG_CAN is not set 445# CONFIG_CAN is not set
450# CONFIG_IRDA is not set 446# CONFIG_IRDA is not set
@@ -585,6 +581,7 @@ CONFIG_HAVE_IDE=y
585# 581#
586# SCSI device support 582# SCSI device support
587# 583#
584CONFIG_SCSI_MOD=y
588# CONFIG_RAID_ATTRS is not set 585# CONFIG_RAID_ATTRS is not set
589CONFIG_SCSI=y 586CONFIG_SCSI=y
590CONFIG_SCSI_DMA=y 587CONFIG_SCSI_DMA=y
@@ -689,6 +686,7 @@ CONFIG_WLAN=y
689# CONFIG_USB_PEGASUS is not set 686# CONFIG_USB_PEGASUS is not set
690# CONFIG_USB_RTL8150 is not set 687# CONFIG_USB_RTL8150 is not set
691# CONFIG_USB_USBNET is not set 688# CONFIG_USB_USBNET is not set
689# CONFIG_USB_IPHETH is not set
692# CONFIG_WAN is not set 690# CONFIG_WAN is not set
693# CONFIG_PPP is not set 691# CONFIG_PPP is not set
694# CONFIG_SLIP is not set 692# CONFIG_SLIP is not set
@@ -754,6 +752,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
754CONFIG_SERIAL_SH_SCI_CONSOLE=y 752CONFIG_SERIAL_SH_SCI_CONSOLE=y
755CONFIG_SERIAL_CORE=y 753CONFIG_SERIAL_CORE=y
756CONFIG_SERIAL_CORE_CONSOLE=y 754CONFIG_SERIAL_CORE_CONSOLE=y
755# CONFIG_SERIAL_TIMBERDALE is not set
757CONFIG_UNIX98_PTYS=y 756CONFIG_UNIX98_PTYS=y
758# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 757# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
759CONFIG_LEGACY_PTYS=y 758CONFIG_LEGACY_PTYS=y
@@ -945,7 +944,6 @@ CONFIG_USB_STORAGE=y
945# CONFIG_USB_RIO500 is not set 944# CONFIG_USB_RIO500 is not set
946# CONFIG_USB_LEGOTOWER is not set 945# CONFIG_USB_LEGOTOWER is not set
947# CONFIG_USB_LCD is not set 946# CONFIG_USB_LCD is not set
948# CONFIG_USB_BERRY_CHARGE is not set
949# CONFIG_USB_LED is not set 947# CONFIG_USB_LED is not set
950# CONFIG_USB_CYPRESS_CY7C63 is not set 948# CONFIG_USB_CYPRESS_CY7C63 is not set
951# CONFIG_USB_CYTHERM is not set 949# CONFIG_USB_CYTHERM is not set
@@ -957,7 +955,6 @@ CONFIG_USB_STORAGE=y
957# CONFIG_USB_IOWARRIOR is not set 955# CONFIG_USB_IOWARRIOR is not set
958# CONFIG_USB_TEST is not set 956# CONFIG_USB_TEST is not set
959# CONFIG_USB_ISIGHTFW is not set 957# CONFIG_USB_ISIGHTFW is not set
960# CONFIG_USB_VST is not set
961# CONFIG_USB_GADGET is not set 958# CONFIG_USB_GADGET is not set
962 959
963# 960#
@@ -980,9 +977,6 @@ CONFIG_MMC_BLOCK_BOUNCE=y
980# MMC/SD/SDIO Host Controller Drivers 977# MMC/SD/SDIO Host Controller Drivers
981# 978#
982# CONFIG_MMC_SDHCI is not set 979# CONFIG_MMC_SDHCI is not set
983# CONFIG_MMC_AT91 is not set
984# CONFIG_MMC_ATMELMCI is not set
985# CONFIG_MMC_TMIO is not set
986# CONFIG_MEMSTICK is not set 980# CONFIG_MEMSTICK is not set
987# CONFIG_NEW_LEDS is not set 981# CONFIG_NEW_LEDS is not set
988# CONFIG_ACCESSIBILITY is not set 982# CONFIG_ACCESSIBILITY is not set
@@ -1074,6 +1068,7 @@ CONFIG_MISC_FILESYSTEMS=y
1074# CONFIG_BFS_FS is not set 1068# CONFIG_BFS_FS is not set
1075# CONFIG_EFS_FS is not set 1069# CONFIG_EFS_FS is not set
1076# CONFIG_JFFS2_FS is not set 1070# CONFIG_JFFS2_FS is not set
1071# CONFIG_LOGFS is not set
1077# CONFIG_CRAMFS is not set 1072# CONFIG_CRAMFS is not set
1078# CONFIG_SQUASHFS is not set 1073# CONFIG_SQUASHFS is not set
1079# CONFIG_VXFS_FS is not set 1074# CONFIG_VXFS_FS is not set
@@ -1096,6 +1091,7 @@ CONFIG_SUNRPC=y
1096# CONFIG_RPCSEC_GSS_KRB5 is not set 1091# CONFIG_RPCSEC_GSS_KRB5 is not set
1097# CONFIG_RPCSEC_GSS_SPKM3 is not set 1092# CONFIG_RPCSEC_GSS_SPKM3 is not set
1098# CONFIG_SMB_FS is not set 1093# CONFIG_SMB_FS is not set
1094# CONFIG_CEPH_FS is not set
1099# CONFIG_CIFS is not set 1095# CONFIG_CIFS is not set
1100# CONFIG_NCP_FS is not set 1096# CONFIG_NCP_FS is not set
1101# CONFIG_CODA_FS is not set 1097# CONFIG_CODA_FS is not set
@@ -1162,13 +1158,12 @@ CONFIG_FRAME_WARN=1024
1162CONFIG_DEBUG_FS=y 1158CONFIG_DEBUG_FS=y
1163# CONFIG_HEADERS_CHECK is not set 1159# CONFIG_HEADERS_CHECK is not set
1164# CONFIG_DEBUG_KERNEL is not set 1160# CONFIG_DEBUG_KERNEL is not set
1165CONFIG_STACKTRACE=y
1166CONFIG_DEBUG_BUGVERBOSE=y 1161CONFIG_DEBUG_BUGVERBOSE=y
1167# CONFIG_DEBUG_MEMORY_INIT is not set 1162# CONFIG_DEBUG_MEMORY_INIT is not set
1168# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1163# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1164# CONFIG_LKDTM is not set
1169# CONFIG_LATENCYTOP is not set 1165# CONFIG_LATENCYTOP is not set
1170# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1166# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1171CONFIG_NOP_TRACER=y
1172CONFIG_HAVE_FUNCTION_TRACER=y 1167CONFIG_HAVE_FUNCTION_TRACER=y
1173CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1168CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1174CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1169CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1176,10 +1171,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1176CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1171CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1177CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1172CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1178CONFIG_RING_BUFFER=y 1173CONFIG_RING_BUFFER=y
1179CONFIG_EVENT_TRACING=y
1180CONFIG_CONTEXT_SWITCH_TRACER=y
1181CONFIG_RING_BUFFER_ALLOW_SWAP=y 1174CONFIG_RING_BUFFER_ALLOW_SWAP=y
1182CONFIG_TRACING=y
1183CONFIG_TRACING_SUPPORT=y 1175CONFIG_TRACING_SUPPORT=y
1184# CONFIG_FTRACE is not set 1176# CONFIG_FTRACE is not set
1185# CONFIG_DYNAMIC_DEBUG is not set 1177# CONFIG_DYNAMIC_DEBUG is not set
@@ -1287,7 +1279,8 @@ CONFIG_CRYPTO=y
1287# 1279#
1288# CONFIG_CRYPTO_ANSI_CPRNG is not set 1280# CONFIG_CRYPTO_ANSI_CPRNG is not set
1289CONFIG_CRYPTO_HW=y 1281CONFIG_CRYPTO_HW=y
1290CONFIG_BINARY_PRINTF=y 1282# CONFIG_VIRTUALIZATION is not set
1283# CONFIG_BINARY_PRINTF is not set
1291 1284
1292# 1285#
1293# Library routines 1286# Library routines
diff --git a/arch/sh/configs/sh7770_generic_defconfig b/arch/sh/configs/sh7770_generic_defconfig
index 7b247053ece6..4327f898baa8 100644
--- a/arch/sh/configs/sh7770_generic_defconfig
+++ b/arch/sh/configs/sh7770_generic_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:06:28 2010 4# Tue May 18 17:20:25 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -45,9 +46,11 @@ CONFIG_LOCALVERSION=""
45CONFIG_HAVE_KERNEL_GZIP=y 46CONFIG_HAVE_KERNEL_GZIP=y
46CONFIG_HAVE_KERNEL_BZIP2=y 47CONFIG_HAVE_KERNEL_BZIP2=y
47CONFIG_HAVE_KERNEL_LZMA=y 48CONFIG_HAVE_KERNEL_LZMA=y
49CONFIG_HAVE_KERNEL_LZO=y
48CONFIG_KERNEL_GZIP=y 50CONFIG_KERNEL_GZIP=y
49# CONFIG_KERNEL_BZIP2 is not set 51# CONFIG_KERNEL_BZIP2 is not set
50# CONFIG_KERNEL_LZMA is not set 52# CONFIG_KERNEL_LZMA is not set
53# CONFIG_KERNEL_LZO is not set
51CONFIG_SWAP=y 54CONFIG_SWAP=y
52CONFIG_SYSVIPC=y 55CONFIG_SYSVIPC=y
53# CONFIG_BSD_PROCESS_ACCT is not set 56# CONFIG_BSD_PROCESS_ACCT is not set
@@ -64,11 +67,6 @@ CONFIG_RCU_FANOUT=32
64# CONFIG_TREE_RCU_TRACE is not set 67# CONFIG_TREE_RCU_TRACE is not set
65# CONFIG_IKCONFIG is not set 68# CONFIG_IKCONFIG is not set
66CONFIG_LOG_BUF_SHIFT=17 69CONFIG_LOG_BUF_SHIFT=17
67CONFIG_GROUP_SCHED=y
68CONFIG_FAIR_GROUP_SCHED=y
69CONFIG_RT_GROUP_SCHED=y
70CONFIG_USER_SCHED=y
71# CONFIG_CGROUP_SCHED is not set
72CONFIG_CGROUPS=y 70CONFIG_CGROUPS=y
73# CONFIG_CGROUP_DEBUG is not set 71# CONFIG_CGROUP_DEBUG is not set
74# CONFIG_CGROUP_NS is not set 72# CONFIG_CGROUP_NS is not set
@@ -77,6 +75,7 @@ CONFIG_CGROUPS=y
77# CONFIG_CPUSETS is not set 75# CONFIG_CPUSETS is not set
78# CONFIG_CGROUP_CPUACCT is not set 76# CONFIG_CGROUP_CPUACCT is not set
79# CONFIG_RESOURCE_COUNTERS is not set 77# CONFIG_RESOURCE_COUNTERS is not set
78# CONFIG_CGROUP_SCHED is not set
80# CONFIG_RELAY is not set 79# CONFIG_RELAY is not set
81# CONFIG_NAMESPACES is not set 80# CONFIG_NAMESPACES is not set
82# CONFIG_BLK_DEV_INITRD is not set 81# CONFIG_BLK_DEV_INITRD is not set
@@ -105,7 +104,6 @@ CONFIG_PERF_USE_VMALLOC=y
105# Kernel Performance Events And Counters 104# Kernel Performance Events And Counters
106# 105#
107CONFIG_PERF_EVENTS=y 106CONFIG_PERF_EVENTS=y
108CONFIG_EVENT_PROFILE=y
109# CONFIG_PERF_COUNTERS is not set 107# CONFIG_PERF_COUNTERS is not set
110CONFIG_VM_EVENT_COUNTERS=y 108CONFIG_VM_EVENT_COUNTERS=y
111# CONFIG_COMPAT_BRK is not set 109# CONFIG_COMPAT_BRK is not set
@@ -113,7 +111,6 @@ CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_SLUB=y 111CONFIG_SLUB=y
114# CONFIG_SLOB is not set 112# CONFIG_SLOB is not set
115CONFIG_PROFILING=y 113CONFIG_PROFILING=y
116CONFIG_TRACEPOINTS=y
117CONFIG_OPROFILE=y 114CONFIG_OPROFILE=y
118CONFIG_HAVE_OPROFILE=y 115CONFIG_HAVE_OPROFILE=y
119CONFIG_HAVE_IOREMAP_PROT=y 116CONFIG_HAVE_IOREMAP_PROT=y
@@ -123,11 +120,11 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y 120CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 121CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 122CONFIG_HAVE_DMA_API_DEBUG=y
123CONFIG_HAVE_HW_BREAKPOINT=y
126 124
127# 125#
128# GCOV-based kernel profiling 126# GCOV-based kernel profiling
129# 127#
130# CONFIG_GCOV_KERNEL is not set
131# CONFIG_SLOW_WORK is not set 128# CONFIG_SLOW_WORK is not set
132CONFIG_HAVE_GENERIC_DMA_COHERENT=y 129CONFIG_HAVE_GENERIC_DMA_COHERENT=y
133CONFIG_RT_MUTEXES=y 130CONFIG_RT_MUTEXES=y
@@ -137,7 +134,6 @@ CONFIG_BLOCK=y
137CONFIG_LBDAF=y 134CONFIG_LBDAF=y
138# CONFIG_BLK_DEV_BSG is not set 135# CONFIG_BLK_DEV_BSG is not set
139# CONFIG_BLK_DEV_INTEGRITY is not set 136# CONFIG_BLK_DEV_INTEGRITY is not set
140# CONFIG_BLK_CGROUP is not set
141 137
142# 138#
143# IO Schedulers 139# IO Schedulers
@@ -232,7 +228,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
232CONFIG_MEMORY_START=0x08000000 228CONFIG_MEMORY_START=0x08000000
233CONFIG_MEMORY_SIZE=0x04000000 229CONFIG_MEMORY_SIZE=0x04000000
234CONFIG_29BIT=y 230CONFIG_29BIT=y
235# CONFIG_PMB_ENABLE is not set 231# CONFIG_PMB is not set
236CONFIG_VSYSCALL=y 232CONFIG_VSYSCALL=y
237CONFIG_ARCH_FLATMEM_ENABLE=y 233CONFIG_ARCH_FLATMEM_ENABLE=y
238CONFIG_ARCH_SPARSEMEM_ENABLE=y 234CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -242,6 +238,7 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
242CONFIG_ARCH_SELECT_MEMORY_MODEL=y 238CONFIG_ARCH_SELECT_MEMORY_MODEL=y
243CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 239CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
244CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 240CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
241CONFIG_UNCACHED_MAPPING=y
245CONFIG_PAGE_SIZE_4KB=y 242CONFIG_PAGE_SIZE_4KB=y
246# CONFIG_PAGE_SIZE_8KB is not set 243# CONFIG_PAGE_SIZE_8KB is not set
247# CONFIG_PAGE_SIZE_16KB is not set 244# CONFIG_PAGE_SIZE_16KB is not set
@@ -258,7 +255,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
258CONFIG_MIGRATION=y 255CONFIG_MIGRATION=y
259# CONFIG_PHYS_ADDR_T_64BIT is not set 256# CONFIG_PHYS_ADDR_T_64BIT is not set
260CONFIG_ZONE_DMA_FLAG=0 257CONFIG_ZONE_DMA_FLAG=0
261CONFIG_NR_QUICK=2 258CONFIG_NR_QUICK=1
262# CONFIG_KSM is not set 259# CONFIG_KSM is not set
263CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
264 261
@@ -347,7 +344,7 @@ CONFIG_PREEMPT_NONE=y
347# CONFIG_PREEMPT_VOLUNTARY is not set 344# CONFIG_PREEMPT_VOLUNTARY is not set
348# CONFIG_PREEMPT is not set 345# CONFIG_PREEMPT is not set
349CONFIG_GUSA=y 346CONFIG_GUSA=y
350# CONFIG_SPARSE_IRQ is not set 347# CONFIG_INTC_USERIMASK is not set
351 348
352# 349#
353# Boot options 350# Boot options
@@ -382,6 +379,7 @@ CONFIG_HIBERNATION_NVS=y
382CONFIG_HIBERNATION=y 379CONFIG_HIBERNATION=y
383CONFIG_PM_STD_PARTITION="" 380CONFIG_PM_STD_PARTITION=""
384# CONFIG_PM_RUNTIME is not set 381# CONFIG_PM_RUNTIME is not set
382CONFIG_PM_OPS=y
385CONFIG_CPU_IDLE=y 383CONFIG_CPU_IDLE=y
386CONFIG_CPU_IDLE_GOV_LADDER=y 384CONFIG_CPU_IDLE_GOV_LADDER=y
387CONFIG_CPU_IDLE_GOV_MENU=y 385CONFIG_CPU_IDLE_GOV_MENU=y
@@ -420,6 +418,7 @@ CONFIG_HAVE_IDE=y
420# 418#
421# SCSI device support 419# SCSI device support
422# 420#
421CONFIG_SCSI_MOD=y
423# CONFIG_RAID_ATTRS is not set 422# CONFIG_RAID_ATTRS is not set
424# CONFIG_SCSI is not set 423# CONFIG_SCSI is not set
425# CONFIG_SCSI_DMA is not set 424# CONFIG_SCSI_DMA is not set
@@ -459,6 +458,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
459CONFIG_SERIAL_SH_SCI_CONSOLE=y 458CONFIG_SERIAL_SH_SCI_CONSOLE=y
460CONFIG_SERIAL_CORE=y 459CONFIG_SERIAL_CORE=y
461CONFIG_SERIAL_CORE_CONSOLE=y 460CONFIG_SERIAL_CORE_CONSOLE=y
461# CONFIG_SERIAL_TIMBERDALE is not set
462# CONFIG_UNIX98_PTYS is not set 462# CONFIG_UNIX98_PTYS is not set
463# CONFIG_LEGACY_PTYS is not set 463# CONFIG_LEGACY_PTYS is not set
464# CONFIG_IPMI_HANDLER is not set 464# CONFIG_IPMI_HANDLER is not set
@@ -483,6 +483,7 @@ CONFIG_I2C_HELPER_AUTO=y
483# CONFIG_I2C_OCORES is not set 483# CONFIG_I2C_OCORES is not set
484CONFIG_I2C_SH_MOBILE=y 484CONFIG_I2C_SH_MOBILE=y
485# CONFIG_I2C_SIMTEC is not set 485# CONFIG_I2C_SIMTEC is not set
486# CONFIG_I2C_XILINX is not set
486 487
487# 488#
488# External I2C/SMBus adapter drivers 489# External I2C/SMBus adapter drivers
@@ -494,15 +495,9 @@ CONFIG_I2C_SH_MOBILE=y
494# Other I2C/SMBus bus drivers 495# Other I2C/SMBus bus drivers
495# 496#
496# CONFIG_I2C_PCA_PLATFORM is not set 497# CONFIG_I2C_PCA_PLATFORM is not set
497
498#
499# Miscellaneous I2C Chip support
500#
501# CONFIG_SENSORS_TSL2550 is not set
502# CONFIG_I2C_DEBUG_CORE is not set 498# CONFIG_I2C_DEBUG_CORE is not set
503# CONFIG_I2C_DEBUG_ALGO is not set 499# CONFIG_I2C_DEBUG_ALGO is not set
504# CONFIG_I2C_DEBUG_BUS is not set 500# CONFIG_I2C_DEBUG_BUS is not set
505# CONFIG_I2C_DEBUG_CHIP is not set
506# CONFIG_SPI is not set 501# CONFIG_SPI is not set
507 502
508# 503#
@@ -525,6 +520,7 @@ CONFIG_SSB_POSSIBLE=y
525# Multifunction device drivers 520# Multifunction device drivers
526# 521#
527# CONFIG_MFD_CORE is not set 522# CONFIG_MFD_CORE is not set
523# CONFIG_MFD_88PM860X is not set
528# CONFIG_MFD_SM501 is not set 524# CONFIG_MFD_SM501 is not set
529# CONFIG_MFD_SH_MOBILE_SDHI is not set 525# CONFIG_MFD_SH_MOBILE_SDHI is not set
530# CONFIG_HTC_PASIC3 is not set 526# CONFIG_HTC_PASIC3 is not set
@@ -532,12 +528,13 @@ CONFIG_SSB_POSSIBLE=y
532# CONFIG_MFD_TMIO is not set 528# CONFIG_MFD_TMIO is not set
533# CONFIG_PMIC_DA903X is not set 529# CONFIG_PMIC_DA903X is not set
534# CONFIG_PMIC_ADP5520 is not set 530# CONFIG_PMIC_ADP5520 is not set
531# CONFIG_MFD_MAX8925 is not set
535# CONFIG_MFD_WM8400 is not set 532# CONFIG_MFD_WM8400 is not set
536# CONFIG_MFD_WM831X is not set 533# CONFIG_MFD_WM831X is not set
537# CONFIG_MFD_WM8350_I2C is not set 534# CONFIG_MFD_WM8350_I2C is not set
535# CONFIG_MFD_WM8994 is not set
538# CONFIG_MFD_PCF50633 is not set 536# CONFIG_MFD_PCF50633 is not set
539# CONFIG_AB3100_CORE is not set 537# CONFIG_AB3100_CORE is not set
540# CONFIG_MFD_88PM8607 is not set
541# CONFIG_REGULATOR is not set 538# CONFIG_REGULATOR is not set
542# CONFIG_MEDIA_SUPPORT is not set 539# CONFIG_MEDIA_SUPPORT is not set
543 540
@@ -621,8 +618,6 @@ CONFIG_RTC_DRV_SH=y
621CONFIG_UIO=y 618CONFIG_UIO=y
622# CONFIG_UIO_PDRV is not set 619# CONFIG_UIO_PDRV is not set
623CONFIG_UIO_PDRV_GENIRQ=y 620CONFIG_UIO_PDRV_GENIRQ=y
624# CONFIG_UIO_SMX is not set
625# CONFIG_UIO_SERCOS3 is not set
626 621
627# 622#
628# TI VLYNQ 623# TI VLYNQ
@@ -635,7 +630,6 @@ CONFIG_UIO_PDRV_GENIRQ=y
635# CONFIG_EXT2_FS is not set 630# CONFIG_EXT2_FS is not set
636# CONFIG_EXT3_FS is not set 631# CONFIG_EXT3_FS is not set
637# CONFIG_EXT4_FS is not set 632# CONFIG_EXT4_FS is not set
638CONFIG_EXT4_USE_FOR_EXT23=y
639# CONFIG_REISERFS_FS is not set 633# CONFIG_REISERFS_FS is not set
640# CONFIG_JFS_FS is not set 634# CONFIG_JFS_FS is not set
641# CONFIG_FS_POSIX_ACL is not set 635# CONFIG_FS_POSIX_ACL is not set
@@ -699,15 +693,12 @@ CONFIG_FRAME_WARN=1024
699# CONFIG_MAGIC_SYSRQ is not set 693# CONFIG_MAGIC_SYSRQ is not set
700# CONFIG_STRIP_ASM_SYMS is not set 694# CONFIG_STRIP_ASM_SYMS is not set
701# CONFIG_UNUSED_SYMBOLS is not set 695# CONFIG_UNUSED_SYMBOLS is not set
702CONFIG_DEBUG_FS=y
703# CONFIG_HEADERS_CHECK is not set 696# CONFIG_HEADERS_CHECK is not set
704# CONFIG_DEBUG_KERNEL is not set 697# CONFIG_DEBUG_KERNEL is not set
705CONFIG_STACKTRACE=y
706CONFIG_DEBUG_BUGVERBOSE=y 698CONFIG_DEBUG_BUGVERBOSE=y
707# CONFIG_DEBUG_MEMORY_INIT is not set 699# CONFIG_DEBUG_MEMORY_INIT is not set
708# CONFIG_RCU_CPU_STALL_DETECTOR is not set 700# CONFIG_RCU_CPU_STALL_DETECTOR is not set
709# CONFIG_LATENCYTOP is not set 701# CONFIG_LATENCYTOP is not set
710CONFIG_NOP_TRACER=y
711CONFIG_HAVE_FUNCTION_TRACER=y 702CONFIG_HAVE_FUNCTION_TRACER=y
712CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 703CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
713CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 704CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -715,13 +706,9 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
715CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 706CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
716CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 707CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
717CONFIG_RING_BUFFER=y 708CONFIG_RING_BUFFER=y
718CONFIG_EVENT_TRACING=y
719CONFIG_CONTEXT_SWITCH_TRACER=y
720CONFIG_RING_BUFFER_ALLOW_SWAP=y 709CONFIG_RING_BUFFER_ALLOW_SWAP=y
721CONFIG_TRACING=y
722CONFIG_TRACING_SUPPORT=y 710CONFIG_TRACING_SUPPORT=y
723# CONFIG_FTRACE is not set 711# CONFIG_FTRACE is not set
724# CONFIG_DYNAMIC_DEBUG is not set
725# CONFIG_DMA_API_DEBUG is not set 712# CONFIG_DMA_API_DEBUG is not set
726# CONFIG_SAMPLES is not set 713# CONFIG_SAMPLES is not set
727CONFIG_HAVE_ARCH_KGDB=y 714CONFIG_HAVE_ARCH_KGDB=y
@@ -739,7 +726,8 @@ CONFIG_HAVE_ARCH_KGDB=y
739CONFIG_DEFAULT_SECURITY_DAC=y 726CONFIG_DEFAULT_SECURITY_DAC=y
740CONFIG_DEFAULT_SECURITY="" 727CONFIG_DEFAULT_SECURITY=""
741# CONFIG_CRYPTO is not set 728# CONFIG_CRYPTO is not set
742CONFIG_BINARY_PRINTF=y 729# CONFIG_VIRTUALIZATION is not set
730# CONFIG_BINARY_PRINTF is not set
743 731
744# 732#
745# Library routines 733# Library routines
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig
index 8330813b0c1d..e9af616b2160 100644
--- a/arch/sh/configs/sh7785lcr_32bit_defconfig
+++ b/arch/sh/configs/sh7785lcr_32bit_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:07:40 2010 4# Tue May 18 17:22:09 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -48,9 +49,11 @@ CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y 49CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y 50CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y 51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
51CONFIG_KERNEL_GZIP=y 53CONFIG_KERNEL_GZIP=y
52# CONFIG_KERNEL_BZIP2 is not set 54# CONFIG_KERNEL_BZIP2 is not set
53# CONFIG_KERNEL_LZMA is not set 55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
54CONFIG_SWAP=y 57CONFIG_SWAP=y
55CONFIG_SYSVIPC=y 58CONFIG_SYSVIPC=y
56CONFIG_SYSVIPC_SYSCTL=y 59CONFIG_SYSVIPC_SYSCTL=y
@@ -74,11 +77,6 @@ CONFIG_RCU_FANOUT=32
74CONFIG_IKCONFIG=y 77CONFIG_IKCONFIG=y
75CONFIG_IKCONFIG_PROC=y 78CONFIG_IKCONFIG_PROC=y
76CONFIG_LOG_BUF_SHIFT=14 79CONFIG_LOG_BUF_SHIFT=14
77CONFIG_GROUP_SCHED=y
78CONFIG_FAIR_GROUP_SCHED=y
79# CONFIG_RT_GROUP_SCHED is not set
80CONFIG_USER_SCHED=y
81# CONFIG_CGROUP_SCHED is not set
82# CONFIG_CGROUPS is not set 80# CONFIG_CGROUPS is not set
83# CONFIG_SYSFS_DEPRECATED_V2 is not set 81# CONFIG_SYSFS_DEPRECATED_V2 is not set
84# CONFIG_RELAY is not set 82# CONFIG_RELAY is not set
@@ -112,7 +110,6 @@ CONFIG_PERF_USE_VMALLOC=y
112# Kernel Performance Events And Counters 110# Kernel Performance Events And Counters
113# 111#
114CONFIG_PERF_EVENTS=y 112CONFIG_PERF_EVENTS=y
115CONFIG_EVENT_PROFILE=y
116CONFIG_PERF_COUNTERS=y 113CONFIG_PERF_COUNTERS=y
117CONFIG_VM_EVENT_COUNTERS=y 114CONFIG_VM_EVENT_COUNTERS=y
118CONFIG_PCI_QUIRKS=y 115CONFIG_PCI_QUIRKS=y
@@ -126,13 +123,13 @@ CONFIG_OPROFILE=y
126CONFIG_HAVE_OPROFILE=y 123CONFIG_HAVE_OPROFILE=y
127CONFIG_KPROBES=y 124CONFIG_KPROBES=y
128CONFIG_KRETPROBES=y 125CONFIG_KRETPROBES=y
129CONFIG_HAVE_IOREMAP_PROT=y
130CONFIG_HAVE_KPROBES=y 126CONFIG_HAVE_KPROBES=y
131CONFIG_HAVE_KRETPROBES=y 127CONFIG_HAVE_KRETPROBES=y
132CONFIG_HAVE_ARCH_TRACEHOOK=y 128CONFIG_HAVE_ARCH_TRACEHOOK=y
133CONFIG_HAVE_DMA_ATTRS=y 129CONFIG_HAVE_DMA_ATTRS=y
134CONFIG_HAVE_CLK=y 130CONFIG_HAVE_CLK=y
135CONFIG_HAVE_DMA_API_DEBUG=y 131CONFIG_HAVE_DMA_API_DEBUG=y
132CONFIG_HAVE_HW_BREAKPOINT=y
136 133
137# 134#
138# GCOV-based kernel profiling 135# GCOV-based kernel profiling
@@ -246,12 +243,9 @@ CONFIG_PAGE_OFFSET=0x80000000
246CONFIG_FORCE_MAX_ZONEORDER=11 243CONFIG_FORCE_MAX_ZONEORDER=11
247CONFIG_MEMORY_START=0x40000000 244CONFIG_MEMORY_START=0x40000000
248CONFIG_MEMORY_SIZE=0x20000000 245CONFIG_MEMORY_SIZE=0x20000000
249# CONFIG_29BIT is not set 246CONFIG_29BIT=y
250CONFIG_32BIT=y
251CONFIG_PMB_ENABLE=y
252# CONFIG_PMB is not set 247# CONFIG_PMB is not set
253CONFIG_PMB_FIXED=y 248CONFIG_X2TLB=y
254# CONFIG_X2TLB is not set
255CONFIG_VSYSCALL=y 249CONFIG_VSYSCALL=y
256# CONFIG_NUMA is not set 250# CONFIG_NUMA is not set
257CONFIG_ARCH_FLATMEM_ENABLE=y 251CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -262,6 +256,8 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
262CONFIG_ARCH_SELECT_MEMORY_MODEL=y 256CONFIG_ARCH_SELECT_MEMORY_MODEL=y
263CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 257CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
264CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 258CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
259CONFIG_IOREMAP_FIXED=y
260CONFIG_UNCACHED_MAPPING=y
265CONFIG_PAGE_SIZE_4KB=y 261CONFIG_PAGE_SIZE_4KB=y
266# CONFIG_PAGE_SIZE_8KB is not set 262# CONFIG_PAGE_SIZE_8KB is not set
267# CONFIG_PAGE_SIZE_16KB is not set 263# CONFIG_PAGE_SIZE_16KB is not set
@@ -284,7 +280,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
284CONFIG_MIGRATION=y 280CONFIG_MIGRATION=y
285# CONFIG_PHYS_ADDR_T_64BIT is not set 281# CONFIG_PHYS_ADDR_T_64BIT is not set
286CONFIG_ZONE_DMA_FLAG=0 282CONFIG_ZONE_DMA_FLAG=0
287CONFIG_NR_QUICK=2 283CONFIG_NR_QUICK=1
288# CONFIG_KSM is not set 284# CONFIG_KSM is not set
289CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 285CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
290 286
@@ -302,6 +298,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y
302# CONFIG_CPU_BIG_ENDIAN is not set 298# CONFIG_CPU_BIG_ENDIAN is not set
303CONFIG_SH_FPU=y 299CONFIG_SH_FPU=y
304CONFIG_SH_STORE_QUEUES=y 300CONFIG_SH_STORE_QUEUES=y
301# CONFIG_SPECULATIVE_EXECUTION is not set
305CONFIG_CPU_HAS_INTEVT=y 302CONFIG_CPU_HAS_INTEVT=y
306CONFIG_CPU_HAS_SR_RB=y 303CONFIG_CPU_HAS_SR_RB=y
307CONFIG_CPU_HAS_FPU=y 304CONFIG_CPU_HAS_FPU=y
@@ -311,7 +308,7 @@ CONFIG_CPU_HAS_FPU=y
311# 308#
312# CONFIG_SH_HIGHLANDER is not set 309# CONFIG_SH_HIGHLANDER is not set
313CONFIG_SH_SH7785LCR=y 310CONFIG_SH_SH7785LCR=y
314# CONFIG_SH_SH7785LCR_PT is not set 311CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS=y
315 312
316# 313#
317# Timer and clock configuration 314# Timer and clock configuration
@@ -374,7 +371,7 @@ CONFIG_SECCOMP=y
374# CONFIG_PREEMPT_VOLUNTARY is not set 371# CONFIG_PREEMPT_VOLUNTARY is not set
375CONFIG_PREEMPT=y 372CONFIG_PREEMPT=y
376CONFIG_GUSA=y 373CONFIG_GUSA=y
377CONFIG_SPARSE_IRQ=y 374# CONFIG_INTC_USERIMASK is not set
378 375
379# 376#
380# Boot options 377# Boot options
@@ -389,9 +386,9 @@ CONFIG_ENTRY_OFFSET=0x00001000
389# Bus options 386# Bus options
390# 387#
391CONFIG_PCI=y 388CONFIG_PCI=y
389CONFIG_PCI_DOMAINS=y
392# CONFIG_PCIEPORTBUS is not set 390# CONFIG_PCIEPORTBUS is not set
393# CONFIG_ARCH_SUPPORTS_MSI is not set 391# CONFIG_ARCH_SUPPORTS_MSI is not set
394# CONFIG_PCI_LEGACY is not set
395# CONFIG_PCI_STUB is not set 392# CONFIG_PCI_STUB is not set
396# CONFIG_PCI_IOV is not set 393# CONFIG_PCI_IOV is not set
397# CONFIG_PCCARD is not set 394# CONFIG_PCCARD is not set
@@ -421,7 +418,6 @@ CONFIG_NET=y
421# Networking options 418# Networking options
422# 419#
423CONFIG_PACKET=y 420CONFIG_PACKET=y
424# CONFIG_PACKET_MMAP is not set
425CONFIG_UNIX=y 421CONFIG_UNIX=y
426CONFIG_XFRM=y 422CONFIG_XFRM=y
427# CONFIG_XFRM_USER is not set 423# CONFIG_XFRM_USER is not set
@@ -633,6 +629,7 @@ CONFIG_HAVE_IDE=y
633# 629#
634# SCSI device support 630# SCSI device support
635# 631#
632CONFIG_SCSI_MOD=y
636# CONFIG_RAID_ATTRS is not set 633# CONFIG_RAID_ATTRS is not set
637CONFIG_SCSI=y 634CONFIG_SCSI=y
638CONFIG_SCSI_DMA=y 635CONFIG_SCSI_DMA=y
@@ -706,6 +703,7 @@ CONFIG_SATA_SIL=y
706# CONFIG_PATA_IT821X is not set 703# CONFIG_PATA_IT821X is not set
707# CONFIG_PATA_IT8213 is not set 704# CONFIG_PATA_IT8213 is not set
708# CONFIG_PATA_JMICRON is not set 705# CONFIG_PATA_JMICRON is not set
706# CONFIG_PATA_LEGACY is not set
709# CONFIG_PATA_TRIFLEX is not set 707# CONFIG_PATA_TRIFLEX is not set
710# CONFIG_PATA_MARVELL is not set 708# CONFIG_PATA_MARVELL is not set
711# CONFIG_PATA_MPIIX is not set 709# CONFIG_PATA_MPIIX is not set
@@ -742,7 +740,7 @@ CONFIG_SATA_SIL=y
742# 740#
743 741
744# 742#
745# See the help texts for more information. 743# The newer stack is recommended.
746# 744#
747# CONFIG_FIREWIRE is not set 745# CONFIG_FIREWIRE is not set
748# CONFIG_IEEE1394 is not set 746# CONFIG_IEEE1394 is not set
@@ -797,6 +795,7 @@ CONFIG_R8169=y
797# CONFIG_USB_PEGASUS is not set 795# CONFIG_USB_PEGASUS is not set
798# CONFIG_USB_RTL8150 is not set 796# CONFIG_USB_RTL8150 is not set
799# CONFIG_USB_USBNET is not set 797# CONFIG_USB_USBNET is not set
798# CONFIG_USB_IPHETH is not set
800# CONFIG_WAN is not set 799# CONFIG_WAN is not set
801# CONFIG_FDDI is not set 800# CONFIG_FDDI is not set
802# CONFIG_HIPPI is not set 801# CONFIG_HIPPI is not set
@@ -901,6 +900,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
901CONFIG_SERIAL_CORE=y 900CONFIG_SERIAL_CORE=y
902CONFIG_SERIAL_CORE_CONSOLE=y 901CONFIG_SERIAL_CORE_CONSOLE=y
903# CONFIG_SERIAL_JSM is not set 902# CONFIG_SERIAL_JSM is not set
903# CONFIG_SERIAL_TIMBERDALE is not set
904CONFIG_UNIX98_PTYS=y 904CONFIG_UNIX98_PTYS=y
905CONFIG_DEVPTS_MULTIPLE_INSTANCES=y 905CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
906# CONFIG_LEGACY_PTYS is not set 906# CONFIG_LEGACY_PTYS is not set
@@ -947,6 +947,7 @@ CONFIG_I2C_ALGOPCA=y
947# CONFIG_I2C_OCORES is not set 947# CONFIG_I2C_OCORES is not set
948# CONFIG_I2C_SH_MOBILE is not set 948# CONFIG_I2C_SH_MOBILE is not set
949# CONFIG_I2C_SIMTEC is not set 949# CONFIG_I2C_SIMTEC is not set
950# CONFIG_I2C_XILINX is not set
950 951
951# 952#
952# External I2C/SMBus adapter drivers 953# External I2C/SMBus adapter drivers
@@ -960,15 +961,9 @@ CONFIG_I2C_ALGOPCA=y
960# 961#
961CONFIG_I2C_PCA_PLATFORM=y 962CONFIG_I2C_PCA_PLATFORM=y
962# CONFIG_I2C_STUB is not set 963# CONFIG_I2C_STUB is not set
963
964#
965# Miscellaneous I2C Chip support
966#
967# CONFIG_SENSORS_TSL2550 is not set
968# CONFIG_I2C_DEBUG_CORE is not set 964# CONFIG_I2C_DEBUG_CORE is not set
969# CONFIG_I2C_DEBUG_ALGO is not set 965# CONFIG_I2C_DEBUG_ALGO is not set
970# CONFIG_I2C_DEBUG_BUS is not set 966# CONFIG_I2C_DEBUG_BUS is not set
971# CONFIG_I2C_DEBUG_CHIP is not set
972# CONFIG_SPI is not set 967# CONFIG_SPI is not set
973 968
974# 969#
@@ -1011,6 +1006,7 @@ CONFIG_SSB_POSSIBLE=y
1011# Multifunction device drivers 1006# Multifunction device drivers
1012# 1007#
1013# CONFIG_MFD_CORE is not set 1008# CONFIG_MFD_CORE is not set
1009# CONFIG_MFD_88PM860X is not set
1014CONFIG_MFD_SM501=y 1010CONFIG_MFD_SM501=y
1015# CONFIG_MFD_SH_MOBILE_SDHI is not set 1011# CONFIG_MFD_SH_MOBILE_SDHI is not set
1016# CONFIG_HTC_PASIC3 is not set 1012# CONFIG_HTC_PASIC3 is not set
@@ -1018,12 +1014,14 @@ CONFIG_MFD_SM501=y
1018# CONFIG_MFD_TMIO is not set 1014# CONFIG_MFD_TMIO is not set
1019# CONFIG_PMIC_DA903X is not set 1015# CONFIG_PMIC_DA903X is not set
1020# CONFIG_PMIC_ADP5520 is not set 1016# CONFIG_PMIC_ADP5520 is not set
1017# CONFIG_MFD_MAX8925 is not set
1021# CONFIG_MFD_WM8400 is not set 1018# CONFIG_MFD_WM8400 is not set
1022# CONFIG_MFD_WM831X is not set 1019# CONFIG_MFD_WM831X is not set
1023# CONFIG_MFD_WM8350_I2C is not set 1020# CONFIG_MFD_WM8350_I2C is not set
1021# CONFIG_MFD_WM8994 is not set
1024# CONFIG_MFD_PCF50633 is not set 1022# CONFIG_MFD_PCF50633 is not set
1025# CONFIG_AB3100_CORE is not set 1023# CONFIG_AB3100_CORE is not set
1026# CONFIG_MFD_88PM8607 is not set 1024# CONFIG_LPC_SCH is not set
1027# CONFIG_REGULATOR is not set 1025# CONFIG_REGULATOR is not set
1028# CONFIG_MEDIA_SUPPORT is not set 1026# CONFIG_MEDIA_SUPPORT is not set
1029 1027
@@ -1209,6 +1207,7 @@ CONFIG_SND_CMIPCI=y
1209# CONFIG_SND_SUPERH is not set 1207# CONFIG_SND_SUPERH is not set
1210CONFIG_SND_USB=y 1208CONFIG_SND_USB=y
1211# CONFIG_SND_USB_AUDIO is not set 1209# CONFIG_SND_USB_AUDIO is not set
1210# CONFIG_SND_USB_UA101 is not set
1212# CONFIG_SND_USB_CAIAQ is not set 1211# CONFIG_SND_USB_CAIAQ is not set
1213# CONFIG_SND_SOC is not set 1212# CONFIG_SND_SOC is not set
1214# CONFIG_SOUND_PRIME is not set 1213# CONFIG_SOUND_PRIME is not set
@@ -1226,6 +1225,7 @@ CONFIG_USB_HID=y
1226# 1225#
1227# Special HID drivers 1226# Special HID drivers
1228# 1227#
1228# CONFIG_HID_3M_PCT is not set
1229CONFIG_HID_A4TECH=m 1229CONFIG_HID_A4TECH=m
1230CONFIG_HID_APPLE=m 1230CONFIG_HID_APPLE=m
1231CONFIG_HID_BELKIN=m 1231CONFIG_HID_BELKIN=m
@@ -1242,14 +1242,19 @@ CONFIG_HID_KENSINGTON=m
1242CONFIG_HID_LOGITECH=m 1242CONFIG_HID_LOGITECH=m
1243# CONFIG_LOGITECH_FF is not set 1243# CONFIG_LOGITECH_FF is not set
1244# CONFIG_LOGIRUMBLEPAD2_FF is not set 1244# CONFIG_LOGIRUMBLEPAD2_FF is not set
1245# CONFIG_LOGIG940_FF is not set
1245CONFIG_HID_MICROSOFT=m 1246CONFIG_HID_MICROSOFT=m
1247# CONFIG_HID_MOSART is not set
1246CONFIG_HID_MONTEREY=m 1248CONFIG_HID_MONTEREY=m
1247CONFIG_HID_NTRIG=m 1249CONFIG_HID_NTRIG=m
1250# CONFIG_HID_ORTEK is not set
1248CONFIG_HID_PANTHERLORD=m 1251CONFIG_HID_PANTHERLORD=m
1249# CONFIG_PANTHERLORD_FF is not set 1252# CONFIG_PANTHERLORD_FF is not set
1250CONFIG_HID_PETALYNX=m 1253CONFIG_HID_PETALYNX=m
1254# CONFIG_HID_QUANTA is not set
1251CONFIG_HID_SAMSUNG=m 1255CONFIG_HID_SAMSUNG=m
1252CONFIG_HID_SONY=m 1256CONFIG_HID_SONY=m
1257# CONFIG_HID_STANTUM is not set
1253CONFIG_HID_SUNPLUS=m 1258CONFIG_HID_SUNPLUS=m
1254CONFIG_HID_GREENASIA=m 1259CONFIG_HID_GREENASIA=m
1255# CONFIG_GREENASIA_FF is not set 1260# CONFIG_GREENASIA_FF is not set
@@ -1273,7 +1278,6 @@ CONFIG_USB=y
1273# CONFIG_USB_DEVICEFS is not set 1278# CONFIG_USB_DEVICEFS is not set
1274CONFIG_USB_DEVICE_CLASS=y 1279CONFIG_USB_DEVICE_CLASS=y
1275# CONFIG_USB_DYNAMIC_MINORS is not set 1280# CONFIG_USB_DYNAMIC_MINORS is not set
1276# CONFIG_USB_SUSPEND is not set
1277# CONFIG_USB_OTG is not set 1281# CONFIG_USB_OTG is not set
1278# CONFIG_USB_OTG_WHITELIST is not set 1282# CONFIG_USB_OTG_WHITELIST is not set
1279# CONFIG_USB_OTG_BLACKLIST_HUB is not set 1283# CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -1351,7 +1355,6 @@ CONFIG_USB_STORAGE=y
1351# CONFIG_USB_RIO500 is not set 1355# CONFIG_USB_RIO500 is not set
1352# CONFIG_USB_LEGOTOWER is not set 1356# CONFIG_USB_LEGOTOWER is not set
1353# CONFIG_USB_LCD is not set 1357# CONFIG_USB_LCD is not set
1354# CONFIG_USB_BERRY_CHARGE is not set
1355# CONFIG_USB_LED is not set 1358# CONFIG_USB_LED is not set
1356# CONFIG_USB_CYPRESS_CY7C63 is not set 1359# CONFIG_USB_CYPRESS_CY7C63 is not set
1357# CONFIG_USB_CYTHERM is not set 1360# CONFIG_USB_CYTHERM is not set
@@ -1364,7 +1367,6 @@ CONFIG_USB_STORAGE=y
1364# CONFIG_USB_IOWARRIOR is not set 1367# CONFIG_USB_IOWARRIOR is not set
1365# CONFIG_USB_TEST is not set 1368# CONFIG_USB_TEST is not set
1366# CONFIG_USB_ISIGHTFW is not set 1369# CONFIG_USB_ISIGHTFW is not set
1367# CONFIG_USB_VST is not set
1368# CONFIG_USB_GADGET is not set 1370# CONFIG_USB_GADGET is not set
1369 1371
1370# 1372#
@@ -1390,10 +1392,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1390CONFIG_MMC_SDHCI=m 1392CONFIG_MMC_SDHCI=m
1391# CONFIG_MMC_SDHCI_PCI is not set 1393# CONFIG_MMC_SDHCI_PCI is not set
1392CONFIG_MMC_SDHCI_PLTFM=m 1394CONFIG_MMC_SDHCI_PLTFM=m
1393# CONFIG_MMC_AT91 is not set
1394# CONFIG_MMC_ATMELMCI is not set
1395# CONFIG_MMC_TIFM_SD is not set 1395# CONFIG_MMC_TIFM_SD is not set
1396# CONFIG_MMC_TMIO is not set
1397# CONFIG_MMC_CB710 is not set 1396# CONFIG_MMC_CB710 is not set
1398# CONFIG_MMC_VIA_SDMMC is not set 1397# CONFIG_MMC_VIA_SDMMC is not set
1399# CONFIG_MEMSTICK is not set 1398# CONFIG_MEMSTICK is not set
@@ -1460,6 +1459,7 @@ CONFIG_RTC_DRV_RS5C372=y
1460# CONFIG_RTC_DRV_SH is not set 1459# CONFIG_RTC_DRV_SH is not set
1461# CONFIG_RTC_DRV_GENERIC is not set 1460# CONFIG_RTC_DRV_GENERIC is not set
1462CONFIG_DMADEVICES=y 1461CONFIG_DMADEVICES=y
1462# CONFIG_DMADEVICES_DEBUG is not set
1463 1463
1464# 1464#
1465# DMA Devices 1465# DMA Devices
@@ -1469,10 +1469,10 @@ CONFIG_UIO=m
1469# CONFIG_UIO_CIF is not set 1469# CONFIG_UIO_CIF is not set
1470# CONFIG_UIO_PDRV is not set 1470# CONFIG_UIO_PDRV is not set
1471# CONFIG_UIO_PDRV_GENIRQ is not set 1471# CONFIG_UIO_PDRV_GENIRQ is not set
1472# CONFIG_UIO_SMX is not set
1473# CONFIG_UIO_AEC is not set 1472# CONFIG_UIO_AEC is not set
1474# CONFIG_UIO_SERCOS3 is not set 1473# CONFIG_UIO_SERCOS3 is not set
1475# CONFIG_UIO_PCI_GENERIC is not set 1474# CONFIG_UIO_PCI_GENERIC is not set
1475# CONFIG_UIO_NETX is not set
1476 1476
1477# 1477#
1478# TI VLYNQ 1478# TI VLYNQ
@@ -1556,6 +1556,7 @@ CONFIG_MISC_FILESYSTEMS=y
1556# CONFIG_BFS_FS is not set 1556# CONFIG_BFS_FS is not set
1557# CONFIG_EFS_FS is not set 1557# CONFIG_EFS_FS is not set
1558# CONFIG_JFFS2_FS is not set 1558# CONFIG_JFFS2_FS is not set
1559# CONFIG_LOGFS is not set
1559# CONFIG_CRAMFS is not set 1560# CONFIG_CRAMFS is not set
1560# CONFIG_SQUASHFS is not set 1561# CONFIG_SQUASHFS is not set
1561# CONFIG_VXFS_FS is not set 1562# CONFIG_VXFS_FS is not set
@@ -1586,6 +1587,7 @@ CONFIG_SUNRPC_GSS=y
1586CONFIG_RPCSEC_GSS_KRB5=y 1587CONFIG_RPCSEC_GSS_KRB5=y
1587# CONFIG_RPCSEC_GSS_SPKM3 is not set 1588# CONFIG_RPCSEC_GSS_SPKM3 is not set
1588# CONFIG_SMB_FS is not set 1589# CONFIG_SMB_FS is not set
1590# CONFIG_CEPH_FS is not set
1589# CONFIG_CIFS is not set 1591# CONFIG_CIFS is not set
1590# CONFIG_NCP_FS is not set 1592# CONFIG_NCP_FS is not set
1591# CONFIG_CODA_FS is not set 1593# CONFIG_CODA_FS is not set
@@ -1660,6 +1662,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
1660# CONFIG_DEBUG_MEMORY_INIT is not set 1662# CONFIG_DEBUG_MEMORY_INIT is not set
1661CONFIG_FRAME_POINTER=y 1663CONFIG_FRAME_POINTER=y
1662# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1664# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1665# CONFIG_LKDTM is not set
1663CONFIG_LATENCYTOP=y 1666CONFIG_LATENCYTOP=y
1664CONFIG_SYSCTL_SYSCALL_CHECK=y 1667CONFIG_SYSCTL_SYSCALL_CHECK=y
1665CONFIG_NOP_TRACER=y 1668CONFIG_NOP_TRACER=y
@@ -1690,6 +1693,7 @@ CONFIG_SCHED_TRACER=y
1690CONFIG_BRANCH_PROFILE_NONE=y 1693CONFIG_BRANCH_PROFILE_NONE=y
1691# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1694# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1692# CONFIG_PROFILE_ALL_BRANCHES is not set 1695# CONFIG_PROFILE_ALL_BRANCHES is not set
1696# CONFIG_KSYM_TRACER is not set
1693CONFIG_STACK_TRACER=y 1697CONFIG_STACK_TRACER=y
1694CONFIG_KMEMTRACE=y 1698CONFIG_KMEMTRACE=y
1695CONFIG_WORKQUEUE_TRACER=y 1699CONFIG_WORKQUEUE_TRACER=y
@@ -1815,6 +1819,7 @@ CONFIG_CRYPTO_DES=y
1815# 1819#
1816# CONFIG_CRYPTO_ANSI_CPRNG is not set 1820# CONFIG_CRYPTO_ANSI_CPRNG is not set
1817# CONFIG_CRYPTO_HW is not set 1821# CONFIG_CRYPTO_HW is not set
1822# CONFIG_VIRTUALIZATION is not set
1818CONFIG_BINARY_PRINTF=y 1823CONFIG_BINARY_PRINTF=y
1819 1824
1820# 1825#
diff --git a/arch/sh/configs/sh7785lcr_defconfig b/arch/sh/configs/sh7785lcr_defconfig
index f196e87c7665..30f38c2767bf 100644
--- a/arch/sh/configs/sh7785lcr_defconfig
+++ b/arch/sh/configs/sh7785lcr_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:09:09 2010 4# Tue May 18 17:27:53 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -48,9 +49,11 @@ CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y 49CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y 50CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y 51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
51CONFIG_KERNEL_GZIP=y 53CONFIG_KERNEL_GZIP=y
52# CONFIG_KERNEL_BZIP2 is not set 54# CONFIG_KERNEL_BZIP2 is not set
53# CONFIG_KERNEL_LZMA is not set 55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
54CONFIG_SWAP=y 57CONFIG_SWAP=y
55CONFIG_SYSVIPC=y 58CONFIG_SYSVIPC=y
56CONFIG_SYSVIPC_SYSCTL=y 59CONFIG_SYSVIPC_SYSCTL=y
@@ -73,11 +76,6 @@ CONFIG_RCU_FANOUT=32
73CONFIG_IKCONFIG=y 76CONFIG_IKCONFIG=y
74CONFIG_IKCONFIG_PROC=y 77CONFIG_IKCONFIG_PROC=y
75CONFIG_LOG_BUF_SHIFT=14 78CONFIG_LOG_BUF_SHIFT=14
76CONFIG_GROUP_SCHED=y
77CONFIG_FAIR_GROUP_SCHED=y
78# CONFIG_RT_GROUP_SCHED is not set
79CONFIG_USER_SCHED=y
80# CONFIG_CGROUP_SCHED is not set
81# CONFIG_CGROUPS is not set 79# CONFIG_CGROUPS is not set
82CONFIG_SYSFS_DEPRECATED=y 80CONFIG_SYSFS_DEPRECATED=y
83CONFIG_SYSFS_DEPRECATED_V2=y 81CONFIG_SYSFS_DEPRECATED_V2=y
@@ -124,13 +122,13 @@ CONFIG_PROFILING=y
124# CONFIG_OPROFILE is not set 122# CONFIG_OPROFILE is not set
125CONFIG_HAVE_OPROFILE=y 123CONFIG_HAVE_OPROFILE=y
126# CONFIG_KPROBES is not set 124# CONFIG_KPROBES is not set
127CONFIG_HAVE_IOREMAP_PROT=y
128CONFIG_HAVE_KPROBES=y 125CONFIG_HAVE_KPROBES=y
129CONFIG_HAVE_KRETPROBES=y 126CONFIG_HAVE_KRETPROBES=y
130CONFIG_HAVE_ARCH_TRACEHOOK=y 127CONFIG_HAVE_ARCH_TRACEHOOK=y
131CONFIG_HAVE_DMA_ATTRS=y 128CONFIG_HAVE_DMA_ATTRS=y
132CONFIG_HAVE_CLK=y 129CONFIG_HAVE_CLK=y
133CONFIG_HAVE_DMA_API_DEBUG=y 130CONFIG_HAVE_DMA_API_DEBUG=y
131CONFIG_HAVE_HW_BREAKPOINT=y
134 132
135# 133#
136# GCOV-based kernel profiling 134# GCOV-based kernel profiling
@@ -244,8 +242,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
244CONFIG_MEMORY_START=0x08000000 242CONFIG_MEMORY_START=0x08000000
245CONFIG_MEMORY_SIZE=0x08000000 243CONFIG_MEMORY_SIZE=0x08000000
246CONFIG_29BIT=y 244CONFIG_29BIT=y
247# CONFIG_PMB_ENABLE is not set 245# CONFIG_PMB is not set
248# CONFIG_X2TLB is not set 246CONFIG_X2TLB=y
249CONFIG_VSYSCALL=y 247CONFIG_VSYSCALL=y
250# CONFIG_NUMA is not set 248# CONFIG_NUMA is not set
251CONFIG_ARCH_FLATMEM_ENABLE=y 249CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -254,6 +252,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
254CONFIG_MAX_ACTIVE_REGIONS=1 252CONFIG_MAX_ACTIVE_REGIONS=1
255CONFIG_ARCH_POPULATES_NODE_MAP=y 253CONFIG_ARCH_POPULATES_NODE_MAP=y
256CONFIG_ARCH_SELECT_MEMORY_MODEL=y 254CONFIG_ARCH_SELECT_MEMORY_MODEL=y
255CONFIG_IOREMAP_FIXED=y
256CONFIG_UNCACHED_MAPPING=y
257CONFIG_PAGE_SIZE_4KB=y 257CONFIG_PAGE_SIZE_4KB=y
258# CONFIG_PAGE_SIZE_8KB is not set 258# CONFIG_PAGE_SIZE_8KB is not set
259# CONFIG_PAGE_SIZE_16KB is not set 259# CONFIG_PAGE_SIZE_16KB is not set
@@ -269,7 +269,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
269CONFIG_SPLIT_PTLOCK_CPUS=4 269CONFIG_SPLIT_PTLOCK_CPUS=4
270# CONFIG_PHYS_ADDR_T_64BIT is not set 270# CONFIG_PHYS_ADDR_T_64BIT is not set
271CONFIG_ZONE_DMA_FLAG=0 271CONFIG_ZONE_DMA_FLAG=0
272CONFIG_NR_QUICK=2 272CONFIG_NR_QUICK=1
273# CONFIG_KSM is not set 273# CONFIG_KSM is not set
274CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 274CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
275 275
@@ -287,6 +287,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y
287# CONFIG_CPU_BIG_ENDIAN is not set 287# CONFIG_CPU_BIG_ENDIAN is not set
288CONFIG_SH_FPU=y 288CONFIG_SH_FPU=y
289CONFIG_SH_STORE_QUEUES=y 289CONFIG_SH_STORE_QUEUES=y
290# CONFIG_SPECULATIVE_EXECUTION is not set
290CONFIG_CPU_HAS_INTEVT=y 291CONFIG_CPU_HAS_INTEVT=y
291CONFIG_CPU_HAS_SR_RB=y 292CONFIG_CPU_HAS_SR_RB=y
292CONFIG_CPU_HAS_FPU=y 293CONFIG_CPU_HAS_FPU=y
@@ -344,7 +345,7 @@ CONFIG_KEXEC=y
344# CONFIG_PREEMPT_VOLUNTARY is not set 345# CONFIG_PREEMPT_VOLUNTARY is not set
345CONFIG_PREEMPT=y 346CONFIG_PREEMPT=y
346CONFIG_GUSA=y 347CONFIG_GUSA=y
347# CONFIG_SPARSE_IRQ is not set 348# CONFIG_INTC_USERIMASK is not set
348 349
349# 350#
350# Boot options 351# Boot options
@@ -359,9 +360,9 @@ CONFIG_ENTRY_OFFSET=0x00001000
359# Bus options 360# Bus options
360# 361#
361CONFIG_PCI=y 362CONFIG_PCI=y
363CONFIG_PCI_DOMAINS=y
362# CONFIG_PCIEPORTBUS is not set 364# CONFIG_PCIEPORTBUS is not set
363# CONFIG_ARCH_SUPPORTS_MSI is not set 365# CONFIG_ARCH_SUPPORTS_MSI is not set
364CONFIG_PCI_LEGACY=y
365# CONFIG_PCI_DEBUG is not set 366# CONFIG_PCI_DEBUG is not set
366# CONFIG_PCI_STUB is not set 367# CONFIG_PCI_STUB is not set
367# CONFIG_PCI_IOV is not set 368# CONFIG_PCI_IOV is not set
@@ -387,7 +388,6 @@ CONFIG_NET=y
387# Networking options 388# Networking options
388# 389#
389CONFIG_PACKET=y 390CONFIG_PACKET=y
390# CONFIG_PACKET_MMAP is not set
391CONFIG_UNIX=y 391CONFIG_UNIX=y
392CONFIG_XFRM=y 392CONFIG_XFRM=y
393# CONFIG_XFRM_USER is not set 393# CONFIG_XFRM_USER is not set
@@ -598,6 +598,7 @@ CONFIG_HAVE_IDE=y
598# 598#
599# SCSI device support 599# SCSI device support
600# 600#
601CONFIG_SCSI_MOD=y
601# CONFIG_RAID_ATTRS is not set 602# CONFIG_RAID_ATTRS is not set
602CONFIG_SCSI=y 603CONFIG_SCSI=y
603CONFIG_SCSI_DMA=y 604CONFIG_SCSI_DMA=y
@@ -671,6 +672,7 @@ CONFIG_SATA_SIL=y
671# CONFIG_PATA_IT821X is not set 672# CONFIG_PATA_IT821X is not set
672# CONFIG_PATA_IT8213 is not set 673# CONFIG_PATA_IT8213 is not set
673# CONFIG_PATA_JMICRON is not set 674# CONFIG_PATA_JMICRON is not set
675# CONFIG_PATA_LEGACY is not set
674# CONFIG_PATA_TRIFLEX is not set 676# CONFIG_PATA_TRIFLEX is not set
675# CONFIG_PATA_MARVELL is not set 677# CONFIG_PATA_MARVELL is not set
676# CONFIG_PATA_MPIIX is not set 678# CONFIG_PATA_MPIIX is not set
@@ -707,7 +709,7 @@ CONFIG_SATA_SIL=y
707# 709#
708 710
709# 711#
710# See the help texts for more information. 712# The newer stack is recommended.
711# 713#
712# CONFIG_FIREWIRE is not set 714# CONFIG_FIREWIRE is not set
713# CONFIG_IEEE1394 is not set 715# CONFIG_IEEE1394 is not set
@@ -766,6 +768,7 @@ CONFIG_WLAN=y
766# CONFIG_USB_PEGASUS is not set 768# CONFIG_USB_PEGASUS is not set
767# CONFIG_USB_RTL8150 is not set 769# CONFIG_USB_RTL8150 is not set
768# CONFIG_USB_USBNET is not set 770# CONFIG_USB_USBNET is not set
771# CONFIG_USB_IPHETH is not set
769# CONFIG_WAN is not set 772# CONFIG_WAN is not set
770# CONFIG_FDDI is not set 773# CONFIG_FDDI is not set
771# CONFIG_HIPPI is not set 774# CONFIG_HIPPI is not set
@@ -851,6 +854,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
851CONFIG_SERIAL_CORE=y 854CONFIG_SERIAL_CORE=y
852CONFIG_SERIAL_CORE_CONSOLE=y 855CONFIG_SERIAL_CORE_CONSOLE=y
853# CONFIG_SERIAL_JSM is not set 856# CONFIG_SERIAL_JSM is not set
857# CONFIG_SERIAL_TIMBERDALE is not set
854CONFIG_UNIX98_PTYS=y 858CONFIG_UNIX98_PTYS=y
855# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 859# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
856CONFIG_LEGACY_PTYS=y 860CONFIG_LEGACY_PTYS=y
@@ -899,6 +903,7 @@ CONFIG_I2C_ALGOPCA=y
899# CONFIG_I2C_OCORES is not set 903# CONFIG_I2C_OCORES is not set
900# CONFIG_I2C_SH_MOBILE is not set 904# CONFIG_I2C_SH_MOBILE is not set
901# CONFIG_I2C_SIMTEC is not set 905# CONFIG_I2C_SIMTEC is not set
906# CONFIG_I2C_XILINX is not set
902 907
903# 908#
904# External I2C/SMBus adapter drivers 909# External I2C/SMBus adapter drivers
@@ -912,15 +917,9 @@ CONFIG_I2C_ALGOPCA=y
912# 917#
913CONFIG_I2C_PCA_PLATFORM=y 918CONFIG_I2C_PCA_PLATFORM=y
914# CONFIG_I2C_STUB is not set 919# CONFIG_I2C_STUB is not set
915
916#
917# Miscellaneous I2C Chip support
918#
919# CONFIG_SENSORS_TSL2550 is not set
920# CONFIG_I2C_DEBUG_CORE is not set 920# CONFIG_I2C_DEBUG_CORE is not set
921# CONFIG_I2C_DEBUG_ALGO is not set 921# CONFIG_I2C_DEBUG_ALGO is not set
922# CONFIG_I2C_DEBUG_BUS is not set 922# CONFIG_I2C_DEBUG_BUS is not set
923# CONFIG_I2C_DEBUG_CHIP is not set
924# CONFIG_SPI is not set 923# CONFIG_SPI is not set
925 924
926# 925#
@@ -943,6 +942,7 @@ CONFIG_SSB_POSSIBLE=y
943# Multifunction device drivers 942# Multifunction device drivers
944# 943#
945# CONFIG_MFD_CORE is not set 944# CONFIG_MFD_CORE is not set
945# CONFIG_MFD_88PM860X is not set
946CONFIG_MFD_SM501=y 946CONFIG_MFD_SM501=y
947# CONFIG_MFD_SH_MOBILE_SDHI is not set 947# CONFIG_MFD_SH_MOBILE_SDHI is not set
948# CONFIG_HTC_PASIC3 is not set 948# CONFIG_HTC_PASIC3 is not set
@@ -950,12 +950,14 @@ CONFIG_MFD_SM501=y
950# CONFIG_MFD_TMIO is not set 950# CONFIG_MFD_TMIO is not set
951# CONFIG_PMIC_DA903X is not set 951# CONFIG_PMIC_DA903X is not set
952# CONFIG_PMIC_ADP5520 is not set 952# CONFIG_PMIC_ADP5520 is not set
953# CONFIG_MFD_MAX8925 is not set
953# CONFIG_MFD_WM8400 is not set 954# CONFIG_MFD_WM8400 is not set
954# CONFIG_MFD_WM831X is not set 955# CONFIG_MFD_WM831X is not set
955# CONFIG_MFD_WM8350_I2C is not set 956# CONFIG_MFD_WM8350_I2C is not set
957# CONFIG_MFD_WM8994 is not set
956# CONFIG_MFD_PCF50633 is not set 958# CONFIG_MFD_PCF50633 is not set
957# CONFIG_AB3100_CORE is not set 959# CONFIG_AB3100_CORE is not set
958# CONFIG_MFD_88PM8607 is not set 960# CONFIG_LPC_SCH is not set
959# CONFIG_REGULATOR is not set 961# CONFIG_REGULATOR is not set
960# CONFIG_MEDIA_SUPPORT is not set 962# CONFIG_MEDIA_SUPPORT is not set
961 963
@@ -963,6 +965,7 @@ CONFIG_MFD_SM501=y
963# Graphics support 965# Graphics support
964# 966#
965CONFIG_VGA_ARB=y 967CONFIG_VGA_ARB=y
968CONFIG_VGA_ARB_MAX_GPUS=16
966# CONFIG_DRM is not set 969# CONFIG_DRM is not set
967# CONFIG_VGASTATE is not set 970# CONFIG_VGASTATE is not set
968# CONFIG_VIDEO_OUTPUT_CONTROL is not set 971# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1059,6 +1062,7 @@ CONFIG_USB_HID=y
1059# 1062#
1060# Special HID drivers 1063# Special HID drivers
1061# 1064#
1065# CONFIG_HID_3M_PCT is not set
1062CONFIG_HID_A4TECH=y 1066CONFIG_HID_A4TECH=y
1063CONFIG_HID_APPLE=y 1067CONFIG_HID_APPLE=y
1064CONFIG_HID_BELKIN=y 1068CONFIG_HID_BELKIN=y
@@ -1074,14 +1078,19 @@ CONFIG_HID_GYRATION=y
1074CONFIG_HID_LOGITECH=y 1078CONFIG_HID_LOGITECH=y
1075# CONFIG_LOGITECH_FF is not set 1079# CONFIG_LOGITECH_FF is not set
1076# CONFIG_LOGIRUMBLEPAD2_FF is not set 1080# CONFIG_LOGIRUMBLEPAD2_FF is not set
1081# CONFIG_LOGIG940_FF is not set
1077CONFIG_HID_MICROSOFT=y 1082CONFIG_HID_MICROSOFT=y
1083# CONFIG_HID_MOSART is not set
1078CONFIG_HID_MONTEREY=y 1084CONFIG_HID_MONTEREY=y
1079# CONFIG_HID_NTRIG is not set 1085# CONFIG_HID_NTRIG is not set
1086# CONFIG_HID_ORTEK is not set
1080CONFIG_HID_PANTHERLORD=y 1087CONFIG_HID_PANTHERLORD=y
1081# CONFIG_PANTHERLORD_FF is not set 1088# CONFIG_PANTHERLORD_FF is not set
1082CONFIG_HID_PETALYNX=y 1089CONFIG_HID_PETALYNX=y
1090# CONFIG_HID_QUANTA is not set
1083CONFIG_HID_SAMSUNG=y 1091CONFIG_HID_SAMSUNG=y
1084CONFIG_HID_SONY=y 1092CONFIG_HID_SONY=y
1093# CONFIG_HID_STANTUM is not set
1085CONFIG_HID_SUNPLUS=y 1094CONFIG_HID_SUNPLUS=y
1086# CONFIG_HID_GREENASIA is not set 1095# CONFIG_HID_GREENASIA is not set
1087# CONFIG_HID_SMARTJOYPLUS is not set 1096# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1182,7 +1191,6 @@ CONFIG_USB_STORAGE=y
1182# CONFIG_USB_RIO500 is not set 1191# CONFIG_USB_RIO500 is not set
1183# CONFIG_USB_LEGOTOWER is not set 1192# CONFIG_USB_LEGOTOWER is not set
1184# CONFIG_USB_LCD is not set 1193# CONFIG_USB_LCD is not set
1185# CONFIG_USB_BERRY_CHARGE is not set
1186# CONFIG_USB_LED is not set 1194# CONFIG_USB_LED is not set
1187# CONFIG_USB_CYPRESS_CY7C63 is not set 1195# CONFIG_USB_CYPRESS_CY7C63 is not set
1188# CONFIG_USB_CYTHERM is not set 1196# CONFIG_USB_CYTHERM is not set
@@ -1195,7 +1203,6 @@ CONFIG_USB_STORAGE=y
1195# CONFIG_USB_IOWARRIOR is not set 1203# CONFIG_USB_IOWARRIOR is not set
1196CONFIG_USB_TEST=m 1204CONFIG_USB_TEST=m
1197# CONFIG_USB_ISIGHTFW is not set 1205# CONFIG_USB_ISIGHTFW is not set
1198# CONFIG_USB_VST is not set
1199# CONFIG_USB_GADGET is not set 1206# CONFIG_USB_GADGET is not set
1200 1207
1201# 1208#
@@ -1353,6 +1360,7 @@ CONFIG_MISC_FILESYSTEMS=y
1353# CONFIG_BFS_FS is not set 1360# CONFIG_BFS_FS is not set
1354# CONFIG_EFS_FS is not set 1361# CONFIG_EFS_FS is not set
1355# CONFIG_JFFS2_FS is not set 1362# CONFIG_JFFS2_FS is not set
1363# CONFIG_LOGFS is not set
1356# CONFIG_CRAMFS is not set 1364# CONFIG_CRAMFS is not set
1357# CONFIG_SQUASHFS is not set 1365# CONFIG_SQUASHFS is not set
1358# CONFIG_VXFS_FS is not set 1366# CONFIG_VXFS_FS is not set
@@ -1383,6 +1391,7 @@ CONFIG_SUNRPC_GSS=y
1383CONFIG_RPCSEC_GSS_KRB5=y 1391CONFIG_RPCSEC_GSS_KRB5=y
1384# CONFIG_RPCSEC_GSS_SPKM3 is not set 1392# CONFIG_RPCSEC_GSS_SPKM3 is not set
1385# CONFIG_SMB_FS is not set 1393# CONFIG_SMB_FS is not set
1394# CONFIG_CEPH_FS is not set
1386# CONFIG_CIFS is not set 1395# CONFIG_CIFS is not set
1387# CONFIG_NCP_FS is not set 1396# CONFIG_NCP_FS is not set
1388# CONFIG_CODA_FS is not set 1397# CONFIG_CODA_FS is not set
@@ -1461,6 +1470,7 @@ CONFIG_SCHED_DEBUG=y
1461# CONFIG_TIMER_STATS is not set 1470# CONFIG_TIMER_STATS is not set
1462# CONFIG_DEBUG_OBJECTS is not set 1471# CONFIG_DEBUG_OBJECTS is not set
1463# CONFIG_DEBUG_SLAB is not set 1472# CONFIG_DEBUG_SLAB is not set
1473# CONFIG_DEBUG_KMEMLEAK is not set
1464CONFIG_DEBUG_PREEMPT=y 1474CONFIG_DEBUG_PREEMPT=y
1465# CONFIG_DEBUG_RT_MUTEXES is not set 1475# CONFIG_DEBUG_RT_MUTEXES is not set
1466# CONFIG_RT_MUTEX_TESTER is not set 1476# CONFIG_RT_MUTEX_TESTER is not set
@@ -1509,6 +1519,7 @@ CONFIG_FTRACE=y
1509CONFIG_BRANCH_PROFILE_NONE=y 1519CONFIG_BRANCH_PROFILE_NONE=y
1510# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1520# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1511# CONFIG_PROFILE_ALL_BRANCHES is not set 1521# CONFIG_PROFILE_ALL_BRANCHES is not set
1522# CONFIG_KSYM_TRACER is not set
1512# CONFIG_STACK_TRACER is not set 1523# CONFIG_STACK_TRACER is not set
1513# CONFIG_KMEMTRACE is not set 1524# CONFIG_KMEMTRACE is not set
1514# CONFIG_WORKQUEUE_TRACER is not set 1525# CONFIG_WORKQUEUE_TRACER is not set
@@ -1633,6 +1644,7 @@ CONFIG_CRYPTO_DES=y
1633# 1644#
1634# CONFIG_CRYPTO_ANSI_CPRNG is not set 1645# CONFIG_CRYPTO_ANSI_CPRNG is not set
1635# CONFIG_CRYPTO_HW is not set 1646# CONFIG_CRYPTO_HW is not set
1647# CONFIG_VIRTUALIZATION is not set
1636# CONFIG_BINARY_PRINTF is not set 1648# CONFIG_BINARY_PRINTF is not set
1637 1649
1638# 1650#
diff --git a/arch/sh/configs/shmin_defconfig b/arch/sh/configs/shmin_defconfig
index 45441c0ab30c..4ba2705c7a4a 100644
--- a/arch/sh/configs/shmin_defconfig
+++ b/arch/sh/configs/shmin_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:10:09 2010 4# Tue May 18 17:32:23 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -12,8 +12,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_IRQ_PER_CPU=y 15CONFIG_IRQ_PER_CPU=y
16CONFIG_SPARSE_IRQ=y
17# CONFIG_GENERIC_GPIO is not set 17# CONFIG_GENERIC_GPIO is not set
18CONFIG_GENERIC_TIME=y 18CONFIG_GENERIC_TIME=y
19CONFIG_GENERIC_CLOCKEVENTS=y 19CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,6 +29,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
29CONFIG_ARCH_HAS_DEFAULT_IDLE=y 29CONFIG_ARCH_HAS_DEFAULT_IDLE=y
30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
31CONFIG_DMA_NONCOHERENT=y 31CONFIG_DMA_NONCOHERENT=y
32CONFIG_NEED_DMA_MAP_STATE=y
32CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
33CONFIG_CONSTRUCTORS=y 34CONFIG_CONSTRUCTORS=y
34 35
@@ -43,9 +44,11 @@ CONFIG_LOCALVERSION_AUTO=y
43CONFIG_HAVE_KERNEL_GZIP=y 44CONFIG_HAVE_KERNEL_GZIP=y
44CONFIG_HAVE_KERNEL_BZIP2=y 45CONFIG_HAVE_KERNEL_BZIP2=y
45CONFIG_HAVE_KERNEL_LZMA=y 46CONFIG_HAVE_KERNEL_LZMA=y
47CONFIG_HAVE_KERNEL_LZO=y
46CONFIG_KERNEL_GZIP=y 48CONFIG_KERNEL_GZIP=y
47# CONFIG_KERNEL_BZIP2 is not set 49# CONFIG_KERNEL_BZIP2 is not set
48# CONFIG_KERNEL_LZMA is not set 50# CONFIG_KERNEL_LZMA is not set
51# CONFIG_KERNEL_LZO is not set
49# CONFIG_SWAP is not set 52# CONFIG_SWAP is not set
50# CONFIG_SYSVIPC is not set 53# CONFIG_SYSVIPC is not set
51# CONFIG_POSIX_MQUEUE is not set 54# CONFIG_POSIX_MQUEUE is not set
@@ -65,7 +68,6 @@ CONFIG_RCU_FANOUT=32
65# CONFIG_TREE_RCU_TRACE is not set 68# CONFIG_TREE_RCU_TRACE is not set
66# CONFIG_IKCONFIG is not set 69# CONFIG_IKCONFIG is not set
67CONFIG_LOG_BUF_SHIFT=14 70CONFIG_LOG_BUF_SHIFT=14
68# CONFIG_GROUP_SCHED is not set
69# CONFIG_CGROUPS is not set 71# CONFIG_CGROUPS is not set
70# CONFIG_RELAY is not set 72# CONFIG_RELAY is not set
71# CONFIG_NAMESPACES is not set 73# CONFIG_NAMESPACES is not set
@@ -95,7 +97,7 @@ CONFIG_PERF_USE_VMALLOC=y
95# 97#
96# Kernel Performance Events And Counters 98# Kernel Performance Events And Counters
97# 99#
98# CONFIG_PERF_EVENTS is not set 100CONFIG_PERF_EVENTS=y
99# CONFIG_PERF_COUNTERS is not set 101# CONFIG_PERF_COUNTERS is not set
100CONFIG_VM_EVENT_COUNTERS=y 102CONFIG_VM_EVENT_COUNTERS=y
101CONFIG_COMPAT_BRK=y 103CONFIG_COMPAT_BRK=y
@@ -111,6 +113,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
111CONFIG_HAVE_DMA_ATTRS=y 113CONFIG_HAVE_DMA_ATTRS=y
112CONFIG_HAVE_CLK=y 114CONFIG_HAVE_CLK=y
113CONFIG_HAVE_DMA_API_DEBUG=y 115CONFIG_HAVE_DMA_API_DEBUG=y
116CONFIG_HAVE_HW_BREAKPOINT=y
114 117
115# 118#
116# GCOV-based kernel profiling 119# GCOV-based kernel profiling
@@ -222,6 +225,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
222CONFIG_MAX_ACTIVE_REGIONS=1 225CONFIG_MAX_ACTIVE_REGIONS=1
223CONFIG_ARCH_POPULATES_NODE_MAP=y 226CONFIG_ARCH_POPULATES_NODE_MAP=y
224CONFIG_ARCH_SELECT_MEMORY_MODEL=y 227CONFIG_ARCH_SELECT_MEMORY_MODEL=y
228CONFIG_UNCACHED_MAPPING=y
225CONFIG_PAGE_SIZE_4KB=y 229CONFIG_PAGE_SIZE_4KB=y
226# CONFIG_PAGE_SIZE_8KB is not set 230# CONFIG_PAGE_SIZE_8KB is not set
227# CONFIG_PAGE_SIZE_16KB is not set 231# CONFIG_PAGE_SIZE_16KB is not set
@@ -237,7 +241,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
237CONFIG_SPLIT_PTLOCK_CPUS=4 241CONFIG_SPLIT_PTLOCK_CPUS=4
238# CONFIG_PHYS_ADDR_T_64BIT is not set 242# CONFIG_PHYS_ADDR_T_64BIT is not set
239CONFIG_ZONE_DMA_FLAG=0 243CONFIG_ZONE_DMA_FLAG=0
240CONFIG_NR_QUICK=2 244CONFIG_NR_QUICK=1
241# CONFIG_KSM is not set 245# CONFIG_KSM is not set
242CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 246CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
243 247
@@ -312,7 +316,6 @@ CONFIG_PREEMPT_NONE=y
312# CONFIG_PREEMPT is not set 316# CONFIG_PREEMPT is not set
313CONFIG_GUSA=y 317CONFIG_GUSA=y
314# CONFIG_GUSA_RB is not set 318# CONFIG_GUSA_RB is not set
315# CONFIG_SPARSE_IRQ is not set
316 319
317# 320#
318# Boot options 321# Boot options
@@ -544,6 +547,7 @@ CONFIG_HAVE_IDE=y
544# 547#
545# SCSI device support 548# SCSI device support
546# 549#
550CONFIG_SCSI_MOD=y
547# CONFIG_RAID_ATTRS is not set 551# CONFIG_RAID_ATTRS is not set
548# CONFIG_SCSI is not set 552# CONFIG_SCSI is not set
549# CONFIG_SCSI_DMA is not set 553# CONFIG_SCSI_DMA is not set
@@ -625,6 +629,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
625CONFIG_SERIAL_SH_SCI_CONSOLE=y 629CONFIG_SERIAL_SH_SCI_CONSOLE=y
626CONFIG_SERIAL_CORE=y 630CONFIG_SERIAL_CORE=y
627CONFIG_SERIAL_CORE_CONSOLE=y 631CONFIG_SERIAL_CORE_CONSOLE=y
632# CONFIG_SERIAL_TIMBERDALE is not set
628CONFIG_UNIX98_PTYS=y 633CONFIG_UNIX98_PTYS=y
629# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 634# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
630CONFIG_LEGACY_PTYS=y 635CONFIG_LEGACY_PTYS=y
@@ -719,7 +724,6 @@ CONFIG_RTC_LIB=y
719# CONFIG_EXT2_FS is not set 724# CONFIG_EXT2_FS is not set
720# CONFIG_EXT3_FS is not set 725# CONFIG_EXT3_FS is not set
721# CONFIG_EXT4_FS is not set 726# CONFIG_EXT4_FS is not set
722CONFIG_EXT4_USE_FOR_EXT23=y
723# CONFIG_REISERFS_FS is not set 727# CONFIG_REISERFS_FS is not set
724# CONFIG_JFS_FS is not set 728# CONFIG_JFS_FS is not set
725# CONFIG_FS_POSIX_ACL is not set 729# CONFIG_FS_POSIX_ACL is not set
@@ -773,6 +777,7 @@ CONFIG_MISC_FILESYSTEMS=y
773# CONFIG_BFS_FS is not set 777# CONFIG_BFS_FS is not set
774# CONFIG_EFS_FS is not set 778# CONFIG_EFS_FS is not set
775# CONFIG_JFFS2_FS is not set 779# CONFIG_JFFS2_FS is not set
780# CONFIG_LOGFS is not set
776CONFIG_CRAMFS=y 781CONFIG_CRAMFS=y
777# CONFIG_SQUASHFS is not set 782# CONFIG_SQUASHFS is not set
778# CONFIG_VXFS_FS is not set 783# CONFIG_VXFS_FS is not set
@@ -797,6 +802,7 @@ CONFIG_SUNRPC=y
797# CONFIG_RPCSEC_GSS_KRB5 is not set 802# CONFIG_RPCSEC_GSS_KRB5 is not set
798# CONFIG_RPCSEC_GSS_SPKM3 is not set 803# CONFIG_RPCSEC_GSS_SPKM3 is not set
799# CONFIG_SMB_FS is not set 804# CONFIG_SMB_FS is not set
805# CONFIG_CEPH_FS is not set
800# CONFIG_CIFS is not set 806# CONFIG_CIFS is not set
801# CONFIG_NCP_FS is not set 807# CONFIG_NCP_FS is not set
802# CONFIG_CODA_FS is not set 808# CONFIG_CODA_FS is not set
@@ -936,6 +942,7 @@ CONFIG_CRYPTO=y
936# 942#
937# CONFIG_CRYPTO_ANSI_CPRNG is not set 943# CONFIG_CRYPTO_ANSI_CPRNG is not set
938CONFIG_CRYPTO_HW=y 944CONFIG_CRYPTO_HW=y
945# CONFIG_VIRTUALIZATION is not set
939# CONFIG_BINARY_PRINTF is not set 946# CONFIG_BINARY_PRINTF is not set
940 947
941# 948#
diff --git a/arch/sh/configs/shx3_defconfig b/arch/sh/configs/shx3_defconfig
index ecf50cda4cbc..42f6bd34440d 100644
--- a/arch/sh/configs/shx3_defconfig
+++ b/arch/sh/configs/shx3_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:10:45 2010 4# Tue May 18 18:08:45 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,6 +28,7 @@ CONFIG_SYS_SUPPORTS_NUMA=y
28CONFIG_SYS_SUPPORTS_TMU=y 28CONFIG_SYS_SUPPORTS_TMU=y
29CONFIG_STACKTRACE_SUPPORT=y 29CONFIG_STACKTRACE_SUPPORT=y
30CONFIG_LOCKDEP_SUPPORT=y 30CONFIG_LOCKDEP_SUPPORT=y
31CONFIG_HAVE_LATENCYTOP_SUPPORT=y
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set 32# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set 33# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_NO_VIRT_TO_BUS=y 34CONFIG_ARCH_NO_VIRT_TO_BUS=y
@@ -35,6 +36,7 @@ CONFIG_ARCH_HAS_DEFAULT_IDLE=y
35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 36CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
36CONFIG_DMA_COHERENT=y 37CONFIG_DMA_COHERENT=y
37# CONFIG_DMA_NONCOHERENT is not set 38# CONFIG_DMA_NONCOHERENT is not set
39# CONFIG_NEED_DMA_MAP_STATE is not set
38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 40CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
39CONFIG_CONSTRUCTORS=y 41CONFIG_CONSTRUCTORS=y
40 42
@@ -49,9 +51,11 @@ CONFIG_LOCALVERSION_AUTO=y
49CONFIG_HAVE_KERNEL_GZIP=y 51CONFIG_HAVE_KERNEL_GZIP=y
50CONFIG_HAVE_KERNEL_BZIP2=y 52CONFIG_HAVE_KERNEL_BZIP2=y
51CONFIG_HAVE_KERNEL_LZMA=y 53CONFIG_HAVE_KERNEL_LZMA=y
54CONFIG_HAVE_KERNEL_LZO=y
52CONFIG_KERNEL_GZIP=y 55CONFIG_KERNEL_GZIP=y
53# CONFIG_KERNEL_BZIP2 is not set 56# CONFIG_KERNEL_BZIP2 is not set
54# CONFIG_KERNEL_LZMA is not set 57# CONFIG_KERNEL_LZMA is not set
58# CONFIG_KERNEL_LZO is not set
55CONFIG_SWAP=y 59CONFIG_SWAP=y
56CONFIG_SYSVIPC=y 60CONFIG_SYSVIPC=y
57CONFIG_SYSVIPC_SYSCTL=y 61CONFIG_SYSVIPC_SYSCTL=y
@@ -73,15 +77,11 @@ CONFIG_TREE_RCU=y
73CONFIG_RCU_TRACE=y 77CONFIG_RCU_TRACE=y
74CONFIG_RCU_FANOUT=32 78CONFIG_RCU_FANOUT=32
75# CONFIG_RCU_FANOUT_EXACT is not set 79# CONFIG_RCU_FANOUT_EXACT is not set
80# CONFIG_RCU_FAST_NO_HZ is not set
76CONFIG_TREE_RCU_TRACE=y 81CONFIG_TREE_RCU_TRACE=y
77CONFIG_IKCONFIG=y 82CONFIG_IKCONFIG=y
78CONFIG_IKCONFIG_PROC=y 83CONFIG_IKCONFIG_PROC=y
79CONFIG_LOG_BUF_SHIFT=14 84CONFIG_LOG_BUF_SHIFT=14
80CONFIG_GROUP_SCHED=y
81CONFIG_FAIR_GROUP_SCHED=y
82CONFIG_RT_GROUP_SCHED=y
83CONFIG_USER_SCHED=y
84# CONFIG_CGROUP_SCHED is not set
85CONFIG_CGROUPS=y 85CONFIG_CGROUPS=y
86# CONFIG_CGROUP_DEBUG is not set 86# CONFIG_CGROUP_DEBUG is not set
87CONFIG_CGROUP_NS=y 87CONFIG_CGROUP_NS=y
@@ -92,6 +92,7 @@ CONFIG_CGROUP_CPUACCT=y
92CONFIG_RESOURCE_COUNTERS=y 92CONFIG_RESOURCE_COUNTERS=y
93CONFIG_CGROUP_MEM_RES_CTLR=y 93CONFIG_CGROUP_MEM_RES_CTLR=y
94# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set 94# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set
95# CONFIG_CGROUP_SCHED is not set
95CONFIG_MM_OWNER=y 96CONFIG_MM_OWNER=y
96CONFIG_SYSFS_DEPRECATED=y 97CONFIG_SYSFS_DEPRECATED=y
97CONFIG_SYSFS_DEPRECATED_V2=y 98CONFIG_SYSFS_DEPRECATED_V2=y
@@ -131,7 +132,6 @@ CONFIG_PERF_USE_VMALLOC=y
131# Kernel Performance Events And Counters 132# Kernel Performance Events And Counters
132# 133#
133CONFIG_PERF_EVENTS=y 134CONFIG_PERF_EVENTS=y
134CONFIG_EVENT_PROFILE=y
135# CONFIG_PERF_COUNTERS is not set 135# CONFIG_PERF_COUNTERS is not set
136# CONFIG_DEBUG_PERF_USE_VMALLOC is not set 136# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
137CONFIG_VM_EVENT_COUNTERS=y 137CONFIG_VM_EVENT_COUNTERS=y
@@ -140,12 +140,10 @@ CONFIG_COMPAT_BRK=y
140# CONFIG_SLUB is not set 140# CONFIG_SLUB is not set
141CONFIG_SLOB=y 141CONFIG_SLOB=y
142CONFIG_PROFILING=y 142CONFIG_PROFILING=y
143CONFIG_TRACEPOINTS=y
144CONFIG_OPROFILE=y 143CONFIG_OPROFILE=y
145CONFIG_HAVE_OPROFILE=y 144CONFIG_HAVE_OPROFILE=y
146CONFIG_KPROBES=y 145CONFIG_KPROBES=y
147CONFIG_KRETPROBES=y 146CONFIG_KRETPROBES=y
148CONFIG_HAVE_IOREMAP_PROT=y
149CONFIG_HAVE_KPROBES=y 147CONFIG_HAVE_KPROBES=y
150CONFIG_HAVE_KRETPROBES=y 148CONFIG_HAVE_KRETPROBES=y
151CONFIG_HAVE_ARCH_TRACEHOOK=y 149CONFIG_HAVE_ARCH_TRACEHOOK=y
@@ -153,6 +151,7 @@ CONFIG_HAVE_DMA_ATTRS=y
153CONFIG_USE_GENERIC_SMP_HELPERS=y 151CONFIG_USE_GENERIC_SMP_HELPERS=y
154CONFIG_HAVE_CLK=y 152CONFIG_HAVE_CLK=y
155CONFIG_HAVE_DMA_API_DEBUG=y 153CONFIG_HAVE_DMA_API_DEBUG=y
154CONFIG_HAVE_HW_BREAKPOINT=y
156 155
157# 156#
158# GCOV-based kernel profiling 157# GCOV-based kernel profiling
@@ -173,7 +172,6 @@ CONFIG_BLOCK=y
173CONFIG_LBDAF=y 172CONFIG_LBDAF=y
174# CONFIG_BLK_DEV_BSG is not set 173# CONFIG_BLK_DEV_BSG is not set
175# CONFIG_BLK_DEV_INTEGRITY is not set 174# CONFIG_BLK_DEV_INTEGRITY is not set
176# CONFIG_BLK_CGROUP is not set
177 175
178# 176#
179# IO Schedulers 177# IO Schedulers
@@ -269,8 +267,8 @@ CONFIG_FORCE_MAX_ZONEORDER=7
269CONFIG_MEMORY_START=0x0c000000 267CONFIG_MEMORY_START=0x0c000000
270CONFIG_MEMORY_SIZE=0x04000000 268CONFIG_MEMORY_SIZE=0x04000000
271CONFIG_29BIT=y 269CONFIG_29BIT=y
272# CONFIG_PMB_ENABLE is not set 270# CONFIG_PMB is not set
273# CONFIG_X2TLB is not set 271CONFIG_X2TLB=y
274CONFIG_VSYSCALL=y 272CONFIG_VSYSCALL=y
275CONFIG_NUMA=y 273CONFIG_NUMA=y
276CONFIG_NODES_SHIFT=3 274CONFIG_NODES_SHIFT=3
@@ -282,6 +280,8 @@ CONFIG_ARCH_SELECT_MEMORY_MODEL=y
282CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 280CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
283CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 281CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
284CONFIG_ARCH_MEMORY_PROBE=y 282CONFIG_ARCH_MEMORY_PROBE=y
283CONFIG_IOREMAP_FIXED=y
284CONFIG_UNCACHED_MAPPING=y
285# CONFIG_PAGE_SIZE_4KB is not set 285# CONFIG_PAGE_SIZE_4KB is not set
286# CONFIG_PAGE_SIZE_8KB is not set 286# CONFIG_PAGE_SIZE_8KB is not set
287# CONFIG_PAGE_SIZE_16KB is not set 287# CONFIG_PAGE_SIZE_16KB is not set
@@ -307,7 +307,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
307CONFIG_MIGRATION=y 307CONFIG_MIGRATION=y
308# CONFIG_PHYS_ADDR_T_64BIT is not set 308# CONFIG_PHYS_ADDR_T_64BIT is not set
309CONFIG_ZONE_DMA_FLAG=0 309CONFIG_ZONE_DMA_FLAG=0
310CONFIG_NR_QUICK=2 310CONFIG_NR_QUICK=1
311# CONFIG_KSM is not set 311# CONFIG_KSM is not set
312CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 312CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
313CONFIG_SCHED_MC=y 313CONFIG_SCHED_MC=y
@@ -392,14 +392,14 @@ CONFIG_HZ_250=y
392CONFIG_HZ=250 392CONFIG_HZ=250
393CONFIG_SCHED_HRTICK=y 393CONFIG_SCHED_HRTICK=y
394CONFIG_KEXEC=y 394CONFIG_KEXEC=y
395# CONFIG_CRASH_DUMP is not set
396CONFIG_SECCOMP=y 395CONFIG_SECCOMP=y
397CONFIG_SMP=y 396CONFIG_SMP=y
398CONFIG_NR_CPUS=4 397CONFIG_NR_CPUS=4
398# CONFIG_HOTPLUG_CPU is not set
399# CONFIG_PREEMPT_NONE is not set 399# CONFIG_PREEMPT_NONE is not set
400# CONFIG_PREEMPT_VOLUNTARY is not set 400# CONFIG_PREEMPT_VOLUNTARY is not set
401CONFIG_PREEMPT=y 401CONFIG_PREEMPT=y
402# CONFIG_SPARSE_IRQ is not set 402# CONFIG_INTC_USERIMASK is not set
403 403
404# 404#
405# Boot options 405# Boot options
@@ -518,7 +518,6 @@ CONFIG_IPV6_NDISC_NODETYPE=y
518# 518#
519# CONFIG_NET_PKTGEN is not set 519# CONFIG_NET_PKTGEN is not set
520# CONFIG_NET_TCPPROBE is not set 520# CONFIG_NET_TCPPROBE is not set
521# CONFIG_NET_DROP_MONITOR is not set
522# CONFIG_HAMRADIO is not set 521# CONFIG_HAMRADIO is not set
523CONFIG_CAN=m 522CONFIG_CAN=m
524CONFIG_CAN_RAW=m 523CONFIG_CAN_RAW=m
@@ -583,6 +582,7 @@ CONFIG_MISC_DEVICES=y
583# CONFIG_ICS932S401 is not set 582# CONFIG_ICS932S401 is not set
584# CONFIG_ENCLOSURE_SERVICES is not set 583# CONFIG_ENCLOSURE_SERVICES is not set
585# CONFIG_ISL29003 is not set 584# CONFIG_ISL29003 is not set
585# CONFIG_SENSORS_TSL2550 is not set
586# CONFIG_DS1682 is not set 586# CONFIG_DS1682 is not set
587# CONFIG_TI_DAC7512 is not set 587# CONFIG_TI_DAC7512 is not set
588# CONFIG_C2PORT is not set 588# CONFIG_C2PORT is not set
@@ -601,6 +601,7 @@ CONFIG_HAVE_IDE=y
601# 601#
602# SCSI device support 602# SCSI device support
603# 603#
604CONFIG_SCSI_MOD=y
604# CONFIG_RAID_ATTRS is not set 605# CONFIG_RAID_ATTRS is not set
605CONFIG_SCSI=y 606CONFIG_SCSI=y
606CONFIG_SCSI_DMA=y 607CONFIG_SCSI_DMA=y
@@ -693,6 +694,7 @@ CONFIG_WLAN=y
693# CONFIG_USB_PEGASUS is not set 694# CONFIG_USB_PEGASUS is not set
694# CONFIG_USB_RTL8150 is not set 695# CONFIG_USB_RTL8150 is not set
695# CONFIG_USB_USBNET is not set 696# CONFIG_USB_USBNET is not set
697# CONFIG_USB_IPHETH is not set
696# CONFIG_WAN is not set 698# CONFIG_WAN is not set
697# CONFIG_PPP is not set 699# CONFIG_PPP is not set
698# CONFIG_SLIP is not set 700# CONFIG_SLIP is not set
@@ -734,6 +736,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=2
734CONFIG_SERIAL_SH_SCI_CONSOLE=y 736CONFIG_SERIAL_SH_SCI_CONSOLE=y
735CONFIG_SERIAL_CORE=y 737CONFIG_SERIAL_CORE=y
736CONFIG_SERIAL_CORE_CONSOLE=y 738CONFIG_SERIAL_CORE_CONSOLE=y
739# CONFIG_SERIAL_TIMBERDALE is not set
737CONFIG_UNIX98_PTYS=y 740CONFIG_UNIX98_PTYS=y
738# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 741# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
739CONFIG_LEGACY_PTYS=y 742CONFIG_LEGACY_PTYS=y
@@ -760,6 +763,7 @@ CONFIG_I2C_HELPER_AUTO=y
760# CONFIG_I2C_OCORES is not set 763# CONFIG_I2C_OCORES is not set
761# CONFIG_I2C_SH_MOBILE is not set 764# CONFIG_I2C_SH_MOBILE is not set
762# CONFIG_I2C_SIMTEC is not set 765# CONFIG_I2C_SIMTEC is not set
766# CONFIG_I2C_XILINX is not set
763 767
764# 768#
765# External I2C/SMBus adapter drivers 769# External I2C/SMBus adapter drivers
@@ -773,15 +777,9 @@ CONFIG_I2C_HELPER_AUTO=y
773# 777#
774# CONFIG_I2C_PCA_PLATFORM is not set 778# CONFIG_I2C_PCA_PLATFORM is not set
775# CONFIG_I2C_STUB is not set 779# CONFIG_I2C_STUB is not set
776
777#
778# Miscellaneous I2C Chip support
779#
780# CONFIG_SENSORS_TSL2550 is not set
781# CONFIG_I2C_DEBUG_CORE is not set 780# CONFIG_I2C_DEBUG_CORE is not set
782# CONFIG_I2C_DEBUG_ALGO is not set 781# CONFIG_I2C_DEBUG_ALGO is not set
783# CONFIG_I2C_DEBUG_BUS is not set 782# CONFIG_I2C_DEBUG_BUS is not set
784# CONFIG_I2C_DEBUG_CHIP is not set
785CONFIG_SPI=y 783CONFIG_SPI=y
786# CONFIG_SPI_DEBUG is not set 784# CONFIG_SPI_DEBUG is not set
787CONFIG_SPI_MASTER=y 785CONFIG_SPI_MASTER=y
@@ -838,10 +836,9 @@ CONFIG_SSB_POSSIBLE=y
838# CONFIG_HTC_PASIC3 is not set 836# CONFIG_HTC_PASIC3 is not set
839# CONFIG_MFD_TMIO is not set 837# CONFIG_MFD_TMIO is not set
840# CONFIG_MFD_WM8400 is not set 838# CONFIG_MFD_WM8400 is not set
841# CONFIG_MFD_WM8350_I2C is not set 839# CONFIG_MFD_WM8994 is not set
842# CONFIG_MFD_PCF50633 is not set 840# CONFIG_MFD_PCF50633 is not set
843# CONFIG_MFD_MC13783 is not set 841# CONFIG_MFD_MC13783 is not set
844# CONFIG_AB3100_CORE is not set
845# CONFIG_EZX_PCAP is not set 842# CONFIG_EZX_PCAP is not set
846# CONFIG_AB4500_CORE is not set 843# CONFIG_AB4500_CORE is not set
847# CONFIG_REGULATOR is not set 844# CONFIG_REGULATOR is not set
@@ -933,7 +930,6 @@ CONFIG_USB_R8A66597_HCD=m
933# CONFIG_USB_RIO500 is not set 930# CONFIG_USB_RIO500 is not set
934# CONFIG_USB_LEGOTOWER is not set 931# CONFIG_USB_LEGOTOWER is not set
935# CONFIG_USB_LCD is not set 932# CONFIG_USB_LCD is not set
936# CONFIG_USB_BERRY_CHARGE is not set
937# CONFIG_USB_LED is not set 933# CONFIG_USB_LED is not set
938# CONFIG_USB_CYPRESS_CY7C63 is not set 934# CONFIG_USB_CYPRESS_CY7C63 is not set
939# CONFIG_USB_CYTHERM is not set 935# CONFIG_USB_CYTHERM is not set
@@ -945,7 +941,6 @@ CONFIG_USB_R8A66597_HCD=m
945# CONFIG_USB_IOWARRIOR is not set 941# CONFIG_USB_IOWARRIOR is not set
946# CONFIG_USB_TEST is not set 942# CONFIG_USB_TEST is not set
947# CONFIG_USB_ISIGHTFW is not set 943# CONFIG_USB_ISIGHTFW is not set
948# CONFIG_USB_VST is not set
949CONFIG_USB_GADGET=y 944CONFIG_USB_GADGET=y
950# CONFIG_USB_GADGET_DEBUG is not set 945# CONFIG_USB_GADGET_DEBUG is not set
951# CONFIG_USB_GADGET_DEBUG_FILES is not set 946# CONFIG_USB_GADGET_DEBUG_FILES is not set
@@ -983,6 +978,7 @@ CONFIG_USB_GADGET_DUALSPEED=y
983# CONFIG_USB_MIDI_GADGET is not set 978# CONFIG_USB_MIDI_GADGET is not set
984# CONFIG_USB_G_PRINTER is not set 979# CONFIG_USB_G_PRINTER is not set
985# CONFIG_USB_CDC_COMPOSITE is not set 980# CONFIG_USB_CDC_COMPOSITE is not set
981# CONFIG_USB_G_NOKIA is not set
986# CONFIG_USB_G_MULTI is not set 982# CONFIG_USB_G_MULTI is not set
987 983
988# 984#
@@ -1065,8 +1061,6 @@ CONFIG_RTC_DRV_SH=y
1065CONFIG_UIO=m 1061CONFIG_UIO=m
1066# CONFIG_UIO_PDRV is not set 1062# CONFIG_UIO_PDRV is not set
1067# CONFIG_UIO_PDRV_GENIRQ is not set 1063# CONFIG_UIO_PDRV_GENIRQ is not set
1068# CONFIG_UIO_SMX is not set
1069# CONFIG_UIO_SERCOS3 is not set
1070 1064
1071# 1065#
1072# TI VLYNQ 1066# TI VLYNQ
@@ -1145,6 +1139,7 @@ CONFIG_MISC_FILESYSTEMS=y
1145# CONFIG_BEFS_FS is not set 1139# CONFIG_BEFS_FS is not set
1146# CONFIG_BFS_FS is not set 1140# CONFIG_BFS_FS is not set
1147# CONFIG_EFS_FS is not set 1141# CONFIG_EFS_FS is not set
1142# CONFIG_LOGFS is not set
1148# CONFIG_CRAMFS is not set 1143# CONFIG_CRAMFS is not set
1149# CONFIG_SQUASHFS is not set 1144# CONFIG_SQUASHFS is not set
1150# CONFIG_VXFS_FS is not set 1145# CONFIG_VXFS_FS is not set
@@ -1159,6 +1154,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
1159# CONFIG_NFS_FS is not set 1154# CONFIG_NFS_FS is not set
1160# CONFIG_NFSD is not set 1155# CONFIG_NFSD is not set
1161# CONFIG_SMB_FS is not set 1156# CONFIG_SMB_FS is not set
1157# CONFIG_CEPH_FS is not set
1162# CONFIG_CIFS is not set 1158# CONFIG_CIFS is not set
1163# CONFIG_NCP_FS is not set 1159# CONFIG_NCP_FS is not set
1164# CONFIG_CODA_FS is not set 1160# CONFIG_CODA_FS is not set
@@ -1246,7 +1242,6 @@ CONFIG_DEBUG_PREEMPT=y
1246# CONFIG_LOCK_STAT is not set 1242# CONFIG_LOCK_STAT is not set
1247# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1243# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1248# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1244# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1249CONFIG_STACKTRACE=y
1250# CONFIG_DEBUG_KOBJECT is not set 1245# CONFIG_DEBUG_KOBJECT is not set
1251CONFIG_DEBUG_BUGVERBOSE=y 1246CONFIG_DEBUG_BUGVERBOSE=y
1252# CONFIG_DEBUG_INFO is not set 1247# CONFIG_DEBUG_INFO is not set
@@ -1266,9 +1261,9 @@ CONFIG_FRAME_POINTER=y
1266# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1261# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1267# CONFIG_LKDTM is not set 1262# CONFIG_LKDTM is not set
1268# CONFIG_FAULT_INJECTION is not set 1263# CONFIG_FAULT_INJECTION is not set
1264# CONFIG_LATENCYTOP is not set
1269# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1265# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1270# CONFIG_PAGE_POISONING is not set 1266# CONFIG_PAGE_POISONING is not set
1271CONFIG_NOP_TRACER=y
1272CONFIG_HAVE_FUNCTION_TRACER=y 1267CONFIG_HAVE_FUNCTION_TRACER=y
1273CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1268CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1274CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1269CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
@@ -1276,10 +1271,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
1276CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1271CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1277CONFIG_HAVE_SYSCALL_TRACEPOINTS=y 1272CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1278CONFIG_RING_BUFFER=y 1273CONFIG_RING_BUFFER=y
1279CONFIG_EVENT_TRACING=y
1280CONFIG_CONTEXT_SWITCH_TRACER=y
1281CONFIG_RING_BUFFER_ALLOW_SWAP=y 1274CONFIG_RING_BUFFER_ALLOW_SWAP=y
1282CONFIG_TRACING=y
1283CONFIG_TRACING_SUPPORT=y 1275CONFIG_TRACING_SUPPORT=y
1284CONFIG_FTRACE=y 1276CONFIG_FTRACE=y
1285# CONFIG_FUNCTION_TRACER is not set 1277# CONFIG_FUNCTION_TRACER is not set
@@ -1292,6 +1284,7 @@ CONFIG_FTRACE=y
1292CONFIG_BRANCH_PROFILE_NONE=y 1284CONFIG_BRANCH_PROFILE_NONE=y
1293# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1285# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1294# CONFIG_PROFILE_ALL_BRANCHES is not set 1286# CONFIG_PROFILE_ALL_BRANCHES is not set
1287# CONFIG_KSYM_TRACER is not set
1295# CONFIG_STACK_TRACER is not set 1288# CONFIG_STACK_TRACER is not set
1296# CONFIG_KMEMTRACE is not set 1289# CONFIG_KMEMTRACE is not set
1297# CONFIG_WORKQUEUE_TRACER is not set 1290# CONFIG_WORKQUEUE_TRACER is not set
@@ -1329,6 +1322,7 @@ CONFIG_CRYPTO=y
1329# CONFIG_CRYPTO_MANAGER2 is not set 1322# CONFIG_CRYPTO_MANAGER2 is not set
1330# CONFIG_CRYPTO_GF128MUL is not set 1323# CONFIG_CRYPTO_GF128MUL is not set
1331# CONFIG_CRYPTO_NULL is not set 1324# CONFIG_CRYPTO_NULL is not set
1325# CONFIG_CRYPTO_PCRYPT is not set
1332# CONFIG_CRYPTO_CRYPTD is not set 1326# CONFIG_CRYPTO_CRYPTD is not set
1333# CONFIG_CRYPTO_AUTHENC is not set 1327# CONFIG_CRYPTO_AUTHENC is not set
1334# CONFIG_CRYPTO_TEST is not set 1328# CONFIG_CRYPTO_TEST is not set
@@ -1407,7 +1401,8 @@ CONFIG_CRYPTO=y
1407# 1401#
1408# CONFIG_CRYPTO_ANSI_CPRNG is not set 1402# CONFIG_CRYPTO_ANSI_CPRNG is not set
1409CONFIG_CRYPTO_HW=y 1403CONFIG_CRYPTO_HW=y
1410CONFIG_BINARY_PRINTF=y 1404# CONFIG_VIRTUALIZATION is not set
1405# CONFIG_BINARY_PRINTF is not set
1411 1406
1412# 1407#
1413# Library routines 1408# Library routines
diff --git a/arch/sh/configs/snapgear_defconfig b/arch/sh/configs/snapgear_defconfig
index 98352d757851..513834d2b8ab 100644
--- a/arch/sh/configs/snapgear_defconfig
+++ b/arch/sh/configs/snapgear_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:14:18 2010 4# Tue May 18 17:36:53 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52# CONFIG_SWAP is not set 55# CONFIG_SWAP is not set
53# CONFIG_SYSVIPC is not set 56# CONFIG_SYSVIPC is not set
54# CONFIG_POSIX_MQUEUE is not set 57# CONFIG_POSIX_MQUEUE is not set
@@ -68,7 +71,6 @@ CONFIG_RCU_FANOUT=32
68# CONFIG_TREE_RCU_TRACE is not set 71# CONFIG_TREE_RCU_TRACE is not set
69# CONFIG_IKCONFIG is not set 72# CONFIG_IKCONFIG is not set
70CONFIG_LOG_BUF_SHIFT=14 73CONFIG_LOG_BUF_SHIFT=14
71# CONFIG_GROUP_SCHED is not set
72# CONFIG_CGROUPS is not set 74# CONFIG_CGROUPS is not set
73CONFIG_SYSFS_DEPRECATED=y 75CONFIG_SYSFS_DEPRECATED=y
74CONFIG_SYSFS_DEPRECATED_V2=y 76CONFIG_SYSFS_DEPRECATED_V2=y
@@ -79,6 +81,7 @@ CONFIG_INITRAMFS_SOURCE=""
79CONFIG_RD_GZIP=y 81CONFIG_RD_GZIP=y
80# CONFIG_RD_BZIP2 is not set 82# CONFIG_RD_BZIP2 is not set
81# CONFIG_RD_LZMA is not set 83# CONFIG_RD_LZMA is not set
84# CONFIG_RD_LZO is not set
82CONFIG_CC_OPTIMIZE_FOR_SIZE=y 85CONFIG_CC_OPTIMIZE_FOR_SIZE=y
83CONFIG_SYSCTL=y 86CONFIG_SYSCTL=y
84CONFIG_ANON_INODES=y 87CONFIG_ANON_INODES=y
@@ -105,7 +108,7 @@ CONFIG_PERF_USE_VMALLOC=y
105# 108#
106# Kernel Performance Events And Counters 109# Kernel Performance Events And Counters
107# 110#
108# CONFIG_PERF_EVENTS is not set 111CONFIG_PERF_EVENTS=y
109# CONFIG_PERF_COUNTERS is not set 112# CONFIG_PERF_COUNTERS is not set
110CONFIG_VM_EVENT_COUNTERS=y 113CONFIG_VM_EVENT_COUNTERS=y
111CONFIG_PCI_QUIRKS=y 114CONFIG_PCI_QUIRKS=y
@@ -122,6 +125,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
122CONFIG_HAVE_DMA_ATTRS=y 125CONFIG_HAVE_DMA_ATTRS=y
123CONFIG_HAVE_CLK=y 126CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y 127CONFIG_HAVE_DMA_API_DEBUG=y
128CONFIG_HAVE_HW_BREAKPOINT=y
125 129
126# 130#
127# GCOV-based kernel profiling 131# GCOV-based kernel profiling
@@ -235,6 +239,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
235CONFIG_MAX_ACTIVE_REGIONS=1 239CONFIG_MAX_ACTIVE_REGIONS=1
236CONFIG_ARCH_POPULATES_NODE_MAP=y 240CONFIG_ARCH_POPULATES_NODE_MAP=y
237CONFIG_ARCH_SELECT_MEMORY_MODEL=y 241CONFIG_ARCH_SELECT_MEMORY_MODEL=y
242CONFIG_UNCACHED_MAPPING=y
238CONFIG_PAGE_SIZE_4KB=y 243CONFIG_PAGE_SIZE_4KB=y
239# CONFIG_PAGE_SIZE_8KB is not set 244# CONFIG_PAGE_SIZE_8KB is not set
240# CONFIG_PAGE_SIZE_16KB is not set 245# CONFIG_PAGE_SIZE_16KB is not set
@@ -250,7 +255,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
250CONFIG_SPLIT_PTLOCK_CPUS=4 255CONFIG_SPLIT_PTLOCK_CPUS=4
251# CONFIG_PHYS_ADDR_T_64BIT is not set 256# CONFIG_PHYS_ADDR_T_64BIT is not set
252CONFIG_ZONE_DMA_FLAG=0 257CONFIG_ZONE_DMA_FLAG=0
253CONFIG_NR_QUICK=2 258CONFIG_NR_QUICK=1
254# CONFIG_KSM is not set 259# CONFIG_KSM is not set
255CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 260CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
256 261
@@ -335,7 +340,6 @@ CONFIG_PREEMPT_NONE=y
335# CONFIG_PREEMPT is not set 340# CONFIG_PREEMPT is not set
336CONFIG_GUSA=y 341CONFIG_GUSA=y
337# CONFIG_GUSA_RB is not set 342# CONFIG_GUSA_RB is not set
338# CONFIG_SPARSE_IRQ is not set
339 343
340# 344#
341# Boot options 345# Boot options
@@ -350,9 +354,9 @@ CONFIG_ENTRY_OFFSET=0x00001000
350# Bus options 354# Bus options
351# 355#
352CONFIG_PCI=y 356CONFIG_PCI=y
357CONFIG_PCI_DOMAINS=y
353# CONFIG_PCIEPORTBUS is not set 358# CONFIG_PCIEPORTBUS is not set
354# CONFIG_ARCH_SUPPORTS_MSI is not set 359# CONFIG_ARCH_SUPPORTS_MSI is not set
355CONFIG_PCI_LEGACY=y
356# CONFIG_PCI_STUB is not set 360# CONFIG_PCI_STUB is not set
357# CONFIG_PCI_IOV is not set 361# CONFIG_PCI_IOV is not set
358 362
@@ -569,6 +573,7 @@ CONFIG_HAVE_IDE=y
569# 573#
570# SCSI device support 574# SCSI device support
571# 575#
576CONFIG_SCSI_MOD=y
572# CONFIG_RAID_ATTRS is not set 577# CONFIG_RAID_ATTRS is not set
573# CONFIG_SCSI is not set 578# CONFIG_SCSI is not set
574# CONFIG_SCSI_DMA is not set 579# CONFIG_SCSI_DMA is not set
@@ -586,7 +591,7 @@ CONFIG_HAVE_IDE=y
586# 591#
587 592
588# 593#
589# See the help texts for more information. 594# The newer stack is recommended.
590# 595#
591# CONFIG_FIREWIRE is not set 596# CONFIG_FIREWIRE is not set
592# CONFIG_IEEE1394 is not set 597# CONFIG_IEEE1394 is not set
@@ -626,6 +631,7 @@ CONFIG_NET_PCI=y
626# CONFIG_PCNET32 is not set 631# CONFIG_PCNET32 is not set
627# CONFIG_AMD8111_ETH is not set 632# CONFIG_AMD8111_ETH is not set
628# CONFIG_ADAPTEC_STARFIRE is not set 633# CONFIG_ADAPTEC_STARFIRE is not set
634# CONFIG_KSZ884X_PCI is not set
629# CONFIG_B44 is not set 635# CONFIG_B44 is not set
630# CONFIG_FORCEDETH is not set 636# CONFIG_FORCEDETH is not set
631# CONFIG_E100 is not set 637# CONFIG_E100 is not set
@@ -726,6 +732,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
726CONFIG_SERIAL_CORE=y 732CONFIG_SERIAL_CORE=y
727CONFIG_SERIAL_CORE_CONSOLE=y 733CONFIG_SERIAL_CORE_CONSOLE=y
728# CONFIG_SERIAL_JSM is not set 734# CONFIG_SERIAL_JSM is not set
735# CONFIG_SERIAL_TIMBERDALE is not set
729CONFIG_UNIX98_PTYS=y 736CONFIG_UNIX98_PTYS=y
730# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 737# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
731CONFIG_LEGACY_PTYS=y 738CONFIG_LEGACY_PTYS=y
@@ -764,6 +771,7 @@ CONFIG_SSB_POSSIBLE=y
764# CONFIG_MFD_SH_MOBILE_SDHI is not set 771# CONFIG_MFD_SH_MOBILE_SDHI is not set
765# CONFIG_HTC_PASIC3 is not set 772# CONFIG_HTC_PASIC3 is not set
766# CONFIG_MFD_TMIO is not set 773# CONFIG_MFD_TMIO is not set
774# CONFIG_LPC_SCH is not set
767# CONFIG_REGULATOR is not set 775# CONFIG_REGULATOR is not set
768# CONFIG_MEDIA_SUPPORT is not set 776# CONFIG_MEDIA_SUPPORT is not set
769 777
@@ -771,6 +779,7 @@ CONFIG_SSB_POSSIBLE=y
771# Graphics support 779# Graphics support
772# 780#
773CONFIG_VGA_ARB=y 781CONFIG_VGA_ARB=y
782CONFIG_VGA_ARB_MAX_GPUS=16
774# CONFIG_DRM is not set 783# CONFIG_DRM is not set
775# CONFIG_VGASTATE is not set 784# CONFIG_VGASTATE is not set
776# CONFIG_VIDEO_OUTPUT_CONTROL is not set 785# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -848,7 +857,6 @@ CONFIG_EXT2_FS=y
848# CONFIG_EXT2_FS_XIP is not set 857# CONFIG_EXT2_FS_XIP is not set
849# CONFIG_EXT3_FS is not set 858# CONFIG_EXT3_FS is not set
850# CONFIG_EXT4_FS is not set 859# CONFIG_EXT4_FS is not set
851CONFIG_EXT4_USE_FOR_EXT23=y
852# CONFIG_REISERFS_FS is not set 860# CONFIG_REISERFS_FS is not set
853# CONFIG_JFS_FS is not set 861# CONFIG_JFS_FS is not set
854# CONFIG_FS_POSIX_ACL is not set 862# CONFIG_FS_POSIX_ACL is not set
@@ -907,6 +915,7 @@ CONFIG_MISC_FILESYSTEMS=y
907# CONFIG_BFS_FS is not set 915# CONFIG_BFS_FS is not set
908# CONFIG_EFS_FS is not set 916# CONFIG_EFS_FS is not set
909# CONFIG_JFFS2_FS is not set 917# CONFIG_JFFS2_FS is not set
918# CONFIG_LOGFS is not set
910CONFIG_CRAMFS=y 919CONFIG_CRAMFS=y
911# CONFIG_SQUASHFS is not set 920# CONFIG_SQUASHFS is not set
912# CONFIG_VXFS_FS is not set 921# CONFIG_VXFS_FS is not set
@@ -925,6 +934,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
925# CONFIG_NFS_FS is not set 934# CONFIG_NFS_FS is not set
926# CONFIG_NFSD is not set 935# CONFIG_NFSD is not set
927# CONFIG_SMB_FS is not set 936# CONFIG_SMB_FS is not set
937# CONFIG_CEPH_FS is not set
928# CONFIG_CIFS is not set 938# CONFIG_CIFS is not set
929# CONFIG_NCP_FS is not set 939# CONFIG_NCP_FS is not set
930# CONFIG_CODA_FS is not set 940# CONFIG_CODA_FS is not set
@@ -983,6 +993,7 @@ CONFIG_HAVE_ARCH_KGDB=y
983CONFIG_DEFAULT_SECURITY_DAC=y 993CONFIG_DEFAULT_SECURITY_DAC=y
984CONFIG_DEFAULT_SECURITY="" 994CONFIG_DEFAULT_SECURITY=""
985# CONFIG_CRYPTO is not set 995# CONFIG_CRYPTO is not set
996# CONFIG_VIRTUALIZATION is not set
986# CONFIG_BINARY_PRINTF is not set 997# CONFIG_BINARY_PRINTF is not set
987 998
988# 999#
diff --git a/arch/sh/configs/systemh_defconfig b/arch/sh/configs/systemh_defconfig
index 72982e360e3f..14e69a229c0a 100644
--- a/arch/sh/configs/systemh_defconfig
+++ b/arch/sh/configs/systemh_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:14:50 2010 4# Tue May 18 17:39:19 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -31,6 +31,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y 31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y 33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
35CONFIG_CONSTRUCTORS=y 36CONFIG_CONSTRUCTORS=y
36 37
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION_AUTO=y
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53# CONFIG_SYSVIPC is not set 56# CONFIG_SYSVIPC is not set
54# CONFIG_BSD_PROCESS_ACCT is not set 57# CONFIG_BSD_PROCESS_ACCT is not set
@@ -65,7 +68,6 @@ CONFIG_RCU_FANOUT=32
65# CONFIG_TREE_RCU_TRACE is not set 68# CONFIG_TREE_RCU_TRACE is not set
66# CONFIG_IKCONFIG is not set 69# CONFIG_IKCONFIG is not set
67CONFIG_LOG_BUF_SHIFT=14 70CONFIG_LOG_BUF_SHIFT=14
68# CONFIG_GROUP_SCHED is not set
69# CONFIG_CGROUPS is not set 71# CONFIG_CGROUPS is not set
70CONFIG_SYSFS_DEPRECATED=y 72CONFIG_SYSFS_DEPRECATED=y
71CONFIG_SYSFS_DEPRECATED_V2=y 73CONFIG_SYSFS_DEPRECATED_V2=y
@@ -76,6 +78,7 @@ CONFIG_INITRAMFS_SOURCE=""
76CONFIG_RD_GZIP=y 78CONFIG_RD_GZIP=y
77# CONFIG_RD_BZIP2 is not set 79# CONFIG_RD_BZIP2 is not set
78# CONFIG_RD_LZMA is not set 80# CONFIG_RD_LZMA is not set
81# CONFIG_RD_LZO is not set
79# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 82# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
80CONFIG_SYSCTL=y 83CONFIG_SYSCTL=y
81CONFIG_ANON_INODES=y 84CONFIG_ANON_INODES=y
@@ -102,7 +105,7 @@ CONFIG_PERF_USE_VMALLOC=y
102# 105#
103# Kernel Performance Events And Counters 106# Kernel Performance Events And Counters
104# 107#
105# CONFIG_PERF_EVENTS is not set 108CONFIG_PERF_EVENTS=y
106# CONFIG_PERF_COUNTERS is not set 109# CONFIG_PERF_COUNTERS is not set
107CONFIG_VM_EVENT_COUNTERS=y 110CONFIG_VM_EVENT_COUNTERS=y
108CONFIG_COMPAT_BRK=y 111CONFIG_COMPAT_BRK=y
@@ -119,6 +122,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
119CONFIG_HAVE_DMA_ATTRS=y 122CONFIG_HAVE_DMA_ATTRS=y
120CONFIG_HAVE_CLK=y 123CONFIG_HAVE_CLK=y
121CONFIG_HAVE_DMA_API_DEBUG=y 124CONFIG_HAVE_DMA_API_DEBUG=y
125CONFIG_HAVE_HW_BREAKPOINT=y
122 126
123# 127#
124# GCOV-based kernel profiling 128# GCOV-based kernel profiling
@@ -237,6 +241,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
237CONFIG_MAX_ACTIVE_REGIONS=1 241CONFIG_MAX_ACTIVE_REGIONS=1
238CONFIG_ARCH_POPULATES_NODE_MAP=y 242CONFIG_ARCH_POPULATES_NODE_MAP=y
239CONFIG_ARCH_SELECT_MEMORY_MODEL=y 243CONFIG_ARCH_SELECT_MEMORY_MODEL=y
244CONFIG_UNCACHED_MAPPING=y
240CONFIG_PAGE_SIZE_4KB=y 245CONFIG_PAGE_SIZE_4KB=y
241# CONFIG_PAGE_SIZE_8KB is not set 246# CONFIG_PAGE_SIZE_8KB is not set
242# CONFIG_PAGE_SIZE_16KB is not set 247# CONFIG_PAGE_SIZE_16KB is not set
@@ -252,7 +257,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
252CONFIG_SPLIT_PTLOCK_CPUS=4 257CONFIG_SPLIT_PTLOCK_CPUS=4
253# CONFIG_PHYS_ADDR_T_64BIT is not set 258# CONFIG_PHYS_ADDR_T_64BIT is not set
254CONFIG_ZONE_DMA_FLAG=0 259CONFIG_ZONE_DMA_FLAG=0
255CONFIG_NR_QUICK=2 260CONFIG_NR_QUICK=1
256# CONFIG_KSM is not set 261# CONFIG_KSM is not set
257CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 262CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
258 263
@@ -332,7 +337,6 @@ CONFIG_HZ=250
332CONFIG_PREEMPT=y 337CONFIG_PREEMPT=y
333CONFIG_GUSA=y 338CONFIG_GUSA=y
334# CONFIG_GUSA_RB is not set 339# CONFIG_GUSA_RB is not set
335# CONFIG_SPARSE_IRQ is not set
336 340
337# 341#
338# Boot options 342# Boot options
@@ -402,6 +406,7 @@ CONFIG_HAVE_IDE=y
402# 406#
403# SCSI device support 407# SCSI device support
404# 408#
409CONFIG_SCSI_MOD=y
405# CONFIG_RAID_ATTRS is not set 410# CONFIG_RAID_ATTRS is not set
406# CONFIG_SCSI is not set 411# CONFIG_SCSI is not set
407# CONFIG_SCSI_DMA is not set 412# CONFIG_SCSI_DMA is not set
@@ -442,6 +447,7 @@ CONFIG_DEVKMEM=y
442# Non-8250 serial port support 447# Non-8250 serial port support
443# 448#
444# CONFIG_SERIAL_SH_SCI is not set 449# CONFIG_SERIAL_SH_SCI is not set
450# CONFIG_SERIAL_TIMBERDALE is not set
445CONFIG_UNIX98_PTYS=y 451CONFIG_UNIX98_PTYS=y
446# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 452# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
447CONFIG_LEGACY_PTYS=y 453CONFIG_LEGACY_PTYS=y
@@ -552,7 +558,6 @@ CONFIG_RTC_LIB=y
552# CONFIG_EXT2_FS is not set 558# CONFIG_EXT2_FS is not set
553# CONFIG_EXT3_FS is not set 559# CONFIG_EXT3_FS is not set
554# CONFIG_EXT4_FS is not set 560# CONFIG_EXT4_FS is not set
555CONFIG_EXT4_USE_FOR_EXT23=y
556# CONFIG_REISERFS_FS is not set 561# CONFIG_REISERFS_FS is not set
557# CONFIG_JFS_FS is not set 562# CONFIG_JFS_FS is not set
558# CONFIG_FS_POSIX_ACL is not set 563# CONFIG_FS_POSIX_ACL is not set
@@ -609,6 +614,7 @@ CONFIG_MISC_FILESYSTEMS=y
609# CONFIG_BEFS_FS is not set 614# CONFIG_BEFS_FS is not set
610# CONFIG_BFS_FS is not set 615# CONFIG_BFS_FS is not set
611# CONFIG_EFS_FS is not set 616# CONFIG_EFS_FS is not set
617# CONFIG_LOGFS is not set
612CONFIG_CRAMFS=y 618CONFIG_CRAMFS=y
613# CONFIG_SQUASHFS is not set 619# CONFIG_SQUASHFS is not set
614# CONFIG_VXFS_FS is not set 620# CONFIG_VXFS_FS is not set
@@ -676,6 +682,7 @@ CONFIG_HAVE_ARCH_KGDB=y
676CONFIG_DEFAULT_SECURITY_DAC=y 682CONFIG_DEFAULT_SECURITY_DAC=y
677CONFIG_DEFAULT_SECURITY="" 683CONFIG_DEFAULT_SECURITY=""
678# CONFIG_CRYPTO is not set 684# CONFIG_CRYPTO is not set
685# CONFIG_VIRTUALIZATION is not set
679# CONFIG_BINARY_PRINTF is not set 686# CONFIG_BINARY_PRINTF is not set
680 687
681# 688#
diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig
index 78c257053c79..79196b4dfdb1 100644
--- a/arch/sh/configs/titan_defconfig
+++ b/arch/sh/configs/titan_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:17:20 2010 4# Tue May 18 17:41:12 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -46,9 +47,11 @@ CONFIG_LOCALVERSION=""
46CONFIG_HAVE_KERNEL_GZIP=y 47CONFIG_HAVE_KERNEL_GZIP=y
47CONFIG_HAVE_KERNEL_BZIP2=y 48CONFIG_HAVE_KERNEL_BZIP2=y
48CONFIG_HAVE_KERNEL_LZMA=y 49CONFIG_HAVE_KERNEL_LZMA=y
50CONFIG_HAVE_KERNEL_LZO=y
49CONFIG_KERNEL_GZIP=y 51CONFIG_KERNEL_GZIP=y
50# CONFIG_KERNEL_BZIP2 is not set 52# CONFIG_KERNEL_BZIP2 is not set
51# CONFIG_KERNEL_LZMA is not set 53# CONFIG_KERNEL_LZMA is not set
54# CONFIG_KERNEL_LZO is not set
52CONFIG_SWAP=y 55CONFIG_SWAP=y
53CONFIG_SYSVIPC=y 56CONFIG_SYSVIPC=y
54CONFIG_SYSVIPC_SYSCTL=y 57CONFIG_SYSVIPC_SYSCTL=y
@@ -71,7 +74,6 @@ CONFIG_RCU_FANOUT=32
71CONFIG_IKCONFIG=y 74CONFIG_IKCONFIG=y
72CONFIG_IKCONFIG_PROC=y 75CONFIG_IKCONFIG_PROC=y
73CONFIG_LOG_BUF_SHIFT=16 76CONFIG_LOG_BUF_SHIFT=16
74# CONFIG_GROUP_SCHED is not set
75# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
76CONFIG_SYSFS_DEPRECATED=y 78CONFIG_SYSFS_DEPRECATED=y
77CONFIG_SYSFS_DEPRECATED_V2=y 79CONFIG_SYSFS_DEPRECATED_V2=y
@@ -82,6 +84,7 @@ CONFIG_INITRAMFS_SOURCE=""
82CONFIG_RD_GZIP=y 84CONFIG_RD_GZIP=y
83# CONFIG_RD_BZIP2 is not set 85# CONFIG_RD_BZIP2 is not set
84# CONFIG_RD_LZMA is not set 86# CONFIG_RD_LZMA is not set
87# CONFIG_RD_LZO is not set
85# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 88# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
86CONFIG_SYSCTL=y 89CONFIG_SYSCTL=y
87CONFIG_ANON_INODES=y 90CONFIG_ANON_INODES=y
@@ -109,8 +112,9 @@ CONFIG_PERF_USE_VMALLOC=y
109# 112#
110# Kernel Performance Events And Counters 113# Kernel Performance Events And Counters
111# 114#
112# CONFIG_PERF_EVENTS is not set 115CONFIG_PERF_EVENTS=y
113# CONFIG_PERF_COUNTERS is not set 116# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
114CONFIG_VM_EVENT_COUNTERS=y 118CONFIG_VM_EVENT_COUNTERS=y
115CONFIG_PCI_QUIRKS=y 119CONFIG_PCI_QUIRKS=y
116CONFIG_COMPAT_BRK=y 120CONFIG_COMPAT_BRK=y
@@ -127,6 +131,7 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
127CONFIG_HAVE_DMA_ATTRS=y 131CONFIG_HAVE_DMA_ATTRS=y
128CONFIG_HAVE_CLK=y 132CONFIG_HAVE_CLK=y
129CONFIG_HAVE_DMA_API_DEBUG=y 133CONFIG_HAVE_DMA_API_DEBUG=y
134CONFIG_HAVE_HW_BREAKPOINT=y
130 135
131# 136#
132# GCOV-based kernel profiling 137# GCOV-based kernel profiling
@@ -245,6 +250,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
245CONFIG_MAX_ACTIVE_REGIONS=1 250CONFIG_MAX_ACTIVE_REGIONS=1
246CONFIG_ARCH_POPULATES_NODE_MAP=y 251CONFIG_ARCH_POPULATES_NODE_MAP=y
247CONFIG_ARCH_SELECT_MEMORY_MODEL=y 252CONFIG_ARCH_SELECT_MEMORY_MODEL=y
253CONFIG_UNCACHED_MAPPING=y
248CONFIG_PAGE_SIZE_4KB=y 254CONFIG_PAGE_SIZE_4KB=y
249# CONFIG_PAGE_SIZE_8KB is not set 255# CONFIG_PAGE_SIZE_8KB is not set
250# CONFIG_PAGE_SIZE_16KB is not set 256# CONFIG_PAGE_SIZE_16KB is not set
@@ -260,7 +266,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
260CONFIG_SPLIT_PTLOCK_CPUS=4 266CONFIG_SPLIT_PTLOCK_CPUS=4
261# CONFIG_PHYS_ADDR_T_64BIT is not set 267# CONFIG_PHYS_ADDR_T_64BIT is not set
262CONFIG_ZONE_DMA_FLAG=0 268CONFIG_ZONE_DMA_FLAG=0
263CONFIG_NR_QUICK=2 269CONFIG_NR_QUICK=1
264# CONFIG_KSM is not set 270# CONFIG_KSM is not set
265CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 271CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
266 272
@@ -345,7 +351,6 @@ CONFIG_PREEMPT_VOLUNTARY=y
345# CONFIG_PREEMPT is not set 351# CONFIG_PREEMPT is not set
346CONFIG_GUSA=y 352CONFIG_GUSA=y
347# CONFIG_GUSA_RB is not set 353# CONFIG_GUSA_RB is not set
348# CONFIG_SPARSE_IRQ is not set
349 354
350# 355#
351# Boot options 356# Boot options
@@ -361,9 +366,9 @@ CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf rw"
361# Bus options 366# Bus options
362# 367#
363CONFIG_PCI=y 368CONFIG_PCI=y
369CONFIG_PCI_DOMAINS=y
364# CONFIG_PCIEPORTBUS is not set 370# CONFIG_PCIEPORTBUS is not set
365# CONFIG_ARCH_SUPPORTS_MSI is not set 371# CONFIG_ARCH_SUPPORTS_MSI is not set
366CONFIG_PCI_LEGACY=y
367# CONFIG_PCI_DEBUG is not set 372# CONFIG_PCI_DEBUG is not set
368# CONFIG_PCI_STUB is not set 373# CONFIG_PCI_STUB is not set
369# CONFIG_PCI_IOV is not set 374# CONFIG_PCI_IOV is not set
@@ -392,7 +397,6 @@ CONFIG_NET=y
392# Networking options 397# Networking options
393# 398#
394CONFIG_PACKET=y 399CONFIG_PACKET=y
395CONFIG_PACKET_MMAP=y
396CONFIG_UNIX=y 400CONFIG_UNIX=y
397CONFIG_XFRM=y 401CONFIG_XFRM=y
398# CONFIG_XFRM_USER is not set 402# CONFIG_XFRM_USER is not set
@@ -561,6 +565,7 @@ CONFIG_IP6_NF_RAW=m
561# CONFIG_ATM is not set 565# CONFIG_ATM is not set
562CONFIG_STP=y 566CONFIG_STP=y
563CONFIG_BRIDGE=y 567CONFIG_BRIDGE=y
568CONFIG_BRIDGE_IGMP_SNOOPING=y
564# CONFIG_NET_DSA is not set 569# CONFIG_NET_DSA is not set
565CONFIG_VLAN_8021Q=y 570CONFIG_VLAN_8021Q=y
566# CONFIG_VLAN_8021Q_GVRP is not set 571# CONFIG_VLAN_8021Q_GVRP is not set
@@ -749,6 +754,7 @@ CONFIG_MTD_NAND_IDS=m
749# CONFIG_MTD_NAND_CAFE is not set 754# CONFIG_MTD_NAND_CAFE is not set
750# CONFIG_MTD_NAND_PLATFORM is not set 755# CONFIG_MTD_NAND_PLATFORM is not set
751# CONFIG_MTD_ALAUDA is not set 756# CONFIG_MTD_ALAUDA is not set
757# CONFIG_MTD_NAND_SH_FLCTL is not set
752# CONFIG_MTD_ONENAND is not set 758# CONFIG_MTD_ONENAND is not set
753 759
754# 760#
@@ -768,10 +774,6 @@ CONFIG_BLK_DEV=y
768# CONFIG_BLK_DEV_COW_COMMON is not set 774# CONFIG_BLK_DEV_COW_COMMON is not set
769CONFIG_BLK_DEV_LOOP=m 775CONFIG_BLK_DEV_LOOP=m
770CONFIG_BLK_DEV_CRYPTOLOOP=m 776CONFIG_BLK_DEV_CRYPTOLOOP=m
771
772#
773# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
774#
775# CONFIG_BLK_DEV_DRBD is not set 777# CONFIG_BLK_DEV_DRBD is not set
776# CONFIG_BLK_DEV_NBD is not set 778# CONFIG_BLK_DEV_NBD is not set
777# CONFIG_BLK_DEV_SX8 is not set 779# CONFIG_BLK_DEV_SX8 is not set
@@ -802,6 +804,7 @@ CONFIG_HAVE_IDE=y
802# 804#
803# SCSI device support 805# SCSI device support
804# 806#
807CONFIG_SCSI_MOD=y
805# CONFIG_RAID_ATTRS is not set 808# CONFIG_RAID_ATTRS is not set
806CONFIG_SCSI=y 809CONFIG_SCSI=y
807CONFIG_SCSI_DMA=y 810CONFIG_SCSI_DMA=y
@@ -892,7 +895,7 @@ CONFIG_SCSI_LOWLEVEL=y
892# 895#
893 896
894# 897#
895# See the help texts for more information. 898# The newer stack is recommended.
896# 899#
897# CONFIG_FIREWIRE is not set 900# CONFIG_FIREWIRE is not set
898# CONFIG_IEEE1394 is not set 901# CONFIG_IEEE1394 is not set
@@ -951,6 +954,7 @@ CONFIG_NET_PCI=y
951# CONFIG_PCNET32 is not set 954# CONFIG_PCNET32 is not set
952# CONFIG_AMD8111_ETH is not set 955# CONFIG_AMD8111_ETH is not set
953# CONFIG_ADAPTEC_STARFIRE is not set 956# CONFIG_ADAPTEC_STARFIRE is not set
957# CONFIG_KSZ884X_PCI is not set
954# CONFIG_B44 is not set 958# CONFIG_B44 is not set
955# CONFIG_FORCEDETH is not set 959# CONFIG_FORCEDETH is not set
956# CONFIG_E100 is not set 960# CONFIG_E100 is not set
@@ -1002,6 +1006,8 @@ CONFIG_NETDEV_10000=y
1002# CONFIG_CHELSIO_T1 is not set 1006# CONFIG_CHELSIO_T1 is not set
1003CONFIG_CHELSIO_T3_DEPENDS=y 1007CONFIG_CHELSIO_T3_DEPENDS=y
1004# CONFIG_CHELSIO_T3 is not set 1008# CONFIG_CHELSIO_T3 is not set
1009CONFIG_CHELSIO_T4_DEPENDS=y
1010# CONFIG_CHELSIO_T4 is not set
1005# CONFIG_ENIC is not set 1011# CONFIG_ENIC is not set
1006# CONFIG_IXGBE is not set 1012# CONFIG_IXGBE is not set
1007# CONFIG_IXGB is not set 1013# CONFIG_IXGB is not set
@@ -1014,6 +1020,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
1014# CONFIG_MLX4_CORE is not set 1020# CONFIG_MLX4_CORE is not set
1015# CONFIG_TEHUTI is not set 1021# CONFIG_TEHUTI is not set
1016# CONFIG_BNX2X is not set 1022# CONFIG_BNX2X is not set
1023# CONFIG_QLCNIC is not set
1017# CONFIG_QLGE is not set 1024# CONFIG_QLGE is not set
1018# CONFIG_SFC is not set 1025# CONFIG_SFC is not set
1019# CONFIG_BE2NET is not set 1026# CONFIG_BE2NET is not set
@@ -1040,6 +1047,7 @@ CONFIG_USB_NET_AX8817X=m
1040CONFIG_USB_NET_CDCETHER=m 1047CONFIG_USB_NET_CDCETHER=m
1041# CONFIG_USB_NET_CDC_EEM is not set 1048# CONFIG_USB_NET_CDC_EEM is not set
1042# CONFIG_USB_NET_DM9601 is not set 1049# CONFIG_USB_NET_DM9601 is not set
1050# CONFIG_USB_NET_SMSC75XX is not set
1043# CONFIG_USB_NET_SMSC95XX is not set 1051# CONFIG_USB_NET_SMSC95XX is not set
1044# CONFIG_USB_NET_GL620A is not set 1052# CONFIG_USB_NET_GL620A is not set
1045CONFIG_USB_NET_NET1080=m 1053CONFIG_USB_NET_NET1080=m
@@ -1049,6 +1057,7 @@ CONFIG_USB_NET_PLUSB=m
1049# CONFIG_USB_NET_CDC_SUBSET is not set 1057# CONFIG_USB_NET_CDC_SUBSET is not set
1050CONFIG_USB_NET_ZAURUS=m 1058CONFIG_USB_NET_ZAURUS=m
1051# CONFIG_USB_NET_INT51X1 is not set 1059# CONFIG_USB_NET_INT51X1 is not set
1060# CONFIG_USB_IPHETH is not set
1052# CONFIG_WAN is not set 1061# CONFIG_WAN is not set
1053# CONFIG_FDDI is not set 1062# CONFIG_FDDI is not set
1054# CONFIG_HIPPI is not set 1063# CONFIG_HIPPI is not set
@@ -1136,6 +1145,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
1136CONFIG_SERIAL_CORE=y 1145CONFIG_SERIAL_CORE=y
1137CONFIG_SERIAL_CORE_CONSOLE=y 1146CONFIG_SERIAL_CORE_CONSOLE=y
1138# CONFIG_SERIAL_JSM is not set 1147# CONFIG_SERIAL_JSM is not set
1148# CONFIG_SERIAL_TIMBERDALE is not set
1139CONFIG_UNIX98_PTYS=y 1149CONFIG_UNIX98_PTYS=y
1140# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 1150# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1141CONFIG_LEGACY_PTYS=y 1151CONFIG_LEGACY_PTYS=y
@@ -1215,6 +1225,7 @@ CONFIG_SSB_POSSIBLE=y
1215# CONFIG_MFD_SH_MOBILE_SDHI is not set 1225# CONFIG_MFD_SH_MOBILE_SDHI is not set
1216# CONFIG_HTC_PASIC3 is not set 1226# CONFIG_HTC_PASIC3 is not set
1217# CONFIG_MFD_TMIO is not set 1227# CONFIG_MFD_TMIO is not set
1228# CONFIG_LPC_SCH is not set
1218# CONFIG_REGULATOR is not set 1229# CONFIG_REGULATOR is not set
1219# CONFIG_MEDIA_SUPPORT is not set 1230# CONFIG_MEDIA_SUPPORT is not set
1220 1231
@@ -1222,6 +1233,7 @@ CONFIG_SSB_POSSIBLE=y
1222# Graphics support 1233# Graphics support
1223# 1234#
1224CONFIG_VGA_ARB=y 1235CONFIG_VGA_ARB=y
1236CONFIG_VGA_ARB_MAX_GPUS=16
1225# CONFIG_DRM is not set 1237# CONFIG_DRM is not set
1226# CONFIG_VGASTATE is not set 1238# CONFIG_VGASTATE is not set
1227# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1239# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1372,6 +1384,7 @@ CONFIG_USB_SERIAL_ARK3116=m
1372# CONFIG_USB_SERIAL_NAVMAN is not set 1384# CONFIG_USB_SERIAL_NAVMAN is not set
1373CONFIG_USB_SERIAL_PL2303=m 1385CONFIG_USB_SERIAL_PL2303=m
1374# CONFIG_USB_SERIAL_OTI6858 is not set 1386# CONFIG_USB_SERIAL_OTI6858 is not set
1387# CONFIG_USB_SERIAL_QCAUX is not set
1375# CONFIG_USB_SERIAL_QUALCOMM is not set 1388# CONFIG_USB_SERIAL_QUALCOMM is not set
1376# CONFIG_USB_SERIAL_SPCP8X5 is not set 1389# CONFIG_USB_SERIAL_SPCP8X5 is not set
1377# CONFIG_USB_SERIAL_HP4X is not set 1390# CONFIG_USB_SERIAL_HP4X is not set
@@ -1385,6 +1398,7 @@ CONFIG_USB_SERIAL_PL2303=m
1385# CONFIG_USB_SERIAL_OPTION is not set 1398# CONFIG_USB_SERIAL_OPTION is not set
1386# CONFIG_USB_SERIAL_OMNINET is not set 1399# CONFIG_USB_SERIAL_OMNINET is not set
1387# CONFIG_USB_SERIAL_OPTICON is not set 1400# CONFIG_USB_SERIAL_OPTICON is not set
1401# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
1388# CONFIG_USB_SERIAL_DEBUG is not set 1402# CONFIG_USB_SERIAL_DEBUG is not set
1389 1403
1390# 1404#
@@ -1397,7 +1411,6 @@ CONFIG_USB_SERIAL_PL2303=m
1397# CONFIG_USB_RIO500 is not set 1411# CONFIG_USB_RIO500 is not set
1398# CONFIG_USB_LEGOTOWER is not set 1412# CONFIG_USB_LEGOTOWER is not set
1399# CONFIG_USB_LCD is not set 1413# CONFIG_USB_LCD is not set
1400# CONFIG_USB_BERRY_CHARGE is not set
1401# CONFIG_USB_LED is not set 1414# CONFIG_USB_LED is not set
1402# CONFIG_USB_CYPRESS_CY7C63 is not set 1415# CONFIG_USB_CYPRESS_CY7C63 is not set
1403# CONFIG_USB_CYTHERM is not set 1416# CONFIG_USB_CYTHERM is not set
@@ -1410,7 +1423,6 @@ CONFIG_USB_SERIAL_PL2303=m
1410# CONFIG_USB_IOWARRIOR is not set 1423# CONFIG_USB_IOWARRIOR is not set
1411# CONFIG_USB_TEST is not set 1424# CONFIG_USB_TEST is not set
1412# CONFIG_USB_ISIGHTFW is not set 1425# CONFIG_USB_ISIGHTFW is not set
1413# CONFIG_USB_VST is not set
1414# CONFIG_USB_GADGET is not set 1426# CONFIG_USB_GADGET is not set
1415 1427
1416# 1428#
@@ -1552,6 +1564,7 @@ CONFIG_MISC_FILESYSTEMS=y
1552# CONFIG_BFS_FS is not set 1564# CONFIG_BFS_FS is not set
1553# CONFIG_EFS_FS is not set 1565# CONFIG_EFS_FS is not set
1554# CONFIG_JFFS2_FS is not set 1566# CONFIG_JFFS2_FS is not set
1567# CONFIG_LOGFS is not set
1555# CONFIG_CRAMFS is not set 1568# CONFIG_CRAMFS is not set
1556# CONFIG_SQUASHFS is not set 1569# CONFIG_SQUASHFS is not set
1557# CONFIG_VXFS_FS is not set 1570# CONFIG_VXFS_FS is not set
@@ -1585,6 +1598,7 @@ CONFIG_SUNRPC=y
1585# CONFIG_RPCSEC_GSS_SPKM3 is not set 1598# CONFIG_RPCSEC_GSS_SPKM3 is not set
1586CONFIG_SMB_FS=m 1599CONFIG_SMB_FS=m
1587# CONFIG_SMB_NLS_DEFAULT is not set 1600# CONFIG_SMB_NLS_DEFAULT is not set
1601# CONFIG_CEPH_FS is not set
1588CONFIG_CIFS=m 1602CONFIG_CIFS=m
1589# CONFIG_CIFS_STATS is not set 1603# CONFIG_CIFS_STATS is not set
1590CONFIG_CIFS_WEAK_PW_HASH=y 1604CONFIG_CIFS_WEAK_PW_HASH=y
@@ -1680,6 +1694,7 @@ CONFIG_SCHED_DEBUG=y
1680# CONFIG_TIMER_STATS is not set 1694# CONFIG_TIMER_STATS is not set
1681# CONFIG_DEBUG_OBJECTS is not set 1695# CONFIG_DEBUG_OBJECTS is not set
1682# CONFIG_DEBUG_SLAB is not set 1696# CONFIG_DEBUG_SLAB is not set
1697# CONFIG_DEBUG_KMEMLEAK is not set
1683# CONFIG_DEBUG_RT_MUTEXES is not set 1698# CONFIG_DEBUG_RT_MUTEXES is not set
1684# CONFIG_RT_MUTEX_TESTER is not set 1699# CONFIG_RT_MUTEX_TESTER is not set
1685# CONFIG_DEBUG_SPINLOCK is not set 1700# CONFIG_DEBUG_SPINLOCK is not set
@@ -1726,6 +1741,7 @@ CONFIG_FTRACE=y
1726CONFIG_BRANCH_PROFILE_NONE=y 1741CONFIG_BRANCH_PROFILE_NONE=y
1727# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1742# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1728# CONFIG_PROFILE_ALL_BRANCHES is not set 1743# CONFIG_PROFILE_ALL_BRANCHES is not set
1744# CONFIG_KSYM_TRACER is not set
1729# CONFIG_STACK_TRACER is not set 1745# CONFIG_STACK_TRACER is not set
1730# CONFIG_KMEMTRACE is not set 1746# CONFIG_KMEMTRACE is not set
1731# CONFIG_WORKQUEUE_TRACER is not set 1747# CONFIG_WORKQUEUE_TRACER is not set
@@ -1853,6 +1869,7 @@ CONFIG_CRYPTO_DEFLATE=y
1853# CONFIG_CRYPTO_ANSI_CPRNG is not set 1869# CONFIG_CRYPTO_ANSI_CPRNG is not set
1854CONFIG_CRYPTO_HW=y 1870CONFIG_CRYPTO_HW=y
1855# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1871# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1872# CONFIG_VIRTUALIZATION is not set
1856# CONFIG_BINARY_PRINTF is not set 1873# CONFIG_BINARY_PRINTF is not set
1857 1874
1858# 1875#
diff --git a/arch/sh/configs/ul2_defconfig b/arch/sh/configs/ul2_defconfig
index 4fa03bf086dd..17b7258dcde5 100644
--- a/arch/sh/configs/ul2_defconfig
+++ b/arch/sh/configs/ul2_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:18:53 2010 4# Tue May 18 18:10:50 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set 18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -33,6 +33,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y 33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 34CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
35CONFIG_DMA_NONCOHERENT=y 35CONFIG_DMA_NONCOHERENT=y
36CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y 38CONFIG_CONSTRUCTORS=y
38 39
@@ -48,9 +49,11 @@ CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y 49CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y 50CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y 51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
51CONFIG_KERNEL_GZIP=y 53CONFIG_KERNEL_GZIP=y
52# CONFIG_KERNEL_BZIP2 is not set 54# CONFIG_KERNEL_BZIP2 is not set
53# CONFIG_KERNEL_LZMA is not set 55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
54CONFIG_SWAP=y 57CONFIG_SWAP=y
55CONFIG_SYSVIPC=y 58CONFIG_SYSVIPC=y
56CONFIG_SYSVIPC_SYSCTL=y 59CONFIG_SYSVIPC_SYSCTL=y
@@ -73,7 +76,6 @@ CONFIG_RCU_FANOUT=32
73CONFIG_IKCONFIG=y 76CONFIG_IKCONFIG=y
74CONFIG_IKCONFIG_PROC=y 77CONFIG_IKCONFIG_PROC=y
75CONFIG_LOG_BUF_SHIFT=14 78CONFIG_LOG_BUF_SHIFT=14
76# CONFIG_GROUP_SCHED is not set
77# CONFIG_CGROUPS is not set 79# CONFIG_CGROUPS is not set
78CONFIG_SYSFS_DEPRECATED=y 80CONFIG_SYSFS_DEPRECATED=y
79CONFIG_SYSFS_DEPRECATED_V2=y 81CONFIG_SYSFS_DEPRECATED_V2=y
@@ -84,6 +86,7 @@ CONFIG_INITRAMFS_SOURCE=""
84CONFIG_RD_GZIP=y 86CONFIG_RD_GZIP=y
85# CONFIG_RD_BZIP2 is not set 87# CONFIG_RD_BZIP2 is not set
86# CONFIG_RD_LZMA is not set 88# CONFIG_RD_LZMA is not set
89# CONFIG_RD_LZO is not set
87CONFIG_CC_OPTIMIZE_FOR_SIZE=y 90CONFIG_CC_OPTIMIZE_FOR_SIZE=y
88CONFIG_SYSCTL=y 91CONFIG_SYSCTL=y
89CONFIG_ANON_INODES=y 92CONFIG_ANON_INODES=y
@@ -122,13 +125,13 @@ CONFIG_PROFILING=y
122# CONFIG_OPROFILE is not set 125# CONFIG_OPROFILE is not set
123CONFIG_HAVE_OPROFILE=y 126CONFIG_HAVE_OPROFILE=y
124# CONFIG_KPROBES is not set 127# CONFIG_KPROBES is not set
125CONFIG_HAVE_IOREMAP_PROT=y
126CONFIG_HAVE_KPROBES=y 128CONFIG_HAVE_KPROBES=y
127CONFIG_HAVE_KRETPROBES=y 129CONFIG_HAVE_KRETPROBES=y
128CONFIG_HAVE_ARCH_TRACEHOOK=y 130CONFIG_HAVE_ARCH_TRACEHOOK=y
129CONFIG_HAVE_DMA_ATTRS=y 131CONFIG_HAVE_DMA_ATTRS=y
130CONFIG_HAVE_CLK=y 132CONFIG_HAVE_CLK=y
131CONFIG_HAVE_DMA_API_DEBUG=y 133CONFIG_HAVE_DMA_API_DEBUG=y
134CONFIG_HAVE_HW_BREAKPOINT=y
132 135
133# 136#
134# GCOV-based kernel profiling 137# GCOV-based kernel profiling
@@ -244,7 +247,7 @@ CONFIG_FORCE_MAX_ZONEORDER=11
244CONFIG_MEMORY_START=0x08000000 247CONFIG_MEMORY_START=0x08000000
245CONFIG_MEMORY_SIZE=0x01f00000 248CONFIG_MEMORY_SIZE=0x01f00000
246CONFIG_29BIT=y 249CONFIG_29BIT=y
247# CONFIG_X2TLB is not set 250CONFIG_X2TLB=y
248CONFIG_VSYSCALL=y 251CONFIG_VSYSCALL=y
249CONFIG_NUMA=y 252CONFIG_NUMA=y
250CONFIG_NODES_SHIFT=1 253CONFIG_NODES_SHIFT=1
@@ -255,6 +258,8 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
255CONFIG_ARCH_SELECT_MEMORY_MODEL=y 258CONFIG_ARCH_SELECT_MEMORY_MODEL=y
256CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 259CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
257CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 260CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
261CONFIG_IOREMAP_FIXED=y
262CONFIG_UNCACHED_MAPPING=y
258CONFIG_PAGE_SIZE_4KB=y 263CONFIG_PAGE_SIZE_4KB=y
259# CONFIG_PAGE_SIZE_8KB is not set 264# CONFIG_PAGE_SIZE_8KB is not set
260# CONFIG_PAGE_SIZE_16KB is not set 265# CONFIG_PAGE_SIZE_16KB is not set
@@ -278,7 +283,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
278# CONFIG_MIGRATION is not set 283# CONFIG_MIGRATION is not set
279# CONFIG_PHYS_ADDR_T_64BIT is not set 284# CONFIG_PHYS_ADDR_T_64BIT is not set
280CONFIG_ZONE_DMA_FLAG=0 285CONFIG_ZONE_DMA_FLAG=0
281CONFIG_NR_QUICK=2 286CONFIG_NR_QUICK=1
282# CONFIG_KSM is not set 287# CONFIG_KSM is not set
283CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 288CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
284 289
@@ -352,7 +357,7 @@ CONFIG_KEXEC=y
352# CONFIG_PREEMPT_VOLUNTARY is not set 357# CONFIG_PREEMPT_VOLUNTARY is not set
353CONFIG_PREEMPT=y 358CONFIG_PREEMPT=y
354CONFIG_GUSA=y 359CONFIG_GUSA=y
355# CONFIG_SPARSE_IRQ is not set 360# CONFIG_INTC_USERIMASK is not set
356 361
357# 362#
358# Boot options 363# Boot options
@@ -388,6 +393,7 @@ CONFIG_SUSPEND=y
388CONFIG_SUSPEND_FREEZER=y 393CONFIG_SUSPEND_FREEZER=y
389# CONFIG_HIBERNATION is not set 394# CONFIG_HIBERNATION is not set
390CONFIG_PM_RUNTIME=y 395CONFIG_PM_RUNTIME=y
396CONFIG_PM_OPS=y
391# CONFIG_CPU_IDLE is not set 397# CONFIG_CPU_IDLE is not set
392CONFIG_NET=y 398CONFIG_NET=y
393 399
@@ -395,7 +401,6 @@ CONFIG_NET=y
395# Networking options 401# Networking options
396# 402#
397CONFIG_PACKET=y 403CONFIG_PACKET=y
398CONFIG_PACKET_MMAP=y
399CONFIG_UNIX=y 404CONFIG_UNIX=y
400CONFIG_XFRM=y 405CONFIG_XFRM=y
401# CONFIG_XFRM_USER is not set 406# CONFIG_XFRM_USER is not set
@@ -473,7 +478,7 @@ CONFIG_CFG80211=y
473# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set 478# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
474# CONFIG_CFG80211_REG_DEBUG is not set 479# CONFIG_CFG80211_REG_DEBUG is not set
475CONFIG_CFG80211_DEFAULT_PS=y 480CONFIG_CFG80211_DEFAULT_PS=y
476# CONFIG_WIRELESS_OLD_REGULATORY is not set 481# CONFIG_CFG80211_INTERNAL_REGDB is not set
477CONFIG_CFG80211_WEXT=y 482CONFIG_CFG80211_WEXT=y
478CONFIG_WIRELESS_EXT_SYSFS=y 483CONFIG_WIRELESS_EXT_SYSFS=y
479CONFIG_LIB80211=m 484CONFIG_LIB80211=m
@@ -619,6 +624,7 @@ CONFIG_HAVE_IDE=y
619# 624#
620# SCSI device support 625# SCSI device support
621# 626#
627CONFIG_SCSI_MOD=y
622# CONFIG_RAID_ATTRS is not set 628# CONFIG_RAID_ATTRS is not set
623CONFIG_SCSI=y 629CONFIG_SCSI=y
624CONFIG_SCSI_DMA=y 630CONFIG_SCSI_DMA=y
@@ -709,6 +715,7 @@ CONFIG_LIBERTAS=m
709# CONFIG_LIBERTAS_USB is not set 715# CONFIG_LIBERTAS_USB is not set
710CONFIG_LIBERTAS_SDIO=m 716CONFIG_LIBERTAS_SDIO=m
711CONFIG_LIBERTAS_DEBUG=y 717CONFIG_LIBERTAS_DEBUG=y
718# CONFIG_LIBERTAS_MESH is not set
712# CONFIG_P54_COMMON is not set 719# CONFIG_P54_COMMON is not set
713# CONFIG_RT2X00 is not set 720# CONFIG_RT2X00 is not set
714# CONFIG_WL12XX is not set 721# CONFIG_WL12XX is not set
@@ -730,6 +737,7 @@ CONFIG_USB_NET_AX8817X=y
730CONFIG_USB_NET_CDCETHER=y 737CONFIG_USB_NET_CDCETHER=y
731# CONFIG_USB_NET_CDC_EEM is not set 738# CONFIG_USB_NET_CDC_EEM is not set
732# CONFIG_USB_NET_DM9601 is not set 739# CONFIG_USB_NET_DM9601 is not set
740# CONFIG_USB_NET_SMSC75XX is not set
733# CONFIG_USB_NET_SMSC95XX is not set 741# CONFIG_USB_NET_SMSC95XX is not set
734# CONFIG_USB_NET_GL620A is not set 742# CONFIG_USB_NET_GL620A is not set
735# CONFIG_USB_NET_NET1080 is not set 743# CONFIG_USB_NET_NET1080 is not set
@@ -739,6 +747,7 @@ CONFIG_USB_NET_CDCETHER=y
739# CONFIG_USB_NET_CDC_SUBSET is not set 747# CONFIG_USB_NET_CDC_SUBSET is not set
740# CONFIG_USB_NET_ZAURUS is not set 748# CONFIG_USB_NET_ZAURUS is not set
741# CONFIG_USB_NET_INT51X1 is not set 749# CONFIG_USB_NET_INT51X1 is not set
750# CONFIG_USB_IPHETH is not set
742# CONFIG_WAN is not set 751# CONFIG_WAN is not set
743# CONFIG_PPP is not set 752# CONFIG_PPP is not set
744# CONFIG_SLIP is not set 753# CONFIG_SLIP is not set
@@ -800,6 +809,7 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=1
800CONFIG_SERIAL_SH_SCI_CONSOLE=y 809CONFIG_SERIAL_SH_SCI_CONSOLE=y
801CONFIG_SERIAL_CORE=y 810CONFIG_SERIAL_CORE=y
802CONFIG_SERIAL_CORE_CONSOLE=y 811CONFIG_SERIAL_CORE_CONSOLE=y
812# CONFIG_SERIAL_TIMBERDALE is not set
803# CONFIG_UNIX98_PTYS is not set 813# CONFIG_UNIX98_PTYS is not set
804# CONFIG_LEGACY_PTYS is not set 814# CONFIG_LEGACY_PTYS is not set
805# CONFIG_IPMI_HANDLER is not set 815# CONFIG_IPMI_HANDLER is not set
@@ -952,7 +962,6 @@ CONFIG_USB_STORAGE=y
952# CONFIG_USB_RIO500 is not set 962# CONFIG_USB_RIO500 is not set
953# CONFIG_USB_LEGOTOWER is not set 963# CONFIG_USB_LEGOTOWER is not set
954# CONFIG_USB_LCD is not set 964# CONFIG_USB_LCD is not set
955# CONFIG_USB_BERRY_CHARGE is not set
956# CONFIG_USB_LED is not set 965# CONFIG_USB_LED is not set
957# CONFIG_USB_CYPRESS_CY7C63 is not set 966# CONFIG_USB_CYPRESS_CY7C63 is not set
958# CONFIG_USB_CYTHERM is not set 967# CONFIG_USB_CYTHERM is not set
@@ -964,7 +973,6 @@ CONFIG_USB_STORAGE=y
964# CONFIG_USB_IOWARRIOR is not set 973# CONFIG_USB_IOWARRIOR is not set
965# CONFIG_USB_TEST is not set 974# CONFIG_USB_TEST is not set
966# CONFIG_USB_ISIGHTFW is not set 975# CONFIG_USB_ISIGHTFW is not set
967# CONFIG_USB_VST is not set
968# CONFIG_USB_GADGET is not set 976# CONFIG_USB_GADGET is not set
969 977
970# 978#
@@ -987,9 +995,6 @@ CONFIG_MMC_BLOCK_BOUNCE=y
987# MMC/SD/SDIO Host Controller Drivers 995# MMC/SD/SDIO Host Controller Drivers
988# 996#
989# CONFIG_MMC_SDHCI is not set 997# CONFIG_MMC_SDHCI is not set
990# CONFIG_MMC_AT91 is not set
991# CONFIG_MMC_ATMELMCI is not set
992# CONFIG_MMC_TMIO is not set
993# CONFIG_MEMSTICK is not set 998# CONFIG_MEMSTICK is not set
994# CONFIG_NEW_LEDS is not set 999# CONFIG_NEW_LEDS is not set
995# CONFIG_ACCESSIBILITY is not set 1000# CONFIG_ACCESSIBILITY is not set
@@ -1079,6 +1084,7 @@ CONFIG_MISC_FILESYSTEMS=y
1079# CONFIG_BFS_FS is not set 1084# CONFIG_BFS_FS is not set
1080# CONFIG_EFS_FS is not set 1085# CONFIG_EFS_FS is not set
1081# CONFIG_JFFS2_FS is not set 1086# CONFIG_JFFS2_FS is not set
1087# CONFIG_LOGFS is not set
1082CONFIG_CRAMFS=y 1088CONFIG_CRAMFS=y
1083# CONFIG_SQUASHFS is not set 1089# CONFIG_SQUASHFS is not set
1084# CONFIG_VXFS_FS is not set 1090# CONFIG_VXFS_FS is not set
@@ -1104,6 +1110,7 @@ CONFIG_SUNRPC=y
1104# CONFIG_RPCSEC_GSS_KRB5 is not set 1110# CONFIG_RPCSEC_GSS_KRB5 is not set
1105# CONFIG_RPCSEC_GSS_SPKM3 is not set 1111# CONFIG_RPCSEC_GSS_SPKM3 is not set
1106# CONFIG_SMB_FS is not set 1112# CONFIG_SMB_FS is not set
1113# CONFIG_CEPH_FS is not set
1107# CONFIG_CIFS is not set 1114# CONFIG_CIFS is not set
1108# CONFIG_NCP_FS is not set 1115# CONFIG_NCP_FS is not set
1109# CONFIG_CODA_FS is not set 1116# CONFIG_CODA_FS is not set
@@ -1299,6 +1306,7 @@ CONFIG_CRYPTO_ARC4=y
1299# 1306#
1300# CONFIG_CRYPTO_ANSI_CPRNG is not set 1307# CONFIG_CRYPTO_ANSI_CPRNG is not set
1301CONFIG_CRYPTO_HW=y 1308CONFIG_CRYPTO_HW=y
1309# CONFIG_VIRTUALIZATION is not set
1302# CONFIG_BINARY_PRINTF is not set 1310# CONFIG_BINARY_PRINTF is not set
1303 1311
1304# 1312#
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
index 23bda1916f4d..28bb19d2cbe9 100644
--- a/arch/sh/configs/urquell_defconfig
+++ b/arch/sh/configs/urquell_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc5
4# Mon Jan 4 15:27:53 2010 4# Tue May 18 18:13:10 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -35,6 +35,7 @@ CONFIG_ARCH_HAS_DEFAULT_IDLE=y
35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 35CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
36CONFIG_DMA_COHERENT=y 36CONFIG_DMA_COHERENT=y
37# CONFIG_DMA_NONCOHERENT is not set 37# CONFIG_DMA_NONCOHERENT is not set
38# CONFIG_NEED_DMA_MAP_STATE is not set
38CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 39CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
39CONFIG_CONSTRUCTORS=y 40CONFIG_CONSTRUCTORS=y
40 41
@@ -49,9 +50,11 @@ CONFIG_LOCALVERSION_AUTO=y
49CONFIG_HAVE_KERNEL_GZIP=y 50CONFIG_HAVE_KERNEL_GZIP=y
50CONFIG_HAVE_KERNEL_BZIP2=y 51CONFIG_HAVE_KERNEL_BZIP2=y
51CONFIG_HAVE_KERNEL_LZMA=y 52CONFIG_HAVE_KERNEL_LZMA=y
53CONFIG_HAVE_KERNEL_LZO=y
52CONFIG_KERNEL_GZIP=y 54CONFIG_KERNEL_GZIP=y
53# CONFIG_KERNEL_BZIP2 is not set 55# CONFIG_KERNEL_BZIP2 is not set
54# CONFIG_KERNEL_LZMA is not set 56# CONFIG_KERNEL_LZMA is not set
57# CONFIG_KERNEL_LZO is not set
55CONFIG_SWAP=y 58CONFIG_SWAP=y
56CONFIG_SYSVIPC=y 59CONFIG_SYSVIPC=y
57CONFIG_SYSVIPC_SYSCTL=y 60CONFIG_SYSVIPC_SYSCTL=y
@@ -77,11 +80,6 @@ CONFIG_RCU_FANOUT=32
77CONFIG_IKCONFIG=y 80CONFIG_IKCONFIG=y
78CONFIG_IKCONFIG_PROC=y 81CONFIG_IKCONFIG_PROC=y
79CONFIG_LOG_BUF_SHIFT=14 82CONFIG_LOG_BUF_SHIFT=14
80CONFIG_GROUP_SCHED=y
81CONFIG_FAIR_GROUP_SCHED=y
82CONFIG_RT_GROUP_SCHED=y
83# CONFIG_USER_SCHED is not set
84CONFIG_CGROUP_SCHED=y
85CONFIG_CGROUPS=y 83CONFIG_CGROUPS=y
86CONFIG_CGROUP_DEBUG=y 84CONFIG_CGROUP_DEBUG=y
87CONFIG_CGROUP_NS=y 85CONFIG_CGROUP_NS=y
@@ -93,6 +91,9 @@ CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y 91CONFIG_RESOURCE_COUNTERS=y
94CONFIG_CGROUP_MEM_RES_CTLR=y 92CONFIG_CGROUP_MEM_RES_CTLR=y
95CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y 93CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
94CONFIG_CGROUP_SCHED=y
95CONFIG_FAIR_GROUP_SCHED=y
96CONFIG_RT_GROUP_SCHED=y
96CONFIG_MM_OWNER=y 97CONFIG_MM_OWNER=y
97# CONFIG_SYSFS_DEPRECATED_V2 is not set 98# CONFIG_SYSFS_DEPRECATED_V2 is not set
98# CONFIG_RELAY is not set 99# CONFIG_RELAY is not set
@@ -102,6 +103,7 @@ CONFIG_INITRAMFS_SOURCE=""
102CONFIG_RD_GZIP=y 103CONFIG_RD_GZIP=y
103# CONFIG_RD_BZIP2 is not set 104# CONFIG_RD_BZIP2 is not set
104# CONFIG_RD_LZMA is not set 105# CONFIG_RD_LZMA is not set
106# CONFIG_RD_LZO is not set
105CONFIG_CC_OPTIMIZE_FOR_SIZE=y 107CONFIG_CC_OPTIMIZE_FOR_SIZE=y
106CONFIG_SYSCTL=y 108CONFIG_SYSCTL=y
107CONFIG_ANON_INODES=y 109CONFIG_ANON_INODES=y
@@ -142,13 +144,13 @@ CONFIG_PROFILING=y
142# CONFIG_OPROFILE is not set 144# CONFIG_OPROFILE is not set
143CONFIG_HAVE_OPROFILE=y 145CONFIG_HAVE_OPROFILE=y
144# CONFIG_KPROBES is not set 146# CONFIG_KPROBES is not set
145CONFIG_HAVE_IOREMAP_PROT=y
146CONFIG_HAVE_KPROBES=y 147CONFIG_HAVE_KPROBES=y
147CONFIG_HAVE_KRETPROBES=y 148CONFIG_HAVE_KRETPROBES=y
148CONFIG_HAVE_ARCH_TRACEHOOK=y 149CONFIG_HAVE_ARCH_TRACEHOOK=y
149CONFIG_HAVE_DMA_ATTRS=y 150CONFIG_HAVE_DMA_ATTRS=y
150CONFIG_HAVE_CLK=y 151CONFIG_HAVE_CLK=y
151CONFIG_HAVE_DMA_API_DEBUG=y 152CONFIG_HAVE_DMA_API_DEBUG=y
153CONFIG_HAVE_HW_BREAKPOINT=y
152 154
153# 155#
154# GCOV-based kernel profiling 156# GCOV-based kernel profiling
@@ -169,7 +171,6 @@ CONFIG_BLOCK=y
169CONFIG_LBDAF=y 171CONFIG_LBDAF=y
170# CONFIG_BLK_DEV_BSG is not set 172# CONFIG_BLK_DEV_BSG is not set
171# CONFIG_BLK_DEV_INTEGRITY is not set 173# CONFIG_BLK_DEV_INTEGRITY is not set
172# CONFIG_BLK_CGROUP is not set
173 174
174# 175#
175# IO Schedulers 176# IO Schedulers
@@ -265,8 +266,8 @@ CONFIG_FORCE_MAX_ZONEORDER=11
265CONFIG_MEMORY_START=0x08000000 266CONFIG_MEMORY_START=0x08000000
266CONFIG_MEMORY_SIZE=0x08000000 267CONFIG_MEMORY_SIZE=0x08000000
267CONFIG_29BIT=y 268CONFIG_29BIT=y
268# CONFIG_PMB_ENABLE is not set 269# CONFIG_PMB is not set
269# CONFIG_X2TLB is not set 270CONFIG_X2TLB=y
270CONFIG_VSYSCALL=y 271CONFIG_VSYSCALL=y
271# CONFIG_NUMA is not set 272# CONFIG_NUMA is not set
272CONFIG_ARCH_FLATMEM_ENABLE=y 273CONFIG_ARCH_FLATMEM_ENABLE=y
@@ -277,6 +278,8 @@ CONFIG_ARCH_POPULATES_NODE_MAP=y
277CONFIG_ARCH_SELECT_MEMORY_MODEL=y 278CONFIG_ARCH_SELECT_MEMORY_MODEL=y
278CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 279CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
279CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y 280CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
281CONFIG_IOREMAP_FIXED=y
282CONFIG_UNCACHED_MAPPING=y
280CONFIG_PAGE_SIZE_4KB=y 283CONFIG_PAGE_SIZE_4KB=y
281# CONFIG_PAGE_SIZE_8KB is not set 284# CONFIG_PAGE_SIZE_8KB is not set
282# CONFIG_PAGE_SIZE_16KB is not set 285# CONFIG_PAGE_SIZE_16KB is not set
@@ -299,7 +302,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
299CONFIG_MIGRATION=y 302CONFIG_MIGRATION=y
300# CONFIG_PHYS_ADDR_T_64BIT is not set 303# CONFIG_PHYS_ADDR_T_64BIT is not set
301CONFIG_ZONE_DMA_FLAG=0 304CONFIG_ZONE_DMA_FLAG=0
302CONFIG_NR_QUICK=2 305CONFIG_NR_QUICK=1
303# CONFIG_KSM is not set 306# CONFIG_KSM is not set
304CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 307CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
305 308
@@ -317,6 +320,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y
317# CONFIG_CPU_BIG_ENDIAN is not set 320# CONFIG_CPU_BIG_ENDIAN is not set
318CONFIG_SH_FPU=y 321CONFIG_SH_FPU=y
319CONFIG_SH_STORE_QUEUES=y 322CONFIG_SH_STORE_QUEUES=y
323# CONFIG_SPECULATIVE_EXECUTION is not set
320CONFIG_CPU_HAS_INTEVT=y 324CONFIG_CPU_HAS_INTEVT=y
321CONFIG_CPU_HAS_SR_RB=y 325CONFIG_CPU_HAS_SR_RB=y
322CONFIG_CPU_HAS_PTEAEX=y 326CONFIG_CPU_HAS_PTEAEX=y
@@ -325,15 +329,14 @@ CONFIG_CPU_HAS_FPU=y
325# 329#
326# Board support 330# Board support
327# 331#
332# CONFIG_SH_SDK7786 is not set
328CONFIG_SH_URQUELL=y 333CONFIG_SH_URQUELL=y
329 334
330# 335#
331# Timer and clock configuration 336# Timer and clock configuration
332# 337#
333CONFIG_SH_TIMER_TMU=y 338CONFIG_SH_TIMER_TMU=y
334CONFIG_SH_PCLK_FREQ=33333333
335CONFIG_SH_CLK_CPG=y 339CONFIG_SH_CLK_CPG=y
336CONFIG_SH_CLK_CPG_LEGACY=y
337CONFIG_TICK_ONESHOT=y 340CONFIG_TICK_ONESHOT=y
338# CONFIG_NO_HZ is not set 341# CONFIG_NO_HZ is not set
339CONFIG_HIGH_RES_TIMERS=y 342CONFIG_HIGH_RES_TIMERS=y
@@ -376,7 +379,7 @@ CONFIG_PREEMPT_NONE=y
376# CONFIG_PREEMPT_VOLUNTARY is not set 379# CONFIG_PREEMPT_VOLUNTARY is not set
377# CONFIG_PREEMPT is not set 380# CONFIG_PREEMPT is not set
378CONFIG_GUSA=y 381CONFIG_GUSA=y
379CONFIG_SPARSE_IRQ=y 382# CONFIG_INTC_USERIMASK is not set
380 383
381# 384#
382# Boot options 385# Boot options
@@ -391,6 +394,7 @@ CONFIG_ENTRY_OFFSET=0x00001000
391# Bus options 394# Bus options
392# 395#
393CONFIG_PCI=y 396CONFIG_PCI=y
397CONFIG_PCI_DOMAINS=y
394CONFIG_PCIEPORTBUS=y 398CONFIG_PCIEPORTBUS=y
395CONFIG_PCIEAER=y 399CONFIG_PCIEAER=y
396# CONFIG_PCIE_ECRC is not set 400# CONFIG_PCIE_ECRC is not set
@@ -398,7 +402,6 @@ CONFIG_PCIEAER=y
398CONFIG_PCIEASPM=y 402CONFIG_PCIEASPM=y
399CONFIG_PCIEASPM_DEBUG=y 403CONFIG_PCIEASPM_DEBUG=y
400# CONFIG_ARCH_SUPPORTS_MSI is not set 404# CONFIG_ARCH_SUPPORTS_MSI is not set
401# CONFIG_PCI_LEGACY is not set
402CONFIG_PCI_DEBUG=y 405CONFIG_PCI_DEBUG=y
403# CONFIG_PCI_STUB is not set 406# CONFIG_PCI_STUB is not set
404# CONFIG_PCI_IOV is not set 407# CONFIG_PCI_IOV is not set
@@ -428,7 +431,6 @@ CONFIG_NET=y
428# Networking options 431# Networking options
429# 432#
430CONFIG_PACKET=y 433CONFIG_PACKET=y
431# CONFIG_PACKET_MMAP is not set
432CONFIG_UNIX=y 434CONFIG_UNIX=y
433CONFIG_XFRM=y 435CONFIG_XFRM=y
434# CONFIG_XFRM_USER is not set 436# CONFIG_XFRM_USER is not set
@@ -639,6 +641,7 @@ CONFIG_HAVE_IDE=y
639# 641#
640# SCSI device support 642# SCSI device support
641# 643#
644CONFIG_SCSI_MOD=y
642# CONFIG_RAID_ATTRS is not set 645# CONFIG_RAID_ATTRS is not set
643CONFIG_SCSI=y 646CONFIG_SCSI=y
644CONFIG_SCSI_DMA=y 647CONFIG_SCSI_DMA=y
@@ -712,6 +715,7 @@ CONFIG_ATA_SFF=y
712# CONFIG_PATA_IT821X is not set 715# CONFIG_PATA_IT821X is not set
713# CONFIG_PATA_IT8213 is not set 716# CONFIG_PATA_IT8213 is not set
714# CONFIG_PATA_JMICRON is not set 717# CONFIG_PATA_JMICRON is not set
718# CONFIG_PATA_LEGACY is not set
715# CONFIG_PATA_TRIFLEX is not set 719# CONFIG_PATA_TRIFLEX is not set
716# CONFIG_PATA_MARVELL is not set 720# CONFIG_PATA_MARVELL is not set
717# CONFIG_PATA_MPIIX is not set 721# CONFIG_PATA_MPIIX is not set
@@ -748,7 +752,7 @@ CONFIG_ATA_SFF=y
748# 752#
749 753
750# 754#
751# See the help texts for more information. 755# The newer stack is recommended.
752# 756#
753# CONFIG_FIREWIRE is not set 757# CONFIG_FIREWIRE is not set
754# CONFIG_IEEE1394 is not set 758# CONFIG_IEEE1394 is not set
@@ -807,6 +811,7 @@ CONFIG_NET_PCI=y
807# CONFIG_PCNET32 is not set 811# CONFIG_PCNET32 is not set
808# CONFIG_AMD8111_ETH is not set 812# CONFIG_AMD8111_ETH is not set
809# CONFIG_ADAPTEC_STARFIRE is not set 813# CONFIG_ADAPTEC_STARFIRE is not set
814# CONFIG_KSZ884X_PCI is not set
810# CONFIG_B44 is not set 815# CONFIG_B44 is not set
811# CONFIG_FORCEDETH is not set 816# CONFIG_FORCEDETH is not set
812# CONFIG_E100 is not set 817# CONFIG_E100 is not set
@@ -871,6 +876,7 @@ CONFIG_WLAN=y
871# CONFIG_USB_PEGASUS is not set 876# CONFIG_USB_PEGASUS is not set
872# CONFIG_USB_RTL8150 is not set 877# CONFIG_USB_RTL8150 is not set
873# CONFIG_USB_USBNET is not set 878# CONFIG_USB_USBNET is not set
879# CONFIG_USB_IPHETH is not set
874# CONFIG_WAN is not set 880# CONFIG_WAN is not set
875# CONFIG_FDDI is not set 881# CONFIG_FDDI is not set
876# CONFIG_HIPPI is not set 882# CONFIG_HIPPI is not set
@@ -958,6 +964,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
958CONFIG_SERIAL_CORE=y 964CONFIG_SERIAL_CORE=y
959CONFIG_SERIAL_CORE_CONSOLE=y 965CONFIG_SERIAL_CORE_CONSOLE=y
960# CONFIG_SERIAL_JSM is not set 966# CONFIG_SERIAL_JSM is not set
967# CONFIG_SERIAL_TIMBERDALE is not set
961CONFIG_UNIX98_PTYS=y 968CONFIG_UNIX98_PTYS=y
962# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 969# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
963CONFIG_LEGACY_PTYS=y 970CONFIG_LEGACY_PTYS=y
@@ -1007,6 +1014,7 @@ CONFIG_I2C_ALGOPCA=y
1007# CONFIG_I2C_OCORES is not set 1014# CONFIG_I2C_OCORES is not set
1008# CONFIG_I2C_SH_MOBILE is not set 1015# CONFIG_I2C_SH_MOBILE is not set
1009# CONFIG_I2C_SIMTEC is not set 1016# CONFIG_I2C_SIMTEC is not set
1017# CONFIG_I2C_XILINX is not set
1010 1018
1011# 1019#
1012# External I2C/SMBus adapter drivers 1020# External I2C/SMBus adapter drivers
@@ -1020,15 +1028,9 @@ CONFIG_I2C_ALGOPCA=y
1020# 1028#
1021CONFIG_I2C_PCA_PLATFORM=y 1029CONFIG_I2C_PCA_PLATFORM=y
1022# CONFIG_I2C_STUB is not set 1030# CONFIG_I2C_STUB is not set
1023
1024#
1025# Miscellaneous I2C Chip support
1026#
1027# CONFIG_SENSORS_TSL2550 is not set
1028# CONFIG_I2C_DEBUG_CORE is not set 1031# CONFIG_I2C_DEBUG_CORE is not set
1029# CONFIG_I2C_DEBUG_ALGO is not set 1032# CONFIG_I2C_DEBUG_ALGO is not set
1030# CONFIG_I2C_DEBUG_BUS is not set 1033# CONFIG_I2C_DEBUG_BUS is not set
1031# CONFIG_I2C_DEBUG_CHIP is not set
1032# CONFIG_SPI is not set 1034# CONFIG_SPI is not set
1033 1035
1034# 1036#
@@ -1043,13 +1045,17 @@ CONFIG_GPIOLIB=y
1043# 1045#
1044# Memory mapped GPIO expanders: 1046# Memory mapped GPIO expanders:
1045# 1047#
1048# CONFIG_GPIO_IT8761E is not set
1049# CONFIG_GPIO_SCH is not set
1046 1050
1047# 1051#
1048# I2C GPIO expanders: 1052# I2C GPIO expanders:
1049# 1053#
1054# CONFIG_GPIO_MAX7300 is not set
1050# CONFIG_GPIO_MAX732X is not set 1055# CONFIG_GPIO_MAX732X is not set
1051# CONFIG_GPIO_PCA953X is not set 1056# CONFIG_GPIO_PCA953X is not set
1052# CONFIG_GPIO_PCF857X is not set 1057# CONFIG_GPIO_PCF857X is not set
1058# CONFIG_GPIO_ADP5588 is not set
1053 1059
1054# 1060#
1055# PCI GPIO expanders: 1061# PCI GPIO expanders:
@@ -1082,10 +1088,11 @@ CONFIG_HWMON=y
1082# CONFIG_SENSORS_ADM1029 is not set 1088# CONFIG_SENSORS_ADM1029 is not set
1083# CONFIG_SENSORS_ADM1031 is not set 1089# CONFIG_SENSORS_ADM1031 is not set
1084# CONFIG_SENSORS_ADM9240 is not set 1090# CONFIG_SENSORS_ADM9240 is not set
1091# CONFIG_SENSORS_ADT7411 is not set
1085# CONFIG_SENSORS_ADT7462 is not set 1092# CONFIG_SENSORS_ADT7462 is not set
1086# CONFIG_SENSORS_ADT7470 is not set 1093# CONFIG_SENSORS_ADT7470 is not set
1087# CONFIG_SENSORS_ADT7473 is not set
1088# CONFIG_SENSORS_ADT7475 is not set 1094# CONFIG_SENSORS_ADT7475 is not set
1095# CONFIG_SENSORS_ASC7621 is not set
1089# CONFIG_SENSORS_ATXP1 is not set 1096# CONFIG_SENSORS_ATXP1 is not set
1090# CONFIG_SENSORS_DS1621 is not set 1097# CONFIG_SENSORS_DS1621 is not set
1091# CONFIG_SENSORS_I5K_AMB is not set 1098# CONFIG_SENSORS_I5K_AMB is not set
@@ -1123,6 +1130,7 @@ CONFIG_HWMON=y
1123# CONFIG_SENSORS_SMSC47M192 is not set 1130# CONFIG_SENSORS_SMSC47M192 is not set
1124# CONFIG_SENSORS_SMSC47B397 is not set 1131# CONFIG_SENSORS_SMSC47B397 is not set
1125# CONFIG_SENSORS_ADS7828 is not set 1132# CONFIG_SENSORS_ADS7828 is not set
1133# CONFIG_SENSORS_AMC6821 is not set
1126# CONFIG_SENSORS_THMC50 is not set 1134# CONFIG_SENSORS_THMC50 is not set
1127# CONFIG_SENSORS_TMP401 is not set 1135# CONFIG_SENSORS_TMP401 is not set
1128# CONFIG_SENSORS_TMP421 is not set 1136# CONFIG_SENSORS_TMP421 is not set
@@ -1151,21 +1159,26 @@ CONFIG_SSB_POSSIBLE=y
1151# Multifunction device drivers 1159# Multifunction device drivers
1152# 1160#
1153# CONFIG_MFD_CORE is not set 1161# CONFIG_MFD_CORE is not set
1162# CONFIG_MFD_88PM860X is not set
1154CONFIG_MFD_SM501=y 1163CONFIG_MFD_SM501=y
1155# CONFIG_MFD_SM501_GPIO is not set 1164# CONFIG_MFD_SM501_GPIO is not set
1156# CONFIG_MFD_SH_MOBILE_SDHI is not set 1165# CONFIG_MFD_SH_MOBILE_SDHI is not set
1157# CONFIG_HTC_PASIC3 is not set 1166# CONFIG_HTC_PASIC3 is not set
1167# CONFIG_HTC_I2CPLD is not set
1158# CONFIG_TPS65010 is not set 1168# CONFIG_TPS65010 is not set
1159# CONFIG_TWL4030_CORE is not set 1169# CONFIG_TWL4030_CORE is not set
1160# CONFIG_MFD_TMIO is not set 1170# CONFIG_MFD_TMIO is not set
1161# CONFIG_PMIC_DA903X is not set 1171# CONFIG_PMIC_DA903X is not set
1162# CONFIG_PMIC_ADP5520 is not set 1172# CONFIG_PMIC_ADP5520 is not set
1173# CONFIG_MFD_MAX8925 is not set
1163# CONFIG_MFD_WM8400 is not set 1174# CONFIG_MFD_WM8400 is not set
1164# CONFIG_MFD_WM831X is not set 1175# CONFIG_MFD_WM831X is not set
1165# CONFIG_MFD_WM8350_I2C is not set 1176# CONFIG_MFD_WM8350_I2C is not set
1177# CONFIG_MFD_WM8994 is not set
1166# CONFIG_MFD_PCF50633 is not set 1178# CONFIG_MFD_PCF50633 is not set
1167# CONFIG_AB3100_CORE is not set 1179# CONFIG_AB3100_CORE is not set
1168# CONFIG_MFD_88PM8607 is not set 1180# CONFIG_MFD_TIMBERDALE is not set
1181# CONFIG_LPC_SCH is not set
1169# CONFIG_REGULATOR is not set 1182# CONFIG_REGULATOR is not set
1170CONFIG_MEDIA_SUPPORT=y 1183CONFIG_MEDIA_SUPPORT=y
1171 1184
@@ -1187,6 +1200,7 @@ CONFIG_VIDEO_IR=y
1187# Graphics support 1200# Graphics support
1188# 1201#
1189CONFIG_VGA_ARB=y 1202CONFIG_VGA_ARB=y
1203CONFIG_VGA_ARB_MAX_GPUS=16
1190# CONFIG_DRM is not set 1204# CONFIG_DRM is not set
1191# CONFIG_VGASTATE is not set 1205# CONFIG_VGASTATE is not set
1192# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1206# CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1283,6 +1297,7 @@ CONFIG_USB_HID=y
1283# 1297#
1284# Special HID drivers 1298# Special HID drivers
1285# 1299#
1300# CONFIG_HID_3M_PCT is not set
1286CONFIG_HID_A4TECH=y 1301CONFIG_HID_A4TECH=y
1287CONFIG_HID_APPLE=y 1302CONFIG_HID_APPLE=y
1288CONFIG_HID_BELKIN=y 1303CONFIG_HID_BELKIN=y
@@ -1298,14 +1313,19 @@ CONFIG_HID_GYRATION=y
1298CONFIG_HID_LOGITECH=y 1313CONFIG_HID_LOGITECH=y
1299# CONFIG_LOGITECH_FF is not set 1314# CONFIG_LOGITECH_FF is not set
1300# CONFIG_LOGIRUMBLEPAD2_FF is not set 1315# CONFIG_LOGIRUMBLEPAD2_FF is not set
1316# CONFIG_LOGIG940_FF is not set
1301CONFIG_HID_MICROSOFT=y 1317CONFIG_HID_MICROSOFT=y
1318# CONFIG_HID_MOSART is not set
1302CONFIG_HID_MONTEREY=y 1319CONFIG_HID_MONTEREY=y
1303# CONFIG_HID_NTRIG is not set 1320# CONFIG_HID_NTRIG is not set
1321# CONFIG_HID_ORTEK is not set
1304CONFIG_HID_PANTHERLORD=y 1322CONFIG_HID_PANTHERLORD=y
1305# CONFIG_PANTHERLORD_FF is not set 1323# CONFIG_PANTHERLORD_FF is not set
1306CONFIG_HID_PETALYNX=y 1324CONFIG_HID_PETALYNX=y
1325# CONFIG_HID_QUANTA is not set
1307CONFIG_HID_SAMSUNG=y 1326CONFIG_HID_SAMSUNG=y
1308CONFIG_HID_SONY=y 1327CONFIG_HID_SONY=y
1328# CONFIG_HID_STANTUM is not set
1309CONFIG_HID_SUNPLUS=y 1329CONFIG_HID_SUNPLUS=y
1310# CONFIG_HID_GREENASIA is not set 1330# CONFIG_HID_GREENASIA is not set
1311# CONFIG_HID_SMARTJOYPLUS is not set 1331# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1326,7 +1346,6 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
1326CONFIG_USB_DEVICEFS=y 1346CONFIG_USB_DEVICEFS=y
1327CONFIG_USB_DEVICE_CLASS=y 1347CONFIG_USB_DEVICE_CLASS=y
1328# CONFIG_USB_DYNAMIC_MINORS is not set 1348# CONFIG_USB_DYNAMIC_MINORS is not set
1329# CONFIG_USB_SUSPEND is not set
1330# CONFIG_USB_OTG is not set 1349# CONFIG_USB_OTG is not set
1331# CONFIG_USB_OTG_WHITELIST is not set 1350# CONFIG_USB_OTG_WHITELIST is not set
1332# CONFIG_USB_OTG_BLACKLIST_HUB is not set 1351# CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -1405,7 +1424,6 @@ CONFIG_USB_STORAGE=y
1405# CONFIG_USB_RIO500 is not set 1424# CONFIG_USB_RIO500 is not set
1406# CONFIG_USB_LEGOTOWER is not set 1425# CONFIG_USB_LEGOTOWER is not set
1407# CONFIG_USB_LCD is not set 1426# CONFIG_USB_LCD is not set
1408# CONFIG_USB_BERRY_CHARGE is not set
1409# CONFIG_USB_LED is not set 1427# CONFIG_USB_LED is not set
1410# CONFIG_USB_CYPRESS_CY7C63 is not set 1428# CONFIG_USB_CYPRESS_CY7C63 is not set
1411# CONFIG_USB_CYTHERM is not set 1429# CONFIG_USB_CYTHERM is not set
@@ -1417,7 +1435,6 @@ CONFIG_USB_STORAGE=y
1417# CONFIG_USB_IOWARRIOR is not set 1435# CONFIG_USB_IOWARRIOR is not set
1418# CONFIG_USB_TEST is not set 1436# CONFIG_USB_TEST is not set
1419# CONFIG_USB_ISIGHTFW is not set 1437# CONFIG_USB_ISIGHTFW is not set
1420# CONFIG_USB_VST is not set
1421# CONFIG_USB_GADGET is not set 1438# CONFIG_USB_GADGET is not set
1422 1439
1423# 1440#
@@ -1584,6 +1601,7 @@ CONFIG_MISC_FILESYSTEMS=y
1584# CONFIG_BFS_FS is not set 1601# CONFIG_BFS_FS is not set
1585# CONFIG_EFS_FS is not set 1602# CONFIG_EFS_FS is not set
1586# CONFIG_JFFS2_FS is not set 1603# CONFIG_JFFS2_FS is not set
1604# CONFIG_LOGFS is not set
1587# CONFIG_CRAMFS is not set 1605# CONFIG_CRAMFS is not set
1588# CONFIG_SQUASHFS is not set 1606# CONFIG_SQUASHFS is not set
1589# CONFIG_VXFS_FS is not set 1607# CONFIG_VXFS_FS is not set
@@ -1610,6 +1628,7 @@ CONFIG_SUNRPC_GSS=y
1610CONFIG_RPCSEC_GSS_KRB5=y 1628CONFIG_RPCSEC_GSS_KRB5=y
1611# CONFIG_RPCSEC_GSS_SPKM3 is not set 1629# CONFIG_RPCSEC_GSS_SPKM3 is not set
1612# CONFIG_SMB_FS is not set 1630# CONFIG_SMB_FS is not set
1631# CONFIG_CEPH_FS is not set
1613# CONFIG_CIFS is not set 1632# CONFIG_CIFS is not set
1614# CONFIG_NCP_FS is not set 1633# CONFIG_NCP_FS is not set
1615# CONFIG_CODA_FS is not set 1634# CONFIG_CODA_FS is not set
@@ -1688,6 +1707,7 @@ CONFIG_SCHED_DEBUG=y
1688# CONFIG_TIMER_STATS is not set 1707# CONFIG_TIMER_STATS is not set
1689# CONFIG_DEBUG_OBJECTS is not set 1708# CONFIG_DEBUG_OBJECTS is not set
1690# CONFIG_DEBUG_SLAB is not set 1709# CONFIG_DEBUG_SLAB is not set
1710# CONFIG_DEBUG_KMEMLEAK is not set
1691# CONFIG_DEBUG_RT_MUTEXES is not set 1711# CONFIG_DEBUG_RT_MUTEXES is not set
1692# CONFIG_RT_MUTEX_TESTER is not set 1712# CONFIG_RT_MUTEX_TESTER is not set
1693# CONFIG_DEBUG_SPINLOCK is not set 1713# CONFIG_DEBUG_SPINLOCK is not set
@@ -1713,6 +1733,7 @@ CONFIG_FRAME_POINTER=y
1713# CONFIG_BACKTRACE_SELF_TEST is not set 1733# CONFIG_BACKTRACE_SELF_TEST is not set
1714# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1734# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1715# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1735# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1736# CONFIG_LKDTM is not set
1716# CONFIG_FAULT_INJECTION is not set 1737# CONFIG_FAULT_INJECTION is not set
1717# CONFIG_LATENCYTOP is not set 1738# CONFIG_LATENCYTOP is not set
1718CONFIG_SYSCTL_SYSCALL_CHECK=y 1739CONFIG_SYSCTL_SYSCALL_CHECK=y
@@ -1846,6 +1867,7 @@ CONFIG_CRYPTO_DES=y
1846# 1867#
1847# CONFIG_CRYPTO_ANSI_CPRNG is not set 1868# CONFIG_CRYPTO_ANSI_CPRNG is not set
1848# CONFIG_CRYPTO_HW is not set 1869# CONFIG_CRYPTO_HW is not set
1870# CONFIG_VIRTUALIZATION is not set
1849# CONFIG_BINARY_PRINTF is not set 1871# CONFIG_BINARY_PRINTF is not set
1850 1872
1851# 1873#
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index 275a448ae8c2..c7983124d99d 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -13,7 +13,7 @@
13 13
14#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) 14#define ATOMIC_INIT(i) ( (atomic_t) { (i) } )
15 15
16#define atomic_read(v) ((v)->counter) 16#define atomic_read(v) (*(volatile int *)&(v)->counter)
17#define atomic_set(v,i) ((v)->counter = (i)) 17#define atomic_set(v,i) ((v)->counter = (i))
18 18
19#if defined(CONFIG_GUSA_RB) 19#if defined(CONFIG_GUSA_RB)
diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h
index 02df18ea9608..e461d67f03c3 100644
--- a/arch/sh/include/asm/cache.h
+++ b/arch/sh/include/asm/cache.h
@@ -38,14 +38,10 @@ struct cache_info {
38 * 2. those in the physical page number. 38 * 2. those in the physical page number.
39 */ 39 */
40 unsigned int alias_mask; 40 unsigned int alias_mask;
41
42 unsigned int n_aliases; /* Number of aliases */ 41 unsigned int n_aliases; /* Number of aliases */
43 42
44 unsigned long flags; 43 unsigned long flags;
45}; 44};
46
47int __init detect_cpu_and_cache_system(void);
48
49#endif /* __ASSEMBLY__ */ 45#endif /* __ASSEMBLY__ */
50#endif /* __KERNEL__ */ 46#endif /* __KERNEL__ */
51#endif /* __ASM_SH_CACHE_H */ 47#endif /* __ASM_SH_CACHE_H */
diff --git a/arch/sh/include/asm/clkdev.h b/arch/sh/include/asm/clkdev.h
new file mode 100644
index 000000000000..5645f358128b
--- /dev/null
+++ b/arch/sh/include/asm/clkdev.h
@@ -0,0 +1,35 @@
1/*
2 * arch/sh/include/asm/clkdev.h
3 *
4 * Cloned from arch/arm/include/asm/clkdev.h:
5 *
6 * Copyright (C) 2008 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Helper for the clk API to assist looking up a struct clk.
13 */
14#ifndef __ASM_CLKDEV_H
15#define __ASM_CLKDEV_H
16
17struct clk;
18
19struct clk_lookup {
20 struct list_head node;
21 const char *dev_id;
22 const char *con_id;
23 struct clk *clk;
24};
25
26struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
27 const char *dev_fmt, ...);
28
29void clkdev_add(struct clk_lookup *cl);
30void clkdev_drop(struct clk_lookup *cl);
31
32void clkdev_add_table(struct clk_lookup *, size_t);
33int clk_add_alias(const char *, const char *, char *, struct device *);
34
35#endif
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 11da4c5beb68..803d4c7f09dc 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -1,171 +1,16 @@
1#ifndef __ASM_SH_CLOCK_H 1#ifndef __ASM_SH_CLOCK_H
2#define __ASM_SH_CLOCK_H 2#define __ASM_SH_CLOCK_H
3 3
4#include <linux/list.h> 4#include <linux/sh_clk.h>
5#include <linux/seq_file.h>
6#include <linux/cpufreq.h>
7#include <linux/clk.h>
8#include <linux/err.h>
9
10struct clk;
11
12struct clk_ops {
13 void (*init)(struct clk *clk);
14 int (*enable)(struct clk *clk);
15 void (*disable)(struct clk *clk);
16 unsigned long (*recalc)(struct clk *clk);
17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
18 int (*set_parent)(struct clk *clk, struct clk *parent);
19 long (*round_rate)(struct clk *clk, unsigned long rate);
20};
21
22struct clk {
23 struct list_head node;
24 const char *name;
25 int id;
26 struct module *owner;
27
28 struct clk *parent;
29 struct clk_ops *ops;
30
31 struct list_head children;
32 struct list_head sibling; /* node for children */
33
34 int usecount;
35
36 unsigned long rate;
37 unsigned long flags;
38
39 void __iomem *enable_reg;
40 unsigned int enable_bit;
41
42 unsigned long arch_flags;
43 void *priv;
44 struct dentry *dentry;
45 struct cpufreq_frequency_table *freq_table;
46};
47
48struct clk_lookup {
49 struct list_head node;
50 const char *dev_id;
51 const char *con_id;
52 struct clk *clk;
53};
54
55#define CLK_ENABLE_ON_INIT (1 << 0)
56 5
57/* Should be defined by processor-specific code */ 6/* Should be defined by processor-specific code */
58void __deprecated arch_init_clk_ops(struct clk_ops **, int type); 7void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
59int __init arch_clk_init(void); 8int __init arch_clk_init(void);
60 9
61/* arch/sh/kernel/cpu/clock.c */
62int clk_init(void);
63unsigned long followparent_recalc(struct clk *);
64void recalculate_root_clocks(void);
65void propagate_rate(struct clk *);
66int clk_reparent(struct clk *child, struct clk *parent);
67int clk_register(struct clk *);
68void clk_unregister(struct clk *);
69
70/* arch/sh/kernel/cpu/clock-cpg.c */ 10/* arch/sh/kernel/cpu/clock-cpg.c */
71int __init __deprecated cpg_clk_init(void); 11int __init __deprecated cpg_clk_init(void);
72 12
73/* the exported API, in addition to clk_set_rate */ 13/* arch/sh/kernel/cpu/clock.c */
74/** 14int clk_init(void);
75 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
76 * @clk: clock source
77 * @rate: desired clock rate in Hz
78 * @algo_id: algorithm id to be passed down to ops->set_rate
79 *
80 * Returns success (0) or negative errno.
81 */
82int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
83
84enum clk_sh_algo_id {
85 NO_CHANGE = 0,
86
87 IUS_N1_N1,
88 IUS_322,
89 IUS_522,
90 IUS_N11,
91
92 SB_N1,
93
94 SB3_N1,
95 SB3_32,
96 SB3_43,
97 SB3_54,
98
99 BP_N1,
100
101 IP_N1,
102};
103
104struct clk_div_mult_table {
105 unsigned int *divisors;
106 unsigned int nr_divisors;
107 unsigned int *multipliers;
108 unsigned int nr_multipliers;
109};
110
111struct cpufreq_frequency_table;
112void clk_rate_table_build(struct clk *clk,
113 struct cpufreq_frequency_table *freq_table,
114 int nr_freqs,
115 struct clk_div_mult_table *src_table,
116 unsigned long *bitmap);
117
118long clk_rate_table_round(struct clk *clk,
119 struct cpufreq_frequency_table *freq_table,
120 unsigned long rate);
121
122int clk_rate_table_find(struct clk *clk,
123 struct cpufreq_frequency_table *freq_table,
124 unsigned long rate);
125
126#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \
127 _enable_bit, _flags) \
128{ \
129 .name = _name, \
130 .id = _id, \
131 .parent = _parent, \
132 .enable_reg = (void __iomem *)_enable_reg, \
133 .enable_bit = _enable_bit, \
134 .flags = _flags, \
135}
136
137int sh_clk_mstp32_register(struct clk *clks, int nr);
138
139#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags) \
140{ \
141 .name = _name, \
142 .parent = _parent, \
143 .enable_reg = (void __iomem *)_reg, \
144 .enable_bit = _shift, \
145 .arch_flags = _div_bitmap, \
146 .flags = _flags, \
147}
148
149struct clk_div4_table {
150 struct clk_div_mult_table *div_mult_table;
151 void (*kick)(struct clk *clk);
152};
153
154int sh_clk_div4_register(struct clk *clks, int nr,
155 struct clk_div4_table *table);
156int sh_clk_div4_enable_register(struct clk *clks, int nr,
157 struct clk_div4_table *table);
158int sh_clk_div4_reparent_register(struct clk *clks, int nr,
159 struct clk_div4_table *table);
160
161#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \
162{ \
163 .name = _name, \
164 .parent = _parent, \
165 .enable_reg = (void __iomem *)_reg, \
166 .flags = _flags, \
167}
168
169int sh_clk_div6_register(struct clk *clks, int nr);
170 15
171#endif /* __ASM_SH_CLOCK_H */ 16#endif /* __ASM_SH_CLOCK_H */
diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
index bf2f30cf0a27..2a02b611a9ad 100644
--- a/arch/sh/include/asm/dmaengine.h
+++ b/arch/sh/include/asm/dmaengine.h
@@ -10,14 +10,9 @@
10#ifndef ASM_DMAENGINE_H 10#ifndef ASM_DMAENGINE_H
11#define ASM_DMAENGINE_H 11#define ASM_DMAENGINE_H
12 12
13#include <linux/dmaengine.h> 13#include <linux/sh_dma.h>
14#include <linux/list.h>
15 14
16#include <asm/dma-register.h> 15enum {
17
18#define SH_DMAC_MAX_CHANNELS 6
19
20enum sh_dmae_slave_chan_id {
21 SHDMA_SLAVE_SCIF0_TX, 16 SHDMA_SLAVE_SCIF0_TX,
22 SHDMA_SLAVE_SCIF0_RX, 17 SHDMA_SLAVE_SCIF0_RX,
23 SHDMA_SLAVE_SCIF1_TX, 18 SHDMA_SLAVE_SCIF1_TX,
@@ -34,60 +29,6 @@ enum sh_dmae_slave_chan_id {
34 SHDMA_SLAVE_SIUA_RX, 29 SHDMA_SLAVE_SIUA_RX,
35 SHDMA_SLAVE_SIUB_TX, 30 SHDMA_SLAVE_SIUB_TX,
36 SHDMA_SLAVE_SIUB_RX, 31 SHDMA_SLAVE_SIUB_RX,
37 SHDMA_SLAVE_NUMBER, /* Must stay last */
38};
39
40struct sh_dmae_slave_config {
41 enum sh_dmae_slave_chan_id slave_id;
42 dma_addr_t addr;
43 u32 chcr;
44 char mid_rid;
45};
46
47struct sh_dmae_channel {
48 unsigned int offset;
49 unsigned int dmars;
50 unsigned int dmars_bit;
51};
52
53struct sh_dmae_pdata {
54 struct sh_dmae_slave_config *slave;
55 int slave_num;
56 struct sh_dmae_channel *channel;
57 int channel_num;
58 unsigned int ts_low_shift;
59 unsigned int ts_low_mask;
60 unsigned int ts_high_shift;
61 unsigned int ts_high_mask;
62 unsigned int *ts_shift;
63 int ts_shift_num;
64 u16 dmaor_init;
65};
66
67struct device;
68
69/* Used by slave DMA clients to request DMA to/from a specific peripheral */
70struct sh_dmae_slave {
71 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
72 struct device *dma_dev; /* Set by the platform */
73 struct sh_dmae_slave_config *config; /* Set by the driver */
74};
75
76struct sh_dmae_regs {
77 u32 sar; /* SAR / source address */
78 u32 dar; /* DAR / destination address */
79 u32 tcr; /* TCR / transfer count */
80};
81
82struct sh_desc {
83 struct sh_dmae_regs hw;
84 struct list_head node;
85 struct dma_async_tx_descriptor async_tx;
86 enum dma_data_direction direction;
87 dma_cookie_t cookie;
88 size_t partial;
89 int chunks;
90 int mark;
91}; 32};
92 33
93#endif 34#endif
diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h
index 965dd780d51b..89890f61a7b9 100644
--- a/arch/sh/include/asm/hw_breakpoint.h
+++ b/arch/sh/include/asm/hw_breakpoint.h
@@ -46,17 +46,20 @@ struct pmu;
46/* Maximum number of UBC channels */ 46/* Maximum number of UBC channels */
47#define HBP_NUM 2 47#define HBP_NUM 2
48 48
49static inline int hw_breakpoint_slots(int type)
50{
51 return HBP_NUM;
52}
53
49/* arch/sh/kernel/hw_breakpoint.c */ 54/* arch/sh/kernel/hw_breakpoint.c */
50extern int arch_check_va_in_userspace(unsigned long va, u16 hbp_len); 55extern int arch_check_bp_in_kernelspace(struct perf_event *bp);
51extern int arch_validate_hwbkpt_settings(struct perf_event *bp, 56extern int arch_validate_hwbkpt_settings(struct perf_event *bp);
52 struct task_struct *tsk);
53extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, 57extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
54 unsigned long val, void *data); 58 unsigned long val, void *data);
55 59
56int arch_install_hw_breakpoint(struct perf_event *bp); 60int arch_install_hw_breakpoint(struct perf_event *bp);
57void arch_uninstall_hw_breakpoint(struct perf_event *bp); 61void arch_uninstall_hw_breakpoint(struct perf_event *bp);
58void hw_breakpoint_pmu_read(struct perf_event *bp); 62void hw_breakpoint_pmu_read(struct perf_event *bp);
59void hw_breakpoint_pmu_unthrottle(struct perf_event *bp);
60 63
61extern void arch_fill_perf_breakpoint(struct perf_event *bp); 64extern void arch_fill_perf_breakpoint(struct perf_event *bp);
62extern int register_sh_ubc(struct sh_ubc *); 65extern int register_sh_ubc(struct sh_ubc *);
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h
index 5d3ccae4202b..855e945c6199 100644
--- a/arch/sh/include/asm/hwblk.h
+++ b/arch/sh/include/asm/hwblk.h
@@ -58,13 +58,11 @@ void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int cnt);
58void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt); 58void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
59 59
60/* allow clocks to enable and disable hardware blocks */ 60/* allow clocks to enable and disable hardware blocks */
61#define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \ 61#define SH_HWBLK_CLK(_hwblk, _parent, _flags) \
62{ \ 62[_hwblk] = { \
63 .name = _name, \ 63 .parent = _parent, \
64 .id = _id, \ 64 .arch_flags = _hwblk, \
65 .parent = _parent, \ 65 .flags = _flags, \
66 .arch_flags = _hwblk, \
67 .flags = _flags, \
68} 66}
69 67
70int sh_hwblk_clk_register(struct clk *clks, int nr); 68int sh_hwblk_clk_register(struct clk *clks, int nr);
diff --git a/arch/sh/include/asm/io_generic.h b/arch/sh/include/asm/io_generic.h
index 1e5d375f55dc..491df93cbf8e 100644
--- a/arch/sh/include/asm/io_generic.h
+++ b/arch/sh/include/asm/io_generic.h
@@ -38,5 +38,6 @@ void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr);
38 38
39void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); 39void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size);
40void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); 40void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr);
41void IO_CONCAT(__IO_PREFIX,mem_init)(void);
41 42
42#undef __IO_PREFIX 43#undef __IO_PREFIX
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index df8e1500527c..02c2f0102cfa 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -1,6 +1,7 @@
1#ifndef __ASM_SH_IRQ_H 1#ifndef __ASM_SH_IRQ_H
2#define __ASM_SH_IRQ_H 2#define __ASM_SH_IRQ_H
3 3
4#include <linux/cpumask.h>
4#include <asm/machvec.h> 5#include <asm/machvec.h>
5 6
6/* 7/*
@@ -12,6 +13,14 @@
12#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */ 13#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
13 14
14/* 15/*
16 * This is a special IRQ number for indicating that no IRQ has been
17 * triggered and to simply ignore the IRQ dispatch. This is a special
18 * case that can happen with IRQ auto-distribution when multiple CPUs
19 * are woken up and signalled in parallel.
20 */
21#define NO_IRQ_IGNORE ((unsigned int)-1)
22
23/*
15 * Convert back and forth between INTEVT and IRQ values. 24 * Convert back and forth between INTEVT and IRQ values.
16 */ 25 */
17#ifdef CONFIG_CPU_HAS_INTEVT 26#ifdef CONFIG_CPU_HAS_INTEVT
@@ -42,6 +51,8 @@ static inline int generic_irq_demux(int irq)
42#define irq_demux(irq) sh_mv.mv_irq_demux(irq) 51#define irq_demux(irq) sh_mv.mv_irq_demux(irq)
43 52
44void init_IRQ(void); 53void init_IRQ(void);
54void migrate_irqs(void);
55
45asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs); 56asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
46 57
47#ifdef CONFIG_IRQSTACKS 58#ifdef CONFIG_IRQSTACKS
@@ -53,6 +64,14 @@ extern void irq_ctx_exit(int cpu);
53# define irq_ctx_exit(cpu) do { } while (0) 64# define irq_ctx_exit(cpu) do { } while (0)
54#endif 65#endif
55 66
67#ifdef CONFIG_INTC_BALANCING
68extern unsigned int irq_lookup(unsigned int irq);
69extern void irq_finish(unsigned int irq);
70#else
71#define irq_lookup(irq) (irq)
72#define irq_finish(irq) do { } while (0)
73#endif
74
56#include <asm-generic/irq.h> 75#include <asm-generic/irq.h>
57#ifdef CONFIG_CPU_SH5 76#ifdef CONFIG_CPU_SH5
58#include <cpu/irq.h> 77#include <cpu/irq.h>
diff --git a/arch/sh/include/asm/kexec.h b/arch/sh/include/asm/kexec.h
index 765a5e1660fc..ad6ef8a275ee 100644
--- a/arch/sh/include/asm/kexec.h
+++ b/arch/sh/include/asm/kexec.h
@@ -26,6 +26,10 @@
26/* The native architecture */ 26/* The native architecture */
27#define KEXEC_ARCH KEXEC_ARCH_SH 27#define KEXEC_ARCH KEXEC_ARCH_SH
28 28
29#ifdef CONFIG_KEXEC
30/* arch/sh/kernel/machine_kexec.c */
31void reserve_crashkernel(void);
32
29static inline void crash_setup_regs(struct pt_regs *newregs, 33static inline void crash_setup_regs(struct pt_regs *newregs,
30 struct pt_regs *oldregs) 34 struct pt_regs *oldregs)
31{ 35{
@@ -59,4 +63,8 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
59 newregs->pc = (unsigned long)current_text_addr(); 63 newregs->pc = (unsigned long)current_text_addr();
60 } 64 }
61} 65}
66#else
67static inline void reserve_crashkernel(void) { }
68#endif /* CONFIG_KEXEC */
69
62#endif /* __ASM_SH_KEXEC_H */ 70#endif /* __ASM_SH_KEXEC_H */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index 9c30955630ff..bc0218cb72e1 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -49,6 +49,8 @@ struct sh_machine_vector {
49 49
50 int (*mv_clk_init)(void); 50 int (*mv_clk_init)(void);
51 int (*mv_mode_pins)(void); 51 int (*mv_mode_pins)(void);
52
53 void (*mv_mem_init)(void);
52}; 54};
53 55
54extern struct sh_machine_vector sh_mv; 56extern struct sh_machine_vector sh_mv;
diff --git a/arch/sh/include/asm/mmzone.h b/arch/sh/include/asm/mmzone.h
index 7f5363b29ba0..8887baff5eff 100644
--- a/arch/sh/include/asm/mmzone.h
+++ b/arch/sh/include/asm/mmzone.h
@@ -42,9 +42,10 @@ setup_bootmem_node(int nid, unsigned long start, unsigned long end)
42void __init plat_mem_setup(void); 42void __init plat_mem_setup(void);
43 43
44/* arch/sh/kernel/setup.c */ 44/* arch/sh/kernel/setup.c */
45void __init setup_bootmem_allocator(unsigned long start_pfn);
46void __init __add_active_range(unsigned int nid, unsigned long start_pfn, 45void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
47 unsigned long end_pfn); 46 unsigned long end_pfn);
47/* arch/sh/mm/init.c */
48void __init allocate_pgdat(unsigned int nid);
48 49
49#endif /* __KERNEL__ */ 50#endif /* __KERNEL__ */
50#endif /* __ASM_SH_MMZONE_H */ 51#endif /* __ASM_SH_MMZONE_H */
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index d71feb359304..fb703d120d09 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -49,7 +49,7 @@
49 49
50extern unsigned long shm_align_mask; 50extern unsigned long shm_align_mask;
51extern unsigned long max_low_pfn, min_low_pfn; 51extern unsigned long max_low_pfn, min_low_pfn;
52extern unsigned long memory_start, memory_end; 52extern unsigned long memory_start, memory_end, memory_limit;
53 53
54static inline unsigned long 54static inline unsigned long
55pages_do_alias(unsigned long addr1, unsigned long addr2) 55pages_do_alias(unsigned long addr1, unsigned long addr2)
@@ -128,13 +128,18 @@ typedef struct page *pgtable_t;
128 * added or subtracted as required. 128 * added or subtracted as required.
129 */ 129 */
130#ifdef CONFIG_PMB 130#ifdef CONFIG_PMB
131#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) 131#define ___pa(x) ((x)-PAGE_OFFSET+__MEMORY_START)
132#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) 132#define ___va(x) ((x)+PAGE_OFFSET-__MEMORY_START)
133#else 133#else
134#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) 134#define ___pa(x) ((x)-PAGE_OFFSET)
135#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) 135#define ___va(x) ((x)+PAGE_OFFSET)
136#endif 136#endif
137 137
138#ifndef __ASSEMBLY__
139#define __pa(x) ___pa((unsigned long)x)
140#define __va(x) (void *)___va((unsigned long)x)
141#endif /* !__ASSEMBLY__ */
142
138#ifdef CONFIG_UNCACHED_MAPPING 143#ifdef CONFIG_UNCACHED_MAPPING
139#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start) 144#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start)
140#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET) 145#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET)
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 9605e062840f..0a58cb25a658 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -85,6 +85,10 @@ struct sh_cpuinfo {
85 struct tlb_info itlb; 85 struct tlb_info itlb;
86 struct tlb_info dtlb; 86 struct tlb_info dtlb;
87 87
88#ifdef CONFIG_SMP
89 struct task_struct *idle;
90#endif
91
88 unsigned long flags; 92 unsigned long flags;
89} __attribute__ ((aligned(L1_CACHE_BYTES))); 93} __attribute__ ((aligned(L1_CACHE_BYTES)));
90 94
@@ -102,6 +106,9 @@ struct task_struct;
102 106
103extern struct pt_regs fake_swapper_regs; 107extern struct pt_regs fake_swapper_regs;
104 108
109extern void cpu_init(void);
110extern void cpu_probe(void);
111
105/* arch/sh/kernel/process.c */ 112/* arch/sh/kernel/process.c */
106extern unsigned int xstate_size; 113extern unsigned int xstate_size;
107extern void free_thread_xstate(struct task_struct *); 114extern void free_thread_xstate(struct task_struct *);
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 572b4eb09493..61a445d2d02a 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -27,8 +27,6 @@
27#define CCN_CVR 0xff000040 27#define CCN_CVR 0xff000040
28#define CCN_PRR 0xff000044 28#define CCN_PRR 0xff000044
29 29
30asmlinkage void __init sh_cpu_init(void);
31
32/* 30/*
33 * User space process size: 2GB. 31 * User space process size: 2GB.
34 * 32 *
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index 4758325bb24a..01fa17a3d759 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -19,6 +19,7 @@
19#define COMMAND_LINE ((char *) (PARAM+0x100)) 19#define COMMAND_LINE ((char *) (PARAM+0x100))
20 20
21void sh_mv_setup(void); 21void sh_mv_setup(void);
22void check_for_initrd(void);
22 23
23#endif /* __KERNEL__ */ 24#endif /* __KERNEL__ */
24 25
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
index f1b1e6944a5f..e8d4142baf59 100644
--- a/arch/sh/include/asm/siu.h
+++ b/arch/sh/include/asm/siu.h
@@ -17,10 +17,10 @@ struct device;
17 17
18struct siu_platform { 18struct siu_platform {
19 struct device *dma_dev; 19 struct device *dma_dev;
20 enum sh_dmae_slave_chan_id dma_slave_tx_a; 20 unsigned int dma_slave_tx_a;
21 enum sh_dmae_slave_chan_id dma_slave_rx_a; 21 unsigned int dma_slave_rx_a;
22 enum sh_dmae_slave_chan_id dma_slave_tx_b; 22 unsigned int dma_slave_tx_b;
23 enum sh_dmae_slave_chan_id dma_slave_rx_b; 23 unsigned int dma_slave_rx_b;
24}; 24};
25 25
26#endif /* ASM_SIU_H */ 26#endif /* ASM_SIU_H */
diff --git a/arch/sh/include/asm/smp-ops.h b/arch/sh/include/asm/smp-ops.h
new file mode 100644
index 000000000000..c590f76856f1
--- /dev/null
+++ b/arch/sh/include/asm/smp-ops.h
@@ -0,0 +1,51 @@
1#ifndef __ASM_SH_SMP_OPS_H
2#define __ASM_SH_SMP_OPS_H
3
4struct plat_smp_ops {
5 void (*smp_setup)(void);
6 unsigned int (*smp_processor_id)(void);
7 void (*prepare_cpus)(unsigned int max_cpus);
8 void (*start_cpu)(unsigned int cpu, unsigned long entry_point);
9 void (*send_ipi)(unsigned int cpu, unsigned int message);
10 int (*cpu_disable)(unsigned int cpu);
11 void (*cpu_die)(unsigned int cpu);
12 void (*play_dead)(void);
13};
14
15extern struct plat_smp_ops *mp_ops;
16extern struct plat_smp_ops shx3_smp_ops;
17
18#ifdef CONFIG_SMP
19
20static inline void plat_smp_setup(void)
21{
22 BUG_ON(!mp_ops);
23 mp_ops->smp_setup();
24}
25
26static inline void play_dead(void)
27{
28 mp_ops->play_dead();
29}
30
31extern void register_smp_ops(struct plat_smp_ops *ops);
32
33#else
34
35static inline void plat_smp_setup(void)
36{
37 /* UP, nothing to do ... */
38}
39
40static inline void register_smp_ops(struct plat_smp_ops *ops)
41{
42}
43
44static inline void play_dead(void)
45{
46 BUG();
47}
48
49#endif /* CONFIG_SMP */
50
51#endif /* __ASM_SH_SMP_OPS_H */
diff --git a/arch/sh/include/asm/smp.h b/arch/sh/include/asm/smp.h
index 53ef26ced75f..9070d943ddde 100644
--- a/arch/sh/include/asm/smp.h
+++ b/arch/sh/include/asm/smp.h
@@ -3,15 +3,16 @@
3 3
4#include <linux/bitops.h> 4#include <linux/bitops.h>
5#include <linux/cpumask.h> 5#include <linux/cpumask.h>
6#include <asm/smp-ops.h>
6 7
7#ifdef CONFIG_SMP 8#ifdef CONFIG_SMP
8 9
9#include <linux/spinlock.h> 10#include <linux/spinlock.h>
10#include <asm/atomic.h> 11#include <asm/atomic.h>
11#include <asm/current.h> 12#include <asm/current.h>
13#include <asm/percpu.h>
12 14
13#define raw_smp_processor_id() (current_thread_info()->cpu) 15#define raw_smp_processor_id() (current_thread_info()->cpu)
14#define hard_smp_processor_id() plat_smp_processor_id()
15 16
16/* Map from cpu id to sequential logical cpu number. */ 17/* Map from cpu id to sequential logical cpu number. */
17extern int __cpu_number_map[NR_CPUS]; 18extern int __cpu_number_map[NR_CPUS];
@@ -30,20 +31,43 @@ enum {
30 SMP_MSG_NR, /* must be last */ 31 SMP_MSG_NR, /* must be last */
31}; 32};
32 33
34DECLARE_PER_CPU(int, cpu_state);
35
33void smp_message_recv(unsigned int msg); 36void smp_message_recv(unsigned int msg);
34void smp_timer_broadcast(const struct cpumask *mask); 37void smp_timer_broadcast(const struct cpumask *mask);
35 38
36void local_timer_interrupt(void); 39void local_timer_interrupt(void);
37void local_timer_setup(unsigned int cpu); 40void local_timer_setup(unsigned int cpu);
38 41void local_timer_stop(unsigned int cpu);
39void plat_smp_setup(void);
40void plat_prepare_cpus(unsigned int max_cpus);
41int plat_smp_processor_id(void);
42void plat_start_cpu(unsigned int cpu, unsigned long entry_point);
43void plat_send_ipi(unsigned int cpu, unsigned int message);
44 42
45void arch_send_call_function_single_ipi(int cpu); 43void arch_send_call_function_single_ipi(int cpu);
46extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 44void arch_send_call_function_ipi_mask(const struct cpumask *mask);
45
46void native_play_dead(void);
47void native_cpu_die(unsigned int cpu);
48int native_cpu_disable(unsigned int cpu);
49
50#ifdef CONFIG_HOTPLUG_CPU
51void play_dead_common(void);
52extern int __cpu_disable(void);
53
54static inline void __cpu_die(unsigned int cpu)
55{
56 extern struct plat_smp_ops *mp_ops; /* private */
57
58 mp_ops->cpu_die(cpu);
59}
60#endif
61
62static inline int hard_smp_processor_id(void)
63{
64 extern struct plat_smp_ops *mp_ops; /* private */
65
66 if (!mp_ops)
67 return 0; /* boot CPU */
68
69 return mp_ops->smp_processor_id();
70}
47 71
48#else 72#else
49 73
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h
index de2359533994..9a6125eb0079 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-register.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h
@@ -23,7 +23,8 @@
23#define CHCR_TS_HIGH_MASK 0 23#define CHCR_TS_HIGH_MASK 0
24#define CHCR_TS_HIGH_SHIFT 0 24#define CHCR_TS_HIGH_SHIFT 0
25#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \ 25#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \
26 defined(CONFIG_CPU_SUBTYPE_SH7724) 26 defined(CONFIG_CPU_SUBTYPE_SH7724) || \
27 defined(CONFIG_CPU_SUBTYPE_SH7786)
27#define CHCR_TS_LOW_MASK 0x00000018 28#define CHCR_TS_LOW_MASK 0x00000018
28#define CHCR_TS_LOW_SHIFT 3 29#define CHCR_TS_LOW_SHIFT 3
29#define CHCR_TS_HIGH_MASK 0x00300000 30#define CHCR_TS_HIGH_MASK 0x00300000
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 5963124c1d4a..e46ec708105a 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -19,13 +19,26 @@
19 19
20#define MMUCR 0xFF000010 /* MMU Control Register */ 20#define MMUCR 0xFF000010 /* MMU Control Register */
21 21
22#define MMU_TLB_ENTRY_SHIFT 8
23
22#define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 24#define MMU_ITLB_ADDRESS_ARRAY 0xF2000000
23#define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000 25#define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000
26#define MMU_ITLB_DATA_ARRAY 0xF3000000
27#define MMU_ITLB_DATA_ARRAY2 0xF3800000
28
24#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 29#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000
25#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000 30#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000
31#define MMU_UTLB_DATA_ARRAY 0xF7000000
32#define MMU_UTLB_DATA_ARRAY2 0xF7800000
26#define MMU_PAGE_ASSOC_BIT 0x80 33#define MMU_PAGE_ASSOC_BIT 0x80
27 34
28#define MMUCR_TI (1<<2) 35#ifdef CONFIG_MMU
36#define MMUCR_AT (1 << 0)
37#else
38#define MMUCR_AT (0)
39#endif
40
41#define MMUCR_TI (1 << 2)
29 42
30#define MMUCR_URB 0x00FC0000 43#define MMUCR_URB 0x00FC0000
31#define MMUCR_URB_SHIFT 18 44#define MMUCR_URB_SHIFT 18
@@ -58,7 +71,8 @@
58#endif 71#endif
59 72
60#define MMU_NTLB_ENTRIES 64 73#define MMU_NTLB_ENTRIES 64
61#define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE|MMUCR_AEX) 74#define MMU_CONTROL_INIT (MMUCR_AT | MMUCR_TI | MMUCR_SQMD | \
75 MMUCR_ME | MMUCR_SE | MMUCR_AEX)
62 76
63#define TRA 0xff000020 77#define TRA 0xff000020
64#define EXPEVT 0xff000024 78#define EXPEVT 0xff000024
diff --git a/arch/sh/include/mach-sdk7786/mach/fpga.h b/arch/sh/include/mach-sdk7786/mach/fpga.h
index 2120d67dec70..416b621d94d1 100644
--- a/arch/sh/include/mach-sdk7786/mach/fpga.h
+++ b/arch/sh/include/mach-sdk7786/mach/fpga.h
@@ -42,6 +42,15 @@
42#define SCBR_I2CCEN BIT(1) /* CPU I2C master enable */ 42#define SCBR_I2CCEN BIT(1) /* CPU I2C master enable */
43 43
44#define PWRCR 0x1a0 44#define PWRCR 0x1a0
45#define PWRCR_SCISEL0 BIT(0)
46#define PWRCR_SCISEL1 BIT(1)
47#define PWRCR_SCIEN BIT(2) /* Serial port enable */
48#define PWRCR_PDWNACK BIT(5) /* Power down acknowledge */
49#define PWRCR_PDWNREQ BIT(7) /* Power down request */
50#define PWRCR_INT2 BIT(11) /* INT2 connection to power manager */
51#define PWRCR_BUPINIT BIT(13) /* DDR backup initialize */
52#define PWRCR_BKPRST BIT(15) /* Backup power reset */
53
45#define SPCBR 0x1b0 54#define SPCBR 0x1b0
46#define SPICR 0x1c0 55#define SPICR 0x1c0
47#define SPIDR 0x1d0 56#define SPIDR 0x1d0
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 02fd3ae8b0ee..650b92f00ee5 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -11,7 +11,7 @@ endif
11 11
12CFLAGS_REMOVE_return_address.o = -pg 12CFLAGS_REMOVE_return_address.o = -pg
13 13
14obj-y := debugtraps.o dma-nommu.o dumpstack.o \ 14obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \
15 idle.o io.o io_generic.o irq.o \ 15 idle.o io.o io_generic.o irq.o \
16 irq_$(BITS).o machvec.o nmi_debug.o process.o \ 16 irq_$(BITS).o machvec.o nmi_debug.o process.o \
17 process_$(BITS).o ptrace_$(BITS).o \ 17 process_$(BITS).o ptrace_$(BITS).o \
diff --git a/arch/sh/kernel/clkdev.c b/arch/sh/kernel/clkdev.c
new file mode 100644
index 000000000000..defdd6e30908
--- /dev/null
+++ b/arch/sh/kernel/clkdev.c
@@ -0,0 +1,169 @@
1/*
2 * arch/sh/kernel/clkdev.c
3 *
4 * Cloned from arch/arm/common/clkdev.c:
5 *
6 * Copyright (C) 2008 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Helper for the clk API to assist looking up a struct clk.
13 */
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/device.h>
17#include <linux/list.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/string.h>
21#include <linux/mutex.h>
22#include <linux/clk.h>
23#include <linux/slab.h>
24#include <linux/bootmem.h>
25#include <linux/mm.h>
26#include <asm/clock.h>
27#include <asm/clkdev.h>
28
29static LIST_HEAD(clocks);
30static DEFINE_MUTEX(clocks_mutex);
31
32/*
33 * Find the correct struct clk for the device and connection ID.
34 * We do slightly fuzzy matching here:
35 * An entry with a NULL ID is assumed to be a wildcard.
36 * If an entry has a device ID, it must match
37 * If an entry has a connection ID, it must match
38 * Then we take the most specific entry - with the following
39 * order of precidence: dev+con > dev only > con only.
40 */
41static struct clk *clk_find(const char *dev_id, const char *con_id)
42{
43 struct clk_lookup *p;
44 struct clk *clk = NULL;
45 int match, best = 0;
46
47 list_for_each_entry(p, &clocks, node) {
48 match = 0;
49 if (p->dev_id) {
50 if (!dev_id || strcmp(p->dev_id, dev_id))
51 continue;
52 match += 2;
53 }
54 if (p->con_id) {
55 if (!con_id || strcmp(p->con_id, con_id))
56 continue;
57 match += 1;
58 }
59 if (match == 0)
60 continue;
61
62 if (match > best) {
63 clk = p->clk;
64 best = match;
65 }
66 }
67 return clk;
68}
69
70struct clk *clk_get_sys(const char *dev_id, const char *con_id)
71{
72 struct clk *clk;
73
74 mutex_lock(&clocks_mutex);
75 clk = clk_find(dev_id, con_id);
76 mutex_unlock(&clocks_mutex);
77
78 return clk ? clk : ERR_PTR(-ENOENT);
79}
80EXPORT_SYMBOL(clk_get_sys);
81
82void clkdev_add(struct clk_lookup *cl)
83{
84 mutex_lock(&clocks_mutex);
85 list_add_tail(&cl->node, &clocks);
86 mutex_unlock(&clocks_mutex);
87}
88EXPORT_SYMBOL(clkdev_add);
89
90void __init clkdev_add_table(struct clk_lookup *cl, size_t num)
91{
92 mutex_lock(&clocks_mutex);
93 while (num--) {
94 list_add_tail(&cl->node, &clocks);
95 cl++;
96 }
97 mutex_unlock(&clocks_mutex);
98}
99
100#define MAX_DEV_ID 20
101#define MAX_CON_ID 16
102
103struct clk_lookup_alloc {
104 struct clk_lookup cl;
105 char dev_id[MAX_DEV_ID];
106 char con_id[MAX_CON_ID];
107};
108
109struct clk_lookup * __init_refok
110clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...)
111{
112 struct clk_lookup_alloc *cla;
113
114 if (!slab_is_available())
115 cla = alloc_bootmem_low_pages(sizeof(*cla));
116 else
117 cla = kzalloc(sizeof(*cla), GFP_KERNEL);
118
119 if (!cla)
120 return NULL;
121
122 cla->cl.clk = clk;
123 if (con_id) {
124 strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
125 cla->cl.con_id = cla->con_id;
126 }
127
128 if (dev_fmt) {
129 va_list ap;
130
131 va_start(ap, dev_fmt);
132 vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
133 cla->cl.dev_id = cla->dev_id;
134 va_end(ap);
135 }
136
137 return &cla->cl;
138}
139EXPORT_SYMBOL(clkdev_alloc);
140
141int clk_add_alias(const char *alias, const char *alias_dev_name, char *id,
142 struct device *dev)
143{
144 struct clk *r = clk_get(dev, id);
145 struct clk_lookup *l;
146
147 if (IS_ERR(r))
148 return PTR_ERR(r);
149
150 l = clkdev_alloc(r, alias, alias_dev_name);
151 clk_put(r);
152 if (!l)
153 return -ENODEV;
154 clkdev_add(l);
155 return 0;
156}
157EXPORT_SYMBOL(clk_add_alias);
158
159/*
160 * clkdev_drop - remove a clock dynamically allocated
161 */
162void clkdev_drop(struct clk_lookup *cl)
163{
164 mutex_lock(&clocks_mutex);
165 list_del(&cl->node);
166 mutex_unlock(&clocks_mutex);
167 kfree(cl);
168}
169EXPORT_SYMBOL(clkdev_drop);
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 0e48bc61c272..4edcb60a1355 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
16# Common interfaces. 16# Common interfaces.
17 17
18obj-$(CONFIG_SH_ADC) += adc.o 18obj-$(CONFIG_SH_ADC) += adc.o
19obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o 19obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
20obj-$(CONFIG_SH_FPU) += fpu.o 20obj-$(CONFIG_SH_FPU) += fpu.o
21obj-$(CONFIG_SH_FPU_EMU) += fpu.o 21obj-$(CONFIG_SH_FPU_EMU) += fpu.o
22 22
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index eed5eaff96ba..e2f63d68da51 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -2,317 +2,25 @@
2#include <linux/compiler.h> 2#include <linux/compiler.h>
3#include <linux/slab.h> 3#include <linux/slab.h>
4#include <linux/io.h> 4#include <linux/io.h>
5#include <asm/clkdev.h>
5#include <asm/clock.h> 6#include <asm/clock.h>
6 7
7static int sh_clk_mstp32_enable(struct clk *clk)
8{
9 __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit),
10 clk->enable_reg);
11 return 0;
12}
13
14static void sh_clk_mstp32_disable(struct clk *clk)
15{
16 __raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit),
17 clk->enable_reg);
18}
19
20static struct clk_ops sh_clk_mstp32_clk_ops = {
21 .enable = sh_clk_mstp32_enable,
22 .disable = sh_clk_mstp32_disable,
23 .recalc = followparent_recalc,
24};
25
26int __init sh_clk_mstp32_register(struct clk *clks, int nr)
27{
28 struct clk *clkp;
29 int ret = 0;
30 int k;
31
32 for (k = 0; !ret && (k < nr); k++) {
33 clkp = clks + k;
34 clkp->ops = &sh_clk_mstp32_clk_ops;
35 ret |= clk_register(clkp);
36 }
37
38 return ret;
39}
40
41static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate)
42{
43 return clk_rate_table_round(clk, clk->freq_table, rate);
44}
45
46static int sh_clk_div6_divisors[64] = {
47 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
48 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
49 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
50 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64
51};
52
53static struct clk_div_mult_table sh_clk_div6_table = {
54 .divisors = sh_clk_div6_divisors,
55 .nr_divisors = ARRAY_SIZE(sh_clk_div6_divisors),
56};
57
58static unsigned long sh_clk_div6_recalc(struct clk *clk)
59{
60 struct clk_div_mult_table *table = &sh_clk_div6_table;
61 unsigned int idx;
62
63 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
64 table, NULL);
65
66 idx = __raw_readl(clk->enable_reg) & 0x003f;
67
68 return clk->freq_table[idx].frequency;
69}
70
71static int sh_clk_div6_set_rate(struct clk *clk,
72 unsigned long rate, int algo_id)
73{
74 unsigned long value;
75 int idx;
76
77 idx = clk_rate_table_find(clk, clk->freq_table, rate);
78 if (idx < 0)
79 return idx;
80
81 value = __raw_readl(clk->enable_reg);
82 value &= ~0x3f;
83 value |= idx;
84 __raw_writel(value, clk->enable_reg);
85 return 0;
86}
87
88static int sh_clk_div6_enable(struct clk *clk)
89{
90 unsigned long value;
91 int ret;
92
93 ret = sh_clk_div6_set_rate(clk, clk->rate, 0);
94 if (ret == 0) {
95 value = __raw_readl(clk->enable_reg);
96 value &= ~0x100; /* clear stop bit to enable clock */
97 __raw_writel(value, clk->enable_reg);
98 }
99 return ret;
100}
101
102static void sh_clk_div6_disable(struct clk *clk)
103{
104 unsigned long value;
105
106 value = __raw_readl(clk->enable_reg);
107 value |= 0x100; /* stop clock */
108 value |= 0x3f; /* VDIV bits must be non-zero, overwrite divider */
109 __raw_writel(value, clk->enable_reg);
110}
111
112static struct clk_ops sh_clk_div6_clk_ops = {
113 .recalc = sh_clk_div6_recalc,
114 .round_rate = sh_clk_div_round_rate,
115 .set_rate = sh_clk_div6_set_rate,
116 .enable = sh_clk_div6_enable,
117 .disable = sh_clk_div6_disable,
118};
119
120int __init sh_clk_div6_register(struct clk *clks, int nr)
121{
122 struct clk *clkp;
123 void *freq_table;
124 int nr_divs = sh_clk_div6_table.nr_divisors;
125 int freq_table_size = sizeof(struct cpufreq_frequency_table);
126 int ret = 0;
127 int k;
128
129 freq_table_size *= (nr_divs + 1);
130 freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL);
131 if (!freq_table) {
132 pr_err("sh_clk_div6_register: unable to alloc memory\n");
133 return -ENOMEM;
134 }
135
136 for (k = 0; !ret && (k < nr); k++) {
137 clkp = clks + k;
138
139 clkp->ops = &sh_clk_div6_clk_ops;
140 clkp->id = -1;
141 clkp->freq_table = freq_table + (k * freq_table_size);
142 clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END;
143
144 ret = clk_register(clkp);
145 }
146
147 return ret;
148}
149
150static unsigned long sh_clk_div4_recalc(struct clk *clk)
151{
152 struct clk_div4_table *d4t = clk->priv;
153 struct clk_div_mult_table *table = d4t->div_mult_table;
154 unsigned int idx;
155
156 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
157 table, &clk->arch_flags);
158
159 idx = (__raw_readl(clk->enable_reg) >> clk->enable_bit) & 0x000f;
160
161 return clk->freq_table[idx].frequency;
162}
163
164static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
165{
166 struct clk_div4_table *d4t = clk->priv;
167 struct clk_div_mult_table *table = d4t->div_mult_table;
168 u32 value;
169 int ret;
170
171 if (!strcmp("pll_clk", parent->name))
172 value = __raw_readl(clk->enable_reg) & ~(1 << 7);
173 else
174 value = __raw_readl(clk->enable_reg) | (1 << 7);
175
176 ret = clk_reparent(clk, parent);
177 if (ret < 0)
178 return ret;
179
180 __raw_writel(value, clk->enable_reg);
181
182 /* Rebiuld the frequency table */
183 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
184 table, &clk->arch_flags);
185
186 return 0;
187}
188
189static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id)
190{
191 struct clk_div4_table *d4t = clk->priv;
192 unsigned long value;
193 int idx = clk_rate_table_find(clk, clk->freq_table, rate);
194 if (idx < 0)
195 return idx;
196
197 value = __raw_readl(clk->enable_reg);
198 value &= ~(0xf << clk->enable_bit);
199 value |= (idx << clk->enable_bit);
200 __raw_writel(value, clk->enable_reg);
201
202 if (d4t->kick)
203 d4t->kick(clk);
204
205 return 0;
206}
207
208static int sh_clk_div4_enable(struct clk *clk)
209{
210 __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << 8), clk->enable_reg);
211 return 0;
212}
213
214static void sh_clk_div4_disable(struct clk *clk)
215{
216 __raw_writel(__raw_readl(clk->enable_reg) | (1 << 8), clk->enable_reg);
217}
218
219static struct clk_ops sh_clk_div4_clk_ops = {
220 .recalc = sh_clk_div4_recalc,
221 .set_rate = sh_clk_div4_set_rate,
222 .round_rate = sh_clk_div_round_rate,
223};
224
225static struct clk_ops sh_clk_div4_enable_clk_ops = {
226 .recalc = sh_clk_div4_recalc,
227 .set_rate = sh_clk_div4_set_rate,
228 .round_rate = sh_clk_div_round_rate,
229 .enable = sh_clk_div4_enable,
230 .disable = sh_clk_div4_disable,
231};
232
233static struct clk_ops sh_clk_div4_reparent_clk_ops = {
234 .recalc = sh_clk_div4_recalc,
235 .set_rate = sh_clk_div4_set_rate,
236 .round_rate = sh_clk_div_round_rate,
237 .enable = sh_clk_div4_enable,
238 .disable = sh_clk_div4_disable,
239 .set_parent = sh_clk_div4_set_parent,
240};
241
242static int __init sh_clk_div4_register_ops(struct clk *clks, int nr,
243 struct clk_div4_table *table, struct clk_ops *ops)
244{
245 struct clk *clkp;
246 void *freq_table;
247 int nr_divs = table->div_mult_table->nr_divisors;
248 int freq_table_size = sizeof(struct cpufreq_frequency_table);
249 int ret = 0;
250 int k;
251
252 freq_table_size *= (nr_divs + 1);
253 freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL);
254 if (!freq_table) {
255 pr_err("sh_clk_div4_register: unable to alloc memory\n");
256 return -ENOMEM;
257 }
258
259 for (k = 0; !ret && (k < nr); k++) {
260 clkp = clks + k;
261
262 clkp->ops = ops;
263 clkp->id = -1;
264 clkp->priv = table;
265
266 clkp->freq_table = freq_table + (k * freq_table_size);
267 clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END;
268
269 ret = clk_register(clkp);
270 }
271
272 return ret;
273}
274
275int __init sh_clk_div4_register(struct clk *clks, int nr,
276 struct clk_div4_table *table)
277{
278 return sh_clk_div4_register_ops(clks, nr, table, &sh_clk_div4_clk_ops);
279}
280
281int __init sh_clk_div4_enable_register(struct clk *clks, int nr,
282 struct clk_div4_table *table)
283{
284 return sh_clk_div4_register_ops(clks, nr, table,
285 &sh_clk_div4_enable_clk_ops);
286}
287
288int __init sh_clk_div4_reparent_register(struct clk *clks, int nr,
289 struct clk_div4_table *table)
290{
291 return sh_clk_div4_register_ops(clks, nr, table,
292 &sh_clk_div4_reparent_clk_ops);
293}
294
295#ifdef CONFIG_SH_CLK_CPG_LEGACY
296static struct clk master_clk = { 8static struct clk master_clk = {
297 .name = "master_clk",
298 .flags = CLK_ENABLE_ON_INIT, 9 .flags = CLK_ENABLE_ON_INIT,
299 .rate = CONFIG_SH_PCLK_FREQ, 10 .rate = CONFIG_SH_PCLK_FREQ,
300}; 11};
301 12
302static struct clk peripheral_clk = { 13static struct clk peripheral_clk = {
303 .name = "peripheral_clk",
304 .parent = &master_clk, 14 .parent = &master_clk,
305 .flags = CLK_ENABLE_ON_INIT, 15 .flags = CLK_ENABLE_ON_INIT,
306}; 16};
307 17
308static struct clk bus_clk = { 18static struct clk bus_clk = {
309 .name = "bus_clk",
310 .parent = &master_clk, 19 .parent = &master_clk,
311 .flags = CLK_ENABLE_ON_INIT, 20 .flags = CLK_ENABLE_ON_INIT,
312}; 21};
313 22
314static struct clk cpu_clk = { 23static struct clk cpu_clk = {
315 .name = "cpu_clk",
316 .parent = &master_clk, 24 .parent = &master_clk,
317 .flags = CLK_ENABLE_ON_INIT, 25 .flags = CLK_ENABLE_ON_INIT,
318}; 26};
@@ -327,6 +35,16 @@ static struct clk *onchip_clocks[] = {
327 &cpu_clk, 35 &cpu_clk,
328}; 36};
329 37
38#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
39
40static struct clk_lookup lookups[] = {
41 /* main clocks */
42 CLKDEV_CON_ID("master_clk", &master_clk),
43 CLKDEV_CON_ID("peripheral_clk", &peripheral_clk),
44 CLKDEV_CON_ID("bus_clk", &bus_clk),
45 CLKDEV_CON_ID("cpu_clk", &cpu_clk),
46};
47
330int __init __deprecated cpg_clk_init(void) 48int __init __deprecated cpg_clk_init(void)
331{ 49{
332 int i, ret = 0; 50 int i, ret = 0;
@@ -338,6 +56,13 @@ int __init __deprecated cpg_clk_init(void)
338 ret |= clk_register(clk); 56 ret |= clk_register(clk);
339 } 57 }
340 58
59 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
60
61 clk_add_alias("tmu_fck", NULL, "peripheral_clk", NULL);
62 clk_add_alias("mtu2_fck", NULL, "peripheral_clk", NULL);
63 clk_add_alias("cmt_fck", NULL, "peripheral_clk", NULL);
64 clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL);
65
341 return ret; 66 return ret;
342} 67}
343 68
@@ -349,4 +74,3 @@ int __init __weak arch_clk_init(void)
349{ 74{
350 return cpg_clk_init(); 75 return cpg_clk_init();
351} 76}
352#endif /* CONFIG_SH_CPG_CLK_LEGACY */
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index e9fa1bfed53e..50f887dda565 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -10,558 +10,16 @@
10 * 10 *
11 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> 11 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
12 * 12 *
13 * With clkdev bits:
14 *
15 * Copyright (C) 2008 Russell King.
16 *
17 * This file is subject to the terms and conditions of the GNU General Public 13 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive 14 * License. See the file "COPYING" in the main directory of this archive
19 * for more details. 15 * for more details.
20 */ 16 */
21#include <linux/kernel.h> 17#include <linux/kernel.h>
22#include <linux/init.h> 18#include <linux/init.h>
23#include <linux/module.h> 19#include <linux/clk.h>
24#include <linux/mutex.h>
25#include <linux/list.h>
26#include <linux/kobject.h>
27#include <linux/sysdev.h>
28#include <linux/seq_file.h>
29#include <linux/err.h>
30#include <linux/platform_device.h>
31#include <linux/debugfs.h>
32#include <linux/cpufreq.h>
33#include <asm/clock.h> 20#include <asm/clock.h>
34#include <asm/machvec.h> 21#include <asm/machvec.h>
35 22
36static LIST_HEAD(clock_list);
37static DEFINE_SPINLOCK(clock_lock);
38static DEFINE_MUTEX(clock_list_sem);
39
40void clk_rate_table_build(struct clk *clk,
41 struct cpufreq_frequency_table *freq_table,
42 int nr_freqs,
43 struct clk_div_mult_table *src_table,
44 unsigned long *bitmap)
45{
46 unsigned long mult, div;
47 unsigned long freq;
48 int i;
49
50 for (i = 0; i < nr_freqs; i++) {
51 div = 1;
52 mult = 1;
53
54 if (src_table->divisors && i < src_table->nr_divisors)
55 div = src_table->divisors[i];
56
57 if (src_table->multipliers && i < src_table->nr_multipliers)
58 mult = src_table->multipliers[i];
59
60 if (!div || !mult || (bitmap && !test_bit(i, bitmap)))
61 freq = CPUFREQ_ENTRY_INVALID;
62 else
63 freq = clk->parent->rate * mult / div;
64
65 freq_table[i].index = i;
66 freq_table[i].frequency = freq;
67 }
68
69 /* Termination entry */
70 freq_table[i].index = i;
71 freq_table[i].frequency = CPUFREQ_TABLE_END;
72}
73
74long clk_rate_table_round(struct clk *clk,
75 struct cpufreq_frequency_table *freq_table,
76 unsigned long rate)
77{
78 unsigned long rate_error, rate_error_prev = ~0UL;
79 unsigned long rate_best_fit = rate;
80 unsigned long highest, lowest;
81 int i;
82
83 highest = lowest = 0;
84
85 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
86 unsigned long freq = freq_table[i].frequency;
87
88 if (freq == CPUFREQ_ENTRY_INVALID)
89 continue;
90
91 if (freq > highest)
92 highest = freq;
93 if (freq < lowest)
94 lowest = freq;
95
96 rate_error = abs(freq - rate);
97 if (rate_error < rate_error_prev) {
98 rate_best_fit = freq;
99 rate_error_prev = rate_error;
100 }
101
102 if (rate_error == 0)
103 break;
104 }
105
106 if (rate >= highest)
107 rate_best_fit = highest;
108 if (rate <= lowest)
109 rate_best_fit = lowest;
110
111 return rate_best_fit;
112}
113
114int clk_rate_table_find(struct clk *clk,
115 struct cpufreq_frequency_table *freq_table,
116 unsigned long rate)
117{
118 int i;
119
120 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
121 unsigned long freq = freq_table[i].frequency;
122
123 if (freq == CPUFREQ_ENTRY_INVALID)
124 continue;
125
126 if (freq == rate)
127 return i;
128 }
129
130 return -ENOENT;
131}
132
133/* Used for clocks that always have same value as the parent clock */
134unsigned long followparent_recalc(struct clk *clk)
135{
136 return clk->parent ? clk->parent->rate : 0;
137}
138
139int clk_reparent(struct clk *child, struct clk *parent)
140{
141 list_del_init(&child->sibling);
142 if (parent)
143 list_add(&child->sibling, &parent->children);
144 child->parent = parent;
145
146 /* now do the debugfs renaming to reattach the child
147 to the proper parent */
148
149 return 0;
150}
151
152/* Propagate rate to children */
153void propagate_rate(struct clk *tclk)
154{
155 struct clk *clkp;
156
157 list_for_each_entry(clkp, &tclk->children, sibling) {
158 if (clkp->ops && clkp->ops->recalc)
159 clkp->rate = clkp->ops->recalc(clkp);
160
161 propagate_rate(clkp);
162 }
163}
164
165static void __clk_disable(struct clk *clk)
166{
167 if (clk->usecount == 0) {
168 printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
169 clk->name);
170 WARN_ON(1);
171 return;
172 }
173
174 if (!(--clk->usecount)) {
175 if (likely(clk->ops && clk->ops->disable))
176 clk->ops->disable(clk);
177 if (likely(clk->parent))
178 __clk_disable(clk->parent);
179 }
180}
181
182void clk_disable(struct clk *clk)
183{
184 unsigned long flags;
185
186 if (!clk)
187 return;
188
189 spin_lock_irqsave(&clock_lock, flags);
190 __clk_disable(clk);
191 spin_unlock_irqrestore(&clock_lock, flags);
192}
193EXPORT_SYMBOL_GPL(clk_disable);
194
195static int __clk_enable(struct clk *clk)
196{
197 int ret = 0;
198
199 if (clk->usecount++ == 0) {
200 if (clk->parent) {
201 ret = __clk_enable(clk->parent);
202 if (unlikely(ret))
203 goto err;
204 }
205
206 if (clk->ops && clk->ops->enable) {
207 ret = clk->ops->enable(clk);
208 if (ret) {
209 if (clk->parent)
210 __clk_disable(clk->parent);
211 goto err;
212 }
213 }
214 }
215
216 return ret;
217err:
218 clk->usecount--;
219 return ret;
220}
221
222int clk_enable(struct clk *clk)
223{
224 unsigned long flags;
225 int ret;
226
227 if (!clk)
228 return -EINVAL;
229
230 spin_lock_irqsave(&clock_lock, flags);
231 ret = __clk_enable(clk);
232 spin_unlock_irqrestore(&clock_lock, flags);
233
234 return ret;
235}
236EXPORT_SYMBOL_GPL(clk_enable);
237
238static LIST_HEAD(root_clks);
239
240/**
241 * recalculate_root_clocks - recalculate and propagate all root clocks
242 *
243 * Recalculates all root clocks (clocks with no parent), which if the
244 * clock's .recalc is set correctly, should also propagate their rates.
245 * Called at init.
246 */
247void recalculate_root_clocks(void)
248{
249 struct clk *clkp;
250
251 list_for_each_entry(clkp, &root_clks, sibling) {
252 if (clkp->ops && clkp->ops->recalc)
253 clkp->rate = clkp->ops->recalc(clkp);
254 propagate_rate(clkp);
255 }
256}
257
258int clk_register(struct clk *clk)
259{
260 if (clk == NULL || IS_ERR(clk))
261 return -EINVAL;
262
263 /*
264 * trap out already registered clocks
265 */
266 if (clk->node.next || clk->node.prev)
267 return 0;
268
269 mutex_lock(&clock_list_sem);
270
271 INIT_LIST_HEAD(&clk->children);
272 clk->usecount = 0;
273
274 if (clk->parent)
275 list_add(&clk->sibling, &clk->parent->children);
276 else
277 list_add(&clk->sibling, &root_clks);
278
279 list_add(&clk->node, &clock_list);
280 if (clk->ops && clk->ops->init)
281 clk->ops->init(clk);
282 mutex_unlock(&clock_list_sem);
283
284 return 0;
285}
286EXPORT_SYMBOL_GPL(clk_register);
287
288void clk_unregister(struct clk *clk)
289{
290 mutex_lock(&clock_list_sem);
291 list_del(&clk->sibling);
292 list_del(&clk->node);
293 mutex_unlock(&clock_list_sem);
294}
295EXPORT_SYMBOL_GPL(clk_unregister);
296
297static void clk_enable_init_clocks(void)
298{
299 struct clk *clkp;
300
301 list_for_each_entry(clkp, &clock_list, node)
302 if (clkp->flags & CLK_ENABLE_ON_INIT)
303 clk_enable(clkp);
304}
305
306unsigned long clk_get_rate(struct clk *clk)
307{
308 return clk->rate;
309}
310EXPORT_SYMBOL_GPL(clk_get_rate);
311
312int clk_set_rate(struct clk *clk, unsigned long rate)
313{
314 return clk_set_rate_ex(clk, rate, 0);
315}
316EXPORT_SYMBOL_GPL(clk_set_rate);
317
318int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
319{
320 int ret = -EOPNOTSUPP;
321 unsigned long flags;
322
323 spin_lock_irqsave(&clock_lock, flags);
324
325 if (likely(clk->ops && clk->ops->set_rate)) {
326 ret = clk->ops->set_rate(clk, rate, algo_id);
327 if (ret != 0)
328 goto out_unlock;
329 } else {
330 clk->rate = rate;
331 ret = 0;
332 }
333
334 if (clk->ops && clk->ops->recalc)
335 clk->rate = clk->ops->recalc(clk);
336
337 propagate_rate(clk);
338
339out_unlock:
340 spin_unlock_irqrestore(&clock_lock, flags);
341
342 return ret;
343}
344EXPORT_SYMBOL_GPL(clk_set_rate_ex);
345
346int clk_set_parent(struct clk *clk, struct clk *parent)
347{
348 unsigned long flags;
349 int ret = -EINVAL;
350
351 if (!parent || !clk)
352 return ret;
353 if (clk->parent == parent)
354 return 0;
355
356 spin_lock_irqsave(&clock_lock, flags);
357 if (clk->usecount == 0) {
358 if (clk->ops->set_parent)
359 ret = clk->ops->set_parent(clk, parent);
360 else
361 ret = clk_reparent(clk, parent);
362
363 if (ret == 0) {
364 pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
365 clk->name, clk->parent->name, clk->rate);
366 if (clk->ops->recalc)
367 clk->rate = clk->ops->recalc(clk);
368 propagate_rate(clk);
369 }
370 } else
371 ret = -EBUSY;
372 spin_unlock_irqrestore(&clock_lock, flags);
373
374 return ret;
375}
376EXPORT_SYMBOL_GPL(clk_set_parent);
377
378struct clk *clk_get_parent(struct clk *clk)
379{
380 return clk->parent;
381}
382EXPORT_SYMBOL_GPL(clk_get_parent);
383
384long clk_round_rate(struct clk *clk, unsigned long rate)
385{
386 if (likely(clk->ops && clk->ops->round_rate)) {
387 unsigned long flags, rounded;
388
389 spin_lock_irqsave(&clock_lock, flags);
390 rounded = clk->ops->round_rate(clk, rate);
391 spin_unlock_irqrestore(&clock_lock, flags);
392
393 return rounded;
394 }
395
396 return clk_get_rate(clk);
397}
398EXPORT_SYMBOL_GPL(clk_round_rate);
399
400/*
401 * Find the correct struct clk for the device and connection ID.
402 * We do slightly fuzzy matching here:
403 * An entry with a NULL ID is assumed to be a wildcard.
404 * If an entry has a device ID, it must match
405 * If an entry has a connection ID, it must match
406 * Then we take the most specific entry - with the following
407 * order of precedence: dev+con > dev only > con only.
408 */
409static struct clk *clk_find(const char *dev_id, const char *con_id)
410{
411 struct clk_lookup *p;
412 struct clk *clk = NULL;
413 int match, best = 0;
414
415 list_for_each_entry(p, &clock_list, node) {
416 match = 0;
417 if (p->dev_id) {
418 if (!dev_id || strcmp(p->dev_id, dev_id))
419 continue;
420 match += 2;
421 }
422 if (p->con_id) {
423 if (!con_id || strcmp(p->con_id, con_id))
424 continue;
425 match += 1;
426 }
427 if (match == 0)
428 continue;
429
430 if (match > best) {
431 clk = p->clk;
432 best = match;
433 }
434 }
435 return clk;
436}
437
438struct clk *clk_get_sys(const char *dev_id, const char *con_id)
439{
440 struct clk *clk;
441
442 mutex_lock(&clock_list_sem);
443 clk = clk_find(dev_id, con_id);
444 mutex_unlock(&clock_list_sem);
445
446 return clk ? clk : ERR_PTR(-ENOENT);
447}
448EXPORT_SYMBOL_GPL(clk_get_sys);
449
450/*
451 * Returns a clock. Note that we first try to use device id on the bus
452 * and clock name. If this fails, we try to use clock name only.
453 */
454struct clk *clk_get(struct device *dev, const char *id)
455{
456 const char *dev_id = dev ? dev_name(dev) : NULL;
457 struct clk *p, *clk = ERR_PTR(-ENOENT);
458 int idno;
459
460 clk = clk_get_sys(dev_id, id);
461 if (clk && !IS_ERR(clk))
462 return clk;
463
464 if (dev == NULL || dev->bus != &platform_bus_type)
465 idno = -1;
466 else
467 idno = to_platform_device(dev)->id;
468
469 mutex_lock(&clock_list_sem);
470 list_for_each_entry(p, &clock_list, node) {
471 if (p->id == idno &&
472 strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
473 clk = p;
474 goto found;
475 }
476 }
477
478 list_for_each_entry(p, &clock_list, node) {
479 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
480 clk = p;
481 break;
482 }
483 }
484
485found:
486 mutex_unlock(&clock_list_sem);
487
488 return clk;
489}
490EXPORT_SYMBOL_GPL(clk_get);
491
492void clk_put(struct clk *clk)
493{
494 if (clk && !IS_ERR(clk))
495 module_put(clk->owner);
496}
497EXPORT_SYMBOL_GPL(clk_put);
498
499#ifdef CONFIG_PM
500static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
501{
502 static pm_message_t prev_state;
503 struct clk *clkp;
504
505 switch (state.event) {
506 case PM_EVENT_ON:
507 /* Resumeing from hibernation */
508 if (prev_state.event != PM_EVENT_FREEZE)
509 break;
510
511 list_for_each_entry(clkp, &clock_list, node) {
512 if (likely(clkp->ops)) {
513 unsigned long rate = clkp->rate;
514
515 if (likely(clkp->ops->set_parent))
516 clkp->ops->set_parent(clkp,
517 clkp->parent);
518 if (likely(clkp->ops->set_rate))
519 clkp->ops->set_rate(clkp,
520 rate, NO_CHANGE);
521 else if (likely(clkp->ops->recalc))
522 clkp->rate = clkp->ops->recalc(clkp);
523 }
524 }
525 break;
526 case PM_EVENT_FREEZE:
527 break;
528 case PM_EVENT_SUSPEND:
529 break;
530 }
531
532 prev_state = state;
533 return 0;
534}
535
536static int clks_sysdev_resume(struct sys_device *dev)
537{
538 return clks_sysdev_suspend(dev, PMSG_ON);
539}
540
541static struct sysdev_class clks_sysdev_class = {
542 .name = "clks",
543};
544
545static struct sysdev_driver clks_sysdev_driver = {
546 .suspend = clks_sysdev_suspend,
547 .resume = clks_sysdev_resume,
548};
549
550static struct sys_device clks_sysdev_dev = {
551 .cls = &clks_sysdev_class,
552};
553
554static int __init clk_sysdev_init(void)
555{
556 sysdev_class_register(&clks_sysdev_class);
557 sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver);
558 sysdev_register(&clks_sysdev_dev);
559
560 return 0;
561}
562subsys_initcall(clk_sysdev_init);
563#endif
564
565int __init clk_init(void) 23int __init clk_init(void)
566{ 24{
567 int ret; 25 int ret;
@@ -591,89 +49,19 @@ int __init clk_init(void)
591} 49}
592 50
593/* 51/*
594 * debugfs support to trace clock tree hierarchy and attributes 52 * Returns a clock. Note that we first try to use device id on the bus
53 * and clock name. If this fails, we try to use clock name only.
595 */ 54 */
596static struct dentry *clk_debugfs_root; 55struct clk *clk_get(struct device *dev, const char *con_id)
597
598static int clk_debugfs_register_one(struct clk *c)
599{ 56{
600 int err; 57 const char *dev_id = dev ? dev_name(dev) : NULL;
601 struct dentry *d, *child, *child_tmp;
602 struct clk *pa = c->parent;
603 char s[255];
604 char *p = s;
605
606 p += sprintf(p, "%s", c->name);
607 if (c->id >= 0)
608 sprintf(p, ":%d", c->id);
609 d = debugfs_create_dir(s, pa ? pa->dentry : clk_debugfs_root);
610 if (!d)
611 return -ENOMEM;
612 c->dentry = d;
613
614 d = debugfs_create_u8("usecount", S_IRUGO, c->dentry, (u8 *)&c->usecount);
615 if (!d) {
616 err = -ENOMEM;
617 goto err_out;
618 }
619 d = debugfs_create_u32("rate", S_IRUGO, c->dentry, (u32 *)&c->rate);
620 if (!d) {
621 err = -ENOMEM;
622 goto err_out;
623 }
624 d = debugfs_create_x32("flags", S_IRUGO, c->dentry, (u32 *)&c->flags);
625 if (!d) {
626 err = -ENOMEM;
627 goto err_out;
628 }
629 return 0;
630 58
631err_out: 59 return clk_get_sys(dev_id, con_id);
632 d = c->dentry;
633 list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
634 debugfs_remove(child);
635 debugfs_remove(c->dentry);
636 return err;
637} 60}
61EXPORT_SYMBOL_GPL(clk_get);
638 62
639static int clk_debugfs_register(struct clk *c) 63void clk_put(struct clk *clk)
640{ 64{
641 int err;
642 struct clk *pa = c->parent;
643
644 if (pa && !pa->dentry) {
645 err = clk_debugfs_register(pa);
646 if (err)
647 return err;
648 }
649
650 if (!c->dentry) {
651 err = clk_debugfs_register_one(c);
652 if (err)
653 return err;
654 }
655 return 0;
656} 65}
66EXPORT_SYMBOL_GPL(clk_put);
657 67
658static int __init clk_debugfs_init(void)
659{
660 struct clk *c;
661 struct dentry *d;
662 int err;
663
664 d = debugfs_create_dir("clock", NULL);
665 if (!d)
666 return -ENOMEM;
667 clk_debugfs_root = d;
668
669 list_for_each_entry(c, &clock_list, node) {
670 err = clk_debugfs_register(c);
671 if (err)
672 goto err_out;
673 }
674 return 0;
675err_out:
676 debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */
677 return err;
678}
679late_initcall(clk_debugfs_init);
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c
index 67a1e811cfe8..3e985aae5d91 100644
--- a/arch/sh/kernel/cpu/hwblk.c
+++ b/arch/sh/kernel/cpu/hwblk.c
@@ -146,6 +146,11 @@ int __init sh_hwblk_clk_register(struct clk *clks, int nr)
146 146
147 for (k = 0; !ret && (k < nr); k++) { 147 for (k = 0; !ret && (k < nr); k++) {
148 clkp = clks + k; 148 clkp = clks + k;
149
150 /* skip over clocks using hwblk 0 (HWBLK_UNKNOWN) */
151 if (!clkp->arch_flags)
152 continue;
153
149 clkp->ops = &sh_hwblk_clk_ops; 154 clkp->ops = &sh_hwblk_clk_ops;
150 ret |= clk_register(clkp); 155 ret |= clk_register(clkp);
151 } 156 }
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index c736422344eb..97661061ff20 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -43,9 +43,9 @@
43 * peripherals (nofpu, nodsp, and so forth). 43 * peripherals (nofpu, nodsp, and so forth).
44 */ 44 */
45#define onchip_setup(x) \ 45#define onchip_setup(x) \
46static int x##_disabled __initdata = !cpu_has_##x; \ 46static int x##_disabled __cpuinitdata = !cpu_has_##x; \
47 \ 47 \
48static int __init x##_setup(char *opts) \ 48static int __cpuinit x##_setup(char *opts) \
49{ \ 49{ \
50 x##_disabled = 1; \ 50 x##_disabled = 1; \
51 return 1; \ 51 return 1; \
@@ -59,7 +59,7 @@ onchip_setup(dsp);
59#define CPUOPM 0xff2f0000 59#define CPUOPM 0xff2f0000
60#define CPUOPM_RABD (1 << 5) 60#define CPUOPM_RABD (1 << 5)
61 61
62static void __init speculative_execution_init(void) 62static void __cpuinit speculative_execution_init(void)
63{ 63{
64 /* Clear RABD */ 64 /* Clear RABD */
65 __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); 65 __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
@@ -78,7 +78,7 @@ static void __init speculative_execution_init(void)
78#define EXPMASK_BRDSSLP (1 << 1) 78#define EXPMASK_BRDSSLP (1 << 1)
79#define EXPMASK_MMCAW (1 << 4) 79#define EXPMASK_MMCAW (1 << 4)
80 80
81static void __init expmask_init(void) 81static void __cpuinit expmask_init(void)
82{ 82{
83 unsigned long expmask = __raw_readl(EXPMASK); 83 unsigned long expmask = __raw_readl(EXPMASK);
84 84
@@ -217,7 +217,7 @@ static void detect_cache_shape(void)
217 l2_cache_shape = -1; /* No S-cache */ 217 l2_cache_shape = -1; /* No S-cache */
218} 218}
219 219
220static void __init fpu_init(void) 220static void __cpuinit fpu_init(void)
221{ 221{
222 /* Disable the FPU */ 222 /* Disable the FPU */
223 if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) { 223 if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {
@@ -230,7 +230,7 @@ static void __init fpu_init(void)
230} 230}
231 231
232#ifdef CONFIG_SH_DSP 232#ifdef CONFIG_SH_DSP
233static void __init release_dsp(void) 233static void __cpuinit release_dsp(void)
234{ 234{
235 unsigned long sr; 235 unsigned long sr;
236 236
@@ -244,7 +244,7 @@ static void __init release_dsp(void)
244 ); 244 );
245} 245}
246 246
247static void __init dsp_init(void) 247static void __cpuinit dsp_init(void)
248{ 248{
249 unsigned long sr; 249 unsigned long sr;
250 250
@@ -276,11 +276,11 @@ static void __init dsp_init(void)
276 release_dsp(); 276 release_dsp();
277} 277}
278#else 278#else
279static inline void __init dsp_init(void) { } 279static inline void __cpuinit dsp_init(void) { }
280#endif /* CONFIG_SH_DSP */ 280#endif /* CONFIG_SH_DSP */
281 281
282/** 282/**
283 * sh_cpu_init 283 * cpu_init
284 * 284 *
285 * This is our initial entry point for each CPU, and is invoked on the 285 * This is our initial entry point for each CPU, and is invoked on the
286 * boot CPU prior to calling start_kernel(). For SMP, a combination of 286 * boot CPU prior to calling start_kernel(). For SMP, a combination of
@@ -293,14 +293,14 @@ static inline void __init dsp_init(void) { }
293 * subtype and initial configuration will all be done. 293 * subtype and initial configuration will all be done.
294 * 294 *
295 * Each processor family is still responsible for doing its own probing 295 * Each processor family is still responsible for doing its own probing
296 * and cache configuration in detect_cpu_and_cache_system(). 296 * and cache configuration in cpu_probe().
297 */ 297 */
298asmlinkage void __init sh_cpu_init(void) 298asmlinkage void __cpuinit cpu_init(void)
299{ 299{
300 current_thread_info()->cpu = hard_smp_processor_id(); 300 current_thread_info()->cpu = hard_smp_processor_id();
301 301
302 /* First, probe the CPU */ 302 /* First, probe the CPU */
303 detect_cpu_and_cache_system(); 303 cpu_probe();
304 304
305 if (current_cpu_data.type == CPU_SH_NONE) 305 if (current_cpu_data.type == CPU_SH_NONE)
306 panic("Unknown CPU"); 306 panic("Unknown CPU");
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 1db6d8883888..bab8e75958ae 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -13,7 +13,7 @@
13#include <asm/processor.h> 13#include <asm/processor.h>
14#include <asm/cache.h> 14#include <asm/cache.h>
15 15
16int __init detect_cpu_and_cache_system(void) 16void __cpuinit cpu_probe(void)
17{ 17{
18#if defined(CONFIG_CPU_SUBTYPE_SH7619) 18#if defined(CONFIG_CPU_SUBTYPE_SH7619)
19 boot_cpu_data.type = CPU_SH7619; 19 boot_cpu_data.type = CPU_SH7619;
@@ -30,7 +30,4 @@ int __init detect_cpu_and_cache_system(void)
30 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; 30 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
31 boot_cpu_data.icache = boot_cpu_data.dcache; 31 boot_cpu_data.icache = boot_cpu_data.dcache;
32 boot_cpu_data.family = CPU_FAMILY_SH2; 32 boot_cpu_data.family = CPU_FAMILY_SH2;
33
34 return 0;
35} 33}
36
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 114c7cee7184..c3638516bffc 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -128,17 +128,14 @@ static struct platform_device eth_device = {
128}; 128};
129 129
130static struct sh_timer_config cmt0_platform_data = { 130static struct sh_timer_config cmt0_platform_data = {
131 .name = "CMT0",
132 .channel_offset = 0x02, 131 .channel_offset = 0x02,
133 .timer_bit = 0, 132 .timer_bit = 0,
134 .clk = "peripheral_clk",
135 .clockevent_rating = 125, 133 .clockevent_rating = 125,
136 .clocksource_rating = 0, /* disabled due to code generation issues */ 134 .clocksource_rating = 0, /* disabled due to code generation issues */
137}; 135};
138 136
139static struct resource cmt0_resources[] = { 137static struct resource cmt0_resources[] = {
140 [0] = { 138 [0] = {
141 .name = "CMT0",
142 .start = 0xf84a0072, 139 .start = 0xf84a0072,
143 .end = 0xf84a0077, 140 .end = 0xf84a0077,
144 .flags = IORESOURCE_MEM, 141 .flags = IORESOURCE_MEM,
@@ -160,17 +157,14 @@ static struct platform_device cmt0_device = {
160}; 157};
161 158
162static struct sh_timer_config cmt1_platform_data = { 159static struct sh_timer_config cmt1_platform_data = {
163 .name = "CMT1",
164 .channel_offset = 0x08, 160 .channel_offset = 0x08,
165 .timer_bit = 1, 161 .timer_bit = 1,
166 .clk = "peripheral_clk",
167 .clockevent_rating = 125, 162 .clockevent_rating = 125,
168 .clocksource_rating = 0, /* disabled due to code generation issues */ 163 .clocksource_rating = 0, /* disabled due to code generation issues */
169}; 164};
170 165
171static struct resource cmt1_resources[] = { 166static struct resource cmt1_resources[] = {
172 [0] = { 167 [0] = {
173 .name = "CMT1",
174 .start = 0xf84a0078, 168 .start = 0xf84a0078,
175 .end = 0xf84a007d, 169 .end = 0xf84a007d,
176 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 6825d6507164..48e97a2a0c8d 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -13,7 +13,7 @@
13#include <asm/processor.h> 13#include <asm/processor.h>
14#include <asm/cache.h> 14#include <asm/cache.h>
15 15
16int __init detect_cpu_and_cache_system(void) 16void __cpuinit cpu_probe(void)
17{ 17{
18 boot_cpu_data.family = CPU_FAMILY_SH2A; 18 boot_cpu_data.family = CPU_FAMILY_SH2A;
19 19
@@ -51,6 +51,4 @@ int __init detect_cpu_and_cache_system(void)
51 * on the cache info. 51 * on the cache info.
52 */ 52 */
53 boot_cpu_data.icache = boot_cpu_data.dcache; 53 boot_cpu_data.icache = boot_cpu_data.dcache;
54
55 return 0;
56} 54}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index 8f669dc9b0da..6c96ea02bf8d 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -115,16 +115,13 @@ static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
115 mask_registers, prio_registers, NULL); 115 mask_registers, prio_registers, NULL);
116 116
117static struct sh_timer_config mtu2_0_platform_data = { 117static struct sh_timer_config mtu2_0_platform_data = {
118 .name = "MTU2_0",
119 .channel_offset = -0x80, 118 .channel_offset = -0x80,
120 .timer_bit = 0, 119 .timer_bit = 0,
121 .clk = "peripheral_clk",
122 .clockevent_rating = 200, 120 .clockevent_rating = 200,
123}; 121};
124 122
125static struct resource mtu2_0_resources[] = { 123static struct resource mtu2_0_resources[] = {
126 [0] = { 124 [0] = {
127 .name = "MTU2_0",
128 .start = 0xff801300, 125 .start = 0xff801300,
129 .end = 0xff801326, 126 .end = 0xff801326,
130 .flags = IORESOURCE_MEM, 127 .flags = IORESOURCE_MEM,
@@ -146,16 +143,13 @@ static struct platform_device mtu2_0_device = {
146}; 143};
147 144
148static struct sh_timer_config mtu2_1_platform_data = { 145static struct sh_timer_config mtu2_1_platform_data = {
149 .name = "MTU2_1",
150 .channel_offset = -0x100, 146 .channel_offset = -0x100,
151 .timer_bit = 1, 147 .timer_bit = 1,
152 .clk = "peripheral_clk",
153 .clockevent_rating = 200, 148 .clockevent_rating = 200,
154}; 149};
155 150
156static struct resource mtu2_1_resources[] = { 151static struct resource mtu2_1_resources[] = {
157 [0] = { 152 [0] = {
158 .name = "MTU2_1",
159 .start = 0xff801380, 153 .start = 0xff801380,
160 .end = 0xff801390, 154 .end = 0xff801390,
161 .flags = IORESOURCE_MEM, 155 .flags = IORESOURCE_MEM,
@@ -177,16 +171,13 @@ static struct platform_device mtu2_1_device = {
177}; 171};
178 172
179static struct sh_timer_config mtu2_2_platform_data = { 173static struct sh_timer_config mtu2_2_platform_data = {
180 .name = "MTU2_2",
181 .channel_offset = 0x80, 174 .channel_offset = 0x80,
182 .timer_bit = 2, 175 .timer_bit = 2,
183 .clk = "peripheral_clk",
184 .clockevent_rating = 200, 176 .clockevent_rating = 200,
185}; 177};
186 178
187static struct resource mtu2_2_resources[] = { 179static struct resource mtu2_2_resources[] = {
188 [0] = { 180 [0] = {
189 .name = "MTU2_2",
190 .start = 0xff801000, 181 .start = 0xff801000,
191 .end = 0xff80100a, 182 .end = 0xff80100a,
192 .flags = IORESOURCE_MEM, 183 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 4ccfeb59eb1a..d08bf4c07d60 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -318,16 +318,13 @@ static struct platform_device rtc_device = {
318}; 318};
319 319
320static struct sh_timer_config mtu2_0_platform_data = { 320static struct sh_timer_config mtu2_0_platform_data = {
321 .name = "MTU2_0",
322 .channel_offset = -0x80, 321 .channel_offset = -0x80,
323 .timer_bit = 0, 322 .timer_bit = 0,
324 .clk = "peripheral_clk",
325 .clockevent_rating = 200, 323 .clockevent_rating = 200,
326}; 324};
327 325
328static struct resource mtu2_0_resources[] = { 326static struct resource mtu2_0_resources[] = {
329 [0] = { 327 [0] = {
330 .name = "MTU2_0",
331 .start = 0xfffe4300, 328 .start = 0xfffe4300,
332 .end = 0xfffe4326, 329 .end = 0xfffe4326,
333 .flags = IORESOURCE_MEM, 330 .flags = IORESOURCE_MEM,
@@ -349,16 +346,13 @@ static struct platform_device mtu2_0_device = {
349}; 346};
350 347
351static struct sh_timer_config mtu2_1_platform_data = { 348static struct sh_timer_config mtu2_1_platform_data = {
352 .name = "MTU2_1",
353 .channel_offset = -0x100, 349 .channel_offset = -0x100,
354 .timer_bit = 1, 350 .timer_bit = 1,
355 .clk = "peripheral_clk",
356 .clockevent_rating = 200, 351 .clockevent_rating = 200,
357}; 352};
358 353
359static struct resource mtu2_1_resources[] = { 354static struct resource mtu2_1_resources[] = {
360 [0] = { 355 [0] = {
361 .name = "MTU2_1",
362 .start = 0xfffe4380, 356 .start = 0xfffe4380,
363 .end = 0xfffe4390, 357 .end = 0xfffe4390,
364 .flags = IORESOURCE_MEM, 358 .flags = IORESOURCE_MEM,
@@ -380,16 +374,13 @@ static struct platform_device mtu2_1_device = {
380}; 374};
381 375
382static struct sh_timer_config mtu2_2_platform_data = { 376static struct sh_timer_config mtu2_2_platform_data = {
383 .name = "MTU2_2",
384 .channel_offset = 0x80, 377 .channel_offset = 0x80,
385 .timer_bit = 2, 378 .timer_bit = 2,
386 .clk = "peripheral_clk",
387 .clockevent_rating = 200, 379 .clockevent_rating = 200,
388}; 380};
389 381
390static struct resource mtu2_2_resources[] = { 382static struct resource mtu2_2_resources[] = {
391 [0] = { 383 [0] = {
392 .name = "MTU2_2",
393 .start = 0xfffe4000, 384 .start = 0xfffe4000,
394 .end = 0xfffe400a, 385 .end = 0xfffe400a,
395 .flags = IORESOURCE_MEM, 386 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index 3136966cc9b3..832f401b5860 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -234,17 +234,14 @@ static struct platform_device scif3_device = {
234}; 234};
235 235
236static struct sh_timer_config cmt0_platform_data = { 236static struct sh_timer_config cmt0_platform_data = {
237 .name = "CMT0",
238 .channel_offset = 0x02, 237 .channel_offset = 0x02,
239 .timer_bit = 0, 238 .timer_bit = 0,
240 .clk = "peripheral_clk",
241 .clockevent_rating = 125, 239 .clockevent_rating = 125,
242 .clocksource_rating = 0, /* disabled due to code generation issues */ 240 .clocksource_rating = 0, /* disabled due to code generation issues */
243}; 241};
244 242
245static struct resource cmt0_resources[] = { 243static struct resource cmt0_resources[] = {
246 [0] = { 244 [0] = {
247 .name = "CMT0",
248 .start = 0xfffec002, 245 .start = 0xfffec002,
249 .end = 0xfffec007, 246 .end = 0xfffec007,
250 .flags = IORESOURCE_MEM, 247 .flags = IORESOURCE_MEM,
@@ -266,17 +263,14 @@ static struct platform_device cmt0_device = {
266}; 263};
267 264
268static struct sh_timer_config cmt1_platform_data = { 265static struct sh_timer_config cmt1_platform_data = {
269 .name = "CMT1",
270 .channel_offset = 0x08, 266 .channel_offset = 0x08,
271 .timer_bit = 1, 267 .timer_bit = 1,
272 .clk = "peripheral_clk",
273 .clockevent_rating = 125, 268 .clockevent_rating = 125,
274 .clocksource_rating = 0, /* disabled due to code generation issues */ 269 .clocksource_rating = 0, /* disabled due to code generation issues */
275}; 270};
276 271
277static struct resource cmt1_resources[] = { 272static struct resource cmt1_resources[] = {
278 [0] = { 273 [0] = {
279 .name = "CMT1",
280 .start = 0xfffec008, 274 .start = 0xfffec008,
281 .end = 0xfffec00d, 275 .end = 0xfffec00d,
282 .flags = IORESOURCE_MEM, 276 .flags = IORESOURCE_MEM,
@@ -298,16 +292,13 @@ static struct platform_device cmt1_device = {
298}; 292};
299 293
300static struct sh_timer_config mtu2_0_platform_data = { 294static struct sh_timer_config mtu2_0_platform_data = {
301 .name = "MTU2_0",
302 .channel_offset = -0x80, 295 .channel_offset = -0x80,
303 .timer_bit = 0, 296 .timer_bit = 0,
304 .clk = "peripheral_clk",
305 .clockevent_rating = 200, 297 .clockevent_rating = 200,
306}; 298};
307 299
308static struct resource mtu2_0_resources[] = { 300static struct resource mtu2_0_resources[] = {
309 [0] = { 301 [0] = {
310 .name = "MTU2_0",
311 .start = 0xfffe4300, 302 .start = 0xfffe4300,
312 .end = 0xfffe4326, 303 .end = 0xfffe4326,
313 .flags = IORESOURCE_MEM, 304 .flags = IORESOURCE_MEM,
@@ -329,16 +320,13 @@ static struct platform_device mtu2_0_device = {
329}; 320};
330 321
331static struct sh_timer_config mtu2_1_platform_data = { 322static struct sh_timer_config mtu2_1_platform_data = {
332 .name = "MTU2_1",
333 .channel_offset = -0x100, 323 .channel_offset = -0x100,
334 .timer_bit = 1, 324 .timer_bit = 1,
335 .clk = "peripheral_clk",
336 .clockevent_rating = 200, 325 .clockevent_rating = 200,
337}; 326};
338 327
339static struct resource mtu2_1_resources[] = { 328static struct resource mtu2_1_resources[] = {
340 [0] = { 329 [0] = {
341 .name = "MTU2_1",
342 .start = 0xfffe4380, 330 .start = 0xfffe4380,
343 .end = 0xfffe4390, 331 .end = 0xfffe4390,
344 .flags = IORESOURCE_MEM, 332 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index 064873585a8b..dc47b04e1049 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -194,17 +194,14 @@ static struct platform_device scif3_device = {
194}; 194};
195 195
196static struct sh_timer_config cmt0_platform_data = { 196static struct sh_timer_config cmt0_platform_data = {
197 .name = "CMT0",
198 .channel_offset = 0x02, 197 .channel_offset = 0x02,
199 .timer_bit = 0, 198 .timer_bit = 0,
200 .clk = "peripheral_clk",
201 .clockevent_rating = 125, 199 .clockevent_rating = 125,
202 .clocksource_rating = 0, /* disabled due to code generation issues */ 200 .clocksource_rating = 0, /* disabled due to code generation issues */
203}; 201};
204 202
205static struct resource cmt0_resources[] = { 203static struct resource cmt0_resources[] = {
206 [0] = { 204 [0] = {
207 .name = "CMT0",
208 .start = 0xfffec002, 205 .start = 0xfffec002,
209 .end = 0xfffec007, 206 .end = 0xfffec007,
210 .flags = IORESOURCE_MEM, 207 .flags = IORESOURCE_MEM,
@@ -226,17 +223,14 @@ static struct platform_device cmt0_device = {
226}; 223};
227 224
228static struct sh_timer_config cmt1_platform_data = { 225static struct sh_timer_config cmt1_platform_data = {
229 .name = "CMT1",
230 .channel_offset = 0x08, 226 .channel_offset = 0x08,
231 .timer_bit = 1, 227 .timer_bit = 1,
232 .clk = "peripheral_clk",
233 .clockevent_rating = 125, 228 .clockevent_rating = 125,
234 .clocksource_rating = 0, /* disabled due to code generation issues */ 229 .clocksource_rating = 0, /* disabled due to code generation issues */
235}; 230};
236 231
237static struct resource cmt1_resources[] = { 232static struct resource cmt1_resources[] = {
238 [0] = { 233 [0] = {
239 .name = "CMT1",
240 .start = 0xfffec008, 234 .start = 0xfffec008,
241 .end = 0xfffec00d, 235 .end = 0xfffec00d,
242 .flags = IORESOURCE_MEM, 236 .flags = IORESOURCE_MEM,
@@ -258,16 +252,13 @@ static struct platform_device cmt1_device = {
258}; 252};
259 253
260static struct sh_timer_config mtu2_0_platform_data = { 254static struct sh_timer_config mtu2_0_platform_data = {
261 .name = "MTU2_0",
262 .channel_offset = -0x80, 255 .channel_offset = -0x80,
263 .timer_bit = 0, 256 .timer_bit = 0,
264 .clk = "peripheral_clk",
265 .clockevent_rating = 200, 257 .clockevent_rating = 200,
266}; 258};
267 259
268static struct resource mtu2_0_resources[] = { 260static struct resource mtu2_0_resources[] = {
269 [0] = { 261 [0] = {
270 .name = "MTU2_0",
271 .start = 0xfffe4300, 262 .start = 0xfffe4300,
272 .end = 0xfffe4326, 263 .end = 0xfffe4326,
273 .flags = IORESOURCE_MEM, 264 .flags = IORESOURCE_MEM,
@@ -289,16 +280,13 @@ static struct platform_device mtu2_0_device = {
289}; 280};
290 281
291static struct sh_timer_config mtu2_1_platform_data = { 282static struct sh_timer_config mtu2_1_platform_data = {
292 .name = "MTU2_1",
293 .channel_offset = -0x100, 283 .channel_offset = -0x100,
294 .timer_bit = 1, 284 .timer_bit = 1,
295 .clk = "peripheral_clk",
296 .clockevent_rating = 200, 285 .clockevent_rating = 200,
297}; 286};
298 287
299static struct resource mtu2_1_resources[] = { 288static struct resource mtu2_1_resources[] = {
300 [0] = { 289 [0] = {
301 .name = "MTU2_1",
302 .start = 0xfffe4380, 290 .start = 0xfffe4380,
303 .end = 0xfffe4390, 291 .end = 0xfffe4390,
304 .flags = IORESOURCE_MEM, 292 .flags = IORESOURCE_MEM,
@@ -320,16 +308,13 @@ static struct platform_device mtu2_1_device = {
320}; 308};
321 309
322static struct sh_timer_config mtu2_2_platform_data = { 310static struct sh_timer_config mtu2_2_platform_data = {
323 .name = "MTU2_2",
324 .channel_offset = 0x80, 311 .channel_offset = 0x80,
325 .timer_bit = 2, 312 .timer_bit = 2,
326 .clk = "peripheral_clk",
327 .clockevent_rating = 200, 313 .clockevent_rating = 200,
328}; 314};
329 315
330static struct resource mtu2_2_resources[] = { 316static struct resource mtu2_2_resources[] = {
331 [0] = { 317 [0] = {
332 .name = "MTU2_2",
333 .start = 0xfffe4000, 318 .start = 0xfffe4000,
334 .end = 0xfffe400a, 319 .end = 0xfffe400a,
335 .flags = IORESOURCE_MEM, 320 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 295ec4c99e98..bf23c322e164 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,7 +16,7 @@
16#include <asm/cache.h> 16#include <asm/cache.h>
17#include <asm/io.h> 17#include <asm/io.h>
18 18
19int detect_cpu_and_cache_system(void) 19void __cpuinit cpu_probe(void)
20{ 20{
21 unsigned long addr0, addr1, data0, data1, data2, data3; 21 unsigned long addr0, addr1, data0, data1, data2, data3;
22 22
@@ -108,6 +108,4 @@ int detect_cpu_and_cache_system(void)
108 boot_cpu_data.icache = boot_cpu_data.dcache; 108 boot_cpu_data.icache = boot_cpu_data.dcache;
109 109
110 boot_cpu_data.family = CPU_FAMILY_SH3; 110 boot_cpu_data.family = CPU_FAMILY_SH3;
111
112 return 0;
113} 111}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 7b892d60e3a0..baadd7f54d94 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -124,16 +124,13 @@ static struct platform_device rtc_device = {
124}; 124};
125 125
126static struct sh_timer_config tmu0_platform_data = { 126static struct sh_timer_config tmu0_platform_data = {
127 .name = "TMU0",
128 .channel_offset = 0x02, 127 .channel_offset = 0x02,
129 .timer_bit = 0, 128 .timer_bit = 0,
130 .clk = "peripheral_clk",
131 .clockevent_rating = 200, 129 .clockevent_rating = 200,
132}; 130};
133 131
134static struct resource tmu0_resources[] = { 132static struct resource tmu0_resources[] = {
135 [0] = { 133 [0] = {
136 .name = "TMU0",
137 .start = 0xfffffe94, 134 .start = 0xfffffe94,
138 .end = 0xfffffe9f, 135 .end = 0xfffffe9f,
139 .flags = IORESOURCE_MEM, 136 .flags = IORESOURCE_MEM,
@@ -155,16 +152,13 @@ static struct platform_device tmu0_device = {
155}; 152};
156 153
157static struct sh_timer_config tmu1_platform_data = { 154static struct sh_timer_config tmu1_platform_data = {
158 .name = "TMU1",
159 .channel_offset = 0xe, 155 .channel_offset = 0xe,
160 .timer_bit = 1, 156 .timer_bit = 1,
161 .clk = "peripheral_clk",
162 .clocksource_rating = 200, 157 .clocksource_rating = 200,
163}; 158};
164 159
165static struct resource tmu1_resources[] = { 160static struct resource tmu1_resources[] = {
166 [0] = { 161 [0] = {
167 .name = "TMU1",
168 .start = 0xfffffea0, 162 .start = 0xfffffea0,
169 .end = 0xfffffeab, 163 .end = 0xfffffeab,
170 .flags = IORESOURCE_MEM, 164 .flags = IORESOURCE_MEM,
@@ -186,15 +180,12 @@ static struct platform_device tmu1_device = {
186}; 180};
187 181
188static struct sh_timer_config tmu2_platform_data = { 182static struct sh_timer_config tmu2_platform_data = {
189 .name = "TMU2",
190 .channel_offset = 0x1a, 183 .channel_offset = 0x1a,
191 .timer_bit = 2, 184 .timer_bit = 2,
192 .clk = "peripheral_clk",
193}; 185};
194 186
195static struct resource tmu2_resources[] = { 187static struct resource tmu2_resources[] = {
196 [0] = { 188 [0] = {
197 .name = "TMU2",
198 .start = 0xfffffeac, 189 .start = 0xfffffeac,
199 .end = 0xfffffebb, 190 .end = 0xfffffebb,
200 .flags = IORESOURCE_MEM, 191 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index bc0c4f68c7c7..3cf8c8ef7b32 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -157,16 +157,13 @@ static struct platform_device scif2_device = {
157#endif 157#endif
158 158
159static struct sh_timer_config tmu0_platform_data = { 159static struct sh_timer_config tmu0_platform_data = {
160 .name = "TMU0",
161 .channel_offset = 0x02, 160 .channel_offset = 0x02,
162 .timer_bit = 0, 161 .timer_bit = 0,
163 .clk = "peripheral_clk",
164 .clockevent_rating = 200, 162 .clockevent_rating = 200,
165}; 163};
166 164
167static struct resource tmu0_resources[] = { 165static struct resource tmu0_resources[] = {
168 [0] = { 166 [0] = {
169 .name = "TMU0",
170 .start = 0xfffffe94, 167 .start = 0xfffffe94,
171 .end = 0xfffffe9f, 168 .end = 0xfffffe9f,
172 .flags = IORESOURCE_MEM, 169 .flags = IORESOURCE_MEM,
@@ -188,16 +185,13 @@ static struct platform_device tmu0_device = {
188}; 185};
189 186
190static struct sh_timer_config tmu1_platform_data = { 187static struct sh_timer_config tmu1_platform_data = {
191 .name = "TMU1",
192 .channel_offset = 0xe, 188 .channel_offset = 0xe,
193 .timer_bit = 1, 189 .timer_bit = 1,
194 .clk = "peripheral_clk",
195 .clocksource_rating = 200, 190 .clocksource_rating = 200,
196}; 191};
197 192
198static struct resource tmu1_resources[] = { 193static struct resource tmu1_resources[] = {
199 [0] = { 194 [0] = {
200 .name = "TMU1",
201 .start = 0xfffffea0, 195 .start = 0xfffffea0,
202 .end = 0xfffffeab, 196 .end = 0xfffffeab,
203 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
@@ -219,15 +213,12 @@ static struct platform_device tmu1_device = {
219}; 213};
220 214
221static struct sh_timer_config tmu2_platform_data = { 215static struct sh_timer_config tmu2_platform_data = {
222 .name = "TMU2",
223 .channel_offset = 0x1a, 216 .channel_offset = 0x1a,
224 .timer_bit = 2, 217 .timer_bit = 2,
225 .clk = "peripheral_clk",
226}; 218};
227 219
228static struct resource tmu2_resources[] = { 220static struct resource tmu2_resources[] = {
229 [0] = { 221 [0] = {
230 .name = "TMU2",
231 .start = 0xfffffeac, 222 .start = 0xfffffeac,
232 .end = 0xfffffebb, 223 .end = 0xfffffebb,
233 .flags = IORESOURCE_MEM, 224 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 0845a3ad006d..b0c2fb4ab479 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -127,16 +127,13 @@ static struct platform_device scif1_device = {
127}; 127};
128 128
129static struct sh_timer_config tmu0_platform_data = { 129static struct sh_timer_config tmu0_platform_data = {
130 .name = "TMU0",
131 .channel_offset = 0x02, 130 .channel_offset = 0x02,
132 .timer_bit = 0, 131 .timer_bit = 0,
133 .clk = "peripheral_clk",
134 .clockevent_rating = 200, 132 .clockevent_rating = 200,
135}; 133};
136 134
137static struct resource tmu0_resources[] = { 135static struct resource tmu0_resources[] = {
138 [0] = { 136 [0] = {
139 .name = "TMU0",
140 .start = 0xa412fe94, 137 .start = 0xa412fe94,
141 .end = 0xa412fe9f, 138 .end = 0xa412fe9f,
142 .flags = IORESOURCE_MEM, 139 .flags = IORESOURCE_MEM,
@@ -158,16 +155,13 @@ static struct platform_device tmu0_device = {
158}; 155};
159 156
160static struct sh_timer_config tmu1_platform_data = { 157static struct sh_timer_config tmu1_platform_data = {
161 .name = "TMU1",
162 .channel_offset = 0xe, 158 .channel_offset = 0xe,
163 .timer_bit = 1, 159 .timer_bit = 1,
164 .clk = "peripheral_clk",
165 .clocksource_rating = 200, 160 .clocksource_rating = 200,
166}; 161};
167 162
168static struct resource tmu1_resources[] = { 163static struct resource tmu1_resources[] = {
169 [0] = { 164 [0] = {
170 .name = "TMU1",
171 .start = 0xa412fea0, 165 .start = 0xa412fea0,
172 .end = 0xa412feab, 166 .end = 0xa412feab,
173 .flags = IORESOURCE_MEM, 167 .flags = IORESOURCE_MEM,
@@ -189,15 +183,12 @@ static struct platform_device tmu1_device = {
189}; 183};
190 184
191static struct sh_timer_config tmu2_platform_data = { 185static struct sh_timer_config tmu2_platform_data = {
192 .name = "TMU2",
193 .channel_offset = 0x1a, 186 .channel_offset = 0x1a,
194 .timer_bit = 2, 187 .timer_bit = 2,
195 .clk = "peripheral_clk",
196}; 188};
197 189
198static struct resource tmu2_resources[] = { 190static struct resource tmu2_resources[] = {
199 [0] = { 191 [0] = {
200 .name = "TMU2",
201 .start = 0xa412feac, 192 .start = 0xa412feac,
202 .end = 0xa412feb5, 193 .end = 0xa412feb5,
203 .flags = IORESOURCE_MEM, 194 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index a718a6231091..24b17135d5d2 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -130,17 +130,14 @@ static struct platform_device usbf_device = {
130}; 130};
131 131
132static struct sh_timer_config cmt0_platform_data = { 132static struct sh_timer_config cmt0_platform_data = {
133 .name = "CMT0",
134 .channel_offset = 0x10, 133 .channel_offset = 0x10,
135 .timer_bit = 0, 134 .timer_bit = 0,
136 .clk = "peripheral_clk",
137 .clockevent_rating = 125, 135 .clockevent_rating = 125,
138 .clocksource_rating = 125, 136 .clocksource_rating = 125,
139}; 137};
140 138
141static struct resource cmt0_resources[] = { 139static struct resource cmt0_resources[] = {
142 [0] = { 140 [0] = {
143 .name = "CMT0",
144 .start = 0x044a0010, 141 .start = 0x044a0010,
145 .end = 0x044a001b, 142 .end = 0x044a001b,
146 .flags = IORESOURCE_MEM, 143 .flags = IORESOURCE_MEM,
@@ -162,15 +159,12 @@ static struct platform_device cmt0_device = {
162}; 159};
163 160
164static struct sh_timer_config cmt1_platform_data = { 161static struct sh_timer_config cmt1_platform_data = {
165 .name = "CMT1",
166 .channel_offset = 0x20, 162 .channel_offset = 0x20,
167 .timer_bit = 1, 163 .timer_bit = 1,
168 .clk = "peripheral_clk",
169}; 164};
170 165
171static struct resource cmt1_resources[] = { 166static struct resource cmt1_resources[] = {
172 [0] = { 167 [0] = {
173 .name = "CMT1",
174 .start = 0x044a0020, 168 .start = 0x044a0020,
175 .end = 0x044a002b, 169 .end = 0x044a002b,
176 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
@@ -192,15 +186,12 @@ static struct platform_device cmt1_device = {
192}; 186};
193 187
194static struct sh_timer_config cmt2_platform_data = { 188static struct sh_timer_config cmt2_platform_data = {
195 .name = "CMT2",
196 .channel_offset = 0x30, 189 .channel_offset = 0x30,
197 .timer_bit = 2, 190 .timer_bit = 2,
198 .clk = "peripheral_clk",
199}; 191};
200 192
201static struct resource cmt2_resources[] = { 193static struct resource cmt2_resources[] = {
202 [0] = { 194 [0] = {
203 .name = "CMT2",
204 .start = 0x044a0030, 195 .start = 0x044a0030,
205 .end = 0x044a003b, 196 .end = 0x044a003b,
206 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
@@ -222,15 +213,12 @@ static struct platform_device cmt2_device = {
222}; 213};
223 214
224static struct sh_timer_config cmt3_platform_data = { 215static struct sh_timer_config cmt3_platform_data = {
225 .name = "CMT3",
226 .channel_offset = 0x40, 216 .channel_offset = 0x40,
227 .timer_bit = 3, 217 .timer_bit = 3,
228 .clk = "peripheral_clk",
229}; 218};
230 219
231static struct resource cmt3_resources[] = { 220static struct resource cmt3_resources[] = {
232 [0] = { 221 [0] = {
233 .name = "CMT3",
234 .start = 0x044a0040, 222 .start = 0x044a0040,
235 .end = 0x044a004b, 223 .end = 0x044a004b,
236 .flags = IORESOURCE_MEM, 224 .flags = IORESOURCE_MEM,
@@ -252,15 +240,12 @@ static struct platform_device cmt3_device = {
252}; 240};
253 241
254static struct sh_timer_config cmt4_platform_data = { 242static struct sh_timer_config cmt4_platform_data = {
255 .name = "CMT4",
256 .channel_offset = 0x50, 243 .channel_offset = 0x50,
257 .timer_bit = 4, 244 .timer_bit = 4,
258 .clk = "peripheral_clk",
259}; 245};
260 246
261static struct resource cmt4_resources[] = { 247static struct resource cmt4_resources[] = {
262 [0] = { 248 [0] = {
263 .name = "CMT4",
264 .start = 0x044a0050, 249 .start = 0x044a0050,
265 .end = 0x044a005b, 250 .end = 0x044a005b,
266 .flags = IORESOURCE_MEM, 251 .flags = IORESOURCE_MEM,
@@ -282,16 +267,13 @@ static struct platform_device cmt4_device = {
282}; 267};
283 268
284static struct sh_timer_config tmu0_platform_data = { 269static struct sh_timer_config tmu0_platform_data = {
285 .name = "TMU0",
286 .channel_offset = 0x02, 270 .channel_offset = 0x02,
287 .timer_bit = 0, 271 .timer_bit = 0,
288 .clk = "peripheral_clk",
289 .clockevent_rating = 200, 272 .clockevent_rating = 200,
290}; 273};
291 274
292static struct resource tmu0_resources[] = { 275static struct resource tmu0_resources[] = {
293 [0] = { 276 [0] = {
294 .name = "TMU0",
295 .start = 0xa412fe94, 277 .start = 0xa412fe94,
296 .end = 0xa412fe9f, 278 .end = 0xa412fe9f,
297 .flags = IORESOURCE_MEM, 279 .flags = IORESOURCE_MEM,
@@ -313,16 +295,13 @@ static struct platform_device tmu0_device = {
313}; 295};
314 296
315static struct sh_timer_config tmu1_platform_data = { 297static struct sh_timer_config tmu1_platform_data = {
316 .name = "TMU1",
317 .channel_offset = 0xe, 298 .channel_offset = 0xe,
318 .timer_bit = 1, 299 .timer_bit = 1,
319 .clk = "peripheral_clk",
320 .clocksource_rating = 200, 300 .clocksource_rating = 200,
321}; 301};
322 302
323static struct resource tmu1_resources[] = { 303static struct resource tmu1_resources[] = {
324 [0] = { 304 [0] = {
325 .name = "TMU1",
326 .start = 0xa412fea0, 305 .start = 0xa412fea0,
327 .end = 0xa412feab, 306 .end = 0xa412feab,
328 .flags = IORESOURCE_MEM, 307 .flags = IORESOURCE_MEM,
@@ -344,15 +323,12 @@ static struct platform_device tmu1_device = {
344}; 323};
345 324
346static struct sh_timer_config tmu2_platform_data = { 325static struct sh_timer_config tmu2_platform_data = {
347 .name = "TMU2",
348 .channel_offset = 0x1a, 326 .channel_offset = 0x1a,
349 .timer_bit = 2, 327 .timer_bit = 2,
350 .clk = "peripheral_clk",
351}; 328};
352 329
353static struct resource tmu2_resources[] = { 330static struct resource tmu2_resources[] = {
354 [0] = { 331 [0] = {
355 .name = "TMU2",
356 .start = 0xa412feac, 332 .start = 0xa412feac,
357 .end = 0xa412feb5, 333 .end = 0xa412feb5,
358 .flags = IORESOURCE_MEM, 334 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 6b80850294da..4eabc68cd753 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -12,9 +12,10 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/err.h> 14#include <linux/err.h>
15#include <linux/io.h>
16#include <asm/clkdev.h>
15#include <asm/clock.h> 17#include <asm/clock.h>
16#include <asm/freq.h> 18#include <asm/freq.h>
17#include <asm/io.h>
18 19
19#define CPG2_FRQCR3 0xfe0a0018 20#define CPG2_FRQCR3 0xfe0a0018
20 21
@@ -45,7 +46,6 @@ static struct clk_ops sh4202_emi_clk_ops = {
45}; 46};
46 47
47static struct clk sh4202_emi_clk = { 48static struct clk sh4202_emi_clk = {
48 .name = "emi_clk",
49 .flags = CLK_ENABLE_ON_INIT, 49 .flags = CLK_ENABLE_ON_INIT,
50 .ops = &sh4202_emi_clk_ops, 50 .ops = &sh4202_emi_clk_ops,
51}; 51};
@@ -61,7 +61,6 @@ static struct clk_ops sh4202_femi_clk_ops = {
61}; 61};
62 62
63static struct clk sh4202_femi_clk = { 63static struct clk sh4202_femi_clk = {
64 .name = "femi_clk",
65 .flags = CLK_ENABLE_ON_INIT, 64 .flags = CLK_ENABLE_ON_INIT,
66 .ops = &sh4202_femi_clk_ops, 65 .ops = &sh4202_femi_clk_ops,
67}; 66};
@@ -139,7 +138,6 @@ static struct clk_ops sh4202_shoc_clk_ops = {
139}; 138};
140 139
141static struct clk sh4202_shoc_clk = { 140static struct clk sh4202_shoc_clk = {
142 .name = "shoc_clk",
143 .flags = CLK_ENABLE_ON_INIT, 141 .flags = CLK_ENABLE_ON_INIT,
144 .ops = &sh4202_shoc_clk_ops, 142 .ops = &sh4202_shoc_clk_ops,
145}; 143};
@@ -150,6 +148,15 @@ static struct clk *sh4202_onchip_clocks[] = {
150 &sh4202_shoc_clk, 148 &sh4202_shoc_clk,
151}; 149};
152 150
151#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
152
153static struct clk_lookup lookups[] = {
154 /* main clocks */
155 CLKDEV_CON_ID("emi_clk", &sh4202_emi_clk),
156 CLKDEV_CON_ID("femi_clk", &sh4202_femi_clk),
157 CLKDEV_CON_ID("shoc_clk", &sh4202_shoc_clk),
158};
159
153int __init arch_clk_init(void) 160int __init arch_clk_init(void)
154{ 161{
155 struct clk *clk; 162 struct clk *clk;
@@ -167,5 +174,7 @@ int __init arch_clk_init(void)
167 174
168 clk_put(clk); 175 clk_put(clk);
169 176
177 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
178
170 return ret; 179 return ret;
171} 180}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 822977a06d84..d180f16281ed 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -15,7 +15,7 @@
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/cache.h> 16#include <asm/cache.h>
17 17
18int __init detect_cpu_and_cache_system(void) 18void __cpuinit cpu_probe(void)
19{ 19{
20 unsigned long pvr, prr, cvr; 20 unsigned long pvr, prr, cvr;
21 unsigned long size; 21 unsigned long size;
@@ -251,6 +251,4 @@ int __init detect_cpu_and_cache_system(void)
251 boot_cpu_data.scache.linesz); 251 boot_cpu_data.scache.linesz);
252 } 252 }
253 } 253 }
254
255 return 0;
256} 254}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index b9b7e10ad68f..e916b18e1f7c 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -31,16 +31,13 @@ static struct platform_device scif0_device = {
31}; 31};
32 32
33static struct sh_timer_config tmu0_platform_data = { 33static struct sh_timer_config tmu0_platform_data = {
34 .name = "TMU0",
35 .channel_offset = 0x04, 34 .channel_offset = 0x04,
36 .timer_bit = 0, 35 .timer_bit = 0,
37 .clk = "peripheral_clk",
38 .clockevent_rating = 200, 36 .clockevent_rating = 200,
39}; 37};
40 38
41static struct resource tmu0_resources[] = { 39static struct resource tmu0_resources[] = {
42 [0] = { 40 [0] = {
43 .name = "TMU0",
44 .start = 0xffd80008, 41 .start = 0xffd80008,
45 .end = 0xffd80013, 42 .end = 0xffd80013,
46 .flags = IORESOURCE_MEM, 43 .flags = IORESOURCE_MEM,
@@ -62,16 +59,13 @@ static struct platform_device tmu0_device = {
62}; 59};
63 60
64static struct sh_timer_config tmu1_platform_data = { 61static struct sh_timer_config tmu1_platform_data = {
65 .name = "TMU1",
66 .channel_offset = 0x10, 62 .channel_offset = 0x10,
67 .timer_bit = 1, 63 .timer_bit = 1,
68 .clk = "peripheral_clk",
69 .clocksource_rating = 200, 64 .clocksource_rating = 200,
70}; 65};
71 66
72static struct resource tmu1_resources[] = { 67static struct resource tmu1_resources[] = {
73 [0] = { 68 [0] = {
74 .name = "TMU1",
75 .start = 0xffd80014, 69 .start = 0xffd80014,
76 .end = 0xffd8001f, 70 .end = 0xffd8001f,
77 .flags = IORESOURCE_MEM, 71 .flags = IORESOURCE_MEM,
@@ -93,15 +87,12 @@ static struct platform_device tmu1_device = {
93}; 87};
94 88
95static struct sh_timer_config tmu2_platform_data = { 89static struct sh_timer_config tmu2_platform_data = {
96 .name = "TMU2",
97 .channel_offset = 0x1c, 90 .channel_offset = 0x1c,
98 .timer_bit = 2, 91 .timer_bit = 2,
99 .clk = "peripheral_clk",
100}; 92};
101 93
102static struct resource tmu2_resources[] = { 94static struct resource tmu2_resources[] = {
103 [0] = { 95 [0] = {
104 .name = "TMU2",
105 .start = 0xffd80020, 96 .start = 0xffd80020,
106 .end = 0xffd8002f, 97 .end = 0xffd8002f,
107 .flags = IORESOURCE_MEM, 98 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index ffd79e57254f..911d196e86b5 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -66,16 +66,13 @@ static struct platform_device scif1_device = {
66}; 66};
67 67
68static struct sh_timer_config tmu0_platform_data = { 68static struct sh_timer_config tmu0_platform_data = {
69 .name = "TMU0",
70 .channel_offset = 0x04, 69 .channel_offset = 0x04,
71 .timer_bit = 0, 70 .timer_bit = 0,
72 .clk = "peripheral_clk",
73 .clockevent_rating = 200, 71 .clockevent_rating = 200,
74}; 72};
75 73
76static struct resource tmu0_resources[] = { 74static struct resource tmu0_resources[] = {
77 [0] = { 75 [0] = {
78 .name = "TMU0",
79 .start = 0xffd80008, 76 .start = 0xffd80008,
80 .end = 0xffd80013, 77 .end = 0xffd80013,
81 .flags = IORESOURCE_MEM, 78 .flags = IORESOURCE_MEM,
@@ -97,16 +94,13 @@ static struct platform_device tmu0_device = {
97}; 94};
98 95
99static struct sh_timer_config tmu1_platform_data = { 96static struct sh_timer_config tmu1_platform_data = {
100 .name = "TMU1",
101 .channel_offset = 0x10, 97 .channel_offset = 0x10,
102 .timer_bit = 1, 98 .timer_bit = 1,
103 .clk = "peripheral_clk",
104 .clocksource_rating = 200, 99 .clocksource_rating = 200,
105}; 100};
106 101
107static struct resource tmu1_resources[] = { 102static struct resource tmu1_resources[] = {
108 [0] = { 103 [0] = {
109 .name = "TMU1",
110 .start = 0xffd80014, 104 .start = 0xffd80014,
111 .end = 0xffd8001f, 105 .end = 0xffd8001f,
112 .flags = IORESOURCE_MEM, 106 .flags = IORESOURCE_MEM,
@@ -128,15 +122,12 @@ static struct platform_device tmu1_device = {
128}; 122};
129 123
130static struct sh_timer_config tmu2_platform_data = { 124static struct sh_timer_config tmu2_platform_data = {
131 .name = "TMU2",
132 .channel_offset = 0x1c, 125 .channel_offset = 0x1c,
133 .timer_bit = 2, 126 .timer_bit = 2,
134 .clk = "peripheral_clk",
135}; 127};
136 128
137static struct resource tmu2_resources[] = { 129static struct resource tmu2_resources[] = {
138 [0] = { 130 [0] = {
139 .name = "TMU2",
140 .start = 0xffd80020, 131 .start = 0xffd80020,
141 .end = 0xffd8002f, 132 .end = 0xffd8002f,
142 .flags = IORESOURCE_MEM, 133 .flags = IORESOURCE_MEM,
@@ -163,15 +154,12 @@ static struct platform_device tmu2_device = {
163 defined(CONFIG_CPU_SUBTYPE_SH7751R) 154 defined(CONFIG_CPU_SUBTYPE_SH7751R)
164 155
165static struct sh_timer_config tmu3_platform_data = { 156static struct sh_timer_config tmu3_platform_data = {
166 .name = "TMU3",
167 .channel_offset = 0x04, 157 .channel_offset = 0x04,
168 .timer_bit = 0, 158 .timer_bit = 0,
169 .clk = "peripheral_clk",
170}; 159};
171 160
172static struct resource tmu3_resources[] = { 161static struct resource tmu3_resources[] = {
173 [0] = { 162 [0] = {
174 .name = "TMU3",
175 .start = 0xfe100008, 163 .start = 0xfe100008,
176 .end = 0xfe100013, 164 .end = 0xfe100013,
177 .flags = IORESOURCE_MEM, 165 .flags = IORESOURCE_MEM,
@@ -193,15 +181,12 @@ static struct platform_device tmu3_device = {
193}; 181};
194 182
195static struct sh_timer_config tmu4_platform_data = { 183static struct sh_timer_config tmu4_platform_data = {
196 .name = "TMU4",
197 .channel_offset = 0x10, 184 .channel_offset = 0x10,
198 .timer_bit = 1, 185 .timer_bit = 1,
199 .clk = "peripheral_clk",
200}; 186};
201 187
202static struct resource tmu4_resources[] = { 188static struct resource tmu4_resources[] = {
203 [0] = { 189 [0] = {
204 .name = "TMU4",
205 .start = 0xfe100014, 190 .start = 0xfe100014,
206 .end = 0xfe10001f, 191 .end = 0xfe10001f,
207 .flags = IORESOURCE_MEM, 192 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index a16eb3656f4b..48ea8fe85dc5 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -187,16 +187,13 @@ static struct platform_device scif3_device = {
187}; 187};
188 188
189static struct sh_timer_config tmu0_platform_data = { 189static struct sh_timer_config tmu0_platform_data = {
190 .name = "TMU0",
191 .channel_offset = 0x04, 190 .channel_offset = 0x04,
192 .timer_bit = 0, 191 .timer_bit = 0,
193 .clk = "peripheral_clk",
194 .clockevent_rating = 200, 192 .clockevent_rating = 200,
195}; 193};
196 194
197static struct resource tmu0_resources[] = { 195static struct resource tmu0_resources[] = {
198 [0] = { 196 [0] = {
199 .name = "TMU0",
200 .start = 0xffd80008, 197 .start = 0xffd80008,
201 .end = 0xffd80013, 198 .end = 0xffd80013,
202 .flags = IORESOURCE_MEM, 199 .flags = IORESOURCE_MEM,
@@ -218,16 +215,13 @@ static struct platform_device tmu0_device = {
218}; 215};
219 216
220static struct sh_timer_config tmu1_platform_data = { 217static struct sh_timer_config tmu1_platform_data = {
221 .name = "TMU1",
222 .channel_offset = 0x10, 218 .channel_offset = 0x10,
223 .timer_bit = 1, 219 .timer_bit = 1,
224 .clk = "peripheral_clk",
225 .clocksource_rating = 200, 220 .clocksource_rating = 200,
226}; 221};
227 222
228static struct resource tmu1_resources[] = { 223static struct resource tmu1_resources[] = {
229 [0] = { 224 [0] = {
230 .name = "TMU1",
231 .start = 0xffd80014, 225 .start = 0xffd80014,
232 .end = 0xffd8001f, 226 .end = 0xffd8001f,
233 .flags = IORESOURCE_MEM, 227 .flags = IORESOURCE_MEM,
@@ -249,15 +243,12 @@ static struct platform_device tmu1_device = {
249}; 243};
250 244
251static struct sh_timer_config tmu2_platform_data = { 245static struct sh_timer_config tmu2_platform_data = {
252 .name = "TMU2",
253 .channel_offset = 0x1c, 246 .channel_offset = 0x1c,
254 .timer_bit = 2, 247 .timer_bit = 2,
255 .clk = "peripheral_clk",
256}; 248};
257 249
258static struct resource tmu2_resources[] = { 250static struct resource tmu2_resources[] = {
259 [0] = { 251 [0] = {
260 .name = "TMU2",
261 .start = 0xffd80020, 252 .start = 0xffd80020,
262 .end = 0xffd8002f, 253 .end = 0xffd8002f,
263 .flags = IORESOURCE_MEM, 254 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 2c16df37eda6..71291ae201b9 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -21,6 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clkdev.h>
24#include <asm/clock.h> 25#include <asm/clock.h>
25 26
26/* SH7343 registers */ 27/* SH7343 registers */
@@ -36,8 +37,6 @@
36 37
37/* Fixed 32 KHz root clock for RTC and Power Management purposes */ 38/* Fixed 32 KHz root clock for RTC and Power Management purposes */
38static struct clk r_clk = { 39static struct clk r_clk = {
39 .name = "rclk",
40 .id = -1,
41 .rate = 32768, 40 .rate = 32768,
42}; 41};
43 42
@@ -46,8 +45,6 @@ static struct clk r_clk = {
46 * from the platform code. 45 * from the platform code.
47 */ 46 */
48struct clk extal_clk = { 47struct clk extal_clk = {
49 .name = "extal",
50 .id = -1,
51 .rate = 33333333, 48 .rate = 33333333,
52}; 49};
53 50
@@ -69,8 +66,6 @@ static struct clk_ops dll_clk_ops = {
69}; 66};
70 67
71static struct clk dll_clk = { 68static struct clk dll_clk = {
72 .name = "dll_clk",
73 .id = -1,
74 .ops = &dll_clk_ops, 69 .ops = &dll_clk_ops,
75 .parent = &r_clk, 70 .parent = &r_clk,
76 .flags = CLK_ENABLE_ON_INIT, 71 .flags = CLK_ENABLE_ON_INIT,
@@ -91,8 +86,6 @@ static struct clk_ops pll_clk_ops = {
91}; 86};
92 87
93static struct clk pll_clk = { 88static struct clk pll_clk = {
94 .name = "pll_clk",
95 .id = -1,
96 .ops = &pll_clk_ops, 89 .ops = &pll_clk_ops,
97 .flags = CLK_ENABLE_ON_INIT, 90 .flags = CLK_ENABLE_ON_INIT,
98}; 91};
@@ -121,72 +114,168 @@ static struct clk_div4_table div4_table = {
121enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 114enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
122 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; 115 DIV4_SIUA, DIV4_SIUB, DIV4_NR };
123 116
124#define DIV4(_str, _reg, _bit, _mask, _flags) \ 117#define DIV4(_reg, _bit, _mask, _flags) \
125 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 118 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
126 119
127struct clk div4_clks[DIV4_NR] = { 120struct clk div4_clks[DIV4_NR] = {
128 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fff, CLK_ENABLE_ON_INIT), 121 [DIV4_I] = DIV4(FRQCR, 20, 0x1fff, CLK_ENABLE_ON_INIT),
129 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT), 122 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
130 [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT), 123 [DIV4_SH] = DIV4(FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
131 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT), 124 [DIV4_B] = DIV4(FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
132 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT), 125 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
133 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0), 126 [DIV4_P] = DIV4(FRQCR, 0, 0x1fff, 0),
134 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0), 127 [DIV4_SIUA] = DIV4(SCLKACR, 0, 0x1fff, 0),
135 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), 128 [DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x1fff, 0),
136}; 129};
137 130
138struct clk div6_clks[] = { 131enum { DIV6_V, DIV6_NR };
139 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 132
133struct clk div6_clks[DIV6_NR] = {
134 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
135};
136
137#define MSTP(_parent, _reg, _bit, _flags) \
138 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
139
140enum { MSTP031, MSTP030, MSTP029, MSTP028, MSTP026,
141 MSTP023, MSTP022, MSTP021, MSTP020, MSTP019, MSTP018, MSTP017, MSTP016,
142 MSTP015, MSTP014, MSTP013, MSTP012, MSTP011, MSTP010,
143 MSTP007, MSTP006, MSTP005, MSTP004, MSTP003, MSTP002, MSTP001,
144 MSTP109, MSTP108, MSTP100,
145 MSTP225, MSTP224, MSTP218, MSTP217, MSTP216,
146 MSTP214, MSTP213, MSTP212, MSTP211, MSTP208,
147 MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
148 MSTP_NR };
149
150static struct clk mstp_clks[MSTP_NR] = {
151 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
152 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
153 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
154 [MSTP028] = MSTP(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
155 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
156 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
157 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
158 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
159 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
160 [MSTP019] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 19, 0),
161 [MSTP017] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 17, 0),
162 [MSTP015] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
163 [MSTP014] = MSTP(&r_clk, MSTPCR0, 14, 0),
164 [MSTP013] = MSTP(&r_clk, MSTPCR0, 13, 0),
165 [MSTP011] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 11, 0),
166 [MSTP010] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
167 [MSTP007] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
168 [MSTP006] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 6, 0),
169 [MSTP005] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 5, 0),
170 [MSTP004] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 4, 0),
171 [MSTP003] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 3, 0),
172 [MSTP002] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 2, 0),
173 [MSTP001] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 1, 0),
174
175 [MSTP109] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
176 [MSTP108] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 8, 0),
177
178 [MSTP225] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 25, 0),
179 [MSTP224] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 24, 0),
180 [MSTP218] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 18, 0),
181 [MSTP217] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 17, 0),
182 [MSTP216] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 16, 0),
183 [MSTP214] = MSTP(&r_clk, MSTPCR2, 14, 0),
184 [MSTP213] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 13, 0),
185 [MSTP212] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 12, 0),
186 [MSTP211] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 11, 0),
187 [MSTP208] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 8, 0),
188 [MSTP206] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT),
189 [MSTP205] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
190 [MSTP204] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
191 [MSTP203] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
192 [MSTP202] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
193 [MSTP201] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
194 [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
140}; 195};
141 196
142#define MSTP(_str, _parent, _reg, _bit, _flags) \ 197#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
143 SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags) 198
144 199static struct clk_lookup lookups[] = {
145static struct clk mstp_clks[] = { 200 /* main clocks */
146 MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT), 201 CLKDEV_CON_ID("rclk", &r_clk),
147 MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT), 202 CLKDEV_CON_ID("extal", &extal_clk),
148 MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT), 203 CLKDEV_CON_ID("dll_clk", &dll_clk),
149 MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT), 204 CLKDEV_CON_ID("pll_clk", &pll_clk),
150 MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT), 205
151 MSTP("intc3", &div4_clks[DIV4_P], MSTPCR0, 23, 0), 206 /* DIV4 clocks */
152 MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 0), 207 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
153 MSTP("dmac0", &div4_clks[DIV4_P], MSTPCR0, 21, 0), 208 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
154 MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0), 209 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
155 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0), 210 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
156 MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0), 211 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
157 MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0), 212 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
158 MSTP("cmt0", &r_clk, MSTPCR0, 14, 0), 213 CLKDEV_CON_ID("siua_clk", &div4_clks[DIV4_SIUA]),
159 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0), 214 CLKDEV_CON_ID("siub_clk", &div4_clks[DIV4_SIUB]),
160 MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0), 215
161 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0), 216 /* DIV6 clocks */
162 MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0), 217 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
163 MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0), 218
164 MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0), 219 /* MSTP32 clocks */
165 MSTP("scif3", &div4_clks[DIV4_P], MSTPCR0, 4, 0), 220 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
166 MSTP("sio0", &div4_clks[DIV4_P], MSTPCR0, 3, 0), 221 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
167 MSTP("siof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0), 222 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
168 MSTP("siof1", &div4_clks[DIV4_P], MSTPCR0, 1, 0), 223 CLKDEV_CON_ID("uram0", &mstp_clks[MSTP028]),
169 224 CLKDEV_CON_ID("xymem0", &mstp_clks[MSTP026]),
170 MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0), 225 CLKDEV_CON_ID("intc3", &mstp_clks[MSTP023]),
171 MSTP("i2c1", &div4_clks[DIV4_P], MSTPCR1, 8, 0), 226 CLKDEV_CON_ID("intc0", &mstp_clks[MSTP022]),
172 227 CLKDEV_CON_ID("dmac0", &mstp_clks[MSTP021]),
173 MSTP("tpu0", &div4_clks[DIV4_P], MSTPCR2, 25, 0), 228 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP020]),
174 MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0), 229 CLKDEV_CON_ID("hudi0", &mstp_clks[MSTP019]),
175 MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0), 230 CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
176 MSTP("mmcif0", &div4_clks[DIV4_P], MSTPCR2, 17, 0), 231 CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),
177 MSTP("sim0", &div4_clks[DIV4_P], MSTPCR2, 16, 0), 232 CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP014]),
178 MSTP("keysc0", &r_clk, MSTPCR2, 14, 0), 233 CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
179 MSTP("tsif0", &div4_clks[DIV4_P], MSTPCR2, 13, 0), 234 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
180 MSTP("s3d40", &div4_clks[DIV4_P], MSTPCR2, 12, 0), 235 CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
181 MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0), 236 {
182 MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0), 237 /* SCIF0 */
183 MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT), 238 .dev_id = "sh-sci.0",
184 MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0), 239 .con_id = "sci_fck",
185 MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0), 240 .clk = &mstp_clks[MSTP007],
186 MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0), 241 }, {
187 MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT), 242 /* SCIF1 */
188 MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT), 243 .dev_id = "sh-sci.1",
189 MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), 244 .con_id = "sci_fck",
245 .clk = &mstp_clks[MSTP006],
246 }, {
247 /* SCIF2 */
248 .dev_id = "sh-sci.2",
249 .con_id = "sci_fck",
250 .clk = &mstp_clks[MSTP005],
251 }, {
252 /* SCIF3 */
253 .dev_id = "sh-sci.3",
254 .con_id = "sci_fck",
255 .clk = &mstp_clks[MSTP004],
256 },
257 CLKDEV_CON_ID("sio0", &mstp_clks[MSTP003]),
258 CLKDEV_CON_ID("siof0", &mstp_clks[MSTP002]),
259 CLKDEV_CON_ID("siof1", &mstp_clks[MSTP001]),
260 CLKDEV_CON_ID("i2c0", &mstp_clks[MSTP109]),
261 CLKDEV_CON_ID("i2c1", &mstp_clks[MSTP108]),
262 CLKDEV_CON_ID("tpu0", &mstp_clks[MSTP225]),
263 CLKDEV_CON_ID("irda0", &mstp_clks[MSTP224]),
264 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP218]),
265 CLKDEV_CON_ID("mmcif0", &mstp_clks[MSTP217]),
266 CLKDEV_CON_ID("sim0", &mstp_clks[MSTP216]),
267 CLKDEV_CON_ID("keysc0", &mstp_clks[MSTP214]),
268 CLKDEV_CON_ID("tsif0", &mstp_clks[MSTP213]),
269 CLKDEV_CON_ID("s3d40", &mstp_clks[MSTP212]),
270 CLKDEV_CON_ID("usbf0", &mstp_clks[MSTP211]),
271 CLKDEV_CON_ID("siu0", &mstp_clks[MSTP208]),
272 CLKDEV_CON_ID("jpu0", &mstp_clks[MSTP206]),
273 CLKDEV_CON_ID("vou0", &mstp_clks[MSTP205]),
274 CLKDEV_CON_ID("beu0", &mstp_clks[MSTP204]),
275 CLKDEV_CON_ID("ceu0", &mstp_clks[MSTP203]),
276 CLKDEV_CON_ID("veu0", &mstp_clks[MSTP202]),
277 CLKDEV_CON_ID("vpu0", &mstp_clks[MSTP201]),
278 CLKDEV_CON_ID("lcdc0", &mstp_clks[MSTP200]),
190}; 279};
191 280
192int __init arch_clk_init(void) 281int __init arch_clk_init(void)
@@ -202,14 +291,16 @@ int __init arch_clk_init(void)
202 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 291 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
203 ret = clk_register(main_clks[k]); 292 ret = clk_register(main_clks[k]);
204 293
294 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
295
205 if (!ret) 296 if (!ret)
206 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 297 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
207 298
208 if (!ret) 299 if (!ret)
209 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 300 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
210 301
211 if (!ret) 302 if (!ret)
212 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 303 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
213 304
214 return ret; 305 return ret;
215} 306}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 91588d280cd8..7ce5bbcd4084 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -21,6 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clkdev.h>
24#include <asm/clock.h> 25#include <asm/clock.h>
25 26
26/* SH7366 registers */ 27/* SH7366 registers */
@@ -36,8 +37,6 @@
36 37
37/* Fixed 32 KHz root clock for RTC and Power Management purposes */ 38/* Fixed 32 KHz root clock for RTC and Power Management purposes */
38static struct clk r_clk = { 39static struct clk r_clk = {
39 .name = "rclk",
40 .id = -1,
41 .rate = 32768, 40 .rate = 32768,
42}; 41};
43 42
@@ -46,8 +45,6 @@ static struct clk r_clk = {
46 * from the platform code. 45 * from the platform code.
47 */ 46 */
48struct clk extal_clk = { 47struct clk extal_clk = {
49 .name = "extal",
50 .id = -1,
51 .rate = 33333333, 48 .rate = 33333333,
52}; 49};
53 50
@@ -69,8 +66,6 @@ static struct clk_ops dll_clk_ops = {
69}; 66};
70 67
71static struct clk dll_clk = { 68static struct clk dll_clk = {
72 .name = "dll_clk",
73 .id = -1,
74 .ops = &dll_clk_ops, 69 .ops = &dll_clk_ops,
75 .parent = &r_clk, 70 .parent = &r_clk,
76 .flags = CLK_ENABLE_ON_INIT, 71 .flags = CLK_ENABLE_ON_INIT,
@@ -94,8 +89,6 @@ static struct clk_ops pll_clk_ops = {
94}; 89};
95 90
96static struct clk pll_clk = { 91static struct clk pll_clk = {
97 .name = "pll_clk",
98 .id = -1,
99 .ops = &pll_clk_ops, 92 .ops = &pll_clk_ops,
100 .flags = CLK_ENABLE_ON_INIT, 93 .flags = CLK_ENABLE_ON_INIT,
101}; 94};
@@ -124,69 +117,154 @@ static struct clk_div4_table div4_table = {
124enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 117enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
125 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; 118 DIV4_SIUA, DIV4_SIUB, DIV4_NR };
126 119
127#define DIV4(_str, _reg, _bit, _mask, _flags) \ 120#define DIV4(_reg, _bit, _mask, _flags) \
128 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
129 122
130struct clk div4_clks[DIV4_NR] = { 123struct clk div4_clks[DIV4_NR] = {
131 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT), 124 [DIV4_I] = DIV4(FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
132 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT), 125 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
133 [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT), 126 [DIV4_SH] = DIV4(FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
134 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT), 127 [DIV4_B] = DIV4(FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
135 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT), 128 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
136 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0), 129 [DIV4_P] = DIV4(FRQCR, 0, 0x1fff, 0),
137 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0), 130 [DIV4_SIUA] = DIV4(SCLKACR, 0, 0x1fff, 0),
138 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), 131 [DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x1fff, 0),
139}; 132};
140 133
141struct clk div6_clks[] = { 134enum { DIV6_V, DIV6_NR };
142 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 135
136struct clk div6_clks[DIV6_NR] = {
137 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
143}; 138};
144 139
145#define MSTP(_str, _parent, _reg, _bit, _flags) \ 140#define MSTP(_parent, _reg, _bit, _flags) \
146 SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags) 141 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
142
143enum { MSTP031, MSTP030, MSTP029, MSTP028, MSTP026,
144 MSTP023, MSTP022, MSTP021, MSTP020, MSTP019, MSTP018, MSTP017, MSTP016,
145 MSTP015, MSTP014, MSTP013, MSTP012, MSTP011, MSTP010,
146 MSTP007, MSTP006, MSTP005, MSTP002, MSTP001,
147 MSTP109, MSTP100,
148 MSTP227, MSTP226, MSTP224, MSTP223, MSTP222, MSTP218, MSTP217,
149 MSTP211, MSTP207, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
150 MSTP_NR };
147 151
148static struct clk mstp_clks[] = { 152static struct clk mstp_clks[MSTP_NR] = {
149 /* See page 52 of Datasheet V0.40: Overview -> Block Diagram */ 153 /* See page 52 of Datasheet V0.40: Overview -> Block Diagram */
150 MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT), 154 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
151 MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT), 155 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
152 MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT), 156 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
153 MSTP("rsmem0", &div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT), 157 [MSTP028] = MSTP(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
154 MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT), 158 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
155 MSTP("intc3", &div4_clks[DIV4_P], MSTPCR0, 23, 0), 159 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
156 MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 0), 160 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
157 MSTP("dmac0", &div4_clks[DIV4_P], MSTPCR0, 21, 0), 161 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
158 MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0), 162 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
159 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0), 163 [MSTP019] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 19, 0),
160 MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0), 164 [MSTP017] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 17, 0),
161 MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0), 165 [MSTP015] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
162 MSTP("cmt0", &r_clk, MSTPCR0, 14, 0), 166 [MSTP014] = MSTP(&r_clk, MSTPCR0, 14, 0),
163 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0), 167 [MSTP013] = MSTP(&r_clk, MSTPCR0, 13, 0),
164 MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0), 168 [MSTP011] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 11, 0),
165 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0), 169 [MSTP010] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
166 MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0), 170 [MSTP007] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
167 MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0), 171 [MSTP006] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 6, 0),
168 MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0), 172 [MSTP005] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 5, 0),
169 MSTP("msiof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0), 173 [MSTP002] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 2, 0),
170 MSTP("sbr0", &div4_clks[DIV4_P], MSTPCR0, 1, 0), 174 [MSTP001] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 1, 0),
171 175
172 MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0), 176 [MSTP109] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
173 177
174 MSTP("icb0", &div4_clks[DIV4_P], MSTPCR2, 27, 0), 178 [MSTP227] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 27, 0),
175 MSTP("meram0", &div4_clks[DIV4_P], MSTPCR2, 26, 0), 179 [MSTP226] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 26, 0),
176 MSTP("dacy1", &div4_clks[DIV4_P], MSTPCR2, 24, 0), 180 [MSTP224] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 24, 0),
177 MSTP("dacy0", &div4_clks[DIV4_P], MSTPCR2, 23, 0), 181 [MSTP223] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 23, 0),
178 MSTP("tsif0", &div4_clks[DIV4_P], MSTPCR2, 22, 0), 182 [MSTP222] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 22, 0),
179 MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0), 183 [MSTP218] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 18, 0),
180 MSTP("mmcif0", &div4_clks[DIV4_P], MSTPCR2, 17, 0), 184 [MSTP217] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 17, 0),
181 MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0), 185 [MSTP211] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 11, 0),
182 MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 9, 0), 186 [MSTP207] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 7, CLK_ENABLE_ON_INIT),
183 MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 7, CLK_ENABLE_ON_INIT), 187 [MSTP205] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
184 MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0), 188 [MSTP204] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
185 MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0), 189 [MSTP203] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
186 MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0), 190 [MSTP202] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
187 MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT), 191 [MSTP201] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
188 MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT), 192 [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
189 MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), 193};
194
195#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
196
197static struct clk_lookup lookups[] = {
198 /* main clocks */
199 CLKDEV_CON_ID("rclk", &r_clk),
200 CLKDEV_CON_ID("extal", &extal_clk),
201 CLKDEV_CON_ID("dll_clk", &dll_clk),
202 CLKDEV_CON_ID("pll_clk", &pll_clk),
203
204 /* DIV4 clocks */
205 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
206 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
207 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
208 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
209 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
210 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
211 CLKDEV_CON_ID("siua_clk", &div4_clks[DIV4_SIUA]),
212 CLKDEV_CON_ID("siub_clk", &div4_clks[DIV4_SIUB]),
213
214 /* DIV6 clocks */
215 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
216
217 /* MSTP32 clocks */
218 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
219 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
220 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
221 CLKDEV_CON_ID("rsmem0", &mstp_clks[MSTP028]),
222 CLKDEV_CON_ID("xymem0", &mstp_clks[MSTP026]),
223 CLKDEV_CON_ID("intc3", &mstp_clks[MSTP023]),
224 CLKDEV_CON_ID("intc0", &mstp_clks[MSTP022]),
225 CLKDEV_CON_ID("dmac0", &mstp_clks[MSTP021]),
226 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP020]),
227 CLKDEV_CON_ID("hudi0", &mstp_clks[MSTP019]),
228 CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
229 CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),
230 CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP014]),
231 CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
232 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
233 CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
234 {
235 /* SCIF0 */
236 .dev_id = "sh-sci.0",
237 .con_id = "sci_fck",
238 .clk = &mstp_clks[MSTP007],
239 }, {
240 /* SCIF1 */
241 .dev_id = "sh-sci.1",
242 .con_id = "sci_fck",
243 .clk = &mstp_clks[MSTP006],
244 }, {
245 /* SCIF2 */
246 .dev_id = "sh-sci.2",
247 .con_id = "sci_fck",
248 .clk = &mstp_clks[MSTP005],
249 },
250 CLKDEV_CON_ID("msiof0", &mstp_clks[MSTP002]),
251 CLKDEV_CON_ID("sbr0", &mstp_clks[MSTP001]),
252 CLKDEV_CON_ID("i2c0", &mstp_clks[MSTP109]),
253 CLKDEV_CON_ID("icb0", &mstp_clks[MSTP227]),
254 CLKDEV_CON_ID("meram0", &mstp_clks[MSTP226]),
255 CLKDEV_CON_ID("dacy1", &mstp_clks[MSTP224]),
256 CLKDEV_CON_ID("dacy0", &mstp_clks[MSTP223]),
257 CLKDEV_CON_ID("tsif0", &mstp_clks[MSTP222]),
258 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP218]),
259 CLKDEV_CON_ID("mmcif0", &mstp_clks[MSTP217]),
260 CLKDEV_CON_ID("usbf0", &mstp_clks[MSTP211]),
261 CLKDEV_CON_ID("veu1", &mstp_clks[MSTP207]),
262 CLKDEV_CON_ID("vou0", &mstp_clks[MSTP205]),
263 CLKDEV_CON_ID("beu0", &mstp_clks[MSTP204]),
264 CLKDEV_CON_ID("ceu0", &mstp_clks[MSTP203]),
265 CLKDEV_CON_ID("veu0", &mstp_clks[MSTP202]),
266 CLKDEV_CON_ID("vpu0", &mstp_clks[MSTP201]),
267 CLKDEV_CON_ID("lcdc0", &mstp_clks[MSTP200]),
190}; 268};
191 269
192int __init arch_clk_init(void) 270int __init arch_clk_init(void)
@@ -202,14 +280,16 @@ int __init arch_clk_init(void)
202 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 280 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
203 ret = clk_register(main_clks[k]); 281 ret = clk_register(main_clks[k]);
204 282
283 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
284
205 if (!ret) 285 if (!ret)
206 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 286 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
207 287
208 if (!ret) 288 if (!ret)
209 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 289 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
210 290
211 if (!ret) 291 if (!ret)
212 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 292 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
213 293
214 return ret; 294 return ret;
215} 295}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 15db6d521c5c..2030f3d9fac7 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -21,6 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clkdev.h>
24#include <asm/clock.h> 25#include <asm/clock.h>
25#include <asm/hwblk.h> 26#include <asm/hwblk.h>
26#include <cpu/sh7722.h> 27#include <cpu/sh7722.h>
@@ -36,8 +37,6 @@
36 37
37/* Fixed 32 KHz root clock for RTC and Power Management purposes */ 38/* Fixed 32 KHz root clock for RTC and Power Management purposes */
38static struct clk r_clk = { 39static struct clk r_clk = {
39 .name = "rclk",
40 .id = -1,
41 .rate = 32768, 40 .rate = 32768,
42}; 41};
43 42
@@ -46,8 +45,6 @@ static struct clk r_clk = {
46 * from the platform code. 45 * from the platform code.
47 */ 46 */
48struct clk extal_clk = { 47struct clk extal_clk = {
49 .name = "extal",
50 .id = -1,
51 .rate = 33333333, 48 .rate = 33333333,
52}; 49};
53 50
@@ -69,8 +66,6 @@ static struct clk_ops dll_clk_ops = {
69}; 66};
70 67
71static struct clk dll_clk = { 68static struct clk dll_clk = {
72 .name = "dll_clk",
73 .id = -1,
74 .ops = &dll_clk_ops, 69 .ops = &dll_clk_ops,
75 .parent = &r_clk, 70 .parent = &r_clk,
76 .flags = CLK_ENABLE_ON_INIT, 71 .flags = CLK_ENABLE_ON_INIT,
@@ -94,8 +89,6 @@ static struct clk_ops pll_clk_ops = {
94}; 89};
95 90
96static struct clk pll_clk = { 91static struct clk pll_clk = {
97 .name = "pll_clk",
98 .id = -1,
99 .ops = &pll_clk_ops, 92 .ops = &pll_clk_ops,
100 .flags = CLK_ENABLE_ON_INIT, 93 .flags = CLK_ENABLE_ON_INIT,
101}; 94};
@@ -121,68 +114,142 @@ static struct clk_div4_table div4_table = {
121 .div_mult_table = &div4_div_mult_table, 114 .div_mult_table = &div4_div_mult_table,
122}; 115};
123 116
124#define DIV4(_str, _reg, _bit, _mask, _flags) \ 117#define DIV4(_reg, _bit, _mask, _flags) \
125 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 118 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
126 119
127enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; 120enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
128 121
129struct clk div4_clks[DIV4_NR] = { 122struct clk div4_clks[DIV4_NR] = {
130 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT), 123 [DIV4_I] = DIV4(FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
131 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT), 124 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
132 [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT), 125 [DIV4_SH] = DIV4(FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
133 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT), 126 [DIV4_B] = DIV4(FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
134 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT), 127 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
135 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0), 128 [DIV4_P] = DIV4(FRQCR, 0, 0x1fff, 0),
136}; 129};
137 130
138enum { DIV4_IRDA, DIV4_ENABLE_NR }; 131enum { DIV4_IRDA, DIV4_ENABLE_NR };
139 132
140struct clk div4_enable_clks[DIV4_ENABLE_NR] = { 133struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
141 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0), 134 [DIV4_IRDA] = DIV4(IRDACLKCR, 0, 0x1fff, 0),
142}; 135};
143 136
144enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR }; 137enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
145 138
146struct clk div4_reparent_clks[DIV4_REPARENT_NR] = { 139struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
147 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0), 140 [DIV4_SIUA] = DIV4(SCLKACR, 0, 0x1fff, 0),
148 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0), 141 [DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x1fff, 0),
149}; 142};
150 143
151struct clk div6_clks[] = { 144enum { DIV6_V, DIV6_NR };
152 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 145
146struct clk div6_clks[DIV6_NR] = {
147 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
148};
149
150static struct clk mstp_clks[HWBLK_NR] = {
151 SH_HWBLK_CLK(HWBLK_URAM, &div4_clks[DIV4_U], CLK_ENABLE_ON_INIT),
152 SH_HWBLK_CLK(HWBLK_XYMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
153 SH_HWBLK_CLK(HWBLK_TMU, &div4_clks[DIV4_P], 0),
154 SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
155 SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
156 SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
157 SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
158 SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
159 SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
160
161 SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
162 SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
163
164 SH_HWBLK_CLK(HWBLK_SDHI, &div4_clks[DIV4_P], 0),
165 SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
166 SH_HWBLK_CLK(HWBLK_USBF, &div4_clks[DIV4_P], 0),
167 SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
168 SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
169 SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
170 SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
171 SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
172 SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
173 SH_HWBLK_CLK(HWBLK_VEU, &div4_clks[DIV4_B], 0),
174 SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
175 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0),
153}; 176};
154 177
155#define R_CLK &r_clk 178#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
156#define P_CLK &div4_clks[DIV4_P] 179
157#define B_CLK &div4_clks[DIV4_B] 180static struct clk_lookup lookups[] = {
158#define U_CLK &div4_clks[DIV4_U] 181 /* main clocks */
159 182 CLKDEV_CON_ID("rclk", &r_clk),
160static struct clk mstp_clks[] = { 183 CLKDEV_CON_ID("extal", &extal_clk),
161 SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT), 184 CLKDEV_CON_ID("dll_clk", &dll_clk),
162 SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT), 185 CLKDEV_CON_ID("pll_clk", &pll_clk),
163 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0), 186
164 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), 187 /* DIV4 clocks */
165 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), 188 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
166 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), 189 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
167 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), 190 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
168 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), 191 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
169 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), 192 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
170 193 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
171 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0), 194 CLKDEV_CON_ID("irda_clk", &div4_enable_clks[DIV4_IRDA]),
172 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), 195 CLKDEV_CON_ID("siua_clk", &div4_reparent_clks[DIV4_SIUA]),
173 196 CLKDEV_CON_ID("siub_clk", &div4_reparent_clks[DIV4_SIUB]),
174 SH_HWBLK_CLK("sdhi0", -1, P_CLK, HWBLK_SDHI, 0), 197
175 SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0), 198 /* DIV6 clocks */
176 SH_HWBLK_CLK("usbf0", -1, P_CLK, HWBLK_USBF, 0), 199 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
177 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), 200
178 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0), 201 /* MSTP clocks */
179 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), 202 CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]),
180 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0), 203 CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]),
181 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0), 204 {
182 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0), 205 /* TMU0 */
183 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, 0), 206 .dev_id = "sh_tmu.0",
184 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0), 207 .con_id = "tmu_fck",
185 SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0), 208 .clk = &mstp_clks[HWBLK_TMU],
209 }, {
210 /* TMU1 */
211 .dev_id = "sh_tmu.1",
212 .con_id = "tmu_fck",
213 .clk = &mstp_clks[HWBLK_TMU],
214 }, {
215 /* TMU2 */
216 .dev_id = "sh_tmu.2",
217 .con_id = "tmu_fck",
218 .clk = &mstp_clks[HWBLK_TMU],
219 },
220 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
221 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
222 CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
223 {
224 /* SCIF0 */
225 .dev_id = "sh-sci.0",
226 .con_id = "sci_fck",
227 .clk = &mstp_clks[HWBLK_SCIF0],
228 }, {
229 /* SCIF1 */
230 .dev_id = "sh-sci.1",
231 .con_id = "sci_fck",
232 .clk = &mstp_clks[HWBLK_SCIF1],
233 }, {
234 /* SCIF2 */
235 .dev_id = "sh-sci.2",
236 .con_id = "sci_fck",
237 .clk = &mstp_clks[HWBLK_SCIF2],
238 },
239 CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC]),
240 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
241 CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]),
242 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
243 CLKDEV_CON_ID("usbf0", &mstp_clks[HWBLK_USBF]),
244 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
245 CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
246 CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
247 CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
248 CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
249 CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
250 CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU]),
251 CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
252 CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
186}; 253};
187 254
188int __init arch_clk_init(void) 255int __init arch_clk_init(void)
@@ -198,6 +265,8 @@ int __init arch_clk_init(void)
198 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 265 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
199 ret = clk_register(main_clks[k]); 266 ret = clk_register(main_clks[k]);
200 267
268 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
269
201 if (!ret) 270 if (!ret)
202 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 271 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
203 272
@@ -210,10 +279,10 @@ int __init arch_clk_init(void)
210 DIV4_REPARENT_NR, &div4_table); 279 DIV4_REPARENT_NR, &div4_table);
211 280
212 if (!ret) 281 if (!ret)
213 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 282 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
214 283
215 if (!ret) 284 if (!ret)
216 ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 285 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
217 286
218 return ret; 287 return ret;
219} 288}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 50babe01fe44..d3938f0d3702 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -21,6 +21,8 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h>
25#include <asm/clkdev.h>
24#include <asm/clock.h> 26#include <asm/clock.h>
25#include <asm/hwblk.h> 27#include <asm/hwblk.h>
26#include <cpu/sh7723.h> 28#include <cpu/sh7723.h>
@@ -36,8 +38,6 @@
36 38
37/* Fixed 32 KHz root clock for RTC and Power Management purposes */ 39/* Fixed 32 KHz root clock for RTC and Power Management purposes */
38static struct clk r_clk = { 40static struct clk r_clk = {
39 .name = "rclk",
40 .id = -1,
41 .rate = 32768, 41 .rate = 32768,
42}; 42};
43 43
@@ -46,8 +46,6 @@ static struct clk r_clk = {
46 * from the platform code. 46 * from the platform code.
47 */ 47 */
48struct clk extal_clk = { 48struct clk extal_clk = {
49 .name = "extal",
50 .id = -1,
51 .rate = 33333333, 49 .rate = 33333333,
52}; 50};
53 51
@@ -69,8 +67,6 @@ static struct clk_ops dll_clk_ops = {
69}; 67};
70 68
71static struct clk dll_clk = { 69static struct clk dll_clk = {
72 .name = "dll_clk",
73 .id = -1,
74 .ops = &dll_clk_ops, 70 .ops = &dll_clk_ops,
75 .parent = &r_clk, 71 .parent = &r_clk,
76 .flags = CLK_ENABLE_ON_INIT, 72 .flags = CLK_ENABLE_ON_INIT,
@@ -94,8 +90,6 @@ static struct clk_ops pll_clk_ops = {
94}; 90};
95 91
96static struct clk pll_clk = { 92static struct clk pll_clk = {
97 .name = "pll_clk",
98 .id = -1,
99 .ops = &pll_clk_ops, 93 .ops = &pll_clk_ops,
100 .flags = CLK_ENABLE_ON_INIT, 94 .flags = CLK_ENABLE_ON_INIT,
101}; 95};
@@ -123,92 +117,215 @@ static struct clk_div4_table div4_table = {
123 117
124enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; 118enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
125 119
126#define DIV4(_str, _reg, _bit, _mask, _flags) \ 120#define DIV4(_reg, _bit, _mask, _flags) \
127 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
128 122
129struct clk div4_clks[DIV4_NR] = { 123struct clk div4_clks[DIV4_NR] = {
130 [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x0dbf, CLK_ENABLE_ON_INIT), 124 [DIV4_I] = DIV4(FRQCR, 20, 0x0dbf, CLK_ENABLE_ON_INIT),
131 [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x0dbf, CLK_ENABLE_ON_INIT), 125 [DIV4_U] = DIV4(FRQCR, 16, 0x0dbf, CLK_ENABLE_ON_INIT),
132 [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x0dbf, CLK_ENABLE_ON_INIT), 126 [DIV4_SH] = DIV4(FRQCR, 12, 0x0dbf, CLK_ENABLE_ON_INIT),
133 [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT), 127 [DIV4_B] = DIV4(FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT),
134 [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT), 128 [DIV4_B3] = DIV4(FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
135 [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x0dbf, 0), 129 [DIV4_P] = DIV4(FRQCR, 0, 0x0dbf, 0),
136}; 130};
137 131
138enum { DIV4_IRDA, DIV4_ENABLE_NR }; 132enum { DIV4_IRDA, DIV4_ENABLE_NR };
139 133
140struct clk div4_enable_clks[DIV4_ENABLE_NR] = { 134struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
141 [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x0dbf, 0), 135 [DIV4_IRDA] = DIV4(IRDACLKCR, 0, 0x0dbf, 0),
142}; 136};
143 137
144enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR }; 138enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
145 139
146struct clk div4_reparent_clks[DIV4_REPARENT_NR] = { 140struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
147 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0), 141 [DIV4_SIUA] = DIV4(SCLKACR, 0, 0x0dbf, 0),
148 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0), 142 [DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x0dbf, 0),
149};
150struct clk div6_clks[] = {
151 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
152}; 143};
144enum { DIV6_V, DIV6_NR };
153 145
154#define R_CLK (&r_clk) 146struct clk div6_clks[DIV6_NR] = {
155#define P_CLK (&div4_clks[DIV4_P]) 147 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
156#define B_CLK (&div4_clks[DIV4_B]) 148};
157#define U_CLK (&div4_clks[DIV4_U])
158#define I_CLK (&div4_clks[DIV4_I])
159#define SH_CLK (&div4_clks[DIV4_SH])
160 149
161static struct clk mstp_clks[] = { 150static struct clk mstp_clks[] = {
162 /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */ 151 /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
163 SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT), 152 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
164 SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT), 153 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
165 SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT), 154 SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
166 SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT), 155 SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
167 SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT), 156 SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
168 SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT), 157 SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
169 SH_HWBLK_CLK("intc0", -1, I_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT), 158 SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
170 SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0), 159 SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
171 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), 160 SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
172 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), 161 SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
173 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), 162 SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
174 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0), 163 SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
175 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), 164 SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
176 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), 165 SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
177 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), 166 SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
178 SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), 167 SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
179 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), 168 SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
180 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), 169 SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
181 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), 170 SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
182 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), 171 SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
183 SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0), 172 SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
184 SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0), 173 SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
185 SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0), 174 SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
186 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), 175 SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
187 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), 176 SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
188 SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0), 177 SH_HWBLK_CLK(HWBLK_MERAM, &div4_clks[DIV4_SH], 0),
189 178
190 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0), 179 SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
191 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), 180 SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
192 181
193 SH_HWBLK_CLK("atapi0", -1, SH_CLK, HWBLK_ATAPI, 0), 182 SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_SH], 0),
194 SH_HWBLK_CLK("adc0", -1, P_CLK, HWBLK_ADC, 0), 183 SH_HWBLK_CLK(HWBLK_ADC, &div4_clks[DIV4_P], 0),
195 SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0), 184 SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
196 SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0), 185 SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
197 SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0), 186 SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
198 SH_HWBLK_CLK("icb0", -1, B_CLK, HWBLK_ICB, CLK_ENABLE_ON_INIT), 187 SH_HWBLK_CLK(HWBLK_ICB, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
199 SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0), 188 SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
200 SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0), 189 SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
201 SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0), 190 SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
202 SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0), 191 SH_HWBLK_CLK(HWBLK_USB, &div4_clks[DIV4_B], 0),
203 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), 192 SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
204 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0), 193 SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
205 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, 0), 194 SH_HWBLK_CLK(HWBLK_VEU2H1, &div4_clks[DIV4_B], 0),
206 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), 195 SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
207 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0), 196 SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
208 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0), 197 SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
209 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, 0), 198 SH_HWBLK_CLK(HWBLK_VEU2H0, &div4_clks[DIV4_B], 0),
210 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0), 199 SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
211 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), 200 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
201};
202
203#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
204
205static struct clk_lookup lookups[] = {
206 /* main clocks */
207 CLKDEV_CON_ID("rclk", &r_clk),
208 CLKDEV_CON_ID("extal", &extal_clk),
209 CLKDEV_CON_ID("dll_clk", &dll_clk),
210 CLKDEV_CON_ID("pll_clk", &pll_clk),
211
212 /* DIV4 clocks */
213 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
214 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
215 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
216 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
217 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
218 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
219 CLKDEV_CON_ID("irda_clk", &div4_enable_clks[DIV4_IRDA]),
220 CLKDEV_CON_ID("siua_clk", &div4_reparent_clks[DIV4_SIUA]),
221 CLKDEV_CON_ID("siub_clk", &div4_reparent_clks[DIV4_SIUB]),
222
223 /* DIV6 clocks */
224 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
225
226 /* MSTP clocks */
227 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
228 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
229 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
230 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
231 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
232 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
233 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
234 CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
235 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
236 CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
237 CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
238 {
239 /* TMU0 */
240 .dev_id = "sh_tmu.0",
241 .con_id = "tmu_fck",
242 .clk = &mstp_clks[HWBLK_TMU0],
243 }, {
244 /* TMU1 */
245 .dev_id = "sh_tmu.1",
246 .con_id = "tmu_fck",
247 .clk = &mstp_clks[HWBLK_TMU0],
248 }, {
249 /* TMU2 */
250 .dev_id = "sh_tmu.2",
251 .con_id = "tmu_fck",
252 .clk = &mstp_clks[HWBLK_TMU0],
253 },
254 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
255 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
256 CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
257 {
258 /* TMU3 */
259 .dev_id = "sh_tmu.3",
260 .con_id = "tmu_fck",
261 .clk = &mstp_clks[HWBLK_TMU1],
262 }, {
263 /* TMU4 */
264 .dev_id = "sh_tmu.4",
265 .con_id = "tmu_fck",
266 .clk = &mstp_clks[HWBLK_TMU1],
267 }, {
268 /* TMU5 */
269 .dev_id = "sh_tmu.5",
270 .con_id = "tmu_fck",
271 .clk = &mstp_clks[HWBLK_TMU1],
272 },
273 CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
274 {
275 /* SCIF0 */
276 .dev_id = "sh-sci.0",
277 .con_id = "sci_fck",
278 .clk = &mstp_clks[HWBLK_SCIF0],
279 }, {
280 /* SCIF1 */
281 .dev_id = "sh-sci.1",
282 .con_id = "sci_fck",
283 .clk = &mstp_clks[HWBLK_SCIF1],
284 }, {
285 /* SCIF2 */
286 .dev_id = "sh-sci.2",
287 .con_id = "sci_fck",
288 .clk = &mstp_clks[HWBLK_SCIF2],
289 }, {
290 /* SCIF3 */
291 .dev_id = "sh-sci.3",
292 .con_id = "sci_fck",
293 .clk = &mstp_clks[HWBLK_SCIF3],
294 }, {
295 /* SCIF4 */
296 .dev_id = "sh-sci.4",
297 .con_id = "sci_fck",
298 .clk = &mstp_clks[HWBLK_SCIF4],
299 }, {
300 /* SCIF5 */
301 .dev_id = "sh-sci.5",
302 .con_id = "sci_fck",
303 .clk = &mstp_clks[HWBLK_SCIF5],
304 },
305 CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
306 CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
307 CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
308 CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC]),
309 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
310 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
311 CLKDEV_CON_ID("adc0", &mstp_clks[HWBLK_ADC]),
312 CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
313 CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
314 CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
315 CLKDEV_CON_ID("icb0", &mstp_clks[HWBLK_ICB]),
316 CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
317 CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
318 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
319 CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB]),
320 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
321 CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
322 CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU2H1]),
323 CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
324 CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
325 CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
326 CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
327 CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
328 CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
212}; 329};
213 330
214int __init arch_clk_init(void) 331int __init arch_clk_init(void)
@@ -222,7 +339,9 @@ int __init arch_clk_init(void)
222 pll_clk.parent = &extal_clk; 339 pll_clk.parent = &extal_clk;
223 340
224 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 341 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
225 ret = clk_register(main_clks[k]); 342 ret |= clk_register(main_clks[k]);
343
344 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
226 345
227 if (!ret) 346 if (!ret)
228 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 347 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
@@ -236,10 +355,10 @@ int __init arch_clk_init(void)
236 DIV4_REPARENT_NR, &div4_table); 355 DIV4_REPARENT_NR, &div4_table);
237 356
238 if (!ret) 357 if (!ret)
239 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 358 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
240 359
241 if (!ret) 360 if (!ret)
242 ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 361 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
243 362
244 return ret; 363 return ret;
245} 364}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 6707061fbf54..2d9700c6b53a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -21,6 +21,8 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h>
25#include <asm/clkdev.h>
24#include <asm/clock.h> 26#include <asm/clock.h>
25#include <asm/hwblk.h> 27#include <asm/hwblk.h>
26#include <cpu/sh7724.h> 28#include <cpu/sh7724.h>
@@ -39,8 +41,6 @@
39 41
40/* Fixed 32 KHz root clock for RTC and Power Management purposes */ 42/* Fixed 32 KHz root clock for RTC and Power Management purposes */
41static struct clk r_clk = { 43static struct clk r_clk = {
42 .name = "rclk",
43 .id = -1,
44 .rate = 32768, 44 .rate = 32768,
45}; 45};
46 46
@@ -49,8 +49,6 @@ static struct clk r_clk = {
49 * from the platform code. 49 * from the platform code.
50 */ 50 */
51struct clk extal_clk = { 51struct clk extal_clk = {
52 .name = "extal",
53 .id = -1,
54 .rate = 33333333, 52 .rate = 33333333,
55}; 53};
56 54
@@ -74,8 +72,6 @@ static struct clk_ops fll_clk_ops = {
74}; 72};
75 73
76static struct clk fll_clk = { 74static struct clk fll_clk = {
77 .name = "fll_clk",
78 .id = -1,
79 .ops = &fll_clk_ops, 75 .ops = &fll_clk_ops,
80 .parent = &r_clk, 76 .parent = &r_clk,
81 .flags = CLK_ENABLE_ON_INIT, 77 .flags = CLK_ENABLE_ON_INIT,
@@ -96,8 +92,6 @@ static struct clk_ops pll_clk_ops = {
96}; 92};
97 93
98static struct clk pll_clk = { 94static struct clk pll_clk = {
99 .name = "pll_clk",
100 .id = -1,
101 .ops = &pll_clk_ops, 95 .ops = &pll_clk_ops,
102 .flags = CLK_ENABLE_ON_INIT, 96 .flags = CLK_ENABLE_ON_INIT,
103}; 97};
@@ -113,8 +107,6 @@ static struct clk_ops div3_clk_ops = {
113}; 107};
114 108
115static struct clk div3_clk = { 109static struct clk div3_clk = {
116 .name = "div3_clk",
117 .id = -1,
118 .ops = &div3_clk_ops, 110 .ops = &div3_clk_ops,
119 .parent = &pll_clk, 111 .parent = &pll_clk,
120}; 112};
@@ -151,86 +143,215 @@ static struct clk_div4_table div4_table = {
151 143
152enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; 144enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR };
153 145
154#define DIV4(_str, _reg, _bit, _mask, _flags) \ 146#define DIV4(_reg, _bit, _mask, _flags) \
155 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 147 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
156 148
157struct clk div4_clks[DIV4_NR] = { 149struct clk div4_clks[DIV4_NR] = {
158 [DIV4_I] = DIV4("cpu_clk", FRQCRA, 20, 0x2f7d, CLK_ENABLE_ON_INIT), 150 [DIV4_I] = DIV4(FRQCRA, 20, 0x2f7d, CLK_ENABLE_ON_INIT),
159 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT), 151 [DIV4_SH] = DIV4(FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),
160 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT), 152 [DIV4_B] = DIV4(FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),
161 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0), 153 [DIV4_P] = DIV4(FRQCRA, 0, 0x2f7c, 0),
162 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), 154 [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
163}; 155};
164 156
165struct clk div6_clks[] = { 157enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };
166 SH_CLK_DIV6("video_clk", &div3_clk, VCLKCR, 0), 158
167 SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0), 159struct clk div6_clks[DIV6_NR] = {
168 SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0), 160 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
169 SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0), 161 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
170 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), 162 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
163 [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
164 [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
165};
166
167static struct clk mstp_clks[HWBLK_NR] = {
168 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
169 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
170 SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
171 SH_HWBLK_CLK(HWBLK_RSMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
172 SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
173 SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
174 SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
175 SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_P], CLK_ENABLE_ON_INIT),
176 SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
177 SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
178 SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
179 SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
180 SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
181 SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
182 SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
183 SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
184 SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
185 SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
186 SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
187 SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
188 SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
189 SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
190 SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
191 SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
192 SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
193
194 SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
195 SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
196 SH_HWBLK_CLK(HWBLK_IIC0, &div4_clks[DIV4_P], 0),
197 SH_HWBLK_CLK(HWBLK_IIC1, &div4_clks[DIV4_P], 0),
198
199 SH_HWBLK_CLK(HWBLK_MMC, &div4_clks[DIV4_B], 0),
200 SH_HWBLK_CLK(HWBLK_ETHER, &div4_clks[DIV4_B], 0),
201 SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_B], 0),
202 SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
203 SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
204 SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
205 SH_HWBLK_CLK(HWBLK_USB1, &div4_clks[DIV4_B], 0),
206 SH_HWBLK_CLK(HWBLK_USB0, &div4_clks[DIV4_B], 0),
207 SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
208 SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
209 SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
210 SH_HWBLK_CLK(HWBLK_VEU1, &div4_clks[DIV4_B], 0),
211 SH_HWBLK_CLK(HWBLK_CEU1, &div4_clks[DIV4_B], 0),
212 SH_HWBLK_CLK(HWBLK_BEU1, &div4_clks[DIV4_B], 0),
213 SH_HWBLK_CLK(HWBLK_2DDMAC, &div4_clks[DIV4_SH], 0),
214 SH_HWBLK_CLK(HWBLK_SPU, &div4_clks[DIV4_B], 0),
215 SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
216 SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
217 SH_HWBLK_CLK(HWBLK_BEU0, &div4_clks[DIV4_B], 0),
218 SH_HWBLK_CLK(HWBLK_CEU0, &div4_clks[DIV4_B], 0),
219 SH_HWBLK_CLK(HWBLK_VEU0, &div4_clks[DIV4_B], 0),
220 SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
221 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
171}; 222};
172 223
173#define R_CLK (&r_clk) 224#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
174#define P_CLK (&div4_clks[DIV4_P]) 225
175#define B_CLK (&div4_clks[DIV4_B]) 226static struct clk_lookup lookups[] = {
176#define I_CLK (&div4_clks[DIV4_I]) 227 /* main clocks */
177#define SH_CLK (&div4_clks[DIV4_SH]) 228 CLKDEV_CON_ID("rclk", &r_clk),
178 229 CLKDEV_CON_ID("extal", &extal_clk),
179static struct clk mstp_clks[] = { 230 CLKDEV_CON_ID("fll_clk", &fll_clk),
180 SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT), 231 CLKDEV_CON_ID("pll_clk", &pll_clk),
181 SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT), 232 CLKDEV_CON_ID("div3_clk", &div3_clk),
182 SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT), 233
183 SH_HWBLK_CLK("rs0", -1, B_CLK, HWBLK_RSMEM, CLK_ENABLE_ON_INIT), 234 /* DIV4 clocks */
184 SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT), 235 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
185 SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT), 236 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
186 SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT), 237 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
187 SH_HWBLK_CLK("intc0", -1, P_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT), 238 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
188 SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0), 239 CLKDEV_CON_ID("vpu_clk", &div4_clks[DIV4_M1]),
189 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), 240
190 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), 241 /* DIV6 clocks */
191 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), 242 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
192 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0), 243 CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
193 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), 244 CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
194 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), 245 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
195 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), 246 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
196 SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), 247
197 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), 248 /* MSTP clocks */
198 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), 249 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
199 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), 250 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
200 SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0), 251 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
201 SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0), 252 CLKDEV_CON_ID("rs0", &mstp_clks[HWBLK_RSMEM]),
202 SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0), 253 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
203 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), 254 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
204 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), 255 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
205 256 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
206 SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0), 257 CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
207 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), 258 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
208 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC0, 0), 259 CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
209 SH_HWBLK_CLK("i2c1", -1, P_CLK, HWBLK_IIC1, 0), 260 CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
210 261 {
211 SH_HWBLK_CLK("mmc0", -1, B_CLK, HWBLK_MMC, 0), 262 /* TMU0 */
212 SH_HWBLK_CLK("eth0", -1, B_CLK, HWBLK_ETHER, 0), 263 .dev_id = "sh_tmu.0",
213 SH_HWBLK_CLK("atapi0", -1, B_CLK, HWBLK_ATAPI, 0), 264 .con_id = "tmu_fck",
214 SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0), 265 .clk = &mstp_clks[HWBLK_TMU0],
215 SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0), 266 }, {
216 SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0), 267 /* TMU1 */
217 SH_HWBLK_CLK("usb1", -1, B_CLK, HWBLK_USB1, 0), 268 .dev_id = "sh_tmu.1",
218 SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB0, 0), 269 .con_id = "tmu_fck",
219 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), 270 .clk = &mstp_clks[HWBLK_TMU0],
220 SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0), 271 }, {
221 SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0), 272 /* TMU2 */
222 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, 0), 273 .dev_id = "sh_tmu.2",
223 SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0), 274 .con_id = "tmu_fck",
224 SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0), 275 .clk = &mstp_clks[HWBLK_TMU0],
225 SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0), 276 }, {
226 SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0), 277 /* TMU3 */
227 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0), 278 .dev_id = "sh_tmu.3",
228 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), 279 .con_id = "tmu_fck",
229 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0), 280 .clk = &mstp_clks[HWBLK_TMU1],
230 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0), 281 },
231 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, 0), 282 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
232 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0), 283 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
233 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), 284 CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
285 {
286 /* TMU4 */
287 .dev_id = "sh_tmu.4",
288 .con_id = "tmu_fck",
289 .clk = &mstp_clks[HWBLK_TMU1],
290 }, {
291 /* TMU5 */
292 .dev_id = "sh_tmu.5",
293 .con_id = "tmu_fck",
294 .clk = &mstp_clks[HWBLK_TMU1],
295 }, {
296 /* SCIF0 */
297 .dev_id = "sh-sci.0",
298 .con_id = "sci_fck",
299 .clk = &mstp_clks[HWBLK_SCIF0],
300 }, {
301 /* SCIF1 */
302 .dev_id = "sh-sci.1",
303 .con_id = "sci_fck",
304 .clk = &mstp_clks[HWBLK_SCIF1],
305 }, {
306 /* SCIF2 */
307 .dev_id = "sh-sci.2",
308 .con_id = "sci_fck",
309 .clk = &mstp_clks[HWBLK_SCIF2],
310 }, {
311 /* SCIF3 */
312 .dev_id = "sh-sci.3",
313 .con_id = "sci_fck",
314 .clk = &mstp_clks[HWBLK_SCIF3],
315 }, {
316 /* SCIF4 */
317 .dev_id = "sh-sci.4",
318 .con_id = "sci_fck",
319 .clk = &mstp_clks[HWBLK_SCIF4],
320 }, {
321 /* SCIF5 */
322 .dev_id = "sh-sci.5",
323 .con_id = "sci_fck",
324 .clk = &mstp_clks[HWBLK_SCIF5],
325 },
326 CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
327 CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
328 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
329 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
330 CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC0]),
331 CLKDEV_CON_ID("i2c1", &mstp_clks[HWBLK_IIC1]),
332 CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]),
333 CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]),
334 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
335 CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
336 CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
337 CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
338 CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]),
339 CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]),
340 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
341 CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
342 CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
343 CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]),
344 CLKDEV_CON_ID("ceu1", &mstp_clks[HWBLK_CEU1]),
345 CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
346 CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
347 CLKDEV_CON_ID("spu0", &mstp_clks[HWBLK_SPU]),
348 CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
349 CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
350 CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
351 CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU0]),
352 CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]),
353 CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
354 CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
234}; 355};
235 356
236int __init arch_clk_init(void) 357int __init arch_clk_init(void)
@@ -246,14 +367,16 @@ int __init arch_clk_init(void)
246 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 367 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
247 ret = clk_register(main_clks[k]); 368 ret = clk_register(main_clks[k]);
248 369
370 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
371
249 if (!ret) 372 if (!ret)
250 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 373 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
251 374
252 if (!ret) 375 if (!ret)
253 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 376 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
254 377
255 if (!ret) 378 if (!ret)
256 ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 379 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
257 380
258 return ret; 381 return ret;
259} 382}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index 86aae60677dc..0a752bd324ac 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/clkdev.h>
15#include <asm/clock.h> 16#include <asm/clock.h>
16#include <asm/freq.h> 17#include <asm/freq.h>
17 18
@@ -87,7 +88,6 @@ static struct clk_ops sh7757_shyway_clk_ops = {
87}; 88};
88 89
89static struct clk sh7757_shyway_clk = { 90static struct clk sh7757_shyway_clk = {
90 .name = "shyway_clk",
91 .flags = CLK_ENABLE_ON_INIT, 91 .flags = CLK_ENABLE_ON_INIT,
92 .ops = &sh7757_shyway_clk_ops, 92 .ops = &sh7757_shyway_clk_ops,
93}; 93};
@@ -100,6 +100,13 @@ static struct clk *sh7757_onchip_clocks[] = {
100 &sh7757_shyway_clk, 100 &sh7757_shyway_clk,
101}; 101};
102 102
103#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
104
105static struct clk_lookup lookups[] = {
106 /* main clocks */
107 CLKDEV_CON_ID("shyway_clk", &sh7757_shyway_clk),
108};
109
103static int __init sh7757_clk_init(void) 110static int __init sh7757_clk_init(void)
104{ 111{
105 struct clk *clk = clk_get(NULL, "master_clk"); 112 struct clk *clk = clk_get(NULL, "master_clk");
@@ -123,6 +130,8 @@ static int __init sh7757_clk_init(void)
123 130
124 clk_put(clk); 131 clk_put(clk);
125 132
133 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
134
126 return 0; 135 return 0;
127} 136}
128 137
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 9f401163e71e..1f1df48008cd 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -12,6 +12,8 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/io.h>
16#include <asm/clkdev.h>
15#include <asm/clock.h> 17#include <asm/clock.h>
16#include <asm/freq.h> 18#include <asm/freq.h>
17#include <asm/io.h> 19#include <asm/io.h>
@@ -77,7 +79,6 @@ static struct clk_ops sh7763_shyway_clk_ops = {
77}; 79};
78 80
79static struct clk sh7763_shyway_clk = { 81static struct clk sh7763_shyway_clk = {
80 .name = "shyway_clk",
81 .flags = CLK_ENABLE_ON_INIT, 82 .flags = CLK_ENABLE_ON_INIT,
82 .ops = &sh7763_shyway_clk_ops, 83 .ops = &sh7763_shyway_clk_ops,
83}; 84};
@@ -90,6 +91,13 @@ static struct clk *sh7763_onchip_clocks[] = {
90 &sh7763_shyway_clk, 91 &sh7763_shyway_clk,
91}; 92};
92 93
94#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
95
96static struct clk_lookup lookups[] = {
97 /* main clocks */
98 CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk),
99};
100
93int __init arch_clk_init(void) 101int __init arch_clk_init(void)
94{ 102{
95 struct clk *clk; 103 struct clk *clk;
@@ -107,5 +115,7 @@ int __init arch_clk_init(void)
107 115
108 clk_put(clk); 116 clk_put(clk);
109 117
118 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
119
110 return ret; 120 return ret;
111} 121}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 150963a6001e..62d706350060 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -11,6 +11,8 @@
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/io.h>
15#include <asm/clkdev.h>
14#include <asm/clock.h> 16#include <asm/clock.h>
15#include <asm/freq.h> 17#include <asm/freq.h>
16#include <asm/io.h> 18#include <asm/io.h>
@@ -83,7 +85,6 @@ static struct clk_ops sh7780_shyway_clk_ops = {
83}; 85};
84 86
85static struct clk sh7780_shyway_clk = { 87static struct clk sh7780_shyway_clk = {
86 .name = "shyway_clk",
87 .flags = CLK_ENABLE_ON_INIT, 88 .flags = CLK_ENABLE_ON_INIT,
88 .ops = &sh7780_shyway_clk_ops, 89 .ops = &sh7780_shyway_clk_ops,
89}; 90};
@@ -96,6 +97,13 @@ static struct clk *sh7780_onchip_clocks[] = {
96 &sh7780_shyway_clk, 97 &sh7780_shyway_clk,
97}; 98};
98 99
100#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
101
102static struct clk_lookup lookups[] = {
103 /* main clocks */
104 CLKDEV_CON_ID("shyway_clk", &sh7780_shyway_clk),
105};
106
99int __init arch_clk_init(void) 107int __init arch_clk_init(void)
100{ 108{
101 struct clk *clk; 109 struct clk *clk;
@@ -113,5 +121,7 @@ int __init arch_clk_init(void)
113 121
114 clk_put(clk); 122 clk_put(clk);
115 123
124 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
125
116 return ret; 126 return ret;
117} 127}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index d997f0a25b10..c3e458aaa2b7 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * SH7785 support for the clock framework 4 * SH7785 support for the clock framework
5 * 5 *
6 * Copyright (C) 2007 - 2009 Paul Mundt 6 * Copyright (C) 2007 - 2010 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -14,6 +14,7 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/cpufreq.h> 16#include <linux/cpufreq.h>
17#include <asm/clkdev.h>
17#include <asm/clock.h> 18#include <asm/clock.h>
18#include <asm/freq.h> 19#include <asm/freq.h>
19#include <cpu/sh7785.h> 20#include <cpu/sh7785.h>
@@ -23,8 +24,6 @@
23 * from the platform code. 24 * from the platform code.
24 */ 25 */
25static struct clk extal_clk = { 26static struct clk extal_clk = {
26 .name = "extal",
27 .id = -1,
28 .rate = 33333333, 27 .rate = 33333333,
29}; 28};
30 29
@@ -42,8 +41,6 @@ static struct clk_ops pll_clk_ops = {
42}; 41};
43 42
44static struct clk pll_clk = { 43static struct clk pll_clk = {
45 .name = "pll_clk",
46 .id = -1,
47 .ops = &pll_clk_ops, 44 .ops = &pll_clk_ops,
48 .parent = &extal_clk, 45 .parent = &extal_clk,
49 .flags = CLK_ENABLE_ON_INIT, 46 .flags = CLK_ENABLE_ON_INIT,
@@ -69,48 +66,149 @@ static struct clk_div4_table div4_table = {
69enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA, 66enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA,
70 DIV4_DU, DIV4_P, DIV4_NR }; 67 DIV4_DU, DIV4_P, DIV4_NR };
71 68
72#define DIV4(_str, _bit, _mask, _flags) \ 69#define DIV4(_bit, _mask, _flags) \
73 SH_CLK_DIV4(_str, &pll_clk, FRQMR1, _bit, _mask, _flags) 70 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
74 71
75struct clk div4_clks[DIV4_NR] = { 72struct clk div4_clks[DIV4_NR] = {
76 [DIV4_P] = DIV4("peripheral_clk", 0, 0x0f80, 0), 73 [DIV4_P] = DIV4(0, 0x0f80, 0),
77 [DIV4_DU] = DIV4("du_clk", 4, 0x0ff0, 0), 74 [DIV4_DU] = DIV4(4, 0x0ff0, 0),
78 [DIV4_GA] = DIV4("ga_clk", 8, 0x0030, 0), 75 [DIV4_GA] = DIV4(8, 0x0030, 0),
79 [DIV4_DDR] = DIV4("ddr_clk", 12, 0x000c, CLK_ENABLE_ON_INIT), 76 [DIV4_DDR] = DIV4(12, 0x000c, CLK_ENABLE_ON_INIT),
80 [DIV4_B] = DIV4("bus_clk", 16, 0x0fe0, CLK_ENABLE_ON_INIT), 77 [DIV4_B] = DIV4(16, 0x0fe0, CLK_ENABLE_ON_INIT),
81 [DIV4_SH] = DIV4("shyway_clk", 20, 0x000c, CLK_ENABLE_ON_INIT), 78 [DIV4_SH] = DIV4(20, 0x000c, CLK_ENABLE_ON_INIT),
82 [DIV4_U] = DIV4("umem_clk", 24, 0x000c, CLK_ENABLE_ON_INIT), 79 [DIV4_U] = DIV4(24, 0x000c, CLK_ENABLE_ON_INIT),
83 [DIV4_I] = DIV4("cpu_clk", 28, 0x000e, CLK_ENABLE_ON_INIT), 80 [DIV4_I] = DIV4(28, 0x000e, CLK_ENABLE_ON_INIT),
84}; 81};
85 82
86#define MSTPCR0 0xffc80030 83#define MSTPCR0 0xffc80030
87#define MSTPCR1 0xffc80034 84#define MSTPCR1 0xffc80034
88 85
89static struct clk mstp_clks[] = { 86enum { MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024,
87 MSTP021, MSTP020, MSTP017, MSTP016,
88 MSTP013, MSTP012, MSTP009, MSTP008, MSTP003, MSTP002,
89 MSTP119, MSTP117, MSTP105, MSTP104, MSTP100,
90 MSTP_NR };
91
92static struct clk mstp_clks[MSTP_NR] = {
90 /* MSTPCR0 */ 93 /* MSTPCR0 */
91 SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0), 94 [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0),
92 SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0), 95 [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0),
93 SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0), 96 [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0),
94 SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0), 97 [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0),
95 SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0), 98 [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0),
96 SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0), 99 [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0),
97 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0), 100 [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
98 SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0), 101 [MSTP020] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
99 SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0), 102 [MSTP017] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 17, 0),
100 SH_CLK_MSTP32("hac_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 16, 0), 103 [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0),
101 SH_CLK_MSTP32("mmcif_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 13, 0), 104 [MSTP013] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 13, 0),
102 SH_CLK_MSTP32("flctl_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 12, 0), 105 [MSTP012] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 12, 0),
103 SH_CLK_MSTP32("tmu345_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 9, 0), 106 [MSTP009] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0),
104 SH_CLK_MSTP32("tmu012_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 8, 0), 107 [MSTP008] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0),
105 SH_CLK_MSTP32("siof_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 3, 0), 108 [MSTP003] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 3, 0),
106 SH_CLK_MSTP32("hspi_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 2, 0), 109 [MSTP002] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 2, 0),
107 110
108 /* MSTPCR1 */ 111 /* MSTPCR1 */
109 SH_CLK_MSTP32("hudi_fck", -1, NULL, MSTPCR1, 19, 0), 112 [MSTP119] = SH_CLK_MSTP32(NULL, MSTPCR1, 19, 0),
110 SH_CLK_MSTP32("ubc_fck", -1, NULL, MSTPCR1, 17, 0), 113 [MSTP117] = SH_CLK_MSTP32(NULL, MSTPCR1, 17, 0),
111 SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0), 114 [MSTP105] = SH_CLK_MSTP32(NULL, MSTPCR1, 5, 0),
112 SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0), 115 [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
113 SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0), 116 [MSTP100] = SH_CLK_MSTP32(NULL, MSTPCR1, 0, 0),
117};
118
119#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
120
121static struct clk_lookup lookups[] = {
122 /* main clocks */
123 CLKDEV_CON_ID("extal", &extal_clk),
124 CLKDEV_CON_ID("pll_clk", &pll_clk),
125
126 /* DIV4 clocks */
127 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
128 CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
129 CLKDEV_CON_ID("ga_clk", &div4_clks[DIV4_GA]),
130 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
131 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
132 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
133 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
134 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
135
136 /* MSTP32 clocks */
137 {
138 /* SCIF5 */
139 .dev_id = "sh-sci.5",
140 .con_id = "sci_fck",
141 .clk = &mstp_clks[MSTP029],
142 }, {
143 /* SCIF4 */
144 .dev_id = "sh-sci.4",
145 .con_id = "sci_fck",
146 .clk = &mstp_clks[MSTP028],
147 }, {
148 /* SCIF3 */
149 .dev_id = "sh-sci.3",
150 .con_id = "sci_fck",
151 .clk = &mstp_clks[MSTP027],
152 }, {
153 /* SCIF2 */
154 .dev_id = "sh-sci.2",
155 .con_id = "sci_fck",
156 .clk = &mstp_clks[MSTP026],
157 }, {
158 /* SCIF1 */
159 .dev_id = "sh-sci.1",
160 .con_id = "sci_fck",
161 .clk = &mstp_clks[MSTP025],
162 }, {
163 /* SCIF0 */
164 .dev_id = "sh-sci.0",
165 .con_id = "sci_fck",
166 .clk = &mstp_clks[MSTP024],
167 },
168 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
169 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
170 CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP017]),
171 CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
172 CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]),
173 CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]),
174 {
175 /* TMU0 */
176 .dev_id = "sh_tmu.0",
177 .con_id = "tmu_fck",
178 .clk = &mstp_clks[MSTP008],
179 }, {
180 /* TMU1 */
181 .dev_id = "sh_tmu.1",
182 .con_id = "tmu_fck",
183 .clk = &mstp_clks[MSTP008],
184 }, {
185 /* TMU2 */
186 .dev_id = "sh_tmu.2",
187 .con_id = "tmu_fck",
188 .clk = &mstp_clks[MSTP008],
189 }, {
190 /* TMU3 */
191 .dev_id = "sh_tmu.3",
192 .con_id = "tmu_fck",
193 .clk = &mstp_clks[MSTP009],
194 }, {
195 /* TMU4 */
196 .dev_id = "sh_tmu.4",
197 .con_id = "tmu_fck",
198 .clk = &mstp_clks[MSTP009],
199 }, {
200 /* TMU5 */
201 .dev_id = "sh_tmu.5",
202 .con_id = "tmu_fck",
203 .clk = &mstp_clks[MSTP009],
204 },
205 CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
206 CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
207 CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
208 CLKDEV_CON_ID("ubc_fck", &mstp_clks[MSTP117]),
209 CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
210 CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]),
211 CLKDEV_CON_ID("gdta_fck", &mstp_clks[MSTP100]),
114}; 212};
115 213
116int __init arch_clk_init(void) 214int __init arch_clk_init(void)
@@ -119,12 +217,14 @@ int __init arch_clk_init(void)
119 217
120 for (i = 0; i < ARRAY_SIZE(clks); i++) 218 for (i = 0; i < ARRAY_SIZE(clks); i++)
121 ret |= clk_register(clks[i]); 219 ret |= clk_register(clks[i]);
220 for (i = 0; i < ARRAY_SIZE(lookups); i++)
221 clkdev_add(&lookups[i]);
122 222
123 if (!ret) 223 if (!ret)
124 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 224 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
125 &div4_table); 225 &div4_table);
126 if (!ret) 226 if (!ret)
127 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 227 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
128 228
129 return ret; 229 return ret;
130} 230}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index af69fd468703..105a6d41b569 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -13,6 +13,8 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/clk.h>
17#include <asm/clkdev.h>
16#include <asm/clock.h> 18#include <asm/clock.h>
17#include <asm/freq.h> 19#include <asm/freq.h>
18 20
@@ -21,8 +23,6 @@
21 * from the platform code. 23 * from the platform code.
22 */ 24 */
23static struct clk extal_clk = { 25static struct clk extal_clk = {
24 .name = "extal",
25 .id = -1,
26 .rate = 33333333, 26 .rate = 33333333,
27}; 27};
28 28
@@ -44,8 +44,6 @@ static struct clk_ops pll_clk_ops = {
44}; 44};
45 45
46static struct clk pll_clk = { 46static struct clk pll_clk = {
47 .name = "pll_clk",
48 .id = -1,
49 .ops = &pll_clk_ops, 47 .ops = &pll_clk_ops,
50 .parent = &extal_clk, 48 .parent = &extal_clk,
51 .flags = CLK_ENABLE_ON_INIT, 49 .flags = CLK_ENABLE_ON_INIT,
@@ -70,54 +68,191 @@ static struct clk_div4_table div4_table = {
70 68
71enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR }; 69enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR };
72 70
73#define DIV4(_str, _bit, _mask, _flags) \ 71#define DIV4(_bit, _mask, _flags) \
74 SH_CLK_DIV4(_str, &pll_clk, FRQMR1, _bit, _mask, _flags) 72 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
75 73
76struct clk div4_clks[DIV4_NR] = { 74struct clk div4_clks[DIV4_NR] = {
77 [DIV4_P] = DIV4("peripheral_clk", 0, 0x0b40, 0), 75 [DIV4_P] = DIV4(0, 0x0b40, 0),
78 [DIV4_DU] = DIV4("du_clk", 4, 0x0010, 0), 76 [DIV4_DU] = DIV4(4, 0x0010, 0),
79 [DIV4_DDR] = DIV4("ddr_clk", 12, 0x0002, CLK_ENABLE_ON_INIT), 77 [DIV4_DDR] = DIV4(12, 0x0002, CLK_ENABLE_ON_INIT),
80 [DIV4_B] = DIV4("bus_clk", 16, 0x0360, CLK_ENABLE_ON_INIT), 78 [DIV4_B] = DIV4(16, 0x0360, CLK_ENABLE_ON_INIT),
81 [DIV4_SH] = DIV4("shyway_clk", 20, 0x0002, CLK_ENABLE_ON_INIT), 79 [DIV4_SH] = DIV4(20, 0x0002, CLK_ENABLE_ON_INIT),
82 [DIV4_I] = DIV4("cpu_clk", 28, 0x0006, CLK_ENABLE_ON_INIT), 80 [DIV4_I] = DIV4(28, 0x0006, CLK_ENABLE_ON_INIT),
83}; 81};
84 82
85#define MSTPCR0 0xffc40030 83#define MSTPCR0 0xffc40030
86#define MSTPCR1 0xffc40034 84#define MSTPCR1 0xffc40034
87 85
88static struct clk mstp_clks[] = { 86enum { MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024,
87 MSTP023, MSTP022, MSTP021, MSTP020, MSTP017, MSTP016,
88 MSTP015, MSTP014, MSTP011, MSTP010, MSTP009, MSTP008,
89 MSTP005, MSTP004, MSTP002,
90 MSTP112, MSTP110, MSTP109, MSTP108,
91 MSTP105, MSTP104, MSTP103, MSTP102,
92 MSTP_NR };
93
94static struct clk mstp_clks[MSTP_NR] = {
89 /* MSTPCR0 */ 95 /* MSTPCR0 */
90 SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0), 96 [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0),
91 SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0), 97 [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0),
92 SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0), 98 [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0),
93 SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0), 99 [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0),
94 SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0), 100 [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0),
95 SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0), 101 [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0),
96 SH_CLK_MSTP32("ssi_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 23, 0), 102 [MSTP023] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
97 SH_CLK_MSTP32("ssi_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 22, 0), 103 [MSTP022] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
98 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0), 104 [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
99 SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0), 105 [MSTP020] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
100 SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0), 106 [MSTP017] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 17, 0),
101 SH_CLK_MSTP32("hac_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 16, 0), 107 [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0),
102 SH_CLK_MSTP32("i2c_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 15, 0), 108 [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
103 SH_CLK_MSTP32("i2c_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 14, 0), 109 [MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0),
104 SH_CLK_MSTP32("tmu9_11_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 11, 0), 110 [MSTP011] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 11, 0),
105 SH_CLK_MSTP32("tmu678_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 10, 0), 111 [MSTP010] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
106 SH_CLK_MSTP32("tmu345_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 9, 0), 112 [MSTP009] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0),
107 SH_CLK_MSTP32("tmu012_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 8, 0), 113 [MSTP008] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0),
108 SH_CLK_MSTP32("sdif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 5, 0), 114 [MSTP005] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 5, 0),
109 SH_CLK_MSTP32("sdif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 4, 0), 115 [MSTP004] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 4, 0),
110 SH_CLK_MSTP32("hspi_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 2, 0), 116 [MSTP002] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 2, 0),
111 117
112 /* MSTPCR1 */ 118 /* MSTPCR1 */
113 SH_CLK_MSTP32("usb_fck", -1, NULL, MSTPCR1, 12, 0), 119 [MSTP112] = SH_CLK_MSTP32(NULL, MSTPCR1, 12, 0),
114 SH_CLK_MSTP32("pcie_fck", 2, NULL, MSTPCR1, 10, 0), 120 [MSTP110] = SH_CLK_MSTP32(NULL, MSTPCR1, 10, 0),
115 SH_CLK_MSTP32("pcie_fck", 1, NULL, MSTPCR1, 9, 0), 121 [MSTP109] = SH_CLK_MSTP32(NULL, MSTPCR1, 9, 0),
116 SH_CLK_MSTP32("pcie_fck", 0, NULL, MSTPCR1, 8, 0), 122 [MSTP108] = SH_CLK_MSTP32(NULL, MSTPCR1, 8, 0),
117 SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0), 123 [MSTP105] = SH_CLK_MSTP32(NULL, MSTPCR1, 5, 0),
118 SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0), 124 [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
119 SH_CLK_MSTP32("du_fck", -1, NULL, MSTPCR1, 3, 0), 125 [MSTP103] = SH_CLK_MSTP32(NULL, MSTPCR1, 3, 0),
120 SH_CLK_MSTP32("ether_fck", -1, NULL, MSTPCR1, 2, 0), 126 [MSTP102] = SH_CLK_MSTP32(NULL, MSTPCR1, 2, 0),
127};
128
129#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
130
131static struct clk_lookup lookups[] = {
132 /* main clocks */
133 CLKDEV_CON_ID("extal", &extal_clk),
134 CLKDEV_CON_ID("pll_clk", &pll_clk),
135
136 /* DIV4 clocks */
137 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
138 CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
139 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
140 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
141 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
142 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
143
144 /* MSTP32 clocks */
145 {
146 /* SCIF5 */
147 .dev_id = "sh-sci.5",
148 .con_id = "sci_fck",
149 .clk = &mstp_clks[MSTP029],
150 }, {
151 /* SCIF4 */
152 .dev_id = "sh-sci.4",
153 .con_id = "sci_fck",
154 .clk = &mstp_clks[MSTP028],
155 }, {
156 /* SCIF3 */
157 .dev_id = "sh-sci.3",
158 .con_id = "sci_fck",
159 .clk = &mstp_clks[MSTP027],
160 }, {
161 /* SCIF2 */
162 .dev_id = "sh-sci.2",
163 .con_id = "sci_fck",
164 .clk = &mstp_clks[MSTP026],
165 }, {
166 /* SCIF1 */
167 .dev_id = "sh-sci.1",
168 .con_id = "sci_fck",
169 .clk = &mstp_clks[MSTP025],
170 }, {
171 /* SCIF0 */
172 .dev_id = "sh-sci.0",
173 .con_id = "sci_fck",
174 .clk = &mstp_clks[MSTP024],
175 },
176 CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]),
177 CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]),
178 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
179 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
180 CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP017]),
181 CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
182 CLKDEV_CON_ID("i2c1_fck", &mstp_clks[MSTP015]),
183 CLKDEV_CON_ID("i2c0_fck", &mstp_clks[MSTP014]),
184 {
185 /* TMU0 */
186 .dev_id = "sh_tmu.0",
187 .con_id = "tmu_fck",
188 .clk = &mstp_clks[MSTP008],
189 }, {
190 /* TMU1 */
191 .dev_id = "sh_tmu.1",
192 .con_id = "tmu_fck",
193 .clk = &mstp_clks[MSTP008],
194 }, {
195 /* TMU2 */
196 .dev_id = "sh_tmu.2",
197 .con_id = "tmu_fck",
198 .clk = &mstp_clks[MSTP008],
199 }, {
200 /* TMU3 */
201 .dev_id = "sh_tmu.3",
202 .con_id = "tmu_fck",
203 .clk = &mstp_clks[MSTP009],
204 }, {
205 /* TMU4 */
206 .dev_id = "sh_tmu.4",
207 .con_id = "tmu_fck",
208 .clk = &mstp_clks[MSTP009],
209 }, {
210 /* TMU5 */
211 .dev_id = "sh_tmu.5",
212 .con_id = "tmu_fck",
213 .clk = &mstp_clks[MSTP009],
214 }, {
215 /* TMU6 */
216 .dev_id = "sh_tmu.6",
217 .con_id = "tmu_fck",
218 .clk = &mstp_clks[MSTP010],
219 }, {
220 /* TMU7 */
221 .dev_id = "sh_tmu.7",
222 .con_id = "tmu_fck",
223 .clk = &mstp_clks[MSTP010],
224 }, {
225 /* TMU8 */
226 .dev_id = "sh_tmu.8",
227 .con_id = "tmu_fck",
228 .clk = &mstp_clks[MSTP010],
229 }, {
230 /* TMU9 */
231 .dev_id = "sh_tmu.9",
232 .con_id = "tmu_fck",
233 .clk = &mstp_clks[MSTP011],
234 }, {
235 /* TMU10 */
236 .dev_id = "sh_tmu.10",
237 .con_id = "tmu_fck",
238 .clk = &mstp_clks[MSTP011],
239 }, {
240 /* TMU11 */
241 .dev_id = "sh_tmu.11",
242 .con_id = "tmu_fck",
243 .clk = &mstp_clks[MSTP011],
244 },
245 CLKDEV_CON_ID("sdif1_fck", &mstp_clks[MSTP005]),
246 CLKDEV_CON_ID("sdif0_fck", &mstp_clks[MSTP004]),
247 CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
248 CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP112]),
249 CLKDEV_CON_ID("pcie2_fck", &mstp_clks[MSTP110]),
250 CLKDEV_CON_ID("pcie1_fck", &mstp_clks[MSTP109]),
251 CLKDEV_CON_ID("pcie0_fck", &mstp_clks[MSTP108]),
252 CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
253 CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]),
254 CLKDEV_CON_ID("du_fck", &mstp_clks[MSTP103]),
255 CLKDEV_CON_ID("ether_fck", &mstp_clks[MSTP102]),
121}; 256};
122 257
123int __init arch_clk_init(void) 258int __init arch_clk_init(void)
@@ -126,12 +261,14 @@ int __init arch_clk_init(void)
126 261
127 for (i = 0; i < ARRAY_SIZE(clks); i++) 262 for (i = 0; i < ARRAY_SIZE(clks); i++)
128 ret |= clk_register(clks[i]); 263 ret |= clk_register(clks[i]);
264 for (i = 0; i < ARRAY_SIZE(lookups); i++)
265 clkdev_add(&lookups[i]);
129 266
130 if (!ret) 267 if (!ret)
131 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 268 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
132 &div4_table); 269 &div4_table);
133 if (!ret) 270 if (!ret)
134 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 271 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
135 272
136 return ret; 273 return ret;
137} 274}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index e75c57bdfa5e..236a6282d778 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -13,9 +13,10 @@
13 */ 13 */
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h>
17#include <asm/clkdev.h>
16#include <asm/clock.h> 18#include <asm/clock.h>
17#include <asm/freq.h> 19#include <asm/freq.h>
18#include <asm/io.h>
19 20
20static int ifc_divisors[] = { 1, 2, 4 ,6 }; 21static int ifc_divisors[] = { 1, 2, 4 ,6 };
21static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 18, 24, 32, 36, 48 }; 22static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 18, 24, 32, 36, 48 };
@@ -94,7 +95,6 @@ static struct clk_ops shx3_shyway_clk_ops = {
94}; 95};
95 96
96static struct clk shx3_shyway_clk = { 97static struct clk shx3_shyway_clk = {
97 .name = "shyway_clk",
98 .flags = CLK_ENABLE_ON_INIT, 98 .flags = CLK_ENABLE_ON_INIT,
99 .ops = &shx3_shyway_clk_ops, 99 .ops = &shx3_shyway_clk_ops,
100}; 100};
@@ -107,6 +107,13 @@ static struct clk *shx3_onchip_clocks[] = {
107 &shx3_shyway_clk, 107 &shx3_shyway_clk,
108}; 108};
109 109
110#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
111
112static struct clk_lookup lookups[] = {
113 /* main clocks */
114 CLKDEV_CON_ID("shyway_clk", &shx3_shyway_clk),
115};
116
110int __init arch_clk_init(void) 117int __init arch_clk_init(void)
111{ 118{
112 struct clk *clk; 119 struct clk *clk;
@@ -124,5 +131,7 @@ int __init arch_clk_init(void)
124 131
125 clk_put(clk); 132 clk_put(clk);
126 133
134 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
135
127 return ret; 136 return ret;
128} 137}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 45eb1bfd42c9..3681cafdb4af 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -21,7 +21,6 @@ static struct plat_sci_port scif0_platform_data = {
21 .flags = UPF_BOOT_AUTOCONF, 21 .flags = UPF_BOOT_AUTOCONF,
22 .type = PORT_SCIF, 22 .type = PORT_SCIF,
23 .irqs = { 80, 80, 80, 80 }, 23 .irqs = { 80, 80, 80, 80 },
24 .clk = "scif0",
25}; 24};
26 25
27static struct platform_device scif0_device = { 26static struct platform_device scif0_device = {
@@ -37,7 +36,6 @@ static struct plat_sci_port scif1_platform_data = {
37 .flags = UPF_BOOT_AUTOCONF, 36 .flags = UPF_BOOT_AUTOCONF,
38 .type = PORT_SCIF, 37 .type = PORT_SCIF,
39 .irqs = { 81, 81, 81, 81 }, 38 .irqs = { 81, 81, 81, 81 },
40 .clk = "scif1",
41}; 39};
42 40
43static struct platform_device scif1_device = { 41static struct platform_device scif1_device = {
@@ -53,7 +51,6 @@ static struct plat_sci_port scif2_platform_data = {
53 .flags = UPF_BOOT_AUTOCONF, 51 .flags = UPF_BOOT_AUTOCONF,
54 .type = PORT_SCIF, 52 .type = PORT_SCIF,
55 .irqs = { 82, 82, 82, 82 }, 53 .irqs = { 82, 82, 82, 82 },
56 .clk = "scif2",
57}; 54};
58 55
59static struct platform_device scif2_device = { 56static struct platform_device scif2_device = {
@@ -69,7 +66,6 @@ static struct plat_sci_port scif3_platform_data = {
69 .flags = UPF_BOOT_AUTOCONF, 66 .flags = UPF_BOOT_AUTOCONF,
70 .type = PORT_SCIF, 67 .type = PORT_SCIF,
71 .irqs = { 83, 83, 83, 83 }, 68 .irqs = { 83, 83, 83, 83 },
72 .clk = "scif3",
73}; 69};
74 70
75static struct platform_device scif3_device = { 71static struct platform_device scif3_device = {
@@ -207,17 +203,14 @@ static struct platform_device jpu_device = {
207}; 203};
208 204
209static struct sh_timer_config cmt_platform_data = { 205static struct sh_timer_config cmt_platform_data = {
210 .name = "CMT",
211 .channel_offset = 0x60, 206 .channel_offset = 0x60,
212 .timer_bit = 5, 207 .timer_bit = 5,
213 .clk = "cmt0",
214 .clockevent_rating = 125, 208 .clockevent_rating = 125,
215 .clocksource_rating = 200, 209 .clocksource_rating = 200,
216}; 210};
217 211
218static struct resource cmt_resources[] = { 212static struct resource cmt_resources[] = {
219 [0] = { 213 [0] = {
220 .name = "CMT",
221 .start = 0x044a0060, 214 .start = 0x044a0060,
222 .end = 0x044a006b, 215 .end = 0x044a006b,
223 .flags = IORESOURCE_MEM, 216 .flags = IORESOURCE_MEM,
@@ -239,16 +232,13 @@ static struct platform_device cmt_device = {
239}; 232};
240 233
241static struct sh_timer_config tmu0_platform_data = { 234static struct sh_timer_config tmu0_platform_data = {
242 .name = "TMU0",
243 .channel_offset = 0x04, 235 .channel_offset = 0x04,
244 .timer_bit = 0, 236 .timer_bit = 0,
245 .clk = "tmu0",
246 .clockevent_rating = 200, 237 .clockevent_rating = 200,
247}; 238};
248 239
249static struct resource tmu0_resources[] = { 240static struct resource tmu0_resources[] = {
250 [0] = { 241 [0] = {
251 .name = "TMU0",
252 .start = 0xffd80008, 242 .start = 0xffd80008,
253 .end = 0xffd80013, 243 .end = 0xffd80013,
254 .flags = IORESOURCE_MEM, 244 .flags = IORESOURCE_MEM,
@@ -270,16 +260,13 @@ static struct platform_device tmu0_device = {
270}; 260};
271 261
272static struct sh_timer_config tmu1_platform_data = { 262static struct sh_timer_config tmu1_platform_data = {
273 .name = "TMU1",
274 .channel_offset = 0x10, 263 .channel_offset = 0x10,
275 .timer_bit = 1, 264 .timer_bit = 1,
276 .clk = "tmu0",
277 .clocksource_rating = 200, 265 .clocksource_rating = 200,
278}; 266};
279 267
280static struct resource tmu1_resources[] = { 268static struct resource tmu1_resources[] = {
281 [0] = { 269 [0] = {
282 .name = "TMU1",
283 .start = 0xffd80014, 270 .start = 0xffd80014,
284 .end = 0xffd8001f, 271 .end = 0xffd8001f,
285 .flags = IORESOURCE_MEM, 272 .flags = IORESOURCE_MEM,
@@ -301,15 +288,12 @@ static struct platform_device tmu1_device = {
301}; 288};
302 289
303static struct sh_timer_config tmu2_platform_data = { 290static struct sh_timer_config tmu2_platform_data = {
304 .name = "TMU2",
305 .channel_offset = 0x1c, 291 .channel_offset = 0x1c,
306 .timer_bit = 2, 292 .timer_bit = 2,
307 .clk = "tmu0",
308}; 293};
309 294
310static struct resource tmu2_resources[] = { 295static struct resource tmu2_resources[] = {
311 [0] = { 296 [0] = {
312 .name = "TMU2",
313 .start = 0xffd80020, 297 .start = 0xffd80020,
314 .end = 0xffd8002b, 298 .end = 0xffd8002b,
315 .flags = IORESOURCE_MEM, 299 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index c494c193e3b6..8dab9e1bbd89 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -23,7 +23,6 @@ static struct plat_sci_port scif0_platform_data = {
23 .flags = UPF_BOOT_AUTOCONF, 23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF, 24 .type = PORT_SCIF,
25 .irqs = { 80, 80, 80, 80 }, 25 .irqs = { 80, 80, 80, 80 },
26 .clk = "scif0",
27}; 26};
28 27
29static struct platform_device scif0_device = { 28static struct platform_device scif0_device = {
@@ -169,17 +168,14 @@ static struct platform_device veu1_device = {
169}; 168};
170 169
171static struct sh_timer_config cmt_platform_data = { 170static struct sh_timer_config cmt_platform_data = {
172 .name = "CMT",
173 .channel_offset = 0x60, 171 .channel_offset = 0x60,
174 .timer_bit = 5, 172 .timer_bit = 5,
175 .clk = "cmt0",
176 .clockevent_rating = 125, 173 .clockevent_rating = 125,
177 .clocksource_rating = 200, 174 .clocksource_rating = 200,
178}; 175};
179 176
180static struct resource cmt_resources[] = { 177static struct resource cmt_resources[] = {
181 [0] = { 178 [0] = {
182 .name = "CMT",
183 .start = 0x044a0060, 179 .start = 0x044a0060,
184 .end = 0x044a006b, 180 .end = 0x044a006b,
185 .flags = IORESOURCE_MEM, 181 .flags = IORESOURCE_MEM,
@@ -201,16 +197,13 @@ static struct platform_device cmt_device = {
201}; 197};
202 198
203static struct sh_timer_config tmu0_platform_data = { 199static struct sh_timer_config tmu0_platform_data = {
204 .name = "TMU0",
205 .channel_offset = 0x04, 200 .channel_offset = 0x04,
206 .timer_bit = 0, 201 .timer_bit = 0,
207 .clk = "tmu0",
208 .clockevent_rating = 200, 202 .clockevent_rating = 200,
209}; 203};
210 204
211static struct resource tmu0_resources[] = { 205static struct resource tmu0_resources[] = {
212 [0] = { 206 [0] = {
213 .name = "TMU0",
214 .start = 0xffd80008, 207 .start = 0xffd80008,
215 .end = 0xffd80013, 208 .end = 0xffd80013,
216 .flags = IORESOURCE_MEM, 209 .flags = IORESOURCE_MEM,
@@ -232,16 +225,13 @@ static struct platform_device tmu0_device = {
232}; 225};
233 226
234static struct sh_timer_config tmu1_platform_data = { 227static struct sh_timer_config tmu1_platform_data = {
235 .name = "TMU1",
236 .channel_offset = 0x10, 228 .channel_offset = 0x10,
237 .timer_bit = 1, 229 .timer_bit = 1,
238 .clk = "tmu0",
239 .clocksource_rating = 200, 230 .clocksource_rating = 200,
240}; 231};
241 232
242static struct resource tmu1_resources[] = { 233static struct resource tmu1_resources[] = {
243 [0] = { 234 [0] = {
244 .name = "TMU1",
245 .start = 0xffd80014, 235 .start = 0xffd80014,
246 .end = 0xffd8001f, 236 .end = 0xffd8001f,
247 .flags = IORESOURCE_MEM, 237 .flags = IORESOURCE_MEM,
@@ -263,15 +253,12 @@ static struct platform_device tmu1_device = {
263}; 253};
264 254
265static struct sh_timer_config tmu2_platform_data = { 255static struct sh_timer_config tmu2_platform_data = {
266 .name = "TMU2",
267 .channel_offset = 0x1c, 256 .channel_offset = 0x1c,
268 .timer_bit = 2, 257 .timer_bit = 2,
269 .clk = "tmu0",
270}; 258};
271 259
272static struct resource tmu2_resources[] = { 260static struct resource tmu2_resources[] = {
273 [0] = { 261 [0] = {
274 .name = "TMU2",
275 .start = 0xffd80020, 262 .start = 0xffd80020,
276 .end = 0xffd8002b, 263 .end = 0xffd8002b,
277 .flags = IORESOURCE_MEM, 264 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index fd7e3639e845..24c6167a7181 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -24,7 +24,7 @@
24#include <cpu/dma-register.h> 24#include <cpu/dma-register.h>
25#include <cpu/sh7722.h> 25#include <cpu/sh7722.h>
26 26
27static struct sh_dmae_slave_config sh7722_dmae_slaves[] = { 27static const struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
28 { 28 {
29 .slave_id = SHDMA_SLAVE_SCIF0_TX, 29 .slave_id = SHDMA_SLAVE_SCIF0_TX,
30 .addr = 0xffe0000c, 30 .addr = 0xffe0000c,
@@ -78,7 +78,7 @@ static struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
78 }, 78 },
79}; 79};
80 80
81static struct sh_dmae_channel sh7722_dmae_channels[] = { 81static const struct sh_dmae_channel sh7722_dmae_channels[] = {
82 { 82 {
83 .offset = 0, 83 .offset = 0,
84 .dmars = 0, 84 .dmars = 0,
@@ -106,7 +106,7 @@ static struct sh_dmae_channel sh7722_dmae_channels[] = {
106 } 106 }
107}; 107};
108 108
109static unsigned int ts_shift[] = TS_SHIFT; 109static const unsigned int ts_shift[] = TS_SHIFT;
110 110
111static struct sh_dmae_pdata dma_platform_data = { 111static struct sh_dmae_pdata dma_platform_data = {
112 .slave = sh7722_dmae_slaves, 112 .slave = sh7722_dmae_slaves,
@@ -174,7 +174,6 @@ static struct plat_sci_port scif0_platform_data = {
174 .flags = UPF_BOOT_AUTOCONF, 174 .flags = UPF_BOOT_AUTOCONF,
175 .type = PORT_SCIF, 175 .type = PORT_SCIF,
176 .irqs = { 80, 80, 80, 80 }, 176 .irqs = { 80, 80, 80, 80 },
177 .clk = "scif0",
178}; 177};
179 178
180static struct platform_device scif0_device = { 179static struct platform_device scif0_device = {
@@ -190,7 +189,6 @@ static struct plat_sci_port scif1_platform_data = {
190 .flags = UPF_BOOT_AUTOCONF, 189 .flags = UPF_BOOT_AUTOCONF,
191 .type = PORT_SCIF, 190 .type = PORT_SCIF,
192 .irqs = { 81, 81, 81, 81 }, 191 .irqs = { 81, 81, 81, 81 },
193 .clk = "scif1",
194}; 192};
195 193
196static struct platform_device scif1_device = { 194static struct platform_device scif1_device = {
@@ -206,7 +204,6 @@ static struct plat_sci_port scif2_platform_data = {
206 .flags = UPF_BOOT_AUTOCONF, 204 .flags = UPF_BOOT_AUTOCONF,
207 .type = PORT_SCIF, 205 .type = PORT_SCIF,
208 .irqs = { 82, 82, 82, 82 }, 206 .irqs = { 82, 82, 82, 82 },
209 .clk = "scif2",
210}; 207};
211 208
212static struct platform_device scif2_device = { 209static struct platform_device scif2_device = {
@@ -401,17 +398,14 @@ static struct platform_device jpu_device = {
401}; 398};
402 399
403static struct sh_timer_config cmt_platform_data = { 400static struct sh_timer_config cmt_platform_data = {
404 .name = "CMT",
405 .channel_offset = 0x60, 401 .channel_offset = 0x60,
406 .timer_bit = 5, 402 .timer_bit = 5,
407 .clk = "cmt0",
408 .clockevent_rating = 125, 403 .clockevent_rating = 125,
409 .clocksource_rating = 125, 404 .clocksource_rating = 125,
410}; 405};
411 406
412static struct resource cmt_resources[] = { 407static struct resource cmt_resources[] = {
413 [0] = { 408 [0] = {
414 .name = "CMT",
415 .start = 0x044a0060, 409 .start = 0x044a0060,
416 .end = 0x044a006b, 410 .end = 0x044a006b,
417 .flags = IORESOURCE_MEM, 411 .flags = IORESOURCE_MEM,
@@ -436,16 +430,13 @@ static struct platform_device cmt_device = {
436}; 430};
437 431
438static struct sh_timer_config tmu0_platform_data = { 432static struct sh_timer_config tmu0_platform_data = {
439 .name = "TMU0",
440 .channel_offset = 0x04, 433 .channel_offset = 0x04,
441 .timer_bit = 0, 434 .timer_bit = 0,
442 .clk = "tmu0",
443 .clockevent_rating = 200, 435 .clockevent_rating = 200,
444}; 436};
445 437
446static struct resource tmu0_resources[] = { 438static struct resource tmu0_resources[] = {
447 [0] = { 439 [0] = {
448 .name = "TMU0",
449 .start = 0xffd80008, 440 .start = 0xffd80008,
450 .end = 0xffd80013, 441 .end = 0xffd80013,
451 .flags = IORESOURCE_MEM, 442 .flags = IORESOURCE_MEM,
@@ -470,16 +461,13 @@ static struct platform_device tmu0_device = {
470}; 461};
471 462
472static struct sh_timer_config tmu1_platform_data = { 463static struct sh_timer_config tmu1_platform_data = {
473 .name = "TMU1",
474 .channel_offset = 0x10, 464 .channel_offset = 0x10,
475 .timer_bit = 1, 465 .timer_bit = 1,
476 .clk = "tmu0",
477 .clocksource_rating = 200, 466 .clocksource_rating = 200,
478}; 467};
479 468
480static struct resource tmu1_resources[] = { 469static struct resource tmu1_resources[] = {
481 [0] = { 470 [0] = {
482 .name = "TMU1",
483 .start = 0xffd80014, 471 .start = 0xffd80014,
484 .end = 0xffd8001f, 472 .end = 0xffd8001f,
485 .flags = IORESOURCE_MEM, 473 .flags = IORESOURCE_MEM,
@@ -504,15 +492,12 @@ static struct platform_device tmu1_device = {
504}; 492};
505 493
506static struct sh_timer_config tmu2_platform_data = { 494static struct sh_timer_config tmu2_platform_data = {
507 .name = "TMU2",
508 .channel_offset = 0x1c, 495 .channel_offset = 0x1c,
509 .timer_bit = 2, 496 .timer_bit = 2,
510 .clk = "tmu0",
511}; 497};
512 498
513static struct resource tmu2_resources[] = { 499static struct resource tmu2_resources[] = {
514 [0] = { 500 [0] = {
515 .name = "TMU2",
516 .start = 0xffd80020, 501 .start = 0xffd80020,
517 .end = 0xffd8002b, 502 .end = 0xffd8002b,
518 .flags = IORESOURCE_MEM, 503 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 85c61f624702..0eadefdbbba1 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -26,7 +26,6 @@ static struct plat_sci_port scif0_platform_data = {
26 .flags = UPF_BOOT_AUTOCONF, 26 .flags = UPF_BOOT_AUTOCONF,
27 .type = PORT_SCIF, 27 .type = PORT_SCIF,
28 .irqs = { 80, 80, 80, 80 }, 28 .irqs = { 80, 80, 80, 80 },
29 .clk = "scif0",
30}; 29};
31 30
32static struct platform_device scif0_device = { 31static struct platform_device scif0_device = {
@@ -42,7 +41,6 @@ static struct plat_sci_port scif1_platform_data = {
42 .flags = UPF_BOOT_AUTOCONF, 41 .flags = UPF_BOOT_AUTOCONF,
43 .type = PORT_SCIF, 42 .type = PORT_SCIF,
44 .irqs = { 81, 81, 81, 81 }, 43 .irqs = { 81, 81, 81, 81 },
45 .clk = "scif1",
46}; 44};
47 45
48static struct platform_device scif1_device = { 46static struct platform_device scif1_device = {
@@ -58,7 +56,6 @@ static struct plat_sci_port scif2_platform_data = {
58 .flags = UPF_BOOT_AUTOCONF, 56 .flags = UPF_BOOT_AUTOCONF,
59 .type = PORT_SCIF, 57 .type = PORT_SCIF,
60 .irqs = { 82, 82, 82, 82 }, 58 .irqs = { 82, 82, 82, 82 },
61 .clk = "scif2",
62}; 59};
63 60
64static struct platform_device scif2_device = { 61static struct platform_device scif2_device = {
@@ -74,7 +71,6 @@ static struct plat_sci_port scif3_platform_data = {
74 .flags = UPF_BOOT_AUTOCONF, 71 .flags = UPF_BOOT_AUTOCONF,
75 .type = PORT_SCIFA, 72 .type = PORT_SCIFA,
76 .irqs = { 56, 56, 56, 56 }, 73 .irqs = { 56, 56, 56, 56 },
77 .clk = "scif3",
78}; 74};
79 75
80static struct platform_device scif3_device = { 76static struct platform_device scif3_device = {
@@ -90,7 +86,6 @@ static struct plat_sci_port scif4_platform_data = {
90 .flags = UPF_BOOT_AUTOCONF, 86 .flags = UPF_BOOT_AUTOCONF,
91 .type = PORT_SCIFA, 87 .type = PORT_SCIFA,
92 .irqs = { 88, 88, 88, 88 }, 88 .irqs = { 88, 88, 88, 88 },
93 .clk = "scif4",
94}; 89};
95 90
96static struct platform_device scif4_device = { 91static struct platform_device scif4_device = {
@@ -106,7 +101,6 @@ static struct plat_sci_port scif5_platform_data = {
106 .flags = UPF_BOOT_AUTOCONF, 101 .flags = UPF_BOOT_AUTOCONF,
107 .type = PORT_SCIFA, 102 .type = PORT_SCIFA,
108 .irqs = { 109, 109, 109, 109 }, 103 .irqs = { 109, 109, 109, 109 },
109 .clk = "scif5",
110}; 104};
111 105
112static struct platform_device scif5_device = { 106static struct platform_device scif5_device = {
@@ -211,17 +205,14 @@ static struct platform_device veu1_device = {
211}; 205};
212 206
213static struct sh_timer_config cmt_platform_data = { 207static struct sh_timer_config cmt_platform_data = {
214 .name = "CMT",
215 .channel_offset = 0x60, 208 .channel_offset = 0x60,
216 .timer_bit = 5, 209 .timer_bit = 5,
217 .clk = "cmt0",
218 .clockevent_rating = 125, 210 .clockevent_rating = 125,
219 .clocksource_rating = 125, 211 .clocksource_rating = 125,
220}; 212};
221 213
222static struct resource cmt_resources[] = { 214static struct resource cmt_resources[] = {
223 [0] = { 215 [0] = {
224 .name = "CMT",
225 .start = 0x044a0060, 216 .start = 0x044a0060,
226 .end = 0x044a006b, 217 .end = 0x044a006b,
227 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
@@ -246,16 +237,13 @@ static struct platform_device cmt_device = {
246}; 237};
247 238
248static struct sh_timer_config tmu0_platform_data = { 239static struct sh_timer_config tmu0_platform_data = {
249 .name = "TMU0",
250 .channel_offset = 0x04, 240 .channel_offset = 0x04,
251 .timer_bit = 0, 241 .timer_bit = 0,
252 .clk = "tmu0",
253 .clockevent_rating = 200, 242 .clockevent_rating = 200,
254}; 243};
255 244
256static struct resource tmu0_resources[] = { 245static struct resource tmu0_resources[] = {
257 [0] = { 246 [0] = {
258 .name = "TMU0",
259 .start = 0xffd80008, 247 .start = 0xffd80008,
260 .end = 0xffd80013, 248 .end = 0xffd80013,
261 .flags = IORESOURCE_MEM, 249 .flags = IORESOURCE_MEM,
@@ -280,16 +268,13 @@ static struct platform_device tmu0_device = {
280}; 268};
281 269
282static struct sh_timer_config tmu1_platform_data = { 270static struct sh_timer_config tmu1_platform_data = {
283 .name = "TMU1",
284 .channel_offset = 0x10, 271 .channel_offset = 0x10,
285 .timer_bit = 1, 272 .timer_bit = 1,
286 .clk = "tmu0",
287 .clocksource_rating = 200, 273 .clocksource_rating = 200,
288}; 274};
289 275
290static struct resource tmu1_resources[] = { 276static struct resource tmu1_resources[] = {
291 [0] = { 277 [0] = {
292 .name = "TMU1",
293 .start = 0xffd80014, 278 .start = 0xffd80014,
294 .end = 0xffd8001f, 279 .end = 0xffd8001f,
295 .flags = IORESOURCE_MEM, 280 .flags = IORESOURCE_MEM,
@@ -314,15 +299,12 @@ static struct platform_device tmu1_device = {
314}; 299};
315 300
316static struct sh_timer_config tmu2_platform_data = { 301static struct sh_timer_config tmu2_platform_data = {
317 .name = "TMU2",
318 .channel_offset = 0x1c, 302 .channel_offset = 0x1c,
319 .timer_bit = 2, 303 .timer_bit = 2,
320 .clk = "tmu0",
321}; 304};
322 305
323static struct resource tmu2_resources[] = { 306static struct resource tmu2_resources[] = {
324 [0] = { 307 [0] = {
325 .name = "TMU2",
326 .start = 0xffd80020, 308 .start = 0xffd80020,
327 .end = 0xffd8002b, 309 .end = 0xffd8002b,
328 .flags = IORESOURCE_MEM, 310 .flags = IORESOURCE_MEM,
@@ -347,15 +329,12 @@ static struct platform_device tmu2_device = {
347}; 329};
348 330
349static struct sh_timer_config tmu3_platform_data = { 331static struct sh_timer_config tmu3_platform_data = {
350 .name = "TMU3",
351 .channel_offset = 0x04, 332 .channel_offset = 0x04,
352 .timer_bit = 0, 333 .timer_bit = 0,
353 .clk = "tmu1",
354}; 334};
355 335
356static struct resource tmu3_resources[] = { 336static struct resource tmu3_resources[] = {
357 [0] = { 337 [0] = {
358 .name = "TMU3",
359 .start = 0xffd90008, 338 .start = 0xffd90008,
360 .end = 0xffd90013, 339 .end = 0xffd90013,
361 .flags = IORESOURCE_MEM, 340 .flags = IORESOURCE_MEM,
@@ -380,15 +359,12 @@ static struct platform_device tmu3_device = {
380}; 359};
381 360
382static struct sh_timer_config tmu4_platform_data = { 361static struct sh_timer_config tmu4_platform_data = {
383 .name = "TMU4",
384 .channel_offset = 0x10, 362 .channel_offset = 0x10,
385 .timer_bit = 1, 363 .timer_bit = 1,
386 .clk = "tmu1",
387}; 364};
388 365
389static struct resource tmu4_resources[] = { 366static struct resource tmu4_resources[] = {
390 [0] = { 367 [0] = {
391 .name = "TMU4",
392 .start = 0xffd90014, 368 .start = 0xffd90014,
393 .end = 0xffd9001f, 369 .end = 0xffd9001f,
394 .flags = IORESOURCE_MEM, 370 .flags = IORESOURCE_MEM,
@@ -413,15 +389,12 @@ static struct platform_device tmu4_device = {
413}; 389};
414 390
415static struct sh_timer_config tmu5_platform_data = { 391static struct sh_timer_config tmu5_platform_data = {
416 .name = "TMU5",
417 .channel_offset = 0x1c, 392 .channel_offset = 0x1c,
418 .timer_bit = 2, 393 .timer_bit = 2,
419 .clk = "tmu1",
420}; 394};
421 395
422static struct resource tmu5_resources[] = { 396static struct resource tmu5_resources[] = {
423 [0] = { 397 [0] = {
424 .name = "TMU5",
425 .start = 0xffd90020, 398 .start = 0xffd90020,
426 .end = 0xffd9002b, 399 .end = 0xffd9002b,
427 .flags = IORESOURCE_MEM, 400 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index e7fa2a92fc1f..89fe16d20fdb 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -31,7 +31,7 @@
31#include <cpu/sh7724.h> 31#include <cpu/sh7724.h>
32 32
33/* DMA */ 33/* DMA */
34static struct sh_dmae_channel sh7724_dmae0_channels[] = { 34static const struct sh_dmae_channel sh7724_dmae_channels[] = {
35 { 35 {
36 .offset = 0, 36 .offset = 0,
37 .dmars = 0, 37 .dmars = 0,
@@ -59,51 +59,11 @@ static struct sh_dmae_channel sh7724_dmae0_channels[] = {
59 } 59 }
60}; 60};
61 61
62static struct sh_dmae_channel sh7724_dmae1_channels[] = { 62static const unsigned int ts_shift[] = TS_SHIFT;
63 {
64 .offset = 0,
65 .dmars = 0,
66 .dmars_bit = 0,
67 }, {
68 .offset = 0x10,
69 .dmars = 0,
70 .dmars_bit = 8,
71 }, {
72 .offset = 0x20,
73 .dmars = 4,
74 .dmars_bit = 0,
75 }, {
76 .offset = 0x30,
77 .dmars = 4,
78 .dmars_bit = 8,
79 }, {
80 .offset = 0x50,
81 .dmars = 8,
82 .dmars_bit = 0,
83 }, {
84 .offset = 0x60,
85 .dmars = 8,
86 .dmars_bit = 8,
87 }
88};
89
90static unsigned int ts_shift[] = TS_SHIFT;
91
92static struct sh_dmae_pdata dma0_platform_data = {
93 .channel = sh7724_dmae0_channels,
94 .channel_num = ARRAY_SIZE(sh7724_dmae0_channels),
95 .ts_low_shift = CHCR_TS_LOW_SHIFT,
96 .ts_low_mask = CHCR_TS_LOW_MASK,
97 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
98 .ts_high_mask = CHCR_TS_HIGH_MASK,
99 .ts_shift = ts_shift,
100 .ts_shift_num = ARRAY_SIZE(ts_shift),
101 .dmaor_init = DMAOR_INIT,
102};
103 63
104static struct sh_dmae_pdata dma1_platform_data = { 64static struct sh_dmae_pdata dma_platform_data = {
105 .channel = sh7724_dmae1_channels, 65 .channel = sh7724_dmae_channels,
106 .channel_num = ARRAY_SIZE(sh7724_dmae1_channels), 66 .channel_num = ARRAY_SIZE(sh7724_dmae_channels),
107 .ts_low_shift = CHCR_TS_LOW_SHIFT, 67 .ts_low_shift = CHCR_TS_LOW_SHIFT,
108 .ts_low_mask = CHCR_TS_LOW_MASK, 68 .ts_low_mask = CHCR_TS_LOW_MASK,
109 .ts_high_shift = CHCR_TS_HIGH_SHIFT, 69 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
@@ -187,7 +147,7 @@ static struct platform_device dma0_device = {
187 .resource = sh7724_dmae0_resources, 147 .resource = sh7724_dmae0_resources,
188 .num_resources = ARRAY_SIZE(sh7724_dmae0_resources), 148 .num_resources = ARRAY_SIZE(sh7724_dmae0_resources),
189 .dev = { 149 .dev = {
190 .platform_data = &dma0_platform_data, 150 .platform_data = &dma_platform_data,
191 }, 151 },
192 .archdata = { 152 .archdata = {
193 .hwblk_id = HWBLK_DMAC0, 153 .hwblk_id = HWBLK_DMAC0,
@@ -200,7 +160,7 @@ static struct platform_device dma1_device = {
200 .resource = sh7724_dmae1_resources, 160 .resource = sh7724_dmae1_resources,
201 .num_resources = ARRAY_SIZE(sh7724_dmae1_resources), 161 .num_resources = ARRAY_SIZE(sh7724_dmae1_resources),
202 .dev = { 162 .dev = {
203 .platform_data = &dma1_platform_data, 163 .platform_data = &dma_platform_data,
204 }, 164 },
205 .archdata = { 165 .archdata = {
206 .hwblk_id = HWBLK_DMAC1, 166 .hwblk_id = HWBLK_DMAC1,
@@ -213,7 +173,6 @@ static struct plat_sci_port scif0_platform_data = {
213 .flags = UPF_BOOT_AUTOCONF, 173 .flags = UPF_BOOT_AUTOCONF,
214 .type = PORT_SCIF, 174 .type = PORT_SCIF,
215 .irqs = { 80, 80, 80, 80 }, 175 .irqs = { 80, 80, 80, 80 },
216 .clk = "scif0",
217}; 176};
218 177
219static struct platform_device scif0_device = { 178static struct platform_device scif0_device = {
@@ -229,7 +188,6 @@ static struct plat_sci_port scif1_platform_data = {
229 .flags = UPF_BOOT_AUTOCONF, 188 .flags = UPF_BOOT_AUTOCONF,
230 .type = PORT_SCIF, 189 .type = PORT_SCIF,
231 .irqs = { 81, 81, 81, 81 }, 190 .irqs = { 81, 81, 81, 81 },
232 .clk = "scif1",
233}; 191};
234 192
235static struct platform_device scif1_device = { 193static struct platform_device scif1_device = {
@@ -245,7 +203,6 @@ static struct plat_sci_port scif2_platform_data = {
245 .flags = UPF_BOOT_AUTOCONF, 203 .flags = UPF_BOOT_AUTOCONF,
246 .type = PORT_SCIF, 204 .type = PORT_SCIF,
247 .irqs = { 82, 82, 82, 82 }, 205 .irqs = { 82, 82, 82, 82 },
248 .clk = "scif2",
249}; 206};
250 207
251static struct platform_device scif2_device = { 208static struct platform_device scif2_device = {
@@ -261,7 +218,6 @@ static struct plat_sci_port scif3_platform_data = {
261 .flags = UPF_BOOT_AUTOCONF, 218 .flags = UPF_BOOT_AUTOCONF,
262 .type = PORT_SCIFA, 219 .type = PORT_SCIFA,
263 .irqs = { 56, 56, 56, 56 }, 220 .irqs = { 56, 56, 56, 56 },
264 .clk = "scif3",
265}; 221};
266 222
267static struct platform_device scif3_device = { 223static struct platform_device scif3_device = {
@@ -277,7 +233,6 @@ static struct plat_sci_port scif4_platform_data = {
277 .flags = UPF_BOOT_AUTOCONF, 233 .flags = UPF_BOOT_AUTOCONF,
278 .type = PORT_SCIFA, 234 .type = PORT_SCIFA,
279 .irqs = { 88, 88, 88, 88 }, 235 .irqs = { 88, 88, 88, 88 },
280 .clk = "scif4",
281}; 236};
282 237
283static struct platform_device scif4_device = { 238static struct platform_device scif4_device = {
@@ -293,7 +248,6 @@ static struct plat_sci_port scif5_platform_data = {
293 .flags = UPF_BOOT_AUTOCONF, 248 .flags = UPF_BOOT_AUTOCONF,
294 .type = PORT_SCIFA, 249 .type = PORT_SCIFA,
295 .irqs = { 109, 109, 109, 109 }, 250 .irqs = { 109, 109, 109, 109 },
296 .clk = "scif5",
297}; 251};
298 252
299static struct platform_device scif5_device = { 253static struct platform_device scif5_device = {
@@ -485,17 +439,14 @@ static struct platform_device veu1_device = {
485}; 439};
486 440
487static struct sh_timer_config cmt_platform_data = { 441static struct sh_timer_config cmt_platform_data = {
488 .name = "CMT",
489 .channel_offset = 0x60, 442 .channel_offset = 0x60,
490 .timer_bit = 5, 443 .timer_bit = 5,
491 .clk = "cmt0",
492 .clockevent_rating = 125, 444 .clockevent_rating = 125,
493 .clocksource_rating = 200, 445 .clocksource_rating = 200,
494}; 446};
495 447
496static struct resource cmt_resources[] = { 448static struct resource cmt_resources[] = {
497 [0] = { 449 [0] = {
498 .name = "CMT",
499 .start = 0x044a0060, 450 .start = 0x044a0060,
500 .end = 0x044a006b, 451 .end = 0x044a006b,
501 .flags = IORESOURCE_MEM, 452 .flags = IORESOURCE_MEM,
@@ -520,16 +471,13 @@ static struct platform_device cmt_device = {
520}; 471};
521 472
522static struct sh_timer_config tmu0_platform_data = { 473static struct sh_timer_config tmu0_platform_data = {
523 .name = "TMU0",
524 .channel_offset = 0x04, 474 .channel_offset = 0x04,
525 .timer_bit = 0, 475 .timer_bit = 0,
526 .clk = "tmu0",
527 .clockevent_rating = 200, 476 .clockevent_rating = 200,
528}; 477};
529 478
530static struct resource tmu0_resources[] = { 479static struct resource tmu0_resources[] = {
531 [0] = { 480 [0] = {
532 .name = "TMU0",
533 .start = 0xffd80008, 481 .start = 0xffd80008,
534 .end = 0xffd80013, 482 .end = 0xffd80013,
535 .flags = IORESOURCE_MEM, 483 .flags = IORESOURCE_MEM,
@@ -554,16 +502,13 @@ static struct platform_device tmu0_device = {
554}; 502};
555 503
556static struct sh_timer_config tmu1_platform_data = { 504static struct sh_timer_config tmu1_platform_data = {
557 .name = "TMU1",
558 .channel_offset = 0x10, 505 .channel_offset = 0x10,
559 .timer_bit = 1, 506 .timer_bit = 1,
560 .clk = "tmu0",
561 .clocksource_rating = 200, 507 .clocksource_rating = 200,
562}; 508};
563 509
564static struct resource tmu1_resources[] = { 510static struct resource tmu1_resources[] = {
565 [0] = { 511 [0] = {
566 .name = "TMU1",
567 .start = 0xffd80014, 512 .start = 0xffd80014,
568 .end = 0xffd8001f, 513 .end = 0xffd8001f,
569 .flags = IORESOURCE_MEM, 514 .flags = IORESOURCE_MEM,
@@ -588,15 +533,12 @@ static struct platform_device tmu1_device = {
588}; 533};
589 534
590static struct sh_timer_config tmu2_platform_data = { 535static struct sh_timer_config tmu2_platform_data = {
591 .name = "TMU2",
592 .channel_offset = 0x1c, 536 .channel_offset = 0x1c,
593 .timer_bit = 2, 537 .timer_bit = 2,
594 .clk = "tmu0",
595}; 538};
596 539
597static struct resource tmu2_resources[] = { 540static struct resource tmu2_resources[] = {
598 [0] = { 541 [0] = {
599 .name = "TMU2",
600 .start = 0xffd80020, 542 .start = 0xffd80020,
601 .end = 0xffd8002b, 543 .end = 0xffd8002b,
602 .flags = IORESOURCE_MEM, 544 .flags = IORESOURCE_MEM,
@@ -622,15 +564,12 @@ static struct platform_device tmu2_device = {
622 564
623 565
624static struct sh_timer_config tmu3_platform_data = { 566static struct sh_timer_config tmu3_platform_data = {
625 .name = "TMU3",
626 .channel_offset = 0x04, 567 .channel_offset = 0x04,
627 .timer_bit = 0, 568 .timer_bit = 0,
628 .clk = "tmu1",
629}; 569};
630 570
631static struct resource tmu3_resources[] = { 571static struct resource tmu3_resources[] = {
632 [0] = { 572 [0] = {
633 .name = "TMU3",
634 .start = 0xffd90008, 573 .start = 0xffd90008,
635 .end = 0xffd90013, 574 .end = 0xffd90013,
636 .flags = IORESOURCE_MEM, 575 .flags = IORESOURCE_MEM,
@@ -655,15 +594,12 @@ static struct platform_device tmu3_device = {
655}; 594};
656 595
657static struct sh_timer_config tmu4_platform_data = { 596static struct sh_timer_config tmu4_platform_data = {
658 .name = "TMU4",
659 .channel_offset = 0x10, 597 .channel_offset = 0x10,
660 .timer_bit = 1, 598 .timer_bit = 1,
661 .clk = "tmu1",
662}; 599};
663 600
664static struct resource tmu4_resources[] = { 601static struct resource tmu4_resources[] = {
665 [0] = { 602 [0] = {
666 .name = "TMU4",
667 .start = 0xffd90014, 603 .start = 0xffd90014,
668 .end = 0xffd9001f, 604 .end = 0xffd9001f,
669 .flags = IORESOURCE_MEM, 605 .flags = IORESOURCE_MEM,
@@ -688,15 +624,12 @@ static struct platform_device tmu4_device = {
688}; 624};
689 625
690static struct sh_timer_config tmu5_platform_data = { 626static struct sh_timer_config tmu5_platform_data = {
691 .name = "TMU5",
692 .channel_offset = 0x1c, 627 .channel_offset = 0x1c,
693 .timer_bit = 2, 628 .timer_bit = 2,
694 .clk = "tmu1",
695}; 629};
696 630
697static struct resource tmu5_resources[] = { 631static struct resource tmu5_resources[] = {
698 [0] = { 632 [0] = {
699 .name = "TMU5",
700 .start = 0xffd90020, 633 .start = 0xffd90020,
701 .end = 0xffd9002b, 634 .end = 0xffd9002b,
702 .flags = IORESOURCE_MEM, 635 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index e75edf58796a..444aca95b20d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -63,16 +63,13 @@ static struct platform_device scif4_device = {
63}; 63};
64 64
65static struct sh_timer_config tmu0_platform_data = { 65static struct sh_timer_config tmu0_platform_data = {
66 .name = "TMU0",
67 .channel_offset = 0x04, 66 .channel_offset = 0x04,
68 .timer_bit = 0, 67 .timer_bit = 0,
69 .clk = "peripheral_clk",
70 .clockevent_rating = 200, 68 .clockevent_rating = 200,
71}; 69};
72 70
73static struct resource tmu0_resources[] = { 71static struct resource tmu0_resources[] = {
74 [0] = { 72 [0] = {
75 .name = "TMU0",
76 .start = 0xfe430008, 73 .start = 0xfe430008,
77 .end = 0xfe430013, 74 .end = 0xfe430013,
78 .flags = IORESOURCE_MEM, 75 .flags = IORESOURCE_MEM,
@@ -94,16 +91,13 @@ static struct platform_device tmu0_device = {
94}; 91};
95 92
96static struct sh_timer_config tmu1_platform_data = { 93static struct sh_timer_config tmu1_platform_data = {
97 .name = "TMU1",
98 .channel_offset = 0x10, 94 .channel_offset = 0x10,
99 .timer_bit = 1, 95 .timer_bit = 1,
100 .clk = "peripheral_clk",
101 .clocksource_rating = 200, 96 .clocksource_rating = 200,
102}; 97};
103 98
104static struct resource tmu1_resources[] = { 99static struct resource tmu1_resources[] = {
105 [0] = { 100 [0] = {
106 .name = "TMU1",
107 .start = 0xfe430014, 101 .start = 0xfe430014,
108 .end = 0xfe43001f, 102 .end = 0xfe43001f,
109 .flags = IORESOURCE_MEM, 103 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 7f6b0a5f7f82..5b5f6b005fc5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -131,16 +131,13 @@ static struct platform_device usbf_device = {
131}; 131};
132 132
133static struct sh_timer_config tmu0_platform_data = { 133static struct sh_timer_config tmu0_platform_data = {
134 .name = "TMU0",
135 .channel_offset = 0x04, 134 .channel_offset = 0x04,
136 .timer_bit = 0, 135 .timer_bit = 0,
137 .clk = "peripheral_clk",
138 .clockevent_rating = 200, 136 .clockevent_rating = 200,
139}; 137};
140 138
141static struct resource tmu0_resources[] = { 139static struct resource tmu0_resources[] = {
142 [0] = { 140 [0] = {
143 .name = "TMU0",
144 .start = 0xffd80008, 141 .start = 0xffd80008,
145 .end = 0xffd80013, 142 .end = 0xffd80013,
146 .flags = IORESOURCE_MEM, 143 .flags = IORESOURCE_MEM,
@@ -162,16 +159,13 @@ static struct platform_device tmu0_device = {
162}; 159};
163 160
164static struct sh_timer_config tmu1_platform_data = { 161static struct sh_timer_config tmu1_platform_data = {
165 .name = "TMU1",
166 .channel_offset = 0x10, 162 .channel_offset = 0x10,
167 .timer_bit = 1, 163 .timer_bit = 1,
168 .clk = "peripheral_clk",
169 .clocksource_rating = 200, 164 .clocksource_rating = 200,
170}; 165};
171 166
172static struct resource tmu1_resources[] = { 167static struct resource tmu1_resources[] = {
173 [0] = { 168 [0] = {
174 .name = "TMU1",
175 .start = 0xffd80014, 169 .start = 0xffd80014,
176 .end = 0xffd8001f, 170 .end = 0xffd8001f,
177 .flags = IORESOURCE_MEM, 171 .flags = IORESOURCE_MEM,
@@ -193,15 +187,12 @@ static struct platform_device tmu1_device = {
193}; 187};
194 188
195static struct sh_timer_config tmu2_platform_data = { 189static struct sh_timer_config tmu2_platform_data = {
196 .name = "TMU2",
197 .channel_offset = 0x1c, 190 .channel_offset = 0x1c,
198 .timer_bit = 2, 191 .timer_bit = 2,
199 .clk = "peripheral_clk",
200}; 192};
201 193
202static struct resource tmu2_resources[] = { 194static struct resource tmu2_resources[] = {
203 [0] = { 195 [0] = {
204 .name = "TMU2",
205 .start = 0xffd80020, 196 .start = 0xffd80020,
206 .end = 0xffd8002f, 197 .end = 0xffd8002f,
207 .flags = IORESOURCE_MEM, 198 .flags = IORESOURCE_MEM,
@@ -223,15 +214,12 @@ static struct platform_device tmu2_device = {
223}; 214};
224 215
225static struct sh_timer_config tmu3_platform_data = { 216static struct sh_timer_config tmu3_platform_data = {
226 .name = "TMU3",
227 .channel_offset = 0x04, 217 .channel_offset = 0x04,
228 .timer_bit = 0, 218 .timer_bit = 0,
229 .clk = "peripheral_clk",
230}; 219};
231 220
232static struct resource tmu3_resources[] = { 221static struct resource tmu3_resources[] = {
233 [0] = { 222 [0] = {
234 .name = "TMU3",
235 .start = 0xffd88008, 223 .start = 0xffd88008,
236 .end = 0xffd88013, 224 .end = 0xffd88013,
237 .flags = IORESOURCE_MEM, 225 .flags = IORESOURCE_MEM,
@@ -253,15 +241,12 @@ static struct platform_device tmu3_device = {
253}; 241};
254 242
255static struct sh_timer_config tmu4_platform_data = { 243static struct sh_timer_config tmu4_platform_data = {
256 .name = "TMU4",
257 .channel_offset = 0x10, 244 .channel_offset = 0x10,
258 .timer_bit = 1, 245 .timer_bit = 1,
259 .clk = "peripheral_clk",
260}; 246};
261 247
262static struct resource tmu4_resources[] = { 248static struct resource tmu4_resources[] = {
263 [0] = { 249 [0] = {
264 .name = "TMU4",
265 .start = 0xffd88014, 250 .start = 0xffd88014,
266 .end = 0xffd8801f, 251 .end = 0xffd8801f,
267 .flags = IORESOURCE_MEM, 252 .flags = IORESOURCE_MEM,
@@ -283,15 +268,12 @@ static struct platform_device tmu4_device = {
283}; 268};
284 269
285static struct sh_timer_config tmu5_platform_data = { 270static struct sh_timer_config tmu5_platform_data = {
286 .name = "TMU5",
287 .channel_offset = 0x1c, 271 .channel_offset = 0x1c,
288 .timer_bit = 2, 272 .timer_bit = 2,
289 .clk = "peripheral_clk",
290}; 273};
291 274
292static struct resource tmu5_resources[] = { 275static struct resource tmu5_resources[] = {
293 [0] = { 276 [0] = {
294 .name = "TMU5",
295 .start = 0xffd88020, 277 .start = 0xffd88020,
296 .end = 0xffd8802b, 278 .end = 0xffd8802b,
297 .flags = IORESOURCE_MEM, 279 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 86d681ecf90e..7270d7fd6761 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -165,16 +165,13 @@ static struct platform_device scif9_device = {
165}; 165};
166 166
167static struct sh_timer_config tmu0_platform_data = { 167static struct sh_timer_config tmu0_platform_data = {
168 .name = "TMU0",
169 .channel_offset = 0x04, 168 .channel_offset = 0x04,
170 .timer_bit = 0, 169 .timer_bit = 0,
171 .clk = "peripheral_clk",
172 .clockevent_rating = 200, 170 .clockevent_rating = 200,
173}; 171};
174 172
175static struct resource tmu0_resources[] = { 173static struct resource tmu0_resources[] = {
176 [0] = { 174 [0] = {
177 .name = "TMU0",
178 .start = 0xffd80008, 175 .start = 0xffd80008,
179 .end = 0xffd80013, 176 .end = 0xffd80013,
180 .flags = IORESOURCE_MEM, 177 .flags = IORESOURCE_MEM,
@@ -196,16 +193,13 @@ static struct platform_device tmu0_device = {
196}; 193};
197 194
198static struct sh_timer_config tmu1_platform_data = { 195static struct sh_timer_config tmu1_platform_data = {
199 .name = "TMU1",
200 .channel_offset = 0x10, 196 .channel_offset = 0x10,
201 .timer_bit = 1, 197 .timer_bit = 1,
202 .clk = "peripheral_clk",
203 .clocksource_rating = 200, 198 .clocksource_rating = 200,
204}; 199};
205 200
206static struct resource tmu1_resources[] = { 201static struct resource tmu1_resources[] = {
207 [0] = { 202 [0] = {
208 .name = "TMU1",
209 .start = 0xffd80014, 203 .start = 0xffd80014,
210 .end = 0xffd8001f, 204 .end = 0xffd8001f,
211 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
@@ -227,15 +221,12 @@ static struct platform_device tmu1_device = {
227}; 221};
228 222
229static struct sh_timer_config tmu2_platform_data = { 223static struct sh_timer_config tmu2_platform_data = {
230 .name = "TMU2",
231 .channel_offset = 0x1c, 224 .channel_offset = 0x1c,
232 .timer_bit = 2, 225 .timer_bit = 2,
233 .clk = "peripheral_clk",
234}; 226};
235 227
236static struct resource tmu2_resources[] = { 228static struct resource tmu2_resources[] = {
237 [0] = { 229 [0] = {
238 .name = "TMU2",
239 .start = 0xffd80020, 230 .start = 0xffd80020,
240 .end = 0xffd8002f, 231 .end = 0xffd8002f,
241 .flags = IORESOURCE_MEM, 232 .flags = IORESOURCE_MEM,
@@ -257,15 +248,12 @@ static struct platform_device tmu2_device = {
257}; 248};
258 249
259static struct sh_timer_config tmu3_platform_data = { 250static struct sh_timer_config tmu3_platform_data = {
260 .name = "TMU3",
261 .channel_offset = 0x04, 251 .channel_offset = 0x04,
262 .timer_bit = 0, 252 .timer_bit = 0,
263 .clk = "peripheral_clk",
264}; 253};
265 254
266static struct resource tmu3_resources[] = { 255static struct resource tmu3_resources[] = {
267 [0] = { 256 [0] = {
268 .name = "TMU3",
269 .start = 0xffd81008, 257 .start = 0xffd81008,
270 .end = 0xffd81013, 258 .end = 0xffd81013,
271 .flags = IORESOURCE_MEM, 259 .flags = IORESOURCE_MEM,
@@ -287,15 +275,12 @@ static struct platform_device tmu3_device = {
287}; 275};
288 276
289static struct sh_timer_config tmu4_platform_data = { 277static struct sh_timer_config tmu4_platform_data = {
290 .name = "TMU4",
291 .channel_offset = 0x10, 278 .channel_offset = 0x10,
292 .timer_bit = 1, 279 .timer_bit = 1,
293 .clk = "peripheral_clk",
294}; 280};
295 281
296static struct resource tmu4_resources[] = { 282static struct resource tmu4_resources[] = {
297 [0] = { 283 [0] = {
298 .name = "TMU4",
299 .start = 0xffd81014, 284 .start = 0xffd81014,
300 .end = 0xffd8101f, 285 .end = 0xffd8101f,
301 .flags = IORESOURCE_MEM, 286 .flags = IORESOURCE_MEM,
@@ -317,15 +302,12 @@ static struct platform_device tmu4_device = {
317}; 302};
318 303
319static struct sh_timer_config tmu5_platform_data = { 304static struct sh_timer_config tmu5_platform_data = {
320 .name = "TMU5",
321 .channel_offset = 0x1c, 305 .channel_offset = 0x1c,
322 .timer_bit = 2, 306 .timer_bit = 2,
323 .clk = "peripheral_clk",
324}; 307};
325 308
326static struct resource tmu5_resources[] = { 309static struct resource tmu5_resources[] = {
327 [0] = { 310 [0] = {
328 .name = "TMU5",
329 .start = 0xffd81020, 311 .start = 0xffd81020,
330 .end = 0xffd8102f, 312 .end = 0xffd8102f,
331 .flags = IORESOURCE_MEM, 313 .flags = IORESOURCE_MEM,
@@ -347,15 +329,12 @@ static struct platform_device tmu5_device = {
347}; 329};
348 330
349static struct sh_timer_config tmu6_platform_data = { 331static struct sh_timer_config tmu6_platform_data = {
350 .name = "TMU6",
351 .channel_offset = 0x04, 332 .channel_offset = 0x04,
352 .timer_bit = 0, 333 .timer_bit = 0,
353 .clk = "peripheral_clk",
354}; 334};
355 335
356static struct resource tmu6_resources[] = { 336static struct resource tmu6_resources[] = {
357 [0] = { 337 [0] = {
358 .name = "TMU6",
359 .start = 0xffd82008, 338 .start = 0xffd82008,
360 .end = 0xffd82013, 339 .end = 0xffd82013,
361 .flags = IORESOURCE_MEM, 340 .flags = IORESOURCE_MEM,
@@ -377,15 +356,12 @@ static struct platform_device tmu6_device = {
377}; 356};
378 357
379static struct sh_timer_config tmu7_platform_data = { 358static struct sh_timer_config tmu7_platform_data = {
380 .name = "TMU7",
381 .channel_offset = 0x10, 359 .channel_offset = 0x10,
382 .timer_bit = 1, 360 .timer_bit = 1,
383 .clk = "peripheral_clk",
384}; 361};
385 362
386static struct resource tmu7_resources[] = { 363static struct resource tmu7_resources[] = {
387 [0] = { 364 [0] = {
388 .name = "TMU7",
389 .start = 0xffd82014, 365 .start = 0xffd82014,
390 .end = 0xffd8201f, 366 .end = 0xffd8201f,
391 .flags = IORESOURCE_MEM, 367 .flags = IORESOURCE_MEM,
@@ -407,15 +383,12 @@ static struct platform_device tmu7_device = {
407}; 383};
408 384
409static struct sh_timer_config tmu8_platform_data = { 385static struct sh_timer_config tmu8_platform_data = {
410 .name = "TMU8",
411 .channel_offset = 0x1c, 386 .channel_offset = 0x1c,
412 .timer_bit = 2, 387 .timer_bit = 2,
413 .clk = "peripheral_clk",
414}; 388};
415 389
416static struct resource tmu8_resources[] = { 390static struct resource tmu8_resources[] = {
417 [0] = { 391 [0] = {
418 .name = "TMU8",
419 .start = 0xffd82020, 392 .start = 0xffd82020,
420 .end = 0xffd8202b, 393 .end = 0xffd8202b,
421 .flags = IORESOURCE_MEM, 394 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 02e792c90de6..b12f537e4dde 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -49,16 +49,13 @@ static struct platform_device scif1_device = {
49}; 49};
50 50
51static struct sh_timer_config tmu0_platform_data = { 51static struct sh_timer_config tmu0_platform_data = {
52 .name = "TMU0",
53 .channel_offset = 0x04, 52 .channel_offset = 0x04,
54 .timer_bit = 0, 53 .timer_bit = 0,
55 .clk = "peripheral_clk",
56 .clockevent_rating = 200, 54 .clockevent_rating = 200,
57}; 55};
58 56
59static struct resource tmu0_resources[] = { 57static struct resource tmu0_resources[] = {
60 [0] = { 58 [0] = {
61 .name = "TMU0",
62 .start = 0xffd80008, 59 .start = 0xffd80008,
63 .end = 0xffd80013, 60 .end = 0xffd80013,
64 .flags = IORESOURCE_MEM, 61 .flags = IORESOURCE_MEM,
@@ -80,16 +77,13 @@ static struct platform_device tmu0_device = {
80}; 77};
81 78
82static struct sh_timer_config tmu1_platform_data = { 79static struct sh_timer_config tmu1_platform_data = {
83 .name = "TMU1",
84 .channel_offset = 0x10, 80 .channel_offset = 0x10,
85 .timer_bit = 1, 81 .timer_bit = 1,
86 .clk = "peripheral_clk",
87 .clocksource_rating = 200, 82 .clocksource_rating = 200,
88}; 83};
89 84
90static struct resource tmu1_resources[] = { 85static struct resource tmu1_resources[] = {
91 [0] = { 86 [0] = {
92 .name = "TMU1",
93 .start = 0xffd80014, 87 .start = 0xffd80014,
94 .end = 0xffd8001f, 88 .end = 0xffd8001f,
95 .flags = IORESOURCE_MEM, 89 .flags = IORESOURCE_MEM,
@@ -111,15 +105,12 @@ static struct platform_device tmu1_device = {
111}; 105};
112 106
113static struct sh_timer_config tmu2_platform_data = { 107static struct sh_timer_config tmu2_platform_data = {
114 .name = "TMU2",
115 .channel_offset = 0x1c, 108 .channel_offset = 0x1c,
116 .timer_bit = 2, 109 .timer_bit = 2,
117 .clk = "peripheral_clk",
118}; 110};
119 111
120static struct resource tmu2_resources[] = { 112static struct resource tmu2_resources[] = {
121 [0] = { 113 [0] = {
122 .name = "TMU2",
123 .start = 0xffd80020, 114 .start = 0xffd80020,
124 .end = 0xffd8002f, 115 .end = 0xffd8002f,
125 .flags = IORESOURCE_MEM, 116 .flags = IORESOURCE_MEM,
@@ -141,15 +132,12 @@ static struct platform_device tmu2_device = {
141}; 132};
142 133
143static struct sh_timer_config tmu3_platform_data = { 134static struct sh_timer_config tmu3_platform_data = {
144 .name = "TMU3",
145 .channel_offset = 0x04, 135 .channel_offset = 0x04,
146 .timer_bit = 0, 136 .timer_bit = 0,
147 .clk = "peripheral_clk",
148}; 137};
149 138
150static struct resource tmu3_resources[] = { 139static struct resource tmu3_resources[] = {
151 [0] = { 140 [0] = {
152 .name = "TMU3",
153 .start = 0xffdc0008, 141 .start = 0xffdc0008,
154 .end = 0xffdc0013, 142 .end = 0xffdc0013,
155 .flags = IORESOURCE_MEM, 143 .flags = IORESOURCE_MEM,
@@ -171,15 +159,12 @@ static struct platform_device tmu3_device = {
171}; 159};
172 160
173static struct sh_timer_config tmu4_platform_data = { 161static struct sh_timer_config tmu4_platform_data = {
174 .name = "TMU4",
175 .channel_offset = 0x10, 162 .channel_offset = 0x10,
176 .timer_bit = 1, 163 .timer_bit = 1,
177 .clk = "peripheral_clk",
178}; 164};
179 165
180static struct resource tmu4_resources[] = { 166static struct resource tmu4_resources[] = {
181 [0] = { 167 [0] = {
182 .name = "TMU4",
183 .start = 0xffdc0014, 168 .start = 0xffdc0014,
184 .end = 0xffdc001f, 169 .end = 0xffdc001f,
185 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
@@ -201,15 +186,12 @@ static struct platform_device tmu4_device = {
201}; 186};
202 187
203static struct sh_timer_config tmu5_platform_data = { 188static struct sh_timer_config tmu5_platform_data = {
204 .name = "TMU5",
205 .channel_offset = 0x1c, 189 .channel_offset = 0x1c,
206 .timer_bit = 2, 190 .timer_bit = 2,
207 .clk = "peripheral_clk",
208}; 191};
209 192
210static struct resource tmu5_resources[] = { 193static struct resource tmu5_resources[] = {
211 [0] = { 194 [0] = {
212 .name = "TMU5",
213 .start = 0xffdc0020, 195 .start = 0xffdc0020,
214 .end = 0xffdc002b, 196 .end = 0xffdc002b,
215 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
@@ -251,7 +233,7 @@ static struct platform_device rtc_device = {
251}; 233};
252 234
253/* DMA */ 235/* DMA */
254static struct sh_dmae_channel sh7780_dmae0_channels[] = { 236static const struct sh_dmae_channel sh7780_dmae0_channels[] = {
255 { 237 {
256 .offset = 0, 238 .offset = 0,
257 .dmars = 0, 239 .dmars = 0,
@@ -279,7 +261,7 @@ static struct sh_dmae_channel sh7780_dmae0_channels[] = {
279 } 261 }
280}; 262};
281 263
282static struct sh_dmae_channel sh7780_dmae1_channels[] = { 264static const struct sh_dmae_channel sh7780_dmae1_channels[] = {
283 { 265 {
284 .offset = 0, 266 .offset = 0,
285 }, { 267 }, {
@@ -295,7 +277,7 @@ static struct sh_dmae_channel sh7780_dmae1_channels[] = {
295 } 277 }
296}; 278};
297 279
298static unsigned int ts_shift[] = TS_SHIFT; 280static const unsigned int ts_shift[] = TS_SHIFT;
299 281
300static struct sh_dmae_pdata dma0_platform_data = { 282static struct sh_dmae_pdata dma0_platform_data = {
301 .channel = sh7780_dmae0_channels, 283 .channel = sh7780_dmae0_channels,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 1fcd88b1671e..f3e3ea0ce050 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -25,7 +25,6 @@ static struct plat_sci_port scif0_platform_data = {
25 .flags = UPF_BOOT_AUTOCONF, 25 .flags = UPF_BOOT_AUTOCONF,
26 .type = PORT_SCIF, 26 .type = PORT_SCIF,
27 .irqs = { 40, 40, 40, 40 }, 27 .irqs = { 40, 40, 40, 40 },
28 .clk = "scif_fck",
29}; 28};
30 29
31static struct platform_device scif0_device = { 30static struct platform_device scif0_device = {
@@ -41,7 +40,6 @@ static struct plat_sci_port scif1_platform_data = {
41 .flags = UPF_BOOT_AUTOCONF, 40 .flags = UPF_BOOT_AUTOCONF,
42 .type = PORT_SCIF, 41 .type = PORT_SCIF,
43 .irqs = { 44, 44, 44, 44 }, 42 .irqs = { 44, 44, 44, 44 },
44 .clk = "scif_fck",
45}; 43};
46 44
47static struct platform_device scif1_device = { 45static struct platform_device scif1_device = {
@@ -57,7 +55,6 @@ static struct plat_sci_port scif2_platform_data = {
57 .flags = UPF_BOOT_AUTOCONF, 55 .flags = UPF_BOOT_AUTOCONF,
58 .type = PORT_SCIF, 56 .type = PORT_SCIF,
59 .irqs = { 60, 60, 60, 60 }, 57 .irqs = { 60, 60, 60, 60 },
60 .clk = "scif_fck",
61}; 58};
62 59
63static struct platform_device scif2_device = { 60static struct platform_device scif2_device = {
@@ -73,7 +70,6 @@ static struct plat_sci_port scif3_platform_data = {
73 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
74 .type = PORT_SCIF, 71 .type = PORT_SCIF,
75 .irqs = { 61, 61, 61, 61 }, 72 .irqs = { 61, 61, 61, 61 },
76 .clk = "scif_fck",
77}; 73};
78 74
79static struct platform_device scif3_device = { 75static struct platform_device scif3_device = {
@@ -89,7 +85,6 @@ static struct plat_sci_port scif4_platform_data = {
89 .flags = UPF_BOOT_AUTOCONF, 85 .flags = UPF_BOOT_AUTOCONF,
90 .type = PORT_SCIF, 86 .type = PORT_SCIF,
91 .irqs = { 62, 62, 62, 62 }, 87 .irqs = { 62, 62, 62, 62 },
92 .clk = "scif_fck",
93}; 88};
94 89
95static struct platform_device scif4_device = { 90static struct platform_device scif4_device = {
@@ -105,7 +100,6 @@ static struct plat_sci_port scif5_platform_data = {
105 .flags = UPF_BOOT_AUTOCONF, 100 .flags = UPF_BOOT_AUTOCONF,
106 .type = PORT_SCIF, 101 .type = PORT_SCIF,
107 .irqs = { 63, 63, 63, 63 }, 102 .irqs = { 63, 63, 63, 63 },
108 .clk = "scif_fck",
109}; 103};
110 104
111static struct platform_device scif5_device = { 105static struct platform_device scif5_device = {
@@ -117,16 +111,13 @@ static struct platform_device scif5_device = {
117}; 111};
118 112
119static struct sh_timer_config tmu0_platform_data = { 113static struct sh_timer_config tmu0_platform_data = {
120 .name = "TMU0",
121 .channel_offset = 0x04, 114 .channel_offset = 0x04,
122 .timer_bit = 0, 115 .timer_bit = 0,
123 .clk = "tmu012_fck",
124 .clockevent_rating = 200, 116 .clockevent_rating = 200,
125}; 117};
126 118
127static struct resource tmu0_resources[] = { 119static struct resource tmu0_resources[] = {
128 [0] = { 120 [0] = {
129 .name = "TMU0",
130 .start = 0xffd80008, 121 .start = 0xffd80008,
131 .end = 0xffd80013, 122 .end = 0xffd80013,
132 .flags = IORESOURCE_MEM, 123 .flags = IORESOURCE_MEM,
@@ -148,16 +139,13 @@ static struct platform_device tmu0_device = {
148}; 139};
149 140
150static struct sh_timer_config tmu1_platform_data = { 141static struct sh_timer_config tmu1_platform_data = {
151 .name = "TMU1",
152 .channel_offset = 0x10, 142 .channel_offset = 0x10,
153 .timer_bit = 1, 143 .timer_bit = 1,
154 .clk = "tmu012_fck",
155 .clocksource_rating = 200, 144 .clocksource_rating = 200,
156}; 145};
157 146
158static struct resource tmu1_resources[] = { 147static struct resource tmu1_resources[] = {
159 [0] = { 148 [0] = {
160 .name = "TMU1",
161 .start = 0xffd80014, 149 .start = 0xffd80014,
162 .end = 0xffd8001f, 150 .end = 0xffd8001f,
163 .flags = IORESOURCE_MEM, 151 .flags = IORESOURCE_MEM,
@@ -179,15 +167,12 @@ static struct platform_device tmu1_device = {
179}; 167};
180 168
181static struct sh_timer_config tmu2_platform_data = { 169static struct sh_timer_config tmu2_platform_data = {
182 .name = "TMU2",
183 .channel_offset = 0x1c, 170 .channel_offset = 0x1c,
184 .timer_bit = 2, 171 .timer_bit = 2,
185 .clk = "tmu012_fck",
186}; 172};
187 173
188static struct resource tmu2_resources[] = { 174static struct resource tmu2_resources[] = {
189 [0] = { 175 [0] = {
190 .name = "TMU2",
191 .start = 0xffd80020, 176 .start = 0xffd80020,
192 .end = 0xffd8002f, 177 .end = 0xffd8002f,
193 .flags = IORESOURCE_MEM, 178 .flags = IORESOURCE_MEM,
@@ -209,15 +194,12 @@ static struct platform_device tmu2_device = {
209}; 194};
210 195
211static struct sh_timer_config tmu3_platform_data = { 196static struct sh_timer_config tmu3_platform_data = {
212 .name = "TMU3",
213 .channel_offset = 0x04, 197 .channel_offset = 0x04,
214 .timer_bit = 0, 198 .timer_bit = 0,
215 .clk = "tmu345_fck",
216}; 199};
217 200
218static struct resource tmu3_resources[] = { 201static struct resource tmu3_resources[] = {
219 [0] = { 202 [0] = {
220 .name = "TMU3",
221 .start = 0xffdc0008, 203 .start = 0xffdc0008,
222 .end = 0xffdc0013, 204 .end = 0xffdc0013,
223 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
@@ -239,15 +221,12 @@ static struct platform_device tmu3_device = {
239}; 221};
240 222
241static struct sh_timer_config tmu4_platform_data = { 223static struct sh_timer_config tmu4_platform_data = {
242 .name = "TMU4",
243 .channel_offset = 0x10, 224 .channel_offset = 0x10,
244 .timer_bit = 1, 225 .timer_bit = 1,
245 .clk = "tmu345_fck",
246}; 226};
247 227
248static struct resource tmu4_resources[] = { 228static struct resource tmu4_resources[] = {
249 [0] = { 229 [0] = {
250 .name = "TMU4",
251 .start = 0xffdc0014, 230 .start = 0xffdc0014,
252 .end = 0xffdc001f, 231 .end = 0xffdc001f,
253 .flags = IORESOURCE_MEM, 232 .flags = IORESOURCE_MEM,
@@ -269,15 +248,12 @@ static struct platform_device tmu4_device = {
269}; 248};
270 249
271static struct sh_timer_config tmu5_platform_data = { 250static struct sh_timer_config tmu5_platform_data = {
272 .name = "TMU5",
273 .channel_offset = 0x1c, 251 .channel_offset = 0x1c,
274 .timer_bit = 2, 252 .timer_bit = 2,
275 .clk = "tmu345_fck",
276}; 253};
277 254
278static struct resource tmu5_resources[] = { 255static struct resource tmu5_resources[] = {
279 [0] = { 256 [0] = {
280 .name = "TMU5",
281 .start = 0xffdc0020, 257 .start = 0xffdc0020,
282 .end = 0xffdc002b, 258 .end = 0xffdc002b,
283 .flags = IORESOURCE_MEM, 259 .flags = IORESOURCE_MEM,
@@ -299,7 +275,7 @@ static struct platform_device tmu5_device = {
299}; 275};
300 276
301/* DMA */ 277/* DMA */
302static struct sh_dmae_channel sh7785_dmae0_channels[] = { 278static const struct sh_dmae_channel sh7785_dmae0_channels[] = {
303 { 279 {
304 .offset = 0, 280 .offset = 0,
305 .dmars = 0, 281 .dmars = 0,
@@ -327,7 +303,7 @@ static struct sh_dmae_channel sh7785_dmae0_channels[] = {
327 } 303 }
328}; 304};
329 305
330static struct sh_dmae_channel sh7785_dmae1_channels[] = { 306static const struct sh_dmae_channel sh7785_dmae1_channels[] = {
331 { 307 {
332 .offset = 0, 308 .offset = 0,
333 }, { 309 }, {
@@ -343,7 +319,7 @@ static struct sh_dmae_channel sh7785_dmae1_channels[] = {
343 } 319 }
344}; 320};
345 321
346static unsigned int ts_shift[] = TS_SHIFT; 322static const unsigned int ts_shift[] = TS_SHIFT;
347 323
348static struct sh_dmae_pdata dma0_platform_data = { 324static struct sh_dmae_pdata dma0_platform_data = {
349 .channel = sh7785_dmae0_channels, 325 .channel = sh7785_dmae0_channels,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 7e585320710a..81657091da46 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SH7786 Setup 2 * SH7786 Setup
3 * 3 *
4 * Copyright (C) 2009 Renesas Solutions Corp. 4 * Copyright (C) 2009 - 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 * Paul Mundt <paul.mundt@renesas.com> 6 * Paul Mundt <paul.mundt@renesas.com>
7 * 7 *
@@ -21,7 +21,10 @@
21#include <linux/mm.h> 21#include <linux/mm.h>
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/sh_timer.h> 23#include <linux/sh_timer.h>
24#include <linux/sh_intc.h>
25#include <cpu/dma-register.h>
24#include <asm/mmzone.h> 26#include <asm/mmzone.h>
27#include <asm/dmaengine.h>
25 28
26static struct plat_sci_port scif0_platform_data = { 29static struct plat_sci_port scif0_platform_data = {
27 .mapbase = 0xffea0000, 30 .mapbase = 0xffea0000,
@@ -117,16 +120,13 @@ static struct platform_device scif5_device = {
117}; 120};
118 121
119static struct sh_timer_config tmu0_platform_data = { 122static struct sh_timer_config tmu0_platform_data = {
120 .name = "TMU0",
121 .channel_offset = 0x04, 123 .channel_offset = 0x04,
122 .timer_bit = 0, 124 .timer_bit = 0,
123 .clk = "peripheral_clk",
124 .clockevent_rating = 200, 125 .clockevent_rating = 200,
125}; 126};
126 127
127static struct resource tmu0_resources[] = { 128static struct resource tmu0_resources[] = {
128 [0] = { 129 [0] = {
129 .name = "TMU0",
130 .start = 0xffd80008, 130 .start = 0xffd80008,
131 .end = 0xffd80013, 131 .end = 0xffd80013,
132 .flags = IORESOURCE_MEM, 132 .flags = IORESOURCE_MEM,
@@ -148,16 +148,13 @@ static struct platform_device tmu0_device = {
148}; 148};
149 149
150static struct sh_timer_config tmu1_platform_data = { 150static struct sh_timer_config tmu1_platform_data = {
151 .name = "TMU1",
152 .channel_offset = 0x10, 151 .channel_offset = 0x10,
153 .timer_bit = 1, 152 .timer_bit = 1,
154 .clk = "peripheral_clk",
155 .clocksource_rating = 200, 153 .clocksource_rating = 200,
156}; 154};
157 155
158static struct resource tmu1_resources[] = { 156static struct resource tmu1_resources[] = {
159 [0] = { 157 [0] = {
160 .name = "TMU1",
161 .start = 0xffd80014, 158 .start = 0xffd80014,
162 .end = 0xffd8001f, 159 .end = 0xffd8001f,
163 .flags = IORESOURCE_MEM, 160 .flags = IORESOURCE_MEM,
@@ -179,15 +176,12 @@ static struct platform_device tmu1_device = {
179}; 176};
180 177
181static struct sh_timer_config tmu2_platform_data = { 178static struct sh_timer_config tmu2_platform_data = {
182 .name = "TMU2",
183 .channel_offset = 0x1c, 179 .channel_offset = 0x1c,
184 .timer_bit = 2, 180 .timer_bit = 2,
185 .clk = "peripheral_clk",
186}; 181};
187 182
188static struct resource tmu2_resources[] = { 183static struct resource tmu2_resources[] = {
189 [0] = { 184 [0] = {
190 .name = "TMU2",
191 .start = 0xffd80020, 185 .start = 0xffd80020,
192 .end = 0xffd8002f, 186 .end = 0xffd8002f,
193 .flags = IORESOURCE_MEM, 187 .flags = IORESOURCE_MEM,
@@ -209,15 +203,12 @@ static struct platform_device tmu2_device = {
209}; 203};
210 204
211static struct sh_timer_config tmu3_platform_data = { 205static struct sh_timer_config tmu3_platform_data = {
212 .name = "TMU3",
213 .channel_offset = 0x04, 206 .channel_offset = 0x04,
214 .timer_bit = 0, 207 .timer_bit = 0,
215 .clk = "peripheral_clk",
216}; 208};
217 209
218static struct resource tmu3_resources[] = { 210static struct resource tmu3_resources[] = {
219 [0] = { 211 [0] = {
220 .name = "TMU3",
221 .start = 0xffda0008, 212 .start = 0xffda0008,
222 .end = 0xffda0013, 213 .end = 0xffda0013,
223 .flags = IORESOURCE_MEM, 214 .flags = IORESOURCE_MEM,
@@ -239,15 +230,12 @@ static struct platform_device tmu3_device = {
239}; 230};
240 231
241static struct sh_timer_config tmu4_platform_data = { 232static struct sh_timer_config tmu4_platform_data = {
242 .name = "TMU4",
243 .channel_offset = 0x10, 233 .channel_offset = 0x10,
244 .timer_bit = 1, 234 .timer_bit = 1,
245 .clk = "peripheral_clk",
246}; 235};
247 236
248static struct resource tmu4_resources[] = { 237static struct resource tmu4_resources[] = {
249 [0] = { 238 [0] = {
250 .name = "TMU4",
251 .start = 0xffda0014, 239 .start = 0xffda0014,
252 .end = 0xffda001f, 240 .end = 0xffda001f,
253 .flags = IORESOURCE_MEM, 241 .flags = IORESOURCE_MEM,
@@ -269,15 +257,12 @@ static struct platform_device tmu4_device = {
269}; 257};
270 258
271static struct sh_timer_config tmu5_platform_data = { 259static struct sh_timer_config tmu5_platform_data = {
272 .name = "TMU5",
273 .channel_offset = 0x1c, 260 .channel_offset = 0x1c,
274 .timer_bit = 2, 261 .timer_bit = 2,
275 .clk = "peripheral_clk",
276}; 262};
277 263
278static struct resource tmu5_resources[] = { 264static struct resource tmu5_resources[] = {
279 [0] = { 265 [0] = {
280 .name = "TMU5",
281 .start = 0xffda0020, 266 .start = 0xffda0020,
282 .end = 0xffda002b, 267 .end = 0xffda002b,
283 .flags = IORESOURCE_MEM, 268 .flags = IORESOURCE_MEM,
@@ -299,15 +284,12 @@ static struct platform_device tmu5_device = {
299}; 284};
300 285
301static struct sh_timer_config tmu6_platform_data = { 286static struct sh_timer_config tmu6_platform_data = {
302 .name = "TMU6",
303 .channel_offset = 0x04, 287 .channel_offset = 0x04,
304 .timer_bit = 0, 288 .timer_bit = 0,
305 .clk = "peripheral_clk",
306}; 289};
307 290
308static struct resource tmu6_resources[] = { 291static struct resource tmu6_resources[] = {
309 [0] = { 292 [0] = {
310 .name = "TMU6",
311 .start = 0xffdc0008, 293 .start = 0xffdc0008,
312 .end = 0xffdc0013, 294 .end = 0xffdc0013,
313 .flags = IORESOURCE_MEM, 295 .flags = IORESOURCE_MEM,
@@ -329,15 +311,12 @@ static struct platform_device tmu6_device = {
329}; 311};
330 312
331static struct sh_timer_config tmu7_platform_data = { 313static struct sh_timer_config tmu7_platform_data = {
332 .name = "TMU7",
333 .channel_offset = 0x10, 314 .channel_offset = 0x10,
334 .timer_bit = 1, 315 .timer_bit = 1,
335 .clk = "peripheral_clk",
336}; 316};
337 317
338static struct resource tmu7_resources[] = { 318static struct resource tmu7_resources[] = {
339 [0] = { 319 [0] = {
340 .name = "TMU7",
341 .start = 0xffdc0014, 320 .start = 0xffdc0014,
342 .end = 0xffdc001f, 321 .end = 0xffdc001f,
343 .flags = IORESOURCE_MEM, 322 .flags = IORESOURCE_MEM,
@@ -359,15 +338,12 @@ static struct platform_device tmu7_device = {
359}; 338};
360 339
361static struct sh_timer_config tmu8_platform_data = { 340static struct sh_timer_config tmu8_platform_data = {
362 .name = "TMU8",
363 .channel_offset = 0x1c, 341 .channel_offset = 0x1c,
364 .timer_bit = 2, 342 .timer_bit = 2,
365 .clk = "peripheral_clk",
366}; 343};
367 344
368static struct resource tmu8_resources[] = { 345static struct resource tmu8_resources[] = {
369 [0] = { 346 [0] = {
370 .name = "TMU8",
371 .start = 0xffdc0020, 347 .start = 0xffdc0020,
372 .end = 0xffdc002b, 348 .end = 0xffdc002b,
373 .flags = IORESOURCE_MEM, 349 .flags = IORESOURCE_MEM,
@@ -389,15 +365,12 @@ static struct platform_device tmu8_device = {
389}; 365};
390 366
391static struct sh_timer_config tmu9_platform_data = { 367static struct sh_timer_config tmu9_platform_data = {
392 .name = "TMU9",
393 .channel_offset = 0x04, 368 .channel_offset = 0x04,
394 .timer_bit = 0, 369 .timer_bit = 0,
395 .clk = "peripheral_clk",
396}; 370};
397 371
398static struct resource tmu9_resources[] = { 372static struct resource tmu9_resources[] = {
399 [0] = { 373 [0] = {
400 .name = "TMU9",
401 .start = 0xffde0008, 374 .start = 0xffde0008,
402 .end = 0xffde0013, 375 .end = 0xffde0013,
403 .flags = IORESOURCE_MEM, 376 .flags = IORESOURCE_MEM,
@@ -419,15 +392,12 @@ static struct platform_device tmu9_device = {
419}; 392};
420 393
421static struct sh_timer_config tmu10_platform_data = { 394static struct sh_timer_config tmu10_platform_data = {
422 .name = "TMU10",
423 .channel_offset = 0x10, 395 .channel_offset = 0x10,
424 .timer_bit = 1, 396 .timer_bit = 1,
425 .clk = "peripheral_clk",
426}; 397};
427 398
428static struct resource tmu10_resources[] = { 399static struct resource tmu10_resources[] = {
429 [0] = { 400 [0] = {
430 .name = "TMU10",
431 .start = 0xffde0014, 401 .start = 0xffde0014,
432 .end = 0xffde001f, 402 .end = 0xffde001f,
433 .flags = IORESOURCE_MEM, 403 .flags = IORESOURCE_MEM,
@@ -449,15 +419,12 @@ static struct platform_device tmu10_device = {
449}; 419};
450 420
451static struct sh_timer_config tmu11_platform_data = { 421static struct sh_timer_config tmu11_platform_data = {
452 .name = "TMU11",
453 .channel_offset = 0x1c, 422 .channel_offset = 0x1c,
454 .timer_bit = 2, 423 .timer_bit = 2,
455 .clk = "peripheral_clk",
456}; 424};
457 425
458static struct resource tmu11_resources[] = { 426static struct resource tmu11_resources[] = {
459 [0] = { 427 [0] = {
460 .name = "TMU11",
461 .start = 0xffde0020, 428 .start = 0xffde0020,
462 .end = 0xffde002b, 429 .end = 0xffde002b,
463 .flags = IORESOURCE_MEM, 430 .flags = IORESOURCE_MEM,
@@ -478,6 +445,83 @@ static struct platform_device tmu11_device = {
478 .num_resources = ARRAY_SIZE(tmu11_resources), 445 .num_resources = ARRAY_SIZE(tmu11_resources),
479}; 446};
480 447
448static const struct sh_dmae_channel dmac0_channels[] = {
449 {
450 .offset = 0,
451 .dmars = 0,
452 .dmars_bit = 0,
453 }, {
454 .offset = 0x10,
455 .dmars = 0,
456 .dmars_bit = 8,
457 }, {
458 .offset = 0x20,
459 .dmars = 4,
460 .dmars_bit = 0,
461 }, {
462 .offset = 0x30,
463 .dmars = 4,
464 .dmars_bit = 8,
465 }, {
466 .offset = 0x50,
467 .dmars = 8,
468 .dmars_bit = 0,
469 }, {
470 .offset = 0x60,
471 .dmars = 8,
472 .dmars_bit = 8,
473 }
474};
475
476static const unsigned int ts_shift[] = TS_SHIFT;
477
478static struct sh_dmae_pdata dma0_platform_data = {
479 .channel = dmac0_channels,
480 .channel_num = ARRAY_SIZE(dmac0_channels),
481 .ts_low_shift = CHCR_TS_LOW_SHIFT,
482 .ts_low_mask = CHCR_TS_LOW_MASK,
483 .ts_high_shift = CHCR_TS_HIGH_SHIFT,
484 .ts_high_mask = CHCR_TS_HIGH_MASK,
485 .ts_shift = ts_shift,
486 .ts_shift_num = ARRAY_SIZE(ts_shift),
487 .dmaor_init = DMAOR_INIT,
488};
489
490/* Resource order important! */
491static struct resource dmac0_resources[] = {
492 {
493 /* Channel registers and DMAOR */
494 .start = 0xfe008020,
495 .end = 0xfe00808f,
496 .flags = IORESOURCE_MEM,
497 }, {
498 /* DMARSx */
499 .start = 0xfe009000,
500 .end = 0xfe00900b,
501 .flags = IORESOURCE_MEM,
502 }, {
503 /* DMA error IRQ */
504 .start = evt2irq(0x5c0),
505 .end = evt2irq(0x5c0),
506 .flags = IORESOURCE_IRQ,
507 }, {
508 /* IRQ for channels 0-5 */
509 .start = evt2irq(0x500),
510 .end = evt2irq(0x5a0),
511 .flags = IORESOURCE_IRQ,
512 },
513};
514
515static struct platform_device dma0_device = {
516 .name = "sh-dma-engine",
517 .id = 0,
518 .resource = dmac0_resources,
519 .num_resources = ARRAY_SIZE(dmac0_resources),
520 .dev = {
521 .platform_data = &dma0_platform_data,
522 },
523};
524
481static struct resource usb_ohci_resources[] = { 525static struct resource usb_ohci_resources[] = {
482 [0] = { 526 [0] = {
483 .start = 0xffe70400, 527 .start = 0xffe70400,
@@ -525,10 +569,10 @@ static struct platform_device *sh7786_early_devices[] __initdata = {
525}; 569};
526 570
527static struct platform_device *sh7786_devices[] __initdata = { 571static struct platform_device *sh7786_devices[] __initdata = {
572 &dma0_device,
528 &usb_ohci_device, 573 &usb_ohci_device,
529}; 574};
530 575
531
532/* 576/*
533 * Please call this function if your platform board 577 * Please call this function if your platform board
534 * use external clock for USB 578 * use external clock for USB
@@ -536,6 +580,7 @@ static struct platform_device *sh7786_devices[] __initdata = {
536#define USBCTL0 0xffe70858 580#define USBCTL0 0xffe70858
537#define CLOCK_MODE_MASK 0xffffff7f 581#define CLOCK_MODE_MASK 0xffffff7f
538#define EXT_CLOCK_MODE 0x00000080 582#define EXT_CLOCK_MODE 0x00000080
583
539void __init sh7786_usb_use_exclock(void) 584void __init sh7786_usb_use_exclock(void)
540{ 585{
541 u32 val = __raw_readl(USBCTL0) & CLOCK_MODE_MASK; 586 u32 val = __raw_readl(USBCTL0) & CLOCK_MODE_MASK;
@@ -553,6 +598,7 @@ void __init sh7786_usb_use_exclock(void)
553#define PLL_ENB 0x00000002 598#define PLL_ENB 0x00000002
554#define PHY_RST 0x00000004 599#define PHY_RST 0x00000004
555#define ACT_PLL_STATUS 0xc0000000 600#define ACT_PLL_STATUS 0xc0000000
601
556static void __init sh7786_usb_setup(void) 602static void __init sh7786_usb_setup(void)
557{ 603{
558 int i = 1000000; 604 int i = 1000000;
@@ -708,9 +754,19 @@ static struct intc_vect vectors[] __initdata = {
708#define INTMSK2 0xfe410068 754#define INTMSK2 0xfe410068
709#define INTMSKCLR2 0xfe41006c 755#define INTMSKCLR2 0xfe41006c
710 756
757#define INTDISTCR0 0xfe4100b0
758#define INTDISTCR1 0xfe4100b4
759#define INTACK 0xfe4100b8
760#define INTACKCLR 0xfe4100bc
761#define INT2DISTCR0 0xfe410900
762#define INT2DISTCR1 0xfe410904
763#define INT2DISTCR2 0xfe410908
764#define INT2DISTCR3 0xfe41090c
765
711static struct intc_mask_reg mask_registers[] __initdata = { 766static struct intc_mask_reg mask_registers[] __initdata = {
712 { CnINTMSK0, CnINTMSKCLR0, 32, 767 { CnINTMSK0, CnINTMSKCLR0, 32,
713 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 768 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 },
769 INTC_SMP_BALANCING(INTDISTCR0) },
714 { INTMSK2, INTMSKCLR2, 32, 770 { INTMSK2, INTMSKCLR2, 32,
715 { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH, 771 { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
716 IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH, 772 IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
@@ -722,7 +778,8 @@ static struct intc_mask_reg mask_registers[] __initdata = {
722 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } }, 778 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } },
723 { CnINT2MSKR0, CnINT2MSKCR0 , 32, 779 { CnINT2MSKR0, CnINT2MSKCR0 , 32,
724 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 780 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
725 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT } }, 781 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT },
782 INTC_SMP_BALANCING(INT2DISTCR0) },
726 { CnINT2MSKR1, CnINT2MSKCR1, 32, 783 { CnINT2MSKR1, CnINT2MSKCR1, 32,
727 { TMU0_0, TMU0_1, TMU0_2, TMU0_3, TMU1_0, TMU1_1, TMU1_2, 0, 784 { TMU0_0, TMU0_1, TMU0_2, TMU0_3, TMU1_0, TMU1_1, TMU1_2, 0,
728 DMAC0_0, DMAC0_1, DMAC0_2, DMAC0_3, DMAC0_4, DMAC0_5, DMAC0_6, 785 DMAC0_0, DMAC0_1, DMAC0_2, DMAC0_3, DMAC0_4, DMAC0_5, DMAC0_6,
@@ -731,14 +788,14 @@ static struct intc_mask_reg mask_registers[] __initdata = {
731 HPB_0, HPB_1, HPB_2, 788 HPB_0, HPB_1, HPB_2,
732 SCIF0_0, SCIF0_1, SCIF0_2, SCIF0_3, 789 SCIF0_0, SCIF0_1, SCIF0_2, SCIF0_3,
733 SCIF1, 790 SCIF1,
734 TMU2, TMU3, 0, } }, 791 TMU2, TMU3, 0, }, INTC_SMP_BALANCING(INT2DISTCR1) },
735 { CnINT2MSKR2, CnINT2MSKCR2, 32, 792 { CnINT2MSKR2, CnINT2MSKCR2, 32,
736 { 0, 0, SCIF2, SCIF3, SCIF4, SCIF5, 793 { 0, 0, SCIF2, SCIF3, SCIF4, SCIF5,
737 Eth_0, Eth_1, 794 Eth_0, Eth_1,
738 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 795 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
739 PCIeC0_0, PCIeC0_1, PCIeC0_2, 796 PCIeC0_0, PCIeC0_1, PCIeC0_2,
740 PCIeC1_0, PCIeC1_1, PCIeC1_2, 797 PCIeC1_0, PCIeC1_1, PCIeC1_2,
741 USB, 0, 0 } }, 798 USB, 0, 0 }, INTC_SMP_BALANCING(INT2DISTCR2) },
742 { CnINT2MSKR3, CnINT2MSKCR3, 32, 799 { CnINT2MSKR3, CnINT2MSKCR3, 32,
743 { 0, 0, 0, 0, 0, 0, 800 { 0, 0, 0, 0, 0, 0,
744 I2C0, I2C1, 801 I2C0, I2C1,
@@ -747,7 +804,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
747 HAC0, HAC1, 804 HAC0, HAC1,
748 FLCTL, 0, 805 FLCTL, 0,
749 HSPI, GPIO0, GPIO1, Thermal, 806 HSPI, GPIO0, GPIO1, Thermal,
750 0, 0, 0, 0, 0, 0, 0, 0 } }, 807 0, 0, 0, 0, 0, 0, 0, 0 }, INTC_SMP_BALANCING(INT2DISTCR3) },
751}; 808};
752 809
753static struct intc_prio_reg prio_registers[] __initdata = { 810static struct intc_prio_reg prio_registers[] __initdata = {
@@ -863,6 +920,19 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
863#define INTC_INTMSK2 INTMSK2 920#define INTC_INTMSK2 INTMSK2
864#define INTC_INTMSKCLR1 CnINTMSKCLR1 921#define INTC_INTMSKCLR1 CnINTMSKCLR1
865#define INTC_INTMSKCLR2 INTMSKCLR2 922#define INTC_INTMSKCLR2 INTMSKCLR2
923#define INTC_USERIMASK 0xfe411000
924
925#ifdef CONFIG_INTC_BALANCING
926unsigned int irq_lookup(unsigned int irq)
927{
928 return __raw_readl(INTACK) & 1 ? irq : NO_IRQ_IGNORE;
929}
930
931void irq_finish(unsigned int irq)
932{
933 __raw_writel(irq2evt(irq), INTACKCLR);
934}
935#endif
866 936
867void __init plat_irq_setup(void) 937void __init plat_irq_setup(void)
868{ 938{
@@ -877,6 +947,7 @@ void __init plat_irq_setup(void)
877 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); 947 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
878 948
879 register_intc_controller(&intc_desc); 949 register_intc_controller(&intc_desc);
950 register_intc_userimask(INTC_USERIMASK);
880} 951}
881 952
882void __init plat_irq_setup_pins(int mode) 953void __init plat_irq_setup_pins(int mode)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 780ba17a5599..9158bc5ea38b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -70,16 +70,13 @@ static struct platform_device scif2_device = {
70}; 70};
71 71
72static struct sh_timer_config tmu0_platform_data = { 72static struct sh_timer_config tmu0_platform_data = {
73 .name = "TMU0",
74 .channel_offset = 0x04, 73 .channel_offset = 0x04,
75 .timer_bit = 0, 74 .timer_bit = 0,
76 .clk = "peripheral_clk",
77 .clockevent_rating = 200, 75 .clockevent_rating = 200,
78}; 76};
79 77
80static struct resource tmu0_resources[] = { 78static struct resource tmu0_resources[] = {
81 [0] = { 79 [0] = {
82 .name = "TMU0",
83 .start = 0xffc10008, 80 .start = 0xffc10008,
84 .end = 0xffc10013, 81 .end = 0xffc10013,
85 .flags = IORESOURCE_MEM, 82 .flags = IORESOURCE_MEM,
@@ -101,16 +98,13 @@ static struct platform_device tmu0_device = {
101}; 98};
102 99
103static struct sh_timer_config tmu1_platform_data = { 100static struct sh_timer_config tmu1_platform_data = {
104 .name = "TMU1",
105 .channel_offset = 0x10, 101 .channel_offset = 0x10,
106 .timer_bit = 1, 102 .timer_bit = 1,
107 .clk = "peripheral_clk",
108 .clocksource_rating = 200, 103 .clocksource_rating = 200,
109}; 104};
110 105
111static struct resource tmu1_resources[] = { 106static struct resource tmu1_resources[] = {
112 [0] = { 107 [0] = {
113 .name = "TMU1",
114 .start = 0xffc10014, 108 .start = 0xffc10014,
115 .end = 0xffc1001f, 109 .end = 0xffc1001f,
116 .flags = IORESOURCE_MEM, 110 .flags = IORESOURCE_MEM,
@@ -132,15 +126,12 @@ static struct platform_device tmu1_device = {
132}; 126};
133 127
134static struct sh_timer_config tmu2_platform_data = { 128static struct sh_timer_config tmu2_platform_data = {
135 .name = "TMU2",
136 .channel_offset = 0x1c, 129 .channel_offset = 0x1c,
137 .timer_bit = 2, 130 .timer_bit = 2,
138 .clk = "peripheral_clk",
139}; 131};
140 132
141static struct resource tmu2_resources[] = { 133static struct resource tmu2_resources[] = {
142 [0] = { 134 [0] = {
143 .name = "TMU2",
144 .start = 0xffc10020, 135 .start = 0xffc10020,
145 .end = 0xffc1002f, 136 .end = 0xffc1002f,
146 .flags = IORESOURCE_MEM, 137 .flags = IORESOURCE_MEM,
@@ -162,15 +153,12 @@ static struct platform_device tmu2_device = {
162}; 153};
163 154
164static struct sh_timer_config tmu3_platform_data = { 155static struct sh_timer_config tmu3_platform_data = {
165 .name = "TMU3",
166 .channel_offset = 0x04, 156 .channel_offset = 0x04,
167 .timer_bit = 0, 157 .timer_bit = 0,
168 .clk = "peripheral_clk",
169}; 158};
170 159
171static struct resource tmu3_resources[] = { 160static struct resource tmu3_resources[] = {
172 [0] = { 161 [0] = {
173 .name = "TMU3",
174 .start = 0xffc20008, 162 .start = 0xffc20008,
175 .end = 0xffc20013, 163 .end = 0xffc20013,
176 .flags = IORESOURCE_MEM, 164 .flags = IORESOURCE_MEM,
@@ -192,15 +180,12 @@ static struct platform_device tmu3_device = {
192}; 180};
193 181
194static struct sh_timer_config tmu4_platform_data = { 182static struct sh_timer_config tmu4_platform_data = {
195 .name = "TMU4",
196 .channel_offset = 0x10, 183 .channel_offset = 0x10,
197 .timer_bit = 1, 184 .timer_bit = 1,
198 .clk = "peripheral_clk",
199}; 185};
200 186
201static struct resource tmu4_resources[] = { 187static struct resource tmu4_resources[] = {
202 [0] = { 188 [0] = {
203 .name = "TMU4",
204 .start = 0xffc20014, 189 .start = 0xffc20014,
205 .end = 0xffc2001f, 190 .end = 0xffc2001f,
206 .flags = IORESOURCE_MEM, 191 .flags = IORESOURCE_MEM,
@@ -222,15 +207,12 @@ static struct platform_device tmu4_device = {
222}; 207};
223 208
224static struct sh_timer_config tmu5_platform_data = { 209static struct sh_timer_config tmu5_platform_data = {
225 .name = "TMU5",
226 .channel_offset = 0x1c, 210 .channel_offset = 0x1c,
227 .timer_bit = 2, 211 .timer_bit = 2,
228 .clk = "peripheral_clk",
229}; 212};
230 213
231static struct resource tmu5_resources[] = { 214static struct resource tmu5_resources[] = {
232 [0] = { 215 [0] = {
233 .name = "TMU5",
234 .start = 0xffc20020, 216 .start = 0xffc20020,
235 .end = 0xffc2002b, 217 .end = 0xffc2002b,
236 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 11bf4c1e25c0..de865cac02ee 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SH-X3 SMP 2 * SH-X3 SMP
3 * 3 *
4 * Copyright (C) 2007 - 2008 Paul Mundt 4 * Copyright (C) 2007 - 2010 Paul Mundt
5 * Copyright (C) 2007 Magnus Damm 5 * Copyright (C) 2007 Magnus Damm
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
@@ -9,16 +9,22 @@
9 * for more details. 9 * for more details.
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h>
12#include <linux/cpumask.h> 13#include <linux/cpumask.h>
13#include <linux/smp.h> 14#include <linux/smp.h>
14#include <linux/interrupt.h> 15#include <linux/interrupt.h>
15#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/sched.h>
18#include <linux/delay.h>
19#include <linux/cpu.h>
20#include <asm/sections.h>
16 21
17#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12)) 22#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
18#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12)) 23#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
19 24
20#define STBCR_MSTP 0x00000001 25#define STBCR_MSTP 0x00000001
21#define STBCR_RESET 0x00000002 26#define STBCR_RESET 0x00000002
27#define STBCR_SLEEP 0x00000004
22#define STBCR_LTSLP 0x80000000 28#define STBCR_LTSLP 0x80000000
23 29
24static irqreturn_t ipi_interrupt_handler(int irq, void *arg) 30static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
@@ -37,7 +43,7 @@ static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
37 return IRQ_HANDLED; 43 return IRQ_HANDLED;
38} 44}
39 45
40void __init plat_smp_setup(void) 46static void shx3_smp_setup(void)
41{ 47{
42 unsigned int cpu = 0; 48 unsigned int cpu = 0;
43 int i, num; 49 int i, num;
@@ -63,7 +69,7 @@ void __init plat_smp_setup(void)
63 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num); 69 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
64} 70}
65 71
66void __init plat_prepare_cpus(unsigned int max_cpus) 72static void shx3_prepare_cpus(unsigned int max_cpus)
67{ 73{
68 int i; 74 int i;
69 75
@@ -72,11 +78,14 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
72 BUILD_BUG_ON(SMP_MSG_NR >= 8); 78 BUILD_BUG_ON(SMP_MSG_NR >= 8);
73 79
74 for (i = 0; i < SMP_MSG_NR; i++) 80 for (i = 0; i < SMP_MSG_NR; i++)
75 request_irq(104 + i, ipi_interrupt_handler, IRQF_DISABLED, 81 request_irq(104 + i, ipi_interrupt_handler,
76 "IPI", (void *)(long)i); 82 IRQF_DISABLED | IRQF_PERCPU, "IPI", (void *)(long)i);
83
84 for (i = 0; i < max_cpus; i++)
85 set_cpu_present(i, true);
77} 86}
78 87
79void plat_start_cpu(unsigned int cpu, unsigned long entry_point) 88static void shx3_start_cpu(unsigned int cpu, unsigned long entry_point)
80{ 89{
81 if (__in_29bit_mode()) 90 if (__in_29bit_mode())
82 __raw_writel(entry_point, RESET_REG(cpu)); 91 __raw_writel(entry_point, RESET_REG(cpu));
@@ -93,12 +102,12 @@ void plat_start_cpu(unsigned int cpu, unsigned long entry_point)
93 __raw_writel(STBCR_RESET | STBCR_LTSLP, STBCR_REG(cpu)); 102 __raw_writel(STBCR_RESET | STBCR_LTSLP, STBCR_REG(cpu));
94} 103}
95 104
96int plat_smp_processor_id(void) 105static unsigned int shx3_smp_processor_id(void)
97{ 106{
98 return __raw_readl(0xff000048); /* CPIDR */ 107 return __raw_readl(0xff000048); /* CPIDR */
99} 108}
100 109
101void plat_send_ipi(unsigned int cpu, unsigned int message) 110static void shx3_send_ipi(unsigned int cpu, unsigned int message)
102{ 111{
103 unsigned long addr = 0xfe410070 + (cpu * 4); 112 unsigned long addr = 0xfe410070 + (cpu * 4);
104 113
@@ -106,3 +115,52 @@ void plat_send_ipi(unsigned int cpu, unsigned int message)
106 115
107 __raw_writel(1 << (message << 2), addr); /* C0INTICI..CnINTICI */ 116 __raw_writel(1 << (message << 2), addr); /* C0INTICI..CnINTICI */
108} 117}
118
119static void shx3_update_boot_vector(unsigned int cpu)
120{
121 __raw_writel(STBCR_MSTP, STBCR_REG(cpu));
122 while (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
123 cpu_relax();
124 __raw_writel(STBCR_RESET, STBCR_REG(cpu));
125}
126
127static int __cpuinit
128shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
129{
130 unsigned int cpu = (unsigned int)hcpu;
131
132 switch (action) {
133 case CPU_UP_PREPARE:
134 shx3_update_boot_vector(cpu);
135 break;
136 case CPU_ONLINE:
137 pr_info("CPU %u is now online\n", cpu);
138 break;
139 case CPU_DEAD:
140 break;
141 }
142
143 return NOTIFY_OK;
144}
145
146static struct notifier_block __cpuinitdata shx3_cpu_notifier = {
147 .notifier_call = shx3_cpu_callback,
148};
149
150static int __cpuinit register_shx3_cpu_notifier(void)
151{
152 register_hotcpu_notifier(&shx3_cpu_notifier);
153 return 0;
154}
155late_initcall(register_shx3_cpu_notifier);
156
157struct plat_smp_ops shx3_smp_ops = {
158 .smp_setup = shx3_smp_setup,
159 .prepare_cpus = shx3_prepare_cpus,
160 .start_cpu = shx3_start_cpu,
161 .smp_processor_id = shx3_smp_processor_id,
162 .send_ipi = shx3_send_ipi,
163 .cpu_die = native_cpu_die,
164 .cpu_disable = native_cpu_disable,
165 .play_dead = native_play_dead,
166};
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 521d05b3f7ba..9e882409e4e9 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -17,7 +17,7 @@
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/tlb.h> 18#include <asm/tlb.h>
19 19
20int __init detect_cpu_and_cache_system(void) 20void __cpuinit cpu_probe(void)
21{ 21{
22 unsigned long long cir; 22 unsigned long long cir;
23 23
@@ -72,6 +72,4 @@ int __init detect_cpu_and_cache_system(void)
72 72
73 /* Setup some I/D TLB defaults */ 73 /* Setup some I/D TLB defaults */
74 sh64_tlb_init(); 74 sh64_tlb_init();
75
76 return 0;
77} 75}
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index e7a3c1e4b604..d910666142b1 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -68,16 +68,13 @@ static struct platform_device rtc_device = {
68#define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2)) 68#define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2))
69 69
70static struct sh_timer_config tmu0_platform_data = { 70static struct sh_timer_config tmu0_platform_data = {
71 .name = "TMU0",
72 .channel_offset = 0x04, 71 .channel_offset = 0x04,
73 .timer_bit = 0, 72 .timer_bit = 0,
74 .clk = "peripheral_clk",
75 .clockevent_rating = 200, 73 .clockevent_rating = 200,
76}; 74};
77 75
78static struct resource tmu0_resources[] = { 76static struct resource tmu0_resources[] = {
79 [0] = { 77 [0] = {
80 .name = "TMU0",
81 .start = TMU0_BASE, 78 .start = TMU0_BASE,
82 .end = TMU0_BASE + 0xc - 1, 79 .end = TMU0_BASE + 0xc - 1,
83 .flags = IORESOURCE_MEM, 80 .flags = IORESOURCE_MEM,
@@ -99,16 +96,13 @@ static struct platform_device tmu0_device = {
99}; 96};
100 97
101static struct sh_timer_config tmu1_platform_data = { 98static struct sh_timer_config tmu1_platform_data = {
102 .name = "TMU1",
103 .channel_offset = 0x10, 99 .channel_offset = 0x10,
104 .timer_bit = 1, 100 .timer_bit = 1,
105 .clk = "peripheral_clk",
106 .clocksource_rating = 200, 101 .clocksource_rating = 200,
107}; 102};
108 103
109static struct resource tmu1_resources[] = { 104static struct resource tmu1_resources[] = {
110 [0] = { 105 [0] = {
111 .name = "TMU1",
112 .start = TMU1_BASE, 106 .start = TMU1_BASE,
113 .end = TMU1_BASE + 0xc - 1, 107 .end = TMU1_BASE + 0xc - 1,
114 .flags = IORESOURCE_MEM, 108 .flags = IORESOURCE_MEM,
@@ -130,15 +124,12 @@ static struct platform_device tmu1_device = {
130}; 124};
131 125
132static struct sh_timer_config tmu2_platform_data = { 126static struct sh_timer_config tmu2_platform_data = {
133 .name = "TMU2",
134 .channel_offset = 0x1c, 127 .channel_offset = 0x1c,
135 .timer_bit = 2, 128 .timer_bit = 2,
136 .clk = "peripheral_clk",
137}; 129};
138 130
139static struct resource tmu2_resources[] = { 131static struct resource tmu2_resources[] = {
140 [0] = { 132 [0] = {
141 .name = "TMU2",
142 .start = TMU2_BASE, 133 .start = TMU2_BASE,
143 .end = TMU2_BASE + 0xc - 1, 134 .end = TMU2_BASE + 0xc - 1,
144 .flags = IORESOURCE_MEM, 135 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/crash_dump.c b/arch/sh/kernel/crash_dump.c
index 95d216255565..37c97d444576 100644
--- a/arch/sh/kernel/crash_dump.c
+++ b/arch/sh/kernel/crash_dump.c
@@ -4,7 +4,6 @@
4 * Created by: Hariprasad Nellitheertha (hari@in.ibm.com) 4 * Created by: Hariprasad Nellitheertha (hari@in.ibm.com)
5 * Copyright (C) IBM Corporation, 2004. All rights reserved 5 * Copyright (C) IBM Corporation, 2004. All rights reserved
6 */ 6 */
7
8#include <linux/errno.h> 7#include <linux/errno.h>
9#include <linux/crash_dump.h> 8#include <linux/crash_dump.h>
10#include <linux/io.h> 9#include <linux/io.h>
@@ -13,6 +12,25 @@
13/* Stores the physical address of elf header of crash image. */ 12/* Stores the physical address of elf header of crash image. */
14unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; 13unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
15 14
15/*
16 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
17 * is_kdump_kernel() to determine if we are booting after a panic. Hence
18 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
19 *
20 * elfcorehdr= specifies the location of elf core header
21 * stored by the crashed kernel.
22 */
23static int __init parse_elfcorehdr(char *arg)
24{
25 if (!arg)
26 return -EINVAL;
27
28 elfcorehdr_addr = memparse(arg, &arg);
29
30 return 0;
31}
32early_param("elfcorehdr", parse_elfcorehdr);
33
16/** 34/**
17 * copy_oldmem_page - copy one page from "oldmem" 35 * copy_oldmem_page - copy one page from "oldmem"
18 * @pfn: page frame number to be copied 36 * @pfn: page frame number to be copied
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index a8234b2010d1..5ec1d1818691 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -22,6 +22,7 @@
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/elf.h> 23#include <linux/elf.h>
24#include <linux/ftrace.h> 24#include <linux/ftrace.h>
25#include <linux/module.h>
25#include <linux/slab.h> 26#include <linux/slab.h>
26#include <asm/dwarf.h> 27#include <asm/dwarf.h>
27#include <asm/unwinder.h> 28#include <asm/unwinder.h>
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index fe0b743881b0..6e35f012cc03 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -131,6 +131,7 @@ ENTRY(_stext)
131 * r8 = scratch register 131 * r8 = scratch register
132 * r9 = scratch register 132 * r9 = scratch register
133 * r10 = number of PMB entries we've setup 133 * r10 = number of PMB entries we've setup
134 * r11 = scratch register
134 */ 135 */
135 136
136 mov.l .LMMUCR, r1 /* Flush the TLB */ 137 mov.l .LMMUCR, r1 /* Flush the TLB */
@@ -167,8 +168,9 @@ ENTRY(_stext)
167 168
168.Lvalidate_existing_mappings: 169.Lvalidate_existing_mappings:
169 170
171 mov.l .LPMB_DATA_MASK, r11
170 mov.l @r7, r8 172 mov.l @r7, r8
171 and r0, r8 173 and r11, r8
172 cmp/eq r0, r8 /* Check for valid __MEMORY_START mappings */ 174 cmp/eq r0, r8 /* Check for valid __MEMORY_START mappings */
173 bt .Lpmb_done 175 bt .Lpmb_done
174 176
@@ -335,12 +337,13 @@ ENTRY(stack_start)
3353: .long __bss_start 3373: .long __bss_start
3364: .long _end 3384: .long _end
3375: .long start_kernel 3395: .long start_kernel
3386: .long sh_cpu_init 3406: .long cpu_init
3397: .long init_thread_union 3417: .long init_thread_union
340 342
341#ifdef CONFIG_PMB 343#ifdef CONFIG_PMB
342.LPMB_ADDR: .long PMB_ADDR 344.LPMB_ADDR: .long PMB_ADDR
343.LPMB_DATA: .long PMB_DATA 345.LPMB_DATA: .long PMB_DATA
346.LPMB_DATA_MASK: .long PMB_PFN_MASK | PMB_V
344.LFIRST_ADDR_ENTRY: .long PAGE_OFFSET | PMB_V 347.LFIRST_ADDR_ENTRY: .long PAGE_OFFSET | PMB_V
345.LFIRST_DATA_ENTRY: .long __MEMORY_START | PMB_V 348.LFIRST_DATA_ENTRY: .long __MEMORY_START | PMB_V
346.LMMUCR: .long MMUCR 349.LMMUCR: .long MMUCR
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c
index 675eea7785d9..efae6ab3d54c 100644
--- a/arch/sh/kernel/hw_breakpoint.c
+++ b/arch/sh/kernel/hw_breakpoint.c
@@ -120,25 +120,16 @@ static int get_hbp_len(u16 hbp_len)
120} 120}
121 121
122/* 122/*
123 * Check for virtual address in user space.
124 */
125int arch_check_va_in_userspace(unsigned long va, u16 hbp_len)
126{
127 unsigned int len;
128
129 len = get_hbp_len(hbp_len);
130
131 return (va <= TASK_SIZE - len);
132}
133
134/*
135 * Check for virtual address in kernel space. 123 * Check for virtual address in kernel space.
136 */ 124 */
137static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len) 125int arch_check_bp_in_kernelspace(struct perf_event *bp)
138{ 126{
139 unsigned int len; 127 unsigned int len;
128 unsigned long va;
129 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
140 130
141 len = get_hbp_len(hbp_len); 131 va = info->address;
132 len = get_hbp_len(info->len);
142 133
143 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE); 134 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
144} 135}
@@ -226,8 +217,7 @@ static int arch_build_bp_info(struct perf_event *bp)
226/* 217/*
227 * Validate the arch-specific HW Breakpoint register settings 218 * Validate the arch-specific HW Breakpoint register settings
228 */ 219 */
229int arch_validate_hwbkpt_settings(struct perf_event *bp, 220int arch_validate_hwbkpt_settings(struct perf_event *bp)
230 struct task_struct *tsk)
231{ 221{
232 struct arch_hw_breakpoint *info = counter_arch_bp(bp); 222 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
233 unsigned int align; 223 unsigned int align;
@@ -270,15 +260,6 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp,
270 if (info->address & align) 260 if (info->address & align)
271 return -EINVAL; 261 return -EINVAL;
272 262
273 /* Check that the virtual address is in the proper range */
274 if (tsk) {
275 if (!arch_check_va_in_userspace(info->address, info->len))
276 return -EFAULT;
277 } else {
278 if (!arch_check_va_in_kernelspace(info->address, info->len))
279 return -EFAULT;
280 }
281
282 return 0; 263 return 0;
283} 264}
284 265
@@ -363,8 +344,7 @@ static int __kprobes hw_breakpoint_handler(struct die_args *args)
363 perf_bp_event(bp, args->regs); 344 perf_bp_event(bp, args->regs);
364 345
365 /* Deliver the signal to userspace */ 346 /* Deliver the signal to userspace */
366 if (arch_check_va_in_userspace(bp->attr.bp_addr, 347 if (!arch_check_bp_in_kernelspace(bp)) {
367 bp->attr.bp_len)) {
368 siginfo_t info; 348 siginfo_t info;
369 349
370 info.si_signo = args->signr; 350 info.si_signo = args->signr;
@@ -425,11 +405,6 @@ void hw_breakpoint_pmu_read(struct perf_event *bp)
425 /* TODO */ 405 /* TODO */
426} 406}
427 407
428void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
429{
430 /* TODO */
431}
432
433int register_sh_ubc(struct sh_ubc *ubc) 408int register_sh_ubc(struct sh_ubc *ubc)
434{ 409{
435 /* Bail if it's already assigned */ 410 /* Bail if it's already assigned */
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 273f890b17ae..425d604e3a28 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -19,6 +19,7 @@
19#include <asm/pgalloc.h> 19#include <asm/pgalloc.h>
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/atomic.h> 21#include <asm/atomic.h>
22#include <asm/smp.h>
22 23
23void (*pm_idle)(void) = NULL; 24void (*pm_idle)(void) = NULL;
24 25
@@ -89,10 +90,13 @@ void cpu_idle(void)
89 while (1) { 90 while (1) {
90 tick_nohz_stop_sched_tick(1); 91 tick_nohz_stop_sched_tick(1);
91 92
92 while (!need_resched() && cpu_online(cpu)) { 93 while (!need_resched()) {
93 check_pgt_cache(); 94 check_pgt_cache();
94 rmb(); 95 rmb();
95 96
97 if (cpu_is_offline(cpu))
98 play_dead();
99
96 local_irq_disable(); 100 local_irq_disable();
97 /* Don't trace irqs off for idle */ 101 /* Don't trace irqs off for idle */
98 stop_critical_timings(); 102 stop_critical_timings();
@@ -133,7 +137,7 @@ static void do_nothing(void *unused)
133void stop_this_cpu(void *unused) 137void stop_this_cpu(void *unused)
134{ 138{
135 local_irq_disable(); 139 local_irq_disable();
136 cpu_clear(smp_processor_id(), cpu_online_map); 140 set_cpu_online(smp_processor_id(), false);
137 141
138 for (;;) 142 for (;;)
139 cpu_sleep(); 143 cpu_sleep();
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index d2d41d046657..257de1f0692b 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -12,6 +12,7 @@
12#include <linux/kernel_stat.h> 12#include <linux/kernel_stat.h>
13#include <linux/seq_file.h> 13#include <linux/seq_file.h>
14#include <linux/ftrace.h> 14#include <linux/ftrace.h>
15#include <linux/delay.h>
15#include <asm/processor.h> 16#include <asm/processor.h>
16#include <asm/machvec.h> 17#include <asm/machvec.h>
17#include <asm/uaccess.h> 18#include <asm/uaccess.h>
@@ -113,19 +114,14 @@ union irq_ctx {
113 114
114static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly; 115static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
115static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; 116static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
116#endif
117 117
118asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs) 118static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
119static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
120
121static inline void handle_one_irq(unsigned int irq)
119{ 122{
120 struct pt_regs *old_regs = set_irq_regs(regs);
121#ifdef CONFIG_IRQSTACKS
122 union irq_ctx *curctx, *irqctx; 123 union irq_ctx *curctx, *irqctx;
123#endif
124
125 irq_enter();
126 irq = irq_demux(irq);
127 124
128#ifdef CONFIG_IRQSTACKS
129 curctx = (union irq_ctx *)current_thread_info(); 125 curctx = (union irq_ctx *)current_thread_info();
130 irqctx = hardirq_ctx[smp_processor_id()]; 126 irqctx = hardirq_ctx[smp_processor_id()];
131 127
@@ -164,20 +160,9 @@ asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs)
164 "r5", "r6", "r7", "r8", "t", "pr" 160 "r5", "r6", "r7", "r8", "t", "pr"
165 ); 161 );
166 } else 162 } else
167#endif
168 generic_handle_irq(irq); 163 generic_handle_irq(irq);
169
170 irq_exit();
171
172 set_irq_regs(old_regs);
173 return 1;
174} 164}
175 165
176#ifdef CONFIG_IRQSTACKS
177static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
178
179static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
180
181/* 166/*
182 * allocate per-cpu stacks for hardirq and for softirq processing 167 * allocate per-cpu stacks for hardirq and for softirq processing
183 */ 168 */
@@ -257,8 +242,33 @@ asmlinkage void do_softirq(void)
257 242
258 local_irq_restore(flags); 243 local_irq_restore(flags);
259} 244}
245#else
246static inline void handle_one_irq(unsigned int irq)
247{
248 generic_handle_irq(irq);
249}
260#endif 250#endif
261 251
252asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs)
253{
254 struct pt_regs *old_regs = set_irq_regs(regs);
255
256 irq_enter();
257
258 irq = irq_demux(irq_lookup(irq));
259
260 if (irq != NO_IRQ_IGNORE) {
261 handle_one_irq(irq);
262 irq_finish(irq);
263 }
264
265 irq_exit();
266
267 set_irq_regs(old_regs);
268
269 return IRQ_HANDLED;
270}
271
262void __init init_IRQ(void) 272void __init init_IRQ(void)
263{ 273{
264 plat_irq_setup(); 274 plat_irq_setup();
@@ -283,3 +293,44 @@ int __init arch_probe_nr_irqs(void)
283 return 0; 293 return 0;
284} 294}
285#endif 295#endif
296
297#ifdef CONFIG_HOTPLUG_CPU
298static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
299{
300 printk(KERN_INFO "IRQ%u: moving from cpu%u to cpu%u\n",
301 irq, desc->node, cpu);
302
303 raw_spin_lock_irq(&desc->lock);
304 desc->chip->set_affinity(irq, cpumask_of(cpu));
305 raw_spin_unlock_irq(&desc->lock);
306}
307
308/*
309 * The CPU has been marked offline. Migrate IRQs off this CPU. If
310 * the affinity settings do not allow other CPUs, force them onto any
311 * available CPU.
312 */
313void migrate_irqs(void)
314{
315 struct irq_desc *desc;
316 unsigned int irq, cpu = smp_processor_id();
317
318 for_each_irq_desc(irq, desc) {
319 if (desc->node == cpu) {
320 unsigned int newcpu = cpumask_any_and(desc->affinity,
321 cpu_online_mask);
322 if (newcpu >= nr_cpu_ids) {
323 if (printk_ratelimit())
324 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
325 irq, cpu);
326
327 cpumask_setall(desc->affinity);
328 newcpu = cpumask_any_and(desc->affinity,
329 cpu_online_mask);
330 }
331
332 route_irq(desc, irq, newcpu);
333 }
334 }
335}
336#endif
diff --git a/arch/sh/kernel/localtimer.c b/arch/sh/kernel/localtimer.c
index 0b04e7d4a9b9..8bfc6dfa8b94 100644
--- a/arch/sh/kernel/localtimer.c
+++ b/arch/sh/kernel/localtimer.c
@@ -44,7 +44,7 @@ static void dummy_timer_set_mode(enum clock_event_mode mode,
44{ 44{
45} 45}
46 46
47void __cpuinit local_timer_setup(unsigned int cpu) 47void local_timer_setup(unsigned int cpu)
48{ 48{
49 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 49 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
50 50
@@ -60,3 +60,7 @@ void __cpuinit local_timer_setup(unsigned int cpu)
60 60
61 clockevents_register_device(clk); 61 clockevents_register_device(clk);
62} 62}
63
64void local_timer_stop(unsigned int cpu)
65{
66}
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 7672141c841b..5a559e666eb3 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -8,7 +8,6 @@
8 * This source code is licensed under the GNU General Public License, 8 * This source code is licensed under the GNU General Public License,
9 * Version 2. See the file COPYING for more details. 9 * Version 2. See the file COPYING for more details.
10 */ 10 */
11
12#include <linux/mm.h> 11#include <linux/mm.h>
13#include <linux/kexec.h> 12#include <linux/kexec.h>
14#include <linux/delay.h> 13#include <linux/delay.h>
@@ -16,6 +15,7 @@
16#include <linux/numa.h> 15#include <linux/numa.h>
17#include <linux/ftrace.h> 16#include <linux/ftrace.h>
18#include <linux/suspend.h> 17#include <linux/suspend.h>
18#include <linux/lmb.h>
19#include <asm/pgtable.h> 19#include <asm/pgtable.h>
20#include <asm/pgalloc.h> 20#include <asm/pgalloc.h>
21#include <asm/mmu_context.h> 21#include <asm/mmu_context.h>
@@ -147,4 +147,64 @@ void arch_crash_save_vmcoreinfo(void)
147 VMCOREINFO_SYMBOL(node_data); 147 VMCOREINFO_SYMBOL(node_data);
148 VMCOREINFO_LENGTH(node_data, MAX_NUMNODES); 148 VMCOREINFO_LENGTH(node_data, MAX_NUMNODES);
149#endif 149#endif
150#ifdef CONFIG_X2TLB
151 VMCOREINFO_CONFIG(X2TLB);
152#endif
153}
154
155void __init reserve_crashkernel(void)
156{
157 unsigned long long crash_size, crash_base;
158 int ret;
159
160 /* this is necessary because of lmb_phys_mem_size() */
161 lmb_analyze();
162
163 ret = parse_crashkernel(boot_command_line, lmb_phys_mem_size(),
164 &crash_size, &crash_base);
165 if (ret == 0 && crash_size > 0) {
166 crashk_res.start = crash_base;
167 crashk_res.end = crash_base + crash_size - 1;
168 }
169
170 if (crashk_res.end == crashk_res.start)
171 goto disable;
172
173 crash_size = PAGE_ALIGN(crashk_res.end - crashk_res.start + 1);
174 if (!crashk_res.start) {
175 unsigned long max = lmb_end_of_DRAM() - memory_limit;
176 crashk_res.start = __lmb_alloc_base(crash_size, PAGE_SIZE, max);
177 if (!crashk_res.start) {
178 pr_err("crashkernel allocation failed\n");
179 goto disable;
180 }
181 } else {
182 ret = lmb_reserve(crashk_res.start, crash_size);
183 if (unlikely(ret < 0)) {
184 pr_err("crashkernel reservation failed - "
185 "memory is in use\n");
186 goto disable;
187 }
188 }
189
190 crashk_res.end = crashk_res.start + crash_size - 1;
191
192 /*
193 * Crash kernel trumps memory limit
194 */
195 if ((lmb_end_of_DRAM() - memory_limit) <= crashk_res.end) {
196 memory_limit = 0;
197 pr_info("Disabled memory limit for crashkernel\n");
198 }
199
200 pr_info("Reserving %ldMB of memory at 0x%08lx "
201 "for crashkernel (System RAM: %ldMB)\n",
202 (unsigned long)(crash_size >> 20),
203 (unsigned long)(crashk_res.start),
204 (unsigned long)(lmb_phys_mem_size() >> 20));
205
206 return;
207
208disable:
209 crashk_res.start = crashk_res.end = 0;
150} 210}
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index 1652340ba3f2..85cfaf916fdc 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -131,6 +131,7 @@ void __init sh_mv_setup(void)
131 mv_set(ioport_unmap); 131 mv_set(ioport_unmap);
132 mv_set(irq_demux); 132 mv_set(irq_demux);
133 mv_set(mode_pins); 133 mv_set(mode_pins);
134 mv_set(mem_init);
134 135
135 if (!sh_mv.mv_nr_irqs) 136 if (!sh_mv.mv_nr_irqs)
136 sh_mv.mv_nr_irqs = NR_IRQS; 137 sh_mv.mv_nr_irqs = NR_IRQS;
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 17f89aa4e1b3..dcb126dc76fd 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -90,7 +90,7 @@ void arch_task_cache_init(void)
90# define HAVE_SOFTFP 0 90# define HAVE_SOFTFP 0
91#endif 91#endif
92 92
93void init_thread_xstate(void) 93void __cpuinit init_thread_xstate(void)
94{ 94{
95 if (boot_cpu_data.flags & CPU_HAS_FPU) 95 if (boot_cpu_data.flags & CPU_HAS_FPU)
96 xstate_size = sizeof(struct sh_fpu_hard_struct); 96 xstate_size = sizeof(struct sh_fpu_hard_struct);
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 7759a9a93211..d4104ce9fe53 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -85,7 +85,7 @@ static int set_single_step(struct task_struct *tsk, unsigned long addr)
85 85
86 bp = thread->ptrace_bps[0]; 86 bp = thread->ptrace_bps[0];
87 if (!bp) { 87 if (!bp) {
88 hw_breakpoint_init(&attr); 88 ptrace_breakpoint_init(&attr);
89 89
90 attr.bp_addr = addr; 90 attr.bp_addr = addr;
91 attr.bp_len = HW_BREAKPOINT_LEN_2; 91 attr.bp_len = HW_BREAKPOINT_LEN_2;
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 8870d6ba64bf..272734681d29 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -4,7 +4,7 @@
4 * This file handles the architecture-dependent parts of initialization 4 * This file handles the architecture-dependent parts of initialization
5 * 5 *
6 * Copyright (C) 1999 Niibe Yutaka 6 * Copyright (C) 1999 Niibe Yutaka
7 * Copyright (C) 2002 - 2007 Paul Mundt 7 * Copyright (C) 2002 - 2010 Paul Mundt
8 */ 8 */
9#include <linux/screen_info.h> 9#include <linux/screen_info.h>
10#include <linux/ioport.h> 10#include <linux/ioport.h>
@@ -39,7 +39,9 @@
39#include <asm/irq.h> 39#include <asm/irq.h>
40#include <asm/setup.h> 40#include <asm/setup.h>
41#include <asm/clock.h> 41#include <asm/clock.h>
42#include <asm/smp.h>
42#include <asm/mmu_context.h> 43#include <asm/mmu_context.h>
44#include <asm/mmzone.h>
43 45
44/* 46/*
45 * Initialize loops_per_jiffy as 10000000 (1000MIPS). 47 * Initialize loops_per_jiffy as 10000000 (1000MIPS).
@@ -93,6 +95,7 @@ unsigned long memory_start;
93EXPORT_SYMBOL(memory_start); 95EXPORT_SYMBOL(memory_start);
94unsigned long memory_end = 0; 96unsigned long memory_end = 0;
95EXPORT_SYMBOL(memory_end); 97EXPORT_SYMBOL(memory_end);
98unsigned long memory_limit = 0;
96 99
97static struct resource mem_resources[MAX_NUMNODES]; 100static struct resource mem_resources[MAX_NUMNODES];
98 101
@@ -100,92 +103,73 @@ int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
100 103
101static int __init early_parse_mem(char *p) 104static int __init early_parse_mem(char *p)
102{ 105{
103 unsigned long size; 106 if (!p)
107 return 1;
104 108
105 memory_start = (unsigned long)__va(__MEMORY_START); 109 memory_limit = PAGE_ALIGN(memparse(p, &p));
106 size = memparse(p, &p);
107 110
108 if (size > __MEMORY_SIZE) { 111 pr_notice("Memory limited to %ldMB\n", memory_limit >> 20);
109 printk(KERN_ERR
110 "Using mem= to increase the size of kernel memory "
111 "is not allowed.\n"
112 " Recompile the kernel with the correct value for "
113 "CONFIG_MEMORY_SIZE.\n");
114 return 0;
115 }
116
117 memory_end = memory_start + size;
118 112
119 return 0; 113 return 0;
120} 114}
121early_param("mem", early_parse_mem); 115early_param("mem", early_parse_mem);
122 116
123/* 117void __init check_for_initrd(void)
124 * Register fully available low RAM pages with the bootmem allocator.
125 */
126static void __init register_bootmem_low_pages(void)
127{ 118{
128 unsigned long curr_pfn, last_pfn, pages; 119#ifdef CONFIG_BLK_DEV_INITRD
120 unsigned long start, end;
121
122 /*
123 * Check for the rare cases where boot loaders adhere to the boot
124 * ABI.
125 */
126 if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE)
127 goto disable;
128
129 start = INITRD_START + __MEMORY_START;
130 end = start + INITRD_SIZE;
131
132 if (unlikely(end <= start))
133 goto disable;
134 if (unlikely(start & ~PAGE_MASK)) {
135 pr_err("initrd must be page aligned\n");
136 goto disable;
137 }
138
139 if (unlikely(start < PAGE_OFFSET)) {
140 pr_err("initrd start < PAGE_OFFSET\n");
141 goto disable;
142 }
143
144 if (unlikely(end > lmb_end_of_DRAM())) {
145 pr_err("initrd extends beyond end of memory "
146 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
147 end, (unsigned long)lmb_end_of_DRAM());
148 goto disable;
149 }
129 150
130 /* 151 /*
131 * We are rounding up the start address of usable memory: 152 * If we got this far inspite of the boot loader's best efforts
153 * to the contrary, assume we actually have a valid initrd and
154 * fix up the root dev.
132 */ 155 */
133 curr_pfn = PFN_UP(__MEMORY_START); 156 ROOT_DEV = Root_RAM0;
134 157
135 /* 158 /*
136 * ... and at the end of the usable range downwards: 159 * Address sanitization
137 */ 160 */
138 last_pfn = PFN_DOWN(__pa(memory_end)); 161 initrd_start = (unsigned long)__va(__pa(start));
162 initrd_end = initrd_start + INITRD_SIZE;
139 163
140 if (last_pfn > max_low_pfn) 164 lmb_reserve(__pa(initrd_start), INITRD_SIZE);
141 last_pfn = max_low_pfn;
142 165
143 pages = last_pfn - curr_pfn; 166 return;
144 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages));
145}
146 167
147#ifdef CONFIG_KEXEC 168disable:
148static void __init reserve_crashkernel(void) 169 pr_info("initrd disabled\n");
149{ 170 initrd_start = initrd_end = 0;
150 unsigned long long free_mem;
151 unsigned long long crash_size, crash_base;
152 void *vp;
153 int ret;
154
155 free_mem = ((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT;
156
157 ret = parse_crashkernel(boot_command_line, free_mem,
158 &crash_size, &crash_base);
159 if (ret == 0 && crash_size) {
160 if (crash_base <= 0) {
161 vp = alloc_bootmem_nopanic(crash_size);
162 if (!vp) {
163 printk(KERN_INFO "crashkernel allocation "
164 "failed\n");
165 return;
166 }
167 crash_base = __pa(vp);
168 } else if (reserve_bootmem(crash_base, crash_size,
169 BOOTMEM_EXCLUSIVE) < 0) {
170 printk(KERN_INFO "crashkernel reservation failed - "
171 "memory is in use\n");
172 return;
173 }
174
175 printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
176 "for crashkernel (System RAM: %ldMB)\n",
177 (unsigned long)(crash_size >> 20),
178 (unsigned long)(crash_base >> 20),
179 (unsigned long)(free_mem >> 20));
180 crashk_res.start = crash_base;
181 crashk_res.end = crash_base + crash_size - 1;
182 insert_resource(&iomem_resource, &crashk_res);
183 }
184}
185#else
186static inline void __init reserve_crashkernel(void)
187{}
188#endif 171#endif
172}
189 173
190void __cpuinit calibrate_delay(void) 174void __cpuinit calibrate_delay(void)
191{ 175{
@@ -207,13 +191,18 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
207 unsigned long end_pfn) 191 unsigned long end_pfn)
208{ 192{
209 struct resource *res = &mem_resources[nid]; 193 struct resource *res = &mem_resources[nid];
194 unsigned long start, end;
210 195
211 WARN_ON(res->name); /* max one active range per node for now */ 196 WARN_ON(res->name); /* max one active range per node for now */
212 197
198 start = start_pfn << PAGE_SHIFT;
199 end = end_pfn << PAGE_SHIFT;
200
213 res->name = "System RAM"; 201 res->name = "System RAM";
214 res->start = start_pfn << PAGE_SHIFT; 202 res->start = start;
215 res->end = (end_pfn << PAGE_SHIFT) - 1; 203 res->end = end - 1;
216 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; 204 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
205
217 if (request_resource(&iomem_resource, res)) { 206 if (request_resource(&iomem_resource, res)) {
218 pr_err("unable to request memory_resource 0x%lx 0x%lx\n", 207 pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
219 start_pfn, end_pfn); 208 start_pfn, end_pfn);
@@ -229,138 +218,18 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
229 request_resource(res, &data_resource); 218 request_resource(res, &data_resource);
230 request_resource(res, &bss_resource); 219 request_resource(res, &bss_resource);
231 220
232 add_active_range(nid, start_pfn, end_pfn);
233}
234
235void __init setup_bootmem_allocator(unsigned long free_pfn)
236{
237 unsigned long bootmap_size;
238 unsigned long bootmap_pages, bootmem_paddr;
239 u64 total_pages = (lmb_end_of_DRAM() - __MEMORY_START) >> PAGE_SHIFT;
240 int i;
241
242 bootmap_pages = bootmem_bootmap_pages(total_pages);
243
244 bootmem_paddr = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
245
246 /*
247 * Find a proper area for the bootmem bitmap. After this
248 * bootstrap step all allocations (until the page allocator
249 * is intact) must be done via bootmem_alloc().
250 */
251 bootmap_size = init_bootmem_node(NODE_DATA(0),
252 bootmem_paddr >> PAGE_SHIFT,
253 min_low_pfn, max_low_pfn);
254
255 /* Add active regions with valid PFNs. */
256 for (i = 0; i < lmb.memory.cnt; i++) {
257 unsigned long start_pfn, end_pfn;
258 start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
259 end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
260 __add_active_range(0, start_pfn, end_pfn);
261 }
262
263 /*
264 * Add all physical memory to the bootmem map and mark each
265 * area as present.
266 */
267 register_bootmem_low_pages();
268
269 /* Reserve the sections we're already using. */
270 for (i = 0; i < lmb.reserved.cnt; i++)
271 reserve_bootmem(lmb.reserved.region[i].base,
272 lmb_size_bytes(&lmb.reserved, i),
273 BOOTMEM_DEFAULT);
274
275 node_set_online(0);
276
277 sparse_memory_present_with_active_regions(0);
278
279#ifdef CONFIG_BLK_DEV_INITRD
280 ROOT_DEV = Root_RAM0;
281
282 if (LOADER_TYPE && INITRD_START) {
283 unsigned long initrd_start_phys = INITRD_START + __MEMORY_START;
284
285 if (initrd_start_phys + INITRD_SIZE <= PFN_PHYS(max_low_pfn)) {
286 reserve_bootmem(initrd_start_phys, INITRD_SIZE,
287 BOOTMEM_DEFAULT);
288 initrd_start = (unsigned long)__va(initrd_start_phys);
289 initrd_end = initrd_start + INITRD_SIZE;
290 } else {
291 printk("initrd extends beyond end of memory "
292 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
293 initrd_start_phys + INITRD_SIZE,
294 (unsigned long)PFN_PHYS(max_low_pfn));
295 initrd_start = 0;
296 }
297 }
298#endif
299
300 reserve_crashkernel();
301}
302
303#ifndef CONFIG_NEED_MULTIPLE_NODES
304static void __init setup_memory(void)
305{
306 unsigned long start_pfn;
307 u64 base = min_low_pfn << PAGE_SHIFT;
308 u64 size = (max_low_pfn << PAGE_SHIFT) - base;
309
310 /*
311 * Partially used pages are not usable - thus
312 * we are rounding upwards:
313 */
314 start_pfn = PFN_UP(__pa(_end));
315
316 lmb_add(base, size);
317
318 /*
319 * Reserve the kernel text and
320 * Reserve the bootmem bitmap. We do this in two steps (first step
321 * was init_bootmem()), because this catches the (definitely buggy)
322 * case of us accidentally initializing the bootmem allocator with
323 * an invalid RAM area.
324 */
325 lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
326 (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) -
327 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
328
329 /* 221 /*
330 * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET. 222 * Also make sure that there is a PMB mapping that covers this
223 * range before we attempt to activate it, to avoid reset by MMU.
224 * We can hit this path with NUMA or memory hot-add.
331 */ 225 */
332 if (CONFIG_ZERO_PAGE_OFFSET != 0) 226 pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
333 lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET); 227 PAGE_KERNEL);
334
335 lmb_analyze();
336 lmb_dump_all();
337 228
338 setup_bootmem_allocator(start_pfn); 229 add_active_range(nid, start_pfn, end_pfn);
339}
340#else
341extern void __init setup_memory(void);
342#endif
343
344/*
345 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
346 * is_kdump_kernel() to determine if we are booting after a panic. Hence
347 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
348 */
349#ifdef CONFIG_CRASH_DUMP
350/* elfcorehdr= specifies the location of elf core header
351 * stored by the crashed kernel.
352 */
353static int __init parse_elfcorehdr(char *arg)
354{
355 if (!arg)
356 return -EINVAL;
357 elfcorehdr_addr = memparse(arg, &arg);
358 return 0;
359} 230}
360early_param("elfcorehdr", parse_elfcorehdr);
361#endif
362 231
363void __init __attribute__ ((weak)) plat_early_device_setup(void) 232void __init __weak plat_early_device_setup(void)
364{ 233{
365} 234}
366 235
@@ -401,10 +270,6 @@ void __init setup_arch(char **cmdline_p)
401 bss_resource.start = virt_to_phys(__bss_start); 270 bss_resource.start = virt_to_phys(__bss_start);
402 bss_resource.end = virt_to_phys(_ebss)-1; 271 bss_resource.end = virt_to_phys(_ebss)-1;
403 272
404 memory_start = (unsigned long)__va(__MEMORY_START);
405 if (!memory_end)
406 memory_end = memory_start + __MEMORY_SIZE;
407
408#ifdef CONFIG_CMDLINE_OVERWRITE 273#ifdef CONFIG_CMDLINE_OVERWRITE
409 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); 274 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
410#else 275#else
@@ -421,47 +286,24 @@ void __init setup_arch(char **cmdline_p)
421 286
422 parse_early_param(); 287 parse_early_param();
423 288
424 uncached_init();
425
426 plat_early_device_setup(); 289 plat_early_device_setup();
427 290
428 /* Let earlyprintk output early console messages */
429 early_platform_driver_probe("earlyprintk", 1, 1);
430
431 sh_mv_setup(); 291 sh_mv_setup();
432 292
433 /* 293 /* Let earlyprintk output early console messages */
434 * Find the highest page frame number we have available 294 early_platform_driver_probe("earlyprintk", 1, 1);
435 */
436 max_pfn = PFN_DOWN(__pa(memory_end));
437
438 /*
439 * Determine low and high memory ranges:
440 */
441 max_low_pfn = max_pfn;
442 min_low_pfn = __MEMORY_START >> PAGE_SHIFT;
443
444 nodes_clear(node_online_map);
445 295
446 pmb_init(); 296 paging_init();
447 lmb_init();
448 setup_memory();
449 sparse_init();
450 297
451#ifdef CONFIG_DUMMY_CONSOLE 298#ifdef CONFIG_DUMMY_CONSOLE
452 conswitchp = &dummy_con; 299 conswitchp = &dummy_con;
453#endif 300#endif
454 paging_init();
455
456 ioremap_fixed_init();
457 301
458 /* Perform the machine specific initialisation */ 302 /* Perform the machine specific initialisation */
459 if (likely(sh_mv.mv_setup)) 303 if (likely(sh_mv.mv_setup))
460 sh_mv.mv_setup(cmdline_p); 304 sh_mv.mv_setup(cmdline_p);
461 305
462#ifdef CONFIG_SMP
463 plat_smp_setup(); 306 plat_smp_setup();
464#endif
465} 307}
466 308
467/* processor boot mode configuration */ 309/* processor boot mode configuration */
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 002cc612deef..509b36b45115 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * SMP support for the SuperH processors. 4 * SMP support for the SuperH processors.
5 * 5 *
6 * Copyright (C) 2002 - 2008 Paul Mundt 6 * Copyright (C) 2002 - 2010 Paul Mundt
7 * Copyright (C) 2006 - 2007 Akio Idehara 7 * Copyright (C) 2006 - 2007 Akio Idehara
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -31,7 +31,20 @@
31int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 31int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
32int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 32int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
33 33
34static inline void __init smp_store_cpu_info(unsigned int cpu) 34struct plat_smp_ops *mp_ops = NULL;
35
36/* State of each CPU */
37DEFINE_PER_CPU(int, cpu_state) = { 0 };
38
39void __cpuinit register_smp_ops(struct plat_smp_ops *ops)
40{
41 if (mp_ops)
42 printk(KERN_WARNING "Overriding previously set SMP ops\n");
43
44 mp_ops = ops;
45}
46
47static inline void __cpuinit smp_store_cpu_info(unsigned int cpu)
35{ 48{
36 struct sh_cpuinfo *c = cpu_data + cpu; 49 struct sh_cpuinfo *c = cpu_data + cpu;
37 50
@@ -46,14 +59,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
46 59
47 init_new_context(current, &init_mm); 60 init_new_context(current, &init_mm);
48 current_thread_info()->cpu = cpu; 61 current_thread_info()->cpu = cpu;
49 plat_prepare_cpus(max_cpus); 62 mp_ops->prepare_cpus(max_cpus);
50 63
51#ifndef CONFIG_HOTPLUG_CPU 64#ifndef CONFIG_HOTPLUG_CPU
52 init_cpu_present(&cpu_possible_map); 65 init_cpu_present(&cpu_possible_map);
53#endif 66#endif
54} 67}
55 68
56void __devinit smp_prepare_boot_cpu(void) 69void __init smp_prepare_boot_cpu(void)
57{ 70{
58 unsigned int cpu = smp_processor_id(); 71 unsigned int cpu = smp_processor_id();
59 72
@@ -62,37 +75,137 @@ void __devinit smp_prepare_boot_cpu(void)
62 75
63 set_cpu_online(cpu, true); 76 set_cpu_online(cpu, true);
64 set_cpu_possible(cpu, true); 77 set_cpu_possible(cpu, true);
78
79 per_cpu(cpu_state, cpu) = CPU_ONLINE;
80}
81
82#ifdef CONFIG_HOTPLUG_CPU
83void native_cpu_die(unsigned int cpu)
84{
85 unsigned int i;
86
87 for (i = 0; i < 10; i++) {
88 smp_rmb();
89 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
90 if (system_state == SYSTEM_RUNNING)
91 pr_info("CPU %u is now offline\n", cpu);
92
93 return;
94 }
95
96 msleep(100);
97 }
98
99 pr_err("CPU %u didn't die...\n", cpu);
100}
101
102int native_cpu_disable(unsigned int cpu)
103{
104 return cpu == 0 ? -EPERM : 0;
105}
106
107void play_dead_common(void)
108{
109 idle_task_exit();
110 irq_ctx_exit(raw_smp_processor_id());
111 mb();
112
113 __get_cpu_var(cpu_state) = CPU_DEAD;
114 local_irq_disable();
115}
116
117void native_play_dead(void)
118{
119 play_dead_common();
65} 120}
66 121
122int __cpu_disable(void)
123{
124 unsigned int cpu = smp_processor_id();
125 struct task_struct *p;
126 int ret;
127
128 ret = mp_ops->cpu_disable(cpu);
129 if (ret)
130 return ret;
131
132 /*
133 * Take this CPU offline. Once we clear this, we can't return,
134 * and we must not schedule until we're ready to give up the cpu.
135 */
136 set_cpu_online(cpu, false);
137
138 /*
139 * OK - migrate IRQs away from this CPU
140 */
141 migrate_irqs();
142
143 /*
144 * Stop the local timer for this CPU.
145 */
146 local_timer_stop(cpu);
147
148 /*
149 * Flush user cache and TLB mappings, and then remove this CPU
150 * from the vm mask set of all processes.
151 */
152 flush_cache_all();
153 local_flush_tlb_all();
154
155 read_lock(&tasklist_lock);
156 for_each_process(p)
157 if (p->mm)
158 cpumask_clear_cpu(cpu, mm_cpumask(p->mm));
159 read_unlock(&tasklist_lock);
160
161 return 0;
162}
163#else /* ... !CONFIG_HOTPLUG_CPU */
164int native_cpu_disable(unsigned int cpu)
165{
166 return -ENOSYS;
167}
168
169void native_cpu_die(unsigned int cpu)
170{
171 /* We said "no" in __cpu_disable */
172 BUG();
173}
174
175void native_play_dead(void)
176{
177 BUG();
178}
179#endif
180
67asmlinkage void __cpuinit start_secondary(void) 181asmlinkage void __cpuinit start_secondary(void)
68{ 182{
69 unsigned int cpu; 183 unsigned int cpu = smp_processor_id();
70 struct mm_struct *mm = &init_mm; 184 struct mm_struct *mm = &init_mm;
71 185
72 enable_mmu(); 186 enable_mmu();
73 atomic_inc(&mm->mm_count); 187 atomic_inc(&mm->mm_count);
74 atomic_inc(&mm->mm_users); 188 atomic_inc(&mm->mm_users);
75 current->active_mm = mm; 189 current->active_mm = mm;
76 BUG_ON(current->mm);
77 enter_lazy_tlb(mm, current); 190 enter_lazy_tlb(mm, current);
191 local_flush_tlb_all();
78 192
79 per_cpu_trap_init(); 193 per_cpu_trap_init();
80 194
81 preempt_disable(); 195 preempt_disable();
82 196
83 notify_cpu_starting(smp_processor_id()); 197 notify_cpu_starting(cpu);
84 198
85 local_irq_enable(); 199 local_irq_enable();
86 200
87 cpu = smp_processor_id();
88
89 /* Enable local timers */ 201 /* Enable local timers */
90 local_timer_setup(cpu); 202 local_timer_setup(cpu);
91 calibrate_delay(); 203 calibrate_delay();
92 204
93 smp_store_cpu_info(cpu); 205 smp_store_cpu_info(cpu);
94 206
95 cpu_set(cpu, cpu_online_map); 207 set_cpu_online(cpu, true);
208 per_cpu(cpu_state, cpu) = CPU_ONLINE;
96 209
97 cpu_idle(); 210 cpu_idle();
98} 211}
@@ -111,12 +224,19 @@ int __cpuinit __cpu_up(unsigned int cpu)
111 struct task_struct *tsk; 224 struct task_struct *tsk;
112 unsigned long timeout; 225 unsigned long timeout;
113 226
114 tsk = fork_idle(cpu); 227 tsk = cpu_data[cpu].idle;
115 if (IS_ERR(tsk)) { 228 if (!tsk) {
116 printk(KERN_ERR "Failed forking idle task for cpu %d\n", cpu); 229 tsk = fork_idle(cpu);
117 return PTR_ERR(tsk); 230 if (IS_ERR(tsk)) {
231 pr_err("Failed forking idle task for cpu %d\n", cpu);
232 return PTR_ERR(tsk);
233 }
234
235 cpu_data[cpu].idle = tsk;
118 } 236 }
119 237
238 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
239
120 /* Fill in data in head.S for secondary cpus */ 240 /* Fill in data in head.S for secondary cpus */
121 stack_start.sp = tsk->thread.sp; 241 stack_start.sp = tsk->thread.sp;
122 stack_start.thread_info = tsk->stack; 242 stack_start.thread_info = tsk->stack;
@@ -127,7 +247,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
127 (unsigned long)&stack_start + sizeof(stack_start)); 247 (unsigned long)&stack_start + sizeof(stack_start));
128 wmb(); 248 wmb();
129 249
130 plat_start_cpu(cpu, (unsigned long)_stext); 250 mp_ops->start_cpu(cpu, (unsigned long)_stext);
131 251
132 timeout = jiffies + HZ; 252 timeout = jiffies + HZ;
133 while (time_before(jiffies, timeout)) { 253 while (time_before(jiffies, timeout)) {
@@ -135,6 +255,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
135 break; 255 break;
136 256
137 udelay(10); 257 udelay(10);
258 barrier();
138 } 259 }
139 260
140 if (cpu_online(cpu)) 261 if (cpu_online(cpu))
@@ -159,7 +280,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
159 280
160void smp_send_reschedule(int cpu) 281void smp_send_reschedule(int cpu)
161{ 282{
162 plat_send_ipi(cpu, SMP_MSG_RESCHEDULE); 283 mp_ops->send_ipi(cpu, SMP_MSG_RESCHEDULE);
163} 284}
164 285
165void smp_send_stop(void) 286void smp_send_stop(void)
@@ -172,12 +293,12 @@ void arch_send_call_function_ipi_mask(const struct cpumask *mask)
172 int cpu; 293 int cpu;
173 294
174 for_each_cpu(cpu, mask) 295 for_each_cpu(cpu, mask)
175 plat_send_ipi(cpu, SMP_MSG_FUNCTION); 296 mp_ops->send_ipi(cpu, SMP_MSG_FUNCTION);
176} 297}
177 298
178void arch_send_call_function_single_ipi(int cpu) 299void arch_send_call_function_single_ipi(int cpu)
179{ 300{
180 plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE); 301 mp_ops->send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE);
181} 302}
182 303
183void smp_timer_broadcast(const struct cpumask *mask) 304void smp_timer_broadcast(const struct cpumask *mask)
@@ -185,7 +306,7 @@ void smp_timer_broadcast(const struct cpumask *mask)
185 int cpu; 306 int cpu;
186 307
187 for_each_cpu(cpu, mask) 308 for_each_cpu(cpu, mask)
188 plat_send_ipi(cpu, SMP_MSG_TIMER); 309 mp_ops->send_ipi(cpu, SMP_MSG_TIMER);
189} 310}
190 311
191static void ipi_timer(void) 312static void ipi_timer(void)
@@ -249,7 +370,6 @@ static void flush_tlb_mm_ipi(void *mm)
249 * behalf of debugees, kswapd stealing pages from another process etc). 370 * behalf of debugees, kswapd stealing pages from another process etc).
250 * Kanoj 07/00. 371 * Kanoj 07/00.
251 */ 372 */
252
253void flush_tlb_mm(struct mm_struct *mm) 373void flush_tlb_mm(struct mm_struct *mm)
254{ 374{
255 preempt_disable(); 375 preempt_disable();
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 9b0b633b6c92..948fdb656933 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -52,7 +52,11 @@ static int __init topology_init(void)
52#endif 52#endif
53 53
54 for_each_present_cpu(i) { 54 for_each_present_cpu(i) {
55 ret = register_cpu(&per_cpu(cpu_devices, i), i); 55 struct cpu *c = &per_cpu(cpu_devices, i);
56
57 c->hotpluggable = 1;
58
59 ret = register_cpu(c, i);
56 if (unlikely(ret)) 60 if (unlikely(ret))
57 printk(KERN_WARNING "%s: register_cpu %d failed (%d)\n", 61 printk(KERN_WARNING "%s: register_cpu %d failed (%d)\n",
58 __func__, i, ret); 62 __func__, i, ret);
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index e3f92eb05ffd..e67e140bf1f6 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -944,3 +944,8 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
944 /* Clear all DEBUGINT causes */ 944 /* Clear all DEBUGINT causes */
945 poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0); 945 poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
946} 946}
947
948void __cpuinit per_cpu_trap_init(void)
949{
950 /* Nothing to do for now, VBR initialization later. */
951}
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 3dc8a8a63822..53f7c684afb2 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -10,6 +10,7 @@ cacheops-$(CONFIG_CPU_SH3) := cache-sh3.o
10cacheops-$(CONFIG_CPU_SH4) := cache-sh4.o flush-sh4.o 10cacheops-$(CONFIG_CPU_SH4) := cache-sh4.o flush-sh4.o
11cacheops-$(CONFIG_CPU_SH5) := cache-sh5.o flush-sh4.o 11cacheops-$(CONFIG_CPU_SH5) := cache-sh5.o flush-sh4.o
12cacheops-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o 12cacheops-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
13cacheops-$(CONFIG_CPU_SHX3) += cache-shx3.o
13 14
14obj-y += $(cacheops-y) 15obj-y += $(cacheops-y)
15 16
@@ -18,13 +19,14 @@ mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \
18 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o 19 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o
19 20
20obj-y += $(mmu-y) 21obj-y += $(mmu-y)
21obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o
22 22
23ifdef CONFIG_DEBUG_FS 23debugfs-y := asids-debugfs.o
24obj-$(CONFIG_CPU_SH4) += cache-debugfs.o 24ifndef CONFIG_CACHE_OFF
25debugfs-$(CONFIG_CPU_SH4) += cache-debugfs.o
25endif 26endif
26 27
27ifdef CONFIG_MMU 28ifdef CONFIG_MMU
29debugfs-$(CONFIG_CPU_SH4) += tlb-debugfs.o
28tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o 30tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o
29tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o tlb-urb.o 31tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o tlb-urb.o
30tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o 32tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o
@@ -32,6 +34,7 @@ tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o tlb-urb.o
32obj-y += $(tlb-y) 34obj-y += $(tlb-y)
33endif 35endif
34 36
37obj-$(CONFIG_DEBUG_FS) += $(debugfs-y)
35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 38obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
36obj-$(CONFIG_PMB) += pmb.o 39obj-$(CONFIG_PMB) += pmb.o
37obj-$(CONFIG_NUMA) += numa.o 40obj-$(CONFIG_NUMA) += numa.o
diff --git a/arch/sh/mm/cache-shx3.c b/arch/sh/mm/cache-shx3.c
new file mode 100644
index 000000000000..c0adbee97b5f
--- /dev/null
+++ b/arch/sh/mm/cache-shx3.c
@@ -0,0 +1,44 @@
1/*
2 * arch/sh/mm/cache-shx3.c - SH-X3 optimized cache ops
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/io.h>
13#include <asm/cache.h>
14
15#define CCR_CACHE_SNM 0x40000 /* Hardware-assisted synonym avoidance */
16#define CCR_CACHE_IBE 0x1000000 /* ICBI broadcast */
17
18void __init shx3_cache_init(void)
19{
20 unsigned int ccr;
21
22 ccr = __raw_readl(CCR);
23
24 /*
25 * If we've got cache aliases, resolve them in hardware.
26 */
27 if (boot_cpu_data.dcache.n_aliases || boot_cpu_data.icache.n_aliases) {
28 ccr |= CCR_CACHE_SNM;
29
30 boot_cpu_data.icache.n_aliases = 0;
31 boot_cpu_data.dcache.n_aliases = 0;
32
33 pr_info("Enabling hardware synonym avoidance\n");
34 }
35
36#ifdef CONFIG_SMP
37 /*
38 * Broadcast I-cache block invalidations by default.
39 */
40 ccr |= CCR_CACHE_IBE;
41#endif
42
43 writel_uncached(ccr, CCR);
44}
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 0f4095d7ac8b..ba401d137bb9 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -334,6 +334,13 @@ void __init cpu_cache_init(void)
334 extern void __weak sh4_cache_init(void); 334 extern void __weak sh4_cache_init(void);
335 335
336 sh4_cache_init(); 336 sh4_cache_init();
337
338 if ((boot_cpu_data.type == CPU_SH7786) ||
339 (boot_cpu_data.type == CPU_SHX3)) {
340 extern void __weak shx3_cache_init(void);
341
342 shx3_cache_init();
343 }
337 } 344 }
338 345
339 if (boot_cpu_data.family == CPU_FAMILY_SH5) { 346 if (boot_cpu_data.family == CPU_FAMILY_SH5) {
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 8bf79e3b7bdd..d4c34d757f0d 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -200,7 +200,6 @@ good_area:
200 * make sure we exit gracefully rather than endlessly redo 200 * make sure we exit gracefully rather than endlessly redo
201 * the fault. 201 * the fault.
202 */ 202 */
203survive:
204 fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0); 203 fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0);
205 if (unlikely(fault & VM_FAULT_ERROR)) { 204 if (unlikely(fault & VM_FAULT_ERROR)) {
206 if (fault & VM_FAULT_OOM) 205 if (fault & VM_FAULT_OOM)
@@ -290,15 +289,10 @@ no_context:
290 */ 289 */
291out_of_memory: 290out_of_memory:
292 up_read(&mm->mmap_sem); 291 up_read(&mm->mmap_sem);
293 if (is_global_init(current)) { 292 if (!user_mode(regs))
294 yield(); 293 goto no_context;
295 down_read(&mm->mmap_sem); 294 pagefault_out_of_memory();
296 goto survive; 295 return;
297 }
298 printk("VM: killing process %s\n", tsk->comm);
299 if (user_mode(regs))
300 do_group_exit(SIGKILL);
301 goto no_context;
302 296
303do_sigbus: 297do_sigbus:
304 up_read(&mm->mmap_sem); 298 up_read(&mm->mmap_sem);
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index c505de61a5ca..46f84de62469 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -2,7 +2,7 @@
2 * linux/arch/sh/mm/init.c 2 * linux/arch/sh/mm/init.c
3 * 3 *
4 * Copyright (C) 1999 Niibe Yutaka 4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002 - 2007 Paul Mundt 5 * Copyright (C) 2002 - 2010 Paul Mundt
6 * 6 *
7 * Based on linux/arch/i386/mm/init.c: 7 * Based on linux/arch/i386/mm/init.c:
8 * Copyright (C) 1995 Linus Torvalds 8 * Copyright (C) 1995 Linus Torvalds
@@ -16,17 +16,31 @@
16#include <linux/pagemap.h> 16#include <linux/pagemap.h>
17#include <linux/percpu.h> 17#include <linux/percpu.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/lmb.h>
19#include <linux/dma-mapping.h> 20#include <linux/dma-mapping.h>
20#include <asm/mmu_context.h> 21#include <asm/mmu_context.h>
22#include <asm/mmzone.h>
23#include <asm/kexec.h>
21#include <asm/tlb.h> 24#include <asm/tlb.h>
22#include <asm/cacheflush.h> 25#include <asm/cacheflush.h>
23#include <asm/sections.h> 26#include <asm/sections.h>
27#include <asm/setup.h>
24#include <asm/cache.h> 28#include <asm/cache.h>
25#include <asm/sizes.h> 29#include <asm/sizes.h>
26 30
27DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 31DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
28pgd_t swapper_pg_dir[PTRS_PER_PGD]; 32pgd_t swapper_pg_dir[PTRS_PER_PGD];
29 33
34void __init generic_mem_init(void)
35{
36 lmb_add(__MEMORY_START, __MEMORY_SIZE);
37}
38
39void __init __weak plat_mem_setup(void)
40{
41 /* Nothing to see here, move along. */
42}
43
30#ifdef CONFIG_MMU 44#ifdef CONFIG_MMU
31static pte_t *__get_pte_phys(unsigned long addr) 45static pte_t *__get_pte_phys(unsigned long addr)
32{ 46{
@@ -152,15 +166,166 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
152} 166}
153#endif /* CONFIG_MMU */ 167#endif /* CONFIG_MMU */
154 168
155/* 169void __init allocate_pgdat(unsigned int nid)
156 * paging_init() sets up the page tables 170{
157 */ 171 unsigned long start_pfn, end_pfn;
172#ifdef CONFIG_NEED_MULTIPLE_NODES
173 unsigned long phys;
174#endif
175
176 get_pfn_range_for_nid(nid, &start_pfn, &end_pfn);
177
178#ifdef CONFIG_NEED_MULTIPLE_NODES
179 phys = __lmb_alloc_base(sizeof(struct pglist_data),
180 SMP_CACHE_BYTES, end_pfn << PAGE_SHIFT);
181 /* Retry with all of system memory */
182 if (!phys)
183 phys = __lmb_alloc_base(sizeof(struct pglist_data),
184 SMP_CACHE_BYTES, lmb_end_of_DRAM());
185 if (!phys)
186 panic("Can't allocate pgdat for node %d\n", nid);
187
188 NODE_DATA(nid) = __va(phys);
189 memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
190
191 NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
192#endif
193
194 NODE_DATA(nid)->node_start_pfn = start_pfn;
195 NODE_DATA(nid)->node_spanned_pages = end_pfn - start_pfn;
196}
197
198static void __init bootmem_init_one_node(unsigned int nid)
199{
200 unsigned long total_pages, paddr;
201 unsigned long end_pfn;
202 struct pglist_data *p;
203 int i;
204
205 p = NODE_DATA(nid);
206
207 /* Nothing to do.. */
208 if (!p->node_spanned_pages)
209 return;
210
211 end_pfn = p->node_start_pfn + p->node_spanned_pages;
212
213 total_pages = bootmem_bootmap_pages(p->node_spanned_pages);
214
215 paddr = lmb_alloc(total_pages << PAGE_SHIFT, PAGE_SIZE);
216 if (!paddr)
217 panic("Can't allocate bootmap for nid[%d]\n", nid);
218
219 init_bootmem_node(p, paddr >> PAGE_SHIFT, p->node_start_pfn, end_pfn);
220
221 free_bootmem_with_active_regions(nid, end_pfn);
222
223 /*
224 * XXX Handle initial reservations for the system memory node
225 * only for the moment, we'll refactor this later for handling
226 * reservations in other nodes.
227 */
228 if (nid == 0) {
229 /* Reserve the sections we're already using. */
230 for (i = 0; i < lmb.reserved.cnt; i++)
231 reserve_bootmem(lmb.reserved.region[i].base,
232 lmb_size_bytes(&lmb.reserved, i),
233 BOOTMEM_DEFAULT);
234 }
235
236 sparse_memory_present_with_active_regions(nid);
237}
238
239static void __init do_init_bootmem(void)
240{
241 int i;
242
243 /* Add active regions with valid PFNs. */
244 for (i = 0; i < lmb.memory.cnt; i++) {
245 unsigned long start_pfn, end_pfn;
246 start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
247 end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
248 __add_active_range(0, start_pfn, end_pfn);
249 }
250
251 /* All of system RAM sits in node 0 for the non-NUMA case */
252 allocate_pgdat(0);
253 node_set_online(0);
254
255 plat_mem_setup();
256
257 for_each_online_node(i)
258 bootmem_init_one_node(i);
259
260 sparse_init();
261}
262
263static void __init early_reserve_mem(void)
264{
265 unsigned long start_pfn;
266
267 /*
268 * Partially used pages are not usable - thus
269 * we are rounding upwards:
270 */
271 start_pfn = PFN_UP(__pa(_end));
272
273 /*
274 * Reserve the kernel text and Reserve the bootmem bitmap. We do
275 * this in two steps (first step was init_bootmem()), because
276 * this catches the (definitely buggy) case of us accidentally
277 * initializing the bootmem allocator with an invalid RAM area.
278 */
279 lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
280 (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) -
281 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
282
283 /*
284 * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
285 */
286 if (CONFIG_ZERO_PAGE_OFFSET != 0)
287 lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET);
288
289 /*
290 * Handle additional early reservations
291 */
292 check_for_initrd();
293 reserve_crashkernel();
294}
295
158void __init paging_init(void) 296void __init paging_init(void)
159{ 297{
160 unsigned long max_zone_pfns[MAX_NR_ZONES]; 298 unsigned long max_zone_pfns[MAX_NR_ZONES];
161 unsigned long vaddr, end; 299 unsigned long vaddr, end;
162 int nid; 300 int nid;
163 301
302 lmb_init();
303
304 sh_mv.mv_mem_init();
305
306 early_reserve_mem();
307
308 lmb_enforce_memory_limit(memory_limit);
309 lmb_analyze();
310
311 lmb_dump_all();
312
313 /*
314 * Determine low and high memory ranges:
315 */
316 max_low_pfn = max_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
317 min_low_pfn = __MEMORY_START >> PAGE_SHIFT;
318
319 nodes_clear(node_online_map);
320
321 memory_start = (unsigned long)__va(__MEMORY_START);
322 memory_end = memory_start + (memory_limit ?: lmb_phys_mem_size());
323
324 uncached_init();
325 pmb_init();
326 do_init_bootmem();
327 ioremap_fixed_init();
328
164 /* We don't need to map the kernel through the TLB, as 329 /* We don't need to map the kernel through the TLB, as
165 * it is permanatly mapped using P1. So clear the 330 * it is permanatly mapped using P1. So clear the
166 * entire pgd. */ 331 * entire pgd. */
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 961b34085e3b..a2e645f64a37 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -24,44 +24,6 @@ EXPORT_SYMBOL_GPL(node_data);
24 * latency. Each node's pgdat is node-local at the beginning of the node, 24 * latency. Each node's pgdat is node-local at the beginning of the node,
25 * immediately followed by the node mem map. 25 * immediately followed by the node mem map.
26 */ 26 */
27void __init setup_memory(void)
28{
29 unsigned long free_pfn = PFN_UP(__pa(_end));
30 u64 base = min_low_pfn << PAGE_SHIFT;
31 u64 size = (max_low_pfn << PAGE_SHIFT) - base;
32
33 lmb_add(base, size);
34
35 /* Reserve the LMB regions used by the kernel, initrd, etc.. */
36 lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
37 (PFN_PHYS(free_pfn) + PAGE_SIZE - 1) -
38 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
39
40 /*
41 * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
42 */
43 if (CONFIG_ZERO_PAGE_OFFSET != 0)
44 lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET);
45
46 lmb_analyze();
47 lmb_dump_all();
48
49 /*
50 * Node 0 sets up its pgdat at the first available pfn,
51 * and bumps it up before setting up the bootmem allocator.
52 */
53 NODE_DATA(0) = pfn_to_kaddr(free_pfn);
54 memset(NODE_DATA(0), 0, sizeof(struct pglist_data));
55 free_pfn += PFN_UP(sizeof(struct pglist_data));
56 NODE_DATA(0)->bdata = &bootmem_node_data[0];
57
58 /* Set up node 0 */
59 setup_bootmem_allocator(free_pfn);
60
61 /* Give the platforms a chance to hook up their nodes */
62 plat_mem_setup();
63}
64
65void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end) 27void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
66{ 28{
67 unsigned long bootmap_pages; 29 unsigned long bootmap_pages;
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index e43ec600afcf..18623ba751b3 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -341,6 +341,8 @@ int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys,
341 unsigned long flags, pmb_flags; 341 unsigned long flags, pmb_flags;
342 int i, mapped; 342 int i, mapped;
343 343
344 if (size < SZ_16M)
345 return -EINVAL;
344 if (!pmb_addr_valid(vaddr, size)) 346 if (!pmb_addr_valid(vaddr, size))
345 return -EFAULT; 347 return -EFAULT;
346 if (pmb_mapping_exists(vaddr, phys, size)) 348 if (pmb_mapping_exists(vaddr, phys, size))
@@ -680,7 +682,7 @@ static void __init pmb_merge(struct pmb_entry *head)
680 /* 682 /*
681 * The merged page size must be valid. 683 * The merged page size must be valid.
682 */ 684 */
683 if (!pmb_size_valid(newsize)) 685 if (!depth || !pmb_size_valid(newsize))
684 return; 686 return;
685 687
686 head->flags &= ~PMB_SZ_MASK; 688 head->flags &= ~PMB_SZ_MASK;
diff --git a/arch/sh/mm/tlb-debugfs.c b/arch/sh/mm/tlb-debugfs.c
new file mode 100644
index 000000000000..229bf75f28df
--- /dev/null
+++ b/arch/sh/mm/tlb-debugfs.c
@@ -0,0 +1,179 @@
1/*
2 * arch/sh/mm/tlb-debugfs.c
3 *
4 * debugfs ops for SH-4 ITLB/UTLBs.
5 *
6 * Copyright (C) 2010 Matt Fleming
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/debugfs.h>
15#include <linux/seq_file.h>
16#include <asm/processor.h>
17#include <asm/mmu_context.h>
18#include <asm/tlbflush.h>
19
20enum tlb_type {
21 TLB_TYPE_ITLB,
22 TLB_TYPE_UTLB,
23};
24
25static struct {
26 int bits;
27 const char *size;
28} tlb_sizes[] = {
29 { 0x0, " 1KB" },
30 { 0x1, " 4KB" },
31 { 0x2, " 8KB" },
32 { 0x4, " 64KB" },
33 { 0x5, "256KB" },
34 { 0x7, " 1MB" },
35 { 0x8, " 4MB" },
36 { 0xc, " 64MB" },
37};
38
39static int tlb_seq_show(struct seq_file *file, void *iter)
40{
41 unsigned int tlb_type = (unsigned int)file->private;
42 unsigned long addr1, addr2, data1, data2;
43 unsigned long flags;
44 unsigned long mmucr;
45 unsigned int nentries, entry;
46 unsigned int urb;
47
48 mmucr = __raw_readl(MMUCR);
49 if ((mmucr & 0x1) == 0) {
50 seq_printf(file, "address translation disabled\n");
51 return 0;
52 }
53
54 if (tlb_type == TLB_TYPE_ITLB) {
55 addr1 = MMU_ITLB_ADDRESS_ARRAY;
56 addr2 = MMU_ITLB_ADDRESS_ARRAY2;
57 data1 = MMU_ITLB_DATA_ARRAY;
58 data2 = MMU_ITLB_DATA_ARRAY2;
59 nentries = 4;
60 } else {
61 addr1 = MMU_UTLB_ADDRESS_ARRAY;
62 addr2 = MMU_UTLB_ADDRESS_ARRAY2;
63 data1 = MMU_UTLB_DATA_ARRAY;
64 data2 = MMU_UTLB_DATA_ARRAY2;
65 nentries = 64;
66 }
67
68 local_irq_save(flags);
69 jump_to_uncached();
70
71 urb = (mmucr & MMUCR_URB) >> MMUCR_URB_SHIFT;
72
73 /* Make the "entry >= urb" test fail. */
74 if (urb == 0)
75 urb = MMUCR_URB_NENTRIES + 1;
76
77 if (tlb_type == TLB_TYPE_ITLB) {
78 addr1 = MMU_ITLB_ADDRESS_ARRAY;
79 addr2 = MMU_ITLB_ADDRESS_ARRAY2;
80 data1 = MMU_ITLB_DATA_ARRAY;
81 data2 = MMU_ITLB_DATA_ARRAY2;
82 nentries = 4;
83 } else {
84 addr1 = MMU_UTLB_ADDRESS_ARRAY;
85 addr2 = MMU_UTLB_ADDRESS_ARRAY2;
86 data1 = MMU_UTLB_DATA_ARRAY;
87 data2 = MMU_UTLB_DATA_ARRAY2;
88 nentries = 64;
89 }
90
91 seq_printf(file, "entry: vpn ppn asid size valid wired\n");
92
93 for (entry = 0; entry < nentries; entry++) {
94 unsigned long vpn, ppn, asid, size;
95 unsigned long valid;
96 unsigned long val;
97 const char *sz = " ?";
98 int i;
99
100 val = __raw_readl(addr1 | (entry << MMU_TLB_ENTRY_SHIFT));
101 ctrl_barrier();
102 vpn = val & 0xfffffc00;
103 valid = val & 0x100;
104
105 val = __raw_readl(addr2 | (entry << MMU_TLB_ENTRY_SHIFT));
106 ctrl_barrier();
107 asid = val & MMU_CONTEXT_ASID_MASK;
108
109 val = __raw_readl(data1 | (entry << MMU_TLB_ENTRY_SHIFT));
110 ctrl_barrier();
111 ppn = (val & 0x0ffffc00) << 4;
112
113 val = __raw_readl(data2 | (entry << MMU_TLB_ENTRY_SHIFT));
114 ctrl_barrier();
115 size = (val & 0xf0) >> 4;
116
117 for (i = 0; i < ARRAY_SIZE(tlb_sizes); i++) {
118 if (tlb_sizes[i].bits == size)
119 break;
120 }
121
122 if (i != ARRAY_SIZE(tlb_sizes))
123 sz = tlb_sizes[i].size;
124
125 seq_printf(file, "%2d: 0x%08lx 0x%08lx %5lu %s %s %s\n",
126 entry, vpn, ppn, asid,
127 sz, valid ? "V" : "-",
128 (urb <= entry) ? "W" : "-");
129 }
130
131 back_to_cached();
132 local_irq_restore(flags);
133
134 return 0;
135}
136
137static int tlb_debugfs_open(struct inode *inode, struct file *file)
138{
139 return single_open(file, tlb_seq_show, inode->i_private);
140}
141
142static const struct file_operations tlb_debugfs_fops = {
143 .owner = THIS_MODULE,
144 .open = tlb_debugfs_open,
145 .read = seq_read,
146 .llseek = seq_lseek,
147 .release = single_release,
148};
149
150static int __init tlb_debugfs_init(void)
151{
152 struct dentry *itlb, *utlb;
153
154 itlb = debugfs_create_file("itlb", S_IRUSR, sh_debugfs_root,
155 (unsigned int *)TLB_TYPE_ITLB,
156 &tlb_debugfs_fops);
157 if (unlikely(!itlb))
158 return -ENOMEM;
159 if (IS_ERR(itlb))
160 return PTR_ERR(itlb);
161
162 utlb = debugfs_create_file("utlb", S_IRUSR, sh_debugfs_root,
163 (unsigned int *)TLB_TYPE_UTLB,
164 &tlb_debugfs_fops);
165 if (unlikely(!utlb)) {
166 debugfs_remove(itlb);
167 return -ENOMEM;
168 }
169
170 if (IS_ERR(utlb)) {
171 debugfs_remove(itlb);
172 return PTR_ERR(utlb);
173 }
174
175 return 0;
176}
177module_init(tlb_debugfs_init);
178
179MODULE_LICENSE("GPL v2");
diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c
index 706da1d3a67a..03db41cc1268 100644
--- a/arch/sh/mm/tlbflush_64.c
+++ b/arch/sh/mm/tlbflush_64.c
@@ -189,7 +189,6 @@ good_area:
189 * make sure we exit gracefully rather than endlessly redo 189 * make sure we exit gracefully rather than endlessly redo
190 * the fault. 190 * the fault.
191 */ 191 */
192survive:
193 fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0); 192 fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0);
194 if (unlikely(fault & VM_FAULT_ERROR)) { 193 if (unlikely(fault & VM_FAULT_ERROR)) {
195 if (fault & VM_FAULT_OOM) 194 if (fault & VM_FAULT_OOM)
@@ -294,22 +293,11 @@ no_context:
294 * us unable to handle the page fault gracefully. 293 * us unable to handle the page fault gracefully.
295 */ 294 */
296out_of_memory: 295out_of_memory:
297 if (is_global_init(current)) {
298 panic("INIT out of memory\n");
299 yield();
300 goto survive;
301 }
302 printk("fault:Out of memory\n");
303 up_read(&mm->mmap_sem); 296 up_read(&mm->mmap_sem);
304 if (is_global_init(current)) { 297 if (!user_mode(regs))
305 yield(); 298 goto no_context;
306 down_read(&mm->mmap_sem); 299 pagefault_out_of_memory();
307 goto survive; 300 return;
308 }
309 printk("VM: killing process %s\n", tsk->comm);
310 if (user_mode(regs))
311 do_group_exit(SIGKILL);
312 goto no_context;
313 301
314do_sigbus: 302do_sigbus:
315 printk("fault:Do sigbus\n"); 303 printk("fault:Do sigbus\n");
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 9908d477ccd9..d6781ce687e2 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -75,7 +75,7 @@ config ARCH_USES_GETTIMEOFFSET
75 75
76config GENERIC_CMOS_UPDATE 76config GENERIC_CMOS_UPDATE
77 bool 77 bool
78 default y if SPARC64 78 default y
79 79
80config GENERIC_CLOCKEVENTS 80config GENERIC_CLOCKEVENTS
81 bool 81 bool
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index f0d343c3b956..7ae128b19d3f 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -25,7 +25,7 @@ extern int atomic_cmpxchg(atomic_t *, int, int);
25extern int atomic_add_unless(atomic_t *, int, int); 25extern int atomic_add_unless(atomic_t *, int, int);
26extern void atomic_set(atomic_t *, int); 26extern void atomic_set(atomic_t *, int);
27 27
28#define atomic_read(v) ((v)->counter) 28#define atomic_read(v) (*(volatile int *)&(v)->counter)
29 29
30#define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v))) 30#define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v)))
31#define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v))) 31#define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v)))
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index f2e48009989e..2050ca02c423 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -13,8 +13,8 @@
13#define ATOMIC_INIT(i) { (i) } 13#define ATOMIC_INIT(i) { (i) }
14#define ATOMIC64_INIT(i) { (i) } 14#define ATOMIC64_INIT(i) { (i) }
15 15
16#define atomic_read(v) ((v)->counter) 16#define atomic_read(v) (*(volatile int *)&(v)->counter)
17#define atomic64_read(v) ((v)->counter) 17#define atomic64_read(v) (*(volatile long *)&(v)->counter)
18 18
19#define atomic_set(v, i) (((v)->counter) = i) 19#define atomic_set(v, i) (((v)->counter) = i)
20#define atomic64_set(v, i) (((v)->counter) = i) 20#define atomic64_set(v, i) (((v)->counter) = i)
diff --git a/arch/sparc/include/asm/bitops_64.h b/arch/sparc/include/asm/bitops_64.h
index e72ac9cdfb98..766121a67a24 100644
--- a/arch/sparc/include/asm/bitops_64.h
+++ b/arch/sparc/include/asm/bitops_64.h
@@ -44,7 +44,7 @@ extern void change_bit(unsigned long nr, volatile unsigned long *addr);
44 44
45#ifdef ULTRA_HAS_POPULATION_COUNT 45#ifdef ULTRA_HAS_POPULATION_COUNT
46 46
47static inline unsigned int hweight64(unsigned long w) 47static inline unsigned int __arch_hweight64(unsigned long w)
48{ 48{
49 unsigned int res; 49 unsigned int res;
50 50
@@ -52,7 +52,7 @@ static inline unsigned int hweight64(unsigned long w)
52 return res; 52 return res;
53} 53}
54 54
55static inline unsigned int hweight32(unsigned int w) 55static inline unsigned int __arch_hweight32(unsigned int w)
56{ 56{
57 unsigned int res; 57 unsigned int res;
58 58
@@ -60,7 +60,7 @@ static inline unsigned int hweight32(unsigned int w)
60 return res; 60 return res;
61} 61}
62 62
63static inline unsigned int hweight16(unsigned int w) 63static inline unsigned int __arch_hweight16(unsigned int w)
64{ 64{
65 unsigned int res; 65 unsigned int res;
66 66
@@ -68,7 +68,7 @@ static inline unsigned int hweight16(unsigned int w)
68 return res; 68 return res;
69} 69}
70 70
71static inline unsigned int hweight8(unsigned int w) 71static inline unsigned int __arch_hweight8(unsigned int w)
72{ 72{
73 unsigned int res; 73 unsigned int res;
74 74
@@ -78,9 +78,10 @@ static inline unsigned int hweight8(unsigned int w)
78 78
79#else 79#else
80 80
81#include <asm-generic/bitops/hweight.h> 81#include <asm-generic/bitops/arch_hweight.h>
82 82
83#endif 83#endif
84#include <asm-generic/bitops/const_hweight.h>
84#include <asm-generic/bitops/lock.h> 85#include <asm-generic/bitops/lock.h>
85#endif /* __KERNEL__ */ 86#endif /* __KERNEL__ */
86 87
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h
index 41f85ae4bd4a..78b07009f60a 100644
--- a/arch/sparc/include/asm/cache.h
+++ b/arch/sparc/include/asm/cache.h
@@ -7,6 +7,8 @@
7#ifndef _SPARC_CACHE_H 7#ifndef _SPARC_CACHE_H
8#define _SPARC_CACHE_H 8#define _SPARC_CACHE_H
9 9
10#define ARCH_SLAB_MINALIGN __alignof__(unsigned long long)
11
10#define L1_CACHE_SHIFT 5 12#define L1_CACHE_SHIFT 5
11#define L1_CACHE_BYTES 32 13#define L1_CACHE_BYTES 32
12#define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))) 14#define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)))
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index e2771939341d..34ce49f80eac 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -14,6 +14,7 @@
14 14
15#include <linux/perf_event.h> 15#include <linux/perf_event.h>
16#include <linux/kprobes.h> 16#include <linux/kprobes.h>
17#include <linux/ftrace.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18#include <linux/kdebug.h> 19#include <linux/kdebug.h>
19#include <linux/mutex.h> 20#include <linux/mutex.h>
@@ -1276,6 +1277,9 @@ static void perf_callchain_kernel(struct pt_regs *regs,
1276 struct perf_callchain_entry *entry) 1277 struct perf_callchain_entry *entry)
1277{ 1278{
1278 unsigned long ksp, fp; 1279 unsigned long ksp, fp;
1280#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1281 int graph = 0;
1282#endif
1279 1283
1280 callchain_store(entry, PERF_CONTEXT_KERNEL); 1284 callchain_store(entry, PERF_CONTEXT_KERNEL);
1281 callchain_store(entry, regs->tpc); 1285 callchain_store(entry, regs->tpc);
@@ -1303,6 +1307,16 @@ static void perf_callchain_kernel(struct pt_regs *regs,
1303 fp = (unsigned long)sf->fp + STACK_BIAS; 1307 fp = (unsigned long)sf->fp + STACK_BIAS;
1304 } 1308 }
1305 callchain_store(entry, pc); 1309 callchain_store(entry, pc);
1310#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1311 if ((pc + 8UL) == (unsigned long) &return_to_handler) {
1312 int index = current->curr_ret_stack;
1313 if (current->ret_stack && index >= graph) {
1314 pc = current->ret_stack[index - graph].ret;
1315 callchain_store(entry, pc);
1316 graph++;
1317 }
1318 }
1319#endif
1306 } while (entry->nr < PERF_MAX_STACK_DEPTH); 1320 } while (entry->nr < PERF_MAX_STACK_DEPTH);
1307} 1321}
1308 1322
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index a5cf3864b31f..dbe81a368b45 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -202,6 +202,7 @@ void show_regs(struct pt_regs *regs)
202 regs->u_regs[15]); 202 regs->u_regs[15]);
203 printk("RPC: <%pS>\n", (void *) regs->u_regs[15]); 203 printk("RPC: <%pS>\n", (void *) regs->u_regs[15]);
204 show_regwindow(regs); 204 show_regwindow(regs);
205 show_stack(current, (unsigned long *) regs->u_regs[UREG_FP]);
205} 206}
206 207
207struct global_reg_snapshot global_reg_snapshot[NR_CPUS]; 208struct global_reg_snapshot global_reg_snapshot[NR_CPUS];
diff --git a/arch/sparc/kernel/stacktrace.c b/arch/sparc/kernel/stacktrace.c
index acb12f673757..3e0815349630 100644
--- a/arch/sparc/kernel/stacktrace.c
+++ b/arch/sparc/kernel/stacktrace.c
@@ -1,6 +1,7 @@
1#include <linux/sched.h> 1#include <linux/sched.h>
2#include <linux/stacktrace.h> 2#include <linux/stacktrace.h>
3#include <linux/thread_info.h> 3#include <linux/thread_info.h>
4#include <linux/ftrace.h>
4#include <linux/module.h> 5#include <linux/module.h>
5#include <asm/ptrace.h> 6#include <asm/ptrace.h>
6#include <asm/stacktrace.h> 7#include <asm/stacktrace.h>
@@ -12,6 +13,10 @@ static void __save_stack_trace(struct thread_info *tp,
12 bool skip_sched) 13 bool skip_sched)
13{ 14{
14 unsigned long ksp, fp; 15 unsigned long ksp, fp;
16#ifdef CONFIG_FUNCTION_GRAPH_TRACER
17 struct task_struct *t;
18 int graph = 0;
19#endif
15 20
16 if (tp == current_thread_info()) { 21 if (tp == current_thread_info()) {
17 stack_trace_flush(); 22 stack_trace_flush();
@@ -21,6 +26,9 @@ static void __save_stack_trace(struct thread_info *tp,
21 } 26 }
22 27
23 fp = ksp + STACK_BIAS; 28 fp = ksp + STACK_BIAS;
29#ifdef CONFIG_FUNCTION_GRAPH_TRACER
30 t = tp->task;
31#endif
24 do { 32 do {
25 struct sparc_stackf *sf; 33 struct sparc_stackf *sf;
26 struct pt_regs *regs; 34 struct pt_regs *regs;
@@ -44,8 +52,21 @@ static void __save_stack_trace(struct thread_info *tp,
44 52
45 if (trace->skip > 0) 53 if (trace->skip > 0)
46 trace->skip--; 54 trace->skip--;
47 else if (!skip_sched || !in_sched_functions(pc)) 55 else if (!skip_sched || !in_sched_functions(pc)) {
48 trace->entries[trace->nr_entries++] = pc; 56 trace->entries[trace->nr_entries++] = pc;
57#ifdef CONFIG_FUNCTION_GRAPH_TRACER
58 if ((pc + 8UL) == (unsigned long) &return_to_handler) {
59 int index = t->curr_ret_stack;
60 if (t->ret_stack && index >= graph) {
61 pc = t->ret_stack[index - graph].ret;
62 if (trace->nr_entries <
63 trace->max_entries)
64 trace->entries[trace->nr_entries++] = pc;
65 graph++;
66 }
67 }
68#endif
69 }
49 } while (trace->nr_entries < trace->max_entries); 70 } while (trace->nr_entries < trace->max_entries);
50} 71}
51 72
diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c
index 0d4c09b15efc..4453003032b5 100644
--- a/arch/sparc/kernel/time_32.c
+++ b/arch/sparc/kernel/time_32.c
@@ -78,6 +78,11 @@ __volatile__ unsigned int *master_l10_counter;
78 78
79u32 (*do_arch_gettimeoffset)(void); 79u32 (*do_arch_gettimeoffset)(void);
80 80
81int update_persistent_clock(struct timespec now)
82{
83 return set_rtc_mmss(now.tv_sec);
84}
85
81/* 86/*
82 * timer_interrupt() needs to keep up the real-time clock, 87 * timer_interrupt() needs to keep up the real-time clock,
83 * as well as call the "do_timer()" routine every clocktick 88 * as well as call the "do_timer()" routine every clocktick
@@ -87,9 +92,6 @@ u32 (*do_arch_gettimeoffset)(void);
87 92
88static irqreturn_t timer_interrupt(int dummy, void *dev_id) 93static irqreturn_t timer_interrupt(int dummy, void *dev_id)
89{ 94{
90 /* last time the cmos clock got updated */
91 static long last_rtc_update;
92
93#ifndef CONFIG_SMP 95#ifndef CONFIG_SMP
94 profile_tick(CPU_PROFILING); 96 profile_tick(CPU_PROFILING);
95#endif 97#endif
@@ -101,16 +103,6 @@ static irqreturn_t timer_interrupt(int dummy, void *dev_id)
101 103
102 do_timer(1); 104 do_timer(1);
103 105
104 /* Determine when to update the Mostek clock. */
105 if (ntp_synced() &&
106 xtime.tv_sec > last_rtc_update + 660 &&
107 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
108 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
109 if (set_rtc_mmss(xtime.tv_sec) == 0)
110 last_rtc_update = xtime.tv_sec;
111 else
112 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
113 }
114 write_sequnlock(&xtime_lock); 106 write_sequnlock(&xtime_lock);
115 107
116#ifndef CONFIG_SMP 108#ifndef CONFIG_SMP
diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c
index 9da57f032983..42ad2ba85010 100644
--- a/arch/sparc/kernel/traps_64.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -17,6 +17,7 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/kdebug.h> 19#include <linux/kdebug.h>
20#include <linux/ftrace.h>
20#include <linux/gfp.h> 21#include <linux/gfp.h>
21 22
22#include <asm/smp.h> 23#include <asm/smp.h>
@@ -2154,6 +2155,9 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp)
2154 unsigned long fp, thread_base, ksp; 2155 unsigned long fp, thread_base, ksp;
2155 struct thread_info *tp; 2156 struct thread_info *tp;
2156 int count = 0; 2157 int count = 0;
2158#ifdef CONFIG_FUNCTION_GRAPH_TRACER
2159 int graph = 0;
2160#endif
2157 2161
2158 ksp = (unsigned long) _ksp; 2162 ksp = (unsigned long) _ksp;
2159 if (!tsk) 2163 if (!tsk)
@@ -2193,6 +2197,16 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp)
2193 } 2197 }
2194 2198
2195 printk(" [%016lx] %pS\n", pc, (void *) pc); 2199 printk(" [%016lx] %pS\n", pc, (void *) pc);
2200#ifdef CONFIG_FUNCTION_GRAPH_TRACER
2201 if ((pc + 8UL) == (unsigned long) &return_to_handler) {
2202 int index = tsk->curr_ret_stack;
2203 if (tsk->ret_stack && index >= graph) {
2204 pc = tsk->ret_stack[index - graph].ret;
2205 printk(" [%016lx] %pS\n", pc, (void *) pc);
2206 graph++;
2207 }
2208 }
2209#endif
2196 } while (++count < 16); 2210 } while (++count < 16);
2197} 2211}
2198 2212
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9458685902bd..a2d3a5fbeeda 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -53,11 +53,15 @@ config X86
53 select HAVE_KERNEL_LZMA 53 select HAVE_KERNEL_LZMA
54 select HAVE_KERNEL_LZO 54 select HAVE_KERNEL_LZO
55 select HAVE_HW_BREAKPOINT 55 select HAVE_HW_BREAKPOINT
56 select HAVE_MIXED_BREAKPOINTS_REGS
56 select PERF_EVENTS 57 select PERF_EVENTS
57 select ANON_INODES 58 select ANON_INODES
58 select HAVE_ARCH_KMEMCHECK 59 select HAVE_ARCH_KMEMCHECK
59 select HAVE_USER_RETURN_NOTIFIER 60 select HAVE_USER_RETURN_NOTIFIER
60 61
62config INSTRUCTION_DECODER
63 def_bool (KPROBES || PERF_EVENTS)
64
61config OUTPUT_FORMAT 65config OUTPUT_FORMAT
62 string 66 string
63 default "elf32-i386" if X86_32 67 default "elf32-i386" if X86_32
@@ -197,20 +201,17 @@ config HAVE_INTEL_TXT
197 201
198# Use the generic interrupt handling code in kernel/irq/: 202# Use the generic interrupt handling code in kernel/irq/:
199config GENERIC_HARDIRQS 203config GENERIC_HARDIRQS
200 bool 204 def_bool y
201 default y
202 205
203config GENERIC_HARDIRQS_NO__DO_IRQ 206config GENERIC_HARDIRQS_NO__DO_IRQ
204 def_bool y 207 def_bool y
205 208
206config GENERIC_IRQ_PROBE 209config GENERIC_IRQ_PROBE
207 bool 210 def_bool y
208 default y
209 211
210config GENERIC_PENDING_IRQ 212config GENERIC_PENDING_IRQ
211 bool 213 def_bool y
212 depends on GENERIC_HARDIRQS && SMP 214 depends on GENERIC_HARDIRQS && SMP
213 default y
214 215
215config USE_GENERIC_SMP_HELPERS 216config USE_GENERIC_SMP_HELPERS
216 def_bool y 217 def_bool y
@@ -225,19 +226,22 @@ config X86_64_SMP
225 depends on X86_64 && SMP 226 depends on X86_64 && SMP
226 227
227config X86_HT 228config X86_HT
228 bool 229 def_bool y
229 depends on SMP 230 depends on SMP
230 default y
231 231
232config X86_TRAMPOLINE 232config X86_TRAMPOLINE
233 bool 233 def_bool y
234 depends on SMP || (64BIT && ACPI_SLEEP) 234 depends on SMP || (64BIT && ACPI_SLEEP)
235 default y
236 235
237config X86_32_LAZY_GS 236config X86_32_LAZY_GS
238 def_bool y 237 def_bool y
239 depends on X86_32 && !CC_STACKPROTECTOR 238 depends on X86_32 && !CC_STACKPROTECTOR
240 239
240config ARCH_HWEIGHT_CFLAGS
241 string
242 default "-fcall-saved-ecx -fcall-saved-edx" if X86_32
243 default "-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11" if X86_64
244
241config KTIME_SCALAR 245config KTIME_SCALAR
242 def_bool X86_32 246 def_bool X86_32
243source "init/Kconfig" 247source "init/Kconfig"
@@ -447,7 +451,7 @@ config X86_NUMAQ
447 firmware with - send email to <Martin.Bligh@us.ibm.com>. 451 firmware with - send email to <Martin.Bligh@us.ibm.com>.
448 452
449config X86_SUPPORTS_MEMORY_FAILURE 453config X86_SUPPORTS_MEMORY_FAILURE
450 bool 454 def_bool y
451 # MCE code calls memory_failure(): 455 # MCE code calls memory_failure():
452 depends on X86_MCE 456 depends on X86_MCE
453 # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 457 # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
@@ -455,7 +459,6 @@ config X86_SUPPORTS_MEMORY_FAILURE
455 # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 459 # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
456 depends on X86_64 || !SPARSEMEM 460 depends on X86_64 || !SPARSEMEM
457 select ARCH_SUPPORTS_MEMORY_FAILURE 461 select ARCH_SUPPORTS_MEMORY_FAILURE
458 default y
459 462
460config X86_VISWS 463config X86_VISWS
461 bool "SGI 320/540 (Visual Workstation)" 464 bool "SGI 320/540 (Visual Workstation)"
@@ -570,7 +573,6 @@ config PARAVIRT_SPINLOCKS
570 573
571config PARAVIRT_CLOCK 574config PARAVIRT_CLOCK
572 bool 575 bool
573 default n
574 576
575endif 577endif
576 578
@@ -749,7 +751,6 @@ config MAXSMP
749 bool "Configure Maximum number of SMP Processors and NUMA Nodes" 751 bool "Configure Maximum number of SMP Processors and NUMA Nodes"
750 depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL 752 depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
751 select CPUMASK_OFFSTACK 753 select CPUMASK_OFFSTACK
752 default n
753 ---help--- 754 ---help---
754 Configure maximum number of CPUS and NUMA Nodes for this architecture. 755 Configure maximum number of CPUS and NUMA Nodes for this architecture.
755 If unsure, say N. 756 If unsure, say N.
@@ -829,7 +830,6 @@ config X86_VISWS_APIC
829 830
830config X86_REROUTE_FOR_BROKEN_BOOT_IRQS 831config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
831 bool "Reroute for broken boot IRQs" 832 bool "Reroute for broken boot IRQs"
832 default n
833 depends on X86_IO_APIC 833 depends on X86_IO_APIC
834 ---help--- 834 ---help---
835 This option enables a workaround that fixes a source of 835 This option enables a workaround that fixes a source of
@@ -876,9 +876,8 @@ config X86_MCE_AMD
876 the DRAM Error Threshold. 876 the DRAM Error Threshold.
877 877
878config X86_ANCIENT_MCE 878config X86_ANCIENT_MCE
879 def_bool n 879 bool "Support for old Pentium 5 / WinChip machine checks"
880 depends on X86_32 && X86_MCE 880 depends on X86_32 && X86_MCE
881 prompt "Support for old Pentium 5 / WinChip machine checks"
882 ---help--- 881 ---help---
883 Include support for machine check handling on old Pentium 5 or WinChip 882 Include support for machine check handling on old Pentium 5 or WinChip
884 systems. These typically need to be enabled explicitely on the command 883 systems. These typically need to be enabled explicitely on the command
@@ -886,8 +885,7 @@ config X86_ANCIENT_MCE
886 885
887config X86_MCE_THRESHOLD 886config X86_MCE_THRESHOLD
888 depends on X86_MCE_AMD || X86_MCE_INTEL 887 depends on X86_MCE_AMD || X86_MCE_INTEL
889 bool 888 def_bool y
890 default y
891 889
892config X86_MCE_INJECT 890config X86_MCE_INJECT
893 depends on X86_MCE 891 depends on X86_MCE
@@ -1026,8 +1024,8 @@ config X86_CPUID
1026 1024
1027choice 1025choice
1028 prompt "High Memory Support" 1026 prompt "High Memory Support"
1029 default HIGHMEM4G if !X86_NUMAQ
1030 default HIGHMEM64G if X86_NUMAQ 1027 default HIGHMEM64G if X86_NUMAQ
1028 default HIGHMEM4G
1031 depends on X86_32 1029 depends on X86_32
1032 1030
1033config NOHIGHMEM 1031config NOHIGHMEM
@@ -1285,7 +1283,7 @@ source "mm/Kconfig"
1285 1283
1286config HIGHPTE 1284config HIGHPTE
1287 bool "Allocate 3rd-level pagetables from highmem" 1285 bool "Allocate 3rd-level pagetables from highmem"
1288 depends on X86_32 && (HIGHMEM4G || HIGHMEM64G) 1286 depends on HIGHMEM
1289 ---help--- 1287 ---help---
1290 The VM uses one page table entry for each page of physical memory. 1288 The VM uses one page table entry for each page of physical memory.
1291 For systems with a lot of RAM, this can be wasteful of precious 1289 For systems with a lot of RAM, this can be wasteful of precious
@@ -1369,8 +1367,7 @@ config MATH_EMULATION
1369 kernel, it won't hurt. 1367 kernel, it won't hurt.
1370 1368
1371config MTRR 1369config MTRR
1372 bool 1370 def_bool y
1373 default y
1374 prompt "MTRR (Memory Type Range Register) support" if EMBEDDED 1371 prompt "MTRR (Memory Type Range Register) support" if EMBEDDED
1375 ---help--- 1372 ---help---
1376 On Intel P6 family processors (Pentium Pro, Pentium II and later) 1373 On Intel P6 family processors (Pentium Pro, Pentium II and later)
@@ -1436,8 +1433,7 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
1436 mtrr_spare_reg_nr=N on the kernel command line. 1433 mtrr_spare_reg_nr=N on the kernel command line.
1437 1434
1438config X86_PAT 1435config X86_PAT
1439 bool 1436 def_bool y
1440 default y
1441 prompt "x86 PAT support" if EMBEDDED 1437 prompt "x86 PAT support" if EMBEDDED
1442 depends on MTRR 1438 depends on MTRR
1443 ---help--- 1439 ---help---
@@ -1605,8 +1601,7 @@ config X86_NEED_RELOCS
1605 depends on X86_32 && RELOCATABLE 1601 depends on X86_32 && RELOCATABLE
1606 1602
1607config PHYSICAL_ALIGN 1603config PHYSICAL_ALIGN
1608 hex 1604 hex "Alignment value to which kernel should be aligned" if X86_32
1609 prompt "Alignment value to which kernel should be aligned" if X86_32
1610 default "0x1000000" 1605 default "0x1000000"
1611 range 0x2000 0x1000000 1606 range 0x2000 0x1000000
1612 ---help--- 1607 ---help---
@@ -1653,7 +1648,6 @@ config COMPAT_VDSO
1653 1648
1654config CMDLINE_BOOL 1649config CMDLINE_BOOL
1655 bool "Built-in kernel command line" 1650 bool "Built-in kernel command line"
1656 default n
1657 ---help--- 1651 ---help---
1658 Allow for specifying boot arguments to the kernel at 1652 Allow for specifying boot arguments to the kernel at
1659 build time. On some systems (e.g. embedded ones), it is 1653 build time. On some systems (e.g. embedded ones), it is
@@ -1687,7 +1681,6 @@ config CMDLINE
1687 1681
1688config CMDLINE_OVERRIDE 1682config CMDLINE_OVERRIDE
1689 bool "Built-in command line overrides boot loader arguments" 1683 bool "Built-in command line overrides boot loader arguments"
1690 default n
1691 depends on CMDLINE_BOOL 1684 depends on CMDLINE_BOOL
1692 ---help--- 1685 ---help---
1693 Set this option to 'Y' to have the kernel ignore the boot loader 1686 Set this option to 'Y' to have the kernel ignore the boot loader
@@ -1723,8 +1716,7 @@ source "drivers/acpi/Kconfig"
1723source "drivers/sfi/Kconfig" 1716source "drivers/sfi/Kconfig"
1724 1717
1725config X86_APM_BOOT 1718config X86_APM_BOOT
1726 bool 1719 def_bool y
1727 default y
1728 depends on APM || APM_MODULE 1720 depends on APM || APM_MODULE
1729 1721
1730menuconfig APM 1722menuconfig APM
@@ -1953,8 +1945,7 @@ config DMAR_DEFAULT_ON
1953 experimental. 1945 experimental.
1954 1946
1955config DMAR_BROKEN_GFX_WA 1947config DMAR_BROKEN_GFX_WA
1956 def_bool n 1948 bool "Workaround broken graphics drivers (going away soon)"
1957 prompt "Workaround broken graphics drivers (going away soon)"
1958 depends on DMAR && BROKEN 1949 depends on DMAR && BROKEN
1959 ---help--- 1950 ---help---
1960 Current Graphics drivers tend to use physical address 1951 Current Graphics drivers tend to use physical address
@@ -2052,7 +2043,6 @@ config SCx200HR_TIMER
2052config OLPC 2043config OLPC
2053 bool "One Laptop Per Child support" 2044 bool "One Laptop Per Child support"
2054 select GPIOLIB 2045 select GPIOLIB
2055 default n
2056 ---help--- 2046 ---help---
2057 Add support for detecting the unique features of the OLPC 2047 Add support for detecting the unique features of the OLPC
2058 XO hardware. 2048 XO hardware.
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index a19829374e6a..2ac9069890cd 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -338,6 +338,10 @@ config X86_F00F_BUG
338 def_bool y 338 def_bool y
339 depends on M586MMX || M586TSC || M586 || M486 || M386 339 depends on M586MMX || M586TSC || M586 || M486 || M386
340 340
341config X86_INVD_BUG
342 def_bool y
343 depends on M486 || M386
344
341config X86_WP_WORKS_OK 345config X86_WP_WORKS_OK
342 def_bool y 346 def_bool y
343 depends on !M386 347 depends on !M386
@@ -502,23 +506,3 @@ config CPU_SUP_UMC_32
502 CPU might render the kernel unbootable. 506 CPU might render the kernel unbootable.
503 507
504 If unsure, say N. 508 If unsure, say N.
505
506config X86_DS
507 def_bool X86_PTRACE_BTS
508 depends on X86_DEBUGCTLMSR
509 select HAVE_HW_BRANCH_TRACER
510
511config X86_PTRACE_BTS
512 bool "Branch Trace Store"
513 default y
514 depends on X86_DEBUGCTLMSR
515 depends on BROKEN
516 ---help---
517 This adds a ptrace interface to the hardware's branch trace store.
518
519 Debuggers may use it to collect an execution trace of the debugged
520 application in order to answer the question 'how did I get here?'.
521 Debuggers may trace user mode as well as kernel mode.
522
523 Say Y unless there is no application development on this machine
524 and you want to save a small amount of code size.
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index bc01e3ebfeb2..75085080b63e 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -45,7 +45,6 @@ config EARLY_PRINTK
45 45
46config EARLY_PRINTK_DBGP 46config EARLY_PRINTK_DBGP
47 bool "Early printk via EHCI debug port" 47 bool "Early printk via EHCI debug port"
48 default n
49 depends on EARLY_PRINTK && PCI 48 depends on EARLY_PRINTK && PCI
50 ---help--- 49 ---help---
51 Write kernel log output directly into the EHCI debug port. 50 Write kernel log output directly into the EHCI debug port.
@@ -76,7 +75,6 @@ config DEBUG_PER_CPU_MAPS
76 bool "Debug access to per_cpu maps" 75 bool "Debug access to per_cpu maps"
77 depends on DEBUG_KERNEL 76 depends on DEBUG_KERNEL
78 depends on SMP 77 depends on SMP
79 default n
80 ---help--- 78 ---help---
81 Say Y to verify that the per_cpu map being accessed has 79 Say Y to verify that the per_cpu map being accessed has
82 been setup. Adds a fair amount of code to kernel memory 80 been setup. Adds a fair amount of code to kernel memory
@@ -174,15 +172,6 @@ config IOMMU_LEAK
174 Add a simple leak tracer to the IOMMU code. This is useful when you 172 Add a simple leak tracer to the IOMMU code. This is useful when you
175 are debugging a buggy device driver that leaks IOMMU mappings. 173 are debugging a buggy device driver that leaks IOMMU mappings.
176 174
177config X86_DS_SELFTEST
178 bool "DS selftest"
179 default y
180 depends on DEBUG_KERNEL
181 depends on X86_DS
182 ---help---
183 Perform Debug Store selftests at boot time.
184 If in doubt, say "N".
185
186config HAVE_MMIOTRACE_SUPPORT 175config HAVE_MMIOTRACE_SUPPORT
187 def_bool y 176 def_bool y
188 177
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 0a43dc515e4c..8aa1b59b9074 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -95,8 +95,9 @@ sp-$(CONFIG_X86_64) := rsp
95cfi := $(call as-instr,.cfi_startproc\n.cfi_rel_offset $(sp-y)$(comma)0\n.cfi_endproc,-DCONFIG_AS_CFI=1) 95cfi := $(call as-instr,.cfi_startproc\n.cfi_rel_offset $(sp-y)$(comma)0\n.cfi_endproc,-DCONFIG_AS_CFI=1)
96# is .cfi_signal_frame supported too? 96# is .cfi_signal_frame supported too?
97cfi-sigframe := $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1) 97cfi-sigframe := $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONFIG_AS_CFI_SIGNAL_FRAME=1)
98KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) 98cfi-sections := $(call as-instr,.cfi_sections .debug_frame,-DCONFIG_AS_CFI_SECTIONS=1)
99KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) 99KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections)
100KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections)
100 101
101LDFLAGS := -m elf_$(UTS_MACHINE) 102LDFLAGS := -m elf_$(UTS_MACHINE)
102 103
diff --git a/arch/x86/include/asm/alternative-asm.h b/arch/x86/include/asm/alternative-asm.h
index b97f786a48d5..a63a68be1cce 100644
--- a/arch/x86/include/asm/alternative-asm.h
+++ b/arch/x86/include/asm/alternative-asm.h
@@ -6,8 +6,8 @@
6 .macro LOCK_PREFIX 6 .macro LOCK_PREFIX
71: lock 71: lock
8 .section .smp_locks,"a" 8 .section .smp_locks,"a"
9 _ASM_ALIGN 9 .balign 4
10 _ASM_PTR 1b 10 .long 1b - .
11 .previous 11 .previous
12 .endm 12 .endm
13#else 13#else
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index b09ec55650b3..03b6bb5394a0 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -28,20 +28,20 @@
28 */ 28 */
29 29
30#ifdef CONFIG_SMP 30#ifdef CONFIG_SMP
31#define LOCK_PREFIX \ 31#define LOCK_PREFIX_HERE \
32 ".section .smp_locks,\"a\"\n" \ 32 ".section .smp_locks,\"a\"\n" \
33 _ASM_ALIGN "\n" \ 33 ".balign 4\n" \
34 _ASM_PTR "661f\n" /* address */ \ 34 ".long 671f - .\n" /* offset */ \
35 ".previous\n" \ 35 ".previous\n" \
36 "661:\n\tlock; " 36 "671:"
37
38#define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; "
37 39
38#else /* ! CONFIG_SMP */ 40#else /* ! CONFIG_SMP */
41#define LOCK_PREFIX_HERE ""
39#define LOCK_PREFIX "" 42#define LOCK_PREFIX ""
40#endif 43#endif
41 44
42/* This must be included *after* the definition of LOCK_PREFIX */
43#include <asm/cpufeature.h>
44
45struct alt_instr { 45struct alt_instr {
46 u8 *instr; /* original instruction */ 46 u8 *instr; /* original instruction */
47 u8 *replacement; 47 u8 *replacement;
@@ -96,6 +96,12 @@ static inline int alternatives_text_reserved(void *start, void *end)
96 ".previous" 96 ".previous"
97 97
98/* 98/*
99 * This must be included *after* the definition of ALTERNATIVE due to
100 * <asm/arch_hweight.h>
101 */
102#include <asm/cpufeature.h>
103
104/*
99 * Alternative instructions for different CPU types or capabilities. 105 * Alternative instructions for different CPU types or capabilities.
100 * 106 *
101 * This allows to use optimized instructions even on generic binary 107 * This allows to use optimized instructions even on generic binary
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index 86a0ff0aeac7..7014e88bc779 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -174,6 +174,40 @@
174 (~((1ULL << (12 + ((lvl) * 9))) - 1))) 174 (~((1ULL << (12 + ((lvl) * 9))) - 1)))
175#define PM_ALIGNED(lvl, addr) ((PM_MAP_MASK(lvl) & (addr)) == (addr)) 175#define PM_ALIGNED(lvl, addr) ((PM_MAP_MASK(lvl) & (addr)) == (addr))
176 176
177/*
178 * Returns the page table level to use for a given page size
179 * Pagesize is expected to be a power-of-two
180 */
181#define PAGE_SIZE_LEVEL(pagesize) \
182 ((__ffs(pagesize) - 12) / 9)
183/*
184 * Returns the number of ptes to use for a given page size
185 * Pagesize is expected to be a power-of-two
186 */
187#define PAGE_SIZE_PTE_COUNT(pagesize) \
188 (1ULL << ((__ffs(pagesize) - 12) % 9))
189
190/*
191 * Aligns a given io-virtual address to a given page size
192 * Pagesize is expected to be a power-of-two
193 */
194#define PAGE_SIZE_ALIGN(address, pagesize) \
195 ((address) & ~((pagesize) - 1))
196/*
197 * Creates an IOMMU PTE for an address an a given pagesize
198 * The PTE has no permission bits set
199 * Pagesize is expected to be a power-of-two larger than 4096
200 */
201#define PAGE_SIZE_PTE(address, pagesize) \
202 (((address) | ((pagesize) - 1)) & \
203 (~(pagesize >> 1)) & PM_ADDR_MASK)
204
205/*
206 * Takes a PTE value with mode=0x07 and returns the page size it maps
207 */
208#define PTE_PAGE_SIZE(pte) \
209 (1ULL << (1 + ffz(((pte) | 0xfffULL))))
210
177#define IOMMU_PTE_P (1ULL << 0) 211#define IOMMU_PTE_P (1ULL << 0)
178#define IOMMU_PTE_TV (1ULL << 1) 212#define IOMMU_PTE_TV (1ULL << 1)
179#define IOMMU_PTE_U (1ULL << 59) 213#define IOMMU_PTE_U (1ULL << 59)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index b4ac2cdcb64f..1fa03e04ae44 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -373,6 +373,7 @@ extern atomic_t init_deasserted;
373extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); 373extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
374#endif 374#endif
375 375
376#ifdef CONFIG_X86_LOCAL_APIC
376static inline u32 apic_read(u32 reg) 377static inline u32 apic_read(u32 reg)
377{ 378{
378 return apic->read(reg); 379 return apic->read(reg);
@@ -403,10 +404,19 @@ static inline u32 safe_apic_wait_icr_idle(void)
403 return apic->safe_wait_icr_idle(); 404 return apic->safe_wait_icr_idle();
404} 405}
405 406
407#else /* CONFIG_X86_LOCAL_APIC */
408
409static inline u32 apic_read(u32 reg) { return 0; }
410static inline void apic_write(u32 reg, u32 val) { }
411static inline u64 apic_icr_read(void) { return 0; }
412static inline void apic_icr_write(u32 low, u32 high) { }
413static inline void apic_wait_icr_idle(void) { }
414static inline u32 safe_apic_wait_icr_idle(void) { return 0; }
415
416#endif /* CONFIG_X86_LOCAL_APIC */
406 417
407static inline void ack_APIC_irq(void) 418static inline void ack_APIC_irq(void)
408{ 419{
409#ifdef CONFIG_X86_LOCAL_APIC
410 /* 420 /*
411 * ack_APIC_irq() actually gets compiled as a single instruction 421 * ack_APIC_irq() actually gets compiled as a single instruction
412 * ... yummie. 422 * ... yummie.
@@ -414,7 +424,6 @@ static inline void ack_APIC_irq(void)
414 424
415 /* Docs say use 0 for future compatibility */ 425 /* Docs say use 0 for future compatibility */
416 apic_write(APIC_EOI, 0); 426 apic_write(APIC_EOI, 0);
417#endif
418} 427}
419 428
420static inline unsigned default_get_apic_id(unsigned long x) 429static inline unsigned default_get_apic_id(unsigned long x)
diff --git a/arch/x86/include/asm/arch_hweight.h b/arch/x86/include/asm/arch_hweight.h
new file mode 100644
index 000000000000..9686c3d9ff73
--- /dev/null
+++ b/arch/x86/include/asm/arch_hweight.h
@@ -0,0 +1,61 @@
1#ifndef _ASM_X86_HWEIGHT_H
2#define _ASM_X86_HWEIGHT_H
3
4#ifdef CONFIG_64BIT
5/* popcnt %edi, %eax -- redundant REX prefix for alignment */
6#define POPCNT32 ".byte 0xf3,0x40,0x0f,0xb8,0xc7"
7/* popcnt %rdi, %rax */
8#define POPCNT64 ".byte 0xf3,0x48,0x0f,0xb8,0xc7"
9#define REG_IN "D"
10#define REG_OUT "a"
11#else
12/* popcnt %eax, %eax */
13#define POPCNT32 ".byte 0xf3,0x0f,0xb8,0xc0"
14#define REG_IN "a"
15#define REG_OUT "a"
16#endif
17
18/*
19 * __sw_hweightXX are called from within the alternatives below
20 * and callee-clobbered registers need to be taken care of. See
21 * ARCH_HWEIGHT_CFLAGS in <arch/x86/Kconfig> for the respective
22 * compiler switches.
23 */
24static inline unsigned int __arch_hweight32(unsigned int w)
25{
26 unsigned int res = 0;
27
28 asm (ALTERNATIVE("call __sw_hweight32", POPCNT32, X86_FEATURE_POPCNT)
29 : "="REG_OUT (res)
30 : REG_IN (w));
31
32 return res;
33}
34
35static inline unsigned int __arch_hweight16(unsigned int w)
36{
37 return __arch_hweight32(w & 0xffff);
38}
39
40static inline unsigned int __arch_hweight8(unsigned int w)
41{
42 return __arch_hweight32(w & 0xff);
43}
44
45static inline unsigned long __arch_hweight64(__u64 w)
46{
47 unsigned long res = 0;
48
49#ifdef CONFIG_X86_32
50 return __arch_hweight32((u32)w) +
51 __arch_hweight32((u32)(w >> 32));
52#else
53 asm (ALTERNATIVE("call __sw_hweight64", POPCNT64, X86_FEATURE_POPCNT)
54 : "="REG_OUT (res)
55 : REG_IN (w));
56#endif /* CONFIG_X86_32 */
57
58 return res;
59}
60
61#endif
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
index 8f8217b9bdac..952a826ac4e5 100644
--- a/arch/x86/include/asm/atomic.h
+++ b/arch/x86/include/asm/atomic.h
@@ -22,7 +22,7 @@
22 */ 22 */
23static inline int atomic_read(const atomic_t *v) 23static inline int atomic_read(const atomic_t *v)
24{ 24{
25 return v->counter; 25 return (*(volatile int *)&(v)->counter);
26} 26}
27 27
28/** 28/**
@@ -246,6 +246,29 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
246 246
247#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 247#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
248 248
249/*
250 * atomic_dec_if_positive - decrement by 1 if old value positive
251 * @v: pointer of type atomic_t
252 *
253 * The function returns the old value of *v minus 1, even if
254 * the atomic variable, v, was not decremented.
255 */
256static inline int atomic_dec_if_positive(atomic_t *v)
257{
258 int c, old, dec;
259 c = atomic_read(v);
260 for (;;) {
261 dec = c - 1;
262 if (unlikely(dec < 0))
263 break;
264 old = atomic_cmpxchg((v), c, dec);
265 if (likely(old == c))
266 break;
267 c = old;
268 }
269 return dec;
270}
271
249/** 272/**
250 * atomic_inc_short - increment of a short integer 273 * atomic_inc_short - increment of a short integer
251 * @v: pointer to type int 274 * @v: pointer to type int
diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h
index 03027bf28de5..2a934aa19a43 100644
--- a/arch/x86/include/asm/atomic64_32.h
+++ b/arch/x86/include/asm/atomic64_32.h
@@ -14,109 +14,193 @@ typedef struct {
14 14
15#define ATOMIC64_INIT(val) { (val) } 15#define ATOMIC64_INIT(val) { (val) }
16 16
17extern u64 atomic64_cmpxchg(atomic64_t *ptr, u64 old_val, u64 new_val); 17#ifdef CONFIG_X86_CMPXCHG64
18#define ATOMIC64_ALTERNATIVE_(f, g) "call atomic64_" #g "_cx8"
19#else
20#define ATOMIC64_ALTERNATIVE_(f, g) ALTERNATIVE("call atomic64_" #f "_386", "call atomic64_" #g "_cx8", X86_FEATURE_CX8)
21#endif
22
23#define ATOMIC64_ALTERNATIVE(f) ATOMIC64_ALTERNATIVE_(f, f)
24
25/**
26 * atomic64_cmpxchg - cmpxchg atomic64 variable
27 * @p: pointer to type atomic64_t
28 * @o: expected value
29 * @n: new value
30 *
31 * Atomically sets @v to @n if it was equal to @o and returns
32 * the old value.
33 */
34
35static inline long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n)
36{
37 return cmpxchg64(&v->counter, o, n);
38}
18 39
19/** 40/**
20 * atomic64_xchg - xchg atomic64 variable 41 * atomic64_xchg - xchg atomic64 variable
21 * @ptr: pointer to type atomic64_t 42 * @v: pointer to type atomic64_t
22 * @new_val: value to assign 43 * @n: value to assign
23 * 44 *
24 * Atomically xchgs the value of @ptr to @new_val and returns 45 * Atomically xchgs the value of @v to @n and returns
25 * the old value. 46 * the old value.
26 */ 47 */
27extern u64 atomic64_xchg(atomic64_t *ptr, u64 new_val); 48static inline long long atomic64_xchg(atomic64_t *v, long long n)
49{
50 long long o;
51 unsigned high = (unsigned)(n >> 32);
52 unsigned low = (unsigned)n;
53 asm volatile(ATOMIC64_ALTERNATIVE(xchg)
54 : "=A" (o), "+b" (low), "+c" (high)
55 : "S" (v)
56 : "memory"
57 );
58 return o;
59}
28 60
29/** 61/**
30 * atomic64_set - set atomic64 variable 62 * atomic64_set - set atomic64 variable
31 * @ptr: pointer to type atomic64_t 63 * @v: pointer to type atomic64_t
32 * @new_val: value to assign 64 * @n: value to assign
33 * 65 *
34 * Atomically sets the value of @ptr to @new_val. 66 * Atomically sets the value of @v to @n.
35 */ 67 */
36extern void atomic64_set(atomic64_t *ptr, u64 new_val); 68static inline void atomic64_set(atomic64_t *v, long long i)
69{
70 unsigned high = (unsigned)(i >> 32);
71 unsigned low = (unsigned)i;
72 asm volatile(ATOMIC64_ALTERNATIVE(set)
73 : "+b" (low), "+c" (high)
74 : "S" (v)
75 : "eax", "edx", "memory"
76 );
77}
37 78
38/** 79/**
39 * atomic64_read - read atomic64 variable 80 * atomic64_read - read atomic64 variable
40 * @ptr: pointer to type atomic64_t 81 * @v: pointer to type atomic64_t
41 * 82 *
42 * Atomically reads the value of @ptr and returns it. 83 * Atomically reads the value of @v and returns it.
43 */ 84 */
44static inline u64 atomic64_read(atomic64_t *ptr) 85static inline long long atomic64_read(atomic64_t *v)
45{ 86{
46 u64 res; 87 long long r;
47 88 asm volatile(ATOMIC64_ALTERNATIVE(read)
48 /* 89 : "=A" (r), "+c" (v)
49 * Note, we inline this atomic64_t primitive because 90 : : "memory"
50 * it only clobbers EAX/EDX and leaves the others 91 );
51 * untouched. We also (somewhat subtly) rely on the 92 return r;
52 * fact that cmpxchg8b returns the current 64-bit value 93 }
53 * of the memory location we are touching:
54 */
55 asm volatile(
56 "mov %%ebx, %%eax\n\t"
57 "mov %%ecx, %%edx\n\t"
58 LOCK_PREFIX "cmpxchg8b %1\n"
59 : "=&A" (res)
60 : "m" (*ptr)
61 );
62
63 return res;
64}
65
66extern u64 atomic64_read(atomic64_t *ptr);
67 94
68/** 95/**
69 * atomic64_add_return - add and return 96 * atomic64_add_return - add and return
70 * @delta: integer value to add 97 * @i: integer value to add
71 * @ptr: pointer to type atomic64_t 98 * @v: pointer to type atomic64_t
72 * 99 *
73 * Atomically adds @delta to @ptr and returns @delta + *@ptr 100 * Atomically adds @i to @v and returns @i + *@v
74 */ 101 */
75extern u64 atomic64_add_return(u64 delta, atomic64_t *ptr); 102static inline long long atomic64_add_return(long long i, atomic64_t *v)
103{
104 asm volatile(ATOMIC64_ALTERNATIVE(add_return)
105 : "+A" (i), "+c" (v)
106 : : "memory"
107 );
108 return i;
109}
76 110
77/* 111/*
78 * Other variants with different arithmetic operators: 112 * Other variants with different arithmetic operators:
79 */ 113 */
80extern u64 atomic64_sub_return(u64 delta, atomic64_t *ptr); 114static inline long long atomic64_sub_return(long long i, atomic64_t *v)
81extern u64 atomic64_inc_return(atomic64_t *ptr); 115{
82extern u64 atomic64_dec_return(atomic64_t *ptr); 116 asm volatile(ATOMIC64_ALTERNATIVE(sub_return)
117 : "+A" (i), "+c" (v)
118 : : "memory"
119 );
120 return i;
121}
122
123static inline long long atomic64_inc_return(atomic64_t *v)
124{
125 long long a;
126 asm volatile(ATOMIC64_ALTERNATIVE(inc_return)
127 : "=A" (a)
128 : "S" (v)
129 : "memory", "ecx"
130 );
131 return a;
132}
133
134static inline long long atomic64_dec_return(atomic64_t *v)
135{
136 long long a;
137 asm volatile(ATOMIC64_ALTERNATIVE(dec_return)
138 : "=A" (a)
139 : "S" (v)
140 : "memory", "ecx"
141 );
142 return a;
143}
83 144
84/** 145/**
85 * atomic64_add - add integer to atomic64 variable 146 * atomic64_add - add integer to atomic64 variable
86 * @delta: integer value to add 147 * @i: integer value to add
87 * @ptr: pointer to type atomic64_t 148 * @v: pointer to type atomic64_t
88 * 149 *
89 * Atomically adds @delta to @ptr. 150 * Atomically adds @i to @v.
90 */ 151 */
91extern void atomic64_add(u64 delta, atomic64_t *ptr); 152static inline long long atomic64_add(long long i, atomic64_t *v)
153{
154 asm volatile(ATOMIC64_ALTERNATIVE_(add, add_return)
155 : "+A" (i), "+c" (v)
156 : : "memory"
157 );
158 return i;
159}
92 160
93/** 161/**
94 * atomic64_sub - subtract the atomic64 variable 162 * atomic64_sub - subtract the atomic64 variable
95 * @delta: integer value to subtract 163 * @i: integer value to subtract
96 * @ptr: pointer to type atomic64_t 164 * @v: pointer to type atomic64_t
97 * 165 *
98 * Atomically subtracts @delta from @ptr. 166 * Atomically subtracts @i from @v.
99 */ 167 */
100extern void atomic64_sub(u64 delta, atomic64_t *ptr); 168static inline long long atomic64_sub(long long i, atomic64_t *v)
169{
170 asm volatile(ATOMIC64_ALTERNATIVE_(sub, sub_return)
171 : "+A" (i), "+c" (v)
172 : : "memory"
173 );
174 return i;
175}
101 176
102/** 177/**
103 * atomic64_sub_and_test - subtract value from variable and test result 178 * atomic64_sub_and_test - subtract value from variable and test result
104 * @delta: integer value to subtract 179 * @i: integer value to subtract
105 * @ptr: pointer to type atomic64_t 180 * @v: pointer to type atomic64_t
106 * 181 *
107 * Atomically subtracts @delta from @ptr and returns 182 * Atomically subtracts @i from @v and returns
108 * true if the result is zero, or false for all 183 * true if the result is zero, or false for all
109 * other cases. 184 * other cases.
110 */ 185 */
111extern int atomic64_sub_and_test(u64 delta, atomic64_t *ptr); 186static inline int atomic64_sub_and_test(long long i, atomic64_t *v)
187{
188 return atomic64_sub_return(i, v) == 0;
189}
112 190
113/** 191/**
114 * atomic64_inc - increment atomic64 variable 192 * atomic64_inc - increment atomic64 variable
115 * @ptr: pointer to type atomic64_t 193 * @v: pointer to type atomic64_t
116 * 194 *
117 * Atomically increments @ptr by 1. 195 * Atomically increments @v by 1.
118 */ 196 */
119extern void atomic64_inc(atomic64_t *ptr); 197static inline void atomic64_inc(atomic64_t *v)
198{
199 asm volatile(ATOMIC64_ALTERNATIVE_(inc, inc_return)
200 : : "S" (v)
201 : "memory", "eax", "ecx", "edx"
202 );
203}
120 204
121/** 205/**
122 * atomic64_dec - decrement atomic64 variable 206 * atomic64_dec - decrement atomic64 variable
@@ -124,37 +208,97 @@ extern void atomic64_inc(atomic64_t *ptr);
124 * 208 *
125 * Atomically decrements @ptr by 1. 209 * Atomically decrements @ptr by 1.
126 */ 210 */
127extern void atomic64_dec(atomic64_t *ptr); 211static inline void atomic64_dec(atomic64_t *v)
212{
213 asm volatile(ATOMIC64_ALTERNATIVE_(dec, dec_return)
214 : : "S" (v)
215 : "memory", "eax", "ecx", "edx"
216 );
217}
128 218
129/** 219/**
130 * atomic64_dec_and_test - decrement and test 220 * atomic64_dec_and_test - decrement and test
131 * @ptr: pointer to type atomic64_t 221 * @v: pointer to type atomic64_t
132 * 222 *
133 * Atomically decrements @ptr by 1 and 223 * Atomically decrements @v by 1 and
134 * returns true if the result is 0, or false for all other 224 * returns true if the result is 0, or false for all other
135 * cases. 225 * cases.
136 */ 226 */
137extern int atomic64_dec_and_test(atomic64_t *ptr); 227static inline int atomic64_dec_and_test(atomic64_t *v)
228{
229 return atomic64_dec_return(v) == 0;
230}
138 231
139/** 232/**
140 * atomic64_inc_and_test - increment and test 233 * atomic64_inc_and_test - increment and test
141 * @ptr: pointer to type atomic64_t 234 * @v: pointer to type atomic64_t
142 * 235 *
143 * Atomically increments @ptr by 1 236 * Atomically increments @v by 1
144 * and returns true if the result is zero, or false for all 237 * and returns true if the result is zero, or false for all
145 * other cases. 238 * other cases.
146 */ 239 */
147extern int atomic64_inc_and_test(atomic64_t *ptr); 240static inline int atomic64_inc_and_test(atomic64_t *v)
241{
242 return atomic64_inc_return(v) == 0;
243}
148 244
149/** 245/**
150 * atomic64_add_negative - add and test if negative 246 * atomic64_add_negative - add and test if negative
151 * @delta: integer value to add 247 * @i: integer value to add
152 * @ptr: pointer to type atomic64_t 248 * @v: pointer to type atomic64_t
153 * 249 *
154 * Atomically adds @delta to @ptr and returns true 250 * Atomically adds @i to @v and returns true
155 * if the result is negative, or false when 251 * if the result is negative, or false when
156 * result is greater than or equal to zero. 252 * result is greater than or equal to zero.
157 */ 253 */
158extern int atomic64_add_negative(u64 delta, atomic64_t *ptr); 254static inline int atomic64_add_negative(long long i, atomic64_t *v)
255{
256 return atomic64_add_return(i, v) < 0;
257}
258
259/**
260 * atomic64_add_unless - add unless the number is a given value
261 * @v: pointer of type atomic64_t
262 * @a: the amount to add to v...
263 * @u: ...unless v is equal to u.
264 *
265 * Atomically adds @a to @v, so long as it was not @u.
266 * Returns non-zero if @v was not @u, and zero otherwise.
267 */
268static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u)
269{
270 unsigned low = (unsigned)u;
271 unsigned high = (unsigned)(u >> 32);
272 asm volatile(ATOMIC64_ALTERNATIVE(add_unless) "\n\t"
273 : "+A" (a), "+c" (v), "+S" (low), "+D" (high)
274 : : "memory");
275 return (int)a;
276}
277
278
279static inline int atomic64_inc_not_zero(atomic64_t *v)
280{
281 int r;
282 asm volatile(ATOMIC64_ALTERNATIVE(inc_not_zero)
283 : "=a" (r)
284 : "S" (v)
285 : "ecx", "edx", "memory"
286 );
287 return r;
288}
289
290static inline long long atomic64_dec_if_positive(atomic64_t *v)
291{
292 long long r;
293 asm volatile(ATOMIC64_ALTERNATIVE(dec_if_positive)
294 : "=A" (r)
295 : "S" (v)
296 : "ecx", "memory"
297 );
298 return r;
299}
300
301#undef ATOMIC64_ALTERNATIVE
302#undef ATOMIC64_ALTERNATIVE_
159 303
160#endif /* _ASM_X86_ATOMIC64_32_H */ 304#endif /* _ASM_X86_ATOMIC64_32_H */
diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h
index 51c5b4056929..49fd1ea22951 100644
--- a/arch/x86/include/asm/atomic64_64.h
+++ b/arch/x86/include/asm/atomic64_64.h
@@ -18,7 +18,7 @@
18 */ 18 */
19static inline long atomic64_read(const atomic64_t *v) 19static inline long atomic64_read(const atomic64_t *v)
20{ 20{
21 return v->counter; 21 return (*(volatile long *)&(v)->counter);
22} 22}
23 23
24/** 24/**
@@ -221,4 +221,27 @@ static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
221 221
222#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 222#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
223 223
224/*
225 * atomic64_dec_if_positive - decrement by 1 if old value positive
226 * @v: pointer of type atomic_t
227 *
228 * The function returns the old value of *v minus 1, even if
229 * the atomic variable, v, was not decremented.
230 */
231static inline long atomic64_dec_if_positive(atomic64_t *v)
232{
233 long c, old, dec;
234 c = atomic64_read(v);
235 for (;;) {
236 dec = c - 1;
237 if (unlikely(dec < 0))
238 break;
239 old = atomic64_cmpxchg((v), c, dec);
240 if (likely(old == c))
241 break;
242 c = old;
243 }
244 return dec;
245}
246
224#endif /* _ASM_X86_ATOMIC64_64_H */ 247#endif /* _ASM_X86_ATOMIC64_64_H */
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 02b47a603fc8..545776efeb16 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -444,7 +444,9 @@ static inline int fls(int x)
444 444
445#define ARCH_HAS_FAST_MULTIPLIER 1 445#define ARCH_HAS_FAST_MULTIPLIER 1
446 446
447#include <asm-generic/bitops/hweight.h> 447#include <asm/arch_hweight.h>
448
449#include <asm-generic/bitops/const_hweight.h>
448 450
449#endif /* __KERNEL__ */ 451#endif /* __KERNEL__ */
450 452
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h
index 7a1065958ba9..3b62ab56c7a0 100644
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -24,7 +24,7 @@
24#define MIN_KERNEL_ALIGN (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2) 24#define MIN_KERNEL_ALIGN (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2)
25 25
26#if (CONFIG_PHYSICAL_ALIGN & (CONFIG_PHYSICAL_ALIGN-1)) || \ 26#if (CONFIG_PHYSICAL_ALIGN & (CONFIG_PHYSICAL_ALIGN-1)) || \
27 (CONFIG_PHYSICAL_ALIGN < (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2)) 27 (CONFIG_PHYSICAL_ALIGN < MIN_KERNEL_ALIGN)
28#error "Invalid value for CONFIG_PHYSICAL_ALIGN" 28#error "Invalid value for CONFIG_PHYSICAL_ALIGN"
29#endif 29#endif
30 30
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 634c40a739a6..c70068d05f70 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -44,9 +44,6 @@ static inline void copy_from_user_page(struct vm_area_struct *vma,
44 memcpy(dst, src, len); 44 memcpy(dst, src, len);
45} 45}
46 46
47#define PG_WC PG_arch_1
48PAGEFLAG(WC, WC)
49
50#ifdef CONFIG_X86_PAT 47#ifdef CONFIG_X86_PAT
51/* 48/*
52 * X86 PAT uses page flags WC and Uncached together to keep track of 49 * X86 PAT uses page flags WC and Uncached together to keep track of
@@ -55,16 +52,24 @@ PAGEFLAG(WC, WC)
55 * _PAGE_CACHE_UC_MINUS and fourth state where page's memory type has not 52 * _PAGE_CACHE_UC_MINUS and fourth state where page's memory type has not
56 * been changed from its default (value of -1 used to denote this). 53 * been changed from its default (value of -1 used to denote this).
57 * Note we do not support _PAGE_CACHE_UC here. 54 * Note we do not support _PAGE_CACHE_UC here.
58 *
59 * Caller must hold memtype_lock for atomicity.
60 */ 55 */
56
57#define _PGMT_DEFAULT 0
58#define _PGMT_WC (1UL << PG_arch_1)
59#define _PGMT_UC_MINUS (1UL << PG_uncached)
60#define _PGMT_WB (1UL << PG_uncached | 1UL << PG_arch_1)
61#define _PGMT_MASK (1UL << PG_uncached | 1UL << PG_arch_1)
62#define _PGMT_CLEAR_MASK (~_PGMT_MASK)
63
61static inline unsigned long get_page_memtype(struct page *pg) 64static inline unsigned long get_page_memtype(struct page *pg)
62{ 65{
63 if (!PageUncached(pg) && !PageWC(pg)) 66 unsigned long pg_flags = pg->flags & _PGMT_MASK;
67
68 if (pg_flags == _PGMT_DEFAULT)
64 return -1; 69 return -1;
65 else if (!PageUncached(pg) && PageWC(pg)) 70 else if (pg_flags == _PGMT_WC)
66 return _PAGE_CACHE_WC; 71 return _PAGE_CACHE_WC;
67 else if (PageUncached(pg) && !PageWC(pg)) 72 else if (pg_flags == _PGMT_UC_MINUS)
68 return _PAGE_CACHE_UC_MINUS; 73 return _PAGE_CACHE_UC_MINUS;
69 else 74 else
70 return _PAGE_CACHE_WB; 75 return _PAGE_CACHE_WB;
@@ -72,25 +77,26 @@ static inline unsigned long get_page_memtype(struct page *pg)
72 77
73static inline void set_page_memtype(struct page *pg, unsigned long memtype) 78static inline void set_page_memtype(struct page *pg, unsigned long memtype)
74{ 79{
80 unsigned long memtype_flags = _PGMT_DEFAULT;
81 unsigned long old_flags;
82 unsigned long new_flags;
83
75 switch (memtype) { 84 switch (memtype) {
76 case _PAGE_CACHE_WC: 85 case _PAGE_CACHE_WC:
77 ClearPageUncached(pg); 86 memtype_flags = _PGMT_WC;
78 SetPageWC(pg);
79 break; 87 break;
80 case _PAGE_CACHE_UC_MINUS: 88 case _PAGE_CACHE_UC_MINUS:
81 SetPageUncached(pg); 89 memtype_flags = _PGMT_UC_MINUS;
82 ClearPageWC(pg);
83 break; 90 break;
84 case _PAGE_CACHE_WB: 91 case _PAGE_CACHE_WB:
85 SetPageUncached(pg); 92 memtype_flags = _PGMT_WB;
86 SetPageWC(pg);
87 break;
88 default:
89 case -1:
90 ClearPageUncached(pg);
91 ClearPageWC(pg);
92 break; 93 break;
93 } 94 }
95
96 do {
97 old_flags = pg->flags;
98 new_flags = (old_flags & _PGMT_CLEAR_MASK) | memtype_flags;
99 } while (cmpxchg(&pg->flags, old_flags, new_flags) != old_flags);
94} 100}
95#else 101#else
96static inline unsigned long get_page_memtype(struct page *pg) { return -1; } 102static inline unsigned long get_page_memtype(struct page *pg) { return -1; }
diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h
index ffb9bb6b6c37..8859e12dd3cf 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -271,7 +271,8 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64);
271 __typeof__(*(ptr)) __ret; \ 271 __typeof__(*(ptr)) __ret; \
272 __typeof__(*(ptr)) __old = (o); \ 272 __typeof__(*(ptr)) __old = (o); \
273 __typeof__(*(ptr)) __new = (n); \ 273 __typeof__(*(ptr)) __new = (n); \
274 alternative_io("call cmpxchg8b_emu", \ 274 alternative_io(LOCK_PREFIX_HERE \
275 "call cmpxchg8b_emu", \
275 "lock; cmpxchg8b (%%esi)" , \ 276 "lock; cmpxchg8b (%%esi)" , \
276 X86_FEATURE_CX8, \ 277 X86_FEATURE_CX8, \
277 "=A" (__ret), \ 278 "=A" (__ret), \
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 0cd82d068613..dca9c545f44e 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -161,6 +161,7 @@
161 */ 161 */
162#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */ 162#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */
163#define X86_FEATURE_ARAT (7*32+ 1) /* Always Running APIC Timer */ 163#define X86_FEATURE_ARAT (7*32+ 1) /* Always Running APIC Timer */
164#define X86_FEATURE_CPB (7*32+ 2) /* AMD Core Performance Boost */
164 165
165/* Virtualization flags: Linux defined */ 166/* Virtualization flags: Linux defined */
166#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */ 167#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
@@ -175,6 +176,7 @@
175 176
176#if defined(__KERNEL__) && !defined(__ASSEMBLY__) 177#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
177 178
179#include <asm/asm.h>
178#include <linux/bitops.h> 180#include <linux/bitops.h>
179 181
180extern const char * const x86_cap_flags[NCAPINTS*32]; 182extern const char * const x86_cap_flags[NCAPINTS*32];
@@ -283,6 +285,62 @@ extern const char * const x86_power_flags[32];
283 285
284#endif /* CONFIG_X86_64 */ 286#endif /* CONFIG_X86_64 */
285 287
288/*
289 * Static testing of CPU features. Used the same as boot_cpu_has().
290 * These are only valid after alternatives have run, but will statically
291 * patch the target code for additional performance.
292 *
293 */
294static __always_inline __pure bool __static_cpu_has(u8 bit)
295{
296#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
297 asm goto("1: jmp %l[t_no]\n"
298 "2:\n"
299 ".section .altinstructions,\"a\"\n"
300 _ASM_ALIGN "\n"
301 _ASM_PTR "1b\n"
302 _ASM_PTR "0\n" /* no replacement */
303 " .byte %P0\n" /* feature bit */
304 " .byte 2b - 1b\n" /* source len */
305 " .byte 0\n" /* replacement len */
306 " .byte 0xff + 0 - (2b-1b)\n" /* padding */
307 ".previous\n"
308 : : "i" (bit) : : t_no);
309 return true;
310 t_no:
311 return false;
312#else
313 u8 flag;
314 /* Open-coded due to __stringify() in ALTERNATIVE() */
315 asm volatile("1: movb $0,%0\n"
316 "2:\n"
317 ".section .altinstructions,\"a\"\n"
318 _ASM_ALIGN "\n"
319 _ASM_PTR "1b\n"
320 _ASM_PTR "3f\n"
321 " .byte %P1\n" /* feature bit */
322 " .byte 2b - 1b\n" /* source len */
323 " .byte 4f - 3f\n" /* replacement len */
324 " .byte 0xff + (4f-3f) - (2b-1b)\n" /* padding */
325 ".previous\n"
326 ".section .altinstr_replacement,\"ax\"\n"
327 "3: movb $1,%0\n"
328 "4:\n"
329 ".previous\n"
330 : "=qm" (flag) : "i" (bit));
331 return flag;
332#endif
333}
334
335#define static_cpu_has(bit) \
336( \
337 __builtin_constant_p(boot_cpu_has(bit)) ? \
338 boot_cpu_has(bit) : \
339 (__builtin_constant_p(bit) && !((bit) & ~0xff)) ? \
340 __static_cpu_has(bit) : \
341 boot_cpu_has(bit) \
342)
343
286#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ 344#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
287 345
288#endif /* _ASM_X86_CPUFEATURE_H */ 346#endif /* _ASM_X86_CPUFEATURE_H */
diff --git a/arch/x86/include/asm/ds.h b/arch/x86/include/asm/ds.h
deleted file mode 100644
index 70dac199b093..000000000000
--- a/arch/x86/include/asm/ds.h
+++ /dev/null
@@ -1,302 +0,0 @@
1/*
2 * Debug Store (DS) support
3 *
4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for branch trace store (BTS) and
6 * precise-event based sampling (PEBS).
7 *
8 * It manages:
9 * - DS and BTS hardware configuration
10 * - buffer overflow handling (to be done)
11 * - buffer access
12 *
13 * It does not do:
14 * - security checking (is the caller allowed to trace the task)
15 * - buffer allocation (memory accounting)
16 *
17 *
18 * Copyright (C) 2007-2009 Intel Corporation.
19 * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009
20 */
21
22#ifndef _ASM_X86_DS_H
23#define _ASM_X86_DS_H
24
25
26#include <linux/types.h>
27#include <linux/init.h>
28#include <linux/err.h>
29
30
31#ifdef CONFIG_X86_DS
32
33struct task_struct;
34struct ds_context;
35struct ds_tracer;
36struct bts_tracer;
37struct pebs_tracer;
38
39typedef void (*bts_ovfl_callback_t)(struct bts_tracer *);
40typedef void (*pebs_ovfl_callback_t)(struct pebs_tracer *);
41
42
43/*
44 * A list of features plus corresponding macros to talk about them in
45 * the ds_request function's flags parameter.
46 *
47 * We use the enum to index an array of corresponding control bits;
48 * we use the macro to index a flags bit-vector.
49 */
50enum ds_feature {
51 dsf_bts = 0,
52 dsf_bts_kernel,
53#define BTS_KERNEL (1 << dsf_bts_kernel)
54 /* trace kernel-mode branches */
55
56 dsf_bts_user,
57#define BTS_USER (1 << dsf_bts_user)
58 /* trace user-mode branches */
59
60 dsf_bts_overflow,
61 dsf_bts_max,
62 dsf_pebs = dsf_bts_max,
63
64 dsf_pebs_max,
65 dsf_ctl_max = dsf_pebs_max,
66 dsf_bts_timestamps = dsf_ctl_max,
67#define BTS_TIMESTAMPS (1 << dsf_bts_timestamps)
68 /* add timestamps into BTS trace */
69
70#define BTS_USER_FLAGS (BTS_KERNEL | BTS_USER | BTS_TIMESTAMPS)
71};
72
73
74/*
75 * Request BTS or PEBS
76 *
77 * Due to alignement constraints, the actual buffer may be slightly
78 * smaller than the requested or provided buffer.
79 *
80 * Returns a pointer to a tracer structure on success, or
81 * ERR_PTR(errcode) on failure.
82 *
83 * The interrupt threshold is independent from the overflow callback
84 * to allow users to use their own overflow interrupt handling mechanism.
85 *
86 * The function might sleep.
87 *
88 * task: the task to request recording for
89 * cpu: the cpu to request recording for
90 * base: the base pointer for the (non-pageable) buffer;
91 * size: the size of the provided buffer in bytes
92 * ovfl: pointer to a function to be called on buffer overflow;
93 * NULL if cyclic buffer requested
94 * th: the interrupt threshold in records from the end of the buffer;
95 * -1 if no interrupt threshold is requested.
96 * flags: a bit-mask of the above flags
97 */
98extern struct bts_tracer *ds_request_bts_task(struct task_struct *task,
99 void *base, size_t size,
100 bts_ovfl_callback_t ovfl,
101 size_t th, unsigned int flags);
102extern struct bts_tracer *ds_request_bts_cpu(int cpu, void *base, size_t size,
103 bts_ovfl_callback_t ovfl,
104 size_t th, unsigned int flags);
105extern struct pebs_tracer *ds_request_pebs_task(struct task_struct *task,
106 void *base, size_t size,
107 pebs_ovfl_callback_t ovfl,
108 size_t th, unsigned int flags);
109extern struct pebs_tracer *ds_request_pebs_cpu(int cpu,
110 void *base, size_t size,
111 pebs_ovfl_callback_t ovfl,
112 size_t th, unsigned int flags);
113
114/*
115 * Release BTS or PEBS resources
116 * Suspend and resume BTS or PEBS tracing
117 *
118 * Must be called with irq's enabled.
119 *
120 * tracer: the tracer handle returned from ds_request_~()
121 */
122extern void ds_release_bts(struct bts_tracer *tracer);
123extern void ds_suspend_bts(struct bts_tracer *tracer);
124extern void ds_resume_bts(struct bts_tracer *tracer);
125extern void ds_release_pebs(struct pebs_tracer *tracer);
126extern void ds_suspend_pebs(struct pebs_tracer *tracer);
127extern void ds_resume_pebs(struct pebs_tracer *tracer);
128
129/*
130 * Release BTS or PEBS resources
131 * Suspend and resume BTS or PEBS tracing
132 *
133 * Cpu tracers must call this on the traced cpu.
134 * Task tracers must call ds_release_~_noirq() for themselves.
135 *
136 * May be called with irq's disabled.
137 *
138 * Returns 0 if successful;
139 * -EPERM if the cpu tracer does not trace the current cpu.
140 * -EPERM if the task tracer does not trace itself.
141 *
142 * tracer: the tracer handle returned from ds_request_~()
143 */
144extern int ds_release_bts_noirq(struct bts_tracer *tracer);
145extern int ds_suspend_bts_noirq(struct bts_tracer *tracer);
146extern int ds_resume_bts_noirq(struct bts_tracer *tracer);
147extern int ds_release_pebs_noirq(struct pebs_tracer *tracer);
148extern int ds_suspend_pebs_noirq(struct pebs_tracer *tracer);
149extern int ds_resume_pebs_noirq(struct pebs_tracer *tracer);
150
151
152/*
153 * The raw DS buffer state as it is used for BTS and PEBS recording.
154 *
155 * This is the low-level, arch-dependent interface for working
156 * directly on the raw trace data.
157 */
158struct ds_trace {
159 /* the number of bts/pebs records */
160 size_t n;
161 /* the size of a bts/pebs record in bytes */
162 size_t size;
163 /* pointers into the raw buffer:
164 - to the first entry */
165 void *begin;
166 /* - one beyond the last entry */
167 void *end;
168 /* - one beyond the newest entry */
169 void *top;
170 /* - the interrupt threshold */
171 void *ith;
172 /* flags given on ds_request() */
173 unsigned int flags;
174};
175
176/*
177 * An arch-independent view on branch trace data.
178 */
179enum bts_qualifier {
180 bts_invalid,
181#define BTS_INVALID bts_invalid
182
183 bts_branch,
184#define BTS_BRANCH bts_branch
185
186 bts_task_arrives,
187#define BTS_TASK_ARRIVES bts_task_arrives
188
189 bts_task_departs,
190#define BTS_TASK_DEPARTS bts_task_departs
191
192 bts_qual_bit_size = 4,
193 bts_qual_max = (1 << bts_qual_bit_size),
194};
195
196struct bts_struct {
197 __u64 qualifier;
198 union {
199 /* BTS_BRANCH */
200 struct {
201 __u64 from;
202 __u64 to;
203 } lbr;
204 /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */
205 struct {
206 __u64 clock;
207 pid_t pid;
208 } event;
209 } variant;
210};
211
212
213/*
214 * The BTS state.
215 *
216 * This gives access to the raw DS state and adds functions to provide
217 * an arch-independent view of the BTS data.
218 */
219struct bts_trace {
220 struct ds_trace ds;
221
222 int (*read)(struct bts_tracer *tracer, const void *at,
223 struct bts_struct *out);
224 int (*write)(struct bts_tracer *tracer, const struct bts_struct *in);
225};
226
227
228/*
229 * The PEBS state.
230 *
231 * This gives access to the raw DS state and the PEBS-specific counter
232 * reset value.
233 */
234struct pebs_trace {
235 struct ds_trace ds;
236
237 /* the number of valid counters in the below array */
238 unsigned int counters;
239
240#define MAX_PEBS_COUNTERS 4
241 /* the counter reset value */
242 unsigned long long counter_reset[MAX_PEBS_COUNTERS];
243};
244
245
246/*
247 * Read the BTS or PEBS trace.
248 *
249 * Returns a view on the trace collected for the parameter tracer.
250 *
251 * The view remains valid as long as the traced task is not running or
252 * the tracer is suspended.
253 * Writes into the trace buffer are not reflected.
254 *
255 * tracer: the tracer handle returned from ds_request_~()
256 */
257extern const struct bts_trace *ds_read_bts(struct bts_tracer *tracer);
258extern const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer);
259
260
261/*
262 * Reset the write pointer of the BTS/PEBS buffer.
263 *
264 * Returns 0 on success; -Eerrno on error
265 *
266 * tracer: the tracer handle returned from ds_request_~()
267 */
268extern int ds_reset_bts(struct bts_tracer *tracer);
269extern int ds_reset_pebs(struct pebs_tracer *tracer);
270
271/*
272 * Set the PEBS counter reset value.
273 *
274 * Returns 0 on success; -Eerrno on error
275 *
276 * tracer: the tracer handle returned from ds_request_pebs()
277 * counter: the index of the counter
278 * value: the new counter reset value
279 */
280extern int ds_set_pebs_reset(struct pebs_tracer *tracer,
281 unsigned int counter, u64 value);
282
283/*
284 * Initialization
285 */
286struct cpuinfo_x86;
287extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *);
288
289/*
290 * Context switch work
291 */
292extern void ds_switch_to(struct task_struct *prev, struct task_struct *next);
293
294#else /* CONFIG_X86_DS */
295
296struct cpuinfo_x86;
297static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {}
298static inline void ds_switch_to(struct task_struct *prev,
299 struct task_struct *next) {}
300
301#endif /* CONFIG_X86_DS */
302#endif /* _ASM_X86_DS_H */
diff --git a/arch/x86/include/asm/dwarf2.h b/arch/x86/include/asm/dwarf2.h
index ae6253ab9029..733f7e91e7a9 100644
--- a/arch/x86/include/asm/dwarf2.h
+++ b/arch/x86/include/asm/dwarf2.h
@@ -34,6 +34,18 @@
34#define CFI_SIGNAL_FRAME 34#define CFI_SIGNAL_FRAME
35#endif 35#endif
36 36
37#if defined(CONFIG_AS_CFI_SECTIONS) && defined(__ASSEMBLY__)
38 /*
39 * Emit CFI data in .debug_frame sections, not .eh_frame sections.
40 * The latter we currently just discard since we don't do DWARF
41 * unwinding at runtime. So only the offline DWARF information is
42 * useful to anyone. Note we should not use this directive if this
43 * file is used in the vDSO assembly, or if vmlinux.lds.S gets
44 * changed so it doesn't discard .eh_frame.
45 */
46 .cfi_sections .debug_frame
47#endif
48
37#else 49#else
38 50
39/* 51/*
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 0e22296790d3..ec8a52d14ab1 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
45#define E820_NVS 4 45#define E820_NVS 4
46#define E820_UNUSABLE 5 46#define E820_UNUSABLE 5
47 47
48/* reserved RAM used by kernel itself */ 48/*
49 * reserved RAM used by kernel itself
50 * if CONFIG_INTEL_TXT is enabled, memory of this type will be
51 * included in the S3 integrity calculation and so should not include
52 * any memory that BIOS might alter over the S3 transition
53 */
49#define E820_RESERVED_KERN 128 54#define E820_RESERVED_KERN 128
50 55
51#ifndef __ASSEMBLY__ 56#ifndef __ASSEMBLY__
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 0f8576427cfe..aeab29aee617 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -35,7 +35,7 @@ DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
35 35
36#define __ARCH_IRQ_STAT 36#define __ARCH_IRQ_STAT
37 37
38#define inc_irq_stat(member) percpu_add(irq_stat.member, 1) 38#define inc_irq_stat(member) percpu_inc(irq_stat.member)
39 39
40#define local_softirq_pending() percpu_read(irq_stat.__softirq_pending) 40#define local_softirq_pending() percpu_read(irq_stat.__softirq_pending)
41 41
diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h
index 1d5c08a1bdfd..004e6e25e913 100644
--- a/arch/x86/include/asm/hpet.h
+++ b/arch/x86/include/asm/hpet.h
@@ -68,6 +68,7 @@ extern unsigned long force_hpet_address;
68extern u8 hpet_blockid; 68extern u8 hpet_blockid;
69extern int hpet_force_user; 69extern int hpet_force_user;
70extern u8 hpet_msi_disable; 70extern u8 hpet_msi_disable;
71extern u8 hpet_readback_cmp;
71extern int is_hpet_enabled(void); 72extern int is_hpet_enabled(void);
72extern int hpet_enable(void); 73extern int hpet_enable(void);
73extern void hpet_disable(void); 74extern void hpet_disable(void);
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 2a1bd8f4f23a..942255310e6a 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -41,12 +41,16 @@ struct arch_hw_breakpoint {
41/* Total number of available HW breakpoint registers */ 41/* Total number of available HW breakpoint registers */
42#define HBP_NUM 4 42#define HBP_NUM 4
43 43
44static inline int hw_breakpoint_slots(int type)
45{
46 return HBP_NUM;
47}
48
44struct perf_event; 49struct perf_event;
45struct pmu; 50struct pmu;
46 51
47extern int arch_check_va_in_userspace(unsigned long va, u8 hbp_len); 52extern int arch_check_bp_in_kernelspace(struct perf_event *bp);
48extern int arch_validate_hwbkpt_settings(struct perf_event *bp, 53extern int arch_validate_hwbkpt_settings(struct perf_event *bp);
49 struct task_struct *tsk);
50extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, 54extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
51 unsigned long val, void *data); 55 unsigned long val, void *data);
52 56
diff --git a/arch/x86/include/asm/hyperv.h b/arch/x86/include/asm/hyperv.h
index e153a2b3889a..5df477ac3af7 100644
--- a/arch/x86/include/asm/hyperv.h
+++ b/arch/x86/include/asm/hyperv.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_X86_KVM_HYPERV_H 1#ifndef _ASM_X86_HYPERV_H
2#define _ASM_X86_KVM_HYPERV_H 2#define _ASM_X86_HYPERV_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5 5
@@ -14,6 +14,10 @@
14#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004 14#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
15#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005 15#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
16 16
17#define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000
18#define HYPERV_CPUID_MIN 0x40000005
19#define HYPERV_CPUID_MAX 0x4000ffff
20
17/* 21/*
18 * Feature identification. EAX indicates which features are available 22 * Feature identification. EAX indicates which features are available
19 * to the partition based upon the current partition privileges. 23 * to the partition based upon the current partition privileges.
@@ -129,6 +133,9 @@
129/* MSR used to provide vcpu index */ 133/* MSR used to provide vcpu index */
130#define HV_X64_MSR_VP_INDEX 0x40000002 134#define HV_X64_MSR_VP_INDEX 0x40000002
131 135
136/* MSR used to read the per-partition time reference counter */
137#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
138
132/* Define the virtual APIC registers */ 139/* Define the virtual APIC registers */
133#define HV_X64_MSR_EOI 0x40000070 140#define HV_X64_MSR_EOI 0x40000070
134#define HV_X64_MSR_ICR 0x40000071 141#define HV_X64_MSR_ICR 0x40000071
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
index b78c0941e422..70abda7058c8 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -17,10 +17,33 @@
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 * 18 *
19 */ 19 */
20#ifndef ASM_X86__HYPERVISOR_H 20#ifndef _ASM_X86_HYPERVISOR_H
21#define ASM_X86__HYPERVISOR_H 21#define _ASM_X86_HYPERVISOR_H
22 22
23extern void init_hypervisor(struct cpuinfo_x86 *c); 23extern void init_hypervisor(struct cpuinfo_x86 *c);
24extern void init_hypervisor_platform(void); 24extern void init_hypervisor_platform(void);
25 25
26/*
27 * x86 hypervisor information
28 */
29struct hypervisor_x86 {
30 /* Hypervisor name */
31 const char *name;
32
33 /* Detection routine */
34 bool (*detect)(void);
35
36 /* Adjust CPU feature bits (run once per CPU) */
37 void (*set_cpu_features)(struct cpuinfo_x86 *);
38
39 /* Platform setup (run once per boot) */
40 void (*init_platform)(void);
41};
42
43extern const struct hypervisor_x86 *x86_hyper;
44
45/* Recognized hypervisors */
46extern const struct hypervisor_x86 x86_hyper_vmware;
47extern const struct hypervisor_x86 x86_hyper_ms_hyperv;
48
26#endif 49#endif
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index da2930924501..c991b3a7b904 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -16,7 +16,9 @@
16#include <linux/kernel_stat.h> 16#include <linux/kernel_stat.h>
17#include <linux/regset.h> 17#include <linux/regset.h>
18#include <linux/hardirq.h> 18#include <linux/hardirq.h>
19#include <linux/slab.h>
19#include <asm/asm.h> 20#include <asm/asm.h>
21#include <asm/cpufeature.h>
20#include <asm/processor.h> 22#include <asm/processor.h>
21#include <asm/sigcontext.h> 23#include <asm/sigcontext.h>
22#include <asm/user.h> 24#include <asm/user.h>
@@ -56,6 +58,11 @@ extern int restore_i387_xstate_ia32(void __user *buf);
56 58
57#define X87_FSW_ES (1 << 7) /* Exception Summary */ 59#define X87_FSW_ES (1 << 7) /* Exception Summary */
58 60
61static __always_inline __pure bool use_xsave(void)
62{
63 return static_cpu_has(X86_FEATURE_XSAVE);
64}
65
59#ifdef CONFIG_X86_64 66#ifdef CONFIG_X86_64
60 67
61/* Ignore delayed exceptions from user space */ 68/* Ignore delayed exceptions from user space */
@@ -91,15 +98,15 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
91 values. The kernel data segment can be sometimes 0 and sometimes 98 values. The kernel data segment can be sometimes 0 and sometimes
92 new user value. Both should be ok. 99 new user value. Both should be ok.
93 Use the PDA as safe address because it should be already in L1. */ 100 Use the PDA as safe address because it should be already in L1. */
94static inline void clear_fpu_state(struct task_struct *tsk) 101static inline void fpu_clear(struct fpu *fpu)
95{ 102{
96 struct xsave_struct *xstate = &tsk->thread.xstate->xsave; 103 struct xsave_struct *xstate = &fpu->state->xsave;
97 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; 104 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
98 105
99 /* 106 /*
100 * xsave header may indicate the init state of the FP. 107 * xsave header may indicate the init state of the FP.
101 */ 108 */
102 if ((task_thread_info(tsk)->status & TS_XSAVE) && 109 if (use_xsave() &&
103 !(xstate->xsave_hdr.xstate_bv & XSTATE_FP)) 110 !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
104 return; 111 return;
105 112
@@ -111,6 +118,11 @@ static inline void clear_fpu_state(struct task_struct *tsk)
111 X86_FEATURE_FXSAVE_LEAK); 118 X86_FEATURE_FXSAVE_LEAK);
112} 119}
113 120
121static inline void clear_fpu_state(struct task_struct *tsk)
122{
123 fpu_clear(&tsk->thread.fpu);
124}
125
114static inline int fxsave_user(struct i387_fxsave_struct __user *fx) 126static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
115{ 127{
116 int err; 128 int err;
@@ -135,7 +147,7 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
135 return err; 147 return err;
136} 148}
137 149
138static inline void fxsave(struct task_struct *tsk) 150static inline void fpu_fxsave(struct fpu *fpu)
139{ 151{
140 /* Using "rex64; fxsave %0" is broken because, if the memory operand 152 /* Using "rex64; fxsave %0" is broken because, if the memory operand
141 uses any extended registers for addressing, a second REX prefix 153 uses any extended registers for addressing, a second REX prefix
@@ -145,42 +157,45 @@ static inline void fxsave(struct task_struct *tsk)
145 /* Using "fxsaveq %0" would be the ideal choice, but is only supported 157 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
146 starting with gas 2.16. */ 158 starting with gas 2.16. */
147 __asm__ __volatile__("fxsaveq %0" 159 __asm__ __volatile__("fxsaveq %0"
148 : "=m" (tsk->thread.xstate->fxsave)); 160 : "=m" (fpu->state->fxsave));
149#elif 0 161#elif 0
150 /* Using, as a workaround, the properly prefixed form below isn't 162 /* Using, as a workaround, the properly prefixed form below isn't
151 accepted by any binutils version so far released, complaining that 163 accepted by any binutils version so far released, complaining that
152 the same type of prefix is used twice if an extended register is 164 the same type of prefix is used twice if an extended register is
153 needed for addressing (fix submitted to mainline 2005-11-21). */ 165 needed for addressing (fix submitted to mainline 2005-11-21). */
154 __asm__ __volatile__("rex64/fxsave %0" 166 __asm__ __volatile__("rex64/fxsave %0"
155 : "=m" (tsk->thread.xstate->fxsave)); 167 : "=m" (fpu->state->fxsave));
156#else 168#else
157 /* This, however, we can work around by forcing the compiler to select 169 /* This, however, we can work around by forcing the compiler to select
158 an addressing mode that doesn't require extended registers. */ 170 an addressing mode that doesn't require extended registers. */
159 __asm__ __volatile__("rex64/fxsave (%1)" 171 __asm__ __volatile__("rex64/fxsave (%1)"
160 : "=m" (tsk->thread.xstate->fxsave) 172 : "=m" (fpu->state->fxsave)
161 : "cdaSDb" (&tsk->thread.xstate->fxsave)); 173 : "cdaSDb" (&fpu->state->fxsave));
162#endif 174#endif
163} 175}
164 176
165static inline void __save_init_fpu(struct task_struct *tsk) 177static inline void fpu_save_init(struct fpu *fpu)
166{ 178{
167 if (task_thread_info(tsk)->status & TS_XSAVE) 179 if (use_xsave())
168 xsave(tsk); 180 fpu_xsave(fpu);
169 else 181 else
170 fxsave(tsk); 182 fpu_fxsave(fpu);
183
184 fpu_clear(fpu);
185}
171 186
172 clear_fpu_state(tsk); 187static inline void __save_init_fpu(struct task_struct *tsk)
188{
189 fpu_save_init(&tsk->thread.fpu);
173 task_thread_info(tsk)->status &= ~TS_USEDFPU; 190 task_thread_info(tsk)->status &= ~TS_USEDFPU;
174} 191}
175 192
176#else /* CONFIG_X86_32 */ 193#else /* CONFIG_X86_32 */
177 194
178#ifdef CONFIG_MATH_EMULATION 195#ifdef CONFIG_MATH_EMULATION
179extern void finit_task(struct task_struct *tsk); 196extern void finit_soft_fpu(struct i387_soft_struct *soft);
180#else 197#else
181static inline void finit_task(struct task_struct *tsk) 198static inline void finit_soft_fpu(struct i387_soft_struct *soft) {}
182{
183}
184#endif 199#endif
185 200
186static inline void tolerant_fwait(void) 201static inline void tolerant_fwait(void)
@@ -216,13 +231,13 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
216/* 231/*
217 * These must be called with preempt disabled 232 * These must be called with preempt disabled
218 */ 233 */
219static inline void __save_init_fpu(struct task_struct *tsk) 234static inline void fpu_save_init(struct fpu *fpu)
220{ 235{
221 if (task_thread_info(tsk)->status & TS_XSAVE) { 236 if (use_xsave()) {
222 struct xsave_struct *xstate = &tsk->thread.xstate->xsave; 237 struct xsave_struct *xstate = &fpu->state->xsave;
223 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; 238 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
224 239
225 xsave(tsk); 240 fpu_xsave(fpu);
226 241
227 /* 242 /*
228 * xsave header may indicate the init state of the FP. 243 * xsave header may indicate the init state of the FP.
@@ -246,8 +261,8 @@ static inline void __save_init_fpu(struct task_struct *tsk)
246 "fxsave %[fx]\n" 261 "fxsave %[fx]\n"
247 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:", 262 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
248 X86_FEATURE_FXSR, 263 X86_FEATURE_FXSR,
249 [fx] "m" (tsk->thread.xstate->fxsave), 264 [fx] "m" (fpu->state->fxsave),
250 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory"); 265 [fsw] "m" (fpu->state->fxsave.swd) : "memory");
251clear_state: 266clear_state:
252 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception 267 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
253 is pending. Clear the x87 state here by setting it to fixed 268 is pending. Clear the x87 state here by setting it to fixed
@@ -259,17 +274,34 @@ clear_state:
259 X86_FEATURE_FXSAVE_LEAK, 274 X86_FEATURE_FXSAVE_LEAK,
260 [addr] "m" (safe_address)); 275 [addr] "m" (safe_address));
261end: 276end:
277 ;
278}
279
280static inline void __save_init_fpu(struct task_struct *tsk)
281{
282 fpu_save_init(&tsk->thread.fpu);
262 task_thread_info(tsk)->status &= ~TS_USEDFPU; 283 task_thread_info(tsk)->status &= ~TS_USEDFPU;
263} 284}
264 285
286
265#endif /* CONFIG_X86_64 */ 287#endif /* CONFIG_X86_64 */
266 288
267static inline int restore_fpu_checking(struct task_struct *tsk) 289static inline int fpu_fxrstor_checking(struct fpu *fpu)
268{ 290{
269 if (task_thread_info(tsk)->status & TS_XSAVE) 291 return fxrstor_checking(&fpu->state->fxsave);
270 return xrstor_checking(&tsk->thread.xstate->xsave); 292}
293
294static inline int fpu_restore_checking(struct fpu *fpu)
295{
296 if (use_xsave())
297 return fpu_xrstor_checking(fpu);
271 else 298 else
272 return fxrstor_checking(&tsk->thread.xstate->fxsave); 299 return fpu_fxrstor_checking(fpu);
300}
301
302static inline int restore_fpu_checking(struct task_struct *tsk)
303{
304 return fpu_restore_checking(&tsk->thread.fpu);
273} 305}
274 306
275/* 307/*
@@ -397,30 +429,59 @@ static inline void clear_fpu(struct task_struct *tsk)
397static inline unsigned short get_fpu_cwd(struct task_struct *tsk) 429static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
398{ 430{
399 if (cpu_has_fxsr) { 431 if (cpu_has_fxsr) {
400 return tsk->thread.xstate->fxsave.cwd; 432 return tsk->thread.fpu.state->fxsave.cwd;
401 } else { 433 } else {
402 return (unsigned short)tsk->thread.xstate->fsave.cwd; 434 return (unsigned short)tsk->thread.fpu.state->fsave.cwd;
403 } 435 }
404} 436}
405 437
406static inline unsigned short get_fpu_swd(struct task_struct *tsk) 438static inline unsigned short get_fpu_swd(struct task_struct *tsk)
407{ 439{
408 if (cpu_has_fxsr) { 440 if (cpu_has_fxsr) {
409 return tsk->thread.xstate->fxsave.swd; 441 return tsk->thread.fpu.state->fxsave.swd;
410 } else { 442 } else {
411 return (unsigned short)tsk->thread.xstate->fsave.swd; 443 return (unsigned short)tsk->thread.fpu.state->fsave.swd;
412 } 444 }
413} 445}
414 446
415static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk) 447static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
416{ 448{
417 if (cpu_has_xmm) { 449 if (cpu_has_xmm) {
418 return tsk->thread.xstate->fxsave.mxcsr; 450 return tsk->thread.fpu.state->fxsave.mxcsr;
419 } else { 451 } else {
420 return MXCSR_DEFAULT; 452 return MXCSR_DEFAULT;
421 } 453 }
422} 454}
423 455
456static bool fpu_allocated(struct fpu *fpu)
457{
458 return fpu->state != NULL;
459}
460
461static inline int fpu_alloc(struct fpu *fpu)
462{
463 if (fpu_allocated(fpu))
464 return 0;
465 fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
466 if (!fpu->state)
467 return -ENOMEM;
468 WARN_ON((unsigned long)fpu->state & 15);
469 return 0;
470}
471
472static inline void fpu_free(struct fpu *fpu)
473{
474 if (fpu->state) {
475 kmem_cache_free(task_xstate_cachep, fpu->state);
476 fpu->state = NULL;
477 }
478}
479
480static inline void fpu_copy(struct fpu *dst, struct fpu *src)
481{
482 memcpy(dst->state, src->state, xstate_size);
483}
484
424#endif /* __ASSEMBLY__ */ 485#endif /* __ASSEMBLY__ */
425 486
426#define PSHUFB_XMM5_XMM0 .byte 0x66, 0x0f, 0x38, 0x00, 0xc5 487#define PSHUFB_XMM5_XMM0 .byte 0x66, 0x0f, 0x38, 0x00, 0xc5
diff --git a/arch/x86/include/asm/i8253.h b/arch/x86/include/asm/i8253.h
index 1edbf89680fd..fc1f579fb965 100644
--- a/arch/x86/include/asm/i8253.h
+++ b/arch/x86/include/asm/i8253.h
@@ -6,7 +6,7 @@
6#define PIT_CH0 0x40 6#define PIT_CH0 0x40
7#define PIT_CH2 0x42 7#define PIT_CH2 0x42
8 8
9extern spinlock_t i8253_lock; 9extern raw_spinlock_t i8253_lock;
10 10
11extern struct clock_event_device *global_clock_event; 11extern struct clock_event_device *global_clock_event;
12 12
diff --git a/arch/x86/include/asm/insn.h b/arch/x86/include/asm/insn.h
index 96c2e0ad04ca..88c765e16410 100644
--- a/arch/x86/include/asm/insn.h
+++ b/arch/x86/include/asm/insn.h
@@ -68,6 +68,8 @@ struct insn {
68 const insn_byte_t *next_byte; 68 const insn_byte_t *next_byte;
69}; 69};
70 70
71#define MAX_INSN_SIZE 16
72
71#define X86_MODRM_MOD(modrm) (((modrm) & 0xc0) >> 6) 73#define X86_MODRM_MOD(modrm) (((modrm) & 0xc0) >> 6)
72#define X86_MODRM_REG(modrm) (((modrm) & 0x38) >> 3) 74#define X86_MODRM_REG(modrm) (((modrm) & 0x38) >> 3)
73#define X86_MODRM_RM(modrm) ((modrm) & 0x07) 75#define X86_MODRM_RM(modrm) ((modrm) & 0x07)
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 35832a03a515..63cb4096c3dc 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -159,7 +159,6 @@ struct io_apic_irq_attr;
159extern int io_apic_set_pci_routing(struct device *dev, int irq, 159extern int io_apic_set_pci_routing(struct device *dev, int irq,
160 struct io_apic_irq_attr *irq_attr); 160 struct io_apic_irq_attr *irq_attr);
161void setup_IO_APIC_irq_extra(u32 gsi); 161void setup_IO_APIC_irq_extra(u32 gsi);
162extern int (*ioapic_renumber_irq)(int ioapic, int irq);
163extern void ioapic_init_mappings(void); 162extern void ioapic_init_mappings(void);
164extern void ioapic_insert_resources(void); 163extern void ioapic_insert_resources(void);
165 164
@@ -180,12 +179,13 @@ extern void ioapic_write_entry(int apic, int pin,
180extern void setup_ioapic_ids_from_mpc(void); 179extern void setup_ioapic_ids_from_mpc(void);
181 180
182struct mp_ioapic_gsi{ 181struct mp_ioapic_gsi{
183 int gsi_base; 182 u32 gsi_base;
184 int gsi_end; 183 u32 gsi_end;
185}; 184};
186extern struct mp_ioapic_gsi mp_gsi_routing[]; 185extern struct mp_ioapic_gsi mp_gsi_routing[];
187int mp_find_ioapic(int gsi); 186extern u32 gsi_end;
188int mp_find_ioapic_pin(int ioapic, int gsi); 187int mp_find_ioapic(u32 gsi);
188int mp_find_ioapic_pin(int ioapic, u32 gsi);
189void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); 189void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
190extern void __init pre_init_apic_IRQ0(void); 190extern void __init pre_init_apic_IRQ0(void);
191 191
@@ -197,7 +197,8 @@ static const int timer_through_8259 = 0;
197static inline void ioapic_init_mappings(void) { } 197static inline void ioapic_init_mappings(void) { }
198static inline void ioapic_insert_resources(void) { } 198static inline void ioapic_insert_resources(void) { }
199static inline void probe_nr_irqs_gsi(void) { } 199static inline void probe_nr_irqs_gsi(void) { }
200static inline int mp_find_ioapic(int gsi) { return 0; } 200#define gsi_end (NR_IRQS_LEGACY - 1)
201static inline int mp_find_ioapic(u32 gsi) { return 0; }
201 202
202struct io_apic_irq_attr; 203struct io_apic_irq_attr;
203static inline int io_apic_set_pci_routing(struct device *dev, int irq, 204static inline int io_apic_set_pci_routing(struct device *dev, int irq,
diff --git a/arch/x86/include/asm/k8.h b/arch/x86/include/asm/k8.h
index f70e60071fe8..af00bd1d2089 100644
--- a/arch/x86/include/asm/k8.h
+++ b/arch/x86/include/asm/k8.h
@@ -16,11 +16,16 @@ extern int k8_numa_init(unsigned long start_pfn, unsigned long end_pfn);
16extern int k8_scan_nodes(void); 16extern int k8_scan_nodes(void);
17 17
18#ifdef CONFIG_K8_NB 18#ifdef CONFIG_K8_NB
19extern int num_k8_northbridges;
20
19static inline struct pci_dev *node_to_k8_nb_misc(int node) 21static inline struct pci_dev *node_to_k8_nb_misc(int node)
20{ 22{
21 return (node < num_k8_northbridges) ? k8_northbridges[node] : NULL; 23 return (node < num_k8_northbridges) ? k8_northbridges[node] : NULL;
22} 24}
25
23#else 26#else
27#define num_k8_northbridges 0
28
24static inline struct pci_dev *node_to_k8_nb_misc(int node) 29static inline struct pci_dev *node_to_k8_nb_misc(int node)
25{ 30{
26 return NULL; 31 return NULL;
diff --git a/arch/x86/include/asm/kprobes.h b/arch/x86/include/asm/kprobes.h
index 4ffa345a8ccb..547882539157 100644
--- a/arch/x86/include/asm/kprobes.h
+++ b/arch/x86/include/asm/kprobes.h
@@ -24,6 +24,7 @@
24#include <linux/types.h> 24#include <linux/types.h>
25#include <linux/ptrace.h> 25#include <linux/ptrace.h>
26#include <linux/percpu.h> 26#include <linux/percpu.h>
27#include <asm/insn.h>
27 28
28#define __ARCH_WANT_KPROBES_INSN_SLOT 29#define __ARCH_WANT_KPROBES_INSN_SLOT
29 30
@@ -36,7 +37,6 @@ typedef u8 kprobe_opcode_t;
36#define RELATIVEJUMP_SIZE 5 37#define RELATIVEJUMP_SIZE 5
37#define RELATIVECALL_OPCODE 0xe8 38#define RELATIVECALL_OPCODE 0xe8
38#define RELATIVE_ADDR_SIZE 4 39#define RELATIVE_ADDR_SIZE 4
39#define MAX_INSN_SIZE 16
40#define MAX_STACK_SIZE 64 40#define MAX_STACK_SIZE 64
41#define MIN_STACK_SIZE(ADDR) \ 41#define MIN_STACK_SIZE(ADDR) \
42 (((MAX_STACK_SIZE) < (((unsigned long)current_thread_info()) + \ 42 (((MAX_STACK_SIZE) < (((unsigned long)current_thread_info()) + \
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index d8bf23a88d05..c82868e9f905 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -105,16 +105,6 @@ extern void mp_config_acpi_legacy_irqs(void);
105struct device; 105struct device;
106extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level, 106extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
107 int active_high_low); 107 int active_high_low);
108extern int acpi_probe_gsi(void);
109#ifdef CONFIG_X86_IO_APIC
110extern int mp_find_ioapic(int gsi);
111extern int mp_find_ioapic_pin(int ioapic, int gsi);
112#endif
113#else /* !CONFIG_ACPI: */
114static inline int acpi_probe_gsi(void)
115{
116 return 0;
117}
118#endif /* CONFIG_ACPI */ 108#endif /* CONFIG_ACPI */
119 109
120#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS) 110#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
new file mode 100644
index 000000000000..79ce5685ab64
--- /dev/null
+++ b/arch/x86/include/asm/mshyperv.h
@@ -0,0 +1,14 @@
1#ifndef _ASM_X86_MSHYPER_H
2#define _ASM_X86_MSHYPER_H
3
4#include <linux/types.h>
5#include <asm/hyperv.h>
6
7struct ms_hyperv_info {
8 u32 features;
9 u32 hints;
10};
11
12extern struct ms_hyperv_info ms_hyperv;
13
14#endif
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 4604e6a54d36..bc473acfa7f9 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -71,11 +71,14 @@
71#define MSR_IA32_LASTINTTOIP 0x000001de 71#define MSR_IA32_LASTINTTOIP 0x000001de
72 72
73/* DEBUGCTLMSR bits (others vary by model): */ 73/* DEBUGCTLMSR bits (others vary by model): */
74#define _DEBUGCTLMSR_LBR 0 /* last branch recording */ 74#define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */
75#define _DEBUGCTLMSR_BTF 1 /* single-step on branches */ 75#define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */
76 76#define DEBUGCTLMSR_TR (1UL << 6)
77#define DEBUGCTLMSR_LBR (1UL << _DEBUGCTLMSR_LBR) 77#define DEBUGCTLMSR_BTS (1UL << 7)
78#define DEBUGCTLMSR_BTF (1UL << _DEBUGCTLMSR_BTF) 78#define DEBUGCTLMSR_BTINT (1UL << 8)
79#define DEBUGCTLMSR_BTS_OFF_OS (1UL << 9)
80#define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10)
81#define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11)
79 82
80#define MSR_IA32_MC0_CTL 0x00000400 83#define MSR_IA32_MC0_CTL 0x00000400
81#define MSR_IA32_MC0_STATUS 0x00000401 84#define MSR_IA32_MC0_STATUS 0x00000401
@@ -359,6 +362,8 @@
359#define MSR_P4_U2L_ESCR0 0x000003b0 362#define MSR_P4_U2L_ESCR0 0x000003b0
360#define MSR_P4_U2L_ESCR1 0x000003b1 363#define MSR_P4_U2L_ESCR1 0x000003b1
361 364
365#define MSR_P4_PEBS_MATRIX_VERT 0x000003f2
366
362/* Intel Core-based CPU performance counters */ 367/* Intel Core-based CPU performance counters */
363#define MSR_CORE_PERF_FIXED_CTR0 0x00000309 368#define MSR_CORE_PERF_FIXED_CTR0 0x00000309
364#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a 369#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 66a272dfd8b8..0ec6d12d84e6 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -190,6 +190,29 @@ do { \
190 pfo_ret__; \ 190 pfo_ret__; \
191}) 191})
192 192
193#define percpu_unary_op(op, var) \
194({ \
195 switch (sizeof(var)) { \
196 case 1: \
197 asm(op "b "__percpu_arg(0) \
198 : "+m" (var)); \
199 break; \
200 case 2: \
201 asm(op "w "__percpu_arg(0) \
202 : "+m" (var)); \
203 break; \
204 case 4: \
205 asm(op "l "__percpu_arg(0) \
206 : "+m" (var)); \
207 break; \
208 case 8: \
209 asm(op "q "__percpu_arg(0) \
210 : "+m" (var)); \
211 break; \
212 default: __bad_percpu_size(); \
213 } \
214})
215
193/* 216/*
194 * percpu_read() makes gcc load the percpu variable every time it is 217 * percpu_read() makes gcc load the percpu variable every time it is
195 * accessed while percpu_read_stable() allows the value to be cached. 218 * accessed while percpu_read_stable() allows the value to be cached.
@@ -207,6 +230,7 @@ do { \
207#define percpu_and(var, val) percpu_to_op("and", var, val) 230#define percpu_and(var, val) percpu_to_op("and", var, val)
208#define percpu_or(var, val) percpu_to_op("or", var, val) 231#define percpu_or(var, val) percpu_to_op("or", var, val)
209#define percpu_xor(var, val) percpu_to_op("xor", var, val) 232#define percpu_xor(var, val) percpu_to_op("xor", var, val)
233#define percpu_inc(var) percpu_unary_op("inc", var)
210 234
211#define __this_cpu_read_1(pcp) percpu_from_op("mov", (pcp), "m"(pcp)) 235#define __this_cpu_read_1(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
212#define __this_cpu_read_2(pcp) percpu_from_op("mov", (pcp), "m"(pcp)) 236#define __this_cpu_read_2(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index db6109a885a7..254883d0c7e0 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -5,7 +5,7 @@
5 * Performance event hw details: 5 * Performance event hw details:
6 */ 6 */
7 7
8#define X86_PMC_MAX_GENERIC 8 8#define X86_PMC_MAX_GENERIC 32
9#define X86_PMC_MAX_FIXED 3 9#define X86_PMC_MAX_FIXED 3
10 10
11#define X86_PMC_IDX_GENERIC 0 11#define X86_PMC_IDX_GENERIC 0
@@ -18,39 +18,31 @@
18#define MSR_ARCH_PERFMON_EVENTSEL0 0x186 18#define MSR_ARCH_PERFMON_EVENTSEL0 0x186
19#define MSR_ARCH_PERFMON_EVENTSEL1 0x187 19#define MSR_ARCH_PERFMON_EVENTSEL1 0x187
20 20
21#define ARCH_PERFMON_EVENTSEL_ENABLE (1 << 22) 21#define ARCH_PERFMON_EVENTSEL_EVENT 0x000000FFULL
22#define ARCH_PERFMON_EVENTSEL_ANY (1 << 21) 22#define ARCH_PERFMON_EVENTSEL_UMASK 0x0000FF00ULL
23#define ARCH_PERFMON_EVENTSEL_INT (1 << 20) 23#define ARCH_PERFMON_EVENTSEL_USR (1ULL << 16)
24#define ARCH_PERFMON_EVENTSEL_OS (1 << 17) 24#define ARCH_PERFMON_EVENTSEL_OS (1ULL << 17)
25#define ARCH_PERFMON_EVENTSEL_USR (1 << 16) 25#define ARCH_PERFMON_EVENTSEL_EDGE (1ULL << 18)
26 26#define ARCH_PERFMON_EVENTSEL_INT (1ULL << 20)
27/* 27#define ARCH_PERFMON_EVENTSEL_ANY (1ULL << 21)
28 * Includes eventsel and unit mask as well: 28#define ARCH_PERFMON_EVENTSEL_ENABLE (1ULL << 22)
29 */ 29#define ARCH_PERFMON_EVENTSEL_INV (1ULL << 23)
30 30#define ARCH_PERFMON_EVENTSEL_CMASK 0xFF000000ULL
31 31
32#define INTEL_ARCH_EVTSEL_MASK 0x000000FFULL 32#define AMD64_EVENTSEL_EVENT \
33#define INTEL_ARCH_UNIT_MASK 0x0000FF00ULL 33 (ARCH_PERFMON_EVENTSEL_EVENT | (0x0FULL << 32))
34#define INTEL_ARCH_EDGE_MASK 0x00040000ULL 34#define INTEL_ARCH_EVENT_MASK \
35#define INTEL_ARCH_INV_MASK 0x00800000ULL 35 (ARCH_PERFMON_EVENTSEL_UMASK | ARCH_PERFMON_EVENTSEL_EVENT)
36#define INTEL_ARCH_CNT_MASK 0xFF000000ULL 36
37#define INTEL_ARCH_EVENT_MASK (INTEL_ARCH_UNIT_MASK|INTEL_ARCH_EVTSEL_MASK) 37#define X86_RAW_EVENT_MASK \
38 38 (ARCH_PERFMON_EVENTSEL_EVENT | \
39/* 39 ARCH_PERFMON_EVENTSEL_UMASK | \
40 * filter mask to validate fixed counter events. 40 ARCH_PERFMON_EVENTSEL_EDGE | \
41 * the following filters disqualify for fixed counters: 41 ARCH_PERFMON_EVENTSEL_INV | \
42 * - inv 42 ARCH_PERFMON_EVENTSEL_CMASK)
43 * - edge 43#define AMD64_RAW_EVENT_MASK \
44 * - cnt-mask 44 (X86_RAW_EVENT_MASK | \
45 * The other filters are supported by fixed counters. 45 AMD64_EVENTSEL_EVENT)
46 * The any-thread option is supported starting with v3.
47 */
48#define INTEL_ARCH_FIXED_MASK \
49 (INTEL_ARCH_CNT_MASK| \
50 INTEL_ARCH_INV_MASK| \
51 INTEL_ARCH_EDGE_MASK|\
52 INTEL_ARCH_UNIT_MASK|\
53 INTEL_ARCH_EVENT_MASK)
54 46
55#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c 47#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c
56#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8) 48#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
@@ -67,7 +59,7 @@
67union cpuid10_eax { 59union cpuid10_eax {
68 struct { 60 struct {
69 unsigned int version_id:8; 61 unsigned int version_id:8;
70 unsigned int num_events:8; 62 unsigned int num_counters:8;
71 unsigned int bit_width:8; 63 unsigned int bit_width:8;
72 unsigned int mask_length:8; 64 unsigned int mask_length:8;
73 } split; 65 } split;
@@ -76,7 +68,7 @@ union cpuid10_eax {
76 68
77union cpuid10_edx { 69union cpuid10_edx {
78 struct { 70 struct {
79 unsigned int num_events_fixed:4; 71 unsigned int num_counters_fixed:4;
80 unsigned int reserved:28; 72 unsigned int reserved:28;
81 } split; 73 } split;
82 unsigned int full; 74 unsigned int full;
@@ -136,6 +128,18 @@ extern void perf_events_lapic_init(void);
136 128
137#define PERF_EVENT_INDEX_OFFSET 0 129#define PERF_EVENT_INDEX_OFFSET 0
138 130
131/*
132 * Abuse bit 3 of the cpu eflags register to indicate proper PEBS IP fixups.
133 * This flag is otherwise unused and ABI specified to be 0, so nobody should
134 * care what we do with it.
135 */
136#define PERF_EFLAGS_EXACT (1UL << 3)
137
138struct pt_regs;
139extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
140extern unsigned long perf_misc_flags(struct pt_regs *regs);
141#define perf_misc_flags(regs) perf_misc_flags(regs)
142
139#else 143#else
140static inline void init_hw_perf_events(void) { } 144static inline void init_hw_perf_events(void) { }
141static inline void perf_events_lapic_init(void) { } 145static inline void perf_events_lapic_init(void) { }
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h
new file mode 100644
index 000000000000..b05400a542ff
--- /dev/null
+++ b/arch/x86/include/asm/perf_event_p4.h
@@ -0,0 +1,794 @@
1/*
2 * Netburst Perfomance Events (P4, old Xeon)
3 */
4
5#ifndef PERF_EVENT_P4_H
6#define PERF_EVENT_P4_H
7
8#include <linux/cpu.h>
9#include <linux/bitops.h>
10
11/*
12 * NetBurst has perfomance MSRs shared between
13 * threads if HT is turned on, ie for both logical
14 * processors (mem: in turn in Atom with HT support
15 * perf-MSRs are not shared and every thread has its
16 * own perf-MSRs set)
17 */
18#define ARCH_P4_TOTAL_ESCR (46)
19#define ARCH_P4_RESERVED_ESCR (2) /* IQ_ESCR(0,1) not always present */
20#define ARCH_P4_MAX_ESCR (ARCH_P4_TOTAL_ESCR - ARCH_P4_RESERVED_ESCR)
21#define ARCH_P4_MAX_CCCR (18)
22#define ARCH_P4_MAX_COUNTER (ARCH_P4_MAX_CCCR / 2)
23
24#define P4_ESCR_EVENT_MASK 0x7e000000U
25#define P4_ESCR_EVENT_SHIFT 25
26#define P4_ESCR_EVENTMASK_MASK 0x01fffe00U
27#define P4_ESCR_EVENTMASK_SHIFT 9
28#define P4_ESCR_TAG_MASK 0x000001e0U
29#define P4_ESCR_TAG_SHIFT 5
30#define P4_ESCR_TAG_ENABLE 0x00000010U
31#define P4_ESCR_T0_OS 0x00000008U
32#define P4_ESCR_T0_USR 0x00000004U
33#define P4_ESCR_T1_OS 0x00000002U
34#define P4_ESCR_T1_USR 0x00000001U
35
36#define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT)
37#define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT)
38#define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT)
39
40/* Non HT mask */
41#define P4_ESCR_MASK \
42 (P4_ESCR_EVENT_MASK | \
43 P4_ESCR_EVENTMASK_MASK | \
44 P4_ESCR_TAG_MASK | \
45 P4_ESCR_TAG_ENABLE | \
46 P4_ESCR_T0_OS | \
47 P4_ESCR_T0_USR)
48
49/* HT mask */
50#define P4_ESCR_MASK_HT \
51 (P4_ESCR_MASK | P4_ESCR_T1_OS | P4_ESCR_T1_USR)
52
53#define P4_CCCR_OVF 0x80000000U
54#define P4_CCCR_CASCADE 0x40000000U
55#define P4_CCCR_OVF_PMI_T0 0x04000000U
56#define P4_CCCR_OVF_PMI_T1 0x08000000U
57#define P4_CCCR_FORCE_OVF 0x02000000U
58#define P4_CCCR_EDGE 0x01000000U
59#define P4_CCCR_THRESHOLD_MASK 0x00f00000U
60#define P4_CCCR_THRESHOLD_SHIFT 20
61#define P4_CCCR_COMPLEMENT 0x00080000U
62#define P4_CCCR_COMPARE 0x00040000U
63#define P4_CCCR_ESCR_SELECT_MASK 0x0000e000U
64#define P4_CCCR_ESCR_SELECT_SHIFT 13
65#define P4_CCCR_ENABLE 0x00001000U
66#define P4_CCCR_THREAD_SINGLE 0x00010000U
67#define P4_CCCR_THREAD_BOTH 0x00020000U
68#define P4_CCCR_THREAD_ANY 0x00030000U
69#define P4_CCCR_RESERVED 0x00000fffU
70
71#define P4_CCCR_THRESHOLD(v) ((v) << P4_CCCR_THRESHOLD_SHIFT)
72#define P4_CCCR_ESEL(v) ((v) << P4_CCCR_ESCR_SELECT_SHIFT)
73
74/* Custom bits in reerved CCCR area */
75#define P4_CCCR_CACHE_OPS_MASK 0x0000003fU
76
77
78/* Non HT mask */
79#define P4_CCCR_MASK \
80 (P4_CCCR_OVF | \
81 P4_CCCR_CASCADE | \
82 P4_CCCR_OVF_PMI_T0 | \
83 P4_CCCR_FORCE_OVF | \
84 P4_CCCR_EDGE | \
85 P4_CCCR_THRESHOLD_MASK | \
86 P4_CCCR_COMPLEMENT | \
87 P4_CCCR_COMPARE | \
88 P4_CCCR_ESCR_SELECT_MASK | \
89 P4_CCCR_ENABLE)
90
91/* HT mask */
92#define P4_CCCR_MASK_HT (P4_CCCR_MASK | P4_CCCR_THREAD_ANY)
93
94#define P4_GEN_ESCR_EMASK(class, name, bit) \
95 class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT)
96#define P4_ESCR_EMASK_BIT(class, name) class##__##name
97
98/*
99 * config field is 64bit width and consists of
100 * HT << 63 | ESCR << 32 | CCCR
101 * where HT is HyperThreading bit (since ESCR
102 * has it reserved we may use it for own purpose)
103 *
104 * note that this is NOT the addresses of respective
105 * ESCR and CCCR but rather an only packed value should
106 * be unpacked and written to a proper addresses
107 *
108 * the base idea is to pack as much info as
109 * possible
110 */
111#define p4_config_pack_escr(v) (((u64)(v)) << 32)
112#define p4_config_pack_cccr(v) (((u64)(v)) & 0xffffffffULL)
113#define p4_config_unpack_escr(v) (((u64)(v)) >> 32)
114#define p4_config_unpack_cccr(v) (((u64)(v)) & 0xffffffffULL)
115
116#define p4_config_unpack_emask(v) \
117 ({ \
118 u32 t = p4_config_unpack_escr((v)); \
119 t = t & P4_ESCR_EVENTMASK_MASK; \
120 t = t >> P4_ESCR_EVENTMASK_SHIFT; \
121 t; \
122 })
123
124#define p4_config_unpack_event(v) \
125 ({ \
126 u32 t = p4_config_unpack_escr((v)); \
127 t = t & P4_ESCR_EVENT_MASK; \
128 t = t >> P4_ESCR_EVENT_SHIFT; \
129 t; \
130 })
131
132#define p4_config_unpack_cache_event(v) (((u64)(v)) & P4_CCCR_CACHE_OPS_MASK)
133
134#define P4_CONFIG_HT_SHIFT 63
135#define P4_CONFIG_HT (1ULL << P4_CONFIG_HT_SHIFT)
136
137static inline bool p4_is_event_cascaded(u64 config)
138{
139 u32 cccr = p4_config_unpack_cccr(config);
140 return !!(cccr & P4_CCCR_CASCADE);
141}
142
143static inline int p4_ht_config_thread(u64 config)
144{
145 return !!(config & P4_CONFIG_HT);
146}
147
148static inline u64 p4_set_ht_bit(u64 config)
149{
150 return config | P4_CONFIG_HT;
151}
152
153static inline u64 p4_clear_ht_bit(u64 config)
154{
155 return config & ~P4_CONFIG_HT;
156}
157
158static inline int p4_ht_active(void)
159{
160#ifdef CONFIG_SMP
161 return smp_num_siblings > 1;
162#endif
163 return 0;
164}
165
166static inline int p4_ht_thread(int cpu)
167{
168#ifdef CONFIG_SMP
169 if (smp_num_siblings == 2)
170 return cpu != cpumask_first(__get_cpu_var(cpu_sibling_map));
171#endif
172 return 0;
173}
174
175static inline int p4_should_swap_ts(u64 config, int cpu)
176{
177 return p4_ht_config_thread(config) ^ p4_ht_thread(cpu);
178}
179
180static inline u32 p4_default_cccr_conf(int cpu)
181{
182 /*
183 * Note that P4_CCCR_THREAD_ANY is "required" on
184 * non-HT machines (on HT machines we count TS events
185 * regardless the state of second logical processor
186 */
187 u32 cccr = P4_CCCR_THREAD_ANY;
188
189 if (!p4_ht_thread(cpu))
190 cccr |= P4_CCCR_OVF_PMI_T0;
191 else
192 cccr |= P4_CCCR_OVF_PMI_T1;
193
194 return cccr;
195}
196
197static inline u32 p4_default_escr_conf(int cpu, int exclude_os, int exclude_usr)
198{
199 u32 escr = 0;
200
201 if (!p4_ht_thread(cpu)) {
202 if (!exclude_os)
203 escr |= P4_ESCR_T0_OS;
204 if (!exclude_usr)
205 escr |= P4_ESCR_T0_USR;
206 } else {
207 if (!exclude_os)
208 escr |= P4_ESCR_T1_OS;
209 if (!exclude_usr)
210 escr |= P4_ESCR_T1_USR;
211 }
212
213 return escr;
214}
215
216enum P4_EVENTS {
217 P4_EVENT_TC_DELIVER_MODE,
218 P4_EVENT_BPU_FETCH_REQUEST,
219 P4_EVENT_ITLB_REFERENCE,
220 P4_EVENT_MEMORY_CANCEL,
221 P4_EVENT_MEMORY_COMPLETE,
222 P4_EVENT_LOAD_PORT_REPLAY,
223 P4_EVENT_STORE_PORT_REPLAY,
224 P4_EVENT_MOB_LOAD_REPLAY,
225 P4_EVENT_PAGE_WALK_TYPE,
226 P4_EVENT_BSQ_CACHE_REFERENCE,
227 P4_EVENT_IOQ_ALLOCATION,
228 P4_EVENT_IOQ_ACTIVE_ENTRIES,
229 P4_EVENT_FSB_DATA_ACTIVITY,
230 P4_EVENT_BSQ_ALLOCATION,
231 P4_EVENT_BSQ_ACTIVE_ENTRIES,
232 P4_EVENT_SSE_INPUT_ASSIST,
233 P4_EVENT_PACKED_SP_UOP,
234 P4_EVENT_PACKED_DP_UOP,
235 P4_EVENT_SCALAR_SP_UOP,
236 P4_EVENT_SCALAR_DP_UOP,
237 P4_EVENT_64BIT_MMX_UOP,
238 P4_EVENT_128BIT_MMX_UOP,
239 P4_EVENT_X87_FP_UOP,
240 P4_EVENT_TC_MISC,
241 P4_EVENT_GLOBAL_POWER_EVENTS,
242 P4_EVENT_TC_MS_XFER,
243 P4_EVENT_UOP_QUEUE_WRITES,
244 P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE,
245 P4_EVENT_RETIRED_BRANCH_TYPE,
246 P4_EVENT_RESOURCE_STALL,
247 P4_EVENT_WC_BUFFER,
248 P4_EVENT_B2B_CYCLES,
249 P4_EVENT_BNR,
250 P4_EVENT_SNOOP,
251 P4_EVENT_RESPONSE,
252 P4_EVENT_FRONT_END_EVENT,
253 P4_EVENT_EXECUTION_EVENT,
254 P4_EVENT_REPLAY_EVENT,
255 P4_EVENT_INSTR_RETIRED,
256 P4_EVENT_UOPS_RETIRED,
257 P4_EVENT_UOP_TYPE,
258 P4_EVENT_BRANCH_RETIRED,
259 P4_EVENT_MISPRED_BRANCH_RETIRED,
260 P4_EVENT_X87_ASSIST,
261 P4_EVENT_MACHINE_CLEAR,
262 P4_EVENT_INSTR_COMPLETED,
263};
264
265#define P4_OPCODE(event) event##_OPCODE
266#define P4_OPCODE_ESEL(opcode) ((opcode & 0x00ff) >> 0)
267#define P4_OPCODE_EVNT(opcode) ((opcode & 0xff00) >> 8)
268#define P4_OPCODE_PACK(event, sel) (((event) << 8) | sel)
269
270/*
271 * Comments below the event represent ESCR restriction
272 * for this event and counter index per ESCR
273 *
274 * MSR_P4_IQ_ESCR0 and MSR_P4_IQ_ESCR1 are available only on early
275 * processor builds (family 0FH, models 01H-02H). These MSRs
276 * are not available on later versions, so that we don't use
277 * them completely
278 *
279 * Also note that CCCR1 do not have P4_CCCR_ENABLE bit properly
280 * working so that we should not use this CCCR and respective
281 * counter as result
282 */
283enum P4_EVENT_OPCODES {
284 P4_OPCODE(P4_EVENT_TC_DELIVER_MODE) = P4_OPCODE_PACK(0x01, 0x01),
285 /*
286 * MSR_P4_TC_ESCR0: 4, 5
287 * MSR_P4_TC_ESCR1: 6, 7
288 */
289
290 P4_OPCODE(P4_EVENT_BPU_FETCH_REQUEST) = P4_OPCODE_PACK(0x03, 0x00),
291 /*
292 * MSR_P4_BPU_ESCR0: 0, 1
293 * MSR_P4_BPU_ESCR1: 2, 3
294 */
295
296 P4_OPCODE(P4_EVENT_ITLB_REFERENCE) = P4_OPCODE_PACK(0x18, 0x03),
297 /*
298 * MSR_P4_ITLB_ESCR0: 0, 1
299 * MSR_P4_ITLB_ESCR1: 2, 3
300 */
301
302 P4_OPCODE(P4_EVENT_MEMORY_CANCEL) = P4_OPCODE_PACK(0x02, 0x05),
303 /*
304 * MSR_P4_DAC_ESCR0: 8, 9
305 * MSR_P4_DAC_ESCR1: 10, 11
306 */
307
308 P4_OPCODE(P4_EVENT_MEMORY_COMPLETE) = P4_OPCODE_PACK(0x08, 0x02),
309 /*
310 * MSR_P4_SAAT_ESCR0: 8, 9
311 * MSR_P4_SAAT_ESCR1: 10, 11
312 */
313
314 P4_OPCODE(P4_EVENT_LOAD_PORT_REPLAY) = P4_OPCODE_PACK(0x04, 0x02),
315 /*
316 * MSR_P4_SAAT_ESCR0: 8, 9
317 * MSR_P4_SAAT_ESCR1: 10, 11
318 */
319
320 P4_OPCODE(P4_EVENT_STORE_PORT_REPLAY) = P4_OPCODE_PACK(0x05, 0x02),
321 /*
322 * MSR_P4_SAAT_ESCR0: 8, 9
323 * MSR_P4_SAAT_ESCR1: 10, 11
324 */
325
326 P4_OPCODE(P4_EVENT_MOB_LOAD_REPLAY) = P4_OPCODE_PACK(0x03, 0x02),
327 /*
328 * MSR_P4_MOB_ESCR0: 0, 1
329 * MSR_P4_MOB_ESCR1: 2, 3
330 */
331
332 P4_OPCODE(P4_EVENT_PAGE_WALK_TYPE) = P4_OPCODE_PACK(0x01, 0x04),
333 /*
334 * MSR_P4_PMH_ESCR0: 0, 1
335 * MSR_P4_PMH_ESCR1: 2, 3
336 */
337
338 P4_OPCODE(P4_EVENT_BSQ_CACHE_REFERENCE) = P4_OPCODE_PACK(0x0c, 0x07),
339 /*
340 * MSR_P4_BSU_ESCR0: 0, 1
341 * MSR_P4_BSU_ESCR1: 2, 3
342 */
343
344 P4_OPCODE(P4_EVENT_IOQ_ALLOCATION) = P4_OPCODE_PACK(0x03, 0x06),
345 /*
346 * MSR_P4_FSB_ESCR0: 0, 1
347 * MSR_P4_FSB_ESCR1: 2, 3
348 */
349
350 P4_OPCODE(P4_EVENT_IOQ_ACTIVE_ENTRIES) = P4_OPCODE_PACK(0x1a, 0x06),
351 /*
352 * MSR_P4_FSB_ESCR1: 2, 3
353 */
354
355 P4_OPCODE(P4_EVENT_FSB_DATA_ACTIVITY) = P4_OPCODE_PACK(0x17, 0x06),
356 /*
357 * MSR_P4_FSB_ESCR0: 0, 1
358 * MSR_P4_FSB_ESCR1: 2, 3
359 */
360
361 P4_OPCODE(P4_EVENT_BSQ_ALLOCATION) = P4_OPCODE_PACK(0x05, 0x07),
362 /*
363 * MSR_P4_BSU_ESCR0: 0, 1
364 */
365
366 P4_OPCODE(P4_EVENT_BSQ_ACTIVE_ENTRIES) = P4_OPCODE_PACK(0x06, 0x07),
367 /*
368 * NOTE: no ESCR name in docs, it's guessed
369 * MSR_P4_BSU_ESCR1: 2, 3
370 */
371
372 P4_OPCODE(P4_EVENT_SSE_INPUT_ASSIST) = P4_OPCODE_PACK(0x34, 0x01),
373 /*
374 * MSR_P4_FIRM_ESCR0: 8, 9
375 * MSR_P4_FIRM_ESCR1: 10, 11
376 */
377
378 P4_OPCODE(P4_EVENT_PACKED_SP_UOP) = P4_OPCODE_PACK(0x08, 0x01),
379 /*
380 * MSR_P4_FIRM_ESCR0: 8, 9
381 * MSR_P4_FIRM_ESCR1: 10, 11
382 */
383
384 P4_OPCODE(P4_EVENT_PACKED_DP_UOP) = P4_OPCODE_PACK(0x0c, 0x01),
385 /*
386 * MSR_P4_FIRM_ESCR0: 8, 9
387 * MSR_P4_FIRM_ESCR1: 10, 11
388 */
389
390 P4_OPCODE(P4_EVENT_SCALAR_SP_UOP) = P4_OPCODE_PACK(0x0a, 0x01),
391 /*
392 * MSR_P4_FIRM_ESCR0: 8, 9
393 * MSR_P4_FIRM_ESCR1: 10, 11
394 */
395
396 P4_OPCODE(P4_EVENT_SCALAR_DP_UOP) = P4_OPCODE_PACK(0x0e, 0x01),
397 /*
398 * MSR_P4_FIRM_ESCR0: 8, 9
399 * MSR_P4_FIRM_ESCR1: 10, 11
400 */
401
402 P4_OPCODE(P4_EVENT_64BIT_MMX_UOP) = P4_OPCODE_PACK(0x02, 0x01),
403 /*
404 * MSR_P4_FIRM_ESCR0: 8, 9
405 * MSR_P4_FIRM_ESCR1: 10, 11
406 */
407
408 P4_OPCODE(P4_EVENT_128BIT_MMX_UOP) = P4_OPCODE_PACK(0x1a, 0x01),
409 /*
410 * MSR_P4_FIRM_ESCR0: 8, 9
411 * MSR_P4_FIRM_ESCR1: 10, 11
412 */
413
414 P4_OPCODE(P4_EVENT_X87_FP_UOP) = P4_OPCODE_PACK(0x04, 0x01),
415 /*
416 * MSR_P4_FIRM_ESCR0: 8, 9
417 * MSR_P4_FIRM_ESCR1: 10, 11
418 */
419
420 P4_OPCODE(P4_EVENT_TC_MISC) = P4_OPCODE_PACK(0x06, 0x01),
421 /*
422 * MSR_P4_TC_ESCR0: 4, 5
423 * MSR_P4_TC_ESCR1: 6, 7
424 */
425
426 P4_OPCODE(P4_EVENT_GLOBAL_POWER_EVENTS) = P4_OPCODE_PACK(0x13, 0x06),
427 /*
428 * MSR_P4_FSB_ESCR0: 0, 1
429 * MSR_P4_FSB_ESCR1: 2, 3
430 */
431
432 P4_OPCODE(P4_EVENT_TC_MS_XFER) = P4_OPCODE_PACK(0x05, 0x00),
433 /*
434 * MSR_P4_MS_ESCR0: 4, 5
435 * MSR_P4_MS_ESCR1: 6, 7
436 */
437
438 P4_OPCODE(P4_EVENT_UOP_QUEUE_WRITES) = P4_OPCODE_PACK(0x09, 0x00),
439 /*
440 * MSR_P4_MS_ESCR0: 4, 5
441 * MSR_P4_MS_ESCR1: 6, 7
442 */
443
444 P4_OPCODE(P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE) = P4_OPCODE_PACK(0x05, 0x02),
445 /*
446 * MSR_P4_TBPU_ESCR0: 4, 5
447 * MSR_P4_TBPU_ESCR1: 6, 7
448 */
449
450 P4_OPCODE(P4_EVENT_RETIRED_BRANCH_TYPE) = P4_OPCODE_PACK(0x04, 0x02),
451 /*
452 * MSR_P4_TBPU_ESCR0: 4, 5
453 * MSR_P4_TBPU_ESCR1: 6, 7
454 */
455
456 P4_OPCODE(P4_EVENT_RESOURCE_STALL) = P4_OPCODE_PACK(0x01, 0x01),
457 /*
458 * MSR_P4_ALF_ESCR0: 12, 13, 16
459 * MSR_P4_ALF_ESCR1: 14, 15, 17
460 */
461
462 P4_OPCODE(P4_EVENT_WC_BUFFER) = P4_OPCODE_PACK(0x05, 0x05),
463 /*
464 * MSR_P4_DAC_ESCR0: 8, 9
465 * MSR_P4_DAC_ESCR1: 10, 11
466 */
467
468 P4_OPCODE(P4_EVENT_B2B_CYCLES) = P4_OPCODE_PACK(0x16, 0x03),
469 /*
470 * MSR_P4_FSB_ESCR0: 0, 1
471 * MSR_P4_FSB_ESCR1: 2, 3
472 */
473
474 P4_OPCODE(P4_EVENT_BNR) = P4_OPCODE_PACK(0x08, 0x03),
475 /*
476 * MSR_P4_FSB_ESCR0: 0, 1
477 * MSR_P4_FSB_ESCR1: 2, 3
478 */
479
480 P4_OPCODE(P4_EVENT_SNOOP) = P4_OPCODE_PACK(0x06, 0x03),
481 /*
482 * MSR_P4_FSB_ESCR0: 0, 1
483 * MSR_P4_FSB_ESCR1: 2, 3
484 */
485
486 P4_OPCODE(P4_EVENT_RESPONSE) = P4_OPCODE_PACK(0x04, 0x03),
487 /*
488 * MSR_P4_FSB_ESCR0: 0, 1
489 * MSR_P4_FSB_ESCR1: 2, 3
490 */
491
492 P4_OPCODE(P4_EVENT_FRONT_END_EVENT) = P4_OPCODE_PACK(0x08, 0x05),
493 /*
494 * MSR_P4_CRU_ESCR2: 12, 13, 16
495 * MSR_P4_CRU_ESCR3: 14, 15, 17
496 */
497
498 P4_OPCODE(P4_EVENT_EXECUTION_EVENT) = P4_OPCODE_PACK(0x0c, 0x05),
499 /*
500 * MSR_P4_CRU_ESCR2: 12, 13, 16
501 * MSR_P4_CRU_ESCR3: 14, 15, 17
502 */
503
504 P4_OPCODE(P4_EVENT_REPLAY_EVENT) = P4_OPCODE_PACK(0x09, 0x05),
505 /*
506 * MSR_P4_CRU_ESCR2: 12, 13, 16
507 * MSR_P4_CRU_ESCR3: 14, 15, 17
508 */
509
510 P4_OPCODE(P4_EVENT_INSTR_RETIRED) = P4_OPCODE_PACK(0x02, 0x04),
511 /*
512 * MSR_P4_CRU_ESCR0: 12, 13, 16
513 * MSR_P4_CRU_ESCR1: 14, 15, 17
514 */
515
516 P4_OPCODE(P4_EVENT_UOPS_RETIRED) = P4_OPCODE_PACK(0x01, 0x04),
517 /*
518 * MSR_P4_CRU_ESCR0: 12, 13, 16
519 * MSR_P4_CRU_ESCR1: 14, 15, 17
520 */
521
522 P4_OPCODE(P4_EVENT_UOP_TYPE) = P4_OPCODE_PACK(0x02, 0x02),
523 /*
524 * MSR_P4_RAT_ESCR0: 12, 13, 16
525 * MSR_P4_RAT_ESCR1: 14, 15, 17
526 */
527
528 P4_OPCODE(P4_EVENT_BRANCH_RETIRED) = P4_OPCODE_PACK(0x06, 0x05),
529 /*
530 * MSR_P4_CRU_ESCR2: 12, 13, 16
531 * MSR_P4_CRU_ESCR3: 14, 15, 17
532 */
533
534 P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED) = P4_OPCODE_PACK(0x03, 0x04),
535 /*
536 * MSR_P4_CRU_ESCR0: 12, 13, 16
537 * MSR_P4_CRU_ESCR1: 14, 15, 17
538 */
539
540 P4_OPCODE(P4_EVENT_X87_ASSIST) = P4_OPCODE_PACK(0x03, 0x05),
541 /*
542 * MSR_P4_CRU_ESCR2: 12, 13, 16
543 * MSR_P4_CRU_ESCR3: 14, 15, 17
544 */
545
546 P4_OPCODE(P4_EVENT_MACHINE_CLEAR) = P4_OPCODE_PACK(0x02, 0x05),
547 /*
548 * MSR_P4_CRU_ESCR2: 12, 13, 16
549 * MSR_P4_CRU_ESCR3: 14, 15, 17
550 */
551
552 P4_OPCODE(P4_EVENT_INSTR_COMPLETED) = P4_OPCODE_PACK(0x07, 0x04),
553 /*
554 * MSR_P4_CRU_ESCR0: 12, 13, 16
555 * MSR_P4_CRU_ESCR1: 14, 15, 17
556 */
557};
558
559/*
560 * a caller should use P4_ESCR_EMASK_NAME helper to
561 * pick the EventMask needed, for example
562 *
563 * P4_ESCR_EMASK_NAME(P4_EVENT_TC_DELIVER_MODE, DD)
564 */
565enum P4_ESCR_EMASKS {
566 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, DD, 0),
567 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, DB, 1),
568 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, DI, 2),
569 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, BD, 3),
570 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, BB, 4),
571 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, BI, 5),
572 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, ID, 6),
573
574 P4_GEN_ESCR_EMASK(P4_EVENT_BPU_FETCH_REQUEST, TCMISS, 0),
575
576 P4_GEN_ESCR_EMASK(P4_EVENT_ITLB_REFERENCE, HIT, 0),
577 P4_GEN_ESCR_EMASK(P4_EVENT_ITLB_REFERENCE, MISS, 1),
578 P4_GEN_ESCR_EMASK(P4_EVENT_ITLB_REFERENCE, HIT_UK, 2),
579
580 P4_GEN_ESCR_EMASK(P4_EVENT_MEMORY_CANCEL, ST_RB_FULL, 2),
581 P4_GEN_ESCR_EMASK(P4_EVENT_MEMORY_CANCEL, 64K_CONF, 3),
582
583 P4_GEN_ESCR_EMASK(P4_EVENT_MEMORY_COMPLETE, LSC, 0),
584 P4_GEN_ESCR_EMASK(P4_EVENT_MEMORY_COMPLETE, SSC, 1),
585
586 P4_GEN_ESCR_EMASK(P4_EVENT_LOAD_PORT_REPLAY, SPLIT_LD, 1),
587
588 P4_GEN_ESCR_EMASK(P4_EVENT_STORE_PORT_REPLAY, SPLIT_ST, 1),
589
590 P4_GEN_ESCR_EMASK(P4_EVENT_MOB_LOAD_REPLAY, NO_STA, 1),
591 P4_GEN_ESCR_EMASK(P4_EVENT_MOB_LOAD_REPLAY, NO_STD, 3),
592 P4_GEN_ESCR_EMASK(P4_EVENT_MOB_LOAD_REPLAY, PARTIAL_DATA, 4),
593 P4_GEN_ESCR_EMASK(P4_EVENT_MOB_LOAD_REPLAY, UNALGN_ADDR, 5),
594
595 P4_GEN_ESCR_EMASK(P4_EVENT_PAGE_WALK_TYPE, DTMISS, 0),
596 P4_GEN_ESCR_EMASK(P4_EVENT_PAGE_WALK_TYPE, ITMISS, 1),
597
598 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_HITS, 0),
599 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_HITE, 1),
600 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_HITM, 2),
601 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_HITS, 3),
602 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_HITE, 4),
603 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_HITM, 5),
604 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_MISS, 8),
605 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_MISS, 9),
606 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_CACHE_REFERENCE, WR_2ndL_MISS, 10),
607
608 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, DEFAULT, 0),
609 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, ALL_READ, 5),
610 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, ALL_WRITE, 6),
611 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, MEM_UC, 7),
612 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, MEM_WC, 8),
613 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, MEM_WT, 9),
614 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, MEM_WP, 10),
615 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, MEM_WB, 11),
616 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, OWN, 13),
617 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, OTHER, 14),
618 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ALLOCATION, PREFETCH, 15),
619
620 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, DEFAULT, 0),
621 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, ALL_READ, 5),
622 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, ALL_WRITE, 6),
623 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, MEM_UC, 7),
624 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, MEM_WC, 8),
625 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, MEM_WT, 9),
626 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, MEM_WP, 10),
627 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, MEM_WB, 11),
628 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, OWN, 13),
629 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, OTHER, 14),
630 P4_GEN_ESCR_EMASK(P4_EVENT_IOQ_ACTIVE_ENTRIES, PREFETCH, 15),
631
632 P4_GEN_ESCR_EMASK(P4_EVENT_FSB_DATA_ACTIVITY, DRDY_DRV, 0),
633 P4_GEN_ESCR_EMASK(P4_EVENT_FSB_DATA_ACTIVITY, DRDY_OWN, 1),
634 P4_GEN_ESCR_EMASK(P4_EVENT_FSB_DATA_ACTIVITY, DRDY_OTHER, 2),
635 P4_GEN_ESCR_EMASK(P4_EVENT_FSB_DATA_ACTIVITY, DBSY_DRV, 3),
636 P4_GEN_ESCR_EMASK(P4_EVENT_FSB_DATA_ACTIVITY, DBSY_OWN, 4),
637 P4_GEN_ESCR_EMASK(P4_EVENT_FSB_DATA_ACTIVITY, DBSY_OTHER, 5),
638
639 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_TYPE0, 0),
640 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_TYPE1, 1),
641 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_LEN0, 2),
642 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_LEN1, 3),
643 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_IO_TYPE, 5),
644 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_LOCK_TYPE, 6),
645 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_CACHE_TYPE, 7),
646 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_SPLIT_TYPE, 8),
647 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_DEM_TYPE, 9),
648 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, REQ_ORD_TYPE, 10),
649 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, MEM_TYPE0, 11),
650 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, MEM_TYPE1, 12),
651 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ALLOCATION, MEM_TYPE2, 13),
652
653 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_TYPE0, 0),
654 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_TYPE1, 1),
655 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_LEN0, 2),
656 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_LEN1, 3),
657 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_IO_TYPE, 5),
658 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_LOCK_TYPE, 6),
659 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_CACHE_TYPE, 7),
660 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_SPLIT_TYPE, 8),
661 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_DEM_TYPE, 9),
662 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, REQ_ORD_TYPE, 10),
663 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, MEM_TYPE0, 11),
664 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, MEM_TYPE1, 12),
665 P4_GEN_ESCR_EMASK(P4_EVENT_BSQ_ACTIVE_ENTRIES, MEM_TYPE2, 13),
666
667 P4_GEN_ESCR_EMASK(P4_EVENT_SSE_INPUT_ASSIST, ALL, 15),
668
669 P4_GEN_ESCR_EMASK(P4_EVENT_PACKED_SP_UOP, ALL, 15),
670
671 P4_GEN_ESCR_EMASK(P4_EVENT_PACKED_DP_UOP, ALL, 15),
672
673 P4_GEN_ESCR_EMASK(P4_EVENT_SCALAR_SP_UOP, ALL, 15),
674
675 P4_GEN_ESCR_EMASK(P4_EVENT_SCALAR_DP_UOP, ALL, 15),
676
677 P4_GEN_ESCR_EMASK(P4_EVENT_64BIT_MMX_UOP, ALL, 15),
678
679 P4_GEN_ESCR_EMASK(P4_EVENT_128BIT_MMX_UOP, ALL, 15),
680
681 P4_GEN_ESCR_EMASK(P4_EVENT_X87_FP_UOP, ALL, 15),
682
683 P4_GEN_ESCR_EMASK(P4_EVENT_TC_MISC, FLUSH, 4),
684
685 P4_GEN_ESCR_EMASK(P4_EVENT_GLOBAL_POWER_EVENTS, RUNNING, 0),
686
687 P4_GEN_ESCR_EMASK(P4_EVENT_TC_MS_XFER, CISC, 0),
688
689 P4_GEN_ESCR_EMASK(P4_EVENT_UOP_QUEUE_WRITES, FROM_TC_BUILD, 0),
690 P4_GEN_ESCR_EMASK(P4_EVENT_UOP_QUEUE_WRITES, FROM_TC_DELIVER, 1),
691 P4_GEN_ESCR_EMASK(P4_EVENT_UOP_QUEUE_WRITES, FROM_ROM, 2),
692
693 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE, CONDITIONAL, 1),
694 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE, CALL, 2),
695 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE, RETURN, 3),
696 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE, INDIRECT, 4),
697
698 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_BRANCH_TYPE, CONDITIONAL, 1),
699 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_BRANCH_TYPE, CALL, 2),
700 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_BRANCH_TYPE, RETURN, 3),
701 P4_GEN_ESCR_EMASK(P4_EVENT_RETIRED_BRANCH_TYPE, INDIRECT, 4),
702
703 P4_GEN_ESCR_EMASK(P4_EVENT_RESOURCE_STALL, SBFULL, 5),
704
705 P4_GEN_ESCR_EMASK(P4_EVENT_WC_BUFFER, WCB_EVICTS, 0),
706 P4_GEN_ESCR_EMASK(P4_EVENT_WC_BUFFER, WCB_FULL_EVICTS, 1),
707
708 P4_GEN_ESCR_EMASK(P4_EVENT_FRONT_END_EVENT, NBOGUS, 0),
709 P4_GEN_ESCR_EMASK(P4_EVENT_FRONT_END_EVENT, BOGUS, 1),
710
711 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, NBOGUS0, 0),
712 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, NBOGUS1, 1),
713 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, NBOGUS2, 2),
714 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, NBOGUS3, 3),
715 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, BOGUS0, 4),
716 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, BOGUS1, 5),
717 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, BOGUS2, 6),
718 P4_GEN_ESCR_EMASK(P4_EVENT_EXECUTION_EVENT, BOGUS3, 7),
719
720 P4_GEN_ESCR_EMASK(P4_EVENT_REPLAY_EVENT, NBOGUS, 0),
721 P4_GEN_ESCR_EMASK(P4_EVENT_REPLAY_EVENT, BOGUS, 1),
722
723 P4_GEN_ESCR_EMASK(P4_EVENT_INSTR_RETIRED, NBOGUSNTAG, 0),
724 P4_GEN_ESCR_EMASK(P4_EVENT_INSTR_RETIRED, NBOGUSTAG, 1),
725 P4_GEN_ESCR_EMASK(P4_EVENT_INSTR_RETIRED, BOGUSNTAG, 2),
726 P4_GEN_ESCR_EMASK(P4_EVENT_INSTR_RETIRED, BOGUSTAG, 3),
727
728 P4_GEN_ESCR_EMASK(P4_EVENT_UOPS_RETIRED, NBOGUS, 0),
729 P4_GEN_ESCR_EMASK(P4_EVENT_UOPS_RETIRED, BOGUS, 1),
730
731 P4_GEN_ESCR_EMASK(P4_EVENT_UOP_TYPE, TAGLOADS, 1),
732 P4_GEN_ESCR_EMASK(P4_EVENT_UOP_TYPE, TAGSTORES, 2),
733
734 P4_GEN_ESCR_EMASK(P4_EVENT_BRANCH_RETIRED, MMNP, 0),
735 P4_GEN_ESCR_EMASK(P4_EVENT_BRANCH_RETIRED, MMNM, 1),
736 P4_GEN_ESCR_EMASK(P4_EVENT_BRANCH_RETIRED, MMTP, 2),
737 P4_GEN_ESCR_EMASK(P4_EVENT_BRANCH_RETIRED, MMTM, 3),
738
739 P4_GEN_ESCR_EMASK(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS, 0),
740
741 P4_GEN_ESCR_EMASK(P4_EVENT_X87_ASSIST, FPSU, 0),
742 P4_GEN_ESCR_EMASK(P4_EVENT_X87_ASSIST, FPSO, 1),
743 P4_GEN_ESCR_EMASK(P4_EVENT_X87_ASSIST, POAO, 2),
744 P4_GEN_ESCR_EMASK(P4_EVENT_X87_ASSIST, POAU, 3),
745 P4_GEN_ESCR_EMASK(P4_EVENT_X87_ASSIST, PREA, 4),
746
747 P4_GEN_ESCR_EMASK(P4_EVENT_MACHINE_CLEAR, CLEAR, 0),
748 P4_GEN_ESCR_EMASK(P4_EVENT_MACHINE_CLEAR, MOCLEAR, 1),
749 P4_GEN_ESCR_EMASK(P4_EVENT_MACHINE_CLEAR, SMCLEAR, 2),
750
751 P4_GEN_ESCR_EMASK(P4_EVENT_INSTR_COMPLETED, NBOGUS, 0),
752 P4_GEN_ESCR_EMASK(P4_EVENT_INSTR_COMPLETED, BOGUS, 1),
753};
754
755/* P4 PEBS: stale for a while */
756#define P4_PEBS_METRIC_MASK 0x00001fffU
757#define P4_PEBS_UOB_TAG 0x01000000U
758#define P4_PEBS_ENABLE 0x02000000U
759
760/* Replay metrics for MSR_IA32_PEBS_ENABLE and MSR_P4_PEBS_MATRIX_VERT */
761#define P4_PEBS__1stl_cache_load_miss_retired 0x3000001
762#define P4_PEBS__2ndl_cache_load_miss_retired 0x3000002
763#define P4_PEBS__dtlb_load_miss_retired 0x3000004
764#define P4_PEBS__dtlb_store_miss_retired 0x3000004
765#define P4_PEBS__dtlb_all_miss_retired 0x3000004
766#define P4_PEBS__tagged_mispred_branch 0x3018000
767#define P4_PEBS__mob_load_replay_retired 0x3000200
768#define P4_PEBS__split_load_retired 0x3000400
769#define P4_PEBS__split_store_retired 0x3000400
770
771#define P4_VERT__1stl_cache_load_miss_retired 0x0000001
772#define P4_VERT__2ndl_cache_load_miss_retired 0x0000001
773#define P4_VERT__dtlb_load_miss_retired 0x0000001
774#define P4_VERT__dtlb_store_miss_retired 0x0000002
775#define P4_VERT__dtlb_all_miss_retired 0x0000003
776#define P4_VERT__tagged_mispred_branch 0x0000010
777#define P4_VERT__mob_load_replay_retired 0x0000001
778#define P4_VERT__split_load_retired 0x0000001
779#define P4_VERT__split_store_retired 0x0000002
780
781enum P4_CACHE_EVENTS {
782 P4_CACHE__NONE,
783
784 P4_CACHE__1stl_cache_load_miss_retired,
785 P4_CACHE__2ndl_cache_load_miss_retired,
786 P4_CACHE__dtlb_load_miss_retired,
787 P4_CACHE__dtlb_store_miss_retired,
788 P4_CACHE__itlb_reference_hit,
789 P4_CACHE__itlb_reference_miss,
790
791 P4_CACHE__MAX
792};
793
794#endif /* PERF_EVENT_P4_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index b753ea59703a..5a51379dcbe4 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -21,7 +21,6 @@ struct mm_struct;
21#include <asm/msr.h> 21#include <asm/msr.h>
22#include <asm/desc_defs.h> 22#include <asm/desc_defs.h>
23#include <asm/nops.h> 23#include <asm/nops.h>
24#include <asm/ds.h>
25 24
26#include <linux/personality.h> 25#include <linux/personality.h>
27#include <linux/cpumask.h> 26#include <linux/cpumask.h>
@@ -29,6 +28,7 @@ struct mm_struct;
29#include <linux/threads.h> 28#include <linux/threads.h>
30#include <linux/math64.h> 29#include <linux/math64.h>
31#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/err.h>
32 32
33#define HBP_NUM 4 33#define HBP_NUM 4
34/* 34/*
@@ -113,7 +113,6 @@ struct cpuinfo_x86 {
113 /* Index into per_cpu list: */ 113 /* Index into per_cpu list: */
114 u16 cpu_index; 114 u16 cpu_index;
115#endif 115#endif
116 unsigned int x86_hyper_vendor;
117} __attribute__((__aligned__(SMP_CACHE_BYTES))); 116} __attribute__((__aligned__(SMP_CACHE_BYTES)));
118 117
119#define X86_VENDOR_INTEL 0 118#define X86_VENDOR_INTEL 0
@@ -127,9 +126,6 @@ struct cpuinfo_x86 {
127 126
128#define X86_VENDOR_UNKNOWN 0xff 127#define X86_VENDOR_UNKNOWN 0xff
129 128
130#define X86_HYPER_VENDOR_NONE 0
131#define X86_HYPER_VENDOR_VMWARE 1
132
133/* 129/*
134 * capabilities of CPUs 130 * capabilities of CPUs
135 */ 131 */
@@ -380,6 +376,10 @@ union thread_xstate {
380 struct xsave_struct xsave; 376 struct xsave_struct xsave;
381}; 377};
382 378
379struct fpu {
380 union thread_xstate *state;
381};
382
383#ifdef CONFIG_X86_64 383#ifdef CONFIG_X86_64
384DECLARE_PER_CPU(struct orig_ist, orig_ist); 384DECLARE_PER_CPU(struct orig_ist, orig_ist);
385 385
@@ -457,7 +457,7 @@ struct thread_struct {
457 unsigned long trap_no; 457 unsigned long trap_no;
458 unsigned long error_code; 458 unsigned long error_code;
459 /* floating point and extended processor state */ 459 /* floating point and extended processor state */
460 union thread_xstate *xstate; 460 struct fpu fpu;
461#ifdef CONFIG_X86_32 461#ifdef CONFIG_X86_32
462 /* Virtual 86 mode info */ 462 /* Virtual 86 mode info */
463 struct vm86_struct __user *vm86_info; 463 struct vm86_struct __user *vm86_info;
@@ -473,10 +473,6 @@ struct thread_struct {
473 unsigned long iopl; 473 unsigned long iopl;
474 /* Max allowed port in the bitmap, in bytes: */ 474 /* Max allowed port in the bitmap, in bytes: */
475 unsigned io_bitmap_max; 475 unsigned io_bitmap_max;
476/* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set. */
477 unsigned long debugctlmsr;
478 /* Debug Store context; see asm/ds.h */
479 struct ds_context *ds_ctx;
480}; 476};
481 477
482static inline unsigned long native_get_debugreg(int regno) 478static inline unsigned long native_get_debugreg(int regno)
@@ -803,7 +799,7 @@ extern void cpu_init(void);
803 799
804static inline unsigned long get_debugctlmsr(void) 800static inline unsigned long get_debugctlmsr(void)
805{ 801{
806 unsigned long debugctlmsr = 0; 802 unsigned long debugctlmsr = 0;
807 803
808#ifndef CONFIG_X86_DEBUGCTLMSR 804#ifndef CONFIG_X86_DEBUGCTLMSR
809 if (boot_cpu_data.x86 < 6) 805 if (boot_cpu_data.x86 < 6)
@@ -811,21 +807,6 @@ static inline unsigned long get_debugctlmsr(void)
811#endif 807#endif
812 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); 808 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
813 809
814 return debugctlmsr;
815}
816
817static inline unsigned long get_debugctlmsr_on_cpu(int cpu)
818{
819 u64 debugctlmsr = 0;
820 u32 val1, val2;
821
822#ifndef CONFIG_X86_DEBUGCTLMSR
823 if (boot_cpu_data.x86 < 6)
824 return 0;
825#endif
826 rdmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, &val1, &val2);
827 debugctlmsr = val1 | ((u64)val2 << 32);
828
829 return debugctlmsr; 810 return debugctlmsr;
830} 811}
831 812
@@ -838,18 +819,6 @@ static inline void update_debugctlmsr(unsigned long debugctlmsr)
838 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); 819 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
839} 820}
840 821
841static inline void update_debugctlmsr_on_cpu(int cpu,
842 unsigned long debugctlmsr)
843{
844#ifndef CONFIG_X86_DEBUGCTLMSR
845 if (boot_cpu_data.x86 < 6)
846 return;
847#endif
848 wrmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR,
849 (u32)((u64)debugctlmsr),
850 (u32)((u64)debugctlmsr >> 32));
851}
852
853/* 822/*
854 * from system description table in BIOS. Mostly for MCA use, but 823 * from system description table in BIOS. Mostly for MCA use, but
855 * others may find it useful: 824 * others may find it useful:
diff --git a/arch/x86/include/asm/ptrace-abi.h b/arch/x86/include/asm/ptrace-abi.h
index 86723035a515..52b098a6eebb 100644
--- a/arch/x86/include/asm/ptrace-abi.h
+++ b/arch/x86/include/asm/ptrace-abi.h
@@ -82,61 +82,6 @@
82 82
83#ifndef __ASSEMBLY__ 83#ifndef __ASSEMBLY__
84#include <linux/types.h> 84#include <linux/types.h>
85 85#endif
86/* configuration/status structure used in PTRACE_BTS_CONFIG and
87 PTRACE_BTS_STATUS commands.
88*/
89struct ptrace_bts_config {
90 /* requested or actual size of BTS buffer in bytes */
91 __u32 size;
92 /* bitmask of below flags */
93 __u32 flags;
94 /* buffer overflow signal */
95 __u32 signal;
96 /* actual size of bts_struct in bytes */
97 __u32 bts_size;
98};
99#endif /* __ASSEMBLY__ */
100
101#define PTRACE_BTS_O_TRACE 0x1 /* branch trace */
102#define PTRACE_BTS_O_SCHED 0x2 /* scheduling events w/ jiffies */
103#define PTRACE_BTS_O_SIGNAL 0x4 /* send SIG<signal> on buffer overflow
104 instead of wrapping around */
105#define PTRACE_BTS_O_ALLOC 0x8 /* (re)allocate buffer */
106
107#define PTRACE_BTS_CONFIG 40
108/* Configure branch trace recording.
109 ADDR points to a struct ptrace_bts_config.
110 DATA gives the size of that buffer.
111 A new buffer is allocated, if requested in the flags.
112 An overflow signal may only be requested for new buffers.
113 Returns the number of bytes read.
114*/
115#define PTRACE_BTS_STATUS 41
116/* Return the current configuration in a struct ptrace_bts_config
117 pointed to by ADDR; DATA gives the size of that buffer.
118 Returns the number of bytes written.
119*/
120#define PTRACE_BTS_SIZE 42
121/* Return the number of available BTS records for draining.
122 DATA and ADDR are ignored.
123*/
124#define PTRACE_BTS_GET 43
125/* Get a single BTS record.
126 DATA defines the index into the BTS array, where 0 is the newest
127 entry, and higher indices refer to older entries.
128 ADDR is pointing to struct bts_struct (see asm/ds.h).
129*/
130#define PTRACE_BTS_CLEAR 44
131/* Clear the BTS buffer.
132 DATA and ADDR are ignored.
133*/
134#define PTRACE_BTS_DRAIN 45
135/* Read all available BTS records and clear the buffer.
136 ADDR points to an array of struct bts_struct.
137 DATA gives the size of that buffer.
138 BTS records are read from oldest to newest.
139 Returns number of BTS records drained.
140*/
141 86
142#endif /* _ASM_X86_PTRACE_ABI_H */ 87#endif /* _ASM_X86_PTRACE_ABI_H */
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 69a686a7dff0..78cd1ea94500 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -289,12 +289,6 @@ extern int do_get_thread_area(struct task_struct *p, int idx,
289extern int do_set_thread_area(struct task_struct *p, int idx, 289extern int do_set_thread_area(struct task_struct *p, int idx,
290 struct user_desc __user *info, int can_allocate); 290 struct user_desc __user *info, int can_allocate);
291 291
292#ifdef CONFIG_X86_PTRACE_BTS
293extern void ptrace_bts_untrace(struct task_struct *tsk);
294
295#define arch_ptrace_untrace(tsk) ptrace_bts_untrace(tsk)
296#endif /* CONFIG_X86_PTRACE_BTS */
297
298#endif /* __KERNEL__ */ 292#endif /* __KERNEL__ */
299 293
300#endif /* !__ASSEMBLY__ */ 294#endif /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index e0d28901e969..d4092fac226b 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -92,8 +92,7 @@ struct thread_info {
92#define TIF_IO_BITMAP 22 /* uses I/O bitmap */ 92#define TIF_IO_BITMAP 22 /* uses I/O bitmap */
93#define TIF_FREEZE 23 /* is freezing for suspend */ 93#define TIF_FREEZE 23 /* is freezing for suspend */
94#define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ 94#define TIF_FORCED_TF 24 /* true if TF in eflags artificially */
95#define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ 95#define TIF_BLOCKSTEP 25 /* set when we want DEBUGCTLMSR_BTF */
96#define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */
97#define TIF_LAZY_MMU_UPDATES 27 /* task is updating the mmu lazily */ 96#define TIF_LAZY_MMU_UPDATES 27 /* task is updating the mmu lazily */
98#define TIF_SYSCALL_TRACEPOINT 28 /* syscall tracepoint instrumentation */ 97#define TIF_SYSCALL_TRACEPOINT 28 /* syscall tracepoint instrumentation */
99 98
@@ -115,8 +114,7 @@ struct thread_info {
115#define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) 114#define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP)
116#define _TIF_FREEZE (1 << TIF_FREEZE) 115#define _TIF_FREEZE (1 << TIF_FREEZE)
117#define _TIF_FORCED_TF (1 << TIF_FORCED_TF) 116#define _TIF_FORCED_TF (1 << TIF_FORCED_TF)
118#define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) 117#define _TIF_BLOCKSTEP (1 << TIF_BLOCKSTEP)
119#define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR)
120#define _TIF_LAZY_MMU_UPDATES (1 << TIF_LAZY_MMU_UPDATES) 118#define _TIF_LAZY_MMU_UPDATES (1 << TIF_LAZY_MMU_UPDATES)
121#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) 119#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
122 120
@@ -147,7 +145,7 @@ struct thread_info {
147 145
148/* flags to check in __switch_to() */ 146/* flags to check in __switch_to() */
149#define _TIF_WORK_CTXSW \ 147#define _TIF_WORK_CTXSW \
150 (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_NOTSC) 148 (_TIF_IO_BITMAP|_TIF_NOTSC|_TIF_BLOCKSTEP)
151 149
152#define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW|_TIF_USER_RETURN_NOTIFY) 150#define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW|_TIF_USER_RETURN_NOTIFY)
153#define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG) 151#define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG)
@@ -244,7 +242,6 @@ static inline struct thread_info *current_thread_info(void)
244#define TS_POLLING 0x0004 /* true if in idle loop 242#define TS_POLLING 0x0004 /* true if in idle loop
245 and not sleeping */ 243 and not sleeping */
246#define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ 244#define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */
247#define TS_XSAVE 0x0010 /* Use xsave/xrstor */
248 245
249#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) 246#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING)
250 247
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 4da91ad69e0d..f66cda56781d 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -79,7 +79,7 @@ static inline int get_si_code(unsigned long condition)
79 79
80extern int panic_on_unrecovered_nmi; 80extern int panic_on_unrecovered_nmi;
81 81
82void math_error(void __user *); 82void math_error(struct pt_regs *, int, int);
83void math_emulate(struct math_emu_info *); 83void math_emulate(struct math_emu_info *);
84#ifndef CONFIG_X86_32 84#ifndef CONFIG_X86_32
85asmlinkage void smp_thermal_interrupt(void); 85asmlinkage void smp_thermal_interrupt(void);
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index b414d2b401f6..aa558ac0306e 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -27,13 +27,14 @@
27 * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on. 27 * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
28 * 28 *
29 * We will use 31 sets, one for sending BAU messages from each of the 32 29 * We will use 31 sets, one for sending BAU messages from each of the 32
30 * cpu's on the node. 30 * cpu's on the uvhub.
31 * 31 *
32 * TLB shootdown will use the first of the 8 descriptors of each set. 32 * TLB shootdown will use the first of the 8 descriptors of each set.
33 * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set). 33 * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
34 */ 34 */
35 35
36#define UV_ITEMS_PER_DESCRIPTOR 8 36#define UV_ITEMS_PER_DESCRIPTOR 8
37#define MAX_BAU_CONCURRENT 3
37#define UV_CPUS_PER_ACT_STATUS 32 38#define UV_CPUS_PER_ACT_STATUS 32
38#define UV_ACT_STATUS_MASK 0x3 39#define UV_ACT_STATUS_MASK 0x3
39#define UV_ACT_STATUS_SIZE 2 40#define UV_ACT_STATUS_SIZE 2
@@ -45,6 +46,9 @@
45#define UV_PAYLOADQ_PNODE_SHIFT 49 46#define UV_PAYLOADQ_PNODE_SHIFT 49
46#define UV_PTC_BASENAME "sgi_uv/ptc_statistics" 47#define UV_PTC_BASENAME "sgi_uv/ptc_statistics"
47#define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask)) 48#define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask))
49#define UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT 15
50#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT 16
51#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
48 52
49/* 53/*
50 * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1 54 * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
@@ -55,15 +59,29 @@
55#define DESC_STATUS_SOURCE_TIMEOUT 3 59#define DESC_STATUS_SOURCE_TIMEOUT 3
56 60
57/* 61/*
58 * source side thresholds at which message retries print a warning 62 * source side threshholds at which message retries print a warning
59 */ 63 */
60#define SOURCE_TIMEOUT_LIMIT 20 64#define SOURCE_TIMEOUT_LIMIT 20
61#define DESTINATION_TIMEOUT_LIMIT 20 65#define DESTINATION_TIMEOUT_LIMIT 20
62 66
63/* 67/*
68 * misc. delays, in microseconds
69 */
70#define THROTTLE_DELAY 10
71#define TIMEOUT_DELAY 10
72#define BIOS_TO 1000
73/* BIOS is assumed to set the destination timeout to 1003520 nanoseconds */
74
75/*
76 * threshholds at which to use IPI to free resources
77 */
78#define PLUGSB4RESET 100
79#define TIMEOUTSB4RESET 100
80
81/*
64 * number of entries in the destination side payload queue 82 * number of entries in the destination side payload queue
65 */ 83 */
66#define DEST_Q_SIZE 17 84#define DEST_Q_SIZE 20
67/* 85/*
68 * number of destination side software ack resources 86 * number of destination side software ack resources
69 */ 87 */
@@ -72,9 +90,10 @@
72/* 90/*
73 * completion statuses for sending a TLB flush message 91 * completion statuses for sending a TLB flush message
74 */ 92 */
75#define FLUSH_RETRY 1 93#define FLUSH_RETRY_PLUGGED 1
76#define FLUSH_GIVEUP 2 94#define FLUSH_RETRY_TIMEOUT 2
77#define FLUSH_COMPLETE 3 95#define FLUSH_GIVEUP 3
96#define FLUSH_COMPLETE 4
78 97
79/* 98/*
80 * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor) 99 * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
@@ -86,14 +105,14 @@
86 * 'base_dest_nodeid' field of the header corresponds to the 105 * 'base_dest_nodeid' field of the header corresponds to the
87 * destination nodeID associated with that specified bit. 106 * destination nodeID associated with that specified bit.
88 */ 107 */
89struct bau_target_nodemask { 108struct bau_target_uvhubmask {
90 unsigned long bits[BITS_TO_LONGS(256)]; 109 unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)];
91}; 110};
92 111
93/* 112/*
94 * mask of cpu's on a node 113 * mask of cpu's on a uvhub
95 * (during initialization we need to check that unsigned long has 114 * (during initialization we need to check that unsigned long has
96 * enough bits for max. cpu's per node) 115 * enough bits for max. cpu's per uvhub)
97 */ 116 */
98struct bau_local_cpumask { 117struct bau_local_cpumask {
99 unsigned long bits; 118 unsigned long bits;
@@ -135,8 +154,8 @@ struct bau_msg_payload {
135struct bau_msg_header { 154struct bau_msg_header {
136 unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ 155 unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
137 /* bits 5:0 */ 156 /* bits 5:0 */
138 unsigned int base_dest_nodeid:15; /* nasid>>1 (pnode) of */ 157 unsigned int base_dest_nodeid:15; /* nasid (pnode<<1) of */
139 /* bits 20:6 */ /* first bit in node_map */ 158 /* bits 20:6 */ /* first bit in uvhub map */
140 unsigned int command:8; /* message type */ 159 unsigned int command:8; /* message type */
141 /* bits 28:21 */ 160 /* bits 28:21 */
142 /* 0x38: SN3net EndPoint Message */ 161 /* 0x38: SN3net EndPoint Message */
@@ -146,26 +165,38 @@ struct bau_msg_header {
146 unsigned int rsvd_2:9; /* must be zero */ 165 unsigned int rsvd_2:9; /* must be zero */
147 /* bits 40:32 */ 166 /* bits 40:32 */
148 /* Suppl_A is 56-41 */ 167 /* Suppl_A is 56-41 */
149 unsigned int payload_2a:8;/* becomes byte 16 of msg */ 168 unsigned int sequence:16;/* message sequence number */
150 /* bits 48:41 */ /* not currently using */ 169 /* bits 56:41 */ /* becomes bytes 16-17 of msg */
151 unsigned int payload_2b:8;/* becomes byte 17 of msg */
152 /* bits 56:49 */ /* not currently using */
153 /* Address field (96:57) is never used as an 170 /* Address field (96:57) is never used as an
154 address (these are address bits 42:3) */ 171 address (these are address bits 42:3) */
172
155 unsigned int rsvd_3:1; /* must be zero */ 173 unsigned int rsvd_3:1; /* must be zero */
156 /* bit 57 */ 174 /* bit 57 */
157 /* address bits 27:4 are payload */ 175 /* address bits 27:4 are payload */
158 /* these 24 bits become bytes 12-14 of msg */ 176 /* these next 24 (58-81) bits become bytes 12-14 of msg */
177
178 /* bits 65:58 land in byte 12 */
159 unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */ 179 unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */
160 /* bit 58 */ 180 /* bit 58 */
161 181 unsigned int msg_type:3; /* software type of the message*/
162 unsigned int payload_1a:5;/* not currently used */ 182 /* bits 61:59 */
163 /* bits 63:59 */ 183 unsigned int canceled:1; /* message canceled, resource to be freed*/
164 unsigned int payload_1b:8;/* not currently used */ 184 /* bit 62 */
165 /* bits 71:64 */ 185 unsigned int payload_1a:1;/* not currently used */
166 unsigned int payload_1c:8;/* not currently used */ 186 /* bit 63 */
167 /* bits 79:72 */ 187 unsigned int payload_1b:2;/* not currently used */
168 unsigned int payload_1d:2;/* not currently used */ 188 /* bits 65:64 */
189
190 /* bits 73:66 land in byte 13 */
191 unsigned int payload_1ca:6;/* not currently used */
192 /* bits 71:66 */
193 unsigned int payload_1c:2;/* not currently used */
194 /* bits 73:72 */
195
196 /* bits 81:74 land in byte 14 */
197 unsigned int payload_1d:6;/* not currently used */
198 /* bits 79:74 */
199 unsigned int payload_1e:2;/* not currently used */
169 /* bits 81:80 */ 200 /* bits 81:80 */
170 201
171 unsigned int rsvd_4:7; /* must be zero */ 202 unsigned int rsvd_4:7; /* must be zero */
@@ -178,7 +209,7 @@ struct bau_msg_header {
178 /* bits 95:90 */ 209 /* bits 95:90 */
179 unsigned int rsvd_6:5; /* must be zero */ 210 unsigned int rsvd_6:5; /* must be zero */
180 /* bits 100:96 */ 211 /* bits 100:96 */
181 unsigned int int_both:1;/* if 1, interrupt both sockets on the blade */ 212 unsigned int int_both:1;/* if 1, interrupt both sockets on the uvhub */
182 /* bit 101*/ 213 /* bit 101*/
183 unsigned int fairness:3;/* usually zero */ 214 unsigned int fairness:3;/* usually zero */
184 /* bits 104:102 */ 215 /* bits 104:102 */
@@ -191,13 +222,18 @@ struct bau_msg_header {
191 /* bits 127:107 */ 222 /* bits 127:107 */
192}; 223};
193 224
225/* see msg_type: */
226#define MSG_NOOP 0
227#define MSG_REGULAR 1
228#define MSG_RETRY 2
229
194/* 230/*
195 * The activation descriptor: 231 * The activation descriptor:
196 * The format of the message to send, plus all accompanying control 232 * The format of the message to send, plus all accompanying control
197 * Should be 64 bytes 233 * Should be 64 bytes
198 */ 234 */
199struct bau_desc { 235struct bau_desc {
200 struct bau_target_nodemask distribution; 236 struct bau_target_uvhubmask distribution;
201 /* 237 /*
202 * message template, consisting of header and payload: 238 * message template, consisting of header and payload:
203 */ 239 */
@@ -237,19 +273,25 @@ struct bau_payload_queue_entry {
237 unsigned short acknowledge_count; /* filled in by destination */ 273 unsigned short acknowledge_count; /* filled in by destination */
238 /* 16 bits, bytes 10-11 */ 274 /* 16 bits, bytes 10-11 */
239 275
240 unsigned short replied_to:1; /* sent as 0 by the source */ 276 /* these next 3 bytes come from bits 58-81 of the message header */
241 /* 1 bit */ 277 unsigned short replied_to:1; /* sent as 0 by the source */
242 unsigned short unused1:7; /* not currently using */ 278 unsigned short msg_type:3; /* software message type */
243 /* 7 bits: byte 12) */ 279 unsigned short canceled:1; /* sent as 0 by the source */
280 unsigned short unused1:3; /* not currently using */
281 /* byte 12 */
244 282
245 unsigned char unused2[2]; /* not currently using */ 283 unsigned char unused2a; /* not currently using */
246 /* bytes 13-14 */ 284 /* byte 13 */
285 unsigned char unused2; /* not currently using */
286 /* byte 14 */
247 287
248 unsigned char sw_ack_vector; /* filled in by the hardware */ 288 unsigned char sw_ack_vector; /* filled in by the hardware */
249 /* byte 15 (bits 127:120) */ 289 /* byte 15 (bits 127:120) */
250 290
251 unsigned char unused4[3]; /* not currently using bytes 17-19 */ 291 unsigned short sequence; /* message sequence number */
252 /* bytes 17-19 */ 292 /* bytes 16-17 */
293 unsigned char unused4[2]; /* not currently using bytes 18-19 */
294 /* bytes 18-19 */
253 295
254 int number_of_cpus; /* filled in at destination */ 296 int number_of_cpus; /* filled in at destination */
255 /* 32 bits, bytes 20-23 (aligned) */ 297 /* 32 bits, bytes 20-23 (aligned) */
@@ -259,63 +301,93 @@ struct bau_payload_queue_entry {
259}; 301};
260 302
261/* 303/*
262 * one for every slot in the destination payload queue 304 * one per-cpu; to locate the software tables
263 */
264struct bau_msg_status {
265 struct bau_local_cpumask seen_by; /* map of cpu's */
266};
267
268/*
269 * one for every slot in the destination software ack resources
270 */
271struct bau_sw_ack_status {
272 struct bau_payload_queue_entry *msg; /* associated message */
273 int watcher; /* cpu monitoring, or -1 */
274};
275
276/*
277 * one on every node and per-cpu; to locate the software tables
278 */ 305 */
279struct bau_control { 306struct bau_control {
280 struct bau_desc *descriptor_base; 307 struct bau_desc *descriptor_base;
281 struct bau_payload_queue_entry *bau_msg_head;
282 struct bau_payload_queue_entry *va_queue_first; 308 struct bau_payload_queue_entry *va_queue_first;
283 struct bau_payload_queue_entry *va_queue_last; 309 struct bau_payload_queue_entry *va_queue_last;
284 struct bau_msg_status *msg_statuses; 310 struct bau_payload_queue_entry *bau_msg_head;
285 int *watching; /* pointer to array */ 311 struct bau_control *uvhub_master;
312 struct bau_control *socket_master;
313 unsigned long timeout_interval;
314 atomic_t active_descriptor_count;
315 int max_concurrent;
316 int max_concurrent_constant;
317 int retry_message_scans;
318 int plugged_tries;
319 int timeout_tries;
320 int ipi_attempts;
321 int conseccompletes;
322 short cpu;
323 short uvhub_cpu;
324 short uvhub;
325 short cpus_in_socket;
326 short cpus_in_uvhub;
327 unsigned short message_number;
328 unsigned short uvhub_quiesce;
329 short socket_acknowledge_count[DEST_Q_SIZE];
330 cycles_t send_message;
331 spinlock_t masks_lock;
332 spinlock_t uvhub_lock;
333 spinlock_t queue_lock;
286}; 334};
287 335
288/* 336/*
289 * This structure is allocated per_cpu for UV TLB shootdown statistics. 337 * This structure is allocated per_cpu for UV TLB shootdown statistics.
290 */ 338 */
291struct ptc_stats { 339struct ptc_stats {
292 unsigned long ptc_i; /* number of IPI-style flushes */ 340 /* sender statistics */
293 unsigned long requestor; /* number of nodes this cpu sent to */ 341 unsigned long s_giveup; /* number of fall backs to IPI-style flushes */
294 unsigned long requestee; /* times cpu was remotely requested */ 342 unsigned long s_requestor; /* number of shootdown requests */
295 unsigned long alltlb; /* times all tlb's on this cpu were flushed */ 343 unsigned long s_stimeout; /* source side timeouts */
296 unsigned long onetlb; /* times just one tlb on this cpu was flushed */ 344 unsigned long s_dtimeout; /* destination side timeouts */
297 unsigned long s_retry; /* retries on source side timeouts */ 345 unsigned long s_time; /* time spent in sending side */
298 unsigned long d_retry; /* retries on destination side timeouts */ 346 unsigned long s_retriesok; /* successful retries */
299 unsigned long sflush; /* cycles spent in uv_flush_tlb_others */ 347 unsigned long s_ntargcpu; /* number of cpus targeted */
300 unsigned long dflush; /* cycles spent on destination side */ 348 unsigned long s_ntarguvhub; /* number of uvhubs targeted */
301 unsigned long retriesok; /* successes on retries */ 349 unsigned long s_ntarguvhub16; /* number of times >= 16 target hubs */
302 unsigned long nomsg; /* interrupts with no message */ 350 unsigned long s_ntarguvhub8; /* number of times >= 8 target hubs */
303 unsigned long multmsg; /* interrupts with multiple messages */ 351 unsigned long s_ntarguvhub4; /* number of times >= 4 target hubs */
304 unsigned long ntargeted;/* nodes targeted */ 352 unsigned long s_ntarguvhub2; /* number of times >= 2 target hubs */
353 unsigned long s_ntarguvhub1; /* number of times == 1 target hub */
354 unsigned long s_resets_plug; /* ipi-style resets from plug state */
355 unsigned long s_resets_timeout; /* ipi-style resets from timeouts */
356 unsigned long s_busy; /* status stayed busy past s/w timer */
357 unsigned long s_throttles; /* waits in throttle */
358 unsigned long s_retry_messages; /* retry broadcasts */
359 /* destination statistics */
360 unsigned long d_alltlb; /* times all tlb's on this cpu were flushed */
361 unsigned long d_onetlb; /* times just one tlb on this cpu was flushed */
362 unsigned long d_multmsg; /* interrupts with multiple messages */
363 unsigned long d_nomsg; /* interrupts with no message */
364 unsigned long d_time; /* time spent on destination side */
365 unsigned long d_requestee; /* number of messages processed */
366 unsigned long d_retries; /* number of retry messages processed */
367 unsigned long d_canceled; /* number of messages canceled by retries */
368 unsigned long d_nocanceled; /* retries that found nothing to cancel */
369 unsigned long d_resets; /* number of ipi-style requests processed */
370 unsigned long d_rcanceled; /* number of messages canceled by resets */
305}; 371};
306 372
307static inline int bau_node_isset(int node, struct bau_target_nodemask *dstp) 373static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp)
308{ 374{
309 return constant_test_bit(node, &dstp->bits[0]); 375 return constant_test_bit(uvhub, &dstp->bits[0]);
310} 376}
311static inline void bau_node_set(int node, struct bau_target_nodemask *dstp) 377static inline void bau_uvhub_set(int uvhub, struct bau_target_uvhubmask *dstp)
312{ 378{
313 __set_bit(node, &dstp->bits[0]); 379 __set_bit(uvhub, &dstp->bits[0]);
314} 380}
315static inline void bau_nodes_clear(struct bau_target_nodemask *dstp, int nbits) 381static inline void bau_uvhubs_clear(struct bau_target_uvhubmask *dstp,
382 int nbits)
316{ 383{
317 bitmap_zero(&dstp->bits[0], nbits); 384 bitmap_zero(&dstp->bits[0], nbits);
318} 385}
386static inline int bau_uvhub_weight(struct bau_target_uvhubmask *dstp)
387{
388 return bitmap_weight((unsigned long *)&dstp->bits[0],
389 UV_DISTRIBUTION_SIZE);
390}
319 391
320static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits) 392static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
321{ 393{
@@ -328,4 +400,35 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
328extern void uv_bau_message_intr1(void); 400extern void uv_bau_message_intr1(void);
329extern void uv_bau_timeout_intr1(void); 401extern void uv_bau_timeout_intr1(void);
330 402
403struct atomic_short {
404 short counter;
405};
406
407/**
408 * atomic_read_short - read a short atomic variable
409 * @v: pointer of type atomic_short
410 *
411 * Atomically reads the value of @v.
412 */
413static inline int atomic_read_short(const struct atomic_short *v)
414{
415 return v->counter;
416}
417
418/**
419 * atomic_add_short_return - add and return a short int
420 * @i: short value to add
421 * @v: pointer of type atomic_short
422 *
423 * Atomically adds @i to @v and returns @i + @v
424 */
425static inline int atomic_add_short_return(short i, struct atomic_short *v)
426{
427 short __i = i;
428 asm volatile(LOCK_PREFIX "xaddw %0, %1"
429 : "+r" (i), "+m" (v->counter)
430 : : "memory");
431 return i + __i;
432}
433
331#endif /* _ASM_X86_UV_UV_BAU_H */ 434#endif /* _ASM_X86_UV_UV_BAU_H */
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 14cc74ba5d23..bf6b88ef8eeb 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -307,7 +307,7 @@ static inline unsigned long uv_read_global_mmr32(int pnode, unsigned long offset
307 * Access Global MMR space using the MMR space located at the top of physical 307 * Access Global MMR space using the MMR space located at the top of physical
308 * memory. 308 * memory.
309 */ 309 */
310static inline unsigned long *uv_global_mmr64_address(int pnode, unsigned long offset) 310static inline volatile void __iomem *uv_global_mmr64_address(int pnode, unsigned long offset)
311{ 311{
312 return __va(UV_GLOBAL_MMR64_BASE | 312 return __va(UV_GLOBAL_MMR64_BASE |
313 UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset); 313 UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset);
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index 2cae46c7c8a2..b2f2d2e05cec 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -1,4 +1,3 @@
1
2/* 1/*
3 * This file is subject to the terms and conditions of the GNU General Public 2 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
@@ -15,13 +14,25 @@
15#define UV_MMR_ENABLE (1UL << 63) 14#define UV_MMR_ENABLE (1UL << 63)
16 15
17/* ========================================================================= */ 16/* ========================================================================= */
17/* UVH_BAU_DATA_BROADCAST */
18/* ========================================================================= */
19#define UVH_BAU_DATA_BROADCAST 0x61688UL
20#define UVH_BAU_DATA_BROADCAST_32 0x0440
21
22#define UVH_BAU_DATA_BROADCAST_ENABLE_SHFT 0
23#define UVH_BAU_DATA_BROADCAST_ENABLE_MASK 0x0000000000000001UL
24
25union uvh_bau_data_broadcast_u {
26 unsigned long v;
27 struct uvh_bau_data_broadcast_s {
28 unsigned long enable : 1; /* RW */
29 unsigned long rsvd_1_63: 63; /* */
30 } s;
31};
32
33/* ========================================================================= */
18/* UVH_BAU_DATA_CONFIG */ 34/* UVH_BAU_DATA_CONFIG */
19/* ========================================================================= */ 35/* ========================================================================= */
20#define UVH_LB_BAU_MISC_CONTROL 0x320170UL
21#define UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT 15
22#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT 16
23#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
24/* 1011 timebase 7 (168millisec) * 3 ticks -> 500ms */
25#define UVH_BAU_DATA_CONFIG 0x61680UL 36#define UVH_BAU_DATA_CONFIG 0x61680UL
26#define UVH_BAU_DATA_CONFIG_32 0x0438 37#define UVH_BAU_DATA_CONFIG_32 0x0438
27 38
@@ -604,6 +615,68 @@ union uvh_lb_bau_intd_software_acknowledge_u {
604#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS_32 0x0a70 615#define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS_32 0x0a70
605 616
606/* ========================================================================= */ 617/* ========================================================================= */
618/* UVH_LB_BAU_MISC_CONTROL */
619/* ========================================================================= */
620#define UVH_LB_BAU_MISC_CONTROL 0x320170UL
621#define UVH_LB_BAU_MISC_CONTROL_32 0x00a10
622
623#define UVH_LB_BAU_MISC_CONTROL_REJECTION_DELAY_SHFT 0
624#define UVH_LB_BAU_MISC_CONTROL_REJECTION_DELAY_MASK 0x00000000000000ffUL
625#define UVH_LB_BAU_MISC_CONTROL_APIC_MODE_SHFT 8
626#define UVH_LB_BAU_MISC_CONTROL_APIC_MODE_MASK 0x0000000000000100UL
627#define UVH_LB_BAU_MISC_CONTROL_FORCE_BROADCAST_SHFT 9
628#define UVH_LB_BAU_MISC_CONTROL_FORCE_BROADCAST_MASK 0x0000000000000200UL
629#define UVH_LB_BAU_MISC_CONTROL_FORCE_LOCK_NOP_SHFT 10
630#define UVH_LB_BAU_MISC_CONTROL_FORCE_LOCK_NOP_MASK 0x0000000000000400UL
631#define UVH_LB_BAU_MISC_CONTROL_CSI_AGENT_PRESENCE_VECTOR_SHFT 11
632#define UVH_LB_BAU_MISC_CONTROL_CSI_AGENT_PRESENCE_VECTOR_MASK 0x0000000000003800UL
633#define UVH_LB_BAU_MISC_CONTROL_DESCRIPTOR_FETCH_MODE_SHFT 14
634#define UVH_LB_BAU_MISC_CONTROL_DESCRIPTOR_FETCH_MODE_MASK 0x0000000000004000UL
635#define UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT 15
636#define UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_MASK 0x0000000000008000UL
637#define UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT 16
638#define UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_MASK 0x00000000000f0000UL
639#define UVH_LB_BAU_MISC_CONTROL_ENABLE_DUAL_MAPPING_MODE_SHFT 20
640#define UVH_LB_BAU_MISC_CONTROL_ENABLE_DUAL_MAPPING_MODE_MASK 0x0000000000100000UL
641#define UVH_LB_BAU_MISC_CONTROL_VGA_IO_PORT_DECODE_ENABLE_SHFT 21
642#define UVH_LB_BAU_MISC_CONTROL_VGA_IO_PORT_DECODE_ENABLE_MASK 0x0000000000200000UL
643#define UVH_LB_BAU_MISC_CONTROL_VGA_IO_PORT_16_BIT_DECODE_SHFT 22
644#define UVH_LB_BAU_MISC_CONTROL_VGA_IO_PORT_16_BIT_DECODE_MASK 0x0000000000400000UL
645#define UVH_LB_BAU_MISC_CONTROL_SUPPRESS_DEST_REGISTRATION_SHFT 23
646#define UVH_LB_BAU_MISC_CONTROL_SUPPRESS_DEST_REGISTRATION_MASK 0x0000000000800000UL
647#define UVH_LB_BAU_MISC_CONTROL_PROGRAMMED_INITIAL_PRIORITY_SHFT 24
648#define UVH_LB_BAU_MISC_CONTROL_PROGRAMMED_INITIAL_PRIORITY_MASK 0x0000000007000000UL
649#define UVH_LB_BAU_MISC_CONTROL_USE_INCOMING_PRIORITY_SHFT 27
650#define UVH_LB_BAU_MISC_CONTROL_USE_INCOMING_PRIORITY_MASK 0x0000000008000000UL
651#define UVH_LB_BAU_MISC_CONTROL_ENABLE_PROGRAMMED_INITIAL_PRIORITY_SHFT 28
652#define UVH_LB_BAU_MISC_CONTROL_ENABLE_PROGRAMMED_INITIAL_PRIORITY_MASK 0x0000000010000000UL
653#define UVH_LB_BAU_MISC_CONTROL_FUN_SHFT 48
654#define UVH_LB_BAU_MISC_CONTROL_FUN_MASK 0xffff000000000000UL
655
656union uvh_lb_bau_misc_control_u {
657 unsigned long v;
658 struct uvh_lb_bau_misc_control_s {
659 unsigned long rejection_delay : 8; /* RW */
660 unsigned long apic_mode : 1; /* RW */
661 unsigned long force_broadcast : 1; /* RW */
662 unsigned long force_lock_nop : 1; /* RW */
663 unsigned long csi_agent_presence_vector : 3; /* RW */
664 unsigned long descriptor_fetch_mode : 1; /* RW */
665 unsigned long enable_intd_soft_ack_mode : 1; /* RW */
666 unsigned long intd_soft_ack_timeout_period : 4; /* RW */
667 unsigned long enable_dual_mapping_mode : 1; /* RW */
668 unsigned long vga_io_port_decode_enable : 1; /* RW */
669 unsigned long vga_io_port_16_bit_decode : 1; /* RW */
670 unsigned long suppress_dest_registration : 1; /* RW */
671 unsigned long programmed_initial_priority : 3; /* RW */
672 unsigned long use_incoming_priority : 1; /* RW */
673 unsigned long enable_programmed_initial_priority : 1; /* RW */
674 unsigned long rsvd_29_47 : 19; /* */
675 unsigned long fun : 16; /* RW */
676 } s;
677};
678
679/* ========================================================================= */
607/* UVH_LB_BAU_SB_ACTIVATION_CONTROL */ 680/* UVH_LB_BAU_SB_ACTIVATION_CONTROL */
608/* ========================================================================= */ 681/* ========================================================================= */
609#define UVH_LB_BAU_SB_ACTIVATION_CONTROL 0x320020UL 682#define UVH_LB_BAU_SB_ACTIVATION_CONTROL 0x320020UL
@@ -681,334 +754,6 @@ union uvh_lb_bau_sb_descriptor_base_u {
681}; 754};
682 755
683/* ========================================================================= */ 756/* ========================================================================= */
684/* UVH_LB_MCAST_AOERR0_RPT_ENABLE */
685/* ========================================================================= */
686#define UVH_LB_MCAST_AOERR0_RPT_ENABLE 0x50b20UL
687
688#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_OBESE_MSG_SHFT 0
689#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_OBESE_MSG_MASK 0x0000000000000001UL
690#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_DATA_SB_ERR_SHFT 1
691#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_DATA_SB_ERR_MASK 0x0000000000000002UL
692#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_NACK_BUFF_PARITY_SHFT 2
693#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_NACK_BUFF_PARITY_MASK 0x0000000000000004UL
694#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_TIMEOUT_SHFT 3
695#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_TIMEOUT_MASK 0x0000000000000008UL
696#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_INACTIVE_REPLY_SHFT 4
697#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_INACTIVE_REPLY_MASK 0x0000000000000010UL
698#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_UPGRADE_ERROR_SHFT 5
699#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_UPGRADE_ERROR_MASK 0x0000000000000020UL
700#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REG_COUNT_UNDERFLOW_SHFT 6
701#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REG_COUNT_UNDERFLOW_MASK 0x0000000000000040UL
702#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REP_OBESE_MSG_SHFT 7
703#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REP_OBESE_MSG_MASK 0x0000000000000080UL
704#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_RUNT_MSG_SHFT 8
705#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_RUNT_MSG_MASK 0x0000000000000100UL
706#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_OBESE_MSG_SHFT 9
707#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_OBESE_MSG_MASK 0x0000000000000200UL
708#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_DATA_SB_ERR_SHFT 10
709#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_DATA_SB_ERR_MASK 0x0000000000000400UL
710#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_RUNT_MSG_SHFT 11
711#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_RUNT_MSG_MASK 0x0000000000000800UL
712#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_OBESE_MSG_SHFT 12
713#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_OBESE_MSG_MASK 0x0000000000001000UL
714#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_DATA_SB_ERR_SHFT 13
715#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_DATA_SB_ERR_MASK 0x0000000000002000UL
716#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_COMMAND_ERR_SHFT 14
717#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_COMMAND_ERR_MASK 0x0000000000004000UL
718#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_PEND_TIMEOUT_SHFT 15
719#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_PEND_TIMEOUT_MASK 0x0000000000008000UL
720#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_RUNT_MSG_SHFT 16
721#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_RUNT_MSG_MASK 0x0000000000010000UL
722#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_OBESE_MSG_SHFT 17
723#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_OBESE_MSG_MASK 0x0000000000020000UL
724#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_DATA_SB_ERR_SHFT 18
725#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_DATA_SB_ERR_MASK 0x0000000000040000UL
726#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_RUNT_MSG_SHFT 19
727#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_RUNT_MSG_MASK 0x0000000000080000UL
728#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_OBESE_MSG_SHFT 20
729#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_OBESE_MSG_MASK 0x0000000000100000UL
730#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_DATA_SB_ERR_SHFT 21
731#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_DATA_SB_ERR_MASK 0x0000000000200000UL
732#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_AMO_TIMEOUT_SHFT 22
733#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_AMO_TIMEOUT_MASK 0x0000000000400000UL
734#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_PUT_TIMEOUT_SHFT 23
735#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_PUT_TIMEOUT_MASK 0x0000000000800000UL
736#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_SPURIOUS_EVENT_SHFT 24
737#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_SPURIOUS_EVENT_MASK 0x0000000001000000UL
738#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IOH_DESTINATION_TABLE_PARITY_SHFT 25
739#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IOH_DESTINATION_TABLE_PARITY_MASK 0x0000000002000000UL
740#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_HAD_ERROR_REPLY_SHFT 26
741#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_HAD_ERROR_REPLY_MASK 0x0000000004000000UL
742#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_TIMEOUT_SHFT 27
743#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_TIMEOUT_MASK 0x0000000008000000UL
744#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_LOCK_MANAGER_HAD_ERROR_REPLY_SHFT 28
745#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_LOCK_MANAGER_HAD_ERROR_REPLY_MASK 0x0000000010000000UL
746#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_HAD_ERROR_REPLY_SHFT 29
747#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_HAD_ERROR_REPLY_MASK 0x0000000020000000UL
748#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_TIMEOUT_SHFT 30
749#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_TIMEOUT_MASK 0x0000000040000000UL
750#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SB_ACTIVATION_OVERRUN_SHFT 31
751#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SB_ACTIVATION_OVERRUN_MASK 0x0000000080000000UL
752#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_HAD_ERROR_REPLY_SHFT 32
753#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_HAD_ERROR_REPLY_MASK 0x0000000100000000UL
754#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_TIMEOUT_SHFT 33
755#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_TIMEOUT_MASK 0x0000000200000000UL
756#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_0_PARITY_SHFT 34
757#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_0_PARITY_MASK 0x0000000400000000UL
758#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_1_PARITY_SHFT 35
759#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_1_PARITY_MASK 0x0000000800000000UL
760#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SOCKET_DESTINATION_TABLE_PARITY_SHFT 36
761#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SOCKET_DESTINATION_TABLE_PARITY_MASK 0x0000001000000000UL
762#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_BAU_REPLY_PAYLOAD_CORRUPTION_SHFT 37
763#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_BAU_REPLY_PAYLOAD_CORRUPTION_MASK 0x0000002000000000UL
764#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IO_PORT_DESTINATION_TABLE_PARITY_SHFT 38
765#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IO_PORT_DESTINATION_TABLE_PARITY_MASK 0x0000004000000000UL
766#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INTD_SOFT_ACK_TIMEOUT_SHFT 39
767#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INTD_SOFT_ACK_TIMEOUT_MASK 0x0000008000000000UL
768#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_OBESE_MSG_SHFT 40
769#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_OBESE_MSG_MASK 0x0000010000000000UL
770#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_COMMAND_ERR_SHFT 41
771#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_COMMAND_ERR_MASK 0x0000020000000000UL
772#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_TIMEOUT_SHFT 42
773#define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_TIMEOUT_MASK 0x0000040000000000UL
774
775union uvh_lb_mcast_aoerr0_rpt_enable_u {
776 unsigned long v;
777 struct uvh_lb_mcast_aoerr0_rpt_enable_s {
778 unsigned long mcast_obese_msg : 1; /* RW */
779 unsigned long mcast_data_sb_err : 1; /* RW */
780 unsigned long mcast_nack_buff_parity : 1; /* RW */
781 unsigned long mcast_timeout : 1; /* RW */
782 unsigned long mcast_inactive_reply : 1; /* RW */
783 unsigned long mcast_upgrade_error : 1; /* RW */
784 unsigned long mcast_reg_count_underflow : 1; /* RW */
785 unsigned long mcast_rep_obese_msg : 1; /* RW */
786 unsigned long ucache_req_runt_msg : 1; /* RW */
787 unsigned long ucache_req_obese_msg : 1; /* RW */
788 unsigned long ucache_req_data_sb_err : 1; /* RW */
789 unsigned long ucache_rep_runt_msg : 1; /* RW */
790 unsigned long ucache_rep_obese_msg : 1; /* RW */
791 unsigned long ucache_rep_data_sb_err : 1; /* RW */
792 unsigned long ucache_rep_command_err : 1; /* RW */
793 unsigned long ucache_pend_timeout : 1; /* RW */
794 unsigned long macc_req_runt_msg : 1; /* RW */
795 unsigned long macc_req_obese_msg : 1; /* RW */
796 unsigned long macc_req_data_sb_err : 1; /* RW */
797 unsigned long macc_rep_runt_msg : 1; /* RW */
798 unsigned long macc_rep_obese_msg : 1; /* RW */
799 unsigned long macc_rep_data_sb_err : 1; /* RW */
800 unsigned long macc_amo_timeout : 1; /* RW */
801 unsigned long macc_put_timeout : 1; /* RW */
802 unsigned long macc_spurious_event : 1; /* RW */
803 unsigned long ioh_destination_table_parity : 1; /* RW */
804 unsigned long get_had_error_reply : 1; /* RW */
805 unsigned long get_timeout : 1; /* RW */
806 unsigned long lock_manager_had_error_reply : 1; /* RW */
807 unsigned long put_had_error_reply : 1; /* RW */
808 unsigned long put_timeout : 1; /* RW */
809 unsigned long sb_activation_overrun : 1; /* RW */
810 unsigned long completed_gb_activation_had_error_reply : 1; /* RW */
811 unsigned long completed_gb_activation_timeout : 1; /* RW */
812 unsigned long descriptor_buffer_0_parity : 1; /* RW */
813 unsigned long descriptor_buffer_1_parity : 1; /* RW */
814 unsigned long socket_destination_table_parity : 1; /* RW */
815 unsigned long bau_reply_payload_corruption : 1; /* RW */
816 unsigned long io_port_destination_table_parity : 1; /* RW */
817 unsigned long intd_soft_ack_timeout : 1; /* RW */
818 unsigned long int_rep_obese_msg : 1; /* RW */
819 unsigned long int_rep_command_err : 1; /* RW */
820 unsigned long int_timeout : 1; /* RW */
821 unsigned long rsvd_43_63 : 21; /* */
822 } s;
823};
824
825/* ========================================================================= */
826/* UVH_LOCAL_INT0_CONFIG */
827/* ========================================================================= */
828#define UVH_LOCAL_INT0_CONFIG 0x61000UL
829
830#define UVH_LOCAL_INT0_CONFIG_VECTOR_SHFT 0
831#define UVH_LOCAL_INT0_CONFIG_VECTOR_MASK 0x00000000000000ffUL
832#define UVH_LOCAL_INT0_CONFIG_DM_SHFT 8
833#define UVH_LOCAL_INT0_CONFIG_DM_MASK 0x0000000000000700UL
834#define UVH_LOCAL_INT0_CONFIG_DESTMODE_SHFT 11
835#define UVH_LOCAL_INT0_CONFIG_DESTMODE_MASK 0x0000000000000800UL
836#define UVH_LOCAL_INT0_CONFIG_STATUS_SHFT 12
837#define UVH_LOCAL_INT0_CONFIG_STATUS_MASK 0x0000000000001000UL
838#define UVH_LOCAL_INT0_CONFIG_P_SHFT 13
839#define UVH_LOCAL_INT0_CONFIG_P_MASK 0x0000000000002000UL
840#define UVH_LOCAL_INT0_CONFIG_T_SHFT 15
841#define UVH_LOCAL_INT0_CONFIG_T_MASK 0x0000000000008000UL
842#define UVH_LOCAL_INT0_CONFIG_M_SHFT 16
843#define UVH_LOCAL_INT0_CONFIG_M_MASK 0x0000000000010000UL
844#define UVH_LOCAL_INT0_CONFIG_APIC_ID_SHFT 32
845#define UVH_LOCAL_INT0_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
846
847union uvh_local_int0_config_u {
848 unsigned long v;
849 struct uvh_local_int0_config_s {
850 unsigned long vector_ : 8; /* RW */
851 unsigned long dm : 3; /* RW */
852 unsigned long destmode : 1; /* RW */
853 unsigned long status : 1; /* RO */
854 unsigned long p : 1; /* RO */
855 unsigned long rsvd_14 : 1; /* */
856 unsigned long t : 1; /* RO */
857 unsigned long m : 1; /* RW */
858 unsigned long rsvd_17_31: 15; /* */
859 unsigned long apic_id : 32; /* RW */
860 } s;
861};
862
863/* ========================================================================= */
864/* UVH_LOCAL_INT0_ENABLE */
865/* ========================================================================= */
866#define UVH_LOCAL_INT0_ENABLE 0x65000UL
867
868#define UVH_LOCAL_INT0_ENABLE_LB_HCERR_SHFT 0
869#define UVH_LOCAL_INT0_ENABLE_LB_HCERR_MASK 0x0000000000000001UL
870#define UVH_LOCAL_INT0_ENABLE_GR0_HCERR_SHFT 1
871#define UVH_LOCAL_INT0_ENABLE_GR0_HCERR_MASK 0x0000000000000002UL
872#define UVH_LOCAL_INT0_ENABLE_GR1_HCERR_SHFT 2
873#define UVH_LOCAL_INT0_ENABLE_GR1_HCERR_MASK 0x0000000000000004UL
874#define UVH_LOCAL_INT0_ENABLE_LH_HCERR_SHFT 3
875#define UVH_LOCAL_INT0_ENABLE_LH_HCERR_MASK 0x0000000000000008UL
876#define UVH_LOCAL_INT0_ENABLE_RH_HCERR_SHFT 4
877#define UVH_LOCAL_INT0_ENABLE_RH_HCERR_MASK 0x0000000000000010UL
878#define UVH_LOCAL_INT0_ENABLE_XN_HCERR_SHFT 5
879#define UVH_LOCAL_INT0_ENABLE_XN_HCERR_MASK 0x0000000000000020UL
880#define UVH_LOCAL_INT0_ENABLE_SI_HCERR_SHFT 6
881#define UVH_LOCAL_INT0_ENABLE_SI_HCERR_MASK 0x0000000000000040UL
882#define UVH_LOCAL_INT0_ENABLE_LB_AOERR0_SHFT 7
883#define UVH_LOCAL_INT0_ENABLE_LB_AOERR0_MASK 0x0000000000000080UL
884#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR0_SHFT 8
885#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR0_MASK 0x0000000000000100UL
886#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR0_SHFT 9
887#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR0_MASK 0x0000000000000200UL
888#define UVH_LOCAL_INT0_ENABLE_LH_AOERR0_SHFT 10
889#define UVH_LOCAL_INT0_ENABLE_LH_AOERR0_MASK 0x0000000000000400UL
890#define UVH_LOCAL_INT0_ENABLE_RH_AOERR0_SHFT 11
891#define UVH_LOCAL_INT0_ENABLE_RH_AOERR0_MASK 0x0000000000000800UL
892#define UVH_LOCAL_INT0_ENABLE_XN_AOERR0_SHFT 12
893#define UVH_LOCAL_INT0_ENABLE_XN_AOERR0_MASK 0x0000000000001000UL
894#define UVH_LOCAL_INT0_ENABLE_SI_AOERR0_SHFT 13
895#define UVH_LOCAL_INT0_ENABLE_SI_AOERR0_MASK 0x0000000000002000UL
896#define UVH_LOCAL_INT0_ENABLE_LB_AOERR1_SHFT 14
897#define UVH_LOCAL_INT0_ENABLE_LB_AOERR1_MASK 0x0000000000004000UL
898#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR1_SHFT 15
899#define UVH_LOCAL_INT0_ENABLE_GR0_AOERR1_MASK 0x0000000000008000UL
900#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR1_SHFT 16
901#define UVH_LOCAL_INT0_ENABLE_GR1_AOERR1_MASK 0x0000000000010000UL
902#define UVH_LOCAL_INT0_ENABLE_LH_AOERR1_SHFT 17
903#define UVH_LOCAL_INT0_ENABLE_LH_AOERR1_MASK 0x0000000000020000UL
904#define UVH_LOCAL_INT0_ENABLE_RH_AOERR1_SHFT 18
905#define UVH_LOCAL_INT0_ENABLE_RH_AOERR1_MASK 0x0000000000040000UL
906#define UVH_LOCAL_INT0_ENABLE_XN_AOERR1_SHFT 19
907#define UVH_LOCAL_INT0_ENABLE_XN_AOERR1_MASK 0x0000000000080000UL
908#define UVH_LOCAL_INT0_ENABLE_SI_AOERR1_SHFT 20
909#define UVH_LOCAL_INT0_ENABLE_SI_AOERR1_MASK 0x0000000000100000UL
910#define UVH_LOCAL_INT0_ENABLE_RH_VPI_INT_SHFT 21
911#define UVH_LOCAL_INT0_ENABLE_RH_VPI_INT_MASK 0x0000000000200000UL
912#define UVH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 22
913#define UVH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000400000UL
914#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_0_SHFT 23
915#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_0_MASK 0x0000000000800000UL
916#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_1_SHFT 24
917#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_1_MASK 0x0000000001000000UL
918#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_2_SHFT 25
919#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_2_MASK 0x0000000002000000UL
920#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_3_SHFT 26
921#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_3_MASK 0x0000000004000000UL
922#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_4_SHFT 27
923#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_4_MASK 0x0000000008000000UL
924#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_5_SHFT 28
925#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_5_MASK 0x0000000010000000UL
926#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_6_SHFT 29
927#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_6_MASK 0x0000000020000000UL
928#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_7_SHFT 30
929#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_7_MASK 0x0000000040000000UL
930#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_8_SHFT 31
931#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_8_MASK 0x0000000080000000UL
932#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_9_SHFT 32
933#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_9_MASK 0x0000000100000000UL
934#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_10_SHFT 33
935#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_10_MASK 0x0000000200000000UL
936#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_11_SHFT 34
937#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_11_MASK 0x0000000400000000UL
938#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_12_SHFT 35
939#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_12_MASK 0x0000000800000000UL
940#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_13_SHFT 36
941#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_13_MASK 0x0000001000000000UL
942#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_14_SHFT 37
943#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_14_MASK 0x0000002000000000UL
944#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_15_SHFT 38
945#define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_15_MASK 0x0000004000000000UL
946#define UVH_LOCAL_INT0_ENABLE_L1_NMI_INT_SHFT 39
947#define UVH_LOCAL_INT0_ENABLE_L1_NMI_INT_MASK 0x0000008000000000UL
948#define UVH_LOCAL_INT0_ENABLE_STOP_CLOCK_SHFT 40
949#define UVH_LOCAL_INT0_ENABLE_STOP_CLOCK_MASK 0x0000010000000000UL
950#define UVH_LOCAL_INT0_ENABLE_ASIC_TO_L1_SHFT 41
951#define UVH_LOCAL_INT0_ENABLE_ASIC_TO_L1_MASK 0x0000020000000000UL
952#define UVH_LOCAL_INT0_ENABLE_L1_TO_ASIC_SHFT 42
953#define UVH_LOCAL_INT0_ENABLE_L1_TO_ASIC_MASK 0x0000040000000000UL
954#define UVH_LOCAL_INT0_ENABLE_LTC_INT_SHFT 43
955#define UVH_LOCAL_INT0_ENABLE_LTC_INT_MASK 0x0000080000000000UL
956#define UVH_LOCAL_INT0_ENABLE_LA_SEQ_TRIGGER_SHFT 44
957#define UVH_LOCAL_INT0_ENABLE_LA_SEQ_TRIGGER_MASK 0x0000100000000000UL
958
959union uvh_local_int0_enable_u {
960 unsigned long v;
961 struct uvh_local_int0_enable_s {
962 unsigned long lb_hcerr : 1; /* RW */
963 unsigned long gr0_hcerr : 1; /* RW */
964 unsigned long gr1_hcerr : 1; /* RW */
965 unsigned long lh_hcerr : 1; /* RW */
966 unsigned long rh_hcerr : 1; /* RW */
967 unsigned long xn_hcerr : 1; /* RW */
968 unsigned long si_hcerr : 1; /* RW */
969 unsigned long lb_aoerr0 : 1; /* RW */
970 unsigned long gr0_aoerr0 : 1; /* RW */
971 unsigned long gr1_aoerr0 : 1; /* RW */
972 unsigned long lh_aoerr0 : 1; /* RW */
973 unsigned long rh_aoerr0 : 1; /* RW */
974 unsigned long xn_aoerr0 : 1; /* RW */
975 unsigned long si_aoerr0 : 1; /* RW */
976 unsigned long lb_aoerr1 : 1; /* RW */
977 unsigned long gr0_aoerr1 : 1; /* RW */
978 unsigned long gr1_aoerr1 : 1; /* RW */
979 unsigned long lh_aoerr1 : 1; /* RW */
980 unsigned long rh_aoerr1 : 1; /* RW */
981 unsigned long xn_aoerr1 : 1; /* RW */
982 unsigned long si_aoerr1 : 1; /* RW */
983 unsigned long rh_vpi_int : 1; /* RW */
984 unsigned long system_shutdown_int : 1; /* RW */
985 unsigned long lb_irq_int_0 : 1; /* RW */
986 unsigned long lb_irq_int_1 : 1; /* RW */
987 unsigned long lb_irq_int_2 : 1; /* RW */
988 unsigned long lb_irq_int_3 : 1; /* RW */
989 unsigned long lb_irq_int_4 : 1; /* RW */
990 unsigned long lb_irq_int_5 : 1; /* RW */
991 unsigned long lb_irq_int_6 : 1; /* RW */
992 unsigned long lb_irq_int_7 : 1; /* RW */
993 unsigned long lb_irq_int_8 : 1; /* RW */
994 unsigned long lb_irq_int_9 : 1; /* RW */
995 unsigned long lb_irq_int_10 : 1; /* RW */
996 unsigned long lb_irq_int_11 : 1; /* RW */
997 unsigned long lb_irq_int_12 : 1; /* RW */
998 unsigned long lb_irq_int_13 : 1; /* RW */
999 unsigned long lb_irq_int_14 : 1; /* RW */
1000 unsigned long lb_irq_int_15 : 1; /* RW */
1001 unsigned long l1_nmi_int : 1; /* RW */
1002 unsigned long stop_clock : 1; /* RW */
1003 unsigned long asic_to_l1 : 1; /* RW */
1004 unsigned long l1_to_asic : 1; /* RW */
1005 unsigned long ltc_int : 1; /* RW */
1006 unsigned long la_seq_trigger : 1; /* RW */
1007 unsigned long rsvd_45_63 : 19; /* */
1008 } s;
1009};
1010
1011/* ========================================================================= */
1012/* UVH_NODE_ID */ 757/* UVH_NODE_ID */
1013/* ========================================================================= */ 758/* ========================================================================= */
1014#define UVH_NODE_ID 0x0UL 759#define UVH_NODE_ID 0x0UL
@@ -1112,26 +857,6 @@ union uvh_rh_gam_alias210_redirect_config_2_mmr_u {
1112}; 857};
1113 858
1114/* ========================================================================= */ 859/* ========================================================================= */
1115/* UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR */
1116/* ========================================================================= */
1117#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR 0x1600020UL
1118
1119#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_BASE_SHFT 26
1120#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffffc000000UL
1121#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
1122#define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL
1123
1124union uvh_rh_gam_cfg_overlay_config_mmr_u {
1125 unsigned long v;
1126 struct uvh_rh_gam_cfg_overlay_config_mmr_s {
1127 unsigned long rsvd_0_25: 26; /* */
1128 unsigned long base : 20; /* RW */
1129 unsigned long rsvd_46_62: 17; /* */
1130 unsigned long enable : 1; /* RW */
1131 } s;
1132};
1133
1134/* ========================================================================= */
1135/* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */ 860/* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */
1136/* ========================================================================= */ 861/* ========================================================================= */
1137#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL 862#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL
@@ -1263,101 +988,6 @@ union uvh_rtc1_int_config_u {
1263}; 988};
1264 989
1265/* ========================================================================= */ 990/* ========================================================================= */
1266/* UVH_RTC2_INT_CONFIG */
1267/* ========================================================================= */
1268#define UVH_RTC2_INT_CONFIG 0x61600UL
1269
1270#define UVH_RTC2_INT_CONFIG_VECTOR_SHFT 0
1271#define UVH_RTC2_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
1272#define UVH_RTC2_INT_CONFIG_DM_SHFT 8
1273#define UVH_RTC2_INT_CONFIG_DM_MASK 0x0000000000000700UL
1274#define UVH_RTC2_INT_CONFIG_DESTMODE_SHFT 11
1275#define UVH_RTC2_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
1276#define UVH_RTC2_INT_CONFIG_STATUS_SHFT 12
1277#define UVH_RTC2_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
1278#define UVH_RTC2_INT_CONFIG_P_SHFT 13
1279#define UVH_RTC2_INT_CONFIG_P_MASK 0x0000000000002000UL
1280#define UVH_RTC2_INT_CONFIG_T_SHFT 15
1281#define UVH_RTC2_INT_CONFIG_T_MASK 0x0000000000008000UL
1282#define UVH_RTC2_INT_CONFIG_M_SHFT 16
1283#define UVH_RTC2_INT_CONFIG_M_MASK 0x0000000000010000UL
1284#define UVH_RTC2_INT_CONFIG_APIC_ID_SHFT 32
1285#define UVH_RTC2_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
1286
1287union uvh_rtc2_int_config_u {
1288 unsigned long v;
1289 struct uvh_rtc2_int_config_s {
1290 unsigned long vector_ : 8; /* RW */
1291 unsigned long dm : 3; /* RW */
1292 unsigned long destmode : 1; /* RW */
1293 unsigned long status : 1; /* RO */
1294 unsigned long p : 1; /* RO */
1295 unsigned long rsvd_14 : 1; /* */
1296 unsigned long t : 1; /* RO */
1297 unsigned long m : 1; /* RW */
1298 unsigned long rsvd_17_31: 15; /* */
1299 unsigned long apic_id : 32; /* RW */
1300 } s;
1301};
1302
1303/* ========================================================================= */
1304/* UVH_RTC3_INT_CONFIG */
1305/* ========================================================================= */
1306#define UVH_RTC3_INT_CONFIG 0x61640UL
1307
1308#define UVH_RTC3_INT_CONFIG_VECTOR_SHFT 0
1309#define UVH_RTC3_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL
1310#define UVH_RTC3_INT_CONFIG_DM_SHFT 8
1311#define UVH_RTC3_INT_CONFIG_DM_MASK 0x0000000000000700UL
1312#define UVH_RTC3_INT_CONFIG_DESTMODE_SHFT 11
1313#define UVH_RTC3_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL
1314#define UVH_RTC3_INT_CONFIG_STATUS_SHFT 12
1315#define UVH_RTC3_INT_CONFIG_STATUS_MASK 0x0000000000001000UL
1316#define UVH_RTC3_INT_CONFIG_P_SHFT 13
1317#define UVH_RTC3_INT_CONFIG_P_MASK 0x0000000000002000UL
1318#define UVH_RTC3_INT_CONFIG_T_SHFT 15
1319#define UVH_RTC3_INT_CONFIG_T_MASK 0x0000000000008000UL
1320#define UVH_RTC3_INT_CONFIG_M_SHFT 16
1321#define UVH_RTC3_INT_CONFIG_M_MASK 0x0000000000010000UL
1322#define UVH_RTC3_INT_CONFIG_APIC_ID_SHFT 32
1323#define UVH_RTC3_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL
1324
1325union uvh_rtc3_int_config_u {
1326 unsigned long v;
1327 struct uvh_rtc3_int_config_s {
1328 unsigned long vector_ : 8; /* RW */
1329 unsigned long dm : 3; /* RW */
1330 unsigned long destmode : 1; /* RW */
1331 unsigned long status : 1; /* RO */
1332 unsigned long p : 1; /* RO */
1333 unsigned long rsvd_14 : 1; /* */
1334 unsigned long t : 1; /* RO */
1335 unsigned long m : 1; /* RW */
1336 unsigned long rsvd_17_31: 15; /* */
1337 unsigned long apic_id : 32; /* RW */
1338 } s;
1339};
1340
1341/* ========================================================================= */
1342/* UVH_RTC_INC_RATIO */
1343/* ========================================================================= */
1344#define UVH_RTC_INC_RATIO 0x350000UL
1345
1346#define UVH_RTC_INC_RATIO_FRACTION_SHFT 0
1347#define UVH_RTC_INC_RATIO_FRACTION_MASK 0x00000000000fffffUL
1348#define UVH_RTC_INC_RATIO_RATIO_SHFT 20
1349#define UVH_RTC_INC_RATIO_RATIO_MASK 0x0000000000700000UL
1350
1351union uvh_rtc_inc_ratio_u {
1352 unsigned long v;
1353 struct uvh_rtc_inc_ratio_s {
1354 unsigned long fraction : 20; /* RW */
1355 unsigned long ratio : 3; /* RW */
1356 unsigned long rsvd_23_63: 41; /* */
1357 } s;
1358};
1359
1360/* ========================================================================= */
1361/* UVH_SI_ADDR_MAP_CONFIG */ 991/* UVH_SI_ADDR_MAP_CONFIG */
1362/* ========================================================================= */ 992/* ========================================================================= */
1363#define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL 993#define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL
diff --git a/arch/x86/include/asm/vmware.h b/arch/x86/include/asm/vmware.h
deleted file mode 100644
index e49ed6d2fd4e..000000000000
--- a/arch/x86/include/asm/vmware.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * Copyright (C) 2008, VMware, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more
13 * details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 */
20#ifndef ASM_X86__VMWARE_H
21#define ASM_X86__VMWARE_H
22
23extern void vmware_platform_setup(void);
24extern int vmware_platform(void);
25extern void vmware_set_feature_bits(struct cpuinfo_x86 *c);
26
27#endif
diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h
index ddc04ccad03b..2c4390cae228 100644
--- a/arch/x86/include/asm/xsave.h
+++ b/arch/x86/include/asm/xsave.h
@@ -37,8 +37,9 @@ extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
37 void __user *fpstate, 37 void __user *fpstate,
38 struct _fpx_sw_bytes *sw); 38 struct _fpx_sw_bytes *sw);
39 39
40static inline int xrstor_checking(struct xsave_struct *fx) 40static inline int fpu_xrstor_checking(struct fpu *fpu)
41{ 41{
42 struct xsave_struct *fx = &fpu->state->xsave;
42 int err; 43 int err;
43 44
44 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t" 45 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
@@ -110,12 +111,12 @@ static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
110 : "memory"); 111 : "memory");
111} 112}
112 113
113static inline void xsave(struct task_struct *tsk) 114static inline void fpu_xsave(struct fpu *fpu)
114{ 115{
115 /* This, however, we can work around by forcing the compiler to select 116 /* This, however, we can work around by forcing the compiler to select
116 an addressing mode that doesn't require extended registers. */ 117 an addressing mode that doesn't require extended registers. */
117 __asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27" 118 __asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
118 : : "D" (&(tsk->thread.xstate->xsave)), 119 : : "D" (&(fpu->state->xsave)),
119 "a" (-1), "d"(-1) : "memory"); 120 "a" (-1), "d"(-1) : "memory");
120} 121}
121#endif 122#endif
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 4c58352209e0..e77b22083721 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -47,8 +47,6 @@ obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
47obj-y += process.o 47obj-y += process.o
48obj-y += i387.o xsave.o 48obj-y += i387.o xsave.o
49obj-y += ptrace.o 49obj-y += ptrace.o
50obj-$(CONFIG_X86_DS) += ds.o
51obj-$(CONFIG_X86_DS_SELFTEST) += ds_selftest.o
52obj-$(CONFIG_X86_32) += tls.o 50obj-$(CONFIG_X86_32) += tls.o
53obj-$(CONFIG_IA32_EMULATION) += tls.o 51obj-$(CONFIG_IA32_EMULATION) += tls.o
54obj-y += step.o 52obj-y += step.o
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index cd40aba6aa95..9a5ed58f09dc 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -94,6 +94,53 @@ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
94 94
95 95
96/* 96/*
97 * ISA irqs by default are the first 16 gsis but can be
98 * any gsi as specified by an interrupt source override.
99 */
100static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
101 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
102};
103
104static unsigned int gsi_to_irq(unsigned int gsi)
105{
106 unsigned int irq = gsi + NR_IRQS_LEGACY;
107 unsigned int i;
108
109 for (i = 0; i < NR_IRQS_LEGACY; i++) {
110 if (isa_irq_to_gsi[i] == gsi) {
111 return i;
112 }
113 }
114
115 /* Provide an identity mapping of gsi == irq
116 * except on truly weird platforms that have
117 * non isa irqs in the first 16 gsis.
118 */
119 if (gsi >= NR_IRQS_LEGACY)
120 irq = gsi;
121 else
122 irq = gsi_end + 1 + gsi;
123
124 return irq;
125}
126
127static u32 irq_to_gsi(int irq)
128{
129 unsigned int gsi;
130
131 if (irq < NR_IRQS_LEGACY)
132 gsi = isa_irq_to_gsi[irq];
133 else if (irq <= gsi_end)
134 gsi = irq;
135 else if (irq <= (gsi_end + NR_IRQS_LEGACY))
136 gsi = irq - gsi_end;
137 else
138 gsi = 0xffffffff;
139
140 return gsi;
141}
142
143/*
97 * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, 144 * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
98 * to map the target physical address. The problem is that set_fixmap() 145 * to map the target physical address. The problem is that set_fixmap()
99 * provides a single page, and it is possible that the page is not 146 * provides a single page, and it is possible that the page is not
@@ -313,7 +360,7 @@ acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
313/* 360/*
314 * Parse Interrupt Source Override for the ACPI SCI 361 * Parse Interrupt Source Override for the ACPI SCI
315 */ 362 */
316static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) 363static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi)
317{ 364{
318 if (trigger == 0) /* compatible SCI trigger is level */ 365 if (trigger == 0) /* compatible SCI trigger is level */
319 trigger = 3; 366 trigger = 3;
@@ -333,7 +380,7 @@ static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
333 * If GSI is < 16, this will update its flags, 380 * If GSI is < 16, this will update its flags,
334 * else it will create a new mp_irqs[] entry. 381 * else it will create a new mp_irqs[] entry.
335 */ 382 */
336 mp_override_legacy_irq(gsi, polarity, trigger, gsi); 383 mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
337 384
338 /* 385 /*
339 * stash over-ride to indicate we've been here 386 * stash over-ride to indicate we've been here
@@ -357,9 +404,10 @@ acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
357 acpi_table_print_madt_entry(header); 404 acpi_table_print_madt_entry(header);
358 405
359 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { 406 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
360 acpi_sci_ioapic_setup(intsrc->global_irq, 407 acpi_sci_ioapic_setup(intsrc->source_irq,
361 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, 408 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
362 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); 409 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
410 intsrc->global_irq);
363 return 0; 411 return 0;
364 } 412 }
365 413
@@ -448,7 +496,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
448 496
449int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) 497int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
450{ 498{
451 *irq = gsi; 499 *irq = gsi_to_irq(gsi);
452 500
453#ifdef CONFIG_X86_IO_APIC 501#ifdef CONFIG_X86_IO_APIC
454 if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) 502 if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC)
@@ -458,6 +506,14 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
458 return 0; 506 return 0;
459} 507}
460 508
509int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
510{
511 if (isa_irq >= 16)
512 return -1;
513 *gsi = irq_to_gsi(isa_irq);
514 return 0;
515}
516
461/* 517/*
462 * success: return IRQ number (>=0) 518 * success: return IRQ number (>=0)
463 * failure: return < 0 519 * failure: return < 0
@@ -482,7 +538,7 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
482 plat_gsi = mp_register_gsi(dev, gsi, trigger, polarity); 538 plat_gsi = mp_register_gsi(dev, gsi, trigger, polarity);
483 } 539 }
484#endif 540#endif
485 irq = plat_gsi; 541 irq = gsi_to_irq(plat_gsi);
486 542
487 return irq; 543 return irq;
488} 544}
@@ -867,29 +923,6 @@ static int __init acpi_parse_madt_lapic_entries(void)
867extern int es7000_plat; 923extern int es7000_plat;
868#endif 924#endif
869 925
870int __init acpi_probe_gsi(void)
871{
872 int idx;
873 int gsi;
874 int max_gsi = 0;
875
876 if (acpi_disabled)
877 return 0;
878
879 if (!acpi_ioapic)
880 return 0;
881
882 max_gsi = 0;
883 for (idx = 0; idx < nr_ioapics; idx++) {
884 gsi = mp_gsi_routing[idx].gsi_end;
885
886 if (gsi > max_gsi)
887 max_gsi = gsi;
888 }
889
890 return max_gsi + 1;
891}
892
893static void assign_to_mp_irq(struct mpc_intsrc *m, 926static void assign_to_mp_irq(struct mpc_intsrc *m,
894 struct mpc_intsrc *mp_irq) 927 struct mpc_intsrc *mp_irq)
895{ 928{
@@ -947,13 +980,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
947 mp_irq.dstirq = pin; /* INTIN# */ 980 mp_irq.dstirq = pin; /* INTIN# */
948 981
949 save_mp_irq(&mp_irq); 982 save_mp_irq(&mp_irq);
983
984 isa_irq_to_gsi[bus_irq] = gsi;
950} 985}
951 986
952void __init mp_config_acpi_legacy_irqs(void) 987void __init mp_config_acpi_legacy_irqs(void)
953{ 988{
954 int i; 989 int i;
955 int ioapic;
956 unsigned int dstapic;
957 struct mpc_intsrc mp_irq; 990 struct mpc_intsrc mp_irq;
958 991
959#if defined (CONFIG_MCA) || defined (CONFIG_EISA) 992#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
@@ -974,19 +1007,27 @@ void __init mp_config_acpi_legacy_irqs(void)
974#endif 1007#endif
975 1008
976 /* 1009 /*
977 * Locate the IOAPIC that manages the ISA IRQs (0-15).
978 */
979 ioapic = mp_find_ioapic(0);
980 if (ioapic < 0)
981 return;
982 dstapic = mp_ioapics[ioapic].apicid;
983
984 /*
985 * Use the default configuration for the IRQs 0-15. Unless 1010 * Use the default configuration for the IRQs 0-15. Unless
986 * overridden by (MADT) interrupt source override entries. 1011 * overridden by (MADT) interrupt source override entries.
987 */ 1012 */
988 for (i = 0; i < 16; i++) { 1013 for (i = 0; i < 16; i++) {
1014 int ioapic, pin;
1015 unsigned int dstapic;
989 int idx; 1016 int idx;
1017 u32 gsi;
1018
1019 /* Locate the gsi that irq i maps to. */
1020 if (acpi_isa_irq_to_gsi(i, &gsi))
1021 continue;
1022
1023 /*
1024 * Locate the IOAPIC that manages the ISA IRQ.
1025 */
1026 ioapic = mp_find_ioapic(gsi);
1027 if (ioapic < 0)
1028 continue;
1029 pin = mp_find_ioapic_pin(ioapic, gsi);
1030 dstapic = mp_ioapics[ioapic].apicid;
990 1031
991 for (idx = 0; idx < mp_irq_entries; idx++) { 1032 for (idx = 0; idx < mp_irq_entries; idx++) {
992 struct mpc_intsrc *irq = mp_irqs + idx; 1033 struct mpc_intsrc *irq = mp_irqs + idx;
@@ -996,7 +1037,7 @@ void __init mp_config_acpi_legacy_irqs(void)
996 break; 1037 break;
997 1038
998 /* Do we already have a mapping for this IOAPIC pin */ 1039 /* Do we already have a mapping for this IOAPIC pin */
999 if (irq->dstapic == dstapic && irq->dstirq == i) 1040 if (irq->dstapic == dstapic && irq->dstirq == pin)
1000 break; 1041 break;
1001 } 1042 }
1002 1043
@@ -1011,7 +1052,7 @@ void __init mp_config_acpi_legacy_irqs(void)
1011 mp_irq.dstapic = dstapic; 1052 mp_irq.dstapic = dstapic;
1012 mp_irq.irqtype = mp_INT; 1053 mp_irq.irqtype = mp_INT;
1013 mp_irq.srcbusirq = i; /* Identity mapped */ 1054 mp_irq.srcbusirq = i; /* Identity mapped */
1014 mp_irq.dstirq = i; 1055 mp_irq.dstirq = pin;
1015 1056
1016 save_mp_irq(&mp_irq); 1057 save_mp_irq(&mp_irq);
1017 } 1058 }
@@ -1076,11 +1117,6 @@ int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
1076 1117
1077 ioapic_pin = mp_find_ioapic_pin(ioapic, gsi); 1118 ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
1078 1119
1079#ifdef CONFIG_X86_32
1080 if (ioapic_renumber_irq)
1081 gsi = ioapic_renumber_irq(ioapic, gsi);
1082#endif
1083
1084 if (ioapic_pin > MP_MAX_IOAPIC_PIN) { 1120 if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
1085 printk(KERN_ERR "Invalid reference to IOAPIC pin " 1121 printk(KERN_ERR "Invalid reference to IOAPIC pin "
1086 "%d-%d\n", mp_ioapics[ioapic].apicid, 1122 "%d-%d\n", mp_ioapics[ioapic].apicid,
@@ -1094,7 +1130,7 @@ int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
1094 set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin, 1130 set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin,
1095 trigger == ACPI_EDGE_SENSITIVE ? 0 : 1, 1131 trigger == ACPI_EDGE_SENSITIVE ? 0 : 1,
1096 polarity == ACPI_ACTIVE_HIGH ? 0 : 1); 1132 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
1097 io_apic_set_pci_routing(dev, gsi, &irq_attr); 1133 io_apic_set_pci_routing(dev, gsi_to_irq(gsi), &irq_attr);
1098 1134
1099 return gsi; 1135 return gsi;
1100} 1136}
@@ -1154,7 +1190,8 @@ static int __init acpi_parse_madt_ioapic_entries(void)
1154 * pretend we got one so we can set the SCI flags. 1190 * pretend we got one so we can set the SCI flags.
1155 */ 1191 */
1156 if (!acpi_sci_override_gsi) 1192 if (!acpi_sci_override_gsi)
1157 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); 1193 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0,
1194 acpi_gbl_FADT.sci_interrupt);
1158 1195
1159 /* Fill in identity legacy mappings where no override */ 1196 /* Fill in identity legacy mappings where no override */
1160 mp_config_acpi_legacy_irqs(); 1197 mp_config_acpi_legacy_irqs();
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 1a160d5d44d0..70237732a6c7 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -194,7 +194,7 @@ static void __init_or_module add_nops(void *insns, unsigned int len)
194} 194}
195 195
196extern struct alt_instr __alt_instructions[], __alt_instructions_end[]; 196extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
197extern u8 *__smp_locks[], *__smp_locks_end[]; 197extern s32 __smp_locks[], __smp_locks_end[];
198static void *text_poke_early(void *addr, const void *opcode, size_t len); 198static void *text_poke_early(void *addr, const void *opcode, size_t len);
199 199
200/* Replace instructions with better alternatives for this CPU type. 200/* Replace instructions with better alternatives for this CPU type.
@@ -235,37 +235,41 @@ void __init_or_module apply_alternatives(struct alt_instr *start,
235 235
236#ifdef CONFIG_SMP 236#ifdef CONFIG_SMP
237 237
238static void alternatives_smp_lock(u8 **start, u8 **end, u8 *text, u8 *text_end) 238static void alternatives_smp_lock(const s32 *start, const s32 *end,
239 u8 *text, u8 *text_end)
239{ 240{
240 u8 **ptr; 241 const s32 *poff;
241 242
242 mutex_lock(&text_mutex); 243 mutex_lock(&text_mutex);
243 for (ptr = start; ptr < end; ptr++) { 244 for (poff = start; poff < end; poff++) {
244 if (*ptr < text) 245 u8 *ptr = (u8 *)poff + *poff;
245 continue; 246
246 if (*ptr > text_end) 247 if (!*poff || ptr < text || ptr >= text_end)
247 continue; 248 continue;
248 /* turn DS segment override prefix into lock prefix */ 249 /* turn DS segment override prefix into lock prefix */
249 text_poke(*ptr, ((unsigned char []){0xf0}), 1); 250 if (*ptr == 0x3e)
251 text_poke(ptr, ((unsigned char []){0xf0}), 1);
250 }; 252 };
251 mutex_unlock(&text_mutex); 253 mutex_unlock(&text_mutex);
252} 254}
253 255
254static void alternatives_smp_unlock(u8 **start, u8 **end, u8 *text, u8 *text_end) 256static void alternatives_smp_unlock(const s32 *start, const s32 *end,
257 u8 *text, u8 *text_end)
255{ 258{
256 u8 **ptr; 259 const s32 *poff;
257 260
258 if (noreplace_smp) 261 if (noreplace_smp)
259 return; 262 return;
260 263
261 mutex_lock(&text_mutex); 264 mutex_lock(&text_mutex);
262 for (ptr = start; ptr < end; ptr++) { 265 for (poff = start; poff < end; poff++) {
263 if (*ptr < text) 266 u8 *ptr = (u8 *)poff + *poff;
264 continue; 267
265 if (*ptr > text_end) 268 if (!*poff || ptr < text || ptr >= text_end)
266 continue; 269 continue;
267 /* turn lock prefix into DS segment override prefix */ 270 /* turn lock prefix into DS segment override prefix */
268 text_poke(*ptr, ((unsigned char []){0x3E}), 1); 271 if (*ptr == 0xf0)
272 text_poke(ptr, ((unsigned char []){0x3E}), 1);
269 }; 273 };
270 mutex_unlock(&text_mutex); 274 mutex_unlock(&text_mutex);
271} 275}
@@ -276,8 +280,8 @@ struct smp_alt_module {
276 char *name; 280 char *name;
277 281
278 /* ptrs to lock prefixes */ 282 /* ptrs to lock prefixes */
279 u8 **locks; 283 const s32 *locks;
280 u8 **locks_end; 284 const s32 *locks_end;
281 285
282 /* .text segment, needed to avoid patching init code ;) */ 286 /* .text segment, needed to avoid patching init code ;) */
283 u8 *text; 287 u8 *text;
@@ -398,16 +402,19 @@ void alternatives_smp_switch(int smp)
398int alternatives_text_reserved(void *start, void *end) 402int alternatives_text_reserved(void *start, void *end)
399{ 403{
400 struct smp_alt_module *mod; 404 struct smp_alt_module *mod;
401 u8 **ptr; 405 const s32 *poff;
402 u8 *text_start = start; 406 u8 *text_start = start;
403 u8 *text_end = end; 407 u8 *text_end = end;
404 408
405 list_for_each_entry(mod, &smp_alt_modules, next) { 409 list_for_each_entry(mod, &smp_alt_modules, next) {
406 if (mod->text > text_end || mod->text_end < text_start) 410 if (mod->text > text_end || mod->text_end < text_start)
407 continue; 411 continue;
408 for (ptr = mod->locks; ptr < mod->locks_end; ptr++) 412 for (poff = mod->locks; poff < mod->locks_end; poff++) {
409 if (text_start <= *ptr && text_end >= *ptr) 413 const u8 *ptr = (const u8 *)poff + *poff;
414
415 if (text_start <= ptr && text_end > ptr)
410 return 1; 416 return 1;
417 }
411 } 418 }
412 419
413 return 0; 420 return 0;
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index f854d89b7edf..fa5a1474cd18 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -731,18 +731,22 @@ static bool increase_address_space(struct protection_domain *domain,
731 731
732static u64 *alloc_pte(struct protection_domain *domain, 732static u64 *alloc_pte(struct protection_domain *domain,
733 unsigned long address, 733 unsigned long address,
734 int end_lvl, 734 unsigned long page_size,
735 u64 **pte_page, 735 u64 **pte_page,
736 gfp_t gfp) 736 gfp_t gfp)
737{ 737{
738 int level, end_lvl;
738 u64 *pte, *page; 739 u64 *pte, *page;
739 int level; 740
741 BUG_ON(!is_power_of_2(page_size));
740 742
741 while (address > PM_LEVEL_SIZE(domain->mode)) 743 while (address > PM_LEVEL_SIZE(domain->mode))
742 increase_address_space(domain, gfp); 744 increase_address_space(domain, gfp);
743 745
744 level = domain->mode - 1; 746 level = domain->mode - 1;
745 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; 747 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
748 address = PAGE_SIZE_ALIGN(address, page_size);
749 end_lvl = PAGE_SIZE_LEVEL(page_size);
746 750
747 while (level > end_lvl) { 751 while (level > end_lvl) {
748 if (!IOMMU_PTE_PRESENT(*pte)) { 752 if (!IOMMU_PTE_PRESENT(*pte)) {
@@ -752,6 +756,10 @@ static u64 *alloc_pte(struct protection_domain *domain,
752 *pte = PM_LEVEL_PDE(level, virt_to_phys(page)); 756 *pte = PM_LEVEL_PDE(level, virt_to_phys(page));
753 } 757 }
754 758
759 /* No level skipping support yet */
760 if (PM_PTE_LEVEL(*pte) != level)
761 return NULL;
762
755 level -= 1; 763 level -= 1;
756 764
757 pte = IOMMU_PTE_PAGE(*pte); 765 pte = IOMMU_PTE_PAGE(*pte);
@@ -769,28 +777,47 @@ static u64 *alloc_pte(struct protection_domain *domain,
769 * This function checks if there is a PTE for a given dma address. If 777 * This function checks if there is a PTE for a given dma address. If
770 * there is one, it returns the pointer to it. 778 * there is one, it returns the pointer to it.
771 */ 779 */
772static u64 *fetch_pte(struct protection_domain *domain, 780static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
773 unsigned long address, int map_size)
774{ 781{
775 int level; 782 int level;
776 u64 *pte; 783 u64 *pte;
777 784
778 level = domain->mode - 1; 785 if (address > PM_LEVEL_SIZE(domain->mode))
779 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; 786 return NULL;
787
788 level = domain->mode - 1;
789 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
780 790
781 while (level > map_size) { 791 while (level > 0) {
792
793 /* Not Present */
782 if (!IOMMU_PTE_PRESENT(*pte)) 794 if (!IOMMU_PTE_PRESENT(*pte))
783 return NULL; 795 return NULL;
784 796
797 /* Large PTE */
798 if (PM_PTE_LEVEL(*pte) == 0x07) {
799 unsigned long pte_mask, __pte;
800
801 /*
802 * If we have a series of large PTEs, make
803 * sure to return a pointer to the first one.
804 */
805 pte_mask = PTE_PAGE_SIZE(*pte);
806 pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1);
807 __pte = ((unsigned long)pte) & pte_mask;
808
809 return (u64 *)__pte;
810 }
811
812 /* No level skipping support yet */
813 if (PM_PTE_LEVEL(*pte) != level)
814 return NULL;
815
785 level -= 1; 816 level -= 1;
786 817
818 /* Walk to the next level */
787 pte = IOMMU_PTE_PAGE(*pte); 819 pte = IOMMU_PTE_PAGE(*pte);
788 pte = &pte[PM_LEVEL_INDEX(level, address)]; 820 pte = &pte[PM_LEVEL_INDEX(level, address)];
789
790 if ((PM_PTE_LEVEL(*pte) == 0) && level != map_size) {
791 pte = NULL;
792 break;
793 }
794 } 821 }
795 822
796 return pte; 823 return pte;
@@ -807,44 +834,84 @@ static int iommu_map_page(struct protection_domain *dom,
807 unsigned long bus_addr, 834 unsigned long bus_addr,
808 unsigned long phys_addr, 835 unsigned long phys_addr,
809 int prot, 836 int prot,
810 int map_size) 837 unsigned long page_size)
811{ 838{
812 u64 __pte, *pte; 839 u64 __pte, *pte;
813 840 int i, count;
814 bus_addr = PAGE_ALIGN(bus_addr);
815 phys_addr = PAGE_ALIGN(phys_addr);
816
817 BUG_ON(!PM_ALIGNED(map_size, bus_addr));
818 BUG_ON(!PM_ALIGNED(map_size, phys_addr));
819 841
820 if (!(prot & IOMMU_PROT_MASK)) 842 if (!(prot & IOMMU_PROT_MASK))
821 return -EINVAL; 843 return -EINVAL;
822 844
823 pte = alloc_pte(dom, bus_addr, map_size, NULL, GFP_KERNEL); 845 bus_addr = PAGE_ALIGN(bus_addr);
846 phys_addr = PAGE_ALIGN(phys_addr);
847 count = PAGE_SIZE_PTE_COUNT(page_size);
848 pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL);
849
850 for (i = 0; i < count; ++i)
851 if (IOMMU_PTE_PRESENT(pte[i]))
852 return -EBUSY;
824 853
825 if (IOMMU_PTE_PRESENT(*pte)) 854 if (page_size > PAGE_SIZE) {
826 return -EBUSY; 855 __pte = PAGE_SIZE_PTE(phys_addr, page_size);
856 __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC;
857 } else
858 __pte = phys_addr | IOMMU_PTE_P | IOMMU_PTE_FC;
827 859
828 __pte = phys_addr | IOMMU_PTE_P;
829 if (prot & IOMMU_PROT_IR) 860 if (prot & IOMMU_PROT_IR)
830 __pte |= IOMMU_PTE_IR; 861 __pte |= IOMMU_PTE_IR;
831 if (prot & IOMMU_PROT_IW) 862 if (prot & IOMMU_PROT_IW)
832 __pte |= IOMMU_PTE_IW; 863 __pte |= IOMMU_PTE_IW;
833 864
834 *pte = __pte; 865 for (i = 0; i < count; ++i)
866 pte[i] = __pte;
835 867
836 update_domain(dom); 868 update_domain(dom);
837 869
838 return 0; 870 return 0;
839} 871}
840 872
841static void iommu_unmap_page(struct protection_domain *dom, 873static unsigned long iommu_unmap_page(struct protection_domain *dom,
842 unsigned long bus_addr, int map_size) 874 unsigned long bus_addr,
875 unsigned long page_size)
843{ 876{
844 u64 *pte = fetch_pte(dom, bus_addr, map_size); 877 unsigned long long unmap_size, unmapped;
878 u64 *pte;
879
880 BUG_ON(!is_power_of_2(page_size));
881
882 unmapped = 0;
845 883
846 if (pte) 884 while (unmapped < page_size) {
847 *pte = 0; 885
886 pte = fetch_pte(dom, bus_addr);
887
888 if (!pte) {
889 /*
890 * No PTE for this address
891 * move forward in 4kb steps
892 */
893 unmap_size = PAGE_SIZE;
894 } else if (PM_PTE_LEVEL(*pte) == 0) {
895 /* 4kb PTE found for this address */
896 unmap_size = PAGE_SIZE;
897 *pte = 0ULL;
898 } else {
899 int count, i;
900
901 /* Large PTE found which maps this address */
902 unmap_size = PTE_PAGE_SIZE(*pte);
903 count = PAGE_SIZE_PTE_COUNT(unmap_size);
904 for (i = 0; i < count; i++)
905 pte[i] = 0ULL;
906 }
907
908 bus_addr = (bus_addr & ~(unmap_size - 1)) + unmap_size;
909 unmapped += unmap_size;
910 }
911
912 BUG_ON(!is_power_of_2(unmapped));
913
914 return unmapped;
848} 915}
849 916
850/* 917/*
@@ -878,7 +945,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
878 for (addr = e->address_start; addr < e->address_end; 945 for (addr = e->address_start; addr < e->address_end;
879 addr += PAGE_SIZE) { 946 addr += PAGE_SIZE) {
880 ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot, 947 ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot,
881 PM_MAP_4k); 948 PAGE_SIZE);
882 if (ret) 949 if (ret)
883 return ret; 950 return ret;
884 /* 951 /*
@@ -1006,7 +1073,7 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
1006 u64 *pte, *pte_page; 1073 u64 *pte, *pte_page;
1007 1074
1008 for (i = 0; i < num_ptes; ++i) { 1075 for (i = 0; i < num_ptes; ++i) {
1009 pte = alloc_pte(&dma_dom->domain, address, PM_MAP_4k, 1076 pte = alloc_pte(&dma_dom->domain, address, PAGE_SIZE,
1010 &pte_page, gfp); 1077 &pte_page, gfp);
1011 if (!pte) 1078 if (!pte)
1012 goto out_free; 1079 goto out_free;
@@ -1042,7 +1109,7 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
1042 for (i = dma_dom->aperture[index]->offset; 1109 for (i = dma_dom->aperture[index]->offset;
1043 i < dma_dom->aperture_size; 1110 i < dma_dom->aperture_size;
1044 i += PAGE_SIZE) { 1111 i += PAGE_SIZE) {
1045 u64 *pte = fetch_pte(&dma_dom->domain, i, PM_MAP_4k); 1112 u64 *pte = fetch_pte(&dma_dom->domain, i);
1046 if (!pte || !IOMMU_PTE_PRESENT(*pte)) 1113 if (!pte || !IOMMU_PTE_PRESENT(*pte))
1047 continue; 1114 continue;
1048 1115
@@ -1712,7 +1779,7 @@ static u64* dma_ops_get_pte(struct dma_ops_domain *dom,
1712 1779
1713 pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; 1780 pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
1714 if (!pte) { 1781 if (!pte) {
1715 pte = alloc_pte(&dom->domain, address, PM_MAP_4k, &pte_page, 1782 pte = alloc_pte(&dom->domain, address, PAGE_SIZE, &pte_page,
1716 GFP_ATOMIC); 1783 GFP_ATOMIC);
1717 aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page; 1784 aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page;
1718 } else 1785 } else
@@ -2439,12 +2506,11 @@ static int amd_iommu_attach_device(struct iommu_domain *dom,
2439 return ret; 2506 return ret;
2440} 2507}
2441 2508
2442static int amd_iommu_map_range(struct iommu_domain *dom, 2509static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova,
2443 unsigned long iova, phys_addr_t paddr, 2510 phys_addr_t paddr, int gfp_order, int iommu_prot)
2444 size_t size, int iommu_prot)
2445{ 2511{
2512 unsigned long page_size = 0x1000UL << gfp_order;
2446 struct protection_domain *domain = dom->priv; 2513 struct protection_domain *domain = dom->priv;
2447 unsigned long i, npages = iommu_num_pages(paddr, size, PAGE_SIZE);
2448 int prot = 0; 2514 int prot = 0;
2449 int ret; 2515 int ret;
2450 2516
@@ -2453,61 +2519,50 @@ static int amd_iommu_map_range(struct iommu_domain *dom,
2453 if (iommu_prot & IOMMU_WRITE) 2519 if (iommu_prot & IOMMU_WRITE)
2454 prot |= IOMMU_PROT_IW; 2520 prot |= IOMMU_PROT_IW;
2455 2521
2456 iova &= PAGE_MASK;
2457 paddr &= PAGE_MASK;
2458
2459 mutex_lock(&domain->api_lock); 2522 mutex_lock(&domain->api_lock);
2460 2523 ret = iommu_map_page(domain, iova, paddr, prot, page_size);
2461 for (i = 0; i < npages; ++i) {
2462 ret = iommu_map_page(domain, iova, paddr, prot, PM_MAP_4k);
2463 if (ret)
2464 return ret;
2465
2466 iova += PAGE_SIZE;
2467 paddr += PAGE_SIZE;
2468 }
2469
2470 mutex_unlock(&domain->api_lock); 2524 mutex_unlock(&domain->api_lock);
2471 2525
2472 return 0; 2526 return ret;
2473} 2527}
2474 2528
2475static void amd_iommu_unmap_range(struct iommu_domain *dom, 2529static int amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
2476 unsigned long iova, size_t size) 2530 int gfp_order)
2477{ 2531{
2478
2479 struct protection_domain *domain = dom->priv; 2532 struct protection_domain *domain = dom->priv;
2480 unsigned long i, npages = iommu_num_pages(iova, size, PAGE_SIZE); 2533 unsigned long page_size, unmap_size;
2481 2534
2482 iova &= PAGE_MASK; 2535 page_size = 0x1000UL << gfp_order;
2483 2536
2484 mutex_lock(&domain->api_lock); 2537 mutex_lock(&domain->api_lock);
2485 2538 unmap_size = iommu_unmap_page(domain, iova, page_size);
2486 for (i = 0; i < npages; ++i) { 2539 mutex_unlock(&domain->api_lock);
2487 iommu_unmap_page(domain, iova, PM_MAP_4k);
2488 iova += PAGE_SIZE;
2489 }
2490 2540
2491 iommu_flush_tlb_pde(domain); 2541 iommu_flush_tlb_pde(domain);
2492 2542
2493 mutex_unlock(&domain->api_lock); 2543 return get_order(unmap_size);
2494} 2544}
2495 2545
2496static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, 2546static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
2497 unsigned long iova) 2547 unsigned long iova)
2498{ 2548{
2499 struct protection_domain *domain = dom->priv; 2549 struct protection_domain *domain = dom->priv;
2500 unsigned long offset = iova & ~PAGE_MASK; 2550 unsigned long offset_mask;
2501 phys_addr_t paddr; 2551 phys_addr_t paddr;
2502 u64 *pte; 2552 u64 *pte, __pte;
2503 2553
2504 pte = fetch_pte(domain, iova, PM_MAP_4k); 2554 pte = fetch_pte(domain, iova);
2505 2555
2506 if (!pte || !IOMMU_PTE_PRESENT(*pte)) 2556 if (!pte || !IOMMU_PTE_PRESENT(*pte))
2507 return 0; 2557 return 0;
2508 2558
2509 paddr = *pte & IOMMU_PAGE_MASK; 2559 if (PM_PTE_LEVEL(*pte) == 0)
2510 paddr |= offset; 2560 offset_mask = PAGE_SIZE - 1;
2561 else
2562 offset_mask = PTE_PAGE_SIZE(*pte) - 1;
2563
2564 __pte = *pte & PM_ADDR_MASK;
2565 paddr = (__pte & ~offset_mask) | (iova & offset_mask);
2511 2566
2512 return paddr; 2567 return paddr;
2513} 2568}
@@ -2523,8 +2578,8 @@ static struct iommu_ops amd_iommu_ops = {
2523 .domain_destroy = amd_iommu_domain_destroy, 2578 .domain_destroy = amd_iommu_domain_destroy,
2524 .attach_dev = amd_iommu_attach_device, 2579 .attach_dev = amd_iommu_attach_device,
2525 .detach_dev = amd_iommu_detach_device, 2580 .detach_dev = amd_iommu_detach_device,
2526 .map = amd_iommu_map_range, 2581 .map = amd_iommu_map,
2527 .unmap = amd_iommu_unmap_range, 2582 .unmap = amd_iommu_unmap,
2528 .iova_to_phys = amd_iommu_iova_to_phys, 2583 .iova_to_phys = amd_iommu_iova_to_phys,
2529 .domain_has_cap = amd_iommu_domain_has_cap, 2584 .domain_has_cap = amd_iommu_domain_has_cap,
2530}; 2585};
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 6360abf993d4..3bacb4d0844c 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -120,6 +120,7 @@ struct ivmd_header {
120bool amd_iommu_dump; 120bool amd_iommu_dump;
121 121
122static int __initdata amd_iommu_detected; 122static int __initdata amd_iommu_detected;
123static bool __initdata amd_iommu_disabled;
123 124
124u16 amd_iommu_last_bdf; /* largest PCI device id we have 125u16 amd_iommu_last_bdf; /* largest PCI device id we have
125 to handle */ 126 to handle */
@@ -1372,6 +1373,9 @@ void __init amd_iommu_detect(void)
1372 if (no_iommu || (iommu_detected && !gart_iommu_aperture)) 1373 if (no_iommu || (iommu_detected && !gart_iommu_aperture))
1373 return; 1374 return;
1374 1375
1376 if (amd_iommu_disabled)
1377 return;
1378
1375 if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) { 1379 if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) {
1376 iommu_detected = 1; 1380 iommu_detected = 1;
1377 amd_iommu_detected = 1; 1381 amd_iommu_detected = 1;
@@ -1401,6 +1405,8 @@ static int __init parse_amd_iommu_options(char *str)
1401 for (; *str; ++str) { 1405 for (; *str; ++str) {
1402 if (strncmp(str, "fullflush", 9) == 0) 1406 if (strncmp(str, "fullflush", 9) == 0)
1403 amd_iommu_unmap_flush = true; 1407 amd_iommu_unmap_flush = true;
1408 if (strncmp(str, "off", 3) == 0)
1409 amd_iommu_disabled = true;
1404 } 1410 }
1405 1411
1406 return 1; 1412 return 1;
diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c
index 03ba1b895f5e..425e53a87feb 100644
--- a/arch/x86/kernel/apic/es7000_32.c
+++ b/arch/x86/kernel/apic/es7000_32.c
@@ -131,24 +131,6 @@ int es7000_plat;
131 131
132static unsigned int base; 132static unsigned int base;
133 133
134static int
135es7000_rename_gsi(int ioapic, int gsi)
136{
137 if (es7000_plat == ES7000_ZORRO)
138 return gsi;
139
140 if (!base) {
141 int i;
142 for (i = 0; i < nr_ioapics; i++)
143 base += nr_ioapic_registers[i];
144 }
145
146 if (!ioapic && (gsi < 16))
147 gsi += base;
148
149 return gsi;
150}
151
152static int __cpuinit wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) 134static int __cpuinit wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
153{ 135{
154 unsigned long vect = 0, psaival = 0; 136 unsigned long vect = 0, psaival = 0;
@@ -190,7 +172,6 @@ static void setup_unisys(void)
190 es7000_plat = ES7000_ZORRO; 172 es7000_plat = ES7000_ZORRO;
191 else 173 else
192 es7000_plat = ES7000_CLASSIC; 174 es7000_plat = ES7000_CLASSIC;
193 ioapic_renumber_irq = es7000_rename_gsi;
194} 175}
195 176
196/* 177/*
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index eb2789c3f721..33f3563a2a52 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -89,6 +89,9 @@ int nr_ioapics;
89/* IO APIC gsi routing info */ 89/* IO APIC gsi routing info */
90struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS]; 90struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
91 91
92/* The last gsi number used */
93u32 gsi_end;
94
92/* MP IRQ source entries */ 95/* MP IRQ source entries */
93struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; 96struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
94 97
@@ -1013,10 +1016,9 @@ static inline int irq_trigger(int idx)
1013 return MPBIOS_trigger(idx); 1016 return MPBIOS_trigger(idx);
1014} 1017}
1015 1018
1016int (*ioapic_renumber_irq)(int ioapic, int irq);
1017static int pin_2_irq(int idx, int apic, int pin) 1019static int pin_2_irq(int idx, int apic, int pin)
1018{ 1020{
1019 int irq, i; 1021 int irq;
1020 int bus = mp_irqs[idx].srcbus; 1022 int bus = mp_irqs[idx].srcbus;
1021 1023
1022 /* 1024 /*
@@ -1028,18 +1030,12 @@ static int pin_2_irq(int idx, int apic, int pin)
1028 if (test_bit(bus, mp_bus_not_pci)) { 1030 if (test_bit(bus, mp_bus_not_pci)) {
1029 irq = mp_irqs[idx].srcbusirq; 1031 irq = mp_irqs[idx].srcbusirq;
1030 } else { 1032 } else {
1031 /* 1033 u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
1032 * PCI IRQs are mapped in order 1034
1033 */ 1035 if (gsi >= NR_IRQS_LEGACY)
1034 i = irq = 0; 1036 irq = gsi;
1035 while (i < apic) 1037 else
1036 irq += nr_ioapic_registers[i++]; 1038 irq = gsi_end + 1 + gsi;
1037 irq += pin;
1038 /*
1039 * For MPS mode, so far only needed by ES7000 platform
1040 */
1041 if (ioapic_renumber_irq)
1042 irq = ioapic_renumber_irq(apic, irq);
1043 } 1039 }
1044 1040
1045#ifdef CONFIG_X86_32 1041#ifdef CONFIG_X86_32
@@ -1950,20 +1946,8 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
1950 1946
1951void __init enable_IO_APIC(void) 1947void __init enable_IO_APIC(void)
1952{ 1948{
1953 union IO_APIC_reg_01 reg_01;
1954 int i8259_apic, i8259_pin; 1949 int i8259_apic, i8259_pin;
1955 int apic; 1950 int apic;
1956 unsigned long flags;
1957
1958 /*
1959 * The number of IO-APIC IRQ registers (== #pins):
1960 */
1961 for (apic = 0; apic < nr_ioapics; apic++) {
1962 raw_spin_lock_irqsave(&ioapic_lock, flags);
1963 reg_01.raw = io_apic_read(apic, 1);
1964 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
1965 nr_ioapic_registers[apic] = reg_01.bits.entries+1;
1966 }
1967 1951
1968 if (!legacy_pic->nr_legacy_irqs) 1952 if (!legacy_pic->nr_legacy_irqs)
1969 return; 1953 return;
@@ -3858,27 +3842,20 @@ int __init io_apic_get_redir_entries (int ioapic)
3858 reg_01.raw = io_apic_read(ioapic, 1); 3842 reg_01.raw = io_apic_read(ioapic, 1);
3859 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 3843 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
3860 3844
3861 return reg_01.bits.entries; 3845 /* The register returns the maximum index redir index
3846 * supported, which is one less than the total number of redir
3847 * entries.
3848 */
3849 return reg_01.bits.entries + 1;
3862} 3850}
3863 3851
3864void __init probe_nr_irqs_gsi(void) 3852void __init probe_nr_irqs_gsi(void)
3865{ 3853{
3866 int nr = 0; 3854 int nr;
3867 3855
3868 nr = acpi_probe_gsi(); 3856 nr = gsi_end + 1 + NR_IRQS_LEGACY;
3869 if (nr > nr_irqs_gsi) { 3857 if (nr > nr_irqs_gsi)
3870 nr_irqs_gsi = nr; 3858 nr_irqs_gsi = nr;
3871 } else {
3872 /* for acpi=off or acpi is not compiled in */
3873 int idx;
3874
3875 nr = 0;
3876 for (idx = 0; idx < nr_ioapics; idx++)
3877 nr += io_apic_get_redir_entries(idx) + 1;
3878
3879 if (nr > nr_irqs_gsi)
3880 nr_irqs_gsi = nr;
3881 }
3882 3859
3883 printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi); 3860 printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi);
3884} 3861}
@@ -4085,22 +4062,27 @@ int __init io_apic_get_version(int ioapic)
4085 return reg_01.bits.version; 4062 return reg_01.bits.version;
4086} 4063}
4087 4064
4088int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) 4065int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity)
4089{ 4066{
4090 int i; 4067 int ioapic, pin, idx;
4091 4068
4092 if (skip_ioapic_setup) 4069 if (skip_ioapic_setup)
4093 return -1; 4070 return -1;
4094 4071
4095 for (i = 0; i < mp_irq_entries; i++) 4072 ioapic = mp_find_ioapic(gsi);
4096 if (mp_irqs[i].irqtype == mp_INT && 4073 if (ioapic < 0)
4097 mp_irqs[i].srcbusirq == bus_irq)
4098 break;
4099 if (i >= mp_irq_entries)
4100 return -1; 4074 return -1;
4101 4075
4102 *trigger = irq_trigger(i); 4076 pin = mp_find_ioapic_pin(ioapic, gsi);
4103 *polarity = irq_polarity(i); 4077 if (pin < 0)
4078 return -1;
4079
4080 idx = find_irq_entry(ioapic, pin, mp_INT);
4081 if (idx < 0)
4082 return -1;
4083
4084 *trigger = irq_trigger(idx);
4085 *polarity = irq_polarity(idx);
4104 return 0; 4086 return 0;
4105} 4087}
4106 4088
@@ -4241,7 +4223,7 @@ void __init ioapic_insert_resources(void)
4241 } 4223 }
4242} 4224}
4243 4225
4244int mp_find_ioapic(int gsi) 4226int mp_find_ioapic(u32 gsi)
4245{ 4227{
4246 int i = 0; 4228 int i = 0;
4247 4229
@@ -4256,7 +4238,7 @@ int mp_find_ioapic(int gsi)
4256 return -1; 4238 return -1;
4257} 4239}
4258 4240
4259int mp_find_ioapic_pin(int ioapic, int gsi) 4241int mp_find_ioapic_pin(int ioapic, u32 gsi)
4260{ 4242{
4261 if (WARN_ON(ioapic == -1)) 4243 if (WARN_ON(ioapic == -1))
4262 return -1; 4244 return -1;
@@ -4284,6 +4266,7 @@ static int bad_ioapic(unsigned long address)
4284void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) 4266void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
4285{ 4267{
4286 int idx = 0; 4268 int idx = 0;
4269 int entries;
4287 4270
4288 if (bad_ioapic(address)) 4271 if (bad_ioapic(address))
4289 return; 4272 return;
@@ -4302,9 +4285,17 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
4302 * Build basic GSI lookup table to facilitate gsi->io_apic lookups 4285 * Build basic GSI lookup table to facilitate gsi->io_apic lookups
4303 * and to prevent reprogramming of IOAPIC pins (PCI GSIs). 4286 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
4304 */ 4287 */
4288 entries = io_apic_get_redir_entries(idx);
4305 mp_gsi_routing[idx].gsi_base = gsi_base; 4289 mp_gsi_routing[idx].gsi_base = gsi_base;
4306 mp_gsi_routing[idx].gsi_end = gsi_base + 4290 mp_gsi_routing[idx].gsi_end = gsi_base + entries - 1;
4307 io_apic_get_redir_entries(idx); 4291
4292 /*
4293 * The number of IO-APIC IRQ registers (== #pins):
4294 */
4295 nr_ioapic_registers[idx] = entries;
4296
4297 if (mp_gsi_routing[idx].gsi_end > gsi_end)
4298 gsi_end = mp_gsi_routing[idx].gsi_end;
4308 4299
4309 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " 4300 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
4310 "GSI %d-%d\n", idx, mp_ioapics[idx].apicid, 4301 "GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index c085d52dbaf2..e46f98f36e31 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -735,9 +735,6 @@ void __init uv_system_init(void)
735 uv_node_to_blade[nid] = blade; 735 uv_node_to_blade[nid] = blade;
736 uv_cpu_to_blade[cpu] = blade; 736 uv_cpu_to_blade[cpu] = blade;
737 max_pnode = max(pnode, max_pnode); 737 max_pnode = max(pnode, max_pnode);
738
739 printk(KERN_DEBUG "UV: cpu %d, apicid 0x%x, pnode %d, nid %d, lcpu %d, blade %d\n",
740 cpu, apicid, pnode, nid, lcpu, blade);
741 } 738 }
742 739
743 /* Add blade/pnode info for nodes without cpus */ 740 /* Add blade/pnode info for nodes without cpus */
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 031aa887b0eb..c4f9182ca3ac 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -1224,7 +1224,7 @@ static void reinit_timer(void)
1224#ifdef INIT_TIMER_AFTER_SUSPEND 1224#ifdef INIT_TIMER_AFTER_SUSPEND
1225 unsigned long flags; 1225 unsigned long flags;
1226 1226
1227 spin_lock_irqsave(&i8253_lock, flags); 1227 raw_spin_lock_irqsave(&i8253_lock, flags);
1228 /* set the clock to HZ */ 1228 /* set the clock to HZ */
1229 outb_pit(0x34, PIT_MODE); /* binary, mode 2, LSB/MSB, ch 0 */ 1229 outb_pit(0x34, PIT_MODE); /* binary, mode 2, LSB/MSB, ch 0 */
1230 udelay(10); 1230 udelay(10);
@@ -1232,7 +1232,7 @@ static void reinit_timer(void)
1232 udelay(10); 1232 udelay(10);
1233 outb_pit(LATCH >> 8, PIT_CH0); /* MSB */ 1233 outb_pit(LATCH >> 8, PIT_CH0); /* MSB */
1234 udelay(10); 1234 udelay(10);
1235 spin_unlock_irqrestore(&i8253_lock, flags); 1235 raw_spin_unlock_irqrestore(&i8253_lock, flags);
1236#endif 1236#endif
1237} 1237}
1238 1238
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index c202b62f3671..3a785da34b6f 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -14,7 +14,7 @@ CFLAGS_common.o := $(nostackp)
14 14
15obj-y := intel_cacheinfo.o addon_cpuid_features.o 15obj-y := intel_cacheinfo.o addon_cpuid_features.o
16obj-y += proc.o capflags.o powerflags.o common.o 16obj-y += proc.o capflags.o powerflags.o common.o
17obj-y += vmware.o hypervisor.o sched.o 17obj-y += vmware.o hypervisor.o sched.o mshyperv.o
18 18
19obj-$(CONFIG_X86_32) += bugs.o cmpxchg.o 19obj-$(CONFIG_X86_32) += bugs.o cmpxchg.o
20obj-$(CONFIG_X86_64) += bugs_64.o 20obj-$(CONFIG_X86_64) += bugs_64.o
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 97ad79cdf688..10fa5684a662 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -30,12 +30,14 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
30 const struct cpuid_bit *cb; 30 const struct cpuid_bit *cb;
31 31
32 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { 32 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
33 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 }, 33 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
34 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 }, 34 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
35 { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a }, 35 { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006 },
36 { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a }, 36 { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007 },
37 { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a }, 37 { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a },
38 { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a }, 38 { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a },
39 { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a },
40 { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a },
39 { 0, 0, 0, 0 } 41 { 0, 0, 0, 0 }
40 }; 42 };
41 43
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 01a265212395..c39576cb3018 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -86,7 +86,7 @@ static void __init check_fpu(void)
86 86
87static void __init check_hlt(void) 87static void __init check_hlt(void)
88{ 88{
89 if (paravirt_enabled()) 89 if (boot_cpu_data.x86 >= 5 || paravirt_enabled())
90 return; 90 return;
91 91
92 printk(KERN_INFO "Checking 'hlt' instruction... "); 92 printk(KERN_INFO "Checking 'hlt' instruction... ");
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 4868e4a951ee..c1c00d0b1692 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1243,10 +1243,7 @@ void __cpuinit cpu_init(void)
1243 /* 1243 /*
1244 * Force FPU initialization: 1244 * Force FPU initialization:
1245 */ 1245 */
1246 if (cpu_has_xsave) 1246 current_thread_info()->status = 0;
1247 current_thread_info()->status = TS_XSAVE;
1248 else
1249 current_thread_info()->status = 0;
1250 clear_used_math(); 1247 clear_used_math();
1251 mxcsr_feature_mask_init(); 1248 mxcsr_feature_mask_init();
1252 1249
diff --git a/arch/x86/kernel/cpu/cpufreq/Makefile b/arch/x86/kernel/cpu/cpufreq/Makefile
index 1840c0a5170b..bd54bf67e6fb 100644
--- a/arch/x86/kernel/cpu/cpufreq/Makefile
+++ b/arch/x86/kernel/cpu/cpufreq/Makefile
@@ -2,8 +2,8 @@
2# K8 systems. ACPI is preferred to all other hardware-specific drivers. 2# K8 systems. ACPI is preferred to all other hardware-specific drivers.
3# speedstep-* is preferred over p4-clockmod. 3# speedstep-* is preferred over p4-clockmod.
4 4
5obj-$(CONFIG_X86_POWERNOW_K8) += powernow-k8.o 5obj-$(CONFIG_X86_POWERNOW_K8) += powernow-k8.o mperf.o
6obj-$(CONFIG_X86_ACPI_CPUFREQ) += acpi-cpufreq.o 6obj-$(CONFIG_X86_ACPI_CPUFREQ) += acpi-cpufreq.o mperf.o
7obj-$(CONFIG_X86_PCC_CPUFREQ) += pcc-cpufreq.o 7obj-$(CONFIG_X86_PCC_CPUFREQ) += pcc-cpufreq.o
8obj-$(CONFIG_X86_POWERNOW_K6) += powernow-k6.o 8obj-$(CONFIG_X86_POWERNOW_K6) += powernow-k6.o
9obj-$(CONFIG_X86_POWERNOW_K7) += powernow-k7.o 9obj-$(CONFIG_X86_POWERNOW_K7) += powernow-k7.o
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 459168083b77..1d3cddaa40ee 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -46,6 +46,7 @@
46#include <asm/msr.h> 46#include <asm/msr.h>
47#include <asm/processor.h> 47#include <asm/processor.h>
48#include <asm/cpufeature.h> 48#include <asm/cpufeature.h>
49#include "mperf.h"
49 50
50#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \ 51#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
51 "acpi-cpufreq", msg) 52 "acpi-cpufreq", msg)
@@ -71,8 +72,6 @@ struct acpi_cpufreq_data {
71 72
72static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data); 73static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
73 74
74static DEFINE_PER_CPU(struct aperfmperf, acfreq_old_perf);
75
76/* acpi_perf_data is a pointer to percpu data. */ 75/* acpi_perf_data is a pointer to percpu data. */
77static struct acpi_processor_performance *acpi_perf_data; 76static struct acpi_processor_performance *acpi_perf_data;
78 77
@@ -240,45 +239,6 @@ static u32 get_cur_val(const struct cpumask *mask)
240 return cmd.val; 239 return cmd.val;
241} 240}
242 241
243/* Called via smp_call_function_single(), on the target CPU */
244static void read_measured_perf_ctrs(void *_cur)
245{
246 struct aperfmperf *am = _cur;
247
248 get_aperfmperf(am);
249}
250
251/*
252 * Return the measured active (C0) frequency on this CPU since last call
253 * to this function.
254 * Input: cpu number
255 * Return: Average CPU frequency in terms of max frequency (zero on error)
256 *
257 * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
258 * over a period of time, while CPU is in C0 state.
259 * IA32_MPERF counts at the rate of max advertised frequency
260 * IA32_APERF counts at the rate of actual CPU frequency
261 * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
262 * no meaning should be associated with absolute values of these MSRs.
263 */
264static unsigned int get_measured_perf(struct cpufreq_policy *policy,
265 unsigned int cpu)
266{
267 struct aperfmperf perf;
268 unsigned long ratio;
269 unsigned int retval;
270
271 if (smp_call_function_single(cpu, read_measured_perf_ctrs, &perf, 1))
272 return 0;
273
274 ratio = calc_aperfmperf_ratio(&per_cpu(acfreq_old_perf, cpu), &perf);
275 per_cpu(acfreq_old_perf, cpu) = perf;
276
277 retval = (policy->cpuinfo.max_freq * ratio) >> APERFMPERF_SHIFT;
278
279 return retval;
280}
281
282static unsigned int get_cur_freq_on_cpu(unsigned int cpu) 242static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
283{ 243{
284 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu); 244 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
@@ -702,7 +662,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
702 662
703 /* Check for APERF/MPERF support in hardware */ 663 /* Check for APERF/MPERF support in hardware */
704 if (cpu_has(c, X86_FEATURE_APERFMPERF)) 664 if (cpu_has(c, X86_FEATURE_APERFMPERF))
705 acpi_cpufreq_driver.getavg = get_measured_perf; 665 acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf;
706 666
707 dprintk("CPU%u - ACPI performance management activated.\n", cpu); 667 dprintk("CPU%u - ACPI performance management activated.\n", cpu);
708 for (i = 0; i < perf->state_count; i++) 668 for (i = 0; i < perf->state_count; i++)
diff --git a/arch/x86/kernel/cpu/cpufreq/mperf.c b/arch/x86/kernel/cpu/cpufreq/mperf.c
new file mode 100644
index 000000000000..911e193018ae
--- /dev/null
+++ b/arch/x86/kernel/cpu/cpufreq/mperf.c
@@ -0,0 +1,51 @@
1#include <linux/kernel.h>
2#include <linux/smp.h>
3#include <linux/module.h>
4#include <linux/init.h>
5#include <linux/cpufreq.h>
6#include <linux/slab.h>
7
8#include "mperf.h"
9
10static DEFINE_PER_CPU(struct aperfmperf, acfreq_old_perf);
11
12/* Called via smp_call_function_single(), on the target CPU */
13static void read_measured_perf_ctrs(void *_cur)
14{
15 struct aperfmperf *am = _cur;
16
17 get_aperfmperf(am);
18}
19
20/*
21 * Return the measured active (C0) frequency on this CPU since last call
22 * to this function.
23 * Input: cpu number
24 * Return: Average CPU frequency in terms of max frequency (zero on error)
25 *
26 * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
27 * over a period of time, while CPU is in C0 state.
28 * IA32_MPERF counts at the rate of max advertised frequency
29 * IA32_APERF counts at the rate of actual CPU frequency
30 * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
31 * no meaning should be associated with absolute values of these MSRs.
32 */
33unsigned int cpufreq_get_measured_perf(struct cpufreq_policy *policy,
34 unsigned int cpu)
35{
36 struct aperfmperf perf;
37 unsigned long ratio;
38 unsigned int retval;
39
40 if (smp_call_function_single(cpu, read_measured_perf_ctrs, &perf, 1))
41 return 0;
42
43 ratio = calc_aperfmperf_ratio(&per_cpu(acfreq_old_perf, cpu), &perf);
44 per_cpu(acfreq_old_perf, cpu) = perf;
45
46 retval = (policy->cpuinfo.max_freq * ratio) >> APERFMPERF_SHIFT;
47
48 return retval;
49}
50EXPORT_SYMBOL_GPL(cpufreq_get_measured_perf);
51MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/cpufreq/mperf.h b/arch/x86/kernel/cpu/cpufreq/mperf.h
new file mode 100644
index 000000000000..5dbf2950dc22
--- /dev/null
+++ b/arch/x86/kernel/cpu/cpufreq/mperf.h
@@ -0,0 +1,9 @@
1/*
2 * (c) 2010 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 */
7
8unsigned int cpufreq_get_measured_perf(struct cpufreq_policy *policy,
9 unsigned int cpu);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index b6215b9798e2..6f3dc8fbbfdc 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -1,6 +1,5 @@
1
2/* 1/*
3 * (c) 2003-2006 Advanced Micro Devices, Inc. 2 * (c) 2003-2010 Advanced Micro Devices, Inc.
4 * Your use of this code is subject to the terms and conditions of the 3 * Your use of this code is subject to the terms and conditions of the
5 * GNU general public license version 2. See "COPYING" or 4 * GNU general public license version 2. See "COPYING" or
6 * http://www.gnu.org/licenses/gpl.html 5 * http://www.gnu.org/licenses/gpl.html
@@ -46,6 +45,7 @@
46#define PFX "powernow-k8: " 45#define PFX "powernow-k8: "
47#define VERSION "version 2.20.00" 46#define VERSION "version 2.20.00"
48#include "powernow-k8.h" 47#include "powernow-k8.h"
48#include "mperf.h"
49 49
50/* serialize freq changes */ 50/* serialize freq changes */
51static DEFINE_MUTEX(fidvid_mutex); 51static DEFINE_MUTEX(fidvid_mutex);
@@ -54,6 +54,12 @@ static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
54 54
55static int cpu_family = CPU_OPTERON; 55static int cpu_family = CPU_OPTERON;
56 56
57/* core performance boost */
58static bool cpb_capable, cpb_enabled;
59static struct msr __percpu *msrs;
60
61static struct cpufreq_driver cpufreq_amd64_driver;
62
57#ifndef CONFIG_SMP 63#ifndef CONFIG_SMP
58static inline const struct cpumask *cpu_core_mask(int cpu) 64static inline const struct cpumask *cpu_core_mask(int cpu)
59{ 65{
@@ -1249,6 +1255,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1249 struct powernow_k8_data *data; 1255 struct powernow_k8_data *data;
1250 struct init_on_cpu init_on_cpu; 1256 struct init_on_cpu init_on_cpu;
1251 int rc; 1257 int rc;
1258 struct cpuinfo_x86 *c = &cpu_data(pol->cpu);
1252 1259
1253 if (!cpu_online(pol->cpu)) 1260 if (!cpu_online(pol->cpu))
1254 return -ENODEV; 1261 return -ENODEV;
@@ -1323,6 +1330,10 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1323 return -EINVAL; 1330 return -EINVAL;
1324 } 1331 }
1325 1332
1333 /* Check for APERF/MPERF support in hardware */
1334 if (cpu_has(c, X86_FEATURE_APERFMPERF))
1335 cpufreq_amd64_driver.getavg = cpufreq_get_measured_perf;
1336
1326 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); 1337 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1327 1338
1328 if (cpu_family == CPU_HW_PSTATE) 1339 if (cpu_family == CPU_HW_PSTATE)
@@ -1394,8 +1405,77 @@ out:
1394 return khz; 1405 return khz;
1395} 1406}
1396 1407
1408static void _cpb_toggle_msrs(bool t)
1409{
1410 int cpu;
1411
1412 get_online_cpus();
1413
1414 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1415
1416 for_each_cpu(cpu, cpu_online_mask) {
1417 struct msr *reg = per_cpu_ptr(msrs, cpu);
1418 if (t)
1419 reg->l &= ~BIT(25);
1420 else
1421 reg->l |= BIT(25);
1422 }
1423 wrmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1424
1425 put_online_cpus();
1426}
1427
1428/*
1429 * Switch on/off core performance boosting.
1430 *
1431 * 0=disable
1432 * 1=enable.
1433 */
1434static void cpb_toggle(bool t)
1435{
1436 if (!cpb_capable)
1437 return;
1438
1439 if (t && !cpb_enabled) {
1440 cpb_enabled = true;
1441 _cpb_toggle_msrs(t);
1442 printk(KERN_INFO PFX "Core Boosting enabled.\n");
1443 } else if (!t && cpb_enabled) {
1444 cpb_enabled = false;
1445 _cpb_toggle_msrs(t);
1446 printk(KERN_INFO PFX "Core Boosting disabled.\n");
1447 }
1448}
1449
1450static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
1451 size_t count)
1452{
1453 int ret = -EINVAL;
1454 unsigned long val = 0;
1455
1456 ret = strict_strtoul(buf, 10, &val);
1457 if (!ret && (val == 0 || val == 1) && cpb_capable)
1458 cpb_toggle(val);
1459 else
1460 return -EINVAL;
1461
1462 return count;
1463}
1464
1465static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
1466{
1467 return sprintf(buf, "%u\n", cpb_enabled);
1468}
1469
1470#define define_one_rw(_name) \
1471static struct freq_attr _name = \
1472__ATTR(_name, 0644, show_##_name, store_##_name)
1473
1474define_one_rw(cpb);
1475
1397static struct freq_attr *powernow_k8_attr[] = { 1476static struct freq_attr *powernow_k8_attr[] = {
1398 &cpufreq_freq_attr_scaling_available_freqs, 1477 &cpufreq_freq_attr_scaling_available_freqs,
1478 &cpb,
1399 NULL, 1479 NULL,
1400}; 1480};
1401 1481
@@ -1411,10 +1491,51 @@ static struct cpufreq_driver cpufreq_amd64_driver = {
1411 .attr = powernow_k8_attr, 1491 .attr = powernow_k8_attr,
1412}; 1492};
1413 1493
1494/*
1495 * Clear the boost-disable flag on the CPU_DOWN path so that this cpu
1496 * cannot block the remaining ones from boosting. On the CPU_UP path we
1497 * simply keep the boost-disable flag in sync with the current global
1498 * state.
1499 */
1500static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action,
1501 void *hcpu)
1502{
1503 unsigned cpu = (long)hcpu;
1504 u32 lo, hi;
1505
1506 switch (action) {
1507 case CPU_UP_PREPARE:
1508 case CPU_UP_PREPARE_FROZEN:
1509
1510 if (!cpb_enabled) {
1511 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
1512 lo |= BIT(25);
1513 wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
1514 }
1515 break;
1516
1517 case CPU_DOWN_PREPARE:
1518 case CPU_DOWN_PREPARE_FROZEN:
1519 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
1520 lo &= ~BIT(25);
1521 wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
1522 break;
1523
1524 default:
1525 break;
1526 }
1527
1528 return NOTIFY_OK;
1529}
1530
1531static struct notifier_block __cpuinitdata cpb_nb = {
1532 .notifier_call = cpb_notify,
1533};
1534
1414/* driver entry point for init */ 1535/* driver entry point for init */
1415static int __cpuinit powernowk8_init(void) 1536static int __cpuinit powernowk8_init(void)
1416{ 1537{
1417 unsigned int i, supported_cpus = 0; 1538 unsigned int i, supported_cpus = 0, cpu;
1418 1539
1419 for_each_online_cpu(i) { 1540 for_each_online_cpu(i) {
1420 int rc; 1541 int rc;
@@ -1423,15 +1544,36 @@ static int __cpuinit powernowk8_init(void)
1423 supported_cpus++; 1544 supported_cpus++;
1424 } 1545 }
1425 1546
1426 if (supported_cpus == num_online_cpus()) { 1547 if (supported_cpus != num_online_cpus())
1427 printk(KERN_INFO PFX "Found %d %s " 1548 return -ENODEV;
1428 "processors (%d cpu cores) (" VERSION ")\n", 1549
1429 num_online_nodes(), 1550 printk(KERN_INFO PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
1430 boot_cpu_data.x86_model_id, supported_cpus); 1551 num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
1431 return cpufreq_register_driver(&cpufreq_amd64_driver); 1552
1553 if (boot_cpu_has(X86_FEATURE_CPB)) {
1554
1555 cpb_capable = true;
1556
1557 register_cpu_notifier(&cpb_nb);
1558
1559 msrs = msrs_alloc();
1560 if (!msrs) {
1561 printk(KERN_ERR "%s: Error allocating msrs!\n", __func__);
1562 return -ENOMEM;
1563 }
1564
1565 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
1566
1567 for_each_cpu(cpu, cpu_online_mask) {
1568 struct msr *reg = per_cpu_ptr(msrs, cpu);
1569 cpb_enabled |= !(!!(reg->l & BIT(25)));
1570 }
1571
1572 printk(KERN_INFO PFX "Core Performance Boosting: %s.\n",
1573 (cpb_enabled ? "on" : "off"));
1432 } 1574 }
1433 1575
1434 return -ENODEV; 1576 return cpufreq_register_driver(&cpufreq_amd64_driver);
1435} 1577}
1436 1578
1437/* driver entry point for term */ 1579/* driver entry point for term */
@@ -1439,6 +1581,13 @@ static void __exit powernowk8_exit(void)
1439{ 1581{
1440 dprintk("exit\n"); 1582 dprintk("exit\n");
1441 1583
1584 if (boot_cpu_has(X86_FEATURE_CPB)) {
1585 msrs_free(msrs);
1586 msrs = NULL;
1587
1588 unregister_cpu_notifier(&cpb_nb);
1589 }
1590
1442 cpufreq_unregister_driver(&cpufreq_amd64_driver); 1591 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1443} 1592}
1444 1593
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
index 02ce824073cb..df3529b1c02d 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
@@ -5,7 +5,6 @@
5 * http://www.gnu.org/licenses/gpl.html 5 * http://www.gnu.org/licenses/gpl.html
6 */ 6 */
7 7
8
9enum pstate { 8enum pstate {
10 HW_PSTATE_INVALID = 0xff, 9 HW_PSTATE_INVALID = 0xff,
11 HW_PSTATE_0 = 0, 10 HW_PSTATE_0 = 0,
@@ -55,7 +54,6 @@ struct powernow_k8_data {
55 struct cpumask *available_cores; 54 struct cpumask *available_cores;
56}; 55};
57 56
58
59/* processor's cpuid instruction support */ 57/* processor's cpuid instruction support */
60#define CPUID_PROCESSOR_SIGNATURE 1 /* function 1 */ 58#define CPUID_PROCESSOR_SIGNATURE 1 /* function 1 */
61#define CPUID_XFAM 0x0ff00000 /* extended family */ 59#define CPUID_XFAM 0x0ff00000 /* extended family */
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 08be922de33a..dd531cc56a8f 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -21,37 +21,55 @@
21 * 21 *
22 */ 22 */
23 23
24#include <linux/module.h>
24#include <asm/processor.h> 25#include <asm/processor.h>
25#include <asm/vmware.h>
26#include <asm/hypervisor.h> 26#include <asm/hypervisor.h>
27 27
28static inline void __cpuinit 28/*
29detect_hypervisor_vendor(struct cpuinfo_x86 *c) 29 * Hypervisor detect order. This is specified explicitly here because
30 * some hypervisors might implement compatibility modes for other
31 * hypervisors and therefore need to be detected in specific sequence.
32 */
33static const __initconst struct hypervisor_x86 * const hypervisors[] =
30{ 34{
31 if (vmware_platform()) 35 &x86_hyper_vmware,
32 c->x86_hyper_vendor = X86_HYPER_VENDOR_VMWARE; 36 &x86_hyper_ms_hyperv,
33 else 37};
34 c->x86_hyper_vendor = X86_HYPER_VENDOR_NONE;
35}
36 38
37static inline void __cpuinit 39const struct hypervisor_x86 *x86_hyper;
38hypervisor_set_feature_bits(struct cpuinfo_x86 *c) 40EXPORT_SYMBOL(x86_hyper);
41
42static inline void __init
43detect_hypervisor_vendor(void)
39{ 44{
40 if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE) { 45 const struct hypervisor_x86 *h, * const *p;
41 vmware_set_feature_bits(c); 46
42 return; 47 for (p = hypervisors; p < hypervisors + ARRAY_SIZE(hypervisors); p++) {
48 h = *p;
49 if (h->detect()) {
50 x86_hyper = h;
51 printk(KERN_INFO "Hypervisor detected: %s\n", h->name);
52 break;
53 }
43 } 54 }
44} 55}
45 56
46void __cpuinit init_hypervisor(struct cpuinfo_x86 *c) 57void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
47{ 58{
48 detect_hypervisor_vendor(c); 59 if (x86_hyper && x86_hyper->set_cpu_features)
49 hypervisor_set_feature_bits(c); 60 x86_hyper->set_cpu_features(c);
50} 61}
51 62
52void __init init_hypervisor_platform(void) 63void __init init_hypervisor_platform(void)
53{ 64{
65
66 detect_hypervisor_vendor();
67
68 if (!x86_hyper)
69 return;
70
54 init_hypervisor(&boot_cpu_data); 71 init_hypervisor(&boot_cpu_data);
55 if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE) 72
56 vmware_platform_setup(); 73 if (x86_hyper->init_platform)
74 x86_hyper->init_platform();
57} 75}
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 1366c7cfd483..85f69cdeae10 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -12,7 +12,6 @@
12#include <asm/processor.h> 12#include <asm/processor.h>
13#include <asm/pgtable.h> 13#include <asm/pgtable.h>
14#include <asm/msr.h> 14#include <asm/msr.h>
15#include <asm/ds.h>
16#include <asm/bugs.h> 15#include <asm/bugs.h>
17#include <asm/cpu.h> 16#include <asm/cpu.h>
18 17
@@ -373,12 +372,6 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
373 set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON); 372 set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
374 } 373 }
375 374
376 if (c->cpuid_level > 6) {
377 unsigned ecx = cpuid_ecx(6);
378 if (ecx & 0x01)
379 set_cpu_cap(c, X86_FEATURE_APERFMPERF);
380 }
381
382 if (cpu_has_xmm2) 375 if (cpu_has_xmm2)
383 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); 376 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
384 if (cpu_has_ds) { 377 if (cpu_has_ds) {
@@ -388,7 +381,6 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
388 set_cpu_cap(c, X86_FEATURE_BTS); 381 set_cpu_cap(c, X86_FEATURE_BTS);
389 if (!(l1 & (1<<12))) 382 if (!(l1 & (1<<12)))
390 set_cpu_cap(c, X86_FEATURE_PEBS); 383 set_cpu_cap(c, X86_FEATURE_PEBS);
391 ds_init_intel(c);
392 } 384 }
393 385
394 if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush) 386 if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush)
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index b3eeb66c0a51..33eae2062cf5 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -148,13 +148,19 @@ union _cpuid4_leaf_ecx {
148 u32 full; 148 u32 full;
149}; 149};
150 150
151struct amd_l3_cache {
152 struct pci_dev *dev;
153 bool can_disable;
154 unsigned indices;
155 u8 subcaches[4];
156};
157
151struct _cpuid4_info { 158struct _cpuid4_info {
152 union _cpuid4_leaf_eax eax; 159 union _cpuid4_leaf_eax eax;
153 union _cpuid4_leaf_ebx ebx; 160 union _cpuid4_leaf_ebx ebx;
154 union _cpuid4_leaf_ecx ecx; 161 union _cpuid4_leaf_ecx ecx;
155 unsigned long size; 162 unsigned long size;
156 bool can_disable; 163 struct amd_l3_cache *l3;
157 unsigned int l3_indices;
158 DECLARE_BITMAP(shared_cpu_map, NR_CPUS); 164 DECLARE_BITMAP(shared_cpu_map, NR_CPUS);
159}; 165};
160 166
@@ -164,8 +170,7 @@ struct _cpuid4_info_regs {
164 union _cpuid4_leaf_ebx ebx; 170 union _cpuid4_leaf_ebx ebx;
165 union _cpuid4_leaf_ecx ecx; 171 union _cpuid4_leaf_ecx ecx;
166 unsigned long size; 172 unsigned long size;
167 bool can_disable; 173 struct amd_l3_cache *l3;
168 unsigned int l3_indices;
169}; 174};
170 175
171unsigned short num_cache_leaves; 176unsigned short num_cache_leaves;
@@ -302,87 +307,163 @@ struct _cache_attr {
302}; 307};
303 308
304#ifdef CONFIG_CPU_SUP_AMD 309#ifdef CONFIG_CPU_SUP_AMD
305static unsigned int __cpuinit amd_calc_l3_indices(void) 310
311/*
312 * L3 cache descriptors
313 */
314static struct amd_l3_cache **__cpuinitdata l3_caches;
315
316static void __cpuinit amd_calc_l3_indices(struct amd_l3_cache *l3)
306{ 317{
307 /*
308 * We're called over smp_call_function_single() and therefore
309 * are on the correct cpu.
310 */
311 int cpu = smp_processor_id();
312 int node = cpu_to_node(cpu);
313 struct pci_dev *dev = node_to_k8_nb_misc(node);
314 unsigned int sc0, sc1, sc2, sc3; 318 unsigned int sc0, sc1, sc2, sc3;
315 u32 val = 0; 319 u32 val = 0;
316 320
317 pci_read_config_dword(dev, 0x1C4, &val); 321 pci_read_config_dword(l3->dev, 0x1C4, &val);
318 322
319 /* calculate subcache sizes */ 323 /* calculate subcache sizes */
320 sc0 = !(val & BIT(0)); 324 l3->subcaches[0] = sc0 = !(val & BIT(0));
321 sc1 = !(val & BIT(4)); 325 l3->subcaches[1] = sc1 = !(val & BIT(4));
322 sc2 = !(val & BIT(8)) + !(val & BIT(9)); 326 l3->subcaches[2] = sc2 = !(val & BIT(8)) + !(val & BIT(9));
323 sc3 = !(val & BIT(12)) + !(val & BIT(13)); 327 l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13));
324 328
325 return (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1; 329 l3->indices = (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1;
330}
331
332static struct amd_l3_cache * __cpuinit amd_init_l3_cache(int node)
333{
334 struct amd_l3_cache *l3;
335 struct pci_dev *dev = node_to_k8_nb_misc(node);
336
337 l3 = kzalloc(sizeof(struct amd_l3_cache), GFP_ATOMIC);
338 if (!l3) {
339 printk(KERN_WARNING "Error allocating L3 struct\n");
340 return NULL;
341 }
342
343 l3->dev = dev;
344
345 amd_calc_l3_indices(l3);
346
347 return l3;
326} 348}
327 349
328static void __cpuinit 350static void __cpuinit
329amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf) 351amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
330{ 352{
331 if (index < 3) 353 int node;
354
355 if (boot_cpu_data.x86 != 0x10)
332 return; 356 return;
333 357
334 if (boot_cpu_data.x86 == 0x11) 358 if (index < 3)
335 return; 359 return;
336 360
337 /* see errata #382 and #388 */ 361 /* see errata #382 and #388 */
338 if ((boot_cpu_data.x86 == 0x10) && 362 if (boot_cpu_data.x86_model < 0x8)
339 ((boot_cpu_data.x86_model < 0x8) || 363 return;
340 (boot_cpu_data.x86_mask < 0x1))) 364
365 if ((boot_cpu_data.x86_model == 0x8 ||
366 boot_cpu_data.x86_model == 0x9)
367 &&
368 boot_cpu_data.x86_mask < 0x1)
369 return;
370
371 /* not in virtualized environments */
372 if (num_k8_northbridges == 0)
341 return; 373 return;
342 374
343 this_leaf->can_disable = true; 375 /*
344 this_leaf->l3_indices = amd_calc_l3_indices(); 376 * Strictly speaking, the amount in @size below is leaked since it is
377 * never freed but this is done only on shutdown so it doesn't matter.
378 */
379 if (!l3_caches) {
380 int size = num_k8_northbridges * sizeof(struct amd_l3_cache *);
381
382 l3_caches = kzalloc(size, GFP_ATOMIC);
383 if (!l3_caches)
384 return;
385 }
386
387 node = amd_get_nb_id(smp_processor_id());
388
389 if (!l3_caches[node]) {
390 l3_caches[node] = amd_init_l3_cache(node);
391 l3_caches[node]->can_disable = true;
392 }
393
394 WARN_ON(!l3_caches[node]);
395
396 this_leaf->l3 = l3_caches[node];
345} 397}
346 398
347static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf, 399static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
348 unsigned int index) 400 unsigned int slot)
349{ 401{
350 int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); 402 struct pci_dev *dev = this_leaf->l3->dev;
351 int node = amd_get_nb_id(cpu);
352 struct pci_dev *dev = node_to_k8_nb_misc(node);
353 unsigned int reg = 0; 403 unsigned int reg = 0;
354 404
355 if (!this_leaf->can_disable) 405 if (!this_leaf->l3 || !this_leaf->l3->can_disable)
356 return -EINVAL; 406 return -EINVAL;
357 407
358 if (!dev) 408 if (!dev)
359 return -EINVAL; 409 return -EINVAL;
360 410
361 pci_read_config_dword(dev, 0x1BC + index * 4, &reg); 411 pci_read_config_dword(dev, 0x1BC + slot * 4, &reg);
362 return sprintf(buf, "0x%08x\n", reg); 412 return sprintf(buf, "0x%08x\n", reg);
363} 413}
364 414
365#define SHOW_CACHE_DISABLE(index) \ 415#define SHOW_CACHE_DISABLE(slot) \
366static ssize_t \ 416static ssize_t \
367show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf) \ 417show_cache_disable_##slot(struct _cpuid4_info *this_leaf, char *buf) \
368{ \ 418{ \
369 return show_cache_disable(this_leaf, buf, index); \ 419 return show_cache_disable(this_leaf, buf, slot); \
370} 420}
371SHOW_CACHE_DISABLE(0) 421SHOW_CACHE_DISABLE(0)
372SHOW_CACHE_DISABLE(1) 422SHOW_CACHE_DISABLE(1)
373 423
424static void amd_l3_disable_index(struct amd_l3_cache *l3, int cpu,
425 unsigned slot, unsigned long idx)
426{
427 int i;
428
429 idx |= BIT(30);
430
431 /*
432 * disable index in all 4 subcaches
433 */
434 for (i = 0; i < 4; i++) {
435 u32 reg = idx | (i << 20);
436
437 if (!l3->subcaches[i])
438 continue;
439
440 pci_write_config_dword(l3->dev, 0x1BC + slot * 4, reg);
441
442 /*
443 * We need to WBINVD on a core on the node containing the L3
444 * cache which indices we disable therefore a simple wbinvd()
445 * is not sufficient.
446 */
447 wbinvd_on_cpu(cpu);
448
449 reg |= BIT(31);
450 pci_write_config_dword(l3->dev, 0x1BC + slot * 4, reg);
451 }
452}
453
454
374static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf, 455static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
375 const char *buf, size_t count, unsigned int index) 456 const char *buf, size_t count,
457 unsigned int slot)
376{ 458{
459 struct pci_dev *dev = this_leaf->l3->dev;
377 int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); 460 int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
378 int node = amd_get_nb_id(cpu);
379 struct pci_dev *dev = node_to_k8_nb_misc(node);
380 unsigned long val = 0; 461 unsigned long val = 0;
381 462
382#define SUBCACHE_MASK (3UL << 20) 463#define SUBCACHE_MASK (3UL << 20)
383#define SUBCACHE_INDEX 0xfff 464#define SUBCACHE_INDEX 0xfff
384 465
385 if (!this_leaf->can_disable) 466 if (!this_leaf->l3 || !this_leaf->l3->can_disable)
386 return -EINVAL; 467 return -EINVAL;
387 468
388 if (!capable(CAP_SYS_ADMIN)) 469 if (!capable(CAP_SYS_ADMIN))
@@ -396,26 +477,20 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
396 477
397 /* do not allow writes outside of allowed bits */ 478 /* do not allow writes outside of allowed bits */
398 if ((val & ~(SUBCACHE_MASK | SUBCACHE_INDEX)) || 479 if ((val & ~(SUBCACHE_MASK | SUBCACHE_INDEX)) ||
399 ((val & SUBCACHE_INDEX) > this_leaf->l3_indices)) 480 ((val & SUBCACHE_INDEX) > this_leaf->l3->indices))
400 return -EINVAL; 481 return -EINVAL;
401 482
402 val |= BIT(30); 483 amd_l3_disable_index(this_leaf->l3, cpu, slot, val);
403 pci_write_config_dword(dev, 0x1BC + index * 4, val); 484
404 /*
405 * We need to WBINVD on a core on the node containing the L3 cache which
406 * indices we disable therefore a simple wbinvd() is not sufficient.
407 */
408 wbinvd_on_cpu(cpu);
409 pci_write_config_dword(dev, 0x1BC + index * 4, val | BIT(31));
410 return count; 485 return count;
411} 486}
412 487
413#define STORE_CACHE_DISABLE(index) \ 488#define STORE_CACHE_DISABLE(slot) \
414static ssize_t \ 489static ssize_t \
415store_cache_disable_##index(struct _cpuid4_info *this_leaf, \ 490store_cache_disable_##slot(struct _cpuid4_info *this_leaf, \
416 const char *buf, size_t count) \ 491 const char *buf, size_t count) \
417{ \ 492{ \
418 return store_cache_disable(this_leaf, buf, count, index); \ 493 return store_cache_disable(this_leaf, buf, count, slot); \
419} 494}
420STORE_CACHE_DISABLE(0) 495STORE_CACHE_DISABLE(0)
421STORE_CACHE_DISABLE(1) 496STORE_CACHE_DISABLE(1)
@@ -443,8 +518,7 @@ __cpuinit cpuid4_cache_lookup_regs(int index,
443 518
444 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { 519 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
445 amd_cpuid4(index, &eax, &ebx, &ecx); 520 amd_cpuid4(index, &eax, &ebx, &ecx);
446 if (boot_cpu_data.x86 >= 0x10) 521 amd_check_l3_disable(index, this_leaf);
447 amd_check_l3_disable(index, this_leaf);
448 } else { 522 } else {
449 cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx); 523 cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
450 } 524 }
@@ -701,6 +775,7 @@ static void __cpuinit free_cache_attributes(unsigned int cpu)
701 for (i = 0; i < num_cache_leaves; i++) 775 for (i = 0; i < num_cache_leaves; i++)
702 cache_remove_shared_cpu_map(cpu, i); 776 cache_remove_shared_cpu_map(cpu, i);
703 777
778 kfree(per_cpu(ici_cpuid4_info, cpu)->l3);
704 kfree(per_cpu(ici_cpuid4_info, cpu)); 779 kfree(per_cpu(ici_cpuid4_info, cpu));
705 per_cpu(ici_cpuid4_info, cpu) = NULL; 780 per_cpu(ici_cpuid4_info, cpu) = NULL;
706} 781}
@@ -985,7 +1060,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
985 1060
986 this_leaf = CPUID4_INFO_IDX(cpu, i); 1061 this_leaf = CPUID4_INFO_IDX(cpu, i);
987 1062
988 if (this_leaf->can_disable) 1063 if (this_leaf->l3 && this_leaf->l3->can_disable)
989 ktype_cache.default_attrs = default_l3_attrs; 1064 ktype_cache.default_attrs = default_l3_attrs;
990 else 1065 else
991 ktype_cache.default_attrs = default_attrs; 1066 ktype_cache.default_attrs = default_attrs;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 8a6f0afa767e..7a355ddcc64b 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -539,7 +539,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
539 struct mce m; 539 struct mce m;
540 int i; 540 int i;
541 541
542 __get_cpu_var(mce_poll_count)++; 542 percpu_inc(mce_poll_count);
543 543
544 mce_setup(&m); 544 mce_setup(&m);
545 545
@@ -934,7 +934,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
934 934
935 atomic_inc(&mce_entry); 935 atomic_inc(&mce_entry);
936 936
937 __get_cpu_var(mce_exception_count)++; 937 percpu_inc(mce_exception_count);
938 938
939 if (notify_die(DIE_NMI, "machine check", regs, error_code, 939 if (notify_die(DIE_NMI, "machine check", regs, error_code,
940 18, SIGKILL) == NOTIFY_STOP) 940 18, SIGKILL) == NOTIFY_STOP)
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
new file mode 100644
index 000000000000..16f41bbe46b6
--- /dev/null
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -0,0 +1,55 @@
1/*
2 * HyperV Detection code.
3 *
4 * Copyright (C) 2010, Novell, Inc.
5 * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 */
12
13#include <linux/types.h>
14#include <linux/module.h>
15#include <asm/processor.h>
16#include <asm/hypervisor.h>
17#include <asm/hyperv.h>
18#include <asm/mshyperv.h>
19
20struct ms_hyperv_info ms_hyperv;
21
22static bool __init ms_hyperv_platform(void)
23{
24 u32 eax;
25 u32 hyp_signature[3];
26
27 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
28 return false;
29
30 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
31 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
32
33 return eax >= HYPERV_CPUID_MIN &&
34 eax <= HYPERV_CPUID_MAX &&
35 !memcmp("Microsoft Hv", hyp_signature, 12);
36}
37
38static void __init ms_hyperv_init_platform(void)
39{
40 /*
41 * Extract the features and hints
42 */
43 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
44 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
45
46 printk(KERN_INFO "HyperV: features 0x%x, hints 0x%x\n",
47 ms_hyperv.features, ms_hyperv.hints);
48}
49
50const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
51 .name = "Microsoft HyperV",
52 .detect = ms_hyperv_platform,
53 .init_platform = ms_hyperv_init_platform,
54};
55EXPORT_SYMBOL(x86_hyper_ms_hyperv);
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index db5bdc8addf8..fd4db0db3708 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -31,46 +31,51 @@
31#include <asm/nmi.h> 31#include <asm/nmi.h>
32#include <asm/compat.h> 32#include <asm/compat.h>
33 33
34static u64 perf_event_mask __read_mostly; 34#if 0
35#undef wrmsrl
36#define wrmsrl(msr, val) \
37do { \
38 trace_printk("wrmsrl(%lx, %lx)\n", (unsigned long)(msr),\
39 (unsigned long)(val)); \
40 native_write_msr((msr), (u32)((u64)(val)), \
41 (u32)((u64)(val) >> 32)); \
42} while (0)
43#endif
35 44
36/* The maximal number of PEBS events: */ 45/*
37#define MAX_PEBS_EVENTS 4 46 * best effort, GUP based copy_from_user() that assumes IRQ or NMI context
47 */
48static unsigned long
49copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
50{
51 unsigned long offset, addr = (unsigned long)from;
52 int type = in_nmi() ? KM_NMI : KM_IRQ0;
53 unsigned long size, len = 0;
54 struct page *page;
55 void *map;
56 int ret;
38 57
39/* The size of a BTS record in bytes: */ 58 do {
40#define BTS_RECORD_SIZE 24 59 ret = __get_user_pages_fast(addr, 1, 0, &page);
60 if (!ret)
61 break;
41 62
42/* The size of a per-cpu BTS buffer in bytes: */ 63 offset = addr & (PAGE_SIZE - 1);
43#define BTS_BUFFER_SIZE (BTS_RECORD_SIZE * 2048) 64 size = min(PAGE_SIZE - offset, n - len);
44 65
45/* The BTS overflow threshold in bytes from the end of the buffer: */ 66 map = kmap_atomic(page, type);
46#define BTS_OVFL_TH (BTS_RECORD_SIZE * 128) 67 memcpy(to, map+offset, size);
68 kunmap_atomic(map, type);
69 put_page(page);
47 70
71 len += size;
72 to += size;
73 addr += size;
48 74
49/* 75 } while (len < n);
50 * Bits in the debugctlmsr controlling branch tracing.
51 */
52#define X86_DEBUGCTL_TR (1 << 6)
53#define X86_DEBUGCTL_BTS (1 << 7)
54#define X86_DEBUGCTL_BTINT (1 << 8)
55#define X86_DEBUGCTL_BTS_OFF_OS (1 << 9)
56#define X86_DEBUGCTL_BTS_OFF_USR (1 << 10)
57 76
58/* 77 return len;
59 * A debug store configuration. 78}
60 *
61 * We only support architectures that use 64bit fields.
62 */
63struct debug_store {
64 u64 bts_buffer_base;
65 u64 bts_index;
66 u64 bts_absolute_maximum;
67 u64 bts_interrupt_threshold;
68 u64 pebs_buffer_base;
69 u64 pebs_index;
70 u64 pebs_absolute_maximum;
71 u64 pebs_interrupt_threshold;
72 u64 pebs_event_reset[MAX_PEBS_EVENTS];
73};
74 79
75struct event_constraint { 80struct event_constraint {
76 union { 81 union {
@@ -89,18 +94,41 @@ struct amd_nb {
89 struct event_constraint event_constraints[X86_PMC_IDX_MAX]; 94 struct event_constraint event_constraints[X86_PMC_IDX_MAX];
90}; 95};
91 96
97#define MAX_LBR_ENTRIES 16
98
92struct cpu_hw_events { 99struct cpu_hw_events {
100 /*
101 * Generic x86 PMC bits
102 */
93 struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */ 103 struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */
94 unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; 104 unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
95 unsigned long interrupts;
96 int enabled; 105 int enabled;
97 struct debug_store *ds;
98 106
99 int n_events; 107 int n_events;
100 int n_added; 108 int n_added;
101 int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */ 109 int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */
102 u64 tags[X86_PMC_IDX_MAX]; 110 u64 tags[X86_PMC_IDX_MAX];
103 struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */ 111 struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */
112
113 unsigned int group_flag;
114
115 /*
116 * Intel DebugStore bits
117 */
118 struct debug_store *ds;
119 u64 pebs_enabled;
120
121 /*
122 * Intel LBR bits
123 */
124 int lbr_users;
125 void *lbr_context;
126 struct perf_branch_stack lbr_stack;
127 struct perf_branch_entry lbr_entries[MAX_LBR_ENTRIES];
128
129 /*
130 * AMD specific bits
131 */
104 struct amd_nb *amd_nb; 132 struct amd_nb *amd_nb;
105}; 133};
106 134
@@ -114,44 +142,75 @@ struct cpu_hw_events {
114#define EVENT_CONSTRAINT(c, n, m) \ 142#define EVENT_CONSTRAINT(c, n, m) \
115 __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n)) 143 __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n))
116 144
145/*
146 * Constraint on the Event code.
147 */
117#define INTEL_EVENT_CONSTRAINT(c, n) \ 148#define INTEL_EVENT_CONSTRAINT(c, n) \
118 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVTSEL_MASK) 149 EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT)
119 150
151/*
152 * Constraint on the Event code + UMask + fixed-mask
153 *
154 * filter mask to validate fixed counter events.
155 * the following filters disqualify for fixed counters:
156 * - inv
157 * - edge
158 * - cnt-mask
159 * The other filters are supported by fixed counters.
160 * The any-thread option is supported starting with v3.
161 */
120#define FIXED_EVENT_CONSTRAINT(c, n) \ 162#define FIXED_EVENT_CONSTRAINT(c, n) \
121 EVENT_CONSTRAINT(c, (1ULL << (32+n)), INTEL_ARCH_FIXED_MASK) 163 EVENT_CONSTRAINT(c, (1ULL << (32+n)), X86_RAW_EVENT_MASK)
164
165/*
166 * Constraint on the Event code + UMask
167 */
168#define PEBS_EVENT_CONSTRAINT(c, n) \
169 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
122 170
123#define EVENT_CONSTRAINT_END \ 171#define EVENT_CONSTRAINT_END \
124 EVENT_CONSTRAINT(0, 0, 0) 172 EVENT_CONSTRAINT(0, 0, 0)
125 173
126#define for_each_event_constraint(e, c) \ 174#define for_each_event_constraint(e, c) \
127 for ((e) = (c); (e)->cmask; (e)++) 175 for ((e) = (c); (e)->weight; (e)++)
176
177union perf_capabilities {
178 struct {
179 u64 lbr_format : 6;
180 u64 pebs_trap : 1;
181 u64 pebs_arch_reg : 1;
182 u64 pebs_format : 4;
183 u64 smm_freeze : 1;
184 };
185 u64 capabilities;
186};
128 187
129/* 188/*
130 * struct x86_pmu - generic x86 pmu 189 * struct x86_pmu - generic x86 pmu
131 */ 190 */
132struct x86_pmu { 191struct x86_pmu {
192 /*
193 * Generic x86 PMC bits
194 */
133 const char *name; 195 const char *name;
134 int version; 196 int version;
135 int (*handle_irq)(struct pt_regs *); 197 int (*handle_irq)(struct pt_regs *);
136 void (*disable_all)(void); 198 void (*disable_all)(void);
137 void (*enable_all)(void); 199 void (*enable_all)(int added);
138 void (*enable)(struct perf_event *); 200 void (*enable)(struct perf_event *);
139 void (*disable)(struct perf_event *); 201 void (*disable)(struct perf_event *);
202 int (*hw_config)(struct perf_event *event);
203 int (*schedule_events)(struct cpu_hw_events *cpuc, int n, int *assign);
140 unsigned eventsel; 204 unsigned eventsel;
141 unsigned perfctr; 205 unsigned perfctr;
142 u64 (*event_map)(int); 206 u64 (*event_map)(int);
143 u64 (*raw_event)(u64);
144 int max_events; 207 int max_events;
145 int num_events; 208 int num_counters;
146 int num_events_fixed; 209 int num_counters_fixed;
147 int event_bits; 210 int cntval_bits;
148 u64 event_mask; 211 u64 cntval_mask;
149 int apic; 212 int apic;
150 u64 max_period; 213 u64 max_period;
151 u64 intel_ctrl;
152 void (*enable_bts)(u64 config);
153 void (*disable_bts)(void);
154
155 struct event_constraint * 214 struct event_constraint *
156 (*get_event_constraints)(struct cpu_hw_events *cpuc, 215 (*get_event_constraints)(struct cpu_hw_events *cpuc,
157 struct perf_event *event); 216 struct perf_event *event);
@@ -159,11 +218,32 @@ struct x86_pmu {
159 void (*put_event_constraints)(struct cpu_hw_events *cpuc, 218 void (*put_event_constraints)(struct cpu_hw_events *cpuc,
160 struct perf_event *event); 219 struct perf_event *event);
161 struct event_constraint *event_constraints; 220 struct event_constraint *event_constraints;
221 void (*quirks)(void);
162 222
163 int (*cpu_prepare)(int cpu); 223 int (*cpu_prepare)(int cpu);
164 void (*cpu_starting)(int cpu); 224 void (*cpu_starting)(int cpu);
165 void (*cpu_dying)(int cpu); 225 void (*cpu_dying)(int cpu);
166 void (*cpu_dead)(int cpu); 226 void (*cpu_dead)(int cpu);
227
228 /*
229 * Intel Arch Perfmon v2+
230 */
231 u64 intel_ctrl;
232 union perf_capabilities intel_cap;
233
234 /*
235 * Intel DebugStore bits
236 */
237 int bts, pebs;
238 int pebs_record_size;
239 void (*drain_pebs)(struct pt_regs *regs);
240 struct event_constraint *pebs_constraints;
241
242 /*
243 * Intel LBR
244 */
245 unsigned long lbr_tos, lbr_from, lbr_to; /* MSR base regs */
246 int lbr_nr; /* hardware stack size */
167}; 247};
168 248
169static struct x86_pmu x86_pmu __read_mostly; 249static struct x86_pmu x86_pmu __read_mostly;
@@ -198,7 +278,7 @@ static u64
198x86_perf_event_update(struct perf_event *event) 278x86_perf_event_update(struct perf_event *event)
199{ 279{
200 struct hw_perf_event *hwc = &event->hw; 280 struct hw_perf_event *hwc = &event->hw;
201 int shift = 64 - x86_pmu.event_bits; 281 int shift = 64 - x86_pmu.cntval_bits;
202 u64 prev_raw_count, new_raw_count; 282 u64 prev_raw_count, new_raw_count;
203 int idx = hwc->idx; 283 int idx = hwc->idx;
204 s64 delta; 284 s64 delta;
@@ -241,33 +321,32 @@ again:
241static atomic_t active_events; 321static atomic_t active_events;
242static DEFINE_MUTEX(pmc_reserve_mutex); 322static DEFINE_MUTEX(pmc_reserve_mutex);
243 323
324#ifdef CONFIG_X86_LOCAL_APIC
325
244static bool reserve_pmc_hardware(void) 326static bool reserve_pmc_hardware(void)
245{ 327{
246#ifdef CONFIG_X86_LOCAL_APIC
247 int i; 328 int i;
248 329
249 if (nmi_watchdog == NMI_LOCAL_APIC) 330 if (nmi_watchdog == NMI_LOCAL_APIC)
250 disable_lapic_nmi_watchdog(); 331 disable_lapic_nmi_watchdog();
251 332
252 for (i = 0; i < x86_pmu.num_events; i++) { 333 for (i = 0; i < x86_pmu.num_counters; i++) {
253 if (!reserve_perfctr_nmi(x86_pmu.perfctr + i)) 334 if (!reserve_perfctr_nmi(x86_pmu.perfctr + i))
254 goto perfctr_fail; 335 goto perfctr_fail;
255 } 336 }
256 337
257 for (i = 0; i < x86_pmu.num_events; i++) { 338 for (i = 0; i < x86_pmu.num_counters; i++) {
258 if (!reserve_evntsel_nmi(x86_pmu.eventsel + i)) 339 if (!reserve_evntsel_nmi(x86_pmu.eventsel + i))
259 goto eventsel_fail; 340 goto eventsel_fail;
260 } 341 }
261#endif
262 342
263 return true; 343 return true;
264 344
265#ifdef CONFIG_X86_LOCAL_APIC
266eventsel_fail: 345eventsel_fail:
267 for (i--; i >= 0; i--) 346 for (i--; i >= 0; i--)
268 release_evntsel_nmi(x86_pmu.eventsel + i); 347 release_evntsel_nmi(x86_pmu.eventsel + i);
269 348
270 i = x86_pmu.num_events; 349 i = x86_pmu.num_counters;
271 350
272perfctr_fail: 351perfctr_fail:
273 for (i--; i >= 0; i--) 352 for (i--; i >= 0; i--)
@@ -277,128 +356,36 @@ perfctr_fail:
277 enable_lapic_nmi_watchdog(); 356 enable_lapic_nmi_watchdog();
278 357
279 return false; 358 return false;
280#endif
281} 359}
282 360
283static void release_pmc_hardware(void) 361static void release_pmc_hardware(void)
284{ 362{
285#ifdef CONFIG_X86_LOCAL_APIC
286 int i; 363 int i;
287 364
288 for (i = 0; i < x86_pmu.num_events; i++) { 365 for (i = 0; i < x86_pmu.num_counters; i++) {
289 release_perfctr_nmi(x86_pmu.perfctr + i); 366 release_perfctr_nmi(x86_pmu.perfctr + i);
290 release_evntsel_nmi(x86_pmu.eventsel + i); 367 release_evntsel_nmi(x86_pmu.eventsel + i);
291 } 368 }
292 369
293 if (nmi_watchdog == NMI_LOCAL_APIC) 370 if (nmi_watchdog == NMI_LOCAL_APIC)
294 enable_lapic_nmi_watchdog(); 371 enable_lapic_nmi_watchdog();
295#endif
296}
297
298static inline bool bts_available(void)
299{
300 return x86_pmu.enable_bts != NULL;
301} 372}
302 373
303static void init_debug_store_on_cpu(int cpu) 374#else
304{
305 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
306
307 if (!ds)
308 return;
309
310 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA,
311 (u32)((u64)(unsigned long)ds),
312 (u32)((u64)(unsigned long)ds >> 32));
313}
314
315static void fini_debug_store_on_cpu(int cpu)
316{
317 if (!per_cpu(cpu_hw_events, cpu).ds)
318 return;
319
320 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 0, 0);
321}
322
323static void release_bts_hardware(void)
324{
325 int cpu;
326
327 if (!bts_available())
328 return;
329
330 get_online_cpus();
331
332 for_each_online_cpu(cpu)
333 fini_debug_store_on_cpu(cpu);
334
335 for_each_possible_cpu(cpu) {
336 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
337
338 if (!ds)
339 continue;
340
341 per_cpu(cpu_hw_events, cpu).ds = NULL;
342
343 kfree((void *)(unsigned long)ds->bts_buffer_base);
344 kfree(ds);
345 }
346
347 put_online_cpus();
348}
349
350static int reserve_bts_hardware(void)
351{
352 int cpu, err = 0;
353
354 if (!bts_available())
355 return 0;
356
357 get_online_cpus();
358
359 for_each_possible_cpu(cpu) {
360 struct debug_store *ds;
361 void *buffer;
362
363 err = -ENOMEM;
364 buffer = kzalloc(BTS_BUFFER_SIZE, GFP_KERNEL);
365 if (unlikely(!buffer))
366 break;
367
368 ds = kzalloc(sizeof(*ds), GFP_KERNEL);
369 if (unlikely(!ds)) {
370 kfree(buffer);
371 break;
372 }
373
374 ds->bts_buffer_base = (u64)(unsigned long)buffer;
375 ds->bts_index = ds->bts_buffer_base;
376 ds->bts_absolute_maximum =
377 ds->bts_buffer_base + BTS_BUFFER_SIZE;
378 ds->bts_interrupt_threshold =
379 ds->bts_absolute_maximum - BTS_OVFL_TH;
380
381 per_cpu(cpu_hw_events, cpu).ds = ds;
382 err = 0;
383 }
384 375
385 if (err) 376static bool reserve_pmc_hardware(void) { return true; }
386 release_bts_hardware(); 377static void release_pmc_hardware(void) {}
387 else {
388 for_each_online_cpu(cpu)
389 init_debug_store_on_cpu(cpu);
390 }
391 378
392 put_online_cpus(); 379#endif
393 380
394 return err; 381static int reserve_ds_buffers(void);
395} 382static void release_ds_buffers(void);
396 383
397static void hw_perf_event_destroy(struct perf_event *event) 384static void hw_perf_event_destroy(struct perf_event *event)
398{ 385{
399 if (atomic_dec_and_mutex_lock(&active_events, &pmc_reserve_mutex)) { 386 if (atomic_dec_and_mutex_lock(&active_events, &pmc_reserve_mutex)) {
400 release_pmc_hardware(); 387 release_pmc_hardware();
401 release_bts_hardware(); 388 release_ds_buffers();
402 mutex_unlock(&pmc_reserve_mutex); 389 mutex_unlock(&pmc_reserve_mutex);
403 } 390 }
404} 391}
@@ -441,54 +428,11 @@ set_ext_hw_attr(struct hw_perf_event *hwc, struct perf_event_attr *attr)
441 return 0; 428 return 0;
442} 429}
443 430
444/* 431static int x86_setup_perfctr(struct perf_event *event)
445 * Setup the hardware configuration for a given attr_type
446 */
447static int __hw_perf_event_init(struct perf_event *event)
448{ 432{
449 struct perf_event_attr *attr = &event->attr; 433 struct perf_event_attr *attr = &event->attr;
450 struct hw_perf_event *hwc = &event->hw; 434 struct hw_perf_event *hwc = &event->hw;
451 u64 config; 435 u64 config;
452 int err;
453
454 if (!x86_pmu_initialized())
455 return -ENODEV;
456
457 err = 0;
458 if (!atomic_inc_not_zero(&active_events)) {
459 mutex_lock(&pmc_reserve_mutex);
460 if (atomic_read(&active_events) == 0) {
461 if (!reserve_pmc_hardware())
462 err = -EBUSY;
463 else
464 err = reserve_bts_hardware();
465 }
466 if (!err)
467 atomic_inc(&active_events);
468 mutex_unlock(&pmc_reserve_mutex);
469 }
470 if (err)
471 return err;
472
473 event->destroy = hw_perf_event_destroy;
474
475 /*
476 * Generate PMC IRQs:
477 * (keep 'enabled' bit clear for now)
478 */
479 hwc->config = ARCH_PERFMON_EVENTSEL_INT;
480
481 hwc->idx = -1;
482 hwc->last_cpu = -1;
483 hwc->last_tag = ~0ULL;
484
485 /*
486 * Count user and OS events unless requested not to.
487 */
488 if (!attr->exclude_user)
489 hwc->config |= ARCH_PERFMON_EVENTSEL_USR;
490 if (!attr->exclude_kernel)
491 hwc->config |= ARCH_PERFMON_EVENTSEL_OS;
492 436
493 if (!hwc->sample_period) { 437 if (!hwc->sample_period) {
494 hwc->sample_period = x86_pmu.max_period; 438 hwc->sample_period = x86_pmu.max_period;
@@ -505,16 +449,8 @@ static int __hw_perf_event_init(struct perf_event *event)
505 return -EOPNOTSUPP; 449 return -EOPNOTSUPP;
506 } 450 }
507 451
508 /* 452 if (attr->type == PERF_TYPE_RAW)
509 * Raw hw_event type provide the config in the hw_event structure
510 */
511 if (attr->type == PERF_TYPE_RAW) {
512 hwc->config |= x86_pmu.raw_event(attr->config);
513 if ((hwc->config & ARCH_PERFMON_EVENTSEL_ANY) &&
514 perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
515 return -EACCES;
516 return 0; 453 return 0;
517 }
518 454
519 if (attr->type == PERF_TYPE_HW_CACHE) 455 if (attr->type == PERF_TYPE_HW_CACHE)
520 return set_ext_hw_attr(hwc, attr); 456 return set_ext_hw_attr(hwc, attr);
@@ -539,11 +475,11 @@ static int __hw_perf_event_init(struct perf_event *event)
539 if ((attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) && 475 if ((attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) &&
540 (hwc->sample_period == 1)) { 476 (hwc->sample_period == 1)) {
541 /* BTS is not supported by this architecture. */ 477 /* BTS is not supported by this architecture. */
542 if (!bts_available()) 478 if (!x86_pmu.bts)
543 return -EOPNOTSUPP; 479 return -EOPNOTSUPP;
544 480
545 /* BTS is currently only allowed for user-mode. */ 481 /* BTS is currently only allowed for user-mode. */
546 if (hwc->config & ARCH_PERFMON_EVENTSEL_OS) 482 if (!attr->exclude_kernel)
547 return -EOPNOTSUPP; 483 return -EOPNOTSUPP;
548 } 484 }
549 485
@@ -552,12 +488,87 @@ static int __hw_perf_event_init(struct perf_event *event)
552 return 0; 488 return 0;
553} 489}
554 490
491static int x86_pmu_hw_config(struct perf_event *event)
492{
493 if (event->attr.precise_ip) {
494 int precise = 0;
495
496 /* Support for constant skid */
497 if (x86_pmu.pebs)
498 precise++;
499
500 /* Support for IP fixup */
501 if (x86_pmu.lbr_nr)
502 precise++;
503
504 if (event->attr.precise_ip > precise)
505 return -EOPNOTSUPP;
506 }
507
508 /*
509 * Generate PMC IRQs:
510 * (keep 'enabled' bit clear for now)
511 */
512 event->hw.config = ARCH_PERFMON_EVENTSEL_INT;
513
514 /*
515 * Count user and OS events unless requested not to
516 */
517 if (!event->attr.exclude_user)
518 event->hw.config |= ARCH_PERFMON_EVENTSEL_USR;
519 if (!event->attr.exclude_kernel)
520 event->hw.config |= ARCH_PERFMON_EVENTSEL_OS;
521
522 if (event->attr.type == PERF_TYPE_RAW)
523 event->hw.config |= event->attr.config & X86_RAW_EVENT_MASK;
524
525 return x86_setup_perfctr(event);
526}
527
528/*
529 * Setup the hardware configuration for a given attr_type
530 */
531static int __hw_perf_event_init(struct perf_event *event)
532{
533 int err;
534
535 if (!x86_pmu_initialized())
536 return -ENODEV;
537
538 err = 0;
539 if (!atomic_inc_not_zero(&active_events)) {
540 mutex_lock(&pmc_reserve_mutex);
541 if (atomic_read(&active_events) == 0) {
542 if (!reserve_pmc_hardware())
543 err = -EBUSY;
544 else {
545 err = reserve_ds_buffers();
546 if (err)
547 release_pmc_hardware();
548 }
549 }
550 if (!err)
551 atomic_inc(&active_events);
552 mutex_unlock(&pmc_reserve_mutex);
553 }
554 if (err)
555 return err;
556
557 event->destroy = hw_perf_event_destroy;
558
559 event->hw.idx = -1;
560 event->hw.last_cpu = -1;
561 event->hw.last_tag = ~0ULL;
562
563 return x86_pmu.hw_config(event);
564}
565
555static void x86_pmu_disable_all(void) 566static void x86_pmu_disable_all(void)
556{ 567{
557 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 568 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
558 int idx; 569 int idx;
559 570
560 for (idx = 0; idx < x86_pmu.num_events; idx++) { 571 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
561 u64 val; 572 u64 val;
562 573
563 if (!test_bit(idx, cpuc->active_mask)) 574 if (!test_bit(idx, cpuc->active_mask))
@@ -587,12 +598,12 @@ void hw_perf_disable(void)
587 x86_pmu.disable_all(); 598 x86_pmu.disable_all();
588} 599}
589 600
590static void x86_pmu_enable_all(void) 601static void x86_pmu_enable_all(int added)
591{ 602{
592 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 603 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
593 int idx; 604 int idx;
594 605
595 for (idx = 0; idx < x86_pmu.num_events; idx++) { 606 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
596 struct perf_event *event = cpuc->events[idx]; 607 struct perf_event *event = cpuc->events[idx];
597 u64 val; 608 u64 val;
598 609
@@ -667,14 +678,14 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
667 * assign events to counters starting with most 678 * assign events to counters starting with most
668 * constrained events. 679 * constrained events.
669 */ 680 */
670 wmax = x86_pmu.num_events; 681 wmax = x86_pmu.num_counters;
671 682
672 /* 683 /*
673 * when fixed event counters are present, 684 * when fixed event counters are present,
674 * wmax is incremented by 1 to account 685 * wmax is incremented by 1 to account
675 * for one more choice 686 * for one more choice
676 */ 687 */
677 if (x86_pmu.num_events_fixed) 688 if (x86_pmu.num_counters_fixed)
678 wmax++; 689 wmax++;
679 690
680 for (w = 1, num = n; num && w <= wmax; w++) { 691 for (w = 1, num = n; num && w <= wmax; w++) {
@@ -724,7 +735,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
724 struct perf_event *event; 735 struct perf_event *event;
725 int n, max_count; 736 int n, max_count;
726 737
727 max_count = x86_pmu.num_events + x86_pmu.num_events_fixed; 738 max_count = x86_pmu.num_counters + x86_pmu.num_counters_fixed;
728 739
729 /* current number of events already accepted */ 740 /* current number of events already accepted */
730 n = cpuc->n_events; 741 n = cpuc->n_events;
@@ -795,7 +806,7 @@ void hw_perf_enable(void)
795 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 806 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
796 struct perf_event *event; 807 struct perf_event *event;
797 struct hw_perf_event *hwc; 808 struct hw_perf_event *hwc;
798 int i; 809 int i, added = cpuc->n_added;
799 810
800 if (!x86_pmu_initialized()) 811 if (!x86_pmu_initialized())
801 return; 812 return;
@@ -847,19 +858,20 @@ void hw_perf_enable(void)
847 cpuc->enabled = 1; 858 cpuc->enabled = 1;
848 barrier(); 859 barrier();
849 860
850 x86_pmu.enable_all(); 861 x86_pmu.enable_all(added);
851} 862}
852 863
853static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc) 864static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
865 u64 enable_mask)
854{ 866{
855 (void)checking_wrmsrl(hwc->config_base + hwc->idx, 867 wrmsrl(hwc->config_base + hwc->idx, hwc->config | enable_mask);
856 hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE);
857} 868}
858 869
859static inline void x86_pmu_disable_event(struct perf_event *event) 870static inline void x86_pmu_disable_event(struct perf_event *event)
860{ 871{
861 struct hw_perf_event *hwc = &event->hw; 872 struct hw_perf_event *hwc = &event->hw;
862 (void)checking_wrmsrl(hwc->config_base + hwc->idx, hwc->config); 873
874 wrmsrl(hwc->config_base + hwc->idx, hwc->config);
863} 875}
864 876
865static DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left); 877static DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left);
@@ -874,7 +886,7 @@ x86_perf_event_set_period(struct perf_event *event)
874 struct hw_perf_event *hwc = &event->hw; 886 struct hw_perf_event *hwc = &event->hw;
875 s64 left = atomic64_read(&hwc->period_left); 887 s64 left = atomic64_read(&hwc->period_left);
876 s64 period = hwc->sample_period; 888 s64 period = hwc->sample_period;
877 int err, ret = 0, idx = hwc->idx; 889 int ret = 0, idx = hwc->idx;
878 890
879 if (idx == X86_PMC_IDX_FIXED_BTS) 891 if (idx == X86_PMC_IDX_FIXED_BTS)
880 return 0; 892 return 0;
@@ -912,8 +924,8 @@ x86_perf_event_set_period(struct perf_event *event)
912 */ 924 */
913 atomic64_set(&hwc->prev_count, (u64)-left); 925 atomic64_set(&hwc->prev_count, (u64)-left);
914 926
915 err = checking_wrmsrl(hwc->event_base + idx, 927 wrmsrl(hwc->event_base + idx,
916 (u64)(-left) & x86_pmu.event_mask); 928 (u64)(-left) & x86_pmu.cntval_mask);
917 929
918 perf_event_update_userpage(event); 930 perf_event_update_userpage(event);
919 931
@@ -924,7 +936,8 @@ static void x86_pmu_enable_event(struct perf_event *event)
924{ 936{
925 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 937 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
926 if (cpuc->enabled) 938 if (cpuc->enabled)
927 __x86_pmu_enable_event(&event->hw); 939 __x86_pmu_enable_event(&event->hw,
940 ARCH_PERFMON_EVENTSEL_ENABLE);
928} 941}
929 942
930/* 943/*
@@ -950,7 +963,15 @@ static int x86_pmu_enable(struct perf_event *event)
950 if (n < 0) 963 if (n < 0)
951 return n; 964 return n;
952 965
953 ret = x86_schedule_events(cpuc, n, assign); 966 /*
967 * If group events scheduling transaction was started,
968 * skip the schedulability test here, it will be peformed
969 * at commit time(->commit_txn) as a whole
970 */
971 if (cpuc->group_flag & PERF_EVENT_TXN_STARTED)
972 goto out;
973
974 ret = x86_pmu.schedule_events(cpuc, n, assign);
954 if (ret) 975 if (ret)
955 return ret; 976 return ret;
956 /* 977 /*
@@ -959,6 +980,7 @@ static int x86_pmu_enable(struct perf_event *event)
959 */ 980 */
960 memcpy(cpuc->assign, assign, n*sizeof(int)); 981 memcpy(cpuc->assign, assign, n*sizeof(int));
961 982
983out:
962 cpuc->n_events = n; 984 cpuc->n_events = n;
963 cpuc->n_added += n - n0; 985 cpuc->n_added += n - n0;
964 986
@@ -991,11 +1013,12 @@ static void x86_pmu_unthrottle(struct perf_event *event)
991void perf_event_print_debug(void) 1013void perf_event_print_debug(void)
992{ 1014{
993 u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed; 1015 u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed;
1016 u64 pebs;
994 struct cpu_hw_events *cpuc; 1017 struct cpu_hw_events *cpuc;
995 unsigned long flags; 1018 unsigned long flags;
996 int cpu, idx; 1019 int cpu, idx;
997 1020
998 if (!x86_pmu.num_events) 1021 if (!x86_pmu.num_counters)
999 return; 1022 return;
1000 1023
1001 local_irq_save(flags); 1024 local_irq_save(flags);
@@ -1008,16 +1031,18 @@ void perf_event_print_debug(void)
1008 rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status); 1031 rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);
1009 rdmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow); 1032 rdmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow);
1010 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed); 1033 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed);
1034 rdmsrl(MSR_IA32_PEBS_ENABLE, pebs);
1011 1035
1012 pr_info("\n"); 1036 pr_info("\n");
1013 pr_info("CPU#%d: ctrl: %016llx\n", cpu, ctrl); 1037 pr_info("CPU#%d: ctrl: %016llx\n", cpu, ctrl);
1014 pr_info("CPU#%d: status: %016llx\n", cpu, status); 1038 pr_info("CPU#%d: status: %016llx\n", cpu, status);
1015 pr_info("CPU#%d: overflow: %016llx\n", cpu, overflow); 1039 pr_info("CPU#%d: overflow: %016llx\n", cpu, overflow);
1016 pr_info("CPU#%d: fixed: %016llx\n", cpu, fixed); 1040 pr_info("CPU#%d: fixed: %016llx\n", cpu, fixed);
1041 pr_info("CPU#%d: pebs: %016llx\n", cpu, pebs);
1017 } 1042 }
1018 pr_info("CPU#%d: active: %016llx\n", cpu, *(u64 *)cpuc->active_mask); 1043 pr_info("CPU#%d: active: %016llx\n", cpu, *(u64 *)cpuc->active_mask);
1019 1044
1020 for (idx = 0; idx < x86_pmu.num_events; idx++) { 1045 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
1021 rdmsrl(x86_pmu.eventsel + idx, pmc_ctrl); 1046 rdmsrl(x86_pmu.eventsel + idx, pmc_ctrl);
1022 rdmsrl(x86_pmu.perfctr + idx, pmc_count); 1047 rdmsrl(x86_pmu.perfctr + idx, pmc_count);
1023 1048
@@ -1030,7 +1055,7 @@ void perf_event_print_debug(void)
1030 pr_info("CPU#%d: gen-PMC%d left: %016llx\n", 1055 pr_info("CPU#%d: gen-PMC%d left: %016llx\n",
1031 cpu, idx, prev_left); 1056 cpu, idx, prev_left);
1032 } 1057 }
1033 for (idx = 0; idx < x86_pmu.num_events_fixed; idx++) { 1058 for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++) {
1034 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count); 1059 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count);
1035 1060
1036 pr_info("CPU#%d: fixed-PMC%d count: %016llx\n", 1061 pr_info("CPU#%d: fixed-PMC%d count: %016llx\n",
@@ -1095,7 +1120,7 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
1095 1120
1096 cpuc = &__get_cpu_var(cpu_hw_events); 1121 cpuc = &__get_cpu_var(cpu_hw_events);
1097 1122
1098 for (idx = 0; idx < x86_pmu.num_events; idx++) { 1123 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
1099 if (!test_bit(idx, cpuc->active_mask)) 1124 if (!test_bit(idx, cpuc->active_mask))
1100 continue; 1125 continue;
1101 1126
@@ -1103,7 +1128,7 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
1103 hwc = &event->hw; 1128 hwc = &event->hw;
1104 1129
1105 val = x86_perf_event_update(event); 1130 val = x86_perf_event_update(event);
1106 if (val & (1ULL << (x86_pmu.event_bits - 1))) 1131 if (val & (1ULL << (x86_pmu.cntval_bits - 1)))
1107 continue; 1132 continue;
1108 1133
1109 /* 1134 /*
@@ -1146,7 +1171,6 @@ void set_perf_event_pending(void)
1146 1171
1147void perf_events_lapic_init(void) 1172void perf_events_lapic_init(void)
1148{ 1173{
1149#ifdef CONFIG_X86_LOCAL_APIC
1150 if (!x86_pmu.apic || !x86_pmu_initialized()) 1174 if (!x86_pmu.apic || !x86_pmu_initialized())
1151 return; 1175 return;
1152 1176
@@ -1154,7 +1178,6 @@ void perf_events_lapic_init(void)
1154 * Always use NMI for PMU 1178 * Always use NMI for PMU
1155 */ 1179 */
1156 apic_write(APIC_LVTPC, APIC_DM_NMI); 1180 apic_write(APIC_LVTPC, APIC_DM_NMI);
1157#endif
1158} 1181}
1159 1182
1160static int __kprobes 1183static int __kprobes
@@ -1178,9 +1201,7 @@ perf_event_nmi_handler(struct notifier_block *self,
1178 1201
1179 regs = args->regs; 1202 regs = args->regs;
1180 1203
1181#ifdef CONFIG_X86_LOCAL_APIC
1182 apic_write(APIC_LVTPC, APIC_DM_NMI); 1204 apic_write(APIC_LVTPC, APIC_DM_NMI);
1183#endif
1184 /* 1205 /*
1185 * Can't rely on the handled return value to say it was our NMI, two 1206 * Can't rely on the handled return value to say it was our NMI, two
1186 * events could trigger 'simultaneously' raising two back-to-back NMIs. 1207 * events could trigger 'simultaneously' raising two back-to-back NMIs.
@@ -1217,118 +1238,11 @@ x86_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
1217 return &unconstrained; 1238 return &unconstrained;
1218} 1239}
1219 1240
1220static int x86_event_sched_in(struct perf_event *event,
1221 struct perf_cpu_context *cpuctx)
1222{
1223 int ret = 0;
1224
1225 event->state = PERF_EVENT_STATE_ACTIVE;
1226 event->oncpu = smp_processor_id();
1227 event->tstamp_running += event->ctx->time - event->tstamp_stopped;
1228
1229 if (!is_x86_event(event))
1230 ret = event->pmu->enable(event);
1231
1232 if (!ret && !is_software_event(event))
1233 cpuctx->active_oncpu++;
1234
1235 if (!ret && event->attr.exclusive)
1236 cpuctx->exclusive = 1;
1237
1238 return ret;
1239}
1240
1241static void x86_event_sched_out(struct perf_event *event,
1242 struct perf_cpu_context *cpuctx)
1243{
1244 event->state = PERF_EVENT_STATE_INACTIVE;
1245 event->oncpu = -1;
1246
1247 if (!is_x86_event(event))
1248 event->pmu->disable(event);
1249
1250 event->tstamp_running -= event->ctx->time - event->tstamp_stopped;
1251
1252 if (!is_software_event(event))
1253 cpuctx->active_oncpu--;
1254
1255 if (event->attr.exclusive || !cpuctx->active_oncpu)
1256 cpuctx->exclusive = 0;
1257}
1258
1259/*
1260 * Called to enable a whole group of events.
1261 * Returns 1 if the group was enabled, or -EAGAIN if it could not be.
1262 * Assumes the caller has disabled interrupts and has
1263 * frozen the PMU with hw_perf_save_disable.
1264 *
1265 * called with PMU disabled. If successful and return value 1,
1266 * then guaranteed to call perf_enable() and hw_perf_enable()
1267 */
1268int hw_perf_group_sched_in(struct perf_event *leader,
1269 struct perf_cpu_context *cpuctx,
1270 struct perf_event_context *ctx)
1271{
1272 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
1273 struct perf_event *sub;
1274 int assign[X86_PMC_IDX_MAX];
1275 int n0, n1, ret;
1276
1277 /* n0 = total number of events */
1278 n0 = collect_events(cpuc, leader, true);
1279 if (n0 < 0)
1280 return n0;
1281
1282 ret = x86_schedule_events(cpuc, n0, assign);
1283 if (ret)
1284 return ret;
1285
1286 ret = x86_event_sched_in(leader, cpuctx);
1287 if (ret)
1288 return ret;
1289
1290 n1 = 1;
1291 list_for_each_entry(sub, &leader->sibling_list, group_entry) {
1292 if (sub->state > PERF_EVENT_STATE_OFF) {
1293 ret = x86_event_sched_in(sub, cpuctx);
1294 if (ret)
1295 goto undo;
1296 ++n1;
1297 }
1298 }
1299 /*
1300 * copy new assignment, now we know it is possible
1301 * will be used by hw_perf_enable()
1302 */
1303 memcpy(cpuc->assign, assign, n0*sizeof(int));
1304
1305 cpuc->n_events = n0;
1306 cpuc->n_added += n1;
1307 ctx->nr_active += n1;
1308
1309 /*
1310 * 1 means successful and events are active
1311 * This is not quite true because we defer
1312 * actual activation until hw_perf_enable() but
1313 * this way we* ensure caller won't try to enable
1314 * individual events
1315 */
1316 return 1;
1317undo:
1318 x86_event_sched_out(leader, cpuctx);
1319 n0 = 1;
1320 list_for_each_entry(sub, &leader->sibling_list, group_entry) {
1321 if (sub->state == PERF_EVENT_STATE_ACTIVE) {
1322 x86_event_sched_out(sub, cpuctx);
1323 if (++n0 == n1)
1324 break;
1325 }
1326 }
1327 return ret;
1328}
1329
1330#include "perf_event_amd.c" 1241#include "perf_event_amd.c"
1331#include "perf_event_p6.c" 1242#include "perf_event_p6.c"
1243#include "perf_event_p4.c"
1244#include "perf_event_intel_lbr.c"
1245#include "perf_event_intel_ds.c"
1332#include "perf_event_intel.c" 1246#include "perf_event_intel.c"
1333 1247
1334static int __cpuinit 1248static int __cpuinit
@@ -1402,48 +1316,50 @@ void __init init_hw_perf_events(void)
1402 1316
1403 pr_cont("%s PMU driver.\n", x86_pmu.name); 1317 pr_cont("%s PMU driver.\n", x86_pmu.name);
1404 1318
1405 if (x86_pmu.num_events > X86_PMC_MAX_GENERIC) { 1319 if (x86_pmu.quirks)
1320 x86_pmu.quirks();
1321
1322 if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) {
1406 WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!", 1323 WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!",
1407 x86_pmu.num_events, X86_PMC_MAX_GENERIC); 1324 x86_pmu.num_counters, X86_PMC_MAX_GENERIC);
1408 x86_pmu.num_events = X86_PMC_MAX_GENERIC; 1325 x86_pmu.num_counters = X86_PMC_MAX_GENERIC;
1409 } 1326 }
1410 perf_event_mask = (1 << x86_pmu.num_events) - 1; 1327 x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1;
1411 perf_max_events = x86_pmu.num_events; 1328 perf_max_events = x86_pmu.num_counters;
1412 1329
1413 if (x86_pmu.num_events_fixed > X86_PMC_MAX_FIXED) { 1330 if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) {
1414 WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!", 1331 WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",
1415 x86_pmu.num_events_fixed, X86_PMC_MAX_FIXED); 1332 x86_pmu.num_counters_fixed, X86_PMC_MAX_FIXED);
1416 x86_pmu.num_events_fixed = X86_PMC_MAX_FIXED; 1333 x86_pmu.num_counters_fixed = X86_PMC_MAX_FIXED;
1417 } 1334 }
1418 1335
1419 perf_event_mask |= 1336 x86_pmu.intel_ctrl |=
1420 ((1LL << x86_pmu.num_events_fixed)-1) << X86_PMC_IDX_FIXED; 1337 ((1LL << x86_pmu.num_counters_fixed)-1) << X86_PMC_IDX_FIXED;
1421 x86_pmu.intel_ctrl = perf_event_mask;
1422 1338
1423 perf_events_lapic_init(); 1339 perf_events_lapic_init();
1424 register_die_notifier(&perf_event_nmi_notifier); 1340 register_die_notifier(&perf_event_nmi_notifier);
1425 1341
1426 unconstrained = (struct event_constraint) 1342 unconstrained = (struct event_constraint)
1427 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_events) - 1, 1343 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_counters) - 1,
1428 0, x86_pmu.num_events); 1344 0, x86_pmu.num_counters);
1429 1345
1430 if (x86_pmu.event_constraints) { 1346 if (x86_pmu.event_constraints) {
1431 for_each_event_constraint(c, x86_pmu.event_constraints) { 1347 for_each_event_constraint(c, x86_pmu.event_constraints) {
1432 if (c->cmask != INTEL_ARCH_FIXED_MASK) 1348 if (c->cmask != X86_RAW_EVENT_MASK)
1433 continue; 1349 continue;
1434 1350
1435 c->idxmsk64 |= (1ULL << x86_pmu.num_events) - 1; 1351 c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1;
1436 c->weight += x86_pmu.num_events; 1352 c->weight += x86_pmu.num_counters;
1437 } 1353 }
1438 } 1354 }
1439 1355
1440 pr_info("... version: %d\n", x86_pmu.version); 1356 pr_info("... version: %d\n", x86_pmu.version);
1441 pr_info("... bit width: %d\n", x86_pmu.event_bits); 1357 pr_info("... bit width: %d\n", x86_pmu.cntval_bits);
1442 pr_info("... generic registers: %d\n", x86_pmu.num_events); 1358 pr_info("... generic registers: %d\n", x86_pmu.num_counters);
1443 pr_info("... value mask: %016Lx\n", x86_pmu.event_mask); 1359 pr_info("... value mask: %016Lx\n", x86_pmu.cntval_mask);
1444 pr_info("... max period: %016Lx\n", x86_pmu.max_period); 1360 pr_info("... max period: %016Lx\n", x86_pmu.max_period);
1445 pr_info("... fixed-purpose events: %d\n", x86_pmu.num_events_fixed); 1361 pr_info("... fixed-purpose events: %d\n", x86_pmu.num_counters_fixed);
1446 pr_info("... event mask: %016Lx\n", perf_event_mask); 1362 pr_info("... event mask: %016Lx\n", x86_pmu.intel_ctrl);
1447 1363
1448 perf_cpu_notifier(x86_pmu_notifier); 1364 perf_cpu_notifier(x86_pmu_notifier);
1449} 1365}
@@ -1453,6 +1369,59 @@ static inline void x86_pmu_read(struct perf_event *event)
1453 x86_perf_event_update(event); 1369 x86_perf_event_update(event);
1454} 1370}
1455 1371
1372/*
1373 * Start group events scheduling transaction
1374 * Set the flag to make pmu::enable() not perform the
1375 * schedulability test, it will be performed at commit time
1376 */
1377static void x86_pmu_start_txn(const struct pmu *pmu)
1378{
1379 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
1380
1381 cpuc->group_flag |= PERF_EVENT_TXN_STARTED;
1382}
1383
1384/*
1385 * Stop group events scheduling transaction
1386 * Clear the flag and pmu::enable() will perform the
1387 * schedulability test.
1388 */
1389static void x86_pmu_cancel_txn(const struct pmu *pmu)
1390{
1391 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
1392
1393 cpuc->group_flag &= ~PERF_EVENT_TXN_STARTED;
1394}
1395
1396/*
1397 * Commit group events scheduling transaction
1398 * Perform the group schedulability test as a whole
1399 * Return 0 if success
1400 */
1401static int x86_pmu_commit_txn(const struct pmu *pmu)
1402{
1403 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
1404 int assign[X86_PMC_IDX_MAX];
1405 int n, ret;
1406
1407 n = cpuc->n_events;
1408
1409 if (!x86_pmu_initialized())
1410 return -EAGAIN;
1411
1412 ret = x86_pmu.schedule_events(cpuc, n, assign);
1413 if (ret)
1414 return ret;
1415
1416 /*
1417 * copy new assignment, now we know it is possible
1418 * will be used by hw_perf_enable()
1419 */
1420 memcpy(cpuc->assign, assign, n*sizeof(int));
1421
1422 return 0;
1423}
1424
1456static const struct pmu pmu = { 1425static const struct pmu pmu = {
1457 .enable = x86_pmu_enable, 1426 .enable = x86_pmu_enable,
1458 .disable = x86_pmu_disable, 1427 .disable = x86_pmu_disable,
@@ -1460,9 +1429,38 @@ static const struct pmu pmu = {
1460 .stop = x86_pmu_stop, 1429 .stop = x86_pmu_stop,
1461 .read = x86_pmu_read, 1430 .read = x86_pmu_read,
1462 .unthrottle = x86_pmu_unthrottle, 1431 .unthrottle = x86_pmu_unthrottle,
1432 .start_txn = x86_pmu_start_txn,
1433 .cancel_txn = x86_pmu_cancel_txn,
1434 .commit_txn = x86_pmu_commit_txn,
1463}; 1435};
1464 1436
1465/* 1437/*
1438 * validate that we can schedule this event
1439 */
1440static int validate_event(struct perf_event *event)
1441{
1442 struct cpu_hw_events *fake_cpuc;
1443 struct event_constraint *c;
1444 int ret = 0;
1445
1446 fake_cpuc = kmalloc(sizeof(*fake_cpuc), GFP_KERNEL | __GFP_ZERO);
1447 if (!fake_cpuc)
1448 return -ENOMEM;
1449
1450 c = x86_pmu.get_event_constraints(fake_cpuc, event);
1451
1452 if (!c || !c->weight)
1453 ret = -ENOSPC;
1454
1455 if (x86_pmu.put_event_constraints)
1456 x86_pmu.put_event_constraints(fake_cpuc, event);
1457
1458 kfree(fake_cpuc);
1459
1460 return ret;
1461}
1462
1463/*
1466 * validate a single event group 1464 * validate a single event group
1467 * 1465 *
1468 * validation include: 1466 * validation include:
@@ -1502,7 +1500,7 @@ static int validate_group(struct perf_event *event)
1502 1500
1503 fake_cpuc->n_events = n; 1501 fake_cpuc->n_events = n;
1504 1502
1505 ret = x86_schedule_events(fake_cpuc, n, NULL); 1503 ret = x86_pmu.schedule_events(fake_cpuc, n, NULL);
1506 1504
1507out_free: 1505out_free:
1508 kfree(fake_cpuc); 1506 kfree(fake_cpuc);
@@ -1527,6 +1525,8 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
1527 1525
1528 if (event->group_leader != event) 1526 if (event->group_leader != event)
1529 err = validate_group(event); 1527 err = validate_group(event);
1528 else
1529 err = validate_event(event);
1530 1530
1531 event->pmu = tmp; 1531 event->pmu = tmp;
1532 } 1532 }
@@ -1574,8 +1574,7 @@ static void backtrace_address(void *data, unsigned long addr, int reliable)
1574{ 1574{
1575 struct perf_callchain_entry *entry = data; 1575 struct perf_callchain_entry *entry = data;
1576 1576
1577 if (reliable) 1577 callchain_store(entry, addr);
1578 callchain_store(entry, addr);
1579} 1578}
1580 1579
1581static const struct stacktrace_ops backtrace_ops = { 1580static const struct stacktrace_ops backtrace_ops = {
@@ -1597,41 +1596,6 @@ perf_callchain_kernel(struct pt_regs *regs, struct perf_callchain_entry *entry)
1597 dump_trace(NULL, regs, NULL, regs->bp, &backtrace_ops, entry); 1596 dump_trace(NULL, regs, NULL, regs->bp, &backtrace_ops, entry);
1598} 1597}
1599 1598
1600/*
1601 * best effort, GUP based copy_from_user() that assumes IRQ or NMI context
1602 */
1603static unsigned long
1604copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
1605{
1606 unsigned long offset, addr = (unsigned long)from;
1607 int type = in_nmi() ? KM_NMI : KM_IRQ0;
1608 unsigned long size, len = 0;
1609 struct page *page;
1610 void *map;
1611 int ret;
1612
1613 do {
1614 ret = __get_user_pages_fast(addr, 1, 0, &page);
1615 if (!ret)
1616 break;
1617
1618 offset = addr & (PAGE_SIZE - 1);
1619 size = min(PAGE_SIZE - offset, n - len);
1620
1621 map = kmap_atomic(page, type);
1622 memcpy(to, map+offset, size);
1623 kunmap_atomic(map, type);
1624 put_page(page);
1625
1626 len += size;
1627 to += size;
1628 addr += size;
1629
1630 } while (len < n);
1631
1632 return len;
1633}
1634
1635#ifdef CONFIG_COMPAT 1599#ifdef CONFIG_COMPAT
1636static inline int 1600static inline int
1637perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry) 1601perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
@@ -1727,6 +1691,11 @@ struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
1727{ 1691{
1728 struct perf_callchain_entry *entry; 1692 struct perf_callchain_entry *entry;
1729 1693
1694 if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
1695 /* TODO: We don't support guest os callchain now */
1696 return NULL;
1697 }
1698
1730 if (in_nmi()) 1699 if (in_nmi())
1731 entry = &__get_cpu_var(pmc_nmi_entry); 1700 entry = &__get_cpu_var(pmc_nmi_entry);
1732 else 1701 else
@@ -1750,3 +1719,37 @@ void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int ski
1750 regs->cs = __KERNEL_CS; 1719 regs->cs = __KERNEL_CS;
1751 local_save_flags(regs->flags); 1720 local_save_flags(regs->flags);
1752} 1721}
1722
1723unsigned long perf_instruction_pointer(struct pt_regs *regs)
1724{
1725 unsigned long ip;
1726
1727 if (perf_guest_cbs && perf_guest_cbs->is_in_guest())
1728 ip = perf_guest_cbs->get_guest_ip();
1729 else
1730 ip = instruction_pointer(regs);
1731
1732 return ip;
1733}
1734
1735unsigned long perf_misc_flags(struct pt_regs *regs)
1736{
1737 int misc = 0;
1738
1739 if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
1740 if (perf_guest_cbs->is_user_mode())
1741 misc |= PERF_RECORD_MISC_GUEST_USER;
1742 else
1743 misc |= PERF_RECORD_MISC_GUEST_KERNEL;
1744 } else {
1745 if (user_mode(regs))
1746 misc |= PERF_RECORD_MISC_USER;
1747 else
1748 misc |= PERF_RECORD_MISC_KERNEL;
1749 }
1750
1751 if (regs->flags & PERF_EFLAGS_EXACT)
1752 misc |= PERF_RECORD_MISC_EXACT_IP;
1753
1754 return misc;
1755}
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index db6f7d4056e1..611df11ba15e 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -2,7 +2,7 @@
2 2
3static DEFINE_RAW_SPINLOCK(amd_nb_lock); 3static DEFINE_RAW_SPINLOCK(amd_nb_lock);
4 4
5static __initconst u64 amd_hw_cache_event_ids 5static __initconst const u64 amd_hw_cache_event_ids
6 [PERF_COUNT_HW_CACHE_MAX] 6 [PERF_COUNT_HW_CACHE_MAX]
7 [PERF_COUNT_HW_CACHE_OP_MAX] 7 [PERF_COUNT_HW_CACHE_OP_MAX]
8 [PERF_COUNT_HW_CACHE_RESULT_MAX] = 8 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -111,22 +111,19 @@ static u64 amd_pmu_event_map(int hw_event)
111 return amd_perfmon_event_map[hw_event]; 111 return amd_perfmon_event_map[hw_event];
112} 112}
113 113
114static u64 amd_pmu_raw_event(u64 hw_event) 114static int amd_pmu_hw_config(struct perf_event *event)
115{ 115{
116#define K7_EVNTSEL_EVENT_MASK 0xF000000FFULL 116 int ret = x86_pmu_hw_config(event);
117#define K7_EVNTSEL_UNIT_MASK 0x00000FF00ULL 117
118#define K7_EVNTSEL_EDGE_MASK 0x000040000ULL 118 if (ret)
119#define K7_EVNTSEL_INV_MASK 0x000800000ULL 119 return ret;
120#define K7_EVNTSEL_REG_MASK 0x0FF000000ULL 120
121 121 if (event->attr.type != PERF_TYPE_RAW)
122#define K7_EVNTSEL_MASK \ 122 return 0;
123 (K7_EVNTSEL_EVENT_MASK | \ 123
124 K7_EVNTSEL_UNIT_MASK | \ 124 event->hw.config |= event->attr.config & AMD64_RAW_EVENT_MASK;
125 K7_EVNTSEL_EDGE_MASK | \ 125
126 K7_EVNTSEL_INV_MASK | \ 126 return 0;
127 K7_EVNTSEL_REG_MASK)
128
129 return hw_event & K7_EVNTSEL_MASK;
130} 127}
131 128
132/* 129/*
@@ -165,7 +162,7 @@ static void amd_put_event_constraints(struct cpu_hw_events *cpuc,
165 * be removed on one CPU at a time AND PMU is disabled 162 * be removed on one CPU at a time AND PMU is disabled
166 * when we come here 163 * when we come here
167 */ 164 */
168 for (i = 0; i < x86_pmu.num_events; i++) { 165 for (i = 0; i < x86_pmu.num_counters; i++) {
169 if (nb->owners[i] == event) { 166 if (nb->owners[i] == event) {
170 cmpxchg(nb->owners+i, event, NULL); 167 cmpxchg(nb->owners+i, event, NULL);
171 break; 168 break;
@@ -215,7 +212,7 @@ amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
215 struct hw_perf_event *hwc = &event->hw; 212 struct hw_perf_event *hwc = &event->hw;
216 struct amd_nb *nb = cpuc->amd_nb; 213 struct amd_nb *nb = cpuc->amd_nb;
217 struct perf_event *old = NULL; 214 struct perf_event *old = NULL;
218 int max = x86_pmu.num_events; 215 int max = x86_pmu.num_counters;
219 int i, j, k = -1; 216 int i, j, k = -1;
220 217
221 /* 218 /*
@@ -293,7 +290,7 @@ static struct amd_nb *amd_alloc_nb(int cpu, int nb_id)
293 /* 290 /*
294 * initialize all possible NB constraints 291 * initialize all possible NB constraints
295 */ 292 */
296 for (i = 0; i < x86_pmu.num_events; i++) { 293 for (i = 0; i < x86_pmu.num_counters; i++) {
297 __set_bit(i, nb->event_constraints[i].idxmsk); 294 __set_bit(i, nb->event_constraints[i].idxmsk);
298 nb->event_constraints[i].weight = 1; 295 nb->event_constraints[i].weight = 1;
299 } 296 }
@@ -371,21 +368,22 @@ static void amd_pmu_cpu_dead(int cpu)
371 raw_spin_unlock(&amd_nb_lock); 368 raw_spin_unlock(&amd_nb_lock);
372} 369}
373 370
374static __initconst struct x86_pmu amd_pmu = { 371static __initconst const struct x86_pmu amd_pmu = {
375 .name = "AMD", 372 .name = "AMD",
376 .handle_irq = x86_pmu_handle_irq, 373 .handle_irq = x86_pmu_handle_irq,
377 .disable_all = x86_pmu_disable_all, 374 .disable_all = x86_pmu_disable_all,
378 .enable_all = x86_pmu_enable_all, 375 .enable_all = x86_pmu_enable_all,
379 .enable = x86_pmu_enable_event, 376 .enable = x86_pmu_enable_event,
380 .disable = x86_pmu_disable_event, 377 .disable = x86_pmu_disable_event,
378 .hw_config = amd_pmu_hw_config,
379 .schedule_events = x86_schedule_events,
381 .eventsel = MSR_K7_EVNTSEL0, 380 .eventsel = MSR_K7_EVNTSEL0,
382 .perfctr = MSR_K7_PERFCTR0, 381 .perfctr = MSR_K7_PERFCTR0,
383 .event_map = amd_pmu_event_map, 382 .event_map = amd_pmu_event_map,
384 .raw_event = amd_pmu_raw_event,
385 .max_events = ARRAY_SIZE(amd_perfmon_event_map), 383 .max_events = ARRAY_SIZE(amd_perfmon_event_map),
386 .num_events = 4, 384 .num_counters = 4,
387 .event_bits = 48, 385 .cntval_bits = 48,
388 .event_mask = (1ULL << 48) - 1, 386 .cntval_mask = (1ULL << 48) - 1,
389 .apic = 1, 387 .apic = 1,
390 /* use highest bit to detect overflow */ 388 /* use highest bit to detect overflow */
391 .max_period = (1ULL << 47) - 1, 389 .max_period = (1ULL << 47) - 1,
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 9c794ac87837..fdbc652d3feb 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -88,7 +88,7 @@ static u64 intel_pmu_event_map(int hw_event)
88 return intel_perfmon_event_map[hw_event]; 88 return intel_perfmon_event_map[hw_event];
89} 89}
90 90
91static __initconst u64 westmere_hw_cache_event_ids 91static __initconst const u64 westmere_hw_cache_event_ids
92 [PERF_COUNT_HW_CACHE_MAX] 92 [PERF_COUNT_HW_CACHE_MAX]
93 [PERF_COUNT_HW_CACHE_OP_MAX] 93 [PERF_COUNT_HW_CACHE_OP_MAX]
94 [PERF_COUNT_HW_CACHE_RESULT_MAX] = 94 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -179,7 +179,7 @@ static __initconst u64 westmere_hw_cache_event_ids
179 }, 179 },
180}; 180};
181 181
182static __initconst u64 nehalem_hw_cache_event_ids 182static __initconst const u64 nehalem_hw_cache_event_ids
183 [PERF_COUNT_HW_CACHE_MAX] 183 [PERF_COUNT_HW_CACHE_MAX]
184 [PERF_COUNT_HW_CACHE_OP_MAX] 184 [PERF_COUNT_HW_CACHE_OP_MAX]
185 [PERF_COUNT_HW_CACHE_RESULT_MAX] = 185 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -270,7 +270,7 @@ static __initconst u64 nehalem_hw_cache_event_ids
270 }, 270 },
271}; 271};
272 272
273static __initconst u64 core2_hw_cache_event_ids 273static __initconst const u64 core2_hw_cache_event_ids
274 [PERF_COUNT_HW_CACHE_MAX] 274 [PERF_COUNT_HW_CACHE_MAX]
275 [PERF_COUNT_HW_CACHE_OP_MAX] 275 [PERF_COUNT_HW_CACHE_OP_MAX]
276 [PERF_COUNT_HW_CACHE_RESULT_MAX] = 276 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -361,7 +361,7 @@ static __initconst u64 core2_hw_cache_event_ids
361 }, 361 },
362}; 362};
363 363
364static __initconst u64 atom_hw_cache_event_ids 364static __initconst const u64 atom_hw_cache_event_ids
365 [PERF_COUNT_HW_CACHE_MAX] 365 [PERF_COUNT_HW_CACHE_MAX]
366 [PERF_COUNT_HW_CACHE_OP_MAX] 366 [PERF_COUNT_HW_CACHE_OP_MAX]
367 [PERF_COUNT_HW_CACHE_RESULT_MAX] = 367 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -452,60 +452,6 @@ static __initconst u64 atom_hw_cache_event_ids
452 }, 452 },
453}; 453};
454 454
455static u64 intel_pmu_raw_event(u64 hw_event)
456{
457#define CORE_EVNTSEL_EVENT_MASK 0x000000FFULL
458#define CORE_EVNTSEL_UNIT_MASK 0x0000FF00ULL
459#define CORE_EVNTSEL_EDGE_MASK 0x00040000ULL
460#define CORE_EVNTSEL_INV_MASK 0x00800000ULL
461#define CORE_EVNTSEL_REG_MASK 0xFF000000ULL
462
463#define CORE_EVNTSEL_MASK \
464 (INTEL_ARCH_EVTSEL_MASK | \
465 INTEL_ARCH_UNIT_MASK | \
466 INTEL_ARCH_EDGE_MASK | \
467 INTEL_ARCH_INV_MASK | \
468 INTEL_ARCH_CNT_MASK)
469
470 return hw_event & CORE_EVNTSEL_MASK;
471}
472
473static void intel_pmu_enable_bts(u64 config)
474{
475 unsigned long debugctlmsr;
476
477 debugctlmsr = get_debugctlmsr();
478
479 debugctlmsr |= X86_DEBUGCTL_TR;
480 debugctlmsr |= X86_DEBUGCTL_BTS;
481 debugctlmsr |= X86_DEBUGCTL_BTINT;
482
483 if (!(config & ARCH_PERFMON_EVENTSEL_OS))
484 debugctlmsr |= X86_DEBUGCTL_BTS_OFF_OS;
485
486 if (!(config & ARCH_PERFMON_EVENTSEL_USR))
487 debugctlmsr |= X86_DEBUGCTL_BTS_OFF_USR;
488
489 update_debugctlmsr(debugctlmsr);
490}
491
492static void intel_pmu_disable_bts(void)
493{
494 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
495 unsigned long debugctlmsr;
496
497 if (!cpuc->ds)
498 return;
499
500 debugctlmsr = get_debugctlmsr();
501
502 debugctlmsr &=
503 ~(X86_DEBUGCTL_TR | X86_DEBUGCTL_BTS | X86_DEBUGCTL_BTINT |
504 X86_DEBUGCTL_BTS_OFF_OS | X86_DEBUGCTL_BTS_OFF_USR);
505
506 update_debugctlmsr(debugctlmsr);
507}
508
509static void intel_pmu_disable_all(void) 455static void intel_pmu_disable_all(void)
510{ 456{
511 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 457 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
@@ -514,12 +460,17 @@ static void intel_pmu_disable_all(void)
514 460
515 if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) 461 if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask))
516 intel_pmu_disable_bts(); 462 intel_pmu_disable_bts();
463
464 intel_pmu_pebs_disable_all();
465 intel_pmu_lbr_disable_all();
517} 466}
518 467
519static void intel_pmu_enable_all(void) 468static void intel_pmu_enable_all(int added)
520{ 469{
521 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 470 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
522 471
472 intel_pmu_pebs_enable_all();
473 intel_pmu_lbr_enable_all();
523 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl); 474 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
524 475
525 if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) { 476 if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) {
@@ -533,6 +484,42 @@ static void intel_pmu_enable_all(void)
533 } 484 }
534} 485}
535 486
487/*
488 * Workaround for:
489 * Intel Errata AAK100 (model 26)
490 * Intel Errata AAP53 (model 30)
491 * Intel Errata BD53 (model 44)
492 *
493 * These chips need to be 'reset' when adding counters by programming
494 * the magic three (non counting) events 0x4300D2, 0x4300B1 and 0x4300B5
495 * either in sequence on the same PMC or on different PMCs.
496 */
497static void intel_pmu_nhm_enable_all(int added)
498{
499 if (added) {
500 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
501 int i;
502
503 wrmsrl(MSR_ARCH_PERFMON_EVENTSEL0 + 0, 0x4300D2);
504 wrmsrl(MSR_ARCH_PERFMON_EVENTSEL0 + 1, 0x4300B1);
505 wrmsrl(MSR_ARCH_PERFMON_EVENTSEL0 + 2, 0x4300B5);
506
507 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0x3);
508 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0x0);
509
510 for (i = 0; i < 3; i++) {
511 struct perf_event *event = cpuc->events[i];
512
513 if (!event)
514 continue;
515
516 __x86_pmu_enable_event(&event->hw,
517 ARCH_PERFMON_EVENTSEL_ENABLE);
518 }
519 }
520 intel_pmu_enable_all(added);
521}
522
536static inline u64 intel_pmu_get_status(void) 523static inline u64 intel_pmu_get_status(void)
537{ 524{
538 u64 status; 525 u64 status;
@@ -547,8 +534,7 @@ static inline void intel_pmu_ack_status(u64 ack)
547 wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack); 534 wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);
548} 535}
549 536
550static inline void 537static void intel_pmu_disable_fixed(struct hw_perf_event *hwc)
551intel_pmu_disable_fixed(struct hw_perf_event *hwc)
552{ 538{
553 int idx = hwc->idx - X86_PMC_IDX_FIXED; 539 int idx = hwc->idx - X86_PMC_IDX_FIXED;
554 u64 ctrl_val, mask; 540 u64 ctrl_val, mask;
@@ -557,71 +543,10 @@ intel_pmu_disable_fixed(struct hw_perf_event *hwc)
557 543
558 rdmsrl(hwc->config_base, ctrl_val); 544 rdmsrl(hwc->config_base, ctrl_val);
559 ctrl_val &= ~mask; 545 ctrl_val &= ~mask;
560 (void)checking_wrmsrl(hwc->config_base, ctrl_val); 546 wrmsrl(hwc->config_base, ctrl_val);
561}
562
563static void intel_pmu_drain_bts_buffer(void)
564{
565 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
566 struct debug_store *ds = cpuc->ds;
567 struct bts_record {
568 u64 from;
569 u64 to;
570 u64 flags;
571 };
572 struct perf_event *event = cpuc->events[X86_PMC_IDX_FIXED_BTS];
573 struct bts_record *at, *top;
574 struct perf_output_handle handle;
575 struct perf_event_header header;
576 struct perf_sample_data data;
577 struct pt_regs regs;
578
579 if (!event)
580 return;
581
582 if (!ds)
583 return;
584
585 at = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
586 top = (struct bts_record *)(unsigned long)ds->bts_index;
587
588 if (top <= at)
589 return;
590
591 ds->bts_index = ds->bts_buffer_base;
592
593 perf_sample_data_init(&data, 0);
594
595 data.period = event->hw.last_period;
596 regs.ip = 0;
597
598 /*
599 * Prepare a generic sample, i.e. fill in the invariant fields.
600 * We will overwrite the from and to address before we output
601 * the sample.
602 */
603 perf_prepare_sample(&header, &data, event, &regs);
604
605 if (perf_output_begin(&handle, event,
606 header.size * (top - at), 1, 1))
607 return;
608
609 for (; at < top; at++) {
610 data.ip = at->from;
611 data.addr = at->to;
612
613 perf_output_sample(&handle, &header, &data, event);
614 }
615
616 perf_output_end(&handle);
617
618 /* There's new data available. */
619 event->hw.interrupts++;
620 event->pending_kill = POLL_IN;
621} 547}
622 548
623static inline void 549static void intel_pmu_disable_event(struct perf_event *event)
624intel_pmu_disable_event(struct perf_event *event)
625{ 550{
626 struct hw_perf_event *hwc = &event->hw; 551 struct hw_perf_event *hwc = &event->hw;
627 552
@@ -637,14 +562,15 @@ intel_pmu_disable_event(struct perf_event *event)
637 } 562 }
638 563
639 x86_pmu_disable_event(event); 564 x86_pmu_disable_event(event);
565
566 if (unlikely(event->attr.precise_ip))
567 intel_pmu_pebs_disable(event);
640} 568}
641 569
642static inline void 570static void intel_pmu_enable_fixed(struct hw_perf_event *hwc)
643intel_pmu_enable_fixed(struct hw_perf_event *hwc)
644{ 571{
645 int idx = hwc->idx - X86_PMC_IDX_FIXED; 572 int idx = hwc->idx - X86_PMC_IDX_FIXED;
646 u64 ctrl_val, bits, mask; 573 u64 ctrl_val, bits, mask;
647 int err;
648 574
649 /* 575 /*
650 * Enable IRQ generation (0x8), 576 * Enable IRQ generation (0x8),
@@ -669,7 +595,7 @@ intel_pmu_enable_fixed(struct hw_perf_event *hwc)
669 rdmsrl(hwc->config_base, ctrl_val); 595 rdmsrl(hwc->config_base, ctrl_val);
670 ctrl_val &= ~mask; 596 ctrl_val &= ~mask;
671 ctrl_val |= bits; 597 ctrl_val |= bits;
672 err = checking_wrmsrl(hwc->config_base, ctrl_val); 598 wrmsrl(hwc->config_base, ctrl_val);
673} 599}
674 600
675static void intel_pmu_enable_event(struct perf_event *event) 601static void intel_pmu_enable_event(struct perf_event *event)
@@ -689,7 +615,10 @@ static void intel_pmu_enable_event(struct perf_event *event)
689 return; 615 return;
690 } 616 }
691 617
692 __x86_pmu_enable_event(hwc); 618 if (unlikely(event->attr.precise_ip))
619 intel_pmu_pebs_enable(event);
620
621 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE);
693} 622}
694 623
695/* 624/*
@@ -708,20 +637,20 @@ static void intel_pmu_reset(void)
708 unsigned long flags; 637 unsigned long flags;
709 int idx; 638 int idx;
710 639
711 if (!x86_pmu.num_events) 640 if (!x86_pmu.num_counters)
712 return; 641 return;
713 642
714 local_irq_save(flags); 643 local_irq_save(flags);
715 644
716 printk("clearing PMU state on CPU#%d\n", smp_processor_id()); 645 printk("clearing PMU state on CPU#%d\n", smp_processor_id());
717 646
718 for (idx = 0; idx < x86_pmu.num_events; idx++) { 647 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
719 checking_wrmsrl(x86_pmu.eventsel + idx, 0ull); 648 checking_wrmsrl(x86_pmu.eventsel + idx, 0ull);
720 checking_wrmsrl(x86_pmu.perfctr + idx, 0ull); 649 checking_wrmsrl(x86_pmu.perfctr + idx, 0ull);
721 } 650 }
722 for (idx = 0; idx < x86_pmu.num_events_fixed; idx++) { 651 for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++)
723 checking_wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull); 652 checking_wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull);
724 } 653
725 if (ds) 654 if (ds)
726 ds->bts_index = ds->bts_buffer_base; 655 ds->bts_index = ds->bts_buffer_base;
727 656
@@ -747,7 +676,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
747 intel_pmu_drain_bts_buffer(); 676 intel_pmu_drain_bts_buffer();
748 status = intel_pmu_get_status(); 677 status = intel_pmu_get_status();
749 if (!status) { 678 if (!status) {
750 intel_pmu_enable_all(); 679 intel_pmu_enable_all(0);
751 return 0; 680 return 0;
752 } 681 }
753 682
@@ -762,6 +691,15 @@ again:
762 691
763 inc_irq_stat(apic_perf_irqs); 692 inc_irq_stat(apic_perf_irqs);
764 ack = status; 693 ack = status;
694
695 intel_pmu_lbr_read();
696
697 /*
698 * PEBS overflow sets bit 62 in the global status register
699 */
700 if (__test_and_clear_bit(62, (unsigned long *)&status))
701 x86_pmu.drain_pebs(regs);
702
765 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) { 703 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
766 struct perf_event *event = cpuc->events[bit]; 704 struct perf_event *event = cpuc->events[bit];
767 705
@@ -787,26 +725,22 @@ again:
787 goto again; 725 goto again;
788 726
789done: 727done:
790 intel_pmu_enable_all(); 728 intel_pmu_enable_all(0);
791 return 1; 729 return 1;
792} 730}
793 731
794static struct event_constraint bts_constraint =
795 EVENT_CONSTRAINT(0, 1ULL << X86_PMC_IDX_FIXED_BTS, 0);
796
797static struct event_constraint * 732static struct event_constraint *
798intel_special_constraints(struct perf_event *event) 733intel_bts_constraints(struct perf_event *event)
799{ 734{
800 unsigned int hw_event; 735 struct hw_perf_event *hwc = &event->hw;
801 736 unsigned int hw_event, bts_event;
802 hw_event = event->hw.config & INTEL_ARCH_EVENT_MASK;
803 737
804 if (unlikely((hw_event == 738 hw_event = hwc->config & INTEL_ARCH_EVENT_MASK;
805 x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS)) && 739 bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
806 (event->hw.sample_period == 1))) {
807 740
741 if (unlikely(hw_event == bts_event && hwc->sample_period == 1))
808 return &bts_constraint; 742 return &bts_constraint;
809 } 743
810 return NULL; 744 return NULL;
811} 745}
812 746
@@ -815,24 +749,53 @@ intel_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event
815{ 749{
816 struct event_constraint *c; 750 struct event_constraint *c;
817 751
818 c = intel_special_constraints(event); 752 c = intel_bts_constraints(event);
753 if (c)
754 return c;
755
756 c = intel_pebs_constraints(event);
819 if (c) 757 if (c)
820 return c; 758 return c;
821 759
822 return x86_get_event_constraints(cpuc, event); 760 return x86_get_event_constraints(cpuc, event);
823} 761}
824 762
825static __initconst struct x86_pmu core_pmu = { 763static int intel_pmu_hw_config(struct perf_event *event)
764{
765 int ret = x86_pmu_hw_config(event);
766
767 if (ret)
768 return ret;
769
770 if (event->attr.type != PERF_TYPE_RAW)
771 return 0;
772
773 if (!(event->attr.config & ARCH_PERFMON_EVENTSEL_ANY))
774 return 0;
775
776 if (x86_pmu.version < 3)
777 return -EINVAL;
778
779 if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
780 return -EACCES;
781
782 event->hw.config |= ARCH_PERFMON_EVENTSEL_ANY;
783
784 return 0;
785}
786
787static __initconst const struct x86_pmu core_pmu = {
826 .name = "core", 788 .name = "core",
827 .handle_irq = x86_pmu_handle_irq, 789 .handle_irq = x86_pmu_handle_irq,
828 .disable_all = x86_pmu_disable_all, 790 .disable_all = x86_pmu_disable_all,
829 .enable_all = x86_pmu_enable_all, 791 .enable_all = x86_pmu_enable_all,
830 .enable = x86_pmu_enable_event, 792 .enable = x86_pmu_enable_event,
831 .disable = x86_pmu_disable_event, 793 .disable = x86_pmu_disable_event,
794 .hw_config = x86_pmu_hw_config,
795 .schedule_events = x86_schedule_events,
832 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0, 796 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
833 .perfctr = MSR_ARCH_PERFMON_PERFCTR0, 797 .perfctr = MSR_ARCH_PERFMON_PERFCTR0,
834 .event_map = intel_pmu_event_map, 798 .event_map = intel_pmu_event_map,
835 .raw_event = intel_pmu_raw_event,
836 .max_events = ARRAY_SIZE(intel_perfmon_event_map), 799 .max_events = ARRAY_SIZE(intel_perfmon_event_map),
837 .apic = 1, 800 .apic = 1,
838 /* 801 /*
@@ -845,17 +808,32 @@ static __initconst struct x86_pmu core_pmu = {
845 .event_constraints = intel_core_event_constraints, 808 .event_constraints = intel_core_event_constraints,
846}; 809};
847 810
848static __initconst struct x86_pmu intel_pmu = { 811static void intel_pmu_cpu_starting(int cpu)
812{
813 init_debug_store_on_cpu(cpu);
814 /*
815 * Deal with CPUs that don't clear their LBRs on power-up.
816 */
817 intel_pmu_lbr_reset();
818}
819
820static void intel_pmu_cpu_dying(int cpu)
821{
822 fini_debug_store_on_cpu(cpu);
823}
824
825static __initconst const struct x86_pmu intel_pmu = {
849 .name = "Intel", 826 .name = "Intel",
850 .handle_irq = intel_pmu_handle_irq, 827 .handle_irq = intel_pmu_handle_irq,
851 .disable_all = intel_pmu_disable_all, 828 .disable_all = intel_pmu_disable_all,
852 .enable_all = intel_pmu_enable_all, 829 .enable_all = intel_pmu_enable_all,
853 .enable = intel_pmu_enable_event, 830 .enable = intel_pmu_enable_event,
854 .disable = intel_pmu_disable_event, 831 .disable = intel_pmu_disable_event,
832 .hw_config = intel_pmu_hw_config,
833 .schedule_events = x86_schedule_events,
855 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0, 834 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
856 .perfctr = MSR_ARCH_PERFMON_PERFCTR0, 835 .perfctr = MSR_ARCH_PERFMON_PERFCTR0,
857 .event_map = intel_pmu_event_map, 836 .event_map = intel_pmu_event_map,
858 .raw_event = intel_pmu_raw_event,
859 .max_events = ARRAY_SIZE(intel_perfmon_event_map), 837 .max_events = ARRAY_SIZE(intel_perfmon_event_map),
860 .apic = 1, 838 .apic = 1,
861 /* 839 /*
@@ -864,14 +842,38 @@ static __initconst struct x86_pmu intel_pmu = {
864 * the generic event period: 842 * the generic event period:
865 */ 843 */
866 .max_period = (1ULL << 31) - 1, 844 .max_period = (1ULL << 31) - 1,
867 .enable_bts = intel_pmu_enable_bts,
868 .disable_bts = intel_pmu_disable_bts,
869 .get_event_constraints = intel_get_event_constraints, 845 .get_event_constraints = intel_get_event_constraints,
870 846
871 .cpu_starting = init_debug_store_on_cpu, 847 .cpu_starting = intel_pmu_cpu_starting,
872 .cpu_dying = fini_debug_store_on_cpu, 848 .cpu_dying = intel_pmu_cpu_dying,
873}; 849};
874 850
851static void intel_clovertown_quirks(void)
852{
853 /*
854 * PEBS is unreliable due to:
855 *
856 * AJ67 - PEBS may experience CPL leaks
857 * AJ68 - PEBS PMI may be delayed by one event
858 * AJ69 - GLOBAL_STATUS[62] will only be set when DEBUGCTL[12]
859 * AJ106 - FREEZE_LBRS_ON_PMI doesn't work in combination with PEBS
860 *
861 * AJ67 could be worked around by restricting the OS/USR flags.
862 * AJ69 could be worked around by setting PMU_FREEZE_ON_PMI.
863 *
864 * AJ106 could possibly be worked around by not allowing LBR
865 * usage from PEBS, including the fixup.
866 * AJ68 could possibly be worked around by always programming
867 * a pebs_event_reset[0] value and coping with the lost events.
868 *
869 * But taken together it might just make sense to not enable PEBS on
870 * these chips.
871 */
872 printk(KERN_WARNING "PEBS disabled due to CPU errata.\n");
873 x86_pmu.pebs = 0;
874 x86_pmu.pebs_constraints = NULL;
875}
876
875static __init int intel_pmu_init(void) 877static __init int intel_pmu_init(void)
876{ 878{
877 union cpuid10_edx edx; 879 union cpuid10_edx edx;
@@ -881,12 +883,13 @@ static __init int intel_pmu_init(void)
881 int version; 883 int version;
882 884
883 if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) { 885 if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
884 /* check for P6 processor family */ 886 switch (boot_cpu_data.x86) {
885 if (boot_cpu_data.x86 == 6) { 887 case 0x6:
886 return p6_pmu_init(); 888 return p6_pmu_init();
887 } else { 889 case 0xf:
890 return p4_pmu_init();
891 }
888 return -ENODEV; 892 return -ENODEV;
889 }
890 } 893 }
891 894
892 /* 895 /*
@@ -904,16 +907,28 @@ static __init int intel_pmu_init(void)
904 x86_pmu = intel_pmu; 907 x86_pmu = intel_pmu;
905 908
906 x86_pmu.version = version; 909 x86_pmu.version = version;
907 x86_pmu.num_events = eax.split.num_events; 910 x86_pmu.num_counters = eax.split.num_counters;
908 x86_pmu.event_bits = eax.split.bit_width; 911 x86_pmu.cntval_bits = eax.split.bit_width;
909 x86_pmu.event_mask = (1ULL << eax.split.bit_width) - 1; 912 x86_pmu.cntval_mask = (1ULL << eax.split.bit_width) - 1;
910 913
911 /* 914 /*
912 * Quirk: v2 perfmon does not report fixed-purpose events, so 915 * Quirk: v2 perfmon does not report fixed-purpose events, so
913 * assume at least 3 events: 916 * assume at least 3 events:
914 */ 917 */
915 if (version > 1) 918 if (version > 1)
916 x86_pmu.num_events_fixed = max((int)edx.split.num_events_fixed, 3); 919 x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);
920
921 /*
922 * v2 and above have a perf capabilities MSR
923 */
924 if (version > 1) {
925 u64 capabilities;
926
927 rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities);
928 x86_pmu.intel_cap.capabilities = capabilities;
929 }
930
931 intel_ds_init();
917 932
918 /* 933 /*
919 * Install the hw-cache-events table: 934 * Install the hw-cache-events table:
@@ -924,12 +939,15 @@ static __init int intel_pmu_init(void)
924 break; 939 break;
925 940
926 case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ 941 case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
942 x86_pmu.quirks = intel_clovertown_quirks;
927 case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ 943 case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */
928 case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ 944 case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */
929 case 29: /* six-core 45 nm xeon "Dunnington" */ 945 case 29: /* six-core 45 nm xeon "Dunnington" */
930 memcpy(hw_cache_event_ids, core2_hw_cache_event_ids, 946 memcpy(hw_cache_event_ids, core2_hw_cache_event_ids,
931 sizeof(hw_cache_event_ids)); 947 sizeof(hw_cache_event_ids));
932 948
949 intel_pmu_lbr_init_core();
950
933 x86_pmu.event_constraints = intel_core2_event_constraints; 951 x86_pmu.event_constraints = intel_core2_event_constraints;
934 pr_cont("Core2 events, "); 952 pr_cont("Core2 events, ");
935 break; 953 break;
@@ -940,13 +958,19 @@ static __init int intel_pmu_init(void)
940 memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids, 958 memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
941 sizeof(hw_cache_event_ids)); 959 sizeof(hw_cache_event_ids));
942 960
961 intel_pmu_lbr_init_nhm();
962
943 x86_pmu.event_constraints = intel_nehalem_event_constraints; 963 x86_pmu.event_constraints = intel_nehalem_event_constraints;
944 pr_cont("Nehalem/Corei7 events, "); 964 x86_pmu.enable_all = intel_pmu_nhm_enable_all;
965 pr_cont("Nehalem events, ");
945 break; 966 break;
967
946 case 28: /* Atom */ 968 case 28: /* Atom */
947 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids, 969 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
948 sizeof(hw_cache_event_ids)); 970 sizeof(hw_cache_event_ids));
949 971
972 intel_pmu_lbr_init_atom();
973
950 x86_pmu.event_constraints = intel_gen_event_constraints; 974 x86_pmu.event_constraints = intel_gen_event_constraints;
951 pr_cont("Atom events, "); 975 pr_cont("Atom events, ");
952 break; 976 break;
@@ -956,7 +980,10 @@ static __init int intel_pmu_init(void)
956 memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids, 980 memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids,
957 sizeof(hw_cache_event_ids)); 981 sizeof(hw_cache_event_ids));
958 982
983 intel_pmu_lbr_init_nhm();
984
959 x86_pmu.event_constraints = intel_westmere_event_constraints; 985 x86_pmu.event_constraints = intel_westmere_event_constraints;
986 x86_pmu.enable_all = intel_pmu_nhm_enable_all;
960 pr_cont("Westmere events, "); 987 pr_cont("Westmere events, ");
961 break; 988 break;
962 989
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
new file mode 100644
index 000000000000..18018d1311cd
--- /dev/null
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -0,0 +1,641 @@
1#ifdef CONFIG_CPU_SUP_INTEL
2
3/* The maximal number of PEBS events: */
4#define MAX_PEBS_EVENTS 4
5
6/* The size of a BTS record in bytes: */
7#define BTS_RECORD_SIZE 24
8
9#define BTS_BUFFER_SIZE (PAGE_SIZE << 4)
10#define PEBS_BUFFER_SIZE PAGE_SIZE
11
12/*
13 * pebs_record_32 for p4 and core not supported
14
15struct pebs_record_32 {
16 u32 flags, ip;
17 u32 ax, bc, cx, dx;
18 u32 si, di, bp, sp;
19};
20
21 */
22
23struct pebs_record_core {
24 u64 flags, ip;
25 u64 ax, bx, cx, dx;
26 u64 si, di, bp, sp;
27 u64 r8, r9, r10, r11;
28 u64 r12, r13, r14, r15;
29};
30
31struct pebs_record_nhm {
32 u64 flags, ip;
33 u64 ax, bx, cx, dx;
34 u64 si, di, bp, sp;
35 u64 r8, r9, r10, r11;
36 u64 r12, r13, r14, r15;
37 u64 status, dla, dse, lat;
38};
39
40/*
41 * A debug store configuration.
42 *
43 * We only support architectures that use 64bit fields.
44 */
45struct debug_store {
46 u64 bts_buffer_base;
47 u64 bts_index;
48 u64 bts_absolute_maximum;
49 u64 bts_interrupt_threshold;
50 u64 pebs_buffer_base;
51 u64 pebs_index;
52 u64 pebs_absolute_maximum;
53 u64 pebs_interrupt_threshold;
54 u64 pebs_event_reset[MAX_PEBS_EVENTS];
55};
56
57static void init_debug_store_on_cpu(int cpu)
58{
59 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
60
61 if (!ds)
62 return;
63
64 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA,
65 (u32)((u64)(unsigned long)ds),
66 (u32)((u64)(unsigned long)ds >> 32));
67}
68
69static void fini_debug_store_on_cpu(int cpu)
70{
71 if (!per_cpu(cpu_hw_events, cpu).ds)
72 return;
73
74 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 0, 0);
75}
76
77static void release_ds_buffers(void)
78{
79 int cpu;
80
81 if (!x86_pmu.bts && !x86_pmu.pebs)
82 return;
83
84 get_online_cpus();
85
86 for_each_online_cpu(cpu)
87 fini_debug_store_on_cpu(cpu);
88
89 for_each_possible_cpu(cpu) {
90 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
91
92 if (!ds)
93 continue;
94
95 per_cpu(cpu_hw_events, cpu).ds = NULL;
96
97 kfree((void *)(unsigned long)ds->pebs_buffer_base);
98 kfree((void *)(unsigned long)ds->bts_buffer_base);
99 kfree(ds);
100 }
101
102 put_online_cpus();
103}
104
105static int reserve_ds_buffers(void)
106{
107 int cpu, err = 0;
108
109 if (!x86_pmu.bts && !x86_pmu.pebs)
110 return 0;
111
112 get_online_cpus();
113
114 for_each_possible_cpu(cpu) {
115 struct debug_store *ds;
116 void *buffer;
117 int max, thresh;
118
119 err = -ENOMEM;
120 ds = kzalloc(sizeof(*ds), GFP_KERNEL);
121 if (unlikely(!ds))
122 break;
123 per_cpu(cpu_hw_events, cpu).ds = ds;
124
125 if (x86_pmu.bts) {
126 buffer = kzalloc(BTS_BUFFER_SIZE, GFP_KERNEL);
127 if (unlikely(!buffer))
128 break;
129
130 max = BTS_BUFFER_SIZE / BTS_RECORD_SIZE;
131 thresh = max / 16;
132
133 ds->bts_buffer_base = (u64)(unsigned long)buffer;
134 ds->bts_index = ds->bts_buffer_base;
135 ds->bts_absolute_maximum = ds->bts_buffer_base +
136 max * BTS_RECORD_SIZE;
137 ds->bts_interrupt_threshold = ds->bts_absolute_maximum -
138 thresh * BTS_RECORD_SIZE;
139 }
140
141 if (x86_pmu.pebs) {
142 buffer = kzalloc(PEBS_BUFFER_SIZE, GFP_KERNEL);
143 if (unlikely(!buffer))
144 break;
145
146 max = PEBS_BUFFER_SIZE / x86_pmu.pebs_record_size;
147
148 ds->pebs_buffer_base = (u64)(unsigned long)buffer;
149 ds->pebs_index = ds->pebs_buffer_base;
150 ds->pebs_absolute_maximum = ds->pebs_buffer_base +
151 max * x86_pmu.pebs_record_size;
152 /*
153 * Always use single record PEBS
154 */
155 ds->pebs_interrupt_threshold = ds->pebs_buffer_base +
156 x86_pmu.pebs_record_size;
157 }
158
159 err = 0;
160 }
161
162 if (err)
163 release_ds_buffers();
164 else {
165 for_each_online_cpu(cpu)
166 init_debug_store_on_cpu(cpu);
167 }
168
169 put_online_cpus();
170
171 return err;
172}
173
174/*
175 * BTS
176 */
177
178static struct event_constraint bts_constraint =
179 EVENT_CONSTRAINT(0, 1ULL << X86_PMC_IDX_FIXED_BTS, 0);
180
181static void intel_pmu_enable_bts(u64 config)
182{
183 unsigned long debugctlmsr;
184
185 debugctlmsr = get_debugctlmsr();
186
187 debugctlmsr |= DEBUGCTLMSR_TR;
188 debugctlmsr |= DEBUGCTLMSR_BTS;
189 debugctlmsr |= DEBUGCTLMSR_BTINT;
190
191 if (!(config & ARCH_PERFMON_EVENTSEL_OS))
192 debugctlmsr |= DEBUGCTLMSR_BTS_OFF_OS;
193
194 if (!(config & ARCH_PERFMON_EVENTSEL_USR))
195 debugctlmsr |= DEBUGCTLMSR_BTS_OFF_USR;
196
197 update_debugctlmsr(debugctlmsr);
198}
199
200static void intel_pmu_disable_bts(void)
201{
202 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
203 unsigned long debugctlmsr;
204
205 if (!cpuc->ds)
206 return;
207
208 debugctlmsr = get_debugctlmsr();
209
210 debugctlmsr &=
211 ~(DEBUGCTLMSR_TR | DEBUGCTLMSR_BTS | DEBUGCTLMSR_BTINT |
212 DEBUGCTLMSR_BTS_OFF_OS | DEBUGCTLMSR_BTS_OFF_USR);
213
214 update_debugctlmsr(debugctlmsr);
215}
216
217static void intel_pmu_drain_bts_buffer(void)
218{
219 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
220 struct debug_store *ds = cpuc->ds;
221 struct bts_record {
222 u64 from;
223 u64 to;
224 u64 flags;
225 };
226 struct perf_event *event = cpuc->events[X86_PMC_IDX_FIXED_BTS];
227 struct bts_record *at, *top;
228 struct perf_output_handle handle;
229 struct perf_event_header header;
230 struct perf_sample_data data;
231 struct pt_regs regs;
232
233 if (!event)
234 return;
235
236 if (!ds)
237 return;
238
239 at = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
240 top = (struct bts_record *)(unsigned long)ds->bts_index;
241
242 if (top <= at)
243 return;
244
245 ds->bts_index = ds->bts_buffer_base;
246
247 perf_sample_data_init(&data, 0);
248 data.period = event->hw.last_period;
249 regs.ip = 0;
250
251 /*
252 * Prepare a generic sample, i.e. fill in the invariant fields.
253 * We will overwrite the from and to address before we output
254 * the sample.
255 */
256 perf_prepare_sample(&header, &data, event, &regs);
257
258 if (perf_output_begin(&handle, event, header.size * (top - at), 1, 1))
259 return;
260
261 for (; at < top; at++) {
262 data.ip = at->from;
263 data.addr = at->to;
264
265 perf_output_sample(&handle, &header, &data, event);
266 }
267
268 perf_output_end(&handle);
269
270 /* There's new data available. */
271 event->hw.interrupts++;
272 event->pending_kill = POLL_IN;
273}
274
275/*
276 * PEBS
277 */
278
279static struct event_constraint intel_core_pebs_events[] = {
280 PEBS_EVENT_CONSTRAINT(0x00c0, 0x1), /* INSTR_RETIRED.ANY */
281 PEBS_EVENT_CONSTRAINT(0xfec1, 0x1), /* X87_OPS_RETIRED.ANY */
282 PEBS_EVENT_CONSTRAINT(0x00c5, 0x1), /* BR_INST_RETIRED.MISPRED */
283 PEBS_EVENT_CONSTRAINT(0x1fc7, 0x1), /* SIMD_INST_RETURED.ANY */
284 PEBS_EVENT_CONSTRAINT(0x01cb, 0x1), /* MEM_LOAD_RETIRED.L1D_MISS */
285 PEBS_EVENT_CONSTRAINT(0x02cb, 0x1), /* MEM_LOAD_RETIRED.L1D_LINE_MISS */
286 PEBS_EVENT_CONSTRAINT(0x04cb, 0x1), /* MEM_LOAD_RETIRED.L2_MISS */
287 PEBS_EVENT_CONSTRAINT(0x08cb, 0x1), /* MEM_LOAD_RETIRED.L2_LINE_MISS */
288 PEBS_EVENT_CONSTRAINT(0x10cb, 0x1), /* MEM_LOAD_RETIRED.DTLB_MISS */
289 EVENT_CONSTRAINT_END
290};
291
292static struct event_constraint intel_nehalem_pebs_events[] = {
293 PEBS_EVENT_CONSTRAINT(0x00c0, 0xf), /* INSTR_RETIRED.ANY */
294 PEBS_EVENT_CONSTRAINT(0xfec1, 0xf), /* X87_OPS_RETIRED.ANY */
295 PEBS_EVENT_CONSTRAINT(0x00c5, 0xf), /* BR_INST_RETIRED.MISPRED */
296 PEBS_EVENT_CONSTRAINT(0x1fc7, 0xf), /* SIMD_INST_RETURED.ANY */
297 PEBS_EVENT_CONSTRAINT(0x01cb, 0xf), /* MEM_LOAD_RETIRED.L1D_MISS */
298 PEBS_EVENT_CONSTRAINT(0x02cb, 0xf), /* MEM_LOAD_RETIRED.L1D_LINE_MISS */
299 PEBS_EVENT_CONSTRAINT(0x04cb, 0xf), /* MEM_LOAD_RETIRED.L2_MISS */
300 PEBS_EVENT_CONSTRAINT(0x08cb, 0xf), /* MEM_LOAD_RETIRED.L2_LINE_MISS */
301 PEBS_EVENT_CONSTRAINT(0x10cb, 0xf), /* MEM_LOAD_RETIRED.DTLB_MISS */
302 EVENT_CONSTRAINT_END
303};
304
305static struct event_constraint *
306intel_pebs_constraints(struct perf_event *event)
307{
308 struct event_constraint *c;
309
310 if (!event->attr.precise_ip)
311 return NULL;
312
313 if (x86_pmu.pebs_constraints) {
314 for_each_event_constraint(c, x86_pmu.pebs_constraints) {
315 if ((event->hw.config & c->cmask) == c->code)
316 return c;
317 }
318 }
319
320 return &emptyconstraint;
321}
322
323static void intel_pmu_pebs_enable(struct perf_event *event)
324{
325 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
326 struct hw_perf_event *hwc = &event->hw;
327
328 hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT;
329
330 cpuc->pebs_enabled |= 1ULL << hwc->idx;
331 WARN_ON_ONCE(cpuc->enabled);
332
333 if (x86_pmu.intel_cap.pebs_trap && event->attr.precise_ip > 1)
334 intel_pmu_lbr_enable(event);
335}
336
337static void intel_pmu_pebs_disable(struct perf_event *event)
338{
339 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
340 struct hw_perf_event *hwc = &event->hw;
341
342 cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
343 if (cpuc->enabled)
344 wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
345
346 hwc->config |= ARCH_PERFMON_EVENTSEL_INT;
347
348 if (x86_pmu.intel_cap.pebs_trap && event->attr.precise_ip > 1)
349 intel_pmu_lbr_disable(event);
350}
351
352static void intel_pmu_pebs_enable_all(void)
353{
354 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
355
356 if (cpuc->pebs_enabled)
357 wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
358}
359
360static void intel_pmu_pebs_disable_all(void)
361{
362 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
363
364 if (cpuc->pebs_enabled)
365 wrmsrl(MSR_IA32_PEBS_ENABLE, 0);
366}
367
368#include <asm/insn.h>
369
370static inline bool kernel_ip(unsigned long ip)
371{
372#ifdef CONFIG_X86_32
373 return ip > PAGE_OFFSET;
374#else
375 return (long)ip < 0;
376#endif
377}
378
379static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
380{
381 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
382 unsigned long from = cpuc->lbr_entries[0].from;
383 unsigned long old_to, to = cpuc->lbr_entries[0].to;
384 unsigned long ip = regs->ip;
385
386 /*
387 * We don't need to fixup if the PEBS assist is fault like
388 */
389 if (!x86_pmu.intel_cap.pebs_trap)
390 return 1;
391
392 /*
393 * No LBR entry, no basic block, no rewinding
394 */
395 if (!cpuc->lbr_stack.nr || !from || !to)
396 return 0;
397
398 /*
399 * Basic blocks should never cross user/kernel boundaries
400 */
401 if (kernel_ip(ip) != kernel_ip(to))
402 return 0;
403
404 /*
405 * unsigned math, either ip is before the start (impossible) or
406 * the basic block is larger than 1 page (sanity)
407 */
408 if ((ip - to) > PAGE_SIZE)
409 return 0;
410
411 /*
412 * We sampled a branch insn, rewind using the LBR stack
413 */
414 if (ip == to) {
415 regs->ip = from;
416 return 1;
417 }
418
419 do {
420 struct insn insn;
421 u8 buf[MAX_INSN_SIZE];
422 void *kaddr;
423
424 old_to = to;
425 if (!kernel_ip(ip)) {
426 int bytes, size = MAX_INSN_SIZE;
427
428 bytes = copy_from_user_nmi(buf, (void __user *)to, size);
429 if (bytes != size)
430 return 0;
431
432 kaddr = buf;
433 } else
434 kaddr = (void *)to;
435
436 kernel_insn_init(&insn, kaddr);
437 insn_get_length(&insn);
438 to += insn.length;
439 } while (to < ip);
440
441 if (to == ip) {
442 regs->ip = old_to;
443 return 1;
444 }
445
446 /*
447 * Even though we decoded the basic block, the instruction stream
448 * never matched the given IP, either the TO or the IP got corrupted.
449 */
450 return 0;
451}
452
453static int intel_pmu_save_and_restart(struct perf_event *event);
454
455static void __intel_pmu_pebs_event(struct perf_event *event,
456 struct pt_regs *iregs, void *__pebs)
457{
458 /*
459 * We cast to pebs_record_core since that is a subset of
460 * both formats and we don't use the other fields in this
461 * routine.
462 */
463 struct pebs_record_core *pebs = __pebs;
464 struct perf_sample_data data;
465 struct pt_regs regs;
466
467 if (!intel_pmu_save_and_restart(event))
468 return;
469
470 perf_sample_data_init(&data, 0);
471 data.period = event->hw.last_period;
472
473 /*
474 * We use the interrupt regs as a base because the PEBS record
475 * does not contain a full regs set, specifically it seems to
476 * lack segment descriptors, which get used by things like
477 * user_mode().
478 *
479 * In the simple case fix up only the IP and BP,SP regs, for
480 * PERF_SAMPLE_IP and PERF_SAMPLE_CALLCHAIN to function properly.
481 * A possible PERF_SAMPLE_REGS will have to transfer all regs.
482 */
483 regs = *iregs;
484 regs.ip = pebs->ip;
485 regs.bp = pebs->bp;
486 regs.sp = pebs->sp;
487
488 if (event->attr.precise_ip > 1 && intel_pmu_pebs_fixup_ip(&regs))
489 regs.flags |= PERF_EFLAGS_EXACT;
490 else
491 regs.flags &= ~PERF_EFLAGS_EXACT;
492
493 if (perf_event_overflow(event, 1, &data, &regs))
494 x86_pmu_stop(event);
495}
496
497static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)
498{
499 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
500 struct debug_store *ds = cpuc->ds;
501 struct perf_event *event = cpuc->events[0]; /* PMC0 only */
502 struct pebs_record_core *at, *top;
503 int n;
504
505 if (!ds || !x86_pmu.pebs)
506 return;
507
508 at = (struct pebs_record_core *)(unsigned long)ds->pebs_buffer_base;
509 top = (struct pebs_record_core *)(unsigned long)ds->pebs_index;
510
511 /*
512 * Whatever else happens, drain the thing
513 */
514 ds->pebs_index = ds->pebs_buffer_base;
515
516 if (!test_bit(0, cpuc->active_mask))
517 return;
518
519 WARN_ON_ONCE(!event);
520
521 if (!event->attr.precise_ip)
522 return;
523
524 n = top - at;
525 if (n <= 0)
526 return;
527
528 /*
529 * Should not happen, we program the threshold at 1 and do not
530 * set a reset value.
531 */
532 WARN_ON_ONCE(n > 1);
533 at += n - 1;
534
535 __intel_pmu_pebs_event(event, iregs, at);
536}
537
538static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
539{
540 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
541 struct debug_store *ds = cpuc->ds;
542 struct pebs_record_nhm *at, *top;
543 struct perf_event *event = NULL;
544 u64 status = 0;
545 int bit, n;
546
547 if (!ds || !x86_pmu.pebs)
548 return;
549
550 at = (struct pebs_record_nhm *)(unsigned long)ds->pebs_buffer_base;
551 top = (struct pebs_record_nhm *)(unsigned long)ds->pebs_index;
552
553 ds->pebs_index = ds->pebs_buffer_base;
554
555 n = top - at;
556 if (n <= 0)
557 return;
558
559 /*
560 * Should not happen, we program the threshold at 1 and do not
561 * set a reset value.
562 */
563 WARN_ON_ONCE(n > MAX_PEBS_EVENTS);
564
565 for ( ; at < top; at++) {
566 for_each_set_bit(bit, (unsigned long *)&at->status, MAX_PEBS_EVENTS) {
567 event = cpuc->events[bit];
568 if (!test_bit(bit, cpuc->active_mask))
569 continue;
570
571 WARN_ON_ONCE(!event);
572
573 if (!event->attr.precise_ip)
574 continue;
575
576 if (__test_and_set_bit(bit, (unsigned long *)&status))
577 continue;
578
579 break;
580 }
581
582 if (!event || bit >= MAX_PEBS_EVENTS)
583 continue;
584
585 __intel_pmu_pebs_event(event, iregs, at);
586 }
587}
588
589/*
590 * BTS, PEBS probe and setup
591 */
592
593static void intel_ds_init(void)
594{
595 /*
596 * No support for 32bit formats
597 */
598 if (!boot_cpu_has(X86_FEATURE_DTES64))
599 return;
600
601 x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS);
602 x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS);
603 if (x86_pmu.pebs) {
604 char pebs_type = x86_pmu.intel_cap.pebs_trap ? '+' : '-';
605 int format = x86_pmu.intel_cap.pebs_format;
606
607 switch (format) {
608 case 0:
609 printk(KERN_CONT "PEBS fmt0%c, ", pebs_type);
610 x86_pmu.pebs_record_size = sizeof(struct pebs_record_core);
611 x86_pmu.drain_pebs = intel_pmu_drain_pebs_core;
612 x86_pmu.pebs_constraints = intel_core_pebs_events;
613 break;
614
615 case 1:
616 printk(KERN_CONT "PEBS fmt1%c, ", pebs_type);
617 x86_pmu.pebs_record_size = sizeof(struct pebs_record_nhm);
618 x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
619 x86_pmu.pebs_constraints = intel_nehalem_pebs_events;
620 break;
621
622 default:
623 printk(KERN_CONT "no PEBS fmt%d%c, ", format, pebs_type);
624 x86_pmu.pebs = 0;
625 break;
626 }
627 }
628}
629
630#else /* CONFIG_CPU_SUP_INTEL */
631
632static int reserve_ds_buffers(void)
633{
634 return 0;
635}
636
637static void release_ds_buffers(void)
638{
639}
640
641#endif /* CONFIG_CPU_SUP_INTEL */
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
new file mode 100644
index 000000000000..d202c1bece1a
--- /dev/null
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -0,0 +1,218 @@
1#ifdef CONFIG_CPU_SUP_INTEL
2
3enum {
4 LBR_FORMAT_32 = 0x00,
5 LBR_FORMAT_LIP = 0x01,
6 LBR_FORMAT_EIP = 0x02,
7 LBR_FORMAT_EIP_FLAGS = 0x03,
8};
9
10/*
11 * We only support LBR implementations that have FREEZE_LBRS_ON_PMI
12 * otherwise it becomes near impossible to get a reliable stack.
13 */
14
15static void __intel_pmu_lbr_enable(void)
16{
17 u64 debugctl;
18
19 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
20 debugctl |= (DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);
21 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
22}
23
24static void __intel_pmu_lbr_disable(void)
25{
26 u64 debugctl;
27
28 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
29 debugctl &= ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);
30 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
31}
32
33static void intel_pmu_lbr_reset_32(void)
34{
35 int i;
36
37 for (i = 0; i < x86_pmu.lbr_nr; i++)
38 wrmsrl(x86_pmu.lbr_from + i, 0);
39}
40
41static void intel_pmu_lbr_reset_64(void)
42{
43 int i;
44
45 for (i = 0; i < x86_pmu.lbr_nr; i++) {
46 wrmsrl(x86_pmu.lbr_from + i, 0);
47 wrmsrl(x86_pmu.lbr_to + i, 0);
48 }
49}
50
51static void intel_pmu_lbr_reset(void)
52{
53 if (!x86_pmu.lbr_nr)
54 return;
55
56 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32)
57 intel_pmu_lbr_reset_32();
58 else
59 intel_pmu_lbr_reset_64();
60}
61
62static void intel_pmu_lbr_enable(struct perf_event *event)
63{
64 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
65
66 if (!x86_pmu.lbr_nr)
67 return;
68
69 WARN_ON_ONCE(cpuc->enabled);
70
71 /*
72 * Reset the LBR stack if we changed task context to
73 * avoid data leaks.
74 */
75
76 if (event->ctx->task && cpuc->lbr_context != event->ctx) {
77 intel_pmu_lbr_reset();
78 cpuc->lbr_context = event->ctx;
79 }
80
81 cpuc->lbr_users++;
82}
83
84static void intel_pmu_lbr_disable(struct perf_event *event)
85{
86 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
87
88 if (!x86_pmu.lbr_nr)
89 return;
90
91 cpuc->lbr_users--;
92 WARN_ON_ONCE(cpuc->lbr_users < 0);
93
94 if (cpuc->enabled && !cpuc->lbr_users)
95 __intel_pmu_lbr_disable();
96}
97
98static void intel_pmu_lbr_enable_all(void)
99{
100 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
101
102 if (cpuc->lbr_users)
103 __intel_pmu_lbr_enable();
104}
105
106static void intel_pmu_lbr_disable_all(void)
107{
108 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
109
110 if (cpuc->lbr_users)
111 __intel_pmu_lbr_disable();
112}
113
114static inline u64 intel_pmu_lbr_tos(void)
115{
116 u64 tos;
117
118 rdmsrl(x86_pmu.lbr_tos, tos);
119
120 return tos;
121}
122
123static void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc)
124{
125 unsigned long mask = x86_pmu.lbr_nr - 1;
126 u64 tos = intel_pmu_lbr_tos();
127 int i;
128
129 for (i = 0; i < x86_pmu.lbr_nr; i++) {
130 unsigned long lbr_idx = (tos - i) & mask;
131 union {
132 struct {
133 u32 from;
134 u32 to;
135 };
136 u64 lbr;
137 } msr_lastbranch;
138
139 rdmsrl(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr);
140
141 cpuc->lbr_entries[i].from = msr_lastbranch.from;
142 cpuc->lbr_entries[i].to = msr_lastbranch.to;
143 cpuc->lbr_entries[i].flags = 0;
144 }
145 cpuc->lbr_stack.nr = i;
146}
147
148#define LBR_FROM_FLAG_MISPRED (1ULL << 63)
149
150/*
151 * Due to lack of segmentation in Linux the effective address (offset)
152 * is the same as the linear address, allowing us to merge the LIP and EIP
153 * LBR formats.
154 */
155static void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
156{
157 unsigned long mask = x86_pmu.lbr_nr - 1;
158 int lbr_format = x86_pmu.intel_cap.lbr_format;
159 u64 tos = intel_pmu_lbr_tos();
160 int i;
161
162 for (i = 0; i < x86_pmu.lbr_nr; i++) {
163 unsigned long lbr_idx = (tos - i) & mask;
164 u64 from, to, flags = 0;
165
166 rdmsrl(x86_pmu.lbr_from + lbr_idx, from);
167 rdmsrl(x86_pmu.lbr_to + lbr_idx, to);
168
169 if (lbr_format == LBR_FORMAT_EIP_FLAGS) {
170 flags = !!(from & LBR_FROM_FLAG_MISPRED);
171 from = (u64)((((s64)from) << 1) >> 1);
172 }
173
174 cpuc->lbr_entries[i].from = from;
175 cpuc->lbr_entries[i].to = to;
176 cpuc->lbr_entries[i].flags = flags;
177 }
178 cpuc->lbr_stack.nr = i;
179}
180
181static void intel_pmu_lbr_read(void)
182{
183 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
184
185 if (!cpuc->lbr_users)
186 return;
187
188 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32)
189 intel_pmu_lbr_read_32(cpuc);
190 else
191 intel_pmu_lbr_read_64(cpuc);
192}
193
194static void intel_pmu_lbr_init_core(void)
195{
196 x86_pmu.lbr_nr = 4;
197 x86_pmu.lbr_tos = 0x01c9;
198 x86_pmu.lbr_from = 0x40;
199 x86_pmu.lbr_to = 0x60;
200}
201
202static void intel_pmu_lbr_init_nhm(void)
203{
204 x86_pmu.lbr_nr = 16;
205 x86_pmu.lbr_tos = 0x01c9;
206 x86_pmu.lbr_from = 0x680;
207 x86_pmu.lbr_to = 0x6c0;
208}
209
210static void intel_pmu_lbr_init_atom(void)
211{
212 x86_pmu.lbr_nr = 8;
213 x86_pmu.lbr_tos = 0x01c9;
214 x86_pmu.lbr_from = 0x40;
215 x86_pmu.lbr_to = 0x60;
216}
217
218#endif /* CONFIG_CPU_SUP_INTEL */
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
new file mode 100644
index 000000000000..424fc8de68e4
--- /dev/null
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -0,0 +1,857 @@
1/*
2 * Netburst Perfomance Events (P4, old Xeon)
3 *
4 * Copyright (C) 2010 Parallels, Inc., Cyrill Gorcunov <gorcunov@openvz.org>
5 * Copyright (C) 2010 Intel Corporation, Lin Ming <ming.m.lin@intel.com>
6 *
7 * For licencing details see kernel-base/COPYING
8 */
9
10#ifdef CONFIG_CPU_SUP_INTEL
11
12#include <asm/perf_event_p4.h>
13
14#define P4_CNTR_LIMIT 3
15/*
16 * array indices: 0,1 - HT threads, used with HT enabled cpu
17 */
18struct p4_event_bind {
19 unsigned int opcode; /* Event code and ESCR selector */
20 unsigned int escr_msr[2]; /* ESCR MSR for this event */
21 char cntr[2][P4_CNTR_LIMIT]; /* counter index (offset), -1 on abscence */
22};
23
24struct p4_cache_event_bind {
25 unsigned int metric_pebs;
26 unsigned int metric_vert;
27};
28
29#define P4_GEN_CACHE_EVENT_BIND(name) \
30 [P4_CACHE__##name] = { \
31 .metric_pebs = P4_PEBS__##name, \
32 .metric_vert = P4_VERT__##name, \
33 }
34
35static struct p4_cache_event_bind p4_cache_event_bind_map[] = {
36 P4_GEN_CACHE_EVENT_BIND(1stl_cache_load_miss_retired),
37 P4_GEN_CACHE_EVENT_BIND(2ndl_cache_load_miss_retired),
38 P4_GEN_CACHE_EVENT_BIND(dtlb_load_miss_retired),
39 P4_GEN_CACHE_EVENT_BIND(dtlb_store_miss_retired),
40};
41
42/*
43 * Note that we don't use CCCR1 here, there is an
44 * exception for P4_BSQ_ALLOCATION but we just have
45 * no workaround
46 *
47 * consider this binding as resources which particular
48 * event may borrow, it doesn't contain EventMask,
49 * Tags and friends -- they are left to a caller
50 */
51static struct p4_event_bind p4_event_bind_map[] = {
52 [P4_EVENT_TC_DELIVER_MODE] = {
53 .opcode = P4_OPCODE(P4_EVENT_TC_DELIVER_MODE),
54 .escr_msr = { MSR_P4_TC_ESCR0, MSR_P4_TC_ESCR1 },
55 .cntr = { {4, 5, -1}, {6, 7, -1} },
56 },
57 [P4_EVENT_BPU_FETCH_REQUEST] = {
58 .opcode = P4_OPCODE(P4_EVENT_BPU_FETCH_REQUEST),
59 .escr_msr = { MSR_P4_BPU_ESCR0, MSR_P4_BPU_ESCR1 },
60 .cntr = { {0, -1, -1}, {2, -1, -1} },
61 },
62 [P4_EVENT_ITLB_REFERENCE] = {
63 .opcode = P4_OPCODE(P4_EVENT_ITLB_REFERENCE),
64 .escr_msr = { MSR_P4_ITLB_ESCR0, MSR_P4_ITLB_ESCR1 },
65 .cntr = { {0, -1, -1}, {2, -1, -1} },
66 },
67 [P4_EVENT_MEMORY_CANCEL] = {
68 .opcode = P4_OPCODE(P4_EVENT_MEMORY_CANCEL),
69 .escr_msr = { MSR_P4_DAC_ESCR0, MSR_P4_DAC_ESCR1 },
70 .cntr = { {8, 9, -1}, {10, 11, -1} },
71 },
72 [P4_EVENT_MEMORY_COMPLETE] = {
73 .opcode = P4_OPCODE(P4_EVENT_MEMORY_COMPLETE),
74 .escr_msr = { MSR_P4_SAAT_ESCR0 , MSR_P4_SAAT_ESCR1 },
75 .cntr = { {8, 9, -1}, {10, 11, -1} },
76 },
77 [P4_EVENT_LOAD_PORT_REPLAY] = {
78 .opcode = P4_OPCODE(P4_EVENT_LOAD_PORT_REPLAY),
79 .escr_msr = { MSR_P4_SAAT_ESCR0, MSR_P4_SAAT_ESCR1 },
80 .cntr = { {8, 9, -1}, {10, 11, -1} },
81 },
82 [P4_EVENT_STORE_PORT_REPLAY] = {
83 .opcode = P4_OPCODE(P4_EVENT_STORE_PORT_REPLAY),
84 .escr_msr = { MSR_P4_SAAT_ESCR0 , MSR_P4_SAAT_ESCR1 },
85 .cntr = { {8, 9, -1}, {10, 11, -1} },
86 },
87 [P4_EVENT_MOB_LOAD_REPLAY] = {
88 .opcode = P4_OPCODE(P4_EVENT_MOB_LOAD_REPLAY),
89 .escr_msr = { MSR_P4_MOB_ESCR0, MSR_P4_MOB_ESCR1 },
90 .cntr = { {0, -1, -1}, {2, -1, -1} },
91 },
92 [P4_EVENT_PAGE_WALK_TYPE] = {
93 .opcode = P4_OPCODE(P4_EVENT_PAGE_WALK_TYPE),
94 .escr_msr = { MSR_P4_PMH_ESCR0, MSR_P4_PMH_ESCR1 },
95 .cntr = { {0, -1, -1}, {2, -1, -1} },
96 },
97 [P4_EVENT_BSQ_CACHE_REFERENCE] = {
98 .opcode = P4_OPCODE(P4_EVENT_BSQ_CACHE_REFERENCE),
99 .escr_msr = { MSR_P4_BSU_ESCR0, MSR_P4_BSU_ESCR1 },
100 .cntr = { {0, -1, -1}, {2, -1, -1} },
101 },
102 [P4_EVENT_IOQ_ALLOCATION] = {
103 .opcode = P4_OPCODE(P4_EVENT_IOQ_ALLOCATION),
104 .escr_msr = { MSR_P4_FSB_ESCR0, MSR_P4_FSB_ESCR1 },
105 .cntr = { {0, -1, -1}, {2, -1, -1} },
106 },
107 [P4_EVENT_IOQ_ACTIVE_ENTRIES] = { /* shared ESCR */
108 .opcode = P4_OPCODE(P4_EVENT_IOQ_ACTIVE_ENTRIES),
109 .escr_msr = { MSR_P4_FSB_ESCR1, MSR_P4_FSB_ESCR1 },
110 .cntr = { {2, -1, -1}, {3, -1, -1} },
111 },
112 [P4_EVENT_FSB_DATA_ACTIVITY] = {
113 .opcode = P4_OPCODE(P4_EVENT_FSB_DATA_ACTIVITY),
114 .escr_msr = { MSR_P4_FSB_ESCR0, MSR_P4_FSB_ESCR1 },
115 .cntr = { {0, -1, -1}, {2, -1, -1} },
116 },
117 [P4_EVENT_BSQ_ALLOCATION] = { /* shared ESCR, broken CCCR1 */
118 .opcode = P4_OPCODE(P4_EVENT_BSQ_ALLOCATION),
119 .escr_msr = { MSR_P4_BSU_ESCR0, MSR_P4_BSU_ESCR0 },
120 .cntr = { {0, -1, -1}, {1, -1, -1} },
121 },
122 [P4_EVENT_BSQ_ACTIVE_ENTRIES] = { /* shared ESCR */
123 .opcode = P4_OPCODE(P4_EVENT_BSQ_ACTIVE_ENTRIES),
124 .escr_msr = { MSR_P4_BSU_ESCR1 , MSR_P4_BSU_ESCR1 },
125 .cntr = { {2, -1, -1}, {3, -1, -1} },
126 },
127 [P4_EVENT_SSE_INPUT_ASSIST] = {
128 .opcode = P4_OPCODE(P4_EVENT_SSE_INPUT_ASSIST),
129 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
130 .cntr = { {8, 9, -1}, {10, 11, -1} },
131 },
132 [P4_EVENT_PACKED_SP_UOP] = {
133 .opcode = P4_OPCODE(P4_EVENT_PACKED_SP_UOP),
134 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
135 .cntr = { {8, 9, -1}, {10, 11, -1} },
136 },
137 [P4_EVENT_PACKED_DP_UOP] = {
138 .opcode = P4_OPCODE(P4_EVENT_PACKED_DP_UOP),
139 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
140 .cntr = { {8, 9, -1}, {10, 11, -1} },
141 },
142 [P4_EVENT_SCALAR_SP_UOP] = {
143 .opcode = P4_OPCODE(P4_EVENT_SCALAR_SP_UOP),
144 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
145 .cntr = { {8, 9, -1}, {10, 11, -1} },
146 },
147 [P4_EVENT_SCALAR_DP_UOP] = {
148 .opcode = P4_OPCODE(P4_EVENT_SCALAR_DP_UOP),
149 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
150 .cntr = { {8, 9, -1}, {10, 11, -1} },
151 },
152 [P4_EVENT_64BIT_MMX_UOP] = {
153 .opcode = P4_OPCODE(P4_EVENT_64BIT_MMX_UOP),
154 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
155 .cntr = { {8, 9, -1}, {10, 11, -1} },
156 },
157 [P4_EVENT_128BIT_MMX_UOP] = {
158 .opcode = P4_OPCODE(P4_EVENT_128BIT_MMX_UOP),
159 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
160 .cntr = { {8, 9, -1}, {10, 11, -1} },
161 },
162 [P4_EVENT_X87_FP_UOP] = {
163 .opcode = P4_OPCODE(P4_EVENT_X87_FP_UOP),
164 .escr_msr = { MSR_P4_FIRM_ESCR0, MSR_P4_FIRM_ESCR1 },
165 .cntr = { {8, 9, -1}, {10, 11, -1} },
166 },
167 [P4_EVENT_TC_MISC] = {
168 .opcode = P4_OPCODE(P4_EVENT_TC_MISC),
169 .escr_msr = { MSR_P4_TC_ESCR0, MSR_P4_TC_ESCR1 },
170 .cntr = { {4, 5, -1}, {6, 7, -1} },
171 },
172 [P4_EVENT_GLOBAL_POWER_EVENTS] = {
173 .opcode = P4_OPCODE(P4_EVENT_GLOBAL_POWER_EVENTS),
174 .escr_msr = { MSR_P4_FSB_ESCR0, MSR_P4_FSB_ESCR1 },
175 .cntr = { {0, -1, -1}, {2, -1, -1} },
176 },
177 [P4_EVENT_TC_MS_XFER] = {
178 .opcode = P4_OPCODE(P4_EVENT_TC_MS_XFER),
179 .escr_msr = { MSR_P4_MS_ESCR0, MSR_P4_MS_ESCR1 },
180 .cntr = { {4, 5, -1}, {6, 7, -1} },
181 },
182 [P4_EVENT_UOP_QUEUE_WRITES] = {
183 .opcode = P4_OPCODE(P4_EVENT_UOP_QUEUE_WRITES),
184 .escr_msr = { MSR_P4_MS_ESCR0, MSR_P4_MS_ESCR1 },
185 .cntr = { {4, 5, -1}, {6, 7, -1} },
186 },
187 [P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE] = {
188 .opcode = P4_OPCODE(P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE),
189 .escr_msr = { MSR_P4_TBPU_ESCR0 , MSR_P4_TBPU_ESCR0 },
190 .cntr = { {4, 5, -1}, {6, 7, -1} },
191 },
192 [P4_EVENT_RETIRED_BRANCH_TYPE] = {
193 .opcode = P4_OPCODE(P4_EVENT_RETIRED_BRANCH_TYPE),
194 .escr_msr = { MSR_P4_TBPU_ESCR0 , MSR_P4_TBPU_ESCR1 },
195 .cntr = { {4, 5, -1}, {6, 7, -1} },
196 },
197 [P4_EVENT_RESOURCE_STALL] = {
198 .opcode = P4_OPCODE(P4_EVENT_RESOURCE_STALL),
199 .escr_msr = { MSR_P4_ALF_ESCR0, MSR_P4_ALF_ESCR1 },
200 .cntr = { {12, 13, 16}, {14, 15, 17} },
201 },
202 [P4_EVENT_WC_BUFFER] = {
203 .opcode = P4_OPCODE(P4_EVENT_WC_BUFFER),
204 .escr_msr = { MSR_P4_DAC_ESCR0, MSR_P4_DAC_ESCR1 },
205 .cntr = { {8, 9, -1}, {10, 11, -1} },
206 },
207 [P4_EVENT_B2B_CYCLES] = {
208 .opcode = P4_OPCODE(P4_EVENT_B2B_CYCLES),
209 .escr_msr = { MSR_P4_FSB_ESCR0, MSR_P4_FSB_ESCR1 },
210 .cntr = { {0, -1, -1}, {2, -1, -1} },
211 },
212 [P4_EVENT_BNR] = {
213 .opcode = P4_OPCODE(P4_EVENT_BNR),
214 .escr_msr = { MSR_P4_FSB_ESCR0, MSR_P4_FSB_ESCR1 },
215 .cntr = { {0, -1, -1}, {2, -1, -1} },
216 },
217 [P4_EVENT_SNOOP] = {
218 .opcode = P4_OPCODE(P4_EVENT_SNOOP),
219 .escr_msr = { MSR_P4_FSB_ESCR0, MSR_P4_FSB_ESCR1 },
220 .cntr = { {0, -1, -1}, {2, -1, -1} },
221 },
222 [P4_EVENT_RESPONSE] = {
223 .opcode = P4_OPCODE(P4_EVENT_RESPONSE),
224 .escr_msr = { MSR_P4_FSB_ESCR0, MSR_P4_FSB_ESCR1 },
225 .cntr = { {0, -1, -1}, {2, -1, -1} },
226 },
227 [P4_EVENT_FRONT_END_EVENT] = {
228 .opcode = P4_OPCODE(P4_EVENT_FRONT_END_EVENT),
229 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
230 .cntr = { {12, 13, 16}, {14, 15, 17} },
231 },
232 [P4_EVENT_EXECUTION_EVENT] = {
233 .opcode = P4_OPCODE(P4_EVENT_EXECUTION_EVENT),
234 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
235 .cntr = { {12, 13, 16}, {14, 15, 17} },
236 },
237 [P4_EVENT_REPLAY_EVENT] = {
238 .opcode = P4_OPCODE(P4_EVENT_REPLAY_EVENT),
239 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
240 .cntr = { {12, 13, 16}, {14, 15, 17} },
241 },
242 [P4_EVENT_INSTR_RETIRED] = {
243 .opcode = P4_OPCODE(P4_EVENT_INSTR_RETIRED),
244 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
245 .cntr = { {12, 13, 16}, {14, 15, 17} },
246 },
247 [P4_EVENT_UOPS_RETIRED] = {
248 .opcode = P4_OPCODE(P4_EVENT_UOPS_RETIRED),
249 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
250 .cntr = { {12, 13, 16}, {14, 15, 17} },
251 },
252 [P4_EVENT_UOP_TYPE] = {
253 .opcode = P4_OPCODE(P4_EVENT_UOP_TYPE),
254 .escr_msr = { MSR_P4_RAT_ESCR0, MSR_P4_RAT_ESCR1 },
255 .cntr = { {12, 13, 16}, {14, 15, 17} },
256 },
257 [P4_EVENT_BRANCH_RETIRED] = {
258 .opcode = P4_OPCODE(P4_EVENT_BRANCH_RETIRED),
259 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
260 .cntr = { {12, 13, 16}, {14, 15, 17} },
261 },
262 [P4_EVENT_MISPRED_BRANCH_RETIRED] = {
263 .opcode = P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED),
264 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
265 .cntr = { {12, 13, 16}, {14, 15, 17} },
266 },
267 [P4_EVENT_X87_ASSIST] = {
268 .opcode = P4_OPCODE(P4_EVENT_X87_ASSIST),
269 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
270 .cntr = { {12, 13, 16}, {14, 15, 17} },
271 },
272 [P4_EVENT_MACHINE_CLEAR] = {
273 .opcode = P4_OPCODE(P4_EVENT_MACHINE_CLEAR),
274 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
275 .cntr = { {12, 13, 16}, {14, 15, 17} },
276 },
277 [P4_EVENT_INSTR_COMPLETED] = {
278 .opcode = P4_OPCODE(P4_EVENT_INSTR_COMPLETED),
279 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
280 .cntr = { {12, 13, 16}, {14, 15, 17} },
281 },
282};
283
284#define P4_GEN_CACHE_EVENT(event, bit, cache_event) \
285 p4_config_pack_escr(P4_ESCR_EVENT(event) | \
286 P4_ESCR_EMASK_BIT(event, bit)) | \
287 p4_config_pack_cccr(cache_event | \
288 P4_CCCR_ESEL(P4_OPCODE_ESEL(P4_OPCODE(event))))
289
290static __initconst const u64 p4_hw_cache_event_ids
291 [PERF_COUNT_HW_CACHE_MAX]
292 [PERF_COUNT_HW_CACHE_OP_MAX]
293 [PERF_COUNT_HW_CACHE_RESULT_MAX] =
294{
295 [ C(L1D ) ] = {
296 [ C(OP_READ) ] = {
297 [ C(RESULT_ACCESS) ] = 0x0,
298 [ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
299 P4_CACHE__1stl_cache_load_miss_retired),
300 },
301 },
302 [ C(LL ) ] = {
303 [ C(OP_READ) ] = {
304 [ C(RESULT_ACCESS) ] = 0x0,
305 [ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
306 P4_CACHE__2ndl_cache_load_miss_retired),
307 },
308},
309 [ C(DTLB) ] = {
310 [ C(OP_READ) ] = {
311 [ C(RESULT_ACCESS) ] = 0x0,
312 [ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
313 P4_CACHE__dtlb_load_miss_retired),
314 },
315 [ C(OP_WRITE) ] = {
316 [ C(RESULT_ACCESS) ] = 0x0,
317 [ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
318 P4_CACHE__dtlb_store_miss_retired),
319 },
320 },
321 [ C(ITLB) ] = {
322 [ C(OP_READ) ] = {
323 [ C(RESULT_ACCESS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, HIT,
324 P4_CACHE__itlb_reference_hit),
325 [ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, MISS,
326 P4_CACHE__itlb_reference_miss),
327 },
328 [ C(OP_WRITE) ] = {
329 [ C(RESULT_ACCESS) ] = -1,
330 [ C(RESULT_MISS) ] = -1,
331 },
332 [ C(OP_PREFETCH) ] = {
333 [ C(RESULT_ACCESS) ] = -1,
334 [ C(RESULT_MISS) ] = -1,
335 },
336 },
337};
338
339static u64 p4_general_events[PERF_COUNT_HW_MAX] = {
340 /* non-halted CPU clocks */
341 [PERF_COUNT_HW_CPU_CYCLES] =
342 p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_GLOBAL_POWER_EVENTS) |
343 P4_ESCR_EMASK_BIT(P4_EVENT_GLOBAL_POWER_EVENTS, RUNNING)),
344
345 /*
346 * retired instructions
347 * in a sake of simplicity we don't use the FSB tagging
348 */
349 [PERF_COUNT_HW_INSTRUCTIONS] =
350 p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_INSTR_RETIRED) |
351 P4_ESCR_EMASK_BIT(P4_EVENT_INSTR_RETIRED, NBOGUSNTAG) |
352 P4_ESCR_EMASK_BIT(P4_EVENT_INSTR_RETIRED, BOGUSNTAG)),
353
354 /* cache hits */
355 [PERF_COUNT_HW_CACHE_REFERENCES] =
356 p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_BSQ_CACHE_REFERENCE) |
357 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_HITS) |
358 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_HITE) |
359 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_HITM) |
360 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_HITS) |
361 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_HITE) |
362 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_HITM)),
363
364 /* cache misses */
365 [PERF_COUNT_HW_CACHE_MISSES] =
366 p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_BSQ_CACHE_REFERENCE) |
367 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_2ndL_MISS) |
368 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, RD_3rdL_MISS) |
369 P4_ESCR_EMASK_BIT(P4_EVENT_BSQ_CACHE_REFERENCE, WR_2ndL_MISS)),
370
371 /* branch instructions retired */
372 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =
373 p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_RETIRED_BRANCH_TYPE) |
374 P4_ESCR_EMASK_BIT(P4_EVENT_RETIRED_BRANCH_TYPE, CONDITIONAL) |
375 P4_ESCR_EMASK_BIT(P4_EVENT_RETIRED_BRANCH_TYPE, CALL) |
376 P4_ESCR_EMASK_BIT(P4_EVENT_RETIRED_BRANCH_TYPE, RETURN) |
377 P4_ESCR_EMASK_BIT(P4_EVENT_RETIRED_BRANCH_TYPE, INDIRECT)),
378
379 /* mispredicted branches retired */
380 [PERF_COUNT_HW_BRANCH_MISSES] =
381 p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_MISPRED_BRANCH_RETIRED) |
382 P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS)),
383
384 /* bus ready clocks (cpu is driving #DRDY_DRV\#DRDY_OWN): */
385 [PERF_COUNT_HW_BUS_CYCLES] =
386 p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_FSB_DATA_ACTIVITY) |
387 P4_ESCR_EMASK_BIT(P4_EVENT_FSB_DATA_ACTIVITY, DRDY_DRV) |
388 P4_ESCR_EMASK_BIT(P4_EVENT_FSB_DATA_ACTIVITY, DRDY_OWN)) |
389 p4_config_pack_cccr(P4_CCCR_EDGE | P4_CCCR_COMPARE),
390};
391
392static struct p4_event_bind *p4_config_get_bind(u64 config)
393{
394 unsigned int evnt = p4_config_unpack_event(config);
395 struct p4_event_bind *bind = NULL;
396
397 if (evnt < ARRAY_SIZE(p4_event_bind_map))
398 bind = &p4_event_bind_map[evnt];
399
400 return bind;
401}
402
403static u64 p4_pmu_event_map(int hw_event)
404{
405 struct p4_event_bind *bind;
406 unsigned int esel;
407 u64 config;
408
409 config = p4_general_events[hw_event];
410 bind = p4_config_get_bind(config);
411 esel = P4_OPCODE_ESEL(bind->opcode);
412 config |= p4_config_pack_cccr(P4_CCCR_ESEL(esel));
413
414 return config;
415}
416
417static int p4_hw_config(struct perf_event *event)
418{
419 int cpu = get_cpu();
420 int rc = 0;
421 unsigned int evnt;
422 u32 escr, cccr;
423
424 /*
425 * the reason we use cpu that early is that: if we get scheduled
426 * first time on the same cpu -- we will not need swap thread
427 * specific flags in config (and will save some cpu cycles)
428 */
429
430 cccr = p4_default_cccr_conf(cpu);
431 escr = p4_default_escr_conf(cpu, event->attr.exclude_kernel,
432 event->attr.exclude_user);
433 event->hw.config = p4_config_pack_escr(escr) |
434 p4_config_pack_cccr(cccr);
435
436 if (p4_ht_active() && p4_ht_thread(cpu))
437 event->hw.config = p4_set_ht_bit(event->hw.config);
438
439 if (event->attr.type == PERF_TYPE_RAW) {
440
441 /* user data may have out-of-bound event index */
442 evnt = p4_config_unpack_event(event->attr.config);
443 if (evnt >= ARRAY_SIZE(p4_event_bind_map)) {
444 rc = -EINVAL;
445 goto out;
446 }
447
448 /*
449 * We don't control raw events so it's up to the caller
450 * to pass sane values (and we don't count the thread number
451 * on HT machine but allow HT-compatible specifics to be
452 * passed on)
453 *
454 * XXX: HT wide things should check perf_paranoid_cpu() &&
455 * CAP_SYS_ADMIN
456 */
457 event->hw.config |= event->attr.config &
458 (p4_config_pack_escr(P4_ESCR_MASK_HT) |
459 p4_config_pack_cccr(P4_CCCR_MASK_HT));
460 }
461
462 rc = x86_setup_perfctr(event);
463out:
464 put_cpu();
465 return rc;
466}
467
468static inline void p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
469{
470 unsigned long dummy;
471
472 rdmsrl(hwc->config_base + hwc->idx, dummy);
473 if (dummy & P4_CCCR_OVF) {
474 (void)checking_wrmsrl(hwc->config_base + hwc->idx,
475 ((u64)dummy) & ~P4_CCCR_OVF);
476 }
477}
478
479static inline void p4_pmu_disable_event(struct perf_event *event)
480{
481 struct hw_perf_event *hwc = &event->hw;
482
483 /*
484 * If event gets disabled while counter is in overflowed
485 * state we need to clear P4_CCCR_OVF, otherwise interrupt get
486 * asserted again and again
487 */
488 (void)checking_wrmsrl(hwc->config_base + hwc->idx,
489 (u64)(p4_config_unpack_cccr(hwc->config)) &
490 ~P4_CCCR_ENABLE & ~P4_CCCR_OVF & ~P4_CCCR_RESERVED);
491}
492
493static void p4_pmu_disable_all(void)
494{
495 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
496 int idx;
497
498 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
499 struct perf_event *event = cpuc->events[idx];
500 if (!test_bit(idx, cpuc->active_mask))
501 continue;
502 p4_pmu_disable_event(event);
503 }
504}
505
506static void p4_pmu_enable_event(struct perf_event *event)
507{
508 struct hw_perf_event *hwc = &event->hw;
509 int thread = p4_ht_config_thread(hwc->config);
510 u64 escr_conf = p4_config_unpack_escr(p4_clear_ht_bit(hwc->config));
511 unsigned int idx = p4_config_unpack_event(hwc->config);
512 unsigned int idx_cache = p4_config_unpack_cache_event(hwc->config);
513 struct p4_event_bind *bind;
514 struct p4_cache_event_bind *bind_cache;
515 u64 escr_addr, cccr;
516
517 bind = &p4_event_bind_map[idx];
518 escr_addr = (u64)bind->escr_msr[thread];
519
520 /*
521 * - we dont support cascaded counters yet
522 * - and counter 1 is broken (erratum)
523 */
524 WARN_ON_ONCE(p4_is_event_cascaded(hwc->config));
525 WARN_ON_ONCE(hwc->idx == 1);
526
527 /* we need a real Event value */
528 escr_conf &= ~P4_ESCR_EVENT_MASK;
529 escr_conf |= P4_ESCR_EVENT(P4_OPCODE_EVNT(bind->opcode));
530
531 cccr = p4_config_unpack_cccr(hwc->config);
532
533 /*
534 * it could be Cache event so that we need to
535 * set metrics into additional MSRs
536 */
537 BUILD_BUG_ON(P4_CACHE__MAX > P4_CCCR_CACHE_OPS_MASK);
538 if (idx_cache > P4_CACHE__NONE &&
539 idx_cache < ARRAY_SIZE(p4_cache_event_bind_map)) {
540 bind_cache = &p4_cache_event_bind_map[idx_cache];
541 (void)checking_wrmsrl(MSR_IA32_PEBS_ENABLE, (u64)bind_cache->metric_pebs);
542 (void)checking_wrmsrl(MSR_P4_PEBS_MATRIX_VERT, (u64)bind_cache->metric_vert);
543 }
544
545 (void)checking_wrmsrl(escr_addr, escr_conf);
546 (void)checking_wrmsrl(hwc->config_base + hwc->idx,
547 (cccr & ~P4_CCCR_RESERVED) | P4_CCCR_ENABLE);
548}
549
550static void p4_pmu_enable_all(int added)
551{
552 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
553 int idx;
554
555 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
556 struct perf_event *event = cpuc->events[idx];
557 if (!test_bit(idx, cpuc->active_mask))
558 continue;
559 p4_pmu_enable_event(event);
560 }
561}
562
563static int p4_pmu_handle_irq(struct pt_regs *regs)
564{
565 struct perf_sample_data data;
566 struct cpu_hw_events *cpuc;
567 struct perf_event *event;
568 struct hw_perf_event *hwc;
569 int idx, handled = 0;
570 u64 val;
571
572 data.addr = 0;
573 data.raw = NULL;
574
575 cpuc = &__get_cpu_var(cpu_hw_events);
576
577 for (idx = 0; idx < x86_pmu.num_counters; idx++) {
578
579 if (!test_bit(idx, cpuc->active_mask))
580 continue;
581
582 event = cpuc->events[idx];
583 hwc = &event->hw;
584
585 WARN_ON_ONCE(hwc->idx != idx);
586
587 /*
588 * FIXME: Redundant call, actually not needed
589 * but just to check if we're screwed
590 */
591 p4_pmu_clear_cccr_ovf(hwc);
592
593 val = x86_perf_event_update(event);
594 if (val & (1ULL << (x86_pmu.cntval_bits - 1)))
595 continue;
596
597 /*
598 * event overflow
599 */
600 handled = 1;
601 data.period = event->hw.last_period;
602
603 if (!x86_perf_event_set_period(event))
604 continue;
605 if (perf_event_overflow(event, 1, &data, regs))
606 p4_pmu_disable_event(event);
607 }
608
609 if (handled) {
610 /* p4 quirk: unmask it again */
611 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
612 inc_irq_stat(apic_perf_irqs);
613 }
614
615 return handled;
616}
617
618/*
619 * swap thread specific fields according to a thread
620 * we are going to run on
621 */
622static void p4_pmu_swap_config_ts(struct hw_perf_event *hwc, int cpu)
623{
624 u32 escr, cccr;
625
626 /*
627 * we either lucky and continue on same cpu or no HT support
628 */
629 if (!p4_should_swap_ts(hwc->config, cpu))
630 return;
631
632 /*
633 * the event is migrated from an another logical
634 * cpu, so we need to swap thread specific flags
635 */
636
637 escr = p4_config_unpack_escr(hwc->config);
638 cccr = p4_config_unpack_cccr(hwc->config);
639
640 if (p4_ht_thread(cpu)) {
641 cccr &= ~P4_CCCR_OVF_PMI_T0;
642 cccr |= P4_CCCR_OVF_PMI_T1;
643 if (escr & P4_ESCR_T0_OS) {
644 escr &= ~P4_ESCR_T0_OS;
645 escr |= P4_ESCR_T1_OS;
646 }
647 if (escr & P4_ESCR_T0_USR) {
648 escr &= ~P4_ESCR_T0_USR;
649 escr |= P4_ESCR_T1_USR;
650 }
651 hwc->config = p4_config_pack_escr(escr);
652 hwc->config |= p4_config_pack_cccr(cccr);
653 hwc->config |= P4_CONFIG_HT;
654 } else {
655 cccr &= ~P4_CCCR_OVF_PMI_T1;
656 cccr |= P4_CCCR_OVF_PMI_T0;
657 if (escr & P4_ESCR_T1_OS) {
658 escr &= ~P4_ESCR_T1_OS;
659 escr |= P4_ESCR_T0_OS;
660 }
661 if (escr & P4_ESCR_T1_USR) {
662 escr &= ~P4_ESCR_T1_USR;
663 escr |= P4_ESCR_T0_USR;
664 }
665 hwc->config = p4_config_pack_escr(escr);
666 hwc->config |= p4_config_pack_cccr(cccr);
667 hwc->config &= ~P4_CONFIG_HT;
668 }
669}
670
671/*
672 * ESCR address hashing is tricky, ESCRs are not sequential
673 * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03e0) and
674 * the metric between any ESCRs is laid in range [0xa0,0xe1]
675 *
676 * so we make ~70% filled hashtable
677 */
678
679#define P4_ESCR_MSR_BASE 0x000003a0
680#define P4_ESCR_MSR_MAX 0x000003e1
681#define P4_ESCR_MSR_TABLE_SIZE (P4_ESCR_MSR_MAX - P4_ESCR_MSR_BASE + 1)
682#define P4_ESCR_MSR_IDX(msr) (msr - P4_ESCR_MSR_BASE)
683#define P4_ESCR_MSR_TABLE_ENTRY(msr) [P4_ESCR_MSR_IDX(msr)] = msr
684
685static const unsigned int p4_escr_table[P4_ESCR_MSR_TABLE_SIZE] = {
686 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_ALF_ESCR0),
687 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_ALF_ESCR1),
688 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_BPU_ESCR0),
689 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_BPU_ESCR1),
690 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_BSU_ESCR0),
691 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_BSU_ESCR1),
692 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR0),
693 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR1),
694 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR2),
695 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR3),
696 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR4),
697 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR5),
698 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_DAC_ESCR0),
699 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_DAC_ESCR1),
700 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_FIRM_ESCR0),
701 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_FIRM_ESCR1),
702 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_FLAME_ESCR0),
703 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_FLAME_ESCR1),
704 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_FSB_ESCR0),
705 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_FSB_ESCR1),
706 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_IQ_ESCR0),
707 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_IQ_ESCR1),
708 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_IS_ESCR0),
709 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_IS_ESCR1),
710 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_ITLB_ESCR0),
711 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_ITLB_ESCR1),
712 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_IX_ESCR0),
713 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_IX_ESCR1),
714 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_MOB_ESCR0),
715 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_MOB_ESCR1),
716 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_MS_ESCR0),
717 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_MS_ESCR1),
718 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_PMH_ESCR0),
719 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_PMH_ESCR1),
720 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_RAT_ESCR0),
721 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_RAT_ESCR1),
722 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_SAAT_ESCR0),
723 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_SAAT_ESCR1),
724 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_SSU_ESCR0),
725 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_SSU_ESCR1),
726 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_TBPU_ESCR0),
727 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_TBPU_ESCR1),
728 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_TC_ESCR0),
729 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_TC_ESCR1),
730 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_U2L_ESCR0),
731 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_U2L_ESCR1),
732};
733
734static int p4_get_escr_idx(unsigned int addr)
735{
736 unsigned int idx = P4_ESCR_MSR_IDX(addr);
737
738 if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE ||
739 !p4_escr_table[idx])) {
740 WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr);
741 return -1;
742 }
743
744 return idx;
745}
746
747static int p4_next_cntr(int thread, unsigned long *used_mask,
748 struct p4_event_bind *bind)
749{
750 int i, j;
751
752 for (i = 0; i < P4_CNTR_LIMIT; i++) {
753 j = bind->cntr[thread][i];
754 if (j != -1 && !test_bit(j, used_mask))
755 return j;
756 }
757
758 return -1;
759}
760
761static int p4_pmu_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
762{
763 unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
764 unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)];
765 int cpu = raw_smp_processor_id();
766 struct hw_perf_event *hwc;
767 struct p4_event_bind *bind;
768 unsigned int i, thread, num;
769 int cntr_idx, escr_idx;
770
771 bitmap_zero(used_mask, X86_PMC_IDX_MAX);
772 bitmap_zero(escr_mask, P4_ESCR_MSR_TABLE_SIZE);
773
774 for (i = 0, num = n; i < n; i++, num--) {
775
776 hwc = &cpuc->event_list[i]->hw;
777 thread = p4_ht_thread(cpu);
778 bind = p4_config_get_bind(hwc->config);
779 escr_idx = p4_get_escr_idx(bind->escr_msr[thread]);
780 if (unlikely(escr_idx == -1))
781 goto done;
782
783 if (hwc->idx != -1 && !p4_should_swap_ts(hwc->config, cpu)) {
784 cntr_idx = hwc->idx;
785 if (assign)
786 assign[i] = hwc->idx;
787 goto reserve;
788 }
789
790 cntr_idx = p4_next_cntr(thread, used_mask, bind);
791 if (cntr_idx == -1 || test_bit(escr_idx, escr_mask))
792 goto done;
793
794 p4_pmu_swap_config_ts(hwc, cpu);
795 if (assign)
796 assign[i] = cntr_idx;
797reserve:
798 set_bit(cntr_idx, used_mask);
799 set_bit(escr_idx, escr_mask);
800 }
801
802done:
803 return num ? -ENOSPC : 0;
804}
805
806static __initconst const struct x86_pmu p4_pmu = {
807 .name = "Netburst P4/Xeon",
808 .handle_irq = p4_pmu_handle_irq,
809 .disable_all = p4_pmu_disable_all,
810 .enable_all = p4_pmu_enable_all,
811 .enable = p4_pmu_enable_event,
812 .disable = p4_pmu_disable_event,
813 .eventsel = MSR_P4_BPU_CCCR0,
814 .perfctr = MSR_P4_BPU_PERFCTR0,
815 .event_map = p4_pmu_event_map,
816 .max_events = ARRAY_SIZE(p4_general_events),
817 .get_event_constraints = x86_get_event_constraints,
818 /*
819 * IF HT disabled we may need to use all
820 * ARCH_P4_MAX_CCCR counters simulaneously
821 * though leave it restricted at moment assuming
822 * HT is on
823 */
824 .num_counters = ARCH_P4_MAX_CCCR,
825 .apic = 1,
826 .cntval_bits = 40,
827 .cntval_mask = (1ULL << 40) - 1,
828 .max_period = (1ULL << 39) - 1,
829 .hw_config = p4_hw_config,
830 .schedule_events = p4_pmu_schedule_events,
831};
832
833static __init int p4_pmu_init(void)
834{
835 unsigned int low, high;
836
837 /* If we get stripped -- indexig fails */
838 BUILD_BUG_ON(ARCH_P4_MAX_CCCR > X86_PMC_MAX_GENERIC);
839
840 rdmsr(MSR_IA32_MISC_ENABLE, low, high);
841 if (!(low & (1 << 7))) {
842 pr_cont("unsupported Netburst CPU model %d ",
843 boot_cpu_data.x86_model);
844 return -ENODEV;
845 }
846
847 memcpy(hw_cache_event_ids, p4_hw_cache_event_ids,
848 sizeof(hw_cache_event_ids));
849
850 pr_cont("Netburst events, ");
851
852 x86_pmu = p4_pmu;
853
854 return 0;
855}
856
857#endif /* CONFIG_CPU_SUP_INTEL */
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index a330485d14da..34ba07be2cda 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -27,24 +27,6 @@ static u64 p6_pmu_event_map(int hw_event)
27 */ 27 */
28#define P6_NOP_EVENT 0x0000002EULL 28#define P6_NOP_EVENT 0x0000002EULL
29 29
30static u64 p6_pmu_raw_event(u64 hw_event)
31{
32#define P6_EVNTSEL_EVENT_MASK 0x000000FFULL
33#define P6_EVNTSEL_UNIT_MASK 0x0000FF00ULL
34#define P6_EVNTSEL_EDGE_MASK 0x00040000ULL
35#define P6_EVNTSEL_INV_MASK 0x00800000ULL
36#define P6_EVNTSEL_REG_MASK 0xFF000000ULL
37
38#define P6_EVNTSEL_MASK \
39 (P6_EVNTSEL_EVENT_MASK | \
40 P6_EVNTSEL_UNIT_MASK | \
41 P6_EVNTSEL_EDGE_MASK | \
42 P6_EVNTSEL_INV_MASK | \
43 P6_EVNTSEL_REG_MASK)
44
45 return hw_event & P6_EVNTSEL_MASK;
46}
47
48static struct event_constraint p6_event_constraints[] = 30static struct event_constraint p6_event_constraints[] =
49{ 31{
50 INTEL_EVENT_CONSTRAINT(0xc1, 0x1), /* FLOPS */ 32 INTEL_EVENT_CONSTRAINT(0xc1, 0x1), /* FLOPS */
@@ -66,7 +48,7 @@ static void p6_pmu_disable_all(void)
66 wrmsrl(MSR_P6_EVNTSEL0, val); 48 wrmsrl(MSR_P6_EVNTSEL0, val);
67} 49}
68 50
69static void p6_pmu_enable_all(void) 51static void p6_pmu_enable_all(int added)
70{ 52{
71 unsigned long val; 53 unsigned long val;
72 54
@@ -102,22 +84,23 @@ static void p6_pmu_enable_event(struct perf_event *event)
102 (void)checking_wrmsrl(hwc->config_base + hwc->idx, val); 84 (void)checking_wrmsrl(hwc->config_base + hwc->idx, val);
103} 85}
104 86
105static __initconst struct x86_pmu p6_pmu = { 87static __initconst const struct x86_pmu p6_pmu = {
106 .name = "p6", 88 .name = "p6",
107 .handle_irq = x86_pmu_handle_irq, 89 .handle_irq = x86_pmu_handle_irq,
108 .disable_all = p6_pmu_disable_all, 90 .disable_all = p6_pmu_disable_all,
109 .enable_all = p6_pmu_enable_all, 91 .enable_all = p6_pmu_enable_all,
110 .enable = p6_pmu_enable_event, 92 .enable = p6_pmu_enable_event,
111 .disable = p6_pmu_disable_event, 93 .disable = p6_pmu_disable_event,
94 .hw_config = x86_pmu_hw_config,
95 .schedule_events = x86_schedule_events,
112 .eventsel = MSR_P6_EVNTSEL0, 96 .eventsel = MSR_P6_EVNTSEL0,
113 .perfctr = MSR_P6_PERFCTR0, 97 .perfctr = MSR_P6_PERFCTR0,
114 .event_map = p6_pmu_event_map, 98 .event_map = p6_pmu_event_map,
115 .raw_event = p6_pmu_raw_event,
116 .max_events = ARRAY_SIZE(p6_perfmon_event_map), 99 .max_events = ARRAY_SIZE(p6_perfmon_event_map),
117 .apic = 1, 100 .apic = 1,
118 .max_period = (1ULL << 31) - 1, 101 .max_period = (1ULL << 31) - 1,
119 .version = 0, 102 .version = 0,
120 .num_events = 2, 103 .num_counters = 2,
121 /* 104 /*
122 * Events have 40 bits implemented. However they are designed such 105 * Events have 40 bits implemented. However they are designed such
123 * that bits [32-39] are sign extensions of bit 31. As such the 106 * that bits [32-39] are sign extensions of bit 31. As such the
@@ -125,8 +108,8 @@ static __initconst struct x86_pmu p6_pmu = {
125 * 108 *
126 * See IA-32 Intel Architecture Software developer manual Vol 3B 109 * See IA-32 Intel Architecture Software developer manual Vol 3B
127 */ 110 */
128 .event_bits = 32, 111 .cntval_bits = 32,
129 .event_mask = (1ULL << 32) - 1, 112 .cntval_mask = (1ULL << 32) - 1,
130 .get_event_constraints = x86_get_event_constraints, 113 .get_event_constraints = x86_get_event_constraints,
131 .event_constraints = p6_event_constraints, 114 .event_constraints = p6_event_constraints,
132}; 115};
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index dfdb4dba2320..b9d1ff588445 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -24,8 +24,8 @@
24#include <linux/dmi.h> 24#include <linux/dmi.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <asm/div64.h> 26#include <asm/div64.h>
27#include <asm/vmware.h>
28#include <asm/x86_init.h> 27#include <asm/x86_init.h>
28#include <asm/hypervisor.h>
29 29
30#define CPUID_VMWARE_INFO_LEAF 0x40000000 30#define CPUID_VMWARE_INFO_LEAF 0x40000000
31#define VMWARE_HYPERVISOR_MAGIC 0x564D5868 31#define VMWARE_HYPERVISOR_MAGIC 0x564D5868
@@ -65,7 +65,7 @@ static unsigned long vmware_get_tsc_khz(void)
65 return tsc_hz; 65 return tsc_hz;
66} 66}
67 67
68void __init vmware_platform_setup(void) 68static void __init vmware_platform_setup(void)
69{ 69{
70 uint32_t eax, ebx, ecx, edx; 70 uint32_t eax, ebx, ecx, edx;
71 71
@@ -83,26 +83,22 @@ void __init vmware_platform_setup(void)
83 * serial key should be enough, as this will always have a VMware 83 * serial key should be enough, as this will always have a VMware
84 * specific string when running under VMware hypervisor. 84 * specific string when running under VMware hypervisor.
85 */ 85 */
86int vmware_platform(void) 86static bool __init vmware_platform(void)
87{ 87{
88 if (cpu_has_hypervisor) { 88 if (cpu_has_hypervisor) {
89 unsigned int eax, ebx, ecx, edx; 89 unsigned int eax;
90 char hyper_vendor_id[13]; 90 unsigned int hyper_vendor_id[3];
91 91
92 cpuid(CPUID_VMWARE_INFO_LEAF, &eax, &ebx, &ecx, &edx); 92 cpuid(CPUID_VMWARE_INFO_LEAF, &eax, &hyper_vendor_id[0],
93 memcpy(hyper_vendor_id + 0, &ebx, 4); 93 &hyper_vendor_id[1], &hyper_vendor_id[2]);
94 memcpy(hyper_vendor_id + 4, &ecx, 4); 94 if (!memcmp(hyper_vendor_id, "VMwareVMware", 12))
95 memcpy(hyper_vendor_id + 8, &edx, 4); 95 return true;
96 hyper_vendor_id[12] = '\0';
97 if (!strcmp(hyper_vendor_id, "VMwareVMware"))
98 return 1;
99 } else if (dmi_available && dmi_name_in_serial("VMware") && 96 } else if (dmi_available && dmi_name_in_serial("VMware") &&
100 __vmware_platform()) 97 __vmware_platform())
101 return 1; 98 return true;
102 99
103 return 0; 100 return false;
104} 101}
105EXPORT_SYMBOL(vmware_platform);
106 102
107/* 103/*
108 * VMware hypervisor takes care of exporting a reliable TSC to the guest. 104 * VMware hypervisor takes care of exporting a reliable TSC to the guest.
@@ -116,8 +112,16 @@ EXPORT_SYMBOL(vmware_platform);
116 * so that the kernel could just trust the hypervisor with providing a 112 * so that the kernel could just trust the hypervisor with providing a
117 * reliable virtual TSC that is suitable for timekeeping. 113 * reliable virtual TSC that is suitable for timekeeping.
118 */ 114 */
119void __cpuinit vmware_set_feature_bits(struct cpuinfo_x86 *c) 115static void __cpuinit vmware_set_cpu_features(struct cpuinfo_x86 *c)
120{ 116{
121 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 117 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
122 set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE); 118 set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
123} 119}
120
121const __refconst struct hypervisor_x86 x86_hyper_vmware = {
122 .name = "VMware",
123 .detect = vmware_platform,
124 .set_cpu_features = vmware_set_cpu_features,
125 .init_platform = vmware_platform_setup,
126};
127EXPORT_SYMBOL(x86_hyper_vmware);
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
deleted file mode 100644
index 1c47390dd0e5..000000000000
--- a/arch/x86/kernel/ds.c
+++ /dev/null
@@ -1,1437 +0,0 @@
1/*
2 * Debug Store support
3 *
4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for branch trace store (BTS) and
6 * precise-event based sampling (PEBS).
7 *
8 * It manages:
9 * - DS and BTS hardware configuration
10 * - buffer overflow handling (to be done)
11 * - buffer access
12 *
13 * It does not do:
14 * - security checking (is the caller allowed to trace the task)
15 * - buffer allocation (memory accounting)
16 *
17 *
18 * Copyright (C) 2007-2009 Intel Corporation.
19 * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009
20 */
21
22#include <linux/kernel.h>
23#include <linux/string.h>
24#include <linux/errno.h>
25#include <linux/sched.h>
26#include <linux/slab.h>
27#include <linux/mm.h>
28#include <linux/trace_clock.h>
29
30#include <asm/ds.h>
31
32#include "ds_selftest.h"
33
34/*
35 * The configuration for a particular DS hardware implementation:
36 */
37struct ds_configuration {
38 /* The name of the configuration: */
39 const char *name;
40
41 /* The size of pointer-typed fields in DS, BTS, and PEBS: */
42 unsigned char sizeof_ptr_field;
43
44 /* The size of a BTS/PEBS record in bytes: */
45 unsigned char sizeof_rec[2];
46
47 /* The number of pebs counter reset values in the DS structure. */
48 unsigned char nr_counter_reset;
49
50 /* Control bit-masks indexed by enum ds_feature: */
51 unsigned long ctl[dsf_ctl_max];
52};
53static struct ds_configuration ds_cfg __read_mostly;
54
55
56/* Maximal size of a DS configuration: */
57#define MAX_SIZEOF_DS 0x80
58
59/* Maximal size of a BTS record: */
60#define MAX_SIZEOF_BTS (3 * 8)
61
62/* BTS and PEBS buffer alignment: */
63#define DS_ALIGNMENT (1 << 3)
64
65/* Number of buffer pointers in DS: */
66#define NUM_DS_PTR_FIELDS 8
67
68/* Size of a pebs reset value in DS: */
69#define PEBS_RESET_FIELD_SIZE 8
70
71/* Mask of control bits in the DS MSR register: */
72#define BTS_CONTROL \
73 ( ds_cfg.ctl[dsf_bts] | \
74 ds_cfg.ctl[dsf_bts_kernel] | \
75 ds_cfg.ctl[dsf_bts_user] | \
76 ds_cfg.ctl[dsf_bts_overflow] )
77
78/*
79 * A BTS or PEBS tracer.
80 *
81 * This holds the configuration of the tracer and serves as a handle
82 * to identify tracers.
83 */
84struct ds_tracer {
85 /* The DS context (partially) owned by this tracer. */
86 struct ds_context *context;
87 /* The buffer provided on ds_request() and its size in bytes. */
88 void *buffer;
89 size_t size;
90};
91
92struct bts_tracer {
93 /* The common DS part: */
94 struct ds_tracer ds;
95
96 /* The trace including the DS configuration: */
97 struct bts_trace trace;
98
99 /* Buffer overflow notification function: */
100 bts_ovfl_callback_t ovfl;
101
102 /* Active flags affecting trace collection. */
103 unsigned int flags;
104};
105
106struct pebs_tracer {
107 /* The common DS part: */
108 struct ds_tracer ds;
109
110 /* The trace including the DS configuration: */
111 struct pebs_trace trace;
112
113 /* Buffer overflow notification function: */
114 pebs_ovfl_callback_t ovfl;
115};
116
117/*
118 * Debug Store (DS) save area configuration (see Intel64 and IA32
119 * Architectures Software Developer's Manual, section 18.5)
120 *
121 * The DS configuration consists of the following fields; different
122 * architetures vary in the size of those fields.
123 *
124 * - double-word aligned base linear address of the BTS buffer
125 * - write pointer into the BTS buffer
126 * - end linear address of the BTS buffer (one byte beyond the end of
127 * the buffer)
128 * - interrupt pointer into BTS buffer
129 * (interrupt occurs when write pointer passes interrupt pointer)
130 * - double-word aligned base linear address of the PEBS buffer
131 * - write pointer into the PEBS buffer
132 * - end linear address of the PEBS buffer (one byte beyond the end of
133 * the buffer)
134 * - interrupt pointer into PEBS buffer
135 * (interrupt occurs when write pointer passes interrupt pointer)
136 * - value to which counter is reset following counter overflow
137 *
138 * Later architectures use 64bit pointers throughout, whereas earlier
139 * architectures use 32bit pointers in 32bit mode.
140 *
141 *
142 * We compute the base address for the first 8 fields based on:
143 * - the field size stored in the DS configuration
144 * - the relative field position
145 * - an offset giving the start of the respective region
146 *
147 * This offset is further used to index various arrays holding
148 * information for BTS and PEBS at the respective index.
149 *
150 * On later 32bit processors, we only access the lower 32bit of the
151 * 64bit pointer fields. The upper halves will be zeroed out.
152 */
153
154enum ds_field {
155 ds_buffer_base = 0,
156 ds_index,
157 ds_absolute_maximum,
158 ds_interrupt_threshold,
159};
160
161enum ds_qualifier {
162 ds_bts = 0,
163 ds_pebs
164};
165
166static inline unsigned long
167ds_get(const unsigned char *base, enum ds_qualifier qual, enum ds_field field)
168{
169 base += (ds_cfg.sizeof_ptr_field * (field + (4 * qual)));
170 return *(unsigned long *)base;
171}
172
173static inline void
174ds_set(unsigned char *base, enum ds_qualifier qual, enum ds_field field,
175 unsigned long value)
176{
177 base += (ds_cfg.sizeof_ptr_field * (field + (4 * qual)));
178 (*(unsigned long *)base) = value;
179}
180
181
182/*
183 * Locking is done only for allocating BTS or PEBS resources.
184 */
185static DEFINE_SPINLOCK(ds_lock);
186
187/*
188 * We either support (system-wide) per-cpu or per-thread allocation.
189 * We distinguish the two based on the task_struct pointer, where a
190 * NULL pointer indicates per-cpu allocation for the current cpu.
191 *
192 * Allocations are use-counted. As soon as resources are allocated,
193 * further allocations must be of the same type (per-cpu or
194 * per-thread). We model this by counting allocations (i.e. the number
195 * of tracers of a certain type) for one type negatively:
196 * =0 no tracers
197 * >0 number of per-thread tracers
198 * <0 number of per-cpu tracers
199 *
200 * Tracers essentially gives the number of ds contexts for a certain
201 * type of allocation.
202 */
203static atomic_t tracers = ATOMIC_INIT(0);
204
205static inline int get_tracer(struct task_struct *task)
206{
207 int error;
208
209 spin_lock_irq(&ds_lock);
210
211 if (task) {
212 error = -EPERM;
213 if (atomic_read(&tracers) < 0)
214 goto out;
215 atomic_inc(&tracers);
216 } else {
217 error = -EPERM;
218 if (atomic_read(&tracers) > 0)
219 goto out;
220 atomic_dec(&tracers);
221 }
222
223 error = 0;
224out:
225 spin_unlock_irq(&ds_lock);
226 return error;
227}
228
229static inline void put_tracer(struct task_struct *task)
230{
231 if (task)
232 atomic_dec(&tracers);
233 else
234 atomic_inc(&tracers);
235}
236
237/*
238 * The DS context is either attached to a thread or to a cpu:
239 * - in the former case, the thread_struct contains a pointer to the
240 * attached context.
241 * - in the latter case, we use a static array of per-cpu context
242 * pointers.
243 *
244 * Contexts are use-counted. They are allocated on first access and
245 * deallocated when the last user puts the context.
246 */
247struct ds_context {
248 /* The DS configuration; goes into MSR_IA32_DS_AREA: */
249 unsigned char ds[MAX_SIZEOF_DS];
250
251 /* The owner of the BTS and PEBS configuration, respectively: */
252 struct bts_tracer *bts_master;
253 struct pebs_tracer *pebs_master;
254
255 /* Use count: */
256 unsigned long count;
257
258 /* Pointer to the context pointer field: */
259 struct ds_context **this;
260
261 /* The traced task; NULL for cpu tracing: */
262 struct task_struct *task;
263
264 /* The traced cpu; only valid if task is NULL: */
265 int cpu;
266};
267
268static DEFINE_PER_CPU(struct ds_context *, cpu_ds_context);
269
270
271static struct ds_context *ds_get_context(struct task_struct *task, int cpu)
272{
273 struct ds_context **p_context =
274 (task ? &task->thread.ds_ctx : &per_cpu(cpu_ds_context, cpu));
275 struct ds_context *context = NULL;
276 struct ds_context *new_context = NULL;
277
278 /* Chances are small that we already have a context. */
279 new_context = kzalloc(sizeof(*new_context), GFP_KERNEL);
280 if (!new_context)
281 return NULL;
282
283 spin_lock_irq(&ds_lock);
284
285 context = *p_context;
286 if (likely(!context)) {
287 context = new_context;
288
289 context->this = p_context;
290 context->task = task;
291 context->cpu = cpu;
292 context->count = 0;
293
294 *p_context = context;
295 }
296
297 context->count++;
298
299 spin_unlock_irq(&ds_lock);
300
301 if (context != new_context)
302 kfree(new_context);
303
304 return context;
305}
306
307static void ds_put_context(struct ds_context *context)
308{
309 struct task_struct *task;
310 unsigned long irq;
311
312 if (!context)
313 return;
314
315 spin_lock_irqsave(&ds_lock, irq);
316
317 if (--context->count) {
318 spin_unlock_irqrestore(&ds_lock, irq);
319 return;
320 }
321
322 *(context->this) = NULL;
323
324 task = context->task;
325
326 if (task)
327 clear_tsk_thread_flag(task, TIF_DS_AREA_MSR);
328
329 /*
330 * We leave the (now dangling) pointer to the DS configuration in
331 * the DS_AREA msr. This is as good or as bad as replacing it with
332 * NULL - the hardware would crash if we enabled tracing.
333 *
334 * This saves us some problems with having to write an msr on a
335 * different cpu while preventing others from doing the same for the
336 * next context for that same cpu.
337 */
338
339 spin_unlock_irqrestore(&ds_lock, irq);
340
341 /* The context might still be in use for context switching. */
342 if (task && (task != current))
343 wait_task_context_switch(task);
344
345 kfree(context);
346}
347
348static void ds_install_ds_area(struct ds_context *context)
349{
350 unsigned long ds;
351
352 ds = (unsigned long)context->ds;
353
354 /*
355 * There is a race between the bts master and the pebs master.
356 *
357 * The thread/cpu access is synchronized via get/put_cpu() for
358 * task tracing and via wrmsr_on_cpu for cpu tracing.
359 *
360 * If bts and pebs are collected for the same task or same cpu,
361 * the same confiuration is written twice.
362 */
363 if (context->task) {
364 get_cpu();
365 if (context->task == current)
366 wrmsrl(MSR_IA32_DS_AREA, ds);
367 set_tsk_thread_flag(context->task, TIF_DS_AREA_MSR);
368 put_cpu();
369 } else
370 wrmsr_on_cpu(context->cpu, MSR_IA32_DS_AREA,
371 (u32)((u64)ds), (u32)((u64)ds >> 32));
372}
373
374/*
375 * Call the tracer's callback on a buffer overflow.
376 *
377 * context: the ds context
378 * qual: the buffer type
379 */
380static void ds_overflow(struct ds_context *context, enum ds_qualifier qual)
381{
382 switch (qual) {
383 case ds_bts:
384 if (context->bts_master &&
385 context->bts_master->ovfl)
386 context->bts_master->ovfl(context->bts_master);
387 break;
388 case ds_pebs:
389 if (context->pebs_master &&
390 context->pebs_master->ovfl)
391 context->pebs_master->ovfl(context->pebs_master);
392 break;
393 }
394}
395
396
397/*
398 * Write raw data into the BTS or PEBS buffer.
399 *
400 * The remainder of any partially written record is zeroed out.
401 *
402 * context: the DS context
403 * qual: the buffer type
404 * record: the data to write
405 * size: the size of the data
406 */
407static int ds_write(struct ds_context *context, enum ds_qualifier qual,
408 const void *record, size_t size)
409{
410 int bytes_written = 0;
411
412 if (!record)
413 return -EINVAL;
414
415 while (size) {
416 unsigned long base, index, end, write_end, int_th;
417 unsigned long write_size, adj_write_size;
418
419 /*
420 * Write as much as possible without producing an
421 * overflow interrupt.
422 *
423 * Interrupt_threshold must either be
424 * - bigger than absolute_maximum or
425 * - point to a record between buffer_base and absolute_maximum
426 *
427 * Index points to a valid record.
428 */
429 base = ds_get(context->ds, qual, ds_buffer_base);
430 index = ds_get(context->ds, qual, ds_index);
431 end = ds_get(context->ds, qual, ds_absolute_maximum);
432 int_th = ds_get(context->ds, qual, ds_interrupt_threshold);
433
434 write_end = min(end, int_th);
435
436 /*
437 * If we are already beyond the interrupt threshold,
438 * we fill the entire buffer.
439 */
440 if (write_end <= index)
441 write_end = end;
442
443 if (write_end <= index)
444 break;
445
446 write_size = min((unsigned long) size, write_end - index);
447 memcpy((void *)index, record, write_size);
448
449 record = (const char *)record + write_size;
450 size -= write_size;
451 bytes_written += write_size;
452
453 adj_write_size = write_size / ds_cfg.sizeof_rec[qual];
454 adj_write_size *= ds_cfg.sizeof_rec[qual];
455
456 /* Zero out trailing bytes. */
457 memset((char *)index + write_size, 0,
458 adj_write_size - write_size);
459 index += adj_write_size;
460
461 if (index >= end)
462 index = base;
463 ds_set(context->ds, qual, ds_index, index);
464
465 if (index >= int_th)
466 ds_overflow(context, qual);
467 }
468
469 return bytes_written;
470}
471
472
473/*
474 * Branch Trace Store (BTS) uses the following format. Different
475 * architectures vary in the size of those fields.
476 * - source linear address
477 * - destination linear address
478 * - flags
479 *
480 * Later architectures use 64bit pointers throughout, whereas earlier
481 * architectures use 32bit pointers in 32bit mode.
482 *
483 * We compute the base address for the fields based on:
484 * - the field size stored in the DS configuration
485 * - the relative field position
486 *
487 * In order to store additional information in the BTS buffer, we use
488 * a special source address to indicate that the record requires
489 * special interpretation.
490 *
491 * Netburst indicated via a bit in the flags field whether the branch
492 * was predicted; this is ignored.
493 *
494 * We use two levels of abstraction:
495 * - the raw data level defined here
496 * - an arch-independent level defined in ds.h
497 */
498
499enum bts_field {
500 bts_from,
501 bts_to,
502 bts_flags,
503
504 bts_qual = bts_from,
505 bts_clock = bts_to,
506 bts_pid = bts_flags,
507
508 bts_qual_mask = (bts_qual_max - 1),
509 bts_escape = ((unsigned long)-1 & ~bts_qual_mask)
510};
511
512static inline unsigned long bts_get(const char *base, unsigned long field)
513{
514 base += (ds_cfg.sizeof_ptr_field * field);
515 return *(unsigned long *)base;
516}
517
518static inline void bts_set(char *base, unsigned long field, unsigned long val)
519{
520 base += (ds_cfg.sizeof_ptr_field * field);
521 (*(unsigned long *)base) = val;
522}
523
524
525/*
526 * The raw BTS data is architecture dependent.
527 *
528 * For higher-level users, we give an arch-independent view.
529 * - ds.h defines struct bts_struct
530 * - bts_read translates one raw bts record into a bts_struct
531 * - bts_write translates one bts_struct into the raw format and
532 * writes it into the top of the parameter tracer's buffer.
533 *
534 * return: bytes read/written on success; -Eerrno, otherwise
535 */
536static int
537bts_read(struct bts_tracer *tracer, const void *at, struct bts_struct *out)
538{
539 if (!tracer)
540 return -EINVAL;
541
542 if (at < tracer->trace.ds.begin)
543 return -EINVAL;
544
545 if (tracer->trace.ds.end < (at + tracer->trace.ds.size))
546 return -EINVAL;
547
548 memset(out, 0, sizeof(*out));
549 if ((bts_get(at, bts_qual) & ~bts_qual_mask) == bts_escape) {
550 out->qualifier = (bts_get(at, bts_qual) & bts_qual_mask);
551 out->variant.event.clock = bts_get(at, bts_clock);
552 out->variant.event.pid = bts_get(at, bts_pid);
553 } else {
554 out->qualifier = bts_branch;
555 out->variant.lbr.from = bts_get(at, bts_from);
556 out->variant.lbr.to = bts_get(at, bts_to);
557
558 if (!out->variant.lbr.from && !out->variant.lbr.to)
559 out->qualifier = bts_invalid;
560 }
561
562 return ds_cfg.sizeof_rec[ds_bts];
563}
564
565static int bts_write(struct bts_tracer *tracer, const struct bts_struct *in)
566{
567 unsigned char raw[MAX_SIZEOF_BTS];
568
569 if (!tracer)
570 return -EINVAL;
571
572 if (MAX_SIZEOF_BTS < ds_cfg.sizeof_rec[ds_bts])
573 return -EOVERFLOW;
574
575 switch (in->qualifier) {
576 case bts_invalid:
577 bts_set(raw, bts_from, 0);
578 bts_set(raw, bts_to, 0);
579 bts_set(raw, bts_flags, 0);
580 break;
581 case bts_branch:
582 bts_set(raw, bts_from, in->variant.lbr.from);
583 bts_set(raw, bts_to, in->variant.lbr.to);
584 bts_set(raw, bts_flags, 0);
585 break;
586 case bts_task_arrives:
587 case bts_task_departs:
588 bts_set(raw, bts_qual, (bts_escape | in->qualifier));
589 bts_set(raw, bts_clock, in->variant.event.clock);
590 bts_set(raw, bts_pid, in->variant.event.pid);
591 break;
592 default:
593 return -EINVAL;
594 }
595
596 return ds_write(tracer->ds.context, ds_bts, raw,
597 ds_cfg.sizeof_rec[ds_bts]);
598}
599
600
601static void ds_write_config(struct ds_context *context,
602 struct ds_trace *cfg, enum ds_qualifier qual)
603{
604 unsigned char *ds = context->ds;
605
606 ds_set(ds, qual, ds_buffer_base, (unsigned long)cfg->begin);
607 ds_set(ds, qual, ds_index, (unsigned long)cfg->top);
608 ds_set(ds, qual, ds_absolute_maximum, (unsigned long)cfg->end);
609 ds_set(ds, qual, ds_interrupt_threshold, (unsigned long)cfg->ith);
610}
611
612static void ds_read_config(struct ds_context *context,
613 struct ds_trace *cfg, enum ds_qualifier qual)
614{
615 unsigned char *ds = context->ds;
616
617 cfg->begin = (void *)ds_get(ds, qual, ds_buffer_base);
618 cfg->top = (void *)ds_get(ds, qual, ds_index);
619 cfg->end = (void *)ds_get(ds, qual, ds_absolute_maximum);
620 cfg->ith = (void *)ds_get(ds, qual, ds_interrupt_threshold);
621}
622
623static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual,
624 void *base, size_t size, size_t ith,
625 unsigned int flags) {
626 unsigned long buffer, adj;
627
628 /*
629 * Adjust the buffer address and size to meet alignment
630 * constraints:
631 * - buffer is double-word aligned
632 * - size is multiple of record size
633 *
634 * We checked the size at the very beginning; we have enough
635 * space to do the adjustment.
636 */
637 buffer = (unsigned long)base;
638
639 adj = ALIGN(buffer, DS_ALIGNMENT) - buffer;
640 buffer += adj;
641 size -= adj;
642
643 trace->n = size / ds_cfg.sizeof_rec[qual];
644 trace->size = ds_cfg.sizeof_rec[qual];
645
646 size = (trace->n * trace->size);
647
648 trace->begin = (void *)buffer;
649 trace->top = trace->begin;
650 trace->end = (void *)(buffer + size);
651 /*
652 * The value for 'no threshold' is -1, which will set the
653 * threshold outside of the buffer, just like we want it.
654 */
655 ith *= ds_cfg.sizeof_rec[qual];
656 trace->ith = (void *)(buffer + size - ith);
657
658 trace->flags = flags;
659}
660
661
662static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace,
663 enum ds_qualifier qual, struct task_struct *task,
664 int cpu, void *base, size_t size, size_t th)
665{
666 struct ds_context *context;
667 int error;
668 size_t req_size;
669
670 error = -EOPNOTSUPP;
671 if (!ds_cfg.sizeof_rec[qual])
672 goto out;
673
674 error = -EINVAL;
675 if (!base)
676 goto out;
677
678 req_size = ds_cfg.sizeof_rec[qual];
679 /* We might need space for alignment adjustments. */
680 if (!IS_ALIGNED((unsigned long)base, DS_ALIGNMENT))
681 req_size += DS_ALIGNMENT;
682
683 error = -EINVAL;
684 if (size < req_size)
685 goto out;
686
687 if (th != (size_t)-1) {
688 th *= ds_cfg.sizeof_rec[qual];
689
690 error = -EINVAL;
691 if (size <= th)
692 goto out;
693 }
694
695 tracer->buffer = base;
696 tracer->size = size;
697
698 error = -ENOMEM;
699 context = ds_get_context(task, cpu);
700 if (!context)
701 goto out;
702 tracer->context = context;
703
704 /*
705 * Defer any tracer-specific initialization work for the context until
706 * context ownership has been clarified.
707 */
708
709 error = 0;
710 out:
711 return error;
712}
713
714static struct bts_tracer *ds_request_bts(struct task_struct *task, int cpu,
715 void *base, size_t size,
716 bts_ovfl_callback_t ovfl, size_t th,
717 unsigned int flags)
718{
719 struct bts_tracer *tracer;
720 int error;
721
722 /* Buffer overflow notification is not yet implemented. */
723 error = -EOPNOTSUPP;
724 if (ovfl)
725 goto out;
726
727 error = get_tracer(task);
728 if (error < 0)
729 goto out;
730
731 error = -ENOMEM;
732 tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
733 if (!tracer)
734 goto out_put_tracer;
735 tracer->ovfl = ovfl;
736
737 /* Do some more error checking and acquire a tracing context. */
738 error = ds_request(&tracer->ds, &tracer->trace.ds,
739 ds_bts, task, cpu, base, size, th);
740 if (error < 0)
741 goto out_tracer;
742
743 /* Claim the bts part of the tracing context we acquired above. */
744 spin_lock_irq(&ds_lock);
745
746 error = -EPERM;
747 if (tracer->ds.context->bts_master)
748 goto out_unlock;
749 tracer->ds.context->bts_master = tracer;
750
751 spin_unlock_irq(&ds_lock);
752
753 /*
754 * Now that we own the bts part of the context, let's complete the
755 * initialization for that part.
756 */
757 ds_init_ds_trace(&tracer->trace.ds, ds_bts, base, size, th, flags);
758 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
759 ds_install_ds_area(tracer->ds.context);
760
761 tracer->trace.read = bts_read;
762 tracer->trace.write = bts_write;
763
764 /* Start tracing. */
765 ds_resume_bts(tracer);
766
767 return tracer;
768
769 out_unlock:
770 spin_unlock_irq(&ds_lock);
771 ds_put_context(tracer->ds.context);
772 out_tracer:
773 kfree(tracer);
774 out_put_tracer:
775 put_tracer(task);
776 out:
777 return ERR_PTR(error);
778}
779
780struct bts_tracer *ds_request_bts_task(struct task_struct *task,
781 void *base, size_t size,
782 bts_ovfl_callback_t ovfl,
783 size_t th, unsigned int flags)
784{
785 return ds_request_bts(task, 0, base, size, ovfl, th, flags);
786}
787
788struct bts_tracer *ds_request_bts_cpu(int cpu, void *base, size_t size,
789 bts_ovfl_callback_t ovfl,
790 size_t th, unsigned int flags)
791{
792 return ds_request_bts(NULL, cpu, base, size, ovfl, th, flags);
793}
794
795static struct pebs_tracer *ds_request_pebs(struct task_struct *task, int cpu,
796 void *base, size_t size,
797 pebs_ovfl_callback_t ovfl, size_t th,
798 unsigned int flags)
799{
800 struct pebs_tracer *tracer;
801 int error;
802
803 /* Buffer overflow notification is not yet implemented. */
804 error = -EOPNOTSUPP;
805 if (ovfl)
806 goto out;
807
808 error = get_tracer(task);
809 if (error < 0)
810 goto out;
811
812 error = -ENOMEM;
813 tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
814 if (!tracer)
815 goto out_put_tracer;
816 tracer->ovfl = ovfl;
817
818 /* Do some more error checking and acquire a tracing context. */
819 error = ds_request(&tracer->ds, &tracer->trace.ds,
820 ds_pebs, task, cpu, base, size, th);
821 if (error < 0)
822 goto out_tracer;
823
824 /* Claim the pebs part of the tracing context we acquired above. */
825 spin_lock_irq(&ds_lock);
826
827 error = -EPERM;
828 if (tracer->ds.context->pebs_master)
829 goto out_unlock;
830 tracer->ds.context->pebs_master = tracer;
831
832 spin_unlock_irq(&ds_lock);
833
834 /*
835 * Now that we own the pebs part of the context, let's complete the
836 * initialization for that part.
837 */
838 ds_init_ds_trace(&tracer->trace.ds, ds_pebs, base, size, th, flags);
839 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
840 ds_install_ds_area(tracer->ds.context);
841
842 /* Start tracing. */
843 ds_resume_pebs(tracer);
844
845 return tracer;
846
847 out_unlock:
848 spin_unlock_irq(&ds_lock);
849 ds_put_context(tracer->ds.context);
850 out_tracer:
851 kfree(tracer);
852 out_put_tracer:
853 put_tracer(task);
854 out:
855 return ERR_PTR(error);
856}
857
858struct pebs_tracer *ds_request_pebs_task(struct task_struct *task,
859 void *base, size_t size,
860 pebs_ovfl_callback_t ovfl,
861 size_t th, unsigned int flags)
862{
863 return ds_request_pebs(task, 0, base, size, ovfl, th, flags);
864}
865
866struct pebs_tracer *ds_request_pebs_cpu(int cpu, void *base, size_t size,
867 pebs_ovfl_callback_t ovfl,
868 size_t th, unsigned int flags)
869{
870 return ds_request_pebs(NULL, cpu, base, size, ovfl, th, flags);
871}
872
873static void ds_free_bts(struct bts_tracer *tracer)
874{
875 struct task_struct *task;
876
877 task = tracer->ds.context->task;
878
879 WARN_ON_ONCE(tracer->ds.context->bts_master != tracer);
880 tracer->ds.context->bts_master = NULL;
881
882 /* Make sure tracing stopped and the tracer is not in use. */
883 if (task && (task != current))
884 wait_task_context_switch(task);
885
886 ds_put_context(tracer->ds.context);
887 put_tracer(task);
888
889 kfree(tracer);
890}
891
892void ds_release_bts(struct bts_tracer *tracer)
893{
894 might_sleep();
895
896 if (!tracer)
897 return;
898
899 ds_suspend_bts(tracer);
900 ds_free_bts(tracer);
901}
902
903int ds_release_bts_noirq(struct bts_tracer *tracer)
904{
905 struct task_struct *task;
906 unsigned long irq;
907 int error;
908
909 if (!tracer)
910 return 0;
911
912 task = tracer->ds.context->task;
913
914 local_irq_save(irq);
915
916 error = -EPERM;
917 if (!task &&
918 (tracer->ds.context->cpu != smp_processor_id()))
919 goto out;
920
921 error = -EPERM;
922 if (task && (task != current))
923 goto out;
924
925 ds_suspend_bts_noirq(tracer);
926 ds_free_bts(tracer);
927
928 error = 0;
929 out:
930 local_irq_restore(irq);
931 return error;
932}
933
934static void update_task_debugctlmsr(struct task_struct *task,
935 unsigned long debugctlmsr)
936{
937 task->thread.debugctlmsr = debugctlmsr;
938
939 get_cpu();
940 if (task == current)
941 update_debugctlmsr(debugctlmsr);
942 put_cpu();
943}
944
945void ds_suspend_bts(struct bts_tracer *tracer)
946{
947 struct task_struct *task;
948 unsigned long debugctlmsr;
949 int cpu;
950
951 if (!tracer)
952 return;
953
954 tracer->flags = 0;
955
956 task = tracer->ds.context->task;
957 cpu = tracer->ds.context->cpu;
958
959 WARN_ON(!task && irqs_disabled());
960
961 debugctlmsr = (task ?
962 task->thread.debugctlmsr :
963 get_debugctlmsr_on_cpu(cpu));
964 debugctlmsr &= ~BTS_CONTROL;
965
966 if (task)
967 update_task_debugctlmsr(task, debugctlmsr);
968 else
969 update_debugctlmsr_on_cpu(cpu, debugctlmsr);
970}
971
972int ds_suspend_bts_noirq(struct bts_tracer *tracer)
973{
974 struct task_struct *task;
975 unsigned long debugctlmsr, irq;
976 int cpu, error = 0;
977
978 if (!tracer)
979 return 0;
980
981 tracer->flags = 0;
982
983 task = tracer->ds.context->task;
984 cpu = tracer->ds.context->cpu;
985
986 local_irq_save(irq);
987
988 error = -EPERM;
989 if (!task && (cpu != smp_processor_id()))
990 goto out;
991
992 debugctlmsr = (task ?
993 task->thread.debugctlmsr :
994 get_debugctlmsr());
995 debugctlmsr &= ~BTS_CONTROL;
996
997 if (task)
998 update_task_debugctlmsr(task, debugctlmsr);
999 else
1000 update_debugctlmsr(debugctlmsr);
1001
1002 error = 0;
1003 out:
1004 local_irq_restore(irq);
1005 return error;
1006}
1007
1008static unsigned long ds_bts_control(struct bts_tracer *tracer)
1009{
1010 unsigned long control;
1011
1012 control = ds_cfg.ctl[dsf_bts];
1013 if (!(tracer->trace.ds.flags & BTS_KERNEL))
1014 control |= ds_cfg.ctl[dsf_bts_kernel];
1015 if (!(tracer->trace.ds.flags & BTS_USER))
1016 control |= ds_cfg.ctl[dsf_bts_user];
1017
1018 return control;
1019}
1020
1021void ds_resume_bts(struct bts_tracer *tracer)
1022{
1023 struct task_struct *task;
1024 unsigned long debugctlmsr;
1025 int cpu;
1026
1027 if (!tracer)
1028 return;
1029
1030 tracer->flags = tracer->trace.ds.flags;
1031
1032 task = tracer->ds.context->task;
1033 cpu = tracer->ds.context->cpu;
1034
1035 WARN_ON(!task && irqs_disabled());
1036
1037 debugctlmsr = (task ?
1038 task->thread.debugctlmsr :
1039 get_debugctlmsr_on_cpu(cpu));
1040 debugctlmsr |= ds_bts_control(tracer);
1041
1042 if (task)
1043 update_task_debugctlmsr(task, debugctlmsr);
1044 else
1045 update_debugctlmsr_on_cpu(cpu, debugctlmsr);
1046}
1047
1048int ds_resume_bts_noirq(struct bts_tracer *tracer)
1049{
1050 struct task_struct *task;
1051 unsigned long debugctlmsr, irq;
1052 int cpu, error = 0;
1053
1054 if (!tracer)
1055 return 0;
1056
1057 tracer->flags = tracer->trace.ds.flags;
1058
1059 task = tracer->ds.context->task;
1060 cpu = tracer->ds.context->cpu;
1061
1062 local_irq_save(irq);
1063
1064 error = -EPERM;
1065 if (!task && (cpu != smp_processor_id()))
1066 goto out;
1067
1068 debugctlmsr = (task ?
1069 task->thread.debugctlmsr :
1070 get_debugctlmsr());
1071 debugctlmsr |= ds_bts_control(tracer);
1072
1073 if (task)
1074 update_task_debugctlmsr(task, debugctlmsr);
1075 else
1076 update_debugctlmsr(debugctlmsr);
1077
1078 error = 0;
1079 out:
1080 local_irq_restore(irq);
1081 return error;
1082}
1083
1084static void ds_free_pebs(struct pebs_tracer *tracer)
1085{
1086 struct task_struct *task;
1087
1088 task = tracer->ds.context->task;
1089
1090 WARN_ON_ONCE(tracer->ds.context->pebs_master != tracer);
1091 tracer->ds.context->pebs_master = NULL;
1092
1093 ds_put_context(tracer->ds.context);
1094 put_tracer(task);
1095
1096 kfree(tracer);
1097}
1098
1099void ds_release_pebs(struct pebs_tracer *tracer)
1100{
1101 might_sleep();
1102
1103 if (!tracer)
1104 return;
1105
1106 ds_suspend_pebs(tracer);
1107 ds_free_pebs(tracer);
1108}
1109
1110int ds_release_pebs_noirq(struct pebs_tracer *tracer)
1111{
1112 struct task_struct *task;
1113 unsigned long irq;
1114 int error;
1115
1116 if (!tracer)
1117 return 0;
1118
1119 task = tracer->ds.context->task;
1120
1121 local_irq_save(irq);
1122
1123 error = -EPERM;
1124 if (!task &&
1125 (tracer->ds.context->cpu != smp_processor_id()))
1126 goto out;
1127
1128 error = -EPERM;
1129 if (task && (task != current))
1130 goto out;
1131
1132 ds_suspend_pebs_noirq(tracer);
1133 ds_free_pebs(tracer);
1134
1135 error = 0;
1136 out:
1137 local_irq_restore(irq);
1138 return error;
1139}
1140
1141void ds_suspend_pebs(struct pebs_tracer *tracer)
1142{
1143
1144}
1145
1146int ds_suspend_pebs_noirq(struct pebs_tracer *tracer)
1147{
1148 return 0;
1149}
1150
1151void ds_resume_pebs(struct pebs_tracer *tracer)
1152{
1153
1154}
1155
1156int ds_resume_pebs_noirq(struct pebs_tracer *tracer)
1157{
1158 return 0;
1159}
1160
1161const struct bts_trace *ds_read_bts(struct bts_tracer *tracer)
1162{
1163 if (!tracer)
1164 return NULL;
1165
1166 ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
1167 return &tracer->trace;
1168}
1169
1170const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer)
1171{
1172 if (!tracer)
1173 return NULL;
1174
1175 ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
1176
1177 tracer->trace.counters = ds_cfg.nr_counter_reset;
1178 memcpy(tracer->trace.counter_reset,
1179 tracer->ds.context->ds +
1180 (NUM_DS_PTR_FIELDS * ds_cfg.sizeof_ptr_field),
1181 ds_cfg.nr_counter_reset * PEBS_RESET_FIELD_SIZE);
1182
1183 return &tracer->trace;
1184}
1185
1186int ds_reset_bts(struct bts_tracer *tracer)
1187{
1188 if (!tracer)
1189 return -EINVAL;
1190
1191 tracer->trace.ds.top = tracer->trace.ds.begin;
1192
1193 ds_set(tracer->ds.context->ds, ds_bts, ds_index,
1194 (unsigned long)tracer->trace.ds.top);
1195
1196 return 0;
1197}
1198
1199int ds_reset_pebs(struct pebs_tracer *tracer)
1200{
1201 if (!tracer)
1202 return -EINVAL;
1203
1204 tracer->trace.ds.top = tracer->trace.ds.begin;
1205
1206 ds_set(tracer->ds.context->ds, ds_pebs, ds_index,
1207 (unsigned long)tracer->trace.ds.top);
1208
1209 return 0;
1210}
1211
1212int ds_set_pebs_reset(struct pebs_tracer *tracer,
1213 unsigned int counter, u64 value)
1214{
1215 if (!tracer)
1216 return -EINVAL;
1217
1218 if (ds_cfg.nr_counter_reset < counter)
1219 return -EINVAL;
1220
1221 *(u64 *)(tracer->ds.context->ds +
1222 (NUM_DS_PTR_FIELDS * ds_cfg.sizeof_ptr_field) +
1223 (counter * PEBS_RESET_FIELD_SIZE)) = value;
1224
1225 return 0;
1226}
1227
1228static const struct ds_configuration ds_cfg_netburst = {
1229 .name = "Netburst",
1230 .ctl[dsf_bts] = (1 << 2) | (1 << 3),
1231 .ctl[dsf_bts_kernel] = (1 << 5),
1232 .ctl[dsf_bts_user] = (1 << 6),
1233 .nr_counter_reset = 1,
1234};
1235static const struct ds_configuration ds_cfg_pentium_m = {
1236 .name = "Pentium M",
1237 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
1238 .nr_counter_reset = 1,
1239};
1240static const struct ds_configuration ds_cfg_core2_atom = {
1241 .name = "Core 2/Atom",
1242 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
1243 .ctl[dsf_bts_kernel] = (1 << 9),
1244 .ctl[dsf_bts_user] = (1 << 10),
1245 .nr_counter_reset = 1,
1246};
1247static const struct ds_configuration ds_cfg_core_i7 = {
1248 .name = "Core i7",
1249 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
1250 .ctl[dsf_bts_kernel] = (1 << 9),
1251 .ctl[dsf_bts_user] = (1 << 10),
1252 .nr_counter_reset = 4,
1253};
1254
1255static void
1256ds_configure(const struct ds_configuration *cfg,
1257 struct cpuinfo_x86 *cpu)
1258{
1259 unsigned long nr_pebs_fields = 0;
1260
1261 printk(KERN_INFO "[ds] using %s configuration\n", cfg->name);
1262
1263#ifdef __i386__
1264 nr_pebs_fields = 10;
1265#else
1266 nr_pebs_fields = 18;
1267#endif
1268
1269 /*
1270 * Starting with version 2, architectural performance
1271 * monitoring supports a format specifier.
1272 */
1273 if ((cpuid_eax(0xa) & 0xff) > 1) {
1274 unsigned long perf_capabilities, format;
1275
1276 rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_capabilities);
1277
1278 format = (perf_capabilities >> 8) & 0xf;
1279
1280 switch (format) {
1281 case 0:
1282 nr_pebs_fields = 18;
1283 break;
1284 case 1:
1285 nr_pebs_fields = 22;
1286 break;
1287 default:
1288 printk(KERN_INFO
1289 "[ds] unknown PEBS format: %lu\n", format);
1290 nr_pebs_fields = 0;
1291 break;
1292 }
1293 }
1294
1295 memset(&ds_cfg, 0, sizeof(ds_cfg));
1296 ds_cfg = *cfg;
1297
1298 ds_cfg.sizeof_ptr_field =
1299 (cpu_has(cpu, X86_FEATURE_DTES64) ? 8 : 4);
1300
1301 ds_cfg.sizeof_rec[ds_bts] = ds_cfg.sizeof_ptr_field * 3;
1302 ds_cfg.sizeof_rec[ds_pebs] = ds_cfg.sizeof_ptr_field * nr_pebs_fields;
1303
1304 if (!cpu_has(cpu, X86_FEATURE_BTS)) {
1305 ds_cfg.sizeof_rec[ds_bts] = 0;
1306 printk(KERN_INFO "[ds] bts not available\n");
1307 }
1308 if (!cpu_has(cpu, X86_FEATURE_PEBS)) {
1309 ds_cfg.sizeof_rec[ds_pebs] = 0;
1310 printk(KERN_INFO "[ds] pebs not available\n");
1311 }
1312
1313 printk(KERN_INFO "[ds] sizes: address: %u bit, ",
1314 8 * ds_cfg.sizeof_ptr_field);
1315 printk("bts/pebs record: %u/%u bytes\n",
1316 ds_cfg.sizeof_rec[ds_bts], ds_cfg.sizeof_rec[ds_pebs]);
1317
1318 WARN_ON_ONCE(MAX_PEBS_COUNTERS < ds_cfg.nr_counter_reset);
1319}
1320
1321void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
1322{
1323 /* Only configure the first cpu. Others are identical. */
1324 if (ds_cfg.name)
1325 return;
1326
1327 switch (c->x86) {
1328 case 0x6:
1329 switch (c->x86_model) {
1330 case 0x9:
1331 case 0xd: /* Pentium M */
1332 ds_configure(&ds_cfg_pentium_m, c);
1333 break;
1334 case 0xf:
1335 case 0x17: /* Core2 */
1336 case 0x1c: /* Atom */
1337 ds_configure(&ds_cfg_core2_atom, c);
1338 break;
1339 case 0x1a: /* Core i7 */
1340 ds_configure(&ds_cfg_core_i7, c);
1341 break;
1342 default:
1343 /* Sorry, don't know about them. */
1344 break;
1345 }
1346 break;
1347 case 0xf:
1348 switch (c->x86_model) {
1349 case 0x0:
1350 case 0x1:
1351 case 0x2: /* Netburst */
1352 ds_configure(&ds_cfg_netburst, c);
1353 break;
1354 default:
1355 /* Sorry, don't know about them. */
1356 break;
1357 }
1358 break;
1359 default:
1360 /* Sorry, don't know about them. */
1361 break;
1362 }
1363}
1364
1365static inline void ds_take_timestamp(struct ds_context *context,
1366 enum bts_qualifier qualifier,
1367 struct task_struct *task)
1368{
1369 struct bts_tracer *tracer = context->bts_master;
1370 struct bts_struct ts;
1371
1372 /* Prevent compilers from reading the tracer pointer twice. */
1373 barrier();
1374
1375 if (!tracer || !(tracer->flags & BTS_TIMESTAMPS))
1376 return;
1377
1378 memset(&ts, 0, sizeof(ts));
1379 ts.qualifier = qualifier;
1380 ts.variant.event.clock = trace_clock_global();
1381 ts.variant.event.pid = task->pid;
1382
1383 bts_write(tracer, &ts);
1384}
1385
1386/*
1387 * Change the DS configuration from tracing prev to tracing next.
1388 */
1389void ds_switch_to(struct task_struct *prev, struct task_struct *next)
1390{
1391 struct ds_context *prev_ctx = prev->thread.ds_ctx;
1392 struct ds_context *next_ctx = next->thread.ds_ctx;
1393 unsigned long debugctlmsr = next->thread.debugctlmsr;
1394
1395 /* Make sure all data is read before we start. */
1396 barrier();
1397
1398 if (prev_ctx) {
1399 update_debugctlmsr(0);
1400
1401 ds_take_timestamp(prev_ctx, bts_task_departs, prev);
1402 }
1403
1404 if (next_ctx) {
1405 ds_take_timestamp(next_ctx, bts_task_arrives, next);
1406
1407 wrmsrl(MSR_IA32_DS_AREA, (unsigned long)next_ctx->ds);
1408 }
1409
1410 update_debugctlmsr(debugctlmsr);
1411}
1412
1413static __init int ds_selftest(void)
1414{
1415 if (ds_cfg.sizeof_rec[ds_bts]) {
1416 int error;
1417
1418 error = ds_selftest_bts();
1419 if (error) {
1420 WARN(1, "[ds] selftest failed. disabling bts.\n");
1421 ds_cfg.sizeof_rec[ds_bts] = 0;
1422 }
1423 }
1424
1425 if (ds_cfg.sizeof_rec[ds_pebs]) {
1426 int error;
1427
1428 error = ds_selftest_pebs();
1429 if (error) {
1430 WARN(1, "[ds] selftest failed. disabling pebs.\n");
1431 ds_cfg.sizeof_rec[ds_pebs] = 0;
1432 }
1433 }
1434
1435 return 0;
1436}
1437device_initcall(ds_selftest);
diff --git a/arch/x86/kernel/ds_selftest.c b/arch/x86/kernel/ds_selftest.c
deleted file mode 100644
index 6bc7c199ab99..000000000000
--- a/arch/x86/kernel/ds_selftest.c
+++ /dev/null
@@ -1,408 +0,0 @@
1/*
2 * Debug Store support - selftest
3 *
4 *
5 * Copyright (C) 2009 Intel Corporation.
6 * Markus Metzger <markus.t.metzger@intel.com>, 2009
7 */
8
9#include "ds_selftest.h"
10
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/smp.h>
14#include <linux/cpu.h>
15
16#include <asm/ds.h>
17
18
19#define BUFFER_SIZE 521 /* Intentionally chose an odd size. */
20#define SMALL_BUFFER_SIZE 24 /* A single bts entry. */
21
22struct ds_selftest_bts_conf {
23 struct bts_tracer *tracer;
24 int error;
25 int (*suspend)(struct bts_tracer *);
26 int (*resume)(struct bts_tracer *);
27};
28
29static int ds_selftest_bts_consistency(const struct bts_trace *trace)
30{
31 int error = 0;
32
33 if (!trace) {
34 printk(KERN_CONT "failed to access trace...");
35 /* Bail out. Other tests are pointless. */
36 return -1;
37 }
38
39 if (!trace->read) {
40 printk(KERN_CONT "bts read not available...");
41 error = -1;
42 }
43
44 /* Do some sanity checks on the trace configuration. */
45 if (!trace->ds.n) {
46 printk(KERN_CONT "empty bts buffer...");
47 error = -1;
48 }
49 if (!trace->ds.size) {
50 printk(KERN_CONT "bad bts trace setup...");
51 error = -1;
52 }
53 if (trace->ds.end !=
54 (char *)trace->ds.begin + (trace->ds.n * trace->ds.size)) {
55 printk(KERN_CONT "bad bts buffer setup...");
56 error = -1;
57 }
58 /*
59 * We allow top in [begin; end], since its not clear when the
60 * overflow adjustment happens: after the increment or before the
61 * write.
62 */
63 if ((trace->ds.top < trace->ds.begin) ||
64 (trace->ds.end < trace->ds.top)) {
65 printk(KERN_CONT "bts top out of bounds...");
66 error = -1;
67 }
68
69 return error;
70}
71
72static int ds_selftest_bts_read(struct bts_tracer *tracer,
73 const struct bts_trace *trace,
74 const void *from, const void *to)
75{
76 const unsigned char *at;
77
78 /*
79 * Check a few things which do not belong to this test.
80 * They should be covered by other tests.
81 */
82 if (!trace)
83 return -1;
84
85 if (!trace->read)
86 return -1;
87
88 if (to < from)
89 return -1;
90
91 if (from < trace->ds.begin)
92 return -1;
93
94 if (trace->ds.end < to)
95 return -1;
96
97 if (!trace->ds.size)
98 return -1;
99
100 /* Now to the test itself. */
101 for (at = from; (void *)at < to; at += trace->ds.size) {
102 struct bts_struct bts;
103 unsigned long index;
104 int error;
105
106 if (((void *)at - trace->ds.begin) % trace->ds.size) {
107 printk(KERN_CONT
108 "read from non-integer index...");
109 return -1;
110 }
111 index = ((void *)at - trace->ds.begin) / trace->ds.size;
112
113 memset(&bts, 0, sizeof(bts));
114 error = trace->read(tracer, at, &bts);
115 if (error < 0) {
116 printk(KERN_CONT
117 "error reading bts trace at [%lu] (0x%p)...",
118 index, at);
119 return error;
120 }
121
122 switch (bts.qualifier) {
123 case BTS_BRANCH:
124 break;
125 default:
126 printk(KERN_CONT
127 "unexpected bts entry %llu at [%lu] (0x%p)...",
128 bts.qualifier, index, at);
129 return -1;
130 }
131 }
132
133 return 0;
134}
135
136static void ds_selftest_bts_cpu(void *arg)
137{
138 struct ds_selftest_bts_conf *conf = arg;
139 const struct bts_trace *trace;
140 void *top;
141
142 if (IS_ERR(conf->tracer)) {
143 conf->error = PTR_ERR(conf->tracer);
144 conf->tracer = NULL;
145
146 printk(KERN_CONT
147 "initialization failed (err: %d)...", conf->error);
148 return;
149 }
150
151 /* We should meanwhile have enough trace. */
152 conf->error = conf->suspend(conf->tracer);
153 if (conf->error < 0)
154 return;
155
156 /* Let's see if we can access the trace. */
157 trace = ds_read_bts(conf->tracer);
158
159 conf->error = ds_selftest_bts_consistency(trace);
160 if (conf->error < 0)
161 return;
162
163 /* If everything went well, we should have a few trace entries. */
164 if (trace->ds.top == trace->ds.begin) {
165 /*
166 * It is possible but highly unlikely that we got a
167 * buffer overflow and end up at exactly the same
168 * position we started from.
169 * Let's issue a warning, but continue.
170 */
171 printk(KERN_CONT "no trace/overflow...");
172 }
173
174 /* Let's try to read the trace we collected. */
175 conf->error =
176 ds_selftest_bts_read(conf->tracer, trace,
177 trace->ds.begin, trace->ds.top);
178 if (conf->error < 0)
179 return;
180
181 /*
182 * Let's read the trace again.
183 * Since we suspended tracing, we should get the same result.
184 */
185 top = trace->ds.top;
186
187 trace = ds_read_bts(conf->tracer);
188 conf->error = ds_selftest_bts_consistency(trace);
189 if (conf->error < 0)
190 return;
191
192 if (top != trace->ds.top) {
193 printk(KERN_CONT "suspend not working...");
194 conf->error = -1;
195 return;
196 }
197
198 /* Let's collect some more trace - see if resume is working. */
199 conf->error = conf->resume(conf->tracer);
200 if (conf->error < 0)
201 return;
202
203 conf->error = conf->suspend(conf->tracer);
204 if (conf->error < 0)
205 return;
206
207 trace = ds_read_bts(conf->tracer);
208
209 conf->error = ds_selftest_bts_consistency(trace);
210 if (conf->error < 0)
211 return;
212
213 if (trace->ds.top == top) {
214 /*
215 * It is possible but highly unlikely that we got a
216 * buffer overflow and end up at exactly the same
217 * position we started from.
218 * Let's issue a warning and check the full trace.
219 */
220 printk(KERN_CONT
221 "no resume progress/overflow...");
222
223 conf->error =
224 ds_selftest_bts_read(conf->tracer, trace,
225 trace->ds.begin, trace->ds.end);
226 } else if (trace->ds.top < top) {
227 /*
228 * We had a buffer overflow - the entire buffer should
229 * contain trace records.
230 */
231 conf->error =
232 ds_selftest_bts_read(conf->tracer, trace,
233 trace->ds.begin, trace->ds.end);
234 } else {
235 /*
236 * It is quite likely that the buffer did not overflow.
237 * Let's just check the delta trace.
238 */
239 conf->error =
240 ds_selftest_bts_read(conf->tracer, trace, top,
241 trace->ds.top);
242 }
243 if (conf->error < 0)
244 return;
245
246 conf->error = 0;
247}
248
249static int ds_suspend_bts_wrap(struct bts_tracer *tracer)
250{
251 ds_suspend_bts(tracer);
252 return 0;
253}
254
255static int ds_resume_bts_wrap(struct bts_tracer *tracer)
256{
257 ds_resume_bts(tracer);
258 return 0;
259}
260
261static void ds_release_bts_noirq_wrap(void *tracer)
262{
263 (void)ds_release_bts_noirq(tracer);
264}
265
266static int ds_selftest_bts_bad_release_noirq(int cpu,
267 struct bts_tracer *tracer)
268{
269 int error = -EPERM;
270
271 /* Try to release the tracer on the wrong cpu. */
272 get_cpu();
273 if (cpu != smp_processor_id()) {
274 error = ds_release_bts_noirq(tracer);
275 if (error != -EPERM)
276 printk(KERN_CONT "release on wrong cpu...");
277 }
278 put_cpu();
279
280 return error ? 0 : -1;
281}
282
283static int ds_selftest_bts_bad_request_cpu(int cpu, void *buffer)
284{
285 struct bts_tracer *tracer;
286 int error;
287
288 /* Try to request cpu tracing while task tracing is active. */
289 tracer = ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE, NULL,
290 (size_t)-1, BTS_KERNEL);
291 error = PTR_ERR(tracer);
292 if (!IS_ERR(tracer)) {
293 ds_release_bts(tracer);
294 error = 0;
295 }
296
297 if (error != -EPERM)
298 printk(KERN_CONT "cpu/task tracing overlap...");
299
300 return error ? 0 : -1;
301}
302
303static int ds_selftest_bts_bad_request_task(void *buffer)
304{
305 struct bts_tracer *tracer;
306 int error;
307
308 /* Try to request cpu tracing while task tracing is active. */
309 tracer = ds_request_bts_task(current, buffer, BUFFER_SIZE, NULL,
310 (size_t)-1, BTS_KERNEL);
311 error = PTR_ERR(tracer);
312 if (!IS_ERR(tracer)) {
313 error = 0;
314 ds_release_bts(tracer);
315 }
316
317 if (error != -EPERM)
318 printk(KERN_CONT "task/cpu tracing overlap...");
319
320 return error ? 0 : -1;
321}
322
323int ds_selftest_bts(void)
324{
325 struct ds_selftest_bts_conf conf;
326 unsigned char buffer[BUFFER_SIZE], *small_buffer;
327 unsigned long irq;
328 int cpu;
329
330 printk(KERN_INFO "[ds] bts selftest...");
331 conf.error = 0;
332
333 small_buffer = (unsigned char *)ALIGN((unsigned long)buffer, 8) + 8;
334
335 get_online_cpus();
336 for_each_online_cpu(cpu) {
337 conf.suspend = ds_suspend_bts_wrap;
338 conf.resume = ds_resume_bts_wrap;
339 conf.tracer =
340 ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE,
341 NULL, (size_t)-1, BTS_KERNEL);
342 ds_selftest_bts_cpu(&conf);
343 if (conf.error >= 0)
344 conf.error = ds_selftest_bts_bad_request_task(buffer);
345 ds_release_bts(conf.tracer);
346 if (conf.error < 0)
347 goto out;
348
349 conf.suspend = ds_suspend_bts_noirq;
350 conf.resume = ds_resume_bts_noirq;
351 conf.tracer =
352 ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE,
353 NULL, (size_t)-1, BTS_KERNEL);
354 smp_call_function_single(cpu, ds_selftest_bts_cpu, &conf, 1);
355 if (conf.error >= 0) {
356 conf.error =
357 ds_selftest_bts_bad_release_noirq(cpu,
358 conf.tracer);
359 /* We must not release the tracer twice. */
360 if (conf.error < 0)
361 conf.tracer = NULL;
362 }
363 if (conf.error >= 0)
364 conf.error = ds_selftest_bts_bad_request_task(buffer);
365 smp_call_function_single(cpu, ds_release_bts_noirq_wrap,
366 conf.tracer, 1);
367 if (conf.error < 0)
368 goto out;
369 }
370
371 conf.suspend = ds_suspend_bts_wrap;
372 conf.resume = ds_resume_bts_wrap;
373 conf.tracer =
374 ds_request_bts_task(current, buffer, BUFFER_SIZE,
375 NULL, (size_t)-1, BTS_KERNEL);
376 ds_selftest_bts_cpu(&conf);
377 if (conf.error >= 0)
378 conf.error = ds_selftest_bts_bad_request_cpu(0, buffer);
379 ds_release_bts(conf.tracer);
380 if (conf.error < 0)
381 goto out;
382
383 conf.suspend = ds_suspend_bts_noirq;
384 conf.resume = ds_resume_bts_noirq;
385 conf.tracer =
386 ds_request_bts_task(current, small_buffer, SMALL_BUFFER_SIZE,
387 NULL, (size_t)-1, BTS_KERNEL);
388 local_irq_save(irq);
389 ds_selftest_bts_cpu(&conf);
390 if (conf.error >= 0)
391 conf.error = ds_selftest_bts_bad_request_cpu(0, buffer);
392 ds_release_bts_noirq(conf.tracer);
393 local_irq_restore(irq);
394 if (conf.error < 0)
395 goto out;
396
397 conf.error = 0;
398 out:
399 put_online_cpus();
400 printk(KERN_CONT "%s.\n", (conf.error ? "failed" : "passed"));
401
402 return conf.error;
403}
404
405int ds_selftest_pebs(void)
406{
407 return 0;
408}
diff --git a/arch/x86/kernel/ds_selftest.h b/arch/x86/kernel/ds_selftest.h
deleted file mode 100644
index 2ba8745c6663..000000000000
--- a/arch/x86/kernel/ds_selftest.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * Debug Store support - selftest
3 *
4 *
5 * Copyright (C) 2009 Intel Corporation.
6 * Markus Metzger <markus.t.metzger@intel.com>, 2009
7 */
8
9#ifdef CONFIG_X86_DS_SELFTEST
10extern int ds_selftest_bts(void);
11extern int ds_selftest_pebs(void);
12#else
13static inline int ds_selftest_bts(void) { return 0; }
14static inline int ds_selftest_pebs(void) { return 0; }
15#endif
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 6d817554780a..c89a386930b7 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -224,11 +224,6 @@ unsigned __kprobes long oops_begin(void)
224 int cpu; 224 int cpu;
225 unsigned long flags; 225 unsigned long flags;
226 226
227 /* notify the hw-branch tracer so it may disable tracing and
228 add the last trace to the trace buffer -
229 the earlier this happens, the more useful the trace. */
230 trace_hw_branch_oops();
231
232 oops_enter(); 227 oops_enter();
233 228
234 /* racy, but better than risking deadlock. */ 229 /* racy, but better than risking deadlock. */
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 44a8e0dc6737..cd49141cf153 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -53,6 +53,7 @@
53#include <asm/processor-flags.h> 53#include <asm/processor-flags.h>
54#include <asm/ftrace.h> 54#include <asm/ftrace.h>
55#include <asm/irq_vectors.h> 55#include <asm/irq_vectors.h>
56#include <asm/cpufeature.h>
56 57
57/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ 58/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
58#include <linux/elf-em.h> 59#include <linux/elf-em.h>
@@ -905,7 +906,25 @@ ENTRY(simd_coprocessor_error)
905 RING0_INT_FRAME 906 RING0_INT_FRAME
906 pushl $0 907 pushl $0
907 CFI_ADJUST_CFA_OFFSET 4 908 CFI_ADJUST_CFA_OFFSET 4
909#ifdef CONFIG_X86_INVD_BUG
910 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
911661: pushl $do_general_protection
912662:
913.section .altinstructions,"a"
914 .balign 4
915 .long 661b
916 .long 663f
917 .byte X86_FEATURE_XMM
918 .byte 662b-661b
919 .byte 664f-663f
920.previous
921.section .altinstr_replacement,"ax"
922663: pushl $do_simd_coprocessor_error
923664:
924.previous
925#else
908 pushl $do_simd_coprocessor_error 926 pushl $do_simd_coprocessor_error
927#endif
909 CFI_ADJUST_CFA_OFFSET 4 928 CFI_ADJUST_CFA_OFFSET 4
910 jmp error_code 929 jmp error_code
911 CFI_ENDPROC 930 CFI_ENDPROC
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 23b4ecdffa9b..a198b7c87a12 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -36,6 +36,7 @@
36unsigned long hpet_address; 36unsigned long hpet_address;
37u8 hpet_blockid; /* OS timer block num */ 37u8 hpet_blockid; /* OS timer block num */
38u8 hpet_msi_disable; 38u8 hpet_msi_disable;
39u8 hpet_readback_cmp;
39 40
40#ifdef CONFIG_PCI_MSI 41#ifdef CONFIG_PCI_MSI
41static unsigned long hpet_num_timers; 42static unsigned long hpet_num_timers;
@@ -395,19 +396,23 @@ static int hpet_next_event(unsigned long delta,
395 * at that point and we would wait for the next hpet interrupt 396 * at that point and we would wait for the next hpet interrupt
396 * forever. We found out that reading the CMP register back 397 * forever. We found out that reading the CMP register back
397 * forces the transfer so we can rely on the comparison with 398 * forces the transfer so we can rely on the comparison with
398 * the counter register below. If the read back from the 399 * the counter register below.
399 * compare register does not match the value we programmed 400 *
400 * then we might have a real hardware problem. We can not do 401 * That works fine on those ATI chipsets, but on newer Intel
401 * much about it here, but at least alert the user/admin with 402 * chipsets (ICH9...) this triggers due to an erratum: Reading
402 * a prominent warning. 403 * the comparator immediately following a write is returning
403 * An erratum on some chipsets (ICH9,..), results in comparator read 404 * the old value.
404 * immediately following a write returning old value. Workaround 405 *
405 * for this is to read this value second time, when first 406 * We restrict the read back to the affected ATI chipsets (set
406 * read returns old value. 407 * by quirks) and also run it with hpet=verbose for debugging
408 * purposes.
407 */ 409 */
408 if (unlikely((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt)) { 410 if (hpet_readback_cmp || hpet_verbose) {
409 WARN_ONCE(hpet_readl(HPET_Tn_CMP(timer)) != cnt, 411 u32 cmp = hpet_readl(HPET_Tn_CMP(timer));
410 KERN_WARNING "hpet: compare register read back failed.\n"); 412
413 if (cmp != cnt)
414 printk_once(KERN_WARNING
415 "hpet: compare register read back failed.\n");
411 } 416 }
412 417
413 return (s32)(hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0; 418 return (s32)(hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index d6cc065f519f..a8f1b803d2fd 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -189,25 +189,16 @@ static int get_hbp_len(u8 hbp_len)
189} 189}
190 190
191/* 191/*
192 * Check for virtual address in user space.
193 */
194int arch_check_va_in_userspace(unsigned long va, u8 hbp_len)
195{
196 unsigned int len;
197
198 len = get_hbp_len(hbp_len);
199
200 return (va <= TASK_SIZE - len);
201}
202
203/*
204 * Check for virtual address in kernel space. 192 * Check for virtual address in kernel space.
205 */ 193 */
206static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len) 194int arch_check_bp_in_kernelspace(struct perf_event *bp)
207{ 195{
208 unsigned int len; 196 unsigned int len;
197 unsigned long va;
198 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
209 199
210 len = get_hbp_len(hbp_len); 200 va = info->address;
201 len = get_hbp_len(info->len);
211 202
212 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE); 203 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
213} 204}
@@ -300,8 +291,7 @@ static int arch_build_bp_info(struct perf_event *bp)
300/* 291/*
301 * Validate the arch-specific HW Breakpoint register settings 292 * Validate the arch-specific HW Breakpoint register settings
302 */ 293 */
303int arch_validate_hwbkpt_settings(struct perf_event *bp, 294int arch_validate_hwbkpt_settings(struct perf_event *bp)
304 struct task_struct *tsk)
305{ 295{
306 struct arch_hw_breakpoint *info = counter_arch_bp(bp); 296 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
307 unsigned int align; 297 unsigned int align;
@@ -314,16 +304,6 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp,
314 304
315 ret = -EINVAL; 305 ret = -EINVAL;
316 306
317 if (info->type == X86_BREAKPOINT_EXECUTE)
318 /*
319 * Ptrace-refactoring code
320 * For now, we'll allow instruction breakpoint only for user-space
321 * addresses
322 */
323 if ((!arch_check_va_in_userspace(info->address, info->len)) &&
324 info->len != X86_BREAKPOINT_EXECUTE)
325 return ret;
326
327 switch (info->len) { 307 switch (info->len) {
328 case X86_BREAKPOINT_LEN_1: 308 case X86_BREAKPOINT_LEN_1:
329 align = 0; 309 align = 0;
@@ -350,15 +330,6 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp,
350 if (info->address & align) 330 if (info->address & align)
351 return -EINVAL; 331 return -EINVAL;
352 332
353 /* Check that the virtual address is in the proper range */
354 if (tsk) {
355 if (!arch_check_va_in_userspace(info->address, info->len))
356 return -EFAULT;
357 } else {
358 if (!arch_check_va_in_kernelspace(info->address, info->len))
359 return -EFAULT;
360 }
361
362 return 0; 333 return 0;
363} 334}
364 335
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index 54c31c285488..86cef6b32253 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -102,65 +102,62 @@ void __cpuinit fpu_init(void)
102 102
103 mxcsr_feature_mask_init(); 103 mxcsr_feature_mask_init();
104 /* clean state in init */ 104 /* clean state in init */
105 if (cpu_has_xsave) 105 current_thread_info()->status = 0;
106 current_thread_info()->status = TS_XSAVE;
107 else
108 current_thread_info()->status = 0;
109 clear_used_math(); 106 clear_used_math();
110} 107}
111#endif /* CONFIG_X86_64 */ 108#endif /* CONFIG_X86_64 */
112 109
113/* 110static void fpu_finit(struct fpu *fpu)
114 * The _current_ task is using the FPU for the first time
115 * so initialize it and set the mxcsr to its default
116 * value at reset if we support XMM instructions and then
117 * remeber the current task has used the FPU.
118 */
119int init_fpu(struct task_struct *tsk)
120{ 111{
121 if (tsk_used_math(tsk)) {
122 if (HAVE_HWFP && tsk == current)
123 unlazy_fpu(tsk);
124 return 0;
125 }
126
127 /*
128 * Memory allocation at the first usage of the FPU and other state.
129 */
130 if (!tsk->thread.xstate) {
131 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
132 GFP_KERNEL);
133 if (!tsk->thread.xstate)
134 return -ENOMEM;
135 }
136
137#ifdef CONFIG_X86_32 112#ifdef CONFIG_X86_32
138 if (!HAVE_HWFP) { 113 if (!HAVE_HWFP) {
139 memset(tsk->thread.xstate, 0, xstate_size); 114 finit_soft_fpu(&fpu->state->soft);
140 finit_task(tsk); 115 return;
141 set_stopped_child_used_math(tsk);
142 return 0;
143 } 116 }
144#endif 117#endif
145 118
146 if (cpu_has_fxsr) { 119 if (cpu_has_fxsr) {
147 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; 120 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
148 121
149 memset(fx, 0, xstate_size); 122 memset(fx, 0, xstate_size);
150 fx->cwd = 0x37f; 123 fx->cwd = 0x37f;
151 if (cpu_has_xmm) 124 if (cpu_has_xmm)
152 fx->mxcsr = MXCSR_DEFAULT; 125 fx->mxcsr = MXCSR_DEFAULT;
153 } else { 126 } else {
154 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; 127 struct i387_fsave_struct *fp = &fpu->state->fsave;
155 memset(fp, 0, xstate_size); 128 memset(fp, 0, xstate_size);
156 fp->cwd = 0xffff037fu; 129 fp->cwd = 0xffff037fu;
157 fp->swd = 0xffff0000u; 130 fp->swd = 0xffff0000u;
158 fp->twd = 0xffffffffu; 131 fp->twd = 0xffffffffu;
159 fp->fos = 0xffff0000u; 132 fp->fos = 0xffff0000u;
160 } 133 }
134}
135
136/*
137 * The _current_ task is using the FPU for the first time
138 * so initialize it and set the mxcsr to its default
139 * value at reset if we support XMM instructions and then
140 * remeber the current task has used the FPU.
141 */
142int init_fpu(struct task_struct *tsk)
143{
144 int ret;
145
146 if (tsk_used_math(tsk)) {
147 if (HAVE_HWFP && tsk == current)
148 unlazy_fpu(tsk);
149 return 0;
150 }
151
161 /* 152 /*
162 * Only the device not available exception or ptrace can call init_fpu. 153 * Memory allocation at the first usage of the FPU and other state.
163 */ 154 */
155 ret = fpu_alloc(&tsk->thread.fpu);
156 if (ret)
157 return ret;
158
159 fpu_finit(&tsk->thread.fpu);
160
164 set_stopped_child_used_math(tsk); 161 set_stopped_child_used_math(tsk);
165 return 0; 162 return 0;
166} 163}
@@ -194,7 +191,7 @@ int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
194 return ret; 191 return ret;
195 192
196 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 193 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
197 &target->thread.xstate->fxsave, 0, -1); 194 &target->thread.fpu.state->fxsave, 0, -1);
198} 195}
199 196
200int xfpregs_set(struct task_struct *target, const struct user_regset *regset, 197int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
@@ -211,19 +208,19 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
211 return ret; 208 return ret;
212 209
213 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 210 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
214 &target->thread.xstate->fxsave, 0, -1); 211 &target->thread.fpu.state->fxsave, 0, -1);
215 212
216 /* 213 /*
217 * mxcsr reserved bits must be masked to zero for security reasons. 214 * mxcsr reserved bits must be masked to zero for security reasons.
218 */ 215 */
219 target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; 216 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
220 217
221 /* 218 /*
222 * update the header bits in the xsave header, indicating the 219 * update the header bits in the xsave header, indicating the
223 * presence of FP and SSE state. 220 * presence of FP and SSE state.
224 */ 221 */
225 if (cpu_has_xsave) 222 if (cpu_has_xsave)
226 target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE; 223 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
227 224
228 return ret; 225 return ret;
229} 226}
@@ -246,14 +243,14 @@ int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
246 * memory layout in the thread struct, so that we can copy the entire 243 * memory layout in the thread struct, so that we can copy the entire
247 * xstateregs to the user using one user_regset_copyout(). 244 * xstateregs to the user using one user_regset_copyout().
248 */ 245 */
249 memcpy(&target->thread.xstate->fxsave.sw_reserved, 246 memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
250 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes)); 247 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
251 248
252 /* 249 /*
253 * Copy the xstate memory layout. 250 * Copy the xstate memory layout.
254 */ 251 */
255 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 252 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
256 &target->thread.xstate->xsave, 0, -1); 253 &target->thread.fpu.state->xsave, 0, -1);
257 return ret; 254 return ret;
258} 255}
259 256
@@ -272,14 +269,14 @@ int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
272 return ret; 269 return ret;
273 270
274 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 271 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
275 &target->thread.xstate->xsave, 0, -1); 272 &target->thread.fpu.state->xsave, 0, -1);
276 273
277 /* 274 /*
278 * mxcsr reserved bits must be masked to zero for security reasons. 275 * mxcsr reserved bits must be masked to zero for security reasons.
279 */ 276 */
280 target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; 277 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
281 278
282 xsave_hdr = &target->thread.xstate->xsave.xsave_hdr; 279 xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
283 280
284 xsave_hdr->xstate_bv &= pcntxt_mask; 281 xsave_hdr->xstate_bv &= pcntxt_mask;
285 /* 282 /*
@@ -365,7 +362,7 @@ static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
365static void 362static void
366convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk) 363convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
367{ 364{
368 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; 365 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
369 struct _fpreg *to = (struct _fpreg *) &env->st_space[0]; 366 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
370 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0]; 367 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
371 int i; 368 int i;
@@ -405,7 +402,7 @@ static void convert_to_fxsr(struct task_struct *tsk,
405 const struct user_i387_ia32_struct *env) 402 const struct user_i387_ia32_struct *env)
406 403
407{ 404{
408 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; 405 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
409 struct _fpreg *from = (struct _fpreg *) &env->st_space[0]; 406 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
410 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0]; 407 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
411 int i; 408 int i;
@@ -445,7 +442,7 @@ int fpregs_get(struct task_struct *target, const struct user_regset *regset,
445 442
446 if (!cpu_has_fxsr) { 443 if (!cpu_has_fxsr) {
447 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 444 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
448 &target->thread.xstate->fsave, 0, 445 &target->thread.fpu.state->fsave, 0,
449 -1); 446 -1);
450 } 447 }
451 448
@@ -475,7 +472,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset,
475 472
476 if (!cpu_has_fxsr) { 473 if (!cpu_has_fxsr) {
477 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 474 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
478 &target->thread.xstate->fsave, 0, -1); 475 &target->thread.fpu.state->fsave, 0, -1);
479 } 476 }
480 477
481 if (pos > 0 || count < sizeof(env)) 478 if (pos > 0 || count < sizeof(env))
@@ -490,7 +487,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset,
490 * presence of FP. 487 * presence of FP.
491 */ 488 */
492 if (cpu_has_xsave) 489 if (cpu_has_xsave)
493 target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP; 490 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
494 return ret; 491 return ret;
495} 492}
496 493
@@ -501,7 +498,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset,
501static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf) 498static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
502{ 499{
503 struct task_struct *tsk = current; 500 struct task_struct *tsk = current;
504 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; 501 struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
505 502
506 fp->status = fp->swd; 503 fp->status = fp->swd;
507 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct))) 504 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
@@ -512,7 +509,7 @@ static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
512static int save_i387_fxsave(struct _fpstate_ia32 __user *buf) 509static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
513{ 510{
514 struct task_struct *tsk = current; 511 struct task_struct *tsk = current;
515 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; 512 struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
516 struct user_i387_ia32_struct env; 513 struct user_i387_ia32_struct env;
517 int err = 0; 514 int err = 0;
518 515
@@ -547,7 +544,7 @@ static int save_i387_xsave(void __user *buf)
547 * header as well as change any contents in the memory layout. 544 * header as well as change any contents in the memory layout.
548 * xrestore as part of sigreturn will capture all the changes. 545 * xrestore as part of sigreturn will capture all the changes.
549 */ 546 */
550 tsk->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE; 547 tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
551 548
552 if (save_i387_fxsave(fx) < 0) 549 if (save_i387_fxsave(fx) < 0)
553 return -1; 550 return -1;
@@ -599,7 +596,7 @@ static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
599{ 596{
600 struct task_struct *tsk = current; 597 struct task_struct *tsk = current;
601 598
602 return __copy_from_user(&tsk->thread.xstate->fsave, buf, 599 return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
603 sizeof(struct i387_fsave_struct)); 600 sizeof(struct i387_fsave_struct));
604} 601}
605 602
@@ -610,10 +607,10 @@ static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
610 struct user_i387_ia32_struct env; 607 struct user_i387_ia32_struct env;
611 int err; 608 int err;
612 609
613 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], 610 err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
614 size); 611 size);
615 /* mxcsr reserved bits must be masked to zero for security reasons */ 612 /* mxcsr reserved bits must be masked to zero for security reasons */
616 tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; 613 tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
617 if (err || __copy_from_user(&env, buf, sizeof(env))) 614 if (err || __copy_from_user(&env, buf, sizeof(env)))
618 return 1; 615 return 1;
619 convert_to_fxsr(tsk, &env); 616 convert_to_fxsr(tsk, &env);
@@ -629,7 +626,7 @@ static int restore_i387_xsave(void __user *buf)
629 struct i387_fxsave_struct __user *fx = 626 struct i387_fxsave_struct __user *fx =
630 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0]; 627 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
631 struct xsave_hdr_struct *xsave_hdr = 628 struct xsave_hdr_struct *xsave_hdr =
632 &current->thread.xstate->xsave.xsave_hdr; 629 &current->thread.fpu.state->xsave.xsave_hdr;
633 u64 mask; 630 u64 mask;
634 int err; 631 int err;
635 632
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c
index 23c167925a5c..2dfd31597443 100644
--- a/arch/x86/kernel/i8253.c
+++ b/arch/x86/kernel/i8253.c
@@ -16,7 +16,7 @@
16#include <asm/hpet.h> 16#include <asm/hpet.h>
17#include <asm/smp.h> 17#include <asm/smp.h>
18 18
19DEFINE_SPINLOCK(i8253_lock); 19DEFINE_RAW_SPINLOCK(i8253_lock);
20EXPORT_SYMBOL(i8253_lock); 20EXPORT_SYMBOL(i8253_lock);
21 21
22/* 22/*
@@ -33,7 +33,7 @@ struct clock_event_device *global_clock_event;
33static void init_pit_timer(enum clock_event_mode mode, 33static void init_pit_timer(enum clock_event_mode mode,
34 struct clock_event_device *evt) 34 struct clock_event_device *evt)
35{ 35{
36 spin_lock(&i8253_lock); 36 raw_spin_lock(&i8253_lock);
37 37
38 switch (mode) { 38 switch (mode) {
39 case CLOCK_EVT_MODE_PERIODIC: 39 case CLOCK_EVT_MODE_PERIODIC:
@@ -62,7 +62,7 @@ static void init_pit_timer(enum clock_event_mode mode,
62 /* Nothing to do here */ 62 /* Nothing to do here */
63 break; 63 break;
64 } 64 }
65 spin_unlock(&i8253_lock); 65 raw_spin_unlock(&i8253_lock);
66} 66}
67 67
68/* 68/*
@@ -72,10 +72,10 @@ static void init_pit_timer(enum clock_event_mode mode,
72 */ 72 */
73static int pit_next_event(unsigned long delta, struct clock_event_device *evt) 73static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
74{ 74{
75 spin_lock(&i8253_lock); 75 raw_spin_lock(&i8253_lock);
76 outb_pit(delta & 0xff , PIT_CH0); /* LSB */ 76 outb_pit(delta & 0xff , PIT_CH0); /* LSB */
77 outb_pit(delta >> 8 , PIT_CH0); /* MSB */ 77 outb_pit(delta >> 8 , PIT_CH0); /* MSB */
78 spin_unlock(&i8253_lock); 78 raw_spin_unlock(&i8253_lock);
79 79
80 return 0; 80 return 0;
81} 81}
@@ -130,7 +130,7 @@ static cycle_t pit_read(struct clocksource *cs)
130 int count; 130 int count;
131 u32 jifs; 131 u32 jifs;
132 132
133 spin_lock_irqsave(&i8253_lock, flags); 133 raw_spin_lock_irqsave(&i8253_lock, flags);
134 /* 134 /*
135 * Although our caller may have the read side of xtime_lock, 135 * Although our caller may have the read side of xtime_lock,
136 * this is now a seqlock, and we are cheating in this routine 136 * this is now a seqlock, and we are cheating in this routine
@@ -176,7 +176,7 @@ static cycle_t pit_read(struct clocksource *cs)
176 old_count = count; 176 old_count = count;
177 old_jifs = jifs; 177 old_jifs = jifs;
178 178
179 spin_unlock_irqrestore(&i8253_lock, flags); 179 raw_spin_unlock_irqrestore(&i8253_lock, flags);
180 180
181 count = (LATCH - 1) - count; 181 count = (LATCH - 1) - count;
182 182
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 0ed2d300cd46..990ae7cfc578 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -60,7 +60,7 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id)
60 outb(0, 0xF0); 60 outb(0, 0xF0);
61 if (ignore_fpu_irq || !boot_cpu_data.hard_math) 61 if (ignore_fpu_irq || !boot_cpu_data.hard_math)
62 return IRQ_NONE; 62 return IRQ_NONE;
63 math_error((void __user *)get_irq_regs()->ip); 63 math_error(get_irq_regs(), 0, 16);
64 return IRQ_HANDLED; 64 return IRQ_HANDLED;
65} 65}
66 66
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 1658efdfb4e5..345a4b1fe144 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -422,14 +422,22 @@ static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
422 422
423static void __kprobes clear_btf(void) 423static void __kprobes clear_btf(void)
424{ 424{
425 if (test_thread_flag(TIF_DEBUGCTLMSR)) 425 if (test_thread_flag(TIF_BLOCKSTEP)) {
426 update_debugctlmsr(0); 426 unsigned long debugctl = get_debugctlmsr();
427
428 debugctl &= ~DEBUGCTLMSR_BTF;
429 update_debugctlmsr(debugctl);
430 }
427} 431}
428 432
429static void __kprobes restore_btf(void) 433static void __kprobes restore_btf(void)
430{ 434{
431 if (test_thread_flag(TIF_DEBUGCTLMSR)) 435 if (test_thread_flag(TIF_BLOCKSTEP)) {
432 update_debugctlmsr(current->thread.debugctlmsr); 436 unsigned long debugctl = get_debugctlmsr();
437
438 debugctl |= DEBUGCTLMSR_BTF;
439 update_debugctlmsr(debugctl);
440 }
433} 441}
434 442
435void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, 443void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index cceb5bc3c3c2..2cd8c544e41a 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -201,9 +201,9 @@ static int do_microcode_update(const void __user *buf, size_t size)
201 return error; 201 return error;
202} 202}
203 203
204static int microcode_open(struct inode *unused1, struct file *unused2) 204static int microcode_open(struct inode *inode, struct file *file)
205{ 205{
206 return capable(CAP_SYS_RAWIO) ? 0 : -EPERM; 206 return capable(CAP_SYS_RAWIO) ? nonseekable_open(inode, file) : -EPERM;
207} 207}
208 208
209static ssize_t microcode_write(struct file *file, const char __user *buf, 209static ssize_t microcode_write(struct file *file, const char __user *buf,
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 85a343e28937..356170262a93 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -343,10 +343,11 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
343 int (*get_ucode_data)(void *, const void *, size_t)) 343 int (*get_ucode_data)(void *, const void *, size_t))
344{ 344{
345 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 345 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
346 u8 *ucode_ptr = data, *new_mc = NULL, *mc; 346 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
347 int new_rev = uci->cpu_sig.rev; 347 int new_rev = uci->cpu_sig.rev;
348 unsigned int leftover = size; 348 unsigned int leftover = size;
349 enum ucode_state state = UCODE_OK; 349 enum ucode_state state = UCODE_OK;
350 unsigned int curr_mc_size = 0;
350 351
351 while (leftover) { 352 while (leftover) {
352 struct microcode_header_intel mc_header; 353 struct microcode_header_intel mc_header;
@@ -361,9 +362,15 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
361 break; 362 break;
362 } 363 }
363 364
364 mc = vmalloc(mc_size); 365 /* For performance reasons, reuse mc area when possible */
365 if (!mc) 366 if (!mc || mc_size > curr_mc_size) {
366 break; 367 if (mc)
368 vfree(mc);
369 mc = vmalloc(mc_size);
370 if (!mc)
371 break;
372 curr_mc_size = mc_size;
373 }
367 374
368 if (get_ucode_data(mc, ucode_ptr, mc_size) || 375 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
369 microcode_sanity_check(mc) < 0) { 376 microcode_sanity_check(mc) < 0) {
@@ -376,13 +383,16 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
376 vfree(new_mc); 383 vfree(new_mc);
377 new_rev = mc_header.rev; 384 new_rev = mc_header.rev;
378 new_mc = mc; 385 new_mc = mc;
379 } else 386 mc = NULL; /* trigger new vmalloc */
380 vfree(mc); 387 }
381 388
382 ucode_ptr += mc_size; 389 ucode_ptr += mc_size;
383 leftover -= mc_size; 390 leftover -= mc_size;
384 } 391 }
385 392
393 if (mc)
394 vfree(mc);
395
386 if (leftover) { 396 if (leftover) {
387 if (new_mc) 397 if (new_mc)
388 vfree(new_mc); 398 vfree(new_mc);
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index e81030f71a8f..5ae5d2426edf 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -115,21 +115,6 @@ static void __init MP_bus_info(struct mpc_bus *m)
115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); 115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
116} 116}
117 117
118static int bad_ioapic(unsigned long address)
119{
120 if (nr_ioapics >= MAX_IO_APICS) {
121 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
122 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
123 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
124 }
125 if (!address) {
126 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
127 " found in table, skipping!\n");
128 return 1;
129 }
130 return 0;
131}
132
133static void __init MP_ioapic_info(struct mpc_ioapic *m) 118static void __init MP_ioapic_info(struct mpc_ioapic *m)
134{ 119{
135 if (!(m->flags & MPC_APIC_USABLE)) 120 if (!(m->flags & MPC_APIC_USABLE))
@@ -138,15 +123,7 @@ static void __init MP_ioapic_info(struct mpc_ioapic *m)
138 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", 123 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
139 m->apicid, m->apicver, m->apicaddr); 124 m->apicid, m->apicver, m->apicaddr);
140 125
141 if (bad_ioapic(m->apicaddr)) 126 mp_register_ioapic(m->apicid, m->apicaddr, gsi_end + 1);
142 return;
143
144 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
145 mp_ioapics[nr_ioapics].apicid = m->apicid;
146 mp_ioapics[nr_ioapics].type = m->type;
147 mp_ioapics[nr_ioapics].apicver = m->apicver;
148 mp_ioapics[nr_ioapics].flags = m->flags;
149 nr_ioapics++;
150} 127}
151 128
152static void print_MP_intsrc_info(struct mpc_intsrc *m) 129static void print_MP_intsrc_info(struct mpc_intsrc *m)
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
index 0aad8670858e..e796448f0eb5 100644
--- a/arch/x86/kernel/mrst.c
+++ b/arch/x86/kernel/mrst.c
@@ -237,4 +237,9 @@ void __init x86_mrst_early_setup(void)
237 x86_init.pci.fixup_irqs = x86_init_noop; 237 x86_init.pci.fixup_irqs = x86_init_noop;
238 238
239 legacy_pic = &null_legacy_pic; 239 legacy_pic = &null_legacy_pic;
240
241 /* Avoid searching for BIOS MP tables */
242 x86_init.mpparse.find_smp_config = x86_init_noop;
243 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
244
240} 245}
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 28ad9f4d8b94..e7e35219b32f 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -20,7 +20,6 @@
20#include <asm/idle.h> 20#include <asm/idle.h>
21#include <asm/uaccess.h> 21#include <asm/uaccess.h>
22#include <asm/i387.h> 22#include <asm/i387.h>
23#include <asm/ds.h>
24#include <asm/debugreg.h> 23#include <asm/debugreg.h>
25 24
26unsigned long idle_halt; 25unsigned long idle_halt;
@@ -32,26 +31,22 @@ struct kmem_cache *task_xstate_cachep;
32 31
33int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 32int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
34{ 33{
34 int ret;
35
35 *dst = *src; 36 *dst = *src;
36 if (src->thread.xstate) { 37 if (fpu_allocated(&src->thread.fpu)) {
37 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep, 38 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
38 GFP_KERNEL); 39 ret = fpu_alloc(&dst->thread.fpu);
39 if (!dst->thread.xstate) 40 if (ret)
40 return -ENOMEM; 41 return ret;
41 WARN_ON((unsigned long)dst->thread.xstate & 15); 42 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
42 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
43 } 43 }
44 return 0; 44 return 0;
45} 45}
46 46
47void free_thread_xstate(struct task_struct *tsk) 47void free_thread_xstate(struct task_struct *tsk)
48{ 48{
49 if (tsk->thread.xstate) { 49 fpu_free(&tsk->thread.fpu);
50 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
51 tsk->thread.xstate = NULL;
52 }
53
54 WARN(tsk->thread.ds_ctx, "leaking DS context\n");
55} 50}
56 51
57void free_thread_info(struct thread_info *ti) 52void free_thread_info(struct thread_info *ti)
@@ -198,11 +193,16 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
198 prev = &prev_p->thread; 193 prev = &prev_p->thread;
199 next = &next_p->thread; 194 next = &next_p->thread;
200 195
201 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) || 196 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
202 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR)) 197 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
203 ds_switch_to(prev_p, next_p); 198 unsigned long debugctl = get_debugctlmsr();
204 else if (next->debugctlmsr != prev->debugctlmsr) 199
205 update_debugctlmsr(next->debugctlmsr); 200 debugctl &= ~DEBUGCTLMSR_BTF;
201 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
202 debugctl |= DEBUGCTLMSR_BTF;
203
204 update_debugctlmsr(debugctl);
205 }
206 206
207 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^ 207 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
208 test_tsk_thread_flag(next_p, TIF_NOTSC)) { 208 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
@@ -546,11 +546,13 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
546 * check OSVW bit for CPUs that are not affected 546 * check OSVW bit for CPUs that are not affected
547 * by erratum #400 547 * by erratum #400
548 */ 548 */
549 rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val); 549 if (cpu_has(c, X86_FEATURE_OSVW)) {
550 if (val >= 2) { 550 rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
551 rdmsrl(MSR_AMD64_OSVW_STATUS, val); 551 if (val >= 2) {
552 if (!(val & BIT(1))) 552 rdmsrl(MSR_AMD64_OSVW_STATUS, val);
553 goto no_c1e_idle; 553 if (!(val & BIT(1)))
554 goto no_c1e_idle;
555 }
554 } 556 }
555 return 1; 557 return 1;
556 } 558 }
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index f6c62667e30c..8d128783af47 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -55,7 +55,6 @@
55#include <asm/cpu.h> 55#include <asm/cpu.h>
56#include <asm/idle.h> 56#include <asm/idle.h>
57#include <asm/syscalls.h> 57#include <asm/syscalls.h>
58#include <asm/ds.h>
59#include <asm/debugreg.h> 58#include <asm/debugreg.h>
60 59
61asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 60asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
@@ -238,13 +237,6 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
238 kfree(p->thread.io_bitmap_ptr); 237 kfree(p->thread.io_bitmap_ptr);
239 p->thread.io_bitmap_max = 0; 238 p->thread.io_bitmap_max = 0;
240 } 239 }
241
242 clear_tsk_thread_flag(p, TIF_DS_AREA_MSR);
243 p->thread.ds_ctx = NULL;
244
245 clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
246 p->thread.debugctlmsr = 0;
247
248 return err; 240 return err;
249} 241}
250 242
@@ -317,7 +309,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
317 309
318 /* we're going to use this soon, after a few expensive things */ 310 /* we're going to use this soon, after a few expensive things */
319 if (preload_fpu) 311 if (preload_fpu)
320 prefetch(next->xstate); 312 prefetch(next->fpu.state);
321 313
322 /* 314 /*
323 * Reload esp0. 315 * Reload esp0.
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 17cb3295cbf7..3c2422a99f1f 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -49,7 +49,6 @@
49#include <asm/ia32.h> 49#include <asm/ia32.h>
50#include <asm/idle.h> 50#include <asm/idle.h>
51#include <asm/syscalls.h> 51#include <asm/syscalls.h>
52#include <asm/ds.h>
53#include <asm/debugreg.h> 52#include <asm/debugreg.h>
54 53
55asmlinkage extern void ret_from_fork(void); 54asmlinkage extern void ret_from_fork(void);
@@ -313,13 +312,6 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
313 if (err) 312 if (err)
314 goto out; 313 goto out;
315 } 314 }
316
317 clear_tsk_thread_flag(p, TIF_DS_AREA_MSR);
318 p->thread.ds_ctx = NULL;
319
320 clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
321 p->thread.debugctlmsr = 0;
322
323 err = 0; 315 err = 0;
324out: 316out:
325 if (err && p->thread.io_bitmap_ptr) { 317 if (err && p->thread.io_bitmap_ptr) {
@@ -396,7 +388,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
396 388
397 /* we're going to use this soon, after a few expensive things */ 389 /* we're going to use this soon, after a few expensive things */
398 if (preload_fpu) 390 if (preload_fpu)
399 prefetch(next->xstate); 391 prefetch(next->fpu.state);
400 392
401 /* 393 /*
402 * Reload esp0, LDT and the page table pointer: 394 * Reload esp0, LDT and the page table pointer:
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 2e9b55027b7e..70c4872cd8aa 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -2,9 +2,6 @@
2/* 2/*
3 * Pentium III FXSR, SSE support 3 * Pentium III FXSR, SSE support
4 * Gareth Hughes <gareth@valinux.com>, May 2000 4 * Gareth Hughes <gareth@valinux.com>, May 2000
5 *
6 * BTS tracing
7 * Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
8 */ 5 */
9 6
10#include <linux/kernel.h> 7#include <linux/kernel.h>
@@ -22,7 +19,6 @@
22#include <linux/audit.h> 19#include <linux/audit.h>
23#include <linux/seccomp.h> 20#include <linux/seccomp.h>
24#include <linux/signal.h> 21#include <linux/signal.h>
25#include <linux/workqueue.h>
26#include <linux/perf_event.h> 22#include <linux/perf_event.h>
27#include <linux/hw_breakpoint.h> 23#include <linux/hw_breakpoint.h>
28 24
@@ -36,7 +32,6 @@
36#include <asm/desc.h> 32#include <asm/desc.h>
37#include <asm/prctl.h> 33#include <asm/prctl.h>
38#include <asm/proto.h> 34#include <asm/proto.h>
39#include <asm/ds.h>
40#include <asm/hw_breakpoint.h> 35#include <asm/hw_breakpoint.h>
41 36
42#include "tls.h" 37#include "tls.h"
@@ -693,7 +688,7 @@ static int ptrace_set_breakpoint_addr(struct task_struct *tsk, int nr,
693 struct perf_event_attr attr; 688 struct perf_event_attr attr;
694 689
695 if (!t->ptrace_bps[nr]) { 690 if (!t->ptrace_bps[nr]) {
696 hw_breakpoint_init(&attr); 691 ptrace_breakpoint_init(&attr);
697 /* 692 /*
698 * Put stub len and type to register (reserve) an inactive but 693 * Put stub len and type to register (reserve) an inactive but
699 * correct bp 694 * correct bp
@@ -789,342 +784,6 @@ static int ioperm_get(struct task_struct *target,
789 0, IO_BITMAP_BYTES); 784 0, IO_BITMAP_BYTES);
790} 785}
791 786
792#ifdef CONFIG_X86_PTRACE_BTS
793/*
794 * A branch trace store context.
795 *
796 * Contexts may only be installed by ptrace_bts_config() and only for
797 * ptraced tasks.
798 *
799 * Contexts are destroyed when the tracee is detached from the tracer.
800 * The actual destruction work requires interrupts enabled, so the
801 * work is deferred and will be scheduled during __ptrace_unlink().
802 *
803 * Contexts hold an additional task_struct reference on the traced
804 * task, as well as a reference on the tracer's mm.
805 *
806 * Ptrace already holds a task_struct for the duration of ptrace operations,
807 * but since destruction is deferred, it may be executed after both
808 * tracer and tracee exited.
809 */
810struct bts_context {
811 /* The branch trace handle. */
812 struct bts_tracer *tracer;
813
814 /* The buffer used to store the branch trace and its size. */
815 void *buffer;
816 unsigned int size;
817
818 /* The mm that paid for the above buffer. */
819 struct mm_struct *mm;
820
821 /* The task this context belongs to. */
822 struct task_struct *task;
823
824 /* The signal to send on a bts buffer overflow. */
825 unsigned int bts_ovfl_signal;
826
827 /* The work struct to destroy a context. */
828 struct work_struct work;
829};
830
831static int alloc_bts_buffer(struct bts_context *context, unsigned int size)
832{
833 void *buffer = NULL;
834 int err = -ENOMEM;
835
836 err = account_locked_memory(current->mm, current->signal->rlim, size);
837 if (err < 0)
838 return err;
839
840 buffer = kzalloc(size, GFP_KERNEL);
841 if (!buffer)
842 goto out_refund;
843
844 context->buffer = buffer;
845 context->size = size;
846 context->mm = get_task_mm(current);
847
848 return 0;
849
850 out_refund:
851 refund_locked_memory(current->mm, size);
852 return err;
853}
854
855static inline void free_bts_buffer(struct bts_context *context)
856{
857 if (!context->buffer)
858 return;
859
860 kfree(context->buffer);
861 context->buffer = NULL;
862
863 refund_locked_memory(context->mm, context->size);
864 context->size = 0;
865
866 mmput(context->mm);
867 context->mm = NULL;
868}
869
870static void free_bts_context_work(struct work_struct *w)
871{
872 struct bts_context *context;
873
874 context = container_of(w, struct bts_context, work);
875
876 ds_release_bts(context->tracer);
877 put_task_struct(context->task);
878 free_bts_buffer(context);
879 kfree(context);
880}
881
882static inline void free_bts_context(struct bts_context *context)
883{
884 INIT_WORK(&context->work, free_bts_context_work);
885 schedule_work(&context->work);
886}
887
888static inline struct bts_context *alloc_bts_context(struct task_struct *task)
889{
890 struct bts_context *context = kzalloc(sizeof(*context), GFP_KERNEL);
891 if (context) {
892 context->task = task;
893 task->bts = context;
894
895 get_task_struct(task);
896 }
897
898 return context;
899}
900
901static int ptrace_bts_read_record(struct task_struct *child, size_t index,
902 struct bts_struct __user *out)
903{
904 struct bts_context *context;
905 const struct bts_trace *trace;
906 struct bts_struct bts;
907 const unsigned char *at;
908 int error;
909
910 context = child->bts;
911 if (!context)
912 return -ESRCH;
913
914 trace = ds_read_bts(context->tracer);
915 if (!trace)
916 return -ESRCH;
917
918 at = trace->ds.top - ((index + 1) * trace->ds.size);
919 if ((void *)at < trace->ds.begin)
920 at += (trace->ds.n * trace->ds.size);
921
922 if (!trace->read)
923 return -EOPNOTSUPP;
924
925 error = trace->read(context->tracer, at, &bts);
926 if (error < 0)
927 return error;
928
929 if (copy_to_user(out, &bts, sizeof(bts)))
930 return -EFAULT;
931
932 return sizeof(bts);
933}
934
935static int ptrace_bts_drain(struct task_struct *child,
936 long size,
937 struct bts_struct __user *out)
938{
939 struct bts_context *context;
940 const struct bts_trace *trace;
941 const unsigned char *at;
942 int error, drained = 0;
943
944 context = child->bts;
945 if (!context)
946 return -ESRCH;
947
948 trace = ds_read_bts(context->tracer);
949 if (!trace)
950 return -ESRCH;
951
952 if (!trace->read)
953 return -EOPNOTSUPP;
954
955 if (size < (trace->ds.top - trace->ds.begin))
956 return -EIO;
957
958 for (at = trace->ds.begin; (void *)at < trace->ds.top;
959 out++, drained++, at += trace->ds.size) {
960 struct bts_struct bts;
961
962 error = trace->read(context->tracer, at, &bts);
963 if (error < 0)
964 return error;
965
966 if (copy_to_user(out, &bts, sizeof(bts)))
967 return -EFAULT;
968 }
969
970 memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
971
972 error = ds_reset_bts(context->tracer);
973 if (error < 0)
974 return error;
975
976 return drained;
977}
978
979static int ptrace_bts_config(struct task_struct *child,
980 long cfg_size,
981 const struct ptrace_bts_config __user *ucfg)
982{
983 struct bts_context *context;
984 struct ptrace_bts_config cfg;
985 unsigned int flags = 0;
986
987 if (cfg_size < sizeof(cfg))
988 return -EIO;
989
990 if (copy_from_user(&cfg, ucfg, sizeof(cfg)))
991 return -EFAULT;
992
993 context = child->bts;
994 if (!context)
995 context = alloc_bts_context(child);
996 if (!context)
997 return -ENOMEM;
998
999 if (cfg.flags & PTRACE_BTS_O_SIGNAL) {
1000 if (!cfg.signal)
1001 return -EINVAL;
1002
1003 return -EOPNOTSUPP;
1004 context->bts_ovfl_signal = cfg.signal;
1005 }
1006
1007 ds_release_bts(context->tracer);
1008 context->tracer = NULL;
1009
1010 if ((cfg.flags & PTRACE_BTS_O_ALLOC) && (cfg.size != context->size)) {
1011 int err;
1012
1013 free_bts_buffer(context);
1014 if (!cfg.size)
1015 return 0;
1016
1017 err = alloc_bts_buffer(context, cfg.size);
1018 if (err < 0)
1019 return err;
1020 }
1021
1022 if (cfg.flags & PTRACE_BTS_O_TRACE)
1023 flags |= BTS_USER;
1024
1025 if (cfg.flags & PTRACE_BTS_O_SCHED)
1026 flags |= BTS_TIMESTAMPS;
1027
1028 context->tracer =
1029 ds_request_bts_task(child, context->buffer, context->size,
1030 NULL, (size_t)-1, flags);
1031 if (unlikely(IS_ERR(context->tracer))) {
1032 int error = PTR_ERR(context->tracer);
1033
1034 free_bts_buffer(context);
1035 context->tracer = NULL;
1036 return error;
1037 }
1038
1039 return sizeof(cfg);
1040}
1041
1042static int ptrace_bts_status(struct task_struct *child,
1043 long cfg_size,
1044 struct ptrace_bts_config __user *ucfg)
1045{
1046 struct bts_context *context;
1047 const struct bts_trace *trace;
1048 struct ptrace_bts_config cfg;
1049
1050 context = child->bts;
1051 if (!context)
1052 return -ESRCH;
1053
1054 if (cfg_size < sizeof(cfg))
1055 return -EIO;
1056
1057 trace = ds_read_bts(context->tracer);
1058 if (!trace)
1059 return -ESRCH;
1060
1061 memset(&cfg, 0, sizeof(cfg));
1062 cfg.size = trace->ds.end - trace->ds.begin;
1063 cfg.signal = context->bts_ovfl_signal;
1064 cfg.bts_size = sizeof(struct bts_struct);
1065
1066 if (cfg.signal)
1067 cfg.flags |= PTRACE_BTS_O_SIGNAL;
1068
1069 if (trace->ds.flags & BTS_USER)
1070 cfg.flags |= PTRACE_BTS_O_TRACE;
1071
1072 if (trace->ds.flags & BTS_TIMESTAMPS)
1073 cfg.flags |= PTRACE_BTS_O_SCHED;
1074
1075 if (copy_to_user(ucfg, &cfg, sizeof(cfg)))
1076 return -EFAULT;
1077
1078 return sizeof(cfg);
1079}
1080
1081static int ptrace_bts_clear(struct task_struct *child)
1082{
1083 struct bts_context *context;
1084 const struct bts_trace *trace;
1085
1086 context = child->bts;
1087 if (!context)
1088 return -ESRCH;
1089
1090 trace = ds_read_bts(context->tracer);
1091 if (!trace)
1092 return -ESRCH;
1093
1094 memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
1095
1096 return ds_reset_bts(context->tracer);
1097}
1098
1099static int ptrace_bts_size(struct task_struct *child)
1100{
1101 struct bts_context *context;
1102 const struct bts_trace *trace;
1103
1104 context = child->bts;
1105 if (!context)
1106 return -ESRCH;
1107
1108 trace = ds_read_bts(context->tracer);
1109 if (!trace)
1110 return -ESRCH;
1111
1112 return (trace->ds.top - trace->ds.begin) / trace->ds.size;
1113}
1114
1115/*
1116 * Called from __ptrace_unlink() after the child has been moved back
1117 * to its original parent.
1118 */
1119void ptrace_bts_untrace(struct task_struct *child)
1120{
1121 if (unlikely(child->bts)) {
1122 free_bts_context(child->bts);
1123 child->bts = NULL;
1124 }
1125}
1126#endif /* CONFIG_X86_PTRACE_BTS */
1127
1128/* 787/*
1129 * Called by kernel/ptrace.c when detaching.. 788 * Called by kernel/ptrace.c when detaching..
1130 * 789 *
@@ -1252,39 +911,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1252 break; 911 break;
1253#endif 912#endif
1254 913
1255 /*
1256 * These bits need more cooking - not enabled yet:
1257 */
1258#ifdef CONFIG_X86_PTRACE_BTS
1259 case PTRACE_BTS_CONFIG:
1260 ret = ptrace_bts_config
1261 (child, data, (struct ptrace_bts_config __user *)addr);
1262 break;
1263
1264 case PTRACE_BTS_STATUS:
1265 ret = ptrace_bts_status
1266 (child, data, (struct ptrace_bts_config __user *)addr);
1267 break;
1268
1269 case PTRACE_BTS_SIZE:
1270 ret = ptrace_bts_size(child);
1271 break;
1272
1273 case PTRACE_BTS_GET:
1274 ret = ptrace_bts_read_record
1275 (child, data, (struct bts_struct __user *) addr);
1276 break;
1277
1278 case PTRACE_BTS_CLEAR:
1279 ret = ptrace_bts_clear(child);
1280 break;
1281
1282 case PTRACE_BTS_DRAIN:
1283 ret = ptrace_bts_drain
1284 (child, data, (struct bts_struct __user *) addr);
1285 break;
1286#endif /* CONFIG_X86_PTRACE_BTS */
1287
1288 default: 914 default:
1289 ret = ptrace_request(child, request, addr, data); 915 ret = ptrace_request(child, request, addr, data);
1290 break; 916 break;
@@ -1544,14 +1170,6 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1544 1170
1545 case PTRACE_GET_THREAD_AREA: 1171 case PTRACE_GET_THREAD_AREA:
1546 case PTRACE_SET_THREAD_AREA: 1172 case PTRACE_SET_THREAD_AREA:
1547#ifdef CONFIG_X86_PTRACE_BTS
1548 case PTRACE_BTS_CONFIG:
1549 case PTRACE_BTS_STATUS:
1550 case PTRACE_BTS_SIZE:
1551 case PTRACE_BTS_GET:
1552 case PTRACE_BTS_CLEAR:
1553 case PTRACE_BTS_DRAIN:
1554#endif /* CONFIG_X86_PTRACE_BTS */
1555 return arch_ptrace(child, request, addr, data); 1173 return arch_ptrace(child, request, addr, data);
1556 1174
1557 default: 1175 default:
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 12e9feaa2f7a..e72d3fc6547d 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -495,10 +495,18 @@ void force_hpet_resume(void)
495/* 495/*
496 * HPET MSI on some boards (ATI SB700/SB800) has side effect on 496 * HPET MSI on some boards (ATI SB700/SB800) has side effect on
497 * floppy DMA. Disable HPET MSI on such platforms. 497 * floppy DMA. Disable HPET MSI on such platforms.
498 * See erratum #27 (Misinterpreted MSI Requests May Result in
499 * Corrupted LPC DMA Data) in AMD Publication #46837,
500 * "SB700 Family Product Errata", Rev. 1.0, March 2010.
501 *
502 * Also force the read back of the CMP register in hpet_next_event()
503 * to work around the problem that the CMP register write seems to be
504 * delayed. See hpet_next_event() for details.
498 */ 505 */
499static void force_disable_hpet_msi(struct pci_dev *unused) 506static void force_disable_hpet_msi(struct pci_dev *unused)
500{ 507{
501 hpet_msi_disable = 1; 508 hpet_msi_disable = 1;
509 hpet_readback_cmp = 1;
502} 510}
503 511
504DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, 512DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
diff --git a/arch/x86/kernel/sfi.c b/arch/x86/kernel/sfi.c
index 34e099382651..7ded57896c0a 100644
--- a/arch/x86/kernel/sfi.c
+++ b/arch/x86/kernel/sfi.c
@@ -81,7 +81,6 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table)
81#endif /* CONFIG_X86_LOCAL_APIC */ 81#endif /* CONFIG_X86_LOCAL_APIC */
82 82
83#ifdef CONFIG_X86_IO_APIC 83#ifdef CONFIG_X86_IO_APIC
84static u32 gsi_base;
85 84
86static int __init sfi_parse_ioapic(struct sfi_table_header *table) 85static int __init sfi_parse_ioapic(struct sfi_table_header *table)
87{ 86{
@@ -94,8 +93,7 @@ static int __init sfi_parse_ioapic(struct sfi_table_header *table)
94 pentry = (struct sfi_apic_table_entry *)sb->pentry; 93 pentry = (struct sfi_apic_table_entry *)sb->pentry;
95 94
96 for (i = 0; i < num; i++) { 95 for (i = 0; i < num; i++) {
97 mp_register_ioapic(i, pentry->phys_addr, gsi_base); 96 mp_register_ioapic(i, pentry->phys_addr, gsi_end + 1);
98 gsi_base += io_apic_get_redir_entries(i);
99 pentry++; 97 pentry++;
100 } 98 }
101 99
diff --git a/arch/x86/kernel/step.c b/arch/x86/kernel/step.c
index 3149032ff107..58de45ee08b6 100644
--- a/arch/x86/kernel/step.c
+++ b/arch/x86/kernel/step.c
@@ -158,22 +158,6 @@ static int enable_single_step(struct task_struct *child)
158} 158}
159 159
160/* 160/*
161 * Install this value in MSR_IA32_DEBUGCTLMSR whenever child is running.
162 */
163static void write_debugctlmsr(struct task_struct *child, unsigned long val)
164{
165 if (child->thread.debugctlmsr == val)
166 return;
167
168 child->thread.debugctlmsr = val;
169
170 if (child != current)
171 return;
172
173 update_debugctlmsr(val);
174}
175
176/*
177 * Enable single or block step. 161 * Enable single or block step.
178 */ 162 */
179static void enable_step(struct task_struct *child, bool block) 163static void enable_step(struct task_struct *child, bool block)
@@ -186,15 +170,17 @@ static void enable_step(struct task_struct *child, bool block)
186 * that uses user-mode single stepping itself. 170 * that uses user-mode single stepping itself.
187 */ 171 */
188 if (enable_single_step(child) && block) { 172 if (enable_single_step(child) && block) {
189 set_tsk_thread_flag(child, TIF_DEBUGCTLMSR); 173 unsigned long debugctl = get_debugctlmsr();
190 write_debugctlmsr(child, 174
191 child->thread.debugctlmsr | DEBUGCTLMSR_BTF); 175 debugctl |= DEBUGCTLMSR_BTF;
192 } else { 176 update_debugctlmsr(debugctl);
193 write_debugctlmsr(child, 177 set_tsk_thread_flag(child, TIF_BLOCKSTEP);
194 child->thread.debugctlmsr & ~DEBUGCTLMSR_BTF); 178 } else if (test_tsk_thread_flag(child, TIF_BLOCKSTEP)) {
195 179 unsigned long debugctl = get_debugctlmsr();
196 if (!child->thread.debugctlmsr) 180
197 clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR); 181 debugctl &= ~DEBUGCTLMSR_BTF;
182 update_debugctlmsr(debugctl);
183 clear_tsk_thread_flag(child, TIF_BLOCKSTEP);
198 } 184 }
199} 185}
200 186
@@ -213,11 +199,13 @@ void user_disable_single_step(struct task_struct *child)
213 /* 199 /*
214 * Make sure block stepping (BTF) is disabled. 200 * Make sure block stepping (BTF) is disabled.
215 */ 201 */
216 write_debugctlmsr(child, 202 if (test_tsk_thread_flag(child, TIF_BLOCKSTEP)) {
217 child->thread.debugctlmsr & ~DEBUGCTLMSR_BTF); 203 unsigned long debugctl = get_debugctlmsr();
218 204
219 if (!child->thread.debugctlmsr) 205 debugctl &= ~DEBUGCTLMSR_BTF;
220 clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR); 206 update_debugctlmsr(debugctl);
207 clear_tsk_thread_flag(child, TIF_BLOCKSTEP);
208 }
221 209
222 /* Always clear TIF_SINGLESTEP... */ 210 /* Always clear TIF_SINGLESTEP... */
223 clear_tsk_thread_flag(child, TIF_SINGLESTEP); 211 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c
index 86c9f91b48ae..cc2c60474fd0 100644
--- a/arch/x86/kernel/tboot.c
+++ b/arch/x86/kernel/tboot.c
@@ -175,6 +175,9 @@ static void add_mac_region(phys_addr_t start, unsigned long size)
175 struct tboot_mac_region *mr; 175 struct tboot_mac_region *mr;
176 phys_addr_t end = start + size; 176 phys_addr_t end = start + size;
177 177
178 if (tboot->num_mac_regions >= MAX_TB_MAC_REGIONS)
179 panic("tboot: Too many MAC regions\n");
180
178 if (start && size) { 181 if (start && size) {
179 mr = &tboot->mac_regions[tboot->num_mac_regions++]; 182 mr = &tboot->mac_regions[tboot->num_mac_regions++];
180 mr->start = round_down(start, PAGE_SIZE); 183 mr->start = round_down(start, PAGE_SIZE);
@@ -184,18 +187,17 @@ static void add_mac_region(phys_addr_t start, unsigned long size)
184 187
185static int tboot_setup_sleep(void) 188static int tboot_setup_sleep(void)
186{ 189{
190 int i;
191
187 tboot->num_mac_regions = 0; 192 tboot->num_mac_regions = 0;
188 193
189 /* S3 resume code */ 194 for (i = 0; i < e820.nr_map; i++) {
190 add_mac_region(acpi_wakeup_address, WAKEUP_SIZE); 195 if ((e820.map[i].type != E820_RAM)
196 && (e820.map[i].type != E820_RESERVED_KERN))
197 continue;
191 198
192#ifdef CONFIG_X86_TRAMPOLINE 199 add_mac_region(e820.map[i].addr, e820.map[i].size);
193 /* AP trampoline code */ 200 }
194 add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
195#endif
196
197 /* kernel code + data + bss */
198 add_mac_region(virt_to_phys(_text), _end - _text);
199 201
200 tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address; 202 tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;
201 203
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 17b03dd3a6b5..7fea555929e2 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SGI UltraViolet TLB flush routines. 2 * SGI UltraViolet TLB flush routines.
3 * 3 *
4 * (c) 2008 Cliff Wickman <cpw@sgi.com>, SGI. 4 * (c) 2008-2010 Cliff Wickman <cpw@sgi.com>, SGI.
5 * 5 *
6 * This code is released under the GNU General Public License version 2 or 6 * This code is released under the GNU General Public License version 2 or
7 * later. 7 * later.
@@ -20,42 +20,67 @@
20#include <asm/idle.h> 20#include <asm/idle.h>
21#include <asm/tsc.h> 21#include <asm/tsc.h>
22#include <asm/irq_vectors.h> 22#include <asm/irq_vectors.h>
23#include <asm/timer.h>
23 24
24static struct bau_control **uv_bau_table_bases __read_mostly; 25struct msg_desc {
25static int uv_bau_retry_limit __read_mostly; 26 struct bau_payload_queue_entry *msg;
27 int msg_slot;
28 int sw_ack_slot;
29 struct bau_payload_queue_entry *va_queue_first;
30 struct bau_payload_queue_entry *va_queue_last;
31};
26 32
27/* base pnode in this partition */ 33#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
28static int uv_partition_base_pnode __read_mostly; 34
35static int uv_bau_max_concurrent __read_mostly;
36
37static int nobau;
38static int __init setup_nobau(char *arg)
39{
40 nobau = 1;
41 return 0;
42}
43early_param("nobau", setup_nobau);
29 44
30static unsigned long uv_mmask __read_mostly; 45/* base pnode in this partition */
46static int uv_partition_base_pnode __read_mostly;
47/* position of pnode (which is nasid>>1): */
48static int uv_nshift __read_mostly;
49static unsigned long uv_mmask __read_mostly;
31 50
32static DEFINE_PER_CPU(struct ptc_stats, ptcstats); 51static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
33static DEFINE_PER_CPU(struct bau_control, bau_control); 52static DEFINE_PER_CPU(struct bau_control, bau_control);
53static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
54
55struct reset_args {
56 int sender;
57};
34 58
35/* 59/*
36 * Determine the first node on a blade. 60 * Determine the first node on a uvhub. 'Nodes' are used for kernel
61 * memory allocation.
37 */ 62 */
38static int __init blade_to_first_node(int blade) 63static int __init uvhub_to_first_node(int uvhub)
39{ 64{
40 int node, b; 65 int node, b;
41 66
42 for_each_online_node(node) { 67 for_each_online_node(node) {
43 b = uv_node_to_blade_id(node); 68 b = uv_node_to_blade_id(node);
44 if (blade == b) 69 if (uvhub == b)
45 return node; 70 return node;
46 } 71 }
47 return -1; /* shouldn't happen */ 72 return -1;
48} 73}
49 74
50/* 75/*
51 * Determine the apicid of the first cpu on a blade. 76 * Determine the apicid of the first cpu on a uvhub.
52 */ 77 */
53static int __init blade_to_first_apicid(int blade) 78static int __init uvhub_to_first_apicid(int uvhub)
54{ 79{
55 int cpu; 80 int cpu;
56 81
57 for_each_present_cpu(cpu) 82 for_each_present_cpu(cpu)
58 if (blade == uv_cpu_to_blade_id(cpu)) 83 if (uvhub == uv_cpu_to_blade_id(cpu))
59 return per_cpu(x86_cpu_to_apicid, cpu); 84 return per_cpu(x86_cpu_to_apicid, cpu);
60 return -1; 85 return -1;
61} 86}
@@ -68,195 +93,459 @@ static int __init blade_to_first_apicid(int blade)
68 * clear of the Timeout bit (as well) will free the resource. No reply will 93 * clear of the Timeout bit (as well) will free the resource. No reply will
69 * be sent (the hardware will only do one reply per message). 94 * be sent (the hardware will only do one reply per message).
70 */ 95 */
71static void uv_reply_to_message(int resource, 96static inline void uv_reply_to_message(struct msg_desc *mdp,
72 struct bau_payload_queue_entry *msg, 97 struct bau_control *bcp)
73 struct bau_msg_status *msp)
74{ 98{
75 unsigned long dw; 99 unsigned long dw;
100 struct bau_payload_queue_entry *msg;
76 101
77 dw = (1 << (resource + UV_SW_ACK_NPENDING)) | (1 << resource); 102 msg = mdp->msg;
103 if (!msg->canceled) {
104 dw = (msg->sw_ack_vector << UV_SW_ACK_NPENDING) |
105 msg->sw_ack_vector;
106 uv_write_local_mmr(
107 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
108 }
78 msg->replied_to = 1; 109 msg->replied_to = 1;
79 msg->sw_ack_vector = 0; 110 msg->sw_ack_vector = 0;
80 if (msp)
81 msp->seen_by.bits = 0;
82 uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
83} 111}
84 112
85/* 113/*
86 * Do all the things a cpu should do for a TLB shootdown message. 114 * Process the receipt of a RETRY message
87 * Other cpu's may come here at the same time for this message.
88 */ 115 */
89static void uv_bau_process_message(struct bau_payload_queue_entry *msg, 116static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
90 int msg_slot, int sw_ack_slot) 117 struct bau_control *bcp)
91{ 118{
92 unsigned long this_cpu_mask; 119 int i;
93 struct bau_msg_status *msp; 120 int cancel_count = 0;
94 int cpu; 121 int slot2;
122 unsigned long msg_res;
123 unsigned long mmr = 0;
124 struct bau_payload_queue_entry *msg;
125 struct bau_payload_queue_entry *msg2;
126 struct ptc_stats *stat;
95 127
96 msp = __get_cpu_var(bau_control).msg_statuses + msg_slot; 128 msg = mdp->msg;
97 cpu = uv_blade_processor_id(); 129 stat = &per_cpu(ptcstats, bcp->cpu);
98 msg->number_of_cpus = 130 stat->d_retries++;
99 uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id())); 131 /*
100 this_cpu_mask = 1UL << cpu; 132 * cancel any message from msg+1 to the retry itself
101 if (msp->seen_by.bits & this_cpu_mask) 133 */
102 return; 134 for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
103 atomic_or_long(&msp->seen_by.bits, this_cpu_mask); 135 if (msg2 > mdp->va_queue_last)
136 msg2 = mdp->va_queue_first;
137 if (msg2 == msg)
138 break;
139
140 /* same conditions for cancellation as uv_do_reset */
141 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
142 (msg2->sw_ack_vector) && ((msg2->sw_ack_vector &
143 msg->sw_ack_vector) == 0) &&
144 (msg2->sending_cpu == msg->sending_cpu) &&
145 (msg2->msg_type != MSG_NOOP)) {
146 slot2 = msg2 - mdp->va_queue_first;
147 mmr = uv_read_local_mmr
148 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
149 msg_res = ((msg2->sw_ack_vector << 8) |
150 msg2->sw_ack_vector);
151 /*
152 * This is a message retry; clear the resources held
153 * by the previous message only if they timed out.
154 * If it has not timed out we have an unexpected
155 * situation to report.
156 */
157 if (mmr & (msg_res << 8)) {
158 /*
159 * is the resource timed out?
160 * make everyone ignore the cancelled message.
161 */
162 msg2->canceled = 1;
163 stat->d_canceled++;
164 cancel_count++;
165 uv_write_local_mmr(
166 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
167 (msg_res << 8) | msg_res);
168 } else
169 printk(KERN_INFO "note bau retry: no effect\n");
170 }
171 }
172 if (!cancel_count)
173 stat->d_nocanceled++;
174}
104 175
105 if (msg->replied_to == 1) 176/*
106 return; 177 * Do all the things a cpu should do for a TLB shootdown message.
178 * Other cpu's may come here at the same time for this message.
179 */
180static void uv_bau_process_message(struct msg_desc *mdp,
181 struct bau_control *bcp)
182{
183 int msg_ack_count;
184 short socket_ack_count = 0;
185 struct ptc_stats *stat;
186 struct bau_payload_queue_entry *msg;
187 struct bau_control *smaster = bcp->socket_master;
107 188
189 /*
190 * This must be a normal message, or retry of a normal message
191 */
192 msg = mdp->msg;
193 stat = &per_cpu(ptcstats, bcp->cpu);
108 if (msg->address == TLB_FLUSH_ALL) { 194 if (msg->address == TLB_FLUSH_ALL) {
109 local_flush_tlb(); 195 local_flush_tlb();
110 __get_cpu_var(ptcstats).alltlb++; 196 stat->d_alltlb++;
111 } else { 197 } else {
112 __flush_tlb_one(msg->address); 198 __flush_tlb_one(msg->address);
113 __get_cpu_var(ptcstats).onetlb++; 199 stat->d_onetlb++;
114 } 200 }
201 stat->d_requestee++;
202
203 /*
204 * One cpu on each uvhub has the additional job on a RETRY
205 * of releasing the resource held by the message that is
206 * being retried. That message is identified by sending
207 * cpu number.
208 */
209 if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
210 uv_bau_process_retry_msg(mdp, bcp);
115 211
116 __get_cpu_var(ptcstats).requestee++; 212 /*
213 * This is a sw_ack message, so we have to reply to it.
214 * Count each responding cpu on the socket. This avoids
215 * pinging the count's cache line back and forth between
216 * the sockets.
217 */
218 socket_ack_count = atomic_add_short_return(1, (struct atomic_short *)
219 &smaster->socket_acknowledge_count[mdp->msg_slot]);
220 if (socket_ack_count == bcp->cpus_in_socket) {
221 /*
222 * Both sockets dump their completed count total into
223 * the message's count.
224 */
225 smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
226 msg_ack_count = atomic_add_short_return(socket_ack_count,
227 (struct atomic_short *)&msg->acknowledge_count);
228
229 if (msg_ack_count == bcp->cpus_in_uvhub) {
230 /*
231 * All cpus in uvhub saw it; reply
232 */
233 uv_reply_to_message(mdp, bcp);
234 }
235 }
117 236
118 atomic_inc_short(&msg->acknowledge_count); 237 return;
119 if (msg->number_of_cpus == msg->acknowledge_count)
120 uv_reply_to_message(sw_ack_slot, msg, msp);
121} 238}
122 239
123/* 240/*
124 * Examine the payload queue on one distribution node to see 241 * Determine the first cpu on a uvhub.
125 * which messages have not been seen, and which cpu(s) have not seen them. 242 */
243static int uvhub_to_first_cpu(int uvhub)
244{
245 int cpu;
246 for_each_present_cpu(cpu)
247 if (uvhub == uv_cpu_to_blade_id(cpu))
248 return cpu;
249 return -1;
250}
251
252/*
253 * Last resort when we get a large number of destination timeouts is
254 * to clear resources held by a given cpu.
255 * Do this with IPI so that all messages in the BAU message queue
256 * can be identified by their nonzero sw_ack_vector field.
126 * 257 *
127 * Returns the number of cpu's that have not responded. 258 * This is entered for a single cpu on the uvhub.
259 * The sender want's this uvhub to free a specific message's
260 * sw_ack resources.
128 */ 261 */
129static int uv_examine_destination(struct bau_control *bau_tablesp, int sender) 262static void
263uv_do_reset(void *ptr)
130{ 264{
131 struct bau_payload_queue_entry *msg;
132 struct bau_msg_status *msp;
133 int count = 0;
134 int i; 265 int i;
135 int j; 266 int slot;
267 int count = 0;
268 unsigned long mmr;
269 unsigned long msg_res;
270 struct bau_control *bcp;
271 struct reset_args *rap;
272 struct bau_payload_queue_entry *msg;
273 struct ptc_stats *stat;
136 274
137 for (msg = bau_tablesp->va_queue_first, i = 0; i < DEST_Q_SIZE; 275 bcp = &per_cpu(bau_control, smp_processor_id());
138 msg++, i++) { 276 rap = (struct reset_args *)ptr;
139 if ((msg->sending_cpu == sender) && (!msg->replied_to)) { 277 stat = &per_cpu(ptcstats, bcp->cpu);
140 msp = bau_tablesp->msg_statuses + i; 278 stat->d_resets++;
141 printk(KERN_DEBUG 279
142 "blade %d: address:%#lx %d of %d, not cpu(s): ", 280 /*
143 i, msg->address, msg->acknowledge_count, 281 * We're looking for the given sender, and
144 msg->number_of_cpus); 282 * will free its sw_ack resource.
145 for (j = 0; j < msg->number_of_cpus; j++) { 283 * If all cpu's finally responded after the timeout, its
146 if (!((1L << j) & msp->seen_by.bits)) { 284 * message 'replied_to' was set.
147 count++; 285 */
148 printk("%d ", j); 286 for (msg = bcp->va_queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
149 } 287 /* uv_do_reset: same conditions for cancellation as
288 uv_bau_process_retry_msg() */
289 if ((msg->replied_to == 0) &&
290 (msg->canceled == 0) &&
291 (msg->sending_cpu == rap->sender) &&
292 (msg->sw_ack_vector) &&
293 (msg->msg_type != MSG_NOOP)) {
294 /*
295 * make everyone else ignore this message
296 */
297 msg->canceled = 1;
298 slot = msg - bcp->va_queue_first;
299 count++;
300 /*
301 * only reset the resource if it is still pending
302 */
303 mmr = uv_read_local_mmr
304 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
305 msg_res = ((msg->sw_ack_vector << 8) |
306 msg->sw_ack_vector);
307 if (mmr & msg_res) {
308 stat->d_rcanceled++;
309 uv_write_local_mmr(
310 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
311 msg_res);
150 } 312 }
151 printk("\n");
152 } 313 }
153 } 314 }
154 return count; 315 return;
155} 316}
156 317
157/* 318/*
158 * Examine the payload queue on all the distribution nodes to see 319 * Use IPI to get all target uvhubs to release resources held by
159 * which messages have not been seen, and which cpu(s) have not seen them. 320 * a given sending cpu number.
160 *
161 * Returns the number of cpu's that have not responded.
162 */ 321 */
163static int uv_examine_destinations(struct bau_target_nodemask *distribution) 322static void uv_reset_with_ipi(struct bau_target_uvhubmask *distribution,
323 int sender)
164{ 324{
165 int sender; 325 int uvhub;
166 int i; 326 int cpu;
167 int count = 0; 327 cpumask_t mask;
328 struct reset_args reset_args;
329
330 reset_args.sender = sender;
168 331
169 sender = smp_processor_id(); 332 cpus_clear(mask);
170 for (i = 0; i < sizeof(struct bau_target_nodemask) * BITSPERBYTE; i++) { 333 /* find a single cpu for each uvhub in this distribution mask */
171 if (!bau_node_isset(i, distribution)) 334 for (uvhub = 0;
335 uvhub < sizeof(struct bau_target_uvhubmask) * BITSPERBYTE;
336 uvhub++) {
337 if (!bau_uvhub_isset(uvhub, distribution))
172 continue; 338 continue;
173 count += uv_examine_destination(uv_bau_table_bases[i], sender); 339 /* find a cpu for this uvhub */
340 cpu = uvhub_to_first_cpu(uvhub);
341 cpu_set(cpu, mask);
174 } 342 }
175 return count; 343 /* IPI all cpus; Preemption is already disabled */
344 smp_call_function_many(&mask, uv_do_reset, (void *)&reset_args, 1);
345 return;
346}
347
348static inline unsigned long
349cycles_2_us(unsigned long long cyc)
350{
351 unsigned long long ns;
352 unsigned long us;
353 ns = (cyc * per_cpu(cyc2ns, smp_processor_id()))
354 >> CYC2NS_SCALE_FACTOR;
355 us = ns / 1000;
356 return us;
176} 357}
177 358
178/* 359/*
179 * wait for completion of a broadcast message 360 * wait for all cpus on this hub to finish their sends and go quiet
180 * 361 * leaves uvhub_quiesce set so that no new broadcasts are started by
181 * return COMPLETE, RETRY or GIVEUP 362 * bau_flush_send_and_wait()
363 */
364static inline void
365quiesce_local_uvhub(struct bau_control *hmaster)
366{
367 atomic_add_short_return(1, (struct atomic_short *)
368 &hmaster->uvhub_quiesce);
369}
370
371/*
372 * mark this quiet-requestor as done
373 */
374static inline void
375end_uvhub_quiesce(struct bau_control *hmaster)
376{
377 atomic_add_short_return(-1, (struct atomic_short *)
378 &hmaster->uvhub_quiesce);
379}
380
381/*
382 * Wait for completion of a broadcast software ack message
383 * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
182 */ 384 */
183static int uv_wait_completion(struct bau_desc *bau_desc, 385static int uv_wait_completion(struct bau_desc *bau_desc,
184 unsigned long mmr_offset, int right_shift) 386 unsigned long mmr_offset, int right_shift, int this_cpu,
387 struct bau_control *bcp, struct bau_control *smaster, long try)
185{ 388{
186 int exams = 0; 389 int relaxes = 0;
187 long destination_timeouts = 0;
188 long source_timeouts = 0;
189 unsigned long descriptor_status; 390 unsigned long descriptor_status;
391 unsigned long mmr;
392 unsigned long mask;
393 cycles_t ttime;
394 cycles_t timeout_time;
395 struct ptc_stats *stat = &per_cpu(ptcstats, this_cpu);
396 struct bau_control *hmaster;
397
398 hmaster = bcp->uvhub_master;
399 timeout_time = get_cycles() + bcp->timeout_interval;
190 400
401 /* spin on the status MMR, waiting for it to go idle */
191 while ((descriptor_status = (((unsigned long) 402 while ((descriptor_status = (((unsigned long)
192 uv_read_local_mmr(mmr_offset) >> 403 uv_read_local_mmr(mmr_offset) >>
193 right_shift) & UV_ACT_STATUS_MASK)) != 404 right_shift) & UV_ACT_STATUS_MASK)) !=
194 DESC_STATUS_IDLE) { 405 DESC_STATUS_IDLE) {
195 if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
196 source_timeouts++;
197 if (source_timeouts > SOURCE_TIMEOUT_LIMIT)
198 source_timeouts = 0;
199 __get_cpu_var(ptcstats).s_retry++;
200 return FLUSH_RETRY;
201 }
202 /* 406 /*
203 * spin here looking for progress at the destinations 407 * Our software ack messages may be blocked because there are
408 * no swack resources available. As long as none of them
409 * has timed out hardware will NACK our message and its
410 * state will stay IDLE.
204 */ 411 */
205 if (descriptor_status == DESC_STATUS_DESTINATION_TIMEOUT) { 412 if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
206 destination_timeouts++; 413 stat->s_stimeout++;
207 if (destination_timeouts > DESTINATION_TIMEOUT_LIMIT) { 414 return FLUSH_GIVEUP;
208 /* 415 } else if (descriptor_status ==
209 * returns number of cpus not responding 416 DESC_STATUS_DESTINATION_TIMEOUT) {
210 */ 417 stat->s_dtimeout++;
211 if (uv_examine_destinations 418 ttime = get_cycles();
212 (&bau_desc->distribution) == 0) { 419
213 __get_cpu_var(ptcstats).d_retry++; 420 /*
214 return FLUSH_RETRY; 421 * Our retries may be blocked by all destination
215 } 422 * swack resources being consumed, and a timeout
216 exams++; 423 * pending. In that case hardware returns the
217 if (exams >= uv_bau_retry_limit) { 424 * ERROR that looks like a destination timeout.
218 printk(KERN_DEBUG 425 */
219 "uv_flush_tlb_others"); 426 if (cycles_2_us(ttime - bcp->send_message) < BIOS_TO) {
220 printk("giving up on cpu %d\n", 427 bcp->conseccompletes = 0;
221 smp_processor_id()); 428 return FLUSH_RETRY_PLUGGED;
429 }
430
431 bcp->conseccompletes = 0;
432 return FLUSH_RETRY_TIMEOUT;
433 } else {
434 /*
435 * descriptor_status is still BUSY
436 */
437 cpu_relax();
438 relaxes++;
439 if (relaxes >= 10000) {
440 relaxes = 0;
441 if (get_cycles() > timeout_time) {
442 quiesce_local_uvhub(hmaster);
443
444 /* single-thread the register change */
445 spin_lock(&hmaster->masks_lock);
446 mmr = uv_read_local_mmr(mmr_offset);
447 mask = 0UL;
448 mask |= (3UL < right_shift);
449 mask = ~mask;
450 mmr &= mask;
451 uv_write_local_mmr(mmr_offset, mmr);
452 spin_unlock(&hmaster->masks_lock);
453 end_uvhub_quiesce(hmaster);
454 stat->s_busy++;
222 return FLUSH_GIVEUP; 455 return FLUSH_GIVEUP;
223 } 456 }
224 /*
225 * delays can hang the simulator
226 udelay(1000);
227 */
228 destination_timeouts = 0;
229 } 457 }
230 } 458 }
231 cpu_relax();
232 } 459 }
460 bcp->conseccompletes++;
233 return FLUSH_COMPLETE; 461 return FLUSH_COMPLETE;
234} 462}
235 463
464static inline cycles_t
465sec_2_cycles(unsigned long sec)
466{
467 unsigned long ns;
468 cycles_t cyc;
469
470 ns = sec * 1000000000;
471 cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
472 return cyc;
473}
474
475/*
476 * conditionally add 1 to *v, unless *v is >= u
477 * return 0 if we cannot add 1 to *v because it is >= u
478 * return 1 if we can add 1 to *v because it is < u
479 * the add is atomic
480 *
481 * This is close to atomic_add_unless(), but this allows the 'u' value
482 * to be lowered below the current 'v'. atomic_add_unless can only stop
483 * on equal.
484 */
485static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
486{
487 spin_lock(lock);
488 if (atomic_read(v) >= u) {
489 spin_unlock(lock);
490 return 0;
491 }
492 atomic_inc(v);
493 spin_unlock(lock);
494 return 1;
495}
496
236/** 497/**
237 * uv_flush_send_and_wait 498 * uv_flush_send_and_wait
238 * 499 *
239 * Send a broadcast and wait for a broadcast message to complete. 500 * Send a broadcast and wait for it to complete.
240 * 501 *
241 * The flush_mask contains the cpus the broadcast was sent to. 502 * The flush_mask contains the cpus the broadcast is to be sent to, plus
503 * cpus that are on the local uvhub.
242 * 504 *
243 * Returns NULL if all remote flushing was done. The mask is zeroed. 505 * Returns NULL if all flushing represented in the mask was done. The mask
506 * is zeroed.
244 * Returns @flush_mask if some remote flushing remains to be done. The 507 * Returns @flush_mask if some remote flushing remains to be done. The
245 * mask will have some bits still set. 508 * mask will have some bits still set, representing any cpus on the local
509 * uvhub (not current cpu) and any on remote uvhubs if the broadcast failed.
246 */ 510 */
247const struct cpumask *uv_flush_send_and_wait(int cpu, int this_pnode, 511const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
248 struct bau_desc *bau_desc, 512 struct cpumask *flush_mask,
249 struct cpumask *flush_mask) 513 struct bau_control *bcp)
250{ 514{
251 int completion_status = 0;
252 int right_shift; 515 int right_shift;
253 int tries = 0; 516 int uvhub;
254 int pnode;
255 int bit; 517 int bit;
518 int completion_status = 0;
519 int seq_number = 0;
520 long try = 0;
521 int cpu = bcp->uvhub_cpu;
522 int this_cpu = bcp->cpu;
523 int this_uvhub = bcp->uvhub;
256 unsigned long mmr_offset; 524 unsigned long mmr_offset;
257 unsigned long index; 525 unsigned long index;
258 cycles_t time1; 526 cycles_t time1;
259 cycles_t time2; 527 cycles_t time2;
528 struct ptc_stats *stat = &per_cpu(ptcstats, bcp->cpu);
529 struct bau_control *smaster = bcp->socket_master;
530 struct bau_control *hmaster = bcp->uvhub_master;
531
532 /*
533 * Spin here while there are hmaster->max_concurrent or more active
534 * descriptors. This is the per-uvhub 'throttle'.
535 */
536 if (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
537 &hmaster->active_descriptor_count,
538 hmaster->max_concurrent)) {
539 stat->s_throttles++;
540 do {
541 cpu_relax();
542 } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
543 &hmaster->active_descriptor_count,
544 hmaster->max_concurrent));
545 }
546
547 while (hmaster->uvhub_quiesce)
548 cpu_relax();
260 549
261 if (cpu < UV_CPUS_PER_ACT_STATUS) { 550 if (cpu < UV_CPUS_PER_ACT_STATUS) {
262 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0; 551 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
@@ -268,24 +557,108 @@ const struct cpumask *uv_flush_send_and_wait(int cpu, int this_pnode,
268 } 557 }
269 time1 = get_cycles(); 558 time1 = get_cycles();
270 do { 559 do {
271 tries++; 560 /*
561 * Every message from any given cpu gets a unique message
562 * sequence number. But retries use that same number.
563 * Our message may have timed out at the destination because
564 * all sw-ack resources are in use and there is a timeout
565 * pending there. In that case, our last send never got
566 * placed into the queue and we need to persist until it
567 * does.
568 *
569 * Make any retry a type MSG_RETRY so that the destination will
570 * free any resource held by a previous message from this cpu.
571 */
572 if (try == 0) {
573 /* use message type set by the caller the first time */
574 seq_number = bcp->message_number++;
575 } else {
576 /* use RETRY type on all the rest; same sequence */
577 bau_desc->header.msg_type = MSG_RETRY;
578 stat->s_retry_messages++;
579 }
580 bau_desc->header.sequence = seq_number;
272 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) | 581 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
273 cpu; 582 bcp->uvhub_cpu;
583 bcp->send_message = get_cycles();
584
274 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index); 585 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
586
587 try++;
275 completion_status = uv_wait_completion(bau_desc, mmr_offset, 588 completion_status = uv_wait_completion(bau_desc, mmr_offset,
276 right_shift); 589 right_shift, this_cpu, bcp, smaster, try);
277 } while (completion_status == FLUSH_RETRY); 590
591 if (completion_status == FLUSH_RETRY_PLUGGED) {
592 /*
593 * Our retries may be blocked by all destination swack
594 * resources being consumed, and a timeout pending. In
595 * that case hardware immediately returns the ERROR
596 * that looks like a destination timeout.
597 */
598 udelay(TIMEOUT_DELAY);
599 bcp->plugged_tries++;
600 if (bcp->plugged_tries >= PLUGSB4RESET) {
601 bcp->plugged_tries = 0;
602 quiesce_local_uvhub(hmaster);
603 spin_lock(&hmaster->queue_lock);
604 uv_reset_with_ipi(&bau_desc->distribution,
605 this_cpu);
606 spin_unlock(&hmaster->queue_lock);
607 end_uvhub_quiesce(hmaster);
608 bcp->ipi_attempts++;
609 stat->s_resets_plug++;
610 }
611 } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
612 hmaster->max_concurrent = 1;
613 bcp->timeout_tries++;
614 udelay(TIMEOUT_DELAY);
615 if (bcp->timeout_tries >= TIMEOUTSB4RESET) {
616 bcp->timeout_tries = 0;
617 quiesce_local_uvhub(hmaster);
618 spin_lock(&hmaster->queue_lock);
619 uv_reset_with_ipi(&bau_desc->distribution,
620 this_cpu);
621 spin_unlock(&hmaster->queue_lock);
622 end_uvhub_quiesce(hmaster);
623 bcp->ipi_attempts++;
624 stat->s_resets_timeout++;
625 }
626 }
627 if (bcp->ipi_attempts >= 3) {
628 bcp->ipi_attempts = 0;
629 completion_status = FLUSH_GIVEUP;
630 break;
631 }
632 cpu_relax();
633 } while ((completion_status == FLUSH_RETRY_PLUGGED) ||
634 (completion_status == FLUSH_RETRY_TIMEOUT));
278 time2 = get_cycles(); 635 time2 = get_cycles();
279 __get_cpu_var(ptcstats).sflush += (time2 - time1);
280 if (tries > 1)
281 __get_cpu_var(ptcstats).retriesok++;
282 636
283 if (completion_status == FLUSH_GIVEUP) { 637 if ((completion_status == FLUSH_COMPLETE) && (bcp->conseccompletes > 5)
638 && (hmaster->max_concurrent < hmaster->max_concurrent_constant))
639 hmaster->max_concurrent++;
640
641 /*
642 * hold any cpu not timing out here; no other cpu currently held by
643 * the 'throttle' should enter the activation code
644 */
645 while (hmaster->uvhub_quiesce)
646 cpu_relax();
647 atomic_dec(&hmaster->active_descriptor_count);
648
649 /* guard against cycles wrap */
650 if (time2 > time1)
651 stat->s_time += (time2 - time1);
652 else
653 stat->s_requestor--; /* don't count this one */
654 if (completion_status == FLUSH_COMPLETE && try > 1)
655 stat->s_retriesok++;
656 else if (completion_status == FLUSH_GIVEUP) {
284 /* 657 /*
285 * Cause the caller to do an IPI-style TLB shootdown on 658 * Cause the caller to do an IPI-style TLB shootdown on
286 * the cpu's, all of which are still in the mask. 659 * the target cpu's, all of which are still in the mask.
287 */ 660 */
288 __get_cpu_var(ptcstats).ptc_i++; 661 stat->s_giveup++;
289 return flush_mask; 662 return flush_mask;
290 } 663 }
291 664
@@ -294,18 +667,17 @@ const struct cpumask *uv_flush_send_and_wait(int cpu, int this_pnode,
294 * use the IPI method of shootdown on them. 667 * use the IPI method of shootdown on them.
295 */ 668 */
296 for_each_cpu(bit, flush_mask) { 669 for_each_cpu(bit, flush_mask) {
297 pnode = uv_cpu_to_pnode(bit); 670 uvhub = uv_cpu_to_blade_id(bit);
298 if (pnode == this_pnode) 671 if (uvhub == this_uvhub)
299 continue; 672 continue;
300 cpumask_clear_cpu(bit, flush_mask); 673 cpumask_clear_cpu(bit, flush_mask);
301 } 674 }
302 if (!cpumask_empty(flush_mask)) 675 if (!cpumask_empty(flush_mask))
303 return flush_mask; 676 return flush_mask;
677
304 return NULL; 678 return NULL;
305} 679}
306 680
307static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
308
309/** 681/**
310 * uv_flush_tlb_others - globally purge translation cache of a virtual 682 * uv_flush_tlb_others - globally purge translation cache of a virtual
311 * address or all TLB's 683 * address or all TLB's
@@ -322,8 +694,8 @@ static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
322 * The caller has derived the cpumask from the mm_struct. This function 694 * The caller has derived the cpumask from the mm_struct. This function
323 * is called only if there are bits set in the mask. (e.g. flush_tlb_page()) 695 * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
324 * 696 *
325 * The cpumask is converted into a nodemask of the nodes containing 697 * The cpumask is converted into a uvhubmask of the uvhubs containing
326 * the cpus. 698 * those cpus.
327 * 699 *
328 * Note that this function should be called with preemption disabled. 700 * Note that this function should be called with preemption disabled.
329 * 701 *
@@ -335,52 +707,82 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
335 struct mm_struct *mm, 707 struct mm_struct *mm,
336 unsigned long va, unsigned int cpu) 708 unsigned long va, unsigned int cpu)
337{ 709{
338 struct cpumask *flush_mask = __get_cpu_var(uv_flush_tlb_mask); 710 int remotes;
339 int i; 711 int tcpu;
340 int bit; 712 int uvhub;
341 int pnode;
342 int uv_cpu;
343 int this_pnode;
344 int locals = 0; 713 int locals = 0;
345 struct bau_desc *bau_desc; 714 struct bau_desc *bau_desc;
715 struct cpumask *flush_mask;
716 struct ptc_stats *stat;
717 struct bau_control *bcp;
346 718
347 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu)); 719 if (nobau)
720 return cpumask;
348 721
349 uv_cpu = uv_blade_processor_id(); 722 bcp = &per_cpu(bau_control, cpu);
350 this_pnode = uv_hub_info->pnode; 723 /*
351 bau_desc = __get_cpu_var(bau_control).descriptor_base; 724 * Each sending cpu has a per-cpu mask which it fills from the caller's
352 bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu; 725 * cpu mask. Only remote cpus are converted to uvhubs and copied.
726 */
727 flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
728 /*
729 * copy cpumask to flush_mask, removing current cpu
730 * (current cpu should already have been flushed by the caller and
731 * should never be returned if we return flush_mask)
732 */
733 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
734 if (cpu_isset(cpu, *cpumask))
735 locals++; /* current cpu was targeted */
353 736
354 bau_nodes_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE); 737 bau_desc = bcp->descriptor_base;
738 bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
355 739
356 i = 0; 740 bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
357 for_each_cpu(bit, flush_mask) { 741 remotes = 0;
358 pnode = uv_cpu_to_pnode(bit); 742 for_each_cpu(tcpu, flush_mask) {
359 BUG_ON(pnode > (UV_DISTRIBUTION_SIZE - 1)); 743 uvhub = uv_cpu_to_blade_id(tcpu);
360 if (pnode == this_pnode) { 744 if (uvhub == bcp->uvhub) {
361 locals++; 745 locals++;
362 continue; 746 continue;
363 } 747 }
364 bau_node_set(pnode - uv_partition_base_pnode, 748 bau_uvhub_set(uvhub, &bau_desc->distribution);
365 &bau_desc->distribution); 749 remotes++;
366 i++;
367 } 750 }
368 if (i == 0) { 751 if (remotes == 0) {
369 /* 752 /*
370 * no off_node flushing; return status for local node 753 * No off_hub flushing; return status for local hub.
754 * Return the caller's mask if all were local (the current
755 * cpu may be in that mask).
371 */ 756 */
372 if (locals) 757 if (locals)
373 return flush_mask; 758 return cpumask;
374 else 759 else
375 return NULL; 760 return NULL;
376 } 761 }
377 __get_cpu_var(ptcstats).requestor++; 762 stat = &per_cpu(ptcstats, cpu);
378 __get_cpu_var(ptcstats).ntargeted += i; 763 stat->s_requestor++;
764 stat->s_ntargcpu += remotes;
765 remotes = bau_uvhub_weight(&bau_desc->distribution);
766 stat->s_ntarguvhub += remotes;
767 if (remotes >= 16)
768 stat->s_ntarguvhub16++;
769 else if (remotes >= 8)
770 stat->s_ntarguvhub8++;
771 else if (remotes >= 4)
772 stat->s_ntarguvhub4++;
773 else if (remotes >= 2)
774 stat->s_ntarguvhub2++;
775 else
776 stat->s_ntarguvhub1++;
379 777
380 bau_desc->payload.address = va; 778 bau_desc->payload.address = va;
381 bau_desc->payload.sending_cpu = cpu; 779 bau_desc->payload.sending_cpu = cpu;
382 780
383 return uv_flush_send_and_wait(uv_cpu, this_pnode, bau_desc, flush_mask); 781 /*
782 * uv_flush_send_and_wait returns null if all cpu's were messaged, or
783 * the adjusted flush_mask if any cpu's were not messaged.
784 */
785 return uv_flush_send_and_wait(bau_desc, flush_mask, bcp);
384} 786}
385 787
386/* 788/*
@@ -389,87 +791,70 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
389 * 791 *
390 * We received a broadcast assist message. 792 * We received a broadcast assist message.
391 * 793 *
392 * Interrupts may have been disabled; this interrupt could represent 794 * Interrupts are disabled; this interrupt could represent
393 * the receipt of several messages. 795 * the receipt of several messages.
394 * 796 *
395 * All cores/threads on this node get this interrupt. 797 * All cores/threads on this hub get this interrupt.
396 * The last one to see it does the s/w ack. 798 * The last one to see it does the software ack.
397 * (the resource will not be freed until noninterruptable cpus see this 799 * (the resource will not be freed until noninterruptable cpus see this
398 * interrupt; hardware will timeout the s/w ack and reply ERROR) 800 * interrupt; hardware may timeout the s/w ack and reply ERROR)
399 */ 801 */
400void uv_bau_message_interrupt(struct pt_regs *regs) 802void uv_bau_message_interrupt(struct pt_regs *regs)
401{ 803{
402 struct bau_payload_queue_entry *va_queue_first;
403 struct bau_payload_queue_entry *va_queue_last;
404 struct bau_payload_queue_entry *msg;
405 struct pt_regs *old_regs = set_irq_regs(regs);
406 cycles_t time1;
407 cycles_t time2;
408 int msg_slot;
409 int sw_ack_slot;
410 int fw;
411 int count = 0; 804 int count = 0;
412 unsigned long local_pnode; 805 cycles_t time_start;
413 806 struct bau_payload_queue_entry *msg;
414 ack_APIC_irq(); 807 struct bau_control *bcp;
415 exit_idle(); 808 struct ptc_stats *stat;
416 irq_enter(); 809 struct msg_desc msgdesc;
417 810
418 time1 = get_cycles(); 811 time_start = get_cycles();
419 812 bcp = &per_cpu(bau_control, smp_processor_id());
420 local_pnode = uv_blade_to_pnode(uv_numa_blade_id()); 813 stat = &per_cpu(ptcstats, smp_processor_id());
421 814 msgdesc.va_queue_first = bcp->va_queue_first;
422 va_queue_first = __get_cpu_var(bau_control).va_queue_first; 815 msgdesc.va_queue_last = bcp->va_queue_last;
423 va_queue_last = __get_cpu_var(bau_control).va_queue_last; 816 msg = bcp->bau_msg_head;
424
425 msg = __get_cpu_var(bau_control).bau_msg_head;
426 while (msg->sw_ack_vector) { 817 while (msg->sw_ack_vector) {
427 count++; 818 count++;
428 fw = msg->sw_ack_vector; 819 msgdesc.msg_slot = msg - msgdesc.va_queue_first;
429 msg_slot = msg - va_queue_first; 820 msgdesc.sw_ack_slot = ffs(msg->sw_ack_vector) - 1;
430 sw_ack_slot = ffs(fw) - 1; 821 msgdesc.msg = msg;
431 822 uv_bau_process_message(&msgdesc, bcp);
432 uv_bau_process_message(msg, msg_slot, sw_ack_slot);
433
434 msg++; 823 msg++;
435 if (msg > va_queue_last) 824 if (msg > msgdesc.va_queue_last)
436 msg = va_queue_first; 825 msg = msgdesc.va_queue_first;
437 __get_cpu_var(bau_control).bau_msg_head = msg; 826 bcp->bau_msg_head = msg;
438 } 827 }
828 stat->d_time += (get_cycles() - time_start);
439 if (!count) 829 if (!count)
440 __get_cpu_var(ptcstats).nomsg++; 830 stat->d_nomsg++;
441 else if (count > 1) 831 else if (count > 1)
442 __get_cpu_var(ptcstats).multmsg++; 832 stat->d_multmsg++;
443 833 ack_APIC_irq();
444 time2 = get_cycles();
445 __get_cpu_var(ptcstats).dflush += (time2 - time1);
446
447 irq_exit();
448 set_irq_regs(old_regs);
449} 834}
450 835
451/* 836/*
452 * uv_enable_timeouts 837 * uv_enable_timeouts
453 * 838 *
454 * Each target blade (i.e. blades that have cpu's) needs to have 839 * Each target uvhub (i.e. a uvhub that has no cpu's) needs to have
455 * shootdown message timeouts enabled. The timeout does not cause 840 * shootdown message timeouts enabled. The timeout does not cause
456 * an interrupt, but causes an error message to be returned to 841 * an interrupt, but causes an error message to be returned to
457 * the sender. 842 * the sender.
458 */ 843 */
459static void uv_enable_timeouts(void) 844static void uv_enable_timeouts(void)
460{ 845{
461 int blade; 846 int uvhub;
462 int nblades; 847 int nuvhubs;
463 int pnode; 848 int pnode;
464 unsigned long mmr_image; 849 unsigned long mmr_image;
465 850
466 nblades = uv_num_possible_blades(); 851 nuvhubs = uv_num_possible_blades();
467 852
468 for (blade = 0; blade < nblades; blade++) { 853 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
469 if (!uv_blade_nr_possible_cpus(blade)) 854 if (!uv_blade_nr_possible_cpus(uvhub))
470 continue; 855 continue;
471 856
472 pnode = uv_blade_to_pnode(blade); 857 pnode = uv_blade_to_pnode(uvhub);
473 mmr_image = 858 mmr_image =
474 uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL); 859 uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
475 /* 860 /*
@@ -479,16 +864,16 @@ static void uv_enable_timeouts(void)
479 * To program the period, the SOFT_ACK_MODE must be off. 864 * To program the period, the SOFT_ACK_MODE must be off.
480 */ 865 */
481 mmr_image &= ~((unsigned long)1 << 866 mmr_image &= ~((unsigned long)1 <<
482 UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT); 867 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
483 uv_write_global_mmr64 868 uv_write_global_mmr64
484 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image); 869 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
485 /* 870 /*
486 * Set the 4-bit period. 871 * Set the 4-bit period.
487 */ 872 */
488 mmr_image &= ~((unsigned long)0xf << 873 mmr_image &= ~((unsigned long)0xf <<
489 UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT); 874 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
490 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD << 875 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
491 UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT); 876 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
492 uv_write_global_mmr64 877 uv_write_global_mmr64
493 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image); 878 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
494 /* 879 /*
@@ -497,7 +882,7 @@ static void uv_enable_timeouts(void)
497 * indicated in bits 2:0 (7 causes all of them to timeout). 882 * indicated in bits 2:0 (7 causes all of them to timeout).
498 */ 883 */
499 mmr_image |= ((unsigned long)1 << 884 mmr_image |= ((unsigned long)1 <<
500 UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT); 885 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
501 uv_write_global_mmr64 886 uv_write_global_mmr64
502 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image); 887 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
503 } 888 }
@@ -522,9 +907,20 @@ static void uv_ptc_seq_stop(struct seq_file *file, void *data)
522{ 907{
523} 908}
524 909
910static inline unsigned long long
911millisec_2_cycles(unsigned long millisec)
912{
913 unsigned long ns;
914 unsigned long long cyc;
915
916 ns = millisec * 1000;
917 cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
918 return cyc;
919}
920
525/* 921/*
526 * Display the statistics thru /proc 922 * Display the statistics thru /proc.
527 * data points to the cpu number 923 * 'data' points to the cpu number
528 */ 924 */
529static int uv_ptc_seq_show(struct seq_file *file, void *data) 925static int uv_ptc_seq_show(struct seq_file *file, void *data)
530{ 926{
@@ -535,78 +931,155 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
535 931
536 if (!cpu) { 932 if (!cpu) {
537 seq_printf(file, 933 seq_printf(file,
538 "# cpu requestor requestee one all sretry dretry ptc_i "); 934 "# cpu sent stime numuvhubs numuvhubs16 numuvhubs8 ");
539 seq_printf(file, 935 seq_printf(file,
540 "sw_ack sflush dflush sok dnomsg dmult starget\n"); 936 "numuvhubs4 numuvhubs2 numuvhubs1 numcpus dto ");
937 seq_printf(file,
938 "retries rok resetp resett giveup sto bz throt ");
939 seq_printf(file,
940 "sw_ack recv rtime all ");
941 seq_printf(file,
942 "one mult none retry canc nocan reset rcan\n");
541 } 943 }
542 if (cpu < num_possible_cpus() && cpu_online(cpu)) { 944 if (cpu < num_possible_cpus() && cpu_online(cpu)) {
543 stat = &per_cpu(ptcstats, cpu); 945 stat = &per_cpu(ptcstats, cpu);
544 seq_printf(file, "cpu %d %ld %ld %ld %ld %ld %ld %ld ", 946 /* source side statistics */
545 cpu, stat->requestor, 947 seq_printf(file,
546 stat->requestee, stat->onetlb, stat->alltlb, 948 "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
547 stat->s_retry, stat->d_retry, stat->ptc_i); 949 cpu, stat->s_requestor, cycles_2_us(stat->s_time),
548 seq_printf(file, "%lx %ld %ld %ld %ld %ld %ld\n", 950 stat->s_ntarguvhub, stat->s_ntarguvhub16,
951 stat->s_ntarguvhub8, stat->s_ntarguvhub4,
952 stat->s_ntarguvhub2, stat->s_ntarguvhub1,
953 stat->s_ntargcpu, stat->s_dtimeout);
954 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
955 stat->s_retry_messages, stat->s_retriesok,
956 stat->s_resets_plug, stat->s_resets_timeout,
957 stat->s_giveup, stat->s_stimeout,
958 stat->s_busy, stat->s_throttles);
959 /* destination side statistics */
960 seq_printf(file,
961 "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
549 uv_read_global_mmr64(uv_cpu_to_pnode(cpu), 962 uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
550 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE), 963 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
551 stat->sflush, stat->dflush, 964 stat->d_requestee, cycles_2_us(stat->d_time),
552 stat->retriesok, stat->nomsg, 965 stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
553 stat->multmsg, stat->ntargeted); 966 stat->d_nomsg, stat->d_retries, stat->d_canceled,
967 stat->d_nocanceled, stat->d_resets,
968 stat->d_rcanceled);
554 } 969 }
555 970
556 return 0; 971 return 0;
557} 972}
558 973
559/* 974/*
975 * -1: resetf the statistics
560 * 0: display meaning of the statistics 976 * 0: display meaning of the statistics
561 * >0: retry limit 977 * >0: maximum concurrent active descriptors per uvhub (throttle)
562 */ 978 */
563static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user, 979static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
564 size_t count, loff_t *data) 980 size_t count, loff_t *data)
565{ 981{
566 long newmode; 982 int cpu;
983 long input_arg;
567 char optstr[64]; 984 char optstr[64];
985 struct ptc_stats *stat;
986 struct bau_control *bcp;
568 987
569 if (count == 0 || count > sizeof(optstr)) 988 if (count == 0 || count > sizeof(optstr))
570 return -EINVAL; 989 return -EINVAL;
571 if (copy_from_user(optstr, user, count)) 990 if (copy_from_user(optstr, user, count))
572 return -EFAULT; 991 return -EFAULT;
573 optstr[count - 1] = '\0'; 992 optstr[count - 1] = '\0';
574 if (strict_strtoul(optstr, 10, &newmode) < 0) { 993 if (strict_strtol(optstr, 10, &input_arg) < 0) {
575 printk(KERN_DEBUG "%s is invalid\n", optstr); 994 printk(KERN_DEBUG "%s is invalid\n", optstr);
576 return -EINVAL; 995 return -EINVAL;
577 } 996 }
578 997
579 if (newmode == 0) { 998 if (input_arg == 0) {
580 printk(KERN_DEBUG "# cpu: cpu number\n"); 999 printk(KERN_DEBUG "# cpu: cpu number\n");
1000 printk(KERN_DEBUG "Sender statistics:\n");
1001 printk(KERN_DEBUG
1002 "sent: number of shootdown messages sent\n");
1003 printk(KERN_DEBUG
1004 "stime: time spent sending messages\n");
1005 printk(KERN_DEBUG
1006 "numuvhubs: number of hubs targeted with shootdown\n");
1007 printk(KERN_DEBUG
1008 "numuvhubs16: number times 16 or more hubs targeted\n");
1009 printk(KERN_DEBUG
1010 "numuvhubs8: number times 8 or more hubs targeted\n");
1011 printk(KERN_DEBUG
1012 "numuvhubs4: number times 4 or more hubs targeted\n");
1013 printk(KERN_DEBUG
1014 "numuvhubs2: number times 2 or more hubs targeted\n");
1015 printk(KERN_DEBUG
1016 "numuvhubs1: number times 1 hub targeted\n");
1017 printk(KERN_DEBUG
1018 "numcpus: number of cpus targeted with shootdown\n");
1019 printk(KERN_DEBUG
1020 "dto: number of destination timeouts\n");
1021 printk(KERN_DEBUG
1022 "retries: destination timeout retries sent\n");
1023 printk(KERN_DEBUG
1024 "rok: : destination timeouts successfully retried\n");
1025 printk(KERN_DEBUG
1026 "resetp: ipi-style resource resets for plugs\n");
1027 printk(KERN_DEBUG
1028 "resett: ipi-style resource resets for timeouts\n");
1029 printk(KERN_DEBUG
1030 "giveup: fall-backs to ipi-style shootdowns\n");
1031 printk(KERN_DEBUG
1032 "sto: number of source timeouts\n");
1033 printk(KERN_DEBUG
1034 "bz: number of stay-busy's\n");
1035 printk(KERN_DEBUG
1036 "throt: number times spun in throttle\n");
1037 printk(KERN_DEBUG "Destination side statistics:\n");
581 printk(KERN_DEBUG 1038 printk(KERN_DEBUG
582 "requestor: times this cpu was the flush requestor\n"); 1039 "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
583 printk(KERN_DEBUG 1040 printk(KERN_DEBUG
584 "requestee: times this cpu was requested to flush its TLBs\n"); 1041 "recv: shootdown messages received\n");
585 printk(KERN_DEBUG 1042 printk(KERN_DEBUG
586 "one: times requested to flush a single address\n"); 1043 "rtime: time spent processing messages\n");
587 printk(KERN_DEBUG 1044 printk(KERN_DEBUG
588 "all: times requested to flush all TLB's\n"); 1045 "all: shootdown all-tlb messages\n");
589 printk(KERN_DEBUG 1046 printk(KERN_DEBUG
590 "sretry: number of retries of source-side timeouts\n"); 1047 "one: shootdown one-tlb messages\n");
591 printk(KERN_DEBUG 1048 printk(KERN_DEBUG
592 "dretry: number of retries of destination-side timeouts\n"); 1049 "mult: interrupts that found multiple messages\n");
593 printk(KERN_DEBUG 1050 printk(KERN_DEBUG
594 "ptc_i: times UV fell through to IPI-style flushes\n"); 1051 "none: interrupts that found no messages\n");
595 printk(KERN_DEBUG 1052 printk(KERN_DEBUG
596 "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n"); 1053 "retry: number of retry messages processed\n");
597 printk(KERN_DEBUG 1054 printk(KERN_DEBUG
598 "sflush_us: cycles spent in uv_flush_tlb_others()\n"); 1055 "canc: number messages canceled by retries\n");
599 printk(KERN_DEBUG 1056 printk(KERN_DEBUG
600 "dflush_us: cycles spent in handling flush requests\n"); 1057 "nocan: number retries that found nothing to cancel\n");
601 printk(KERN_DEBUG "sok: successes on retry\n");
602 printk(KERN_DEBUG "dnomsg: interrupts with no message\n");
603 printk(KERN_DEBUG 1058 printk(KERN_DEBUG
604 "dmult: interrupts with multiple messages\n"); 1059 "reset: number of ipi-style reset requests processed\n");
605 printk(KERN_DEBUG "starget: nodes targeted\n"); 1060 printk(KERN_DEBUG
1061 "rcan: number messages canceled by reset requests\n");
1062 } else if (input_arg == -1) {
1063 for_each_present_cpu(cpu) {
1064 stat = &per_cpu(ptcstats, cpu);
1065 memset(stat, 0, sizeof(struct ptc_stats));
1066 }
606 } else { 1067 } else {
607 uv_bau_retry_limit = newmode; 1068 uv_bau_max_concurrent = input_arg;
608 printk(KERN_DEBUG "timeout retry limit:%d\n", 1069 bcp = &per_cpu(bau_control, smp_processor_id());
609 uv_bau_retry_limit); 1070 if (uv_bau_max_concurrent < 1 ||
1071 uv_bau_max_concurrent > bcp->cpus_in_uvhub) {
1072 printk(KERN_DEBUG
1073 "Error: BAU max concurrent %d; %d is invalid\n",
1074 bcp->max_concurrent, uv_bau_max_concurrent);
1075 return -EINVAL;
1076 }
1077 printk(KERN_DEBUG "Set BAU max concurrent:%d\n",
1078 uv_bau_max_concurrent);
1079 for_each_present_cpu(cpu) {
1080 bcp = &per_cpu(bau_control, cpu);
1081 bcp->max_concurrent = uv_bau_max_concurrent;
1082 }
610 } 1083 }
611 1084
612 return count; 1085 return count;
@@ -650,79 +1123,30 @@ static int __init uv_ptc_init(void)
650} 1123}
651 1124
652/* 1125/*
653 * begin the initialization of the per-blade control structures
654 */
655static struct bau_control * __init uv_table_bases_init(int blade, int node)
656{
657 int i;
658 struct bau_msg_status *msp;
659 struct bau_control *bau_tabp;
660
661 bau_tabp =
662 kmalloc_node(sizeof(struct bau_control), GFP_KERNEL, node);
663 BUG_ON(!bau_tabp);
664
665 bau_tabp->msg_statuses =
666 kmalloc_node(sizeof(struct bau_msg_status) *
667 DEST_Q_SIZE, GFP_KERNEL, node);
668 BUG_ON(!bau_tabp->msg_statuses);
669
670 for (i = 0, msp = bau_tabp->msg_statuses; i < DEST_Q_SIZE; i++, msp++)
671 bau_cpubits_clear(&msp->seen_by, (int)
672 uv_blade_nr_possible_cpus(blade));
673
674 uv_bau_table_bases[blade] = bau_tabp;
675
676 return bau_tabp;
677}
678
679/*
680 * finish the initialization of the per-blade control structures
681 */
682static void __init
683uv_table_bases_finish(int blade,
684 struct bau_control *bau_tablesp,
685 struct bau_desc *adp)
686{
687 struct bau_control *bcp;
688 int cpu;
689
690 for_each_present_cpu(cpu) {
691 if (blade != uv_cpu_to_blade_id(cpu))
692 continue;
693
694 bcp = (struct bau_control *)&per_cpu(bau_control, cpu);
695 bcp->bau_msg_head = bau_tablesp->va_queue_first;
696 bcp->va_queue_first = bau_tablesp->va_queue_first;
697 bcp->va_queue_last = bau_tablesp->va_queue_last;
698 bcp->msg_statuses = bau_tablesp->msg_statuses;
699 bcp->descriptor_base = adp;
700 }
701}
702
703/*
704 * initialize the sending side's sending buffers 1126 * initialize the sending side's sending buffers
705 */ 1127 */
706static struct bau_desc * __init 1128static void
707uv_activation_descriptor_init(int node, int pnode) 1129uv_activation_descriptor_init(int node, int pnode)
708{ 1130{
709 int i; 1131 int i;
1132 int cpu;
710 unsigned long pa; 1133 unsigned long pa;
711 unsigned long m; 1134 unsigned long m;
712 unsigned long n; 1135 unsigned long n;
713 struct bau_desc *adp; 1136 struct bau_desc *bau_desc;
714 struct bau_desc *ad2; 1137 struct bau_desc *bd2;
1138 struct bau_control *bcp;
715 1139
716 /* 1140 /*
717 * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR) 1141 * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
718 * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per blade 1142 * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub
719 */ 1143 */
720 adp = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)* 1144 bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)*
721 UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node); 1145 UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
722 BUG_ON(!adp); 1146 BUG_ON(!bau_desc);
723 1147
724 pa = uv_gpa(adp); /* need the real nasid*/ 1148 pa = uv_gpa(bau_desc); /* need the real nasid*/
725 n = uv_gpa_to_pnode(pa); 1149 n = pa >> uv_nshift;
726 m = pa & uv_mmask; 1150 m = pa & uv_mmask;
727 1151
728 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, 1152 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
@@ -731,96 +1155,188 @@ uv_activation_descriptor_init(int node, int pnode)
731 /* 1155 /*
732 * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each 1156 * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
733 * cpu even though we only use the first one; one descriptor can 1157 * cpu even though we only use the first one; one descriptor can
734 * describe a broadcast to 256 nodes. 1158 * describe a broadcast to 256 uv hubs.
735 */ 1159 */
736 for (i = 0, ad2 = adp; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR); 1160 for (i = 0, bd2 = bau_desc; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR);
737 i++, ad2++) { 1161 i++, bd2++) {
738 memset(ad2, 0, sizeof(struct bau_desc)); 1162 memset(bd2, 0, sizeof(struct bau_desc));
739 ad2->header.sw_ack_flag = 1; 1163 bd2->header.sw_ack_flag = 1;
740 /* 1164 /*
741 * base_dest_nodeid is the first node in the partition, so 1165 * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
742 * the bit map will indicate partition-relative node numbers. 1166 * in the partition. The bit map will indicate uvhub numbers,
743 * note that base_dest_nodeid is actually a nasid. 1167 * which are 0-N in a partition. Pnodes are unique system-wide.
744 */ 1168 */
745 ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1; 1169 bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
746 ad2->header.dest_subnodeid = 0x10; /* the LB */ 1170 bd2->header.dest_subnodeid = 0x10; /* the LB */
747 ad2->header.command = UV_NET_ENDPOINT_INTD; 1171 bd2->header.command = UV_NET_ENDPOINT_INTD;
748 ad2->header.int_both = 1; 1172 bd2->header.int_both = 1;
749 /* 1173 /*
750 * all others need to be set to zero: 1174 * all others need to be set to zero:
751 * fairness chaining multilevel count replied_to 1175 * fairness chaining multilevel count replied_to
752 */ 1176 */
753 } 1177 }
754 return adp; 1178 for_each_present_cpu(cpu) {
1179 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1180 continue;
1181 bcp = &per_cpu(bau_control, cpu);
1182 bcp->descriptor_base = bau_desc;
1183 }
755} 1184}
756 1185
757/* 1186/*
758 * initialize the destination side's receiving buffers 1187 * initialize the destination side's receiving buffers
1188 * entered for each uvhub in the partition
1189 * - node is first node (kernel memory notion) on the uvhub
1190 * - pnode is the uvhub's physical identifier
759 */ 1191 */
760static struct bau_payload_queue_entry * __init 1192static void
761uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp) 1193uv_payload_queue_init(int node, int pnode)
762{ 1194{
763 struct bau_payload_queue_entry *pqp;
764 unsigned long pa;
765 int pn; 1195 int pn;
1196 int cpu;
766 char *cp; 1197 char *cp;
1198 unsigned long pa;
1199 struct bau_payload_queue_entry *pqp;
1200 struct bau_payload_queue_entry *pqp_malloc;
1201 struct bau_control *bcp;
767 1202
768 pqp = (struct bau_payload_queue_entry *) kmalloc_node( 1203 pqp = (struct bau_payload_queue_entry *) kmalloc_node(
769 (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry), 1204 (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
770 GFP_KERNEL, node); 1205 GFP_KERNEL, node);
771 BUG_ON(!pqp); 1206 BUG_ON(!pqp);
1207 pqp_malloc = pqp;
772 1208
773 cp = (char *)pqp + 31; 1209 cp = (char *)pqp + 31;
774 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5); 1210 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
775 bau_tablesp->va_queue_first = pqp; 1211
1212 for_each_present_cpu(cpu) {
1213 if (pnode != uv_cpu_to_pnode(cpu))
1214 continue;
1215 /* for every cpu on this pnode: */
1216 bcp = &per_cpu(bau_control, cpu);
1217 bcp->va_queue_first = pqp;
1218 bcp->bau_msg_head = pqp;
1219 bcp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
1220 }
776 /* 1221 /*
777 * need the pnode of where the memory was really allocated 1222 * need the pnode of where the memory was really allocated
778 */ 1223 */
779 pa = uv_gpa(pqp); 1224 pa = uv_gpa(pqp);
780 pn = uv_gpa_to_pnode(pa); 1225 pn = pa >> uv_nshift;
781 uv_write_global_mmr64(pnode, 1226 uv_write_global_mmr64(pnode,
782 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, 1227 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
783 ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | 1228 ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
784 uv_physnodeaddr(pqp)); 1229 uv_physnodeaddr(pqp));
785 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, 1230 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
786 uv_physnodeaddr(pqp)); 1231 uv_physnodeaddr(pqp));
787 bau_tablesp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
788 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST, 1232 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
789 (unsigned long) 1233 (unsigned long)
790 uv_physnodeaddr(bau_tablesp->va_queue_last)); 1234 uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1)));
1235 /* in effect, all msg_type's are set to MSG_NOOP */
791 memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE); 1236 memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
792
793 return pqp;
794} 1237}
795 1238
796/* 1239/*
797 * Initialization of each UV blade's structures 1240 * Initialization of each UV hub's structures
798 */ 1241 */
799static int __init uv_init_blade(int blade) 1242static void __init uv_init_uvhub(int uvhub, int vector)
800{ 1243{
801 int node; 1244 int node;
802 int pnode; 1245 int pnode;
803 unsigned long pa;
804 unsigned long apicid; 1246 unsigned long apicid;
805 struct bau_desc *adp; 1247
806 struct bau_payload_queue_entry *pqp; 1248 node = uvhub_to_first_node(uvhub);
807 struct bau_control *bau_tablesp; 1249 pnode = uv_blade_to_pnode(uvhub);
808 1250 uv_activation_descriptor_init(node, pnode);
809 node = blade_to_first_node(blade); 1251 uv_payload_queue_init(node, pnode);
810 bau_tablesp = uv_table_bases_init(blade, node);
811 pnode = uv_blade_to_pnode(blade);
812 adp = uv_activation_descriptor_init(node, pnode);
813 pqp = uv_payload_queue_init(node, pnode, bau_tablesp);
814 uv_table_bases_finish(blade, bau_tablesp, adp);
815 /* 1252 /*
816 * the below initialization can't be in firmware because the 1253 * the below initialization can't be in firmware because the
817 * messaging IRQ will be determined by the OS 1254 * messaging IRQ will be determined by the OS
818 */ 1255 */
819 apicid = blade_to_first_apicid(blade); 1256 apicid = uvhub_to_first_apicid(uvhub);
820 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG);
821 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, 1257 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
822 ((apicid << 32) | UV_BAU_MESSAGE)); 1258 ((apicid << 32) | vector));
823 return 0; 1259}
1260
1261/*
1262 * initialize the bau_control structure for each cpu
1263 */
1264static void uv_init_per_cpu(int nuvhubs)
1265{
1266 int i, j, k;
1267 int cpu;
1268 int pnode;
1269 int uvhub;
1270 short socket = 0;
1271 struct bau_control *bcp;
1272 struct uvhub_desc *bdp;
1273 struct socket_desc *sdp;
1274 struct bau_control *hmaster = NULL;
1275 struct bau_control *smaster = NULL;
1276 struct socket_desc {
1277 short num_cpus;
1278 short cpu_number[16];
1279 };
1280 struct uvhub_desc {
1281 short num_sockets;
1282 short num_cpus;
1283 short uvhub;
1284 short pnode;
1285 struct socket_desc socket[2];
1286 };
1287 struct uvhub_desc *uvhub_descs;
1288
1289 uvhub_descs = (struct uvhub_desc *)
1290 kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1291 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
1292 for_each_present_cpu(cpu) {
1293 bcp = &per_cpu(bau_control, cpu);
1294 memset(bcp, 0, sizeof(struct bau_control));
1295 spin_lock_init(&bcp->masks_lock);
1296 bcp->max_concurrent = uv_bau_max_concurrent;
1297 pnode = uv_cpu_hub_info(cpu)->pnode;
1298 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1299 bdp = &uvhub_descs[uvhub];
1300 bdp->num_cpus++;
1301 bdp->uvhub = uvhub;
1302 bdp->pnode = pnode;
1303 /* time interval to catch a hardware stay-busy bug */
1304 bcp->timeout_interval = millisec_2_cycles(3);
1305 /* kludge: assume uv_hub.h is constant */
1306 socket = (cpu_physical_id(cpu)>>5)&1;
1307 if (socket >= bdp->num_sockets)
1308 bdp->num_sockets = socket+1;
1309 sdp = &bdp->socket[socket];
1310 sdp->cpu_number[sdp->num_cpus] = cpu;
1311 sdp->num_cpus++;
1312 }
1313 socket = 0;
1314 for_each_possible_blade(uvhub) {
1315 bdp = &uvhub_descs[uvhub];
1316 for (i = 0; i < bdp->num_sockets; i++) {
1317 sdp = &bdp->socket[i];
1318 for (j = 0; j < sdp->num_cpus; j++) {
1319 cpu = sdp->cpu_number[j];
1320 bcp = &per_cpu(bau_control, cpu);
1321 bcp->cpu = cpu;
1322 if (j == 0) {
1323 smaster = bcp;
1324 if (i == 0)
1325 hmaster = bcp;
1326 }
1327 bcp->cpus_in_uvhub = bdp->num_cpus;
1328 bcp->cpus_in_socket = sdp->num_cpus;
1329 bcp->socket_master = smaster;
1330 bcp->uvhub_master = hmaster;
1331 for (k = 0; k < DEST_Q_SIZE; k++)
1332 bcp->socket_acknowledge_count[k] = 0;
1333 bcp->uvhub_cpu =
1334 uv_cpu_hub_info(cpu)->blade_processor_id;
1335 }
1336 socket++;
1337 }
1338 }
1339 kfree(uvhub_descs);
824} 1340}
825 1341
826/* 1342/*
@@ -828,38 +1344,54 @@ static int __init uv_init_blade(int blade)
828 */ 1344 */
829static int __init uv_bau_init(void) 1345static int __init uv_bau_init(void)
830{ 1346{
831 int blade; 1347 int uvhub;
832 int nblades; 1348 int pnode;
1349 int nuvhubs;
833 int cur_cpu; 1350 int cur_cpu;
1351 int vector;
1352 unsigned long mmr;
834 1353
835 if (!is_uv_system()) 1354 if (!is_uv_system())
836 return 0; 1355 return 0;
837 1356
1357 if (nobau)
1358 return 0;
1359
838 for_each_possible_cpu(cur_cpu) 1360 for_each_possible_cpu(cur_cpu)
839 zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu), 1361 zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
840 GFP_KERNEL, cpu_to_node(cur_cpu)); 1362 GFP_KERNEL, cpu_to_node(cur_cpu));
841 1363
842 uv_bau_retry_limit = 1; 1364 uv_bau_max_concurrent = MAX_BAU_CONCURRENT;
1365 uv_nshift = uv_hub_info->m_val;
843 uv_mmask = (1UL << uv_hub_info->m_val) - 1; 1366 uv_mmask = (1UL << uv_hub_info->m_val) - 1;
844 nblades = uv_num_possible_blades(); 1367 nuvhubs = uv_num_possible_blades();
845 1368
846 uv_bau_table_bases = (struct bau_control **) 1369 uv_init_per_cpu(nuvhubs);
847 kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL);
848 BUG_ON(!uv_bau_table_bases);
849 1370
850 uv_partition_base_pnode = 0x7fffffff; 1371 uv_partition_base_pnode = 0x7fffffff;
851 for (blade = 0; blade < nblades; blade++) 1372 for (uvhub = 0; uvhub < nuvhubs; uvhub++)
852 if (uv_blade_nr_possible_cpus(blade) && 1373 if (uv_blade_nr_possible_cpus(uvhub) &&
853 (uv_blade_to_pnode(blade) < uv_partition_base_pnode)) 1374 (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode))
854 uv_partition_base_pnode = uv_blade_to_pnode(blade); 1375 uv_partition_base_pnode = uv_blade_to_pnode(uvhub);
855 for (blade = 0; blade < nblades; blade++) 1376
856 if (uv_blade_nr_possible_cpus(blade)) 1377 vector = UV_BAU_MESSAGE;
857 uv_init_blade(blade); 1378 for_each_possible_blade(uvhub)
858 1379 if (uv_blade_nr_possible_cpus(uvhub))
859 alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1); 1380 uv_init_uvhub(uvhub, vector);
1381
860 uv_enable_timeouts(); 1382 uv_enable_timeouts();
1383 alloc_intr_gate(vector, uv_bau_message_intr1);
1384
1385 for_each_possible_blade(uvhub) {
1386 pnode = uv_blade_to_pnode(uvhub);
1387 /* INIT the bau */
1388 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL,
1389 ((unsigned long)1 << 63));
1390 mmr = 1; /* should be 1 to broadcast to both sockets */
1391 uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST, mmr);
1392 }
861 1393
862 return 0; 1394 return 0;
863} 1395}
864__initcall(uv_bau_init); 1396core_initcall(uv_bau_init);
865__initcall(uv_ptc_init); 1397core_initcall(uv_ptc_init);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 1168e4454188..02cfb9b8f5b1 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -108,15 +108,6 @@ static inline void preempt_conditional_cli(struct pt_regs *regs)
108 dec_preempt_count(); 108 dec_preempt_count();
109} 109}
110 110
111#ifdef CONFIG_X86_32
112static inline void
113die_if_kernel(const char *str, struct pt_regs *regs, long err)
114{
115 if (!user_mode_vm(regs))
116 die(str, regs, err);
117}
118#endif
119
120static void __kprobes 111static void __kprobes
121do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, 112do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
122 long error_code, siginfo_t *info) 113 long error_code, siginfo_t *info)
@@ -543,11 +534,11 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
543 534
544 /* DR6 may or may not be cleared by the CPU */ 535 /* DR6 may or may not be cleared by the CPU */
545 set_debugreg(0, 6); 536 set_debugreg(0, 6);
537
546 /* 538 /*
547 * The processor cleared BTF, so don't mark that we need it set. 539 * The processor cleared BTF, so don't mark that we need it set.
548 */ 540 */
549 clear_tsk_thread_flag(tsk, TIF_DEBUGCTLMSR); 541 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
550 tsk->thread.debugctlmsr = 0;
551 542
552 /* Store the virtualized DR6 value */ 543 /* Store the virtualized DR6 value */
553 tsk->thread.debugreg6 = dr6; 544 tsk->thread.debugreg6 = dr6;
@@ -585,55 +576,67 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
585 return; 576 return;
586} 577}
587 578
588#ifdef CONFIG_X86_64
589static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr)
590{
591 if (fixup_exception(regs))
592 return 1;
593
594 notify_die(DIE_GPF, str, regs, 0, trapnr, SIGFPE);
595 /* Illegal floating point operation in the kernel */
596 current->thread.trap_no = trapnr;
597 die(str, regs, 0);
598 return 0;
599}
600#endif
601
602/* 579/*
603 * Note that we play around with the 'TS' bit in an attempt to get 580 * Note that we play around with the 'TS' bit in an attempt to get
604 * the correct behaviour even in the presence of the asynchronous 581 * the correct behaviour even in the presence of the asynchronous
605 * IRQ13 behaviour 582 * IRQ13 behaviour
606 */ 583 */
607void math_error(void __user *ip) 584void math_error(struct pt_regs *regs, int error_code, int trapnr)
608{ 585{
609 struct task_struct *task; 586 struct task_struct *task = current;
610 siginfo_t info; 587 siginfo_t info;
611 unsigned short cwd, swd, err; 588 unsigned short err;
589 char *str = (trapnr == 16) ? "fpu exception" : "simd exception";
590
591 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
592 return;
593 conditional_sti(regs);
594
595 if (!user_mode_vm(regs))
596 {
597 if (!fixup_exception(regs)) {
598 task->thread.error_code = error_code;
599 task->thread.trap_no = trapnr;
600 die(str, regs, error_code);
601 }
602 return;
603 }
612 604
613 /* 605 /*
614 * Save the info for the exception handler and clear the error. 606 * Save the info for the exception handler and clear the error.
615 */ 607 */
616 task = current;
617 save_init_fpu(task); 608 save_init_fpu(task);
618 task->thread.trap_no = 16; 609 task->thread.trap_no = trapnr;
619 task->thread.error_code = 0; 610 task->thread.error_code = error_code;
620 info.si_signo = SIGFPE; 611 info.si_signo = SIGFPE;
621 info.si_errno = 0; 612 info.si_errno = 0;
622 info.si_addr = ip; 613 info.si_addr = (void __user *)regs->ip;
623 /* 614 if (trapnr == 16) {
624 * (~cwd & swd) will mask out exceptions that are not set to unmasked 615 unsigned short cwd, swd;
625 * status. 0x3f is the exception bits in these regs, 0x200 is the 616 /*
626 * C1 reg you need in case of a stack fault, 0x040 is the stack 617 * (~cwd & swd) will mask out exceptions that are not set to unmasked
627 * fault bit. We should only be taking one exception at a time, 618 * status. 0x3f is the exception bits in these regs, 0x200 is the
628 * so if this combination doesn't produce any single exception, 619 * C1 reg you need in case of a stack fault, 0x040 is the stack
629 * then we have a bad program that isn't synchronizing its FPU usage 620 * fault bit. We should only be taking one exception at a time,
630 * and it will suffer the consequences since we won't be able to 621 * so if this combination doesn't produce any single exception,
631 * fully reproduce the context of the exception 622 * then we have a bad program that isn't synchronizing its FPU usage
632 */ 623 * and it will suffer the consequences since we won't be able to
633 cwd = get_fpu_cwd(task); 624 * fully reproduce the context of the exception
634 swd = get_fpu_swd(task); 625 */
626 cwd = get_fpu_cwd(task);
627 swd = get_fpu_swd(task);
635 628
636 err = swd & ~cwd; 629 err = swd & ~cwd;
630 } else {
631 /*
632 * The SIMD FPU exceptions are handled a little differently, as there
633 * is only a single status/control register. Thus, to determine which
634 * unmasked exception was caught we must mask the exception mask bits
635 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
636 */
637 unsigned short mxcsr = get_fpu_mxcsr(task);
638 err = ~(mxcsr >> 7) & mxcsr;
639 }
637 640
638 if (err & 0x001) { /* Invalid op */ 641 if (err & 0x001) { /* Invalid op */
639 /* 642 /*
@@ -662,97 +665,17 @@ void math_error(void __user *ip)
662 665
663dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) 666dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
664{ 667{
665 conditional_sti(regs);
666
667#ifdef CONFIG_X86_32 668#ifdef CONFIG_X86_32
668 ignore_fpu_irq = 1; 669 ignore_fpu_irq = 1;
669#else
670 if (!user_mode(regs) &&
671 kernel_math_error(regs, "kernel x87 math error", 16))
672 return;
673#endif 670#endif
674 671
675 math_error((void __user *)regs->ip); 672 math_error(regs, error_code, 16);
676}
677
678static void simd_math_error(void __user *ip)
679{
680 struct task_struct *task;
681 siginfo_t info;
682 unsigned short mxcsr;
683
684 /*
685 * Save the info for the exception handler and clear the error.
686 */
687 task = current;
688 save_init_fpu(task);
689 task->thread.trap_no = 19;
690 task->thread.error_code = 0;
691 info.si_signo = SIGFPE;
692 info.si_errno = 0;
693 info.si_code = __SI_FAULT;
694 info.si_addr = ip;
695 /*
696 * The SIMD FPU exceptions are handled a little differently, as there
697 * is only a single status/control register. Thus, to determine which
698 * unmasked exception was caught we must mask the exception mask bits
699 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
700 */
701 mxcsr = get_fpu_mxcsr(task);
702 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
703 case 0x000:
704 default:
705 break;
706 case 0x001: /* Invalid Op */
707 info.si_code = FPE_FLTINV;
708 break;
709 case 0x002: /* Denormalize */
710 case 0x010: /* Underflow */
711 info.si_code = FPE_FLTUND;
712 break;
713 case 0x004: /* Zero Divide */
714 info.si_code = FPE_FLTDIV;
715 break;
716 case 0x008: /* Overflow */
717 info.si_code = FPE_FLTOVF;
718 break;
719 case 0x020: /* Precision */
720 info.si_code = FPE_FLTRES;
721 break;
722 }
723 force_sig_info(SIGFPE, &info, task);
724} 673}
725 674
726dotraplinkage void 675dotraplinkage void
727do_simd_coprocessor_error(struct pt_regs *regs, long error_code) 676do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
728{ 677{
729 conditional_sti(regs); 678 math_error(regs, error_code, 19);
730
731#ifdef CONFIG_X86_32
732 if (cpu_has_xmm) {
733 /* Handle SIMD FPU exceptions on PIII+ processors. */
734 ignore_fpu_irq = 1;
735 simd_math_error((void __user *)regs->ip);
736 return;
737 }
738 /*
739 * Handle strange cache flush from user space exception
740 * in all other cases. This is undocumented behaviour.
741 */
742 if (regs->flags & X86_VM_MASK) {
743 handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code);
744 return;
745 }
746 current->thread.trap_no = 19;
747 current->thread.error_code = error_code;
748 die_if_kernel("cache flush denied", regs, error_code);
749 force_sig(SIGSEGV, current);
750#else
751 if (!user_mode(regs) &&
752 kernel_math_error(regs, "kernel simd math error", 19))
753 return;
754 simd_math_error((void __user *)regs->ip);
755#endif
756} 679}
757 680
758dotraplinkage void 681dotraplinkage void
diff --git a/arch/x86/kernel/uv_irq.c b/arch/x86/kernel/uv_irq.c
index 1d40336b030a..1132129db792 100644
--- a/arch/x86/kernel/uv_irq.c
+++ b/arch/x86/kernel/uv_irq.c
@@ -44,7 +44,7 @@ static void uv_ack_apic(unsigned int irq)
44 ack_APIC_irq(); 44 ack_APIC_irq();
45} 45}
46 46
47struct irq_chip uv_irq_chip = { 47static struct irq_chip uv_irq_chip = {
48 .name = "UV-CORE", 48 .name = "UV-CORE",
49 .startup = uv_noop_ret, 49 .startup = uv_noop_ret,
50 .shutdown = uv_noop, 50 .shutdown = uv_noop,
@@ -141,7 +141,7 @@ int uv_irq_2_mmr_info(int irq, unsigned long *offset, int *pnode)
141 */ 141 */
142static int 142static int
143arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, 143arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
144 unsigned long mmr_offset, int restrict) 144 unsigned long mmr_offset, int limit)
145{ 145{
146 const struct cpumask *eligible_cpu = cpumask_of(cpu); 146 const struct cpumask *eligible_cpu = cpumask_of(cpu);
147 struct irq_desc *desc = irq_to_desc(irq); 147 struct irq_desc *desc = irq_to_desc(irq);
@@ -160,7 +160,7 @@ arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
160 if (err != 0) 160 if (err != 0)
161 return err; 161 return err;
162 162
163 if (restrict == UV_AFFINITY_CPU) 163 if (limit == UV_AFFINITY_CPU)
164 desc->status |= IRQ_NO_BALANCING; 164 desc->status |= IRQ_NO_BALANCING;
165 else 165 else
166 desc->status |= IRQ_MOVE_PCNTXT; 166 desc->status |= IRQ_MOVE_PCNTXT;
@@ -214,7 +214,7 @@ static int uv_set_irq_affinity(unsigned int irq, const struct cpumask *mask)
214 unsigned long mmr_value; 214 unsigned long mmr_value;
215 struct uv_IO_APIC_route_entry *entry; 215 struct uv_IO_APIC_route_entry *entry;
216 unsigned long mmr_offset; 216 unsigned long mmr_offset;
217 unsigned mmr_pnode; 217 int mmr_pnode;
218 218
219 if (set_desc_affinity(desc, mask, &dest)) 219 if (set_desc_affinity(desc, mask, &dest))
220 return -1; 220 return -1;
@@ -248,7 +248,7 @@ static int uv_set_irq_affinity(unsigned int irq, const struct cpumask *mask)
248 * interrupt is raised. 248 * interrupt is raised.
249 */ 249 */
250int uv_setup_irq(char *irq_name, int cpu, int mmr_blade, 250int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,
251 unsigned long mmr_offset, int restrict) 251 unsigned long mmr_offset, int limit)
252{ 252{
253 int irq, ret; 253 int irq, ret;
254 254
@@ -258,7 +258,7 @@ int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,
258 return -EBUSY; 258 return -EBUSY;
259 259
260 ret = arch_enable_uv_irq(irq_name, irq, cpu, mmr_blade, mmr_offset, 260 ret = arch_enable_uv_irq(irq_name, irq, cpu, mmr_blade, mmr_offset,
261 restrict); 261 limit);
262 if (ret == irq) 262 if (ret == irq)
263 uv_set_irq_2_mmr_info(irq, mmr_offset, mmr_blade); 263 uv_set_irq_2_mmr_info(irq, mmr_offset, mmr_blade);
264 else 264 else
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index 693920b22496..1b950d151e58 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -54,7 +54,6 @@ EXPORT_SYMBOL(memcpy);
54EXPORT_SYMBOL(__memcpy); 54EXPORT_SYMBOL(__memcpy);
55 55
56EXPORT_SYMBOL(empty_zero_page); 56EXPORT_SYMBOL(empty_zero_page);
57EXPORT_SYMBOL(init_level4_pgt);
58#ifndef CONFIG_PARAVIRT 57#ifndef CONFIG_PARAVIRT
59EXPORT_SYMBOL(native_load_gs_index); 58EXPORT_SYMBOL(native_load_gs_index);
60#endif 59#endif
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c
index 782c3a362ec6..37e68fc5e24a 100644
--- a/arch/x86/kernel/xsave.c
+++ b/arch/x86/kernel/xsave.c
@@ -99,7 +99,7 @@ int save_i387_xstate(void __user *buf)
99 if (err) 99 if (err)
100 return err; 100 return err;
101 101
102 if (task_thread_info(tsk)->status & TS_XSAVE) 102 if (use_xsave())
103 err = xsave_user(buf); 103 err = xsave_user(buf);
104 else 104 else
105 err = fxsave_user(buf); 105 err = fxsave_user(buf);
@@ -109,14 +109,14 @@ int save_i387_xstate(void __user *buf)
109 task_thread_info(tsk)->status &= ~TS_USEDFPU; 109 task_thread_info(tsk)->status &= ~TS_USEDFPU;
110 stts(); 110 stts();
111 } else { 111 } else {
112 if (__copy_to_user(buf, &tsk->thread.xstate->fxsave, 112 if (__copy_to_user(buf, &tsk->thread.fpu.state->fxsave,
113 xstate_size)) 113 xstate_size))
114 return -1; 114 return -1;
115 } 115 }
116 116
117 clear_used_math(); /* trigger finit */ 117 clear_used_math(); /* trigger finit */
118 118
119 if (task_thread_info(tsk)->status & TS_XSAVE) { 119 if (use_xsave()) {
120 struct _fpstate __user *fx = buf; 120 struct _fpstate __user *fx = buf;
121 struct _xstate __user *x = buf; 121 struct _xstate __user *x = buf;
122 u64 xstate_bv; 122 u64 xstate_bv;
@@ -225,7 +225,7 @@ int restore_i387_xstate(void __user *buf)
225 clts(); 225 clts();
226 task_thread_info(current)->status |= TS_USEDFPU; 226 task_thread_info(current)->status |= TS_USEDFPU;
227 } 227 }
228 if (task_thread_info(tsk)->status & TS_XSAVE) 228 if (use_xsave())
229 err = restore_user_xstate(buf); 229 err = restore_user_xstate(buf);
230 else 230 else
231 err = fxrstor_checking((__force struct i387_fxsave_struct *) 231 err = fxrstor_checking((__force struct i387_fxsave_struct *)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 2f8db0ec8ae4..edca080407a5 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3659,8 +3659,11 @@ static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
3659 3659
3660 /* We need to handle NMIs before interrupts are enabled */ 3660 /* We need to handle NMIs before interrupts are enabled */
3661 if ((exit_intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR && 3661 if ((exit_intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR &&
3662 (exit_intr_info & INTR_INFO_VALID_MASK)) 3662 (exit_intr_info & INTR_INFO_VALID_MASK)) {
3663 kvm_before_handle_nmi(&vmx->vcpu);
3663 asm("int $2"); 3664 asm("int $2");
3665 kvm_after_handle_nmi(&vmx->vcpu);
3666 }
3664 3667
3665 idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK; 3668 idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
3666 3669
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c4f35b545c1d..dd9bc8fb81ab 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -40,6 +40,7 @@
40#include <linux/user-return-notifier.h> 40#include <linux/user-return-notifier.h>
41#include <linux/srcu.h> 41#include <linux/srcu.h>
42#include <linux/slab.h> 42#include <linux/slab.h>
43#include <linux/perf_event.h>
43#include <trace/events/kvm.h> 44#include <trace/events/kvm.h>
44#undef TRACE_INCLUDE_FILE 45#undef TRACE_INCLUDE_FILE
45#define CREATE_TRACE_POINTS 46#define CREATE_TRACE_POINTS
@@ -3747,6 +3748,51 @@ static void kvm_timer_init(void)
3747 } 3748 }
3748} 3749}
3749 3750
3751static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
3752
3753static int kvm_is_in_guest(void)
3754{
3755 return percpu_read(current_vcpu) != NULL;
3756}
3757
3758static int kvm_is_user_mode(void)
3759{
3760 int user_mode = 3;
3761
3762 if (percpu_read(current_vcpu))
3763 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
3764
3765 return user_mode != 0;
3766}
3767
3768static unsigned long kvm_get_guest_ip(void)
3769{
3770 unsigned long ip = 0;
3771
3772 if (percpu_read(current_vcpu))
3773 ip = kvm_rip_read(percpu_read(current_vcpu));
3774
3775 return ip;
3776}
3777
3778static struct perf_guest_info_callbacks kvm_guest_cbs = {
3779 .is_in_guest = kvm_is_in_guest,
3780 .is_user_mode = kvm_is_user_mode,
3781 .get_guest_ip = kvm_get_guest_ip,
3782};
3783
3784void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
3785{
3786 percpu_write(current_vcpu, vcpu);
3787}
3788EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
3789
3790void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
3791{
3792 percpu_write(current_vcpu, NULL);
3793}
3794EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
3795
3750int kvm_arch_init(void *opaque) 3796int kvm_arch_init(void *opaque)
3751{ 3797{
3752 int r; 3798 int r;
@@ -3783,6 +3829,8 @@ int kvm_arch_init(void *opaque)
3783 3829
3784 kvm_timer_init(); 3830 kvm_timer_init();
3785 3831
3832 perf_register_guest_info_callbacks(&kvm_guest_cbs);
3833
3786 return 0; 3834 return 0;
3787 3835
3788out: 3836out:
@@ -3791,6 +3839,8 @@ out:
3791 3839
3792void kvm_arch_exit(void) 3840void kvm_arch_exit(void)
3793{ 3841{
3842 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
3843
3794 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) 3844 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3795 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block, 3845 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3796 CPUFREQ_TRANSITION_NOTIFIER); 3846 CPUFREQ_TRANSITION_NOTIFIER);
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 2d101639bd8d..b7a404722d2b 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -65,4 +65,7 @@ static inline int is_paging(struct kvm_vcpu *vcpu)
65 return kvm_read_cr0_bits(vcpu, X86_CR0_PG); 65 return kvm_read_cr0_bits(vcpu, X86_CR0_PG);
66} 66}
67 67
68void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
69void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
70
68#endif 71#endif
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 419386c24b82..f871e04b6965 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -20,17 +20,18 @@ lib-y := delay.o
20lib-y += thunk_$(BITS).o 20lib-y += thunk_$(BITS).o
21lib-y += usercopy_$(BITS).o getuser.o putuser.o 21lib-y += usercopy_$(BITS).o getuser.o putuser.o
22lib-y += memcpy_$(BITS).o 22lib-y += memcpy_$(BITS).o
23lib-$(CONFIG_KPROBES) += insn.o inat.o 23lib-$(CONFIG_INSTRUCTION_DECODER) += insn.o inat.o
24 24
25obj-y += msr.o msr-reg.o msr-reg-export.o 25obj-y += msr.o msr-reg.o msr-reg-export.o
26 26
27ifeq ($(CONFIG_X86_32),y) 27ifeq ($(CONFIG_X86_32),y)
28 obj-y += atomic64_32.o 28 obj-y += atomic64_32.o
29 lib-y += atomic64_cx8_32.o
29 lib-y += checksum_32.o 30 lib-y += checksum_32.o
30 lib-y += strstr_32.o 31 lib-y += strstr_32.o
31 lib-y += semaphore_32.o string_32.o 32 lib-y += semaphore_32.o string_32.o
32ifneq ($(CONFIG_X86_CMPXCHG64),y) 33ifneq ($(CONFIG_X86_CMPXCHG64),y)
33 lib-y += cmpxchg8b_emu.o 34 lib-y += cmpxchg8b_emu.o atomic64_386_32.o
34endif 35endif
35 lib-$(CONFIG_X86_USE_3DNOW) += mmx_32.o 36 lib-$(CONFIG_X86_USE_3DNOW) += mmx_32.o
36else 37else
diff --git a/arch/x86/lib/atomic64_32.c b/arch/x86/lib/atomic64_32.c
index 824fa0be55a3..540179e8e9fa 100644
--- a/arch/x86/lib/atomic64_32.c
+++ b/arch/x86/lib/atomic64_32.c
@@ -6,225 +6,54 @@
6#include <asm/cmpxchg.h> 6#include <asm/cmpxchg.h>
7#include <asm/atomic.h> 7#include <asm/atomic.h>
8 8
9static noinline u64 cmpxchg8b(u64 *ptr, u64 old, u64 new) 9long long atomic64_read_cx8(long long, const atomic64_t *v);
10{ 10EXPORT_SYMBOL(atomic64_read_cx8);
11 u32 low = new; 11long long atomic64_set_cx8(long long, const atomic64_t *v);
12 u32 high = new >> 32; 12EXPORT_SYMBOL(atomic64_set_cx8);
13 13long long atomic64_xchg_cx8(long long, unsigned high);
14 asm volatile( 14EXPORT_SYMBOL(atomic64_xchg_cx8);
15 LOCK_PREFIX "cmpxchg8b %1\n" 15long long atomic64_add_return_cx8(long long a, atomic64_t *v);
16 : "+A" (old), "+m" (*ptr) 16EXPORT_SYMBOL(atomic64_add_return_cx8);
17 : "b" (low), "c" (high) 17long long atomic64_sub_return_cx8(long long a, atomic64_t *v);
18 ); 18EXPORT_SYMBOL(atomic64_sub_return_cx8);
19 return old; 19long long atomic64_inc_return_cx8(long long a, atomic64_t *v);
20} 20EXPORT_SYMBOL(atomic64_inc_return_cx8);
21 21long long atomic64_dec_return_cx8(long long a, atomic64_t *v);
22u64 atomic64_cmpxchg(atomic64_t *ptr, u64 old_val, u64 new_val) 22EXPORT_SYMBOL(atomic64_dec_return_cx8);
23{ 23long long atomic64_dec_if_positive_cx8(atomic64_t *v);
24 return cmpxchg8b(&ptr->counter, old_val, new_val); 24EXPORT_SYMBOL(atomic64_dec_if_positive_cx8);
25} 25int atomic64_inc_not_zero_cx8(atomic64_t *v);
26EXPORT_SYMBOL(atomic64_cmpxchg); 26EXPORT_SYMBOL(atomic64_inc_not_zero_cx8);
27 27int atomic64_add_unless_cx8(atomic64_t *v, long long a, long long u);
28/** 28EXPORT_SYMBOL(atomic64_add_unless_cx8);
29 * atomic64_xchg - xchg atomic64 variable 29
30 * @ptr: pointer to type atomic64_t 30#ifndef CONFIG_X86_CMPXCHG64
31 * @new_val: value to assign 31long long atomic64_read_386(long long, const atomic64_t *v);
32 * 32EXPORT_SYMBOL(atomic64_read_386);
33 * Atomically xchgs the value of @ptr to @new_val and returns 33long long atomic64_set_386(long long, const atomic64_t *v);
34 * the old value. 34EXPORT_SYMBOL(atomic64_set_386);
35 */ 35long long atomic64_xchg_386(long long, unsigned high);
36u64 atomic64_xchg(atomic64_t *ptr, u64 new_val) 36EXPORT_SYMBOL(atomic64_xchg_386);
37{ 37long long atomic64_add_return_386(long long a, atomic64_t *v);
38 /* 38EXPORT_SYMBOL(atomic64_add_return_386);
39 * Try first with a (possibly incorrect) assumption about 39long long atomic64_sub_return_386(long long a, atomic64_t *v);
40 * what we have there. We'll do two loops most likely, 40EXPORT_SYMBOL(atomic64_sub_return_386);
41 * but we'll get an ownership MESI transaction straight away 41long long atomic64_inc_return_386(long long a, atomic64_t *v);
42 * instead of a read transaction followed by a 42EXPORT_SYMBOL(atomic64_inc_return_386);
43 * flush-for-ownership transaction: 43long long atomic64_dec_return_386(long long a, atomic64_t *v);
44 */ 44EXPORT_SYMBOL(atomic64_dec_return_386);
45 u64 old_val, real_val = 0; 45long long atomic64_add_386(long long a, atomic64_t *v);
46 46EXPORT_SYMBOL(atomic64_add_386);
47 do { 47long long atomic64_sub_386(long long a, atomic64_t *v);
48 old_val = real_val; 48EXPORT_SYMBOL(atomic64_sub_386);
49 49long long atomic64_inc_386(long long a, atomic64_t *v);
50 real_val = atomic64_cmpxchg(ptr, old_val, new_val); 50EXPORT_SYMBOL(atomic64_inc_386);
51 51long long atomic64_dec_386(long long a, atomic64_t *v);
52 } while (real_val != old_val); 52EXPORT_SYMBOL(atomic64_dec_386);
53 53long long atomic64_dec_if_positive_386(atomic64_t *v);
54 return old_val; 54EXPORT_SYMBOL(atomic64_dec_if_positive_386);
55} 55int atomic64_inc_not_zero_386(atomic64_t *v);
56EXPORT_SYMBOL(atomic64_xchg); 56EXPORT_SYMBOL(atomic64_inc_not_zero_386);
57 57int atomic64_add_unless_386(atomic64_t *v, long long a, long long u);
58/** 58EXPORT_SYMBOL(atomic64_add_unless_386);
59 * atomic64_set - set atomic64 variable 59#endif
60 * @ptr: pointer to type atomic64_t
61 * @new_val: value to assign
62 *
63 * Atomically sets the value of @ptr to @new_val.
64 */
65void atomic64_set(atomic64_t *ptr, u64 new_val)
66{
67 atomic64_xchg(ptr, new_val);
68}
69EXPORT_SYMBOL(atomic64_set);
70
71/**
72EXPORT_SYMBOL(atomic64_read);
73 * atomic64_add_return - add and return
74 * @delta: integer value to add
75 * @ptr: pointer to type atomic64_t
76 *
77 * Atomically adds @delta to @ptr and returns @delta + *@ptr
78 */
79noinline u64 atomic64_add_return(u64 delta, atomic64_t *ptr)
80{
81 /*
82 * Try first with a (possibly incorrect) assumption about
83 * what we have there. We'll do two loops most likely,
84 * but we'll get an ownership MESI transaction straight away
85 * instead of a read transaction followed by a
86 * flush-for-ownership transaction:
87 */
88 u64 old_val, new_val, real_val = 0;
89
90 do {
91 old_val = real_val;
92 new_val = old_val + delta;
93
94 real_val = atomic64_cmpxchg(ptr, old_val, new_val);
95
96 } while (real_val != old_val);
97
98 return new_val;
99}
100EXPORT_SYMBOL(atomic64_add_return);
101
102u64 atomic64_sub_return(u64 delta, atomic64_t *ptr)
103{
104 return atomic64_add_return(-delta, ptr);
105}
106EXPORT_SYMBOL(atomic64_sub_return);
107
108u64 atomic64_inc_return(atomic64_t *ptr)
109{
110 return atomic64_add_return(1, ptr);
111}
112EXPORT_SYMBOL(atomic64_inc_return);
113
114u64 atomic64_dec_return(atomic64_t *ptr)
115{
116 return atomic64_sub_return(1, ptr);
117}
118EXPORT_SYMBOL(atomic64_dec_return);
119
120/**
121 * atomic64_add - add integer to atomic64 variable
122 * @delta: integer value to add
123 * @ptr: pointer to type atomic64_t
124 *
125 * Atomically adds @delta to @ptr.
126 */
127void atomic64_add(u64 delta, atomic64_t *ptr)
128{
129 atomic64_add_return(delta, ptr);
130}
131EXPORT_SYMBOL(atomic64_add);
132
133/**
134 * atomic64_sub - subtract the atomic64 variable
135 * @delta: integer value to subtract
136 * @ptr: pointer to type atomic64_t
137 *
138 * Atomically subtracts @delta from @ptr.
139 */
140void atomic64_sub(u64 delta, atomic64_t *ptr)
141{
142 atomic64_add(-delta, ptr);
143}
144EXPORT_SYMBOL(atomic64_sub);
145
146/**
147 * atomic64_sub_and_test - subtract value from variable and test result
148 * @delta: integer value to subtract
149 * @ptr: pointer to type atomic64_t
150 *
151 * Atomically subtracts @delta from @ptr and returns
152 * true if the result is zero, or false for all
153 * other cases.
154 */
155int atomic64_sub_and_test(u64 delta, atomic64_t *ptr)
156{
157 u64 new_val = atomic64_sub_return(delta, ptr);
158
159 return new_val == 0;
160}
161EXPORT_SYMBOL(atomic64_sub_and_test);
162
163/**
164 * atomic64_inc - increment atomic64 variable
165 * @ptr: pointer to type atomic64_t
166 *
167 * Atomically increments @ptr by 1.
168 */
169void atomic64_inc(atomic64_t *ptr)
170{
171 atomic64_add(1, ptr);
172}
173EXPORT_SYMBOL(atomic64_inc);
174
175/**
176 * atomic64_dec - decrement atomic64 variable
177 * @ptr: pointer to type atomic64_t
178 *
179 * Atomically decrements @ptr by 1.
180 */
181void atomic64_dec(atomic64_t *ptr)
182{
183 atomic64_sub(1, ptr);
184}
185EXPORT_SYMBOL(atomic64_dec);
186
187/**
188 * atomic64_dec_and_test - decrement and test
189 * @ptr: pointer to type atomic64_t
190 *
191 * Atomically decrements @ptr by 1 and
192 * returns true if the result is 0, or false for all other
193 * cases.
194 */
195int atomic64_dec_and_test(atomic64_t *ptr)
196{
197 return atomic64_sub_and_test(1, ptr);
198}
199EXPORT_SYMBOL(atomic64_dec_and_test);
200
201/**
202 * atomic64_inc_and_test - increment and test
203 * @ptr: pointer to type atomic64_t
204 *
205 * Atomically increments @ptr by 1
206 * and returns true if the result is zero, or false for all
207 * other cases.
208 */
209int atomic64_inc_and_test(atomic64_t *ptr)
210{
211 return atomic64_sub_and_test(-1, ptr);
212}
213EXPORT_SYMBOL(atomic64_inc_and_test);
214
215/**
216 * atomic64_add_negative - add and test if negative
217 * @delta: integer value to add
218 * @ptr: pointer to type atomic64_t
219 *
220 * Atomically adds @delta to @ptr and returns true
221 * if the result is negative, or false when
222 * result is greater than or equal to zero.
223 */
224int atomic64_add_negative(u64 delta, atomic64_t *ptr)
225{
226 s64 new_val = atomic64_add_return(delta, ptr);
227
228 return new_val < 0;
229}
230EXPORT_SYMBOL(atomic64_add_negative);
diff --git a/arch/x86/lib/atomic64_386_32.S b/arch/x86/lib/atomic64_386_32.S
new file mode 100644
index 000000000000..4a5979aa6883
--- /dev/null
+++ b/arch/x86/lib/atomic64_386_32.S
@@ -0,0 +1,174 @@
1/*
2 * atomic64_t for 386/486
3 *
4 * Copyright © 2010 Luca Barbieri
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/linkage.h>
13#include <asm/alternative-asm.h>
14#include <asm/dwarf2.h>
15
16/* if you want SMP support, implement these with real spinlocks */
17.macro LOCK reg
18 pushfl
19 CFI_ADJUST_CFA_OFFSET 4
20 cli
21.endm
22
23.macro UNLOCK reg
24 popfl
25 CFI_ADJUST_CFA_OFFSET -4
26.endm
27
28.macro BEGIN func reg
29$v = \reg
30
31ENTRY(atomic64_\func\()_386)
32 CFI_STARTPROC
33 LOCK $v
34
35.macro RETURN
36 UNLOCK $v
37 ret
38.endm
39
40.macro END_
41 CFI_ENDPROC
42ENDPROC(atomic64_\func\()_386)
43.purgem RETURN
44.purgem END_
45.purgem END
46.endm
47
48.macro END
49RETURN
50END_
51.endm
52.endm
53
54BEGIN read %ecx
55 movl ($v), %eax
56 movl 4($v), %edx
57END
58
59BEGIN set %esi
60 movl %ebx, ($v)
61 movl %ecx, 4($v)
62END
63
64BEGIN xchg %esi
65 movl ($v), %eax
66 movl 4($v), %edx
67 movl %ebx, ($v)
68 movl %ecx, 4($v)
69END
70
71BEGIN add %ecx
72 addl %eax, ($v)
73 adcl %edx, 4($v)
74END
75
76BEGIN add_return %ecx
77 addl ($v), %eax
78 adcl 4($v), %edx
79 movl %eax, ($v)
80 movl %edx, 4($v)
81END
82
83BEGIN sub %ecx
84 subl %eax, ($v)
85 sbbl %edx, 4($v)
86END
87
88BEGIN sub_return %ecx
89 negl %edx
90 negl %eax
91 sbbl $0, %edx
92 addl ($v), %eax
93 adcl 4($v), %edx
94 movl %eax, ($v)
95 movl %edx, 4($v)
96END
97
98BEGIN inc %esi
99 addl $1, ($v)
100 adcl $0, 4($v)
101END
102
103BEGIN inc_return %esi
104 movl ($v), %eax
105 movl 4($v), %edx
106 addl $1, %eax
107 adcl $0, %edx
108 movl %eax, ($v)
109 movl %edx, 4($v)
110END
111
112BEGIN dec %esi
113 subl $1, ($v)
114 sbbl $0, 4($v)
115END
116
117BEGIN dec_return %esi
118 movl ($v), %eax
119 movl 4($v), %edx
120 subl $1, %eax
121 sbbl $0, %edx
122 movl %eax, ($v)
123 movl %edx, 4($v)
124END
125
126BEGIN add_unless %ecx
127 addl %eax, %esi
128 adcl %edx, %edi
129 addl ($v), %eax
130 adcl 4($v), %edx
131 cmpl %eax, %esi
132 je 3f
1331:
134 movl %eax, ($v)
135 movl %edx, 4($v)
136 movl $1, %eax
1372:
138RETURN
1393:
140 cmpl %edx, %edi
141 jne 1b
142 xorl %eax, %eax
143 jmp 2b
144END_
145
146BEGIN inc_not_zero %esi
147 movl ($v), %eax
148 movl 4($v), %edx
149 testl %eax, %eax
150 je 3f
1511:
152 addl $1, %eax
153 adcl $0, %edx
154 movl %eax, ($v)
155 movl %edx, 4($v)
156 movl $1, %eax
1572:
158RETURN
1593:
160 testl %edx, %edx
161 jne 1b
162 jmp 2b
163END_
164
165BEGIN dec_if_positive %esi
166 movl ($v), %eax
167 movl 4($v), %edx
168 subl $1, %eax
169 sbbl $0, %edx
170 js 1f
171 movl %eax, ($v)
172 movl %edx, 4($v)
1731:
174END
diff --git a/arch/x86/lib/atomic64_cx8_32.S b/arch/x86/lib/atomic64_cx8_32.S
new file mode 100644
index 000000000000..71e080de3352
--- /dev/null
+++ b/arch/x86/lib/atomic64_cx8_32.S
@@ -0,0 +1,224 @@
1/*
2 * atomic64_t for 586+
3 *
4 * Copyright © 2010 Luca Barbieri
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/linkage.h>
13#include <asm/alternative-asm.h>
14#include <asm/dwarf2.h>
15
16.macro SAVE reg
17 pushl %\reg
18 CFI_ADJUST_CFA_OFFSET 4
19 CFI_REL_OFFSET \reg, 0
20.endm
21
22.macro RESTORE reg
23 popl %\reg
24 CFI_ADJUST_CFA_OFFSET -4
25 CFI_RESTORE \reg
26.endm
27
28.macro read64 reg
29 movl %ebx, %eax
30 movl %ecx, %edx
31/* we need LOCK_PREFIX since otherwise cmpxchg8b always does the write */
32 LOCK_PREFIX
33 cmpxchg8b (\reg)
34.endm
35
36ENTRY(atomic64_read_cx8)
37 CFI_STARTPROC
38
39 read64 %ecx
40 ret
41 CFI_ENDPROC
42ENDPROC(atomic64_read_cx8)
43
44ENTRY(atomic64_set_cx8)
45 CFI_STARTPROC
46
471:
48/* we don't need LOCK_PREFIX since aligned 64-bit writes
49 * are atomic on 586 and newer */
50 cmpxchg8b (%esi)
51 jne 1b
52
53 ret
54 CFI_ENDPROC
55ENDPROC(atomic64_set_cx8)
56
57ENTRY(atomic64_xchg_cx8)
58 CFI_STARTPROC
59
60 movl %ebx, %eax
61 movl %ecx, %edx
621:
63 LOCK_PREFIX
64 cmpxchg8b (%esi)
65 jne 1b
66
67 ret
68 CFI_ENDPROC
69ENDPROC(atomic64_xchg_cx8)
70
71.macro addsub_return func ins insc
72ENTRY(atomic64_\func\()_return_cx8)
73 CFI_STARTPROC
74 SAVE ebp
75 SAVE ebx
76 SAVE esi
77 SAVE edi
78
79 movl %eax, %esi
80 movl %edx, %edi
81 movl %ecx, %ebp
82
83 read64 %ebp
841:
85 movl %eax, %ebx
86 movl %edx, %ecx
87 \ins\()l %esi, %ebx
88 \insc\()l %edi, %ecx
89 LOCK_PREFIX
90 cmpxchg8b (%ebp)
91 jne 1b
92
9310:
94 movl %ebx, %eax
95 movl %ecx, %edx
96 RESTORE edi
97 RESTORE esi
98 RESTORE ebx
99 RESTORE ebp
100 ret
101 CFI_ENDPROC
102ENDPROC(atomic64_\func\()_return_cx8)
103.endm
104
105addsub_return add add adc
106addsub_return sub sub sbb
107
108.macro incdec_return func ins insc
109ENTRY(atomic64_\func\()_return_cx8)
110 CFI_STARTPROC
111 SAVE ebx
112
113 read64 %esi
1141:
115 movl %eax, %ebx
116 movl %edx, %ecx
117 \ins\()l $1, %ebx
118 \insc\()l $0, %ecx
119 LOCK_PREFIX
120 cmpxchg8b (%esi)
121 jne 1b
122
12310:
124 movl %ebx, %eax
125 movl %ecx, %edx
126 RESTORE ebx
127 ret
128 CFI_ENDPROC
129ENDPROC(atomic64_\func\()_return_cx8)
130.endm
131
132incdec_return inc add adc
133incdec_return dec sub sbb
134
135ENTRY(atomic64_dec_if_positive_cx8)
136 CFI_STARTPROC
137 SAVE ebx
138
139 read64 %esi
1401:
141 movl %eax, %ebx
142 movl %edx, %ecx
143 subl $1, %ebx
144 sbb $0, %ecx
145 js 2f
146 LOCK_PREFIX
147 cmpxchg8b (%esi)
148 jne 1b
149
1502:
151 movl %ebx, %eax
152 movl %ecx, %edx
153 RESTORE ebx
154 ret
155 CFI_ENDPROC
156ENDPROC(atomic64_dec_if_positive_cx8)
157
158ENTRY(atomic64_add_unless_cx8)
159 CFI_STARTPROC
160 SAVE ebp
161 SAVE ebx
162/* these just push these two parameters on the stack */
163 SAVE edi
164 SAVE esi
165
166 movl %ecx, %ebp
167 movl %eax, %esi
168 movl %edx, %edi
169
170 read64 %ebp
1711:
172 cmpl %eax, 0(%esp)
173 je 4f
1742:
175 movl %eax, %ebx
176 movl %edx, %ecx
177 addl %esi, %ebx
178 adcl %edi, %ecx
179 LOCK_PREFIX
180 cmpxchg8b (%ebp)
181 jne 1b
182
183 movl $1, %eax
1843:
185 addl $8, %esp
186 CFI_ADJUST_CFA_OFFSET -8
187 RESTORE ebx
188 RESTORE ebp
189 ret
1904:
191 cmpl %edx, 4(%esp)
192 jne 2b
193 xorl %eax, %eax
194 jmp 3b
195 CFI_ENDPROC
196ENDPROC(atomic64_add_unless_cx8)
197
198ENTRY(atomic64_inc_not_zero_cx8)
199 CFI_STARTPROC
200 SAVE ebx
201
202 read64 %esi
2031:
204 testl %eax, %eax
205 je 4f
2062:
207 movl %eax, %ebx
208 movl %edx, %ecx
209 addl $1, %ebx
210 adcl $0, %ecx
211 LOCK_PREFIX
212 cmpxchg8b (%esi)
213 jne 1b
214
215 movl $1, %eax
2163:
217 RESTORE ebx
218 ret
2194:
220 testl %edx, %edx
221 jne 2b
222 jmp 3b
223 CFI_ENDPROC
224ENDPROC(atomic64_inc_not_zero_cx8)
diff --git a/arch/x86/math-emu/fpu_aux.c b/arch/x86/math-emu/fpu_aux.c
index aa0987088774..dc8adad10a2f 100644
--- a/arch/x86/math-emu/fpu_aux.c
+++ b/arch/x86/math-emu/fpu_aux.c
@@ -30,10 +30,10 @@ static void fclex(void)
30} 30}
31 31
32/* Needs to be externally visible */ 32/* Needs to be externally visible */
33void finit_task(struct task_struct *tsk) 33void finit_soft_fpu(struct i387_soft_struct *soft)
34{ 34{
35 struct i387_soft_struct *soft = &tsk->thread.xstate->soft;
36 struct address *oaddr, *iaddr; 35 struct address *oaddr, *iaddr;
36 memset(soft, 0, sizeof(*soft));
37 soft->cwd = 0x037f; 37 soft->cwd = 0x037f;
38 soft->swd = 0; 38 soft->swd = 0;
39 soft->ftop = 0; /* We don't keep top in the status word internally. */ 39 soft->ftop = 0; /* We don't keep top in the status word internally. */
@@ -52,7 +52,7 @@ void finit_task(struct task_struct *tsk)
52 52
53void finit(void) 53void finit(void)
54{ 54{
55 finit_task(current); 55 finit_soft_fpu(&current->thread.fpu.state->soft);
56} 56}
57 57
58/* 58/*
diff --git a/arch/x86/math-emu/fpu_entry.c b/arch/x86/math-emu/fpu_entry.c
index 5d87f586f8d7..7718541541d4 100644
--- a/arch/x86/math-emu/fpu_entry.c
+++ b/arch/x86/math-emu/fpu_entry.c
@@ -681,7 +681,7 @@ int fpregs_soft_set(struct task_struct *target,
681 unsigned int pos, unsigned int count, 681 unsigned int pos, unsigned int count,
682 const void *kbuf, const void __user *ubuf) 682 const void *kbuf, const void __user *ubuf)
683{ 683{
684 struct i387_soft_struct *s387 = &target->thread.xstate->soft; 684 struct i387_soft_struct *s387 = &target->thread.fpu.state->soft;
685 void *space = s387->st_space; 685 void *space = s387->st_space;
686 int ret; 686 int ret;
687 int offset, other, i, tags, regnr, tag, newtop; 687 int offset, other, i, tags, regnr, tag, newtop;
@@ -733,7 +733,7 @@ int fpregs_soft_get(struct task_struct *target,
733 unsigned int pos, unsigned int count, 733 unsigned int pos, unsigned int count,
734 void *kbuf, void __user *ubuf) 734 void *kbuf, void __user *ubuf)
735{ 735{
736 struct i387_soft_struct *s387 = &target->thread.xstate->soft; 736 struct i387_soft_struct *s387 = &target->thread.fpu.state->soft;
737 const void *space = s387->st_space; 737 const void *space = s387->st_space;
738 int ret; 738 int ret;
739 int offset = (S387->ftop & 7) * 10, other = 80 - offset; 739 int offset = (S387->ftop & 7) * 10, other = 80 - offset;
diff --git a/arch/x86/math-emu/fpu_system.h b/arch/x86/math-emu/fpu_system.h
index 50fa0ec2c8a5..2c614410a5f3 100644
--- a/arch/x86/math-emu/fpu_system.h
+++ b/arch/x86/math-emu/fpu_system.h
@@ -31,7 +31,7 @@
31#define SEG_EXPAND_DOWN(s) (((s).b & ((1 << 11) | (1 << 10))) \ 31#define SEG_EXPAND_DOWN(s) (((s).b & ((1 << 11) | (1 << 10))) \
32 == (1 << 10)) 32 == (1 << 10))
33 33
34#define I387 (current->thread.xstate) 34#define I387 (current->thread.fpu.state)
35#define FPU_info (I387->soft.info) 35#define FPU_info (I387->soft.info)
36 36
37#define FPU_CS (*(unsigned short *) &(FPU_info->regs->cs)) 37#define FPU_CS (*(unsigned short *) &(FPU_info->regs->cs))
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
index 06630d26e56d..a4c768397baa 100644
--- a/arch/x86/mm/Makefile
+++ b/arch/x86/mm/Makefile
@@ -6,6 +6,7 @@ nostackp := $(call cc-option, -fno-stack-protector)
6CFLAGS_physaddr.o := $(nostackp) 6CFLAGS_physaddr.o := $(nostackp)
7CFLAGS_setup_nx.o := $(nostackp) 7CFLAGS_setup_nx.o := $(nostackp)
8 8
9obj-$(CONFIG_X86_PAT) += pat_rbtree.o
9obj-$(CONFIG_SMP) += tlb.o 10obj-$(CONFIG_SMP) += tlb.o
10 11
11obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o 12obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index edc8b95afc1a..bbe5502ee1cb 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -30,6 +30,8 @@
30#include <asm/pat.h> 30#include <asm/pat.h>
31#include <asm/io.h> 31#include <asm/io.h>
32 32
33#include "pat_internal.h"
34
33#ifdef CONFIG_X86_PAT 35#ifdef CONFIG_X86_PAT
34int __read_mostly pat_enabled = 1; 36int __read_mostly pat_enabled = 1;
35 37
@@ -53,19 +55,15 @@ static inline void pat_disable(const char *reason)
53#endif 55#endif
54 56
55 57
56static int debug_enable; 58int pat_debug_enable;
57 59
58static int __init pat_debug_setup(char *str) 60static int __init pat_debug_setup(char *str)
59{ 61{
60 debug_enable = 1; 62 pat_debug_enable = 1;
61 return 0; 63 return 0;
62} 64}
63__setup("debugpat", pat_debug_setup); 65__setup("debugpat", pat_debug_setup);
64 66
65#define dprintk(fmt, arg...) \
66 do { if (debug_enable) printk(KERN_INFO fmt, ##arg); } while (0)
67
68
69static u64 __read_mostly boot_pat_state; 67static u64 __read_mostly boot_pat_state;
70 68
71enum { 69enum {
@@ -132,84 +130,7 @@ void pat_init(void)
132 130
133#undef PAT 131#undef PAT
134 132
135static char *cattr_name(unsigned long flags) 133static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */
136{
137 switch (flags & _PAGE_CACHE_MASK) {
138 case _PAGE_CACHE_UC: return "uncached";
139 case _PAGE_CACHE_UC_MINUS: return "uncached-minus";
140 case _PAGE_CACHE_WB: return "write-back";
141 case _PAGE_CACHE_WC: return "write-combining";
142 default: return "broken";
143 }
144}
145
146/*
147 * The global memtype list keeps track of memory type for specific
148 * physical memory areas. Conflicting memory types in different
149 * mappings can cause CPU cache corruption. To avoid this we keep track.
150 *
151 * The list is sorted based on starting address and can contain multiple
152 * entries for each address (this allows reference counting for overlapping
153 * areas). All the aliases have the same cache attributes of course.
154 * Zero attributes are represented as holes.
155 *
156 * The data structure is a list that is also organized as an rbtree
157 * sorted on the start address of memtype range.
158 *
159 * memtype_lock protects both the linear list and rbtree.
160 */
161
162struct memtype {
163 u64 start;
164 u64 end;
165 unsigned long type;
166 struct list_head nd;
167 struct rb_node rb;
168};
169
170static struct rb_root memtype_rbroot = RB_ROOT;
171static LIST_HEAD(memtype_list);
172static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */
173
174static struct memtype *memtype_rb_search(struct rb_root *root, u64 start)
175{
176 struct rb_node *node = root->rb_node;
177 struct memtype *last_lower = NULL;
178
179 while (node) {
180 struct memtype *data = container_of(node, struct memtype, rb);
181
182 if (data->start < start) {
183 last_lower = data;
184 node = node->rb_right;
185 } else if (data->start > start) {
186 node = node->rb_left;
187 } else
188 return data;
189 }
190
191 /* Will return NULL if there is no entry with its start <= start */
192 return last_lower;
193}
194
195static void memtype_rb_insert(struct rb_root *root, struct memtype *data)
196{
197 struct rb_node **new = &(root->rb_node);
198 struct rb_node *parent = NULL;
199
200 while (*new) {
201 struct memtype *this = container_of(*new, struct memtype, rb);
202
203 parent = *new;
204 if (data->start <= this->start)
205 new = &((*new)->rb_left);
206 else if (data->start > this->start)
207 new = &((*new)->rb_right);
208 }
209
210 rb_link_node(&data->rb, parent, new);
211 rb_insert_color(&data->rb, root);
212}
213 134
214/* 135/*
215 * Does intersection of PAT memory type and MTRR memory type and returns 136 * Does intersection of PAT memory type and MTRR memory type and returns
@@ -237,33 +158,6 @@ static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type)
237 return req_type; 158 return req_type;
238} 159}
239 160
240static int
241chk_conflict(struct memtype *new, struct memtype *entry, unsigned long *type)
242{
243 if (new->type != entry->type) {
244 if (type) {
245 new->type = entry->type;
246 *type = entry->type;
247 } else
248 goto conflict;
249 }
250
251 /* check overlaps with more than one entry in the list */
252 list_for_each_entry_continue(entry, &memtype_list, nd) {
253 if (new->end <= entry->start)
254 break;
255 else if (new->type != entry->type)
256 goto conflict;
257 }
258 return 0;
259
260 conflict:
261 printk(KERN_INFO "%s:%d conflicting memory types "
262 "%Lx-%Lx %s<->%s\n", current->comm, current->pid, new->start,
263 new->end, cattr_name(new->type), cattr_name(entry->type));
264 return -EBUSY;
265}
266
267static int pat_pagerange_is_ram(unsigned long start, unsigned long end) 161static int pat_pagerange_is_ram(unsigned long start, unsigned long end)
268{ 162{
269 int ram_page = 0, not_rampage = 0; 163 int ram_page = 0, not_rampage = 0;
@@ -296,8 +190,6 @@ static int pat_pagerange_is_ram(unsigned long start, unsigned long end)
296 * Here we do two pass: 190 * Here we do two pass:
297 * - Find the memtype of all the pages in the range, look for any conflicts 191 * - Find the memtype of all the pages in the range, look for any conflicts
298 * - In case of no conflicts, set the new memtype for pages in the range 192 * - In case of no conflicts, set the new memtype for pages in the range
299 *
300 * Caller must hold memtype_lock for atomicity.
301 */ 193 */
302static int reserve_ram_pages_type(u64 start, u64 end, unsigned long req_type, 194static int reserve_ram_pages_type(u64 start, u64 end, unsigned long req_type,
303 unsigned long *new_type) 195 unsigned long *new_type)
@@ -364,9 +256,8 @@ static int free_ram_pages_type(u64 start, u64 end)
364int reserve_memtype(u64 start, u64 end, unsigned long req_type, 256int reserve_memtype(u64 start, u64 end, unsigned long req_type,
365 unsigned long *new_type) 257 unsigned long *new_type)
366{ 258{
367 struct memtype *new, *entry; 259 struct memtype *new;
368 unsigned long actual_type; 260 unsigned long actual_type;
369 struct list_head *where;
370 int is_range_ram; 261 int is_range_ram;
371 int err = 0; 262 int err = 0;
372 263
@@ -404,9 +295,7 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
404 is_range_ram = pat_pagerange_is_ram(start, end); 295 is_range_ram = pat_pagerange_is_ram(start, end);
405 if (is_range_ram == 1) { 296 if (is_range_ram == 1) {
406 297
407 spin_lock(&memtype_lock);
408 err = reserve_ram_pages_type(start, end, req_type, new_type); 298 err = reserve_ram_pages_type(start, end, req_type, new_type);
409 spin_unlock(&memtype_lock);
410 299
411 return err; 300 return err;
412 } else if (is_range_ram < 0) { 301 } else if (is_range_ram < 0) {
@@ -423,42 +312,7 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
423 312
424 spin_lock(&memtype_lock); 313 spin_lock(&memtype_lock);
425 314
426 /* Search for existing mapping that overlaps the current range */ 315 err = rbt_memtype_check_insert(new, new_type);
427 where = NULL;
428 list_for_each_entry(entry, &memtype_list, nd) {
429 if (end <= entry->start) {
430 where = entry->nd.prev;
431 break;
432 } else if (start <= entry->start) { /* end > entry->start */
433 err = chk_conflict(new, entry, new_type);
434 if (!err) {
435 dprintk("Overlap at 0x%Lx-0x%Lx\n",
436 entry->start, entry->end);
437 where = entry->nd.prev;
438 }
439 break;
440 } else if (start < entry->end) { /* start > entry->start */
441 err = chk_conflict(new, entry, new_type);
442 if (!err) {
443 dprintk("Overlap at 0x%Lx-0x%Lx\n",
444 entry->start, entry->end);
445
446 /*
447 * Move to right position in the linked
448 * list to add this new entry
449 */
450 list_for_each_entry_continue(entry,
451 &memtype_list, nd) {
452 if (start <= entry->start) {
453 where = entry->nd.prev;
454 break;
455 }
456 }
457 }
458 break;
459 }
460 }
461
462 if (err) { 316 if (err) {
463 printk(KERN_INFO "reserve_memtype failed 0x%Lx-0x%Lx, " 317 printk(KERN_INFO "reserve_memtype failed 0x%Lx-0x%Lx, "
464 "track %s, req %s\n", 318 "track %s, req %s\n",
@@ -469,13 +323,6 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
469 return err; 323 return err;
470 } 324 }
471 325
472 if (where)
473 list_add(&new->nd, where);
474 else
475 list_add_tail(&new->nd, &memtype_list);
476
477 memtype_rb_insert(&memtype_rbroot, new);
478
479 spin_unlock(&memtype_lock); 326 spin_unlock(&memtype_lock);
480 327
481 dprintk("reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n", 328 dprintk("reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",
@@ -487,7 +334,6 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
487 334
488int free_memtype(u64 start, u64 end) 335int free_memtype(u64 start, u64 end)
489{ 336{
490 struct memtype *entry, *saved_entry;
491 int err = -EINVAL; 337 int err = -EINVAL;
492 int is_range_ram; 338 int is_range_ram;
493 339
@@ -501,9 +347,7 @@ int free_memtype(u64 start, u64 end)
501 is_range_ram = pat_pagerange_is_ram(start, end); 347 is_range_ram = pat_pagerange_is_ram(start, end);
502 if (is_range_ram == 1) { 348 if (is_range_ram == 1) {
503 349
504 spin_lock(&memtype_lock);
505 err = free_ram_pages_type(start, end); 350 err = free_ram_pages_type(start, end);
506 spin_unlock(&memtype_lock);
507 351
508 return err; 352 return err;
509 } else if (is_range_ram < 0) { 353 } else if (is_range_ram < 0) {
@@ -511,46 +355,7 @@ int free_memtype(u64 start, u64 end)
511 } 355 }
512 356
513 spin_lock(&memtype_lock); 357 spin_lock(&memtype_lock);
514 358 err = rbt_memtype_erase(start, end);
515 entry = memtype_rb_search(&memtype_rbroot, start);
516 if (unlikely(entry == NULL))
517 goto unlock_ret;
518
519 /*
520 * Saved entry points to an entry with start same or less than what
521 * we searched for. Now go through the list in both directions to look
522 * for the entry that matches with both start and end, with list stored
523 * in sorted start address
524 */
525 saved_entry = entry;
526 list_for_each_entry_from(entry, &memtype_list, nd) {
527 if (entry->start == start && entry->end == end) {
528 rb_erase(&entry->rb, &memtype_rbroot);
529 list_del(&entry->nd);
530 kfree(entry);
531 err = 0;
532 break;
533 } else if (entry->start > start) {
534 break;
535 }
536 }
537
538 if (!err)
539 goto unlock_ret;
540
541 entry = saved_entry;
542 list_for_each_entry_reverse(entry, &memtype_list, nd) {
543 if (entry->start == start && entry->end == end) {
544 rb_erase(&entry->rb, &memtype_rbroot);
545 list_del(&entry->nd);
546 kfree(entry);
547 err = 0;
548 break;
549 } else if (entry->start < start) {
550 break;
551 }
552 }
553unlock_ret:
554 spin_unlock(&memtype_lock); 359 spin_unlock(&memtype_lock);
555 360
556 if (err) { 361 if (err) {
@@ -583,10 +388,8 @@ static unsigned long lookup_memtype(u64 paddr)
583 388
584 if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) { 389 if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {
585 struct page *page; 390 struct page *page;
586 spin_lock(&memtype_lock);
587 page = pfn_to_page(paddr >> PAGE_SHIFT); 391 page = pfn_to_page(paddr >> PAGE_SHIFT);
588 rettype = get_page_memtype(page); 392 rettype = get_page_memtype(page);
589 spin_unlock(&memtype_lock);
590 /* 393 /*
591 * -1 from get_page_memtype() implies RAM page is in its 394 * -1 from get_page_memtype() implies RAM page is in its
592 * default state and not reserved, and hence of type WB 395 * default state and not reserved, and hence of type WB
@@ -599,7 +402,7 @@ static unsigned long lookup_memtype(u64 paddr)
599 402
600 spin_lock(&memtype_lock); 403 spin_lock(&memtype_lock);
601 404
602 entry = memtype_rb_search(&memtype_rbroot, paddr); 405 entry = rbt_memtype_lookup(paddr);
603 if (entry != NULL) 406 if (entry != NULL)
604 rettype = entry->type; 407 rettype = entry->type;
605 else 408 else
@@ -936,29 +739,25 @@ EXPORT_SYMBOL_GPL(pgprot_writecombine);
936 739
937#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) 740#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
938 741
939/* get Nth element of the linked list */
940static struct memtype *memtype_get_idx(loff_t pos) 742static struct memtype *memtype_get_idx(loff_t pos)
941{ 743{
942 struct memtype *list_node, *print_entry; 744 struct memtype *print_entry;
943 int i = 1; 745 int ret;
944 746
945 print_entry = kmalloc(sizeof(struct memtype), GFP_KERNEL); 747 print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL);
946 if (!print_entry) 748 if (!print_entry)
947 return NULL; 749 return NULL;
948 750
949 spin_lock(&memtype_lock); 751 spin_lock(&memtype_lock);
950 list_for_each_entry(list_node, &memtype_list, nd) { 752 ret = rbt_memtype_copy_nth_element(print_entry, pos);
951 if (pos == i) {
952 *print_entry = *list_node;
953 spin_unlock(&memtype_lock);
954 return print_entry;
955 }
956 ++i;
957 }
958 spin_unlock(&memtype_lock); 753 spin_unlock(&memtype_lock);
959 kfree(print_entry);
960 754
961 return NULL; 755 if (!ret) {
756 return print_entry;
757 } else {
758 kfree(print_entry);
759 return NULL;
760 }
962} 761}
963 762
964static void *memtype_seq_start(struct seq_file *seq, loff_t *pos) 763static void *memtype_seq_start(struct seq_file *seq, loff_t *pos)
diff --git a/arch/x86/mm/pat_internal.h b/arch/x86/mm/pat_internal.h
new file mode 100644
index 000000000000..4f39eefa3e61
--- /dev/null
+++ b/arch/x86/mm/pat_internal.h
@@ -0,0 +1,46 @@
1#ifndef __PAT_INTERNAL_H_
2#define __PAT_INTERNAL_H_
3
4extern int pat_debug_enable;
5
6#define dprintk(fmt, arg...) \
7 do { if (pat_debug_enable) printk(KERN_INFO fmt, ##arg); } while (0)
8
9struct memtype {
10 u64 start;
11 u64 end;
12 u64 subtree_max_end;
13 unsigned long type;
14 struct rb_node rb;
15};
16
17static inline char *cattr_name(unsigned long flags)
18{
19 switch (flags & _PAGE_CACHE_MASK) {
20 case _PAGE_CACHE_UC: return "uncached";
21 case _PAGE_CACHE_UC_MINUS: return "uncached-minus";
22 case _PAGE_CACHE_WB: return "write-back";
23 case _PAGE_CACHE_WC: return "write-combining";
24 default: return "broken";
25 }
26}
27
28#ifdef CONFIG_X86_PAT
29extern int rbt_memtype_check_insert(struct memtype *new,
30 unsigned long *new_type);
31extern int rbt_memtype_erase(u64 start, u64 end);
32extern struct memtype *rbt_memtype_lookup(u64 addr);
33extern int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos);
34#else
35static inline int rbt_memtype_check_insert(struct memtype *new,
36 unsigned long *new_type)
37{ return 0; }
38static inline int rbt_memtype_erase(u64 start, u64 end)
39{ return 0; }
40static inline struct memtype *rbt_memtype_lookup(u64 addr)
41{ return NULL; }
42static inline int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos)
43{ return 0; }
44#endif
45
46#endif /* __PAT_INTERNAL_H_ */
diff --git a/arch/x86/mm/pat_rbtree.c b/arch/x86/mm/pat_rbtree.c
new file mode 100644
index 000000000000..07de4cb8cc30
--- /dev/null
+++ b/arch/x86/mm/pat_rbtree.c
@@ -0,0 +1,273 @@
1/*
2 * Handle caching attributes in page tables (PAT)
3 *
4 * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
5 * Suresh B Siddha <suresh.b.siddha@intel.com>
6 *
7 * Interval tree (augmented rbtree) used to store the PAT memory type
8 * reservations.
9 */
10
11#include <linux/seq_file.h>
12#include <linux/debugfs.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/gfp.h>
18
19#include <asm/pgtable.h>
20#include <asm/pat.h>
21
22#include "pat_internal.h"
23
24/*
25 * The memtype tree keeps track of memory type for specific
26 * physical memory areas. Without proper tracking, conflicting memory
27 * types in different mappings can cause CPU cache corruption.
28 *
29 * The tree is an interval tree (augmented rbtree) with tree ordered
30 * on starting address. Tree can contain multiple entries for
31 * different regions which overlap. All the aliases have the same
32 * cache attributes of course.
33 *
34 * memtype_lock protects the rbtree.
35 */
36
37static void memtype_rb_augment_cb(struct rb_node *node);
38static struct rb_root memtype_rbroot = RB_AUGMENT_ROOT(&memtype_rb_augment_cb);
39
40static int is_node_overlap(struct memtype *node, u64 start, u64 end)
41{
42 if (node->start >= end || node->end <= start)
43 return 0;
44
45 return 1;
46}
47
48static u64 get_subtree_max_end(struct rb_node *node)
49{
50 u64 ret = 0;
51 if (node) {
52 struct memtype *data = container_of(node, struct memtype, rb);
53 ret = data->subtree_max_end;
54 }
55 return ret;
56}
57
58/* Update 'subtree_max_end' for a node, based on node and its children */
59static void update_node_max_end(struct rb_node *node)
60{
61 struct memtype *data;
62 u64 max_end, child_max_end;
63
64 if (!node)
65 return;
66
67 data = container_of(node, struct memtype, rb);
68 max_end = data->end;
69
70 child_max_end = get_subtree_max_end(node->rb_right);
71 if (child_max_end > max_end)
72 max_end = child_max_end;
73
74 child_max_end = get_subtree_max_end(node->rb_left);
75 if (child_max_end > max_end)
76 max_end = child_max_end;
77
78 data->subtree_max_end = max_end;
79}
80
81/* Update 'subtree_max_end' for a node and all its ancestors */
82static void update_path_max_end(struct rb_node *node)
83{
84 u64 old_max_end, new_max_end;
85
86 while (node) {
87 struct memtype *data = container_of(node, struct memtype, rb);
88
89 old_max_end = data->subtree_max_end;
90 update_node_max_end(node);
91 new_max_end = data->subtree_max_end;
92
93 if (new_max_end == old_max_end)
94 break;
95
96 node = rb_parent(node);
97 }
98}
99
100/* Find the first (lowest start addr) overlapping range from rb tree */
101static struct memtype *memtype_rb_lowest_match(struct rb_root *root,
102 u64 start, u64 end)
103{
104 struct rb_node *node = root->rb_node;
105 struct memtype *last_lower = NULL;
106
107 while (node) {
108 struct memtype *data = container_of(node, struct memtype, rb);
109
110 if (get_subtree_max_end(node->rb_left) > start) {
111 /* Lowest overlap if any must be on left side */
112 node = node->rb_left;
113 } else if (is_node_overlap(data, start, end)) {
114 last_lower = data;
115 break;
116 } else if (start >= data->start) {
117 /* Lowest overlap if any must be on right side */
118 node = node->rb_right;
119 } else {
120 break;
121 }
122 }
123 return last_lower; /* Returns NULL if there is no overlap */
124}
125
126static struct memtype *memtype_rb_exact_match(struct rb_root *root,
127 u64 start, u64 end)
128{
129 struct memtype *match;
130
131 match = memtype_rb_lowest_match(root, start, end);
132 while (match != NULL && match->start < end) {
133 struct rb_node *node;
134
135 if (match->start == start && match->end == end)
136 return match;
137
138 node = rb_next(&match->rb);
139 if (node)
140 match = container_of(node, struct memtype, rb);
141 else
142 match = NULL;
143 }
144
145 return NULL; /* Returns NULL if there is no exact match */
146}
147
148static int memtype_rb_check_conflict(struct rb_root *root,
149 u64 start, u64 end,
150 unsigned long reqtype, unsigned long *newtype)
151{
152 struct rb_node *node;
153 struct memtype *match;
154 int found_type = reqtype;
155
156 match = memtype_rb_lowest_match(&memtype_rbroot, start, end);
157 if (match == NULL)
158 goto success;
159
160 if (match->type != found_type && newtype == NULL)
161 goto failure;
162
163 dprintk("Overlap at 0x%Lx-0x%Lx\n", match->start, match->end);
164 found_type = match->type;
165
166 node = rb_next(&match->rb);
167 while (node) {
168 match = container_of(node, struct memtype, rb);
169
170 if (match->start >= end) /* Checked all possible matches */
171 goto success;
172
173 if (is_node_overlap(match, start, end) &&
174 match->type != found_type) {
175 goto failure;
176 }
177
178 node = rb_next(&match->rb);
179 }
180success:
181 if (newtype)
182 *newtype = found_type;
183
184 return 0;
185
186failure:
187 printk(KERN_INFO "%s:%d conflicting memory types "
188 "%Lx-%Lx %s<->%s\n", current->comm, current->pid, start,
189 end, cattr_name(found_type), cattr_name(match->type));
190 return -EBUSY;
191}
192
193static void memtype_rb_augment_cb(struct rb_node *node)
194{
195 if (node)
196 update_path_max_end(node);
197}
198
199static void memtype_rb_insert(struct rb_root *root, struct memtype *newdata)
200{
201 struct rb_node **node = &(root->rb_node);
202 struct rb_node *parent = NULL;
203
204 while (*node) {
205 struct memtype *data = container_of(*node, struct memtype, rb);
206
207 parent = *node;
208 if (newdata->start <= data->start)
209 node = &((*node)->rb_left);
210 else if (newdata->start > data->start)
211 node = &((*node)->rb_right);
212 }
213
214 rb_link_node(&newdata->rb, parent, node);
215 rb_insert_color(&newdata->rb, root);
216}
217
218int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type)
219{
220 int err = 0;
221
222 err = memtype_rb_check_conflict(&memtype_rbroot, new->start, new->end,
223 new->type, ret_type);
224
225 if (!err) {
226 if (ret_type)
227 new->type = *ret_type;
228
229 memtype_rb_insert(&memtype_rbroot, new);
230 }
231 return err;
232}
233
234int rbt_memtype_erase(u64 start, u64 end)
235{
236 struct memtype *data;
237
238 data = memtype_rb_exact_match(&memtype_rbroot, start, end);
239 if (!data)
240 return -EINVAL;
241
242 rb_erase(&data->rb, &memtype_rbroot);
243 return 0;
244}
245
246struct memtype *rbt_memtype_lookup(u64 addr)
247{
248 struct memtype *data;
249 data = memtype_rb_lowest_match(&memtype_rbroot, addr, addr + PAGE_SIZE);
250 return data;
251}
252
253#if defined(CONFIG_DEBUG_FS)
254int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos)
255{
256 struct rb_node *node;
257 int i = 1;
258
259 node = rb_first(&memtype_rbroot);
260 while (node && pos != i) {
261 node = rb_next(node);
262 i++;
263 }
264
265 if (node) { /* pos == i */
266 struct memtype *this = container_of(node, struct memtype, rb);
267 *out = *this;
268 return 0;
269 } else {
270 return 1;
271 }
272}
273#endif
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 28c68762648f..f9897f7a9ef1 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -363,6 +363,54 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
363 for (i = 0; i < MAX_NUMNODES; i++) 363 for (i = 0; i < MAX_NUMNODES; i++)
364 cutoff_node(i, start, end); 364 cutoff_node(i, start, end);
365 365
366 /*
367 * Join together blocks on the same node, holes between
368 * which don't overlap with memory on other nodes.
369 */
370 for (i = 0; i < num_node_memblks; ++i) {
371 int j, k;
372
373 for (j = i + 1; j < num_node_memblks; ++j) {
374 unsigned long start, end;
375
376 if (memblk_nodeid[i] != memblk_nodeid[j])
377 continue;
378 start = min(node_memblk_range[i].end,
379 node_memblk_range[j].end);
380 end = max(node_memblk_range[i].start,
381 node_memblk_range[j].start);
382 for (k = 0; k < num_node_memblks; ++k) {
383 if (memblk_nodeid[i] == memblk_nodeid[k])
384 continue;
385 if (start < node_memblk_range[k].end &&
386 end > node_memblk_range[k].start)
387 break;
388 }
389 if (k < num_node_memblks)
390 continue;
391 start = min(node_memblk_range[i].start,
392 node_memblk_range[j].start);
393 end = max(node_memblk_range[i].end,
394 node_memblk_range[j].end);
395 printk(KERN_INFO "SRAT: Node %d "
396 "[%Lx,%Lx) + [%Lx,%Lx) -> [%lx,%lx)\n",
397 memblk_nodeid[i],
398 node_memblk_range[i].start,
399 node_memblk_range[i].end,
400 node_memblk_range[j].start,
401 node_memblk_range[j].end,
402 start, end);
403 node_memblk_range[i].start = start;
404 node_memblk_range[i].end = end;
405 k = --num_node_memblks - j;
406 memmove(memblk_nodeid + j, memblk_nodeid + j+1,
407 k * sizeof(*memblk_nodeid));
408 memmove(node_memblk_range + j, node_memblk_range + j+1,
409 k * sizeof(*node_memblk_range));
410 --j;
411 }
412 }
413
366 memnode_shift = compute_hash_shift(node_memblk_range, num_node_memblks, 414 memnode_shift = compute_hash_shift(node_memblk_range, num_node_memblks,
367 memblk_nodeid); 415 memblk_nodeid);
368 if (memnode_shift < 0) { 416 if (memnode_shift < 0) {
@@ -461,7 +509,8 @@ void __init acpi_fake_nodes(const struct bootnode *fake_nodes, int num_nodes)
461 * node, it must now point to the fake node ID. 509 * node, it must now point to the fake node ID.
462 */ 510 */
463 for (j = 0; j < MAX_LOCAL_APIC; j++) 511 for (j = 0; j < MAX_LOCAL_APIC; j++)
464 if (apicid_to_node[j] == nid) 512 if (apicid_to_node[j] == nid &&
513 fake_apicid_to_node[j] == NUMA_NO_NODE)
465 fake_apicid_to_node[j] = i; 514 fake_apicid_to_node[j] = i;
466 } 515 }
467 for (i = 0; i < num_nodes; i++) 516 for (i = 0; i < num_nodes; i++)
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 2c505ee71014..b28d2f1253bb 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -31,8 +31,9 @@ static struct op_x86_model_spec *model;
31static DEFINE_PER_CPU(struct op_msrs, cpu_msrs); 31static DEFINE_PER_CPU(struct op_msrs, cpu_msrs);
32static DEFINE_PER_CPU(unsigned long, saved_lvtpc); 32static DEFINE_PER_CPU(unsigned long, saved_lvtpc);
33 33
34/* 0 == registered but off, 1 == registered and on */ 34/* must be protected with get_online_cpus()/put_online_cpus(): */
35static int nmi_enabled = 0; 35static int nmi_enabled;
36static int ctr_running;
36 37
37struct op_counter_config counter_config[OP_MAX_COUNTER]; 38struct op_counter_config counter_config[OP_MAX_COUNTER];
38 39
@@ -61,12 +62,16 @@ static int profile_exceptions_notify(struct notifier_block *self,
61{ 62{
62 struct die_args *args = (struct die_args *)data; 63 struct die_args *args = (struct die_args *)data;
63 int ret = NOTIFY_DONE; 64 int ret = NOTIFY_DONE;
64 int cpu = smp_processor_id();
65 65
66 switch (val) { 66 switch (val) {
67 case DIE_NMI: 67 case DIE_NMI:
68 case DIE_NMI_IPI: 68 case DIE_NMI_IPI:
69 model->check_ctrs(args->regs, &per_cpu(cpu_msrs, cpu)); 69 if (ctr_running)
70 model->check_ctrs(args->regs, &__get_cpu_var(cpu_msrs));
71 else if (!nmi_enabled)
72 break;
73 else
74 model->stop(&__get_cpu_var(cpu_msrs));
70 ret = NOTIFY_STOP; 75 ret = NOTIFY_STOP;
71 break; 76 break;
72 default: 77 default:
@@ -95,24 +100,36 @@ static void nmi_cpu_save_registers(struct op_msrs *msrs)
95static void nmi_cpu_start(void *dummy) 100static void nmi_cpu_start(void *dummy)
96{ 101{
97 struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs); 102 struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
98 model->start(msrs); 103 if (!msrs->controls)
104 WARN_ON_ONCE(1);
105 else
106 model->start(msrs);
99} 107}
100 108
101static int nmi_start(void) 109static int nmi_start(void)
102{ 110{
111 get_online_cpus();
103 on_each_cpu(nmi_cpu_start, NULL, 1); 112 on_each_cpu(nmi_cpu_start, NULL, 1);
113 ctr_running = 1;
114 put_online_cpus();
104 return 0; 115 return 0;
105} 116}
106 117
107static void nmi_cpu_stop(void *dummy) 118static void nmi_cpu_stop(void *dummy)
108{ 119{
109 struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs); 120 struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
110 model->stop(msrs); 121 if (!msrs->controls)
122 WARN_ON_ONCE(1);
123 else
124 model->stop(msrs);
111} 125}
112 126
113static void nmi_stop(void) 127static void nmi_stop(void)
114{ 128{
129 get_online_cpus();
115 on_each_cpu(nmi_cpu_stop, NULL, 1); 130 on_each_cpu(nmi_cpu_stop, NULL, 1);
131 ctr_running = 0;
132 put_online_cpus();
116} 133}
117 134
118#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX 135#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
@@ -252,7 +269,10 @@ static int nmi_switch_event(void)
252 if (nmi_multiplex_on() < 0) 269 if (nmi_multiplex_on() < 0)
253 return -EINVAL; /* not necessary */ 270 return -EINVAL; /* not necessary */
254 271
255 on_each_cpu(nmi_cpu_switch, NULL, 1); 272 get_online_cpus();
273 if (ctr_running)
274 on_each_cpu(nmi_cpu_switch, NULL, 1);
275 put_online_cpus();
256 276
257 return 0; 277 return 0;
258} 278}
@@ -295,6 +315,7 @@ static void free_msrs(void)
295 kfree(per_cpu(cpu_msrs, i).controls); 315 kfree(per_cpu(cpu_msrs, i).controls);
296 per_cpu(cpu_msrs, i).controls = NULL; 316 per_cpu(cpu_msrs, i).controls = NULL;
297 } 317 }
318 nmi_shutdown_mux();
298} 319}
299 320
300static int allocate_msrs(void) 321static int allocate_msrs(void)
@@ -307,14 +328,21 @@ static int allocate_msrs(void)
307 per_cpu(cpu_msrs, i).counters = kzalloc(counters_size, 328 per_cpu(cpu_msrs, i).counters = kzalloc(counters_size,
308 GFP_KERNEL); 329 GFP_KERNEL);
309 if (!per_cpu(cpu_msrs, i).counters) 330 if (!per_cpu(cpu_msrs, i).counters)
310 return 0; 331 goto fail;
311 per_cpu(cpu_msrs, i).controls = kzalloc(controls_size, 332 per_cpu(cpu_msrs, i).controls = kzalloc(controls_size,
312 GFP_KERNEL); 333 GFP_KERNEL);
313 if (!per_cpu(cpu_msrs, i).controls) 334 if (!per_cpu(cpu_msrs, i).controls)
314 return 0; 335 goto fail;
315 } 336 }
316 337
338 if (!nmi_setup_mux())
339 goto fail;
340
317 return 1; 341 return 1;
342
343fail:
344 free_msrs();
345 return 0;
318} 346}
319 347
320static void nmi_cpu_setup(void *dummy) 348static void nmi_cpu_setup(void *dummy)
@@ -336,49 +364,6 @@ static struct notifier_block profile_exceptions_nb = {
336 .priority = 2 364 .priority = 2
337}; 365};
338 366
339static int nmi_setup(void)
340{
341 int err = 0;
342 int cpu;
343
344 if (!allocate_msrs())
345 err = -ENOMEM;
346 else if (!nmi_setup_mux())
347 err = -ENOMEM;
348 else
349 err = register_die_notifier(&profile_exceptions_nb);
350
351 if (err) {
352 free_msrs();
353 nmi_shutdown_mux();
354 return err;
355 }
356
357 /* We need to serialize save and setup for HT because the subset
358 * of msrs are distinct for save and setup operations
359 */
360
361 /* Assume saved/restored counters are the same on all CPUs */
362 model->fill_in_addresses(&per_cpu(cpu_msrs, 0));
363 for_each_possible_cpu(cpu) {
364 if (!cpu)
365 continue;
366
367 memcpy(per_cpu(cpu_msrs, cpu).counters,
368 per_cpu(cpu_msrs, 0).counters,
369 sizeof(struct op_msr) * model->num_counters);
370
371 memcpy(per_cpu(cpu_msrs, cpu).controls,
372 per_cpu(cpu_msrs, 0).controls,
373 sizeof(struct op_msr) * model->num_controls);
374
375 mux_clone(cpu);
376 }
377 on_each_cpu(nmi_cpu_setup, NULL, 1);
378 nmi_enabled = 1;
379 return 0;
380}
381
382static void nmi_cpu_restore_registers(struct op_msrs *msrs) 367static void nmi_cpu_restore_registers(struct op_msrs *msrs)
383{ 368{
384 struct op_msr *counters = msrs->counters; 369 struct op_msr *counters = msrs->counters;
@@ -412,20 +397,24 @@ static void nmi_cpu_shutdown(void *dummy)
412 apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu)); 397 apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu));
413 apic_write(APIC_LVTERR, v); 398 apic_write(APIC_LVTERR, v);
414 nmi_cpu_restore_registers(msrs); 399 nmi_cpu_restore_registers(msrs);
400 if (model->cpu_down)
401 model->cpu_down();
415} 402}
416 403
417static void nmi_shutdown(void) 404static void nmi_cpu_up(void *dummy)
418{ 405{
419 struct op_msrs *msrs; 406 if (nmi_enabled)
407 nmi_cpu_setup(dummy);
408 if (ctr_running)
409 nmi_cpu_start(dummy);
410}
420 411
421 nmi_enabled = 0; 412static void nmi_cpu_down(void *dummy)
422 on_each_cpu(nmi_cpu_shutdown, NULL, 1); 413{
423 unregister_die_notifier(&profile_exceptions_nb); 414 if (ctr_running)
424 nmi_shutdown_mux(); 415 nmi_cpu_stop(dummy);
425 msrs = &get_cpu_var(cpu_msrs); 416 if (nmi_enabled)
426 model->shutdown(msrs); 417 nmi_cpu_shutdown(dummy);
427 free_msrs();
428 put_cpu_var(cpu_msrs);
429} 418}
430 419
431static int nmi_create_files(struct super_block *sb, struct dentry *root) 420static int nmi_create_files(struct super_block *sb, struct dentry *root)
@@ -457,7 +446,6 @@ static int nmi_create_files(struct super_block *sb, struct dentry *root)
457 return 0; 446 return 0;
458} 447}
459 448
460#ifdef CONFIG_SMP
461static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action, 449static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action,
462 void *data) 450 void *data)
463{ 451{
@@ -465,10 +453,10 @@ static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action,
465 switch (action) { 453 switch (action) {
466 case CPU_DOWN_FAILED: 454 case CPU_DOWN_FAILED:
467 case CPU_ONLINE: 455 case CPU_ONLINE:
468 smp_call_function_single(cpu, nmi_cpu_start, NULL, 0); 456 smp_call_function_single(cpu, nmi_cpu_up, NULL, 0);
469 break; 457 break;
470 case CPU_DOWN_PREPARE: 458 case CPU_DOWN_PREPARE:
471 smp_call_function_single(cpu, nmi_cpu_stop, NULL, 1); 459 smp_call_function_single(cpu, nmi_cpu_down, NULL, 1);
472 break; 460 break;
473 } 461 }
474 return NOTIFY_DONE; 462 return NOTIFY_DONE;
@@ -477,7 +465,75 @@ static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action,
477static struct notifier_block oprofile_cpu_nb = { 465static struct notifier_block oprofile_cpu_nb = {
478 .notifier_call = oprofile_cpu_notifier 466 .notifier_call = oprofile_cpu_notifier
479}; 467};
480#endif 468
469static int nmi_setup(void)
470{
471 int err = 0;
472 int cpu;
473
474 if (!allocate_msrs())
475 return -ENOMEM;
476
477 /* We need to serialize save and setup for HT because the subset
478 * of msrs are distinct for save and setup operations
479 */
480
481 /* Assume saved/restored counters are the same on all CPUs */
482 err = model->fill_in_addresses(&per_cpu(cpu_msrs, 0));
483 if (err)
484 goto fail;
485
486 for_each_possible_cpu(cpu) {
487 if (!cpu)
488 continue;
489
490 memcpy(per_cpu(cpu_msrs, cpu).counters,
491 per_cpu(cpu_msrs, 0).counters,
492 sizeof(struct op_msr) * model->num_counters);
493
494 memcpy(per_cpu(cpu_msrs, cpu).controls,
495 per_cpu(cpu_msrs, 0).controls,
496 sizeof(struct op_msr) * model->num_controls);
497
498 mux_clone(cpu);
499 }
500
501 nmi_enabled = 0;
502 ctr_running = 0;
503 barrier();
504 err = register_die_notifier(&profile_exceptions_nb);
505 if (err)
506 goto fail;
507
508 get_online_cpus();
509 register_cpu_notifier(&oprofile_cpu_nb);
510 on_each_cpu(nmi_cpu_setup, NULL, 1);
511 nmi_enabled = 1;
512 put_online_cpus();
513
514 return 0;
515fail:
516 free_msrs();
517 return err;
518}
519
520static void nmi_shutdown(void)
521{
522 struct op_msrs *msrs;
523
524 get_online_cpus();
525 unregister_cpu_notifier(&oprofile_cpu_nb);
526 on_each_cpu(nmi_cpu_shutdown, NULL, 1);
527 nmi_enabled = 0;
528 ctr_running = 0;
529 put_online_cpus();
530 barrier();
531 unregister_die_notifier(&profile_exceptions_nb);
532 msrs = &get_cpu_var(cpu_msrs);
533 model->shutdown(msrs);
534 free_msrs();
535 put_cpu_var(cpu_msrs);
536}
481 537
482#ifdef CONFIG_PM 538#ifdef CONFIG_PM
483 539
@@ -687,9 +743,6 @@ int __init op_nmi_init(struct oprofile_operations *ops)
687 return -ENODEV; 743 return -ENODEV;
688 } 744 }
689 745
690#ifdef CONFIG_SMP
691 register_cpu_notifier(&oprofile_cpu_nb);
692#endif
693 /* default values, can be overwritten by model */ 746 /* default values, can be overwritten by model */
694 ops->create_files = nmi_create_files; 747 ops->create_files = nmi_create_files;
695 ops->setup = nmi_setup; 748 ops->setup = nmi_setup;
@@ -716,12 +769,6 @@ int __init op_nmi_init(struct oprofile_operations *ops)
716 769
717void op_nmi_exit(void) 770void op_nmi_exit(void)
718{ 771{
719 if (using_nmi) { 772 if (using_nmi)
720 exit_sysfs(); 773 exit_sysfs();
721#ifdef CONFIG_SMP
722 unregister_cpu_notifier(&oprofile_cpu_nb);
723#endif
724 }
725 if (model->exit)
726 model->exit();
727} 774}
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 090cbbec7dbd..b67a6b5aa8d4 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -30,13 +30,10 @@
30#include "op_counter.h" 30#include "op_counter.h"
31 31
32#define NUM_COUNTERS 4 32#define NUM_COUNTERS 4
33#define NUM_CONTROLS 4
34#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX 33#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
35#define NUM_VIRT_COUNTERS 32 34#define NUM_VIRT_COUNTERS 32
36#define NUM_VIRT_CONTROLS 32
37#else 35#else
38#define NUM_VIRT_COUNTERS NUM_COUNTERS 36#define NUM_VIRT_COUNTERS NUM_COUNTERS
39#define NUM_VIRT_CONTROLS NUM_CONTROLS
40#endif 37#endif
41 38
42#define OP_EVENT_MASK 0x0FFF 39#define OP_EVENT_MASK 0x0FFF
@@ -105,102 +102,6 @@ static u32 get_ibs_caps(void)
105 return ibs_caps; 102 return ibs_caps;
106} 103}
107 104
108#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
109
110static void op_mux_switch_ctrl(struct op_x86_model_spec const *model,
111 struct op_msrs const * const msrs)
112{
113 u64 val;
114 int i;
115
116 /* enable active counters */
117 for (i = 0; i < NUM_COUNTERS; ++i) {
118 int virt = op_x86_phys_to_virt(i);
119 if (!reset_value[virt])
120 continue;
121 rdmsrl(msrs->controls[i].addr, val);
122 val &= model->reserved;
123 val |= op_x86_get_ctrl(model, &counter_config[virt]);
124 wrmsrl(msrs->controls[i].addr, val);
125 }
126}
127
128#endif
129
130/* functions for op_amd_spec */
131
132static void op_amd_fill_in_addresses(struct op_msrs * const msrs)
133{
134 int i;
135
136 for (i = 0; i < NUM_COUNTERS; i++) {
137 if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
138 msrs->counters[i].addr = MSR_K7_PERFCTR0 + i;
139 }
140
141 for (i = 0; i < NUM_CONTROLS; i++) {
142 if (reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i))
143 msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i;
144 }
145}
146
147static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
148 struct op_msrs const * const msrs)
149{
150 u64 val;
151 int i;
152
153 /* setup reset_value */
154 for (i = 0; i < NUM_VIRT_COUNTERS; ++i) {
155 if (counter_config[i].enabled
156 && msrs->counters[op_x86_virt_to_phys(i)].addr)
157 reset_value[i] = counter_config[i].count;
158 else
159 reset_value[i] = 0;
160 }
161
162 /* clear all counters */
163 for (i = 0; i < NUM_CONTROLS; ++i) {
164 if (unlikely(!msrs->controls[i].addr)) {
165 if (counter_config[i].enabled && !smp_processor_id())
166 /*
167 * counter is reserved, this is on all
168 * cpus, so report only for cpu #0
169 */
170 op_x86_warn_reserved(i);
171 continue;
172 }
173 rdmsrl(msrs->controls[i].addr, val);
174 if (val & ARCH_PERFMON_EVENTSEL_ENABLE)
175 op_x86_warn_in_use(i);
176 val &= model->reserved;
177 wrmsrl(msrs->controls[i].addr, val);
178 }
179
180 /* avoid a false detection of ctr overflows in NMI handler */
181 for (i = 0; i < NUM_COUNTERS; ++i) {
182 if (unlikely(!msrs->counters[i].addr))
183 continue;
184 wrmsrl(msrs->counters[i].addr, -1LL);
185 }
186
187 /* enable active counters */
188 for (i = 0; i < NUM_COUNTERS; ++i) {
189 int virt = op_x86_phys_to_virt(i);
190 if (!reset_value[virt])
191 continue;
192
193 /* setup counter registers */
194 wrmsrl(msrs->counters[i].addr, -(u64)reset_value[virt]);
195
196 /* setup control registers */
197 rdmsrl(msrs->controls[i].addr, val);
198 val &= model->reserved;
199 val |= op_x86_get_ctrl(model, &counter_config[virt]);
200 wrmsrl(msrs->controls[i].addr, val);
201 }
202}
203
204/* 105/*
205 * 16-bit Linear Feedback Shift Register (LFSR) 106 * 16-bit Linear Feedback Shift Register (LFSR)
206 * 107 *
@@ -365,6 +266,125 @@ static void op_amd_stop_ibs(void)
365 wrmsrl(MSR_AMD64_IBSOPCTL, 0); 266 wrmsrl(MSR_AMD64_IBSOPCTL, 0);
366} 267}
367 268
269#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
270
271static void op_mux_switch_ctrl(struct op_x86_model_spec const *model,
272 struct op_msrs const * const msrs)
273{
274 u64 val;
275 int i;
276
277 /* enable active counters */
278 for (i = 0; i < NUM_COUNTERS; ++i) {
279 int virt = op_x86_phys_to_virt(i);
280 if (!reset_value[virt])
281 continue;
282 rdmsrl(msrs->controls[i].addr, val);
283 val &= model->reserved;
284 val |= op_x86_get_ctrl(model, &counter_config[virt]);
285 wrmsrl(msrs->controls[i].addr, val);
286 }
287}
288
289#endif
290
291/* functions for op_amd_spec */
292
293static void op_amd_shutdown(struct op_msrs const * const msrs)
294{
295 int i;
296
297 for (i = 0; i < NUM_COUNTERS; ++i) {
298 if (!msrs->counters[i].addr)
299 continue;
300 release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
301 release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
302 }
303}
304
305static int op_amd_fill_in_addresses(struct op_msrs * const msrs)
306{
307 int i;
308
309 for (i = 0; i < NUM_COUNTERS; i++) {
310 if (!reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
311 goto fail;
312 if (!reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i)) {
313 release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
314 goto fail;
315 }
316 /* both registers must be reserved */
317 msrs->counters[i].addr = MSR_K7_PERFCTR0 + i;
318 msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i;
319 continue;
320 fail:
321 if (!counter_config[i].enabled)
322 continue;
323 op_x86_warn_reserved(i);
324 op_amd_shutdown(msrs);
325 return -EBUSY;
326 }
327
328 return 0;
329}
330
331static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
332 struct op_msrs const * const msrs)
333{
334 u64 val;
335 int i;
336
337 /* setup reset_value */
338 for (i = 0; i < NUM_VIRT_COUNTERS; ++i) {
339 if (counter_config[i].enabled
340 && msrs->counters[op_x86_virt_to_phys(i)].addr)
341 reset_value[i] = counter_config[i].count;
342 else
343 reset_value[i] = 0;
344 }
345
346 /* clear all counters */
347 for (i = 0; i < NUM_COUNTERS; ++i) {
348 if (!msrs->controls[i].addr)
349 continue;
350 rdmsrl(msrs->controls[i].addr, val);
351 if (val & ARCH_PERFMON_EVENTSEL_ENABLE)
352 op_x86_warn_in_use(i);
353 val &= model->reserved;
354 wrmsrl(msrs->controls[i].addr, val);
355 /*
356 * avoid a false detection of ctr overflows in NMI
357 * handler
358 */
359 wrmsrl(msrs->counters[i].addr, -1LL);
360 }
361
362 /* enable active counters */
363 for (i = 0; i < NUM_COUNTERS; ++i) {
364 int virt = op_x86_phys_to_virt(i);
365 if (!reset_value[virt])
366 continue;
367
368 /* setup counter registers */
369 wrmsrl(msrs->counters[i].addr, -(u64)reset_value[virt]);
370
371 /* setup control registers */
372 rdmsrl(msrs->controls[i].addr, val);
373 val &= model->reserved;
374 val |= op_x86_get_ctrl(model, &counter_config[virt]);
375 wrmsrl(msrs->controls[i].addr, val);
376 }
377
378 if (ibs_caps)
379 setup_APIC_eilvt_ibs(0, APIC_EILVT_MSG_NMI, 0);
380}
381
382static void op_amd_cpu_shutdown(void)
383{
384 if (ibs_caps)
385 setup_APIC_eilvt_ibs(0, APIC_EILVT_MSG_FIX, 1);
386}
387
368static int op_amd_check_ctrs(struct pt_regs * const regs, 388static int op_amd_check_ctrs(struct pt_regs * const regs,
369 struct op_msrs const * const msrs) 389 struct op_msrs const * const msrs)
370{ 390{
@@ -425,42 +445,16 @@ static void op_amd_stop(struct op_msrs const * const msrs)
425 op_amd_stop_ibs(); 445 op_amd_stop_ibs();
426} 446}
427 447
428static void op_amd_shutdown(struct op_msrs const * const msrs) 448static int __init_ibs_nmi(void)
429{
430 int i;
431
432 for (i = 0; i < NUM_COUNTERS; ++i) {
433 if (msrs->counters[i].addr)
434 release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
435 }
436 for (i = 0; i < NUM_CONTROLS; ++i) {
437 if (msrs->controls[i].addr)
438 release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
439 }
440}
441
442static u8 ibs_eilvt_off;
443
444static inline void apic_init_ibs_nmi_per_cpu(void *arg)
445{
446 ibs_eilvt_off = setup_APIC_eilvt_ibs(0, APIC_EILVT_MSG_NMI, 0);
447}
448
449static inline void apic_clear_ibs_nmi_per_cpu(void *arg)
450{
451 setup_APIC_eilvt_ibs(0, APIC_EILVT_MSG_FIX, 1);
452}
453
454static int init_ibs_nmi(void)
455{ 449{
456#define IBSCTL_LVTOFFSETVAL (1 << 8) 450#define IBSCTL_LVTOFFSETVAL (1 << 8)
457#define IBSCTL 0x1cc 451#define IBSCTL 0x1cc
458 struct pci_dev *cpu_cfg; 452 struct pci_dev *cpu_cfg;
459 int nodes; 453 int nodes;
460 u32 value = 0; 454 u32 value = 0;
455 u8 ibs_eilvt_off;
461 456
462 /* per CPU setup */ 457 ibs_eilvt_off = setup_APIC_eilvt_ibs(0, APIC_EILVT_MSG_FIX, 1);
463 on_each_cpu(apic_init_ibs_nmi_per_cpu, NULL, 1);
464 458
465 nodes = 0; 459 nodes = 0;
466 cpu_cfg = NULL; 460 cpu_cfg = NULL;
@@ -490,22 +484,15 @@ static int init_ibs_nmi(void)
490 return 0; 484 return 0;
491} 485}
492 486
493/* uninitialize the APIC for the IBS interrupts if needed */
494static void clear_ibs_nmi(void)
495{
496 if (ibs_caps)
497 on_each_cpu(apic_clear_ibs_nmi_per_cpu, NULL, 1);
498}
499
500/* initialize the APIC for the IBS interrupts if available */ 487/* initialize the APIC for the IBS interrupts if available */
501static void ibs_init(void) 488static void init_ibs(void)
502{ 489{
503 ibs_caps = get_ibs_caps(); 490 ibs_caps = get_ibs_caps();
504 491
505 if (!ibs_caps) 492 if (!ibs_caps)
506 return; 493 return;
507 494
508 if (init_ibs_nmi()) { 495 if (__init_ibs_nmi()) {
509 ibs_caps = 0; 496 ibs_caps = 0;
510 return; 497 return;
511 } 498 }
@@ -514,14 +501,6 @@ static void ibs_init(void)
514 (unsigned)ibs_caps); 501 (unsigned)ibs_caps);
515} 502}
516 503
517static void ibs_exit(void)
518{
519 if (!ibs_caps)
520 return;
521
522 clear_ibs_nmi();
523}
524
525static int (*create_arch_files)(struct super_block *sb, struct dentry *root); 504static int (*create_arch_files)(struct super_block *sb, struct dentry *root);
526 505
527static int setup_ibs_files(struct super_block *sb, struct dentry *root) 506static int setup_ibs_files(struct super_block *sb, struct dentry *root)
@@ -570,27 +549,22 @@ static int setup_ibs_files(struct super_block *sb, struct dentry *root)
570 549
571static int op_amd_init(struct oprofile_operations *ops) 550static int op_amd_init(struct oprofile_operations *ops)
572{ 551{
573 ibs_init(); 552 init_ibs();
574 create_arch_files = ops->create_files; 553 create_arch_files = ops->create_files;
575 ops->create_files = setup_ibs_files; 554 ops->create_files = setup_ibs_files;
576 return 0; 555 return 0;
577} 556}
578 557
579static void op_amd_exit(void)
580{
581 ibs_exit();
582}
583
584struct op_x86_model_spec op_amd_spec = { 558struct op_x86_model_spec op_amd_spec = {
585 .num_counters = NUM_COUNTERS, 559 .num_counters = NUM_COUNTERS,
586 .num_controls = NUM_CONTROLS, 560 .num_controls = NUM_COUNTERS,
587 .num_virt_counters = NUM_VIRT_COUNTERS, 561 .num_virt_counters = NUM_VIRT_COUNTERS,
588 .reserved = MSR_AMD_EVENTSEL_RESERVED, 562 .reserved = MSR_AMD_EVENTSEL_RESERVED,
589 .event_mask = OP_EVENT_MASK, 563 .event_mask = OP_EVENT_MASK,
590 .init = op_amd_init, 564 .init = op_amd_init,
591 .exit = op_amd_exit,
592 .fill_in_addresses = &op_amd_fill_in_addresses, 565 .fill_in_addresses = &op_amd_fill_in_addresses,
593 .setup_ctrs = &op_amd_setup_ctrs, 566 .setup_ctrs = &op_amd_setup_ctrs,
567 .cpu_down = &op_amd_cpu_shutdown,
594 .check_ctrs = &op_amd_check_ctrs, 568 .check_ctrs = &op_amd_check_ctrs,
595 .start = &op_amd_start, 569 .start = &op_amd_start,
596 .stop = &op_amd_stop, 570 .stop = &op_amd_stop,
diff --git a/arch/x86/oprofile/op_model_p4.c b/arch/x86/oprofile/op_model_p4.c
index e6a160a4684a..182558dd5515 100644
--- a/arch/x86/oprofile/op_model_p4.c
+++ b/arch/x86/oprofile/op_model_p4.c
@@ -385,8 +385,26 @@ static unsigned int get_stagger(void)
385 385
386static unsigned long reset_value[NUM_COUNTERS_NON_HT]; 386static unsigned long reset_value[NUM_COUNTERS_NON_HT];
387 387
388static void p4_shutdown(struct op_msrs const * const msrs)
389{
390 int i;
388 391
389static void p4_fill_in_addresses(struct op_msrs * const msrs) 392 for (i = 0; i < num_counters; ++i) {
393 if (msrs->counters[i].addr)
394 release_perfctr_nmi(msrs->counters[i].addr);
395 }
396 /*
397 * some of the control registers are specially reserved in
398 * conjunction with the counter registers (hence the starting offset).
399 * This saves a few bits.
400 */
401 for (i = num_counters; i < num_controls; ++i) {
402 if (msrs->controls[i].addr)
403 release_evntsel_nmi(msrs->controls[i].addr);
404 }
405}
406
407static int p4_fill_in_addresses(struct op_msrs * const msrs)
390{ 408{
391 unsigned int i; 409 unsigned int i;
392 unsigned int addr, cccraddr, stag; 410 unsigned int addr, cccraddr, stag;
@@ -468,6 +486,18 @@ static void p4_fill_in_addresses(struct op_msrs * const msrs)
468 msrs->controls[i++].addr = MSR_P4_CRU_ESCR5; 486 msrs->controls[i++].addr = MSR_P4_CRU_ESCR5;
469 } 487 }
470 } 488 }
489
490 for (i = 0; i < num_counters; ++i) {
491 if (!counter_config[i].enabled)
492 continue;
493 if (msrs->controls[i].addr)
494 continue;
495 op_x86_warn_reserved(i);
496 p4_shutdown(msrs);
497 return -EBUSY;
498 }
499
500 return 0;
471} 501}
472 502
473 503
@@ -668,26 +698,6 @@ static void p4_stop(struct op_msrs const * const msrs)
668 } 698 }
669} 699}
670 700
671static void p4_shutdown(struct op_msrs const * const msrs)
672{
673 int i;
674
675 for (i = 0; i < num_counters; ++i) {
676 if (msrs->counters[i].addr)
677 release_perfctr_nmi(msrs->counters[i].addr);
678 }
679 /*
680 * some of the control registers are specially reserved in
681 * conjunction with the counter registers (hence the starting offset).
682 * This saves a few bits.
683 */
684 for (i = num_counters; i < num_controls; ++i) {
685 if (msrs->controls[i].addr)
686 release_evntsel_nmi(msrs->controls[i].addr);
687 }
688}
689
690
691#ifdef CONFIG_SMP 701#ifdef CONFIG_SMP
692struct op_x86_model_spec op_p4_ht2_spec = { 702struct op_x86_model_spec op_p4_ht2_spec = {
693 .num_counters = NUM_COUNTERS_HT2, 703 .num_counters = NUM_COUNTERS_HT2,
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 2bf90fafa7b5..d769cda54082 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -30,19 +30,46 @@ static int counter_width = 32;
30 30
31static u64 *reset_value; 31static u64 *reset_value;
32 32
33static void ppro_fill_in_addresses(struct op_msrs * const msrs) 33static void ppro_shutdown(struct op_msrs const * const msrs)
34{ 34{
35 int i; 35 int i;
36 36
37 for (i = 0; i < num_counters; i++) { 37 for (i = 0; i < num_counters; ++i) {
38 if (reserve_perfctr_nmi(MSR_P6_PERFCTR0 + i)) 38 if (!msrs->counters[i].addr)
39 msrs->counters[i].addr = MSR_P6_PERFCTR0 + i; 39 continue;
40 release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
41 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i);
42 }
43 if (reset_value) {
44 kfree(reset_value);
45 reset_value = NULL;
40 } 46 }
47}
48
49static int ppro_fill_in_addresses(struct op_msrs * const msrs)
50{
51 int i;
41 52
42 for (i = 0; i < num_counters; i++) { 53 for (i = 0; i < num_counters; i++) {
43 if (reserve_evntsel_nmi(MSR_P6_EVNTSEL0 + i)) 54 if (!reserve_perfctr_nmi(MSR_P6_PERFCTR0 + i))
44 msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i; 55 goto fail;
56 if (!reserve_evntsel_nmi(MSR_P6_EVNTSEL0 + i)) {
57 release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
58 goto fail;
59 }
60 /* both registers must be reserved */
61 msrs->counters[i].addr = MSR_P6_PERFCTR0 + i;
62 msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i;
63 continue;
64 fail:
65 if (!counter_config[i].enabled)
66 continue;
67 op_x86_warn_reserved(i);
68 ppro_shutdown(msrs);
69 return -EBUSY;
45 } 70 }
71
72 return 0;
46} 73}
47 74
48 75
@@ -78,26 +105,17 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model,
78 105
79 /* clear all counters */ 106 /* clear all counters */
80 for (i = 0; i < num_counters; ++i) { 107 for (i = 0; i < num_counters; ++i) {
81 if (unlikely(!msrs->controls[i].addr)) { 108 if (!msrs->controls[i].addr)
82 if (counter_config[i].enabled && !smp_processor_id())
83 /*
84 * counter is reserved, this is on all
85 * cpus, so report only for cpu #0
86 */
87 op_x86_warn_reserved(i);
88 continue; 109 continue;
89 }
90 rdmsrl(msrs->controls[i].addr, val); 110 rdmsrl(msrs->controls[i].addr, val);
91 if (val & ARCH_PERFMON_EVENTSEL_ENABLE) 111 if (val & ARCH_PERFMON_EVENTSEL_ENABLE)
92 op_x86_warn_in_use(i); 112 op_x86_warn_in_use(i);
93 val &= model->reserved; 113 val &= model->reserved;
94 wrmsrl(msrs->controls[i].addr, val); 114 wrmsrl(msrs->controls[i].addr, val);
95 } 115 /*
96 116 * avoid a false detection of ctr overflows in NMI *
97 /* avoid a false detection of ctr overflows in NMI handler */ 117 * handler
98 for (i = 0; i < num_counters; ++i) { 118 */
99 if (unlikely(!msrs->counters[i].addr))
100 continue;
101 wrmsrl(msrs->counters[i].addr, -1LL); 119 wrmsrl(msrs->counters[i].addr, -1LL);
102 } 120 }
103 121
@@ -189,25 +207,6 @@ static void ppro_stop(struct op_msrs const * const msrs)
189 } 207 }
190} 208}
191 209
192static void ppro_shutdown(struct op_msrs const * const msrs)
193{
194 int i;
195
196 for (i = 0; i < num_counters; ++i) {
197 if (msrs->counters[i].addr)
198 release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
199 }
200 for (i = 0; i < num_counters; ++i) {
201 if (msrs->controls[i].addr)
202 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i);
203 }
204 if (reset_value) {
205 kfree(reset_value);
206 reset_value = NULL;
207 }
208}
209
210
211struct op_x86_model_spec op_ppro_spec = { 210struct op_x86_model_spec op_ppro_spec = {
212 .num_counters = 2, 211 .num_counters = 2,
213 .num_controls = 2, 212 .num_controls = 2,
@@ -239,11 +238,11 @@ static void arch_perfmon_setup_counters(void)
239 if (eax.split.version_id == 0 && current_cpu_data.x86 == 6 && 238 if (eax.split.version_id == 0 && current_cpu_data.x86 == 6 &&
240 current_cpu_data.x86_model == 15) { 239 current_cpu_data.x86_model == 15) {
241 eax.split.version_id = 2; 240 eax.split.version_id = 2;
242 eax.split.num_events = 2; 241 eax.split.num_counters = 2;
243 eax.split.bit_width = 40; 242 eax.split.bit_width = 40;
244 } 243 }
245 244
246 num_counters = eax.split.num_events; 245 num_counters = eax.split.num_counters;
247 246
248 op_arch_perfmon_spec.num_counters = num_counters; 247 op_arch_perfmon_spec.num_counters = num_counters;
249 op_arch_perfmon_spec.num_controls = num_counters; 248 op_arch_perfmon_spec.num_controls = num_counters;
diff --git a/arch/x86/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h
index ff82a755edd4..89017fa1fd63 100644
--- a/arch/x86/oprofile/op_x86_model.h
+++ b/arch/x86/oprofile/op_x86_model.h
@@ -40,10 +40,10 @@ struct op_x86_model_spec {
40 u64 reserved; 40 u64 reserved;
41 u16 event_mask; 41 u16 event_mask;
42 int (*init)(struct oprofile_operations *ops); 42 int (*init)(struct oprofile_operations *ops);
43 void (*exit)(void); 43 int (*fill_in_addresses)(struct op_msrs * const msrs);
44 void (*fill_in_addresses)(struct op_msrs * const msrs);
45 void (*setup_ctrs)(struct op_x86_model_spec const *model, 44 void (*setup_ctrs)(struct op_x86_model_spec const *model,
46 struct op_msrs const * const msrs); 45 struct op_msrs const * const msrs);
46 void (*cpu_down)(void);
47 int (*check_ctrs)(struct pt_regs * const regs, 47 int (*check_ctrs)(struct pt_regs * const regs,
48 struct op_msrs const * const msrs); 48 struct op_msrs const * const msrs);
49 void (*start)(struct op_msrs const * const msrs); 49 void (*start)(struct op_msrs const * const msrs);
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
index 8bf2fcb88d04..7ef3a2735df3 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/mrst.c
@@ -109,7 +109,7 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
109 decode++; 109 decode++;
110 decode = ~(decode - 1); 110 decode = ~(decode - 1);
111 } else { 111 } else {
112 decode = ~0; 112 decode = 0;
113 } 113 }
114 114
115 /* 115 /*
@@ -247,6 +247,10 @@ static void __devinit pci_fixed_bar_fixup(struct pci_dev *dev)
247 u32 size; 247 u32 size;
248 int i; 248 int i;
249 249
250 /* Must have extended configuration space */
251 if (dev->cfg_size < PCIE_CAP_OFFSET + 4)
252 return;
253
250 /* Fixup the BAR sizes for fixed BAR devices and make them unmoveable */ 254 /* Fixup the BAR sizes for fixed BAR devices and make them unmoveable */
251 offset = fixed_bar_cap(dev->bus, dev->devfn); 255 offset = fixed_bar_cap(dev->bus, dev->devfn);
252 if (!offset || PCI_DEVFN(2, 0) == dev->devfn || 256 if (!offset || PCI_DEVFN(2, 0) == dev->devfn ||
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 32764b8880b5..b3c6c59ed302 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -476,6 +476,7 @@ void xen_timer_resume(void)
476__init void xen_time_init(void) 476__init void xen_time_init(void)
477{ 477{
478 int cpu = smp_processor_id(); 478 int cpu = smp_processor_id();
479 struct timespec tp;
479 480
480 clocksource_register(&xen_clocksource); 481 clocksource_register(&xen_clocksource);
481 482
@@ -487,9 +488,8 @@ __init void xen_time_init(void)
487 } 488 }
488 489
489 /* Set initial system time with full resolution */ 490 /* Set initial system time with full resolution */
490 xen_read_wallclock(&xtime); 491 xen_read_wallclock(&tp);
491 set_normalized_timespec(&wall_to_monotonic, 492 do_settimeofday(&tp);
492 -xtime.tv_sec, -xtime.tv_nsec);
493 493
494 setup_force_cpu_cap(X86_FEATURE_TSC); 494 setup_force_cpu_cap(X86_FEATURE_TSC);
495 495
diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h
index 22d6dde42619..a96a0619d0b7 100644
--- a/arch/xtensa/include/asm/atomic.h
+++ b/arch/xtensa/include/asm/atomic.h
@@ -46,7 +46,7 @@
46 * 46 *
47 * Atomically reads the value of @v. 47 * Atomically reads the value of @v.
48 */ 48 */
49#define atomic_read(v) ((v)->counter) 49#define atomic_read(v) (*(volatile int *)&(v)->counter)
50 50
51/** 51/**
52 * atomic_set - set atomic variable 52 * atomic_set - set atomic variable
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 19f7df30937f..19df764f6399 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -60,11 +60,6 @@ static struct irqaction timer_irqaction = {
60 60
61void __init time_init(void) 61void __init time_init(void)
62{ 62{
63 /* FIXME: xtime&wall_to_monotonic are set in timekeeping_init. */
64 read_persistent_clock(&xtime);
65 set_normalized_timespec(&wall_to_monotonic,
66 -xtime.tv_sec, -xtime.tv_nsec);
67
68#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT 63#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
69 printk("Calibrating CPU frequency "); 64 printk("Calibrating CPU frequency ");
70 platform_calibrate_ccount(); 65 platform_calibrate_ccount();
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index b0a71ecee682..e4804fb05e23 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -401,11 +401,13 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
401 * driver reported one, then use it. Exit in any case. 401 * driver reported one, then use it. Exit in any case.
402 */ 402 */
403 if (gsi < 0) { 403 if (gsi < 0) {
404 u32 dev_gsi;
404 dev_warn(&dev->dev, "PCI INT %c: no GSI", pin_name(pin)); 405 dev_warn(&dev->dev, "PCI INT %c: no GSI", pin_name(pin));
405 /* Interrupt Line values above 0xF are forbidden */ 406 /* Interrupt Line values above 0xF are forbidden */
406 if (dev->irq > 0 && (dev->irq <= 0xF)) { 407 if (dev->irq > 0 && (dev->irq <= 0xF) &&
407 printk(" - using IRQ %d\n", dev->irq); 408 (acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
408 acpi_register_gsi(&dev->dev, dev->irq, 409 printk(" - using ISA IRQ %d\n", dev->irq);
410 acpi_register_gsi(&dev->dev, dev_gsi,
409 ACPI_LEVEL_SENSITIVE, 411 ACPI_LEVEL_SENSITIVE,
410 ACPI_ACTIVE_LOW); 412 ACPI_ACTIVE_LOW);
411 return 0; 413 return 0;
diff --git a/drivers/base/iommu.c b/drivers/base/iommu.c
index 8ad4ffea6920..6e6b6a11b3ce 100644
--- a/drivers/base/iommu.c
+++ b/drivers/base/iommu.c
@@ -80,20 +80,6 @@ void iommu_detach_device(struct iommu_domain *domain, struct device *dev)
80} 80}
81EXPORT_SYMBOL_GPL(iommu_detach_device); 81EXPORT_SYMBOL_GPL(iommu_detach_device);
82 82
83int iommu_map_range(struct iommu_domain *domain, unsigned long iova,
84 phys_addr_t paddr, size_t size, int prot)
85{
86 return iommu_ops->map(domain, iova, paddr, size, prot);
87}
88EXPORT_SYMBOL_GPL(iommu_map_range);
89
90void iommu_unmap_range(struct iommu_domain *domain, unsigned long iova,
91 size_t size)
92{
93 iommu_ops->unmap(domain, iova, size);
94}
95EXPORT_SYMBOL_GPL(iommu_unmap_range);
96
97phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, 83phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
98 unsigned long iova) 84 unsigned long iova)
99{ 85{
@@ -107,3 +93,32 @@ int iommu_domain_has_cap(struct iommu_domain *domain,
107 return iommu_ops->domain_has_cap(domain, cap); 93 return iommu_ops->domain_has_cap(domain, cap);
108} 94}
109EXPORT_SYMBOL_GPL(iommu_domain_has_cap); 95EXPORT_SYMBOL_GPL(iommu_domain_has_cap);
96
97int iommu_map(struct iommu_domain *domain, unsigned long iova,
98 phys_addr_t paddr, int gfp_order, int prot)
99{
100 unsigned long invalid_mask;
101 size_t size;
102
103 size = 0x1000UL << gfp_order;
104 invalid_mask = size - 1;
105
106 BUG_ON((iova | paddr) & invalid_mask);
107
108 return iommu_ops->map(domain, iova, paddr, gfp_order, prot);
109}
110EXPORT_SYMBOL_GPL(iommu_map);
111
112int iommu_unmap(struct iommu_domain *domain, unsigned long iova, int gfp_order)
113{
114 unsigned long invalid_mask;
115 size_t size;
116
117 size = 0x1000UL << gfp_order;
118 invalid_mask = size - 1;
119
120 BUG_ON(iova & invalid_mask);
121
122 return iommu_ops->unmap(domain, iova, gfp_order);
123}
124EXPORT_SYMBOL_GPL(iommu_unmap);
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 4b4b565c835f..765bcf0df3bb 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -187,7 +187,7 @@ EXPORT_SYMBOL_GPL(platform_device_alloc);
187 * released. 187 * released.
188 */ 188 */
189int platform_device_add_resources(struct platform_device *pdev, 189int platform_device_add_resources(struct platform_device *pdev,
190 struct resource *res, unsigned int num) 190 const struct resource *res, unsigned int num)
191{ 191{
192 struct resource *r; 192 struct resource *r;
193 193
@@ -367,7 +367,7 @@ EXPORT_SYMBOL_GPL(platform_device_unregister);
367 */ 367 */
368struct platform_device *platform_device_register_simple(const char *name, 368struct platform_device *platform_device_register_simple(const char *name,
369 int id, 369 int id,
370 struct resource *res, 370 const struct resource *res,
371 unsigned int num) 371 unsigned int num)
372{ 372{
373 struct platform_device *pdev; 373 struct platform_device *pdev;
@@ -1254,6 +1254,26 @@ static int __init early_platform_driver_probe_id(char *class_str,
1254 } 1254 }
1255 1255
1256 if (match) { 1256 if (match) {
1257 /*
1258 * Set up a sensible init_name to enable
1259 * dev_name() and others to be used before the
1260 * rest of the driver core is initialized.
1261 */
1262 if (!match->dev.init_name && slab_is_available()) {
1263 if (match->id != -1)
1264 match->dev.init_name =
1265 kasprintf(GFP_KERNEL, "%s.%d",
1266 match->name,
1267 match->id);
1268 else
1269 match->dev.init_name =
1270 kasprintf(GFP_KERNEL, "%s",
1271 match->name);
1272
1273 if (!match->dev.init_name)
1274 return -ENOMEM;
1275 }
1276
1257 if (epdrv->pdrv->probe(match)) 1277 if (epdrv->pdrv->probe(match))
1258 pr_warning("%s: unable to probe %s early.\n", 1278 pr_warning("%s: unable to probe %s early.\n",
1259 class_str, match->name); 1279 class_str, match->name);
diff --git a/drivers/block/amiflop.c b/drivers/block/amiflop.c
index 0182a22c423a..832798aa14f6 100644
--- a/drivers/block/amiflop.c
+++ b/drivers/block/amiflop.c
@@ -66,6 +66,7 @@
66#include <linux/blkdev.h> 66#include <linux/blkdev.h>
67#include <linux/elevator.h> 67#include <linux/elevator.h>
68#include <linux/interrupt.h> 68#include <linux/interrupt.h>
69#include <linux/platform_device.h>
69 70
70#include <asm/setup.h> 71#include <asm/setup.h>
71#include <asm/uaccess.h> 72#include <asm/uaccess.h>
@@ -1696,34 +1697,18 @@ static struct kobject *floppy_find(dev_t dev, int *part, void *data)
1696 return get_disk(unit[drive].gendisk); 1697 return get_disk(unit[drive].gendisk);
1697} 1698}
1698 1699
1699static int __init amiga_floppy_init(void) 1700static int __init amiga_floppy_probe(struct platform_device *pdev)
1700{ 1701{
1701 int i, ret; 1702 int i, ret;
1702 1703
1703 if (!MACH_IS_AMIGA)
1704 return -ENODEV;
1705
1706 if (!AMIGAHW_PRESENT(AMI_FLOPPY))
1707 return -ENODEV;
1708
1709 if (register_blkdev(FLOPPY_MAJOR,"fd")) 1704 if (register_blkdev(FLOPPY_MAJOR,"fd"))
1710 return -EBUSY; 1705 return -EBUSY;
1711 1706
1712 /*
1713 * We request DSKPTR, DSKLEN and DSKDATA only, because the other
1714 * floppy registers are too spreaded over the custom register space
1715 */
1716 ret = -EBUSY;
1717 if (!request_mem_region(CUSTOM_PHYSADDR+0x20, 8, "amiflop [Paula]")) {
1718 printk("fd: cannot get floppy registers\n");
1719 goto out_blkdev;
1720 }
1721
1722 ret = -ENOMEM; 1707 ret = -ENOMEM;
1723 if ((raw_buf = (char *)amiga_chip_alloc (RAW_BUF_SIZE, "Floppy")) == 1708 if ((raw_buf = (char *)amiga_chip_alloc (RAW_BUF_SIZE, "Floppy")) ==
1724 NULL) { 1709 NULL) {
1725 printk("fd: cannot get chip mem buffer\n"); 1710 printk("fd: cannot get chip mem buffer\n");
1726 goto out_memregion; 1711 goto out_blkdev;
1727 } 1712 }
1728 1713
1729 ret = -EBUSY; 1714 ret = -EBUSY;
@@ -1792,18 +1777,13 @@ out_irq2:
1792 free_irq(IRQ_AMIGA_DSKBLK, NULL); 1777 free_irq(IRQ_AMIGA_DSKBLK, NULL);
1793out_irq: 1778out_irq:
1794 amiga_chip_free(raw_buf); 1779 amiga_chip_free(raw_buf);
1795out_memregion:
1796 release_mem_region(CUSTOM_PHYSADDR+0x20, 8);
1797out_blkdev: 1780out_blkdev:
1798 unregister_blkdev(FLOPPY_MAJOR,"fd"); 1781 unregister_blkdev(FLOPPY_MAJOR,"fd");
1799 return ret; 1782 return ret;
1800} 1783}
1801 1784
1802module_init(amiga_floppy_init);
1803#ifdef MODULE
1804
1805#if 0 /* not safe to unload */ 1785#if 0 /* not safe to unload */
1806void cleanup_module(void) 1786static int __exit amiga_floppy_remove(struct platform_device *pdev)
1807{ 1787{
1808 int i; 1788 int i;
1809 1789
@@ -1820,12 +1800,25 @@ void cleanup_module(void)
1820 custom.dmacon = DMAF_DISK; /* disable DMA */ 1800 custom.dmacon = DMAF_DISK; /* disable DMA */
1821 amiga_chip_free(raw_buf); 1801 amiga_chip_free(raw_buf);
1822 blk_cleanup_queue(floppy_queue); 1802 blk_cleanup_queue(floppy_queue);
1823 release_mem_region(CUSTOM_PHYSADDR+0x20, 8);
1824 unregister_blkdev(FLOPPY_MAJOR, "fd"); 1803 unregister_blkdev(FLOPPY_MAJOR, "fd");
1825} 1804}
1826#endif 1805#endif
1827 1806
1828#else 1807static struct platform_driver amiga_floppy_driver = {
1808 .driver = {
1809 .name = "amiga-floppy",
1810 .owner = THIS_MODULE,
1811 },
1812};
1813
1814static int __init amiga_floppy_init(void)
1815{
1816 return platform_driver_probe(&amiga_floppy_driver, amiga_floppy_probe);
1817}
1818
1819module_init(amiga_floppy_init);
1820
1821#ifndef MODULE
1829static int __init amiga_floppy_setup (char *str) 1822static int __init amiga_floppy_setup (char *str)
1830{ 1823{
1831 int n; 1824 int n;
@@ -1840,3 +1833,5 @@ static int __init amiga_floppy_setup (char *str)
1840 1833
1841__setup("floppy=", amiga_floppy_setup); 1834__setup("floppy=", amiga_floppy_setup);
1842#endif 1835#endif
1836
1837MODULE_ALIAS("platform:amiga-floppy");
diff --git a/drivers/block/hd.c b/drivers/block/hd.c
index 034e6dfc878c..81c78b3ce2df 100644
--- a/drivers/block/hd.c
+++ b/drivers/block/hd.c
@@ -164,12 +164,12 @@ unsigned long read_timer(void)
164 unsigned long t, flags; 164 unsigned long t, flags;
165 int i; 165 int i;
166 166
167 spin_lock_irqsave(&i8253_lock, flags); 167 raw_spin_lock_irqsave(&i8253_lock, flags);
168 t = jiffies * 11932; 168 t = jiffies * 11932;
169 outb_p(0, 0x43); 169 outb_p(0, 0x43);
170 i = inb_p(0x40); 170 i = inb_p(0x40);
171 i |= inb(0x40) << 8; 171 i |= inb(0x40) << 8;
172 spin_unlock_irqrestore(&i8253_lock, flags); 172 raw_spin_unlock_irqrestore(&i8253_lock, flags);
173 return(t - i); 173 return(t - i);
174} 174}
175#endif 175#endif
diff --git a/drivers/char/i8k.c b/drivers/char/i8k.c
index fc8cf7ac7f2b..4cd8b227c11f 100644
--- a/drivers/char/i8k.c
+++ b/drivers/char/i8k.c
@@ -23,6 +23,7 @@
23#include <linux/seq_file.h> 23#include <linux/seq_file.h>
24#include <linux/dmi.h> 24#include <linux/dmi.h>
25#include <linux/capability.h> 25#include <linux/capability.h>
26#include <linux/smp_lock.h>
26#include <asm/uaccess.h> 27#include <asm/uaccess.h>
27#include <asm/io.h> 28#include <asm/io.h>
28 29
@@ -82,8 +83,7 @@ module_param(fan_mult, int, 0);
82MODULE_PARM_DESC(fan_mult, "Factor to multiply fan speed with"); 83MODULE_PARM_DESC(fan_mult, "Factor to multiply fan speed with");
83 84
84static int i8k_open_fs(struct inode *inode, struct file *file); 85static int i8k_open_fs(struct inode *inode, struct file *file);
85static int i8k_ioctl(struct inode *, struct file *, unsigned int, 86static long i8k_ioctl(struct file *, unsigned int, unsigned long);
86 unsigned long);
87 87
88static const struct file_operations i8k_fops = { 88static const struct file_operations i8k_fops = {
89 .owner = THIS_MODULE, 89 .owner = THIS_MODULE,
@@ -91,7 +91,7 @@ static const struct file_operations i8k_fops = {
91 .read = seq_read, 91 .read = seq_read,
92 .llseek = seq_lseek, 92 .llseek = seq_lseek,
93 .release = single_release, 93 .release = single_release,
94 .ioctl = i8k_ioctl, 94 .unlocked_ioctl = i8k_ioctl,
95}; 95};
96 96
97struct smm_regs { 97struct smm_regs {
@@ -307,8 +307,8 @@ static int i8k_get_dell_signature(int req_fn)
307 return regs.eax == 1145651527 && regs.edx == 1145392204 ? 0 : -1; 307 return regs.eax == 1145651527 && regs.edx == 1145392204 ? 0 : -1;
308} 308}
309 309
310static int i8k_ioctl(struct inode *ip, struct file *fp, unsigned int cmd, 310static int
311 unsigned long arg) 311i8k_ioctl_unlocked(struct file *fp, unsigned int cmd, unsigned long arg)
312{ 312{
313 int val = 0; 313 int val = 0;
314 int speed; 314 int speed;
@@ -395,6 +395,17 @@ static int i8k_ioctl(struct inode *ip, struct file *fp, unsigned int cmd,
395 return 0; 395 return 0;
396} 396}
397 397
398static long i8k_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
399{
400 long ret;
401
402 lock_kernel();
403 ret = i8k_ioctl_unlocked(fp, cmd, arg);
404 unlock_kernel();
405
406 return ret;
407}
408
398/* 409/*
399 * Print the information for /proc/i8k. 410 * Print the information for /proc/i8k.
400 */ 411 */
diff --git a/drivers/char/serial167.c b/drivers/char/serial167.c
index 8dfd24721a82..78a62ebe75c7 100644
--- a/drivers/char/serial167.c
+++ b/drivers/char/serial167.c
@@ -627,7 +627,6 @@ static irqreturn_t cd2401_rx_interrupt(int irq, void *dev_id)
627 char data; 627 char data;
628 int char_count; 628 int char_count;
629 int save_cnt; 629 int save_cnt;
630 int len;
631 630
632 /* determine the channel and change to that context */ 631 /* determine the channel and change to that context */
633 channel = (u_short) (base_addr[CyLICR] >> 2); 632 channel = (u_short) (base_addr[CyLICR] >> 2);
@@ -1528,7 +1527,6 @@ static int
1528cy_ioctl(struct tty_struct *tty, struct file *file, 1527cy_ioctl(struct tty_struct *tty, struct file *file,
1529 unsigned int cmd, unsigned long arg) 1528 unsigned int cmd, unsigned long arg)
1530{ 1529{
1531 unsigned long val;
1532 struct cyclades_port *info = tty->driver_data; 1530 struct cyclades_port *info = tty->driver_data;
1533 int ret_val = 0; 1531 int ret_val = 0;
1534 void __user *argp = (void __user *)arg; 1532 void __user *argp = (void __user *)arg;
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c
index 59de2525d303..d4e8b213a462 100644
--- a/drivers/char/sysrq.c
+++ b/drivers/char/sysrq.c
@@ -289,7 +289,7 @@ static struct sysrq_key_op sysrq_showstate_blocked_op = {
289 289
290static void sysrq_ftrace_dump(int key, struct tty_struct *tty) 290static void sysrq_ftrace_dump(int key, struct tty_struct *tty)
291{ 291{
292 ftrace_dump(); 292 ftrace_dump(DUMP_ALL);
293} 293}
294static struct sysrq_key_op sysrq_ftrace_dump_op = { 294static struct sysrq_key_op sysrq_ftrace_dump_op = {
295 .handler = sysrq_ftrace_dump, 295 .handler = sysrq_ftrace_dump,
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index b314a999aabe..d7be69f13154 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -154,14 +154,14 @@ static int __init cs5535_mfgpt_init(void)
154 if (cs5535_mfgpt_setup_irq(timer, MFGPT_CMP2, &timer_irq)) { 154 if (cs5535_mfgpt_setup_irq(timer, MFGPT_CMP2, &timer_irq)) {
155 printk(KERN_ERR DRV_NAME ": Could not set up IRQ %d\n", 155 printk(KERN_ERR DRV_NAME ": Could not set up IRQ %d\n",
156 timer_irq); 156 timer_irq);
157 return -EIO; 157 goto err_timer;
158 } 158 }
159 159
160 /* And register it with the kernel */ 160 /* And register it with the kernel */
161 ret = setup_irq(timer_irq, &mfgptirq); 161 ret = setup_irq(timer_irq, &mfgptirq);
162 if (ret) { 162 if (ret) {
163 printk(KERN_ERR DRV_NAME ": Unable to set up the interrupt.\n"); 163 printk(KERN_ERR DRV_NAME ": Unable to set up the interrupt.\n");
164 goto err; 164 goto err_irq;
165 } 165 }
166 166
167 /* Set the clock scale and enable the event mode for CMP2 */ 167 /* Set the clock scale and enable the event mode for CMP2 */
@@ -184,8 +184,10 @@ static int __init cs5535_mfgpt_init(void)
184 184
185 return 0; 185 return 0;
186 186
187err: 187err_irq:
188 cs5535_mfgpt_release_irq(cs5535_event_clock, MFGPT_CMP2, &timer_irq); 188 cs5535_mfgpt_release_irq(cs5535_event_clock, MFGPT_CMP2, &timer_irq);
189err_timer:
190 cs5535_mfgpt_free_timer(cs5535_event_clock);
189 printk(KERN_ERR DRV_NAME ": Unable to set up the MFGPT clock source\n"); 191 printk(KERN_ERR DRV_NAME ": Unable to set up the MFGPT clock source\n");
190 return -EIO; 192 return -EIO;
191} 193}
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index 744f748cc84b..f6677cb19789 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -150,13 +150,12 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
150 150
151static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate) 151static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
152{ 152{
153 struct sh_timer_config *cfg = p->pdev->dev.platform_data;
154 int ret; 153 int ret;
155 154
156 /* enable clock */ 155 /* enable clock */
157 ret = clk_enable(p->clk); 156 ret = clk_enable(p->clk);
158 if (ret) { 157 if (ret) {
159 pr_err("sh_cmt: cannot enable clock \"%s\"\n", cfg->clk); 158 dev_err(&p->pdev->dev, "cannot enable clock\n");
160 return ret; 159 return ret;
161 } 160 }
162 161
@@ -279,7 +278,7 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
279 delay = 1; 278 delay = 1;
280 279
281 if (!delay) 280 if (!delay)
282 pr_warning("sh_cmt: too long delay\n"); 281 dev_warn(&p->pdev->dev, "too long delay\n");
283 282
284 } while (delay); 283 } while (delay);
285} 284}
@@ -289,7 +288,7 @@ static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
289 unsigned long flags; 288 unsigned long flags;
290 289
291 if (delta > p->max_match_value) 290 if (delta > p->max_match_value)
292 pr_warning("sh_cmt: delta out of range\n"); 291 dev_warn(&p->pdev->dev, "delta out of range\n");
293 292
294 spin_lock_irqsave(&p->lock, flags); 293 spin_lock_irqsave(&p->lock, flags);
295 p->next_match_value = delta; 294 p->next_match_value = delta;
@@ -451,7 +450,7 @@ static int sh_cmt_register_clocksource(struct sh_cmt_priv *p,
451 cs->resume = sh_cmt_clocksource_resume; 450 cs->resume = sh_cmt_clocksource_resume;
452 cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8); 451 cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
453 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; 452 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
454 pr_info("sh_cmt: %s used as clock source\n", cs->name); 453 dev_info(&p->pdev->dev, "used as clock source\n");
455 clocksource_register(cs); 454 clocksource_register(cs);
456 return 0; 455 return 0;
457} 456}
@@ -497,13 +496,11 @@ static void sh_cmt_clock_event_mode(enum clock_event_mode mode,
497 496
498 switch (mode) { 497 switch (mode) {
499 case CLOCK_EVT_MODE_PERIODIC: 498 case CLOCK_EVT_MODE_PERIODIC:
500 pr_info("sh_cmt: %s used for periodic clock events\n", 499 dev_info(&p->pdev->dev, "used for periodic clock events\n");
501 ced->name);
502 sh_cmt_clock_event_start(p, 1); 500 sh_cmt_clock_event_start(p, 1);
503 break; 501 break;
504 case CLOCK_EVT_MODE_ONESHOT: 502 case CLOCK_EVT_MODE_ONESHOT:
505 pr_info("sh_cmt: %s used for oneshot clock events\n", 503 dev_info(&p->pdev->dev, "used for oneshot clock events\n");
506 ced->name);
507 sh_cmt_clock_event_start(p, 0); 504 sh_cmt_clock_event_start(p, 0);
508 break; 505 break;
509 case CLOCK_EVT_MODE_SHUTDOWN: 506 case CLOCK_EVT_MODE_SHUTDOWN:
@@ -544,7 +541,7 @@ static void sh_cmt_register_clockevent(struct sh_cmt_priv *p,
544 ced->set_next_event = sh_cmt_clock_event_next; 541 ced->set_next_event = sh_cmt_clock_event_next;
545 ced->set_mode = sh_cmt_clock_event_mode; 542 ced->set_mode = sh_cmt_clock_event_mode;
546 543
547 pr_info("sh_cmt: %s used for clock events\n", ced->name); 544 dev_info(&p->pdev->dev, "used for clock events\n");
548 clockevents_register_device(ced); 545 clockevents_register_device(ced);
549} 546}
550 547
@@ -601,22 +598,27 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
601 /* map memory, let mapbase point to our channel */ 598 /* map memory, let mapbase point to our channel */
602 p->mapbase = ioremap_nocache(res->start, resource_size(res)); 599 p->mapbase = ioremap_nocache(res->start, resource_size(res));
603 if (p->mapbase == NULL) { 600 if (p->mapbase == NULL) {
604 pr_err("sh_cmt: failed to remap I/O memory\n"); 601 dev_err(&p->pdev->dev, "failed to remap I/O memory\n");
605 goto err0; 602 goto err0;
606 } 603 }
607 604
608 /* request irq using setup_irq() (too early for request_irq()) */ 605 /* request irq using setup_irq() (too early for request_irq()) */
609 p->irqaction.name = cfg->name; 606 p->irqaction.name = dev_name(&p->pdev->dev);
610 p->irqaction.handler = sh_cmt_interrupt; 607 p->irqaction.handler = sh_cmt_interrupt;
611 p->irqaction.dev_id = p; 608 p->irqaction.dev_id = p;
612 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; 609 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | \
610 IRQF_IRQPOLL | IRQF_NOBALANCING;
613 611
614 /* get hold of clock */ 612 /* get hold of clock */
615 p->clk = clk_get(&p->pdev->dev, cfg->clk); 613 p->clk = clk_get(&p->pdev->dev, "cmt_fck");
616 if (IS_ERR(p->clk)) { 614 if (IS_ERR(p->clk)) {
617 pr_err("sh_cmt: cannot get clock \"%s\"\n", cfg->clk); 615 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n");
618 ret = PTR_ERR(p->clk); 616 p->clk = clk_get(&p->pdev->dev, cfg->clk);
619 goto err1; 617 if (IS_ERR(p->clk)) {
618 dev_err(&p->pdev->dev, "cannot get clock\n");
619 ret = PTR_ERR(p->clk);
620 goto err1;
621 }
620 } 622 }
621 623
622 if (resource_size(res) == 6) { 624 if (resource_size(res) == 6) {
@@ -629,17 +631,17 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
629 p->clear_bits = ~0xc000; 631 p->clear_bits = ~0xc000;
630 } 632 }
631 633
632 ret = sh_cmt_register(p, cfg->name, 634 ret = sh_cmt_register(p, (char *)dev_name(&p->pdev->dev),
633 cfg->clockevent_rating, 635 cfg->clockevent_rating,
634 cfg->clocksource_rating); 636 cfg->clocksource_rating);
635 if (ret) { 637 if (ret) {
636 pr_err("sh_cmt: registration failed\n"); 638 dev_err(&p->pdev->dev, "registration failed\n");
637 goto err1; 639 goto err1;
638 } 640 }
639 641
640 ret = setup_irq(irq, &p->irqaction); 642 ret = setup_irq(irq, &p->irqaction);
641 if (ret) { 643 if (ret) {
642 pr_err("sh_cmt: failed to request irq %d\n", irq); 644 dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
643 goto err1; 645 goto err1;
644 } 646 }
645 647
@@ -654,11 +656,10 @@ err0:
654static int __devinit sh_cmt_probe(struct platform_device *pdev) 656static int __devinit sh_cmt_probe(struct platform_device *pdev)
655{ 657{
656 struct sh_cmt_priv *p = platform_get_drvdata(pdev); 658 struct sh_cmt_priv *p = platform_get_drvdata(pdev);
657 struct sh_timer_config *cfg = pdev->dev.platform_data;
658 int ret; 659 int ret;
659 660
660 if (p) { 661 if (p) {
661 pr_info("sh_cmt: %s kept as earlytimer\n", cfg->name); 662 dev_info(&pdev->dev, "kept as earlytimer\n");
662 return 0; 663 return 0;
663 } 664 }
664 665
diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
index 5fb78bfd73bb..ef7a5be8a09f 100644
--- a/drivers/clocksource/sh_mtu2.c
+++ b/drivers/clocksource/sh_mtu2.c
@@ -119,13 +119,12 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
119 119
120static int sh_mtu2_enable(struct sh_mtu2_priv *p) 120static int sh_mtu2_enable(struct sh_mtu2_priv *p)
121{ 121{
122 struct sh_timer_config *cfg = p->pdev->dev.platform_data;
123 int ret; 122 int ret;
124 123
125 /* enable clock */ 124 /* enable clock */
126 ret = clk_enable(p->clk); 125 ret = clk_enable(p->clk);
127 if (ret) { 126 if (ret) {
128 pr_err("sh_mtu2: cannot enable clock \"%s\"\n", cfg->clk); 127 dev_err(&p->pdev->dev, "cannot enable clock\n");
129 return ret; 128 return ret;
130 } 129 }
131 130
@@ -194,8 +193,7 @@ static void sh_mtu2_clock_event_mode(enum clock_event_mode mode,
194 193
195 switch (mode) { 194 switch (mode) {
196 case CLOCK_EVT_MODE_PERIODIC: 195 case CLOCK_EVT_MODE_PERIODIC:
197 pr_info("sh_mtu2: %s used for periodic clock events\n", 196 dev_info(&p->pdev->dev, "used for periodic clock events\n");
198 ced->name);
199 sh_mtu2_enable(p); 197 sh_mtu2_enable(p);
200 break; 198 break;
201 case CLOCK_EVT_MODE_UNUSED: 199 case CLOCK_EVT_MODE_UNUSED:
@@ -222,13 +220,13 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_priv *p,
222 ced->cpumask = cpumask_of(0); 220 ced->cpumask = cpumask_of(0);
223 ced->set_mode = sh_mtu2_clock_event_mode; 221 ced->set_mode = sh_mtu2_clock_event_mode;
224 222
225 pr_info("sh_mtu2: %s used for clock events\n", ced->name); 223 dev_info(&p->pdev->dev, "used for clock events\n");
226 clockevents_register_device(ced); 224 clockevents_register_device(ced);
227 225
228 ret = setup_irq(p->irqaction.irq, &p->irqaction); 226 ret = setup_irq(p->irqaction.irq, &p->irqaction);
229 if (ret) { 227 if (ret) {
230 pr_err("sh_mtu2: failed to request irq %d\n", 228 dev_err(&p->pdev->dev, "failed to request irq %d\n",
231 p->irqaction.irq); 229 p->irqaction.irq);
232 return; 230 return;
233 } 231 }
234} 232}
@@ -274,26 +272,32 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
274 /* map memory, let mapbase point to our channel */ 272 /* map memory, let mapbase point to our channel */
275 p->mapbase = ioremap_nocache(res->start, resource_size(res)); 273 p->mapbase = ioremap_nocache(res->start, resource_size(res));
276 if (p->mapbase == NULL) { 274 if (p->mapbase == NULL) {
277 pr_err("sh_mtu2: failed to remap I/O memory\n"); 275 dev_err(&p->pdev->dev, "failed to remap I/O memory\n");
278 goto err0; 276 goto err0;
279 } 277 }
280 278
281 /* setup data for setup_irq() (too early for request_irq()) */ 279 /* setup data for setup_irq() (too early for request_irq()) */
282 p->irqaction.name = cfg->name; 280 p->irqaction.name = dev_name(&p->pdev->dev);
283 p->irqaction.handler = sh_mtu2_interrupt; 281 p->irqaction.handler = sh_mtu2_interrupt;
284 p->irqaction.dev_id = p; 282 p->irqaction.dev_id = p;
285 p->irqaction.irq = irq; 283 p->irqaction.irq = irq;
286 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; 284 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | \
285 IRQF_IRQPOLL | IRQF_NOBALANCING;
287 286
288 /* get hold of clock */ 287 /* get hold of clock */
289 p->clk = clk_get(&p->pdev->dev, cfg->clk); 288 p->clk = clk_get(&p->pdev->dev, "mtu2_fck");
290 if (IS_ERR(p->clk)) { 289 if (IS_ERR(p->clk)) {
291 pr_err("sh_mtu2: cannot get clock \"%s\"\n", cfg->clk); 290 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n");
292 ret = PTR_ERR(p->clk); 291 p->clk = clk_get(&p->pdev->dev, cfg->clk);
293 goto err1; 292 if (IS_ERR(p->clk)) {
293 dev_err(&p->pdev->dev, "cannot get clock\n");
294 ret = PTR_ERR(p->clk);
295 goto err1;
296 }
294 } 297 }
295 298
296 return sh_mtu2_register(p, cfg->name, cfg->clockevent_rating); 299 return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
300 cfg->clockevent_rating);
297 err1: 301 err1:
298 iounmap(p->mapbase); 302 iounmap(p->mapbase);
299 err0: 303 err0:
@@ -303,11 +307,10 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
303static int __devinit sh_mtu2_probe(struct platform_device *pdev) 307static int __devinit sh_mtu2_probe(struct platform_device *pdev)
304{ 308{
305 struct sh_mtu2_priv *p = platform_get_drvdata(pdev); 309 struct sh_mtu2_priv *p = platform_get_drvdata(pdev);
306 struct sh_timer_config *cfg = pdev->dev.platform_data;
307 int ret; 310 int ret;
308 311
309 if (p) { 312 if (p) {
310 pr_info("sh_mtu2: %s kept as earlytimer\n", cfg->name); 313 dev_info(&pdev->dev, "kept as earlytimer\n");
311 return 0; 314 return 0;
312 } 315 }
313 316
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index fc9ff1e5b770..8e44e14ec4c2 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -107,13 +107,12 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
107 107
108static int sh_tmu_enable(struct sh_tmu_priv *p) 108static int sh_tmu_enable(struct sh_tmu_priv *p)
109{ 109{
110 struct sh_timer_config *cfg = p->pdev->dev.platform_data;
111 int ret; 110 int ret;
112 111
113 /* enable clock */ 112 /* enable clock */
114 ret = clk_enable(p->clk); 113 ret = clk_enable(p->clk);
115 if (ret) { 114 if (ret) {
116 pr_err("sh_tmu: cannot enable clock \"%s\"\n", cfg->clk); 115 dev_err(&p->pdev->dev, "cannot enable clock\n");
117 return ret; 116 return ret;
118 } 117 }
119 118
@@ -229,7 +228,7 @@ static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
229 cs->disable = sh_tmu_clocksource_disable; 228 cs->disable = sh_tmu_clocksource_disable;
230 cs->mask = CLOCKSOURCE_MASK(32); 229 cs->mask = CLOCKSOURCE_MASK(32);
231 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; 230 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
232 pr_info("sh_tmu: %s used as clock source\n", cs->name); 231 dev_info(&p->pdev->dev, "used as clock source\n");
233 clocksource_register(cs); 232 clocksource_register(cs);
234 return 0; 233 return 0;
235} 234}
@@ -277,13 +276,11 @@ static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
277 276
278 switch (mode) { 277 switch (mode) {
279 case CLOCK_EVT_MODE_PERIODIC: 278 case CLOCK_EVT_MODE_PERIODIC:
280 pr_info("sh_tmu: %s used for periodic clock events\n", 279 dev_info(&p->pdev->dev, "used for periodic clock events\n");
281 ced->name);
282 sh_tmu_clock_event_start(p, 1); 280 sh_tmu_clock_event_start(p, 1);
283 break; 281 break;
284 case CLOCK_EVT_MODE_ONESHOT: 282 case CLOCK_EVT_MODE_ONESHOT:
285 pr_info("sh_tmu: %s used for oneshot clock events\n", 283 dev_info(&p->pdev->dev, "used for oneshot clock events\n");
286 ced->name);
287 sh_tmu_clock_event_start(p, 0); 284 sh_tmu_clock_event_start(p, 0);
288 break; 285 break;
289 case CLOCK_EVT_MODE_UNUSED: 286 case CLOCK_EVT_MODE_UNUSED:
@@ -324,13 +321,13 @@ static void sh_tmu_register_clockevent(struct sh_tmu_priv *p,
324 ced->set_next_event = sh_tmu_clock_event_next; 321 ced->set_next_event = sh_tmu_clock_event_next;
325 ced->set_mode = sh_tmu_clock_event_mode; 322 ced->set_mode = sh_tmu_clock_event_mode;
326 323
327 pr_info("sh_tmu: %s used for clock events\n", ced->name); 324 dev_info(&p->pdev->dev, "used for clock events\n");
328 clockevents_register_device(ced); 325 clockevents_register_device(ced);
329 326
330 ret = setup_irq(p->irqaction.irq, &p->irqaction); 327 ret = setup_irq(p->irqaction.irq, &p->irqaction);
331 if (ret) { 328 if (ret) {
332 pr_err("sh_tmu: failed to request irq %d\n", 329 dev_err(&p->pdev->dev, "failed to request irq %d\n",
333 p->irqaction.irq); 330 p->irqaction.irq);
334 return; 331 return;
335 } 332 }
336} 333}
@@ -379,26 +376,31 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
379 /* map memory, let mapbase point to our channel */ 376 /* map memory, let mapbase point to our channel */
380 p->mapbase = ioremap_nocache(res->start, resource_size(res)); 377 p->mapbase = ioremap_nocache(res->start, resource_size(res));
381 if (p->mapbase == NULL) { 378 if (p->mapbase == NULL) {
382 pr_err("sh_tmu: failed to remap I/O memory\n"); 379 dev_err(&p->pdev->dev, "failed to remap I/O memory\n");
383 goto err0; 380 goto err0;
384 } 381 }
385 382
386 /* setup data for setup_irq() (too early for request_irq()) */ 383 /* setup data for setup_irq() (too early for request_irq()) */
387 p->irqaction.name = cfg->name; 384 p->irqaction.name = dev_name(&p->pdev->dev);
388 p->irqaction.handler = sh_tmu_interrupt; 385 p->irqaction.handler = sh_tmu_interrupt;
389 p->irqaction.dev_id = p; 386 p->irqaction.dev_id = p;
390 p->irqaction.irq = irq; 387 p->irqaction.irq = irq;
391 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; 388 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | \
389 IRQF_IRQPOLL | IRQF_NOBALANCING;
392 390
393 /* get hold of clock */ 391 /* get hold of clock */
394 p->clk = clk_get(&p->pdev->dev, cfg->clk); 392 p->clk = clk_get(&p->pdev->dev, "tmu_fck");
395 if (IS_ERR(p->clk)) { 393 if (IS_ERR(p->clk)) {
396 pr_err("sh_tmu: cannot get clock \"%s\"\n", cfg->clk); 394 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n");
397 ret = PTR_ERR(p->clk); 395 p->clk = clk_get(&p->pdev->dev, cfg->clk);
398 goto err1; 396 if (IS_ERR(p->clk)) {
397 dev_err(&p->pdev->dev, "cannot get clock\n");
398 ret = PTR_ERR(p->clk);
399 goto err1;
400 }
399 } 401 }
400 402
401 return sh_tmu_register(p, cfg->name, 403 return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
402 cfg->clockevent_rating, 404 cfg->clockevent_rating,
403 cfg->clocksource_rating); 405 cfg->clocksource_rating);
404 err1: 406 err1:
@@ -410,11 +412,10 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
410static int __devinit sh_tmu_probe(struct platform_device *pdev) 412static int __devinit sh_tmu_probe(struct platform_device *pdev)
411{ 413{
412 struct sh_tmu_priv *p = platform_get_drvdata(pdev); 414 struct sh_tmu_priv *p = platform_get_drvdata(pdev);
413 struct sh_timer_config *cfg = pdev->dev.platform_data;
414 int ret; 415 int ret;
415 416
416 if (p) { 417 if (p) {
417 pr_info("sh_tmu: %s kept as earlytimer\n", cfg->name); 418 dev_info(&pdev->dev, "kept as earlytimer\n");
418 return 0; 419 return 0;
419 } 420 }
420 421
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 75d293eeb3ee..063b2184caf5 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -662,32 +662,20 @@ static ssize_t show_bios_limit(struct cpufreq_policy *policy, char *buf)
662 return sprintf(buf, "%u\n", policy->cpuinfo.max_freq); 662 return sprintf(buf, "%u\n", policy->cpuinfo.max_freq);
663} 663}
664 664
665#define define_one_ro(_name) \ 665cpufreq_freq_attr_ro_perm(cpuinfo_cur_freq, 0400);
666static struct freq_attr _name = \ 666cpufreq_freq_attr_ro(cpuinfo_min_freq);
667__ATTR(_name, 0444, show_##_name, NULL) 667cpufreq_freq_attr_ro(cpuinfo_max_freq);
668 668cpufreq_freq_attr_ro(cpuinfo_transition_latency);
669#define define_one_ro0400(_name) \ 669cpufreq_freq_attr_ro(scaling_available_governors);
670static struct freq_attr _name = \ 670cpufreq_freq_attr_ro(scaling_driver);
671__ATTR(_name, 0400, show_##_name, NULL) 671cpufreq_freq_attr_ro(scaling_cur_freq);
672 672cpufreq_freq_attr_ro(bios_limit);
673#define define_one_rw(_name) \ 673cpufreq_freq_attr_ro(related_cpus);
674static struct freq_attr _name = \ 674cpufreq_freq_attr_ro(affected_cpus);
675__ATTR(_name, 0644, show_##_name, store_##_name) 675cpufreq_freq_attr_rw(scaling_min_freq);
676 676cpufreq_freq_attr_rw(scaling_max_freq);
677define_one_ro0400(cpuinfo_cur_freq); 677cpufreq_freq_attr_rw(scaling_governor);
678define_one_ro(cpuinfo_min_freq); 678cpufreq_freq_attr_rw(scaling_setspeed);
679define_one_ro(cpuinfo_max_freq);
680define_one_ro(cpuinfo_transition_latency);
681define_one_ro(scaling_available_governors);
682define_one_ro(scaling_driver);
683define_one_ro(scaling_cur_freq);
684define_one_ro(bios_limit);
685define_one_ro(related_cpus);
686define_one_ro(affected_cpus);
687define_one_rw(scaling_min_freq);
688define_one_rw(scaling_max_freq);
689define_one_rw(scaling_governor);
690define_one_rw(scaling_setspeed);
691 679
692static struct attribute *default_attrs[] = { 680static struct attribute *default_attrs[] = {
693 &cpuinfo_min_freq.attr, 681 &cpuinfo_min_freq.attr,
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index 3a147874a465..526bfbf69611 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -178,12 +178,8 @@ static ssize_t show_sampling_rate_min(struct kobject *kobj,
178 return sprintf(buf, "%u\n", min_sampling_rate); 178 return sprintf(buf, "%u\n", min_sampling_rate);
179} 179}
180 180
181#define define_one_ro(_name) \ 181define_one_global_ro(sampling_rate_max);
182static struct global_attr _name = \ 182define_one_global_ro(sampling_rate_min);
183__ATTR(_name, 0444, show_##_name, NULL)
184
185define_one_ro(sampling_rate_max);
186define_one_ro(sampling_rate_min);
187 183
188/* cpufreq_conservative Governor Tunables */ 184/* cpufreq_conservative Governor Tunables */
189#define show_one(file_name, object) \ 185#define show_one(file_name, object) \
@@ -221,12 +217,8 @@ show_one_old(freq_step);
221show_one_old(sampling_rate_min); 217show_one_old(sampling_rate_min);
222show_one_old(sampling_rate_max); 218show_one_old(sampling_rate_max);
223 219
224#define define_one_ro_old(object, _name) \ 220cpufreq_freq_attr_ro_old(sampling_rate_min);
225static struct freq_attr object = \ 221cpufreq_freq_attr_ro_old(sampling_rate_max);
226__ATTR(_name, 0444, show_##_name##_old, NULL)
227
228define_one_ro_old(sampling_rate_min_old, sampling_rate_min);
229define_one_ro_old(sampling_rate_max_old, sampling_rate_max);
230 222
231/*** delete after deprecation time ***/ 223/*** delete after deprecation time ***/
232 224
@@ -364,16 +356,12 @@ static ssize_t store_freq_step(struct kobject *a, struct attribute *b,
364 return count; 356 return count;
365} 357}
366 358
367#define define_one_rw(_name) \ 359define_one_global_rw(sampling_rate);
368static struct global_attr _name = \ 360define_one_global_rw(sampling_down_factor);
369__ATTR(_name, 0644, show_##_name, store_##_name) 361define_one_global_rw(up_threshold);
370 362define_one_global_rw(down_threshold);
371define_one_rw(sampling_rate); 363define_one_global_rw(ignore_nice_load);
372define_one_rw(sampling_down_factor); 364define_one_global_rw(freq_step);
373define_one_rw(up_threshold);
374define_one_rw(down_threshold);
375define_one_rw(ignore_nice_load);
376define_one_rw(freq_step);
377 365
378static struct attribute *dbs_attributes[] = { 366static struct attribute *dbs_attributes[] = {
379 &sampling_rate_max.attr, 367 &sampling_rate_max.attr,
@@ -409,16 +397,12 @@ write_one_old(down_threshold);
409write_one_old(ignore_nice_load); 397write_one_old(ignore_nice_load);
410write_one_old(freq_step); 398write_one_old(freq_step);
411 399
412#define define_one_rw_old(object, _name) \ 400cpufreq_freq_attr_rw_old(sampling_rate);
413static struct freq_attr object = \ 401cpufreq_freq_attr_rw_old(sampling_down_factor);
414__ATTR(_name, 0644, show_##_name##_old, store_##_name##_old) 402cpufreq_freq_attr_rw_old(up_threshold);
415 403cpufreq_freq_attr_rw_old(down_threshold);
416define_one_rw_old(sampling_rate_old, sampling_rate); 404cpufreq_freq_attr_rw_old(ignore_nice_load);
417define_one_rw_old(sampling_down_factor_old, sampling_down_factor); 405cpufreq_freq_attr_rw_old(freq_step);
418define_one_rw_old(up_threshold_old, up_threshold);
419define_one_rw_old(down_threshold_old, down_threshold);
420define_one_rw_old(ignore_nice_load_old, ignore_nice_load);
421define_one_rw_old(freq_step_old, freq_step);
422 406
423static struct attribute *dbs_attributes_old[] = { 407static struct attribute *dbs_attributes_old[] = {
424 &sampling_rate_max_old.attr, 408 &sampling_rate_max_old.attr,
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index bd444dc93cf2..e1314212d8d4 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -73,6 +73,7 @@ enum {DBS_NORMAL_SAMPLE, DBS_SUB_SAMPLE};
73 73
74struct cpu_dbs_info_s { 74struct cpu_dbs_info_s {
75 cputime64_t prev_cpu_idle; 75 cputime64_t prev_cpu_idle;
76 cputime64_t prev_cpu_iowait;
76 cputime64_t prev_cpu_wall; 77 cputime64_t prev_cpu_wall;
77 cputime64_t prev_cpu_nice; 78 cputime64_t prev_cpu_nice;
78 struct cpufreq_policy *cur_policy; 79 struct cpufreq_policy *cur_policy;
@@ -108,6 +109,7 @@ static struct dbs_tuners {
108 unsigned int down_differential; 109 unsigned int down_differential;
109 unsigned int ignore_nice; 110 unsigned int ignore_nice;
110 unsigned int powersave_bias; 111 unsigned int powersave_bias;
112 unsigned int io_is_busy;
111} dbs_tuners_ins = { 113} dbs_tuners_ins = {
112 .up_threshold = DEF_FREQUENCY_UP_THRESHOLD, 114 .up_threshold = DEF_FREQUENCY_UP_THRESHOLD,
113 .down_differential = DEF_FREQUENCY_DOWN_DIFFERENTIAL, 115 .down_differential = DEF_FREQUENCY_DOWN_DIFFERENTIAL,
@@ -148,6 +150,16 @@ static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall)
148 return idle_time; 150 return idle_time;
149} 151}
150 152
153static inline cputime64_t get_cpu_iowait_time(unsigned int cpu, cputime64_t *wall)
154{
155 u64 iowait_time = get_cpu_iowait_time_us(cpu, wall);
156
157 if (iowait_time == -1ULL)
158 return 0;
159
160 return iowait_time;
161}
162
151/* 163/*
152 * Find right freq to be set now with powersave_bias on. 164 * Find right freq to be set now with powersave_bias on.
153 * Returns the freq_hi to be used right now and will set freq_hi_jiffies, 165 * Returns the freq_hi to be used right now and will set freq_hi_jiffies,
@@ -234,12 +246,8 @@ static ssize_t show_sampling_rate_min(struct kobject *kobj,
234 return sprintf(buf, "%u\n", min_sampling_rate); 246 return sprintf(buf, "%u\n", min_sampling_rate);
235} 247}
236 248
237#define define_one_ro(_name) \ 249define_one_global_ro(sampling_rate_max);
238static struct global_attr _name = \ 250define_one_global_ro(sampling_rate_min);
239__ATTR(_name, 0444, show_##_name, NULL)
240
241define_one_ro(sampling_rate_max);
242define_one_ro(sampling_rate_min);
243 251
244/* cpufreq_ondemand Governor Tunables */ 252/* cpufreq_ondemand Governor Tunables */
245#define show_one(file_name, object) \ 253#define show_one(file_name, object) \
@@ -249,6 +257,7 @@ static ssize_t show_##file_name \
249 return sprintf(buf, "%u\n", dbs_tuners_ins.object); \ 257 return sprintf(buf, "%u\n", dbs_tuners_ins.object); \
250} 258}
251show_one(sampling_rate, sampling_rate); 259show_one(sampling_rate, sampling_rate);
260show_one(io_is_busy, io_is_busy);
252show_one(up_threshold, up_threshold); 261show_one(up_threshold, up_threshold);
253show_one(ignore_nice_load, ignore_nice); 262show_one(ignore_nice_load, ignore_nice);
254show_one(powersave_bias, powersave_bias); 263show_one(powersave_bias, powersave_bias);
@@ -274,12 +283,8 @@ show_one_old(powersave_bias);
274show_one_old(sampling_rate_min); 283show_one_old(sampling_rate_min);
275show_one_old(sampling_rate_max); 284show_one_old(sampling_rate_max);
276 285
277#define define_one_ro_old(object, _name) \ 286cpufreq_freq_attr_ro_old(sampling_rate_min);
278static struct freq_attr object = \ 287cpufreq_freq_attr_ro_old(sampling_rate_max);
279__ATTR(_name, 0444, show_##_name##_old, NULL)
280
281define_one_ro_old(sampling_rate_min_old, sampling_rate_min);
282define_one_ro_old(sampling_rate_max_old, sampling_rate_max);
283 288
284/*** delete after deprecation time ***/ 289/*** delete after deprecation time ***/
285 290
@@ -299,6 +304,23 @@ static ssize_t store_sampling_rate(struct kobject *a, struct attribute *b,
299 return count; 304 return count;
300} 305}
301 306
307static ssize_t store_io_is_busy(struct kobject *a, struct attribute *b,
308 const char *buf, size_t count)
309{
310 unsigned int input;
311 int ret;
312
313 ret = sscanf(buf, "%u", &input);
314 if (ret != 1)
315 return -EINVAL;
316
317 mutex_lock(&dbs_mutex);
318 dbs_tuners_ins.io_is_busy = !!input;
319 mutex_unlock(&dbs_mutex);
320
321 return count;
322}
323
302static ssize_t store_up_threshold(struct kobject *a, struct attribute *b, 324static ssize_t store_up_threshold(struct kobject *a, struct attribute *b,
303 const char *buf, size_t count) 325 const char *buf, size_t count)
304{ 326{
@@ -376,14 +398,11 @@ static ssize_t store_powersave_bias(struct kobject *a, struct attribute *b,
376 return count; 398 return count;
377} 399}
378 400
379#define define_one_rw(_name) \ 401define_one_global_rw(sampling_rate);
380static struct global_attr _name = \ 402define_one_global_rw(io_is_busy);
381__ATTR(_name, 0644, show_##_name, store_##_name) 403define_one_global_rw(up_threshold);
382 404define_one_global_rw(ignore_nice_load);
383define_one_rw(sampling_rate); 405define_one_global_rw(powersave_bias);
384define_one_rw(up_threshold);
385define_one_rw(ignore_nice_load);
386define_one_rw(powersave_bias);
387 406
388static struct attribute *dbs_attributes[] = { 407static struct attribute *dbs_attributes[] = {
389 &sampling_rate_max.attr, 408 &sampling_rate_max.attr,
@@ -392,6 +411,7 @@ static struct attribute *dbs_attributes[] = {
392 &up_threshold.attr, 411 &up_threshold.attr,
393 &ignore_nice_load.attr, 412 &ignore_nice_load.attr,
394 &powersave_bias.attr, 413 &powersave_bias.attr,
414 &io_is_busy.attr,
395 NULL 415 NULL
396}; 416};
397 417
@@ -415,14 +435,10 @@ write_one_old(up_threshold);
415write_one_old(ignore_nice_load); 435write_one_old(ignore_nice_load);
416write_one_old(powersave_bias); 436write_one_old(powersave_bias);
417 437
418#define define_one_rw_old(object, _name) \ 438cpufreq_freq_attr_rw_old(sampling_rate);
419static struct freq_attr object = \ 439cpufreq_freq_attr_rw_old(up_threshold);
420__ATTR(_name, 0644, show_##_name##_old, store_##_name##_old) 440cpufreq_freq_attr_rw_old(ignore_nice_load);
421 441cpufreq_freq_attr_rw_old(powersave_bias);
422define_one_rw_old(sampling_rate_old, sampling_rate);
423define_one_rw_old(up_threshold_old, up_threshold);
424define_one_rw_old(ignore_nice_load_old, ignore_nice_load);
425define_one_rw_old(powersave_bias_old, powersave_bias);
426 442
427static struct attribute *dbs_attributes_old[] = { 443static struct attribute *dbs_attributes_old[] = {
428 &sampling_rate_max_old.attr, 444 &sampling_rate_max_old.attr,
@@ -470,14 +486,15 @@ static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
470 486
471 for_each_cpu(j, policy->cpus) { 487 for_each_cpu(j, policy->cpus) {
472 struct cpu_dbs_info_s *j_dbs_info; 488 struct cpu_dbs_info_s *j_dbs_info;
473 cputime64_t cur_wall_time, cur_idle_time; 489 cputime64_t cur_wall_time, cur_idle_time, cur_iowait_time;
474 unsigned int idle_time, wall_time; 490 unsigned int idle_time, wall_time, iowait_time;
475 unsigned int load, load_freq; 491 unsigned int load, load_freq;
476 int freq_avg; 492 int freq_avg;
477 493
478 j_dbs_info = &per_cpu(od_cpu_dbs_info, j); 494 j_dbs_info = &per_cpu(od_cpu_dbs_info, j);
479 495
480 cur_idle_time = get_cpu_idle_time(j, &cur_wall_time); 496 cur_idle_time = get_cpu_idle_time(j, &cur_wall_time);
497 cur_iowait_time = get_cpu_iowait_time(j, &cur_wall_time);
481 498
482 wall_time = (unsigned int) cputime64_sub(cur_wall_time, 499 wall_time = (unsigned int) cputime64_sub(cur_wall_time,
483 j_dbs_info->prev_cpu_wall); 500 j_dbs_info->prev_cpu_wall);
@@ -487,6 +504,10 @@ static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
487 j_dbs_info->prev_cpu_idle); 504 j_dbs_info->prev_cpu_idle);
488 j_dbs_info->prev_cpu_idle = cur_idle_time; 505 j_dbs_info->prev_cpu_idle = cur_idle_time;
489 506
507 iowait_time = (unsigned int) cputime64_sub(cur_iowait_time,
508 j_dbs_info->prev_cpu_iowait);
509 j_dbs_info->prev_cpu_iowait = cur_iowait_time;
510
490 if (dbs_tuners_ins.ignore_nice) { 511 if (dbs_tuners_ins.ignore_nice) {
491 cputime64_t cur_nice; 512 cputime64_t cur_nice;
492 unsigned long cur_nice_jiffies; 513 unsigned long cur_nice_jiffies;
@@ -504,6 +525,16 @@ static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
504 idle_time += jiffies_to_usecs(cur_nice_jiffies); 525 idle_time += jiffies_to_usecs(cur_nice_jiffies);
505 } 526 }
506 527
528 /*
529 * For the purpose of ondemand, waiting for disk IO is an
530 * indication that you're performance critical, and not that
531 * the system is actually idle. So subtract the iowait time
532 * from the cpu idle time.
533 */
534
535 if (dbs_tuners_ins.io_is_busy && idle_time >= iowait_time)
536 idle_time -= iowait_time;
537
507 if (unlikely(!wall_time || wall_time < idle_time)) 538 if (unlikely(!wall_time || wall_time < idle_time))
508 continue; 539 continue;
509 540
@@ -617,6 +648,29 @@ static inline void dbs_timer_exit(struct cpu_dbs_info_s *dbs_info)
617 cancel_delayed_work_sync(&dbs_info->work); 648 cancel_delayed_work_sync(&dbs_info->work);
618} 649}
619 650
651/*
652 * Not all CPUs want IO time to be accounted as busy; this dependson how
653 * efficient idling at a higher frequency/voltage is.
654 * Pavel Machek says this is not so for various generations of AMD and old
655 * Intel systems.
656 * Mike Chan (androidlcom) calis this is also not true for ARM.
657 * Because of this, whitelist specific known (series) of CPUs by default, and
658 * leave all others up to the user.
659 */
660static int should_io_be_busy(void)
661{
662#if defined(CONFIG_X86)
663 /*
664 * For Intel, Core 2 (model 15) andl later have an efficient idle.
665 */
666 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
667 boot_cpu_data.x86 == 6 &&
668 boot_cpu_data.x86_model >= 15)
669 return 1;
670#endif
671 return 0;
672}
673
620static int cpufreq_governor_dbs(struct cpufreq_policy *policy, 674static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
621 unsigned int event) 675 unsigned int event)
622{ 676{
@@ -679,6 +733,7 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
679 dbs_tuners_ins.sampling_rate = 733 dbs_tuners_ins.sampling_rate =
680 max(min_sampling_rate, 734 max(min_sampling_rate,
681 latency * LATENCY_MULTIPLIER); 735 latency * LATENCY_MULTIPLIER);
736 dbs_tuners_ins.io_is_busy = should_io_be_busy();
682 } 737 }
683 mutex_unlock(&dbs_mutex); 738 mutex_unlock(&dbs_mutex);
684 739
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 6f25a20de99f..323afef77802 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -26,8 +26,7 @@
26#include <linux/dma-mapping.h> 26#include <linux/dma-mapping.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/pm_runtime.h> 28#include <linux/pm_runtime.h>
29 29#include <linux/sh_dma.h>
30#include <asm/dmaengine.h>
31 30
32#include "shdma.h" 31#include "shdma.h"
33 32
@@ -45,7 +44,7 @@ enum sh_dmae_desc_status {
45#define LOG2_DEFAULT_XFER_SIZE 2 44#define LOG2_DEFAULT_XFER_SIZE 2
46 45
47/* A bitmask with bits enough for enum sh_dmae_slave_chan_id */ 46/* A bitmask with bits enough for enum sh_dmae_slave_chan_id */
48static unsigned long sh_dmae_slave_used[BITS_TO_LONGS(SHDMA_SLAVE_NUMBER)]; 47static unsigned long sh_dmae_slave_used[BITS_TO_LONGS(SH_DMA_SLAVE_NUMBER)];
49 48
50static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all); 49static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all);
51 50
@@ -190,7 +189,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
190 struct sh_dmae_device *shdev = container_of(sh_chan->common.device, 189 struct sh_dmae_device *shdev = container_of(sh_chan->common.device,
191 struct sh_dmae_device, common); 190 struct sh_dmae_device, common);
192 struct sh_dmae_pdata *pdata = shdev->pdata; 191 struct sh_dmae_pdata *pdata = shdev->pdata;
193 struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id]; 192 const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id];
194 u16 __iomem *addr = shdev->dmars + chan_pdata->dmars / sizeof(u16); 193 u16 __iomem *addr = shdev->dmars + chan_pdata->dmars / sizeof(u16);
195 int shift = chan_pdata->dmars_bit; 194 int shift = chan_pdata->dmars_bit;
196 195
@@ -266,8 +265,8 @@ static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan)
266 return NULL; 265 return NULL;
267} 266}
268 267
269static struct sh_dmae_slave_config *sh_dmae_find_slave( 268static const struct sh_dmae_slave_config *sh_dmae_find_slave(
270 struct sh_dmae_chan *sh_chan, enum sh_dmae_slave_chan_id slave_id) 269 struct sh_dmae_chan *sh_chan, struct sh_dmae_slave *param)
271{ 270{
272 struct dma_device *dma_dev = sh_chan->common.device; 271 struct dma_device *dma_dev = sh_chan->common.device;
273 struct sh_dmae_device *shdev = container_of(dma_dev, 272 struct sh_dmae_device *shdev = container_of(dma_dev,
@@ -275,11 +274,11 @@ static struct sh_dmae_slave_config *sh_dmae_find_slave(
275 struct sh_dmae_pdata *pdata = shdev->pdata; 274 struct sh_dmae_pdata *pdata = shdev->pdata;
276 int i; 275 int i;
277 276
278 if ((unsigned)slave_id >= SHDMA_SLAVE_NUMBER) 277 if (param->slave_id >= SH_DMA_SLAVE_NUMBER)
279 return NULL; 278 return NULL;
280 279
281 for (i = 0; i < pdata->slave_num; i++) 280 for (i = 0; i < pdata->slave_num; i++)
282 if (pdata->slave[i].slave_id == slave_id) 281 if (pdata->slave[i].slave_id == param->slave_id)
283 return pdata->slave + i; 282 return pdata->slave + i;
284 283
285 return NULL; 284 return NULL;
@@ -299,9 +298,9 @@ static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
299 * never runs concurrently with itself or free_chan_resources. 298 * never runs concurrently with itself or free_chan_resources.
300 */ 299 */
301 if (param) { 300 if (param) {
302 struct sh_dmae_slave_config *cfg; 301 const struct sh_dmae_slave_config *cfg;
303 302
304 cfg = sh_dmae_find_slave(sh_chan, param->slave_id); 303 cfg = sh_dmae_find_slave(sh_chan, param);
305 if (!cfg) { 304 if (!cfg) {
306 ret = -EINVAL; 305 ret = -EINVAL;
307 goto efindslave; 306 goto efindslave;
@@ -574,12 +573,14 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
574{ 573{
575 struct sh_dmae_slave *param; 574 struct sh_dmae_slave *param;
576 struct sh_dmae_chan *sh_chan; 575 struct sh_dmae_chan *sh_chan;
576 dma_addr_t slave_addr;
577 577
578 if (!chan) 578 if (!chan)
579 return NULL; 579 return NULL;
580 580
581 sh_chan = to_sh_chan(chan); 581 sh_chan = to_sh_chan(chan);
582 param = chan->private; 582 param = chan->private;
583 slave_addr = param->config->addr;
583 584
584 /* Someone calling slave DMA on a public channel? */ 585 /* Someone calling slave DMA on a public channel? */
585 if (!param || !sg_len) { 586 if (!param || !sg_len) {
@@ -592,7 +593,7 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
592 * if (param != NULL), this is a successfully requested slave channel, 593 * if (param != NULL), this is a successfully requested slave channel,
593 * therefore param->config != NULL too. 594 * therefore param->config != NULL too.
594 */ 595 */
595 return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &param->config->addr, 596 return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &slave_addr,
596 direction, flags); 597 direction, flags);
597} 598}
598 599
@@ -873,7 +874,7 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
873 int irq, unsigned long flags) 874 int irq, unsigned long flags)
874{ 875{
875 int err; 876 int err;
876 struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id]; 877 const struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id];
877 struct platform_device *pdev = to_platform_device(shdev->common.dev); 878 struct platform_device *pdev = to_platform_device(shdev->common.dev);
878 struct sh_dmae_chan *new_sh_chan; 879 struct sh_dmae_chan *new_sh_chan;
879 880
diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h
index 153609a1e96c..4021275a0a43 100644
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/shdma.h
@@ -17,8 +17,8 @@
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/list.h> 18#include <linux/list.h>
19 19
20#include <asm/dmaengine.h> 20#define SH_DMAC_MAX_CHANNELS 6
21 21#define SH_DMA_SLAVE_NUMBER 256
22#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */ 22#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
23 23
24struct device; 24struct device;
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 9c6170cd9aac..87ab0568bb0e 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -564,7 +564,7 @@ config I2C_STU300
564 564
565config I2C_VERSATILE 565config I2C_VERSATILE
566 tristate "ARM Versatile/Realview I2C bus support" 566 tristate "ARM Versatile/Realview I2C bus support"
567 depends on ARCH_VERSATILE || ARCH_REALVIEW 567 depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS
568 select I2C_ALGOBIT 568 select I2C_ALGOBIT
569 help 569 help
570 Say yes if you want to support the I2C serial bus on ARMs Versatile 570 Say yes if you want to support the I2C serial bus on ARMs Versatile
diff --git a/drivers/input/gameport/gameport.c b/drivers/input/gameport/gameport.c
index 7e18bcf05a66..46239e47a260 100644
--- a/drivers/input/gameport/gameport.c
+++ b/drivers/input/gameport/gameport.c
@@ -59,11 +59,11 @@ static unsigned int get_time_pit(void)
59 unsigned long flags; 59 unsigned long flags;
60 unsigned int count; 60 unsigned int count;
61 61
62 spin_lock_irqsave(&i8253_lock, flags); 62 raw_spin_lock_irqsave(&i8253_lock, flags);
63 outb_p(0x00, 0x43); 63 outb_p(0x00, 0x43);
64 count = inb_p(0x40); 64 count = inb_p(0x40);
65 count |= inb_p(0x40) << 8; 65 count |= inb_p(0x40) << 8;
66 spin_unlock_irqrestore(&i8253_lock, flags); 66 raw_spin_unlock_irqrestore(&i8253_lock, flags);
67 67
68 return count; 68 return count;
69} 69}
diff --git a/drivers/input/joystick/analog.c b/drivers/input/joystick/analog.c
index 1c0b529c06aa..4afe0a3b4884 100644
--- a/drivers/input/joystick/analog.c
+++ b/drivers/input/joystick/analog.c
@@ -146,11 +146,11 @@ static unsigned int get_time_pit(void)
146 unsigned long flags; 146 unsigned long flags;
147 unsigned int count; 147 unsigned int count;
148 148
149 spin_lock_irqsave(&i8253_lock, flags); 149 raw_spin_lock_irqsave(&i8253_lock, flags);
150 outb_p(0x00, 0x43); 150 outb_p(0x00, 0x43);
151 count = inb_p(0x40); 151 count = inb_p(0x40);
152 count |= inb_p(0x40) << 8; 152 count |= inb_p(0x40) << 8;
153 spin_unlock_irqrestore(&i8253_lock, flags); 153 raw_spin_unlock_irqrestore(&i8253_lock, flags);
154 154
155 return count; 155 return count;
156} 156}
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 64c102355f53..a8293388d019 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -143,19 +143,6 @@ config KEYBOARD_BFIN
143 To compile this driver as a module, choose M here: the 143 To compile this driver as a module, choose M here: the
144 module will be called bf54x-keys. 144 module will be called bf54x-keys.
145 145
146config KEYBOARD_CORGI
147 tristate "Corgi keyboard (deprecated)"
148 depends on PXA_SHARPSL
149 help
150 Say Y here to enable the keyboard on the Sharp Zaurus SL-C7xx
151 series of PDAs.
152
153 This driver is now deprecated, use generic GPIO based matrix
154 keyboard driver instead.
155
156 To compile this driver as a module, choose M here: the
157 module will be called corgikbd.
158
159config KEYBOARD_LKKBD 146config KEYBOARD_LKKBD
160 tristate "DECstation/VAXstation LK201/LK401 keyboard" 147 tristate "DECstation/VAXstation LK201/LK401 keyboard"
161 select SERIO 148 select SERIO
@@ -339,19 +326,6 @@ config KEYBOARD_PXA930_ROTARY
339 To compile this driver as a module, choose M here: the 326 To compile this driver as a module, choose M here: the
340 module will be called pxa930_rotary. 327 module will be called pxa930_rotary.
341 328
342config KEYBOARD_SPITZ
343 tristate "Spitz keyboard (deprecated)"
344 depends on PXA_SHARPSL
345 help
346 Say Y here to enable the keyboard on the Sharp Zaurus SL-C1000,
347 SL-C3000 and Sl-C3100 series of PDAs.
348
349 This driver is now deprecated, use generic GPIO based matrix
350 keyboard driver instead.
351
352 To compile this driver as a module, choose M here: the
353 module will be called spitzkbd.
354
355config KEYBOARD_STOWAWAY 329config KEYBOARD_STOWAWAY
356 tristate "Stowaway keyboard" 330 tristate "Stowaway keyboard"
357 select SERIO 331 select SERIO
@@ -414,28 +388,6 @@ config KEYBOARD_TWL4030
414 To compile this driver as a module, choose M here: the 388 To compile this driver as a module, choose M here: the
415 module will be called twl4030_keypad. 389 module will be called twl4030_keypad.
416 390
417config KEYBOARD_TOSA
418 tristate "Tosa keyboard (deprecated)"
419 depends on MACH_TOSA
420 help
421 Say Y here to enable the keyboard on the Sharp Zaurus SL-6000x (Tosa)
422
423 This driver is now deprecated, use generic GPIO based matrix
424 keyboard driver instead.
425
426 To compile this driver as a module, choose M here: the
427 module will be called tosakbd.
428
429config KEYBOARD_TOSA_USE_EXT_KEYCODES
430 bool "Tosa keyboard: use extended keycodes"
431 depends on KEYBOARD_TOSA
432 help
433 Say Y here to enable the tosa keyboard driver to generate extended
434 (>= 127) keycodes. Be aware, that they can't be correctly interpreted
435 by either console keyboard driver or by Kdrive keybd driver.
436
437 Say Y only if you know, what you are doing!
438
439config KEYBOARD_XTKBD 391config KEYBOARD_XTKBD
440 tristate "XT keyboard" 392 tristate "XT keyboard"
441 select SERIO 393 select SERIO
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 706c6b5ed5f4..9a74127e4d17 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_KEYBOARD_AMIGA) += amikbd.o
11obj-$(CONFIG_KEYBOARD_ATARI) += atakbd.o 11obj-$(CONFIG_KEYBOARD_ATARI) += atakbd.o
12obj-$(CONFIG_KEYBOARD_ATKBD) += atkbd.o 12obj-$(CONFIG_KEYBOARD_ATKBD) += atkbd.o
13obj-$(CONFIG_KEYBOARD_BFIN) += bf54x-keys.o 13obj-$(CONFIG_KEYBOARD_BFIN) += bf54x-keys.o
14obj-$(CONFIG_KEYBOARD_CORGI) += corgikbd.o
15obj-$(CONFIG_KEYBOARD_DAVINCI) += davinci_keyscan.o 14obj-$(CONFIG_KEYBOARD_DAVINCI) += davinci_keyscan.o
16obj-$(CONFIG_KEYBOARD_EP93XX) += ep93xx_keypad.o 15obj-$(CONFIG_KEYBOARD_EP93XX) += ep93xx_keypad.o
17obj-$(CONFIG_KEYBOARD_GPIO) += gpio_keys.o 16obj-$(CONFIG_KEYBOARD_GPIO) += gpio_keys.o
@@ -33,10 +32,8 @@ obj-$(CONFIG_KEYBOARD_PXA27x) += pxa27x_keypad.o
33obj-$(CONFIG_KEYBOARD_PXA930_ROTARY) += pxa930_rotary.o 32obj-$(CONFIG_KEYBOARD_PXA930_ROTARY) += pxa930_rotary.o
34obj-$(CONFIG_KEYBOARD_QT2160) += qt2160.o 33obj-$(CONFIG_KEYBOARD_QT2160) += qt2160.o
35obj-$(CONFIG_KEYBOARD_SH_KEYSC) += sh_keysc.o 34obj-$(CONFIG_KEYBOARD_SH_KEYSC) += sh_keysc.o
36obj-$(CONFIG_KEYBOARD_SPITZ) += spitzkbd.o
37obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o 35obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o
38obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o 36obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o
39obj-$(CONFIG_KEYBOARD_TOSA) += tosakbd.o
40obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o 37obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o
41obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o 38obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o
42obj-$(CONFIG_KEYBOARD_W90P910) += w90p910_keypad.o 39obj-$(CONFIG_KEYBOARD_W90P910) += w90p910_keypad.o
diff --git a/drivers/input/keyboard/corgikbd.c b/drivers/input/keyboard/corgikbd.c
deleted file mode 100644
index 634af6a8e6b3..000000000000
--- a/drivers/input/keyboard/corgikbd.c
+++ /dev/null
@@ -1,414 +0,0 @@
1/*
2 * Keyboard driver for Sharp Corgi models (SL-C7xx)
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * Based on xtkbd.c/locomkbd.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/delay.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/input.h>
18#include <linux/interrupt.h>
19#include <linux/jiffies.h>
20#include <linux/module.h>
21#include <linux/slab.h>
22
23#include <mach/corgi.h>
24#include <mach/pxa2xx-gpio.h>
25#include <asm/hardware/scoop.h>
26
27#define KB_ROWS 8
28#define KB_COLS 12
29#define KB_ROWMASK(r) (1 << (r))
30#define SCANCODE(r,c) ( ((r)<<4) + (c) + 1 )
31/* zero code, 124 scancodes */
32#define NR_SCANCODES ( SCANCODE(KB_ROWS-1,KB_COLS-1) +1 +1 )
33
34#define SCAN_INTERVAL (50) /* ms */
35#define HINGE_SCAN_INTERVAL (250) /* ms */
36
37#define CORGI_KEY_CALENDER KEY_F1
38#define CORGI_KEY_ADDRESS KEY_F2
39#define CORGI_KEY_FN KEY_F3
40#define CORGI_KEY_CANCEL KEY_F4
41#define CORGI_KEY_OFF KEY_SUSPEND
42#define CORGI_KEY_EXOK KEY_F5
43#define CORGI_KEY_EXCANCEL KEY_F6
44#define CORGI_KEY_EXJOGDOWN KEY_F7
45#define CORGI_KEY_EXJOGUP KEY_F8
46#define CORGI_KEY_JAP1 KEY_LEFTCTRL
47#define CORGI_KEY_JAP2 KEY_LEFTALT
48#define CORGI_KEY_MAIL KEY_F10
49#define CORGI_KEY_OK KEY_F11
50#define CORGI_KEY_MENU KEY_F12
51
52static unsigned char corgikbd_keycode[NR_SCANCODES] = {
53 0, /* 0 */
54 0, KEY_1, KEY_3, KEY_5, KEY_6, KEY_7, KEY_9, KEY_0, KEY_BACKSPACE, 0, 0, 0, 0, 0, 0, 0, /* 1-16 */
55 0, KEY_2, KEY_4, KEY_R, KEY_Y, KEY_8, KEY_I, KEY_O, KEY_P, 0, 0, 0, 0, 0, 0, 0, /* 17-32 */
56 KEY_TAB, KEY_Q, KEY_E, KEY_T, KEY_G, KEY_U, KEY_J, KEY_K, 0, 0, 0, 0, 0, 0, 0, 0, /* 33-48 */
57 CORGI_KEY_CALENDER, KEY_W, KEY_S, KEY_F, KEY_V, KEY_H, KEY_M, KEY_L, 0, KEY_RIGHTSHIFT, 0, 0, 0, 0, 0, 0, /* 49-64 */
58 CORGI_KEY_ADDRESS, KEY_A, KEY_D, KEY_C, KEY_B, KEY_N, KEY_DOT, 0, KEY_ENTER, 0, KEY_LEFTSHIFT, 0, 0, 0, 0, 0, /* 65-80 */
59 CORGI_KEY_MAIL, KEY_Z, KEY_X, KEY_MINUS, KEY_SPACE, KEY_COMMA, 0, KEY_UP, 0, 0, 0, CORGI_KEY_FN, 0, 0, 0, 0, /* 81-96 */
60 KEY_SYSRQ, CORGI_KEY_JAP1, CORGI_KEY_JAP2, CORGI_KEY_CANCEL, CORGI_KEY_OK, CORGI_KEY_MENU, KEY_LEFT, KEY_DOWN, KEY_RIGHT, 0, 0, 0, 0, 0, 0, 0, /* 97-112 */
61 CORGI_KEY_OFF, CORGI_KEY_EXOK, CORGI_KEY_EXCANCEL, CORGI_KEY_EXJOGDOWN, CORGI_KEY_EXJOGUP, 0, 0, 0, 0, 0, 0, 0, /* 113-124 */
62};
63
64
65struct corgikbd {
66 unsigned char keycode[ARRAY_SIZE(corgikbd_keycode)];
67 struct input_dev *input;
68
69 spinlock_t lock;
70 struct timer_list timer;
71 struct timer_list htimer;
72
73 unsigned int suspended;
74 unsigned long suspend_jiffies;
75};
76
77#define KB_DISCHARGE_DELAY 10
78#define KB_ACTIVATE_DELAY 10
79
80/* Helper functions for reading the keyboard matrix
81 * Note: We should really be using the generic gpio functions to alter
82 * GPDR but it requires a function call per GPIO bit which is
83 * excessive when we need to access 12 bits at once, multiple times.
84 * These functions must be called within local_irq_save()/local_irq_restore()
85 * or similar.
86 */
87static inline void corgikbd_discharge_all(void)
88{
89 /* STROBE All HiZ */
90 GPCR2 = CORGI_GPIO_ALL_STROBE_BIT;
91 GPDR2 &= ~CORGI_GPIO_ALL_STROBE_BIT;
92}
93
94static inline void corgikbd_activate_all(void)
95{
96 /* STROBE ALL -> High */
97 GPSR2 = CORGI_GPIO_ALL_STROBE_BIT;
98 GPDR2 |= CORGI_GPIO_ALL_STROBE_BIT;
99
100 udelay(KB_DISCHARGE_DELAY);
101
102 /* Clear any interrupts we may have triggered when altering the GPIO lines */
103 GEDR1 = CORGI_GPIO_HIGH_SENSE_BIT;
104 GEDR2 = CORGI_GPIO_LOW_SENSE_BIT;
105}
106
107static inline void corgikbd_activate_col(int col)
108{
109 /* STROBE col -> High, not col -> HiZ */
110 GPSR2 = CORGI_GPIO_STROBE_BIT(col);
111 GPDR2 = (GPDR2 & ~CORGI_GPIO_ALL_STROBE_BIT) | CORGI_GPIO_STROBE_BIT(col);
112}
113
114static inline void corgikbd_reset_col(int col)
115{
116 /* STROBE col -> Low */
117 GPCR2 = CORGI_GPIO_STROBE_BIT(col);
118 /* STROBE col -> out, not col -> HiZ */
119 GPDR2 = (GPDR2 & ~CORGI_GPIO_ALL_STROBE_BIT) | CORGI_GPIO_STROBE_BIT(col);
120}
121
122#define GET_ROWS_STATUS(c) (((GPLR1 & CORGI_GPIO_HIGH_SENSE_BIT) >> CORGI_GPIO_HIGH_SENSE_RSHIFT) | ((GPLR2 & CORGI_GPIO_LOW_SENSE_BIT) << CORGI_GPIO_LOW_SENSE_LSHIFT))
123
124/*
125 * The corgi keyboard only generates interrupts when a key is pressed.
126 * When a key is pressed, we enable a timer which then scans the
127 * keyboard to detect when the key is released.
128 */
129
130/* Scan the hardware keyboard and push any changes up through the input layer */
131static void corgikbd_scankeyboard(struct corgikbd *corgikbd_data)
132{
133 unsigned int row, col, rowd;
134 unsigned long flags;
135 unsigned int num_pressed;
136
137 if (corgikbd_data->suspended)
138 return;
139
140 spin_lock_irqsave(&corgikbd_data->lock, flags);
141
142 num_pressed = 0;
143 for (col = 0; col < KB_COLS; col++) {
144 /*
145 * Discharge the output driver capacitatance
146 * in the keyboard matrix. (Yes it is significant..)
147 */
148
149 corgikbd_discharge_all();
150 udelay(KB_DISCHARGE_DELAY);
151
152 corgikbd_activate_col(col);
153 udelay(KB_ACTIVATE_DELAY);
154
155 rowd = GET_ROWS_STATUS(col);
156 for (row = 0; row < KB_ROWS; row++) {
157 unsigned int scancode, pressed;
158
159 scancode = SCANCODE(row, col);
160 pressed = rowd & KB_ROWMASK(row);
161
162 input_report_key(corgikbd_data->input, corgikbd_data->keycode[scancode], pressed);
163
164 if (pressed)
165 num_pressed++;
166
167 if (pressed && (corgikbd_data->keycode[scancode] == CORGI_KEY_OFF)
168 && time_after(jiffies, corgikbd_data->suspend_jiffies + HZ)) {
169 input_event(corgikbd_data->input, EV_PWR, CORGI_KEY_OFF, 1);
170 corgikbd_data->suspend_jiffies=jiffies;
171 }
172 }
173 corgikbd_reset_col(col);
174 }
175
176 corgikbd_activate_all();
177
178 input_sync(corgikbd_data->input);
179
180 /* if any keys are pressed, enable the timer */
181 if (num_pressed)
182 mod_timer(&corgikbd_data->timer, jiffies + msecs_to_jiffies(SCAN_INTERVAL));
183
184 spin_unlock_irqrestore(&corgikbd_data->lock, flags);
185}
186
187/*
188 * corgi keyboard interrupt handler.
189 */
190static irqreturn_t corgikbd_interrupt(int irq, void *dev_id)
191{
192 struct corgikbd *corgikbd_data = dev_id;
193
194 if (!timer_pending(&corgikbd_data->timer)) {
195 /** wait chattering delay **/
196 udelay(20);
197 corgikbd_scankeyboard(corgikbd_data);
198 }
199
200 return IRQ_HANDLED;
201}
202
203/*
204 * corgi timer checking for released keys
205 */
206static void corgikbd_timer_callback(unsigned long data)
207{
208 struct corgikbd *corgikbd_data = (struct corgikbd *) data;
209 corgikbd_scankeyboard(corgikbd_data);
210}
211
212/*
213 * The hinge switches generate no interrupt so they need to be
214 * monitored by a timer.
215 *
216 * We debounce the switches and pass them to the input system.
217 *
218 * gprr == 0x00 - Keyboard with Landscape Screen
219 * 0x08 - No Keyboard with Portrait Screen
220 * 0x0c - Keyboard and Screen Closed
221 */
222
223#define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x))
224#define HINGE_STABLE_COUNT 2
225static int sharpsl_hinge_state;
226static int hinge_count;
227
228static void corgikbd_hinge_timer(unsigned long data)
229{
230 struct corgikbd *corgikbd_data = (struct corgikbd *) data;
231 unsigned long gprr;
232 unsigned long flags;
233
234 gprr = read_scoop_reg(&corgiscoop_device.dev, SCOOP_GPRR) & (CORGI_SCP_SWA | CORGI_SCP_SWB);
235 gprr |= (READ_GPIO_BIT(CORGI_GPIO_AK_INT) != 0);
236 if (gprr != sharpsl_hinge_state) {
237 hinge_count = 0;
238 sharpsl_hinge_state = gprr;
239 } else if (hinge_count < HINGE_STABLE_COUNT) {
240 hinge_count++;
241 if (hinge_count >= HINGE_STABLE_COUNT) {
242 spin_lock_irqsave(&corgikbd_data->lock, flags);
243
244 input_report_switch(corgikbd_data->input, SW_LID, ((sharpsl_hinge_state & CORGI_SCP_SWA) != 0));
245 input_report_switch(corgikbd_data->input, SW_TABLET_MODE, ((sharpsl_hinge_state & CORGI_SCP_SWB) != 0));
246 input_report_switch(corgikbd_data->input, SW_HEADPHONE_INSERT, (READ_GPIO_BIT(CORGI_GPIO_AK_INT) != 0));
247 input_sync(corgikbd_data->input);
248
249 spin_unlock_irqrestore(&corgikbd_data->lock, flags);
250 }
251 }
252 mod_timer(&corgikbd_data->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL));
253}
254
255#ifdef CONFIG_PM
256static int corgikbd_suspend(struct platform_device *dev, pm_message_t state)
257{
258 int i;
259 struct corgikbd *corgikbd = platform_get_drvdata(dev);
260
261 corgikbd->suspended = 1;
262 /* strobe 0 is the power key so this can't be made an input for
263 powersaving therefore i = 1 */
264 for (i = 1; i < CORGI_KEY_STROBE_NUM; i++)
265 pxa_gpio_mode(CORGI_GPIO_KEY_STROBE(i) | GPIO_IN);
266
267 return 0;
268}
269
270static int corgikbd_resume(struct platform_device *dev)
271{
272 int i;
273 struct corgikbd *corgikbd = platform_get_drvdata(dev);
274
275 for (i = 1; i < CORGI_KEY_STROBE_NUM; i++)
276 pxa_gpio_mode(CORGI_GPIO_KEY_STROBE(i) | GPIO_OUT | GPIO_DFLT_HIGH);
277
278 /* Upon resume, ignore the suspend key for a short while */
279 corgikbd->suspend_jiffies=jiffies;
280 corgikbd->suspended = 0;
281
282 return 0;
283}
284#else
285#define corgikbd_suspend NULL
286#define corgikbd_resume NULL
287#endif
288
289static int __devinit corgikbd_probe(struct platform_device *pdev)
290{
291 struct corgikbd *corgikbd;
292 struct input_dev *input_dev;
293 int i, err = -ENOMEM;
294
295 corgikbd = kzalloc(sizeof(struct corgikbd), GFP_KERNEL);
296 input_dev = input_allocate_device();
297 if (!corgikbd || !input_dev)
298 goto fail;
299
300 platform_set_drvdata(pdev, corgikbd);
301
302 corgikbd->input = input_dev;
303 spin_lock_init(&corgikbd->lock);
304
305 /* Init Keyboard rescan timer */
306 init_timer(&corgikbd->timer);
307 corgikbd->timer.function = corgikbd_timer_callback;
308 corgikbd->timer.data = (unsigned long) corgikbd;
309
310 /* Init Hinge Timer */
311 init_timer(&corgikbd->htimer);
312 corgikbd->htimer.function = corgikbd_hinge_timer;
313 corgikbd->htimer.data = (unsigned long) corgikbd;
314
315 corgikbd->suspend_jiffies=jiffies;
316
317 memcpy(corgikbd->keycode, corgikbd_keycode, sizeof(corgikbd->keycode));
318
319 input_dev->name = "Corgi Keyboard";
320 input_dev->phys = "corgikbd/input0";
321 input_dev->id.bustype = BUS_HOST;
322 input_dev->id.vendor = 0x0001;
323 input_dev->id.product = 0x0001;
324 input_dev->id.version = 0x0100;
325 input_dev->dev.parent = &pdev->dev;
326
327 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP) |
328 BIT_MASK(EV_PWR) | BIT_MASK(EV_SW);
329 input_dev->keycode = corgikbd->keycode;
330 input_dev->keycodesize = sizeof(unsigned char);
331 input_dev->keycodemax = ARRAY_SIZE(corgikbd_keycode);
332
333 for (i = 0; i < ARRAY_SIZE(corgikbd_keycode); i++)
334 set_bit(corgikbd->keycode[i], input_dev->keybit);
335 clear_bit(0, input_dev->keybit);
336 set_bit(SW_LID, input_dev->swbit);
337 set_bit(SW_TABLET_MODE, input_dev->swbit);
338 set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
339
340 err = input_register_device(corgikbd->input);
341 if (err)
342 goto fail;
343
344 mod_timer(&corgikbd->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL));
345
346 /* Setup sense interrupts - RisingEdge Detect, sense lines as inputs */
347 for (i = 0; i < CORGI_KEY_SENSE_NUM; i++) {
348 pxa_gpio_mode(CORGI_GPIO_KEY_SENSE(i) | GPIO_IN);
349 if (request_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd_interrupt,
350 IRQF_DISABLED | IRQF_TRIGGER_RISING,
351 "corgikbd", corgikbd))
352 printk(KERN_WARNING "corgikbd: Can't get IRQ: %d!\n", i);
353 }
354
355 /* Set Strobe lines as outputs - set high */
356 for (i = 0; i < CORGI_KEY_STROBE_NUM; i++)
357 pxa_gpio_mode(CORGI_GPIO_KEY_STROBE(i) | GPIO_OUT | GPIO_DFLT_HIGH);
358
359 /* Setup the headphone jack as an input */
360 pxa_gpio_mode(CORGI_GPIO_AK_INT | GPIO_IN);
361
362 return 0;
363
364 fail: input_free_device(input_dev);
365 kfree(corgikbd);
366 return err;
367}
368
369static int __devexit corgikbd_remove(struct platform_device *pdev)
370{
371 int i;
372 struct corgikbd *corgikbd = platform_get_drvdata(pdev);
373
374 for (i = 0; i < CORGI_KEY_SENSE_NUM; i++)
375 free_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd);
376
377 del_timer_sync(&corgikbd->htimer);
378 del_timer_sync(&corgikbd->timer);
379
380 input_unregister_device(corgikbd->input);
381
382 kfree(corgikbd);
383
384 return 0;
385}
386
387static struct platform_driver corgikbd_driver = {
388 .probe = corgikbd_probe,
389 .remove = __devexit_p(corgikbd_remove),
390 .suspend = corgikbd_suspend,
391 .resume = corgikbd_resume,
392 .driver = {
393 .name = "corgi-keyboard",
394 .owner = THIS_MODULE,
395 },
396};
397
398static int __init corgikbd_init(void)
399{
400 return platform_driver_register(&corgikbd_driver);
401}
402
403static void __exit corgikbd_exit(void)
404{
405 platform_driver_unregister(&corgikbd_driver);
406}
407
408module_init(corgikbd_init);
409module_exit(corgikbd_exit);
410
411MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
412MODULE_DESCRIPTION("Corgi Keyboard Driver");
413MODULE_LICENSE("GPL v2");
414MODULE_ALIAS("platform:corgi-keyboard");
diff --git a/drivers/input/keyboard/spitzkbd.c b/drivers/input/keyboard/spitzkbd.c
deleted file mode 100644
index 13967422658c..000000000000
--- a/drivers/input/keyboard/spitzkbd.c
+++ /dev/null
@@ -1,496 +0,0 @@
1/*
2 * Keyboard driver for Sharp Spitz, Borzoi and Akita (SL-Cxx00 series)
3 *
4 * Copyright (c) 2005 Richard Purdie
5 *
6 * Based on corgikbd.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/delay.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/input.h>
18#include <linux/interrupt.h>
19#include <linux/jiffies.h>
20#include <linux/module.h>
21#include <linux/slab.h>
22
23#include <mach/spitz.h>
24#include <mach/pxa2xx-gpio.h>
25
26#define KB_ROWS 7
27#define KB_COLS 11
28#define KB_ROWMASK(r) (1 << (r))
29#define SCANCODE(r,c) (((r)<<4) + (c) + 1)
30#define NR_SCANCODES ((KB_ROWS<<4) + 1)
31
32#define SCAN_INTERVAL (50) /* ms */
33#define HINGE_SCAN_INTERVAL (150) /* ms */
34
35#define SPITZ_KEY_CALENDER KEY_F1
36#define SPITZ_KEY_ADDRESS KEY_F2
37#define SPITZ_KEY_FN KEY_F3
38#define SPITZ_KEY_CANCEL KEY_F4
39#define SPITZ_KEY_EXOK KEY_F5
40#define SPITZ_KEY_EXCANCEL KEY_F6
41#define SPITZ_KEY_EXJOGDOWN KEY_F7
42#define SPITZ_KEY_EXJOGUP KEY_F8
43#define SPITZ_KEY_JAP1 KEY_LEFTALT
44#define SPITZ_KEY_JAP2 KEY_RIGHTCTRL
45#define SPITZ_KEY_SYNC KEY_F9
46#define SPITZ_KEY_MAIL KEY_F10
47#define SPITZ_KEY_OK KEY_F11
48#define SPITZ_KEY_MENU KEY_F12
49
50static unsigned char spitzkbd_keycode[NR_SCANCODES] = {
51 0, /* 0 */
52 KEY_LEFTCTRL, KEY_1, KEY_3, KEY_5, KEY_6, KEY_7, KEY_9, KEY_0, KEY_BACKSPACE, SPITZ_KEY_EXOK, SPITZ_KEY_EXCANCEL, 0, 0, 0, 0, 0, /* 1-16 */
53 0, KEY_2, KEY_4, KEY_R, KEY_Y, KEY_8, KEY_I, KEY_O, KEY_P, SPITZ_KEY_EXJOGDOWN, SPITZ_KEY_EXJOGUP, 0, 0, 0, 0, 0, /* 17-32 */
54 KEY_TAB, KEY_Q, KEY_E, KEY_T, KEY_G, KEY_U, KEY_J, KEY_K, 0, 0, 0, 0, 0, 0, 0, 0, /* 33-48 */
55 SPITZ_KEY_ADDRESS, KEY_W, KEY_S, KEY_F, KEY_V, KEY_H, KEY_M, KEY_L, 0, KEY_RIGHTSHIFT, 0, 0, 0, 0, 0, 0, /* 49-64 */
56 SPITZ_KEY_CALENDER, KEY_A, KEY_D, KEY_C, KEY_B, KEY_N, KEY_DOT, 0, KEY_ENTER, KEY_LEFTSHIFT, 0, 0, 0, 0, 0, 0, /* 65-80 */
57 SPITZ_KEY_MAIL, KEY_Z, KEY_X, KEY_MINUS, KEY_SPACE, KEY_COMMA, 0, KEY_UP, 0, 0, SPITZ_KEY_FN, 0, 0, 0, 0, 0, /* 81-96 */
58 KEY_SYSRQ, SPITZ_KEY_JAP1, SPITZ_KEY_JAP2, SPITZ_KEY_CANCEL, SPITZ_KEY_OK, SPITZ_KEY_MENU, KEY_LEFT, KEY_DOWN, KEY_RIGHT, 0, 0, 0, 0, 0, 0, 0 /* 97-112 */
59};
60
61static int spitz_strobes[] = {
62 SPITZ_GPIO_KEY_STROBE0,
63 SPITZ_GPIO_KEY_STROBE1,
64 SPITZ_GPIO_KEY_STROBE2,
65 SPITZ_GPIO_KEY_STROBE3,
66 SPITZ_GPIO_KEY_STROBE4,
67 SPITZ_GPIO_KEY_STROBE5,
68 SPITZ_GPIO_KEY_STROBE6,
69 SPITZ_GPIO_KEY_STROBE7,
70 SPITZ_GPIO_KEY_STROBE8,
71 SPITZ_GPIO_KEY_STROBE9,
72 SPITZ_GPIO_KEY_STROBE10,
73};
74
75static int spitz_senses[] = {
76 SPITZ_GPIO_KEY_SENSE0,
77 SPITZ_GPIO_KEY_SENSE1,
78 SPITZ_GPIO_KEY_SENSE2,
79 SPITZ_GPIO_KEY_SENSE3,
80 SPITZ_GPIO_KEY_SENSE4,
81 SPITZ_GPIO_KEY_SENSE5,
82 SPITZ_GPIO_KEY_SENSE6,
83};
84
85struct spitzkbd {
86 unsigned char keycode[ARRAY_SIZE(spitzkbd_keycode)];
87 struct input_dev *input;
88 char phys[32];
89
90 spinlock_t lock;
91 struct timer_list timer;
92 struct timer_list htimer;
93
94 unsigned int suspended;
95 unsigned long suspend_jiffies;
96};
97
98#define KB_DISCHARGE_DELAY 10
99#define KB_ACTIVATE_DELAY 10
100
101/* Helper functions for reading the keyboard matrix
102 * Note: We should really be using the generic gpio functions to alter
103 * GPDR but it requires a function call per GPIO bit which is
104 * excessive when we need to access 11 bits at once, multiple times.
105 * These functions must be called within local_irq_save()/local_irq_restore()
106 * or similar.
107 */
108static inline void spitzkbd_discharge_all(void)
109{
110 /* STROBE All HiZ */
111 GPCR0 = SPITZ_GPIO_G0_STROBE_BIT;
112 GPDR0 &= ~SPITZ_GPIO_G0_STROBE_BIT;
113 GPCR1 = SPITZ_GPIO_G1_STROBE_BIT;
114 GPDR1 &= ~SPITZ_GPIO_G1_STROBE_BIT;
115 GPCR2 = SPITZ_GPIO_G2_STROBE_BIT;
116 GPDR2 &= ~SPITZ_GPIO_G2_STROBE_BIT;
117 GPCR3 = SPITZ_GPIO_G3_STROBE_BIT;
118 GPDR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
119}
120
121static inline void spitzkbd_activate_all(void)
122{
123 /* STROBE ALL -> High */
124 GPSR0 = SPITZ_GPIO_G0_STROBE_BIT;
125 GPDR0 |= SPITZ_GPIO_G0_STROBE_BIT;
126 GPSR1 = SPITZ_GPIO_G1_STROBE_BIT;
127 GPDR1 |= SPITZ_GPIO_G1_STROBE_BIT;
128 GPSR2 = SPITZ_GPIO_G2_STROBE_BIT;
129 GPDR2 |= SPITZ_GPIO_G2_STROBE_BIT;
130 GPSR3 = SPITZ_GPIO_G3_STROBE_BIT;
131 GPDR3 |= SPITZ_GPIO_G3_STROBE_BIT;
132
133 udelay(KB_DISCHARGE_DELAY);
134
135 /* Clear any interrupts we may have triggered when altering the GPIO lines */
136 GEDR0 = SPITZ_GPIO_G0_SENSE_BIT;
137 GEDR1 = SPITZ_GPIO_G1_SENSE_BIT;
138 GEDR2 = SPITZ_GPIO_G2_SENSE_BIT;
139 GEDR3 = SPITZ_GPIO_G3_SENSE_BIT;
140}
141
142static inline void spitzkbd_activate_col(int col)
143{
144 int gpio = spitz_strobes[col];
145 GPDR0 &= ~SPITZ_GPIO_G0_STROBE_BIT;
146 GPDR1 &= ~SPITZ_GPIO_G1_STROBE_BIT;
147 GPDR2 &= ~SPITZ_GPIO_G2_STROBE_BIT;
148 GPDR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
149 GPSR(gpio) = GPIO_bit(gpio);
150 GPDR(gpio) |= GPIO_bit(gpio);
151}
152
153static inline void spitzkbd_reset_col(int col)
154{
155 int gpio = spitz_strobes[col];
156 GPDR0 &= ~SPITZ_GPIO_G0_STROBE_BIT;
157 GPDR1 &= ~SPITZ_GPIO_G1_STROBE_BIT;
158 GPDR2 &= ~SPITZ_GPIO_G2_STROBE_BIT;
159 GPDR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
160 GPCR(gpio) = GPIO_bit(gpio);
161 GPDR(gpio) |= GPIO_bit(gpio);
162}
163
164static inline int spitzkbd_get_row_status(int col)
165{
166 return ((GPLR0 >> 12) & 0x01) | ((GPLR0 >> 16) & 0x02)
167 | ((GPLR2 >> 25) & 0x04) | ((GPLR1 << 1) & 0x08)
168 | ((GPLR1 >> 0) & 0x10) | ((GPLR1 >> 1) & 0x60);
169}
170
171/*
172 * The spitz keyboard only generates interrupts when a key is pressed.
173 * When a key is pressed, we enable a timer which then scans the
174 * keyboard to detect when the key is released.
175 */
176
177/* Scan the hardware keyboard and push any changes up through the input layer */
178static void spitzkbd_scankeyboard(struct spitzkbd *spitzkbd_data)
179{
180 unsigned int row, col, rowd;
181 unsigned long flags;
182 unsigned int num_pressed, pwrkey = ((GPLR(SPITZ_GPIO_ON_KEY) & GPIO_bit(SPITZ_GPIO_ON_KEY)) != 0);
183
184 if (spitzkbd_data->suspended)
185 return;
186
187 spin_lock_irqsave(&spitzkbd_data->lock, flags);
188
189 num_pressed = 0;
190 for (col = 0; col < KB_COLS; col++) {
191 /*
192 * Discharge the output driver capacitatance
193 * in the keyboard matrix. (Yes it is significant..)
194 */
195
196 spitzkbd_discharge_all();
197 udelay(KB_DISCHARGE_DELAY);
198
199 spitzkbd_activate_col(col);
200 udelay(KB_ACTIVATE_DELAY);
201
202 rowd = spitzkbd_get_row_status(col);
203 for (row = 0; row < KB_ROWS; row++) {
204 unsigned int scancode, pressed;
205
206 scancode = SCANCODE(row, col);
207 pressed = rowd & KB_ROWMASK(row);
208
209 input_report_key(spitzkbd_data->input, spitzkbd_data->keycode[scancode], pressed);
210
211 if (pressed)
212 num_pressed++;
213 }
214 spitzkbd_reset_col(col);
215 }
216
217 spitzkbd_activate_all();
218
219 input_report_key(spitzkbd_data->input, SPITZ_KEY_SYNC, (GPLR(SPITZ_GPIO_SYNC) & GPIO_bit(SPITZ_GPIO_SYNC)) != 0 );
220 input_report_key(spitzkbd_data->input, KEY_SUSPEND, pwrkey);
221
222 if (pwrkey && time_after(jiffies, spitzkbd_data->suspend_jiffies + msecs_to_jiffies(1000))) {
223 input_event(spitzkbd_data->input, EV_PWR, KEY_SUSPEND, 1);
224 spitzkbd_data->suspend_jiffies = jiffies;
225 }
226
227 input_sync(spitzkbd_data->input);
228
229 /* if any keys are pressed, enable the timer */
230 if (num_pressed)
231 mod_timer(&spitzkbd_data->timer, jiffies + msecs_to_jiffies(SCAN_INTERVAL));
232
233 spin_unlock_irqrestore(&spitzkbd_data->lock, flags);
234}
235
236/*
237 * spitz keyboard interrupt handler.
238 */
239static irqreturn_t spitzkbd_interrupt(int irq, void *dev_id)
240{
241 struct spitzkbd *spitzkbd_data = dev_id;
242
243 if (!timer_pending(&spitzkbd_data->timer)) {
244 /** wait chattering delay **/
245 udelay(20);
246 spitzkbd_scankeyboard(spitzkbd_data);
247 }
248
249 return IRQ_HANDLED;
250}
251
252/*
253 * spitz timer checking for released keys
254 */
255static void spitzkbd_timer_callback(unsigned long data)
256{
257 struct spitzkbd *spitzkbd_data = (struct spitzkbd *) data;
258
259 spitzkbd_scankeyboard(spitzkbd_data);
260}
261
262/*
263 * The hinge switches generate an interrupt.
264 * We debounce the switches and pass them to the input system.
265 */
266
267static irqreturn_t spitzkbd_hinge_isr(int irq, void *dev_id)
268{
269 struct spitzkbd *spitzkbd_data = dev_id;
270
271 if (!timer_pending(&spitzkbd_data->htimer))
272 mod_timer(&spitzkbd_data->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL));
273
274 return IRQ_HANDLED;
275}
276
277#define HINGE_STABLE_COUNT 2
278static int sharpsl_hinge_state;
279static int hinge_count;
280
281static void spitzkbd_hinge_timer(unsigned long data)
282{
283 struct spitzkbd *spitzkbd_data = (struct spitzkbd *) data;
284 unsigned long state;
285 unsigned long flags;
286
287 state = GPLR(SPITZ_GPIO_SWA) & (GPIO_bit(SPITZ_GPIO_SWA)|GPIO_bit(SPITZ_GPIO_SWB));
288 state |= (GPLR(SPITZ_GPIO_AK_INT) & GPIO_bit(SPITZ_GPIO_AK_INT));
289 if (state != sharpsl_hinge_state) {
290 hinge_count = 0;
291 sharpsl_hinge_state = state;
292 } else if (hinge_count < HINGE_STABLE_COUNT) {
293 hinge_count++;
294 }
295
296 if (hinge_count >= HINGE_STABLE_COUNT) {
297 spin_lock_irqsave(&spitzkbd_data->lock, flags);
298
299 input_report_switch(spitzkbd_data->input, SW_LID, ((GPLR(SPITZ_GPIO_SWA) & GPIO_bit(SPITZ_GPIO_SWA)) != 0));
300 input_report_switch(spitzkbd_data->input, SW_TABLET_MODE, ((GPLR(SPITZ_GPIO_SWB) & GPIO_bit(SPITZ_GPIO_SWB)) != 0));
301 input_report_switch(spitzkbd_data->input, SW_HEADPHONE_INSERT, ((GPLR(SPITZ_GPIO_AK_INT) & GPIO_bit(SPITZ_GPIO_AK_INT)) != 0));
302 input_sync(spitzkbd_data->input);
303
304 spin_unlock_irqrestore(&spitzkbd_data->lock, flags);
305 } else {
306 mod_timer(&spitzkbd_data->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL));
307 }
308}
309
310#ifdef CONFIG_PM
311static int spitzkbd_suspend(struct platform_device *dev, pm_message_t state)
312{
313 int i;
314 struct spitzkbd *spitzkbd = platform_get_drvdata(dev);
315 spitzkbd->suspended = 1;
316
317 /* Set Strobe lines as inputs - *except* strobe line 0 leave this
318 enabled so we can detect a power button press for resume */
319 for (i = 1; i < SPITZ_KEY_STROBE_NUM; i++)
320 pxa_gpio_mode(spitz_strobes[i] | GPIO_IN);
321
322 return 0;
323}
324
325static int spitzkbd_resume(struct platform_device *dev)
326{
327 int i;
328 struct spitzkbd *spitzkbd = platform_get_drvdata(dev);
329
330 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i++)
331 pxa_gpio_mode(spitz_strobes[i] | GPIO_OUT | GPIO_DFLT_HIGH);
332
333 /* Upon resume, ignore the suspend key for a short while */
334 spitzkbd->suspend_jiffies = jiffies;
335 spitzkbd->suspended = 0;
336
337 return 0;
338}
339#else
340#define spitzkbd_suspend NULL
341#define spitzkbd_resume NULL
342#endif
343
344static int __devinit spitzkbd_probe(struct platform_device *dev)
345{
346 struct spitzkbd *spitzkbd;
347 struct input_dev *input_dev;
348 int i, err = -ENOMEM;
349
350 spitzkbd = kzalloc(sizeof(struct spitzkbd), GFP_KERNEL);
351 input_dev = input_allocate_device();
352 if (!spitzkbd || !input_dev)
353 goto fail;
354
355 platform_set_drvdata(dev, spitzkbd);
356 strcpy(spitzkbd->phys, "spitzkbd/input0");
357
358 spin_lock_init(&spitzkbd->lock);
359
360 /* Init Keyboard rescan timer */
361 init_timer(&spitzkbd->timer);
362 spitzkbd->timer.function = spitzkbd_timer_callback;
363 spitzkbd->timer.data = (unsigned long) spitzkbd;
364
365 /* Init Hinge Timer */
366 init_timer(&spitzkbd->htimer);
367 spitzkbd->htimer.function = spitzkbd_hinge_timer;
368 spitzkbd->htimer.data = (unsigned long) spitzkbd;
369
370 spitzkbd->suspend_jiffies = jiffies;
371
372 spitzkbd->input = input_dev;
373
374 input_dev->name = "Spitz Keyboard";
375 input_dev->phys = spitzkbd->phys;
376 input_dev->dev.parent = &dev->dev;
377
378 input_dev->id.bustype = BUS_HOST;
379 input_dev->id.vendor = 0x0001;
380 input_dev->id.product = 0x0001;
381 input_dev->id.version = 0x0100;
382
383 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP) |
384 BIT_MASK(EV_PWR) | BIT_MASK(EV_SW);
385 input_dev->keycode = spitzkbd->keycode;
386 input_dev->keycodesize = sizeof(unsigned char);
387 input_dev->keycodemax = ARRAY_SIZE(spitzkbd_keycode);
388
389 memcpy(spitzkbd->keycode, spitzkbd_keycode, sizeof(spitzkbd->keycode));
390 for (i = 0; i < ARRAY_SIZE(spitzkbd_keycode); i++)
391 set_bit(spitzkbd->keycode[i], input_dev->keybit);
392 clear_bit(0, input_dev->keybit);
393 set_bit(KEY_SUSPEND, input_dev->keybit);
394 set_bit(SW_LID, input_dev->swbit);
395 set_bit(SW_TABLET_MODE, input_dev->swbit);
396 set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
397
398 err = input_register_device(input_dev);
399 if (err)
400 goto fail;
401
402 mod_timer(&spitzkbd->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL));
403
404 /* Setup sense interrupts - RisingEdge Detect, sense lines as inputs */
405 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i++) {
406 pxa_gpio_mode(spitz_senses[i] | GPIO_IN);
407 if (request_irq(IRQ_GPIO(spitz_senses[i]), spitzkbd_interrupt,
408 IRQF_DISABLED|IRQF_TRIGGER_RISING,
409 "Spitzkbd Sense", spitzkbd))
410 printk(KERN_WARNING "spitzkbd: Can't get Sense IRQ: %d!\n", i);
411 }
412
413 /* Set Strobe lines as outputs - set high */
414 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i++)
415 pxa_gpio_mode(spitz_strobes[i] | GPIO_OUT | GPIO_DFLT_HIGH);
416
417 pxa_gpio_mode(SPITZ_GPIO_SYNC | GPIO_IN);
418 pxa_gpio_mode(SPITZ_GPIO_ON_KEY | GPIO_IN);
419 pxa_gpio_mode(SPITZ_GPIO_SWA | GPIO_IN);
420 pxa_gpio_mode(SPITZ_GPIO_SWB | GPIO_IN);
421
422 request_irq(SPITZ_IRQ_GPIO_SYNC, spitzkbd_interrupt,
423 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
424 "Spitzkbd Sync", spitzkbd);
425 request_irq(SPITZ_IRQ_GPIO_ON_KEY, spitzkbd_interrupt,
426 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
427 "Spitzkbd PwrOn", spitzkbd);
428 request_irq(SPITZ_IRQ_GPIO_SWA, spitzkbd_hinge_isr,
429 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
430 "Spitzkbd SWA", spitzkbd);
431 request_irq(SPITZ_IRQ_GPIO_SWB, spitzkbd_hinge_isr,
432 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
433 "Spitzkbd SWB", spitzkbd);
434 request_irq(SPITZ_IRQ_GPIO_AK_INT, spitzkbd_hinge_isr,
435 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
436 "Spitzkbd HP", spitzkbd);
437
438 return 0;
439
440 fail: input_free_device(input_dev);
441 kfree(spitzkbd);
442 return err;
443}
444
445static int __devexit spitzkbd_remove(struct platform_device *dev)
446{
447 int i;
448 struct spitzkbd *spitzkbd = platform_get_drvdata(dev);
449
450 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i++)
451 free_irq(IRQ_GPIO(spitz_senses[i]), spitzkbd);
452
453 free_irq(SPITZ_IRQ_GPIO_SYNC, spitzkbd);
454 free_irq(SPITZ_IRQ_GPIO_ON_KEY, spitzkbd);
455 free_irq(SPITZ_IRQ_GPIO_SWA, spitzkbd);
456 free_irq(SPITZ_IRQ_GPIO_SWB, spitzkbd);
457 free_irq(SPITZ_IRQ_GPIO_AK_INT, spitzkbd);
458
459 del_timer_sync(&spitzkbd->htimer);
460 del_timer_sync(&spitzkbd->timer);
461
462 input_unregister_device(spitzkbd->input);
463
464 kfree(spitzkbd);
465
466 return 0;
467}
468
469static struct platform_driver spitzkbd_driver = {
470 .probe = spitzkbd_probe,
471 .remove = __devexit_p(spitzkbd_remove),
472 .suspend = spitzkbd_suspend,
473 .resume = spitzkbd_resume,
474 .driver = {
475 .name = "spitz-keyboard",
476 .owner = THIS_MODULE,
477 },
478};
479
480static int __init spitzkbd_init(void)
481{
482 return platform_driver_register(&spitzkbd_driver);
483}
484
485static void __exit spitzkbd_exit(void)
486{
487 platform_driver_unregister(&spitzkbd_driver);
488}
489
490module_init(spitzkbd_init);
491module_exit(spitzkbd_exit);
492
493MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
494MODULE_DESCRIPTION("Spitz Keyboard Driver");
495MODULE_LICENSE("GPL v2");
496MODULE_ALIAS("platform:spitz-keyboard");
diff --git a/drivers/input/keyboard/tosakbd.c b/drivers/input/keyboard/tosakbd.c
deleted file mode 100644
index 3910f269cfc8..000000000000
--- a/drivers/input/keyboard/tosakbd.c
+++ /dev/null
@@ -1,431 +0,0 @@
1/*
2 * Keyboard driver for Sharp Tosa models (SL-6000x)
3 *
4 * Copyright (c) 2005 Dirk Opfer
5 * Copyright (c) 2007 Dmitry Baryshkov
6 *
7 * Based on xtkbd.c/locomkbd.c/corgikbd.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/input.h>
19#include <linux/delay.h>
20#include <linux/interrupt.h>
21#include <linux/slab.h>
22
23#include <mach/gpio.h>
24#include <mach/tosa.h>
25
26#define KB_ROWMASK(r) (1 << (r))
27#define SCANCODE(r, c) (((r)<<4) + (c) + 1)
28#define NR_SCANCODES SCANCODE(TOSA_KEY_SENSE_NUM - 1, TOSA_KEY_STROBE_NUM - 1) + 1
29
30#define SCAN_INTERVAL (HZ/10)
31
32#define KB_DISCHARGE_DELAY 10
33#define KB_ACTIVATE_DELAY 10
34
35static unsigned short tosakbd_keycode[NR_SCANCODES] = {
360,
370, KEY_W, 0, 0, 0, KEY_K, KEY_BACKSPACE, KEY_P,
380, 0, 0, 0, 0, 0, 0, 0,
39KEY_Q, KEY_E, KEY_T, KEY_Y, 0, KEY_O, KEY_I, KEY_COMMA,
400, 0, 0, 0, 0, 0, 0, 0,
41KEY_A, KEY_D, KEY_G, KEY_U, 0, KEY_L, KEY_ENTER, KEY_DOT,
420, 0, 0, 0, 0, 0, 0, 0,
43KEY_Z, KEY_C, KEY_V, KEY_J, TOSA_KEY_ADDRESSBOOK, TOSA_KEY_CANCEL, TOSA_KEY_CENTER, TOSA_KEY_OK,
44KEY_LEFTSHIFT, 0, 0, 0, 0, 0, 0, 0,
45KEY_S, KEY_R, KEY_B, KEY_N, TOSA_KEY_CALENDAR, TOSA_KEY_HOMEPAGE, KEY_LEFTCTRL, TOSA_KEY_LIGHT,
460, KEY_RIGHTSHIFT, 0, 0, 0, 0, 0, 0,
47KEY_TAB, KEY_SLASH, KEY_H, KEY_M, TOSA_KEY_MENU, 0, KEY_UP, 0,
480, 0, TOSA_KEY_FN, 0, 0, 0, 0, 0,
49KEY_X, KEY_F, KEY_SPACE, KEY_APOSTROPHE, TOSA_KEY_MAIL, KEY_LEFT, KEY_DOWN, KEY_RIGHT,
500, 0, 0,
51};
52
53struct tosakbd {
54 unsigned short keycode[ARRAY_SIZE(tosakbd_keycode)];
55 struct input_dev *input;
56 bool suspended;
57 spinlock_t lock; /* protect kbd scanning */
58 struct timer_list timer;
59};
60
61
62/* Helper functions for reading the keyboard matrix
63 * Note: We should really be using the generic gpio functions to alter
64 * GPDR but it requires a function call per GPIO bit which is
65 * excessive when we need to access 12 bits at once, multiple times.
66 * These functions must be called within local_irq_save()/local_irq_restore()
67 * or similar.
68 */
69#define GET_ROWS_STATUS(c) ((GPLR2 & TOSA_GPIO_ALL_SENSE_BIT) >> TOSA_GPIO_ALL_SENSE_RSHIFT)
70
71static inline void tosakbd_discharge_all(void)
72{
73 /* STROBE All HiZ */
74 GPCR1 = TOSA_GPIO_HIGH_STROBE_BIT;
75 GPDR1 &= ~TOSA_GPIO_HIGH_STROBE_BIT;
76 GPCR2 = TOSA_GPIO_LOW_STROBE_BIT;
77 GPDR2 &= ~TOSA_GPIO_LOW_STROBE_BIT;
78}
79
80static inline void tosakbd_activate_all(void)
81{
82 /* STROBE ALL -> High */
83 GPSR1 = TOSA_GPIO_HIGH_STROBE_BIT;
84 GPDR1 |= TOSA_GPIO_HIGH_STROBE_BIT;
85 GPSR2 = TOSA_GPIO_LOW_STROBE_BIT;
86 GPDR2 |= TOSA_GPIO_LOW_STROBE_BIT;
87
88 udelay(KB_DISCHARGE_DELAY);
89
90 /* STATE CLEAR */
91 GEDR2 |= TOSA_GPIO_ALL_SENSE_BIT;
92}
93
94static inline void tosakbd_activate_col(int col)
95{
96 if (col <= 5) {
97 /* STROBE col -> High, not col -> HiZ */
98 GPSR1 = TOSA_GPIO_STROBE_BIT(col);
99 GPDR1 = (GPDR1 & ~TOSA_GPIO_HIGH_STROBE_BIT) | TOSA_GPIO_STROBE_BIT(col);
100 } else {
101 /* STROBE col -> High, not col -> HiZ */
102 GPSR2 = TOSA_GPIO_STROBE_BIT(col);
103 GPDR2 = (GPDR2 & ~TOSA_GPIO_LOW_STROBE_BIT) | TOSA_GPIO_STROBE_BIT(col);
104 }
105}
106
107static inline void tosakbd_reset_col(int col)
108{
109 if (col <= 5) {
110 /* STROBE col -> Low */
111 GPCR1 = TOSA_GPIO_STROBE_BIT(col);
112 /* STROBE col -> out, not col -> HiZ */
113 GPDR1 = (GPDR1 & ~TOSA_GPIO_HIGH_STROBE_BIT) | TOSA_GPIO_STROBE_BIT(col);
114 } else {
115 /* STROBE col -> Low */
116 GPCR2 = TOSA_GPIO_STROBE_BIT(col);
117 /* STROBE col -> out, not col -> HiZ */
118 GPDR2 = (GPDR2 & ~TOSA_GPIO_LOW_STROBE_BIT) | TOSA_GPIO_STROBE_BIT(col);
119 }
120}
121/*
122 * The tosa keyboard only generates interrupts when a key is pressed.
123 * So when a key is pressed, we enable a timer. This timer scans the
124 * keyboard, and this is how we detect when the key is released.
125 */
126
127/* Scan the hardware keyboard and push any changes up through the input layer */
128static void tosakbd_scankeyboard(struct platform_device *dev)
129{
130 struct tosakbd *tosakbd = platform_get_drvdata(dev);
131 unsigned int row, col, rowd;
132 unsigned long flags;
133 unsigned int num_pressed = 0;
134
135 spin_lock_irqsave(&tosakbd->lock, flags);
136
137 if (tosakbd->suspended)
138 goto out;
139
140 for (col = 0; col < TOSA_KEY_STROBE_NUM; col++) {
141 /*
142 * Discharge the output driver capacitatance
143 * in the keyboard matrix. (Yes it is significant..)
144 */
145 tosakbd_discharge_all();
146 udelay(KB_DISCHARGE_DELAY);
147
148 tosakbd_activate_col(col);
149 udelay(KB_ACTIVATE_DELAY);
150
151 rowd = GET_ROWS_STATUS(col);
152
153 for (row = 0; row < TOSA_KEY_SENSE_NUM; row++) {
154 unsigned int scancode, pressed;
155 scancode = SCANCODE(row, col);
156 pressed = rowd & KB_ROWMASK(row);
157
158 if (pressed && !tosakbd->keycode[scancode])
159 dev_warn(&dev->dev,
160 "unhandled scancode: 0x%02x\n",
161 scancode);
162
163 input_report_key(tosakbd->input,
164 tosakbd->keycode[scancode],
165 pressed);
166 if (pressed)
167 num_pressed++;
168 }
169
170 tosakbd_reset_col(col);
171 }
172
173 tosakbd_activate_all();
174
175 input_sync(tosakbd->input);
176
177 /* if any keys are pressed, enable the timer */
178 if (num_pressed)
179 mod_timer(&tosakbd->timer, jiffies + SCAN_INTERVAL);
180
181 out:
182 spin_unlock_irqrestore(&tosakbd->lock, flags);
183}
184
185/*
186 * tosa keyboard interrupt handler.
187 */
188static irqreturn_t tosakbd_interrupt(int irq, void *__dev)
189{
190 struct platform_device *dev = __dev;
191 struct tosakbd *tosakbd = platform_get_drvdata(dev);
192
193 if (!timer_pending(&tosakbd->timer)) {
194 /** wait chattering delay **/
195 udelay(20);
196 tosakbd_scankeyboard(dev);
197 }
198
199 return IRQ_HANDLED;
200}
201
202/*
203 * tosa timer checking for released keys
204 */
205static void tosakbd_timer_callback(unsigned long __dev)
206{
207 struct platform_device *dev = (struct platform_device *)__dev;
208
209 tosakbd_scankeyboard(dev);
210}
211
212#ifdef CONFIG_PM
213static int tosakbd_suspend(struct platform_device *dev, pm_message_t state)
214{
215 struct tosakbd *tosakbd = platform_get_drvdata(dev);
216 unsigned long flags;
217
218 spin_lock_irqsave(&tosakbd->lock, flags);
219 tosakbd->suspended = true;
220 spin_unlock_irqrestore(&tosakbd->lock, flags);
221
222 del_timer_sync(&tosakbd->timer);
223
224 return 0;
225}
226
227static int tosakbd_resume(struct platform_device *dev)
228{
229 struct tosakbd *tosakbd = platform_get_drvdata(dev);
230
231 tosakbd->suspended = false;
232 tosakbd_scankeyboard(dev);
233
234 return 0;
235}
236#else
237#define tosakbd_suspend NULL
238#define tosakbd_resume NULL
239#endif
240
241static int __devinit tosakbd_probe(struct platform_device *pdev) {
242
243 int i;
244 struct tosakbd *tosakbd;
245 struct input_dev *input_dev;
246 int error;
247
248 tosakbd = kzalloc(sizeof(struct tosakbd), GFP_KERNEL);
249 if (!tosakbd)
250 return -ENOMEM;
251
252 input_dev = input_allocate_device();
253 if (!input_dev) {
254 kfree(tosakbd);
255 return -ENOMEM;
256 }
257
258 platform_set_drvdata(pdev, tosakbd);
259
260 spin_lock_init(&tosakbd->lock);
261
262 /* Init Keyboard rescan timer */
263 init_timer(&tosakbd->timer);
264 tosakbd->timer.function = tosakbd_timer_callback;
265 tosakbd->timer.data = (unsigned long) pdev;
266
267 tosakbd->input = input_dev;
268
269 input_set_drvdata(input_dev, tosakbd);
270 input_dev->name = "Tosa Keyboard";
271 input_dev->phys = "tosakbd/input0";
272 input_dev->dev.parent = &pdev->dev;
273
274 input_dev->id.bustype = BUS_HOST;
275 input_dev->id.vendor = 0x0001;
276 input_dev->id.product = 0x0001;
277 input_dev->id.version = 0x0100;
278
279 input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
280 input_dev->keycode = tosakbd->keycode;
281 input_dev->keycodesize = sizeof(tosakbd->keycode[0]);
282 input_dev->keycodemax = ARRAY_SIZE(tosakbd_keycode);
283
284 memcpy(tosakbd->keycode, tosakbd_keycode, sizeof(tosakbd_keycode));
285
286 for (i = 0; i < ARRAY_SIZE(tosakbd_keycode); i++)
287 __set_bit(tosakbd->keycode[i], input_dev->keybit);
288 __clear_bit(KEY_RESERVED, input_dev->keybit);
289
290 /* Setup sense interrupts - RisingEdge Detect, sense lines as inputs */
291 for (i = 0; i < TOSA_KEY_SENSE_NUM; i++) {
292 int gpio = TOSA_GPIO_KEY_SENSE(i);
293 int irq;
294 error = gpio_request(gpio, "tosakbd");
295 if (error < 0) {
296 printk(KERN_ERR "tosakbd: failed to request GPIO %d, "
297 " error %d\n", gpio, error);
298 goto fail;
299 }
300
301 error = gpio_direction_input(TOSA_GPIO_KEY_SENSE(i));
302 if (error < 0) {
303 printk(KERN_ERR "tosakbd: failed to configure input"
304 " direction for GPIO %d, error %d\n",
305 gpio, error);
306 gpio_free(gpio);
307 goto fail;
308 }
309
310 irq = gpio_to_irq(gpio);
311 if (irq < 0) {
312 error = irq;
313 printk(KERN_ERR "gpio-keys: Unable to get irq number"
314 " for GPIO %d, error %d\n",
315 gpio, error);
316 gpio_free(gpio);
317 goto fail;
318 }
319
320 error = request_irq(irq, tosakbd_interrupt,
321 IRQF_DISABLED | IRQF_TRIGGER_RISING,
322 "tosakbd", pdev);
323
324 if (error) {
325 printk("tosakbd: Can't get IRQ: %d: error %d!\n",
326 irq, error);
327 gpio_free(gpio);
328 goto fail;
329 }
330 }
331
332 /* Set Strobe lines as outputs - set high */
333 for (i = 0; i < TOSA_KEY_STROBE_NUM; i++) {
334 int gpio = TOSA_GPIO_KEY_STROBE(i);
335 error = gpio_request(gpio, "tosakbd");
336 if (error < 0) {
337 printk(KERN_ERR "tosakbd: failed to request GPIO %d, "
338 " error %d\n", gpio, error);
339 goto fail2;
340 }
341
342 error = gpio_direction_output(gpio, 1);
343 if (error < 0) {
344 printk(KERN_ERR "tosakbd: failed to configure input"
345 " direction for GPIO %d, error %d\n",
346 gpio, error);
347 gpio_free(gpio);
348 goto fail2;
349 }
350
351 }
352
353 error = input_register_device(input_dev);
354 if (error) {
355 printk(KERN_ERR "tosakbd: Unable to register input device, "
356 "error: %d\n", error);
357 goto fail2;
358 }
359
360 printk(KERN_INFO "input: Tosa Keyboard Registered\n");
361
362 return 0;
363
364fail2:
365 while (--i >= 0)
366 gpio_free(TOSA_GPIO_KEY_STROBE(i));
367
368 i = TOSA_KEY_SENSE_NUM;
369fail:
370 while (--i >= 0) {
371 free_irq(gpio_to_irq(TOSA_GPIO_KEY_SENSE(i)), pdev);
372 gpio_free(TOSA_GPIO_KEY_SENSE(i));
373 }
374
375 platform_set_drvdata(pdev, NULL);
376 input_free_device(input_dev);
377 kfree(tosakbd);
378
379 return error;
380}
381
382static int __devexit tosakbd_remove(struct platform_device *dev)
383{
384 int i;
385 struct tosakbd *tosakbd = platform_get_drvdata(dev);
386
387 for (i = 0; i < TOSA_KEY_STROBE_NUM; i++)
388 gpio_free(TOSA_GPIO_KEY_STROBE(i));
389
390 for (i = 0; i < TOSA_KEY_SENSE_NUM; i++) {
391 free_irq(gpio_to_irq(TOSA_GPIO_KEY_SENSE(i)), dev);
392 gpio_free(TOSA_GPIO_KEY_SENSE(i));
393 }
394
395 del_timer_sync(&tosakbd->timer);
396
397 input_unregister_device(tosakbd->input);
398
399 kfree(tosakbd);
400
401 return 0;
402}
403
404static struct platform_driver tosakbd_driver = {
405 .probe = tosakbd_probe,
406 .remove = __devexit_p(tosakbd_remove),
407 .suspend = tosakbd_suspend,
408 .resume = tosakbd_resume,
409 .driver = {
410 .name = "tosa-keyboard",
411 .owner = THIS_MODULE,
412 },
413};
414
415static int __devinit tosakbd_init(void)
416{
417 return platform_driver_register(&tosakbd_driver);
418}
419
420static void __exit tosakbd_exit(void)
421{
422 platform_driver_unregister(&tosakbd_driver);
423}
424
425module_init(tosakbd_init);
426module_exit(tosakbd_exit);
427
428MODULE_AUTHOR("Dirk Opfer <Dirk@Opfer-Online.de>");
429MODULE_DESCRIPTION("Tosa Keyboard Driver");
430MODULE_LICENSE("GPL v2");
431MODULE_ALIAS("platform:tosa-keyboard");
diff --git a/drivers/input/misc/pcspkr.c b/drivers/input/misc/pcspkr.c
index ea4e1fd12651..f080dd31499b 100644
--- a/drivers/input/misc/pcspkr.c
+++ b/drivers/input/misc/pcspkr.c
@@ -30,7 +30,7 @@ MODULE_ALIAS("platform:pcspkr");
30#include <asm/i8253.h> 30#include <asm/i8253.h>
31#else 31#else
32#include <asm/8253pit.h> 32#include <asm/8253pit.h>
33static DEFINE_SPINLOCK(i8253_lock); 33static DEFINE_RAW_SPINLOCK(i8253_lock);
34#endif 34#endif
35 35
36static int pcspkr_event(struct input_dev *dev, unsigned int type, unsigned int code, int value) 36static int pcspkr_event(struct input_dev *dev, unsigned int type, unsigned int code, int value)
@@ -50,7 +50,7 @@ static int pcspkr_event(struct input_dev *dev, unsigned int type, unsigned int c
50 if (value > 20 && value < 32767) 50 if (value > 20 && value < 32767)
51 count = PIT_TICK_RATE / value; 51 count = PIT_TICK_RATE / value;
52 52
53 spin_lock_irqsave(&i8253_lock, flags); 53 raw_spin_lock_irqsave(&i8253_lock, flags);
54 54
55 if (count) { 55 if (count) {
56 /* set command for counter 2, 2 byte write */ 56 /* set command for counter 2, 2 byte write */
@@ -65,7 +65,7 @@ static int pcspkr_event(struct input_dev *dev, unsigned int type, unsigned int c
65 outb(inb_p(0x61) & 0xFC, 0x61); 65 outb(inb_p(0x61) & 0xFC, 0x61);
66 } 66 }
67 67
68 spin_unlock_irqrestore(&i8253_lock, flags); 68 raw_spin_unlock_irqrestore(&i8253_lock, flags);
69 69
70 return 0; 70 return 0;
71} 71}
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 8a8fa4d2d6a8..6c0f1712f55b 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -99,22 +99,6 @@ config TOUCHSCREEN_BITSY
99 To compile this driver as a module, choose M here: the 99 To compile this driver as a module, choose M here: the
100 module will be called h3600_ts_input. 100 module will be called h3600_ts_input.
101 101
102config TOUCHSCREEN_CORGI
103 tristate "SharpSL (Corgi and Spitz series) touchscreen driver (DEPRECATED)"
104 depends on PXA_SHARPSL
105 select CORGI_SSP_DEPRECATED
106 help
107 Say Y here to enable the driver for the touchscreen on the
108 Sharp SL-C7xx and SL-Cxx00 series of PDAs.
109
110 If unsure, say N.
111
112 To compile this driver as a module, choose M here: the
113 module will be called corgi_ts.
114
115 NOTE: this driver is deprecated, try enable SPI and generic
116 ADS7846-based touchscreen driver.
117
118config TOUCHSCREEN_DA9034 102config TOUCHSCREEN_DA9034
119 tristate "Touchscreen support for Dialog Semiconductor DA9034" 103 tristate "Touchscreen support for Dialog Semiconductor DA9034"
120 depends on PMIC_DA903X 104 depends on PMIC_DA903X
@@ -158,8 +142,8 @@ config TOUCHSCREEN_FUJITSU
158 module will be called fujitsu-ts. 142 module will be called fujitsu-ts.
159 143
160config TOUCHSCREEN_S3C2410 144config TOUCHSCREEN_S3C2410
161 tristate "Samsung S3C2410 touchscreen input driver" 145 tristate "Samsung S3C2410/generic touchscreen input driver"
162 depends on ARCH_S3C2410 146 depends on ARCH_S3C2410 || SAMSUNG_DEV_TS
163 select S3C24XX_ADC 147 select S3C24XX_ADC
164 help 148 help
165 Say Y here if you have the s3c2410 touchscreen. 149 Say Y here if you have the s3c2410 touchscreen.
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index 7fef7d5cca23..41145d074dec 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_TOUCHSCREEN_AD7879) += ad7879.o
12obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o 12obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o
13obj-$(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) += atmel_tsadcc.o 13obj-$(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) += atmel_tsadcc.o
14obj-$(CONFIG_TOUCHSCREEN_BITSY) += h3600_ts_input.o 14obj-$(CONFIG_TOUCHSCREEN_BITSY) += h3600_ts_input.o
15obj-$(CONFIG_TOUCHSCREEN_CORGI) += corgi_ts.o
16obj-$(CONFIG_TOUCHSCREEN_DYNAPRO) += dynapro.o 15obj-$(CONFIG_TOUCHSCREEN_DYNAPRO) += dynapro.o
17obj-$(CONFIG_TOUCHSCREEN_GUNZE) += gunze.o 16obj-$(CONFIG_TOUCHSCREEN_GUNZE) += gunze.o
18obj-$(CONFIG_TOUCHSCREEN_EETI) += eeti_ts.o 17obj-$(CONFIG_TOUCHSCREEN_EETI) += eeti_ts.o
diff --git a/drivers/input/touchscreen/corgi_ts.c b/drivers/input/touchscreen/corgi_ts.c
deleted file mode 100644
index 94a1919d439d..000000000000
--- a/drivers/input/touchscreen/corgi_ts.c
+++ /dev/null
@@ -1,385 +0,0 @@
1/*
2 * Touchscreen driver for Sharp SL-C7xx and SL-Cxx00 models
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12
13#include <linux/delay.h>
14#include <linux/platform_device.h>
15#include <linux/init.h>
16#include <linux/input.h>
17#include <linux/interrupt.h>
18#include <linux/module.h>
19#include <linux/slab.h>
20#include <linux/irq.h>
21
22#include <mach/sharpsl.h>
23#include <mach/hardware.h>
24#include <mach/pxa2xx-gpio.h>
25
26
27#define PWR_MODE_ACTIVE 0
28#define PWR_MODE_SUSPEND 1
29
30#define X_AXIS_MAX 3830
31#define X_AXIS_MIN 150
32#define Y_AXIS_MAX 3830
33#define Y_AXIS_MIN 190
34#define PRESSURE_MIN 0
35#define PRESSURE_MAX 15000
36
37struct ts_event {
38 short pressure;
39 short x;
40 short y;
41};
42
43struct corgi_ts {
44 struct input_dev *input;
45 struct timer_list timer;
46 struct ts_event tc;
47 int pendown;
48 int power_mode;
49 int irq_gpio;
50 struct corgits_machinfo *machinfo;
51};
52
53#ifdef CONFIG_PXA25x
54#define CCNT(a) asm volatile ("mrc p14, 0, %0, C1, C0, 0" : "=r"(a))
55#define PMNC_GET(x) asm volatile ("mrc p14, 0, %0, C0, C0, 0" : "=r"(x))
56#define PMNC_SET(x) asm volatile ("mcr p14, 0, %0, C0, C0, 0" : : "r"(x))
57#endif
58#ifdef CONFIG_PXA27x
59#define CCNT(a) asm volatile ("mrc p14, 0, %0, C1, C1, 0" : "=r"(a))
60#define PMNC_GET(x) asm volatile ("mrc p14, 0, %0, C0, C1, 0" : "=r"(x))
61#define PMNC_SET(x) asm volatile ("mcr p14, 0, %0, C0, C1, 0" : : "r"(x))
62#endif
63
64/* ADS7846 Touch Screen Controller bit definitions */
65#define ADSCTRL_PD0 (1u << 0) /* PD0 */
66#define ADSCTRL_PD1 (1u << 1) /* PD1 */
67#define ADSCTRL_DFR (1u << 2) /* SER/DFR */
68#define ADSCTRL_MOD (1u << 3) /* Mode */
69#define ADSCTRL_ADR_SH 4 /* Address setting */
70#define ADSCTRL_STS (1u << 7) /* Start Bit */
71
72/* External Functions */
73extern unsigned int get_clk_frequency_khz(int info);
74
75static unsigned long calc_waittime(struct corgi_ts *corgi_ts)
76{
77 unsigned long hsync_invperiod = corgi_ts->machinfo->get_hsync_invperiod();
78
79 if (hsync_invperiod)
80 return get_clk_frequency_khz(0)*1000/hsync_invperiod;
81 else
82 return 0;
83}
84
85static int sync_receive_data_send_cmd(struct corgi_ts *corgi_ts, int doRecive, int doSend,
86 unsigned int address, unsigned long wait_time)
87{
88 unsigned long timer1 = 0, timer2, pmnc = 0;
89 int pos = 0;
90
91 if (wait_time && doSend) {
92 PMNC_GET(pmnc);
93 if (!(pmnc & 0x01))
94 PMNC_SET(0x01);
95
96 /* polling HSync */
97 corgi_ts->machinfo->wait_hsync();
98 /* get CCNT */
99 CCNT(timer1);
100 }
101
102 if (doRecive)
103 pos = corgi_ssp_ads7846_get();
104
105 if (doSend) {
106 int cmd = ADSCTRL_PD0 | ADSCTRL_PD1 | (address << ADSCTRL_ADR_SH) | ADSCTRL_STS;
107 /* dummy command */
108 corgi_ssp_ads7846_put(cmd);
109 corgi_ssp_ads7846_get();
110
111 if (wait_time) {
112 /* Wait after HSync */
113 CCNT(timer2);
114 if (timer2-timer1 > wait_time) {
115 /* too slow - timeout, try again */
116 corgi_ts->machinfo->wait_hsync();
117 /* get CCNT */
118 CCNT(timer1);
119 /* Wait after HSync */
120 CCNT(timer2);
121 }
122 while (timer2 - timer1 < wait_time)
123 CCNT(timer2);
124 }
125 corgi_ssp_ads7846_put(cmd);
126 if (wait_time && !(pmnc & 0x01))
127 PMNC_SET(pmnc);
128 }
129 return pos;
130}
131
132static int read_xydata(struct corgi_ts *corgi_ts)
133{
134 unsigned int x, y, z1, z2;
135 unsigned long flags, wait_time;
136
137 /* critical section */
138 local_irq_save(flags);
139 corgi_ssp_ads7846_lock();
140 wait_time = calc_waittime(corgi_ts);
141
142 /* Y-axis */
143 sync_receive_data_send_cmd(corgi_ts, 0, 1, 1u, wait_time);
144
145 /* Y-axis */
146 sync_receive_data_send_cmd(corgi_ts, 1, 1, 1u, wait_time);
147
148 /* X-axis */
149 y = sync_receive_data_send_cmd(corgi_ts, 1, 1, 5u, wait_time);
150
151 /* Z1 */
152 x = sync_receive_data_send_cmd(corgi_ts, 1, 1, 3u, wait_time);
153
154 /* Z2 */
155 z1 = sync_receive_data_send_cmd(corgi_ts, 1, 1, 4u, wait_time);
156 z2 = sync_receive_data_send_cmd(corgi_ts, 1, 0, 4u, wait_time);
157
158 /* Power-Down Enable */
159 corgi_ssp_ads7846_put((1u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
160 corgi_ssp_ads7846_get();
161
162 corgi_ssp_ads7846_unlock();
163 local_irq_restore(flags);
164
165 if (x== 0 || y == 0 || z1 == 0 || (x * (z2 - z1) / z1) >= 15000) {
166 corgi_ts->tc.pressure = 0;
167 return 0;
168 }
169
170 corgi_ts->tc.x = x;
171 corgi_ts->tc.y = y;
172 corgi_ts->tc.pressure = (x * (z2 - z1)) / z1;
173 return 1;
174}
175
176static void new_data(struct corgi_ts *corgi_ts)
177{
178 struct input_dev *dev = corgi_ts->input;
179
180 if (corgi_ts->power_mode != PWR_MODE_ACTIVE)
181 return;
182
183 if (!corgi_ts->tc.pressure && corgi_ts->pendown == 0)
184 return;
185
186 input_report_abs(dev, ABS_X, corgi_ts->tc.x);
187 input_report_abs(dev, ABS_Y, corgi_ts->tc.y);
188 input_report_abs(dev, ABS_PRESSURE, corgi_ts->tc.pressure);
189 input_report_key(dev, BTN_TOUCH, corgi_ts->pendown);
190 input_sync(dev);
191}
192
193static void ts_interrupt_main(struct corgi_ts *corgi_ts, int isTimer)
194{
195 if ((GPLR(IRQ_TO_GPIO(corgi_ts->irq_gpio)) & GPIO_bit(IRQ_TO_GPIO(corgi_ts->irq_gpio))) == 0) {
196 /* Disable Interrupt */
197 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_NONE);
198 if (read_xydata(corgi_ts)) {
199 corgi_ts->pendown = 1;
200 new_data(corgi_ts);
201 }
202 mod_timer(&corgi_ts->timer, jiffies + HZ / 100);
203 } else {
204 if (corgi_ts->pendown == 1 || corgi_ts->pendown == 2) {
205 mod_timer(&corgi_ts->timer, jiffies + HZ / 100);
206 corgi_ts->pendown++;
207 return;
208 }
209
210 if (corgi_ts->pendown) {
211 corgi_ts->tc.pressure = 0;
212 new_data(corgi_ts);
213 }
214
215 /* Enable Falling Edge */
216 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
217 corgi_ts->pendown = 0;
218 }
219}
220
221static void corgi_ts_timer(unsigned long data)
222{
223 struct corgi_ts *corgits_data = (struct corgi_ts *) data;
224
225 ts_interrupt_main(corgits_data, 1);
226}
227
228static irqreturn_t ts_interrupt(int irq, void *dev_id)
229{
230 struct corgi_ts *corgits_data = dev_id;
231
232 ts_interrupt_main(corgits_data, 0);
233 return IRQ_HANDLED;
234}
235
236#ifdef CONFIG_PM
237static int corgits_suspend(struct platform_device *dev, pm_message_t state)
238{
239 struct corgi_ts *corgi_ts = platform_get_drvdata(dev);
240
241 if (corgi_ts->pendown) {
242 del_timer_sync(&corgi_ts->timer);
243 corgi_ts->tc.pressure = 0;
244 new_data(corgi_ts);
245 corgi_ts->pendown = 0;
246 }
247 corgi_ts->power_mode = PWR_MODE_SUSPEND;
248
249 corgi_ssp_ads7846_putget((1u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
250
251 return 0;
252}
253
254static int corgits_resume(struct platform_device *dev)
255{
256 struct corgi_ts *corgi_ts = platform_get_drvdata(dev);
257
258 corgi_ssp_ads7846_putget((4u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
259 /* Enable Falling Edge */
260 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
261 corgi_ts->power_mode = PWR_MODE_ACTIVE;
262
263 return 0;
264}
265#else
266#define corgits_suspend NULL
267#define corgits_resume NULL
268#endif
269
270static int __devinit corgits_probe(struct platform_device *pdev)
271{
272 struct corgi_ts *corgi_ts;
273 struct input_dev *input_dev;
274 int err = -ENOMEM;
275
276 corgi_ts = kzalloc(sizeof(struct corgi_ts), GFP_KERNEL);
277 input_dev = input_allocate_device();
278 if (!corgi_ts || !input_dev)
279 goto fail1;
280
281 platform_set_drvdata(pdev, corgi_ts);
282
283 corgi_ts->machinfo = pdev->dev.platform_data;
284 corgi_ts->irq_gpio = platform_get_irq(pdev, 0);
285
286 if (corgi_ts->irq_gpio < 0) {
287 err = -ENODEV;
288 goto fail1;
289 }
290
291 corgi_ts->input = input_dev;
292
293 init_timer(&corgi_ts->timer);
294 corgi_ts->timer.data = (unsigned long) corgi_ts;
295 corgi_ts->timer.function = corgi_ts_timer;
296
297 input_dev->name = "Corgi Touchscreen";
298 input_dev->phys = "corgits/input0";
299 input_dev->id.bustype = BUS_HOST;
300 input_dev->id.vendor = 0x0001;
301 input_dev->id.product = 0x0002;
302 input_dev->id.version = 0x0100;
303 input_dev->dev.parent = &pdev->dev;
304
305 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
306 input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
307 input_set_abs_params(input_dev, ABS_X, X_AXIS_MIN, X_AXIS_MAX, 0, 0);
308 input_set_abs_params(input_dev, ABS_Y, Y_AXIS_MIN, Y_AXIS_MAX, 0, 0);
309 input_set_abs_params(input_dev, ABS_PRESSURE, PRESSURE_MIN, PRESSURE_MAX, 0, 0);
310
311 pxa_gpio_mode(IRQ_TO_GPIO(corgi_ts->irq_gpio) | GPIO_IN);
312
313 /* Initiaize ADS7846 Difference Reference mode */
314 corgi_ssp_ads7846_putget((1u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
315 mdelay(5);
316 corgi_ssp_ads7846_putget((3u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
317 mdelay(5);
318 corgi_ssp_ads7846_putget((4u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
319 mdelay(5);
320 corgi_ssp_ads7846_putget((5u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
321 mdelay(5);
322
323 if (request_irq(corgi_ts->irq_gpio, ts_interrupt, IRQF_DISABLED, "ts", corgi_ts)) {
324 err = -EBUSY;
325 goto fail1;
326 }
327
328 err = input_register_device(corgi_ts->input);
329 if (err)
330 goto fail2;
331
332 corgi_ts->power_mode = PWR_MODE_ACTIVE;
333
334 /* Enable Falling Edge */
335 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
336
337 return 0;
338
339 fail2: free_irq(corgi_ts->irq_gpio, corgi_ts);
340 fail1: input_free_device(input_dev);
341 kfree(corgi_ts);
342 return err;
343}
344
345static int __devexit corgits_remove(struct platform_device *pdev)
346{
347 struct corgi_ts *corgi_ts = platform_get_drvdata(pdev);
348
349 free_irq(corgi_ts->irq_gpio, corgi_ts);
350 del_timer_sync(&corgi_ts->timer);
351 corgi_ts->machinfo->put_hsync();
352 input_unregister_device(corgi_ts->input);
353 kfree(corgi_ts);
354
355 return 0;
356}
357
358static struct platform_driver corgits_driver = {
359 .probe = corgits_probe,
360 .remove = __devexit_p(corgits_remove),
361 .suspend = corgits_suspend,
362 .resume = corgits_resume,
363 .driver = {
364 .name = "corgi-ts",
365 .owner = THIS_MODULE,
366 },
367};
368
369static int __init corgits_init(void)
370{
371 return platform_driver_register(&corgits_driver);
372}
373
374static void __exit corgits_exit(void)
375{
376 platform_driver_unregister(&corgits_driver);
377}
378
379module_init(corgits_init);
380module_exit(corgits_exit);
381
382MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
383MODULE_DESCRIPTION("Corgi TouchScreen Driver");
384MODULE_LICENSE("GPL");
385MODULE_ALIAS("platform:corgi-ts");
diff --git a/drivers/input/touchscreen/s3c2410_ts.c b/drivers/input/touchscreen/s3c2410_ts.c
index 98a7d1279486..e0b7c834111d 100644
--- a/drivers/input/touchscreen/s3c2410_ts.c
+++ b/drivers/input/touchscreen/s3c2410_ts.c
@@ -37,9 +37,7 @@
37 37
38#include <plat/adc.h> 38#include <plat/adc.h>
39#include <plat/regs-adc.h> 39#include <plat/regs-adc.h>
40 40#include <plat/ts.h>
41#include <mach/regs-gpio.h>
42#include <mach/ts.h>
43 41
44#define TSC_SLEEP (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0)) 42#define TSC_SLEEP (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))
45 43
@@ -57,6 +55,8 @@
57 S3C2410_ADCTSC_AUTO_PST | \ 55 S3C2410_ADCTSC_AUTO_PST | \
58 S3C2410_ADCTSC_XY_PST(0)) 56 S3C2410_ADCTSC_XY_PST(0))
59 57
58#define FEAT_PEN_IRQ (1 << 0) /* HAS ADCCLRINTPNDNUP */
59
60/* Per-touchscreen data. */ 60/* Per-touchscreen data. */
61 61
62/** 62/**
@@ -71,6 +71,7 @@
71 * @irq_tc: The interrupt number for pen up/down interrupt 71 * @irq_tc: The interrupt number for pen up/down interrupt
72 * @count: The number of samples collected. 72 * @count: The number of samples collected.
73 * @shift: The log2 of the maximum count to read in one go. 73 * @shift: The log2 of the maximum count to read in one go.
74 * @features: The features supported by the TSADC MOdule.
74 */ 75 */
75struct s3c2410ts { 76struct s3c2410ts {
76 struct s3c_adc_client *client; 77 struct s3c_adc_client *client;
@@ -83,26 +84,12 @@ struct s3c2410ts {
83 int irq_tc; 84 int irq_tc;
84 int count; 85 int count;
85 int shift; 86 int shift;
87 int features;
86}; 88};
87 89
88static struct s3c2410ts ts; 90static struct s3c2410ts ts;
89 91
90/** 92/**
91 * s3c2410_ts_connect - configure gpio for s3c2410 systems
92 *
93 * Configure the GPIO for the S3C2410 system, where we have external FETs
94 * connected to the device (later systems such as the S3C2440 integrate
95 * these into the device).
96*/
97static inline void s3c2410_ts_connect(void)
98{
99 s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON);
100 s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPG13_nXPON);
101 s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON);
102 s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON);
103}
104
105/**
106 * get_down - return the down state of the pen 93 * get_down - return the down state of the pen
107 * @data0: The data read from ADCDAT0 register. 94 * @data0: The data read from ADCDAT0 register.
108 * @data1: The data read from ADCDAT1 register. 95 * @data1: The data read from ADCDAT1 register.
@@ -188,6 +175,11 @@ static irqreturn_t stylus_irq(int irq, void *dev_id)
188 else 175 else
189 dev_info(ts.dev, "%s: count=%d\n", __func__, ts.count); 176 dev_info(ts.dev, "%s: count=%d\n", __func__, ts.count);
190 177
178 if (ts.features & FEAT_PEN_IRQ) {
179 /* Clear pen down/up interrupt */
180 writel(0x0, ts.io + S3C64XX_ADCCLRINTPNDNUP);
181 }
182
191 return IRQ_HANDLED; 183 return IRQ_HANDLED;
192} 184}
193 185
@@ -296,9 +288,9 @@ static int __devinit s3c2410ts_probe(struct platform_device *pdev)
296 goto err_clk; 288 goto err_clk;
297 } 289 }
298 290
299 /* Configure the touchscreen external FETs on the S3C2410 */ 291 /* inititalise the gpio */
300 if (!platform_get_device_id(pdev)->driver_data) 292 if (info->cfg_gpio)
301 s3c2410_ts_connect(); 293 info->cfg_gpio(to_platform_device(ts.dev));
302 294
303 ts.client = s3c_adc_register(pdev, s3c24xx_ts_select, 295 ts.client = s3c_adc_register(pdev, s3c24xx_ts_select,
304 s3c24xx_ts_conversion, 1); 296 s3c24xx_ts_conversion, 1);
@@ -334,6 +326,7 @@ static int __devinit s3c2410ts_probe(struct platform_device *pdev)
334 ts.input->id.version = 0x0102; 326 ts.input->id.version = 0x0102;
335 327
336 ts.shift = info->oversampling_shift; 328 ts.shift = info->oversampling_shift;
329 ts.features = platform_get_device_id(pdev)->driver_data;
337 330
338 ret = request_irq(ts.irq_tc, stylus_irq, IRQF_DISABLED, 331 ret = request_irq(ts.irq_tc, stylus_irq, IRQF_DISABLED,
339 "s3c2410_ts_pen", ts.input); 332 "s3c2410_ts_pen", ts.input);
@@ -420,15 +413,14 @@ static struct dev_pm_ops s3c_ts_pmops = {
420#endif 413#endif
421 414
422static struct platform_device_id s3cts_driver_ids[] = { 415static struct platform_device_id s3cts_driver_ids[] = {
423 { "s3c2410-ts", 0 }, 416 { "s3c64xx-ts", FEAT_PEN_IRQ },
424 { "s3c2440-ts", 1 },
425 { } 417 { }
426}; 418};
427MODULE_DEVICE_TABLE(platform, s3cts_driver_ids); 419MODULE_DEVICE_TABLE(platform, s3cts_driver_ids);
428 420
429static struct platform_driver s3c_ts_driver = { 421static struct platform_driver s3c_ts_driver = {
430 .driver = { 422 .driver = {
431 .name = "s3c24xx-ts", 423 .name = "samsung-ts",
432 .owner = THIS_MODULE, 424 .owner = THIS_MODULE,
433#ifdef CONFIG_PM 425#ifdef CONFIG_PM
434 .pm = &s3c_ts_pmops, 426 .pm = &s3c_ts_pmops,
diff --git a/drivers/isdn/divert/divert_procfs.c b/drivers/isdn/divert/divert_procfs.c
index 9f49d9065791..c53e2417e7d4 100644
--- a/drivers/isdn/divert/divert_procfs.c
+++ b/drivers/isdn/divert/divert_procfs.c
@@ -20,6 +20,7 @@
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/isdnif.h> 21#include <linux/isdnif.h>
22#include <net/net_namespace.h> 22#include <net/net_namespace.h>
23#include <linux/smp_lock.h>
23#include "isdn_divert.h" 24#include "isdn_divert.h"
24 25
25 26
@@ -177,9 +178,7 @@ isdn_divert_close(struct inode *ino, struct file *filep)
177/*********/ 178/*********/
178/* IOCTL */ 179/* IOCTL */
179/*********/ 180/*********/
180static int 181static int isdn_divert_ioctl_unlocked(struct file *file, uint cmd, ulong arg)
181isdn_divert_ioctl(struct inode *inode, struct file *file,
182 uint cmd, ulong arg)
183{ 182{
184 divert_ioctl dioctl; 183 divert_ioctl dioctl;
185 int i; 184 int i;
@@ -258,6 +257,17 @@ isdn_divert_ioctl(struct inode *inode, struct file *file,
258 return copy_to_user((void __user *)arg, &dioctl, sizeof(dioctl)) ? -EFAULT : 0; 257 return copy_to_user((void __user *)arg, &dioctl, sizeof(dioctl)) ? -EFAULT : 0;
259} /* isdn_divert_ioctl */ 258} /* isdn_divert_ioctl */
260 259
260static long isdn_divert_ioctl(struct file *file, uint cmd, ulong arg)
261{
262 long ret;
263
264 lock_kernel();
265 ret = isdn_divert_ioctl_unlocked(file, cmd, arg);
266 unlock_kernel();
267
268 return ret;
269}
270
261static const struct file_operations isdn_fops = 271static const struct file_operations isdn_fops =
262{ 272{
263 .owner = THIS_MODULE, 273 .owner = THIS_MODULE,
@@ -265,7 +275,7 @@ static const struct file_operations isdn_fops =
265 .read = isdn_divert_read, 275 .read = isdn_divert_read,
266 .write = isdn_divert_write, 276 .write = isdn_divert_write,
267 .poll = isdn_divert_poll, 277 .poll = isdn_divert_poll,
268 .ioctl = isdn_divert_ioctl, 278 .unlocked_ioctl = isdn_divert_ioctl,
269 .open = isdn_divert_open, 279 .open = isdn_divert_open,
270 .release = isdn_divert_close, 280 .release = isdn_divert_close,
271}; 281};
diff --git a/drivers/misc/vmware_balloon.c b/drivers/misc/vmware_balloon.c
index e7161c4e3798..db9cd0240c6f 100644
--- a/drivers/misc/vmware_balloon.c
+++ b/drivers/misc/vmware_balloon.c
@@ -41,7 +41,7 @@
41#include <linux/workqueue.h> 41#include <linux/workqueue.h>
42#include <linux/debugfs.h> 42#include <linux/debugfs.h>
43#include <linux/seq_file.h> 43#include <linux/seq_file.h>
44#include <asm/vmware.h> 44#include <asm/hypervisor.h>
45 45
46MODULE_AUTHOR("VMware, Inc."); 46MODULE_AUTHOR("VMware, Inc.");
47MODULE_DESCRIPTION("VMware Memory Control (Balloon) Driver"); 47MODULE_DESCRIPTION("VMware Memory Control (Balloon) Driver");
@@ -767,7 +767,7 @@ static int __init vmballoon_init(void)
767 * Check if we are running on VMware's hypervisor and bail out 767 * Check if we are running on VMware's hypervisor and bail out
768 * if we are not. 768 * if we are not.
769 */ 769 */
770 if (!vmware_platform()) 770 if (x86_hyper != &x86_hyper_vmware)
771 return -ENODEV; 771 return -ENODEV;
772 772
773 vmballoon_wq = create_freezeable_workqueue("vmmemctl"); 773 vmballoon_wq = create_freezeable_workqueue("vmmemctl");
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index a6dd7da37357..336d9f553f3e 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -314,8 +314,8 @@ static void at91_mci_post_dma_read(struct at91mci_host *host)
314 dmabuf = (unsigned *)tmpv; 314 dmabuf = (unsigned *)tmpv;
315 } 315 }
316 316
317 flush_kernel_dcache_page(sg_page(sg));
317 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ); 318 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
318 dmac_flush_range((void *)sgbuffer, ((void *)sgbuffer) + amount);
319 data->bytes_xfered += amount; 319 data->bytes_xfered += amount;
320 if (size == 0) 320 if (size == 0)
321 break; 321 break;
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 84c103a7ee13..ff115d920888 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -55,14 +55,16 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
55 host->cclk = host->mclk / (2 * (clk + 1)); 55 host->cclk = host->mclk / (2 * (clk + 1));
56 } 56 }
57 if (host->hw_designer == AMBA_VENDOR_ST) 57 if (host->hw_designer == AMBA_VENDOR_ST)
58 clk |= MCI_FCEN; /* Bug fix in ST IP block */ 58 clk |= MCI_ST_FCEN; /* Bug fix in ST IP block */
59 clk |= MCI_CLK_ENABLE; 59 clk |= MCI_CLK_ENABLE;
60 /* This hasn't proven to be worthwhile */ 60 /* This hasn't proven to be worthwhile */
61 /* clk |= MCI_CLK_PWRSAVE; */ 61 /* clk |= MCI_CLK_PWRSAVE; */
62 } 62 }
63 63
64 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) 64 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4)
65 clk |= MCI_WIDE_BUS; 65 clk |= MCI_4BIT_BUS;
66 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8)
67 clk |= MCI_ST_8BIT_BUS;
66 68
67 writel(clk, host->base + MMCICLOCK); 69 writel(clk, host->base + MMCICLOCK);
68} 70}
@@ -629,7 +631,18 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
629 631
630 mmc->ops = &mmci_ops; 632 mmc->ops = &mmci_ops;
631 mmc->f_min = (host->mclk + 511) / 512; 633 mmc->f_min = (host->mclk + 511) / 512;
632 mmc->f_max = min(host->mclk, fmax); 634 /*
635 * If the platform data supplies a maximum operating
636 * frequency, this takes precedence. Else, we fall back
637 * to using the module parameter, which has a (low)
638 * default value in case it is not specified. Either
639 * value must not exceed the clock rate into the block,
640 * of course.
641 */
642 if (plat->f_max)
643 mmc->f_max = min(host->mclk, plat->f_max);
644 else
645 mmc->f_max = min(host->mclk, fmax);
633 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); 646 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
634 647
635#ifdef CONFIG_REGULATOR 648#ifdef CONFIG_REGULATOR
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index 1ceb9a90f59b..d77062e5e3af 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -25,9 +25,11 @@
25#define MCI_CLK_ENABLE (1 << 8) 25#define MCI_CLK_ENABLE (1 << 8)
26#define MCI_CLK_PWRSAVE (1 << 9) 26#define MCI_CLK_PWRSAVE (1 << 9)
27#define MCI_CLK_BYPASS (1 << 10) 27#define MCI_CLK_BYPASS (1 << 10)
28#define MCI_WIDE_BUS (1 << 11) 28#define MCI_4BIT_BUS (1 << 11)
29/* 8bit wide buses supported in ST Micro versions */
30#define MCI_ST_8BIT_BUS (1 << 12)
29/* HW flow control on the ST Micro version */ 31/* HW flow control on the ST Micro version */
30#define MCI_FCEN (1 << 13) 32#define MCI_ST_FCEN (1 << 13)
31 33
32#define MMCIARGUMENT 0x008 34#define MMCIARGUMENT 0x008
33#define MMCICOMMAND 0x00c 35#define MMCICOMMAND 0x00c
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 0ed48959b590..e4f00e70a749 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -544,7 +544,7 @@ static irqreturn_t pxamci_detect_irq(int irq, void *devid)
544{ 544{
545 struct pxamci_host *host = mmc_priv(devid); 545 struct pxamci_host *host = mmc_priv(devid);
546 546
547 mmc_detect_change(devid, host->pdata->detect_delay); 547 mmc_detect_change(devid, msecs_to_jiffies(host->pdata->detect_delay_ms));
548 return IRQ_HANDLED; 548 return IRQ_HANDLED;
549} 549}
550 550
diff --git a/drivers/net/a2065.c b/drivers/net/a2065.c
index ed5e9742be2c..a8f0512bad38 100644
--- a/drivers/net/a2065.c
+++ b/drivers/net/a2065.c
@@ -674,6 +674,7 @@ static struct zorro_device_id a2065_zorro_tbl[] __devinitdata = {
674 { ZORRO_PROD_AMERISTAR_A2065 }, 674 { ZORRO_PROD_AMERISTAR_A2065 },
675 { 0 } 675 { 0 }
676}; 676};
677MODULE_DEVICE_TABLE(zorro, a2065_zorro_tbl);
677 678
678static struct zorro_driver a2065_driver = { 679static struct zorro_driver a2065_driver = {
679 .name = "a2065", 680 .name = "a2065",
diff --git a/drivers/net/ariadne.c b/drivers/net/ariadne.c
index fa1a2354f5f9..4b30a46486e2 100644
--- a/drivers/net/ariadne.c
+++ b/drivers/net/ariadne.c
@@ -145,6 +145,7 @@ static struct zorro_device_id ariadne_zorro_tbl[] __devinitdata = {
145 { ZORRO_PROD_VILLAGE_TRONIC_ARIADNE }, 145 { ZORRO_PROD_VILLAGE_TRONIC_ARIADNE },
146 { 0 } 146 { 0 }
147}; 147};
148MODULE_DEVICE_TABLE(zorro, ariadne_zorro_tbl);
148 149
149static struct zorro_driver ariadne_driver = { 150static struct zorro_driver ariadne_driver = {
150 .name = "ariadne", 151 .name = "ariadne",
diff --git a/drivers/net/hydra.c b/drivers/net/hydra.c
index 24724b4ad709..07d8e5b634f3 100644
--- a/drivers/net/hydra.c
+++ b/drivers/net/hydra.c
@@ -71,6 +71,7 @@ static struct zorro_device_id hydra_zorro_tbl[] __devinitdata = {
71 { ZORRO_PROD_HYDRA_SYSTEMS_AMIGANET }, 71 { ZORRO_PROD_HYDRA_SYSTEMS_AMIGANET },
72 { 0 } 72 { 0 }
73}; 73};
74MODULE_DEVICE_TABLE(zorro, hydra_zorro_tbl);
74 75
75static struct zorro_driver hydra_driver = { 76static struct zorro_driver hydra_driver = {
76 .name = "hydra", 77 .name = "hydra",
diff --git a/drivers/net/zorro8390.c b/drivers/net/zorro8390.c
index 81c753a617ab..9548cbb5012a 100644
--- a/drivers/net/zorro8390.c
+++ b/drivers/net/zorro8390.c
@@ -102,6 +102,7 @@ static struct zorro_device_id zorro8390_zorro_tbl[] __devinitdata = {
102 { ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF, }, 102 { ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF, },
103 { 0 } 103 { 0 }
104}; 104};
105MODULE_DEVICE_TABLE(zorro, zorro8390_zorro_tbl);
105 106
106static struct zorro_driver zorro8390_driver = { 107static struct zorro_driver zorro8390_driver = {
107 .name = "zorro8390", 108 .name = "zorro8390",
diff --git a/drivers/oprofile/cpu_buffer.c b/drivers/oprofile/cpu_buffer.c
index 166b67ea622f..219f79e2210a 100644
--- a/drivers/oprofile/cpu_buffer.c
+++ b/drivers/oprofile/cpu_buffer.c
@@ -30,23 +30,7 @@
30 30
31#define OP_BUFFER_FLAGS 0 31#define OP_BUFFER_FLAGS 0
32 32
33/* 33static struct ring_buffer *op_ring_buffer;
34 * Read and write access is using spin locking. Thus, writing to the
35 * buffer by NMI handler (x86) could occur also during critical
36 * sections when reading the buffer. To avoid this, there are 2
37 * buffers for independent read and write access. Read access is in
38 * process context only, write access only in the NMI handler. If the
39 * read buffer runs empty, both buffers are swapped atomically. There
40 * is potentially a small window during swapping where the buffers are
41 * disabled and samples could be lost.
42 *
43 * Using 2 buffers is a little bit overhead, but the solution is clear
44 * and does not require changes in the ring buffer implementation. It
45 * can be changed to a single buffer solution when the ring buffer
46 * access is implemented as non-locking atomic code.
47 */
48static struct ring_buffer *op_ring_buffer_read;
49static struct ring_buffer *op_ring_buffer_write;
50DEFINE_PER_CPU(struct oprofile_cpu_buffer, op_cpu_buffer); 34DEFINE_PER_CPU(struct oprofile_cpu_buffer, op_cpu_buffer);
51 35
52static void wq_sync_buffer(struct work_struct *work); 36static void wq_sync_buffer(struct work_struct *work);
@@ -68,12 +52,9 @@ void oprofile_cpu_buffer_inc_smpl_lost(void)
68 52
69void free_cpu_buffers(void) 53void free_cpu_buffers(void)
70{ 54{
71 if (op_ring_buffer_read) 55 if (op_ring_buffer)
72 ring_buffer_free(op_ring_buffer_read); 56 ring_buffer_free(op_ring_buffer);
73 op_ring_buffer_read = NULL; 57 op_ring_buffer = NULL;
74 if (op_ring_buffer_write)
75 ring_buffer_free(op_ring_buffer_write);
76 op_ring_buffer_write = NULL;
77} 58}
78 59
79#define RB_EVENT_HDR_SIZE 4 60#define RB_EVENT_HDR_SIZE 4
@@ -86,11 +67,8 @@ int alloc_cpu_buffers(void)
86 unsigned long byte_size = buffer_size * (sizeof(struct op_sample) + 67 unsigned long byte_size = buffer_size * (sizeof(struct op_sample) +
87 RB_EVENT_HDR_SIZE); 68 RB_EVENT_HDR_SIZE);
88 69
89 op_ring_buffer_read = ring_buffer_alloc(byte_size, OP_BUFFER_FLAGS); 70 op_ring_buffer = ring_buffer_alloc(byte_size, OP_BUFFER_FLAGS);
90 if (!op_ring_buffer_read) 71 if (!op_ring_buffer)
91 goto fail;
92 op_ring_buffer_write = ring_buffer_alloc(byte_size, OP_BUFFER_FLAGS);
93 if (!op_ring_buffer_write)
94 goto fail; 72 goto fail;
95 73
96 for_each_possible_cpu(i) { 74 for_each_possible_cpu(i) {
@@ -162,16 +140,11 @@ struct op_sample
162*op_cpu_buffer_write_reserve(struct op_entry *entry, unsigned long size) 140*op_cpu_buffer_write_reserve(struct op_entry *entry, unsigned long size)
163{ 141{
164 entry->event = ring_buffer_lock_reserve 142 entry->event = ring_buffer_lock_reserve
165 (op_ring_buffer_write, sizeof(struct op_sample) + 143 (op_ring_buffer, sizeof(struct op_sample) +
166 size * sizeof(entry->sample->data[0])); 144 size * sizeof(entry->sample->data[0]));
167 if (entry->event) 145 if (!entry->event)
168 entry->sample = ring_buffer_event_data(entry->event);
169 else
170 entry->sample = NULL;
171
172 if (!entry->sample)
173 return NULL; 146 return NULL;
174 147 entry->sample = ring_buffer_event_data(entry->event);
175 entry->size = size; 148 entry->size = size;
176 entry->data = entry->sample->data; 149 entry->data = entry->sample->data;
177 150
@@ -180,25 +153,16 @@ struct op_sample
180 153
181int op_cpu_buffer_write_commit(struct op_entry *entry) 154int op_cpu_buffer_write_commit(struct op_entry *entry)
182{ 155{
183 return ring_buffer_unlock_commit(op_ring_buffer_write, entry->event); 156 return ring_buffer_unlock_commit(op_ring_buffer, entry->event);
184} 157}
185 158
186struct op_sample *op_cpu_buffer_read_entry(struct op_entry *entry, int cpu) 159struct op_sample *op_cpu_buffer_read_entry(struct op_entry *entry, int cpu)
187{ 160{
188 struct ring_buffer_event *e; 161 struct ring_buffer_event *e;
189 e = ring_buffer_consume(op_ring_buffer_read, cpu, NULL); 162 e = ring_buffer_consume(op_ring_buffer, cpu, NULL, NULL);
190 if (e) 163 if (!e)
191 goto event;
192 if (ring_buffer_swap_cpu(op_ring_buffer_read,
193 op_ring_buffer_write,
194 cpu))
195 return NULL; 164 return NULL;
196 e = ring_buffer_consume(op_ring_buffer_read, cpu, NULL);
197 if (e)
198 goto event;
199 return NULL;
200 165
201event:
202 entry->event = e; 166 entry->event = e;
203 entry->sample = ring_buffer_event_data(e); 167 entry->sample = ring_buffer_event_data(e);
204 entry->size = (ring_buffer_event_length(e) - sizeof(struct op_sample)) 168 entry->size = (ring_buffer_event_length(e) - sizeof(struct op_sample))
@@ -209,8 +173,7 @@ event:
209 173
210unsigned long op_cpu_buffer_entries(int cpu) 174unsigned long op_cpu_buffer_entries(int cpu)
211{ 175{
212 return ring_buffer_entries_cpu(op_ring_buffer_read, cpu) 176 return ring_buffer_entries_cpu(op_ring_buffer, cpu);
213 + ring_buffer_entries_cpu(op_ring_buffer_write, cpu);
214} 177}
215 178
216static int 179static int
@@ -356,8 +319,16 @@ void oprofile_add_ext_sample(unsigned long pc, struct pt_regs * const regs,
356 319
357void oprofile_add_sample(struct pt_regs * const regs, unsigned long event) 320void oprofile_add_sample(struct pt_regs * const regs, unsigned long event)
358{ 321{
359 int is_kernel = !user_mode(regs); 322 int is_kernel;
360 unsigned long pc = profile_pc(regs); 323 unsigned long pc;
324
325 if (likely(regs)) {
326 is_kernel = !user_mode(regs);
327 pc = profile_pc(regs);
328 } else {
329 is_kernel = 0; /* This value will not be used */
330 pc = ESCAPE_CODE; /* as this causes an early return. */
331 }
361 332
362 __oprofile_add_ext_sample(pc, regs, event, is_kernel); 333 __oprofile_add_ext_sample(pc, regs, event, is_kernel);
363} 334}
diff --git a/drivers/oprofile/oprof.c b/drivers/oprofile/oprof.c
index dc8a0428260d..b336cd9ee7a1 100644
--- a/drivers/oprofile/oprof.c
+++ b/drivers/oprofile/oprof.c
@@ -253,22 +253,26 @@ static int __init oprofile_init(void)
253 int err; 253 int err;
254 254
255 err = oprofile_arch_init(&oprofile_ops); 255 err = oprofile_arch_init(&oprofile_ops);
256
257 if (err < 0 || timer) { 256 if (err < 0 || timer) {
258 printk(KERN_INFO "oprofile: using timer interrupt.\n"); 257 printk(KERN_INFO "oprofile: using timer interrupt.\n");
259 oprofile_timer_init(&oprofile_ops); 258 err = oprofile_timer_init(&oprofile_ops);
259 if (err)
260 goto out_arch;
260 } 261 }
261
262 err = oprofilefs_register(); 262 err = oprofilefs_register();
263 if (err) 263 if (err)
264 oprofile_arch_exit(); 264 goto out_arch;
265 return 0;
265 266
267out_arch:
268 oprofile_arch_exit();
266 return err; 269 return err;
267} 270}
268 271
269 272
270static void __exit oprofile_exit(void) 273static void __exit oprofile_exit(void)
271{ 274{
275 oprofile_timer_exit();
272 oprofilefs_unregister(); 276 oprofilefs_unregister();
273 oprofile_arch_exit(); 277 oprofile_arch_exit();
274} 278}
diff --git a/drivers/oprofile/oprof.h b/drivers/oprofile/oprof.h
index cb92f5c98c1a..47e12cb4ee8b 100644
--- a/drivers/oprofile/oprof.h
+++ b/drivers/oprofile/oprof.h
@@ -34,7 +34,8 @@ struct super_block;
34struct dentry; 34struct dentry;
35 35
36void oprofile_create_files(struct super_block *sb, struct dentry *root); 36void oprofile_create_files(struct super_block *sb, struct dentry *root);
37void oprofile_timer_init(struct oprofile_operations *ops); 37int oprofile_timer_init(struct oprofile_operations *ops);
38void oprofile_timer_exit(void);
38 39
39int oprofile_set_backtrace(unsigned long depth); 40int oprofile_set_backtrace(unsigned long depth);
40int oprofile_set_timeout(unsigned long time); 41int oprofile_set_timeout(unsigned long time);
diff --git a/drivers/oprofile/timer_int.c b/drivers/oprofile/timer_int.c
index 333f915568c7..dc0ae4d14dff 100644
--- a/drivers/oprofile/timer_int.c
+++ b/drivers/oprofile/timer_int.c
@@ -13,34 +13,94 @@
13#include <linux/oprofile.h> 13#include <linux/oprofile.h>
14#include <linux/profile.h> 14#include <linux/profile.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/cpu.h>
17#include <linux/hrtimer.h>
18#include <asm/irq_regs.h>
16#include <asm/ptrace.h> 19#include <asm/ptrace.h>
17 20
18#include "oprof.h" 21#include "oprof.h"
19 22
20static int timer_notify(struct pt_regs *regs) 23static DEFINE_PER_CPU(struct hrtimer, oprofile_hrtimer);
24
25static enum hrtimer_restart oprofile_hrtimer_notify(struct hrtimer *hrtimer)
26{
27 oprofile_add_sample(get_irq_regs(), 0);
28 hrtimer_forward_now(hrtimer, ns_to_ktime(TICK_NSEC));
29 return HRTIMER_RESTART;
30}
31
32static void __oprofile_hrtimer_start(void *unused)
33{
34 struct hrtimer *hrtimer = &__get_cpu_var(oprofile_hrtimer);
35
36 hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
37 hrtimer->function = oprofile_hrtimer_notify;
38
39 hrtimer_start(hrtimer, ns_to_ktime(TICK_NSEC),
40 HRTIMER_MODE_REL_PINNED);
41}
42
43static int oprofile_hrtimer_start(void)
21{ 44{
22 oprofile_add_sample(regs, 0); 45 on_each_cpu(__oprofile_hrtimer_start, NULL, 1);
23 return 0; 46 return 0;
24} 47}
25 48
26static int timer_start(void) 49static void __oprofile_hrtimer_stop(int cpu)
27{ 50{
28 return register_timer_hook(timer_notify); 51 struct hrtimer *hrtimer = &per_cpu(oprofile_hrtimer, cpu);
52
53 hrtimer_cancel(hrtimer);
29} 54}
30 55
56static void oprofile_hrtimer_stop(void)
57{
58 int cpu;
59
60 for_each_online_cpu(cpu)
61 __oprofile_hrtimer_stop(cpu);
62}
31 63
32static void timer_stop(void) 64static int __cpuinit oprofile_cpu_notify(struct notifier_block *self,
65 unsigned long action, void *hcpu)
33{ 66{
34 unregister_timer_hook(timer_notify); 67 long cpu = (long) hcpu;
68
69 switch (action) {
70 case CPU_ONLINE:
71 case CPU_ONLINE_FROZEN:
72 smp_call_function_single(cpu, __oprofile_hrtimer_start,
73 NULL, 1);
74 break;
75 case CPU_DEAD:
76 case CPU_DEAD_FROZEN:
77 __oprofile_hrtimer_stop(cpu);
78 break;
79 }
80 return NOTIFY_OK;
35} 81}
36 82
83static struct notifier_block __refdata oprofile_cpu_notifier = {
84 .notifier_call = oprofile_cpu_notify,
85};
37 86
38void __init oprofile_timer_init(struct oprofile_operations *ops) 87int __init oprofile_timer_init(struct oprofile_operations *ops)
39{ 88{
89 int rc;
90
91 rc = register_hotcpu_notifier(&oprofile_cpu_notifier);
92 if (rc)
93 return rc;
40 ops->create_files = NULL; 94 ops->create_files = NULL;
41 ops->setup = NULL; 95 ops->setup = NULL;
42 ops->shutdown = NULL; 96 ops->shutdown = NULL;
43 ops->start = timer_start; 97 ops->start = oprofile_hrtimer_start;
44 ops->stop = timer_stop; 98 ops->stop = oprofile_hrtimer_stop;
45 ops->cpu_type = "timer"; 99 ops->cpu_type = "timer";
100 return 0;
101}
102
103void __exit oprofile_timer_exit(void)
104{
105 unregister_hotcpu_notifier(&oprofile_cpu_notifier);
46} 106}
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 417312528ddf..371dc564e2e4 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -3626,14 +3626,15 @@ static void intel_iommu_detach_device(struct iommu_domain *domain,
3626 domain_remove_one_dev_info(dmar_domain, pdev); 3626 domain_remove_one_dev_info(dmar_domain, pdev);
3627} 3627}
3628 3628
3629static int intel_iommu_map_range(struct iommu_domain *domain, 3629static int intel_iommu_map(struct iommu_domain *domain,
3630 unsigned long iova, phys_addr_t hpa, 3630 unsigned long iova, phys_addr_t hpa,
3631 size_t size, int iommu_prot) 3631 int gfp_order, int iommu_prot)
3632{ 3632{
3633 struct dmar_domain *dmar_domain = domain->priv; 3633 struct dmar_domain *dmar_domain = domain->priv;
3634 u64 max_addr; 3634 u64 max_addr;
3635 int addr_width; 3635 int addr_width;
3636 int prot = 0; 3636 int prot = 0;
3637 size_t size;
3637 int ret; 3638 int ret;
3638 3639
3639 if (iommu_prot & IOMMU_READ) 3640 if (iommu_prot & IOMMU_READ)
@@ -3643,6 +3644,7 @@ static int intel_iommu_map_range(struct iommu_domain *domain,
3643 if ((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping) 3644 if ((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping)
3644 prot |= DMA_PTE_SNP; 3645 prot |= DMA_PTE_SNP;
3645 3646
3647 size = PAGE_SIZE << gfp_order;
3646 max_addr = iova + size; 3648 max_addr = iova + size;
3647 if (dmar_domain->max_addr < max_addr) { 3649 if (dmar_domain->max_addr < max_addr) {
3648 int min_agaw; 3650 int min_agaw;
@@ -3669,19 +3671,19 @@ static int intel_iommu_map_range(struct iommu_domain *domain,
3669 return ret; 3671 return ret;
3670} 3672}
3671 3673
3672static void intel_iommu_unmap_range(struct iommu_domain *domain, 3674static int intel_iommu_unmap(struct iommu_domain *domain,
3673 unsigned long iova, size_t size) 3675 unsigned long iova, int gfp_order)
3674{ 3676{
3675 struct dmar_domain *dmar_domain = domain->priv; 3677 struct dmar_domain *dmar_domain = domain->priv;
3676 3678 size_t size = PAGE_SIZE << gfp_order;
3677 if (!size)
3678 return;
3679 3679
3680 dma_pte_clear_range(dmar_domain, iova >> VTD_PAGE_SHIFT, 3680 dma_pte_clear_range(dmar_domain, iova >> VTD_PAGE_SHIFT,
3681 (iova + size - 1) >> VTD_PAGE_SHIFT); 3681 (iova + size - 1) >> VTD_PAGE_SHIFT);
3682 3682
3683 if (dmar_domain->max_addr == iova + size) 3683 if (dmar_domain->max_addr == iova + size)
3684 dmar_domain->max_addr = iova; 3684 dmar_domain->max_addr = iova;
3685
3686 return gfp_order;
3685} 3687}
3686 3688
3687static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, 3689static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain,
@@ -3714,8 +3716,8 @@ static struct iommu_ops intel_iommu_ops = {
3714 .domain_destroy = intel_iommu_domain_destroy, 3716 .domain_destroy = intel_iommu_domain_destroy,
3715 .attach_dev = intel_iommu_attach_device, 3717 .attach_dev = intel_iommu_attach_device,
3716 .detach_dev = intel_iommu_detach_device, 3718 .detach_dev = intel_iommu_detach_device,
3717 .map = intel_iommu_map_range, 3719 .map = intel_iommu_map,
3718 .unmap = intel_iommu_unmap_range, 3720 .unmap = intel_iommu_unmap,
3719 .iova_to_phys = intel_iommu_iova_to_phys, 3721 .iova_to_phys = intel_iommu_iova_to_phys,
3720 .domain_has_cap = intel_iommu_domain_has_cap, 3722 .domain_has_cap = intel_iommu_domain_has_cap,
3721}; 3723};
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index d189e4743e69..a44733d44ca1 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -234,7 +234,8 @@ config PCMCIA_PXA2XX
234 depends on ARM && ARCH_PXA && PCMCIA 234 depends on ARM && ARCH_PXA && PCMCIA
235 depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \ 235 depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
236 || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \ 236 || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
237 || ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2) 237 || ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \
238 || MACH_VPAC270)
238 select PCMCIA_SOC_COMMON 239 select PCMCIA_SOC_COMMON
239 help 240 help
240 Say Y here to include support for the PXA2xx PCMCIA controller 241 Say Y here to include support for the PXA2xx PCMCIA controller
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index 381b031d9d75..4dae3613c458 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -66,6 +66,7 @@ pxa2xx-obj-$(CONFIG_MACH_PALMTC) += pxa2xx_palmtc.o
66pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa2xx_palmld.o 66pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa2xx_palmld.o
67pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o 67pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o
68pxa2xx-obj-$(CONFIG_MACH_STARGATE2) += pxa2xx_stargate2.o 68pxa2xx-obj-$(CONFIG_MACH_STARGATE2) += pxa2xx_stargate2.o
69pxa2xx-obj-$(CONFIG_MACH_VPAC270) += pxa2xx_vpac270.o
69 70
70obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y) 71obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y)
71 72
diff --git a/drivers/pcmcia/pxa2xx_vpac270.c b/drivers/pcmcia/pxa2xx_vpac270.c
new file mode 100644
index 000000000000..55627eccee8e
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_vpac270.c
@@ -0,0 +1,229 @@
1/*
2 * linux/drivers/pcmcia/pxa2xx_vpac270.c
3 *
4 * Driver for Voipac PXA270 PCMCIA and CF sockets
5 *
6 * Copyright (C) 2010
7 * Marek Vasut <marek.vasut@gmail.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/module.h>
16#include <linux/platform_device.h>
17
18#include <asm/mach-types.h>
19
20#include <mach/gpio.h>
21#include <mach/vpac270.h>
22
23#include "soc_common.h"
24
25static struct pcmcia_irqs cd_irqs[] = {
26 {
27 .sock = 0,
28 .irq = IRQ_GPIO(GPIO84_VPAC270_PCMCIA_CD),
29 .str = "PCMCIA CD"
30 },
31 {
32 .sock = 1,
33 .irq = IRQ_GPIO(GPIO17_VPAC270_CF_CD),
34 .str = "CF CD"
35 },
36};
37
38static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
39{
40 int ret;
41
42 if (skt->nr == 0) {
43 ret = gpio_request(GPIO84_VPAC270_PCMCIA_CD, "PCMCIA CD");
44 if (ret)
45 goto err1;
46 ret = gpio_direction_input(GPIO84_VPAC270_PCMCIA_CD);
47 if (ret)
48 goto err2;
49
50 ret = gpio_request(GPIO35_VPAC270_PCMCIA_RDY, "PCMCIA RDY");
51 if (ret)
52 goto err2;
53 ret = gpio_direction_input(GPIO35_VPAC270_PCMCIA_RDY);
54 if (ret)
55 goto err3;
56
57 ret = gpio_request(GPIO107_VPAC270_PCMCIA_PPEN, "PCMCIA PPEN");
58 if (ret)
59 goto err3;
60 ret = gpio_direction_output(GPIO107_VPAC270_PCMCIA_PPEN, 0);
61 if (ret)
62 goto err4;
63
64 ret = gpio_request(GPIO11_VPAC270_PCMCIA_RESET, "PCMCIA RESET");
65 if (ret)
66 goto err4;
67 ret = gpio_direction_output(GPIO11_VPAC270_PCMCIA_RESET, 0);
68 if (ret)
69 goto err5;
70
71 skt->socket.pci_irq = gpio_to_irq(GPIO35_VPAC270_PCMCIA_RDY);
72
73 return soc_pcmcia_request_irqs(skt, &cd_irqs[0], 1);
74
75err5:
76 gpio_free(GPIO11_VPAC270_PCMCIA_RESET);
77err4:
78 gpio_free(GPIO107_VPAC270_PCMCIA_PPEN);
79err3:
80 gpio_free(GPIO35_VPAC270_PCMCIA_RDY);
81err2:
82 gpio_free(GPIO84_VPAC270_PCMCIA_CD);
83err1:
84 return ret;
85
86 } else {
87 ret = gpio_request(GPIO17_VPAC270_CF_CD, "CF CD");
88 if (ret)
89 goto err6;
90 ret = gpio_direction_input(GPIO17_VPAC270_CF_CD);
91 if (ret)
92 goto err7;
93
94 ret = gpio_request(GPIO12_VPAC270_CF_RDY, "CF RDY");
95 if (ret)
96 goto err7;
97 ret = gpio_direction_input(GPIO12_VPAC270_CF_RDY);
98 if (ret)
99 goto err8;
100
101 ret = gpio_request(GPIO16_VPAC270_CF_RESET, "CF RESET");
102 if (ret)
103 goto err8;
104 ret = gpio_direction_output(GPIO16_VPAC270_CF_RESET, 0);
105 if (ret)
106 goto err9;
107
108 skt->socket.pci_irq = gpio_to_irq(GPIO12_VPAC270_CF_RDY);
109
110 return soc_pcmcia_request_irqs(skt, &cd_irqs[1], 1);
111
112err9:
113 gpio_free(GPIO16_VPAC270_CF_RESET);
114err8:
115 gpio_free(GPIO12_VPAC270_CF_RDY);
116err7:
117 gpio_free(GPIO17_VPAC270_CF_CD);
118err6:
119 return ret;
120
121 }
122}
123
124static void vpac270_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
125{
126 gpio_free(GPIO11_VPAC270_PCMCIA_RESET);
127 gpio_free(GPIO107_VPAC270_PCMCIA_PPEN);
128 gpio_free(GPIO35_VPAC270_PCMCIA_RDY);
129 gpio_free(GPIO84_VPAC270_PCMCIA_CD);
130 gpio_free(GPIO16_VPAC270_CF_RESET);
131 gpio_free(GPIO12_VPAC270_CF_RDY);
132 gpio_free(GPIO17_VPAC270_CF_CD);
133}
134
135static void vpac270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
136 struct pcmcia_state *state)
137{
138 if (skt->nr == 0) {
139 state->detect = !gpio_get_value(GPIO84_VPAC270_PCMCIA_CD);
140 state->ready = !!gpio_get_value(GPIO35_VPAC270_PCMCIA_RDY);
141 } else {
142 state->detect = !gpio_get_value(GPIO17_VPAC270_CF_CD);
143 state->ready = !!gpio_get_value(GPIO12_VPAC270_CF_RDY);
144 }
145 state->bvd1 = 1;
146 state->bvd2 = 1;
147 state->wrprot = 0;
148 state->vs_3v = 1;
149 state->vs_Xv = 0;
150}
151
152static int
153vpac270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
154 const socket_state_t *state)
155{
156 if (skt->nr == 0) {
157 gpio_set_value(GPIO11_VPAC270_PCMCIA_RESET,
158 (state->flags & SS_RESET));
159 gpio_set_value(GPIO107_VPAC270_PCMCIA_PPEN,
160 !(state->Vcc == 33 || state->Vcc == 50));
161 } else {
162 gpio_set_value(GPIO16_VPAC270_CF_RESET,
163 (state->flags & SS_RESET));
164 }
165
166 return 0;
167}
168
169static void vpac270_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
170{
171}
172
173static void vpac270_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
174{
175}
176
177static struct pcmcia_low_level vpac270_pcmcia_ops = {
178 .owner = THIS_MODULE,
179
180 .first = 0,
181 .nr = 2,
182
183 .hw_init = vpac270_pcmcia_hw_init,
184 .hw_shutdown = vpac270_pcmcia_hw_shutdown,
185
186 .socket_state = vpac270_pcmcia_socket_state,
187 .configure_socket = vpac270_pcmcia_configure_socket,
188
189 .socket_init = vpac270_pcmcia_socket_init,
190 .socket_suspend = vpac270_pcmcia_socket_suspend,
191};
192
193static struct platform_device *vpac270_pcmcia_device;
194
195static int __init vpac270_pcmcia_init(void)
196{
197 int ret;
198
199 if (!machine_is_vpac270())
200 return -ENODEV;
201
202 vpac270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
203 if (!vpac270_pcmcia_device)
204 return -ENOMEM;
205
206 ret = platform_device_add_data(vpac270_pcmcia_device,
207 &vpac270_pcmcia_ops, sizeof(vpac270_pcmcia_ops));
208
209 if (!ret)
210 ret = platform_device_add(vpac270_pcmcia_device);
211
212 if (ret)
213 platform_device_put(vpac270_pcmcia_device);
214
215 return ret;
216}
217
218static void __exit vpac270_pcmcia_exit(void)
219{
220 platform_device_unregister(vpac270_pcmcia_device);
221}
222
223module_init(vpac270_pcmcia_init);
224module_exit(vpac270_pcmcia_exit);
225
226MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
227MODULE_DESCRIPTION("PCMCIA support for Voipac PXA270");
228MODULE_ALIAS("platform:pxa2xx-pcmcia");
229MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 6a1303759432..50ac047cd136 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -620,6 +620,16 @@ config RTC_DRV_NUC900
620 620
621comment "on-CPU RTC drivers" 621comment "on-CPU RTC drivers"
622 622
623config RTC_DRV_DAVINCI
624 tristate "TI DaVinci RTC"
625 depends on ARCH_DAVINCI_DM365
626 help
627 If you say yes here you get support for the RTC on the
628 DaVinci platforms (DM365).
629
630 This driver can also be built as a module. If so, the module
631 will be called rtc-davinci.
632
623config RTC_DRV_OMAP 633config RTC_DRV_OMAP
624 tristate "TI OMAP1" 634 tristate "TI OMAP1"
625 depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX 635 depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 44ef194a9573..245311a1348f 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_RTC_DRV_BQ32K) += rtc-bq32k.o
27obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o 27obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o
28obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o 28obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o
29obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o 29obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o
30obj-$(CONFIG_RTC_DRV_DAVINCI) += rtc-davinci.o
30obj-$(CONFIG_RTC_DRV_DM355EVM) += rtc-dm355evm.o 31obj-$(CONFIG_RTC_DRV_DM355EVM) += rtc-dm355evm.o
31obj-$(CONFIG_RTC_DRV_DS1216) += rtc-ds1216.o 32obj-$(CONFIG_RTC_DRV_DS1216) += rtc-ds1216.o
32obj-$(CONFIG_RTC_DRV_DS1286) += rtc-ds1286.o 33obj-$(CONFIG_RTC_DRV_DS1286) += rtc-ds1286.o
diff --git a/drivers/rtc/rtc-davinci.c b/drivers/rtc/rtc-davinci.c
new file mode 100644
index 000000000000..92a8f6cacda9
--- /dev/null
+++ b/drivers/rtc/rtc-davinci.c
@@ -0,0 +1,673 @@
1/*
2 * DaVinci Power Management and Real Time Clock Driver for TI platforms
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc
5 *
6 * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/spinlock.h>
28#include <linux/rtc.h>
29#include <linux/bcd.h>
30#include <linux/platform_device.h>
31#include <linux/io.h>
32
33/*
34 * The DaVinci RTC is a simple RTC with the following
35 * Sec: 0 - 59 : BCD count
36 * Min: 0 - 59 : BCD count
37 * Hour: 0 - 23 : BCD count
38 * Day: 0 - 0x7FFF(32767) : Binary count ( Over 89 years )
39 */
40
41/* PRTC interface registers */
42#define DAVINCI_PRTCIF_PID 0x00
43#define PRTCIF_CTLR 0x04
44#define PRTCIF_LDATA 0x08
45#define PRTCIF_UDATA 0x0C
46#define PRTCIF_INTEN 0x10
47#define PRTCIF_INTFLG 0x14
48
49/* PRTCIF_CTLR bit fields */
50#define PRTCIF_CTLR_BUSY BIT(31)
51#define PRTCIF_CTLR_SIZE BIT(25)
52#define PRTCIF_CTLR_DIR BIT(24)
53#define PRTCIF_CTLR_BENU_MSB BIT(23)
54#define PRTCIF_CTLR_BENU_3RD_BYTE BIT(22)
55#define PRTCIF_CTLR_BENU_2ND_BYTE BIT(21)
56#define PRTCIF_CTLR_BENU_LSB BIT(20)
57#define PRTCIF_CTLR_BENU_MASK (0x00F00000)
58#define PRTCIF_CTLR_BENL_MSB BIT(19)
59#define PRTCIF_CTLR_BENL_3RD_BYTE BIT(18)
60#define PRTCIF_CTLR_BENL_2ND_BYTE BIT(17)
61#define PRTCIF_CTLR_BENL_LSB BIT(16)
62#define PRTCIF_CTLR_BENL_MASK (0x000F0000)
63
64/* PRTCIF_INTEN bit fields */
65#define PRTCIF_INTEN_RTCSS BIT(1)
66#define PRTCIF_INTEN_RTCIF BIT(0)
67#define PRTCIF_INTEN_MASK (PRTCIF_INTEN_RTCSS \
68 | PRTCIF_INTEN_RTCIF)
69
70/* PRTCIF_INTFLG bit fields */
71#define PRTCIF_INTFLG_RTCSS BIT(1)
72#define PRTCIF_INTFLG_RTCIF BIT(0)
73#define PRTCIF_INTFLG_MASK (PRTCIF_INTFLG_RTCSS \
74 | PRTCIF_INTFLG_RTCIF)
75
76/* PRTC subsystem registers */
77#define PRTCSS_RTC_INTC_EXTENA1 (0x0C)
78#define PRTCSS_RTC_CTRL (0x10)
79#define PRTCSS_RTC_WDT (0x11)
80#define PRTCSS_RTC_TMR0 (0x12)
81#define PRTCSS_RTC_TMR1 (0x13)
82#define PRTCSS_RTC_CCTRL (0x14)
83#define PRTCSS_RTC_SEC (0x15)
84#define PRTCSS_RTC_MIN (0x16)
85#define PRTCSS_RTC_HOUR (0x17)
86#define PRTCSS_RTC_DAY0 (0x18)
87#define PRTCSS_RTC_DAY1 (0x19)
88#define PRTCSS_RTC_AMIN (0x1A)
89#define PRTCSS_RTC_AHOUR (0x1B)
90#define PRTCSS_RTC_ADAY0 (0x1C)
91#define PRTCSS_RTC_ADAY1 (0x1D)
92#define PRTCSS_RTC_CLKC_CNT (0x20)
93
94/* PRTCSS_RTC_INTC_EXTENA1 */
95#define PRTCSS_RTC_INTC_EXTENA1_MASK (0x07)
96
97/* PRTCSS_RTC_CTRL bit fields */
98#define PRTCSS_RTC_CTRL_WDTBUS BIT(7)
99#define PRTCSS_RTC_CTRL_WEN BIT(6)
100#define PRTCSS_RTC_CTRL_WDRT BIT(5)
101#define PRTCSS_RTC_CTRL_WDTFLG BIT(4)
102#define PRTCSS_RTC_CTRL_TE BIT(3)
103#define PRTCSS_RTC_CTRL_TIEN BIT(2)
104#define PRTCSS_RTC_CTRL_TMRFLG BIT(1)
105#define PRTCSS_RTC_CTRL_TMMD BIT(0)
106
107/* PRTCSS_RTC_CCTRL bit fields */
108#define PRTCSS_RTC_CCTRL_CALBUSY BIT(7)
109#define PRTCSS_RTC_CCTRL_DAEN BIT(5)
110#define PRTCSS_RTC_CCTRL_HAEN BIT(4)
111#define PRTCSS_RTC_CCTRL_MAEN BIT(3)
112#define PRTCSS_RTC_CCTRL_ALMFLG BIT(2)
113#define PRTCSS_RTC_CCTRL_AIEN BIT(1)
114#define PRTCSS_RTC_CCTRL_CAEN BIT(0)
115
116static DEFINE_SPINLOCK(davinci_rtc_lock);
117
118struct davinci_rtc {
119 struct rtc_device *rtc;
120 void __iomem *base;
121 resource_size_t pbase;
122 size_t base_size;
123 int irq;
124};
125
126static inline void rtcif_write(struct davinci_rtc *davinci_rtc,
127 u32 val, u32 addr)
128{
129 writel(val, davinci_rtc->base + addr);
130}
131
132static inline u32 rtcif_read(struct davinci_rtc *davinci_rtc, u32 addr)
133{
134 return readl(davinci_rtc->base + addr);
135}
136
137static inline void rtcif_wait(struct davinci_rtc *davinci_rtc)
138{
139 while (rtcif_read(davinci_rtc, PRTCIF_CTLR) & PRTCIF_CTLR_BUSY)
140 cpu_relax();
141}
142
143static inline void rtcss_write(struct davinci_rtc *davinci_rtc,
144 unsigned long val, u8 addr)
145{
146 rtcif_wait(davinci_rtc);
147
148 rtcif_write(davinci_rtc, PRTCIF_CTLR_BENL_LSB | addr, PRTCIF_CTLR);
149 rtcif_write(davinci_rtc, val, PRTCIF_LDATA);
150
151 rtcif_wait(davinci_rtc);
152}
153
154static inline u8 rtcss_read(struct davinci_rtc *davinci_rtc, u8 addr)
155{
156 rtcif_wait(davinci_rtc);
157
158 rtcif_write(davinci_rtc, PRTCIF_CTLR_DIR | PRTCIF_CTLR_BENL_LSB | addr,
159 PRTCIF_CTLR);
160
161 rtcif_wait(davinci_rtc);
162
163 return rtcif_read(davinci_rtc, PRTCIF_LDATA);
164}
165
166static inline void davinci_rtcss_calendar_wait(struct davinci_rtc *davinci_rtc)
167{
168 while (rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL) &
169 PRTCSS_RTC_CCTRL_CALBUSY)
170 cpu_relax();
171}
172
173static irqreturn_t davinci_rtc_interrupt(int irq, void *class_dev)
174{
175 struct davinci_rtc *davinci_rtc = class_dev;
176 unsigned long events = 0;
177 u32 irq_flg;
178 u8 alm_irq, tmr_irq;
179 u8 rtc_ctrl, rtc_cctrl;
180 int ret = IRQ_NONE;
181
182 irq_flg = rtcif_read(davinci_rtc, PRTCIF_INTFLG) &
183 PRTCIF_INTFLG_RTCSS;
184
185 alm_irq = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL) &
186 PRTCSS_RTC_CCTRL_ALMFLG;
187
188 tmr_irq = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL) &
189 PRTCSS_RTC_CTRL_TMRFLG;
190
191 if (irq_flg) {
192 if (alm_irq) {
193 events |= RTC_IRQF | RTC_AF;
194 rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL);
195 rtc_cctrl |= PRTCSS_RTC_CCTRL_ALMFLG;
196 rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL);
197 } else if (tmr_irq) {
198 events |= RTC_IRQF | RTC_PF;
199 rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);
200 rtc_ctrl |= PRTCSS_RTC_CTRL_TMRFLG;
201 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
202 }
203
204 rtcif_write(davinci_rtc, PRTCIF_INTFLG_RTCSS,
205 PRTCIF_INTFLG);
206 rtc_update_irq(davinci_rtc->rtc, 1, events);
207
208 ret = IRQ_HANDLED;
209 }
210
211 return ret;
212}
213
214static int
215davinci_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
216{
217 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
218 u8 rtc_ctrl;
219 unsigned long flags;
220 int ret = 0;
221
222 spin_lock_irqsave(&davinci_rtc_lock, flags);
223
224 rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);
225
226 switch (cmd) {
227 case RTC_WIE_ON:
228 rtc_ctrl |= PRTCSS_RTC_CTRL_WEN | PRTCSS_RTC_CTRL_WDTFLG;
229 break;
230 case RTC_WIE_OFF:
231 rtc_ctrl &= ~PRTCSS_RTC_CTRL_WEN;
232 break;
233 case RTC_UIE_OFF:
234 case RTC_UIE_ON:
235 ret = -ENOTTY;
236 break;
237 default:
238 ret = -ENOIOCTLCMD;
239 }
240
241 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
242
243 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
244
245 return ret;
246}
247
248static int convertfromdays(u16 days, struct rtc_time *tm)
249{
250 int tmp_days, year, mon;
251
252 for (year = 2000;; year++) {
253 tmp_days = rtc_year_days(1, 12, year);
254 if (days >= tmp_days)
255 days -= tmp_days;
256 else {
257 for (mon = 0;; mon++) {
258 tmp_days = rtc_month_days(mon, year);
259 if (days >= tmp_days) {
260 days -= tmp_days;
261 } else {
262 tm->tm_year = year - 1900;
263 tm->tm_mon = mon;
264 tm->tm_mday = days + 1;
265 break;
266 }
267 }
268 break;
269 }
270 }
271 return 0;
272}
273
274static int convert2days(u16 *days, struct rtc_time *tm)
275{
276 int i;
277 *days = 0;
278
279 /* epoch == 1900 */
280 if (tm->tm_year < 100 || tm->tm_year > 199)
281 return -EINVAL;
282
283 for (i = 2000; i < 1900 + tm->tm_year; i++)
284 *days += rtc_year_days(1, 12, i);
285
286 *days += rtc_year_days(tm->tm_mday, tm->tm_mon, 1900 + tm->tm_year);
287
288 return 0;
289}
290
291static int davinci_rtc_read_time(struct device *dev, struct rtc_time *tm)
292{
293 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
294 u16 days = 0;
295 u8 day0, day1;
296 unsigned long flags;
297
298 spin_lock_irqsave(&davinci_rtc_lock, flags);
299
300 davinci_rtcss_calendar_wait(davinci_rtc);
301 tm->tm_sec = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_SEC));
302
303 davinci_rtcss_calendar_wait(davinci_rtc);
304 tm->tm_min = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_MIN));
305
306 davinci_rtcss_calendar_wait(davinci_rtc);
307 tm->tm_hour = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_HOUR));
308
309 davinci_rtcss_calendar_wait(davinci_rtc);
310 day0 = rtcss_read(davinci_rtc, PRTCSS_RTC_DAY0);
311
312 davinci_rtcss_calendar_wait(davinci_rtc);
313 day1 = rtcss_read(davinci_rtc, PRTCSS_RTC_DAY1);
314
315 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
316
317 days |= day1;
318 days <<= 8;
319 days |= day0;
320
321 if (convertfromdays(days, tm) < 0)
322 return -EINVAL;
323
324 return 0;
325}
326
327static int davinci_rtc_set_time(struct device *dev, struct rtc_time *tm)
328{
329 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
330 u16 days;
331 u8 rtc_cctrl;
332 unsigned long flags;
333
334 if (convert2days(&days, tm) < 0)
335 return -EINVAL;
336
337 spin_lock_irqsave(&davinci_rtc_lock, flags);
338
339 davinci_rtcss_calendar_wait(davinci_rtc);
340 rtcss_write(davinci_rtc, bin2bcd(tm->tm_sec), PRTCSS_RTC_SEC);
341
342 davinci_rtcss_calendar_wait(davinci_rtc);
343 rtcss_write(davinci_rtc, bin2bcd(tm->tm_min), PRTCSS_RTC_MIN);
344
345 davinci_rtcss_calendar_wait(davinci_rtc);
346 rtcss_write(davinci_rtc, bin2bcd(tm->tm_hour), PRTCSS_RTC_HOUR);
347
348 davinci_rtcss_calendar_wait(davinci_rtc);
349 rtcss_write(davinci_rtc, days & 0xFF, PRTCSS_RTC_DAY0);
350
351 davinci_rtcss_calendar_wait(davinci_rtc);
352 rtcss_write(davinci_rtc, (days & 0xFF00) >> 8, PRTCSS_RTC_DAY1);
353
354 rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL);
355 rtc_cctrl |= PRTCSS_RTC_CCTRL_CAEN;
356 rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL);
357
358 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
359
360 return 0;
361}
362
363static int davinci_rtc_alarm_irq_enable(struct device *dev,
364 unsigned int enabled)
365{
366 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
367 unsigned long flags;
368 u8 rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL);
369
370 spin_lock_irqsave(&davinci_rtc_lock, flags);
371
372 if (enabled)
373 rtc_cctrl |= PRTCSS_RTC_CCTRL_DAEN |
374 PRTCSS_RTC_CCTRL_HAEN |
375 PRTCSS_RTC_CCTRL_MAEN |
376 PRTCSS_RTC_CCTRL_ALMFLG |
377 PRTCSS_RTC_CCTRL_AIEN;
378 else
379 rtc_cctrl &= ~PRTCSS_RTC_CCTRL_AIEN;
380
381 davinci_rtcss_calendar_wait(davinci_rtc);
382 rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL);
383
384 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
385
386 return 0;
387}
388
389static int davinci_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
390{
391 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
392 u16 days = 0;
393 u8 day0, day1;
394 unsigned long flags;
395
396 spin_lock_irqsave(&davinci_rtc_lock, flags);
397
398 davinci_rtcss_calendar_wait(davinci_rtc);
399 alm->time.tm_min = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_AMIN));
400
401 davinci_rtcss_calendar_wait(davinci_rtc);
402 alm->time.tm_hour = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_AHOUR));
403
404 davinci_rtcss_calendar_wait(davinci_rtc);
405 day0 = rtcss_read(davinci_rtc, PRTCSS_RTC_ADAY0);
406
407 davinci_rtcss_calendar_wait(davinci_rtc);
408 day1 = rtcss_read(davinci_rtc, PRTCSS_RTC_ADAY1);
409
410 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
411 days |= day1;
412 days <<= 8;
413 days |= day0;
414
415 if (convertfromdays(days, &alm->time) < 0)
416 return -EINVAL;
417
418 alm->pending = !!(rtcss_read(davinci_rtc,
419 PRTCSS_RTC_CCTRL) &
420 PRTCSS_RTC_CCTRL_AIEN);
421 alm->enabled = alm->pending && device_may_wakeup(dev);
422
423 return 0;
424}
425
426static int davinci_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
427{
428 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
429 unsigned long flags;
430 u16 days;
431
432 if (alm->time.tm_mday <= 0 && alm->time.tm_mon < 0
433 && alm->time.tm_year < 0) {
434 struct rtc_time tm;
435 unsigned long now, then;
436
437 davinci_rtc_read_time(dev, &tm);
438 rtc_tm_to_time(&tm, &now);
439
440 alm->time.tm_mday = tm.tm_mday;
441 alm->time.tm_mon = tm.tm_mon;
442 alm->time.tm_year = tm.tm_year;
443 rtc_tm_to_time(&alm->time, &then);
444
445 if (then < now) {
446 rtc_time_to_tm(now + 24 * 60 * 60, &tm);
447 alm->time.tm_mday = tm.tm_mday;
448 alm->time.tm_mon = tm.tm_mon;
449 alm->time.tm_year = tm.tm_year;
450 }
451 }
452
453 if (convert2days(&days, &alm->time) < 0)
454 return -EINVAL;
455
456 spin_lock_irqsave(&davinci_rtc_lock, flags);
457
458 davinci_rtcss_calendar_wait(davinci_rtc);
459 rtcss_write(davinci_rtc, bin2bcd(alm->time.tm_min), PRTCSS_RTC_AMIN);
460
461 davinci_rtcss_calendar_wait(davinci_rtc);
462 rtcss_write(davinci_rtc, bin2bcd(alm->time.tm_hour), PRTCSS_RTC_AHOUR);
463
464 davinci_rtcss_calendar_wait(davinci_rtc);
465 rtcss_write(davinci_rtc, days & 0xFF, PRTCSS_RTC_ADAY0);
466
467 davinci_rtcss_calendar_wait(davinci_rtc);
468 rtcss_write(davinci_rtc, (days & 0xFF00) >> 8, PRTCSS_RTC_ADAY1);
469
470 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
471
472 return 0;
473}
474
475static int davinci_rtc_irq_set_state(struct device *dev, int enabled)
476{
477 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
478 unsigned long flags;
479 u8 rtc_ctrl;
480
481 spin_lock_irqsave(&davinci_rtc_lock, flags);
482
483 rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);
484
485 if (enabled) {
486 while (rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL)
487 & PRTCSS_RTC_CTRL_WDTBUS)
488 cpu_relax();
489
490 rtc_ctrl |= PRTCSS_RTC_CTRL_TE;
491 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
492
493 rtcss_write(davinci_rtc, 0x0, PRTCSS_RTC_CLKC_CNT);
494
495 rtc_ctrl |= PRTCSS_RTC_CTRL_TIEN |
496 PRTCSS_RTC_CTRL_TMMD |
497 PRTCSS_RTC_CTRL_TMRFLG;
498 } else
499 rtc_ctrl &= ~PRTCSS_RTC_CTRL_TIEN;
500
501 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
502
503 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
504
505 return 0;
506}
507
508static int davinci_rtc_irq_set_freq(struct device *dev, int freq)
509{
510 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
511 unsigned long flags;
512 u16 tmr_counter = (0x8000 >> (ffs(freq) - 1));
513
514 spin_lock_irqsave(&davinci_rtc_lock, flags);
515
516 rtcss_write(davinci_rtc, tmr_counter & 0xFF, PRTCSS_RTC_TMR0);
517 rtcss_write(davinci_rtc, (tmr_counter & 0xFF00) >> 8, PRTCSS_RTC_TMR1);
518
519 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
520
521 return 0;
522}
523
524static struct rtc_class_ops davinci_rtc_ops = {
525 .ioctl = davinci_rtc_ioctl,
526 .read_time = davinci_rtc_read_time,
527 .set_time = davinci_rtc_set_time,
528 .alarm_irq_enable = davinci_rtc_alarm_irq_enable,
529 .read_alarm = davinci_rtc_read_alarm,
530 .set_alarm = davinci_rtc_set_alarm,
531 .irq_set_state = davinci_rtc_irq_set_state,
532 .irq_set_freq = davinci_rtc_irq_set_freq,
533};
534
535static int __init davinci_rtc_probe(struct platform_device *pdev)
536{
537 struct device *dev = &pdev->dev;
538 struct davinci_rtc *davinci_rtc;
539 struct resource *res, *mem;
540 int ret = 0;
541
542 davinci_rtc = kzalloc(sizeof(struct davinci_rtc), GFP_KERNEL);
543 if (!davinci_rtc) {
544 dev_dbg(dev, "could not allocate memory for private data\n");
545 return -ENOMEM;
546 }
547
548 davinci_rtc->irq = platform_get_irq(pdev, 0);
549 if (davinci_rtc->irq < 0) {
550 dev_err(dev, "no RTC irq\n");
551 ret = davinci_rtc->irq;
552 goto fail1;
553 }
554
555 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
556 if (!res) {
557 dev_err(dev, "no mem resource\n");
558 ret = -EINVAL;
559 goto fail1;
560 }
561
562 davinci_rtc->pbase = res->start;
563 davinci_rtc->base_size = resource_size(res);
564
565 mem = request_mem_region(davinci_rtc->pbase, davinci_rtc->base_size,
566 pdev->name);
567 if (!mem) {
568 dev_err(dev, "RTC registers at %08x are not free\n",
569 davinci_rtc->pbase);
570 ret = -EBUSY;
571 goto fail1;
572 }
573
574 davinci_rtc->base = ioremap(davinci_rtc->pbase, davinci_rtc->base_size);
575 if (!davinci_rtc->base) {
576 dev_err(dev, "unable to ioremap MEM resource\n");
577 ret = -ENOMEM;
578 goto fail2;
579 }
580
581 davinci_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
582 &davinci_rtc_ops, THIS_MODULE);
583 if (IS_ERR(davinci_rtc->rtc)) {
584 dev_err(dev, "unable to register RTC device, err %ld\n",
585 PTR_ERR(davinci_rtc->rtc));
586 goto fail3;
587 }
588
589 rtcif_write(davinci_rtc, PRTCIF_INTFLG_RTCSS, PRTCIF_INTFLG);
590 rtcif_write(davinci_rtc, 0, PRTCIF_INTEN);
591 rtcss_write(davinci_rtc, 0, PRTCSS_RTC_INTC_EXTENA1);
592
593 rtcss_write(davinci_rtc, 0, PRTCSS_RTC_CTRL);
594 rtcss_write(davinci_rtc, 0, PRTCSS_RTC_CCTRL);
595
596 ret = request_irq(davinci_rtc->irq, davinci_rtc_interrupt,
597 IRQF_DISABLED, "davinci_rtc", davinci_rtc);
598 if (ret < 0) {
599 dev_err(dev, "unable to register davinci RTC interrupt\n");
600 goto fail4;
601 }
602
603 /* Enable interrupts */
604 rtcif_write(davinci_rtc, PRTCIF_INTEN_RTCSS, PRTCIF_INTEN);
605 rtcss_write(davinci_rtc, PRTCSS_RTC_INTC_EXTENA1_MASK,
606 PRTCSS_RTC_INTC_EXTENA1);
607
608 rtcss_write(davinci_rtc, PRTCSS_RTC_CCTRL_CAEN, PRTCSS_RTC_CCTRL);
609
610 platform_set_drvdata(pdev, davinci_rtc);
611
612 device_init_wakeup(&pdev->dev, 0);
613
614 return 0;
615
616fail4:
617 rtc_device_unregister(davinci_rtc->rtc);
618fail3:
619 iounmap(davinci_rtc->base);
620fail2:
621 release_mem_region(davinci_rtc->pbase, davinci_rtc->base_size);
622fail1:
623 kfree(davinci_rtc);
624
625 return ret;
626}
627
628static int __devexit davinci_rtc_remove(struct platform_device *pdev)
629{
630 struct davinci_rtc *davinci_rtc = platform_get_drvdata(pdev);
631
632 device_init_wakeup(&pdev->dev, 0);
633
634 rtcif_write(davinci_rtc, 0, PRTCIF_INTEN);
635
636 free_irq(davinci_rtc->irq, davinci_rtc);
637
638 rtc_device_unregister(davinci_rtc->rtc);
639
640 iounmap(davinci_rtc->base);
641 release_mem_region(davinci_rtc->pbase, davinci_rtc->base_size);
642
643 platform_set_drvdata(pdev, NULL);
644
645 kfree(davinci_rtc);
646
647 return 0;
648}
649
650static struct platform_driver davinci_rtc_driver = {
651 .probe = davinci_rtc_probe,
652 .remove = __devexit_p(davinci_rtc_remove),
653 .driver = {
654 .name = "rtc_davinci",
655 .owner = THIS_MODULE,
656 },
657};
658
659static int __init rtc_init(void)
660{
661 return platform_driver_probe(&davinci_rtc_driver, davinci_rtc_probe);
662}
663module_init(rtc_init);
664
665static void __exit rtc_exit(void)
666{
667 platform_driver_unregister(&davinci_rtc_driver);
668}
669module_exit(rtc_exit);
670
671MODULE_AUTHOR("Miguel Aguilar <miguel.aguilar@ridgerun.com>");
672MODULE_DESCRIPTION("Texas Instruments DaVinci PRTC Driver");
673MODULE_LICENSE("GPL");
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index fa2339cb1681..0e86247d791e 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -65,6 +65,7 @@ static void dasd_device_tasklet(struct dasd_device *);
65static void dasd_block_tasklet(struct dasd_block *); 65static void dasd_block_tasklet(struct dasd_block *);
66static void do_kick_device(struct work_struct *); 66static void do_kick_device(struct work_struct *);
67static void do_restore_device(struct work_struct *); 67static void do_restore_device(struct work_struct *);
68static void do_reload_device(struct work_struct *);
68static void dasd_return_cqr_cb(struct dasd_ccw_req *, void *); 69static void dasd_return_cqr_cb(struct dasd_ccw_req *, void *);
69static void dasd_device_timeout(unsigned long); 70static void dasd_device_timeout(unsigned long);
70static void dasd_block_timeout(unsigned long); 71static void dasd_block_timeout(unsigned long);
@@ -115,6 +116,7 @@ struct dasd_device *dasd_alloc_device(void)
115 device->timer.data = (unsigned long) device; 116 device->timer.data = (unsigned long) device;
116 INIT_WORK(&device->kick_work, do_kick_device); 117 INIT_WORK(&device->kick_work, do_kick_device);
117 INIT_WORK(&device->restore_device, do_restore_device); 118 INIT_WORK(&device->restore_device, do_restore_device);
119 INIT_WORK(&device->reload_device, do_reload_device);
118 device->state = DASD_STATE_NEW; 120 device->state = DASD_STATE_NEW;
119 device->target = DASD_STATE_NEW; 121 device->target = DASD_STATE_NEW;
120 mutex_init(&device->state_mutex); 122 mutex_init(&device->state_mutex);
@@ -521,6 +523,26 @@ void dasd_kick_device(struct dasd_device *device)
521} 523}
522 524
523/* 525/*
526 * dasd_reload_device will schedule a call do do_reload_device to the kernel
527 * event daemon.
528 */
529static void do_reload_device(struct work_struct *work)
530{
531 struct dasd_device *device = container_of(work, struct dasd_device,
532 reload_device);
533 device->discipline->reload(device);
534 dasd_put_device(device);
535}
536
537void dasd_reload_device(struct dasd_device *device)
538{
539 dasd_get_device(device);
540 /* queue call to dasd_reload_device to the kernel event daemon. */
541 schedule_work(&device->reload_device);
542}
543EXPORT_SYMBOL(dasd_reload_device);
544
545/*
524 * dasd_restore_device will schedule a call do do_restore_device to the kernel 546 * dasd_restore_device will schedule a call do do_restore_device to the kernel
525 * event daemon. 547 * event daemon.
526 */ 548 */
diff --git a/drivers/s390/block/dasd_3990_erp.c b/drivers/s390/block/dasd_3990_erp.c
index 6632649dd6aa..85bfd8794856 100644
--- a/drivers/s390/block/dasd_3990_erp.c
+++ b/drivers/s390/block/dasd_3990_erp.c
@@ -1418,9 +1418,29 @@ static struct dasd_ccw_req *dasd_3990_erp_inspect_alias(
1418 struct dasd_ccw_req *erp) 1418 struct dasd_ccw_req *erp)
1419{ 1419{
1420 struct dasd_ccw_req *cqr = erp->refers; 1420 struct dasd_ccw_req *cqr = erp->refers;
1421 char *sense;
1421 1422
1422 if (cqr->block && 1423 if (cqr->block &&
1423 (cqr->block->base != cqr->startdev)) { 1424 (cqr->block->base != cqr->startdev)) {
1425
1426 sense = dasd_get_sense(&erp->refers->irb);
1427 /*
1428 * dynamic pav may have changed base alias mapping
1429 */
1430 if (!test_bit(DASD_FLAG_OFFLINE, &cqr->startdev->flags) && sense
1431 && (sense[0] == 0x10) && (sense[7] == 0x0F)
1432 && (sense[8] == 0x67)) {
1433 /*
1434 * remove device from alias handling to prevent new
1435 * requests from being scheduled on the
1436 * wrong alias device
1437 */
1438 dasd_alias_remove_device(cqr->startdev);
1439
1440 /* schedule worker to reload device */
1441 dasd_reload_device(cqr->startdev);
1442 }
1443
1424 if (cqr->startdev->features & DASD_FEATURE_ERPLOG) { 1444 if (cqr->startdev->features & DASD_FEATURE_ERPLOG) {
1425 DBF_DEV_EVENT(DBF_ERR, cqr->startdev, 1445 DBF_DEV_EVENT(DBF_ERR, cqr->startdev,
1426 "ERP on alias device for request %p," 1446 "ERP on alias device for request %p,"
diff --git a/drivers/s390/block/dasd_alias.c b/drivers/s390/block/dasd_alias.c
index 8c4814258e93..4155805dcdff 100644
--- a/drivers/s390/block/dasd_alias.c
+++ b/drivers/s390/block/dasd_alias.c
@@ -190,20 +190,21 @@ int dasd_alias_make_device_known_to_lcu(struct dasd_device *device)
190 struct alias_server *server, *newserver; 190 struct alias_server *server, *newserver;
191 struct alias_lcu *lcu, *newlcu; 191 struct alias_lcu *lcu, *newlcu;
192 int is_lcu_known; 192 int is_lcu_known;
193 struct dasd_uid *uid; 193 struct dasd_uid uid;
194 194
195 private = (struct dasd_eckd_private *) device->private; 195 private = (struct dasd_eckd_private *) device->private;
196 uid = &private->uid; 196
197 device->discipline->get_uid(device, &uid);
197 spin_lock_irqsave(&aliastree.lock, flags); 198 spin_lock_irqsave(&aliastree.lock, flags);
198 is_lcu_known = 1; 199 is_lcu_known = 1;
199 server = _find_server(uid); 200 server = _find_server(&uid);
200 if (!server) { 201 if (!server) {
201 spin_unlock_irqrestore(&aliastree.lock, flags); 202 spin_unlock_irqrestore(&aliastree.lock, flags);
202 newserver = _allocate_server(uid); 203 newserver = _allocate_server(&uid);
203 if (IS_ERR(newserver)) 204 if (IS_ERR(newserver))
204 return PTR_ERR(newserver); 205 return PTR_ERR(newserver);
205 spin_lock_irqsave(&aliastree.lock, flags); 206 spin_lock_irqsave(&aliastree.lock, flags);
206 server = _find_server(uid); 207 server = _find_server(&uid);
207 if (!server) { 208 if (!server) {
208 list_add(&newserver->server, &aliastree.serverlist); 209 list_add(&newserver->server, &aliastree.serverlist);
209 server = newserver; 210 server = newserver;
@@ -214,14 +215,14 @@ int dasd_alias_make_device_known_to_lcu(struct dasd_device *device)
214 } 215 }
215 } 216 }
216 217
217 lcu = _find_lcu(server, uid); 218 lcu = _find_lcu(server, &uid);
218 if (!lcu) { 219 if (!lcu) {
219 spin_unlock_irqrestore(&aliastree.lock, flags); 220 spin_unlock_irqrestore(&aliastree.lock, flags);
220 newlcu = _allocate_lcu(uid); 221 newlcu = _allocate_lcu(&uid);
221 if (IS_ERR(newlcu)) 222 if (IS_ERR(newlcu))
222 return PTR_ERR(newlcu); 223 return PTR_ERR(newlcu);
223 spin_lock_irqsave(&aliastree.lock, flags); 224 spin_lock_irqsave(&aliastree.lock, flags);
224 lcu = _find_lcu(server, uid); 225 lcu = _find_lcu(server, &uid);
225 if (!lcu) { 226 if (!lcu) {
226 list_add(&newlcu->lcu, &server->lculist); 227 list_add(&newlcu->lcu, &server->lculist);
227 lcu = newlcu; 228 lcu = newlcu;
@@ -256,20 +257,20 @@ void dasd_alias_lcu_setup_complete(struct dasd_device *device)
256 unsigned long flags; 257 unsigned long flags;
257 struct alias_server *server; 258 struct alias_server *server;
258 struct alias_lcu *lcu; 259 struct alias_lcu *lcu;
259 struct dasd_uid *uid; 260 struct dasd_uid uid;
260 261
261 private = (struct dasd_eckd_private *) device->private; 262 private = (struct dasd_eckd_private *) device->private;
262 uid = &private->uid; 263 device->discipline->get_uid(device, &uid);
263 lcu = NULL; 264 lcu = NULL;
264 spin_lock_irqsave(&aliastree.lock, flags); 265 spin_lock_irqsave(&aliastree.lock, flags);
265 server = _find_server(uid); 266 server = _find_server(&uid);
266 if (server) 267 if (server)
267 lcu = _find_lcu(server, uid); 268 lcu = _find_lcu(server, &uid);
268 spin_unlock_irqrestore(&aliastree.lock, flags); 269 spin_unlock_irqrestore(&aliastree.lock, flags);
269 if (!lcu) { 270 if (!lcu) {
270 DBF_EVENT_DEVID(DBF_ERR, device->cdev, 271 DBF_EVENT_DEVID(DBF_ERR, device->cdev,
271 "could not find lcu for %04x %02x", 272 "could not find lcu for %04x %02x",
272 uid->ssid, uid->real_unit_addr); 273 uid.ssid, uid.real_unit_addr);
273 WARN_ON(1); 274 WARN_ON(1);
274 return; 275 return;
275 } 276 }
@@ -282,20 +283,20 @@ void dasd_alias_wait_for_lcu_setup(struct dasd_device *device)
282 unsigned long flags; 283 unsigned long flags;
283 struct alias_server *server; 284 struct alias_server *server;
284 struct alias_lcu *lcu; 285 struct alias_lcu *lcu;
285 struct dasd_uid *uid; 286 struct dasd_uid uid;
286 287
287 private = (struct dasd_eckd_private *) device->private; 288 private = (struct dasd_eckd_private *) device->private;
288 uid = &private->uid; 289 device->discipline->get_uid(device, &uid);
289 lcu = NULL; 290 lcu = NULL;
290 spin_lock_irqsave(&aliastree.lock, flags); 291 spin_lock_irqsave(&aliastree.lock, flags);
291 server = _find_server(uid); 292 server = _find_server(&uid);
292 if (server) 293 if (server)
293 lcu = _find_lcu(server, uid); 294 lcu = _find_lcu(server, &uid);
294 spin_unlock_irqrestore(&aliastree.lock, flags); 295 spin_unlock_irqrestore(&aliastree.lock, flags);
295 if (!lcu) { 296 if (!lcu) {
296 DBF_EVENT_DEVID(DBF_ERR, device->cdev, 297 DBF_EVENT_DEVID(DBF_ERR, device->cdev,
297 "could not find lcu for %04x %02x", 298 "could not find lcu for %04x %02x",
298 uid->ssid, uid->real_unit_addr); 299 uid.ssid, uid.real_unit_addr);
299 WARN_ON(1); 300 WARN_ON(1);
300 return; 301 return;
301 } 302 }
@@ -314,9 +315,11 @@ void dasd_alias_disconnect_device_from_lcu(struct dasd_device *device)
314 struct alias_lcu *lcu; 315 struct alias_lcu *lcu;
315 struct alias_server *server; 316 struct alias_server *server;
316 int was_pending; 317 int was_pending;
318 struct dasd_uid uid;
317 319
318 private = (struct dasd_eckd_private *) device->private; 320 private = (struct dasd_eckd_private *) device->private;
319 lcu = private->lcu; 321 lcu = private->lcu;
322 device->discipline->get_uid(device, &uid);
320 spin_lock_irqsave(&lcu->lock, flags); 323 spin_lock_irqsave(&lcu->lock, flags);
321 list_del_init(&device->alias_list); 324 list_del_init(&device->alias_list);
322 /* make sure that the workers don't use this device */ 325 /* make sure that the workers don't use this device */
@@ -353,7 +356,7 @@ void dasd_alias_disconnect_device_from_lcu(struct dasd_device *device)
353 _schedule_lcu_update(lcu, NULL); 356 _schedule_lcu_update(lcu, NULL);
354 spin_unlock(&lcu->lock); 357 spin_unlock(&lcu->lock);
355 } 358 }
356 server = _find_server(&private->uid); 359 server = _find_server(&uid);
357 if (server && list_empty(&server->lculist)) { 360 if (server && list_empty(&server->lculist)) {
358 list_del(&server->server); 361 list_del(&server->server);
359 _free_server(server); 362 _free_server(server);
@@ -366,19 +369,30 @@ void dasd_alias_disconnect_device_from_lcu(struct dasd_device *device)
366 * in the lcu is up to date and will update the device uid before 369 * in the lcu is up to date and will update the device uid before
367 * adding it to a pav group. 370 * adding it to a pav group.
368 */ 371 */
372
369static int _add_device_to_lcu(struct alias_lcu *lcu, 373static int _add_device_to_lcu(struct alias_lcu *lcu,
370 struct dasd_device *device) 374 struct dasd_device *device,
375 struct dasd_device *pos)
371{ 376{
372 377
373 struct dasd_eckd_private *private; 378 struct dasd_eckd_private *private;
374 struct alias_pav_group *group; 379 struct alias_pav_group *group;
375 struct dasd_uid *uid; 380 struct dasd_uid uid;
381 unsigned long flags;
376 382
377 private = (struct dasd_eckd_private *) device->private; 383 private = (struct dasd_eckd_private *) device->private;
378 uid = &private->uid; 384
379 uid->type = lcu->uac->unit[uid->real_unit_addr].ua_type; 385 /* only lock if not already locked */
380 uid->base_unit_addr = lcu->uac->unit[uid->real_unit_addr].base_ua; 386 if (device != pos)
381 dasd_set_uid(device->cdev, &private->uid); 387 spin_lock_irqsave_nested(get_ccwdev_lock(device->cdev), flags,
388 CDEV_NESTED_SECOND);
389 private->uid.type = lcu->uac->unit[private->uid.real_unit_addr].ua_type;
390 private->uid.base_unit_addr =
391 lcu->uac->unit[private->uid.real_unit_addr].base_ua;
392 uid = private->uid;
393
394 if (device != pos)
395 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
382 396
383 /* if we have no PAV anyway, we don't need to bother with PAV groups */ 397 /* if we have no PAV anyway, we don't need to bother with PAV groups */
384 if (lcu->pav == NO_PAV) { 398 if (lcu->pav == NO_PAV) {
@@ -386,25 +400,25 @@ static int _add_device_to_lcu(struct alias_lcu *lcu,
386 return 0; 400 return 0;
387 } 401 }
388 402
389 group = _find_group(lcu, uid); 403 group = _find_group(lcu, &uid);
390 if (!group) { 404 if (!group) {
391 group = kzalloc(sizeof(*group), GFP_ATOMIC); 405 group = kzalloc(sizeof(*group), GFP_ATOMIC);
392 if (!group) 406 if (!group)
393 return -ENOMEM; 407 return -ENOMEM;
394 memcpy(group->uid.vendor, uid->vendor, sizeof(uid->vendor)); 408 memcpy(group->uid.vendor, uid.vendor, sizeof(uid.vendor));
395 memcpy(group->uid.serial, uid->serial, sizeof(uid->serial)); 409 memcpy(group->uid.serial, uid.serial, sizeof(uid.serial));
396 group->uid.ssid = uid->ssid; 410 group->uid.ssid = uid.ssid;
397 if (uid->type == UA_BASE_DEVICE) 411 if (uid.type == UA_BASE_DEVICE)
398 group->uid.base_unit_addr = uid->real_unit_addr; 412 group->uid.base_unit_addr = uid.real_unit_addr;
399 else 413 else
400 group->uid.base_unit_addr = uid->base_unit_addr; 414 group->uid.base_unit_addr = uid.base_unit_addr;
401 memcpy(group->uid.vduit, uid->vduit, sizeof(uid->vduit)); 415 memcpy(group->uid.vduit, uid.vduit, sizeof(uid.vduit));
402 INIT_LIST_HEAD(&group->group); 416 INIT_LIST_HEAD(&group->group);
403 INIT_LIST_HEAD(&group->baselist); 417 INIT_LIST_HEAD(&group->baselist);
404 INIT_LIST_HEAD(&group->aliaslist); 418 INIT_LIST_HEAD(&group->aliaslist);
405 list_add(&group->group, &lcu->grouplist); 419 list_add(&group->group, &lcu->grouplist);
406 } 420 }
407 if (uid->type == UA_BASE_DEVICE) 421 if (uid.type == UA_BASE_DEVICE)
408 list_move(&device->alias_list, &group->baselist); 422 list_move(&device->alias_list, &group->baselist);
409 else 423 else
410 list_move(&device->alias_list, &group->aliaslist); 424 list_move(&device->alias_list, &group->aliaslist);
@@ -525,7 +539,10 @@ static int _lcu_update(struct dasd_device *refdev, struct alias_lcu *lcu)
525 if (rc) 539 if (rc)
526 return rc; 540 return rc;
527 541
528 spin_lock_irqsave(&lcu->lock, flags); 542 /* need to take cdev lock before lcu lock */
543 spin_lock_irqsave_nested(get_ccwdev_lock(refdev->cdev), flags,
544 CDEV_NESTED_FIRST);
545 spin_lock(&lcu->lock);
529 lcu->pav = NO_PAV; 546 lcu->pav = NO_PAV;
530 for (i = 0; i < MAX_DEVICES_PER_LCU; ++i) { 547 for (i = 0; i < MAX_DEVICES_PER_LCU; ++i) {
531 switch (lcu->uac->unit[i].ua_type) { 548 switch (lcu->uac->unit[i].ua_type) {
@@ -542,9 +559,10 @@ static int _lcu_update(struct dasd_device *refdev, struct alias_lcu *lcu)
542 559
543 list_for_each_entry_safe(device, tempdev, &lcu->active_devices, 560 list_for_each_entry_safe(device, tempdev, &lcu->active_devices,
544 alias_list) { 561 alias_list) {
545 _add_device_to_lcu(lcu, device); 562 _add_device_to_lcu(lcu, device, refdev);
546 } 563 }
547 spin_unlock_irqrestore(&lcu->lock, flags); 564 spin_unlock(&lcu->lock);
565 spin_unlock_irqrestore(get_ccwdev_lock(refdev->cdev), flags);
548 return 0; 566 return 0;
549} 567}
550 568
@@ -628,9 +646,12 @@ int dasd_alias_add_device(struct dasd_device *device)
628 private = (struct dasd_eckd_private *) device->private; 646 private = (struct dasd_eckd_private *) device->private;
629 lcu = private->lcu; 647 lcu = private->lcu;
630 rc = 0; 648 rc = 0;
631 spin_lock_irqsave(&lcu->lock, flags); 649
650 /* need to take cdev lock before lcu lock */
651 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
652 spin_lock(&lcu->lock);
632 if (!(lcu->flags & UPDATE_PENDING)) { 653 if (!(lcu->flags & UPDATE_PENDING)) {
633 rc = _add_device_to_lcu(lcu, device); 654 rc = _add_device_to_lcu(lcu, device, device);
634 if (rc) 655 if (rc)
635 lcu->flags |= UPDATE_PENDING; 656 lcu->flags |= UPDATE_PENDING;
636 } 657 }
@@ -638,10 +659,19 @@ int dasd_alias_add_device(struct dasd_device *device)
638 list_move(&device->alias_list, &lcu->active_devices); 659 list_move(&device->alias_list, &lcu->active_devices);
639 _schedule_lcu_update(lcu, device); 660 _schedule_lcu_update(lcu, device);
640 } 661 }
641 spin_unlock_irqrestore(&lcu->lock, flags); 662 spin_unlock(&lcu->lock);
663 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
642 return rc; 664 return rc;
643} 665}
644 666
667int dasd_alias_update_add_device(struct dasd_device *device)
668{
669 struct dasd_eckd_private *private;
670 private = (struct dasd_eckd_private *) device->private;
671 private->lcu->flags |= UPDATE_PENDING;
672 return dasd_alias_add_device(device);
673}
674
645int dasd_alias_remove_device(struct dasd_device *device) 675int dasd_alias_remove_device(struct dasd_device *device)
646{ 676{
647 struct dasd_eckd_private *private; 677 struct dasd_eckd_private *private;
@@ -740,19 +770,30 @@ static void _restart_all_base_devices_on_lcu(struct alias_lcu *lcu)
740 struct alias_pav_group *pavgroup; 770 struct alias_pav_group *pavgroup;
741 struct dasd_device *device; 771 struct dasd_device *device;
742 struct dasd_eckd_private *private; 772 struct dasd_eckd_private *private;
773 unsigned long flags;
743 774
744 /* active and inactive list can contain alias as well as base devices */ 775 /* active and inactive list can contain alias as well as base devices */
745 list_for_each_entry(device, &lcu->active_devices, alias_list) { 776 list_for_each_entry(device, &lcu->active_devices, alias_list) {
746 private = (struct dasd_eckd_private *) device->private; 777 private = (struct dasd_eckd_private *) device->private;
747 if (private->uid.type != UA_BASE_DEVICE) 778 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
779 if (private->uid.type != UA_BASE_DEVICE) {
780 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev),
781 flags);
748 continue; 782 continue;
783 }
784 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
749 dasd_schedule_block_bh(device->block); 785 dasd_schedule_block_bh(device->block);
750 dasd_schedule_device_bh(device); 786 dasd_schedule_device_bh(device);
751 } 787 }
752 list_for_each_entry(device, &lcu->inactive_devices, alias_list) { 788 list_for_each_entry(device, &lcu->inactive_devices, alias_list) {
753 private = (struct dasd_eckd_private *) device->private; 789 private = (struct dasd_eckd_private *) device->private;
754 if (private->uid.type != UA_BASE_DEVICE) 790 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
791 if (private->uid.type != UA_BASE_DEVICE) {
792 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev),
793 flags);
755 continue; 794 continue;
795 }
796 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
756 dasd_schedule_block_bh(device->block); 797 dasd_schedule_block_bh(device->block);
757 dasd_schedule_device_bh(device); 798 dasd_schedule_device_bh(device);
758 } 799 }
diff --git a/drivers/s390/block/dasd_devmap.c b/drivers/s390/block/dasd_devmap.c
index eff9c812c5c2..34d51dd4c539 100644
--- a/drivers/s390/block/dasd_devmap.c
+++ b/drivers/s390/block/dasd_devmap.c
@@ -49,7 +49,6 @@ struct dasd_devmap {
49 unsigned int devindex; 49 unsigned int devindex;
50 unsigned short features; 50 unsigned short features;
51 struct dasd_device *device; 51 struct dasd_device *device;
52 struct dasd_uid uid;
53}; 52};
54 53
55/* 54/*
@@ -936,42 +935,46 @@ dasd_device_status_show(struct device *dev, struct device_attribute *attr,
936 935
937static DEVICE_ATTR(status, 0444, dasd_device_status_show, NULL); 936static DEVICE_ATTR(status, 0444, dasd_device_status_show, NULL);
938 937
939static ssize_t 938static ssize_t dasd_alias_show(struct device *dev,
940dasd_alias_show(struct device *dev, struct device_attribute *attr, char *buf) 939 struct device_attribute *attr, char *buf)
941{ 940{
942 struct dasd_devmap *devmap; 941 struct dasd_device *device;
943 int alias; 942 struct dasd_uid uid;
944 943
945 devmap = dasd_find_busid(dev_name(dev)); 944 device = dasd_device_from_cdev(to_ccwdev(dev));
946 spin_lock(&dasd_devmap_lock); 945 if (IS_ERR(device))
947 if (IS_ERR(devmap) || strlen(devmap->uid.vendor) == 0) {
948 spin_unlock(&dasd_devmap_lock);
949 return sprintf(buf, "0\n"); 946 return sprintf(buf, "0\n");
947
948 if (device->discipline && device->discipline->get_uid &&
949 !device->discipline->get_uid(device, &uid)) {
950 if (uid.type == UA_BASE_PAV_ALIAS ||
951 uid.type == UA_HYPER_PAV_ALIAS)
952 return sprintf(buf, "1\n");
950 } 953 }
951 if (devmap->uid.type == UA_BASE_PAV_ALIAS || 954 dasd_put_device(device);
952 devmap->uid.type == UA_HYPER_PAV_ALIAS) 955
953 alias = 1; 956 return sprintf(buf, "0\n");
954 else
955 alias = 0;
956 spin_unlock(&dasd_devmap_lock);
957 return sprintf(buf, alias ? "1\n" : "0\n");
958} 957}
959 958
960static DEVICE_ATTR(alias, 0444, dasd_alias_show, NULL); 959static DEVICE_ATTR(alias, 0444, dasd_alias_show, NULL);
961 960
962static ssize_t 961static ssize_t dasd_vendor_show(struct device *dev,
963dasd_vendor_show(struct device *dev, struct device_attribute *attr, char *buf) 962 struct device_attribute *attr, char *buf)
964{ 963{
965 struct dasd_devmap *devmap; 964 struct dasd_device *device;
965 struct dasd_uid uid;
966 char *vendor; 966 char *vendor;
967 967
968 devmap = dasd_find_busid(dev_name(dev)); 968 device = dasd_device_from_cdev(to_ccwdev(dev));
969 spin_lock(&dasd_devmap_lock); 969 vendor = "";
970 if (!IS_ERR(devmap) && strlen(devmap->uid.vendor) > 0) 970 if (IS_ERR(device))
971 vendor = devmap->uid.vendor; 971 return snprintf(buf, PAGE_SIZE, "%s\n", vendor);
972 else 972
973 vendor = ""; 973 if (device->discipline && device->discipline->get_uid &&
974 spin_unlock(&dasd_devmap_lock); 974 !device->discipline->get_uid(device, &uid))
975 vendor = uid.vendor;
976
977 dasd_put_device(device);
975 978
976 return snprintf(buf, PAGE_SIZE, "%s\n", vendor); 979 return snprintf(buf, PAGE_SIZE, "%s\n", vendor);
977} 980}
@@ -985,48 +988,51 @@ static DEVICE_ATTR(vendor, 0444, dasd_vendor_show, NULL);
985static ssize_t 988static ssize_t
986dasd_uid_show(struct device *dev, struct device_attribute *attr, char *buf) 989dasd_uid_show(struct device *dev, struct device_attribute *attr, char *buf)
987{ 990{
988 struct dasd_devmap *devmap; 991 struct dasd_device *device;
992 struct dasd_uid uid;
989 char uid_string[UID_STRLEN]; 993 char uid_string[UID_STRLEN];
990 char ua_string[3]; 994 char ua_string[3];
991 struct dasd_uid *uid;
992 995
993 devmap = dasd_find_busid(dev_name(dev)); 996 device = dasd_device_from_cdev(to_ccwdev(dev));
994 spin_lock(&dasd_devmap_lock); 997 uid_string[0] = 0;
995 if (IS_ERR(devmap) || strlen(devmap->uid.vendor) == 0) { 998 if (IS_ERR(device))
996 spin_unlock(&dasd_devmap_lock); 999 return snprintf(buf, PAGE_SIZE, "%s\n", uid_string);
997 return sprintf(buf, "\n"); 1000
998 } 1001 if (device->discipline && device->discipline->get_uid &&
999 uid = &devmap->uid; 1002 !device->discipline->get_uid(device, &uid)) {
1000 switch (uid->type) { 1003 switch (uid.type) {
1001 case UA_BASE_DEVICE: 1004 case UA_BASE_DEVICE:
1002 sprintf(ua_string, "%02x", uid->real_unit_addr); 1005 snprintf(ua_string, sizeof(ua_string), "%02x",
1003 break; 1006 uid.real_unit_addr);
1004 case UA_BASE_PAV_ALIAS: 1007 break;
1005 sprintf(ua_string, "%02x", uid->base_unit_addr); 1008 case UA_BASE_PAV_ALIAS:
1006 break; 1009 snprintf(ua_string, sizeof(ua_string), "%02x",
1007 case UA_HYPER_PAV_ALIAS: 1010 uid.base_unit_addr);
1008 sprintf(ua_string, "xx"); 1011 break;
1009 break; 1012 case UA_HYPER_PAV_ALIAS:
1010 default: 1013 snprintf(ua_string, sizeof(ua_string), "xx");
1011 /* should not happen, treat like base device */ 1014 break;
1012 sprintf(ua_string, "%02x", uid->real_unit_addr); 1015 default:
1013 break; 1016 /* should not happen, treat like base device */
1017 snprintf(ua_string, sizeof(ua_string), "%02x",
1018 uid.real_unit_addr);
1019 break;
1020 }
1021
1022 if (strlen(uid.vduit) > 0)
1023 snprintf(uid_string, sizeof(uid_string),
1024 "%s.%s.%04x.%s.%s",
1025 uid.vendor, uid.serial, uid.ssid, ua_string,
1026 uid.vduit);
1027 else
1028 snprintf(uid_string, sizeof(uid_string),
1029 "%s.%s.%04x.%s",
1030 uid.vendor, uid.serial, uid.ssid, ua_string);
1014 } 1031 }
1015 if (strlen(uid->vduit) > 0) 1032 dasd_put_device(device);
1016 snprintf(uid_string, sizeof(uid_string), 1033
1017 "%s.%s.%04x.%s.%s",
1018 uid->vendor, uid->serial,
1019 uid->ssid, ua_string,
1020 uid->vduit);
1021 else
1022 snprintf(uid_string, sizeof(uid_string),
1023 "%s.%s.%04x.%s",
1024 uid->vendor, uid->serial,
1025 uid->ssid, ua_string);
1026 spin_unlock(&dasd_devmap_lock);
1027 return snprintf(buf, PAGE_SIZE, "%s\n", uid_string); 1034 return snprintf(buf, PAGE_SIZE, "%s\n", uid_string);
1028} 1035}
1029
1030static DEVICE_ATTR(uid, 0444, dasd_uid_show, NULL); 1036static DEVICE_ATTR(uid, 0444, dasd_uid_show, NULL);
1031 1037
1032/* 1038/*
@@ -1094,50 +1100,6 @@ static struct attribute_group dasd_attr_group = {
1094}; 1100};
1095 1101
1096/* 1102/*
1097 * Return copy of the device unique identifier.
1098 */
1099int
1100dasd_get_uid(struct ccw_device *cdev, struct dasd_uid *uid)
1101{
1102 struct dasd_devmap *devmap;
1103
1104 devmap = dasd_find_busid(dev_name(&cdev->dev));
1105 if (IS_ERR(devmap))
1106 return PTR_ERR(devmap);
1107 spin_lock(&dasd_devmap_lock);
1108 *uid = devmap->uid;
1109 spin_unlock(&dasd_devmap_lock);
1110 return 0;
1111}
1112EXPORT_SYMBOL_GPL(dasd_get_uid);
1113
1114/*
1115 * Register the given device unique identifier into devmap struct.
1116 * In addition check if the related storage server subsystem ID is already
1117 * contained in the dasd_server_ssid_list. If subsystem ID is not contained,
1118 * create new entry.
1119 * Return 0 if server was already in serverlist,
1120 * 1 if the server was added successful
1121 * <0 in case of error.
1122 */
1123int
1124dasd_set_uid(struct ccw_device *cdev, struct dasd_uid *uid)
1125{
1126 struct dasd_devmap *devmap;
1127
1128 devmap = dasd_find_busid(dev_name(&cdev->dev));
1129 if (IS_ERR(devmap))
1130 return PTR_ERR(devmap);
1131
1132 spin_lock(&dasd_devmap_lock);
1133 devmap->uid = *uid;
1134 spin_unlock(&dasd_devmap_lock);
1135
1136 return 0;
1137}
1138EXPORT_SYMBOL_GPL(dasd_set_uid);
1139
1140/*
1141 * Return value of the specified feature. 1103 * Return value of the specified feature.
1142 */ 1104 */
1143int 1105int
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 0cb233116855..5b1cd8d6e971 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -692,18 +692,20 @@ dasd_eckd_cdl_reclen(int recid)
692/* 692/*
693 * Generate device unique id that specifies the physical device. 693 * Generate device unique id that specifies the physical device.
694 */ 694 */
695static int dasd_eckd_generate_uid(struct dasd_device *device, 695static int dasd_eckd_generate_uid(struct dasd_device *device)
696 struct dasd_uid *uid)
697{ 696{
698 struct dasd_eckd_private *private; 697 struct dasd_eckd_private *private;
698 struct dasd_uid *uid;
699 int count; 699 int count;
700 unsigned long flags;
700 701
701 private = (struct dasd_eckd_private *) device->private; 702 private = (struct dasd_eckd_private *) device->private;
702 if (!private) 703 if (!private)
703 return -ENODEV; 704 return -ENODEV;
704 if (!private->ned || !private->gneq) 705 if (!private->ned || !private->gneq)
705 return -ENODEV; 706 return -ENODEV;
706 707 uid = &private->uid;
708 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
707 memset(uid, 0, sizeof(struct dasd_uid)); 709 memset(uid, 0, sizeof(struct dasd_uid));
708 memcpy(uid->vendor, private->ned->HDA_manufacturer, 710 memcpy(uid->vendor, private->ned->HDA_manufacturer,
709 sizeof(uid->vendor) - 1); 711 sizeof(uid->vendor) - 1);
@@ -726,9 +728,25 @@ static int dasd_eckd_generate_uid(struct dasd_device *device,
726 private->vdsneq->uit[count]); 728 private->vdsneq->uit[count]);
727 } 729 }
728 } 730 }
731 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
729 return 0; 732 return 0;
730} 733}
731 734
735static int dasd_eckd_get_uid(struct dasd_device *device, struct dasd_uid *uid)
736{
737 struct dasd_eckd_private *private;
738 unsigned long flags;
739
740 if (device->private) {
741 private = (struct dasd_eckd_private *)device->private;
742 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
743 *uid = private->uid;
744 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
745 return 0;
746 }
747 return -EINVAL;
748}
749
732static struct dasd_ccw_req *dasd_eckd_build_rcd_lpm(struct dasd_device *device, 750static struct dasd_ccw_req *dasd_eckd_build_rcd_lpm(struct dasd_device *device,
733 void *rcd_buffer, 751 void *rcd_buffer,
734 struct ciw *ciw, __u8 lpm) 752 struct ciw *ciw, __u8 lpm)
@@ -1088,6 +1106,7 @@ dasd_eckd_check_characteristics(struct dasd_device *device)
1088{ 1106{
1089 struct dasd_eckd_private *private; 1107 struct dasd_eckd_private *private;
1090 struct dasd_block *block; 1108 struct dasd_block *block;
1109 struct dasd_uid temp_uid;
1091 int is_known, rc; 1110 int is_known, rc;
1092 int readonly; 1111 int readonly;
1093 1112
@@ -1124,13 +1143,13 @@ dasd_eckd_check_characteristics(struct dasd_device *device)
1124 if (rc) 1143 if (rc)
1125 goto out_err1; 1144 goto out_err1;
1126 1145
1127 /* Generate device unique id and register in devmap */ 1146 /* Generate device unique id */
1128 rc = dasd_eckd_generate_uid(device, &private->uid); 1147 rc = dasd_eckd_generate_uid(device);
1129 if (rc) 1148 if (rc)
1130 goto out_err1; 1149 goto out_err1;
1131 dasd_set_uid(device->cdev, &private->uid);
1132 1150
1133 if (private->uid.type == UA_BASE_DEVICE) { 1151 dasd_eckd_get_uid(device, &temp_uid);
1152 if (temp_uid.type == UA_BASE_DEVICE) {
1134 block = dasd_alloc_block(); 1153 block = dasd_alloc_block();
1135 if (IS_ERR(block)) { 1154 if (IS_ERR(block)) {
1136 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s", 1155 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s",
@@ -1451,6 +1470,7 @@ static int dasd_eckd_ready_to_online(struct dasd_device *device)
1451 1470
1452static int dasd_eckd_online_to_ready(struct dasd_device *device) 1471static int dasd_eckd_online_to_ready(struct dasd_device *device)
1453{ 1472{
1473 cancel_work_sync(&device->reload_device);
1454 return dasd_alias_remove_device(device); 1474 return dasd_alias_remove_device(device);
1455}; 1475};
1456 1476
@@ -1709,10 +1729,27 @@ static void dasd_eckd_handle_unsolicited_interrupt(struct dasd_device *device,
1709{ 1729{
1710 char mask; 1730 char mask;
1711 char *sense = NULL; 1731 char *sense = NULL;
1732 struct dasd_eckd_private *private;
1712 1733
1734 private = (struct dasd_eckd_private *) device->private;
1713 /* first of all check for state change pending interrupt */ 1735 /* first of all check for state change pending interrupt */
1714 mask = DEV_STAT_ATTENTION | DEV_STAT_DEV_END | DEV_STAT_UNIT_EXCEP; 1736 mask = DEV_STAT_ATTENTION | DEV_STAT_DEV_END | DEV_STAT_UNIT_EXCEP;
1715 if ((scsw_dstat(&irb->scsw) & mask) == mask) { 1737 if ((scsw_dstat(&irb->scsw) & mask) == mask) {
1738 /* for alias only and not in offline processing*/
1739 if (!device->block && private->lcu &&
1740 !test_bit(DASD_FLAG_OFFLINE, &device->flags)) {
1741 /*
1742 * the state change could be caused by an alias
1743 * reassignment remove device from alias handling
1744 * to prevent new requests from being scheduled on
1745 * the wrong alias device
1746 */
1747 dasd_alias_remove_device(device);
1748
1749 /* schedule worker to reload device */
1750 dasd_reload_device(device);
1751 }
1752
1716 dasd_generic_handle_state_change(device); 1753 dasd_generic_handle_state_change(device);
1717 return; 1754 return;
1718 } 1755 }
@@ -3259,7 +3296,7 @@ static void dasd_eckd_dump_sense(struct dasd_device *device,
3259 dasd_eckd_dump_sense_ccw(device, req, irb); 3296 dasd_eckd_dump_sense_ccw(device, req, irb);
3260} 3297}
3261 3298
3262int dasd_eckd_pm_freeze(struct dasd_device *device) 3299static int dasd_eckd_pm_freeze(struct dasd_device *device)
3263{ 3300{
3264 /* 3301 /*
3265 * the device should be disconnected from our LCU structure 3302 * the device should be disconnected from our LCU structure
@@ -3272,7 +3309,7 @@ int dasd_eckd_pm_freeze(struct dasd_device *device)
3272 return 0; 3309 return 0;
3273} 3310}
3274 3311
3275int dasd_eckd_restore_device(struct dasd_device *device) 3312static int dasd_eckd_restore_device(struct dasd_device *device)
3276{ 3313{
3277 struct dasd_eckd_private *private; 3314 struct dasd_eckd_private *private;
3278 struct dasd_eckd_characteristics temp_rdc_data; 3315 struct dasd_eckd_characteristics temp_rdc_data;
@@ -3287,15 +3324,16 @@ int dasd_eckd_restore_device(struct dasd_device *device)
3287 if (rc) 3324 if (rc)
3288 goto out_err; 3325 goto out_err;
3289 3326
3290 /* Generate device unique id and register in devmap */ 3327 dasd_eckd_get_uid(device, &temp_uid);
3291 rc = dasd_eckd_generate_uid(device, &private->uid); 3328 /* Generate device unique id */
3292 dasd_get_uid(device->cdev, &temp_uid); 3329 rc = dasd_eckd_generate_uid(device);
3330 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
3293 if (memcmp(&private->uid, &temp_uid, sizeof(struct dasd_uid)) != 0) 3331 if (memcmp(&private->uid, &temp_uid, sizeof(struct dasd_uid)) != 0)
3294 dev_err(&device->cdev->dev, "The UID of the DASD has " 3332 dev_err(&device->cdev->dev, "The UID of the DASD has "
3295 "changed\n"); 3333 "changed\n");
3334 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
3296 if (rc) 3335 if (rc)
3297 goto out_err; 3336 goto out_err;
3298 dasd_set_uid(device->cdev, &private->uid);
3299 3337
3300 /* register lcu with alias handling, enable PAV if this is a new lcu */ 3338 /* register lcu with alias handling, enable PAV if this is a new lcu */
3301 is_known = dasd_alias_make_device_known_to_lcu(device); 3339 is_known = dasd_alias_make_device_known_to_lcu(device);
@@ -3336,6 +3374,56 @@ out_err:
3336 return -1; 3374 return -1;
3337} 3375}
3338 3376
3377static int dasd_eckd_reload_device(struct dasd_device *device)
3378{
3379 struct dasd_eckd_private *private;
3380 int rc, old_base;
3381 char print_uid[60];
3382 struct dasd_uid uid;
3383 unsigned long flags;
3384
3385 private = (struct dasd_eckd_private *) device->private;
3386
3387 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
3388 old_base = private->uid.base_unit_addr;
3389 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
3390
3391 /* Read Configuration Data */
3392 rc = dasd_eckd_read_conf(device);
3393 if (rc)
3394 goto out_err;
3395
3396 rc = dasd_eckd_generate_uid(device);
3397 if (rc)
3398 goto out_err;
3399 /*
3400 * update unit address configuration and
3401 * add device to alias management
3402 */
3403 dasd_alias_update_add_device(device);
3404
3405 dasd_eckd_get_uid(device, &uid);
3406
3407 if (old_base != uid.base_unit_addr) {
3408 if (strlen(uid.vduit) > 0)
3409 snprintf(print_uid, sizeof(print_uid),
3410 "%s.%s.%04x.%02x.%s", uid.vendor, uid.serial,
3411 uid.ssid, uid.base_unit_addr, uid.vduit);
3412 else
3413 snprintf(print_uid, sizeof(print_uid),
3414 "%s.%s.%04x.%02x", uid.vendor, uid.serial,
3415 uid.ssid, uid.base_unit_addr);
3416
3417 dev_info(&device->cdev->dev,
3418 "An Alias device was reassigned to a new base device "
3419 "with UID: %s\n", print_uid);
3420 }
3421 return 0;
3422
3423out_err:
3424 return -1;
3425}
3426
3339static struct ccw_driver dasd_eckd_driver = { 3427static struct ccw_driver dasd_eckd_driver = {
3340 .name = "dasd-eckd", 3428 .name = "dasd-eckd",
3341 .owner = THIS_MODULE, 3429 .owner = THIS_MODULE,
@@ -3389,6 +3477,8 @@ static struct dasd_discipline dasd_eckd_discipline = {
3389 .ioctl = dasd_eckd_ioctl, 3477 .ioctl = dasd_eckd_ioctl,
3390 .freeze = dasd_eckd_pm_freeze, 3478 .freeze = dasd_eckd_pm_freeze,
3391 .restore = dasd_eckd_restore_device, 3479 .restore = dasd_eckd_restore_device,
3480 .reload = dasd_eckd_reload_device,
3481 .get_uid = dasd_eckd_get_uid,
3392}; 3482};
3393 3483
3394static int __init 3484static int __init
diff --git a/drivers/s390/block/dasd_eckd.h b/drivers/s390/block/dasd_eckd.h
index 864d53c04201..dd6385a5af14 100644
--- a/drivers/s390/block/dasd_eckd.h
+++ b/drivers/s390/block/dasd_eckd.h
@@ -426,7 +426,6 @@ struct alias_pav_group {
426 struct dasd_device *next; 426 struct dasd_device *next;
427}; 427};
428 428
429
430struct dasd_eckd_private { 429struct dasd_eckd_private {
431 struct dasd_eckd_characteristics rdc_data; 430 struct dasd_eckd_characteristics rdc_data;
432 u8 *conf_data; 431 u8 *conf_data;
@@ -463,4 +462,5 @@ void dasd_alias_handle_summary_unit_check(struct dasd_device *, struct irb *);
463void dasd_eckd_reset_ccw_to_base_io(struct dasd_ccw_req *); 462void dasd_eckd_reset_ccw_to_base_io(struct dasd_ccw_req *);
464void dasd_alias_lcu_setup_complete(struct dasd_device *); 463void dasd_alias_lcu_setup_complete(struct dasd_device *);
465void dasd_alias_wait_for_lcu_setup(struct dasd_device *); 464void dasd_alias_wait_for_lcu_setup(struct dasd_device *);
465int dasd_alias_update_add_device(struct dasd_device *);
466#endif /* DASD_ECKD_H */ 466#endif /* DASD_ECKD_H */
diff --git a/drivers/s390/block/dasd_int.h b/drivers/s390/block/dasd_int.h
index a91d4a97d4f2..32fac186ba3f 100644
--- a/drivers/s390/block/dasd_int.h
+++ b/drivers/s390/block/dasd_int.h
@@ -81,6 +81,10 @@ struct dasd_block;
81#define DASD_SIM_MSG_TO_OP 0x03 81#define DASD_SIM_MSG_TO_OP 0x03
82#define DASD_SIM_LOG 0x0C 82#define DASD_SIM_LOG 0x0C
83 83
84/* lock class for nested cdev lock */
85#define CDEV_NESTED_FIRST 1
86#define CDEV_NESTED_SECOND 2
87
84/* 88/*
85 * SECTION: MACROs for klogd and s390 debug feature (dbf) 89 * SECTION: MACROs for klogd and s390 debug feature (dbf)
86 */ 90 */
@@ -229,6 +233,24 @@ struct dasd_ccw_req {
229typedef struct dasd_ccw_req *(*dasd_erp_fn_t) (struct dasd_ccw_req *); 233typedef struct dasd_ccw_req *(*dasd_erp_fn_t) (struct dasd_ccw_req *);
230 234
231/* 235/*
236 * Unique identifier for dasd device.
237 */
238#define UA_NOT_CONFIGURED 0x00
239#define UA_BASE_DEVICE 0x01
240#define UA_BASE_PAV_ALIAS 0x02
241#define UA_HYPER_PAV_ALIAS 0x03
242
243struct dasd_uid {
244 __u8 type;
245 char vendor[4];
246 char serial[15];
247 __u16 ssid;
248 __u8 real_unit_addr;
249 __u8 base_unit_addr;
250 char vduit[33];
251};
252
253/*
232 * the struct dasd_discipline is 254 * the struct dasd_discipline is
233 * sth like a table of virtual functions, if you think of dasd_eckd 255 * sth like a table of virtual functions, if you think of dasd_eckd
234 * inheriting dasd... 256 * inheriting dasd...
@@ -312,28 +334,15 @@ struct dasd_discipline {
312 /* suspend/resume functions */ 334 /* suspend/resume functions */
313 int (*freeze) (struct dasd_device *); 335 int (*freeze) (struct dasd_device *);
314 int (*restore) (struct dasd_device *); 336 int (*restore) (struct dasd_device *);
315};
316 337
317extern struct dasd_discipline *dasd_diag_discipline_pointer; 338 /* reload device after state change */
318 339 int (*reload) (struct dasd_device *);
319/*
320 * Unique identifier for dasd device.
321 */
322#define UA_NOT_CONFIGURED 0x00
323#define UA_BASE_DEVICE 0x01
324#define UA_BASE_PAV_ALIAS 0x02
325#define UA_HYPER_PAV_ALIAS 0x03
326 340
327struct dasd_uid { 341 int (*get_uid) (struct dasd_device *, struct dasd_uid *);
328 __u8 type;
329 char vendor[4];
330 char serial[15];
331 __u16 ssid;
332 __u8 real_unit_addr;
333 __u8 base_unit_addr;
334 char vduit[33];
335}; 342};
336 343
344extern struct dasd_discipline *dasd_diag_discipline_pointer;
345
337/* 346/*
338 * Notification numbers for extended error reporting notifications: 347 * Notification numbers for extended error reporting notifications:
339 * The DASD_EER_DISABLE notification is sent before a dasd_device (and it's 348 * The DASD_EER_DISABLE notification is sent before a dasd_device (and it's
@@ -386,6 +395,7 @@ struct dasd_device {
386 struct tasklet_struct tasklet; 395 struct tasklet_struct tasklet;
387 struct work_struct kick_work; 396 struct work_struct kick_work;
388 struct work_struct restore_device; 397 struct work_struct restore_device;
398 struct work_struct reload_device;
389 struct timer_list timer; 399 struct timer_list timer;
390 400
391 debug_info_t *debug_area; 401 debug_info_t *debug_area;
@@ -582,6 +592,7 @@ void dasd_enable_device(struct dasd_device *);
582void dasd_set_target_state(struct dasd_device *, int); 592void dasd_set_target_state(struct dasd_device *, int);
583void dasd_kick_device(struct dasd_device *); 593void dasd_kick_device(struct dasd_device *);
584void dasd_restore_device(struct dasd_device *); 594void dasd_restore_device(struct dasd_device *);
595void dasd_reload_device(struct dasd_device *);
585 596
586void dasd_add_request_head(struct dasd_ccw_req *); 597void dasd_add_request_head(struct dasd_ccw_req *);
587void dasd_add_request_tail(struct dasd_ccw_req *); 598void dasd_add_request_tail(struct dasd_ccw_req *);
@@ -629,8 +640,6 @@ void dasd_devmap_exit(void);
629struct dasd_device *dasd_create_device(struct ccw_device *); 640struct dasd_device *dasd_create_device(struct ccw_device *);
630void dasd_delete_device(struct dasd_device *); 641void dasd_delete_device(struct dasd_device *);
631 642
632int dasd_get_uid(struct ccw_device *, struct dasd_uid *);
633int dasd_set_uid(struct ccw_device *, struct dasd_uid *);
634int dasd_get_feature(struct ccw_device *, int); 643int dasd_get_feature(struct ccw_device *, int);
635int dasd_set_feature(struct ccw_device *, int, int); 644int dasd_set_feature(struct ccw_device *, int, int);
636 645
diff --git a/drivers/s390/char/Kconfig b/drivers/s390/char/Kconfig
index 4e34d3686c23..40834f18754c 100644
--- a/drivers/s390/char/Kconfig
+++ b/drivers/s390/char/Kconfig
@@ -148,13 +148,12 @@ config VMLOGRDR
148 This driver depends on the IUCV support driver. 148 This driver depends on the IUCV support driver.
149 149
150config VMCP 150config VMCP
151 tristate "Support for the z/VM CP interface (VM only)" 151 bool "Support for the z/VM CP interface"
152 depends on S390 152 depends on S390
153 help 153 help
154 Select this option if you want to be able to interact with the control 154 Select this option if you want to be able to interact with the control
155 program on z/VM 155 program on z/VM
156 156
157
158config MONREADER 157config MONREADER
159 tristate "API for reading z/VM monitor service records" 158 tristate "API for reading z/VM monitor service records"
160 depends on IUCV 159 depends on IUCV
diff --git a/drivers/s390/char/fs3270.c b/drivers/s390/char/fs3270.c
index 0eabcca3c92d..857dfcb7b359 100644
--- a/drivers/s390/char/fs3270.c
+++ b/drivers/s390/char/fs3270.c
@@ -484,6 +484,7 @@ fs3270_open(struct inode *inode, struct file *filp)
484 raw3270_del_view(&fp->view); 484 raw3270_del_view(&fp->view);
485 goto out; 485 goto out;
486 } 486 }
487 nonseekable_open(inode, filp);
487 filp->private_data = fp; 488 filp->private_data = fp;
488out: 489out:
489 mutex_unlock(&fs3270_mutex); 490 mutex_unlock(&fs3270_mutex);
diff --git a/drivers/s390/char/keyboard.c b/drivers/s390/char/keyboard.c
index cb6bffe7141a..18d9a497863b 100644
--- a/drivers/s390/char/keyboard.c
+++ b/drivers/s390/char/keyboard.c
@@ -49,7 +49,7 @@ static unsigned char ret_diacr[NR_DEAD] = {
49struct kbd_data * 49struct kbd_data *
50kbd_alloc(void) { 50kbd_alloc(void) {
51 struct kbd_data *kbd; 51 struct kbd_data *kbd;
52 int i, len; 52 int i;
53 53
54 kbd = kzalloc(sizeof(struct kbd_data), GFP_KERNEL); 54 kbd = kzalloc(sizeof(struct kbd_data), GFP_KERNEL);
55 if (!kbd) 55 if (!kbd)
@@ -59,12 +59,11 @@ kbd_alloc(void) {
59 goto out_kbd; 59 goto out_kbd;
60 for (i = 0; i < ARRAY_SIZE(key_maps); i++) { 60 for (i = 0; i < ARRAY_SIZE(key_maps); i++) {
61 if (key_maps[i]) { 61 if (key_maps[i]) {
62 kbd->key_maps[i] = 62 kbd->key_maps[i] = kmemdup(key_maps[i],
63 kmalloc(sizeof(u_short)*NR_KEYS, GFP_KERNEL); 63 sizeof(u_short) * NR_KEYS,
64 GFP_KERNEL);
64 if (!kbd->key_maps[i]) 65 if (!kbd->key_maps[i])
65 goto out_maps; 66 goto out_maps;
66 memcpy(kbd->key_maps[i], key_maps[i],
67 sizeof(u_short)*NR_KEYS);
68 } 67 }
69 } 68 }
70 kbd->func_table = kzalloc(sizeof(func_table), GFP_KERNEL); 69 kbd->func_table = kzalloc(sizeof(func_table), GFP_KERNEL);
@@ -72,23 +71,21 @@ kbd_alloc(void) {
72 goto out_maps; 71 goto out_maps;
73 for (i = 0; i < ARRAY_SIZE(func_table); i++) { 72 for (i = 0; i < ARRAY_SIZE(func_table); i++) {
74 if (func_table[i]) { 73 if (func_table[i]) {
75 len = strlen(func_table[i]) + 1; 74 kbd->func_table[i] = kstrdup(func_table[i],
76 kbd->func_table[i] = kmalloc(len, GFP_KERNEL); 75 GFP_KERNEL);
77 if (!kbd->func_table[i]) 76 if (!kbd->func_table[i])
78 goto out_func; 77 goto out_func;
79 memcpy(kbd->func_table[i], func_table[i], len);
80 } 78 }
81 } 79 }
82 kbd->fn_handler = 80 kbd->fn_handler =
83 kzalloc(sizeof(fn_handler_fn *) * NR_FN_HANDLER, GFP_KERNEL); 81 kzalloc(sizeof(fn_handler_fn *) * NR_FN_HANDLER, GFP_KERNEL);
84 if (!kbd->fn_handler) 82 if (!kbd->fn_handler)
85 goto out_func; 83 goto out_func;
86 kbd->accent_table = 84 kbd->accent_table = kmemdup(accent_table,
87 kmalloc(sizeof(struct kbdiacruc)*MAX_DIACR, GFP_KERNEL); 85 sizeof(struct kbdiacruc) * MAX_DIACR,
86 GFP_KERNEL);
88 if (!kbd->accent_table) 87 if (!kbd->accent_table)
89 goto out_fn_handler; 88 goto out_fn_handler;
90 memcpy(kbd->accent_table, accent_table,
91 sizeof(struct kbdiacruc)*MAX_DIACR);
92 kbd->accent_table_size = accent_table_size; 89 kbd->accent_table_size = accent_table_size;
93 return kbd; 90 return kbd;
94 91
diff --git a/drivers/s390/char/vmcp.c b/drivers/s390/char/vmcp.c
index 5bb59d36a6d4..04e532eec032 100644
--- a/drivers/s390/char/vmcp.c
+++ b/drivers/s390/char/vmcp.c
@@ -1,24 +1,20 @@
1/* 1/*
2 * Copyright IBM Corp. 2004,2007 2 * Copyright IBM Corp. 2004,2010
3 * Interface implementation for communication with the z/VM control program 3 * Interface implementation for communication with the z/VM control program
4 * Author(s): Christian Borntraeger <borntraeger@de.ibm.com>
5 * 4 *
5 * Author(s): Christian Borntraeger <borntraeger@de.ibm.com>
6 * 6 *
7 * z/VMs CP offers the possibility to issue commands via the diagnose code 8 7 * z/VMs CP offers the possibility to issue commands via the diagnose code 8
8 * this driver implements a character device that issues these commands and 8 * this driver implements a character device that issues these commands and
9 * returns the answer of CP. 9 * returns the answer of CP.
10 10 *
11 * The idea of this driver is based on cpint from Neale Ferguson and #CP in CMS 11 * The idea of this driver is based on cpint from Neale Ferguson and #CP in CMS
12 */ 12 */
13 13
14#define KMSG_COMPONENT "vmcp"
15#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
16
17#include <linux/fs.h> 14#include <linux/fs.h>
18#include <linux/init.h> 15#include <linux/init.h>
19#include <linux/kernel.h> 16#include <linux/kernel.h>
20#include <linux/miscdevice.h> 17#include <linux/miscdevice.h>
21#include <linux/module.h>
22#include <linux/slab.h> 18#include <linux/slab.h>
23#include <asm/compat.h> 19#include <asm/compat.h>
24#include <asm/cpcmd.h> 20#include <asm/cpcmd.h>
@@ -26,10 +22,6 @@
26#include <asm/uaccess.h> 22#include <asm/uaccess.h>
27#include "vmcp.h" 23#include "vmcp.h"
28 24
29MODULE_LICENSE("GPL");
30MODULE_AUTHOR("Christian Borntraeger <borntraeger@de.ibm.com>");
31MODULE_DESCRIPTION("z/VM CP interface");
32
33static debug_info_t *vmcp_debug; 25static debug_info_t *vmcp_debug;
34 26
35static int vmcp_open(struct inode *inode, struct file *file) 27static int vmcp_open(struct inode *inode, struct file *file)
@@ -197,11 +189,8 @@ static int __init vmcp_init(void)
197{ 189{
198 int ret; 190 int ret;
199 191
200 if (!MACHINE_IS_VM) { 192 if (!MACHINE_IS_VM)
201 pr_warning("The z/VM CP interface device driver cannot be " 193 return 0;
202 "loaded without z/VM\n");
203 return -ENODEV;
204 }
205 194
206 vmcp_debug = debug_register("vmcp", 1, 1, 240); 195 vmcp_debug = debug_register("vmcp", 1, 1, 240);
207 if (!vmcp_debug) 196 if (!vmcp_debug)
@@ -214,19 +203,8 @@ static int __init vmcp_init(void)
214 } 203 }
215 204
216 ret = misc_register(&vmcp_dev); 205 ret = misc_register(&vmcp_dev);
217 if (ret) { 206 if (ret)
218 debug_unregister(vmcp_debug); 207 debug_unregister(vmcp_debug);
219 return ret; 208 return ret;
220 }
221
222 return 0;
223}
224
225static void __exit vmcp_exit(void)
226{
227 misc_deregister(&vmcp_dev);
228 debug_unregister(vmcp_debug);
229} 209}
230 210device_initcall(vmcp_init);
231module_init(vmcp_init);
232module_exit(vmcp_exit);
diff --git a/drivers/s390/char/zcore.c b/drivers/s390/char/zcore.c
index 7217966f7d31..f5ea3384a4b9 100644
--- a/drivers/s390/char/zcore.c
+++ b/drivers/s390/char/zcore.c
@@ -445,7 +445,7 @@ static int zcore_memmap_open(struct inode *inode, struct file *filp)
445 } 445 }
446 kfree(chunk_array); 446 kfree(chunk_array);
447 filp->private_data = buf; 447 filp->private_data = buf;
448 return 0; 448 return nonseekable_open(inode, filp);
449} 449}
450 450
451static int zcore_memmap_release(struct inode *inode, struct file *filp) 451static int zcore_memmap_release(struct inode *inode, struct file *filp)
@@ -473,7 +473,7 @@ static ssize_t zcore_reipl_write(struct file *filp, const char __user *buf,
473 473
474static int zcore_reipl_open(struct inode *inode, struct file *filp) 474static int zcore_reipl_open(struct inode *inode, struct file *filp)
475{ 475{
476 return 0; 476 return nonseekable_open(inode, filp);
477} 477}
478 478
479static int zcore_reipl_release(struct inode *inode, struct file *filp) 479static int zcore_reipl_release(struct inode *inode, struct file *filp)
diff --git a/drivers/s390/cio/chsc_sch.c b/drivers/s390/cio/chsc_sch.c
index 3b6f4adc5094..a83877c664a6 100644
--- a/drivers/s390/cio/chsc_sch.c
+++ b/drivers/s390/cio/chsc_sch.c
@@ -803,6 +803,7 @@ static long chsc_ioctl(struct file *filp, unsigned int cmd,
803 803
804static const struct file_operations chsc_fops = { 804static const struct file_operations chsc_fops = {
805 .owner = THIS_MODULE, 805 .owner = THIS_MODULE,
806 .open = nonseekable_open,
806 .unlocked_ioctl = chsc_ioctl, 807 .unlocked_ioctl = chsc_ioctl,
807 .compat_ioctl = chsc_ioctl, 808 .compat_ioctl = chsc_ioctl,
808}; 809};
diff --git a/drivers/s390/cio/cio.c b/drivers/s390/cio/cio.c
index 5feea1a371e1..f4e6cf3aceb8 100644
--- a/drivers/s390/cio/cio.c
+++ b/drivers/s390/cio/cio.c
@@ -616,7 +616,8 @@ void __irq_entry do_IRQ(struct pt_regs *regs)
616 struct pt_regs *old_regs; 616 struct pt_regs *old_regs;
617 617
618 old_regs = set_irq_regs(regs); 618 old_regs = set_irq_regs(regs);
619 s390_idle_check(); 619 s390_idle_check(regs, S390_lowcore.int_clock,
620 S390_lowcore.async_enter_timer);
620 irq_enter(); 621 irq_enter();
621 __get_cpu_var(s390_idle).nohz_delay = 1; 622 __get_cpu_var(s390_idle).nohz_delay = 1;
622 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) 623 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
diff --git a/drivers/s390/cio/css.c b/drivers/s390/cio/css.c
index 511649115bd7..ac94ac751459 100644
--- a/drivers/s390/cio/css.c
+++ b/drivers/s390/cio/css.c
@@ -648,6 +648,8 @@ static void css_process_crw(struct crw *crw0, struct crw *crw1, int overflow)
648static void __init 648static void __init
649css_generate_pgid(struct channel_subsystem *css, u32 tod_high) 649css_generate_pgid(struct channel_subsystem *css, u32 tod_high)
650{ 650{
651 struct cpuid cpu_id;
652
651 if (css_general_characteristics.mcss) { 653 if (css_general_characteristics.mcss) {
652 css->global_pgid.pgid_high.ext_cssid.version = 0x80; 654 css->global_pgid.pgid_high.ext_cssid.version = 0x80;
653 css->global_pgid.pgid_high.ext_cssid.cssid = css->cssid; 655 css->global_pgid.pgid_high.ext_cssid.cssid = css->cssid;
@@ -658,8 +660,9 @@ css_generate_pgid(struct channel_subsystem *css, u32 tod_high)
658 css->global_pgid.pgid_high.cpu_addr = 0; 660 css->global_pgid.pgid_high.cpu_addr = 0;
659#endif 661#endif
660 } 662 }
661 css->global_pgid.cpu_id = S390_lowcore.cpu_id.ident; 663 get_cpu_id(&cpu_id);
662 css->global_pgid.cpu_model = S390_lowcore.cpu_id.machine; 664 css->global_pgid.cpu_id = cpu_id.ident;
665 css->global_pgid.cpu_model = cpu_id.machine;
663 css->global_pgid.tod_high = tod_high; 666 css->global_pgid.tod_high = tod_high;
664 667
665} 668}
@@ -1062,6 +1065,7 @@ static ssize_t cio_settle_write(struct file *file, const char __user *buf,
1062} 1065}
1063 1066
1064static const struct file_operations cio_settle_proc_fops = { 1067static const struct file_operations cio_settle_proc_fops = {
1068 .open = nonseekable_open,
1065 .write = cio_settle_write, 1069 .write = cio_settle_write,
1066}; 1070};
1067 1071
diff --git a/drivers/s390/cio/qdio.h b/drivers/s390/cio/qdio.h
index 48aa0647432b..f0037eefd44e 100644
--- a/drivers/s390/cio/qdio.h
+++ b/drivers/s390/cio/qdio.h
@@ -13,8 +13,8 @@
13#include <asm/debug.h> 13#include <asm/debug.h>
14#include "chsc.h" 14#include "chsc.h"
15 15
16#define QDIO_BUSY_BIT_PATIENCE 100 /* 100 microseconds */ 16#define QDIO_BUSY_BIT_PATIENCE (100 << 12) /* 100 microseconds */
17#define QDIO_INPUT_THRESHOLD 500 /* 500 microseconds */ 17#define QDIO_INPUT_THRESHOLD (500 << 12) /* 500 microseconds */
18 18
19/* 19/*
20 * if an asynchronous HiperSockets queue runs full, the 10 seconds timer wait 20 * if an asynchronous HiperSockets queue runs full, the 10 seconds timer wait
@@ -296,10 +296,8 @@ struct qdio_q {
296 struct qdio_irq *irq_ptr; 296 struct qdio_irq *irq_ptr;
297 struct sl *sl; 297 struct sl *sl;
298 /* 298 /*
299 * Warning: Leave this member at the end so it won't be cleared in 299 * A page is allocated under this pointer and used for slib and sl.
300 * qdio_fill_qs. A page is allocated under this pointer and used for 300 * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
301 * slib and sl. slib is 2048 bytes big and sl points to offset
302 * PAGE_SIZE / 2.
303 */ 301 */
304 struct slib *slib; 302 struct slib *slib;
305} __attribute__ ((aligned(256))); 303} __attribute__ ((aligned(256)));
@@ -372,11 +370,6 @@ static inline int multicast_outbound(struct qdio_q *q)
372 (q->nr == q->irq_ptr->nr_output_qs - 1); 370 (q->nr == q->irq_ptr->nr_output_qs - 1);
373} 371}
374 372
375static inline unsigned long long get_usecs(void)
376{
377 return monotonic_clock() >> 12;
378}
379
380#define pci_out_supported(q) \ 373#define pci_out_supported(q) \
381 (q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) 374 (q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
382#define is_qebsm(q) (q->irq_ptr->sch_token != 0) 375#define is_qebsm(q) (q->irq_ptr->sch_token != 0)
diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c
index 88be7b9ea6e1..00520f9a7a8e 100644
--- a/drivers/s390/cio/qdio_main.c
+++ b/drivers/s390/cio/qdio_main.c
@@ -336,10 +336,10 @@ again:
336 WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2); 336 WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
337 337
338 if (!start_time) { 338 if (!start_time) {
339 start_time = get_usecs(); 339 start_time = get_clock();
340 goto again; 340 goto again;
341 } 341 }
342 if ((get_usecs() - start_time) < QDIO_BUSY_BIT_PATIENCE) 342 if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
343 goto again; 343 goto again;
344 } 344 }
345 return cc; 345 return cc;
@@ -536,7 +536,7 @@ static int qdio_inbound_q_moved(struct qdio_q *q)
536 if ((bufnr != q->last_move) || q->qdio_error) { 536 if ((bufnr != q->last_move) || q->qdio_error) {
537 q->last_move = bufnr; 537 q->last_move = bufnr;
538 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR) 538 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
539 q->u.in.timestamp = get_usecs(); 539 q->u.in.timestamp = get_clock();
540 return 1; 540 return 1;
541 } else 541 } else
542 return 0; 542 return 0;
@@ -567,7 +567,7 @@ static inline int qdio_inbound_q_done(struct qdio_q *q)
567 * At this point we know, that inbound first_to_check 567 * At this point we know, that inbound first_to_check
568 * has (probably) not moved (see qdio_inbound_processing). 568 * has (probably) not moved (see qdio_inbound_processing).
569 */ 569 */
570 if (get_usecs() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) { 570 if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
571 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x", 571 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
572 q->first_to_check); 572 q->first_to_check);
573 return 1; 573 return 1;
@@ -606,7 +606,7 @@ static void qdio_kick_handler(struct qdio_q *q)
606static void __qdio_inbound_processing(struct qdio_q *q) 606static void __qdio_inbound_processing(struct qdio_q *q)
607{ 607{
608 qperf_inc(q, tasklet_inbound); 608 qperf_inc(q, tasklet_inbound);
609again: 609
610 if (!qdio_inbound_q_moved(q)) 610 if (!qdio_inbound_q_moved(q))
611 return; 611 return;
612 612
@@ -615,7 +615,10 @@ again:
615 if (!qdio_inbound_q_done(q)) { 615 if (!qdio_inbound_q_done(q)) {
616 /* means poll time is not yet over */ 616 /* means poll time is not yet over */
617 qperf_inc(q, tasklet_inbound_resched); 617 qperf_inc(q, tasklet_inbound_resched);
618 goto again; 618 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
619 tasklet_schedule(&q->tasklet);
620 return;
621 }
619 } 622 }
620 623
621 qdio_stop_polling(q); 624 qdio_stop_polling(q);
@@ -625,7 +628,8 @@ again:
625 */ 628 */
626 if (!qdio_inbound_q_done(q)) { 629 if (!qdio_inbound_q_done(q)) {
627 qperf_inc(q, tasklet_inbound_resched2); 630 qperf_inc(q, tasklet_inbound_resched2);
628 goto again; 631 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
632 tasklet_schedule(&q->tasklet);
629 } 633 }
630} 634}
631 635
@@ -955,6 +959,9 @@ void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
955 return; 959 return;
956 } 960 }
957 961
962 if (irq_ptr->perf_stat_enabled)
963 irq_ptr->perf_stat.qdio_int++;
964
958 if (IS_ERR(irb)) { 965 if (IS_ERR(irb)) {
959 switch (PTR_ERR(irb)) { 966 switch (PTR_ERR(irb)) {
960 case -EIO: 967 case -EIO:
@@ -1016,30 +1023,6 @@ int qdio_get_ssqd_desc(struct ccw_device *cdev,
1016} 1023}
1017EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); 1024EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1018 1025
1019/**
1020 * qdio_cleanup - shutdown queues and free data structures
1021 * @cdev: associated ccw device
1022 * @how: use halt or clear to shutdown
1023 *
1024 * This function calls qdio_shutdown() for @cdev with method @how.
1025 * and qdio_free(). The qdio_free() return value is ignored since
1026 * !irq_ptr is already checked.
1027 */
1028int qdio_cleanup(struct ccw_device *cdev, int how)
1029{
1030 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1031 int rc;
1032
1033 if (!irq_ptr)
1034 return -ENODEV;
1035
1036 rc = qdio_shutdown(cdev, how);
1037
1038 qdio_free(cdev);
1039 return rc;
1040}
1041EXPORT_SYMBOL_GPL(qdio_cleanup);
1042
1043static void qdio_shutdown_queues(struct ccw_device *cdev) 1026static void qdio_shutdown_queues(struct ccw_device *cdev)
1044{ 1027{
1045 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1028 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
@@ -1157,28 +1140,6 @@ int qdio_free(struct ccw_device *cdev)
1157EXPORT_SYMBOL_GPL(qdio_free); 1140EXPORT_SYMBOL_GPL(qdio_free);
1158 1141
1159/** 1142/**
1160 * qdio_initialize - allocate and establish queues for a qdio subchannel
1161 * @init_data: initialization data
1162 *
1163 * This function first allocates queues via qdio_allocate() and on success
1164 * establishes them via qdio_establish().
1165 */
1166int qdio_initialize(struct qdio_initialize *init_data)
1167{
1168 int rc;
1169
1170 rc = qdio_allocate(init_data);
1171 if (rc)
1172 return rc;
1173
1174 rc = qdio_establish(init_data);
1175 if (rc)
1176 qdio_free(init_data->cdev);
1177 return rc;
1178}
1179EXPORT_SYMBOL_GPL(qdio_initialize);
1180
1181/**
1182 * qdio_allocate - allocate qdio queues and associated data 1143 * qdio_allocate - allocate qdio queues and associated data
1183 * @init_data: initialization data 1144 * @init_data: initialization data
1184 */ 1145 */
diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c
index 7f4a75465140..6326b67c45d2 100644
--- a/drivers/s390/cio/qdio_setup.c
+++ b/drivers/s390/cio/qdio_setup.c
@@ -106,10 +106,12 @@ int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs
106static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr, 106static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
107 qdio_handler_t *handler, int i) 107 qdio_handler_t *handler, int i)
108{ 108{
109 /* must be cleared by every qdio_establish */ 109 struct slib *slib = q->slib;
110 memset(q, 0, ((char *)&q->slib) - ((char *)q));
111 memset(q->slib, 0, PAGE_SIZE);
112 110
111 /* queue must be cleared for qdio_establish */
112 memset(q, 0, sizeof(*q));
113 memset(slib, 0, PAGE_SIZE);
114 q->slib = slib;
113 q->irq_ptr = irq_ptr; 115 q->irq_ptr = irq_ptr;
114 q->mask = 1 << (31 - i); 116 q->mask = 1 << (31 - i);
115 q->nr = i; 117 q->nr = i;
diff --git a/drivers/s390/cio/qdio_thinint.c b/drivers/s390/cio/qdio_thinint.c
index ce5f8910ff83..8daf1b99f153 100644
--- a/drivers/s390/cio/qdio_thinint.c
+++ b/drivers/s390/cio/qdio_thinint.c
@@ -95,7 +95,7 @@ void tiqdio_add_input_queues(struct qdio_irq *irq_ptr)
95 for_each_input_queue(irq_ptr, q, i) 95 for_each_input_queue(irq_ptr, q, i)
96 list_add_rcu(&q->entry, &tiq_list); 96 list_add_rcu(&q->entry, &tiq_list);
97 mutex_unlock(&tiq_list_lock); 97 mutex_unlock(&tiq_list_lock);
98 xchg(irq_ptr->dsci, 1); 98 xchg(irq_ptr->dsci, 1 << 7);
99} 99}
100 100
101void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr) 101void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr)
@@ -173,7 +173,7 @@ static void tiqdio_thinint_handler(void *ind, void *drv_data)
173 173
174 /* prevent racing */ 174 /* prevent racing */
175 if (*tiqdio_alsi) 175 if (*tiqdio_alsi)
176 xchg(&q_indicators[TIQDIO_SHARED_IND].ind, 1); 176 xchg(&q_indicators[TIQDIO_SHARED_IND].ind, 1 << 7);
177 } 177 }
178} 178}
179 179
diff --git a/drivers/s390/crypto/zcrypt_api.c b/drivers/s390/crypto/zcrypt_api.c
index 304caf549973..41e0aaefafd5 100644
--- a/drivers/s390/crypto/zcrypt_api.c
+++ b/drivers/s390/crypto/zcrypt_api.c
@@ -302,7 +302,7 @@ static ssize_t zcrypt_write(struct file *filp, const char __user *buf,
302static int zcrypt_open(struct inode *inode, struct file *filp) 302static int zcrypt_open(struct inode *inode, struct file *filp)
303{ 303{
304 atomic_inc(&zcrypt_open_count); 304 atomic_inc(&zcrypt_open_count);
305 return 0; 305 return nonseekable_open(inode, filp);
306} 306}
307 307
308/** 308/**
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c
index 3ba738b2e271..28f71349fdec 100644
--- a/drivers/s390/net/qeth_core_main.c
+++ b/drivers/s390/net/qeth_core_main.c
@@ -1292,13 +1292,14 @@ int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1292 QETH_QDIO_CLEANING)) { 1292 QETH_QDIO_CLEANING)) {
1293 case QETH_QDIO_ESTABLISHED: 1293 case QETH_QDIO_ESTABLISHED:
1294 if (card->info.type == QETH_CARD_TYPE_IQD) 1294 if (card->info.type == QETH_CARD_TYPE_IQD)
1295 rc = qdio_cleanup(CARD_DDEV(card), 1295 rc = qdio_shutdown(CARD_DDEV(card),
1296 QDIO_FLAG_CLEANUP_USING_HALT); 1296 QDIO_FLAG_CLEANUP_USING_HALT);
1297 else 1297 else
1298 rc = qdio_cleanup(CARD_DDEV(card), 1298 rc = qdio_shutdown(CARD_DDEV(card),
1299 QDIO_FLAG_CLEANUP_USING_CLEAR); 1299 QDIO_FLAG_CLEANUP_USING_CLEAR);
1300 if (rc) 1300 if (rc)
1301 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc); 1301 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1302 qdio_free(CARD_DDEV(card));
1302 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1303 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1303 break; 1304 break;
1304 case QETH_QDIO_CLEANING: 1305 case QETH_QDIO_CLEANING:
@@ -3810,10 +3811,18 @@ static int qeth_qdio_establish(struct qeth_card *card)
3810 3811
3811 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 3812 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3812 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 3813 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3813 rc = qdio_initialize(&init_data); 3814 rc = qdio_allocate(&init_data);
3814 if (rc) 3815 if (rc) {
3816 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3817 goto out;
3818 }
3819 rc = qdio_establish(&init_data);
3820 if (rc) {
3815 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3821 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3822 qdio_free(CARD_DDEV(card));
3823 }
3816 } 3824 }
3825out:
3817 kfree(out_sbal_ptrs); 3826 kfree(out_sbal_ptrs);
3818 kfree(in_sbal_ptrs); 3827 kfree(in_sbal_ptrs);
3819 kfree(qib_param_field); 3828 kfree(qib_param_field);
diff --git a/drivers/s390/scsi/zfcp_cfdc.c b/drivers/s390/scsi/zfcp_cfdc.c
index 25d9e0ae9c57..1a2db0a35737 100644
--- a/drivers/s390/scsi/zfcp_cfdc.c
+++ b/drivers/s390/scsi/zfcp_cfdc.c
@@ -254,6 +254,7 @@ static long zfcp_cfdc_dev_ioctl(struct file *file, unsigned int command,
254} 254}
255 255
256static const struct file_operations zfcp_cfdc_fops = { 256static const struct file_operations zfcp_cfdc_fops = {
257 .open = nonseekable_open,
257 .unlocked_ioctl = zfcp_cfdc_dev_ioctl, 258 .unlocked_ioctl = zfcp_cfdc_dev_ioctl,
258#ifdef CONFIG_COMPAT 259#ifdef CONFIG_COMPAT
259 .compat_ioctl = zfcp_cfdc_dev_ioctl 260 .compat_ioctl = zfcp_cfdc_dev_ioctl
diff --git a/drivers/sbus/char/flash.c b/drivers/sbus/char/flash.c
index 19f255b97c86..d3b62eb0fba7 100644
--- a/drivers/sbus/char/flash.c
+++ b/drivers/sbus/char/flash.c
@@ -105,9 +105,9 @@ static ssize_t
105flash_read(struct file * file, char __user * buf, 105flash_read(struct file * file, char __user * buf,
106 size_t count, loff_t *ppos) 106 size_t count, loff_t *ppos)
107{ 107{
108 unsigned long p = file->f_pos; 108 loff_t p = *ppos;
109 int i; 109 int i;
110 110
111 if (count > flash.read_size - p) 111 if (count > flash.read_size - p)
112 count = flash.read_size - p; 112 count = flash.read_size - p;
113 113
@@ -118,7 +118,7 @@ flash_read(struct file * file, char __user * buf,
118 buf++; 118 buf++;
119 } 119 }
120 120
121 file->f_pos += count; 121 *ppos += count;
122 return count; 122 return count;
123} 123}
124 124
diff --git a/drivers/scsi/zorro7xx.c b/drivers/scsi/zorro7xx.c
index 105449c15fa9..e17764d71476 100644
--- a/drivers/scsi/zorro7xx.c
+++ b/drivers/scsi/zorro7xx.c
@@ -69,6 +69,7 @@ static struct zorro_device_id zorro7xx_zorro_tbl[] __devinitdata = {
69 }, 69 },
70 { 0 } 70 { 0 }
71}; 71};
72MODULE_DEVICE_TABLE(zorro, zorro7xx_zorro_tbl);
72 73
73static int __devinit zorro7xx_init_one(struct zorro_dev *z, 74static int __devinit zorro7xx_init_one(struct zorro_dev *z,
74 const struct zorro_device_id *ent) 75 const struct zorro_device_id *ent)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index f55c49475a8c..302836a80693 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -518,12 +518,13 @@ config SERIAL_S3C2412
518 Serial port support for the Samsung S3C2412 and S3C2413 SoC 518 Serial port support for the Samsung S3C2412 and S3C2413 SoC
519 519
520config SERIAL_S3C2440 520config SERIAL_S3C2440
521 tristate "Samsung S3C2440/S3C2442 Serial port support" 521 tristate "Samsung S3C2440/S3C2442/S3C2416 Serial port support"
522 depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442) 522 depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442 || CPU_S3C2416)
523 default y if CPU_S3C2440 523 default y if CPU_S3C2440
524 default y if CPU_S3C2442 524 default y if CPU_S3C2442
525 select SERIAL_SAMSUNG_UARTS_4 if CPU_S3C2416
525 help 526 help
526 Serial port support for the Samsung S3C2440 and S3C2442 SoC 527 Serial port support for the Samsung S3C2440, S3C2416 and S3C2442 SoC
527 528
528config SERIAL_S3C24A0 529config SERIAL_S3C24A0
529 tristate "Samsung S3C24A0 Serial port support" 530 tristate "Samsung S3C24A0 Serial port support"
@@ -533,21 +534,13 @@ config SERIAL_S3C24A0
533 Serial port support for the Samsung S3C24A0 SoC 534 Serial port support for the Samsung S3C24A0 SoC
534 535
535config SERIAL_S3C6400 536config SERIAL_S3C6400
536 tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support" 537 tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support"
537 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440) 538 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100)
538 select SERIAL_SAMSUNG_UARTS_4 539 select SERIAL_SAMSUNG_UARTS_4
539 default y 540 default y
540 help 541 help
541 Serial port support for the Samsung S3C6400, S3C6410 and S5P6440 542 Serial port support for the Samsung S3C6400, S3C6410, S5P6440
542 SoCs 543 and S5PC100 SoCs
543
544config SERIAL_S5PC100
545 tristate "Samsung S5PC100 Serial port support"
546 depends on SERIAL_SAMSUNG && CPU_S5PC100
547 select SERIAL_SAMSUNG_UARTS_4
548 default y
549 help
550 Serial port support for the Samsung S5PC100 SoCs
551 544
552config SERIAL_S5PV210 545config SERIAL_S5PV210
553 tristate "Samsung S5PV210 Serial port support" 546 tristate "Samsung S5PV210 Serial port support"
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 6aa4723b74ee..328f107346c4 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -44,7 +44,6 @@ obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o
44obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o 44obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
45obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o 45obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o 46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
47obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
48obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o 47obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
49obj-$(CONFIG_SERIAL_MAX3100) += max3100.o 48obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
50obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o 49obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 2c9bf9b68327..eed3c2d8dd1c 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -38,6 +38,7 @@
38#include <linux/dma-mapping.h> 38#include <linux/dma-mapping.h>
39#include <linux/atmel_pdc.h> 39#include <linux/atmel_pdc.h>
40#include <linux/atmel_serial.h> 40#include <linux/atmel_serial.h>
41#include <linux/uaccess.h>
41 42
42#include <asm/io.h> 43#include <asm/io.h>
43 44
@@ -59,6 +60,9 @@
59 60
60#include <linux/serial_core.h> 61#include <linux/serial_core.h>
61 62
63static void atmel_start_rx(struct uart_port *port);
64static void atmel_stop_rx(struct uart_port *port);
65
62#ifdef CONFIG_SERIAL_ATMEL_TTYAT 66#ifdef CONFIG_SERIAL_ATMEL_TTYAT
63 67
64/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we 68/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
@@ -93,6 +97,7 @@
93#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) 97#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
94#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) 98#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
95#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) 99#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
100#define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
96 101
97 /* PDC registers */ 102 /* PDC registers */
98#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) 103#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
@@ -147,6 +152,9 @@ struct atmel_uart_port {
147 unsigned int irq_status_prev; 152 unsigned int irq_status_prev;
148 153
149 struct circ_buf rx_ring; 154 struct circ_buf rx_ring;
155
156 struct serial_rs485 rs485; /* rs485 settings */
157 unsigned int tx_done_mask;
150}; 158};
151 159
152static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; 160static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
@@ -187,6 +195,46 @@ static bool atmel_use_dma_tx(struct uart_port *port)
187} 195}
188#endif 196#endif
189 197
198/* Enable or disable the rs485 support */
199void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
200{
201 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
202 unsigned int mode;
203
204 spin_lock(&port->lock);
205
206 /* Disable interrupts */
207 UART_PUT_IDR(port, atmel_port->tx_done_mask);
208
209 mode = UART_GET_MR(port);
210
211 /* Resetting serial mode to RS232 (0x0) */
212 mode &= ~ATMEL_US_USMODE;
213
214 atmel_port->rs485 = *rs485conf;
215
216 if (rs485conf->flags & SER_RS485_ENABLED) {
217 dev_dbg(port->dev, "Setting UART to RS485\n");
218 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
219 UART_PUT_TTGR(port, rs485conf->delay_rts_before_send);
220 mode |= ATMEL_US_USMODE_RS485;
221 } else {
222 dev_dbg(port->dev, "Setting UART to RS232\n");
223 if (atmel_use_dma_tx(port))
224 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
225 ATMEL_US_TXBUFE;
226 else
227 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
228 }
229 UART_PUT_MR(port, mode);
230
231 /* Enable interrupts */
232 UART_PUT_IER(port, atmel_port->tx_done_mask);
233
234 spin_unlock(&port->lock);
235
236}
237
190/* 238/*
191 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. 239 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
192 */ 240 */
@@ -202,6 +250,7 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
202{ 250{
203 unsigned int control = 0; 251 unsigned int control = 0;
204 unsigned int mode; 252 unsigned int mode;
253 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
205 254
206#ifdef CONFIG_ARCH_AT91RM9200 255#ifdef CONFIG_ARCH_AT91RM9200
207 if (cpu_is_at91rm9200()) { 256 if (cpu_is_at91rm9200()) {
@@ -236,6 +285,17 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
236 mode |= ATMEL_US_CHMODE_LOC_LOOP; 285 mode |= ATMEL_US_CHMODE_LOC_LOOP;
237 else 286 else
238 mode |= ATMEL_US_CHMODE_NORMAL; 287 mode |= ATMEL_US_CHMODE_NORMAL;
288
289 /* Resetting serial mode to RS232 (0x0) */
290 mode &= ~ATMEL_US_USMODE;
291
292 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
293 dev_dbg(port->dev, "Setting UART to RS485\n");
294 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send);
295 mode |= ATMEL_US_USMODE_RS485;
296 } else {
297 dev_dbg(port->dev, "Setting UART to RS232\n");
298 }
239 UART_PUT_MR(port, mode); 299 UART_PUT_MR(port, mode);
240} 300}
241 301
@@ -268,12 +328,17 @@ static u_int atmel_get_mctrl(struct uart_port *port)
268 */ 328 */
269static void atmel_stop_tx(struct uart_port *port) 329static void atmel_stop_tx(struct uart_port *port)
270{ 330{
331 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
332
271 if (atmel_use_dma_tx(port)) { 333 if (atmel_use_dma_tx(port)) {
272 /* disable PDC transmit */ 334 /* disable PDC transmit */
273 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); 335 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
274 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); 336 }
275 } else 337 /* Disable interrupts */
276 UART_PUT_IDR(port, ATMEL_US_TXRDY); 338 UART_PUT_IDR(port, atmel_port->tx_done_mask);
339
340 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
341 atmel_start_rx(port);
277} 342}
278 343
279/* 344/*
@@ -281,17 +346,39 @@ static void atmel_stop_tx(struct uart_port *port)
281 */ 346 */
282static void atmel_start_tx(struct uart_port *port) 347static void atmel_start_tx(struct uart_port *port)
283{ 348{
349 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
350
284 if (atmel_use_dma_tx(port)) { 351 if (atmel_use_dma_tx(port)) {
285 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) 352 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
286 /* The transmitter is already running. Yes, we 353 /* The transmitter is already running. Yes, we
287 really need this.*/ 354 really need this.*/
288 return; 355 return;
289 356
290 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); 357 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
358 atmel_stop_rx(port);
359
291 /* re-enable PDC transmit */ 360 /* re-enable PDC transmit */
292 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 361 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
293 } else 362 }
294 UART_PUT_IER(port, ATMEL_US_TXRDY); 363 /* Enable interrupts */
364 UART_PUT_IER(port, atmel_port->tx_done_mask);
365}
366
367/*
368 * start receiving - port is in process of being opened.
369 */
370static void atmel_start_rx(struct uart_port *port)
371{
372 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
373
374 if (atmel_use_dma_rx(port)) {
375 /* enable PDC controller */
376 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
377 port->read_status_mask);
378 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
379 } else {
380 UART_PUT_IER(port, ATMEL_US_RXRDY);
381 }
295} 382}
296 383
297/* 384/*
@@ -302,9 +389,11 @@ static void atmel_stop_rx(struct uart_port *port)
302 if (atmel_use_dma_rx(port)) { 389 if (atmel_use_dma_rx(port)) {
303 /* disable PDC receive */ 390 /* disable PDC receive */
304 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); 391 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
305 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); 392 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
306 } else 393 port->read_status_mask);
394 } else {
307 UART_PUT_IDR(port, ATMEL_US_RXRDY); 395 UART_PUT_IDR(port, ATMEL_US_RXRDY);
396 }
308} 397}
309 398
310/* 399/*
@@ -428,8 +517,9 @@ static void atmel_rx_chars(struct uart_port *port)
428static void atmel_tx_chars(struct uart_port *port) 517static void atmel_tx_chars(struct uart_port *port)
429{ 518{
430 struct circ_buf *xmit = &port->state->xmit; 519 struct circ_buf *xmit = &port->state->xmit;
520 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
431 521
432 if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) { 522 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
433 UART_PUT_CHAR(port, port->x_char); 523 UART_PUT_CHAR(port, port->x_char);
434 port->icount.tx++; 524 port->icount.tx++;
435 port->x_char = 0; 525 port->x_char = 0;
@@ -437,7 +527,7 @@ static void atmel_tx_chars(struct uart_port *port)
437 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) 527 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
438 return; 528 return;
439 529
440 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) { 530 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
441 UART_PUT_CHAR(port, xmit->buf[xmit->tail]); 531 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
442 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 532 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
443 port->icount.tx++; 533 port->icount.tx++;
@@ -449,7 +539,8 @@ static void atmel_tx_chars(struct uart_port *port)
449 uart_write_wakeup(port); 539 uart_write_wakeup(port);
450 540
451 if (!uart_circ_empty(xmit)) 541 if (!uart_circ_empty(xmit))
452 UART_PUT_IER(port, ATMEL_US_TXRDY); 542 /* Enable interrupts */
543 UART_PUT_IER(port, atmel_port->tx_done_mask);
453} 544}
454 545
455/* 546/*
@@ -501,18 +592,10 @@ atmel_handle_transmit(struct uart_port *port, unsigned int pending)
501{ 592{
502 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 593 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
503 594
504 if (atmel_use_dma_tx(port)) { 595 if (pending & atmel_port->tx_done_mask) {
505 /* PDC transmit */ 596 /* Either PDC or interrupt transmission */
506 if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) { 597 UART_PUT_IDR(port, atmel_port->tx_done_mask);
507 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); 598 tasklet_schedule(&atmel_port->tasklet);
508 tasklet_schedule(&atmel_port->tasklet);
509 }
510 } else {
511 /* Interrupt transmit */
512 if (pending & ATMEL_US_TXRDY) {
513 UART_PUT_IDR(port, ATMEL_US_TXRDY);
514 tasklet_schedule(&atmel_port->tasklet);
515 }
516 } 599 }
517} 600}
518 601
@@ -590,9 +673,15 @@ static void atmel_tx_dma(struct uart_port *port)
590 673
591 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); 674 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
592 UART_PUT_TCR(port, count); 675 UART_PUT_TCR(port, count);
593 /* re-enable PDC transmit and interrupts */ 676 /* re-enable PDC transmit */
594 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); 677 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
595 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); 678 /* Enable interrupts */
679 UART_PUT_IER(port, atmel_port->tx_done_mask);
680 } else {
681 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
682 /* DMA done, stop TX, start RX for RS485 */
683 atmel_start_rx(port);
684 }
596 } 685 }
597 686
598 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 687 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
@@ -1017,6 +1106,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1017{ 1106{
1018 unsigned long flags; 1107 unsigned long flags;
1019 unsigned int mode, imr, quot, baud; 1108 unsigned int mode, imr, quot, baud;
1109 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1020 1110
1021 /* Get current mode register */ 1111 /* Get current mode register */
1022 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL 1112 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
@@ -1115,6 +1205,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1115 /* disable receiver and transmitter */ 1205 /* disable receiver and transmitter */
1116 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); 1206 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1117 1207
1208 /* Resetting serial mode to RS232 (0x0) */
1209 mode &= ~ATMEL_US_USMODE;
1210
1211 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1212 dev_dbg(port->dev, "Setting UART to RS485\n");
1213 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send);
1214 mode |= ATMEL_US_USMODE_RS485;
1215 } else {
1216 dev_dbg(port->dev, "Setting UART to RS232\n");
1217 }
1218
1118 /* set the parity, stop bits and data size */ 1219 /* set the parity, stop bits and data size */
1119 UART_PUT_MR(port, mode); 1220 UART_PUT_MR(port, mode);
1120 1221
@@ -1231,6 +1332,35 @@ static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1231} 1332}
1232#endif 1333#endif
1233 1334
1335static int
1336atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1337{
1338 struct serial_rs485 rs485conf;
1339
1340 switch (cmd) {
1341 case TIOCSRS485:
1342 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1343 sizeof(rs485conf)))
1344 return -EFAULT;
1345
1346 atmel_config_rs485(port, &rs485conf);
1347 break;
1348
1349 case TIOCGRS485:
1350 if (copy_to_user((struct serial_rs485 *) arg,
1351 &(to_atmel_uart_port(port)->rs485),
1352 sizeof(rs485conf)))
1353 return -EFAULT;
1354 break;
1355
1356 default:
1357 return -ENOIOCTLCMD;
1358 }
1359 return 0;
1360}
1361
1362
1363
1234static struct uart_ops atmel_pops = { 1364static struct uart_ops atmel_pops = {
1235 .tx_empty = atmel_tx_empty, 1365 .tx_empty = atmel_tx_empty,
1236 .set_mctrl = atmel_set_mctrl, 1366 .set_mctrl = atmel_set_mctrl,
@@ -1250,6 +1380,7 @@ static struct uart_ops atmel_pops = {
1250 .config_port = atmel_config_port, 1380 .config_port = atmel_config_port,
1251 .verify_port = atmel_verify_port, 1381 .verify_port = atmel_verify_port,
1252 .pm = atmel_serial_pm, 1382 .pm = atmel_serial_pm,
1383 .ioctl = atmel_ioctl,
1253#ifdef CONFIG_CONSOLE_POLL 1384#ifdef CONFIG_CONSOLE_POLL
1254 .poll_get_char = atmel_poll_get_char, 1385 .poll_get_char = atmel_poll_get_char,
1255 .poll_put_char = atmel_poll_put_char, 1386 .poll_put_char = atmel_poll_put_char,
@@ -1265,13 +1396,12 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1265 struct uart_port *port = &atmel_port->uart; 1396 struct uart_port *port = &atmel_port->uart;
1266 struct atmel_uart_data *data = pdev->dev.platform_data; 1397 struct atmel_uart_data *data = pdev->dev.platform_data;
1267 1398
1268 port->iotype = UPIO_MEM; 1399 port->iotype = UPIO_MEM;
1269 port->flags = UPF_BOOT_AUTOCONF; 1400 port->flags = UPF_BOOT_AUTOCONF;
1270 port->ops = &atmel_pops; 1401 port->ops = &atmel_pops;
1271 port->fifosize = 1; 1402 port->fifosize = 1;
1272 port->line = pdev->id; 1403 port->line = pdev->id;
1273 port->dev = &pdev->dev; 1404 port->dev = &pdev->dev;
1274
1275 port->mapbase = pdev->resource[0].start; 1405 port->mapbase = pdev->resource[0].start;
1276 port->irq = pdev->resource[1].start; 1406 port->irq = pdev->resource[1].start;
1277 1407
@@ -1299,8 +1429,16 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1299 1429
1300 atmel_port->use_dma_rx = data->use_dma_rx; 1430 atmel_port->use_dma_rx = data->use_dma_rx;
1301 atmel_port->use_dma_tx = data->use_dma_tx; 1431 atmel_port->use_dma_tx = data->use_dma_tx;
1302 if (atmel_use_dma_tx(port)) 1432 atmel_port->rs485 = data->rs485;
1433 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
1434 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
1435 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
1436 else if (atmel_use_dma_tx(port)) {
1303 port->fifosize = PDC_BUFFER_SIZE; 1437 port->fifosize = PDC_BUFFER_SIZE;
1438 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
1439 } else {
1440 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
1441 }
1304} 1442}
1305 1443
1306/* 1444/*
@@ -1334,6 +1472,7 @@ static void atmel_console_putchar(struct uart_port *port, int ch)
1334static void atmel_console_write(struct console *co, const char *s, u_int count) 1472static void atmel_console_write(struct console *co, const char *s, u_int count)
1335{ 1473{
1336 struct uart_port *port = &atmel_ports[co->index].uart; 1474 struct uart_port *port = &atmel_ports[co->index].uart;
1475 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1337 unsigned int status, imr; 1476 unsigned int status, imr;
1338 unsigned int pdc_tx; 1477 unsigned int pdc_tx;
1339 1478
@@ -1341,7 +1480,7 @@ static void atmel_console_write(struct console *co, const char *s, u_int count)
1341 * First, save IMR and then disable interrupts 1480 * First, save IMR and then disable interrupts
1342 */ 1481 */
1343 imr = UART_GET_IMR(port); 1482 imr = UART_GET_IMR(port);
1344 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY); 1483 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
1345 1484
1346 /* Store PDC transmit status and disable it */ 1485 /* Store PDC transmit status and disable it */
1347 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN; 1486 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 8eb094c1f61b..8d993c4cceac 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -83,16 +83,16 @@ struct sci_port {
83 83
84 /* Interface clock */ 84 /* Interface clock */
85 struct clk *iclk; 85 struct clk *iclk;
86 /* Data clock */ 86 /* Function clock */
87 struct clk *dclk; 87 struct clk *fclk;
88 88
89 struct list_head node; 89 struct list_head node;
90 struct dma_chan *chan_tx; 90 struct dma_chan *chan_tx;
91 struct dma_chan *chan_rx; 91 struct dma_chan *chan_rx;
92#ifdef CONFIG_SERIAL_SH_SCI_DMA 92#ifdef CONFIG_SERIAL_SH_SCI_DMA
93 struct device *dma_dev; 93 struct device *dma_dev;
94 enum sh_dmae_slave_chan_id slave_tx; 94 unsigned int slave_tx;
95 enum sh_dmae_slave_chan_id slave_rx; 95 unsigned int slave_rx;
96 struct dma_async_tx_descriptor *desc_tx; 96 struct dma_async_tx_descriptor *desc_tx;
97 struct dma_async_tx_descriptor *desc_rx[2]; 97 struct dma_async_tx_descriptor *desc_rx[2];
98 dma_cookie_t cookie_tx; 98 dma_cookie_t cookie_tx;
@@ -107,6 +107,7 @@ struct sci_port {
107 struct work_struct work_tx; 107 struct work_struct work_tx;
108 struct work_struct work_rx; 108 struct work_struct work_rx;
109 struct timer_list rx_timer; 109 struct timer_list rx_timer;
110 unsigned int rx_timeout;
110#endif 111#endif
111}; 112};
112 113
@@ -674,22 +675,22 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
674 struct sci_port *s = to_sci_port(port); 675 struct sci_port *s = to_sci_port(port);
675 676
676 if (s->chan_rx) { 677 if (s->chan_rx) {
677 unsigned long tout;
678 u16 scr = sci_in(port, SCSCR); 678 u16 scr = sci_in(port, SCSCR);
679 u16 ssr = sci_in(port, SCxSR); 679 u16 ssr = sci_in(port, SCxSR);
680 680
681 /* Disable future Rx interrupts */ 681 /* Disable future Rx interrupts */
682 sci_out(port, SCSCR, scr & ~SCI_CTRL_FLAGS_RIE); 682 if (port->type == PORT_SCIFA) {
683 disable_irq_nosync(irq);
684 scr |= 0x4000;
685 } else {
686 scr &= ~SCI_CTRL_FLAGS_RIE;
687 }
688 sci_out(port, SCSCR, scr);
683 /* Clear current interrupt */ 689 /* Clear current interrupt */
684 sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port))); 690 sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
685 /* Calculate delay for 1.5 DMA buffers */ 691 dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n",
686 tout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 / 692 jiffies, s->rx_timeout);
687 port->fifosize / 2; 693 mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
688 dev_dbg(port->dev, "Rx IRQ: setup timeout in %lu ms\n",
689 tout * 1000 / HZ);
690 if (tout < 2)
691 tout = 2;
692 mod_timer(&s->rx_timer, jiffies + tout);
693 694
694 return IRQ_HANDLED; 695 return IRQ_HANDLED;
695 } 696 }
@@ -799,7 +800,7 @@ static int sci_notifier(struct notifier_block *self,
799 (phase == CPUFREQ_RESUMECHANGE)) { 800 (phase == CPUFREQ_RESUMECHANGE)) {
800 spin_lock_irqsave(&priv->lock, flags); 801 spin_lock_irqsave(&priv->lock, flags);
801 list_for_each_entry(sci_port, &priv->ports, node) 802 list_for_each_entry(sci_port, &priv->ports, node)
802 sci_port->port.uartclk = clk_get_rate(sci_port->dclk); 803 sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
803 spin_unlock_irqrestore(&priv->lock, flags); 804 spin_unlock_irqrestore(&priv->lock, flags);
804 } 805 }
805 806
@@ -810,21 +811,17 @@ static void sci_clk_enable(struct uart_port *port)
810{ 811{
811 struct sci_port *sci_port = to_sci_port(port); 812 struct sci_port *sci_port = to_sci_port(port);
812 813
813 clk_enable(sci_port->dclk); 814 clk_enable(sci_port->iclk);
814 sci_port->port.uartclk = clk_get_rate(sci_port->dclk); 815 sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
815 816 clk_enable(sci_port->fclk);
816 if (sci_port->iclk)
817 clk_enable(sci_port->iclk);
818} 817}
819 818
820static void sci_clk_disable(struct uart_port *port) 819static void sci_clk_disable(struct uart_port *port)
821{ 820{
822 struct sci_port *sci_port = to_sci_port(port); 821 struct sci_port *sci_port = to_sci_port(port);
823 822
824 if (sci_port->iclk) 823 clk_disable(sci_port->fclk);
825 clk_disable(sci_port->iclk); 824 clk_disable(sci_port->iclk);
826
827 clk_disable(sci_port->dclk);
828} 825}
829 826
830static int sci_request_irq(struct sci_port *port) 827static int sci_request_irq(struct sci_port *port)
@@ -913,22 +910,26 @@ static void sci_dma_tx_complete(void *arg)
913 910
914 spin_lock_irqsave(&port->lock, flags); 911 spin_lock_irqsave(&port->lock, flags);
915 912
916 xmit->tail += s->sg_tx.length; 913 xmit->tail += sg_dma_len(&s->sg_tx);
917 xmit->tail &= UART_XMIT_SIZE - 1; 914 xmit->tail &= UART_XMIT_SIZE - 1;
918 915
919 port->icount.tx += s->sg_tx.length; 916 port->icount.tx += sg_dma_len(&s->sg_tx);
920 917
921 async_tx_ack(s->desc_tx); 918 async_tx_ack(s->desc_tx);
922 s->cookie_tx = -EINVAL; 919 s->cookie_tx = -EINVAL;
923 s->desc_tx = NULL; 920 s->desc_tx = NULL;
924 921
925 spin_unlock_irqrestore(&port->lock, flags);
926
927 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 922 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
928 uart_write_wakeup(port); 923 uart_write_wakeup(port);
929 924
930 if (uart_circ_chars_pending(xmit)) 925 if (!uart_circ_empty(xmit)) {
931 schedule_work(&s->work_tx); 926 schedule_work(&s->work_tx);
927 } else if (port->type == PORT_SCIFA) {
928 u16 ctrl = sci_in(port, SCSCR);
929 sci_out(port, SCSCR, ctrl & ~SCI_CTRL_FLAGS_TIE);
930 }
931
932 spin_unlock_irqrestore(&port->lock, flags);
932} 933}
933 934
934/* Locking: called with port lock held */ 935/* Locking: called with port lock held */
@@ -972,13 +973,13 @@ static void sci_dma_rx_complete(void *arg)
972 unsigned long flags; 973 unsigned long flags;
973 int count; 974 int count;
974 975
975 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); 976 dev_dbg(port->dev, "%s(%d) active #%d\n", __func__, port->line, s->active_rx);
976 977
977 spin_lock_irqsave(&port->lock, flags); 978 spin_lock_irqsave(&port->lock, flags);
978 979
979 count = sci_dma_rx_push(s, tty, s->buf_len_rx); 980 count = sci_dma_rx_push(s, tty, s->buf_len_rx);
980 981
981 mod_timer(&s->rx_timer, jiffies + msecs_to_jiffies(5)); 982 mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
982 983
983 spin_unlock_irqrestore(&port->lock, flags); 984 spin_unlock_irqrestore(&port->lock, flags);
984 985
@@ -1050,6 +1051,8 @@ static void sci_submit_rx(struct sci_port *s)
1050 sci_rx_dma_release(s, true); 1051 sci_rx_dma_release(s, true);
1051 return; 1052 return;
1052 } 1053 }
1054 dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__,
1055 s->cookie_rx[i], i);
1053 } 1056 }
1054 1057
1055 s->active_rx = s->cookie_rx[0]; 1058 s->active_rx = s->cookie_rx[0];
@@ -1107,10 +1110,10 @@ static void work_fn_rx(struct work_struct *work)
1107 return; 1110 return;
1108 } 1111 }
1109 1112
1110 dev_dbg(port->dev, "%s: cookie %d #%d\n", __func__,
1111 s->cookie_rx[new], new);
1112
1113 s->active_rx = s->cookie_rx[!new]; 1113 s->active_rx = s->cookie_rx[!new];
1114
1115 dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n", __func__,
1116 s->cookie_rx[new], new, s->active_rx);
1114} 1117}
1115 1118
1116static void work_fn_tx(struct work_struct *work) 1119static void work_fn_tx(struct work_struct *work)
@@ -1131,14 +1134,13 @@ static void work_fn_tx(struct work_struct *work)
1131 */ 1134 */
1132 spin_lock_irq(&port->lock); 1135 spin_lock_irq(&port->lock);
1133 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1); 1136 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
1134 sg->dma_address = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) + 1137 sg_dma_address(sg) = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) +
1135 sg->offset; 1138 sg->offset;
1136 sg->length = min((int)CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE), 1139 sg_dma_len(sg) = min((int)CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE),
1137 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE)); 1140 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE));
1138 sg->dma_length = sg->length;
1139 spin_unlock_irq(&port->lock); 1141 spin_unlock_irq(&port->lock);
1140 1142
1141 BUG_ON(!sg->length); 1143 BUG_ON(!sg_dma_len(sg));
1142 1144
1143 desc = chan->device->device_prep_slave_sg(chan, 1145 desc = chan->device->device_prep_slave_sg(chan,
1144 sg, s->sg_len_tx, DMA_TO_DEVICE, 1146 sg, s->sg_len_tx, DMA_TO_DEVICE,
@@ -1173,23 +1175,28 @@ static void work_fn_tx(struct work_struct *work)
1173 1175
1174static void sci_start_tx(struct uart_port *port) 1176static void sci_start_tx(struct uart_port *port)
1175{ 1177{
1178 struct sci_port *s = to_sci_port(port);
1176 unsigned short ctrl; 1179 unsigned short ctrl;
1177 1180
1178#ifdef CONFIG_SERIAL_SH_SCI_DMA 1181#ifdef CONFIG_SERIAL_SH_SCI_DMA
1179 struct sci_port *s = to_sci_port(port); 1182 if (port->type == PORT_SCIFA) {
1180 1183 u16 new, scr = sci_in(port, SCSCR);
1181 if (s->chan_tx) { 1184 if (s->chan_tx)
1182 if (!uart_circ_empty(&s->port.state->xmit) && s->cookie_tx < 0) 1185 new = scr | 0x8000;
1183 schedule_work(&s->work_tx); 1186 else
1184 1187 new = scr & ~0x8000;
1185 return; 1188 if (new != scr)
1189 sci_out(port, SCSCR, new);
1186 } 1190 }
1191 if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
1192 s->cookie_tx < 0)
1193 schedule_work(&s->work_tx);
1187#endif 1194#endif
1188 1195 if (!s->chan_tx || port->type == PORT_SCIFA) {
1189 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ 1196 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
1190 ctrl = sci_in(port, SCSCR); 1197 ctrl = sci_in(port, SCSCR);
1191 ctrl |= SCI_CTRL_FLAGS_TIE; 1198 sci_out(port, SCSCR, ctrl | SCI_CTRL_FLAGS_TIE);
1192 sci_out(port, SCSCR, ctrl); 1199 }
1193} 1200}
1194 1201
1195static void sci_stop_tx(struct uart_port *port) 1202static void sci_stop_tx(struct uart_port *port)
@@ -1198,6 +1205,8 @@ static void sci_stop_tx(struct uart_port *port)
1198 1205
1199 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ 1206 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
1200 ctrl = sci_in(port, SCSCR); 1207 ctrl = sci_in(port, SCSCR);
1208 if (port->type == PORT_SCIFA)
1209 ctrl &= ~0x8000;
1201 ctrl &= ~SCI_CTRL_FLAGS_TIE; 1210 ctrl &= ~SCI_CTRL_FLAGS_TIE;
1202 sci_out(port, SCSCR, ctrl); 1211 sci_out(port, SCSCR, ctrl);
1203} 1212}
@@ -1208,6 +1217,8 @@ static void sci_start_rx(struct uart_port *port)
1208 1217
1209 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ 1218 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
1210 ctrl |= sci_in(port, SCSCR); 1219 ctrl |= sci_in(port, SCSCR);
1220 if (port->type == PORT_SCIFA)
1221 ctrl &= ~0x4000;
1211 sci_out(port, SCSCR, ctrl); 1222 sci_out(port, SCSCR, ctrl);
1212} 1223}
1213 1224
@@ -1217,6 +1228,8 @@ static void sci_stop_rx(struct uart_port *port)
1217 1228
1218 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ 1229 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
1219 ctrl = sci_in(port, SCSCR); 1230 ctrl = sci_in(port, SCSCR);
1231 if (port->type == PORT_SCIFA)
1232 ctrl &= ~0x4000;
1220 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); 1233 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
1221 sci_out(port, SCSCR, ctrl); 1234 sci_out(port, SCSCR, ctrl);
1222} 1235}
@@ -1251,8 +1264,12 @@ static void rx_timer_fn(unsigned long arg)
1251{ 1264{
1252 struct sci_port *s = (struct sci_port *)arg; 1265 struct sci_port *s = (struct sci_port *)arg;
1253 struct uart_port *port = &s->port; 1266 struct uart_port *port = &s->port;
1254
1255 u16 scr = sci_in(port, SCSCR); 1267 u16 scr = sci_in(port, SCSCR);
1268
1269 if (port->type == PORT_SCIFA) {
1270 scr &= ~0x4000;
1271 enable_irq(s->irqs[1]);
1272 }
1256 sci_out(port, SCSCR, scr | SCI_CTRL_FLAGS_RIE); 1273 sci_out(port, SCSCR, scr | SCI_CTRL_FLAGS_RIE);
1257 dev_dbg(port->dev, "DMA Rx timed out\n"); 1274 dev_dbg(port->dev, "DMA Rx timed out\n");
1258 schedule_work(&s->work_rx); 1275 schedule_work(&s->work_rx);
@@ -1339,8 +1356,7 @@ static void sci_request_dma(struct uart_port *port)
1339 sg_init_table(sg, 1); 1356 sg_init_table(sg, 1);
1340 sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx, 1357 sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
1341 (int)buf[i] & ~PAGE_MASK); 1358 (int)buf[i] & ~PAGE_MASK);
1342 sg->dma_address = dma[i]; 1359 sg_dma_address(sg) = dma[i];
1343 sg->dma_length = sg->length;
1344 } 1360 }
1345 1361
1346 INIT_WORK(&s->work_rx, work_fn_rx); 1362 INIT_WORK(&s->work_rx, work_fn_rx);
@@ -1403,8 +1419,12 @@ static void sci_shutdown(struct uart_port *port)
1403static void sci_set_termios(struct uart_port *port, struct ktermios *termios, 1419static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1404 struct ktermios *old) 1420 struct ktermios *old)
1405{ 1421{
1422#ifdef CONFIG_SERIAL_SH_SCI_DMA
1423 struct sci_port *s = to_sci_port(port);
1424#endif
1406 unsigned int status, baud, smr_val, max_baud; 1425 unsigned int status, baud, smr_val, max_baud;
1407 int t = -1; 1426 int t = -1;
1427 u16 scfcr = 0;
1408 1428
1409 /* 1429 /*
1410 * earlyprintk comes here early on with port->uartclk set to zero. 1430 * earlyprintk comes here early on with port->uartclk set to zero.
@@ -1427,7 +1447,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1427 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ 1447 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1428 1448
1429 if (port->type != PORT_SCI) 1449 if (port->type != PORT_SCI)
1430 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); 1450 sci_out(port, SCFCR, scfcr | SCFCR_RFRST | SCFCR_TFRST);
1431 1451
1432 smr_val = sci_in(port, SCSMR) & 3; 1452 smr_val = sci_in(port, SCSMR) & 3;
1433 if ((termios->c_cflag & CSIZE) == CS7) 1453 if ((termios->c_cflag & CSIZE) == CS7)
@@ -1458,10 +1478,32 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1458 } 1478 }
1459 1479
1460 sci_init_pins(port, termios->c_cflag); 1480 sci_init_pins(port, termios->c_cflag);
1461 sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0); 1481 sci_out(port, SCFCR, scfcr | ((termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0));
1462 1482
1463 sci_out(port, SCSCR, SCSCR_INIT(port)); 1483 sci_out(port, SCSCR, SCSCR_INIT(port));
1464 1484
1485#ifdef CONFIG_SERIAL_SH_SCI_DMA
1486 /*
1487 * Calculate delay for 1.5 DMA buffers: see
1488 * drivers/serial/serial_core.c::uart_update_timeout(). With 10 bits
1489 * (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above function
1490 * calculates 1 jiffie for the data plus 5 jiffies for the "slop(e)."
1491 * Then below we calculate 3 jiffies (12ms) for 1.5 DMA buffers (3 FIFO
1492 * sizes), but it has been found out experimentally, that this is not
1493 * enough: the driver too often needlessly runs on a DMA timeout. 20ms
1494 * as a minimum seem to work perfectly.
1495 */
1496 if (s->chan_rx) {
1497 s->rx_timeout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 /
1498 port->fifosize / 2;
1499 dev_dbg(port->dev,
1500 "DMA Rx t-out %ums, tty t-out %u jiffies\n",
1501 s->rx_timeout * 1000 / HZ, port->timeout);
1502 if (s->rx_timeout < msecs_to_jiffies(20))
1503 s->rx_timeout = msecs_to_jiffies(20);
1504 }
1505#endif
1506
1465 if ((termios->c_cflag & CREAD) != 0) 1507 if ((termios->c_cflag & CREAD) != 0)
1466 sci_start_rx(port); 1508 sci_start_rx(port);
1467} 1509}
@@ -1553,10 +1595,10 @@ static struct uart_ops sci_uart_ops = {
1553#endif 1595#endif
1554}; 1596};
1555 1597
1556static void __devinit sci_init_single(struct platform_device *dev, 1598static int __devinit sci_init_single(struct platform_device *dev,
1557 struct sci_port *sci_port, 1599 struct sci_port *sci_port,
1558 unsigned int index, 1600 unsigned int index,
1559 struct plat_sci_port *p) 1601 struct plat_sci_port *p)
1560{ 1602{
1561 struct uart_port *port = &sci_port->port; 1603 struct uart_port *port = &sci_port->port;
1562 1604
@@ -1577,8 +1619,23 @@ static void __devinit sci_init_single(struct platform_device *dev,
1577 } 1619 }
1578 1620
1579 if (dev) { 1621 if (dev) {
1580 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL; 1622 sci_port->iclk = clk_get(&dev->dev, "sci_ick");
1581 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk"); 1623 if (IS_ERR(sci_port->iclk)) {
1624 sci_port->iclk = clk_get(&dev->dev, "peripheral_clk");
1625 if (IS_ERR(sci_port->iclk)) {
1626 dev_err(&dev->dev, "can't get iclk\n");
1627 return PTR_ERR(sci_port->iclk);
1628 }
1629 }
1630
1631 /*
1632 * The function clock is optional, ignore it if we can't
1633 * find it.
1634 */
1635 sci_port->fclk = clk_get(&dev->dev, "sci_fck");
1636 if (IS_ERR(sci_port->fclk))
1637 sci_port->fclk = NULL;
1638
1582 sci_port->enable = sci_clk_enable; 1639 sci_port->enable = sci_clk_enable;
1583 sci_port->disable = sci_clk_disable; 1640 sci_port->disable = sci_clk_disable;
1584 port->dev = &dev->dev; 1641 port->dev = &dev->dev;
@@ -1605,6 +1662,7 @@ static void __devinit sci_init_single(struct platform_device *dev,
1605#endif 1662#endif
1606 1663
1607 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); 1664 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1665 return 0;
1608} 1666}
1609 1667
1610#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE 1668#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
@@ -1754,8 +1812,11 @@ static int sci_remove(struct platform_device *dev)
1754 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); 1812 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1755 1813
1756 spin_lock_irqsave(&priv->lock, flags); 1814 spin_lock_irqsave(&priv->lock, flags);
1757 list_for_each_entry(p, &priv->ports, node) 1815 list_for_each_entry(p, &priv->ports, node) {
1758 uart_remove_one_port(&sci_uart_driver, &p->port); 1816 uart_remove_one_port(&sci_uart_driver, &p->port);
1817 clk_put(p->iclk);
1818 clk_put(p->fclk);
1819 }
1759 spin_unlock_irqrestore(&priv->lock, flags); 1820 spin_unlock_irqrestore(&priv->lock, flags);
1760 1821
1761 kfree(priv); 1822 kfree(priv);
@@ -1781,7 +1842,9 @@ static int __devinit sci_probe_single(struct platform_device *dev,
1781 return 0; 1842 return 0;
1782 } 1843 }
1783 1844
1784 sci_init_single(dev, sciport, index, p); 1845 ret = sci_init_single(dev, sciport, index, p);
1846 if (ret)
1847 return ret;
1785 1848
1786 ret = uart_add_one_port(&sci_uart_driver, &sciport->port); 1849 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1787 if (ret) 1850 if (ret)
diff --git a/drivers/sh/Kconfig b/drivers/sh/Kconfig
new file mode 100644
index 000000000000..a54de0b9b3df
--- /dev/null
+++ b/drivers/sh/Kconfig
@@ -0,0 +1,24 @@
1config INTC_USERIMASK
2 bool "Userspace interrupt masking support"
3 depends on ARCH_SHMOBILE || (SUPERH && CPU_SH4A)
4 help
5 This enables support for hardware-assisted userspace hardirq
6 masking.
7
8 SH-4A and newer interrupt blocks all support a special shadowed
9 page with all non-masking registers obscured when mapped in to
10 userspace. This is primarily for use by userspace device
11 drivers that are using special priority levels.
12
13 If in doubt, say N.
14
15config INTC_BALANCING
16 bool "Hardware IRQ balancing support"
17 depends on SMP && SUPERH && CPU_SUBTYPE_SH7786
18 help
19 This enables support for IRQ auto-distribution mode on SH-X3
20 SMP parts. All of the balancing and CPU wakeup decisions are
21 taken care of automatically by hardware for distributed
22 vectors.
23
24 If in doubt, say N.
diff --git a/drivers/sh/Makefile b/drivers/sh/Makefile
index 4956bf1f2134..78bb5127abd0 100644
--- a/drivers/sh/Makefile
+++ b/drivers/sh/Makefile
@@ -4,4 +4,6 @@
4obj-$(CONFIG_SUPERHYWAY) += superhyway/ 4obj-$(CONFIG_SUPERHYWAY) += superhyway/
5obj-$(CONFIG_MAPLE) += maple/ 5obj-$(CONFIG_MAPLE) += maple/
6obj-$(CONFIG_GENERIC_GPIO) += pfc.o 6obj-$(CONFIG_GENERIC_GPIO) += pfc.o
7obj-$(CONFIG_SUPERH) += clk.o
8obj-$(CONFIG_SH_CLK_CPG) += clk-cpg.o
7obj-y += intc.o 9obj-y += intc.o
diff --git a/drivers/sh/clk-cpg.c b/drivers/sh/clk-cpg.c
new file mode 100644
index 000000000000..f5c80ba9ab1c
--- /dev/null
+++ b/drivers/sh/clk-cpg.c
@@ -0,0 +1,298 @@
1#include <linux/clk.h>
2#include <linux/compiler.h>
3#include <linux/slab.h>
4#include <linux/io.h>
5#include <linux/sh_clk.h>
6
7static int sh_clk_mstp32_enable(struct clk *clk)
8{
9 __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit),
10 clk->enable_reg);
11 return 0;
12}
13
14static void sh_clk_mstp32_disable(struct clk *clk)
15{
16 __raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit),
17 clk->enable_reg);
18}
19
20static struct clk_ops sh_clk_mstp32_clk_ops = {
21 .enable = sh_clk_mstp32_enable,
22 .disable = sh_clk_mstp32_disable,
23 .recalc = followparent_recalc,
24};
25
26int __init sh_clk_mstp32_register(struct clk *clks, int nr)
27{
28 struct clk *clkp;
29 int ret = 0;
30 int k;
31
32 for (k = 0; !ret && (k < nr); k++) {
33 clkp = clks + k;
34 clkp->ops = &sh_clk_mstp32_clk_ops;
35 ret |= clk_register(clkp);
36 }
37
38 return ret;
39}
40
41static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate)
42{
43 return clk_rate_table_round(clk, clk->freq_table, rate);
44}
45
46static int sh_clk_div6_divisors[64] = {
47 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
48 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
49 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
50 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64
51};
52
53static struct clk_div_mult_table sh_clk_div6_table = {
54 .divisors = sh_clk_div6_divisors,
55 .nr_divisors = ARRAY_SIZE(sh_clk_div6_divisors),
56};
57
58static unsigned long sh_clk_div6_recalc(struct clk *clk)
59{
60 struct clk_div_mult_table *table = &sh_clk_div6_table;
61 unsigned int idx;
62
63 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
64 table, NULL);
65
66 idx = __raw_readl(clk->enable_reg) & 0x003f;
67
68 return clk->freq_table[idx].frequency;
69}
70
71static int sh_clk_div6_set_rate(struct clk *clk,
72 unsigned long rate, int algo_id)
73{
74 unsigned long value;
75 int idx;
76
77 idx = clk_rate_table_find(clk, clk->freq_table, rate);
78 if (idx < 0)
79 return idx;
80
81 value = __raw_readl(clk->enable_reg);
82 value &= ~0x3f;
83 value |= idx;
84 __raw_writel(value, clk->enable_reg);
85 return 0;
86}
87
88static int sh_clk_div6_enable(struct clk *clk)
89{
90 unsigned long value;
91 int ret;
92
93 ret = sh_clk_div6_set_rate(clk, clk->rate, 0);
94 if (ret == 0) {
95 value = __raw_readl(clk->enable_reg);
96 value &= ~0x100; /* clear stop bit to enable clock */
97 __raw_writel(value, clk->enable_reg);
98 }
99 return ret;
100}
101
102static void sh_clk_div6_disable(struct clk *clk)
103{
104 unsigned long value;
105
106 value = __raw_readl(clk->enable_reg);
107 value |= 0x100; /* stop clock */
108 value |= 0x3f; /* VDIV bits must be non-zero, overwrite divider */
109 __raw_writel(value, clk->enable_reg);
110}
111
112static struct clk_ops sh_clk_div6_clk_ops = {
113 .recalc = sh_clk_div6_recalc,
114 .round_rate = sh_clk_div_round_rate,
115 .set_rate = sh_clk_div6_set_rate,
116 .enable = sh_clk_div6_enable,
117 .disable = sh_clk_div6_disable,
118};
119
120int __init sh_clk_div6_register(struct clk *clks, int nr)
121{
122 struct clk *clkp;
123 void *freq_table;
124 int nr_divs = sh_clk_div6_table.nr_divisors;
125 int freq_table_size = sizeof(struct cpufreq_frequency_table);
126 int ret = 0;
127 int k;
128
129 freq_table_size *= (nr_divs + 1);
130 freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL);
131 if (!freq_table) {
132 pr_err("sh_clk_div6_register: unable to alloc memory\n");
133 return -ENOMEM;
134 }
135
136 for (k = 0; !ret && (k < nr); k++) {
137 clkp = clks + k;
138
139 clkp->ops = &sh_clk_div6_clk_ops;
140 clkp->id = -1;
141 clkp->freq_table = freq_table + (k * freq_table_size);
142 clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END;
143
144 ret = clk_register(clkp);
145 }
146
147 return ret;
148}
149
150static unsigned long sh_clk_div4_recalc(struct clk *clk)
151{
152 struct clk_div4_table *d4t = clk->priv;
153 struct clk_div_mult_table *table = d4t->div_mult_table;
154 unsigned int idx;
155
156 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
157 table, &clk->arch_flags);
158
159 idx = (__raw_readl(clk->enable_reg) >> clk->enable_bit) & 0x000f;
160
161 return clk->freq_table[idx].frequency;
162}
163
164static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
165{
166 struct clk_div4_table *d4t = clk->priv;
167 struct clk_div_mult_table *table = d4t->div_mult_table;
168 u32 value;
169 int ret;
170
171 /* we really need a better way to determine parent index, but for
172 * now assume internal parent comes with CLK_ENABLE_ON_INIT set,
173 * no CLK_ENABLE_ON_INIT means external clock...
174 */
175
176 if (parent->flags & CLK_ENABLE_ON_INIT)
177 value = __raw_readl(clk->enable_reg) & ~(1 << 7);
178 else
179 value = __raw_readl(clk->enable_reg) | (1 << 7);
180
181 ret = clk_reparent(clk, parent);
182 if (ret < 0)
183 return ret;
184
185 __raw_writel(value, clk->enable_reg);
186
187 /* Rebiuld the frequency table */
188 clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
189 table, &clk->arch_flags);
190
191 return 0;
192}
193
194static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id)
195{
196 struct clk_div4_table *d4t = clk->priv;
197 unsigned long value;
198 int idx = clk_rate_table_find(clk, clk->freq_table, rate);
199 if (idx < 0)
200 return idx;
201
202 value = __raw_readl(clk->enable_reg);
203 value &= ~(0xf << clk->enable_bit);
204 value |= (idx << clk->enable_bit);
205 __raw_writel(value, clk->enable_reg);
206
207 if (d4t->kick)
208 d4t->kick(clk);
209
210 return 0;
211}
212
213static int sh_clk_div4_enable(struct clk *clk)
214{
215 __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << 8), clk->enable_reg);
216 return 0;
217}
218
219static void sh_clk_div4_disable(struct clk *clk)
220{
221 __raw_writel(__raw_readl(clk->enable_reg) | (1 << 8), clk->enable_reg);
222}
223
224static struct clk_ops sh_clk_div4_clk_ops = {
225 .recalc = sh_clk_div4_recalc,
226 .set_rate = sh_clk_div4_set_rate,
227 .round_rate = sh_clk_div_round_rate,
228};
229
230static struct clk_ops sh_clk_div4_enable_clk_ops = {
231 .recalc = sh_clk_div4_recalc,
232 .set_rate = sh_clk_div4_set_rate,
233 .round_rate = sh_clk_div_round_rate,
234 .enable = sh_clk_div4_enable,
235 .disable = sh_clk_div4_disable,
236};
237
238static struct clk_ops sh_clk_div4_reparent_clk_ops = {
239 .recalc = sh_clk_div4_recalc,
240 .set_rate = sh_clk_div4_set_rate,
241 .round_rate = sh_clk_div_round_rate,
242 .enable = sh_clk_div4_enable,
243 .disable = sh_clk_div4_disable,
244 .set_parent = sh_clk_div4_set_parent,
245};
246
247static int __init sh_clk_div4_register_ops(struct clk *clks, int nr,
248 struct clk_div4_table *table, struct clk_ops *ops)
249{
250 struct clk *clkp;
251 void *freq_table;
252 int nr_divs = table->div_mult_table->nr_divisors;
253 int freq_table_size = sizeof(struct cpufreq_frequency_table);
254 int ret = 0;
255 int k;
256
257 freq_table_size *= (nr_divs + 1);
258 freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL);
259 if (!freq_table) {
260 pr_err("sh_clk_div4_register: unable to alloc memory\n");
261 return -ENOMEM;
262 }
263
264 for (k = 0; !ret && (k < nr); k++) {
265 clkp = clks + k;
266
267 clkp->ops = ops;
268 clkp->id = -1;
269 clkp->priv = table;
270
271 clkp->freq_table = freq_table + (k * freq_table_size);
272 clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END;
273
274 ret = clk_register(clkp);
275 }
276
277 return ret;
278}
279
280int __init sh_clk_div4_register(struct clk *clks, int nr,
281 struct clk_div4_table *table)
282{
283 return sh_clk_div4_register_ops(clks, nr, table, &sh_clk_div4_clk_ops);
284}
285
286int __init sh_clk_div4_enable_register(struct clk *clks, int nr,
287 struct clk_div4_table *table)
288{
289 return sh_clk_div4_register_ops(clks, nr, table,
290 &sh_clk_div4_enable_clk_ops);
291}
292
293int __init sh_clk_div4_reparent_register(struct clk *clks, int nr,
294 struct clk_div4_table *table)
295{
296 return sh_clk_div4_register_ops(clks, nr, table,
297 &sh_clk_div4_reparent_clk_ops);
298}
diff --git a/drivers/sh/clk.c b/drivers/sh/clk.c
new file mode 100644
index 000000000000..5d84adac9ec4
--- /dev/null
+++ b/drivers/sh/clk.c
@@ -0,0 +1,545 @@
1/*
2 * drivers/sh/clk.c - SuperH clock framework
3 *
4 * Copyright (C) 2005 - 2009 Paul Mundt
5 *
6 * This clock framework is derived from the OMAP version by:
7 *
8 * Copyright (C) 2004 - 2008 Nokia Corporation
9 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
10 *
11 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/module.h>
20#include <linux/mutex.h>
21#include <linux/list.h>
22#include <linux/kobject.h>
23#include <linux/sysdev.h>
24#include <linux/seq_file.h>
25#include <linux/err.h>
26#include <linux/platform_device.h>
27#include <linux/debugfs.h>
28#include <linux/cpufreq.h>
29#include <linux/clk.h>
30#include <linux/sh_clk.h>
31
32static LIST_HEAD(clock_list);
33static DEFINE_SPINLOCK(clock_lock);
34static DEFINE_MUTEX(clock_list_sem);
35
36void clk_rate_table_build(struct clk *clk,
37 struct cpufreq_frequency_table *freq_table,
38 int nr_freqs,
39 struct clk_div_mult_table *src_table,
40 unsigned long *bitmap)
41{
42 unsigned long mult, div;
43 unsigned long freq;
44 int i;
45
46 for (i = 0; i < nr_freqs; i++) {
47 div = 1;
48 mult = 1;
49
50 if (src_table->divisors && i < src_table->nr_divisors)
51 div = src_table->divisors[i];
52
53 if (src_table->multipliers && i < src_table->nr_multipliers)
54 mult = src_table->multipliers[i];
55
56 if (!div || !mult || (bitmap && !test_bit(i, bitmap)))
57 freq = CPUFREQ_ENTRY_INVALID;
58 else
59 freq = clk->parent->rate * mult / div;
60
61 freq_table[i].index = i;
62 freq_table[i].frequency = freq;
63 }
64
65 /* Termination entry */
66 freq_table[i].index = i;
67 freq_table[i].frequency = CPUFREQ_TABLE_END;
68}
69
70long clk_rate_table_round(struct clk *clk,
71 struct cpufreq_frequency_table *freq_table,
72 unsigned long rate)
73{
74 unsigned long rate_error, rate_error_prev = ~0UL;
75 unsigned long rate_best_fit = rate;
76 unsigned long highest, lowest;
77 int i;
78
79 highest = lowest = 0;
80
81 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
82 unsigned long freq = freq_table[i].frequency;
83
84 if (freq == CPUFREQ_ENTRY_INVALID)
85 continue;
86
87 if (freq > highest)
88 highest = freq;
89 if (freq < lowest)
90 lowest = freq;
91
92 rate_error = abs(freq - rate);
93 if (rate_error < rate_error_prev) {
94 rate_best_fit = freq;
95 rate_error_prev = rate_error;
96 }
97
98 if (rate_error == 0)
99 break;
100 }
101
102 if (rate >= highest)
103 rate_best_fit = highest;
104 if (rate <= lowest)
105 rate_best_fit = lowest;
106
107 return rate_best_fit;
108}
109
110int clk_rate_table_find(struct clk *clk,
111 struct cpufreq_frequency_table *freq_table,
112 unsigned long rate)
113{
114 int i;
115
116 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
117 unsigned long freq = freq_table[i].frequency;
118
119 if (freq == CPUFREQ_ENTRY_INVALID)
120 continue;
121
122 if (freq == rate)
123 return i;
124 }
125
126 return -ENOENT;
127}
128
129/* Used for clocks that always have same value as the parent clock */
130unsigned long followparent_recalc(struct clk *clk)
131{
132 return clk->parent ? clk->parent->rate : 0;
133}
134
135int clk_reparent(struct clk *child, struct clk *parent)
136{
137 list_del_init(&child->sibling);
138 if (parent)
139 list_add(&child->sibling, &parent->children);
140 child->parent = parent;
141
142 /* now do the debugfs renaming to reattach the child
143 to the proper parent */
144
145 return 0;
146}
147
148/* Propagate rate to children */
149void propagate_rate(struct clk *tclk)
150{
151 struct clk *clkp;
152
153 list_for_each_entry(clkp, &tclk->children, sibling) {
154 if (clkp->ops && clkp->ops->recalc)
155 clkp->rate = clkp->ops->recalc(clkp);
156
157 propagate_rate(clkp);
158 }
159}
160
161static void __clk_disable(struct clk *clk)
162{
163 if (WARN(!clk->usecount, "Trying to disable clock %s with 0 usecount\n",
164 clk->name))
165 return;
166
167 if (!(--clk->usecount)) {
168 if (likely(clk->ops && clk->ops->disable))
169 clk->ops->disable(clk);
170 if (likely(clk->parent))
171 __clk_disable(clk->parent);
172 }
173}
174
175void clk_disable(struct clk *clk)
176{
177 unsigned long flags;
178
179 if (!clk)
180 return;
181
182 spin_lock_irqsave(&clock_lock, flags);
183 __clk_disable(clk);
184 spin_unlock_irqrestore(&clock_lock, flags);
185}
186EXPORT_SYMBOL_GPL(clk_disable);
187
188static int __clk_enable(struct clk *clk)
189{
190 int ret = 0;
191
192 if (clk->usecount++ == 0) {
193 if (clk->parent) {
194 ret = __clk_enable(clk->parent);
195 if (unlikely(ret))
196 goto err;
197 }
198
199 if (clk->ops && clk->ops->enable) {
200 ret = clk->ops->enable(clk);
201 if (ret) {
202 if (clk->parent)
203 __clk_disable(clk->parent);
204 goto err;
205 }
206 }
207 }
208
209 return ret;
210err:
211 clk->usecount--;
212 return ret;
213}
214
215int clk_enable(struct clk *clk)
216{
217 unsigned long flags;
218 int ret;
219
220 if (!clk)
221 return -EINVAL;
222
223 spin_lock_irqsave(&clock_lock, flags);
224 ret = __clk_enable(clk);
225 spin_unlock_irqrestore(&clock_lock, flags);
226
227 return ret;
228}
229EXPORT_SYMBOL_GPL(clk_enable);
230
231static LIST_HEAD(root_clks);
232
233/**
234 * recalculate_root_clocks - recalculate and propagate all root clocks
235 *
236 * Recalculates all root clocks (clocks with no parent), which if the
237 * clock's .recalc is set correctly, should also propagate their rates.
238 * Called at init.
239 */
240void recalculate_root_clocks(void)
241{
242 struct clk *clkp;
243
244 list_for_each_entry(clkp, &root_clks, sibling) {
245 if (clkp->ops && clkp->ops->recalc)
246 clkp->rate = clkp->ops->recalc(clkp);
247 propagate_rate(clkp);
248 }
249}
250
251int clk_register(struct clk *clk)
252{
253 if (clk == NULL || IS_ERR(clk))
254 return -EINVAL;
255
256 /*
257 * trap out already registered clocks
258 */
259 if (clk->node.next || clk->node.prev)
260 return 0;
261
262 mutex_lock(&clock_list_sem);
263
264 INIT_LIST_HEAD(&clk->children);
265 clk->usecount = 0;
266
267 if (clk->parent)
268 list_add(&clk->sibling, &clk->parent->children);
269 else
270 list_add(&clk->sibling, &root_clks);
271
272 list_add(&clk->node, &clock_list);
273 if (clk->ops && clk->ops->init)
274 clk->ops->init(clk);
275 mutex_unlock(&clock_list_sem);
276
277 return 0;
278}
279EXPORT_SYMBOL_GPL(clk_register);
280
281void clk_unregister(struct clk *clk)
282{
283 mutex_lock(&clock_list_sem);
284 list_del(&clk->sibling);
285 list_del(&clk->node);
286 mutex_unlock(&clock_list_sem);
287}
288EXPORT_SYMBOL_GPL(clk_unregister);
289
290void clk_enable_init_clocks(void)
291{
292 struct clk *clkp;
293
294 list_for_each_entry(clkp, &clock_list, node)
295 if (clkp->flags & CLK_ENABLE_ON_INIT)
296 clk_enable(clkp);
297}
298
299unsigned long clk_get_rate(struct clk *clk)
300{
301 return clk->rate;
302}
303EXPORT_SYMBOL_GPL(clk_get_rate);
304
305int clk_set_rate(struct clk *clk, unsigned long rate)
306{
307 return clk_set_rate_ex(clk, rate, 0);
308}
309EXPORT_SYMBOL_GPL(clk_set_rate);
310
311int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
312{
313 int ret = -EOPNOTSUPP;
314 unsigned long flags;
315
316 spin_lock_irqsave(&clock_lock, flags);
317
318 if (likely(clk->ops && clk->ops->set_rate)) {
319 ret = clk->ops->set_rate(clk, rate, algo_id);
320 if (ret != 0)
321 goto out_unlock;
322 } else {
323 clk->rate = rate;
324 ret = 0;
325 }
326
327 if (clk->ops && clk->ops->recalc)
328 clk->rate = clk->ops->recalc(clk);
329
330 propagate_rate(clk);
331
332out_unlock:
333 spin_unlock_irqrestore(&clock_lock, flags);
334
335 return ret;
336}
337EXPORT_SYMBOL_GPL(clk_set_rate_ex);
338
339int clk_set_parent(struct clk *clk, struct clk *parent)
340{
341 unsigned long flags;
342 int ret = -EINVAL;
343
344 if (!parent || !clk)
345 return ret;
346 if (clk->parent == parent)
347 return 0;
348
349 spin_lock_irqsave(&clock_lock, flags);
350 if (clk->usecount == 0) {
351 if (clk->ops->set_parent)
352 ret = clk->ops->set_parent(clk, parent);
353 else
354 ret = clk_reparent(clk, parent);
355
356 if (ret == 0) {
357 pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
358 clk->name, clk->parent->name, clk->rate);
359 if (clk->ops->recalc)
360 clk->rate = clk->ops->recalc(clk);
361 propagate_rate(clk);
362 }
363 } else
364 ret = -EBUSY;
365 spin_unlock_irqrestore(&clock_lock, flags);
366
367 return ret;
368}
369EXPORT_SYMBOL_GPL(clk_set_parent);
370
371struct clk *clk_get_parent(struct clk *clk)
372{
373 return clk->parent;
374}
375EXPORT_SYMBOL_GPL(clk_get_parent);
376
377long clk_round_rate(struct clk *clk, unsigned long rate)
378{
379 if (likely(clk->ops && clk->ops->round_rate)) {
380 unsigned long flags, rounded;
381
382 spin_lock_irqsave(&clock_lock, flags);
383 rounded = clk->ops->round_rate(clk, rate);
384 spin_unlock_irqrestore(&clock_lock, flags);
385
386 return rounded;
387 }
388
389 return clk_get_rate(clk);
390}
391EXPORT_SYMBOL_GPL(clk_round_rate);
392
393#ifdef CONFIG_PM
394static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
395{
396 static pm_message_t prev_state;
397 struct clk *clkp;
398
399 switch (state.event) {
400 case PM_EVENT_ON:
401 /* Resumeing from hibernation */
402 if (prev_state.event != PM_EVENT_FREEZE)
403 break;
404
405 list_for_each_entry(clkp, &clock_list, node) {
406 if (likely(clkp->ops)) {
407 unsigned long rate = clkp->rate;
408
409 if (likely(clkp->ops->set_parent))
410 clkp->ops->set_parent(clkp,
411 clkp->parent);
412 if (likely(clkp->ops->set_rate))
413 clkp->ops->set_rate(clkp,
414 rate, NO_CHANGE);
415 else if (likely(clkp->ops->recalc))
416 clkp->rate = clkp->ops->recalc(clkp);
417 }
418 }
419 break;
420 case PM_EVENT_FREEZE:
421 break;
422 case PM_EVENT_SUSPEND:
423 break;
424 }
425
426 prev_state = state;
427 return 0;
428}
429
430static int clks_sysdev_resume(struct sys_device *dev)
431{
432 return clks_sysdev_suspend(dev, PMSG_ON);
433}
434
435static struct sysdev_class clks_sysdev_class = {
436 .name = "clks",
437};
438
439static struct sysdev_driver clks_sysdev_driver = {
440 .suspend = clks_sysdev_suspend,
441 .resume = clks_sysdev_resume,
442};
443
444static struct sys_device clks_sysdev_dev = {
445 .cls = &clks_sysdev_class,
446};
447
448static int __init clk_sysdev_init(void)
449{
450 sysdev_class_register(&clks_sysdev_class);
451 sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver);
452 sysdev_register(&clks_sysdev_dev);
453
454 return 0;
455}
456subsys_initcall(clk_sysdev_init);
457#endif
458
459/*
460 * debugfs support to trace clock tree hierarchy and attributes
461 */
462static struct dentry *clk_debugfs_root;
463
464static int clk_debugfs_register_one(struct clk *c)
465{
466 int err;
467 struct dentry *d, *child, *child_tmp;
468 struct clk *pa = c->parent;
469 char s[255];
470 char *p = s;
471
472 p += sprintf(p, "%s", c->name);
473 if (c->id >= 0)
474 sprintf(p, ":%d", c->id);
475 d = debugfs_create_dir(s, pa ? pa->dentry : clk_debugfs_root);
476 if (!d)
477 return -ENOMEM;
478 c->dentry = d;
479
480 d = debugfs_create_u8("usecount", S_IRUGO, c->dentry, (u8 *)&c->usecount);
481 if (!d) {
482 err = -ENOMEM;
483 goto err_out;
484 }
485 d = debugfs_create_u32("rate", S_IRUGO, c->dentry, (u32 *)&c->rate);
486 if (!d) {
487 err = -ENOMEM;
488 goto err_out;
489 }
490 d = debugfs_create_x32("flags", S_IRUGO, c->dentry, (u32 *)&c->flags);
491 if (!d) {
492 err = -ENOMEM;
493 goto err_out;
494 }
495 return 0;
496
497err_out:
498 d = c->dentry;
499 list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
500 debugfs_remove(child);
501 debugfs_remove(c->dentry);
502 return err;
503}
504
505static int clk_debugfs_register(struct clk *c)
506{
507 int err;
508 struct clk *pa = c->parent;
509
510 if (pa && !pa->dentry) {
511 err = clk_debugfs_register(pa);
512 if (err)
513 return err;
514 }
515
516 if (!c->dentry && c->name) {
517 err = clk_debugfs_register_one(c);
518 if (err)
519 return err;
520 }
521 return 0;
522}
523
524static int __init clk_debugfs_init(void)
525{
526 struct clk *c;
527 struct dentry *d;
528 int err;
529
530 d = debugfs_create_dir("clock", NULL);
531 if (!d)
532 return -ENOMEM;
533 clk_debugfs_root = d;
534
535 list_for_each_entry(c, &clock_list, node) {
536 err = clk_debugfs_register(c);
537 if (err)
538 goto err_out;
539 }
540 return 0;
541err_out:
542 debugfs_remove_recursive(clk_debugfs_root);
543 return err;
544}
545late_initcall(clk_debugfs_init);
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
index 94ad6bd86a00..c585574b9aed 100644
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -28,6 +28,7 @@
28#include <linux/topology.h> 28#include <linux/topology.h>
29#include <linux/bitmap.h> 29#include <linux/bitmap.h>
30#include <linux/cpumask.h> 30#include <linux/cpumask.h>
31#include <asm/sizes.h>
31 32
32#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \ 33#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
33 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \ 34 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
@@ -45,6 +46,12 @@ struct intc_handle_int {
45 unsigned long handle; 46 unsigned long handle;
46}; 47};
47 48
49struct intc_window {
50 phys_addr_t phys;
51 void __iomem *virt;
52 unsigned long size;
53};
54
48struct intc_desc_int { 55struct intc_desc_int {
49 struct list_head list; 56 struct list_head list;
50 struct sys_device sysdev; 57 struct sys_device sysdev;
@@ -58,6 +65,8 @@ struct intc_desc_int {
58 unsigned int nr_prio; 65 unsigned int nr_prio;
59 struct intc_handle_int *sense; 66 struct intc_handle_int *sense;
60 unsigned int nr_sense; 67 unsigned int nr_sense;
68 struct intc_window *window;
69 unsigned int nr_windows;
61 struct irq_chip chip; 70 struct irq_chip chip;
62}; 71};
63 72
@@ -87,8 +96,12 @@ static DEFINE_SPINLOCK(vector_lock);
87#define SMP_NR(d, x) 1 96#define SMP_NR(d, x) 1
88#endif 97#endif
89 98
90static unsigned int intc_prio_level[NR_IRQS]; /* for now */ 99static unsigned int intc_prio_level[NR_IRQS]; /* for now */
100static unsigned int default_prio_level = 2; /* 2 - 16 */
91static unsigned long ack_handle[NR_IRQS]; 101static unsigned long ack_handle[NR_IRQS];
102#ifdef CONFIG_INTC_BALANCING
103static unsigned long dist_handle[NR_IRQS];
104#endif
92 105
93static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 106static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
94{ 107{
@@ -96,6 +109,47 @@ static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
96 return container_of(chip, struct intc_desc_int, chip); 109 return container_of(chip, struct intc_desc_int, chip);
97} 110}
98 111
112static unsigned long intc_phys_to_virt(struct intc_desc_int *d,
113 unsigned long address)
114{
115 struct intc_window *window;
116 int k;
117
118 /* scan through physical windows and convert address */
119 for (k = 0; k < d->nr_windows; k++) {
120 window = d->window + k;
121
122 if (address < window->phys)
123 continue;
124
125 if (address >= (window->phys + window->size))
126 continue;
127
128 address -= window->phys;
129 address += (unsigned long)window->virt;
130
131 return address;
132 }
133
134 /* no windows defined, register must be 1:1 mapped virt:phys */
135 return address;
136}
137
138static unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address)
139{
140 unsigned int k;
141
142 address = intc_phys_to_virt(d, address);
143
144 for (k = 0; k < d->nr_reg; k++) {
145 if (d->reg[k] == address)
146 return k;
147 }
148
149 BUG();
150 return 0;
151}
152
99static inline unsigned int set_field(unsigned int value, 153static inline unsigned int set_field(unsigned int value,
100 unsigned int field_value, 154 unsigned int field_value,
101 unsigned int handle) 155 unsigned int handle)
@@ -229,6 +283,85 @@ static void (*intc_disable_fns[])(unsigned long addr,
229 [MODE_PCLR_REG] = intc_mode_field, 283 [MODE_PCLR_REG] = intc_mode_field,
230}; 284};
231 285
286#ifdef CONFIG_INTC_BALANCING
287static inline void intc_balancing_enable(unsigned int irq)
288{
289 struct intc_desc_int *d = get_intc_desc(irq);
290 unsigned long handle = dist_handle[irq];
291 unsigned long addr;
292
293 if (irq_balancing_disabled(irq) || !handle)
294 return;
295
296 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
297 intc_reg_fns[_INTC_FN(handle)](addr, handle, 1);
298}
299
300static inline void intc_balancing_disable(unsigned int irq)
301{
302 struct intc_desc_int *d = get_intc_desc(irq);
303 unsigned long handle = dist_handle[irq];
304 unsigned long addr;
305
306 if (irq_balancing_disabled(irq) || !handle)
307 return;
308
309 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
310 intc_reg_fns[_INTC_FN(handle)](addr, handle, 0);
311}
312
313static unsigned int intc_dist_data(struct intc_desc *desc,
314 struct intc_desc_int *d,
315 intc_enum enum_id)
316{
317 struct intc_mask_reg *mr = desc->hw.mask_regs;
318 unsigned int i, j, fn, mode;
319 unsigned long reg_e, reg_d;
320
321 for (i = 0; mr && enum_id && i < desc->hw.nr_mask_regs; i++) {
322 mr = desc->hw.mask_regs + i;
323
324 /*
325 * Skip this entry if there's no auto-distribution
326 * register associated with it.
327 */
328 if (!mr->dist_reg)
329 continue;
330
331 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
332 if (mr->enum_ids[j] != enum_id)
333 continue;
334
335 fn = REG_FN_MODIFY_BASE;
336 mode = MODE_ENABLE_REG;
337 reg_e = mr->dist_reg;
338 reg_d = mr->dist_reg;
339
340 fn += (mr->reg_width >> 3) - 1;
341 return _INTC_MK(fn, mode,
342 intc_get_reg(d, reg_e),
343 intc_get_reg(d, reg_d),
344 1,
345 (mr->reg_width - 1) - j);
346 }
347 }
348
349 /*
350 * It's possible we've gotten here with no distribution options
351 * available for the IRQ in question, so we just skip over those.
352 */
353 return 0;
354}
355#else
356static inline void intc_balancing_enable(unsigned int irq)
357{
358}
359
360static inline void intc_balancing_disable(unsigned int irq)
361{
362}
363#endif
364
232static inline void _intc_enable(unsigned int irq, unsigned long handle) 365static inline void _intc_enable(unsigned int irq, unsigned long handle)
233{ 366{
234 struct intc_desc_int *d = get_intc_desc(irq); 367 struct intc_desc_int *d = get_intc_desc(irq);
@@ -244,6 +377,8 @@ static inline void _intc_enable(unsigned int irq, unsigned long handle)
244 intc_enable_fns[_INTC_MODE(handle)](addr, handle, intc_reg_fns\ 377 intc_enable_fns[_INTC_MODE(handle)](addr, handle, intc_reg_fns\
245 [_INTC_FN(handle)], irq); 378 [_INTC_FN(handle)], irq);
246 } 379 }
380
381 intc_balancing_enable(irq);
247} 382}
248 383
249static void intc_enable(unsigned int irq) 384static void intc_enable(unsigned int irq)
@@ -254,10 +389,12 @@ static void intc_enable(unsigned int irq)
254static void intc_disable(unsigned int irq) 389static void intc_disable(unsigned int irq)
255{ 390{
256 struct intc_desc_int *d = get_intc_desc(irq); 391 struct intc_desc_int *d = get_intc_desc(irq);
257 unsigned long handle = (unsigned long) get_irq_chip_data(irq); 392 unsigned long handle = (unsigned long)get_irq_chip_data(irq);
258 unsigned long addr; 393 unsigned long addr;
259 unsigned int cpu; 394 unsigned int cpu;
260 395
396 intc_balancing_disable(irq);
397
261 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) { 398 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
262#ifdef CONFIG_SMP 399#ifdef CONFIG_SMP
263 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity)) 400 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity))
@@ -336,8 +473,7 @@ static void intc_mask_ack(unsigned int irq)
336 473
337 intc_disable(irq); 474 intc_disable(irq);
338 475
339 /* read register and write zero only to the assocaited bit */ 476 /* read register and write zero only to the associated bit */
340
341 if (handle) { 477 if (handle) {
342 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0); 478 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
343 switch (_INTC_FN(handle)) { 479 switch (_INTC_FN(handle)) {
@@ -366,7 +502,8 @@ static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
366{ 502{
367 int i; 503 int i;
368 504
369 /* this doesn't scale well, but... 505 /*
506 * this doesn't scale well, but...
370 * 507 *
371 * this function should only be used for cerain uncommon 508 * this function should only be used for cerain uncommon
372 * operations such as intc_set_priority() and intc_set_sense() 509 * operations such as intc_set_priority() and intc_set_sense()
@@ -377,7 +514,6 @@ static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
377 * memory footprint down is to make sure the array is sorted 514 * memory footprint down is to make sure the array is sorted
378 * and then perform a bisect to lookup the irq. 515 * and then perform a bisect to lookup the irq.
379 */ 516 */
380
381 for (i = 0; i < nr_hp; i++) { 517 for (i = 0; i < nr_hp; i++) {
382 if ((hp + i)->irq != irq) 518 if ((hp + i)->irq != irq)
383 continue; 519 continue;
@@ -408,7 +544,6 @@ int intc_set_priority(unsigned int irq, unsigned int prio)
408 * primary masking method is using intc_prio_level[irq] 544 * primary masking method is using intc_prio_level[irq]
409 * priority level will be set during next enable() 545 * priority level will be set during next enable()
410 */ 546 */
411
412 if (_INTC_FN(ihp->handle) != REG_FN_ERR) 547 if (_INTC_FN(ihp->handle) != REG_FN_ERR)
413 _intc_enable(irq, ihp->handle); 548 _intc_enable(irq, ihp->handle);
414 } 549 }
@@ -447,20 +582,6 @@ static int intc_set_sense(unsigned int irq, unsigned int type)
447 return 0; 582 return 0;
448} 583}
449 584
450static unsigned int __init intc_get_reg(struct intc_desc_int *d,
451 unsigned long address)
452{
453 unsigned int k;
454
455 for (k = 0; k < d->nr_reg; k++) {
456 if (d->reg[k] == address)
457 return k;
458 }
459
460 BUG();
461 return 0;
462}
463
464static intc_enum __init intc_grp_id(struct intc_desc *desc, 585static intc_enum __init intc_grp_id(struct intc_desc *desc,
465 intc_enum enum_id) 586 intc_enum enum_id)
466{ 587{
@@ -718,13 +839,14 @@ static void __init intc_register_irq(struct intc_desc *desc,
718 */ 839 */
719 set_bit(irq, intc_irq_map); 840 set_bit(irq, intc_irq_map);
720 841
721 /* Prefer single interrupt source bitmap over other combinations: 842 /*
843 * Prefer single interrupt source bitmap over other combinations:
844 *
722 * 1. bitmap, single interrupt source 845 * 1. bitmap, single interrupt source
723 * 2. priority, single interrupt source 846 * 2. priority, single interrupt source
724 * 3. bitmap, multiple interrupt sources (groups) 847 * 3. bitmap, multiple interrupt sources (groups)
725 * 4. priority, multiple interrupt sources (groups) 848 * 4. priority, multiple interrupt sources (groups)
726 */ 849 */
727
728 data[0] = intc_mask_data(desc, d, enum_id, 0); 850 data[0] = intc_mask_data(desc, d, enum_id, 0);
729 data[1] = intc_prio_data(desc, d, enum_id, 0); 851 data[1] = intc_prio_data(desc, d, enum_id, 0);
730 852
@@ -749,10 +871,11 @@ static void __init intc_register_irq(struct intc_desc *desc,
749 handle_level_irq, "level"); 871 handle_level_irq, "level");
750 set_irq_chip_data(irq, (void *)data[primary]); 872 set_irq_chip_data(irq, (void *)data[primary]);
751 873
752 /* set priority level 874 /*
875 * set priority level
753 * - this needs to be at least 2 for 5-bit priorities on 7780 876 * - this needs to be at least 2 for 5-bit priorities on 7780
754 */ 877 */
755 intc_prio_level[irq] = 2; 878 intc_prio_level[irq] = default_prio_level;
756 879
757 /* enable secondary masking method if present */ 880 /* enable secondary masking method if present */
758 if (data[!primary]) 881 if (data[!primary])
@@ -769,7 +892,6 @@ static void __init intc_register_irq(struct intc_desc *desc,
769 * only secondary priority should access registers, so 892 * only secondary priority should access registers, so
770 * set _INTC_FN(h) = REG_FN_ERR for intc_set_priority() 893 * set _INTC_FN(h) = REG_FN_ERR for intc_set_priority()
771 */ 894 */
772
773 hp->handle &= ~_INTC_MK(0x0f, 0, 0, 0, 0, 0); 895 hp->handle &= ~_INTC_MK(0x0f, 0, 0, 0, 0, 0);
774 hp->handle |= _INTC_MK(REG_FN_ERR, 0, 0, 0, 0, 0); 896 hp->handle |= _INTC_MK(REG_FN_ERR, 0, 0, 0, 0, 0);
775 } 897 }
@@ -790,6 +912,11 @@ static void __init intc_register_irq(struct intc_desc *desc,
790 if (desc->hw.ack_regs) 912 if (desc->hw.ack_regs)
791 ack_handle[irq] = intc_ack_data(desc, d, enum_id); 913 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
792 914
915#ifdef CONFIG_INTC_BALANCING
916 if (desc->hw.mask_regs)
917 dist_handle[irq] = intc_dist_data(desc, d, enum_id);
918#endif
919
793#ifdef CONFIG_ARM 920#ifdef CONFIG_ARM
794 set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */ 921 set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */
795#endif 922#endif
@@ -801,6 +928,8 @@ static unsigned int __init save_reg(struct intc_desc_int *d,
801 unsigned int smp) 928 unsigned int smp)
802{ 929{
803 if (value) { 930 if (value) {
931 value = intc_phys_to_virt(d, value);
932
804 d->reg[cnt] = value; 933 d->reg[cnt] = value;
805#ifdef CONFIG_SMP 934#ifdef CONFIG_SMP
806 d->smp[cnt] = smp; 935 d->smp[cnt] = smp;
@@ -816,25 +945,59 @@ static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc)
816 generic_handle_irq((unsigned int)get_irq_data(irq)); 945 generic_handle_irq((unsigned int)get_irq_data(irq));
817} 946}
818 947
819void __init register_intc_controller(struct intc_desc *desc) 948int __init register_intc_controller(struct intc_desc *desc)
820{ 949{
821 unsigned int i, k, smp; 950 unsigned int i, k, smp;
822 struct intc_hw_desc *hw = &desc->hw; 951 struct intc_hw_desc *hw = &desc->hw;
823 struct intc_desc_int *d; 952 struct intc_desc_int *d;
953 struct resource *res;
954
955 pr_info("intc: Registered controller '%s' with %u IRQs\n",
956 desc->name, hw->nr_vectors);
824 957
825 d = kzalloc(sizeof(*d), GFP_NOWAIT); 958 d = kzalloc(sizeof(*d), GFP_NOWAIT);
959 if (!d)
960 goto err0;
826 961
827 INIT_LIST_HEAD(&d->list); 962 INIT_LIST_HEAD(&d->list);
828 list_add(&d->list, &intc_list); 963 list_add(&d->list, &intc_list);
829 964
965 if (desc->num_resources) {
966 d->nr_windows = desc->num_resources;
967 d->window = kzalloc(d->nr_windows * sizeof(*d->window),
968 GFP_NOWAIT);
969 if (!d->window)
970 goto err1;
971
972 for (k = 0; k < d->nr_windows; k++) {
973 res = desc->resource + k;
974 WARN_ON(resource_type(res) != IORESOURCE_MEM);
975 d->window[k].phys = res->start;
976 d->window[k].size = resource_size(res);
977 d->window[k].virt = ioremap_nocache(res->start,
978 resource_size(res));
979 if (!d->window[k].virt)
980 goto err2;
981 }
982 }
983
830 d->nr_reg = hw->mask_regs ? hw->nr_mask_regs * 2 : 0; 984 d->nr_reg = hw->mask_regs ? hw->nr_mask_regs * 2 : 0;
985#ifdef CONFIG_INTC_BALANCING
986 if (d->nr_reg)
987 d->nr_reg += hw->nr_mask_regs;
988#endif
831 d->nr_reg += hw->prio_regs ? hw->nr_prio_regs * 2 : 0; 989 d->nr_reg += hw->prio_regs ? hw->nr_prio_regs * 2 : 0;
832 d->nr_reg += hw->sense_regs ? hw->nr_sense_regs : 0; 990 d->nr_reg += hw->sense_regs ? hw->nr_sense_regs : 0;
833 d->nr_reg += hw->ack_regs ? hw->nr_ack_regs : 0; 991 d->nr_reg += hw->ack_regs ? hw->nr_ack_regs : 0;
834 992
835 d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT); 993 d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT);
994 if (!d->reg)
995 goto err2;
996
836#ifdef CONFIG_SMP 997#ifdef CONFIG_SMP
837 d->smp = kzalloc(d->nr_reg * sizeof(*d->smp), GFP_NOWAIT); 998 d->smp = kzalloc(d->nr_reg * sizeof(*d->smp), GFP_NOWAIT);
999 if (!d->smp)
1000 goto err3;
838#endif 1001#endif
839 k = 0; 1002 k = 0;
840 1003
@@ -843,12 +1006,17 @@ void __init register_intc_controller(struct intc_desc *desc)
843 smp = IS_SMP(hw->mask_regs[i]); 1006 smp = IS_SMP(hw->mask_regs[i]);
844 k += save_reg(d, k, hw->mask_regs[i].set_reg, smp); 1007 k += save_reg(d, k, hw->mask_regs[i].set_reg, smp);
845 k += save_reg(d, k, hw->mask_regs[i].clr_reg, smp); 1008 k += save_reg(d, k, hw->mask_regs[i].clr_reg, smp);
1009#ifdef CONFIG_INTC_BALANCING
1010 k += save_reg(d, k, hw->mask_regs[i].dist_reg, 0);
1011#endif
846 } 1012 }
847 } 1013 }
848 1014
849 if (hw->prio_regs) { 1015 if (hw->prio_regs) {
850 d->prio = kzalloc(hw->nr_vectors * sizeof(*d->prio), 1016 d->prio = kzalloc(hw->nr_vectors * sizeof(*d->prio),
851 GFP_NOWAIT); 1017 GFP_NOWAIT);
1018 if (!d->prio)
1019 goto err4;
852 1020
853 for (i = 0; i < hw->nr_prio_regs; i++) { 1021 for (i = 0; i < hw->nr_prio_regs; i++) {
854 smp = IS_SMP(hw->prio_regs[i]); 1022 smp = IS_SMP(hw->prio_regs[i]);
@@ -860,6 +1028,8 @@ void __init register_intc_controller(struct intc_desc *desc)
860 if (hw->sense_regs) { 1028 if (hw->sense_regs) {
861 d->sense = kzalloc(hw->nr_vectors * sizeof(*d->sense), 1029 d->sense = kzalloc(hw->nr_vectors * sizeof(*d->sense),
862 GFP_NOWAIT); 1030 GFP_NOWAIT);
1031 if (!d->sense)
1032 goto err5;
863 1033
864 for (i = 0; i < hw->nr_sense_regs; i++) 1034 for (i = 0; i < hw->nr_sense_regs; i++)
865 k += save_reg(d, k, hw->sense_regs[i].reg, 0); 1035 k += save_reg(d, k, hw->sense_regs[i].reg, 0);
@@ -906,7 +1076,7 @@ void __init register_intc_controller(struct intc_desc *desc)
906 1076
907 irq_desc = irq_to_desc_alloc_node(irq, numa_node_id()); 1077 irq_desc = irq_to_desc_alloc_node(irq, numa_node_id());
908 if (unlikely(!irq_desc)) { 1078 if (unlikely(!irq_desc)) {
909 pr_info("can't get irq_desc for %d\n", irq); 1079 pr_err("can't get irq_desc for %d\n", irq);
910 continue; 1080 continue;
911 } 1081 }
912 1082
@@ -926,7 +1096,7 @@ void __init register_intc_controller(struct intc_desc *desc)
926 */ 1096 */
927 irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id()); 1097 irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id());
928 if (unlikely(!irq_desc)) { 1098 if (unlikely(!irq_desc)) {
929 pr_info("can't get irq_desc for %d\n", irq2); 1099 pr_err("can't get irq_desc for %d\n", irq2);
930 continue; 1100 continue;
931 } 1101 }
932 1102
@@ -942,8 +1112,100 @@ void __init register_intc_controller(struct intc_desc *desc)
942 /* enable bits matching force_enable after registering irqs */ 1112 /* enable bits matching force_enable after registering irqs */
943 if (desc->force_enable) 1113 if (desc->force_enable)
944 intc_enable_disable_enum(desc, d, desc->force_enable, 1); 1114 intc_enable_disable_enum(desc, d, desc->force_enable, 1);
1115
1116 return 0;
1117err5:
1118 kfree(d->prio);
1119err4:
1120#ifdef CONFIG_SMP
1121 kfree(d->smp);
1122err3:
1123#endif
1124 kfree(d->reg);
1125err2:
1126 for (k = 0; k < d->nr_windows; k++)
1127 if (d->window[k].virt)
1128 iounmap(d->window[k].virt);
1129
1130 kfree(d->window);
1131err1:
1132 kfree(d);
1133err0:
1134 pr_err("unable to allocate INTC memory\n");
1135
1136 return -ENOMEM;
1137}
1138
1139#ifdef CONFIG_INTC_USERIMASK
1140static void __iomem *uimask;
1141
1142int register_intc_userimask(unsigned long addr)
1143{
1144 if (unlikely(uimask))
1145 return -EBUSY;
1146
1147 uimask = ioremap_nocache(addr, SZ_4K);
1148 if (unlikely(!uimask))
1149 return -ENOMEM;
1150
1151 pr_info("intc: userimask support registered for levels 0 -> %d\n",
1152 default_prio_level - 1);
1153
1154 return 0;
1155}
1156
1157static ssize_t
1158show_intc_userimask(struct sysdev_class *cls,
1159 struct sysdev_class_attribute *attr, char *buf)
1160{
1161 return sprintf(buf, "%d\n", (__raw_readl(uimask) >> 4) & 0xf);
1162}
1163
1164static ssize_t
1165store_intc_userimask(struct sysdev_class *cls,
1166 struct sysdev_class_attribute *attr,
1167 const char *buf, size_t count)
1168{
1169 unsigned long level;
1170
1171 level = simple_strtoul(buf, NULL, 10);
1172
1173 /*
1174 * Minimal acceptable IRQ levels are in the 2 - 16 range, but
1175 * these are chomped so as to not interfere with normal IRQs.
1176 *
1177 * Level 1 is a special case on some CPUs in that it's not
1178 * directly settable, but given that USERIMASK cuts off below a
1179 * certain level, we don't care about this limitation here.
1180 * Level 0 on the other hand equates to user masking disabled.
1181 *
1182 * We use default_prio_level as a cut off so that only special
1183 * case opt-in IRQs can be mangled.
1184 */
1185 if (level >= default_prio_level)
1186 return -EINVAL;
1187
1188 __raw_writel(0xa5 << 24 | level << 4, uimask);
1189
1190 return count;
945} 1191}
946 1192
1193static SYSDEV_CLASS_ATTR(userimask, S_IRUSR | S_IWUSR,
1194 show_intc_userimask, store_intc_userimask);
1195#endif
1196
1197static ssize_t
1198show_intc_name(struct sys_device *dev, struct sysdev_attribute *attr, char *buf)
1199{
1200 struct intc_desc_int *d;
1201
1202 d = container_of(dev, struct intc_desc_int, sysdev);
1203
1204 return sprintf(buf, "%s\n", d->chip.name);
1205}
1206
1207static SYSDEV_ATTR(name, S_IRUGO, show_intc_name, NULL);
1208
947static int intc_suspend(struct sys_device *dev, pm_message_t state) 1209static int intc_suspend(struct sys_device *dev, pm_message_t state)
948{ 1210{
949 struct intc_desc_int *d; 1211 struct intc_desc_int *d;
@@ -1003,19 +1265,28 @@ static int __init register_intc_sysdevs(void)
1003 int id = 0; 1265 int id = 0;
1004 1266
1005 error = sysdev_class_register(&intc_sysdev_class); 1267 error = sysdev_class_register(&intc_sysdev_class);
1268#ifdef CONFIG_INTC_USERIMASK
1269 if (!error && uimask)
1270 error = sysdev_class_create_file(&intc_sysdev_class,
1271 &attr_userimask);
1272#endif
1006 if (!error) { 1273 if (!error) {
1007 list_for_each_entry(d, &intc_list, list) { 1274 list_for_each_entry(d, &intc_list, list) {
1008 d->sysdev.id = id; 1275 d->sysdev.id = id;
1009 d->sysdev.cls = &intc_sysdev_class; 1276 d->sysdev.cls = &intc_sysdev_class;
1010 error = sysdev_register(&d->sysdev); 1277 error = sysdev_register(&d->sysdev);
1278 if (error == 0)
1279 error = sysdev_create_file(&d->sysdev,
1280 &attr_name);
1011 if (error) 1281 if (error)
1012 break; 1282 break;
1283
1013 id++; 1284 id++;
1014 } 1285 }
1015 } 1286 }
1016 1287
1017 if (error) 1288 if (error)
1018 pr_warning("intc: sysdev registration error\n"); 1289 pr_err("intc: sysdev registration error\n");
1019 1290
1020 return error; 1291 return error;
1021} 1292}
@@ -1048,7 +1319,7 @@ unsigned int create_irq_nr(unsigned int irq_want, int node)
1048 1319
1049 desc = irq_to_desc_alloc_node(new, node); 1320 desc = irq_to_desc_alloc_node(new, node);
1050 if (unlikely(!desc)) { 1321 if (unlikely(!desc)) {
1051 pr_info("can't get irq_desc for %d\n", new); 1322 pr_err("can't get irq_desc for %d\n", new);
1052 goto out_unlock; 1323 goto out_unlock;
1053 } 1324 }
1054 1325
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 36828358a4d8..e76b1afafe07 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -36,8 +36,7 @@
36#include <asm/delay.h> 36#include <asm/delay.h>
37 37
38#include <mach/dma.h> 38#include <mach/dma.h>
39#include <mach/regs-ssp.h> 39#include <plat/ssp.h>
40#include <mach/ssp.h>
41#include <mach/pxa2xx_spi.h> 40#include <mach/pxa2xx_spi.h>
42 41
43MODULE_AUTHOR("Stephen Street"); 42MODULE_AUTHOR("Stephen Street");
@@ -1318,14 +1317,14 @@ static int setup(struct spi_device *spi)
1318 /* NOTE: PXA25x_SSP _could_ use external clocking ... */ 1317 /* NOTE: PXA25x_SSP _could_ use external clocking ... */
1319 if (drv_data->ssp_type != PXA25x_SSP) 1318 if (drv_data->ssp_type != PXA25x_SSP)
1320 dev_dbg(&spi->dev, "%ld Hz actual, %s\n", 1319 dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
1321 clk_get_rate(ssp->clk) 1320 clk_get_rate(ssp->clk)
1322 / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), 1321 / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)),
1323 chip->enable_dma ? "DMA" : "PIO"); 1322 chip->enable_dma ? "DMA" : "PIO");
1324 else 1323 else
1325 dev_dbg(&spi->dev, "%ld Hz actual, %s\n", 1324 dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
1326 clk_get_rate(ssp->clk) / 2 1325 clk_get_rate(ssp->clk) / 2
1327 / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), 1326 / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)),
1328 chip->enable_dma ? "DMA" : "PIO"); 1327 chip->enable_dma ? "DMA" : "PIO");
1329 1328
1330 if (spi->bits_per_word <= 8) { 1329 if (spi->bits_per_word <= 8) {
1331 chip->n_bytes = 1; 1330 chip->n_bytes = 1;
@@ -1466,7 +1465,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
1466 1465
1467 platform_info = dev->platform_data; 1466 platform_info = dev->platform_data;
1468 1467
1469 ssp = ssp_request(pdev->id, pdev->name); 1468 ssp = pxa_ssp_request(pdev->id, pdev->name);
1470 if (ssp == NULL) { 1469 if (ssp == NULL) {
1471 dev_err(&pdev->dev, "failed to request SSP%d\n", pdev->id); 1470 dev_err(&pdev->dev, "failed to request SSP%d\n", pdev->id);
1472 return -ENODEV; 1471 return -ENODEV;
@@ -1476,7 +1475,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
1476 master = spi_alloc_master(dev, sizeof(struct driver_data) + 16); 1475 master = spi_alloc_master(dev, sizeof(struct driver_data) + 16);
1477 if (!master) { 1476 if (!master) {
1478 dev_err(&pdev->dev, "cannot alloc spi_master\n"); 1477 dev_err(&pdev->dev, "cannot alloc spi_master\n");
1479 ssp_free(ssp); 1478 pxa_ssp_free(ssp);
1480 return -ENOMEM; 1479 return -ENOMEM;
1481 } 1480 }
1482 drv_data = spi_master_get_devdata(master); 1481 drv_data = spi_master_get_devdata(master);
@@ -1558,7 +1557,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
1558 write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) | 1557 write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) |
1559 SSCR1_TxTresh(TX_THRESH_DFLT), 1558 SSCR1_TxTresh(TX_THRESH_DFLT),
1560 drv_data->ioaddr); 1559 drv_data->ioaddr);
1561 write_SSCR0(SSCR0_SerClkDiv(2) 1560 write_SSCR0(SSCR0_SCR(2)
1562 | SSCR0_Motorola 1561 | SSCR0_Motorola
1563 | SSCR0_DataSize(8), 1562 | SSCR0_DataSize(8),
1564 drv_data->ioaddr); 1563 drv_data->ioaddr);
@@ -1605,7 +1604,7 @@ out_error_irq_alloc:
1605 1604
1606out_error_master_alloc: 1605out_error_master_alloc:
1607 spi_master_put(master); 1606 spi_master_put(master);
1608 ssp_free(ssp); 1607 pxa_ssp_free(ssp);
1609 return status; 1608 return status;
1610} 1609}
1611 1610
@@ -1649,7 +1648,7 @@ static int pxa2xx_spi_remove(struct platform_device *pdev)
1649 free_irq(ssp->irq, drv_data); 1648 free_irq(ssp->irq, drv_data);
1650 1649
1651 /* Release SSP */ 1650 /* Release SSP */
1652 ssp_free(ssp); 1651 pxa_ssp_free(ssp);
1653 1652
1654 /* Disconnect from the SPI framework */ 1653 /* Disconnect from the SPI framework */
1655 spi_unregister_master(drv_data->master); 1654 spi_unregister_master(drv_data->master);
diff --git a/drivers/usb/core/inode.c b/drivers/usb/core/inode.c
index 4a6366a42129..111a01a747fc 100644
--- a/drivers/usb/core/inode.c
+++ b/drivers/usb/core/inode.c
@@ -380,6 +380,7 @@ static int usbfs_rmdir(struct inode *dir, struct dentry *dentry)
380 mutex_lock(&inode->i_mutex); 380 mutex_lock(&inode->i_mutex);
381 dentry_unhash(dentry); 381 dentry_unhash(dentry);
382 if (usbfs_empty(dentry)) { 382 if (usbfs_empty(dentry)) {
383 dont_mount(dentry);
383 drop_nlink(dentry->d_inode); 384 drop_nlink(dentry->d_inode);
384 drop_nlink(dentry->d_inode); 385 drop_nlink(dentry->d_inode);
385 dput(dentry); 386 dput(dentry);
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index df1bae9b048e..eaa79c8a9b8c 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -366,6 +366,13 @@ rescan:
366 if (is_done) 366 if (is_done)
367 done(ep, req, 0); 367 done(ep, req, 0);
368 else if (ep->is_pingpong) { 368 else if (ep->is_pingpong) {
369 /*
370 * One dummy read to delay the code because of a HW glitch:
371 * CSR returns bad RXCOUNT when read too soon after updating
372 * RX_DATA_BK flags.
373 */
374 csr = __raw_readl(creg);
375
369 bufferspace -= count; 376 bufferspace -= count;
370 buf += count; 377 buf += count;
371 goto rescan; 378 goto rescan;
diff --git a/drivers/video/amifb.c b/drivers/video/amifb.c
index dca48df98444..e5d6b56d4447 100644
--- a/drivers/video/amifb.c
+++ b/drivers/video/amifb.c
@@ -50,8 +50,9 @@
50#include <linux/fb.h> 50#include <linux/fb.h>
51#include <linux/init.h> 51#include <linux/init.h>
52#include <linux/ioport.h> 52#include <linux/ioport.h>
53 53#include <linux/platform_device.h>
54#include <linux/uaccess.h> 54#include <linux/uaccess.h>
55
55#include <asm/system.h> 56#include <asm/system.h>
56#include <asm/irq.h> 57#include <asm/irq.h>
57#include <asm/amigahw.h> 58#include <asm/amigahw.h>
@@ -1135,7 +1136,7 @@ static int amifb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg
1135 * Interface to the low level console driver 1136 * Interface to the low level console driver
1136 */ 1137 */
1137 1138
1138static void amifb_deinit(void); 1139static void amifb_deinit(struct platform_device *pdev);
1139 1140
1140 /* 1141 /*
1141 * Internal routines 1142 * Internal routines
@@ -2246,7 +2247,7 @@ static inline void chipfree(void)
2246 * Initialisation 2247 * Initialisation
2247 */ 2248 */
2248 2249
2249static int __init amifb_init(void) 2250static int __init amifb_probe(struct platform_device *pdev)
2250{ 2251{
2251 int tag, i, err = 0; 2252 int tag, i, err = 0;
2252 u_long chipptr; 2253 u_long chipptr;
@@ -2261,16 +2262,6 @@ static int __init amifb_init(void)
2261 } 2262 }
2262 amifb_setup(option); 2263 amifb_setup(option);
2263#endif 2264#endif
2264 if (!MACH_IS_AMIGA || !AMIGAHW_PRESENT(AMI_VIDEO))
2265 return -ENODEV;
2266
2267 /*
2268 * We request all registers starting from bplpt[0]
2269 */
2270 if (!request_mem_region(CUSTOM_PHYSADDR+0xe0, 0x120,
2271 "amifb [Denise/Lisa]"))
2272 return -EBUSY;
2273
2274 custom.dmacon = DMAF_ALL | DMAF_MASTER; 2265 custom.dmacon = DMAF_ALL | DMAF_MASTER;
2275 2266
2276 switch (amiga_chipset) { 2267 switch (amiga_chipset) {
@@ -2377,6 +2368,7 @@ default_chipset:
2377 fb_info.fbops = &amifb_ops; 2368 fb_info.fbops = &amifb_ops;
2378 fb_info.par = &currentpar; 2369 fb_info.par = &currentpar;
2379 fb_info.flags = FBINFO_DEFAULT; 2370 fb_info.flags = FBINFO_DEFAULT;
2371 fb_info.device = &pdev->dev;
2380 2372
2381 if (!fb_find_mode(&fb_info.var, &fb_info, mode_option, ami_modedb, 2373 if (!fb_find_mode(&fb_info.var, &fb_info, mode_option, ami_modedb,
2382 NUM_TOTAL_MODES, &ami_modedb[defmode], 4)) { 2374 NUM_TOTAL_MODES, &ami_modedb[defmode], 4)) {
@@ -2451,18 +2443,18 @@ default_chipset:
2451 return 0; 2443 return 0;
2452 2444
2453amifb_error: 2445amifb_error:
2454 amifb_deinit(); 2446 amifb_deinit(pdev);
2455 return err; 2447 return err;
2456} 2448}
2457 2449
2458static void amifb_deinit(void) 2450static void amifb_deinit(struct platform_device *pdev)
2459{ 2451{
2460 if (fb_info.cmap.len) 2452 if (fb_info.cmap.len)
2461 fb_dealloc_cmap(&fb_info.cmap); 2453 fb_dealloc_cmap(&fb_info.cmap);
2454 fb_dealloc_cmap(&fb_info.cmap);
2462 chipfree(); 2455 chipfree();
2463 if (videomemory) 2456 if (videomemory)
2464 iounmap((void*)videomemory); 2457 iounmap((void*)videomemory);
2465 release_mem_region(CUSTOM_PHYSADDR+0xe0, 0x120);
2466 custom.dmacon = DMAF_ALL | DMAF_MASTER; 2458 custom.dmacon = DMAF_ALL | DMAF_MASTER;
2467} 2459}
2468 2460
@@ -3794,14 +3786,35 @@ static void ami_rebuild_copper(void)
3794 } 3786 }
3795} 3787}
3796 3788
3797static void __exit amifb_exit(void) 3789static int __exit amifb_remove(struct platform_device *pdev)
3798{ 3790{
3799 unregister_framebuffer(&fb_info); 3791 unregister_framebuffer(&fb_info);
3800 amifb_deinit(); 3792 amifb_deinit(pdev);
3801 amifb_video_off(); 3793 amifb_video_off();
3794 return 0;
3795}
3796
3797static struct platform_driver amifb_driver = {
3798 .remove = __exit_p(amifb_remove),
3799 .driver = {
3800 .name = "amiga-video",
3801 .owner = THIS_MODULE,
3802 },
3803};
3804
3805static int __init amifb_init(void)
3806{
3807 return platform_driver_probe(&amifb_driver, amifb_probe);
3802} 3808}
3803 3809
3804module_init(amifb_init); 3810module_init(amifb_init);
3811
3812static void __exit amifb_exit(void)
3813{
3814 platform_driver_unregister(&amifb_driver);
3815}
3816
3805module_exit(amifb_exit); 3817module_exit(amifb_exit);
3806 3818
3807MODULE_LICENSE("GPL"); 3819MODULE_LICENSE("GPL");
3820MODULE_ALIAS("platform:amiga-video");
diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c
index 8d8dfda2f868..6df7c54db0a3 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/cirrusfb.c
@@ -299,6 +299,7 @@ static const struct zorro_device_id cirrusfb_zorro_table[] = {
299 }, 299 },
300 { 0 } 300 { 0 }
301}; 301};
302MODULE_DEVICE_TABLE(zorro, cirrusfb_zorro_table);
302 303
303static const struct { 304static const struct {
304 zorro_id id2; 305 zorro_id id2;
diff --git a/drivers/video/fm2fb.c b/drivers/video/fm2fb.c
index 6c91c61cdb63..1b0feb8e7244 100644
--- a/drivers/video/fm2fb.c
+++ b/drivers/video/fm2fb.c
@@ -219,6 +219,7 @@ static struct zorro_device_id fm2fb_devices[] __devinitdata = {
219 { ZORRO_PROD_HELFRICH_RAINBOW_II }, 219 { ZORRO_PROD_HELFRICH_RAINBOW_II },
220 { 0 } 220 { 0 }
221}; 221};
222MODULE_DEVICE_TABLE(zorro, fm2fb_devices);
222 223
223static struct zorro_driver fm2fb_driver = { 224static struct zorro_driver fm2fb_driver = {
224 .name = "fm2fb", 225 .name = "fm2fb",
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 0bf5020d0d32..b87ba23442d2 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -175,7 +175,7 @@ config SA1100_WATCHDOG
175 175
176config MPCORE_WATCHDOG 176config MPCORE_WATCHDOG
177 tristate "MPcore watchdog" 177 tristate "MPcore watchdog"
178 depends on ARM_MPCORE_PLATFORM && LOCAL_TIMERS 178 depends on HAVE_ARM_TWD
179 help 179 help
180 Watchdog timer embedded into the MPcore system. 180 Watchdog timer embedded into the MPcore system.
181 181
diff --git a/drivers/watchdog/mpcore_wdt.c b/drivers/watchdog/mpcore_wdt.c
index 016c6a791cab..b8ec7aca3c8e 100644
--- a/drivers/watchdog/mpcore_wdt.c
+++ b/drivers/watchdog/mpcore_wdt.c
@@ -31,8 +31,9 @@
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/uaccess.h> 32#include <linux/uaccess.h>
33#include <linux/slab.h> 33#include <linux/slab.h>
34#include <linux/io.h>
34 35
35#include <asm/hardware/arm_twd.h> 36#include <asm/smp_twd.h>
36 37
37struct mpcore_wdt { 38struct mpcore_wdt {
38 unsigned long timer_alive; 39 unsigned long timer_alive;
@@ -44,7 +45,7 @@ struct mpcore_wdt {
44}; 45};
45 46
46static struct platform_device *mpcore_wdt_dev; 47static struct platform_device *mpcore_wdt_dev;
47extern unsigned int mpcore_timer_rate; 48static DEFINE_SPINLOCK(wdt_lock);
48 49
49#define TIMER_MARGIN 60 50#define TIMER_MARGIN 60
50static int mpcore_margin = TIMER_MARGIN; 51static int mpcore_margin = TIMER_MARGIN;
@@ -94,13 +95,15 @@ static irqreturn_t mpcore_wdt_fire(int irq, void *arg)
94 */ 95 */
95static void mpcore_wdt_keepalive(struct mpcore_wdt *wdt) 96static void mpcore_wdt_keepalive(struct mpcore_wdt *wdt)
96{ 97{
97 unsigned int count; 98 unsigned long count;
98 99
100 spin_lock(&wdt_lock);
99 /* Assume prescale is set to 256 */ 101 /* Assume prescale is set to 256 */
100 count = (mpcore_timer_rate / 256) * mpcore_margin; 102 count = __raw_readl(wdt->base + TWD_WDOG_COUNTER);
103 count = (0xFFFFFFFFU - count) * (HZ / 5);
104 count = (count / 256) * mpcore_margin;
101 105
102 /* Reload the counter */ 106 /* Reload the counter */
103 spin_lock(&wdt_lock);
104 writel(count + wdt->perturb, wdt->base + TWD_WDOG_LOAD); 107 writel(count + wdt->perturb, wdt->base + TWD_WDOG_LOAD);
105 wdt->perturb = wdt->perturb ? 0 : 1; 108 wdt->perturb = wdt->perturb ? 0 : 1;
106 spin_unlock(&wdt_lock); 109 spin_unlock(&wdt_lock);
@@ -119,7 +122,6 @@ static void mpcore_wdt_start(struct mpcore_wdt *wdt)
119{ 122{
120 dev_printk(KERN_INFO, wdt->dev, "enabling watchdog.\n"); 123 dev_printk(KERN_INFO, wdt->dev, "enabling watchdog.\n");
121 124
122 spin_lock(&wdt_lock);
123 /* This loads the count register but does NOT start the count yet */ 125 /* This loads the count register but does NOT start the count yet */
124 mpcore_wdt_keepalive(wdt); 126 mpcore_wdt_keepalive(wdt);
125 127
@@ -130,7 +132,6 @@ static void mpcore_wdt_start(struct mpcore_wdt *wdt)
130 /* Enable watchdog - prescale=256, watchdog mode=1, enable=1 */ 132 /* Enable watchdog - prescale=256, watchdog mode=1, enable=1 */
131 writel(0x0000FF09, wdt->base + TWD_WDOG_CONTROL); 133 writel(0x0000FF09, wdt->base + TWD_WDOG_CONTROL);
132 } 134 }
133 spin_unlock(&wdt_lock);
134} 135}
135 136
136static int mpcore_wdt_set_heartbeat(int t) 137static int mpcore_wdt_set_heartbeat(int t)
@@ -360,7 +361,7 @@ static int __devinit mpcore_wdt_probe(struct platform_device *dev)
360 mpcore_wdt_miscdev.parent = &dev->dev; 361 mpcore_wdt_miscdev.parent = &dev->dev;
361 ret = misc_register(&mpcore_wdt_miscdev); 362 ret = misc_register(&mpcore_wdt_miscdev);
362 if (ret) { 363 if (ret) {
363 dev_printk(KERN_ERR, _dev, 364 dev_printk(KERN_ERR, wdt->dev,
364 "cannot register miscdev on minor=%d (err=%d)\n", 365 "cannot register miscdev on minor=%d (err=%d)\n",
365 WATCHDOG_MINOR, ret); 366 WATCHDOG_MINOR, ret);
366 goto err_misc; 367 goto err_misc;
@@ -369,13 +370,13 @@ static int __devinit mpcore_wdt_probe(struct platform_device *dev)
369 ret = request_irq(wdt->irq, mpcore_wdt_fire, IRQF_DISABLED, 370 ret = request_irq(wdt->irq, mpcore_wdt_fire, IRQF_DISABLED,
370 "mpcore_wdt", wdt); 371 "mpcore_wdt", wdt);
371 if (ret) { 372 if (ret) {
372 dev_printk(KERN_ERR, _dev, 373 dev_printk(KERN_ERR, wdt->dev,
373 "cannot register IRQ%d for watchdog\n", wdt->irq); 374 "cannot register IRQ%d for watchdog\n", wdt->irq);
374 goto err_irq; 375 goto err_irq;
375 } 376 }
376 377
377 mpcore_wdt_stop(wdt); 378 mpcore_wdt_stop(wdt);
378 platform_set_drvdata(&dev->dev, wdt); 379 platform_set_drvdata(dev, wdt);
379 mpcore_wdt_dev = dev; 380 mpcore_wdt_dev = dev;
380 381
381 return 0; 382 return 0;
diff --git a/drivers/xen/manage.c b/drivers/xen/manage.c
index 2ac4440e7b08..8943b8ccee1a 100644
--- a/drivers/xen/manage.c
+++ b/drivers/xen/manage.c
@@ -80,12 +80,6 @@ static void do_suspend(void)
80 80
81 shutting_down = SHUTDOWN_SUSPEND; 81 shutting_down = SHUTDOWN_SUSPEND;
82 82
83 err = stop_machine_create();
84 if (err) {
85 printk(KERN_ERR "xen suspend: failed to setup stop_machine %d\n", err);
86 goto out;
87 }
88
89#ifdef CONFIG_PREEMPT 83#ifdef CONFIG_PREEMPT
90 /* If the kernel is preemptible, we need to freeze all the processes 84 /* If the kernel is preemptible, we need to freeze all the processes
91 to prevent them from being in the middle of a pagetable update 85 to prevent them from being in the middle of a pagetable update
@@ -93,7 +87,7 @@ static void do_suspend(void)
93 err = freeze_processes(); 87 err = freeze_processes();
94 if (err) { 88 if (err) {
95 printk(KERN_ERR "xen suspend: freeze failed %d\n", err); 89 printk(KERN_ERR "xen suspend: freeze failed %d\n", err);
96 goto out_destroy_sm; 90 goto out;
97 } 91 }
98#endif 92#endif
99 93
@@ -136,12 +130,8 @@ out_resume:
136out_thaw: 130out_thaw:
137#ifdef CONFIG_PREEMPT 131#ifdef CONFIG_PREEMPT
138 thaw_processes(); 132 thaw_processes();
139
140out_destroy_sm:
141#endif
142 stop_machine_destroy();
143
144out: 133out:
134#endif
145 shutting_down = SHUTDOWN_INVALID; 135 shutting_down = SHUTDOWN_INVALID;
146} 136}
147#endif /* CONFIG_PM_SLEEP */ 137#endif /* CONFIG_PM_SLEEP */
diff --git a/drivers/zorro/proc.c b/drivers/zorro/proc.c
index d47c47fc048f..3c7046d79654 100644
--- a/drivers/zorro/proc.c
+++ b/drivers/zorro/proc.c
@@ -97,7 +97,7 @@ static void zorro_seq_stop(struct seq_file *m, void *v)
97 97
98static int zorro_seq_show(struct seq_file *m, void *v) 98static int zorro_seq_show(struct seq_file *m, void *v)
99{ 99{
100 u_int slot = *(loff_t *)v; 100 unsigned int slot = *(loff_t *)v;
101 struct zorro_dev *z = &zorro_autocon[slot]; 101 struct zorro_dev *z = &zorro_autocon[slot];
102 102
103 seq_printf(m, "%02x\t%08x\t%08lx\t%08lx\t%02x\n", slot, z->id, 103 seq_printf(m, "%02x\t%08x\t%08lx\t%08lx\t%02x\n", slot, z->id,
@@ -129,7 +129,7 @@ static const struct file_operations zorro_devices_proc_fops = {
129 129
130static struct proc_dir_entry *proc_bus_zorro_dir; 130static struct proc_dir_entry *proc_bus_zorro_dir;
131 131
132static int __init zorro_proc_attach_device(u_int slot) 132static int __init zorro_proc_attach_device(unsigned int slot)
133{ 133{
134 struct proc_dir_entry *entry; 134 struct proc_dir_entry *entry;
135 char name[4]; 135 char name[4];
@@ -146,7 +146,7 @@ static int __init zorro_proc_attach_device(u_int slot)
146 146
147static int __init zorro_proc_init(void) 147static int __init zorro_proc_init(void)
148{ 148{
149 u_int slot; 149 unsigned int slot;
150 150
151 if (MACH_IS_AMIGA && AMIGAHW_PRESENT(ZORRO)) { 151 if (MACH_IS_AMIGA && AMIGAHW_PRESENT(ZORRO)) {
152 proc_bus_zorro_dir = proc_mkdir("bus/zorro", NULL); 152 proc_bus_zorro_dir = proc_mkdir("bus/zorro", NULL);
diff --git a/drivers/zorro/zorro-driver.c b/drivers/zorro/zorro-driver.c
index 53180a37cc9a..7ee2b6e71786 100644
--- a/drivers/zorro/zorro-driver.c
+++ b/drivers/zorro/zorro-driver.c
@@ -137,10 +137,34 @@ static int zorro_bus_match(struct device *dev, struct device_driver *drv)
137 return 0; 137 return 0;
138} 138}
139 139
140static int zorro_uevent(struct device *dev, struct kobj_uevent_env *env)
141{
142#ifdef CONFIG_HOTPLUG
143 struct zorro_dev *z;
144
145 if (!dev)
146 return -ENODEV;
147
148 z = to_zorro_dev(dev);
149 if (!z)
150 return -ENODEV;
151
152 if (add_uevent_var(env, "ZORRO_ID=%08X", z->id) ||
153 add_uevent_var(env, "ZORRO_SLOT_NAME=%s", dev_name(dev)) ||
154 add_uevent_var(env, "ZORRO_SLOT_ADDR=%04X", z->slotaddr) ||
155 add_uevent_var(env, "MODALIAS=" ZORRO_DEVICE_MODALIAS_FMT, z->id))
156 return -ENOMEM;
157
158 return 0;
159#else /* !CONFIG_HOTPLUG */
160 return -ENODEV;
161#endif /* !CONFIG_HOTPLUG */
162}
140 163
141struct bus_type zorro_bus_type = { 164struct bus_type zorro_bus_type = {
142 .name = "zorro", 165 .name = "zorro",
143 .match = zorro_bus_match, 166 .match = zorro_bus_match,
167 .uevent = zorro_uevent,
144 .probe = zorro_device_probe, 168 .probe = zorro_device_probe,
145 .remove = zorro_device_remove, 169 .remove = zorro_device_remove,
146}; 170};
diff --git a/drivers/zorro/zorro-sysfs.c b/drivers/zorro/zorro-sysfs.c
index 1d2a772ea14c..eb924e0a64ce 100644
--- a/drivers/zorro/zorro-sysfs.c
+++ b/drivers/zorro/zorro-sysfs.c
@@ -77,6 +77,16 @@ static struct bin_attribute zorro_config_attr = {
77 .read = zorro_read_config, 77 .read = zorro_read_config,
78}; 78};
79 79
80static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
81 char *buf)
82{
83 struct zorro_dev *z = to_zorro_dev(dev);
84
85 return sprintf(buf, ZORRO_DEVICE_MODALIAS_FMT "\n", z->id);
86}
87
88static DEVICE_ATTR(modalias, S_IRUGO, modalias_show, NULL);
89
80int zorro_create_sysfs_dev_files(struct zorro_dev *z) 90int zorro_create_sysfs_dev_files(struct zorro_dev *z)
81{ 91{
82 struct device *dev = &z->dev; 92 struct device *dev = &z->dev;
@@ -89,6 +99,7 @@ int zorro_create_sysfs_dev_files(struct zorro_dev *z)
89 (error = device_create_file(dev, &dev_attr_slotaddr)) || 99 (error = device_create_file(dev, &dev_attr_slotaddr)) ||
90 (error = device_create_file(dev, &dev_attr_slotsize)) || 100 (error = device_create_file(dev, &dev_attr_slotsize)) ||
91 (error = device_create_file(dev, &dev_attr_resource)) || 101 (error = device_create_file(dev, &dev_attr_resource)) ||
102 (error = device_create_file(dev, &dev_attr_modalias)) ||
92 (error = sysfs_create_bin_file(&dev->kobj, &zorro_config_attr))) 103 (error = sysfs_create_bin_file(&dev->kobj, &zorro_config_attr)))
93 return error; 104 return error;
94 105
diff --git a/drivers/zorro/zorro.c b/drivers/zorro/zorro.c
index d45fb34e2d23..6455f3a244c5 100644
--- a/drivers/zorro/zorro.c
+++ b/drivers/zorro/zorro.c
@@ -15,6 +15,8 @@
15#include <linux/zorro.h> 15#include <linux/zorro.h>
16#include <linux/bitops.h> 16#include <linux/bitops.h>
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
18 20
19#include <asm/setup.h> 21#include <asm/setup.h>
20#include <asm/amigahw.h> 22#include <asm/amigahw.h>
@@ -26,24 +28,17 @@
26 * Zorro Expansion Devices 28 * Zorro Expansion Devices
27 */ 29 */
28 30
29u_int zorro_num_autocon = 0; 31unsigned int zorro_num_autocon;
30struct zorro_dev zorro_autocon[ZORRO_NUM_AUTO]; 32struct zorro_dev zorro_autocon[ZORRO_NUM_AUTO];
31 33
32 34
33 /* 35 /*
34 * Single Zorro bus 36 * Zorro bus
35 */ 37 */
36 38
37struct zorro_bus zorro_bus = {\ 39struct zorro_bus {
38 .resources = { 40 struct list_head devices; /* list of devices on this bus */
39 /* Zorro II regions (on Zorro II/III) */ 41 struct device dev;
40 { .name = "Zorro II exp", .start = 0x00e80000, .end = 0x00efffff },
41 { .name = "Zorro II mem", .start = 0x00200000, .end = 0x009fffff },
42 /* Zorro III regions (on Zorro III only) */
43 { .name = "Zorro III exp", .start = 0xff000000, .end = 0xffffffff },
44 { .name = "Zorro III cfg", .start = 0x40000000, .end = 0x7fffffff }
45 },
46 .name = "Zorro bus"
47}; 42};
48 43
49 44
@@ -53,18 +48,19 @@ struct zorro_bus zorro_bus = {\
53 48
54struct zorro_dev *zorro_find_device(zorro_id id, struct zorro_dev *from) 49struct zorro_dev *zorro_find_device(zorro_id id, struct zorro_dev *from)
55{ 50{
56 struct zorro_dev *z; 51 struct zorro_dev *z;
57 52
58 if (!MACH_IS_AMIGA || !AMIGAHW_PRESENT(ZORRO)) 53 if (!zorro_num_autocon)
59 return NULL; 54 return NULL;
60 55
61 for (z = from ? from+1 : &zorro_autocon[0]; 56 for (z = from ? from+1 : &zorro_autocon[0];
62 z < zorro_autocon+zorro_num_autocon; 57 z < zorro_autocon+zorro_num_autocon;
63 z++) 58 z++)
64 if (id == ZORRO_WILDCARD || id == z->id) 59 if (id == ZORRO_WILDCARD || id == z->id)
65 return z; 60 return z;
66 return NULL; 61 return NULL;
67} 62}
63EXPORT_SYMBOL(zorro_find_device);
68 64
69 65
70 /* 66 /*
@@ -83,121 +79,138 @@ struct zorro_dev *zorro_find_device(zorro_id id, struct zorro_dev *from)
83 */ 79 */
84 80
85DECLARE_BITMAP(zorro_unused_z2ram, 128); 81DECLARE_BITMAP(zorro_unused_z2ram, 128);
82EXPORT_SYMBOL(zorro_unused_z2ram);
86 83
87 84
88static void __init mark_region(unsigned long start, unsigned long end, 85static void __init mark_region(unsigned long start, unsigned long end,
89 int flag) 86 int flag)
90{ 87{
91 if (flag)
92 start += Z2RAM_CHUNKMASK;
93 else
94 end += Z2RAM_CHUNKMASK;
95 start &= ~Z2RAM_CHUNKMASK;
96 end &= ~Z2RAM_CHUNKMASK;
97
98 if (end <= Z2RAM_START || start >= Z2RAM_END)
99 return;
100 start = start < Z2RAM_START ? 0x00000000 : start-Z2RAM_START;
101 end = end > Z2RAM_END ? Z2RAM_SIZE : end-Z2RAM_START;
102 while (start < end) {
103 u32 chunk = start>>Z2RAM_CHUNKSHIFT;
104 if (flag) 88 if (flag)
105 set_bit(chunk, zorro_unused_z2ram); 89 start += Z2RAM_CHUNKMASK;
106 else 90 else
107 clear_bit(chunk, zorro_unused_z2ram); 91 end += Z2RAM_CHUNKMASK;
108 start += Z2RAM_CHUNKSIZE; 92 start &= ~Z2RAM_CHUNKMASK;
109 } 93 end &= ~Z2RAM_CHUNKMASK;
94
95 if (end <= Z2RAM_START || start >= Z2RAM_END)
96 return;
97 start = start < Z2RAM_START ? 0x00000000 : start-Z2RAM_START;
98 end = end > Z2RAM_END ? Z2RAM_SIZE : end-Z2RAM_START;
99 while (start < end) {
100 u32 chunk = start>>Z2RAM_CHUNKSHIFT;
101 if (flag)
102 set_bit(chunk, zorro_unused_z2ram);
103 else
104 clear_bit(chunk, zorro_unused_z2ram);
105 start += Z2RAM_CHUNKSIZE;
106 }
110} 107}
111 108
112 109
113static struct resource __init *zorro_find_parent_resource(struct zorro_dev *z) 110static struct resource __init *zorro_find_parent_resource(
111 struct platform_device *bridge, struct zorro_dev *z)
114{ 112{
115 int i; 113 int i;
116 114
117 for (i = 0; i < zorro_bus.num_resources; i++) 115 for (i = 0; i < bridge->num_resources; i++) {
118 if (zorro_resource_start(z) >= zorro_bus.resources[i].start && 116 struct resource *r = &bridge->resource[i];
119 zorro_resource_end(z) <= zorro_bus.resources[i].end) 117 if (zorro_resource_start(z) >= r->start &&
120 return &zorro_bus.resources[i]; 118 zorro_resource_end(z) <= r->end)
121 return &iomem_resource; 119 return r;
120 }
121 return &iomem_resource;
122} 122}
123 123
124 124
125 /*
126 * Initialization
127 */
128 125
129static int __init zorro_init(void) 126static int __init amiga_zorro_probe(struct platform_device *pdev)
130{ 127{
131 struct zorro_dev *z; 128 struct zorro_bus *bus;
132 unsigned int i; 129 struct zorro_dev *z;
133 int error; 130 struct resource *r;
134 131 unsigned int i;
135 if (!MACH_IS_AMIGA || !AMIGAHW_PRESENT(ZORRO)) 132 int error;
136 return 0; 133
137 134 /* Initialize the Zorro bus */
138 pr_info("Zorro: Probing AutoConfig expansion devices: %d device%s\n", 135 bus = kzalloc(sizeof(*bus), GFP_KERNEL);
139 zorro_num_autocon, zorro_num_autocon == 1 ? "" : "s"); 136 if (!bus)
140 137 return -ENOMEM;
141 /* Initialize the Zorro bus */ 138
142 INIT_LIST_HEAD(&zorro_bus.devices); 139 INIT_LIST_HEAD(&bus->devices);
143 dev_set_name(&zorro_bus.dev, "zorro"); 140 bus->dev.parent = &pdev->dev;
144 error = device_register(&zorro_bus.dev); 141 dev_set_name(&bus->dev, "zorro");
145 if (error) { 142 error = device_register(&bus->dev);
146 pr_err("Zorro: Error registering zorro_bus\n");
147 return error;
148 }
149
150 /* Request the resources */
151 zorro_bus.num_resources = AMIGAHW_PRESENT(ZORRO3) ? 4 : 2;
152 for (i = 0; i < zorro_bus.num_resources; i++)
153 request_resource(&iomem_resource, &zorro_bus.resources[i]);
154
155 /* Register all devices */
156 for (i = 0; i < zorro_num_autocon; i++) {
157 z = &zorro_autocon[i];
158 z->id = (z->rom.er_Manufacturer<<16) | (z->rom.er_Product<<8);
159 if (z->id == ZORRO_PROD_GVP_EPC_BASE) {
160 /* GVP quirk */
161 unsigned long magic = zorro_resource_start(z)+0x8000;
162 z->id |= *(u16 *)ZTWO_VADDR(magic) & GVP_PRODMASK;
163 }
164 sprintf(z->name, "Zorro device %08x", z->id);
165 zorro_name_device(z);
166 z->resource.name = z->name;
167 if (request_resource(zorro_find_parent_resource(z), &z->resource))
168 pr_err("Zorro: Address space collision on device %s %pR\n",
169 z->name, &z->resource);
170 dev_set_name(&z->dev, "%02x", i);
171 z->dev.parent = &zorro_bus.dev;
172 z->dev.bus = &zorro_bus_type;
173 error = device_register(&z->dev);
174 if (error) { 143 if (error) {
175 pr_err("Zorro: Error registering device %s\n", z->name); 144 pr_err("Zorro: Error registering zorro_bus\n");
176 continue; 145 kfree(bus);
146 return error;
177 } 147 }
178 error = zorro_create_sysfs_dev_files(z); 148 platform_set_drvdata(pdev, bus);
179 if (error) 149
180 dev_err(&z->dev, "Error creating sysfs files\n"); 150 /* Register all devices */
181 } 151 pr_info("Zorro: Probing AutoConfig expansion devices: %u device%s\n",
182 152 zorro_num_autocon, zorro_num_autocon == 1 ? "" : "s");
183 /* Mark all available Zorro II memory */ 153
184 zorro_for_each_dev(z) { 154 for (i = 0; i < zorro_num_autocon; i++) {
185 if (z->rom.er_Type & ERTF_MEMLIST) 155 z = &zorro_autocon[i];
186 mark_region(zorro_resource_start(z), zorro_resource_end(z)+1, 1); 156 z->id = (z->rom.er_Manufacturer<<16) | (z->rom.er_Product<<8);
187 } 157 if (z->id == ZORRO_PROD_GVP_EPC_BASE) {
188 158 /* GVP quirk */
189 /* Unmark all used Zorro II memory */ 159 unsigned long magic = zorro_resource_start(z)+0x8000;
190 for (i = 0; i < m68k_num_memory; i++) 160 z->id |= *(u16 *)ZTWO_VADDR(magic) & GVP_PRODMASK;
191 if (m68k_memory[i].addr < 16*1024*1024) 161 }
192 mark_region(m68k_memory[i].addr, 162 sprintf(z->name, "Zorro device %08x", z->id);
193 m68k_memory[i].addr+m68k_memory[i].size, 0); 163 zorro_name_device(z);
194 164 z->resource.name = z->name;
195 return 0; 165 r = zorro_find_parent_resource(pdev, z);
166 error = request_resource(r, &z->resource);
167 if (error)
168 dev_err(&bus->dev,
169 "Address space collision on device %s %pR\n",
170 z->name, &z->resource);
171 dev_set_name(&z->dev, "%02x", i);
172 z->dev.parent = &bus->dev;
173 z->dev.bus = &zorro_bus_type;
174 error = device_register(&z->dev);
175 if (error) {
176 dev_err(&bus->dev, "Error registering device %s\n",
177 z->name);
178 continue;
179 }
180 error = zorro_create_sysfs_dev_files(z);
181 if (error)
182 dev_err(&z->dev, "Error creating sysfs files\n");
183 }
184
185 /* Mark all available Zorro II memory */
186 zorro_for_each_dev(z) {
187 if (z->rom.er_Type & ERTF_MEMLIST)
188 mark_region(zorro_resource_start(z),
189 zorro_resource_end(z)+1, 1);
190 }
191
192 /* Unmark all used Zorro II memory */
193 for (i = 0; i < m68k_num_memory; i++)
194 if (m68k_memory[i].addr < 16*1024*1024)
195 mark_region(m68k_memory[i].addr,
196 m68k_memory[i].addr+m68k_memory[i].size,
197 0);
198
199 return 0;
196} 200}
197 201
198subsys_initcall(zorro_init); 202static struct platform_driver amiga_zorro_driver = {
203 .driver = {
204 .name = "amiga-zorro",
205 .owner = THIS_MODULE,
206 },
207};
199 208
200EXPORT_SYMBOL(zorro_find_device); 209static int __init amiga_zorro_init(void)
201EXPORT_SYMBOL(zorro_unused_z2ram); 210{
211 return platform_driver_probe(&amiga_zorro_driver, amiga_zorro_probe);
212}
213
214module_init(amiga_zorro_init);
202 215
203MODULE_LICENSE("GPL"); 216MODULE_LICENSE("GPL");
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
index e84ef60ffe35..97a97839a867 100644
--- a/fs/btrfs/ioctl.c
+++ b/fs/btrfs/ioctl.c
@@ -1481,12 +1481,17 @@ static noinline long btrfs_ioctl_clone(struct file *file, unsigned long srcfd,
1481 ret = -EBADF; 1481 ret = -EBADF;
1482 goto out_drop_write; 1482 goto out_drop_write;
1483 } 1483 }
1484
1484 src = src_file->f_dentry->d_inode; 1485 src = src_file->f_dentry->d_inode;
1485 1486
1486 ret = -EINVAL; 1487 ret = -EINVAL;
1487 if (src == inode) 1488 if (src == inode)
1488 goto out_fput; 1489 goto out_fput;
1489 1490
1491 /* the src must be open for reading */
1492 if (!(src_file->f_mode & FMODE_READ))
1493 goto out_fput;
1494
1490 ret = -EISDIR; 1495 ret = -EISDIR;
1491 if (S_ISDIR(src->i_mode) || S_ISDIR(inode->i_mode)) 1496 if (S_ISDIR(src->i_mode) || S_ISDIR(inode->i_mode))
1492 goto out_fput; 1497 goto out_fput;
diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c
index a20bea598933..cfd1ce34e0bc 100644
--- a/fs/cifs/asn1.c
+++ b/fs/cifs/asn1.c
@@ -492,17 +492,13 @@ compare_oid(unsigned long *oid1, unsigned int oid1len,
492 492
493int 493int
494decode_negTokenInit(unsigned char *security_blob, int length, 494decode_negTokenInit(unsigned char *security_blob, int length,
495 enum securityEnum *secType) 495 struct TCP_Server_Info *server)
496{ 496{
497 struct asn1_ctx ctx; 497 struct asn1_ctx ctx;
498 unsigned char *end; 498 unsigned char *end;
499 unsigned char *sequence_end; 499 unsigned char *sequence_end;
500 unsigned long *oid = NULL; 500 unsigned long *oid = NULL;
501 unsigned int cls, con, tag, oidlen, rc; 501 unsigned int cls, con, tag, oidlen, rc;
502 bool use_ntlmssp = false;
503 bool use_kerberos = false;
504 bool use_kerberosu2u = false;
505 bool use_mskerberos = false;
506 502
507 /* cifs_dump_mem(" Received SecBlob ", security_blob, length); */ 503 /* cifs_dump_mem(" Received SecBlob ", security_blob, length); */
508 504
@@ -510,11 +506,11 @@ decode_negTokenInit(unsigned char *security_blob, int length,
510 506
511 /* GSSAPI header */ 507 /* GSSAPI header */
512 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 508 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
513 cFYI(1, ("Error decoding negTokenInit header")); 509 cFYI(1, "Error decoding negTokenInit header");
514 return 0; 510 return 0;
515 } else if ((cls != ASN1_APL) || (con != ASN1_CON) 511 } else if ((cls != ASN1_APL) || (con != ASN1_CON)
516 || (tag != ASN1_EOC)) { 512 || (tag != ASN1_EOC)) {
517 cFYI(1, ("cls = %d con = %d tag = %d", cls, con, tag)); 513 cFYI(1, "cls = %d con = %d tag = %d", cls, con, tag);
518 return 0; 514 return 0;
519 } 515 }
520 516
@@ -535,56 +531,52 @@ decode_negTokenInit(unsigned char *security_blob, int length,
535 531
536 /* SPNEGO OID not present or garbled -- bail out */ 532 /* SPNEGO OID not present or garbled -- bail out */
537 if (!rc) { 533 if (!rc) {
538 cFYI(1, ("Error decoding negTokenInit header")); 534 cFYI(1, "Error decoding negTokenInit header");
539 return 0; 535 return 0;
540 } 536 }
541 537
542 /* SPNEGO */ 538 /* SPNEGO */
543 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 539 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
544 cFYI(1, ("Error decoding negTokenInit")); 540 cFYI(1, "Error decoding negTokenInit");
545 return 0; 541 return 0;
546 } else if ((cls != ASN1_CTX) || (con != ASN1_CON) 542 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)
547 || (tag != ASN1_EOC)) { 543 || (tag != ASN1_EOC)) {
548 cFYI(1, 544 cFYI(1, "cls = %d con = %d tag = %d end = %p (%d) exit 0",
549 ("cls = %d con = %d tag = %d end = %p (%d) exit 0", 545 cls, con, tag, end, *end);
550 cls, con, tag, end, *end));
551 return 0; 546 return 0;
552 } 547 }
553 548
554 /* negTokenInit */ 549 /* negTokenInit */
555 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 550 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
556 cFYI(1, ("Error decoding negTokenInit")); 551 cFYI(1, "Error decoding negTokenInit");
557 return 0; 552 return 0;
558 } else if ((cls != ASN1_UNI) || (con != ASN1_CON) 553 } else if ((cls != ASN1_UNI) || (con != ASN1_CON)
559 || (tag != ASN1_SEQ)) { 554 || (tag != ASN1_SEQ)) {
560 cFYI(1, 555 cFYI(1, "cls = %d con = %d tag = %d end = %p (%d) exit 1",
561 ("cls = %d con = %d tag = %d end = %p (%d) exit 1", 556 cls, con, tag, end, *end);
562 cls, con, tag, end, *end));
563 return 0; 557 return 0;
564 } 558 }
565 559
566 /* sequence */ 560 /* sequence */
567 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 561 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
568 cFYI(1, ("Error decoding 2nd part of negTokenInit")); 562 cFYI(1, "Error decoding 2nd part of negTokenInit");
569 return 0; 563 return 0;
570 } else if ((cls != ASN1_CTX) || (con != ASN1_CON) 564 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)
571 || (tag != ASN1_EOC)) { 565 || (tag != ASN1_EOC)) {
572 cFYI(1, 566 cFYI(1, "cls = %d con = %d tag = %d end = %p (%d) exit 0",
573 ("cls = %d con = %d tag = %d end = %p (%d) exit 0", 567 cls, con, tag, end, *end);
574 cls, con, tag, end, *end));
575 return 0; 568 return 0;
576 } 569 }
577 570
578 /* sequence of */ 571 /* sequence of */
579 if (asn1_header_decode 572 if (asn1_header_decode
580 (&ctx, &sequence_end, &cls, &con, &tag) == 0) { 573 (&ctx, &sequence_end, &cls, &con, &tag) == 0) {
581 cFYI(1, ("Error decoding 2nd part of negTokenInit")); 574 cFYI(1, "Error decoding 2nd part of negTokenInit");
582 return 0; 575 return 0;
583 } else if ((cls != ASN1_UNI) || (con != ASN1_CON) 576 } else if ((cls != ASN1_UNI) || (con != ASN1_CON)
584 || (tag != ASN1_SEQ)) { 577 || (tag != ASN1_SEQ)) {
585 cFYI(1, 578 cFYI(1, "cls = %d con = %d tag = %d end = %p (%d) exit 1",
586 ("cls = %d con = %d tag = %d end = %p (%d) exit 1", 579 cls, con, tag, end, *end);
587 cls, con, tag, end, *end));
588 return 0; 580 return 0;
589 } 581 }
590 582
@@ -592,37 +584,33 @@ decode_negTokenInit(unsigned char *security_blob, int length,
592 while (!asn1_eoc_decode(&ctx, sequence_end)) { 584 while (!asn1_eoc_decode(&ctx, sequence_end)) {
593 rc = asn1_header_decode(&ctx, &end, &cls, &con, &tag); 585 rc = asn1_header_decode(&ctx, &end, &cls, &con, &tag);
594 if (!rc) { 586 if (!rc) {
595 cFYI(1, 587 cFYI(1, "Error decoding negTokenInit hdr exit2");
596 ("Error decoding negTokenInit hdr exit2"));
597 return 0; 588 return 0;
598 } 589 }
599 if ((tag == ASN1_OJI) && (con == ASN1_PRI)) { 590 if ((tag == ASN1_OJI) && (con == ASN1_PRI)) {
600 if (asn1_oid_decode(&ctx, end, &oid, &oidlen)) { 591 if (asn1_oid_decode(&ctx, end, &oid, &oidlen)) {
601 592
602 cFYI(1, ("OID len = %d oid = 0x%lx 0x%lx " 593 cFYI(1, "OID len = %d oid = 0x%lx 0x%lx "
603 "0x%lx 0x%lx", oidlen, *oid, 594 "0x%lx 0x%lx", oidlen, *oid,
604 *(oid + 1), *(oid + 2), *(oid + 3))); 595 *(oid + 1), *(oid + 2), *(oid + 3));
605 596
606 if (compare_oid(oid, oidlen, MSKRB5_OID, 597 if (compare_oid(oid, oidlen, MSKRB5_OID,
607 MSKRB5_OID_LEN) && 598 MSKRB5_OID_LEN))
608 !use_mskerberos) 599 server->sec_mskerberos = true;
609 use_mskerberos = true;
610 else if (compare_oid(oid, oidlen, KRB5U2U_OID, 600 else if (compare_oid(oid, oidlen, KRB5U2U_OID,
611 KRB5U2U_OID_LEN) && 601 KRB5U2U_OID_LEN))
612 !use_kerberosu2u) 602 server->sec_kerberosu2u = true;
613 use_kerberosu2u = true;
614 else if (compare_oid(oid, oidlen, KRB5_OID, 603 else if (compare_oid(oid, oidlen, KRB5_OID,
615 KRB5_OID_LEN) && 604 KRB5_OID_LEN))
616 !use_kerberos) 605 server->sec_kerberos = true;
617 use_kerberos = true;
618 else if (compare_oid(oid, oidlen, NTLMSSP_OID, 606 else if (compare_oid(oid, oidlen, NTLMSSP_OID,
619 NTLMSSP_OID_LEN)) 607 NTLMSSP_OID_LEN))
620 use_ntlmssp = true; 608 server->sec_ntlmssp = true;
621 609
622 kfree(oid); 610 kfree(oid);
623 } 611 }
624 } else { 612 } else {
625 cFYI(1, ("Should be an oid what is going on?")); 613 cFYI(1, "Should be an oid what is going on?");
626 } 614 }
627 } 615 }
628 616
@@ -632,54 +620,47 @@ decode_negTokenInit(unsigned char *security_blob, int length,
632 no mechListMic (e.g. NTLMSSP instead of KRB5) */ 620 no mechListMic (e.g. NTLMSSP instead of KRB5) */
633 if (ctx.error == ASN1_ERR_DEC_EMPTY) 621 if (ctx.error == ASN1_ERR_DEC_EMPTY)
634 goto decode_negtoken_exit; 622 goto decode_negtoken_exit;
635 cFYI(1, ("Error decoding last part negTokenInit exit3")); 623 cFYI(1, "Error decoding last part negTokenInit exit3");
636 return 0; 624 return 0;
637 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) { 625 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) {
638 /* tag = 3 indicating mechListMIC */ 626 /* tag = 3 indicating mechListMIC */
639 cFYI(1, ("Exit 4 cls = %d con = %d tag = %d end = %p (%d)", 627 cFYI(1, "Exit 4 cls = %d con = %d tag = %d end = %p (%d)",
640 cls, con, tag, end, *end)); 628 cls, con, tag, end, *end);
641 return 0; 629 return 0;
642 } 630 }
643 631
644 /* sequence */ 632 /* sequence */
645 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 633 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
646 cFYI(1, ("Error decoding last part negTokenInit exit5")); 634 cFYI(1, "Error decoding last part negTokenInit exit5");
647 return 0; 635 return 0;
648 } else if ((cls != ASN1_UNI) || (con != ASN1_CON) 636 } else if ((cls != ASN1_UNI) || (con != ASN1_CON)
649 || (tag != ASN1_SEQ)) { 637 || (tag != ASN1_SEQ)) {
650 cFYI(1, ("cls = %d con = %d tag = %d end = %p (%d)", 638 cFYI(1, "cls = %d con = %d tag = %d end = %p (%d)",
651 cls, con, tag, end, *end)); 639 cls, con, tag, end, *end);
652 } 640 }
653 641
654 /* sequence of */ 642 /* sequence of */
655 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 643 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
656 cFYI(1, ("Error decoding last part negTokenInit exit 7")); 644 cFYI(1, "Error decoding last part negTokenInit exit 7");
657 return 0; 645 return 0;
658 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) { 646 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) {
659 cFYI(1, ("Exit 8 cls = %d con = %d tag = %d end = %p (%d)", 647 cFYI(1, "Exit 8 cls = %d con = %d tag = %d end = %p (%d)",
660 cls, con, tag, end, *end)); 648 cls, con, tag, end, *end);
661 return 0; 649 return 0;
662 } 650 }
663 651
664 /* general string */ 652 /* general string */
665 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 653 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
666 cFYI(1, ("Error decoding last part negTokenInit exit9")); 654 cFYI(1, "Error decoding last part negTokenInit exit9");
667 return 0; 655 return 0;
668 } else if ((cls != ASN1_UNI) || (con != ASN1_PRI) 656 } else if ((cls != ASN1_UNI) || (con != ASN1_PRI)
669 || (tag != ASN1_GENSTR)) { 657 || (tag != ASN1_GENSTR)) {
670 cFYI(1, ("Exit10 cls = %d con = %d tag = %d end = %p (%d)", 658 cFYI(1, "Exit10 cls = %d con = %d tag = %d end = %p (%d)",
671 cls, con, tag, end, *end)); 659 cls, con, tag, end, *end);
672 return 0; 660 return 0;
673 } 661 }
674 cFYI(1, ("Need to call asn1_octets_decode() function for %s", 662 cFYI(1, "Need to call asn1_octets_decode() function for %s",
675 ctx.pointer)); /* is this UTF-8 or ASCII? */ 663 ctx.pointer); /* is this UTF-8 or ASCII? */
676decode_negtoken_exit: 664decode_negtoken_exit:
677 if (use_kerberos)
678 *secType = Kerberos;
679 else if (use_mskerberos)
680 *secType = MSKerberos;
681 else if (use_ntlmssp)
682 *secType = RawNTLMSSP;
683
684 return 1; 665 return 1;
685} 666}
diff --git a/fs/cifs/cifs_debug.c b/fs/cifs/cifs_debug.c
index 42cec2a7c0cf..4fce6e61b34e 100644
--- a/fs/cifs/cifs_debug.c
+++ b/fs/cifs/cifs_debug.c
@@ -60,10 +60,10 @@ cifs_dump_mem(char *label, void *data, int length)
60#ifdef CONFIG_CIFS_DEBUG2 60#ifdef CONFIG_CIFS_DEBUG2
61void cifs_dump_detail(struct smb_hdr *smb) 61void cifs_dump_detail(struct smb_hdr *smb)
62{ 62{
63 cERROR(1, ("Cmd: %d Err: 0x%x Flags: 0x%x Flgs2: 0x%x Mid: %d Pid: %d", 63 cERROR(1, "Cmd: %d Err: 0x%x Flags: 0x%x Flgs2: 0x%x Mid: %d Pid: %d",
64 smb->Command, smb->Status.CifsError, 64 smb->Command, smb->Status.CifsError,
65 smb->Flags, smb->Flags2, smb->Mid, smb->Pid)); 65 smb->Flags, smb->Flags2, smb->Mid, smb->Pid);
66 cERROR(1, ("smb buf %p len %d", smb, smbCalcSize_LE(smb))); 66 cERROR(1, "smb buf %p len %d", smb, smbCalcSize_LE(smb));
67} 67}
68 68
69 69
@@ -75,25 +75,25 @@ void cifs_dump_mids(struct TCP_Server_Info *server)
75 if (server == NULL) 75 if (server == NULL)
76 return; 76 return;
77 77
78 cERROR(1, ("Dump pending requests:")); 78 cERROR(1, "Dump pending requests:");
79 spin_lock(&GlobalMid_Lock); 79 spin_lock(&GlobalMid_Lock);
80 list_for_each(tmp, &server->pending_mid_q) { 80 list_for_each(tmp, &server->pending_mid_q) {
81 mid_entry = list_entry(tmp, struct mid_q_entry, qhead); 81 mid_entry = list_entry(tmp, struct mid_q_entry, qhead);
82 cERROR(1, ("State: %d Cmd: %d Pid: %d Tsk: %p Mid %d", 82 cERROR(1, "State: %d Cmd: %d Pid: %d Tsk: %p Mid %d",
83 mid_entry->midState, 83 mid_entry->midState,
84 (int)mid_entry->command, 84 (int)mid_entry->command,
85 mid_entry->pid, 85 mid_entry->pid,
86 mid_entry->tsk, 86 mid_entry->tsk,
87 mid_entry->mid)); 87 mid_entry->mid);
88#ifdef CONFIG_CIFS_STATS2 88#ifdef CONFIG_CIFS_STATS2
89 cERROR(1, ("IsLarge: %d buf: %p time rcv: %ld now: %ld", 89 cERROR(1, "IsLarge: %d buf: %p time rcv: %ld now: %ld",
90 mid_entry->largeBuf, 90 mid_entry->largeBuf,
91 mid_entry->resp_buf, 91 mid_entry->resp_buf,
92 mid_entry->when_received, 92 mid_entry->when_received,
93 jiffies)); 93 jiffies);
94#endif /* STATS2 */ 94#endif /* STATS2 */
95 cERROR(1, ("IsMult: %d IsEnd: %d", mid_entry->multiRsp, 95 cERROR(1, "IsMult: %d IsEnd: %d", mid_entry->multiRsp,
96 mid_entry->multiEnd)); 96 mid_entry->multiEnd);
97 if (mid_entry->resp_buf) { 97 if (mid_entry->resp_buf) {
98 cifs_dump_detail(mid_entry->resp_buf); 98 cifs_dump_detail(mid_entry->resp_buf);
99 cifs_dump_mem("existing buf: ", 99 cifs_dump_mem("existing buf: ",
@@ -716,7 +716,7 @@ static const struct file_operations cifs_multiuser_mount_proc_fops = {
716 716
717static int cifs_security_flags_proc_show(struct seq_file *m, void *v) 717static int cifs_security_flags_proc_show(struct seq_file *m, void *v)
718{ 718{
719 seq_printf(m, "0x%x\n", extended_security); 719 seq_printf(m, "0x%x\n", global_secflags);
720 return 0; 720 return 0;
721} 721}
722 722
@@ -744,13 +744,13 @@ static ssize_t cifs_security_flags_proc_write(struct file *file,
744 /* single char or single char followed by null */ 744 /* single char or single char followed by null */
745 c = flags_string[0]; 745 c = flags_string[0];
746 if (c == '0' || c == 'n' || c == 'N') { 746 if (c == '0' || c == 'n' || c == 'N') {
747 extended_security = CIFSSEC_DEF; /* default */ 747 global_secflags = CIFSSEC_DEF; /* default */
748 return count; 748 return count;
749 } else if (c == '1' || c == 'y' || c == 'Y') { 749 } else if (c == '1' || c == 'y' || c == 'Y') {
750 extended_security = CIFSSEC_MAX; 750 global_secflags = CIFSSEC_MAX;
751 return count; 751 return count;
752 } else if (!isdigit(c)) { 752 } else if (!isdigit(c)) {
753 cERROR(1, ("invalid flag %c", c)); 753 cERROR(1, "invalid flag %c", c);
754 return -EINVAL; 754 return -EINVAL;
755 } 755 }
756 } 756 }
@@ -758,26 +758,26 @@ static ssize_t cifs_security_flags_proc_write(struct file *file,
758 758
759 flags = simple_strtoul(flags_string, NULL, 0); 759 flags = simple_strtoul(flags_string, NULL, 0);
760 760
761 cFYI(1, ("sec flags 0x%x", flags)); 761 cFYI(1, "sec flags 0x%x", flags);
762 762
763 if (flags <= 0) { 763 if (flags <= 0) {
764 cERROR(1, ("invalid security flags %s", flags_string)); 764 cERROR(1, "invalid security flags %s", flags_string);
765 return -EINVAL; 765 return -EINVAL;
766 } 766 }
767 767
768 if (flags & ~CIFSSEC_MASK) { 768 if (flags & ~CIFSSEC_MASK) {
769 cERROR(1, ("attempt to set unsupported security flags 0x%x", 769 cERROR(1, "attempt to set unsupported security flags 0x%x",
770 flags & ~CIFSSEC_MASK)); 770 flags & ~CIFSSEC_MASK);
771 return -EINVAL; 771 return -EINVAL;
772 } 772 }
773 /* flags look ok - update the global security flags for cifs module */ 773 /* flags look ok - update the global security flags for cifs module */
774 extended_security = flags; 774 global_secflags = flags;
775 if (extended_security & CIFSSEC_MUST_SIGN) { 775 if (global_secflags & CIFSSEC_MUST_SIGN) {
776 /* requiring signing implies signing is allowed */ 776 /* requiring signing implies signing is allowed */
777 extended_security |= CIFSSEC_MAY_SIGN; 777 global_secflags |= CIFSSEC_MAY_SIGN;
778 cFYI(1, ("packet signing now required")); 778 cFYI(1, "packet signing now required");
779 } else if ((extended_security & CIFSSEC_MAY_SIGN) == 0) { 779 } else if ((global_secflags & CIFSSEC_MAY_SIGN) == 0) {
780 cFYI(1, ("packet signing disabled")); 780 cFYI(1, "packet signing disabled");
781 } 781 }
782 /* BB should we turn on MAY flags for other MUST options? */ 782 /* BB should we turn on MAY flags for other MUST options? */
783 return count; 783 return count;
diff --git a/fs/cifs/cifs_debug.h b/fs/cifs/cifs_debug.h
index 5eb3b83bbfa7..aa316891ac0c 100644
--- a/fs/cifs/cifs_debug.h
+++ b/fs/cifs/cifs_debug.h
@@ -43,34 +43,54 @@ void dump_smb(struct smb_hdr *, int);
43 */ 43 */
44#ifdef CIFS_DEBUG 44#ifdef CIFS_DEBUG
45 45
46
47/* information message: e.g., configuration, major event */ 46/* information message: e.g., configuration, major event */
48extern int cifsFYI; 47extern int cifsFYI;
49#define cifsfyi(format,arg...) if (cifsFYI & CIFS_INFO) printk(KERN_DEBUG " " __FILE__ ": " format "\n" "" , ## arg) 48#define cifsfyi(fmt, arg...) \
49do { \
50 if (cifsFYI & CIFS_INFO) \
51 printk(KERN_DEBUG "%s: " fmt "\n", __FILE__, ##arg); \
52} while (0)
50 53
51#define cFYI(button,prspec) if (button) cifsfyi prspec 54#define cFYI(set, fmt, arg...) \
55do { \
56 if (set) \
57 cifsfyi(fmt, ##arg); \
58} while (0)
52 59
53#define cifswarn(format, arg...) printk(KERN_WARNING ": " format "\n" , ## arg) 60#define cifswarn(fmt, arg...) \
61 printk(KERN_WARNING fmt "\n", ##arg)
54 62
55/* debug event message: */ 63/* debug event message: */
56extern int cifsERROR; 64extern int cifsERROR;
57 65
58#define cEVENT(format,arg...) if (cifsERROR) printk(KERN_EVENT __FILE__ ": " format "\n" , ## arg) 66#define cEVENT(fmt, arg...) \
67do { \
68 if (cifsERROR) \
69 printk(KERN_EVENT "%s: " fmt "\n", __FILE__, ##arg); \
70} while (0)
59 71
60/* error event message: e.g., i/o error */ 72/* error event message: e.g., i/o error */
61#define cifserror(format,arg...) if (cifsERROR) printk(KERN_ERR " CIFS VFS: " format "\n" "" , ## arg) 73#define cifserror(fmt, arg...) \
74do { \
75 if (cifsERROR) \
76 printk(KERN_ERR "CIFS VFS: " fmt "\n", ##arg); \
77} while (0)
62 78
63#define cERROR(button, prspec) if (button) cifserror prspec 79#define cERROR(set, fmt, arg...) \
80do { \
81 if (set) \
82 cifserror(fmt, ##arg); \
83} while (0)
64 84
65/* 85/*
66 * debug OFF 86 * debug OFF
67 * --------- 87 * ---------
68 */ 88 */
69#else /* _CIFS_DEBUG */ 89#else /* _CIFS_DEBUG */
70#define cERROR(button, prspec) 90#define cERROR(set, fmt, arg...)
71#define cEVENT(format, arg...) 91#define cEVENT(fmt, arg...)
72#define cFYI(button, prspec) 92#define cFYI(set, fmt, arg...)
73#define cifserror(format, arg...) 93#define cifserror(fmt, arg...)
74#endif /* _CIFS_DEBUG */ 94#endif /* _CIFS_DEBUG */
75 95
76#endif /* _H_CIFS_DEBUG */ 96#endif /* _H_CIFS_DEBUG */
diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c
index 78e4d2a3a68b..ac19a6f3dae0 100644
--- a/fs/cifs/cifs_dfs_ref.c
+++ b/fs/cifs/cifs_dfs_ref.c
@@ -85,8 +85,8 @@ static char *cifs_get_share_name(const char *node_name)
85 /* find server name end */ 85 /* find server name end */
86 pSep = memchr(UNC+2, '\\', len-2); 86 pSep = memchr(UNC+2, '\\', len-2);
87 if (!pSep) { 87 if (!pSep) {
88 cERROR(1, ("%s: no server name end in node name: %s", 88 cERROR(1, "%s: no server name end in node name: %s",
89 __func__, node_name)); 89 __func__, node_name);
90 kfree(UNC); 90 kfree(UNC);
91 return ERR_PTR(-EINVAL); 91 return ERR_PTR(-EINVAL);
92 } 92 }
@@ -142,8 +142,8 @@ char *cifs_compose_mount_options(const char *sb_mountdata,
142 142
143 rc = dns_resolve_server_name_to_ip(*devname, &srvIP); 143 rc = dns_resolve_server_name_to_ip(*devname, &srvIP);
144 if (rc != 0) { 144 if (rc != 0) {
145 cERROR(1, ("%s: Failed to resolve server part of %s to IP: %d", 145 cERROR(1, "%s: Failed to resolve server part of %s to IP: %d",
146 __func__, *devname, rc)); 146 __func__, *devname, rc);
147 goto compose_mount_options_err; 147 goto compose_mount_options_err;
148 } 148 }
149 /* md_len = strlen(...) + 12 for 'sep+prefixpath=' 149 /* md_len = strlen(...) + 12 for 'sep+prefixpath='
@@ -217,8 +217,8 @@ char *cifs_compose_mount_options(const char *sb_mountdata,
217 strcat(mountdata, fullpath + ref->path_consumed); 217 strcat(mountdata, fullpath + ref->path_consumed);
218 } 218 }
219 219
220 /*cFYI(1,("%s: parent mountdata: %s", __func__,sb_mountdata));*/ 220 /*cFYI(1, "%s: parent mountdata: %s", __func__,sb_mountdata);*/
221 /*cFYI(1, ("%s: submount mountdata: %s", __func__, mountdata ));*/ 221 /*cFYI(1, "%s: submount mountdata: %s", __func__, mountdata );*/
222 222
223compose_mount_options_out: 223compose_mount_options_out:
224 kfree(srvIP); 224 kfree(srvIP);
@@ -294,11 +294,11 @@ static int add_mount_helper(struct vfsmount *newmnt, struct nameidata *nd,
294 294
295static void dump_referral(const struct dfs_info3_param *ref) 295static void dump_referral(const struct dfs_info3_param *ref)
296{ 296{
297 cFYI(1, ("DFS: ref path: %s", ref->path_name)); 297 cFYI(1, "DFS: ref path: %s", ref->path_name);
298 cFYI(1, ("DFS: node path: %s", ref->node_name)); 298 cFYI(1, "DFS: node path: %s", ref->node_name);
299 cFYI(1, ("DFS: fl: %hd, srv_type: %hd", ref->flags, ref->server_type)); 299 cFYI(1, "DFS: fl: %hd, srv_type: %hd", ref->flags, ref->server_type);
300 cFYI(1, ("DFS: ref_flags: %hd, path_consumed: %hd", ref->ref_flag, 300 cFYI(1, "DFS: ref_flags: %hd, path_consumed: %hd", ref->ref_flag,
301 ref->path_consumed)); 301 ref->path_consumed);
302} 302}
303 303
304 304
@@ -314,7 +314,7 @@ cifs_dfs_follow_mountpoint(struct dentry *dentry, struct nameidata *nd)
314 int rc = 0; 314 int rc = 0;
315 struct vfsmount *mnt = ERR_PTR(-ENOENT); 315 struct vfsmount *mnt = ERR_PTR(-ENOENT);
316 316
317 cFYI(1, ("in %s", __func__)); 317 cFYI(1, "in %s", __func__);
318 BUG_ON(IS_ROOT(dentry)); 318 BUG_ON(IS_ROOT(dentry));
319 319
320 xid = GetXid(); 320 xid = GetXid();
@@ -352,15 +352,15 @@ cifs_dfs_follow_mountpoint(struct dentry *dentry, struct nameidata *nd)
352 /* connect to a node */ 352 /* connect to a node */
353 len = strlen(referrals[i].node_name); 353 len = strlen(referrals[i].node_name);
354 if (len < 2) { 354 if (len < 2) {
355 cERROR(1, ("%s: Net Address path too short: %s", 355 cERROR(1, "%s: Net Address path too short: %s",
356 __func__, referrals[i].node_name)); 356 __func__, referrals[i].node_name);
357 rc = -EINVAL; 357 rc = -EINVAL;
358 goto out_err; 358 goto out_err;
359 } 359 }
360 mnt = cifs_dfs_do_refmount(nd->path.mnt, 360 mnt = cifs_dfs_do_refmount(nd->path.mnt,
361 nd->path.dentry, referrals + i); 361 nd->path.dentry, referrals + i);
362 cFYI(1, ("%s: cifs_dfs_do_refmount:%s , mnt:%p", __func__, 362 cFYI(1, "%s: cifs_dfs_do_refmount:%s , mnt:%p", __func__,
363 referrals[i].node_name, mnt)); 363 referrals[i].node_name, mnt);
364 364
365 /* complete mount procedure if we accured submount */ 365 /* complete mount procedure if we accured submount */
366 if (!IS_ERR(mnt)) 366 if (!IS_ERR(mnt))
@@ -378,7 +378,7 @@ out:
378 FreeXid(xid); 378 FreeXid(xid);
379 free_dfs_info_array(referrals, num_referrals); 379 free_dfs_info_array(referrals, num_referrals);
380 kfree(full_path); 380 kfree(full_path);
381 cFYI(1, ("leaving %s" , __func__)); 381 cFYI(1, "leaving %s" , __func__);
382 return ERR_PTR(rc); 382 return ERR_PTR(rc);
383out_err: 383out_err:
384 path_put(&nd->path); 384 path_put(&nd->path);
diff --git a/fs/cifs/cifs_spnego.c b/fs/cifs/cifs_spnego.c
index 310d12f69a92..379bd7d9c05f 100644
--- a/fs/cifs/cifs_spnego.c
+++ b/fs/cifs/cifs_spnego.c
@@ -133,9 +133,9 @@ cifs_get_spnego_key(struct cifsSesInfo *sesInfo)
133 dp = description + strlen(description); 133 dp = description + strlen(description);
134 134
135 /* for now, only sec=krb5 and sec=mskrb5 are valid */ 135 /* for now, only sec=krb5 and sec=mskrb5 are valid */
136 if (server->secType == Kerberos) 136 if (server->sec_kerberos)
137 sprintf(dp, ";sec=krb5"); 137 sprintf(dp, ";sec=krb5");
138 else if (server->secType == MSKerberos) 138 else if (server->sec_mskerberos)
139 sprintf(dp, ";sec=mskrb5"); 139 sprintf(dp, ";sec=mskrb5");
140 else 140 else
141 goto out; 141 goto out;
@@ -149,7 +149,7 @@ cifs_get_spnego_key(struct cifsSesInfo *sesInfo)
149 dp = description + strlen(description); 149 dp = description + strlen(description);
150 sprintf(dp, ";pid=0x%x", current->pid); 150 sprintf(dp, ";pid=0x%x", current->pid);
151 151
152 cFYI(1, ("key description = %s", description)); 152 cFYI(1, "key description = %s", description);
153 spnego_key = request_key(&cifs_spnego_key_type, description, ""); 153 spnego_key = request_key(&cifs_spnego_key_type, description, "");
154 154
155#ifdef CONFIG_CIFS_DEBUG2 155#ifdef CONFIG_CIFS_DEBUG2
diff --git a/fs/cifs/cifs_unicode.c b/fs/cifs/cifs_unicode.c
index d07676bd76d2..430f510a1720 100644
--- a/fs/cifs/cifs_unicode.c
+++ b/fs/cifs/cifs_unicode.c
@@ -200,9 +200,8 @@ cifs_strtoUCS(__le16 *to, const char *from, int len,
200 /* works for 2.4.0 kernel or later */ 200 /* works for 2.4.0 kernel or later */
201 charlen = codepage->char2uni(from, len, &wchar_to[i]); 201 charlen = codepage->char2uni(from, len, &wchar_to[i]);
202 if (charlen < 1) { 202 if (charlen < 1) {
203 cERROR(1, 203 cERROR(1, "strtoUCS: char2uni of %d returned %d",
204 ("strtoUCS: char2uni of %d returned %d", 204 (int)*from, charlen);
205 (int)*from, charlen));
206 /* A question mark */ 205 /* A question mark */
207 to[i] = cpu_to_le16(0x003f); 206 to[i] = cpu_to_le16(0x003f);
208 charlen = 1; 207 charlen = 1;
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c
index 9b716d044bbd..85d7cf7ff2c8 100644
--- a/fs/cifs/cifsacl.c
+++ b/fs/cifs/cifsacl.c
@@ -87,11 +87,11 @@ int match_sid(struct cifs_sid *ctsid)
87 continue; /* all sub_auth values do not match */ 87 continue; /* all sub_auth values do not match */
88 } 88 }
89 89
90 cFYI(1, ("matching sid: %s\n", wksidarr[i].sidname)); 90 cFYI(1, "matching sid: %s\n", wksidarr[i].sidname);
91 return 0; /* sids compare/match */ 91 return 0; /* sids compare/match */
92 } 92 }
93 93
94 cFYI(1, ("No matching sid")); 94 cFYI(1, "No matching sid");
95 return -1; 95 return -1;
96} 96}
97 97
@@ -208,14 +208,14 @@ static void access_flags_to_mode(__le32 ace_flags, int type, umode_t *pmode,
208 *pbits_to_set &= ~S_IXUGO; 208 *pbits_to_set &= ~S_IXUGO;
209 return; 209 return;
210 } else if (type != ACCESS_ALLOWED) { 210 } else if (type != ACCESS_ALLOWED) {
211 cERROR(1, ("unknown access control type %d", type)); 211 cERROR(1, "unknown access control type %d", type);
212 return; 212 return;
213 } 213 }
214 /* else ACCESS_ALLOWED type */ 214 /* else ACCESS_ALLOWED type */
215 215
216 if (flags & GENERIC_ALL) { 216 if (flags & GENERIC_ALL) {
217 *pmode |= (S_IRWXUGO & (*pbits_to_set)); 217 *pmode |= (S_IRWXUGO & (*pbits_to_set));
218 cFYI(DBG2, ("all perms")); 218 cFYI(DBG2, "all perms");
219 return; 219 return;
220 } 220 }
221 if ((flags & GENERIC_WRITE) || 221 if ((flags & GENERIC_WRITE) ||
@@ -228,7 +228,7 @@ static void access_flags_to_mode(__le32 ace_flags, int type, umode_t *pmode,
228 ((flags & FILE_EXEC_RIGHTS) == FILE_EXEC_RIGHTS)) 228 ((flags & FILE_EXEC_RIGHTS) == FILE_EXEC_RIGHTS))
229 *pmode |= (S_IXUGO & (*pbits_to_set)); 229 *pmode |= (S_IXUGO & (*pbits_to_set));
230 230
231 cFYI(DBG2, ("access flags 0x%x mode now 0x%x", flags, *pmode)); 231 cFYI(DBG2, "access flags 0x%x mode now 0x%x", flags, *pmode);
232 return; 232 return;
233} 233}
234 234
@@ -257,7 +257,7 @@ static void mode_to_access_flags(umode_t mode, umode_t bits_to_use,
257 if (mode & S_IXUGO) 257 if (mode & S_IXUGO)
258 *pace_flags |= SET_FILE_EXEC_RIGHTS; 258 *pace_flags |= SET_FILE_EXEC_RIGHTS;
259 259
260 cFYI(DBG2, ("mode: 0x%x, access flags now 0x%x", mode, *pace_flags)); 260 cFYI(DBG2, "mode: 0x%x, access flags now 0x%x", mode, *pace_flags);
261 return; 261 return;
262} 262}
263 263
@@ -297,24 +297,24 @@ static void dump_ace(struct cifs_ace *pace, char *end_of_acl)
297 /* validate that we do not go past end of acl */ 297 /* validate that we do not go past end of acl */
298 298
299 if (le16_to_cpu(pace->size) < 16) { 299 if (le16_to_cpu(pace->size) < 16) {
300 cERROR(1, ("ACE too small, %d", le16_to_cpu(pace->size))); 300 cERROR(1, "ACE too small %d", le16_to_cpu(pace->size));
301 return; 301 return;
302 } 302 }
303 303
304 if (end_of_acl < (char *)pace + le16_to_cpu(pace->size)) { 304 if (end_of_acl < (char *)pace + le16_to_cpu(pace->size)) {
305 cERROR(1, ("ACL too small to parse ACE")); 305 cERROR(1, "ACL too small to parse ACE");
306 return; 306 return;
307 } 307 }
308 308
309 num_subauth = pace->sid.num_subauth; 309 num_subauth = pace->sid.num_subauth;
310 if (num_subauth) { 310 if (num_subauth) {
311 int i; 311 int i;
312 cFYI(1, ("ACE revision %d num_auth %d type %d flags %d size %d", 312 cFYI(1, "ACE revision %d num_auth %d type %d flags %d size %d",
313 pace->sid.revision, pace->sid.num_subauth, pace->type, 313 pace->sid.revision, pace->sid.num_subauth, pace->type,
314 pace->flags, le16_to_cpu(pace->size))); 314 pace->flags, le16_to_cpu(pace->size));
315 for (i = 0; i < num_subauth; ++i) { 315 for (i = 0; i < num_subauth; ++i) {
316 cFYI(1, ("ACE sub_auth[%d]: 0x%x", i, 316 cFYI(1, "ACE sub_auth[%d]: 0x%x", i,
317 le32_to_cpu(pace->sid.sub_auth[i]))); 317 le32_to_cpu(pace->sid.sub_auth[i]));
318 } 318 }
319 319
320 /* BB add length check to make sure that we do not have huge 320 /* BB add length check to make sure that we do not have huge
@@ -347,13 +347,13 @@ static void parse_dacl(struct cifs_acl *pdacl, char *end_of_acl,
347 347
348 /* validate that we do not go past end of acl */ 348 /* validate that we do not go past end of acl */
349 if (end_of_acl < (char *)pdacl + le16_to_cpu(pdacl->size)) { 349 if (end_of_acl < (char *)pdacl + le16_to_cpu(pdacl->size)) {
350 cERROR(1, ("ACL too small to parse DACL")); 350 cERROR(1, "ACL too small to parse DACL");
351 return; 351 return;
352 } 352 }
353 353
354 cFYI(DBG2, ("DACL revision %d size %d num aces %d", 354 cFYI(DBG2, "DACL revision %d size %d num aces %d",
355 le16_to_cpu(pdacl->revision), le16_to_cpu(pdacl->size), 355 le16_to_cpu(pdacl->revision), le16_to_cpu(pdacl->size),
356 le32_to_cpu(pdacl->num_aces))); 356 le32_to_cpu(pdacl->num_aces));
357 357
358 /* reset rwx permissions for user/group/other. 358 /* reset rwx permissions for user/group/other.
359 Also, if num_aces is 0 i.e. DACL has no ACEs, 359 Also, if num_aces is 0 i.e. DACL has no ACEs,
@@ -437,25 +437,25 @@ static int parse_sid(struct cifs_sid *psid, char *end_of_acl)
437 /* validate that we do not go past end of ACL - sid must be at least 8 437 /* validate that we do not go past end of ACL - sid must be at least 8
438 bytes long (assuming no sub-auths - e.g. the null SID */ 438 bytes long (assuming no sub-auths - e.g. the null SID */
439 if (end_of_acl < (char *)psid + 8) { 439 if (end_of_acl < (char *)psid + 8) {
440 cERROR(1, ("ACL too small to parse SID %p", psid)); 440 cERROR(1, "ACL too small to parse SID %p", psid);
441 return -EINVAL; 441 return -EINVAL;
442 } 442 }
443 443
444 if (psid->num_subauth) { 444 if (psid->num_subauth) {
445#ifdef CONFIG_CIFS_DEBUG2 445#ifdef CONFIG_CIFS_DEBUG2
446 int i; 446 int i;
447 cFYI(1, ("SID revision %d num_auth %d", 447 cFYI(1, "SID revision %d num_auth %d",
448 psid->revision, psid->num_subauth)); 448 psid->revision, psid->num_subauth);
449 449
450 for (i = 0; i < psid->num_subauth; i++) { 450 for (i = 0; i < psid->num_subauth; i++) {
451 cFYI(1, ("SID sub_auth[%d]: 0x%x ", i, 451 cFYI(1, "SID sub_auth[%d]: 0x%x ", i,
452 le32_to_cpu(psid->sub_auth[i]))); 452 le32_to_cpu(psid->sub_auth[i]));
453 } 453 }
454 454
455 /* BB add length check to make sure that we do not have huge 455 /* BB add length check to make sure that we do not have huge
456 num auths and therefore go off the end */ 456 num auths and therefore go off the end */
457 cFYI(1, ("RID 0x%x", 457 cFYI(1, "RID 0x%x",
458 le32_to_cpu(psid->sub_auth[psid->num_subauth-1]))); 458 le32_to_cpu(psid->sub_auth[psid->num_subauth-1]));
459#endif 459#endif
460 } 460 }
461 461
@@ -482,11 +482,11 @@ static int parse_sec_desc(struct cifs_ntsd *pntsd, int acl_len,
482 le32_to_cpu(pntsd->gsidoffset)); 482 le32_to_cpu(pntsd->gsidoffset));
483 dacloffset = le32_to_cpu(pntsd->dacloffset); 483 dacloffset = le32_to_cpu(pntsd->dacloffset);
484 dacl_ptr = (struct cifs_acl *)((char *)pntsd + dacloffset); 484 dacl_ptr = (struct cifs_acl *)((char *)pntsd + dacloffset);
485 cFYI(DBG2, ("revision %d type 0x%x ooffset 0x%x goffset 0x%x " 485 cFYI(DBG2, "revision %d type 0x%x ooffset 0x%x goffset 0x%x "
486 "sacloffset 0x%x dacloffset 0x%x", 486 "sacloffset 0x%x dacloffset 0x%x",
487 pntsd->revision, pntsd->type, le32_to_cpu(pntsd->osidoffset), 487 pntsd->revision, pntsd->type, le32_to_cpu(pntsd->osidoffset),
488 le32_to_cpu(pntsd->gsidoffset), 488 le32_to_cpu(pntsd->gsidoffset),
489 le32_to_cpu(pntsd->sacloffset), dacloffset)); 489 le32_to_cpu(pntsd->sacloffset), dacloffset);
490/* cifs_dump_mem("owner_sid: ", owner_sid_ptr, 64); */ 490/* cifs_dump_mem("owner_sid: ", owner_sid_ptr, 64); */
491 rc = parse_sid(owner_sid_ptr, end_of_acl); 491 rc = parse_sid(owner_sid_ptr, end_of_acl);
492 if (rc) 492 if (rc)
@@ -500,7 +500,7 @@ static int parse_sec_desc(struct cifs_ntsd *pntsd, int acl_len,
500 parse_dacl(dacl_ptr, end_of_acl, owner_sid_ptr, 500 parse_dacl(dacl_ptr, end_of_acl, owner_sid_ptr,
501 group_sid_ptr, fattr); 501 group_sid_ptr, fattr);
502 else 502 else
503 cFYI(1, ("no ACL")); /* BB grant all or default perms? */ 503 cFYI(1, "no ACL"); /* BB grant all or default perms? */
504 504
505/* cifscred->uid = owner_sid_ptr->rid; 505/* cifscred->uid = owner_sid_ptr->rid;
506 cifscred->gid = group_sid_ptr->rid; 506 cifscred->gid = group_sid_ptr->rid;
@@ -563,7 +563,7 @@ static struct cifs_ntsd *get_cifs_acl_by_fid(struct cifs_sb_info *cifs_sb,
563 FreeXid(xid); 563 FreeXid(xid);
564 564
565 565
566 cFYI(1, ("GetCIFSACL rc = %d ACL len %d", rc, *pacllen)); 566 cFYI(1, "GetCIFSACL rc = %d ACL len %d", rc, *pacllen);
567 return pntsd; 567 return pntsd;
568} 568}
569 569
@@ -581,12 +581,12 @@ static struct cifs_ntsd *get_cifs_acl_by_path(struct cifs_sb_info *cifs_sb,
581 &fid, &oplock, NULL, cifs_sb->local_nls, 581 &fid, &oplock, NULL, cifs_sb->local_nls,
582 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); 582 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR);
583 if (rc) { 583 if (rc) {
584 cERROR(1, ("Unable to open file to get ACL")); 584 cERROR(1, "Unable to open file to get ACL");
585 goto out; 585 goto out;
586 } 586 }
587 587
588 rc = CIFSSMBGetCIFSACL(xid, cifs_sb->tcon, fid, &pntsd, pacllen); 588 rc = CIFSSMBGetCIFSACL(xid, cifs_sb->tcon, fid, &pntsd, pacllen);
589 cFYI(1, ("GetCIFSACL rc = %d ACL len %d", rc, *pacllen)); 589 cFYI(1, "GetCIFSACL rc = %d ACL len %d", rc, *pacllen);
590 590
591 CIFSSMBClose(xid, cifs_sb->tcon, fid); 591 CIFSSMBClose(xid, cifs_sb->tcon, fid);
592 out: 592 out:
@@ -621,7 +621,7 @@ static int set_cifs_acl_by_fid(struct cifs_sb_info *cifs_sb, __u16 fid,
621 rc = CIFSSMBSetCIFSACL(xid, cifs_sb->tcon, fid, pnntsd, acllen); 621 rc = CIFSSMBSetCIFSACL(xid, cifs_sb->tcon, fid, pnntsd, acllen);
622 FreeXid(xid); 622 FreeXid(xid);
623 623
624 cFYI(DBG2, ("SetCIFSACL rc = %d", rc)); 624 cFYI(DBG2, "SetCIFSACL rc = %d", rc);
625 return rc; 625 return rc;
626} 626}
627 627
@@ -638,12 +638,12 @@ static int set_cifs_acl_by_path(struct cifs_sb_info *cifs_sb, const char *path,
638 &fid, &oplock, NULL, cifs_sb->local_nls, 638 &fid, &oplock, NULL, cifs_sb->local_nls,
639 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); 639 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR);
640 if (rc) { 640 if (rc) {
641 cERROR(1, ("Unable to open file to set ACL")); 641 cERROR(1, "Unable to open file to set ACL");
642 goto out; 642 goto out;
643 } 643 }
644 644
645 rc = CIFSSMBSetCIFSACL(xid, cifs_sb->tcon, fid, pnntsd, acllen); 645 rc = CIFSSMBSetCIFSACL(xid, cifs_sb->tcon, fid, pnntsd, acllen);
646 cFYI(DBG2, ("SetCIFSACL rc = %d", rc)); 646 cFYI(DBG2, "SetCIFSACL rc = %d", rc);
647 647
648 CIFSSMBClose(xid, cifs_sb->tcon, fid); 648 CIFSSMBClose(xid, cifs_sb->tcon, fid);
649 out: 649 out:
@@ -659,7 +659,7 @@ static int set_cifs_acl(struct cifs_ntsd *pnntsd, __u32 acllen,
659 struct cifsFileInfo *open_file; 659 struct cifsFileInfo *open_file;
660 int rc; 660 int rc;
661 661
662 cFYI(DBG2, ("set ACL for %s from mode 0x%x", path, inode->i_mode)); 662 cFYI(DBG2, "set ACL for %s from mode 0x%x", path, inode->i_mode);
663 663
664 open_file = find_readable_file(CIFS_I(inode)); 664 open_file = find_readable_file(CIFS_I(inode));
665 if (!open_file) 665 if (!open_file)
@@ -679,7 +679,7 @@ cifs_acl_to_fattr(struct cifs_sb_info *cifs_sb, struct cifs_fattr *fattr,
679 u32 acllen = 0; 679 u32 acllen = 0;
680 int rc = 0; 680 int rc = 0;
681 681
682 cFYI(DBG2, ("converting ACL to mode for %s", path)); 682 cFYI(DBG2, "converting ACL to mode for %s", path);
683 683
684 if (pfid) 684 if (pfid)
685 pntsd = get_cifs_acl_by_fid(cifs_sb, *pfid, &acllen); 685 pntsd = get_cifs_acl_by_fid(cifs_sb, *pfid, &acllen);
@@ -690,7 +690,7 @@ cifs_acl_to_fattr(struct cifs_sb_info *cifs_sb, struct cifs_fattr *fattr,
690 if (pntsd) 690 if (pntsd)
691 rc = parse_sec_desc(pntsd, acllen, fattr); 691 rc = parse_sec_desc(pntsd, acllen, fattr);
692 if (rc) 692 if (rc)
693 cFYI(1, ("parse sec desc failed rc = %d", rc)); 693 cFYI(1, "parse sec desc failed rc = %d", rc);
694 694
695 kfree(pntsd); 695 kfree(pntsd);
696 return; 696 return;
@@ -704,7 +704,7 @@ int mode_to_acl(struct inode *inode, const char *path, __u64 nmode)
704 struct cifs_ntsd *pntsd = NULL; /* acl obtained from server */ 704 struct cifs_ntsd *pntsd = NULL; /* acl obtained from server */
705 struct cifs_ntsd *pnntsd = NULL; /* modified acl to be sent to server */ 705 struct cifs_ntsd *pnntsd = NULL; /* modified acl to be sent to server */
706 706
707 cFYI(DBG2, ("set ACL from mode for %s", path)); 707 cFYI(DBG2, "set ACL from mode for %s", path);
708 708
709 /* Get the security descriptor */ 709 /* Get the security descriptor */
710 pntsd = get_cifs_acl(CIFS_SB(inode->i_sb), inode, path, &secdesclen); 710 pntsd = get_cifs_acl(CIFS_SB(inode->i_sb), inode, path, &secdesclen);
@@ -721,19 +721,19 @@ int mode_to_acl(struct inode *inode, const char *path, __u64 nmode)
721 DEFSECDESCLEN : secdesclen; 721 DEFSECDESCLEN : secdesclen;
722 pnntsd = kmalloc(secdesclen, GFP_KERNEL); 722 pnntsd = kmalloc(secdesclen, GFP_KERNEL);
723 if (!pnntsd) { 723 if (!pnntsd) {
724 cERROR(1, ("Unable to allocate security descriptor")); 724 cERROR(1, "Unable to allocate security descriptor");
725 kfree(pntsd); 725 kfree(pntsd);
726 return -ENOMEM; 726 return -ENOMEM;
727 } 727 }
728 728
729 rc = build_sec_desc(pntsd, pnntsd, inode, nmode); 729 rc = build_sec_desc(pntsd, pnntsd, inode, nmode);
730 730
731 cFYI(DBG2, ("build_sec_desc rc: %d", rc)); 731 cFYI(DBG2, "build_sec_desc rc: %d", rc);
732 732
733 if (!rc) { 733 if (!rc) {
734 /* Set the security descriptor */ 734 /* Set the security descriptor */
735 rc = set_cifs_acl(pnntsd, secdesclen, inode, path); 735 rc = set_cifs_acl(pnntsd, secdesclen, inode, path);
736 cFYI(DBG2, ("set_cifs_acl rc: %d", rc)); 736 cFYI(DBG2, "set_cifs_acl rc: %d", rc);
737 } 737 }
738 738
739 kfree(pnntsd); 739 kfree(pnntsd);
diff --git a/fs/cifs/cifsencrypt.c b/fs/cifs/cifsencrypt.c
index fbe986430d0c..847628dfdc44 100644
--- a/fs/cifs/cifsencrypt.c
+++ b/fs/cifs/cifsencrypt.c
@@ -103,7 +103,7 @@ static int cifs_calc_signature2(const struct kvec *iov, int n_vec,
103 if (iov[i].iov_len == 0) 103 if (iov[i].iov_len == 0)
104 continue; 104 continue;
105 if (iov[i].iov_base == NULL) { 105 if (iov[i].iov_base == NULL) {
106 cERROR(1, ("null iovec entry")); 106 cERROR(1, "null iovec entry");
107 return -EIO; 107 return -EIO;
108 } 108 }
109 /* The first entry includes a length field (which does not get 109 /* The first entry includes a length field (which does not get
@@ -181,8 +181,8 @@ int cifs_verify_signature(struct smb_hdr *cifs_pdu,
181 181
182 /* Do not need to verify session setups with signature "BSRSPYL " */ 182 /* Do not need to verify session setups with signature "BSRSPYL " */
183 if (memcmp(cifs_pdu->Signature.SecuritySignature, "BSRSPYL ", 8) == 0) 183 if (memcmp(cifs_pdu->Signature.SecuritySignature, "BSRSPYL ", 8) == 0)
184 cFYI(1, ("dummy signature received for smb command 0x%x", 184 cFYI(1, "dummy signature received for smb command 0x%x",
185 cifs_pdu->Command)); 185 cifs_pdu->Command);
186 186
187 /* save off the origiginal signature so we can modify the smb and check 187 /* save off the origiginal signature so we can modify the smb and check
188 its signature against what the server sent */ 188 its signature against what the server sent */
@@ -291,7 +291,7 @@ void calc_lanman_hash(const char *password, const char *cryptkey, bool encrypt,
291 if (password) 291 if (password)
292 strncpy(password_with_pad, password, CIFS_ENCPWD_SIZE); 292 strncpy(password_with_pad, password, CIFS_ENCPWD_SIZE);
293 293
294 if (!encrypt && extended_security & CIFSSEC_MAY_PLNTXT) { 294 if (!encrypt && global_secflags & CIFSSEC_MAY_PLNTXT) {
295 memset(lnm_session_key, 0, CIFS_SESS_KEY_SIZE); 295 memset(lnm_session_key, 0, CIFS_SESS_KEY_SIZE);
296 memcpy(lnm_session_key, password_with_pad, 296 memcpy(lnm_session_key, password_with_pad,
297 CIFS_ENCPWD_SIZE); 297 CIFS_ENCPWD_SIZE);
@@ -398,7 +398,7 @@ void setup_ntlmv2_rsp(struct cifsSesInfo *ses, char *resp_buf,
398 /* calculate buf->ntlmv2_hash */ 398 /* calculate buf->ntlmv2_hash */
399 rc = calc_ntlmv2_hash(ses, nls_cp); 399 rc = calc_ntlmv2_hash(ses, nls_cp);
400 if (rc) 400 if (rc)
401 cERROR(1, ("could not get v2 hash rc %d", rc)); 401 cERROR(1, "could not get v2 hash rc %d", rc);
402 CalcNTLMv2_response(ses, resp_buf); 402 CalcNTLMv2_response(ses, resp_buf);
403 403
404 /* now calculate the MAC key for NTLMv2 */ 404 /* now calculate the MAC key for NTLMv2 */
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index ad235d604a0b..78c02eb4cb1f 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -49,10 +49,6 @@
49#include "cifs_spnego.h" 49#include "cifs_spnego.h"
50#define CIFS_MAGIC_NUMBER 0xFF534D42 /* the first four bytes of SMB PDUs */ 50#define CIFS_MAGIC_NUMBER 0xFF534D42 /* the first four bytes of SMB PDUs */
51 51
52#ifdef CONFIG_CIFS_QUOTA
53static const struct quotactl_ops cifs_quotactl_ops;
54#endif /* QUOTA */
55
56int cifsFYI = 0; 52int cifsFYI = 0;
57int cifsERROR = 1; 53int cifsERROR = 1;
58int traceSMB = 0; 54int traceSMB = 0;
@@ -61,7 +57,7 @@ unsigned int experimEnabled = 0;
61unsigned int linuxExtEnabled = 1; 57unsigned int linuxExtEnabled = 1;
62unsigned int lookupCacheEnabled = 1; 58unsigned int lookupCacheEnabled = 1;
63unsigned int multiuser_mount = 0; 59unsigned int multiuser_mount = 0;
64unsigned int extended_security = CIFSSEC_DEF; 60unsigned int global_secflags = CIFSSEC_DEF;
65/* unsigned int ntlmv2_support = 0; */ 61/* unsigned int ntlmv2_support = 0; */
66unsigned int sign_CIFS_PDUs = 1; 62unsigned int sign_CIFS_PDUs = 1;
67static const struct super_operations cifs_super_ops; 63static const struct super_operations cifs_super_ops;
@@ -86,8 +82,6 @@ extern mempool_t *cifs_sm_req_poolp;
86extern mempool_t *cifs_req_poolp; 82extern mempool_t *cifs_req_poolp;
87extern mempool_t *cifs_mid_poolp; 83extern mempool_t *cifs_mid_poolp;
88 84
89extern struct kmem_cache *cifs_oplock_cachep;
90
91static int 85static int
92cifs_read_super(struct super_block *sb, void *data, 86cifs_read_super(struct super_block *sb, void *data,
93 const char *devname, int silent) 87 const char *devname, int silent)
@@ -135,8 +129,7 @@ cifs_read_super(struct super_block *sb, void *data,
135 129
136 if (rc) { 130 if (rc) {
137 if (!silent) 131 if (!silent)
138 cERROR(1, 132 cERROR(1, "cifs_mount failed w/return code = %d", rc);
139 ("cifs_mount failed w/return code = %d", rc));
140 goto out_mount_failed; 133 goto out_mount_failed;
141 } 134 }
142 135
@@ -146,9 +139,6 @@ cifs_read_super(struct super_block *sb, void *data,
146/* if (cifs_sb->tcon->ses->server->maxBuf > MAX_CIFS_HDR_SIZE + 512) 139/* if (cifs_sb->tcon->ses->server->maxBuf > MAX_CIFS_HDR_SIZE + 512)
147 sb->s_blocksize = 140 sb->s_blocksize =
148 cifs_sb->tcon->ses->server->maxBuf - MAX_CIFS_HDR_SIZE; */ 141 cifs_sb->tcon->ses->server->maxBuf - MAX_CIFS_HDR_SIZE; */
149#ifdef CONFIG_CIFS_QUOTA
150 sb->s_qcop = &cifs_quotactl_ops;
151#endif
152 sb->s_blocksize = CIFS_MAX_MSGSIZE; 142 sb->s_blocksize = CIFS_MAX_MSGSIZE;
153 sb->s_blocksize_bits = 14; /* default 2**14 = CIFS_MAX_MSGSIZE */ 143 sb->s_blocksize_bits = 14; /* default 2**14 = CIFS_MAX_MSGSIZE */
154 inode = cifs_root_iget(sb, ROOT_I); 144 inode = cifs_root_iget(sb, ROOT_I);
@@ -168,7 +158,7 @@ cifs_read_super(struct super_block *sb, void *data,
168 158
169#ifdef CONFIG_CIFS_EXPERIMENTAL 159#ifdef CONFIG_CIFS_EXPERIMENTAL
170 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM) { 160 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM) {
171 cFYI(1, ("export ops supported")); 161 cFYI(1, "export ops supported");
172 sb->s_export_op = &cifs_export_ops; 162 sb->s_export_op = &cifs_export_ops;
173 } 163 }
174#endif /* EXPERIMENTAL */ 164#endif /* EXPERIMENTAL */
@@ -176,7 +166,7 @@ cifs_read_super(struct super_block *sb, void *data,
176 return 0; 166 return 0;
177 167
178out_no_root: 168out_no_root:
179 cERROR(1, ("cifs_read_super: get root inode failed")); 169 cERROR(1, "cifs_read_super: get root inode failed");
180 if (inode) 170 if (inode)
181 iput(inode); 171 iput(inode);
182 172
@@ -203,10 +193,10 @@ cifs_put_super(struct super_block *sb)
203 int rc = 0; 193 int rc = 0;
204 struct cifs_sb_info *cifs_sb; 194 struct cifs_sb_info *cifs_sb;
205 195
206 cFYI(1, ("In cifs_put_super")); 196 cFYI(1, "In cifs_put_super");
207 cifs_sb = CIFS_SB(sb); 197 cifs_sb = CIFS_SB(sb);
208 if (cifs_sb == NULL) { 198 if (cifs_sb == NULL) {
209 cFYI(1, ("Empty cifs superblock info passed to unmount")); 199 cFYI(1, "Empty cifs superblock info passed to unmount");
210 return; 200 return;
211 } 201 }
212 202
@@ -214,7 +204,7 @@ cifs_put_super(struct super_block *sb)
214 204
215 rc = cifs_umount(sb, cifs_sb); 205 rc = cifs_umount(sb, cifs_sb);
216 if (rc) 206 if (rc)
217 cERROR(1, ("cifs_umount failed with return code %d", rc)); 207 cERROR(1, "cifs_umount failed with return code %d", rc);
218#ifdef CONFIG_CIFS_DFS_UPCALL 208#ifdef CONFIG_CIFS_DFS_UPCALL
219 if (cifs_sb->mountdata) { 209 if (cifs_sb->mountdata) {
220 kfree(cifs_sb->mountdata); 210 kfree(cifs_sb->mountdata);
@@ -300,7 +290,6 @@ static int cifs_permission(struct inode *inode, int mask)
300static struct kmem_cache *cifs_inode_cachep; 290static struct kmem_cache *cifs_inode_cachep;
301static struct kmem_cache *cifs_req_cachep; 291static struct kmem_cache *cifs_req_cachep;
302static struct kmem_cache *cifs_mid_cachep; 292static struct kmem_cache *cifs_mid_cachep;
303struct kmem_cache *cifs_oplock_cachep;
304static struct kmem_cache *cifs_sm_req_cachep; 293static struct kmem_cache *cifs_sm_req_cachep;
305mempool_t *cifs_sm_req_poolp; 294mempool_t *cifs_sm_req_poolp;
306mempool_t *cifs_req_poolp; 295mempool_t *cifs_req_poolp;
@@ -432,106 +421,6 @@ cifs_show_options(struct seq_file *s, struct vfsmount *m)
432 return 0; 421 return 0;
433} 422}
434 423
435#ifdef CONFIG_CIFS_QUOTA
436int cifs_xquota_set(struct super_block *sb, int quota_type, qid_t qid,
437 struct fs_disk_quota *pdquota)
438{
439 int xid;
440 int rc = 0;
441 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
442 struct cifsTconInfo *pTcon;
443
444 if (cifs_sb)
445 pTcon = cifs_sb->tcon;
446 else
447 return -EIO;
448
449
450 xid = GetXid();
451 if (pTcon) {
452 cFYI(1, ("set type: 0x%x id: %d", quota_type, qid));
453 } else
454 rc = -EIO;
455
456 FreeXid(xid);
457 return rc;
458}
459
460int cifs_xquota_get(struct super_block *sb, int quota_type, qid_t qid,
461 struct fs_disk_quota *pdquota)
462{
463 int xid;
464 int rc = 0;
465 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
466 struct cifsTconInfo *pTcon;
467
468 if (cifs_sb)
469 pTcon = cifs_sb->tcon;
470 else
471 return -EIO;
472
473 xid = GetXid();
474 if (pTcon) {
475 cFYI(1, ("set type: 0x%x id: %d", quota_type, qid));
476 } else
477 rc = -EIO;
478
479 FreeXid(xid);
480 return rc;
481}
482
483int cifs_xstate_set(struct super_block *sb, unsigned int flags, int operation)
484{
485 int xid;
486 int rc = 0;
487 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
488 struct cifsTconInfo *pTcon;
489
490 if (cifs_sb)
491 pTcon = cifs_sb->tcon;
492 else
493 return -EIO;
494
495 xid = GetXid();
496 if (pTcon) {
497 cFYI(1, ("flags: 0x%x operation: 0x%x", flags, operation));
498 } else
499 rc = -EIO;
500
501 FreeXid(xid);
502 return rc;
503}
504
505int cifs_xstate_get(struct super_block *sb, struct fs_quota_stat *qstats)
506{
507 int xid;
508 int rc = 0;
509 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
510 struct cifsTconInfo *pTcon;
511
512 if (cifs_sb)
513 pTcon = cifs_sb->tcon;
514 else
515 return -EIO;
516
517 xid = GetXid();
518 if (pTcon) {
519 cFYI(1, ("pqstats %p", qstats));
520 } else
521 rc = -EIO;
522
523 FreeXid(xid);
524 return rc;
525}
526
527static const struct quotactl_ops cifs_quotactl_ops = {
528 .set_xquota = cifs_xquota_set,
529 .get_xquota = cifs_xquota_get,
530 .set_xstate = cifs_xstate_set,
531 .get_xstate = cifs_xstate_get,
532};
533#endif
534
535static void cifs_umount_begin(struct super_block *sb) 424static void cifs_umount_begin(struct super_block *sb)
536{ 425{
537 struct cifs_sb_info *cifs_sb = CIFS_SB(sb); 426 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
@@ -558,7 +447,7 @@ static void cifs_umount_begin(struct super_block *sb)
558 /* cancel_brl_requests(tcon); */ /* BB mark all brl mids as exiting */ 447 /* cancel_brl_requests(tcon); */ /* BB mark all brl mids as exiting */
559 /* cancel_notify_requests(tcon); */ 448 /* cancel_notify_requests(tcon); */
560 if (tcon->ses && tcon->ses->server) { 449 if (tcon->ses && tcon->ses->server) {
561 cFYI(1, ("wake up tasks now - umount begin not complete")); 450 cFYI(1, "wake up tasks now - umount begin not complete");
562 wake_up_all(&tcon->ses->server->request_q); 451 wake_up_all(&tcon->ses->server->request_q);
563 wake_up_all(&tcon->ses->server->response_q); 452 wake_up_all(&tcon->ses->server->response_q);
564 msleep(1); /* yield */ 453 msleep(1); /* yield */
@@ -609,7 +498,7 @@ cifs_get_sb(struct file_system_type *fs_type,
609 int rc; 498 int rc;
610 struct super_block *sb = sget(fs_type, NULL, set_anon_super, NULL); 499 struct super_block *sb = sget(fs_type, NULL, set_anon_super, NULL);
611 500
612 cFYI(1, ("Devname: %s flags: %d ", dev_name, flags)); 501 cFYI(1, "Devname: %s flags: %d ", dev_name, flags);
613 502
614 if (IS_ERR(sb)) 503 if (IS_ERR(sb))
615 return PTR_ERR(sb); 504 return PTR_ERR(sb);
@@ -656,7 +545,6 @@ static loff_t cifs_llseek(struct file *file, loff_t offset, int origin)
656 return generic_file_llseek_unlocked(file, offset, origin); 545 return generic_file_llseek_unlocked(file, offset, origin);
657} 546}
658 547
659#ifdef CONFIG_CIFS_EXPERIMENTAL
660static int cifs_setlease(struct file *file, long arg, struct file_lock **lease) 548static int cifs_setlease(struct file *file, long arg, struct file_lock **lease)
661{ 549{
662 /* note that this is called by vfs setlease with the BKL held 550 /* note that this is called by vfs setlease with the BKL held
@@ -685,7 +573,6 @@ static int cifs_setlease(struct file *file, long arg, struct file_lock **lease)
685 else 573 else
686 return -EAGAIN; 574 return -EAGAIN;
687} 575}
688#endif
689 576
690struct file_system_type cifs_fs_type = { 577struct file_system_type cifs_fs_type = {
691 .owner = THIS_MODULE, 578 .owner = THIS_MODULE,
@@ -762,10 +649,7 @@ const struct file_operations cifs_file_ops = {
762#ifdef CONFIG_CIFS_POSIX 649#ifdef CONFIG_CIFS_POSIX
763 .unlocked_ioctl = cifs_ioctl, 650 .unlocked_ioctl = cifs_ioctl,
764#endif /* CONFIG_CIFS_POSIX */ 651#endif /* CONFIG_CIFS_POSIX */
765
766#ifdef CONFIG_CIFS_EXPERIMENTAL
767 .setlease = cifs_setlease, 652 .setlease = cifs_setlease,
768#endif /* CONFIG_CIFS_EXPERIMENTAL */
769}; 653};
770 654
771const struct file_operations cifs_file_direct_ops = { 655const struct file_operations cifs_file_direct_ops = {
@@ -784,9 +668,7 @@ const struct file_operations cifs_file_direct_ops = {
784 .unlocked_ioctl = cifs_ioctl, 668 .unlocked_ioctl = cifs_ioctl,
785#endif /* CONFIG_CIFS_POSIX */ 669#endif /* CONFIG_CIFS_POSIX */
786 .llseek = cifs_llseek, 670 .llseek = cifs_llseek,
787#ifdef CONFIG_CIFS_EXPERIMENTAL
788 .setlease = cifs_setlease, 671 .setlease = cifs_setlease,
789#endif /* CONFIG_CIFS_EXPERIMENTAL */
790}; 672};
791const struct file_operations cifs_file_nobrl_ops = { 673const struct file_operations cifs_file_nobrl_ops = {
792 .read = do_sync_read, 674 .read = do_sync_read,
@@ -803,10 +685,7 @@ const struct file_operations cifs_file_nobrl_ops = {
803#ifdef CONFIG_CIFS_POSIX 685#ifdef CONFIG_CIFS_POSIX
804 .unlocked_ioctl = cifs_ioctl, 686 .unlocked_ioctl = cifs_ioctl,
805#endif /* CONFIG_CIFS_POSIX */ 687#endif /* CONFIG_CIFS_POSIX */
806
807#ifdef CONFIG_CIFS_EXPERIMENTAL
808 .setlease = cifs_setlease, 688 .setlease = cifs_setlease,
809#endif /* CONFIG_CIFS_EXPERIMENTAL */
810}; 689};
811 690
812const struct file_operations cifs_file_direct_nobrl_ops = { 691const struct file_operations cifs_file_direct_nobrl_ops = {
@@ -824,9 +703,7 @@ const struct file_operations cifs_file_direct_nobrl_ops = {
824 .unlocked_ioctl = cifs_ioctl, 703 .unlocked_ioctl = cifs_ioctl,
825#endif /* CONFIG_CIFS_POSIX */ 704#endif /* CONFIG_CIFS_POSIX */
826 .llseek = cifs_llseek, 705 .llseek = cifs_llseek,
827#ifdef CONFIG_CIFS_EXPERIMENTAL
828 .setlease = cifs_setlease, 706 .setlease = cifs_setlease,
829#endif /* CONFIG_CIFS_EXPERIMENTAL */
830}; 707};
831 708
832const struct file_operations cifs_dir_ops = { 709const struct file_operations cifs_dir_ops = {
@@ -878,7 +755,7 @@ cifs_init_request_bufs(void)
878 } else { 755 } else {
879 CIFSMaxBufSize &= 0x1FE00; /* Round size to even 512 byte mult*/ 756 CIFSMaxBufSize &= 0x1FE00; /* Round size to even 512 byte mult*/
880 } 757 }
881/* cERROR(1,("CIFSMaxBufSize %d 0x%x",CIFSMaxBufSize,CIFSMaxBufSize)); */ 758/* cERROR(1, "CIFSMaxBufSize %d 0x%x",CIFSMaxBufSize,CIFSMaxBufSize); */
882 cifs_req_cachep = kmem_cache_create("cifs_request", 759 cifs_req_cachep = kmem_cache_create("cifs_request",
883 CIFSMaxBufSize + 760 CIFSMaxBufSize +
884 MAX_CIFS_HDR_SIZE, 0, 761 MAX_CIFS_HDR_SIZE, 0,
@@ -890,7 +767,7 @@ cifs_init_request_bufs(void)
890 cifs_min_rcv = 1; 767 cifs_min_rcv = 1;
891 else if (cifs_min_rcv > 64) { 768 else if (cifs_min_rcv > 64) {
892 cifs_min_rcv = 64; 769 cifs_min_rcv = 64;
893 cERROR(1, ("cifs_min_rcv set to maximum (64)")); 770 cERROR(1, "cifs_min_rcv set to maximum (64)");
894 } 771 }
895 772
896 cifs_req_poolp = mempool_create_slab_pool(cifs_min_rcv, 773 cifs_req_poolp = mempool_create_slab_pool(cifs_min_rcv,
@@ -921,7 +798,7 @@ cifs_init_request_bufs(void)
921 cifs_min_small = 2; 798 cifs_min_small = 2;
922 else if (cifs_min_small > 256) { 799 else if (cifs_min_small > 256) {
923 cifs_min_small = 256; 800 cifs_min_small = 256;
924 cFYI(1, ("cifs_min_small set to maximum (256)")); 801 cFYI(1, "cifs_min_small set to maximum (256)");
925 } 802 }
926 803
927 cifs_sm_req_poolp = mempool_create_slab_pool(cifs_min_small, 804 cifs_sm_req_poolp = mempool_create_slab_pool(cifs_min_small,
@@ -962,15 +839,6 @@ cifs_init_mids(void)
962 return -ENOMEM; 839 return -ENOMEM;
963 } 840 }
964 841
965 cifs_oplock_cachep = kmem_cache_create("cifs_oplock_structs",
966 sizeof(struct oplock_q_entry), 0,
967 SLAB_HWCACHE_ALIGN, NULL);
968 if (cifs_oplock_cachep == NULL) {
969 mempool_destroy(cifs_mid_poolp);
970 kmem_cache_destroy(cifs_mid_cachep);
971 return -ENOMEM;
972 }
973
974 return 0; 842 return 0;
975} 843}
976 844
@@ -979,7 +847,6 @@ cifs_destroy_mids(void)
979{ 847{
980 mempool_destroy(cifs_mid_poolp); 848 mempool_destroy(cifs_mid_poolp);
981 kmem_cache_destroy(cifs_mid_cachep); 849 kmem_cache_destroy(cifs_mid_cachep);
982 kmem_cache_destroy(cifs_oplock_cachep);
983} 850}
984 851
985static int __init 852static int __init
@@ -1019,10 +886,10 @@ init_cifs(void)
1019 886
1020 if (cifs_max_pending < 2) { 887 if (cifs_max_pending < 2) {
1021 cifs_max_pending = 2; 888 cifs_max_pending = 2;
1022 cFYI(1, ("cifs_max_pending set to min of 2")); 889 cFYI(1, "cifs_max_pending set to min of 2");
1023 } else if (cifs_max_pending > 256) { 890 } else if (cifs_max_pending > 256) {
1024 cifs_max_pending = 256; 891 cifs_max_pending = 256;
1025 cFYI(1, ("cifs_max_pending set to max of 256")); 892 cFYI(1, "cifs_max_pending set to max of 256");
1026 } 893 }
1027 894
1028 rc = cifs_init_inodecache(); 895 rc = cifs_init_inodecache();
@@ -1080,7 +947,7 @@ init_cifs(void)
1080static void __exit 947static void __exit
1081exit_cifs(void) 948exit_cifs(void)
1082{ 949{
1083 cFYI(DBG2, ("exit_cifs")); 950 cFYI(DBG2, "exit_cifs");
1084 cifs_proc_clean(); 951 cifs_proc_clean();
1085#ifdef CONFIG_CIFS_DFS_UPCALL 952#ifdef CONFIG_CIFS_DFS_UPCALL
1086 cifs_dfs_release_automount_timer(); 953 cifs_dfs_release_automount_timer();
diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h
index 7aa57ecdc437..0242ff9cbf41 100644
--- a/fs/cifs/cifsfs.h
+++ b/fs/cifs/cifsfs.h
@@ -114,5 +114,5 @@ extern long cifs_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
114extern const struct export_operations cifs_export_ops; 114extern const struct export_operations cifs_export_ops;
115#endif /* EXPERIMENTAL */ 115#endif /* EXPERIMENTAL */
116 116
117#define CIFS_VERSION "1.62" 117#define CIFS_VERSION "1.64"
118#endif /* _CIFSFS_H */ 118#endif /* _CIFSFS_H */
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h
index 0c2fd17439c8..a88479ceaad5 100644
--- a/fs/cifs/cifsglob.h
+++ b/fs/cifs/cifsglob.h
@@ -87,7 +87,6 @@ enum securityEnum {
87 RawNTLMSSP, /* NTLMSSP without SPNEGO, NTLMv2 hash */ 87 RawNTLMSSP, /* NTLMSSP without SPNEGO, NTLMv2 hash */
88/* NTLMSSP, */ /* can use rawNTLMSSP instead of NTLMSSP via SPNEGO */ 88/* NTLMSSP, */ /* can use rawNTLMSSP instead of NTLMSSP via SPNEGO */
89 Kerberos, /* Kerberos via SPNEGO */ 89 Kerberos, /* Kerberos via SPNEGO */
90 MSKerberos, /* MS Kerberos via SPNEGO */
91}; 90};
92 91
93enum protocolEnum { 92enum protocolEnum {
@@ -185,6 +184,12 @@ struct TCP_Server_Info {
185 struct mac_key mac_signing_key; 184 struct mac_key mac_signing_key;
186 char ntlmv2_hash[16]; 185 char ntlmv2_hash[16];
187 unsigned long lstrp; /* when we got last response from this server */ 186 unsigned long lstrp; /* when we got last response from this server */
187 u16 dialect; /* dialect index that server chose */
188 /* extended security flavors that server supports */
189 bool sec_kerberos; /* supports plain Kerberos */
190 bool sec_mskerberos; /* supports legacy MS Kerberos */
191 bool sec_kerberosu2u; /* supports U2U Kerberos */
192 bool sec_ntlmssp; /* supports NTLMSSP */
188}; 193};
189 194
190/* 195/*
@@ -718,7 +723,7 @@ GLOBAL_EXTERN unsigned int multiuser_mount; /* if enabled allows new sessions
718GLOBAL_EXTERN unsigned int oplockEnabled; 723GLOBAL_EXTERN unsigned int oplockEnabled;
719GLOBAL_EXTERN unsigned int experimEnabled; 724GLOBAL_EXTERN unsigned int experimEnabled;
720GLOBAL_EXTERN unsigned int lookupCacheEnabled; 725GLOBAL_EXTERN unsigned int lookupCacheEnabled;
721GLOBAL_EXTERN unsigned int extended_security; /* if on, session setup sent 726GLOBAL_EXTERN unsigned int global_secflags; /* if on, session setup sent
722 with more secure ntlmssp2 challenge/resp */ 727 with more secure ntlmssp2 challenge/resp */
723GLOBAL_EXTERN unsigned int sign_CIFS_PDUs; /* enable smb packet signing */ 728GLOBAL_EXTERN unsigned int sign_CIFS_PDUs; /* enable smb packet signing */
724GLOBAL_EXTERN unsigned int linuxExtEnabled;/*enable Linux/Unix CIFS extensions*/ 729GLOBAL_EXTERN unsigned int linuxExtEnabled;/*enable Linux/Unix CIFS extensions*/
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index 39e47f46dea5..fb1657e0fdb8 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -39,8 +39,20 @@ extern int smb_send(struct TCP_Server_Info *, struct smb_hdr *,
39 unsigned int /* length */); 39 unsigned int /* length */);
40extern unsigned int _GetXid(void); 40extern unsigned int _GetXid(void);
41extern void _FreeXid(unsigned int); 41extern void _FreeXid(unsigned int);
42#define GetXid() (int)_GetXid(); cFYI(1,("CIFS VFS: in %s as Xid: %d with uid: %d",__func__, xid,current_fsuid())); 42#define GetXid() \
43#define FreeXid(curr_xid) {_FreeXid(curr_xid); cFYI(1,("CIFS VFS: leaving %s (xid = %d) rc = %d",__func__,curr_xid,(int)rc));} 43({ \
44 int __xid = (int)_GetXid(); \
45 cFYI(1, "CIFS VFS: in %s as Xid: %d with uid: %d", \
46 __func__, __xid, current_fsuid()); \
47 __xid; \
48})
49
50#define FreeXid(curr_xid) \
51do { \
52 _FreeXid(curr_xid); \
53 cFYI(1, "CIFS VFS: leaving %s (xid = %d) rc = %d", \
54 __func__, curr_xid, (int)rc); \
55} while (0)
44extern char *build_path_from_dentry(struct dentry *); 56extern char *build_path_from_dentry(struct dentry *);
45extern char *cifs_build_path_to_root(struct cifs_sb_info *cifs_sb); 57extern char *cifs_build_path_to_root(struct cifs_sb_info *cifs_sb);
46extern char *build_wildcard_path_from_dentry(struct dentry *direntry); 58extern char *build_wildcard_path_from_dentry(struct dentry *direntry);
@@ -73,7 +85,7 @@ extern struct cifsFileInfo *find_readable_file(struct cifsInodeInfo *);
73extern unsigned int smbCalcSize(struct smb_hdr *ptr); 85extern unsigned int smbCalcSize(struct smb_hdr *ptr);
74extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr); 86extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr);
75extern int decode_negTokenInit(unsigned char *security_blob, int length, 87extern int decode_negTokenInit(unsigned char *security_blob, int length,
76 enum securityEnum *secType); 88 struct TCP_Server_Info *server);
77extern int cifs_convert_address(char *src, void *dst); 89extern int cifs_convert_address(char *src, void *dst);
78extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr); 90extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr);
79extern void header_assemble(struct smb_hdr *, char /* command */ , 91extern void header_assemble(struct smb_hdr *, char /* command */ ,
@@ -83,7 +95,6 @@ extern int small_smb_init_no_tc(const int smb_cmd, const int wct,
83 struct cifsSesInfo *ses, 95 struct cifsSesInfo *ses,
84 void **request_buf); 96 void **request_buf);
85extern int CIFS_SessSetup(unsigned int xid, struct cifsSesInfo *ses, 97extern int CIFS_SessSetup(unsigned int xid, struct cifsSesInfo *ses,
86 const int stage,
87 const struct nls_table *nls_cp); 98 const struct nls_table *nls_cp);
88extern __u16 GetNextMid(struct TCP_Server_Info *server); 99extern __u16 GetNextMid(struct TCP_Server_Info *server);
89extern struct timespec cifs_NTtimeToUnix(__le64 utc_nanoseconds_since_1601); 100extern struct timespec cifs_NTtimeToUnix(__le64 utc_nanoseconds_since_1601);
@@ -95,8 +106,11 @@ extern struct cifsFileInfo *cifs_new_fileinfo(struct inode *newinode,
95 __u16 fileHandle, struct file *file, 106 __u16 fileHandle, struct file *file,
96 struct vfsmount *mnt, unsigned int oflags); 107 struct vfsmount *mnt, unsigned int oflags);
97extern int cifs_posix_open(char *full_path, struct inode **pinode, 108extern int cifs_posix_open(char *full_path, struct inode **pinode,
98 struct vfsmount *mnt, int mode, int oflags, 109 struct vfsmount *mnt,
99 __u32 *poplock, __u16 *pnetfid, int xid); 110 struct super_block *sb,
111 int mode, int oflags,
112 __u32 *poplock, __u16 *pnetfid, int xid);
113void cifs_fill_uniqueid(struct super_block *sb, struct cifs_fattr *fattr);
100extern void cifs_unix_basic_to_fattr(struct cifs_fattr *fattr, 114extern void cifs_unix_basic_to_fattr(struct cifs_fattr *fattr,
101 FILE_UNIX_BASIC_INFO *info, 115 FILE_UNIX_BASIC_INFO *info,
102 struct cifs_sb_info *cifs_sb); 116 struct cifs_sb_info *cifs_sb);
@@ -125,7 +139,9 @@ extern void cifs_dfs_release_automount_timer(void);
125void cifs_proc_init(void); 139void cifs_proc_init(void);
126void cifs_proc_clean(void); 140void cifs_proc_clean(void);
127 141
128extern int cifs_setup_session(unsigned int xid, struct cifsSesInfo *pSesInfo, 142extern int cifs_negotiate_protocol(unsigned int xid,
143 struct cifsSesInfo *ses);
144extern int cifs_setup_session(unsigned int xid, struct cifsSesInfo *ses,
129 struct nls_table *nls_info); 145 struct nls_table *nls_info);
130extern int CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses); 146extern int CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses);
131 147
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index 5d3f29fef532..c65c3419dd37 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/cifssmb.c 2 * fs/cifs/cifssmb.c
3 * 3 *
4 * Copyright (C) International Business Machines Corp., 2002,2009 4 * Copyright (C) International Business Machines Corp., 2002,2010
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * Contains the routines for constructing the SMB PDUs themselves 7 * Contains the routines for constructing the SMB PDUs themselves
@@ -130,8 +130,8 @@ cifs_reconnect_tcon(struct cifsTconInfo *tcon, int smb_command)
130 if (smb_command != SMB_COM_WRITE_ANDX && 130 if (smb_command != SMB_COM_WRITE_ANDX &&
131 smb_command != SMB_COM_OPEN_ANDX && 131 smb_command != SMB_COM_OPEN_ANDX &&
132 smb_command != SMB_COM_TREE_DISCONNECT) { 132 smb_command != SMB_COM_TREE_DISCONNECT) {
133 cFYI(1, ("can not send cmd %d while umounting", 133 cFYI(1, "can not send cmd %d while umounting",
134 smb_command)); 134 smb_command);
135 return -ENODEV; 135 return -ENODEV;
136 } 136 }
137 } 137 }
@@ -157,7 +157,7 @@ cifs_reconnect_tcon(struct cifsTconInfo *tcon, int smb_command)
157 * back on-line 157 * back on-line
158 */ 158 */
159 if (!tcon->retry || ses->status == CifsExiting) { 159 if (!tcon->retry || ses->status == CifsExiting) {
160 cFYI(1, ("gave up waiting on reconnect in smb_init")); 160 cFYI(1, "gave up waiting on reconnect in smb_init");
161 return -EHOSTDOWN; 161 return -EHOSTDOWN;
162 } 162 }
163 } 163 }
@@ -172,7 +172,8 @@ cifs_reconnect_tcon(struct cifsTconInfo *tcon, int smb_command)
172 * reconnect the same SMB session 172 * reconnect the same SMB session
173 */ 173 */
174 mutex_lock(&ses->session_mutex); 174 mutex_lock(&ses->session_mutex);
175 if (ses->need_reconnect) 175 rc = cifs_negotiate_protocol(0, ses);
176 if (rc == 0 && ses->need_reconnect)
176 rc = cifs_setup_session(0, ses, nls_codepage); 177 rc = cifs_setup_session(0, ses, nls_codepage);
177 178
178 /* do we need to reconnect tcon? */ 179 /* do we need to reconnect tcon? */
@@ -184,7 +185,7 @@ cifs_reconnect_tcon(struct cifsTconInfo *tcon, int smb_command)
184 mark_open_files_invalid(tcon); 185 mark_open_files_invalid(tcon);
185 rc = CIFSTCon(0, ses, tcon->treeName, tcon, nls_codepage); 186 rc = CIFSTCon(0, ses, tcon->treeName, tcon, nls_codepage);
186 mutex_unlock(&ses->session_mutex); 187 mutex_unlock(&ses->session_mutex);
187 cFYI(1, ("reconnect tcon rc = %d", rc)); 188 cFYI(1, "reconnect tcon rc = %d", rc);
188 189
189 if (rc) 190 if (rc)
190 goto out; 191 goto out;
@@ -355,7 +356,6 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
355 struct TCP_Server_Info *server; 356 struct TCP_Server_Info *server;
356 u16 count; 357 u16 count;
357 unsigned int secFlags; 358 unsigned int secFlags;
358 u16 dialect;
359 359
360 if (ses->server) 360 if (ses->server)
361 server = ses->server; 361 server = ses->server;
@@ -372,9 +372,9 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
372 if (ses->overrideSecFlg & (~(CIFSSEC_MUST_SIGN | CIFSSEC_MUST_SEAL))) 372 if (ses->overrideSecFlg & (~(CIFSSEC_MUST_SIGN | CIFSSEC_MUST_SEAL)))
373 secFlags = ses->overrideSecFlg; /* BB FIXME fix sign flags? */ 373 secFlags = ses->overrideSecFlg; /* BB FIXME fix sign flags? */
374 else /* if override flags set only sign/seal OR them with global auth */ 374 else /* if override flags set only sign/seal OR them with global auth */
375 secFlags = extended_security | ses->overrideSecFlg; 375 secFlags = global_secflags | ses->overrideSecFlg;
376 376
377 cFYI(1, ("secFlags 0x%x", secFlags)); 377 cFYI(1, "secFlags 0x%x", secFlags);
378 378
379 pSMB->hdr.Mid = GetNextMid(server); 379 pSMB->hdr.Mid = GetNextMid(server);
380 pSMB->hdr.Flags2 |= (SMBFLG2_UNICODE | SMBFLG2_ERR_STATUS); 380 pSMB->hdr.Flags2 |= (SMBFLG2_UNICODE | SMBFLG2_ERR_STATUS);
@@ -382,14 +382,14 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
382 if ((secFlags & CIFSSEC_MUST_KRB5) == CIFSSEC_MUST_KRB5) 382 if ((secFlags & CIFSSEC_MUST_KRB5) == CIFSSEC_MUST_KRB5)
383 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC; 383 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC;
384 else if ((secFlags & CIFSSEC_AUTH_MASK) == CIFSSEC_MAY_KRB5) { 384 else if ((secFlags & CIFSSEC_AUTH_MASK) == CIFSSEC_MAY_KRB5) {
385 cFYI(1, ("Kerberos only mechanism, enable extended security")); 385 cFYI(1, "Kerberos only mechanism, enable extended security");
386 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC; 386 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC;
387 } 387 }
388#ifdef CONFIG_CIFS_EXPERIMENTAL 388#ifdef CONFIG_CIFS_EXPERIMENTAL
389 else if ((secFlags & CIFSSEC_MUST_NTLMSSP) == CIFSSEC_MUST_NTLMSSP) 389 else if ((secFlags & CIFSSEC_MUST_NTLMSSP) == CIFSSEC_MUST_NTLMSSP)
390 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC; 390 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC;
391 else if ((secFlags & CIFSSEC_AUTH_MASK) == CIFSSEC_MAY_NTLMSSP) { 391 else if ((secFlags & CIFSSEC_AUTH_MASK) == CIFSSEC_MAY_NTLMSSP) {
392 cFYI(1, ("NTLMSSP only mechanism, enable extended security")); 392 cFYI(1, "NTLMSSP only mechanism, enable extended security");
393 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC; 393 pSMB->hdr.Flags2 |= SMBFLG2_EXT_SEC;
394 } 394 }
395#endif 395#endif
@@ -408,10 +408,10 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
408 if (rc != 0) 408 if (rc != 0)
409 goto neg_err_exit; 409 goto neg_err_exit;
410 410
411 dialect = le16_to_cpu(pSMBr->DialectIndex); 411 server->dialect = le16_to_cpu(pSMBr->DialectIndex);
412 cFYI(1, ("Dialect: %d", dialect)); 412 cFYI(1, "Dialect: %d", server->dialect);
413 /* Check wct = 1 error case */ 413 /* Check wct = 1 error case */
414 if ((pSMBr->hdr.WordCount < 13) || (dialect == BAD_PROT)) { 414 if ((pSMBr->hdr.WordCount < 13) || (server->dialect == BAD_PROT)) {
415 /* core returns wct = 1, but we do not ask for core - otherwise 415 /* core returns wct = 1, but we do not ask for core - otherwise
416 small wct just comes when dialect index is -1 indicating we 416 small wct just comes when dialect index is -1 indicating we
417 could not negotiate a common dialect */ 417 could not negotiate a common dialect */
@@ -419,8 +419,8 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
419 goto neg_err_exit; 419 goto neg_err_exit;
420#ifdef CONFIG_CIFS_WEAK_PW_HASH 420#ifdef CONFIG_CIFS_WEAK_PW_HASH
421 } else if ((pSMBr->hdr.WordCount == 13) 421 } else if ((pSMBr->hdr.WordCount == 13)
422 && ((dialect == LANMAN_PROT) 422 && ((server->dialect == LANMAN_PROT)
423 || (dialect == LANMAN2_PROT))) { 423 || (server->dialect == LANMAN2_PROT))) {
424 __s16 tmp; 424 __s16 tmp;
425 struct lanman_neg_rsp *rsp = (struct lanman_neg_rsp *)pSMBr; 425 struct lanman_neg_rsp *rsp = (struct lanman_neg_rsp *)pSMBr;
426 426
@@ -428,8 +428,8 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
428 (secFlags & CIFSSEC_MAY_PLNTXT)) 428 (secFlags & CIFSSEC_MAY_PLNTXT))
429 server->secType = LANMAN; 429 server->secType = LANMAN;
430 else { 430 else {
431 cERROR(1, ("mount failed weak security disabled" 431 cERROR(1, "mount failed weak security disabled"
432 " in /proc/fs/cifs/SecurityFlags")); 432 " in /proc/fs/cifs/SecurityFlags");
433 rc = -EOPNOTSUPP; 433 rc = -EOPNOTSUPP;
434 goto neg_err_exit; 434 goto neg_err_exit;
435 } 435 }
@@ -462,9 +462,9 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
462 utc = CURRENT_TIME; 462 utc = CURRENT_TIME;
463 ts = cnvrtDosUnixTm(rsp->SrvTime.Date, 463 ts = cnvrtDosUnixTm(rsp->SrvTime.Date,
464 rsp->SrvTime.Time, 0); 464 rsp->SrvTime.Time, 0);
465 cFYI(1, ("SrvTime %d sec since 1970 (utc: %d) diff: %d", 465 cFYI(1, "SrvTime %d sec since 1970 (utc: %d) diff: %d",
466 (int)ts.tv_sec, (int)utc.tv_sec, 466 (int)ts.tv_sec, (int)utc.tv_sec,
467 (int)(utc.tv_sec - ts.tv_sec))); 467 (int)(utc.tv_sec - ts.tv_sec));
468 val = (int)(utc.tv_sec - ts.tv_sec); 468 val = (int)(utc.tv_sec - ts.tv_sec);
469 seconds = abs(val); 469 seconds = abs(val);
470 result = (seconds / MIN_TZ_ADJ) * MIN_TZ_ADJ; 470 result = (seconds / MIN_TZ_ADJ) * MIN_TZ_ADJ;
@@ -478,7 +478,7 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
478 server->timeAdj = (int)tmp; 478 server->timeAdj = (int)tmp;
479 server->timeAdj *= 60; /* also in seconds */ 479 server->timeAdj *= 60; /* also in seconds */
480 } 480 }
481 cFYI(1, ("server->timeAdj: %d seconds", server->timeAdj)); 481 cFYI(1, "server->timeAdj: %d seconds", server->timeAdj);
482 482
483 483
484 /* BB get server time for time conversions and add 484 /* BB get server time for time conversions and add
@@ -493,14 +493,14 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
493 goto neg_err_exit; 493 goto neg_err_exit;
494 } 494 }
495 495
496 cFYI(1, ("LANMAN negotiated")); 496 cFYI(1, "LANMAN negotiated");
497 /* we will not end up setting signing flags - as no signing 497 /* we will not end up setting signing flags - as no signing
498 was in LANMAN and server did not return the flags on */ 498 was in LANMAN and server did not return the flags on */
499 goto signing_check; 499 goto signing_check;
500#else /* weak security disabled */ 500#else /* weak security disabled */
501 } else if (pSMBr->hdr.WordCount == 13) { 501 } else if (pSMBr->hdr.WordCount == 13) {
502 cERROR(1, ("mount failed, cifs module not built " 502 cERROR(1, "mount failed, cifs module not built "
503 "with CIFS_WEAK_PW_HASH support")); 503 "with CIFS_WEAK_PW_HASH support");
504 rc = -EOPNOTSUPP; 504 rc = -EOPNOTSUPP;
505#endif /* WEAK_PW_HASH */ 505#endif /* WEAK_PW_HASH */
506 goto neg_err_exit; 506 goto neg_err_exit;
@@ -512,14 +512,14 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
512 /* else wct == 17 NTLM */ 512 /* else wct == 17 NTLM */
513 server->secMode = pSMBr->SecurityMode; 513 server->secMode = pSMBr->SecurityMode;
514 if ((server->secMode & SECMODE_USER) == 0) 514 if ((server->secMode & SECMODE_USER) == 0)
515 cFYI(1, ("share mode security")); 515 cFYI(1, "share mode security");
516 516
517 if ((server->secMode & SECMODE_PW_ENCRYPT) == 0) 517 if ((server->secMode & SECMODE_PW_ENCRYPT) == 0)
518#ifdef CONFIG_CIFS_WEAK_PW_HASH 518#ifdef CONFIG_CIFS_WEAK_PW_HASH
519 if ((secFlags & CIFSSEC_MAY_PLNTXT) == 0) 519 if ((secFlags & CIFSSEC_MAY_PLNTXT) == 0)
520#endif /* CIFS_WEAK_PW_HASH */ 520#endif /* CIFS_WEAK_PW_HASH */
521 cERROR(1, ("Server requests plain text password" 521 cERROR(1, "Server requests plain text password"
522 " but client support disabled")); 522 " but client support disabled");
523 523
524 if ((secFlags & CIFSSEC_MUST_NTLMV2) == CIFSSEC_MUST_NTLMV2) 524 if ((secFlags & CIFSSEC_MUST_NTLMV2) == CIFSSEC_MUST_NTLMV2)
525 server->secType = NTLMv2; 525 server->secType = NTLMv2;
@@ -539,7 +539,7 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
539#endif */ 539#endif */
540 else { 540 else {
541 rc = -EOPNOTSUPP; 541 rc = -EOPNOTSUPP;
542 cERROR(1, ("Invalid security type")); 542 cERROR(1, "Invalid security type");
543 goto neg_err_exit; 543 goto neg_err_exit;
544 } 544 }
545 /* else ... any others ...? */ 545 /* else ... any others ...? */
@@ -551,7 +551,7 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
551 server->maxBuf = min(le32_to_cpu(pSMBr->MaxBufferSize), 551 server->maxBuf = min(le32_to_cpu(pSMBr->MaxBufferSize),
552 (__u32) CIFSMaxBufSize + MAX_CIFS_HDR_SIZE); 552 (__u32) CIFSMaxBufSize + MAX_CIFS_HDR_SIZE);
553 server->max_rw = le32_to_cpu(pSMBr->MaxRawSize); 553 server->max_rw = le32_to_cpu(pSMBr->MaxRawSize);
554 cFYI(DBG2, ("Max buf = %d", ses->server->maxBuf)); 554 cFYI(DBG2, "Max buf = %d", ses->server->maxBuf);
555 GETU32(ses->server->sessid) = le32_to_cpu(pSMBr->SessionKey); 555 GETU32(ses->server->sessid) = le32_to_cpu(pSMBr->SessionKey);
556 server->capabilities = le32_to_cpu(pSMBr->Capabilities); 556 server->capabilities = le32_to_cpu(pSMBr->Capabilities);
557 server->timeAdj = (int)(__s16)le16_to_cpu(pSMBr->ServerTimeZone); 557 server->timeAdj = (int)(__s16)le16_to_cpu(pSMBr->ServerTimeZone);
@@ -582,7 +582,7 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
582 if (memcmp(server->server_GUID, 582 if (memcmp(server->server_GUID,
583 pSMBr->u.extended_response. 583 pSMBr->u.extended_response.
584 GUID, 16) != 0) { 584 GUID, 16) != 0) {
585 cFYI(1, ("server UID changed")); 585 cFYI(1, "server UID changed");
586 memcpy(server->server_GUID, 586 memcpy(server->server_GUID,
587 pSMBr->u.extended_response.GUID, 587 pSMBr->u.extended_response.GUID,
588 16); 588 16);
@@ -597,13 +597,19 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
597 server->secType = RawNTLMSSP; 597 server->secType = RawNTLMSSP;
598 } else { 598 } else {
599 rc = decode_negTokenInit(pSMBr->u.extended_response. 599 rc = decode_negTokenInit(pSMBr->u.extended_response.
600 SecurityBlob, 600 SecurityBlob, count - 16,
601 count - 16, 601 server);
602 &server->secType);
603 if (rc == 1) 602 if (rc == 1)
604 rc = 0; 603 rc = 0;
605 else 604 else
606 rc = -EINVAL; 605 rc = -EINVAL;
606
607 if (server->sec_kerberos || server->sec_mskerberos)
608 server->secType = Kerberos;
609 else if (server->sec_ntlmssp)
610 server->secType = RawNTLMSSP;
611 else
612 rc = -EOPNOTSUPP;
607 } 613 }
608 } else 614 } else
609 server->capabilities &= ~CAP_EXTENDED_SECURITY; 615 server->capabilities &= ~CAP_EXTENDED_SECURITY;
@@ -614,22 +620,21 @@ signing_check:
614 if ((secFlags & CIFSSEC_MAY_SIGN) == 0) { 620 if ((secFlags & CIFSSEC_MAY_SIGN) == 0) {
615 /* MUST_SIGN already includes the MAY_SIGN FLAG 621 /* MUST_SIGN already includes the MAY_SIGN FLAG
616 so if this is zero it means that signing is disabled */ 622 so if this is zero it means that signing is disabled */
617 cFYI(1, ("Signing disabled")); 623 cFYI(1, "Signing disabled");
618 if (server->secMode & SECMODE_SIGN_REQUIRED) { 624 if (server->secMode & SECMODE_SIGN_REQUIRED) {
619 cERROR(1, ("Server requires " 625 cERROR(1, "Server requires "
620 "packet signing to be enabled in " 626 "packet signing to be enabled in "
621 "/proc/fs/cifs/SecurityFlags.")); 627 "/proc/fs/cifs/SecurityFlags.");
622 rc = -EOPNOTSUPP; 628 rc = -EOPNOTSUPP;
623 } 629 }
624 server->secMode &= 630 server->secMode &=
625 ~(SECMODE_SIGN_ENABLED | SECMODE_SIGN_REQUIRED); 631 ~(SECMODE_SIGN_ENABLED | SECMODE_SIGN_REQUIRED);
626 } else if ((secFlags & CIFSSEC_MUST_SIGN) == CIFSSEC_MUST_SIGN) { 632 } else if ((secFlags & CIFSSEC_MUST_SIGN) == CIFSSEC_MUST_SIGN) {
627 /* signing required */ 633 /* signing required */
628 cFYI(1, ("Must sign - secFlags 0x%x", secFlags)); 634 cFYI(1, "Must sign - secFlags 0x%x", secFlags);
629 if ((server->secMode & 635 if ((server->secMode &
630 (SECMODE_SIGN_ENABLED | SECMODE_SIGN_REQUIRED)) == 0) { 636 (SECMODE_SIGN_ENABLED | SECMODE_SIGN_REQUIRED)) == 0) {
631 cERROR(1, 637 cERROR(1, "signing required but server lacks support");
632 ("signing required but server lacks support"));
633 rc = -EOPNOTSUPP; 638 rc = -EOPNOTSUPP;
634 } else 639 } else
635 server->secMode |= SECMODE_SIGN_REQUIRED; 640 server->secMode |= SECMODE_SIGN_REQUIRED;
@@ -643,7 +648,7 @@ signing_check:
643neg_err_exit: 648neg_err_exit:
644 cifs_buf_release(pSMB); 649 cifs_buf_release(pSMB);
645 650
646 cFYI(1, ("negprot rc %d", rc)); 651 cFYI(1, "negprot rc %d", rc);
647 return rc; 652 return rc;
648} 653}
649 654
@@ -653,7 +658,7 @@ CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon)
653 struct smb_hdr *smb_buffer; 658 struct smb_hdr *smb_buffer;
654 int rc = 0; 659 int rc = 0;
655 660
656 cFYI(1, ("In tree disconnect")); 661 cFYI(1, "In tree disconnect");
657 662
658 /* BB: do we need to check this? These should never be NULL. */ 663 /* BB: do we need to check this? These should never be NULL. */
659 if ((tcon->ses == NULL) || (tcon->ses->server == NULL)) 664 if ((tcon->ses == NULL) || (tcon->ses->server == NULL))
@@ -675,7 +680,7 @@ CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon)
675 680
676 rc = SendReceiveNoRsp(xid, tcon->ses, smb_buffer, 0); 681 rc = SendReceiveNoRsp(xid, tcon->ses, smb_buffer, 0);
677 if (rc) 682 if (rc)
678 cFYI(1, ("Tree disconnect failed %d", rc)); 683 cFYI(1, "Tree disconnect failed %d", rc);
679 684
680 /* No need to return error on this operation if tid invalidated and 685 /* No need to return error on this operation if tid invalidated and
681 closed on server already e.g. due to tcp session crashing */ 686 closed on server already e.g. due to tcp session crashing */
@@ -691,7 +696,7 @@ CIFSSMBLogoff(const int xid, struct cifsSesInfo *ses)
691 LOGOFF_ANDX_REQ *pSMB; 696 LOGOFF_ANDX_REQ *pSMB;
692 int rc = 0; 697 int rc = 0;
693 698
694 cFYI(1, ("In SMBLogoff for session disconnect")); 699 cFYI(1, "In SMBLogoff for session disconnect");
695 700
696 /* 701 /*
697 * BB: do we need to check validity of ses and server? They should 702 * BB: do we need to check validity of ses and server? They should
@@ -744,7 +749,7 @@ CIFSPOSIXDelFile(const int xid, struct cifsTconInfo *tcon, const char *fileName,
744 int bytes_returned = 0; 749 int bytes_returned = 0;
745 __u16 params, param_offset, offset, byte_count; 750 __u16 params, param_offset, offset, byte_count;
746 751
747 cFYI(1, ("In POSIX delete")); 752 cFYI(1, "In POSIX delete");
748PsxDelete: 753PsxDelete:
749 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 754 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
750 (void **) &pSMBr); 755 (void **) &pSMBr);
@@ -796,7 +801,7 @@ PsxDelete:
796 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 801 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
797 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 802 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
798 if (rc) 803 if (rc)
799 cFYI(1, ("Posix delete returned %d", rc)); 804 cFYI(1, "Posix delete returned %d", rc);
800 cifs_buf_release(pSMB); 805 cifs_buf_release(pSMB);
801 806
802 cifs_stats_inc(&tcon->num_deletes); 807 cifs_stats_inc(&tcon->num_deletes);
@@ -843,7 +848,7 @@ DelFileRetry:
843 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 848 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
844 cifs_stats_inc(&tcon->num_deletes); 849 cifs_stats_inc(&tcon->num_deletes);
845 if (rc) 850 if (rc)
846 cFYI(1, ("Error in RMFile = %d", rc)); 851 cFYI(1, "Error in RMFile = %d", rc);
847 852
848 cifs_buf_release(pSMB); 853 cifs_buf_release(pSMB);
849 if (rc == -EAGAIN) 854 if (rc == -EAGAIN)
@@ -862,7 +867,7 @@ CIFSSMBRmDir(const int xid, struct cifsTconInfo *tcon, const char *dirName,
862 int bytes_returned; 867 int bytes_returned;
863 int name_len; 868 int name_len;
864 869
865 cFYI(1, ("In CIFSSMBRmDir")); 870 cFYI(1, "In CIFSSMBRmDir");
866RmDirRetry: 871RmDirRetry:
867 rc = smb_init(SMB_COM_DELETE_DIRECTORY, 0, tcon, (void **) &pSMB, 872 rc = smb_init(SMB_COM_DELETE_DIRECTORY, 0, tcon, (void **) &pSMB,
868 (void **) &pSMBr); 873 (void **) &pSMBr);
@@ -887,7 +892,7 @@ RmDirRetry:
887 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 892 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
888 cifs_stats_inc(&tcon->num_rmdirs); 893 cifs_stats_inc(&tcon->num_rmdirs);
889 if (rc) 894 if (rc)
890 cFYI(1, ("Error in RMDir = %d", rc)); 895 cFYI(1, "Error in RMDir = %d", rc);
891 896
892 cifs_buf_release(pSMB); 897 cifs_buf_release(pSMB);
893 if (rc == -EAGAIN) 898 if (rc == -EAGAIN)
@@ -905,7 +910,7 @@ CIFSSMBMkDir(const int xid, struct cifsTconInfo *tcon,
905 int bytes_returned; 910 int bytes_returned;
906 int name_len; 911 int name_len;
907 912
908 cFYI(1, ("In CIFSSMBMkDir")); 913 cFYI(1, "In CIFSSMBMkDir");
909MkDirRetry: 914MkDirRetry:
910 rc = smb_init(SMB_COM_CREATE_DIRECTORY, 0, tcon, (void **) &pSMB, 915 rc = smb_init(SMB_COM_CREATE_DIRECTORY, 0, tcon, (void **) &pSMB,
911 (void **) &pSMBr); 916 (void **) &pSMBr);
@@ -930,7 +935,7 @@ MkDirRetry:
930 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 935 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
931 cifs_stats_inc(&tcon->num_mkdirs); 936 cifs_stats_inc(&tcon->num_mkdirs);
932 if (rc) 937 if (rc)
933 cFYI(1, ("Error in Mkdir = %d", rc)); 938 cFYI(1, "Error in Mkdir = %d", rc);
934 939
935 cifs_buf_release(pSMB); 940 cifs_buf_release(pSMB);
936 if (rc == -EAGAIN) 941 if (rc == -EAGAIN)
@@ -953,7 +958,7 @@ CIFSPOSIXCreate(const int xid, struct cifsTconInfo *tcon, __u32 posix_flags,
953 OPEN_PSX_REQ *pdata; 958 OPEN_PSX_REQ *pdata;
954 OPEN_PSX_RSP *psx_rsp; 959 OPEN_PSX_RSP *psx_rsp;
955 960
956 cFYI(1, ("In POSIX Create")); 961 cFYI(1, "In POSIX Create");
957PsxCreat: 962PsxCreat:
958 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 963 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
959 (void **) &pSMBr); 964 (void **) &pSMBr);
@@ -1007,11 +1012,11 @@ PsxCreat:
1007 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 1012 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
1008 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 1013 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
1009 if (rc) { 1014 if (rc) {
1010 cFYI(1, ("Posix create returned %d", rc)); 1015 cFYI(1, "Posix create returned %d", rc);
1011 goto psx_create_err; 1016 goto psx_create_err;
1012 } 1017 }
1013 1018
1014 cFYI(1, ("copying inode info")); 1019 cFYI(1, "copying inode info");
1015 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 1020 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
1016 1021
1017 if (rc || (pSMBr->ByteCount < sizeof(OPEN_PSX_RSP))) { 1022 if (rc || (pSMBr->ByteCount < sizeof(OPEN_PSX_RSP))) {
@@ -1033,11 +1038,11 @@ PsxCreat:
1033 /* check to make sure response data is there */ 1038 /* check to make sure response data is there */
1034 if (psx_rsp->ReturnedLevel != cpu_to_le16(SMB_QUERY_FILE_UNIX_BASIC)) { 1039 if (psx_rsp->ReturnedLevel != cpu_to_le16(SMB_QUERY_FILE_UNIX_BASIC)) {
1035 pRetData->Type = cpu_to_le32(-1); /* unknown */ 1040 pRetData->Type = cpu_to_le32(-1); /* unknown */
1036 cFYI(DBG2, ("unknown type")); 1041 cFYI(DBG2, "unknown type");
1037 } else { 1042 } else {
1038 if (pSMBr->ByteCount < sizeof(OPEN_PSX_RSP) 1043 if (pSMBr->ByteCount < sizeof(OPEN_PSX_RSP)
1039 + sizeof(FILE_UNIX_BASIC_INFO)) { 1044 + sizeof(FILE_UNIX_BASIC_INFO)) {
1040 cERROR(1, ("Open response data too small")); 1045 cERROR(1, "Open response data too small");
1041 pRetData->Type = cpu_to_le32(-1); 1046 pRetData->Type = cpu_to_le32(-1);
1042 goto psx_create_err; 1047 goto psx_create_err;
1043 } 1048 }
@@ -1084,7 +1089,7 @@ static __u16 convert_disposition(int disposition)
1084 ofun = SMBOPEN_OCREATE | SMBOPEN_OTRUNC; 1089 ofun = SMBOPEN_OCREATE | SMBOPEN_OTRUNC;
1085 break; 1090 break;
1086 default: 1091 default:
1087 cFYI(1, ("unknown disposition %d", disposition)); 1092 cFYI(1, "unknown disposition %d", disposition);
1088 ofun = SMBOPEN_OAPPEND; /* regular open */ 1093 ofun = SMBOPEN_OAPPEND; /* regular open */
1089 } 1094 }
1090 return ofun; 1095 return ofun;
@@ -1175,7 +1180,7 @@ OldOpenRetry:
1175 (struct smb_hdr *)pSMBr, &bytes_returned, CIFS_LONG_OP); 1180 (struct smb_hdr *)pSMBr, &bytes_returned, CIFS_LONG_OP);
1176 cifs_stats_inc(&tcon->num_opens); 1181 cifs_stats_inc(&tcon->num_opens);
1177 if (rc) { 1182 if (rc) {
1178 cFYI(1, ("Error in Open = %d", rc)); 1183 cFYI(1, "Error in Open = %d", rc);
1179 } else { 1184 } else {
1180 /* BB verify if wct == 15 */ 1185 /* BB verify if wct == 15 */
1181 1186
@@ -1288,7 +1293,7 @@ openRetry:
1288 (struct smb_hdr *)pSMBr, &bytes_returned, CIFS_LONG_OP); 1293 (struct smb_hdr *)pSMBr, &bytes_returned, CIFS_LONG_OP);
1289 cifs_stats_inc(&tcon->num_opens); 1294 cifs_stats_inc(&tcon->num_opens);
1290 if (rc) { 1295 if (rc) {
1291 cFYI(1, ("Error in Open = %d", rc)); 1296 cFYI(1, "Error in Open = %d", rc);
1292 } else { 1297 } else {
1293 *pOplock = pSMBr->OplockLevel; /* 1 byte no need to le_to_cpu */ 1298 *pOplock = pSMBr->OplockLevel; /* 1 byte no need to le_to_cpu */
1294 *netfid = pSMBr->Fid; /* cifs fid stays in le */ 1299 *netfid = pSMBr->Fid; /* cifs fid stays in le */
@@ -1326,7 +1331,7 @@ CIFSSMBRead(const int xid, struct cifsTconInfo *tcon, const int netfid,
1326 int resp_buf_type = 0; 1331 int resp_buf_type = 0;
1327 struct kvec iov[1]; 1332 struct kvec iov[1];
1328 1333
1329 cFYI(1, ("Reading %d bytes on fid %d", count, netfid)); 1334 cFYI(1, "Reading %d bytes on fid %d", count, netfid);
1330 if (tcon->ses->capabilities & CAP_LARGE_FILES) 1335 if (tcon->ses->capabilities & CAP_LARGE_FILES)
1331 wct = 12; 1336 wct = 12;
1332 else { 1337 else {
@@ -1371,7 +1376,7 @@ CIFSSMBRead(const int xid, struct cifsTconInfo *tcon, const int netfid,
1371 cifs_stats_inc(&tcon->num_reads); 1376 cifs_stats_inc(&tcon->num_reads);
1372 pSMBr = (READ_RSP *)iov[0].iov_base; 1377 pSMBr = (READ_RSP *)iov[0].iov_base;
1373 if (rc) { 1378 if (rc) {
1374 cERROR(1, ("Send error in read = %d", rc)); 1379 cERROR(1, "Send error in read = %d", rc);
1375 } else { 1380 } else {
1376 int data_length = le16_to_cpu(pSMBr->DataLengthHigh); 1381 int data_length = le16_to_cpu(pSMBr->DataLengthHigh);
1377 data_length = data_length << 16; 1382 data_length = data_length << 16;
@@ -1381,15 +1386,15 @@ CIFSSMBRead(const int xid, struct cifsTconInfo *tcon, const int netfid,
1381 /*check that DataLength would not go beyond end of SMB */ 1386 /*check that DataLength would not go beyond end of SMB */
1382 if ((data_length > CIFSMaxBufSize) 1387 if ((data_length > CIFSMaxBufSize)
1383 || (data_length > count)) { 1388 || (data_length > count)) {
1384 cFYI(1, ("bad length %d for count %d", 1389 cFYI(1, "bad length %d for count %d",
1385 data_length, count)); 1390 data_length, count);
1386 rc = -EIO; 1391 rc = -EIO;
1387 *nbytes = 0; 1392 *nbytes = 0;
1388 } else { 1393 } else {
1389 pReadData = (char *) (&pSMBr->hdr.Protocol) + 1394 pReadData = (char *) (&pSMBr->hdr.Protocol) +
1390 le16_to_cpu(pSMBr->DataOffset); 1395 le16_to_cpu(pSMBr->DataOffset);
1391/* if (rc = copy_to_user(buf, pReadData, data_length)) { 1396/* if (rc = copy_to_user(buf, pReadData, data_length)) {
1392 cERROR(1,("Faulting on read rc = %d",rc)); 1397 cERROR(1, "Faulting on read rc = %d",rc);
1393 rc = -EFAULT; 1398 rc = -EFAULT;
1394 }*/ /* can not use copy_to_user when using page cache*/ 1399 }*/ /* can not use copy_to_user when using page cache*/
1395 if (*buf) 1400 if (*buf)
@@ -1433,7 +1438,7 @@ CIFSSMBWrite(const int xid, struct cifsTconInfo *tcon,
1433 1438
1434 *nbytes = 0; 1439 *nbytes = 0;
1435 1440
1436 /* cFYI(1, ("write at %lld %d bytes", offset, count));*/ 1441 /* cFYI(1, "write at %lld %d bytes", offset, count);*/
1437 if (tcon->ses == NULL) 1442 if (tcon->ses == NULL)
1438 return -ECONNABORTED; 1443 return -ECONNABORTED;
1439 1444
@@ -1514,7 +1519,7 @@ CIFSSMBWrite(const int xid, struct cifsTconInfo *tcon,
1514 (struct smb_hdr *) pSMBr, &bytes_returned, long_op); 1519 (struct smb_hdr *) pSMBr, &bytes_returned, long_op);
1515 cifs_stats_inc(&tcon->num_writes); 1520 cifs_stats_inc(&tcon->num_writes);
1516 if (rc) { 1521 if (rc) {
1517 cFYI(1, ("Send error in write = %d", rc)); 1522 cFYI(1, "Send error in write = %d", rc);
1518 } else { 1523 } else {
1519 *nbytes = le16_to_cpu(pSMBr->CountHigh); 1524 *nbytes = le16_to_cpu(pSMBr->CountHigh);
1520 *nbytes = (*nbytes) << 16; 1525 *nbytes = (*nbytes) << 16;
@@ -1551,7 +1556,7 @@ CIFSSMBWrite2(const int xid, struct cifsTconInfo *tcon,
1551 1556
1552 *nbytes = 0; 1557 *nbytes = 0;
1553 1558
1554 cFYI(1, ("write2 at %lld %d bytes", (long long)offset, count)); 1559 cFYI(1, "write2 at %lld %d bytes", (long long)offset, count);
1555 1560
1556 if (tcon->ses->capabilities & CAP_LARGE_FILES) { 1561 if (tcon->ses->capabilities & CAP_LARGE_FILES) {
1557 wct = 14; 1562 wct = 14;
@@ -1606,7 +1611,7 @@ CIFSSMBWrite2(const int xid, struct cifsTconInfo *tcon,
1606 long_op); 1611 long_op);
1607 cifs_stats_inc(&tcon->num_writes); 1612 cifs_stats_inc(&tcon->num_writes);
1608 if (rc) { 1613 if (rc) {
1609 cFYI(1, ("Send error Write2 = %d", rc)); 1614 cFYI(1, "Send error Write2 = %d", rc);
1610 } else if (resp_buf_type == 0) { 1615 } else if (resp_buf_type == 0) {
1611 /* presumably this can not happen, but best to be safe */ 1616 /* presumably this can not happen, but best to be safe */
1612 rc = -EIO; 1617 rc = -EIO;
@@ -1651,7 +1656,7 @@ CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
1651 int timeout = 0; 1656 int timeout = 0;
1652 __u16 count; 1657 __u16 count;
1653 1658
1654 cFYI(1, ("CIFSSMBLock timeout %d numLock %d", (int)waitFlag, numLock)); 1659 cFYI(1, "CIFSSMBLock timeout %d numLock %d", (int)waitFlag, numLock);
1655 rc = small_smb_init(SMB_COM_LOCKING_ANDX, 8, tcon, (void **) &pSMB); 1660 rc = small_smb_init(SMB_COM_LOCKING_ANDX, 8, tcon, (void **) &pSMB);
1656 1661
1657 if (rc) 1662 if (rc)
@@ -1699,7 +1704,7 @@ CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
1699 } 1704 }
1700 cifs_stats_inc(&tcon->num_locks); 1705 cifs_stats_inc(&tcon->num_locks);
1701 if (rc) 1706 if (rc)
1702 cFYI(1, ("Send error in Lock = %d", rc)); 1707 cFYI(1, "Send error in Lock = %d", rc);
1703 1708
1704 /* Note: On -EAGAIN error only caller can retry on handle based calls 1709 /* Note: On -EAGAIN error only caller can retry on handle based calls
1705 since file handle passed in no longer valid */ 1710 since file handle passed in no longer valid */
@@ -1722,7 +1727,7 @@ CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
1722 __u16 params, param_offset, offset, byte_count, count; 1727 __u16 params, param_offset, offset, byte_count, count;
1723 struct kvec iov[1]; 1728 struct kvec iov[1];
1724 1729
1725 cFYI(1, ("Posix Lock")); 1730 cFYI(1, "Posix Lock");
1726 1731
1727 if (pLockData == NULL) 1732 if (pLockData == NULL)
1728 return -EINVAL; 1733 return -EINVAL;
@@ -1792,7 +1797,7 @@ CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
1792 } 1797 }
1793 1798
1794 if (rc) { 1799 if (rc) {
1795 cFYI(1, ("Send error in Posix Lock = %d", rc)); 1800 cFYI(1, "Send error in Posix Lock = %d", rc);
1796 } else if (get_flag) { 1801 } else if (get_flag) {
1797 /* lock structure can be returned on get */ 1802 /* lock structure can be returned on get */
1798 __u16 data_offset; 1803 __u16 data_offset;
@@ -1849,7 +1854,7 @@ CIFSSMBClose(const int xid, struct cifsTconInfo *tcon, int smb_file_id)
1849{ 1854{
1850 int rc = 0; 1855 int rc = 0;
1851 CLOSE_REQ *pSMB = NULL; 1856 CLOSE_REQ *pSMB = NULL;
1852 cFYI(1, ("In CIFSSMBClose")); 1857 cFYI(1, "In CIFSSMBClose");
1853 1858
1854/* do not retry on dead session on close */ 1859/* do not retry on dead session on close */
1855 rc = small_smb_init(SMB_COM_CLOSE, 3, tcon, (void **) &pSMB); 1860 rc = small_smb_init(SMB_COM_CLOSE, 3, tcon, (void **) &pSMB);
@@ -1866,7 +1871,7 @@ CIFSSMBClose(const int xid, struct cifsTconInfo *tcon, int smb_file_id)
1866 if (rc) { 1871 if (rc) {
1867 if (rc != -EINTR) { 1872 if (rc != -EINTR) {
1868 /* EINTR is expected when user ctl-c to kill app */ 1873 /* EINTR is expected when user ctl-c to kill app */
1869 cERROR(1, ("Send error in Close = %d", rc)); 1874 cERROR(1, "Send error in Close = %d", rc);
1870 } 1875 }
1871 } 1876 }
1872 1877
@@ -1882,7 +1887,7 @@ CIFSSMBFlush(const int xid, struct cifsTconInfo *tcon, int smb_file_id)
1882{ 1887{
1883 int rc = 0; 1888 int rc = 0;
1884 FLUSH_REQ *pSMB = NULL; 1889 FLUSH_REQ *pSMB = NULL;
1885 cFYI(1, ("In CIFSSMBFlush")); 1890 cFYI(1, "In CIFSSMBFlush");
1886 1891
1887 rc = small_smb_init(SMB_COM_FLUSH, 1, tcon, (void **) &pSMB); 1892 rc = small_smb_init(SMB_COM_FLUSH, 1, tcon, (void **) &pSMB);
1888 if (rc) 1893 if (rc)
@@ -1893,7 +1898,7 @@ CIFSSMBFlush(const int xid, struct cifsTconInfo *tcon, int smb_file_id)
1893 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0); 1898 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0);
1894 cifs_stats_inc(&tcon->num_flushes); 1899 cifs_stats_inc(&tcon->num_flushes);
1895 if (rc) 1900 if (rc)
1896 cERROR(1, ("Send error in Flush = %d", rc)); 1901 cERROR(1, "Send error in Flush = %d", rc);
1897 1902
1898 return rc; 1903 return rc;
1899} 1904}
@@ -1910,7 +1915,7 @@ CIFSSMBRename(const int xid, struct cifsTconInfo *tcon,
1910 int name_len, name_len2; 1915 int name_len, name_len2;
1911 __u16 count; 1916 __u16 count;
1912 1917
1913 cFYI(1, ("In CIFSSMBRename")); 1918 cFYI(1, "In CIFSSMBRename");
1914renameRetry: 1919renameRetry:
1915 rc = smb_init(SMB_COM_RENAME, 1, tcon, (void **) &pSMB, 1920 rc = smb_init(SMB_COM_RENAME, 1, tcon, (void **) &pSMB,
1916 (void **) &pSMBr); 1921 (void **) &pSMBr);
@@ -1956,7 +1961,7 @@ renameRetry:
1956 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 1961 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
1957 cifs_stats_inc(&tcon->num_renames); 1962 cifs_stats_inc(&tcon->num_renames);
1958 if (rc) 1963 if (rc)
1959 cFYI(1, ("Send error in rename = %d", rc)); 1964 cFYI(1, "Send error in rename = %d", rc);
1960 1965
1961 cifs_buf_release(pSMB); 1966 cifs_buf_release(pSMB);
1962 1967
@@ -1980,7 +1985,7 @@ int CIFSSMBRenameOpenFile(const int xid, struct cifsTconInfo *pTcon,
1980 int len_of_str; 1985 int len_of_str;
1981 __u16 params, param_offset, offset, count, byte_count; 1986 __u16 params, param_offset, offset, count, byte_count;
1982 1987
1983 cFYI(1, ("Rename to File by handle")); 1988 cFYI(1, "Rename to File by handle");
1984 rc = smb_init(SMB_COM_TRANSACTION2, 15, pTcon, (void **) &pSMB, 1989 rc = smb_init(SMB_COM_TRANSACTION2, 15, pTcon, (void **) &pSMB,
1985 (void **) &pSMBr); 1990 (void **) &pSMBr);
1986 if (rc) 1991 if (rc)
@@ -2035,7 +2040,7 @@ int CIFSSMBRenameOpenFile(const int xid, struct cifsTconInfo *pTcon,
2035 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2040 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2036 cifs_stats_inc(&pTcon->num_t2renames); 2041 cifs_stats_inc(&pTcon->num_t2renames);
2037 if (rc) 2042 if (rc)
2038 cFYI(1, ("Send error in Rename (by file handle) = %d", rc)); 2043 cFYI(1, "Send error in Rename (by file handle) = %d", rc);
2039 2044
2040 cifs_buf_release(pSMB); 2045 cifs_buf_release(pSMB);
2041 2046
@@ -2057,7 +2062,7 @@ CIFSSMBCopy(const int xid, struct cifsTconInfo *tcon, const char *fromName,
2057 int name_len, name_len2; 2062 int name_len, name_len2;
2058 __u16 count; 2063 __u16 count;
2059 2064
2060 cFYI(1, ("In CIFSSMBCopy")); 2065 cFYI(1, "In CIFSSMBCopy");
2061copyRetry: 2066copyRetry:
2062 rc = smb_init(SMB_COM_COPY, 1, tcon, (void **) &pSMB, 2067 rc = smb_init(SMB_COM_COPY, 1, tcon, (void **) &pSMB,
2063 (void **) &pSMBr); 2068 (void **) &pSMBr);
@@ -2102,8 +2107,8 @@ copyRetry:
2102 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 2107 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
2103 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2108 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2104 if (rc) { 2109 if (rc) {
2105 cFYI(1, ("Send error in copy = %d with %d files copied", 2110 cFYI(1, "Send error in copy = %d with %d files copied",
2106 rc, le16_to_cpu(pSMBr->CopyCount))); 2111 rc, le16_to_cpu(pSMBr->CopyCount));
2107 } 2112 }
2108 cifs_buf_release(pSMB); 2113 cifs_buf_release(pSMB);
2109 2114
@@ -2127,7 +2132,7 @@ CIFSUnixCreateSymLink(const int xid, struct cifsTconInfo *tcon,
2127 int bytes_returned = 0; 2132 int bytes_returned = 0;
2128 __u16 params, param_offset, offset, byte_count; 2133 __u16 params, param_offset, offset, byte_count;
2129 2134
2130 cFYI(1, ("In Symlink Unix style")); 2135 cFYI(1, "In Symlink Unix style");
2131createSymLinkRetry: 2136createSymLinkRetry:
2132 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 2137 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
2133 (void **) &pSMBr); 2138 (void **) &pSMBr);
@@ -2192,7 +2197,7 @@ createSymLinkRetry:
2192 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2197 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2193 cifs_stats_inc(&tcon->num_symlinks); 2198 cifs_stats_inc(&tcon->num_symlinks);
2194 if (rc) 2199 if (rc)
2195 cFYI(1, ("Send error in SetPathInfo create symlink = %d", rc)); 2200 cFYI(1, "Send error in SetPathInfo create symlink = %d", rc);
2196 2201
2197 cifs_buf_release(pSMB); 2202 cifs_buf_release(pSMB);
2198 2203
@@ -2216,7 +2221,7 @@ CIFSUnixCreateHardLink(const int xid, struct cifsTconInfo *tcon,
2216 int bytes_returned = 0; 2221 int bytes_returned = 0;
2217 __u16 params, param_offset, offset, byte_count; 2222 __u16 params, param_offset, offset, byte_count;
2218 2223
2219 cFYI(1, ("In Create Hard link Unix style")); 2224 cFYI(1, "In Create Hard link Unix style");
2220createHardLinkRetry: 2225createHardLinkRetry:
2221 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 2226 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
2222 (void **) &pSMBr); 2227 (void **) &pSMBr);
@@ -2278,7 +2283,7 @@ createHardLinkRetry:
2278 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2283 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2279 cifs_stats_inc(&tcon->num_hardlinks); 2284 cifs_stats_inc(&tcon->num_hardlinks);
2280 if (rc) 2285 if (rc)
2281 cFYI(1, ("Send error in SetPathInfo (hard link) = %d", rc)); 2286 cFYI(1, "Send error in SetPathInfo (hard link) = %d", rc);
2282 2287
2283 cifs_buf_release(pSMB); 2288 cifs_buf_release(pSMB);
2284 if (rc == -EAGAIN) 2289 if (rc == -EAGAIN)
@@ -2299,7 +2304,7 @@ CIFSCreateHardLink(const int xid, struct cifsTconInfo *tcon,
2299 int name_len, name_len2; 2304 int name_len, name_len2;
2300 __u16 count; 2305 __u16 count;
2301 2306
2302 cFYI(1, ("In CIFSCreateHardLink")); 2307 cFYI(1, "In CIFSCreateHardLink");
2303winCreateHardLinkRetry: 2308winCreateHardLinkRetry:
2304 2309
2305 rc = smb_init(SMB_COM_NT_RENAME, 4, tcon, (void **) &pSMB, 2310 rc = smb_init(SMB_COM_NT_RENAME, 4, tcon, (void **) &pSMB,
@@ -2350,7 +2355,7 @@ winCreateHardLinkRetry:
2350 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2355 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2351 cifs_stats_inc(&tcon->num_hardlinks); 2356 cifs_stats_inc(&tcon->num_hardlinks);
2352 if (rc) 2357 if (rc)
2353 cFYI(1, ("Send error in hard link (NT rename) = %d", rc)); 2358 cFYI(1, "Send error in hard link (NT rename) = %d", rc);
2354 2359
2355 cifs_buf_release(pSMB); 2360 cifs_buf_release(pSMB);
2356 if (rc == -EAGAIN) 2361 if (rc == -EAGAIN)
@@ -2373,7 +2378,7 @@ CIFSSMBUnixQuerySymLink(const int xid, struct cifsTconInfo *tcon,
2373 __u16 params, byte_count; 2378 __u16 params, byte_count;
2374 char *data_start; 2379 char *data_start;
2375 2380
2376 cFYI(1, ("In QPathSymLinkInfo (Unix) for path %s", searchName)); 2381 cFYI(1, "In QPathSymLinkInfo (Unix) for path %s", searchName);
2377 2382
2378querySymLinkRetry: 2383querySymLinkRetry:
2379 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 2384 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
@@ -2420,7 +2425,7 @@ querySymLinkRetry:
2420 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 2425 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
2421 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2426 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2422 if (rc) { 2427 if (rc) {
2423 cFYI(1, ("Send error in QuerySymLinkInfo = %d", rc)); 2428 cFYI(1, "Send error in QuerySymLinkInfo = %d", rc);
2424 } else { 2429 } else {
2425 /* decode response */ 2430 /* decode response */
2426 2431
@@ -2521,21 +2526,21 @@ validate_ntransact(char *buf, char **ppparm, char **ppdata,
2521 2526
2522 /* should we also check that parm and data areas do not overlap? */ 2527 /* should we also check that parm and data areas do not overlap? */
2523 if (*ppparm > end_of_smb) { 2528 if (*ppparm > end_of_smb) {
2524 cFYI(1, ("parms start after end of smb")); 2529 cFYI(1, "parms start after end of smb");
2525 return -EINVAL; 2530 return -EINVAL;
2526 } else if (parm_count + *ppparm > end_of_smb) { 2531 } else if (parm_count + *ppparm > end_of_smb) {
2527 cFYI(1, ("parm end after end of smb")); 2532 cFYI(1, "parm end after end of smb");
2528 return -EINVAL; 2533 return -EINVAL;
2529 } else if (*ppdata > end_of_smb) { 2534 } else if (*ppdata > end_of_smb) {
2530 cFYI(1, ("data starts after end of smb")); 2535 cFYI(1, "data starts after end of smb");
2531 return -EINVAL; 2536 return -EINVAL;
2532 } else if (data_count + *ppdata > end_of_smb) { 2537 } else if (data_count + *ppdata > end_of_smb) {
2533 cFYI(1, ("data %p + count %d (%p) ends after end of smb %p start %p", 2538 cFYI(1, "data %p + count %d (%p) past smb end %p start %p",
2534 *ppdata, data_count, (data_count + *ppdata), 2539 *ppdata, data_count, (data_count + *ppdata),
2535 end_of_smb, pSMBr)); 2540 end_of_smb, pSMBr);
2536 return -EINVAL; 2541 return -EINVAL;
2537 } else if (parm_count + data_count > pSMBr->ByteCount) { 2542 } else if (parm_count + data_count > pSMBr->ByteCount) {
2538 cFYI(1, ("parm count and data count larger than SMB")); 2543 cFYI(1, "parm count and data count larger than SMB");
2539 return -EINVAL; 2544 return -EINVAL;
2540 } 2545 }
2541 *pdatalen = data_count; 2546 *pdatalen = data_count;
@@ -2554,7 +2559,7 @@ CIFSSMBQueryReparseLinkInfo(const int xid, struct cifsTconInfo *tcon,
2554 struct smb_com_transaction_ioctl_req *pSMB; 2559 struct smb_com_transaction_ioctl_req *pSMB;
2555 struct smb_com_transaction_ioctl_rsp *pSMBr; 2560 struct smb_com_transaction_ioctl_rsp *pSMBr;
2556 2561
2557 cFYI(1, ("In Windows reparse style QueryLink for path %s", searchName)); 2562 cFYI(1, "In Windows reparse style QueryLink for path %s", searchName);
2558 rc = smb_init(SMB_COM_NT_TRANSACT, 23, tcon, (void **) &pSMB, 2563 rc = smb_init(SMB_COM_NT_TRANSACT, 23, tcon, (void **) &pSMB,
2559 (void **) &pSMBr); 2564 (void **) &pSMBr);
2560 if (rc) 2565 if (rc)
@@ -2583,7 +2588,7 @@ CIFSSMBQueryReparseLinkInfo(const int xid, struct cifsTconInfo *tcon,
2583 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 2588 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
2584 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2589 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2585 if (rc) { 2590 if (rc) {
2586 cFYI(1, ("Send error in QueryReparseLinkInfo = %d", rc)); 2591 cFYI(1, "Send error in QueryReparseLinkInfo = %d", rc);
2587 } else { /* decode response */ 2592 } else { /* decode response */
2588 __u32 data_offset = le32_to_cpu(pSMBr->DataOffset); 2593 __u32 data_offset = le32_to_cpu(pSMBr->DataOffset);
2589 __u32 data_count = le32_to_cpu(pSMBr->DataCount); 2594 __u32 data_count = le32_to_cpu(pSMBr->DataCount);
@@ -2607,7 +2612,7 @@ CIFSSMBQueryReparseLinkInfo(const int xid, struct cifsTconInfo *tcon,
2607 if ((reparse_buf->LinkNamesBuf + 2612 if ((reparse_buf->LinkNamesBuf +
2608 reparse_buf->TargetNameOffset + 2613 reparse_buf->TargetNameOffset +
2609 reparse_buf->TargetNameLen) > end_of_smb) { 2614 reparse_buf->TargetNameLen) > end_of_smb) {
2610 cFYI(1, ("reparse buf beyond SMB")); 2615 cFYI(1, "reparse buf beyond SMB");
2611 rc = -EIO; 2616 rc = -EIO;
2612 goto qreparse_out; 2617 goto qreparse_out;
2613 } 2618 }
@@ -2628,12 +2633,12 @@ CIFSSMBQueryReparseLinkInfo(const int xid, struct cifsTconInfo *tcon,
2628 } 2633 }
2629 } else { 2634 } else {
2630 rc = -EIO; 2635 rc = -EIO;
2631 cFYI(1, ("Invalid return data count on " 2636 cFYI(1, "Invalid return data count on "
2632 "get reparse info ioctl")); 2637 "get reparse info ioctl");
2633 } 2638 }
2634 symlinkinfo[buflen] = 0; /* just in case so the caller 2639 symlinkinfo[buflen] = 0; /* just in case so the caller
2635 does not go off the end of the buffer */ 2640 does not go off the end of the buffer */
2636 cFYI(1, ("readlink result - %s", symlinkinfo)); 2641 cFYI(1, "readlink result - %s", symlinkinfo);
2637 } 2642 }
2638 2643
2639qreparse_out: 2644qreparse_out:
@@ -2656,7 +2661,7 @@ static void cifs_convert_ace(posix_acl_xattr_entry *ace,
2656 ace->e_perm = cpu_to_le16(cifs_ace->cifs_e_perm); 2661 ace->e_perm = cpu_to_le16(cifs_ace->cifs_e_perm);
2657 ace->e_tag = cpu_to_le16(cifs_ace->cifs_e_tag); 2662 ace->e_tag = cpu_to_le16(cifs_ace->cifs_e_tag);
2658 ace->e_id = cpu_to_le32(le64_to_cpu(cifs_ace->cifs_uid)); 2663 ace->e_id = cpu_to_le32(le64_to_cpu(cifs_ace->cifs_uid));
2659 /* cFYI(1,("perm %d tag %d id %d",ace->e_perm,ace->e_tag,ace->e_id)); */ 2664 /* cFYI(1, "perm %d tag %d id %d",ace->e_perm,ace->e_tag,ace->e_id); */
2660 2665
2661 return; 2666 return;
2662} 2667}
@@ -2682,8 +2687,8 @@ static int cifs_copy_posix_acl(char *trgt, char *src, const int buflen,
2682 size += sizeof(struct cifs_posix_ace) * count; 2687 size += sizeof(struct cifs_posix_ace) * count;
2683 /* check if we would go beyond end of SMB */ 2688 /* check if we would go beyond end of SMB */
2684 if (size_of_data_area < size) { 2689 if (size_of_data_area < size) {
2685 cFYI(1, ("bad CIFS POSIX ACL size %d vs. %d", 2690 cFYI(1, "bad CIFS POSIX ACL size %d vs. %d",
2686 size_of_data_area, size)); 2691 size_of_data_area, size);
2687 return -EINVAL; 2692 return -EINVAL;
2688 } 2693 }
2689 } else if (acl_type & ACL_TYPE_DEFAULT) { 2694 } else if (acl_type & ACL_TYPE_DEFAULT) {
@@ -2730,7 +2735,7 @@ static __u16 convert_ace_to_cifs_ace(struct cifs_posix_ace *cifs_ace,
2730 cifs_ace->cifs_uid = cpu_to_le64(-1); 2735 cifs_ace->cifs_uid = cpu_to_le64(-1);
2731 } else 2736 } else
2732 cifs_ace->cifs_uid = cpu_to_le64(le32_to_cpu(local_ace->e_id)); 2737 cifs_ace->cifs_uid = cpu_to_le64(le32_to_cpu(local_ace->e_id));
2733 /*cFYI(1,("perm %d tag %d id %d",ace->e_perm,ace->e_tag,ace->e_id));*/ 2738 /*cFYI(1, "perm %d tag %d id %d",ace->e_perm,ace->e_tag,ace->e_id);*/
2734 return rc; 2739 return rc;
2735} 2740}
2736 2741
@@ -2748,12 +2753,12 @@ static __u16 ACL_to_cifs_posix(char *parm_data, const char *pACL,
2748 return 0; 2753 return 0;
2749 2754
2750 count = posix_acl_xattr_count((size_t)buflen); 2755 count = posix_acl_xattr_count((size_t)buflen);
2751 cFYI(1, ("setting acl with %d entries from buf of length %d and " 2756 cFYI(1, "setting acl with %d entries from buf of length %d and "
2752 "version of %d", 2757 "version of %d",
2753 count, buflen, le32_to_cpu(local_acl->a_version))); 2758 count, buflen, le32_to_cpu(local_acl->a_version));
2754 if (le32_to_cpu(local_acl->a_version) != 2) { 2759 if (le32_to_cpu(local_acl->a_version) != 2) {
2755 cFYI(1, ("unknown POSIX ACL version %d", 2760 cFYI(1, "unknown POSIX ACL version %d",
2756 le32_to_cpu(local_acl->a_version))); 2761 le32_to_cpu(local_acl->a_version));
2757 return 0; 2762 return 0;
2758 } 2763 }
2759 cifs_acl->version = cpu_to_le16(1); 2764 cifs_acl->version = cpu_to_le16(1);
@@ -2762,7 +2767,7 @@ static __u16 ACL_to_cifs_posix(char *parm_data, const char *pACL,
2762 else if (acl_type == ACL_TYPE_DEFAULT) 2767 else if (acl_type == ACL_TYPE_DEFAULT)
2763 cifs_acl->default_entry_count = cpu_to_le16(count); 2768 cifs_acl->default_entry_count = cpu_to_le16(count);
2764 else { 2769 else {
2765 cFYI(1, ("unknown ACL type %d", acl_type)); 2770 cFYI(1, "unknown ACL type %d", acl_type);
2766 return 0; 2771 return 0;
2767 } 2772 }
2768 for (i = 0; i < count; i++) { 2773 for (i = 0; i < count; i++) {
@@ -2795,7 +2800,7 @@ CIFSSMBGetPosixACL(const int xid, struct cifsTconInfo *tcon,
2795 int name_len; 2800 int name_len;
2796 __u16 params, byte_count; 2801 __u16 params, byte_count;
2797 2802
2798 cFYI(1, ("In GetPosixACL (Unix) for path %s", searchName)); 2803 cFYI(1, "In GetPosixACL (Unix) for path %s", searchName);
2799 2804
2800queryAclRetry: 2805queryAclRetry:
2801 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 2806 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
@@ -2847,7 +2852,7 @@ queryAclRetry:
2847 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2852 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2848 cifs_stats_inc(&tcon->num_acl_get); 2853 cifs_stats_inc(&tcon->num_acl_get);
2849 if (rc) { 2854 if (rc) {
2850 cFYI(1, ("Send error in Query POSIX ACL = %d", rc)); 2855 cFYI(1, "Send error in Query POSIX ACL = %d", rc);
2851 } else { 2856 } else {
2852 /* decode response */ 2857 /* decode response */
2853 2858
@@ -2884,7 +2889,7 @@ CIFSSMBSetPosixACL(const int xid, struct cifsTconInfo *tcon,
2884 int bytes_returned = 0; 2889 int bytes_returned = 0;
2885 __u16 params, byte_count, data_count, param_offset, offset; 2890 __u16 params, byte_count, data_count, param_offset, offset;
2886 2891
2887 cFYI(1, ("In SetPosixACL (Unix) for path %s", fileName)); 2892 cFYI(1, "In SetPosixACL (Unix) for path %s", fileName);
2888setAclRetry: 2893setAclRetry:
2889 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 2894 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
2890 (void **) &pSMBr); 2895 (void **) &pSMBr);
@@ -2939,7 +2944,7 @@ setAclRetry:
2939 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 2944 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
2940 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 2945 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
2941 if (rc) 2946 if (rc)
2942 cFYI(1, ("Set POSIX ACL returned %d", rc)); 2947 cFYI(1, "Set POSIX ACL returned %d", rc);
2943 2948
2944setACLerrorExit: 2949setACLerrorExit:
2945 cifs_buf_release(pSMB); 2950 cifs_buf_release(pSMB);
@@ -2959,7 +2964,7 @@ CIFSGetExtAttr(const int xid, struct cifsTconInfo *tcon,
2959 int bytes_returned; 2964 int bytes_returned;
2960 __u16 params, byte_count; 2965 __u16 params, byte_count;
2961 2966
2962 cFYI(1, ("In GetExtAttr")); 2967 cFYI(1, "In GetExtAttr");
2963 if (tcon == NULL) 2968 if (tcon == NULL)
2964 return -ENODEV; 2969 return -ENODEV;
2965 2970
@@ -2998,7 +3003,7 @@ GetExtAttrRetry:
2998 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3003 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
2999 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3004 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3000 if (rc) { 3005 if (rc) {
3001 cFYI(1, ("error %d in GetExtAttr", rc)); 3006 cFYI(1, "error %d in GetExtAttr", rc);
3002 } else { 3007 } else {
3003 /* decode response */ 3008 /* decode response */
3004 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3009 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
@@ -3013,7 +3018,7 @@ GetExtAttrRetry:
3013 struct file_chattr_info *pfinfo; 3018 struct file_chattr_info *pfinfo;
3014 /* BB Do we need a cast or hash here ? */ 3019 /* BB Do we need a cast or hash here ? */
3015 if (count != 16) { 3020 if (count != 16) {
3016 cFYI(1, ("Illegal size ret in GetExtAttr")); 3021 cFYI(1, "Illegal size ret in GetExtAttr");
3017 rc = -EIO; 3022 rc = -EIO;
3018 goto GetExtAttrOut; 3023 goto GetExtAttrOut;
3019 } 3024 }
@@ -3043,7 +3048,7 @@ CIFSSMBGetCIFSACL(const int xid, struct cifsTconInfo *tcon, __u16 fid,
3043 QUERY_SEC_DESC_REQ *pSMB; 3048 QUERY_SEC_DESC_REQ *pSMB;
3044 struct kvec iov[1]; 3049 struct kvec iov[1];
3045 3050
3046 cFYI(1, ("GetCifsACL")); 3051 cFYI(1, "GetCifsACL");
3047 3052
3048 *pbuflen = 0; 3053 *pbuflen = 0;
3049 *acl_inf = NULL; 3054 *acl_inf = NULL;
@@ -3068,7 +3073,7 @@ CIFSSMBGetCIFSACL(const int xid, struct cifsTconInfo *tcon, __u16 fid,
3068 CIFS_STD_OP); 3073 CIFS_STD_OP);
3069 cifs_stats_inc(&tcon->num_acl_get); 3074 cifs_stats_inc(&tcon->num_acl_get);
3070 if (rc) { 3075 if (rc) {
3071 cFYI(1, ("Send error in QuerySecDesc = %d", rc)); 3076 cFYI(1, "Send error in QuerySecDesc = %d", rc);
3072 } else { /* decode response */ 3077 } else { /* decode response */
3073 __le32 *parm; 3078 __le32 *parm;
3074 __u32 parm_len; 3079 __u32 parm_len;
@@ -3083,7 +3088,7 @@ CIFSSMBGetCIFSACL(const int xid, struct cifsTconInfo *tcon, __u16 fid,
3083 goto qsec_out; 3088 goto qsec_out;
3084 pSMBr = (struct smb_com_ntransact_rsp *)iov[0].iov_base; 3089 pSMBr = (struct smb_com_ntransact_rsp *)iov[0].iov_base;
3085 3090
3086 cFYI(1, ("smb %p parm %p data %p", pSMBr, parm, *acl_inf)); 3091 cFYI(1, "smb %p parm %p data %p", pSMBr, parm, *acl_inf);
3087 3092
3088 if (le32_to_cpu(pSMBr->ParameterCount) != 4) { 3093 if (le32_to_cpu(pSMBr->ParameterCount) != 4) {
3089 rc = -EIO; /* bad smb */ 3094 rc = -EIO; /* bad smb */
@@ -3095,8 +3100,8 @@ CIFSSMBGetCIFSACL(const int xid, struct cifsTconInfo *tcon, __u16 fid,
3095 3100
3096 acl_len = le32_to_cpu(*parm); 3101 acl_len = le32_to_cpu(*parm);
3097 if (acl_len != *pbuflen) { 3102 if (acl_len != *pbuflen) {
3098 cERROR(1, ("acl length %d does not match %d", 3103 cERROR(1, "acl length %d does not match %d",
3099 acl_len, *pbuflen)); 3104 acl_len, *pbuflen);
3100 if (*pbuflen > acl_len) 3105 if (*pbuflen > acl_len)
3101 *pbuflen = acl_len; 3106 *pbuflen = acl_len;
3102 } 3107 }
@@ -3105,7 +3110,7 @@ CIFSSMBGetCIFSACL(const int xid, struct cifsTconInfo *tcon, __u16 fid,
3105 header followed by the smallest SID */ 3110 header followed by the smallest SID */
3106 if ((*pbuflen < sizeof(struct cifs_ntsd) + 8) || 3111 if ((*pbuflen < sizeof(struct cifs_ntsd) + 8) ||
3107 (*pbuflen >= 64 * 1024)) { 3112 (*pbuflen >= 64 * 1024)) {
3108 cERROR(1, ("bad acl length %d", *pbuflen)); 3113 cERROR(1, "bad acl length %d", *pbuflen);
3109 rc = -EINVAL; 3114 rc = -EINVAL;
3110 *pbuflen = 0; 3115 *pbuflen = 0;
3111 } else { 3116 } else {
@@ -3179,9 +3184,9 @@ setCifsAclRetry:
3179 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3184 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
3180 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3185 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3181 3186
3182 cFYI(1, ("SetCIFSACL bytes_returned: %d, rc: %d", bytes_returned, rc)); 3187 cFYI(1, "SetCIFSACL bytes_returned: %d, rc: %d", bytes_returned, rc);
3183 if (rc) 3188 if (rc)
3184 cFYI(1, ("Set CIFS ACL returned %d", rc)); 3189 cFYI(1, "Set CIFS ACL returned %d", rc);
3185 cifs_buf_release(pSMB); 3190 cifs_buf_release(pSMB);
3186 3191
3187 if (rc == -EAGAIN) 3192 if (rc == -EAGAIN)
@@ -3205,7 +3210,7 @@ int SMBQueryInformation(const int xid, struct cifsTconInfo *tcon,
3205 int bytes_returned; 3210 int bytes_returned;
3206 int name_len; 3211 int name_len;
3207 3212
3208 cFYI(1, ("In SMBQPath path %s", searchName)); 3213 cFYI(1, "In SMBQPath path %s", searchName);
3209QInfRetry: 3214QInfRetry:
3210 rc = smb_init(SMB_COM_QUERY_INFORMATION, 0, tcon, (void **) &pSMB, 3215 rc = smb_init(SMB_COM_QUERY_INFORMATION, 0, tcon, (void **) &pSMB,
3211 (void **) &pSMBr); 3216 (void **) &pSMBr);
@@ -3231,7 +3236,7 @@ QInfRetry:
3231 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3236 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
3232 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3237 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3233 if (rc) { 3238 if (rc) {
3234 cFYI(1, ("Send error in QueryInfo = %d", rc)); 3239 cFYI(1, "Send error in QueryInfo = %d", rc);
3235 } else if (pFinfo) { 3240 } else if (pFinfo) {
3236 struct timespec ts; 3241 struct timespec ts;
3237 __u32 time = le32_to_cpu(pSMBr->last_write_time); 3242 __u32 time = le32_to_cpu(pSMBr->last_write_time);
@@ -3305,7 +3310,7 @@ QFileInfoRetry:
3305 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3310 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
3306 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3311 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3307 if (rc) { 3312 if (rc) {
3308 cFYI(1, ("Send error in QPathInfo = %d", rc)); 3313 cFYI(1, "Send error in QPathInfo = %d", rc);
3309 } else { /* decode response */ 3314 } else { /* decode response */
3310 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3315 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
3311 3316
@@ -3343,7 +3348,7 @@ CIFSSMBQPathInfo(const int xid, struct cifsTconInfo *tcon,
3343 int name_len; 3348 int name_len;
3344 __u16 params, byte_count; 3349 __u16 params, byte_count;
3345 3350
3346/* cFYI(1, ("In QPathInfo path %s", searchName)); */ 3351/* cFYI(1, "In QPathInfo path %s", searchName); */
3347QPathInfoRetry: 3352QPathInfoRetry:
3348 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 3353 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
3349 (void **) &pSMBr); 3354 (void **) &pSMBr);
@@ -3393,7 +3398,7 @@ QPathInfoRetry:
3393 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3398 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
3394 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3399 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3395 if (rc) { 3400 if (rc) {
3396 cFYI(1, ("Send error in QPathInfo = %d", rc)); 3401 cFYI(1, "Send error in QPathInfo = %d", rc);
3397 } else { /* decode response */ 3402 } else { /* decode response */
3398 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3403 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
3399 3404
@@ -3473,14 +3478,14 @@ UnixQFileInfoRetry:
3473 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3478 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
3474 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3479 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3475 if (rc) { 3480 if (rc) {
3476 cFYI(1, ("Send error in QPathInfo = %d", rc)); 3481 cFYI(1, "Send error in QPathInfo = %d", rc);
3477 } else { /* decode response */ 3482 } else { /* decode response */
3478 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3483 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
3479 3484
3480 if (rc || (pSMBr->ByteCount < sizeof(FILE_UNIX_BASIC_INFO))) { 3485 if (rc || (pSMBr->ByteCount < sizeof(FILE_UNIX_BASIC_INFO))) {
3481 cERROR(1, ("Malformed FILE_UNIX_BASIC_INFO response.\n" 3486 cERROR(1, "Malformed FILE_UNIX_BASIC_INFO response.\n"
3482 "Unix Extensions can be disabled on mount " 3487 "Unix Extensions can be disabled on mount "
3483 "by specifying the nosfu mount option.")); 3488 "by specifying the nosfu mount option.");
3484 rc = -EIO; /* bad smb */ 3489 rc = -EIO; /* bad smb */
3485 } else { 3490 } else {
3486 __u16 data_offset = le16_to_cpu(pSMBr->t2.DataOffset); 3491 __u16 data_offset = le16_to_cpu(pSMBr->t2.DataOffset);
@@ -3512,7 +3517,7 @@ CIFSSMBUnixQPathInfo(const int xid, struct cifsTconInfo *tcon,
3512 int name_len; 3517 int name_len;
3513 __u16 params, byte_count; 3518 __u16 params, byte_count;
3514 3519
3515 cFYI(1, ("In QPathInfo (Unix) the path %s", searchName)); 3520 cFYI(1, "In QPathInfo (Unix) the path %s", searchName);
3516UnixQPathInfoRetry: 3521UnixQPathInfoRetry:
3517 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 3522 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
3518 (void **) &pSMBr); 3523 (void **) &pSMBr);
@@ -3559,14 +3564,14 @@ UnixQPathInfoRetry:
3559 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3564 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
3560 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3565 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3561 if (rc) { 3566 if (rc) {
3562 cFYI(1, ("Send error in QPathInfo = %d", rc)); 3567 cFYI(1, "Send error in QPathInfo = %d", rc);
3563 } else { /* decode response */ 3568 } else { /* decode response */
3564 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3569 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
3565 3570
3566 if (rc || (pSMBr->ByteCount < sizeof(FILE_UNIX_BASIC_INFO))) { 3571 if (rc || (pSMBr->ByteCount < sizeof(FILE_UNIX_BASIC_INFO))) {
3567 cERROR(1, ("Malformed FILE_UNIX_BASIC_INFO response.\n" 3572 cERROR(1, "Malformed FILE_UNIX_BASIC_INFO response.\n"
3568 "Unix Extensions can be disabled on mount " 3573 "Unix Extensions can be disabled on mount "
3569 "by specifying the nosfu mount option.")); 3574 "by specifying the nosfu mount option.");
3570 rc = -EIO; /* bad smb */ 3575 rc = -EIO; /* bad smb */
3571 } else { 3576 } else {
3572 __u16 data_offset = le16_to_cpu(pSMBr->t2.DataOffset); 3577 __u16 data_offset = le16_to_cpu(pSMBr->t2.DataOffset);
@@ -3600,7 +3605,7 @@ CIFSFindFirst(const int xid, struct cifsTconInfo *tcon,
3600 int name_len; 3605 int name_len;
3601 __u16 params, byte_count; 3606 __u16 params, byte_count;
3602 3607
3603 cFYI(1, ("In FindFirst for %s", searchName)); 3608 cFYI(1, "In FindFirst for %s", searchName);
3604 3609
3605findFirstRetry: 3610findFirstRetry:
3606 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 3611 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
@@ -3677,7 +3682,7 @@ findFirstRetry:
3677 if (rc) {/* BB add logic to retry regular search if Unix search 3682 if (rc) {/* BB add logic to retry regular search if Unix search
3678 rejected unexpectedly by server */ 3683 rejected unexpectedly by server */
3679 /* BB Add code to handle unsupported level rc */ 3684 /* BB Add code to handle unsupported level rc */
3680 cFYI(1, ("Error in FindFirst = %d", rc)); 3685 cFYI(1, "Error in FindFirst = %d", rc);
3681 3686
3682 cifs_buf_release(pSMB); 3687 cifs_buf_release(pSMB);
3683 3688
@@ -3716,7 +3721,7 @@ findFirstRetry:
3716 lnoff = le16_to_cpu(parms->LastNameOffset); 3721 lnoff = le16_to_cpu(parms->LastNameOffset);
3717 if (tcon->ses->server->maxBuf - MAX_CIFS_HDR_SIZE < 3722 if (tcon->ses->server->maxBuf - MAX_CIFS_HDR_SIZE <
3718 lnoff) { 3723 lnoff) {
3719 cERROR(1, ("ignoring corrupt resume name")); 3724 cERROR(1, "ignoring corrupt resume name");
3720 psrch_inf->last_entry = NULL; 3725 psrch_inf->last_entry = NULL;
3721 return rc; 3726 return rc;
3722 } 3727 }
@@ -3744,7 +3749,7 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3744 int bytes_returned, name_len; 3749 int bytes_returned, name_len;
3745 __u16 params, byte_count; 3750 __u16 params, byte_count;
3746 3751
3747 cFYI(1, ("In FindNext")); 3752 cFYI(1, "In FindNext");
3748 3753
3749 if (psrch_inf->endOfSearch) 3754 if (psrch_inf->endOfSearch)
3750 return -ENOENT; 3755 return -ENOENT;
@@ -3808,7 +3813,7 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3808 cifs_buf_release(pSMB); 3813 cifs_buf_release(pSMB);
3809 rc = 0; /* search probably was closed at end of search*/ 3814 rc = 0; /* search probably was closed at end of search*/
3810 } else 3815 } else
3811 cFYI(1, ("FindNext returned = %d", rc)); 3816 cFYI(1, "FindNext returned = %d", rc);
3812 } else { /* decode response */ 3817 } else { /* decode response */
3813 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3818 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
3814 3819
@@ -3844,15 +3849,15 @@ int CIFSFindNext(const int xid, struct cifsTconInfo *tcon,
3844 lnoff = le16_to_cpu(parms->LastNameOffset); 3849 lnoff = le16_to_cpu(parms->LastNameOffset);
3845 if (tcon->ses->server->maxBuf - MAX_CIFS_HDR_SIZE < 3850 if (tcon->ses->server->maxBuf - MAX_CIFS_HDR_SIZE <
3846 lnoff) { 3851 lnoff) {
3847 cERROR(1, ("ignoring corrupt resume name")); 3852 cERROR(1, "ignoring corrupt resume name");
3848 psrch_inf->last_entry = NULL; 3853 psrch_inf->last_entry = NULL;
3849 return rc; 3854 return rc;
3850 } else 3855 } else
3851 psrch_inf->last_entry = 3856 psrch_inf->last_entry =
3852 psrch_inf->srch_entries_start + lnoff; 3857 psrch_inf->srch_entries_start + lnoff;
3853 3858
3854/* cFYI(1,("fnxt2 entries in buf %d index_of_last %d", 3859/* cFYI(1, "fnxt2 entries in buf %d index_of_last %d",
3855 psrch_inf->entries_in_buffer, psrch_inf->index_of_last_entry)); */ 3860 psrch_inf->entries_in_buffer, psrch_inf->index_of_last_entry); */
3856 3861
3857 /* BB fixme add unlock here */ 3862 /* BB fixme add unlock here */
3858 } 3863 }
@@ -3877,7 +3882,7 @@ CIFSFindClose(const int xid, struct cifsTconInfo *tcon,
3877 int rc = 0; 3882 int rc = 0;
3878 FINDCLOSE_REQ *pSMB = NULL; 3883 FINDCLOSE_REQ *pSMB = NULL;
3879 3884
3880 cFYI(1, ("In CIFSSMBFindClose")); 3885 cFYI(1, "In CIFSSMBFindClose");
3881 rc = small_smb_init(SMB_COM_FIND_CLOSE2, 1, tcon, (void **)&pSMB); 3886 rc = small_smb_init(SMB_COM_FIND_CLOSE2, 1, tcon, (void **)&pSMB);
3882 3887
3883 /* no sense returning error if session restarted 3888 /* no sense returning error if session restarted
@@ -3891,7 +3896,7 @@ CIFSFindClose(const int xid, struct cifsTconInfo *tcon,
3891 pSMB->ByteCount = 0; 3896 pSMB->ByteCount = 0;
3892 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0); 3897 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0);
3893 if (rc) 3898 if (rc)
3894 cERROR(1, ("Send error in FindClose = %d", rc)); 3899 cERROR(1, "Send error in FindClose = %d", rc);
3895 3900
3896 cifs_stats_inc(&tcon->num_fclose); 3901 cifs_stats_inc(&tcon->num_fclose);
3897 3902
@@ -3914,7 +3919,7 @@ CIFSGetSrvInodeNumber(const int xid, struct cifsTconInfo *tcon,
3914 int name_len, bytes_returned; 3919 int name_len, bytes_returned;
3915 __u16 params, byte_count; 3920 __u16 params, byte_count;
3916 3921
3917 cFYI(1, ("In GetSrvInodeNum for %s", searchName)); 3922 cFYI(1, "In GetSrvInodeNum for %s", searchName);
3918 if (tcon == NULL) 3923 if (tcon == NULL)
3919 return -ENODEV; 3924 return -ENODEV;
3920 3925
@@ -3964,7 +3969,7 @@ GetInodeNumberRetry:
3964 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 3969 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
3965 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 3970 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
3966 if (rc) { 3971 if (rc) {
3967 cFYI(1, ("error %d in QueryInternalInfo", rc)); 3972 cFYI(1, "error %d in QueryInternalInfo", rc);
3968 } else { 3973 } else {
3969 /* decode response */ 3974 /* decode response */
3970 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 3975 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
@@ -3979,7 +3984,7 @@ GetInodeNumberRetry:
3979 struct file_internal_info *pfinfo; 3984 struct file_internal_info *pfinfo;
3980 /* BB Do we need a cast or hash here ? */ 3985 /* BB Do we need a cast or hash here ? */
3981 if (count < 8) { 3986 if (count < 8) {
3982 cFYI(1, ("Illegal size ret in QryIntrnlInf")); 3987 cFYI(1, "Illegal size ret in QryIntrnlInf");
3983 rc = -EIO; 3988 rc = -EIO;
3984 goto GetInodeNumOut; 3989 goto GetInodeNumOut;
3985 } 3990 }
@@ -4020,16 +4025,16 @@ parse_DFS_referrals(TRANSACTION2_GET_DFS_REFER_RSP *pSMBr,
4020 *num_of_nodes = le16_to_cpu(pSMBr->NumberOfReferrals); 4025 *num_of_nodes = le16_to_cpu(pSMBr->NumberOfReferrals);
4021 4026
4022 if (*num_of_nodes < 1) { 4027 if (*num_of_nodes < 1) {
4023 cERROR(1, ("num_referrals: must be at least > 0," 4028 cERROR(1, "num_referrals: must be at least > 0,"
4024 "but we get num_referrals = %d\n", *num_of_nodes)); 4029 "but we get num_referrals = %d\n", *num_of_nodes);
4025 rc = -EINVAL; 4030 rc = -EINVAL;
4026 goto parse_DFS_referrals_exit; 4031 goto parse_DFS_referrals_exit;
4027 } 4032 }
4028 4033
4029 ref = (struct dfs_referral_level_3 *) &(pSMBr->referrals); 4034 ref = (struct dfs_referral_level_3 *) &(pSMBr->referrals);
4030 if (ref->VersionNumber != cpu_to_le16(3)) { 4035 if (ref->VersionNumber != cpu_to_le16(3)) {
4031 cERROR(1, ("Referrals of V%d version are not supported," 4036 cERROR(1, "Referrals of V%d version are not supported,"
4032 "should be V3", le16_to_cpu(ref->VersionNumber))); 4037 "should be V3", le16_to_cpu(ref->VersionNumber));
4033 rc = -EINVAL; 4038 rc = -EINVAL;
4034 goto parse_DFS_referrals_exit; 4039 goto parse_DFS_referrals_exit;
4035 } 4040 }
@@ -4038,14 +4043,14 @@ parse_DFS_referrals(TRANSACTION2_GET_DFS_REFER_RSP *pSMBr,
4038 data_end = (char *)(&(pSMBr->PathConsumed)) + 4043 data_end = (char *)(&(pSMBr->PathConsumed)) +
4039 le16_to_cpu(pSMBr->t2.DataCount); 4044 le16_to_cpu(pSMBr->t2.DataCount);
4040 4045
4041 cFYI(1, ("num_referrals: %d dfs flags: 0x%x ... \n", 4046 cFYI(1, "num_referrals: %d dfs flags: 0x%x ...\n",
4042 *num_of_nodes, 4047 *num_of_nodes,
4043 le32_to_cpu(pSMBr->DFSFlags))); 4048 le32_to_cpu(pSMBr->DFSFlags));
4044 4049
4045 *target_nodes = kzalloc(sizeof(struct dfs_info3_param) * 4050 *target_nodes = kzalloc(sizeof(struct dfs_info3_param) *
4046 *num_of_nodes, GFP_KERNEL); 4051 *num_of_nodes, GFP_KERNEL);
4047 if (*target_nodes == NULL) { 4052 if (*target_nodes == NULL) {
4048 cERROR(1, ("Failed to allocate buffer for target_nodes\n")); 4053 cERROR(1, "Failed to allocate buffer for target_nodes\n");
4049 rc = -ENOMEM; 4054 rc = -ENOMEM;
4050 goto parse_DFS_referrals_exit; 4055 goto parse_DFS_referrals_exit;
4051 } 4056 }
@@ -4121,7 +4126,7 @@ CIFSGetDFSRefer(const int xid, struct cifsSesInfo *ses,
4121 *num_of_nodes = 0; 4126 *num_of_nodes = 0;
4122 *target_nodes = NULL; 4127 *target_nodes = NULL;
4123 4128
4124 cFYI(1, ("In GetDFSRefer the path %s", searchName)); 4129 cFYI(1, "In GetDFSRefer the path %s", searchName);
4125 if (ses == NULL) 4130 if (ses == NULL)
4126 return -ENODEV; 4131 return -ENODEV;
4127getDFSRetry: 4132getDFSRetry:
@@ -4188,7 +4193,7 @@ getDFSRetry:
4188 rc = SendReceive(xid, ses, (struct smb_hdr *) pSMB, 4193 rc = SendReceive(xid, ses, (struct smb_hdr *) pSMB,
4189 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4194 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4190 if (rc) { 4195 if (rc) {
4191 cFYI(1, ("Send error in GetDFSRefer = %d", rc)); 4196 cFYI(1, "Send error in GetDFSRefer = %d", rc);
4192 goto GetDFSRefExit; 4197 goto GetDFSRefExit;
4193 } 4198 }
4194 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4199 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
@@ -4199,9 +4204,9 @@ getDFSRetry:
4199 goto GetDFSRefExit; 4204 goto GetDFSRefExit;
4200 } 4205 }
4201 4206
4202 cFYI(1, ("Decoding GetDFSRefer response BCC: %d Offset %d", 4207 cFYI(1, "Decoding GetDFSRefer response BCC: %d Offset %d",
4203 pSMBr->ByteCount, 4208 pSMBr->ByteCount,
4204 le16_to_cpu(pSMBr->t2.DataOffset))); 4209 le16_to_cpu(pSMBr->t2.DataOffset));
4205 4210
4206 /* parse returned result into more usable form */ 4211 /* parse returned result into more usable form */
4207 rc = parse_DFS_referrals(pSMBr, num_of_nodes, 4212 rc = parse_DFS_referrals(pSMBr, num_of_nodes,
@@ -4229,7 +4234,7 @@ SMBOldQFSInfo(const int xid, struct cifsTconInfo *tcon, struct kstatfs *FSData)
4229 int bytes_returned = 0; 4234 int bytes_returned = 0;
4230 __u16 params, byte_count; 4235 __u16 params, byte_count;
4231 4236
4232 cFYI(1, ("OldQFSInfo")); 4237 cFYI(1, "OldQFSInfo");
4233oldQFSInfoRetry: 4238oldQFSInfoRetry:
4234 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4239 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
4235 (void **) &pSMBr); 4240 (void **) &pSMBr);
@@ -4262,7 +4267,7 @@ oldQFSInfoRetry:
4262 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4267 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4263 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4268 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4264 if (rc) { 4269 if (rc) {
4265 cFYI(1, ("Send error in QFSInfo = %d", rc)); 4270 cFYI(1, "Send error in QFSInfo = %d", rc);
4266 } else { /* decode response */ 4271 } else { /* decode response */
4267 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4272 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
4268 4273
@@ -4270,8 +4275,8 @@ oldQFSInfoRetry:
4270 rc = -EIO; /* bad smb */ 4275 rc = -EIO; /* bad smb */
4271 else { 4276 else {
4272 __u16 data_offset = le16_to_cpu(pSMBr->t2.DataOffset); 4277 __u16 data_offset = le16_to_cpu(pSMBr->t2.DataOffset);
4273 cFYI(1, ("qfsinf resp BCC: %d Offset %d", 4278 cFYI(1, "qfsinf resp BCC: %d Offset %d",
4274 pSMBr->ByteCount, data_offset)); 4279 pSMBr->ByteCount, data_offset);
4275 4280
4276 response_data = (FILE_SYSTEM_ALLOC_INFO *) 4281 response_data = (FILE_SYSTEM_ALLOC_INFO *)
4277 (((char *) &pSMBr->hdr.Protocol) + data_offset); 4282 (((char *) &pSMBr->hdr.Protocol) + data_offset);
@@ -4283,11 +4288,10 @@ oldQFSInfoRetry:
4283 le32_to_cpu(response_data->TotalAllocationUnits); 4288 le32_to_cpu(response_data->TotalAllocationUnits);
4284 FSData->f_bfree = FSData->f_bavail = 4289 FSData->f_bfree = FSData->f_bavail =
4285 le32_to_cpu(response_data->FreeAllocationUnits); 4290 le32_to_cpu(response_data->FreeAllocationUnits);
4286 cFYI(1, 4291 cFYI(1, "Blocks: %lld Free: %lld Block size %ld",
4287 ("Blocks: %lld Free: %lld Block size %ld", 4292 (unsigned long long)FSData->f_blocks,
4288 (unsigned long long)FSData->f_blocks, 4293 (unsigned long long)FSData->f_bfree,
4289 (unsigned long long)FSData->f_bfree, 4294 FSData->f_bsize);
4290 FSData->f_bsize));
4291 } 4295 }
4292 } 4296 }
4293 cifs_buf_release(pSMB); 4297 cifs_buf_release(pSMB);
@@ -4309,7 +4313,7 @@ CIFSSMBQFSInfo(const int xid, struct cifsTconInfo *tcon, struct kstatfs *FSData)
4309 int bytes_returned = 0; 4313 int bytes_returned = 0;
4310 __u16 params, byte_count; 4314 __u16 params, byte_count;
4311 4315
4312 cFYI(1, ("In QFSInfo")); 4316 cFYI(1, "In QFSInfo");
4313QFSInfoRetry: 4317QFSInfoRetry:
4314 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4318 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
4315 (void **) &pSMBr); 4319 (void **) &pSMBr);
@@ -4342,7 +4346,7 @@ QFSInfoRetry:
4342 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4346 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4343 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4347 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4344 if (rc) { 4348 if (rc) {
4345 cFYI(1, ("Send error in QFSInfo = %d", rc)); 4349 cFYI(1, "Send error in QFSInfo = %d", rc);
4346 } else { /* decode response */ 4350 } else { /* decode response */
4347 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4351 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
4348 4352
@@ -4363,11 +4367,10 @@ QFSInfoRetry:
4363 le64_to_cpu(response_data->TotalAllocationUnits); 4367 le64_to_cpu(response_data->TotalAllocationUnits);
4364 FSData->f_bfree = FSData->f_bavail = 4368 FSData->f_bfree = FSData->f_bavail =
4365 le64_to_cpu(response_data->FreeAllocationUnits); 4369 le64_to_cpu(response_data->FreeAllocationUnits);
4366 cFYI(1, 4370 cFYI(1, "Blocks: %lld Free: %lld Block size %ld",
4367 ("Blocks: %lld Free: %lld Block size %ld", 4371 (unsigned long long)FSData->f_blocks,
4368 (unsigned long long)FSData->f_blocks, 4372 (unsigned long long)FSData->f_bfree,
4369 (unsigned long long)FSData->f_bfree, 4373 FSData->f_bsize);
4370 FSData->f_bsize));
4371 } 4374 }
4372 } 4375 }
4373 cifs_buf_release(pSMB); 4376 cifs_buf_release(pSMB);
@@ -4389,7 +4392,7 @@ CIFSSMBQFSAttributeInfo(const int xid, struct cifsTconInfo *tcon)
4389 int bytes_returned = 0; 4392 int bytes_returned = 0;
4390 __u16 params, byte_count; 4393 __u16 params, byte_count;
4391 4394
4392 cFYI(1, ("In QFSAttributeInfo")); 4395 cFYI(1, "In QFSAttributeInfo");
4393QFSAttributeRetry: 4396QFSAttributeRetry:
4394 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4397 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
4395 (void **) &pSMBr); 4398 (void **) &pSMBr);
@@ -4423,7 +4426,7 @@ QFSAttributeRetry:
4423 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4426 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4424 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4427 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4425 if (rc) { 4428 if (rc) {
4426 cERROR(1, ("Send error in QFSAttributeInfo = %d", rc)); 4429 cERROR(1, "Send error in QFSAttributeInfo = %d", rc);
4427 } else { /* decode response */ 4430 } else { /* decode response */
4428 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4431 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
4429 4432
@@ -4459,7 +4462,7 @@ CIFSSMBQFSDeviceInfo(const int xid, struct cifsTconInfo *tcon)
4459 int bytes_returned = 0; 4462 int bytes_returned = 0;
4460 __u16 params, byte_count; 4463 __u16 params, byte_count;
4461 4464
4462 cFYI(1, ("In QFSDeviceInfo")); 4465 cFYI(1, "In QFSDeviceInfo");
4463QFSDeviceRetry: 4466QFSDeviceRetry:
4464 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4467 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
4465 (void **) &pSMBr); 4468 (void **) &pSMBr);
@@ -4494,7 +4497,7 @@ QFSDeviceRetry:
4494 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4497 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4495 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4498 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4496 if (rc) { 4499 if (rc) {
4497 cFYI(1, ("Send error in QFSDeviceInfo = %d", rc)); 4500 cFYI(1, "Send error in QFSDeviceInfo = %d", rc);
4498 } else { /* decode response */ 4501 } else { /* decode response */
4499 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4502 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
4500 4503
@@ -4529,7 +4532,7 @@ CIFSSMBQFSUnixInfo(const int xid, struct cifsTconInfo *tcon)
4529 int bytes_returned = 0; 4532 int bytes_returned = 0;
4530 __u16 params, byte_count; 4533 __u16 params, byte_count;
4531 4534
4532 cFYI(1, ("In QFSUnixInfo")); 4535 cFYI(1, "In QFSUnixInfo");
4533QFSUnixRetry: 4536QFSUnixRetry:
4534 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4537 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
4535 (void **) &pSMBr); 4538 (void **) &pSMBr);
@@ -4563,7 +4566,7 @@ QFSUnixRetry:
4563 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4566 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4564 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4567 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4565 if (rc) { 4568 if (rc) {
4566 cERROR(1, ("Send error in QFSUnixInfo = %d", rc)); 4569 cERROR(1, "Send error in QFSUnixInfo = %d", rc);
4567 } else { /* decode response */ 4570 } else { /* decode response */
4568 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4571 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
4569 4572
@@ -4598,7 +4601,7 @@ CIFSSMBSetFSUnixInfo(const int xid, struct cifsTconInfo *tcon, __u64 cap)
4598 int bytes_returned = 0; 4601 int bytes_returned = 0;
4599 __u16 params, param_offset, offset, byte_count; 4602 __u16 params, param_offset, offset, byte_count;
4600 4603
4601 cFYI(1, ("In SETFSUnixInfo")); 4604 cFYI(1, "In SETFSUnixInfo");
4602SETFSUnixRetry: 4605SETFSUnixRetry:
4603 /* BB switch to small buf init to save memory */ 4606 /* BB switch to small buf init to save memory */
4604 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4607 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
@@ -4646,7 +4649,7 @@ SETFSUnixRetry:
4646 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4649 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4647 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4650 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4648 if (rc) { 4651 if (rc) {
4649 cERROR(1, ("Send error in SETFSUnixInfo = %d", rc)); 4652 cERROR(1, "Send error in SETFSUnixInfo = %d", rc);
4650 } else { /* decode response */ 4653 } else { /* decode response */
4651 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4654 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
4652 if (rc) 4655 if (rc)
@@ -4674,7 +4677,7 @@ CIFSSMBQFSPosixInfo(const int xid, struct cifsTconInfo *tcon,
4674 int bytes_returned = 0; 4677 int bytes_returned = 0;
4675 __u16 params, byte_count; 4678 __u16 params, byte_count;
4676 4679
4677 cFYI(1, ("In QFSPosixInfo")); 4680 cFYI(1, "In QFSPosixInfo");
4678QFSPosixRetry: 4681QFSPosixRetry:
4679 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4682 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
4680 (void **) &pSMBr); 4683 (void **) &pSMBr);
@@ -4708,7 +4711,7 @@ QFSPosixRetry:
4708 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4711 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4709 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4712 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4710 if (rc) { 4713 if (rc) {
4711 cFYI(1, ("Send error in QFSUnixInfo = %d", rc)); 4714 cFYI(1, "Send error in QFSUnixInfo = %d", rc);
4712 } else { /* decode response */ 4715 } else { /* decode response */
4713 rc = validate_t2((struct smb_t2_rsp *)pSMBr); 4716 rc = validate_t2((struct smb_t2_rsp *)pSMBr);
4714 4717
@@ -4768,7 +4771,7 @@ CIFSSMBSetEOF(const int xid, struct cifsTconInfo *tcon, const char *fileName,
4768 int bytes_returned = 0; 4771 int bytes_returned = 0;
4769 __u16 params, byte_count, data_count, param_offset, offset; 4772 __u16 params, byte_count, data_count, param_offset, offset;
4770 4773
4771 cFYI(1, ("In SetEOF")); 4774 cFYI(1, "In SetEOF");
4772SetEOFRetry: 4775SetEOFRetry:
4773 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 4776 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
4774 (void **) &pSMBr); 4777 (void **) &pSMBr);
@@ -4834,7 +4837,7 @@ SetEOFRetry:
4834 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 4837 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
4835 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 4838 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
4836 if (rc) 4839 if (rc)
4837 cFYI(1, ("SetPathInfo (file size) returned %d", rc)); 4840 cFYI(1, "SetPathInfo (file size) returned %d", rc);
4838 4841
4839 cifs_buf_release(pSMB); 4842 cifs_buf_release(pSMB);
4840 4843
@@ -4854,8 +4857,8 @@ CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon, __u64 size,
4854 int rc = 0; 4857 int rc = 0;
4855 __u16 params, param_offset, offset, byte_count, count; 4858 __u16 params, param_offset, offset, byte_count, count;
4856 4859
4857 cFYI(1, ("SetFileSize (via SetFileInfo) %lld", 4860 cFYI(1, "SetFileSize (via SetFileInfo) %lld",
4858 (long long)size)); 4861 (long long)size);
4859 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB); 4862 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB);
4860 4863
4861 if (rc) 4864 if (rc)
@@ -4914,9 +4917,7 @@ CIFSSMBSetFileSize(const int xid, struct cifsTconInfo *tcon, __u64 size,
4914 pSMB->ByteCount = cpu_to_le16(byte_count); 4917 pSMB->ByteCount = cpu_to_le16(byte_count);
4915 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0); 4918 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0);
4916 if (rc) { 4919 if (rc) {
4917 cFYI(1, 4920 cFYI(1, "Send error in SetFileInfo (SetFileSize) = %d", rc);
4918 ("Send error in SetFileInfo (SetFileSize) = %d",
4919 rc));
4920 } 4921 }
4921 4922
4922 /* Note: On -EAGAIN error only caller can retry on handle based calls 4923 /* Note: On -EAGAIN error only caller can retry on handle based calls
@@ -4940,7 +4941,7 @@ CIFSSMBSetFileInfo(const int xid, struct cifsTconInfo *tcon,
4940 int rc = 0; 4941 int rc = 0;
4941 __u16 params, param_offset, offset, byte_count, count; 4942 __u16 params, param_offset, offset, byte_count, count;
4942 4943
4943 cFYI(1, ("Set Times (via SetFileInfo)")); 4944 cFYI(1, "Set Times (via SetFileInfo)");
4944 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB); 4945 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB);
4945 4946
4946 if (rc) 4947 if (rc)
@@ -4985,7 +4986,7 @@ CIFSSMBSetFileInfo(const int xid, struct cifsTconInfo *tcon,
4985 memcpy(data_offset, data, sizeof(FILE_BASIC_INFO)); 4986 memcpy(data_offset, data, sizeof(FILE_BASIC_INFO));
4986 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0); 4987 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0);
4987 if (rc) 4988 if (rc)
4988 cFYI(1, ("Send error in Set Time (SetFileInfo) = %d", rc)); 4989 cFYI(1, "Send error in Set Time (SetFileInfo) = %d", rc);
4989 4990
4990 /* Note: On -EAGAIN error only caller can retry on handle based calls 4991 /* Note: On -EAGAIN error only caller can retry on handle based calls
4991 since file handle passed in no longer valid */ 4992 since file handle passed in no longer valid */
@@ -5002,7 +5003,7 @@ CIFSSMBSetFileDisposition(const int xid, struct cifsTconInfo *tcon,
5002 int rc = 0; 5003 int rc = 0;
5003 __u16 params, param_offset, offset, byte_count, count; 5004 __u16 params, param_offset, offset, byte_count, count;
5004 5005
5005 cFYI(1, ("Set File Disposition (via SetFileInfo)")); 5006 cFYI(1, "Set File Disposition (via SetFileInfo)");
5006 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB); 5007 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB);
5007 5008
5008 if (rc) 5009 if (rc)
@@ -5044,7 +5045,7 @@ CIFSSMBSetFileDisposition(const int xid, struct cifsTconInfo *tcon,
5044 *data_offset = delete_file ? 1 : 0; 5045 *data_offset = delete_file ? 1 : 0;
5045 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0); 5046 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0);
5046 if (rc) 5047 if (rc)
5047 cFYI(1, ("Send error in SetFileDisposition = %d", rc)); 5048 cFYI(1, "Send error in SetFileDisposition = %d", rc);
5048 5049
5049 return rc; 5050 return rc;
5050} 5051}
@@ -5062,7 +5063,7 @@ CIFSSMBSetPathInfo(const int xid, struct cifsTconInfo *tcon,
5062 char *data_offset; 5063 char *data_offset;
5063 __u16 params, param_offset, offset, byte_count, count; 5064 __u16 params, param_offset, offset, byte_count, count;
5064 5065
5065 cFYI(1, ("In SetTimes")); 5066 cFYI(1, "In SetTimes");
5066 5067
5067SetTimesRetry: 5068SetTimesRetry:
5068 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 5069 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
@@ -5118,7 +5119,7 @@ SetTimesRetry:
5118 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 5119 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
5119 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 5120 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
5120 if (rc) 5121 if (rc)
5121 cFYI(1, ("SetPathInfo (times) returned %d", rc)); 5122 cFYI(1, "SetPathInfo (times) returned %d", rc);
5122 5123
5123 cifs_buf_release(pSMB); 5124 cifs_buf_release(pSMB);
5124 5125
@@ -5143,7 +5144,7 @@ CIFSSMBSetAttrLegacy(int xid, struct cifsTconInfo *tcon, char *fileName,
5143 int bytes_returned; 5144 int bytes_returned;
5144 int name_len; 5145 int name_len;
5145 5146
5146 cFYI(1, ("In SetAttrLegacy")); 5147 cFYI(1, "In SetAttrLegacy");
5147 5148
5148SetAttrLgcyRetry: 5149SetAttrLgcyRetry:
5149 rc = smb_init(SMB_COM_SETATTR, 8, tcon, (void **) &pSMB, 5150 rc = smb_init(SMB_COM_SETATTR, 8, tcon, (void **) &pSMB,
@@ -5169,7 +5170,7 @@ SetAttrLgcyRetry:
5169 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 5170 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
5170 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 5171 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
5171 if (rc) 5172 if (rc)
5172 cFYI(1, ("Error in LegacySetAttr = %d", rc)); 5173 cFYI(1, "Error in LegacySetAttr = %d", rc);
5173 5174
5174 cifs_buf_release(pSMB); 5175 cifs_buf_release(pSMB);
5175 5176
@@ -5231,7 +5232,7 @@ CIFSSMBUnixSetFileInfo(const int xid, struct cifsTconInfo *tcon,
5231 int rc = 0; 5232 int rc = 0;
5232 u16 params, param_offset, offset, byte_count, count; 5233 u16 params, param_offset, offset, byte_count, count;
5233 5234
5234 cFYI(1, ("Set Unix Info (via SetFileInfo)")); 5235 cFYI(1, "Set Unix Info (via SetFileInfo)");
5235 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB); 5236 rc = small_smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB);
5236 5237
5237 if (rc) 5238 if (rc)
@@ -5276,7 +5277,7 @@ CIFSSMBUnixSetFileInfo(const int xid, struct cifsTconInfo *tcon,
5276 5277
5277 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0); 5278 rc = SendReceiveNoRsp(xid, tcon->ses, (struct smb_hdr *) pSMB, 0);
5278 if (rc) 5279 if (rc)
5279 cFYI(1, ("Send error in Set Time (SetFileInfo) = %d", rc)); 5280 cFYI(1, "Send error in Set Time (SetFileInfo) = %d", rc);
5280 5281
5281 /* Note: On -EAGAIN error only caller can retry on handle based calls 5282 /* Note: On -EAGAIN error only caller can retry on handle based calls
5282 since file handle passed in no longer valid */ 5283 since file handle passed in no longer valid */
@@ -5297,7 +5298,7 @@ CIFSSMBUnixSetPathInfo(const int xid, struct cifsTconInfo *tcon, char *fileName,
5297 FILE_UNIX_BASIC_INFO *data_offset; 5298 FILE_UNIX_BASIC_INFO *data_offset;
5298 __u16 params, param_offset, offset, count, byte_count; 5299 __u16 params, param_offset, offset, count, byte_count;
5299 5300
5300 cFYI(1, ("In SetUID/GID/Mode")); 5301 cFYI(1, "In SetUID/GID/Mode");
5301setPermsRetry: 5302setPermsRetry:
5302 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 5303 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
5303 (void **) &pSMBr); 5304 (void **) &pSMBr);
@@ -5353,7 +5354,7 @@ setPermsRetry:
5353 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 5354 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
5354 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 5355 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
5355 if (rc) 5356 if (rc)
5356 cFYI(1, ("SetPathInfo (perms) returned %d", rc)); 5357 cFYI(1, "SetPathInfo (perms) returned %d", rc);
5357 5358
5358 cifs_buf_release(pSMB); 5359 cifs_buf_release(pSMB);
5359 if (rc == -EAGAIN) 5360 if (rc == -EAGAIN)
@@ -5372,7 +5373,7 @@ int CIFSSMBNotify(const int xid, struct cifsTconInfo *tcon,
5372 struct dir_notify_req *dnotify_req; 5373 struct dir_notify_req *dnotify_req;
5373 int bytes_returned; 5374 int bytes_returned;
5374 5375
5375 cFYI(1, ("In CIFSSMBNotify for file handle %d", (int)netfid)); 5376 cFYI(1, "In CIFSSMBNotify for file handle %d", (int)netfid);
5376 rc = smb_init(SMB_COM_NT_TRANSACT, 23, tcon, (void **) &pSMB, 5377 rc = smb_init(SMB_COM_NT_TRANSACT, 23, tcon, (void **) &pSMB,
5377 (void **) &pSMBr); 5378 (void **) &pSMBr);
5378 if (rc) 5379 if (rc)
@@ -5406,7 +5407,7 @@ int CIFSSMBNotify(const int xid, struct cifsTconInfo *tcon,
5406 (struct smb_hdr *)pSMBr, &bytes_returned, 5407 (struct smb_hdr *)pSMBr, &bytes_returned,
5407 CIFS_ASYNC_OP); 5408 CIFS_ASYNC_OP);
5408 if (rc) { 5409 if (rc) {
5409 cFYI(1, ("Error in Notify = %d", rc)); 5410 cFYI(1, "Error in Notify = %d", rc);
5410 } else { 5411 } else {
5411 /* Add file to outstanding requests */ 5412 /* Add file to outstanding requests */
5412 /* BB change to kmem cache alloc */ 5413 /* BB change to kmem cache alloc */
@@ -5462,7 +5463,7 @@ CIFSSMBQAllEAs(const int xid, struct cifsTconInfo *tcon,
5462 char *end_of_smb; 5463 char *end_of_smb;
5463 __u16 params, byte_count, data_offset; 5464 __u16 params, byte_count, data_offset;
5464 5465
5465 cFYI(1, ("In Query All EAs path %s", searchName)); 5466 cFYI(1, "In Query All EAs path %s", searchName);
5466QAllEAsRetry: 5467QAllEAsRetry:
5467 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 5468 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
5468 (void **) &pSMBr); 5469 (void **) &pSMBr);
@@ -5509,7 +5510,7 @@ QAllEAsRetry:
5509 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 5510 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
5510 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 5511 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
5511 if (rc) { 5512 if (rc) {
5512 cFYI(1, ("Send error in QueryAllEAs = %d", rc)); 5513 cFYI(1, "Send error in QueryAllEAs = %d", rc);
5513 goto QAllEAsOut; 5514 goto QAllEAsOut;
5514 } 5515 }
5515 5516
@@ -5537,16 +5538,16 @@ QAllEAsRetry:
5537 (((char *) &pSMBr->hdr.Protocol) + data_offset); 5538 (((char *) &pSMBr->hdr.Protocol) + data_offset);
5538 5539
5539 list_len = le32_to_cpu(ea_response_data->list_len); 5540 list_len = le32_to_cpu(ea_response_data->list_len);
5540 cFYI(1, ("ea length %d", list_len)); 5541 cFYI(1, "ea length %d", list_len);
5541 if (list_len <= 8) { 5542 if (list_len <= 8) {
5542 cFYI(1, ("empty EA list returned from server")); 5543 cFYI(1, "empty EA list returned from server");
5543 goto QAllEAsOut; 5544 goto QAllEAsOut;
5544 } 5545 }
5545 5546
5546 /* make sure list_len doesn't go past end of SMB */ 5547 /* make sure list_len doesn't go past end of SMB */
5547 end_of_smb = (char *)pByteArea(&pSMBr->hdr) + BCC(&pSMBr->hdr); 5548 end_of_smb = (char *)pByteArea(&pSMBr->hdr) + BCC(&pSMBr->hdr);
5548 if ((char *)ea_response_data + list_len > end_of_smb) { 5549 if ((char *)ea_response_data + list_len > end_of_smb) {
5549 cFYI(1, ("EA list appears to go beyond SMB")); 5550 cFYI(1, "EA list appears to go beyond SMB");
5550 rc = -EIO; 5551 rc = -EIO;
5551 goto QAllEAsOut; 5552 goto QAllEAsOut;
5552 } 5553 }
@@ -5563,7 +5564,7 @@ QAllEAsRetry:
5563 temp_ptr += 4; 5564 temp_ptr += 4;
5564 /* make sure we can read name_len and value_len */ 5565 /* make sure we can read name_len and value_len */
5565 if (list_len < 0) { 5566 if (list_len < 0) {
5566 cFYI(1, ("EA entry goes beyond length of list")); 5567 cFYI(1, "EA entry goes beyond length of list");
5567 rc = -EIO; 5568 rc = -EIO;
5568 goto QAllEAsOut; 5569 goto QAllEAsOut;
5569 } 5570 }
@@ -5572,7 +5573,7 @@ QAllEAsRetry:
5572 value_len = le16_to_cpu(temp_fea->value_len); 5573 value_len = le16_to_cpu(temp_fea->value_len);
5573 list_len -= name_len + 1 + value_len; 5574 list_len -= name_len + 1 + value_len;
5574 if (list_len < 0) { 5575 if (list_len < 0) {
5575 cFYI(1, ("EA entry goes beyond length of list")); 5576 cFYI(1, "EA entry goes beyond length of list");
5576 rc = -EIO; 5577 rc = -EIO;
5577 goto QAllEAsOut; 5578 goto QAllEAsOut;
5578 } 5579 }
@@ -5639,7 +5640,7 @@ CIFSSMBSetEA(const int xid, struct cifsTconInfo *tcon, const char *fileName,
5639 int bytes_returned = 0; 5640 int bytes_returned = 0;
5640 __u16 params, param_offset, byte_count, offset, count; 5641 __u16 params, param_offset, byte_count, offset, count;
5641 5642
5642 cFYI(1, ("In SetEA")); 5643 cFYI(1, "In SetEA");
5643SetEARetry: 5644SetEARetry:
5644 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB, 5645 rc = smb_init(SMB_COM_TRANSACTION2, 15, tcon, (void **) &pSMB,
5645 (void **) &pSMBr); 5646 (void **) &pSMBr);
@@ -5721,7 +5722,7 @@ SetEARetry:
5721 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB, 5722 rc = SendReceive(xid, tcon->ses, (struct smb_hdr *) pSMB,
5722 (struct smb_hdr *) pSMBr, &bytes_returned, 0); 5723 (struct smb_hdr *) pSMBr, &bytes_returned, 0);
5723 if (rc) 5724 if (rc)
5724 cFYI(1, ("SetPathInfo (EA) returned %d", rc)); 5725 cFYI(1, "SetPathInfo (EA) returned %d", rc);
5725 5726
5726 cifs_buf_release(pSMB); 5727 cifs_buf_release(pSMB);
5727 5728
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index d9566bf8f917..2208f06e4c45 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -102,6 +102,7 @@ struct smb_vol {
102 bool sockopt_tcp_nodelay:1; 102 bool sockopt_tcp_nodelay:1;
103 unsigned short int port; 103 unsigned short int port;
104 char *prepath; 104 char *prepath;
105 struct nls_table *local_nls;
105}; 106};
106 107
107static int ipv4_connect(struct TCP_Server_Info *server); 108static int ipv4_connect(struct TCP_Server_Info *server);
@@ -135,7 +136,7 @@ cifs_reconnect(struct TCP_Server_Info *server)
135 spin_unlock(&GlobalMid_Lock); 136 spin_unlock(&GlobalMid_Lock);
136 server->maxBuf = 0; 137 server->maxBuf = 0;
137 138
138 cFYI(1, ("Reconnecting tcp session")); 139 cFYI(1, "Reconnecting tcp session");
139 140
140 /* before reconnecting the tcp session, mark the smb session (uid) 141 /* before reconnecting the tcp session, mark the smb session (uid)
141 and the tid bad so they are not used until reconnected */ 142 and the tid bad so they are not used until reconnected */
@@ -153,12 +154,12 @@ cifs_reconnect(struct TCP_Server_Info *server)
153 /* do not want to be sending data on a socket we are freeing */ 154 /* do not want to be sending data on a socket we are freeing */
154 mutex_lock(&server->srv_mutex); 155 mutex_lock(&server->srv_mutex);
155 if (server->ssocket) { 156 if (server->ssocket) {
156 cFYI(1, ("State: 0x%x Flags: 0x%lx", server->ssocket->state, 157 cFYI(1, "State: 0x%x Flags: 0x%lx", server->ssocket->state,
157 server->ssocket->flags)); 158 server->ssocket->flags);
158 kernel_sock_shutdown(server->ssocket, SHUT_WR); 159 kernel_sock_shutdown(server->ssocket, SHUT_WR);
159 cFYI(1, ("Post shutdown state: 0x%x Flags: 0x%lx", 160 cFYI(1, "Post shutdown state: 0x%x Flags: 0x%lx",
160 server->ssocket->state, 161 server->ssocket->state,
161 server->ssocket->flags)); 162 server->ssocket->flags);
162 sock_release(server->ssocket); 163 sock_release(server->ssocket);
163 server->ssocket = NULL; 164 server->ssocket = NULL;
164 } 165 }
@@ -187,7 +188,7 @@ cifs_reconnect(struct TCP_Server_Info *server)
187 else 188 else
188 rc = ipv4_connect(server); 189 rc = ipv4_connect(server);
189 if (rc) { 190 if (rc) {
190 cFYI(1, ("reconnect error %d", rc)); 191 cFYI(1, "reconnect error %d", rc);
191 msleep(3000); 192 msleep(3000);
192 } else { 193 } else {
193 atomic_inc(&tcpSesReconnectCount); 194 atomic_inc(&tcpSesReconnectCount);
@@ -223,7 +224,7 @@ static int check2ndT2(struct smb_hdr *pSMB, unsigned int maxBufSize)
223 /* check for plausible wct, bcc and t2 data and parm sizes */ 224 /* check for plausible wct, bcc and t2 data and parm sizes */
224 /* check for parm and data offset going beyond end of smb */ 225 /* check for parm and data offset going beyond end of smb */
225 if (pSMB->WordCount != 10) { /* coalesce_t2 depends on this */ 226 if (pSMB->WordCount != 10) { /* coalesce_t2 depends on this */
226 cFYI(1, ("invalid transact2 word count")); 227 cFYI(1, "invalid transact2 word count");
227 return -EINVAL; 228 return -EINVAL;
228 } 229 }
229 230
@@ -237,15 +238,15 @@ static int check2ndT2(struct smb_hdr *pSMB, unsigned int maxBufSize)
237 if (remaining == 0) 238 if (remaining == 0)
238 return 0; 239 return 0;
239 else if (remaining < 0) { 240 else if (remaining < 0) {
240 cFYI(1, ("total data %d smaller than data in frame %d", 241 cFYI(1, "total data %d smaller than data in frame %d",
241 total_data_size, data_in_this_rsp)); 242 total_data_size, data_in_this_rsp);
242 return -EINVAL; 243 return -EINVAL;
243 } else { 244 } else {
244 cFYI(1, ("missing %d bytes from transact2, check next response", 245 cFYI(1, "missing %d bytes from transact2, check next response",
245 remaining)); 246 remaining);
246 if (total_data_size > maxBufSize) { 247 if (total_data_size > maxBufSize) {
247 cERROR(1, ("TotalDataSize %d is over maximum buffer %d", 248 cERROR(1, "TotalDataSize %d is over maximum buffer %d",
248 total_data_size, maxBufSize)); 249 total_data_size, maxBufSize);
249 return -EINVAL; 250 return -EINVAL;
250 } 251 }
251 return remaining; 252 return remaining;
@@ -267,7 +268,7 @@ static int coalesce_t2(struct smb_hdr *psecond, struct smb_hdr *pTargetSMB)
267 total_data_size = le16_to_cpu(pSMBt->t2_rsp.TotalDataCount); 268 total_data_size = le16_to_cpu(pSMBt->t2_rsp.TotalDataCount);
268 269
269 if (total_data_size != le16_to_cpu(pSMB2->t2_rsp.TotalDataCount)) { 270 if (total_data_size != le16_to_cpu(pSMB2->t2_rsp.TotalDataCount)) {
270 cFYI(1, ("total data size of primary and secondary t2 differ")); 271 cFYI(1, "total data size of primary and secondary t2 differ");
271 } 272 }
272 273
273 total_in_buf = le16_to_cpu(pSMBt->t2_rsp.DataCount); 274 total_in_buf = le16_to_cpu(pSMBt->t2_rsp.DataCount);
@@ -282,7 +283,7 @@ static int coalesce_t2(struct smb_hdr *psecond, struct smb_hdr *pTargetSMB)
282 283
283 total_in_buf2 = le16_to_cpu(pSMB2->t2_rsp.DataCount); 284 total_in_buf2 = le16_to_cpu(pSMB2->t2_rsp.DataCount);
284 if (remaining < total_in_buf2) { 285 if (remaining < total_in_buf2) {
285 cFYI(1, ("transact2 2nd response contains too much data")); 286 cFYI(1, "transact2 2nd response contains too much data");
286 } 287 }
287 288
288 /* find end of first SMB data area */ 289 /* find end of first SMB data area */
@@ -311,7 +312,7 @@ static int coalesce_t2(struct smb_hdr *psecond, struct smb_hdr *pTargetSMB)
311 pTargetSMB->smb_buf_length = byte_count; 312 pTargetSMB->smb_buf_length = byte_count;
312 313
313 if (remaining == total_in_buf2) { 314 if (remaining == total_in_buf2) {
314 cFYI(1, ("found the last secondary response")); 315 cFYI(1, "found the last secondary response");
315 return 0; /* we are done */ 316 return 0; /* we are done */
316 } else /* more responses to go */ 317 } else /* more responses to go */
317 return 1; 318 return 1;
@@ -339,7 +340,7 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server)
339 int reconnect; 340 int reconnect;
340 341
341 current->flags |= PF_MEMALLOC; 342 current->flags |= PF_MEMALLOC;
342 cFYI(1, ("Demultiplex PID: %d", task_pid_nr(current))); 343 cFYI(1, "Demultiplex PID: %d", task_pid_nr(current));
343 344
344 length = atomic_inc_return(&tcpSesAllocCount); 345 length = atomic_inc_return(&tcpSesAllocCount);
345 if (length > 1) 346 if (length > 1)
@@ -353,7 +354,7 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server)
353 if (bigbuf == NULL) { 354 if (bigbuf == NULL) {
354 bigbuf = cifs_buf_get(); 355 bigbuf = cifs_buf_get();
355 if (!bigbuf) { 356 if (!bigbuf) {
356 cERROR(1, ("No memory for large SMB response")); 357 cERROR(1, "No memory for large SMB response");
357 msleep(3000); 358 msleep(3000);
358 /* retry will check if exiting */ 359 /* retry will check if exiting */
359 continue; 360 continue;
@@ -366,7 +367,7 @@ cifs_demultiplex_thread(struct TCP_Server_Info *server)
366 if (smallbuf == NULL) { 367 if (smallbuf == NULL) {
367 smallbuf = cifs_small_buf_get(); 368 smallbuf = cifs_small_buf_get();
368 if (!smallbuf) { 369 if (!smallbuf) {
369 cERROR(1, ("No memory for SMB response")); 370 cERROR(1, "No memory for SMB response");
370 msleep(1000); 371 msleep(1000);
371 /* retry will check if exiting */ 372 /* retry will check if exiting */
372 continue; 373 continue;
@@ -391,9 +392,9 @@ incomplete_rcv:
391 if (server->tcpStatus == CifsExiting) { 392 if (server->tcpStatus == CifsExiting) {
392 break; 393 break;
393 } else if (server->tcpStatus == CifsNeedReconnect) { 394 } else if (server->tcpStatus == CifsNeedReconnect) {
394 cFYI(1, ("Reconnect after server stopped responding")); 395 cFYI(1, "Reconnect after server stopped responding");
395 cifs_reconnect(server); 396 cifs_reconnect(server);
396 cFYI(1, ("call to reconnect done")); 397 cFYI(1, "call to reconnect done");
397 csocket = server->ssocket; 398 csocket = server->ssocket;
398 continue; 399 continue;
399 } else if ((length == -ERESTARTSYS) || (length == -EAGAIN)) { 400 } else if ((length == -ERESTARTSYS) || (length == -EAGAIN)) {
@@ -411,7 +412,7 @@ incomplete_rcv:
411 continue; 412 continue;
412 } else if (length <= 0) { 413 } else if (length <= 0) {
413 if (server->tcpStatus == CifsNew) { 414 if (server->tcpStatus == CifsNew) {
414 cFYI(1, ("tcp session abend after SMBnegprot")); 415 cFYI(1, "tcp session abend after SMBnegprot");
415 /* some servers kill the TCP session rather than 416 /* some servers kill the TCP session rather than
416 returning an SMB negprot error, in which 417 returning an SMB negprot error, in which
417 case reconnecting here is not going to help, 418 case reconnecting here is not going to help,
@@ -419,18 +420,18 @@ incomplete_rcv:
419 break; 420 break;
420 } 421 }
421 if (!try_to_freeze() && (length == -EINTR)) { 422 if (!try_to_freeze() && (length == -EINTR)) {
422 cFYI(1, ("cifsd thread killed")); 423 cFYI(1, "cifsd thread killed");
423 break; 424 break;
424 } 425 }
425 cFYI(1, ("Reconnect after unexpected peek error %d", 426 cFYI(1, "Reconnect after unexpected peek error %d",
426 length)); 427 length);
427 cifs_reconnect(server); 428 cifs_reconnect(server);
428 csocket = server->ssocket; 429 csocket = server->ssocket;
429 wake_up(&server->response_q); 430 wake_up(&server->response_q);
430 continue; 431 continue;
431 } else if (length < pdu_length) { 432 } else if (length < pdu_length) {
432 cFYI(1, ("requested %d bytes but only got %d bytes", 433 cFYI(1, "requested %d bytes but only got %d bytes",
433 pdu_length, length)); 434 pdu_length, length);
434 pdu_length -= length; 435 pdu_length -= length;
435 msleep(1); 436 msleep(1);
436 goto incomplete_rcv; 437 goto incomplete_rcv;
@@ -450,18 +451,18 @@ incomplete_rcv:
450 pdu_length = be32_to_cpu((__force __be32)smb_buffer->smb_buf_length); 451 pdu_length = be32_to_cpu((__force __be32)smb_buffer->smb_buf_length);
451 smb_buffer->smb_buf_length = pdu_length; 452 smb_buffer->smb_buf_length = pdu_length;
452 453
453 cFYI(1, ("rfc1002 length 0x%x", pdu_length+4)); 454 cFYI(1, "rfc1002 length 0x%x", pdu_length+4);
454 455
455 if (temp == (char) RFC1002_SESSION_KEEP_ALIVE) { 456 if (temp == (char) RFC1002_SESSION_KEEP_ALIVE) {
456 continue; 457 continue;
457 } else if (temp == (char)RFC1002_POSITIVE_SESSION_RESPONSE) { 458 } else if (temp == (char)RFC1002_POSITIVE_SESSION_RESPONSE) {
458 cFYI(1, ("Good RFC 1002 session rsp")); 459 cFYI(1, "Good RFC 1002 session rsp");
459 continue; 460 continue;
460 } else if (temp == (char)RFC1002_NEGATIVE_SESSION_RESPONSE) { 461 } else if (temp == (char)RFC1002_NEGATIVE_SESSION_RESPONSE) {
461 /* we get this from Windows 98 instead of 462 /* we get this from Windows 98 instead of
462 an error on SMB negprot response */ 463 an error on SMB negprot response */
463 cFYI(1, ("Negative RFC1002 Session Response Error 0x%x)", 464 cFYI(1, "Negative RFC1002 Session Response Error 0x%x)",
464 pdu_length)); 465 pdu_length);
465 if (server->tcpStatus == CifsNew) { 466 if (server->tcpStatus == CifsNew) {
466 /* if nack on negprot (rather than 467 /* if nack on negprot (rather than
467 ret of smb negprot error) reconnecting 468 ret of smb negprot error) reconnecting
@@ -484,7 +485,7 @@ incomplete_rcv:
484 continue; 485 continue;
485 } 486 }
486 } else if (temp != (char) 0) { 487 } else if (temp != (char) 0) {
487 cERROR(1, ("Unknown RFC 1002 frame")); 488 cERROR(1, "Unknown RFC 1002 frame");
488 cifs_dump_mem(" Received Data: ", (char *)smb_buffer, 489 cifs_dump_mem(" Received Data: ", (char *)smb_buffer,
489 length); 490 length);
490 cifs_reconnect(server); 491 cifs_reconnect(server);
@@ -495,8 +496,8 @@ incomplete_rcv:
495 /* else we have an SMB response */ 496 /* else we have an SMB response */
496 if ((pdu_length > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) || 497 if ((pdu_length > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) ||
497 (pdu_length < sizeof(struct smb_hdr) - 1 - 4)) { 498 (pdu_length < sizeof(struct smb_hdr) - 1 - 4)) {
498 cERROR(1, ("Invalid size SMB length %d pdu_length %d", 499 cERROR(1, "Invalid size SMB length %d pdu_length %d",
499 length, pdu_length+4)); 500 length, pdu_length+4);
500 cifs_reconnect(server); 501 cifs_reconnect(server);
501 csocket = server->ssocket; 502 csocket = server->ssocket;
502 wake_up(&server->response_q); 503 wake_up(&server->response_q);
@@ -539,8 +540,8 @@ incomplete_rcv:
539 length = 0; 540 length = 0;
540 continue; 541 continue;
541 } else if (length <= 0) { 542 } else if (length <= 0) {
542 cERROR(1, ("Received no data, expecting %d", 543 cERROR(1, "Received no data, expecting %d",
543 pdu_length - total_read)); 544 pdu_length - total_read);
544 cifs_reconnect(server); 545 cifs_reconnect(server);
545 csocket = server->ssocket; 546 csocket = server->ssocket;
546 reconnect = 1; 547 reconnect = 1;
@@ -588,7 +589,7 @@ incomplete_rcv:
588 } 589 }
589 } else { 590 } else {
590 if (!isLargeBuf) { 591 if (!isLargeBuf) {
591 cERROR(1,("1st trans2 resp needs bigbuf")); 592 cERROR(1, "1st trans2 resp needs bigbuf");
592 /* BB maybe we can fix this up, switch 593 /* BB maybe we can fix this up, switch
593 to already allocated large buffer? */ 594 to already allocated large buffer? */
594 } else { 595 } else {
@@ -630,8 +631,8 @@ multi_t2_fnd:
630 wake_up_process(task_to_wake); 631 wake_up_process(task_to_wake);
631 } else if (!is_valid_oplock_break(smb_buffer, server) && 632 } else if (!is_valid_oplock_break(smb_buffer, server) &&
632 !isMultiRsp) { 633 !isMultiRsp) {
633 cERROR(1, ("No task to wake, unknown frame received! " 634 cERROR(1, "No task to wake, unknown frame received! "
634 "NumMids %d", midCount.counter)); 635 "NumMids %d", midCount.counter);
635 cifs_dump_mem("Received Data is: ", (char *)smb_buffer, 636 cifs_dump_mem("Received Data is: ", (char *)smb_buffer,
636 sizeof(struct smb_hdr)); 637 sizeof(struct smb_hdr));
637#ifdef CONFIG_CIFS_DEBUG2 638#ifdef CONFIG_CIFS_DEBUG2
@@ -708,8 +709,8 @@ multi_t2_fnd:
708 list_for_each(tmp, &server->pending_mid_q) { 709 list_for_each(tmp, &server->pending_mid_q) {
709 mid_entry = list_entry(tmp, struct mid_q_entry, qhead); 710 mid_entry = list_entry(tmp, struct mid_q_entry, qhead);
710 if (mid_entry->midState == MID_REQUEST_SUBMITTED) { 711 if (mid_entry->midState == MID_REQUEST_SUBMITTED) {
711 cFYI(1, ("Clearing Mid 0x%x - waking up ", 712 cFYI(1, "Clearing Mid 0x%x - waking up ",
712 mid_entry->mid)); 713 mid_entry->mid);
713 task_to_wake = mid_entry->tsk; 714 task_to_wake = mid_entry->tsk;
714 if (task_to_wake) 715 if (task_to_wake)
715 wake_up_process(task_to_wake); 716 wake_up_process(task_to_wake);
@@ -728,7 +729,7 @@ multi_t2_fnd:
728 to wait at least 45 seconds before giving up 729 to wait at least 45 seconds before giving up
729 on a request getting a response and going ahead 730 on a request getting a response and going ahead
730 and killing cifsd */ 731 and killing cifsd */
731 cFYI(1, ("Wait for exit from demultiplex thread")); 732 cFYI(1, "Wait for exit from demultiplex thread");
732 msleep(46000); 733 msleep(46000);
733 /* if threads still have not exited they are probably never 734 /* if threads still have not exited they are probably never
734 coming home not much else we can do but free the memory */ 735 coming home not much else we can do but free the memory */
@@ -849,7 +850,7 @@ cifs_parse_mount_options(char *options, const char *devname,
849 separator[0] = options[4]; 850 separator[0] = options[4];
850 options += 5; 851 options += 5;
851 } else { 852 } else {
852 cFYI(1, ("Null separator not allowed")); 853 cFYI(1, "Null separator not allowed");
853 } 854 }
854 } 855 }
855 856
@@ -974,7 +975,7 @@ cifs_parse_mount_options(char *options, const char *devname,
974 } 975 }
975 } else if (strnicmp(data, "sec", 3) == 0) { 976 } else if (strnicmp(data, "sec", 3) == 0) {
976 if (!value || !*value) { 977 if (!value || !*value) {
977 cERROR(1, ("no security value specified")); 978 cERROR(1, "no security value specified");
978 continue; 979 continue;
979 } else if (strnicmp(value, "krb5i", 5) == 0) { 980 } else if (strnicmp(value, "krb5i", 5) == 0) {
980 vol->secFlg |= CIFSSEC_MAY_KRB5 | 981 vol->secFlg |= CIFSSEC_MAY_KRB5 |
@@ -982,7 +983,7 @@ cifs_parse_mount_options(char *options, const char *devname,
982 } else if (strnicmp(value, "krb5p", 5) == 0) { 983 } else if (strnicmp(value, "krb5p", 5) == 0) {
983 /* vol->secFlg |= CIFSSEC_MUST_SEAL | 984 /* vol->secFlg |= CIFSSEC_MUST_SEAL |
984 CIFSSEC_MAY_KRB5; */ 985 CIFSSEC_MAY_KRB5; */
985 cERROR(1, ("Krb5 cifs privacy not supported")); 986 cERROR(1, "Krb5 cifs privacy not supported");
986 return 1; 987 return 1;
987 } else if (strnicmp(value, "krb5", 4) == 0) { 988 } else if (strnicmp(value, "krb5", 4) == 0) {
988 vol->secFlg |= CIFSSEC_MAY_KRB5; 989 vol->secFlg |= CIFSSEC_MAY_KRB5;
@@ -1014,7 +1015,7 @@ cifs_parse_mount_options(char *options, const char *devname,
1014 } else if (strnicmp(value, "none", 4) == 0) { 1015 } else if (strnicmp(value, "none", 4) == 0) {
1015 vol->nullauth = 1; 1016 vol->nullauth = 1;
1016 } else { 1017 } else {
1017 cERROR(1, ("bad security option: %s", value)); 1018 cERROR(1, "bad security option: %s", value);
1018 return 1; 1019 return 1;
1019 } 1020 }
1020 } else if ((strnicmp(data, "unc", 3) == 0) 1021 } else if ((strnicmp(data, "unc", 3) == 0)
@@ -1053,7 +1054,7 @@ cifs_parse_mount_options(char *options, const char *devname,
1053 a domain name and need special handling? */ 1054 a domain name and need special handling? */
1054 if (strnlen(value, 256) < 256) { 1055 if (strnlen(value, 256) < 256) {
1055 vol->domainname = value; 1056 vol->domainname = value;
1056 cFYI(1, ("Domain name set")); 1057 cFYI(1, "Domain name set");
1057 } else { 1058 } else {
1058 printk(KERN_WARNING "CIFS: domain name too " 1059 printk(KERN_WARNING "CIFS: domain name too "
1059 "long\n"); 1060 "long\n");
@@ -1076,7 +1077,7 @@ cifs_parse_mount_options(char *options, const char *devname,
1076 strcpy(vol->prepath+1, value); 1077 strcpy(vol->prepath+1, value);
1077 } else 1078 } else
1078 strcpy(vol->prepath, value); 1079 strcpy(vol->prepath, value);
1079 cFYI(1, ("prefix path %s", vol->prepath)); 1080 cFYI(1, "prefix path %s", vol->prepath);
1080 } else { 1081 } else {
1081 printk(KERN_WARNING "CIFS: prefix too long\n"); 1082 printk(KERN_WARNING "CIFS: prefix too long\n");
1082 return 1; 1083 return 1;
@@ -1092,7 +1093,7 @@ cifs_parse_mount_options(char *options, const char *devname,
1092 vol->iocharset = value; 1093 vol->iocharset = value;
1093 /* if iocharset not set then load_nls_default 1094 /* if iocharset not set then load_nls_default
1094 is used by caller */ 1095 is used by caller */
1095 cFYI(1, ("iocharset set to %s", value)); 1096 cFYI(1, "iocharset set to %s", value);
1096 } else { 1097 } else {
1097 printk(KERN_WARNING "CIFS: iocharset name " 1098 printk(KERN_WARNING "CIFS: iocharset name "
1098 "too long.\n"); 1099 "too long.\n");
@@ -1144,14 +1145,14 @@ cifs_parse_mount_options(char *options, const char *devname,
1144 } 1145 }
1145 } else if (strnicmp(data, "sockopt", 5) == 0) { 1146 } else if (strnicmp(data, "sockopt", 5) == 0) {
1146 if (!value || !*value) { 1147 if (!value || !*value) {
1147 cERROR(1, ("no socket option specified")); 1148 cERROR(1, "no socket option specified");
1148 continue; 1149 continue;
1149 } else if (strnicmp(value, "TCP_NODELAY", 11) == 0) { 1150 } else if (strnicmp(value, "TCP_NODELAY", 11) == 0) {
1150 vol->sockopt_tcp_nodelay = 1; 1151 vol->sockopt_tcp_nodelay = 1;
1151 } 1152 }
1152 } else if (strnicmp(data, "netbiosname", 4) == 0) { 1153 } else if (strnicmp(data, "netbiosname", 4) == 0) {
1153 if (!value || !*value || (*value == ' ')) { 1154 if (!value || !*value || (*value == ' ')) {
1154 cFYI(1, ("invalid (empty) netbiosname")); 1155 cFYI(1, "invalid (empty) netbiosname");
1155 } else { 1156 } else {
1156 memset(vol->source_rfc1001_name, 0x20, 15); 1157 memset(vol->source_rfc1001_name, 0x20, 15);
1157 for (i = 0; i < 15; i++) { 1158 for (i = 0; i < 15; i++) {
@@ -1175,7 +1176,7 @@ cifs_parse_mount_options(char *options, const char *devname,
1175 } else if (strnicmp(data, "servern", 7) == 0) { 1176 } else if (strnicmp(data, "servern", 7) == 0) {
1176 /* servernetbiosname specified override *SMBSERVER */ 1177 /* servernetbiosname specified override *SMBSERVER */
1177 if (!value || !*value || (*value == ' ')) { 1178 if (!value || !*value || (*value == ' ')) {
1178 cFYI(1, ("empty server netbiosname specified")); 1179 cFYI(1, "empty server netbiosname specified");
1179 } else { 1180 } else {
1180 /* last byte, type, is 0x20 for servr type */ 1181 /* last byte, type, is 0x20 for servr type */
1181 memset(vol->target_rfc1001_name, 0x20, 16); 1182 memset(vol->target_rfc1001_name, 0x20, 16);
@@ -1434,7 +1435,7 @@ cifs_find_tcp_session(struct sockaddr_storage *addr, unsigned short int port)
1434 1435
1435 ++server->srv_count; 1436 ++server->srv_count;
1436 write_unlock(&cifs_tcp_ses_lock); 1437 write_unlock(&cifs_tcp_ses_lock);
1437 cFYI(1, ("Existing tcp session with server found")); 1438 cFYI(1, "Existing tcp session with server found");
1438 return server; 1439 return server;
1439 } 1440 }
1440 write_unlock(&cifs_tcp_ses_lock); 1441 write_unlock(&cifs_tcp_ses_lock);
@@ -1475,7 +1476,7 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
1475 1476
1476 memset(&addr, 0, sizeof(struct sockaddr_storage)); 1477 memset(&addr, 0, sizeof(struct sockaddr_storage));
1477 1478
1478 cFYI(1, ("UNC: %s ip: %s", volume_info->UNC, volume_info->UNCip)); 1479 cFYI(1, "UNC: %s ip: %s", volume_info->UNC, volume_info->UNCip);
1479 1480
1480 if (volume_info->UNCip && volume_info->UNC) { 1481 if (volume_info->UNCip && volume_info->UNC) {
1481 rc = cifs_convert_address(volume_info->UNCip, &addr); 1482 rc = cifs_convert_address(volume_info->UNCip, &addr);
@@ -1487,13 +1488,12 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
1487 } else if (volume_info->UNCip) { 1488 } else if (volume_info->UNCip) {
1488 /* BB using ip addr as tcp_ses name to connect to the 1489 /* BB using ip addr as tcp_ses name to connect to the
1489 DFS root below */ 1490 DFS root below */
1490 cERROR(1, ("Connecting to DFS root not implemented yet")); 1491 cERROR(1, "Connecting to DFS root not implemented yet");
1491 rc = -EINVAL; 1492 rc = -EINVAL;
1492 goto out_err; 1493 goto out_err;
1493 } else /* which tcp_sess DFS root would we conect to */ { 1494 } else /* which tcp_sess DFS root would we conect to */ {
1494 cERROR(1, 1495 cERROR(1, "CIFS mount error: No UNC path (e.g. -o "
1495 ("CIFS mount error: No UNC path (e.g. -o " 1496 "unc=//192.168.1.100/public) specified");
1496 "unc=//192.168.1.100/public) specified"));
1497 rc = -EINVAL; 1497 rc = -EINVAL;
1498 goto out_err; 1498 goto out_err;
1499 } 1499 }
@@ -1540,7 +1540,7 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
1540 ++tcp_ses->srv_count; 1540 ++tcp_ses->srv_count;
1541 1541
1542 if (addr.ss_family == AF_INET6) { 1542 if (addr.ss_family == AF_INET6) {
1543 cFYI(1, ("attempting ipv6 connect")); 1543 cFYI(1, "attempting ipv6 connect");
1544 /* BB should we allow ipv6 on port 139? */ 1544 /* BB should we allow ipv6 on port 139? */
1545 /* other OS never observed in Wild doing 139 with v6 */ 1545 /* other OS never observed in Wild doing 139 with v6 */
1546 sin_server6->sin6_port = htons(volume_info->port); 1546 sin_server6->sin6_port = htons(volume_info->port);
@@ -1554,7 +1554,7 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
1554 rc = ipv4_connect(tcp_ses); 1554 rc = ipv4_connect(tcp_ses);
1555 } 1555 }
1556 if (rc < 0) { 1556 if (rc < 0) {
1557 cERROR(1, ("Error connecting to socket. Aborting operation")); 1557 cERROR(1, "Error connecting to socket. Aborting operation");
1558 goto out_err; 1558 goto out_err;
1559 } 1559 }
1560 1560
@@ -1567,7 +1567,7 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
1567 tcp_ses, "cifsd"); 1567 tcp_ses, "cifsd");
1568 if (IS_ERR(tcp_ses->tsk)) { 1568 if (IS_ERR(tcp_ses->tsk)) {
1569 rc = PTR_ERR(tcp_ses->tsk); 1569 rc = PTR_ERR(tcp_ses->tsk);
1570 cERROR(1, ("error %d create cifsd thread", rc)); 1570 cERROR(1, "error %d create cifsd thread", rc);
1571 module_put(THIS_MODULE); 1571 module_put(THIS_MODULE);
1572 goto out_err; 1572 goto out_err;
1573 } 1573 }
@@ -1616,6 +1616,7 @@ cifs_put_smb_ses(struct cifsSesInfo *ses)
1616 int xid; 1616 int xid;
1617 struct TCP_Server_Info *server = ses->server; 1617 struct TCP_Server_Info *server = ses->server;
1618 1618
1619 cFYI(1, "%s: ses_count=%d\n", __func__, ses->ses_count);
1619 write_lock(&cifs_tcp_ses_lock); 1620 write_lock(&cifs_tcp_ses_lock);
1620 if (--ses->ses_count > 0) { 1621 if (--ses->ses_count > 0) {
1621 write_unlock(&cifs_tcp_ses_lock); 1622 write_unlock(&cifs_tcp_ses_lock);
@@ -1634,6 +1635,102 @@ cifs_put_smb_ses(struct cifsSesInfo *ses)
1634 cifs_put_tcp_session(server); 1635 cifs_put_tcp_session(server);
1635} 1636}
1636 1637
1638static struct cifsSesInfo *
1639cifs_get_smb_ses(struct TCP_Server_Info *server, struct smb_vol *volume_info)
1640{
1641 int rc = -ENOMEM, xid;
1642 struct cifsSesInfo *ses;
1643
1644 xid = GetXid();
1645
1646 ses = cifs_find_smb_ses(server, volume_info->username);
1647 if (ses) {
1648 cFYI(1, "Existing smb sess found (status=%d)", ses->status);
1649
1650 /* existing SMB ses has a server reference already */
1651 cifs_put_tcp_session(server);
1652
1653 mutex_lock(&ses->session_mutex);
1654 rc = cifs_negotiate_protocol(xid, ses);
1655 if (rc) {
1656 mutex_unlock(&ses->session_mutex);
1657 /* problem -- put our ses reference */
1658 cifs_put_smb_ses(ses);
1659 FreeXid(xid);
1660 return ERR_PTR(rc);
1661 }
1662 if (ses->need_reconnect) {
1663 cFYI(1, "Session needs reconnect");
1664 rc = cifs_setup_session(xid, ses,
1665 volume_info->local_nls);
1666 if (rc) {
1667 mutex_unlock(&ses->session_mutex);
1668 /* problem -- put our reference */
1669 cifs_put_smb_ses(ses);
1670 FreeXid(xid);
1671 return ERR_PTR(rc);
1672 }
1673 }
1674 mutex_unlock(&ses->session_mutex);
1675 FreeXid(xid);
1676 return ses;
1677 }
1678
1679 cFYI(1, "Existing smb sess not found");
1680 ses = sesInfoAlloc();
1681 if (ses == NULL)
1682 goto get_ses_fail;
1683
1684 /* new SMB session uses our server ref */
1685 ses->server = server;
1686 if (server->addr.sockAddr6.sin6_family == AF_INET6)
1687 sprintf(ses->serverName, "%pI6",
1688 &server->addr.sockAddr6.sin6_addr);
1689 else
1690 sprintf(ses->serverName, "%pI4",
1691 &server->addr.sockAddr.sin_addr.s_addr);
1692
1693 if (volume_info->username)
1694 strncpy(ses->userName, volume_info->username,
1695 MAX_USERNAME_SIZE);
1696
1697 /* volume_info->password freed at unmount */
1698 if (volume_info->password) {
1699 ses->password = kstrdup(volume_info->password, GFP_KERNEL);
1700 if (!ses->password)
1701 goto get_ses_fail;
1702 }
1703 if (volume_info->domainname) {
1704 int len = strlen(volume_info->domainname);
1705 ses->domainName = kmalloc(len + 1, GFP_KERNEL);
1706 if (ses->domainName)
1707 strcpy(ses->domainName, volume_info->domainname);
1708 }
1709 ses->linux_uid = volume_info->linux_uid;
1710 ses->overrideSecFlg = volume_info->secFlg;
1711
1712 mutex_lock(&ses->session_mutex);
1713 rc = cifs_negotiate_protocol(xid, ses);
1714 if (!rc)
1715 rc = cifs_setup_session(xid, ses, volume_info->local_nls);
1716 mutex_unlock(&ses->session_mutex);
1717 if (rc)
1718 goto get_ses_fail;
1719
1720 /* success, put it on the list */
1721 write_lock(&cifs_tcp_ses_lock);
1722 list_add(&ses->smb_ses_list, &server->smb_ses_list);
1723 write_unlock(&cifs_tcp_ses_lock);
1724
1725 FreeXid(xid);
1726 return ses;
1727
1728get_ses_fail:
1729 sesInfoFree(ses);
1730 FreeXid(xid);
1731 return ERR_PTR(rc);
1732}
1733
1637static struct cifsTconInfo * 1734static struct cifsTconInfo *
1638cifs_find_tcon(struct cifsSesInfo *ses, const char *unc) 1735cifs_find_tcon(struct cifsSesInfo *ses, const char *unc)
1639{ 1736{
@@ -1662,6 +1759,7 @@ cifs_put_tcon(struct cifsTconInfo *tcon)
1662 int xid; 1759 int xid;
1663 struct cifsSesInfo *ses = tcon->ses; 1760 struct cifsSesInfo *ses = tcon->ses;
1664 1761
1762 cFYI(1, "%s: tc_count=%d\n", __func__, tcon->tc_count);
1665 write_lock(&cifs_tcp_ses_lock); 1763 write_lock(&cifs_tcp_ses_lock);
1666 if (--tcon->tc_count > 0) { 1764 if (--tcon->tc_count > 0) {
1667 write_unlock(&cifs_tcp_ses_lock); 1765 write_unlock(&cifs_tcp_ses_lock);
@@ -1679,6 +1777,80 @@ cifs_put_tcon(struct cifsTconInfo *tcon)
1679 cifs_put_smb_ses(ses); 1777 cifs_put_smb_ses(ses);
1680} 1778}
1681 1779
1780static struct cifsTconInfo *
1781cifs_get_tcon(struct cifsSesInfo *ses, struct smb_vol *volume_info)
1782{
1783 int rc, xid;
1784 struct cifsTconInfo *tcon;
1785
1786 tcon = cifs_find_tcon(ses, volume_info->UNC);
1787 if (tcon) {
1788 cFYI(1, "Found match on UNC path");
1789 /* existing tcon already has a reference */
1790 cifs_put_smb_ses(ses);
1791 if (tcon->seal != volume_info->seal)
1792 cERROR(1, "transport encryption setting "
1793 "conflicts with existing tid");
1794 return tcon;
1795 }
1796
1797 tcon = tconInfoAlloc();
1798 if (tcon == NULL) {
1799 rc = -ENOMEM;
1800 goto out_fail;
1801 }
1802
1803 tcon->ses = ses;
1804 if (volume_info->password) {
1805 tcon->password = kstrdup(volume_info->password, GFP_KERNEL);
1806 if (!tcon->password) {
1807 rc = -ENOMEM;
1808 goto out_fail;
1809 }
1810 }
1811
1812 if (strchr(volume_info->UNC + 3, '\\') == NULL
1813 && strchr(volume_info->UNC + 3, '/') == NULL) {
1814 cERROR(1, "Missing share name");
1815 rc = -ENODEV;
1816 goto out_fail;
1817 }
1818
1819 /* BB Do we need to wrap session_mutex around
1820 * this TCon call and Unix SetFS as
1821 * we do on SessSetup and reconnect? */
1822 xid = GetXid();
1823 rc = CIFSTCon(xid, ses, volume_info->UNC, tcon, volume_info->local_nls);
1824 FreeXid(xid);
1825 cFYI(1, "CIFS Tcon rc = %d", rc);
1826 if (rc)
1827 goto out_fail;
1828
1829 if (volume_info->nodfs) {
1830 tcon->Flags &= ~SMB_SHARE_IS_IN_DFS;
1831 cFYI(1, "DFS disabled (%d)", tcon->Flags);
1832 }
1833 tcon->seal = volume_info->seal;
1834 /* we can have only one retry value for a connection
1835 to a share so for resources mounted more than once
1836 to the same server share the last value passed in
1837 for the retry flag is used */
1838 tcon->retry = volume_info->retry;
1839 tcon->nocase = volume_info->nocase;
1840 tcon->local_lease = volume_info->local_lease;
1841
1842 write_lock(&cifs_tcp_ses_lock);
1843 list_add(&tcon->tcon_list, &ses->tcon_list);
1844 write_unlock(&cifs_tcp_ses_lock);
1845
1846 return tcon;
1847
1848out_fail:
1849 tconInfoFree(tcon);
1850 return ERR_PTR(rc);
1851}
1852
1853
1682int 1854int
1683get_dfs_path(int xid, struct cifsSesInfo *pSesInfo, const char *old_path, 1855get_dfs_path(int xid, struct cifsSesInfo *pSesInfo, const char *old_path,
1684 const struct nls_table *nls_codepage, unsigned int *pnum_referrals, 1856 const struct nls_table *nls_codepage, unsigned int *pnum_referrals,
@@ -1703,8 +1875,7 @@ get_dfs_path(int xid, struct cifsSesInfo *pSesInfo, const char *old_path,
1703 strcpy(temp_unc + 2, pSesInfo->serverName); 1875 strcpy(temp_unc + 2, pSesInfo->serverName);
1704 strcpy(temp_unc + 2 + strlen(pSesInfo->serverName), "\\IPC$"); 1876 strcpy(temp_unc + 2 + strlen(pSesInfo->serverName), "\\IPC$");
1705 rc = CIFSTCon(xid, pSesInfo, temp_unc, NULL, nls_codepage); 1877 rc = CIFSTCon(xid, pSesInfo, temp_unc, NULL, nls_codepage);
1706 cFYI(1, 1878 cFYI(1, "CIFS Tcon rc = %d ipc_tid = %d", rc, pSesInfo->ipc_tid);
1707 ("CIFS Tcon rc = %d ipc_tid = %d", rc, pSesInfo->ipc_tid));
1708 kfree(temp_unc); 1879 kfree(temp_unc);
1709 } 1880 }
1710 if (rc == 0) 1881 if (rc == 0)
@@ -1777,12 +1948,12 @@ ipv4_connect(struct TCP_Server_Info *server)
1777 rc = sock_create_kern(PF_INET, SOCK_STREAM, 1948 rc = sock_create_kern(PF_INET, SOCK_STREAM,
1778 IPPROTO_TCP, &socket); 1949 IPPROTO_TCP, &socket);
1779 if (rc < 0) { 1950 if (rc < 0) {
1780 cERROR(1, ("Error %d creating socket", rc)); 1951 cERROR(1, "Error %d creating socket", rc);
1781 return rc; 1952 return rc;
1782 } 1953 }
1783 1954
1784 /* BB other socket options to set KEEPALIVE, NODELAY? */ 1955 /* BB other socket options to set KEEPALIVE, NODELAY? */
1785 cFYI(1, ("Socket created")); 1956 cFYI(1, "Socket created");
1786 server->ssocket = socket; 1957 server->ssocket = socket;
1787 socket->sk->sk_allocation = GFP_NOFS; 1958 socket->sk->sk_allocation = GFP_NOFS;
1788 cifs_reclassify_socket4(socket); 1959 cifs_reclassify_socket4(socket);
@@ -1827,7 +1998,7 @@ ipv4_connect(struct TCP_Server_Info *server)
1827 if (!connected) { 1998 if (!connected) {
1828 if (orig_port) 1999 if (orig_port)
1829 server->addr.sockAddr.sin_port = orig_port; 2000 server->addr.sockAddr.sin_port = orig_port;
1830 cFYI(1, ("Error %d connecting to server via ipv4", rc)); 2001 cFYI(1, "Error %d connecting to server via ipv4", rc);
1831 sock_release(socket); 2002 sock_release(socket);
1832 server->ssocket = NULL; 2003 server->ssocket = NULL;
1833 return rc; 2004 return rc;
@@ -1855,12 +2026,12 @@ ipv4_connect(struct TCP_Server_Info *server)
1855 rc = kernel_setsockopt(socket, SOL_TCP, TCP_NODELAY, 2026 rc = kernel_setsockopt(socket, SOL_TCP, TCP_NODELAY,
1856 (char *)&val, sizeof(val)); 2027 (char *)&val, sizeof(val));
1857 if (rc) 2028 if (rc)
1858 cFYI(1, ("set TCP_NODELAY socket option error %d", rc)); 2029 cFYI(1, "set TCP_NODELAY socket option error %d", rc);
1859 } 2030 }
1860 2031
1861 cFYI(1, ("sndbuf %d rcvbuf %d rcvtimeo 0x%lx", 2032 cFYI(1, "sndbuf %d rcvbuf %d rcvtimeo 0x%lx",
1862 socket->sk->sk_sndbuf, 2033 socket->sk->sk_sndbuf,
1863 socket->sk->sk_rcvbuf, socket->sk->sk_rcvtimeo)); 2034 socket->sk->sk_rcvbuf, socket->sk->sk_rcvtimeo);
1864 2035
1865 /* send RFC1001 sessinit */ 2036 /* send RFC1001 sessinit */
1866 if (server->addr.sockAddr.sin_port == htons(RFC1001_PORT)) { 2037 if (server->addr.sockAddr.sin_port == htons(RFC1001_PORT)) {
@@ -1938,13 +2109,13 @@ ipv6_connect(struct TCP_Server_Info *server)
1938 rc = sock_create_kern(PF_INET6, SOCK_STREAM, 2109 rc = sock_create_kern(PF_INET6, SOCK_STREAM,
1939 IPPROTO_TCP, &socket); 2110 IPPROTO_TCP, &socket);
1940 if (rc < 0) { 2111 if (rc < 0) {
1941 cERROR(1, ("Error %d creating ipv6 socket", rc)); 2112 cERROR(1, "Error %d creating ipv6 socket", rc);
1942 socket = NULL; 2113 socket = NULL;
1943 return rc; 2114 return rc;
1944 } 2115 }
1945 2116
1946 /* BB other socket options to set KEEPALIVE, NODELAY? */ 2117 /* BB other socket options to set KEEPALIVE, NODELAY? */
1947 cFYI(1, ("ipv6 Socket created")); 2118 cFYI(1, "ipv6 Socket created");
1948 server->ssocket = socket; 2119 server->ssocket = socket;
1949 socket->sk->sk_allocation = GFP_NOFS; 2120 socket->sk->sk_allocation = GFP_NOFS;
1950 cifs_reclassify_socket6(socket); 2121 cifs_reclassify_socket6(socket);
@@ -1988,7 +2159,7 @@ ipv6_connect(struct TCP_Server_Info *server)
1988 if (!connected) { 2159 if (!connected) {
1989 if (orig_port) 2160 if (orig_port)
1990 server->addr.sockAddr6.sin6_port = orig_port; 2161 server->addr.sockAddr6.sin6_port = orig_port;
1991 cFYI(1, ("Error %d connecting to server via ipv6", rc)); 2162 cFYI(1, "Error %d connecting to server via ipv6", rc);
1992 sock_release(socket); 2163 sock_release(socket);
1993 server->ssocket = NULL; 2164 server->ssocket = NULL;
1994 return rc; 2165 return rc;
@@ -2007,7 +2178,7 @@ ipv6_connect(struct TCP_Server_Info *server)
2007 rc = kernel_setsockopt(socket, SOL_TCP, TCP_NODELAY, 2178 rc = kernel_setsockopt(socket, SOL_TCP, TCP_NODELAY,
2008 (char *)&val, sizeof(val)); 2179 (char *)&val, sizeof(val));
2009 if (rc) 2180 if (rc)
2010 cFYI(1, ("set TCP_NODELAY socket option error %d", rc)); 2181 cFYI(1, "set TCP_NODELAY socket option error %d", rc);
2011 } 2182 }
2012 2183
2013 server->ssocket = socket; 2184 server->ssocket = socket;
@@ -2032,13 +2203,13 @@ void reset_cifs_unix_caps(int xid, struct cifsTconInfo *tcon,
2032 if (vol_info && vol_info->no_linux_ext) { 2203 if (vol_info && vol_info->no_linux_ext) {
2033 tcon->fsUnixInfo.Capability = 0; 2204 tcon->fsUnixInfo.Capability = 0;
2034 tcon->unix_ext = 0; /* Unix Extensions disabled */ 2205 tcon->unix_ext = 0; /* Unix Extensions disabled */
2035 cFYI(1, ("Linux protocol extensions disabled")); 2206 cFYI(1, "Linux protocol extensions disabled");
2036 return; 2207 return;
2037 } else if (vol_info) 2208 } else if (vol_info)
2038 tcon->unix_ext = 1; /* Unix Extensions supported */ 2209 tcon->unix_ext = 1; /* Unix Extensions supported */
2039 2210
2040 if (tcon->unix_ext == 0) { 2211 if (tcon->unix_ext == 0) {
2041 cFYI(1, ("Unix extensions disabled so not set on reconnect")); 2212 cFYI(1, "Unix extensions disabled so not set on reconnect");
2042 return; 2213 return;
2043 } 2214 }
2044 2215
@@ -2054,12 +2225,11 @@ void reset_cifs_unix_caps(int xid, struct cifsTconInfo *tcon,
2054 cap &= ~CIFS_UNIX_POSIX_ACL_CAP; 2225 cap &= ~CIFS_UNIX_POSIX_ACL_CAP;
2055 if ((saved_cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) == 0) { 2226 if ((saved_cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) == 0) {
2056 if (cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) 2227 if (cap & CIFS_UNIX_POSIX_PATHNAMES_CAP)
2057 cERROR(1, ("POSIXPATH support change")); 2228 cERROR(1, "POSIXPATH support change");
2058 cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP; 2229 cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP;
2059 } else if ((cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) == 0) { 2230 } else if ((cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) == 0) {
2060 cERROR(1, ("possible reconnect error")); 2231 cERROR(1, "possible reconnect error");
2061 cERROR(1, 2232 cERROR(1, "server disabled POSIX path support");
2062 ("server disabled POSIX path support"));
2063 } 2233 }
2064 } 2234 }
2065 2235
@@ -2067,7 +2237,7 @@ void reset_cifs_unix_caps(int xid, struct cifsTconInfo *tcon,
2067 if (vol_info && vol_info->no_psx_acl) 2237 if (vol_info && vol_info->no_psx_acl)
2068 cap &= ~CIFS_UNIX_POSIX_ACL_CAP; 2238 cap &= ~CIFS_UNIX_POSIX_ACL_CAP;
2069 else if (CIFS_UNIX_POSIX_ACL_CAP & cap) { 2239 else if (CIFS_UNIX_POSIX_ACL_CAP & cap) {
2070 cFYI(1, ("negotiated posix acl support")); 2240 cFYI(1, "negotiated posix acl support");
2071 if (sb) 2241 if (sb)
2072 sb->s_flags |= MS_POSIXACL; 2242 sb->s_flags |= MS_POSIXACL;
2073 } 2243 }
@@ -2075,7 +2245,7 @@ void reset_cifs_unix_caps(int xid, struct cifsTconInfo *tcon,
2075 if (vol_info && vol_info->posix_paths == 0) 2245 if (vol_info && vol_info->posix_paths == 0)
2076 cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP; 2246 cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP;
2077 else if (cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) { 2247 else if (cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) {
2078 cFYI(1, ("negotiate posix pathnames")); 2248 cFYI(1, "negotiate posix pathnames");
2079 if (sb) 2249 if (sb)
2080 CIFS_SB(sb)->mnt_cifs_flags |= 2250 CIFS_SB(sb)->mnt_cifs_flags |=
2081 CIFS_MOUNT_POSIX_PATHS; 2251 CIFS_MOUNT_POSIX_PATHS;
@@ -2090,39 +2260,38 @@ void reset_cifs_unix_caps(int xid, struct cifsTconInfo *tcon,
2090 if (sb && (CIFS_SB(sb)->rsize > 127 * 1024)) { 2260 if (sb && (CIFS_SB(sb)->rsize > 127 * 1024)) {
2091 if ((cap & CIFS_UNIX_LARGE_READ_CAP) == 0) { 2261 if ((cap & CIFS_UNIX_LARGE_READ_CAP) == 0) {
2092 CIFS_SB(sb)->rsize = 127 * 1024; 2262 CIFS_SB(sb)->rsize = 127 * 1024;
2093 cFYI(DBG2, 2263 cFYI(DBG2, "larger reads not supported by srv");
2094 ("larger reads not supported by srv"));
2095 } 2264 }
2096 } 2265 }
2097 2266
2098 2267
2099 cFYI(1, ("Negotiate caps 0x%x", (int)cap)); 2268 cFYI(1, "Negotiate caps 0x%x", (int)cap);
2100#ifdef CONFIG_CIFS_DEBUG2 2269#ifdef CONFIG_CIFS_DEBUG2
2101 if (cap & CIFS_UNIX_FCNTL_CAP) 2270 if (cap & CIFS_UNIX_FCNTL_CAP)
2102 cFYI(1, ("FCNTL cap")); 2271 cFYI(1, "FCNTL cap");
2103 if (cap & CIFS_UNIX_EXTATTR_CAP) 2272 if (cap & CIFS_UNIX_EXTATTR_CAP)
2104 cFYI(1, ("EXTATTR cap")); 2273 cFYI(1, "EXTATTR cap");
2105 if (cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) 2274 if (cap & CIFS_UNIX_POSIX_PATHNAMES_CAP)
2106 cFYI(1, ("POSIX path cap")); 2275 cFYI(1, "POSIX path cap");
2107 if (cap & CIFS_UNIX_XATTR_CAP) 2276 if (cap & CIFS_UNIX_XATTR_CAP)
2108 cFYI(1, ("XATTR cap")); 2277 cFYI(1, "XATTR cap");
2109 if (cap & CIFS_UNIX_POSIX_ACL_CAP) 2278 if (cap & CIFS_UNIX_POSIX_ACL_CAP)
2110 cFYI(1, ("POSIX ACL cap")); 2279 cFYI(1, "POSIX ACL cap");
2111 if (cap & CIFS_UNIX_LARGE_READ_CAP) 2280 if (cap & CIFS_UNIX_LARGE_READ_CAP)
2112 cFYI(1, ("very large read cap")); 2281 cFYI(1, "very large read cap");
2113 if (cap & CIFS_UNIX_LARGE_WRITE_CAP) 2282 if (cap & CIFS_UNIX_LARGE_WRITE_CAP)
2114 cFYI(1, ("very large write cap")); 2283 cFYI(1, "very large write cap");
2115#endif /* CIFS_DEBUG2 */ 2284#endif /* CIFS_DEBUG2 */
2116 if (CIFSSMBSetFSUnixInfo(xid, tcon, cap)) { 2285 if (CIFSSMBSetFSUnixInfo(xid, tcon, cap)) {
2117 if (vol_info == NULL) { 2286 if (vol_info == NULL) {
2118 cFYI(1, ("resetting capabilities failed")); 2287 cFYI(1, "resetting capabilities failed");
2119 } else 2288 } else
2120 cERROR(1, ("Negotiating Unix capabilities " 2289 cERROR(1, "Negotiating Unix capabilities "
2121 "with the server failed. Consider " 2290 "with the server failed. Consider "
2122 "mounting with the Unix Extensions\n" 2291 "mounting with the Unix Extensions\n"
2123 "disabled, if problems are found, " 2292 "disabled, if problems are found, "
2124 "by specifying the nounix mount " 2293 "by specifying the nounix mount "
2125 "option.")); 2294 "option.");
2126 2295
2127 } 2296 }
2128 } 2297 }
@@ -2152,8 +2321,8 @@ static void setup_cifs_sb(struct smb_vol *pvolume_info,
2152 struct cifs_sb_info *cifs_sb) 2321 struct cifs_sb_info *cifs_sb)
2153{ 2322{
2154 if (pvolume_info->rsize > CIFSMaxBufSize) { 2323 if (pvolume_info->rsize > CIFSMaxBufSize) {
2155 cERROR(1, ("rsize %d too large, using MaxBufSize", 2324 cERROR(1, "rsize %d too large, using MaxBufSize",
2156 pvolume_info->rsize)); 2325 pvolume_info->rsize);
2157 cifs_sb->rsize = CIFSMaxBufSize; 2326 cifs_sb->rsize = CIFSMaxBufSize;
2158 } else if ((pvolume_info->rsize) && 2327 } else if ((pvolume_info->rsize) &&
2159 (pvolume_info->rsize <= CIFSMaxBufSize)) 2328 (pvolume_info->rsize <= CIFSMaxBufSize))
@@ -2162,8 +2331,8 @@ static void setup_cifs_sb(struct smb_vol *pvolume_info,
2162 cifs_sb->rsize = CIFSMaxBufSize; 2331 cifs_sb->rsize = CIFSMaxBufSize;
2163 2332
2164 if (pvolume_info->wsize > PAGEVEC_SIZE * PAGE_CACHE_SIZE) { 2333 if (pvolume_info->wsize > PAGEVEC_SIZE * PAGE_CACHE_SIZE) {
2165 cERROR(1, ("wsize %d too large, using 4096 instead", 2334 cERROR(1, "wsize %d too large, using 4096 instead",
2166 pvolume_info->wsize)); 2335 pvolume_info->wsize);
2167 cifs_sb->wsize = 4096; 2336 cifs_sb->wsize = 4096;
2168 } else if (pvolume_info->wsize) 2337 } else if (pvolume_info->wsize)
2169 cifs_sb->wsize = pvolume_info->wsize; 2338 cifs_sb->wsize = pvolume_info->wsize;
@@ -2181,7 +2350,7 @@ static void setup_cifs_sb(struct smb_vol *pvolume_info,
2181 if (cifs_sb->rsize < 2048) { 2350 if (cifs_sb->rsize < 2048) {
2182 cifs_sb->rsize = 2048; 2351 cifs_sb->rsize = 2048;
2183 /* Windows ME may prefer this */ 2352 /* Windows ME may prefer this */
2184 cFYI(1, ("readsize set to minimum: 2048")); 2353 cFYI(1, "readsize set to minimum: 2048");
2185 } 2354 }
2186 /* calculate prepath */ 2355 /* calculate prepath */
2187 cifs_sb->prepath = pvolume_info->prepath; 2356 cifs_sb->prepath = pvolume_info->prepath;
@@ -2199,8 +2368,8 @@ static void setup_cifs_sb(struct smb_vol *pvolume_info,
2199 cifs_sb->mnt_gid = pvolume_info->linux_gid; 2368 cifs_sb->mnt_gid = pvolume_info->linux_gid;
2200 cifs_sb->mnt_file_mode = pvolume_info->file_mode; 2369 cifs_sb->mnt_file_mode = pvolume_info->file_mode;
2201 cifs_sb->mnt_dir_mode = pvolume_info->dir_mode; 2370 cifs_sb->mnt_dir_mode = pvolume_info->dir_mode;
2202 cFYI(1, ("file mode: 0x%x dir mode: 0x%x", 2371 cFYI(1, "file mode: 0x%x dir mode: 0x%x",
2203 cifs_sb->mnt_file_mode, cifs_sb->mnt_dir_mode)); 2372 cifs_sb->mnt_file_mode, cifs_sb->mnt_dir_mode);
2204 2373
2205 if (pvolume_info->noperm) 2374 if (pvolume_info->noperm)
2206 cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_NO_PERM; 2375 cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_NO_PERM;
@@ -2229,13 +2398,13 @@ static void setup_cifs_sb(struct smb_vol *pvolume_info,
2229 if (pvolume_info->dynperm) 2398 if (pvolume_info->dynperm)
2230 cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_DYNPERM; 2399 cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_DYNPERM;
2231 if (pvolume_info->direct_io) { 2400 if (pvolume_info->direct_io) {
2232 cFYI(1, ("mounting share using direct i/o")); 2401 cFYI(1, "mounting share using direct i/o");
2233 cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_DIRECT_IO; 2402 cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_DIRECT_IO;
2234 } 2403 }
2235 2404
2236 if ((pvolume_info->cifs_acl) && (pvolume_info->dynperm)) 2405 if ((pvolume_info->cifs_acl) && (pvolume_info->dynperm))
2237 cERROR(1, ("mount option dynperm ignored if cifsacl " 2406 cERROR(1, "mount option dynperm ignored if cifsacl "
2238 "mount option supported")); 2407 "mount option supported");
2239} 2408}
2240 2409
2241static int 2410static int
@@ -2262,7 +2431,7 @@ cleanup_volume_info(struct smb_vol **pvolume_info)
2262{ 2431{
2263 struct smb_vol *volume_info; 2432 struct smb_vol *volume_info;
2264 2433
2265 if (!pvolume_info && !*pvolume_info) 2434 if (!pvolume_info || !*pvolume_info)
2266 return; 2435 return;
2267 2436
2268 volume_info = *pvolume_info; 2437 volume_info = *pvolume_info;
@@ -2344,11 +2513,11 @@ try_mount_again:
2344 } 2513 }
2345 2514
2346 if (volume_info->nullauth) { 2515 if (volume_info->nullauth) {
2347 cFYI(1, ("null user")); 2516 cFYI(1, "null user");
2348 volume_info->username = ""; 2517 volume_info->username = "";
2349 } else if (volume_info->username) { 2518 } else if (volume_info->username) {
2350 /* BB fixme parse for domain name here */ 2519 /* BB fixme parse for domain name here */
2351 cFYI(1, ("Username: %s", volume_info->username)); 2520 cFYI(1, "Username: %s", volume_info->username);
2352 } else { 2521 } else {
2353 cifserror("No username specified"); 2522 cifserror("No username specified");
2354 /* In userspace mount helper we can get user name from alternate 2523 /* In userspace mount helper we can get user name from alternate
@@ -2357,20 +2526,20 @@ try_mount_again:
2357 goto out; 2526 goto out;
2358 } 2527 }
2359 2528
2360
2361 /* this is needed for ASCII cp to Unicode converts */ 2529 /* this is needed for ASCII cp to Unicode converts */
2362 if (volume_info->iocharset == NULL) { 2530 if (volume_info->iocharset == NULL) {
2363 cifs_sb->local_nls = load_nls_default(); 2531 /* load_nls_default cannot return null */
2364 /* load_nls_default can not return null */ 2532 volume_info->local_nls = load_nls_default();
2365 } else { 2533 } else {
2366 cifs_sb->local_nls = load_nls(volume_info->iocharset); 2534 volume_info->local_nls = load_nls(volume_info->iocharset);
2367 if (cifs_sb->local_nls == NULL) { 2535 if (volume_info->local_nls == NULL) {
2368 cERROR(1, ("CIFS mount error: iocharset %s not found", 2536 cERROR(1, "CIFS mount error: iocharset %s not found",
2369 volume_info->iocharset)); 2537 volume_info->iocharset);
2370 rc = -ELIBACC; 2538 rc = -ELIBACC;
2371 goto out; 2539 goto out;
2372 } 2540 }
2373 } 2541 }
2542 cifs_sb->local_nls = volume_info->local_nls;
2374 2543
2375 /* get a reference to a tcp session */ 2544 /* get a reference to a tcp session */
2376 srvTcp = cifs_get_tcp_session(volume_info); 2545 srvTcp = cifs_get_tcp_session(volume_info);
@@ -2379,148 +2548,30 @@ try_mount_again:
2379 goto out; 2548 goto out;
2380 } 2549 }
2381 2550
2382 pSesInfo = cifs_find_smb_ses(srvTcp, volume_info->username); 2551 /* get a reference to a SMB session */
2383 if (pSesInfo) { 2552 pSesInfo = cifs_get_smb_ses(srvTcp, volume_info);
2384 cFYI(1, ("Existing smb sess found (status=%d)", 2553 if (IS_ERR(pSesInfo)) {
2385 pSesInfo->status)); 2554 rc = PTR_ERR(pSesInfo);
2386 /* 2555 pSesInfo = NULL;
2387 * The existing SMB session already has a reference to srvTcp, 2556 goto mount_fail_check;
2388 * so we can put back the extra one we got before
2389 */
2390 cifs_put_tcp_session(srvTcp);
2391
2392 mutex_lock(&pSesInfo->session_mutex);
2393 if (pSesInfo->need_reconnect) {
2394 cFYI(1, ("Session needs reconnect"));
2395 rc = cifs_setup_session(xid, pSesInfo,
2396 cifs_sb->local_nls);
2397 }
2398 mutex_unlock(&pSesInfo->session_mutex);
2399 } else if (!rc) {
2400 cFYI(1, ("Existing smb sess not found"));
2401 pSesInfo = sesInfoAlloc();
2402 if (pSesInfo == NULL) {
2403 rc = -ENOMEM;
2404 goto mount_fail_check;
2405 }
2406
2407 /* new SMB session uses our srvTcp ref */
2408 pSesInfo->server = srvTcp;
2409 if (srvTcp->addr.sockAddr6.sin6_family == AF_INET6)
2410 sprintf(pSesInfo->serverName, "%pI6",
2411 &srvTcp->addr.sockAddr6.sin6_addr);
2412 else
2413 sprintf(pSesInfo->serverName, "%pI4",
2414 &srvTcp->addr.sockAddr.sin_addr.s_addr);
2415
2416 write_lock(&cifs_tcp_ses_lock);
2417 list_add(&pSesInfo->smb_ses_list, &srvTcp->smb_ses_list);
2418 write_unlock(&cifs_tcp_ses_lock);
2419
2420 /* volume_info->password freed at unmount */
2421 if (volume_info->password) {
2422 pSesInfo->password = kstrdup(volume_info->password,
2423 GFP_KERNEL);
2424 if (!pSesInfo->password) {
2425 rc = -ENOMEM;
2426 goto mount_fail_check;
2427 }
2428 }
2429 if (volume_info->username)
2430 strncpy(pSesInfo->userName, volume_info->username,
2431 MAX_USERNAME_SIZE);
2432 if (volume_info->domainname) {
2433 int len = strlen(volume_info->domainname);
2434 pSesInfo->domainName = kmalloc(len + 1, GFP_KERNEL);
2435 if (pSesInfo->domainName)
2436 strcpy(pSesInfo->domainName,
2437 volume_info->domainname);
2438 }
2439 pSesInfo->linux_uid = volume_info->linux_uid;
2440 pSesInfo->overrideSecFlg = volume_info->secFlg;
2441 mutex_lock(&pSesInfo->session_mutex);
2442
2443 /* BB FIXME need to pass vol->secFlgs BB */
2444 rc = cifs_setup_session(xid, pSesInfo,
2445 cifs_sb->local_nls);
2446 mutex_unlock(&pSesInfo->session_mutex);
2447 } 2557 }
2448 2558
2449 /* search for existing tcon to this server share */ 2559 setup_cifs_sb(volume_info, cifs_sb);
2450 if (!rc) { 2560 if (pSesInfo->capabilities & CAP_LARGE_FILES)
2451 setup_cifs_sb(volume_info, cifs_sb); 2561 sb->s_maxbytes = MAX_LFS_FILESIZE;
2452 2562 else
2453 tcon = cifs_find_tcon(pSesInfo, volume_info->UNC); 2563 sb->s_maxbytes = MAX_NON_LFS;
2454 if (tcon) {
2455 cFYI(1, ("Found match on UNC path"));
2456 /* existing tcon already has a reference */
2457 cifs_put_smb_ses(pSesInfo);
2458 if (tcon->seal != volume_info->seal)
2459 cERROR(1, ("transport encryption setting "
2460 "conflicts with existing tid"));
2461 } else {
2462 tcon = tconInfoAlloc();
2463 if (tcon == NULL) {
2464 rc = -ENOMEM;
2465 goto mount_fail_check;
2466 }
2467
2468 tcon->ses = pSesInfo;
2469 if (volume_info->password) {
2470 tcon->password = kstrdup(volume_info->password,
2471 GFP_KERNEL);
2472 if (!tcon->password) {
2473 rc = -ENOMEM;
2474 goto mount_fail_check;
2475 }
2476 }
2477
2478 if ((strchr(volume_info->UNC + 3, '\\') == NULL)
2479 && (strchr(volume_info->UNC + 3, '/') == NULL)) {
2480 cERROR(1, ("Missing share name"));
2481 rc = -ENODEV;
2482 goto mount_fail_check;
2483 } else {
2484 /* BB Do we need to wrap sesSem around
2485 * this TCon call and Unix SetFS as
2486 * we do on SessSetup and reconnect? */
2487 rc = CIFSTCon(xid, pSesInfo, volume_info->UNC,
2488 tcon, cifs_sb->local_nls);
2489 cFYI(1, ("CIFS Tcon rc = %d", rc));
2490 if (volume_info->nodfs) {
2491 tcon->Flags &= ~SMB_SHARE_IS_IN_DFS;
2492 cFYI(1, ("DFS disabled (%d)",
2493 tcon->Flags));
2494 }
2495 }
2496 if (rc)
2497 goto remote_path_check;
2498 tcon->seal = volume_info->seal;
2499 write_lock(&cifs_tcp_ses_lock);
2500 list_add(&tcon->tcon_list, &pSesInfo->tcon_list);
2501 write_unlock(&cifs_tcp_ses_lock);
2502 }
2503
2504 /* we can have only one retry value for a connection
2505 to a share so for resources mounted more than once
2506 to the same server share the last value passed in
2507 for the retry flag is used */
2508 tcon->retry = volume_info->retry;
2509 tcon->nocase = volume_info->nocase;
2510 tcon->local_lease = volume_info->local_lease;
2511 }
2512 if (pSesInfo) {
2513 if (pSesInfo->capabilities & CAP_LARGE_FILES)
2514 sb->s_maxbytes = MAX_LFS_FILESIZE;
2515 else
2516 sb->s_maxbytes = MAX_NON_LFS;
2517 }
2518 2564
2519 /* BB FIXME fix time_gran to be larger for LANMAN sessions */ 2565 /* BB FIXME fix time_gran to be larger for LANMAN sessions */
2520 sb->s_time_gran = 100; 2566 sb->s_time_gran = 100;
2521 2567
2522 if (rc) 2568 /* search for existing tcon to this server share */
2569 tcon = cifs_get_tcon(pSesInfo, volume_info);
2570 if (IS_ERR(tcon)) {
2571 rc = PTR_ERR(tcon);
2572 tcon = NULL;
2523 goto remote_path_check; 2573 goto remote_path_check;
2574 }
2524 2575
2525 cifs_sb->tcon = tcon; 2576 cifs_sb->tcon = tcon;
2526 2577
@@ -2544,7 +2595,7 @@ try_mount_again:
2544 2595
2545 if ((tcon->unix_ext == 0) && (cifs_sb->rsize > (1024 * 127))) { 2596 if ((tcon->unix_ext == 0) && (cifs_sb->rsize > (1024 * 127))) {
2546 cifs_sb->rsize = 1024 * 127; 2597 cifs_sb->rsize = 1024 * 127;
2547 cFYI(DBG2, ("no very large read support, rsize now 127K")); 2598 cFYI(DBG2, "no very large read support, rsize now 127K");
2548 } 2599 }
2549 if (!(tcon->ses->capabilities & CAP_LARGE_WRITE_X)) 2600 if (!(tcon->ses->capabilities & CAP_LARGE_WRITE_X))
2550 cifs_sb->wsize = min(cifs_sb->wsize, 2601 cifs_sb->wsize = min(cifs_sb->wsize,
@@ -2593,7 +2644,7 @@ remote_path_check:
2593 goto mount_fail_check; 2644 goto mount_fail_check;
2594 } 2645 }
2595 2646
2596 cFYI(1, ("Getting referral for: %s", full_path)); 2647 cFYI(1, "Getting referral for: %s", full_path);
2597 rc = get_dfs_path(xid, pSesInfo , full_path + 1, 2648 rc = get_dfs_path(xid, pSesInfo , full_path + 1,
2598 cifs_sb->local_nls, &num_referrals, &referrals, 2649 cifs_sb->local_nls, &num_referrals, &referrals,
2599 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); 2650 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR);
@@ -2707,7 +2758,7 @@ CIFSTCon(unsigned int xid, struct cifsSesInfo *ses,
2707 by Samba (not sure whether other servers allow 2758 by Samba (not sure whether other servers allow
2708 NTLMv2 password here) */ 2759 NTLMv2 password here) */
2709#ifdef CONFIG_CIFS_WEAK_PW_HASH 2760#ifdef CONFIG_CIFS_WEAK_PW_HASH
2710 if ((extended_security & CIFSSEC_MAY_LANMAN) && 2761 if ((global_secflags & CIFSSEC_MAY_LANMAN) &&
2711 (ses->server->secType == LANMAN)) 2762 (ses->server->secType == LANMAN))
2712 calc_lanman_hash(tcon->password, ses->server->cryptKey, 2763 calc_lanman_hash(tcon->password, ses->server->cryptKey,
2713 ses->server->secMode & 2764 ses->server->secMode &
@@ -2778,13 +2829,13 @@ CIFSTCon(unsigned int xid, struct cifsSesInfo *ses,
2778 if (length == 3) { 2829 if (length == 3) {
2779 if ((bcc_ptr[0] == 'I') && (bcc_ptr[1] == 'P') && 2830 if ((bcc_ptr[0] == 'I') && (bcc_ptr[1] == 'P') &&
2780 (bcc_ptr[2] == 'C')) { 2831 (bcc_ptr[2] == 'C')) {
2781 cFYI(1, ("IPC connection")); 2832 cFYI(1, "IPC connection");
2782 tcon->ipc = 1; 2833 tcon->ipc = 1;
2783 } 2834 }
2784 } else if (length == 2) { 2835 } else if (length == 2) {
2785 if ((bcc_ptr[0] == 'A') && (bcc_ptr[1] == ':')) { 2836 if ((bcc_ptr[0] == 'A') && (bcc_ptr[1] == ':')) {
2786 /* the most common case */ 2837 /* the most common case */
2787 cFYI(1, ("disk share connection")); 2838 cFYI(1, "disk share connection");
2788 } 2839 }
2789 } 2840 }
2790 bcc_ptr += length + 1; 2841 bcc_ptr += length + 1;
@@ -2797,7 +2848,7 @@ CIFSTCon(unsigned int xid, struct cifsSesInfo *ses,
2797 bytes_left, is_unicode, 2848 bytes_left, is_unicode,
2798 nls_codepage); 2849 nls_codepage);
2799 2850
2800 cFYI(1, ("nativeFileSystem=%s", tcon->nativeFileSystem)); 2851 cFYI(1, "nativeFileSystem=%s", tcon->nativeFileSystem);
2801 2852
2802 if ((smb_buffer_response->WordCount == 3) || 2853 if ((smb_buffer_response->WordCount == 3) ||
2803 (smb_buffer_response->WordCount == 7)) 2854 (smb_buffer_response->WordCount == 7))
@@ -2805,7 +2856,7 @@ CIFSTCon(unsigned int xid, struct cifsSesInfo *ses,
2805 tcon->Flags = le16_to_cpu(pSMBr->OptionalSupport); 2856 tcon->Flags = le16_to_cpu(pSMBr->OptionalSupport);
2806 else 2857 else
2807 tcon->Flags = 0; 2858 tcon->Flags = 0;
2808 cFYI(1, ("Tcon flags: 0x%x ", tcon->Flags)); 2859 cFYI(1, "Tcon flags: 0x%x ", tcon->Flags);
2809 } else if ((rc == 0) && tcon == NULL) { 2860 } else if ((rc == 0) && tcon == NULL) {
2810 /* all we need to save for IPC$ connection */ 2861 /* all we need to save for IPC$ connection */
2811 ses->ipc_tid = smb_buffer_response->Tid; 2862 ses->ipc_tid = smb_buffer_response->Tid;
@@ -2833,57 +2884,61 @@ cifs_umount(struct super_block *sb, struct cifs_sb_info *cifs_sb)
2833 return rc; 2884 return rc;
2834} 2885}
2835 2886
2836int cifs_setup_session(unsigned int xid, struct cifsSesInfo *pSesInfo, 2887int cifs_negotiate_protocol(unsigned int xid, struct cifsSesInfo *ses)
2837 struct nls_table *nls_info)
2838{ 2888{
2839 int rc = 0; 2889 int rc = 0;
2840 int first_time = 0; 2890 struct TCP_Server_Info *server = ses->server;
2841 struct TCP_Server_Info *server = pSesInfo->server; 2891
2842 2892 /* only send once per connect */
2843 /* what if server changes its buffer size after dropping the session? */ 2893 if (server->maxBuf != 0)
2844 if (server->maxBuf == 0) /* no need to send on reconnect */ { 2894 return 0;
2845 rc = CIFSSMBNegotiate(xid, pSesInfo); 2895
2846 if (rc == -EAGAIN) { 2896 rc = CIFSSMBNegotiate(xid, ses);
2847 /* retry only once on 1st time connection */ 2897 if (rc == -EAGAIN) {
2848 rc = CIFSSMBNegotiate(xid, pSesInfo); 2898 /* retry only once on 1st time connection */
2849 if (rc == -EAGAIN) 2899 rc = CIFSSMBNegotiate(xid, ses);
2850 rc = -EHOSTDOWN; 2900 if (rc == -EAGAIN)
2851 } 2901 rc = -EHOSTDOWN;
2852 if (rc == 0) { 2902 }
2853 spin_lock(&GlobalMid_Lock); 2903 if (rc == 0) {
2854 if (server->tcpStatus != CifsExiting) 2904 spin_lock(&GlobalMid_Lock);
2855 server->tcpStatus = CifsGood; 2905 if (server->tcpStatus != CifsExiting)
2856 else 2906 server->tcpStatus = CifsGood;
2857 rc = -EHOSTDOWN; 2907 else
2858 spin_unlock(&GlobalMid_Lock); 2908 rc = -EHOSTDOWN;
2909 spin_unlock(&GlobalMid_Lock);
2859 2910
2860 }
2861 first_time = 1;
2862 } 2911 }
2863 2912
2864 if (rc) 2913 return rc;
2865 goto ss_err_exit; 2914}
2915
2916
2917int cifs_setup_session(unsigned int xid, struct cifsSesInfo *ses,
2918 struct nls_table *nls_info)
2919{
2920 int rc = 0;
2921 struct TCP_Server_Info *server = ses->server;
2866 2922
2867 pSesInfo->flags = 0; 2923 ses->flags = 0;
2868 pSesInfo->capabilities = server->capabilities; 2924 ses->capabilities = server->capabilities;
2869 if (linuxExtEnabled == 0) 2925 if (linuxExtEnabled == 0)
2870 pSesInfo->capabilities &= (~CAP_UNIX); 2926 ses->capabilities &= (~CAP_UNIX);
2871 2927
2872 cFYI(1, ("Security Mode: 0x%x Capabilities: 0x%x TimeAdjust: %d", 2928 cFYI(1, "Security Mode: 0x%x Capabilities: 0x%x TimeAdjust: %d",
2873 server->secMode, server->capabilities, server->timeAdj)); 2929 server->secMode, server->capabilities, server->timeAdj);
2874 2930
2875 rc = CIFS_SessSetup(xid, pSesInfo, first_time, nls_info); 2931 rc = CIFS_SessSetup(xid, ses, nls_info);
2876 if (rc) { 2932 if (rc) {
2877 cERROR(1, ("Send error in SessSetup = %d", rc)); 2933 cERROR(1, "Send error in SessSetup = %d", rc);
2878 } else { 2934 } else {
2879 cFYI(1, ("CIFS Session Established successfully")); 2935 cFYI(1, "CIFS Session Established successfully");
2880 spin_lock(&GlobalMid_Lock); 2936 spin_lock(&GlobalMid_Lock);
2881 pSesInfo->status = CifsGood; 2937 ses->status = CifsGood;
2882 pSesInfo->need_reconnect = false; 2938 ses->need_reconnect = false;
2883 spin_unlock(&GlobalMid_Lock); 2939 spin_unlock(&GlobalMid_Lock);
2884 } 2940 }
2885 2941
2886ss_err_exit:
2887 return rc; 2942 return rc;
2888} 2943}
2889 2944
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
index e9f7ecc2714b..391816b461ca 100644
--- a/fs/cifs/dir.c
+++ b/fs/cifs/dir.c
@@ -73,7 +73,7 @@ cifs_bp_rename_retry:
73 namelen += (1 + temp->d_name.len); 73 namelen += (1 + temp->d_name.len);
74 temp = temp->d_parent; 74 temp = temp->d_parent;
75 if (temp == NULL) { 75 if (temp == NULL) {
76 cERROR(1, ("corrupt dentry")); 76 cERROR(1, "corrupt dentry");
77 return NULL; 77 return NULL;
78 } 78 }
79 } 79 }
@@ -90,19 +90,18 @@ cifs_bp_rename_retry:
90 full_path[namelen] = dirsep; 90 full_path[namelen] = dirsep;
91 strncpy(full_path + namelen + 1, temp->d_name.name, 91 strncpy(full_path + namelen + 1, temp->d_name.name,
92 temp->d_name.len); 92 temp->d_name.len);
93 cFYI(0, ("name: %s", full_path + namelen)); 93 cFYI(0, "name: %s", full_path + namelen);
94 } 94 }
95 temp = temp->d_parent; 95 temp = temp->d_parent;
96 if (temp == NULL) { 96 if (temp == NULL) {
97 cERROR(1, ("corrupt dentry")); 97 cERROR(1, "corrupt dentry");
98 kfree(full_path); 98 kfree(full_path);
99 return NULL; 99 return NULL;
100 } 100 }
101 } 101 }
102 if (namelen != pplen + dfsplen) { 102 if (namelen != pplen + dfsplen) {
103 cERROR(1, 103 cERROR(1, "did not end path lookup where expected namelen is %d",
104 ("did not end path lookup where expected namelen is %d", 104 namelen);
105 namelen));
106 /* presumably this is only possible if racing with a rename 105 /* presumably this is only possible if racing with a rename
107 of one of the parent directories (we can not lock the dentries 106 of one of the parent directories (we can not lock the dentries
108 above us to prevent this, but retrying should be harmless) */ 107 above us to prevent this, but retrying should be harmless) */
@@ -130,6 +129,12 @@ cifs_bp_rename_retry:
130 return full_path; 129 return full_path;
131} 130}
132 131
132/*
133 * When called with struct file pointer set to NULL, there is no way we could
134 * update file->private_data, but getting it stuck on openFileList provides a
135 * way to access it from cifs_fill_filedata and thereby set file->private_data
136 * from cifs_open.
137 */
133struct cifsFileInfo * 138struct cifsFileInfo *
134cifs_new_fileinfo(struct inode *newinode, __u16 fileHandle, 139cifs_new_fileinfo(struct inode *newinode, __u16 fileHandle,
135 struct file *file, struct vfsmount *mnt, unsigned int oflags) 140 struct file *file, struct vfsmount *mnt, unsigned int oflags)
@@ -173,7 +178,7 @@ cifs_new_fileinfo(struct inode *newinode, __u16 fileHandle,
173 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) { 178 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) {
174 pCifsInode->clientCanCacheAll = true; 179 pCifsInode->clientCanCacheAll = true;
175 pCifsInode->clientCanCacheRead = true; 180 pCifsInode->clientCanCacheRead = true;
176 cFYI(1, ("Exclusive Oplock inode %p", newinode)); 181 cFYI(1, "Exclusive Oplock inode %p", newinode);
177 } else if ((oplock & 0xF) == OPLOCK_READ) 182 } else if ((oplock & 0xF) == OPLOCK_READ)
178 pCifsInode->clientCanCacheRead = true; 183 pCifsInode->clientCanCacheRead = true;
179 } 184 }
@@ -183,16 +188,17 @@ cifs_new_fileinfo(struct inode *newinode, __u16 fileHandle,
183} 188}
184 189
185int cifs_posix_open(char *full_path, struct inode **pinode, 190int cifs_posix_open(char *full_path, struct inode **pinode,
186 struct vfsmount *mnt, int mode, int oflags, 191 struct vfsmount *mnt, struct super_block *sb,
187 __u32 *poplock, __u16 *pnetfid, int xid) 192 int mode, int oflags,
193 __u32 *poplock, __u16 *pnetfid, int xid)
188{ 194{
189 int rc; 195 int rc;
190 FILE_UNIX_BASIC_INFO *presp_data; 196 FILE_UNIX_BASIC_INFO *presp_data;
191 __u32 posix_flags = 0; 197 __u32 posix_flags = 0;
192 struct cifs_sb_info *cifs_sb = CIFS_SB(mnt->mnt_sb); 198 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
193 struct cifs_fattr fattr; 199 struct cifs_fattr fattr;
194 200
195 cFYI(1, ("posix open %s", full_path)); 201 cFYI(1, "posix open %s", full_path);
196 202
197 presp_data = kzalloc(sizeof(FILE_UNIX_BASIC_INFO), GFP_KERNEL); 203 presp_data = kzalloc(sizeof(FILE_UNIX_BASIC_INFO), GFP_KERNEL);
198 if (presp_data == NULL) 204 if (presp_data == NULL)
@@ -242,7 +248,8 @@ int cifs_posix_open(char *full_path, struct inode **pinode,
242 248
243 /* get new inode and set it up */ 249 /* get new inode and set it up */
244 if (*pinode == NULL) { 250 if (*pinode == NULL) {
245 *pinode = cifs_iget(mnt->mnt_sb, &fattr); 251 cifs_fill_uniqueid(sb, &fattr);
252 *pinode = cifs_iget(sb, &fattr);
246 if (!*pinode) { 253 if (!*pinode) {
247 rc = -ENOMEM; 254 rc = -ENOMEM;
248 goto posix_open_ret; 255 goto posix_open_ret;
@@ -251,7 +258,18 @@ int cifs_posix_open(char *full_path, struct inode **pinode,
251 cifs_fattr_to_inode(*pinode, &fattr); 258 cifs_fattr_to_inode(*pinode, &fattr);
252 } 259 }
253 260
254 cifs_new_fileinfo(*pinode, *pnetfid, NULL, mnt, oflags); 261 /*
262 * cifs_fill_filedata() takes care of setting cifsFileInfo pointer to
263 * file->private_data.
264 */
265 if (mnt) {
266 struct cifsFileInfo *pfile_info;
267
268 pfile_info = cifs_new_fileinfo(*pinode, *pnetfid, NULL, mnt,
269 oflags);
270 if (pfile_info == NULL)
271 rc = -ENOMEM;
272 }
255 273
256posix_open_ret: 274posix_open_ret:
257 kfree(presp_data); 275 kfree(presp_data);
@@ -315,13 +333,14 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
315 if (nd && (nd->flags & LOOKUP_OPEN)) 333 if (nd && (nd->flags & LOOKUP_OPEN))
316 oflags = nd->intent.open.flags; 334 oflags = nd->intent.open.flags;
317 else 335 else
318 oflags = FMODE_READ; 336 oflags = FMODE_READ | SMB_O_CREAT;
319 337
320 if (tcon->unix_ext && (tcon->ses->capabilities & CAP_UNIX) && 338 if (tcon->unix_ext && (tcon->ses->capabilities & CAP_UNIX) &&
321 (CIFS_UNIX_POSIX_PATH_OPS_CAP & 339 (CIFS_UNIX_POSIX_PATH_OPS_CAP &
322 le64_to_cpu(tcon->fsUnixInfo.Capability))) { 340 le64_to_cpu(tcon->fsUnixInfo.Capability))) {
323 rc = cifs_posix_open(full_path, &newinode, nd->path.mnt, 341 rc = cifs_posix_open(full_path, &newinode,
324 mode, oflags, &oplock, &fileHandle, xid); 342 nd ? nd->path.mnt : NULL,
343 inode->i_sb, mode, oflags, &oplock, &fileHandle, xid);
325 /* EIO could indicate that (posix open) operation is not 344 /* EIO could indicate that (posix open) operation is not
326 supported, despite what server claimed in capability 345 supported, despite what server claimed in capability
327 negotation. EREMOTE indicates DFS junction, which is not 346 negotation. EREMOTE indicates DFS junction, which is not
@@ -358,7 +377,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
358 else if ((oflags & O_CREAT) == O_CREAT) 377 else if ((oflags & O_CREAT) == O_CREAT)
359 disposition = FILE_OPEN_IF; 378 disposition = FILE_OPEN_IF;
360 else 379 else
361 cFYI(1, ("Create flag not set in create function")); 380 cFYI(1, "Create flag not set in create function");
362 } 381 }
363 382
364 /* BB add processing to set equivalent of mode - e.g. via CreateX with 383 /* BB add processing to set equivalent of mode - e.g. via CreateX with
@@ -394,7 +413,7 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
394 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); 413 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR);
395 } 414 }
396 if (rc) { 415 if (rc) {
397 cFYI(1, ("cifs_create returned 0x%x", rc)); 416 cFYI(1, "cifs_create returned 0x%x", rc);
398 goto cifs_create_out; 417 goto cifs_create_out;
399 } 418 }
400 419
@@ -457,15 +476,22 @@ cifs_create_set_dentry:
457 if (rc == 0) 476 if (rc == 0)
458 setup_cifs_dentry(tcon, direntry, newinode); 477 setup_cifs_dentry(tcon, direntry, newinode);
459 else 478 else
460 cFYI(1, ("Create worked, get_inode_info failed rc = %d", rc)); 479 cFYI(1, "Create worked, get_inode_info failed rc = %d", rc);
461 480
462 /* nfsd case - nfs srv does not set nd */ 481 /* nfsd case - nfs srv does not set nd */
463 if ((nd == NULL) || (!(nd->flags & LOOKUP_OPEN))) { 482 if ((nd == NULL) || (!(nd->flags & LOOKUP_OPEN))) {
464 /* mknod case - do not leave file open */ 483 /* mknod case - do not leave file open */
465 CIFSSMBClose(xid, tcon, fileHandle); 484 CIFSSMBClose(xid, tcon, fileHandle);
466 } else if (!(posix_create) && (newinode)) { 485 } else if (!(posix_create) && (newinode)) {
467 cifs_new_fileinfo(newinode, fileHandle, NULL, 486 struct cifsFileInfo *pfile_info;
468 nd->path.mnt, oflags); 487 /*
488 * cifs_fill_filedata() takes care of setting cifsFileInfo
489 * pointer to file->private_data.
490 */
491 pfile_info = cifs_new_fileinfo(newinode, fileHandle, NULL,
492 nd->path.mnt, oflags);
493 if (pfile_info == NULL)
494 rc = -ENOMEM;
469 } 495 }
470cifs_create_out: 496cifs_create_out:
471 kfree(buf); 497 kfree(buf);
@@ -531,7 +557,7 @@ int cifs_mknod(struct inode *inode, struct dentry *direntry, int mode,
531 u16 fileHandle; 557 u16 fileHandle;
532 FILE_ALL_INFO *buf; 558 FILE_ALL_INFO *buf;
533 559
534 cFYI(1, ("sfu compat create special file")); 560 cFYI(1, "sfu compat create special file");
535 561
536 buf = kmalloc(sizeof(FILE_ALL_INFO), GFP_KERNEL); 562 buf = kmalloc(sizeof(FILE_ALL_INFO), GFP_KERNEL);
537 if (buf == NULL) { 563 if (buf == NULL) {
@@ -616,8 +642,8 @@ cifs_lookup(struct inode *parent_dir_inode, struct dentry *direntry,
616 642
617 xid = GetXid(); 643 xid = GetXid();
618 644
619 cFYI(1, ("parent inode = 0x%p name is: %s and dentry = 0x%p", 645 cFYI(1, "parent inode = 0x%p name is: %s and dentry = 0x%p",
620 parent_dir_inode, direntry->d_name.name, direntry)); 646 parent_dir_inode, direntry->d_name.name, direntry);
621 647
622 /* check whether path exists */ 648 /* check whether path exists */
623 649
@@ -632,7 +658,7 @@ cifs_lookup(struct inode *parent_dir_inode, struct dentry *direntry,
632 int i; 658 int i;
633 for (i = 0; i < direntry->d_name.len; i++) 659 for (i = 0; i < direntry->d_name.len; i++)
634 if (direntry->d_name.name[i] == '\\') { 660 if (direntry->d_name.name[i] == '\\') {
635 cFYI(1, ("Invalid file name")); 661 cFYI(1, "Invalid file name");
636 FreeXid(xid); 662 FreeXid(xid);
637 return ERR_PTR(-EINVAL); 663 return ERR_PTR(-EINVAL);
638 } 664 }
@@ -657,11 +683,11 @@ cifs_lookup(struct inode *parent_dir_inode, struct dentry *direntry,
657 } 683 }
658 684
659 if (direntry->d_inode != NULL) { 685 if (direntry->d_inode != NULL) {
660 cFYI(1, ("non-NULL inode in lookup")); 686 cFYI(1, "non-NULL inode in lookup");
661 } else { 687 } else {
662 cFYI(1, ("NULL inode in lookup")); 688 cFYI(1, "NULL inode in lookup");
663 } 689 }
664 cFYI(1, ("Full path: %s inode = 0x%p", full_path, direntry->d_inode)); 690 cFYI(1, "Full path: %s inode = 0x%p", full_path, direntry->d_inode);
665 691
666 /* Posix open is only called (at lookup time) for file create now. 692 /* Posix open is only called (at lookup time) for file create now.
667 * For opens (rather than creates), because we do not know if it 693 * For opens (rather than creates), because we do not know if it
@@ -678,6 +704,7 @@ cifs_lookup(struct inode *parent_dir_inode, struct dentry *direntry,
678 (nd->flags & LOOKUP_OPEN) && !pTcon->broken_posix_open && 704 (nd->flags & LOOKUP_OPEN) && !pTcon->broken_posix_open &&
679 (nd->intent.open.flags & O_CREAT)) { 705 (nd->intent.open.flags & O_CREAT)) {
680 rc = cifs_posix_open(full_path, &newInode, nd->path.mnt, 706 rc = cifs_posix_open(full_path, &newInode, nd->path.mnt,
707 parent_dir_inode->i_sb,
681 nd->intent.open.create_mode, 708 nd->intent.open.create_mode,
682 nd->intent.open.flags, &oplock, 709 nd->intent.open.flags, &oplock,
683 &fileHandle, xid); 710 &fileHandle, xid);
@@ -723,7 +750,7 @@ cifs_lookup(struct inode *parent_dir_inode, struct dentry *direntry,
723 /* if it was once a directory (but how can we tell?) we could do 750 /* if it was once a directory (but how can we tell?) we could do
724 shrink_dcache_parent(direntry); */ 751 shrink_dcache_parent(direntry); */
725 } else if (rc != -EACCES) { 752 } else if (rc != -EACCES) {
726 cERROR(1, ("Unexpected lookup error %d", rc)); 753 cERROR(1, "Unexpected lookup error %d", rc);
727 /* We special case check for Access Denied - since that 754 /* We special case check for Access Denied - since that
728 is a common return code */ 755 is a common return code */
729 } 756 }
@@ -742,8 +769,8 @@ cifs_d_revalidate(struct dentry *direntry, struct nameidata *nd)
742 if (cifs_revalidate_dentry(direntry)) 769 if (cifs_revalidate_dentry(direntry))
743 return 0; 770 return 0;
744 } else { 771 } else {
745 cFYI(1, ("neg dentry 0x%p name = %s", 772 cFYI(1, "neg dentry 0x%p name = %s",
746 direntry, direntry->d_name.name)); 773 direntry, direntry->d_name.name);
747 if (time_after(jiffies, direntry->d_time + HZ) || 774 if (time_after(jiffies, direntry->d_time + HZ) ||
748 !lookupCacheEnabled) { 775 !lookupCacheEnabled) {
749 d_drop(direntry); 776 d_drop(direntry);
@@ -758,7 +785,7 @@ cifs_d_revalidate(struct dentry *direntry, struct nameidata *nd)
758{ 785{
759 int rc = 0; 786 int rc = 0;
760 787
761 cFYI(1, ("In cifs d_delete, name = %s", direntry->d_name.name)); 788 cFYI(1, "In cifs d_delete, name = %s", direntry->d_name.name);
762 789
763 return rc; 790 return rc;
764} */ 791} */
diff --git a/fs/cifs/dns_resolve.c b/fs/cifs/dns_resolve.c
index 6f8a0e3fb25b..4db2c5e7283f 100644
--- a/fs/cifs/dns_resolve.c
+++ b/fs/cifs/dns_resolve.c
@@ -106,14 +106,14 @@ dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
106 /* search for server name delimiter */ 106 /* search for server name delimiter */
107 len = strlen(unc); 107 len = strlen(unc);
108 if (len < 3) { 108 if (len < 3) {
109 cFYI(1, ("%s: unc is too short: %s", __func__, unc)); 109 cFYI(1, "%s: unc is too short: %s", __func__, unc);
110 return -EINVAL; 110 return -EINVAL;
111 } 111 }
112 len -= 2; 112 len -= 2;
113 name = memchr(unc+2, '\\', len); 113 name = memchr(unc+2, '\\', len);
114 if (!name) { 114 if (!name) {
115 cFYI(1, ("%s: probably server name is whole unc: %s", 115 cFYI(1, "%s: probably server name is whole unc: %s",
116 __func__, unc)); 116 __func__, unc);
117 } else { 117 } else {
118 len = (name - unc) - 2/* leading // */; 118 len = (name - unc) - 2/* leading // */;
119 } 119 }
@@ -127,8 +127,8 @@ dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
127 name[len] = 0; 127 name[len] = 0;
128 128
129 if (is_ip(name)) { 129 if (is_ip(name)) {
130 cFYI(1, ("%s: it is IP, skipping dns upcall: %s", 130 cFYI(1, "%s: it is IP, skipping dns upcall: %s",
131 __func__, name)); 131 __func__, name);
132 data = name; 132 data = name;
133 goto skip_upcall; 133 goto skip_upcall;
134 } 134 }
@@ -138,7 +138,7 @@ dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
138 len = rkey->type_data.x[0]; 138 len = rkey->type_data.x[0];
139 data = rkey->payload.data; 139 data = rkey->payload.data;
140 } else { 140 } else {
141 cERROR(1, ("%s: unable to resolve: %s", __func__, name)); 141 cERROR(1, "%s: unable to resolve: %s", __func__, name);
142 goto out; 142 goto out;
143 } 143 }
144 144
@@ -148,10 +148,10 @@ skip_upcall:
148 if (*ip_addr) { 148 if (*ip_addr) {
149 memcpy(*ip_addr, data, len + 1); 149 memcpy(*ip_addr, data, len + 1);
150 if (!IS_ERR(rkey)) 150 if (!IS_ERR(rkey))
151 cFYI(1, ("%s: resolved: %s to %s", __func__, 151 cFYI(1, "%s: resolved: %s to %s", __func__,
152 name, 152 name,
153 *ip_addr 153 *ip_addr
154 )); 154 );
155 rc = 0; 155 rc = 0;
156 } else { 156 } else {
157 rc = -ENOMEM; 157 rc = -ENOMEM;
diff --git a/fs/cifs/export.c b/fs/cifs/export.c
index 6177f7cca16a..993f82045bf6 100644
--- a/fs/cifs/export.c
+++ b/fs/cifs/export.c
@@ -49,7 +49,7 @@
49static struct dentry *cifs_get_parent(struct dentry *dentry) 49static struct dentry *cifs_get_parent(struct dentry *dentry)
50{ 50{
51 /* BB need to add code here eventually to enable export via NFSD */ 51 /* BB need to add code here eventually to enable export via NFSD */
52 cFYI(1, ("get parent for %p", dentry)); 52 cFYI(1, "get parent for %p", dentry);
53 return ERR_PTR(-EACCES); 53 return ERR_PTR(-EACCES);
54} 54}
55 55
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index 9b11a8f56f3a..a83541ec9713 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * vfs operations that deal with files 4 * vfs operations that deal with files
5 * 5 *
6 * Copyright (C) International Business Machines Corp., 2002,2007 6 * Copyright (C) International Business Machines Corp., 2002,2010
7 * Author(s): Steve French (sfrench@us.ibm.com) 7 * Author(s): Steve French (sfrench@us.ibm.com)
8 * Jeremy Allison (jra@samba.org) 8 * Jeremy Allison (jra@samba.org)
9 * 9 *
@@ -108,8 +108,7 @@ static inline int cifs_get_disposition(unsigned int flags)
108/* all arguments to this function must be checked for validity in caller */ 108/* all arguments to this function must be checked for validity in caller */
109static inline int 109static inline int
110cifs_posix_open_inode_helper(struct inode *inode, struct file *file, 110cifs_posix_open_inode_helper(struct inode *inode, struct file *file,
111 struct cifsInodeInfo *pCifsInode, 111 struct cifsInodeInfo *pCifsInode, __u32 oplock,
112 struct cifsFileInfo *pCifsFile, __u32 oplock,
113 u16 netfid) 112 u16 netfid)
114{ 113{
115 114
@@ -136,15 +135,15 @@ cifs_posix_open_inode_helper(struct inode *inode, struct file *file,
136 if (timespec_equal(&file->f_path.dentry->d_inode->i_mtime, &temp) && 135 if (timespec_equal(&file->f_path.dentry->d_inode->i_mtime, &temp) &&
137 (file->f_path.dentry->d_inode->i_size == 136 (file->f_path.dentry->d_inode->i_size ==
138 (loff_t)le64_to_cpu(buf->EndOfFile))) { 137 (loff_t)le64_to_cpu(buf->EndOfFile))) {
139 cFYI(1, ("inode unchanged on server")); 138 cFYI(1, "inode unchanged on server");
140 } else { 139 } else {
141 if (file->f_path.dentry->d_inode->i_mapping) { 140 if (file->f_path.dentry->d_inode->i_mapping) {
142 rc = filemap_write_and_wait(file->f_path.dentry->d_inode->i_mapping); 141 rc = filemap_write_and_wait(file->f_path.dentry->d_inode->i_mapping);
143 if (rc != 0) 142 if (rc != 0)
144 CIFS_I(file->f_path.dentry->d_inode)->write_behind_rc = rc; 143 CIFS_I(file->f_path.dentry->d_inode)->write_behind_rc = rc;
145 } 144 }
146 cFYI(1, ("invalidating remote inode since open detected it " 145 cFYI(1, "invalidating remote inode since open detected it "
147 "changed")); 146 "changed");
148 invalidate_remote_inode(file->f_path.dentry->d_inode); 147 invalidate_remote_inode(file->f_path.dentry->d_inode);
149 } */ 148 } */
150 149
@@ -152,8 +151,8 @@ psx_client_can_cache:
152 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) { 151 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) {
153 pCifsInode->clientCanCacheAll = true; 152 pCifsInode->clientCanCacheAll = true;
154 pCifsInode->clientCanCacheRead = true; 153 pCifsInode->clientCanCacheRead = true;
155 cFYI(1, ("Exclusive Oplock granted on inode %p", 154 cFYI(1, "Exclusive Oplock granted on inode %p",
156 file->f_path.dentry->d_inode)); 155 file->f_path.dentry->d_inode);
157 } else if ((oplock & 0xF) == OPLOCK_READ) 156 } else if ((oplock & 0xF) == OPLOCK_READ)
158 pCifsInode->clientCanCacheRead = true; 157 pCifsInode->clientCanCacheRead = true;
159 158
@@ -190,8 +189,8 @@ cifs_fill_filedata(struct file *file)
190 if (file->private_data != NULL) { 189 if (file->private_data != NULL) {
191 return pCifsFile; 190 return pCifsFile;
192 } else if ((file->f_flags & O_CREAT) && (file->f_flags & O_EXCL)) 191 } else if ((file->f_flags & O_CREAT) && (file->f_flags & O_EXCL))
193 cERROR(1, ("could not find file instance for " 192 cERROR(1, "could not find file instance for "
194 "new file %p", file)); 193 "new file %p", file);
195 return NULL; 194 return NULL;
196} 195}
197 196
@@ -217,7 +216,7 @@ static inline int cifs_open_inode_helper(struct inode *inode, struct file *file,
217 if (timespec_equal(&file->f_path.dentry->d_inode->i_mtime, &temp) && 216 if (timespec_equal(&file->f_path.dentry->d_inode->i_mtime, &temp) &&
218 (file->f_path.dentry->d_inode->i_size == 217 (file->f_path.dentry->d_inode->i_size ==
219 (loff_t)le64_to_cpu(buf->EndOfFile))) { 218 (loff_t)le64_to_cpu(buf->EndOfFile))) {
220 cFYI(1, ("inode unchanged on server")); 219 cFYI(1, "inode unchanged on server");
221 } else { 220 } else {
222 if (file->f_path.dentry->d_inode->i_mapping) { 221 if (file->f_path.dentry->d_inode->i_mapping) {
223 /* BB no need to lock inode until after invalidate 222 /* BB no need to lock inode until after invalidate
@@ -226,8 +225,8 @@ static inline int cifs_open_inode_helper(struct inode *inode, struct file *file,
226 if (rc != 0) 225 if (rc != 0)
227 CIFS_I(file->f_path.dentry->d_inode)->write_behind_rc = rc; 226 CIFS_I(file->f_path.dentry->d_inode)->write_behind_rc = rc;
228 } 227 }
229 cFYI(1, ("invalidating remote inode since open detected it " 228 cFYI(1, "invalidating remote inode since open detected it "
230 "changed")); 229 "changed");
231 invalidate_remote_inode(file->f_path.dentry->d_inode); 230 invalidate_remote_inode(file->f_path.dentry->d_inode);
232 } 231 }
233 232
@@ -242,8 +241,8 @@ client_can_cache:
242 if ((*oplock & 0xF) == OPLOCK_EXCLUSIVE) { 241 if ((*oplock & 0xF) == OPLOCK_EXCLUSIVE) {
243 pCifsInode->clientCanCacheAll = true; 242 pCifsInode->clientCanCacheAll = true;
244 pCifsInode->clientCanCacheRead = true; 243 pCifsInode->clientCanCacheRead = true;
245 cFYI(1, ("Exclusive Oplock granted on inode %p", 244 cFYI(1, "Exclusive Oplock granted on inode %p",
246 file->f_path.dentry->d_inode)); 245 file->f_path.dentry->d_inode);
247 } else if ((*oplock & 0xF) == OPLOCK_READ) 246 } else if ((*oplock & 0xF) == OPLOCK_READ)
248 pCifsInode->clientCanCacheRead = true; 247 pCifsInode->clientCanCacheRead = true;
249 248
@@ -285,8 +284,8 @@ int cifs_open(struct inode *inode, struct file *file)
285 return rc; 284 return rc;
286 } 285 }
287 286
288 cFYI(1, ("inode = 0x%p file flags are 0x%x for %s", 287 cFYI(1, "inode = 0x%p file flags are 0x%x for %s",
289 inode, file->f_flags, full_path)); 288 inode, file->f_flags, full_path);
290 289
291 if (oplockEnabled) 290 if (oplockEnabled)
292 oplock = REQ_OPLOCK; 291 oplock = REQ_OPLOCK;
@@ -298,27 +297,29 @@ int cifs_open(struct inode *inode, struct file *file)
298 (CIFS_UNIX_POSIX_PATH_OPS_CAP & 297 (CIFS_UNIX_POSIX_PATH_OPS_CAP &
299 le64_to_cpu(tcon->fsUnixInfo.Capability))) { 298 le64_to_cpu(tcon->fsUnixInfo.Capability))) {
300 int oflags = (int) cifs_posix_convert_flags(file->f_flags); 299 int oflags = (int) cifs_posix_convert_flags(file->f_flags);
300 oflags |= SMB_O_CREAT;
301 /* can not refresh inode info since size could be stale */ 301 /* can not refresh inode info since size could be stale */
302 rc = cifs_posix_open(full_path, &inode, file->f_path.mnt, 302 rc = cifs_posix_open(full_path, &inode, file->f_path.mnt,
303 cifs_sb->mnt_file_mode /* ignored */, 303 inode->i_sb,
304 oflags, &oplock, &netfid, xid); 304 cifs_sb->mnt_file_mode /* ignored */,
305 oflags, &oplock, &netfid, xid);
305 if (rc == 0) { 306 if (rc == 0) {
306 cFYI(1, ("posix open succeeded")); 307 cFYI(1, "posix open succeeded");
307 /* no need for special case handling of setting mode 308 /* no need for special case handling of setting mode
308 on read only files needed here */ 309 on read only files needed here */
309 310
310 pCifsFile = cifs_fill_filedata(file); 311 pCifsFile = cifs_fill_filedata(file);
311 cifs_posix_open_inode_helper(inode, file, pCifsInode, 312 cifs_posix_open_inode_helper(inode, file, pCifsInode,
312 pCifsFile, oplock, netfid); 313 oplock, netfid);
313 goto out; 314 goto out;
314 } else if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) { 315 } else if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
315 if (tcon->ses->serverNOS) 316 if (tcon->ses->serverNOS)
316 cERROR(1, ("server %s of type %s returned" 317 cERROR(1, "server %s of type %s returned"
317 " unexpected error on SMB posix open" 318 " unexpected error on SMB posix open"
318 ", disabling posix open support." 319 ", disabling posix open support."
319 " Check if server update available.", 320 " Check if server update available.",
320 tcon->ses->serverName, 321 tcon->ses->serverName,
321 tcon->ses->serverNOS)); 322 tcon->ses->serverNOS);
322 tcon->broken_posix_open = true; 323 tcon->broken_posix_open = true;
323 } else if ((rc != -EIO) && (rc != -EREMOTE) && 324 } else if ((rc != -EIO) && (rc != -EREMOTE) &&
324 (rc != -EOPNOTSUPP)) /* path not found or net err */ 325 (rc != -EOPNOTSUPP)) /* path not found or net err */
@@ -386,7 +387,7 @@ int cifs_open(struct inode *inode, struct file *file)
386 & CIFS_MOUNT_MAP_SPECIAL_CHR); 387 & CIFS_MOUNT_MAP_SPECIAL_CHR);
387 } 388 }
388 if (rc) { 389 if (rc) {
389 cFYI(1, ("cifs_open returned 0x%x", rc)); 390 cFYI(1, "cifs_open returned 0x%x", rc);
390 goto out; 391 goto out;
391 } 392 }
392 393
@@ -469,7 +470,7 @@ static int cifs_reopen_file(struct file *file, bool can_flush)
469 } 470 }
470 471
471 if (file->f_path.dentry == NULL) { 472 if (file->f_path.dentry == NULL) {
472 cERROR(1, ("no valid name if dentry freed")); 473 cERROR(1, "no valid name if dentry freed");
473 dump_stack(); 474 dump_stack();
474 rc = -EBADF; 475 rc = -EBADF;
475 goto reopen_error_exit; 476 goto reopen_error_exit;
@@ -477,7 +478,7 @@ static int cifs_reopen_file(struct file *file, bool can_flush)
477 478
478 inode = file->f_path.dentry->d_inode; 479 inode = file->f_path.dentry->d_inode;
479 if (inode == NULL) { 480 if (inode == NULL) {
480 cERROR(1, ("inode not valid")); 481 cERROR(1, "inode not valid");
481 dump_stack(); 482 dump_stack();
482 rc = -EBADF; 483 rc = -EBADF;
483 goto reopen_error_exit; 484 goto reopen_error_exit;
@@ -499,8 +500,8 @@ reopen_error_exit:
499 return rc; 500 return rc;
500 } 501 }
501 502
502 cFYI(1, ("inode = 0x%p file flags 0x%x for %s", 503 cFYI(1, "inode = 0x%p file flags 0x%x for %s",
503 inode, file->f_flags, full_path)); 504 inode, file->f_flags, full_path);
504 505
505 if (oplockEnabled) 506 if (oplockEnabled)
506 oplock = REQ_OPLOCK; 507 oplock = REQ_OPLOCK;
@@ -513,10 +514,11 @@ reopen_error_exit:
513 int oflags = (int) cifs_posix_convert_flags(file->f_flags); 514 int oflags = (int) cifs_posix_convert_flags(file->f_flags);
514 /* can not refresh inode info since size could be stale */ 515 /* can not refresh inode info since size could be stale */
515 rc = cifs_posix_open(full_path, NULL, file->f_path.mnt, 516 rc = cifs_posix_open(full_path, NULL, file->f_path.mnt,
516 cifs_sb->mnt_file_mode /* ignored */, 517 inode->i_sb,
517 oflags, &oplock, &netfid, xid); 518 cifs_sb->mnt_file_mode /* ignored */,
519 oflags, &oplock, &netfid, xid);
518 if (rc == 0) { 520 if (rc == 0) {
519 cFYI(1, ("posix reopen succeeded")); 521 cFYI(1, "posix reopen succeeded");
520 goto reopen_success; 522 goto reopen_success;
521 } 523 }
522 /* fallthrough to retry open the old way on errors, especially 524 /* fallthrough to retry open the old way on errors, especially
@@ -537,8 +539,8 @@ reopen_error_exit:
537 CIFS_MOUNT_MAP_SPECIAL_CHR); 539 CIFS_MOUNT_MAP_SPECIAL_CHR);
538 if (rc) { 540 if (rc) {
539 mutex_unlock(&pCifsFile->fh_mutex); 541 mutex_unlock(&pCifsFile->fh_mutex);
540 cFYI(1, ("cifs_open returned 0x%x", rc)); 542 cFYI(1, "cifs_open returned 0x%x", rc);
541 cFYI(1, ("oplock: %d", oplock)); 543 cFYI(1, "oplock: %d", oplock);
542 } else { 544 } else {
543reopen_success: 545reopen_success:
544 pCifsFile->netfid = netfid; 546 pCifsFile->netfid = netfid;
@@ -570,8 +572,8 @@ reopen_success:
570 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) { 572 if ((oplock & 0xF) == OPLOCK_EXCLUSIVE) {
571 pCifsInode->clientCanCacheAll = true; 573 pCifsInode->clientCanCacheAll = true;
572 pCifsInode->clientCanCacheRead = true; 574 pCifsInode->clientCanCacheRead = true;
573 cFYI(1, ("Exclusive Oplock granted on inode %p", 575 cFYI(1, "Exclusive Oplock granted on inode %p",
574 file->f_path.dentry->d_inode)); 576 file->f_path.dentry->d_inode);
575 } else if ((oplock & 0xF) == OPLOCK_READ) { 577 } else if ((oplock & 0xF) == OPLOCK_READ) {
576 pCifsInode->clientCanCacheRead = true; 578 pCifsInode->clientCanCacheRead = true;
577 pCifsInode->clientCanCacheAll = false; 579 pCifsInode->clientCanCacheAll = false;
@@ -619,8 +621,7 @@ int cifs_close(struct inode *inode, struct file *file)
619 the struct would be in each open file, 621 the struct would be in each open file,
620 but this should give enough time to 622 but this should give enough time to
621 clear the socket */ 623 clear the socket */
622 cFYI(DBG2, 624 cFYI(DBG2, "close delay, write pending");
623 ("close delay, write pending"));
624 msleep(timeout); 625 msleep(timeout);
625 timeout *= 4; 626 timeout *= 4;
626 } 627 }
@@ -653,7 +654,7 @@ int cifs_close(struct inode *inode, struct file *file)
653 654
654 read_lock(&GlobalSMBSeslock); 655 read_lock(&GlobalSMBSeslock);
655 if (list_empty(&(CIFS_I(inode)->openFileList))) { 656 if (list_empty(&(CIFS_I(inode)->openFileList))) {
656 cFYI(1, ("closing last open instance for inode %p", inode)); 657 cFYI(1, "closing last open instance for inode %p", inode);
657 /* if the file is not open we do not know if we can cache info 658 /* if the file is not open we do not know if we can cache info
658 on this inode, much less write behind and read ahead */ 659 on this inode, much less write behind and read ahead */
659 CIFS_I(inode)->clientCanCacheRead = false; 660 CIFS_I(inode)->clientCanCacheRead = false;
@@ -674,7 +675,7 @@ int cifs_closedir(struct inode *inode, struct file *file)
674 (struct cifsFileInfo *)file->private_data; 675 (struct cifsFileInfo *)file->private_data;
675 char *ptmp; 676 char *ptmp;
676 677
677 cFYI(1, ("Closedir inode = 0x%p", inode)); 678 cFYI(1, "Closedir inode = 0x%p", inode);
678 679
679 xid = GetXid(); 680 xid = GetXid();
680 681
@@ -685,22 +686,22 @@ int cifs_closedir(struct inode *inode, struct file *file)
685 686
686 pTcon = cifs_sb->tcon; 687 pTcon = cifs_sb->tcon;
687 688
688 cFYI(1, ("Freeing private data in close dir")); 689 cFYI(1, "Freeing private data in close dir");
689 write_lock(&GlobalSMBSeslock); 690 write_lock(&GlobalSMBSeslock);
690 if (!pCFileStruct->srch_inf.endOfSearch && 691 if (!pCFileStruct->srch_inf.endOfSearch &&
691 !pCFileStruct->invalidHandle) { 692 !pCFileStruct->invalidHandle) {
692 pCFileStruct->invalidHandle = true; 693 pCFileStruct->invalidHandle = true;
693 write_unlock(&GlobalSMBSeslock); 694 write_unlock(&GlobalSMBSeslock);
694 rc = CIFSFindClose(xid, pTcon, pCFileStruct->netfid); 695 rc = CIFSFindClose(xid, pTcon, pCFileStruct->netfid);
695 cFYI(1, ("Closing uncompleted readdir with rc %d", 696 cFYI(1, "Closing uncompleted readdir with rc %d",
696 rc)); 697 rc);
697 /* not much we can do if it fails anyway, ignore rc */ 698 /* not much we can do if it fails anyway, ignore rc */
698 rc = 0; 699 rc = 0;
699 } else 700 } else
700 write_unlock(&GlobalSMBSeslock); 701 write_unlock(&GlobalSMBSeslock);
701 ptmp = pCFileStruct->srch_inf.ntwrk_buf_start; 702 ptmp = pCFileStruct->srch_inf.ntwrk_buf_start;
702 if (ptmp) { 703 if (ptmp) {
703 cFYI(1, ("closedir free smb buf in srch struct")); 704 cFYI(1, "closedir free smb buf in srch struct");
704 pCFileStruct->srch_inf.ntwrk_buf_start = NULL; 705 pCFileStruct->srch_inf.ntwrk_buf_start = NULL;
705 if (pCFileStruct->srch_inf.smallBuf) 706 if (pCFileStruct->srch_inf.smallBuf)
706 cifs_small_buf_release(ptmp); 707 cifs_small_buf_release(ptmp);
@@ -748,49 +749,49 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
748 rc = -EACCES; 749 rc = -EACCES;
749 xid = GetXid(); 750 xid = GetXid();
750 751
751 cFYI(1, ("Lock parm: 0x%x flockflags: " 752 cFYI(1, "Lock parm: 0x%x flockflags: "
752 "0x%x flocktype: 0x%x start: %lld end: %lld", 753 "0x%x flocktype: 0x%x start: %lld end: %lld",
753 cmd, pfLock->fl_flags, pfLock->fl_type, pfLock->fl_start, 754 cmd, pfLock->fl_flags, pfLock->fl_type, pfLock->fl_start,
754 pfLock->fl_end)); 755 pfLock->fl_end);
755 756
756 if (pfLock->fl_flags & FL_POSIX) 757 if (pfLock->fl_flags & FL_POSIX)
757 cFYI(1, ("Posix")); 758 cFYI(1, "Posix");
758 if (pfLock->fl_flags & FL_FLOCK) 759 if (pfLock->fl_flags & FL_FLOCK)
759 cFYI(1, ("Flock")); 760 cFYI(1, "Flock");
760 if (pfLock->fl_flags & FL_SLEEP) { 761 if (pfLock->fl_flags & FL_SLEEP) {
761 cFYI(1, ("Blocking lock")); 762 cFYI(1, "Blocking lock");
762 wait_flag = true; 763 wait_flag = true;
763 } 764 }
764 if (pfLock->fl_flags & FL_ACCESS) 765 if (pfLock->fl_flags & FL_ACCESS)
765 cFYI(1, ("Process suspended by mandatory locking - " 766 cFYI(1, "Process suspended by mandatory locking - "
766 "not implemented yet")); 767 "not implemented yet");
767 if (pfLock->fl_flags & FL_LEASE) 768 if (pfLock->fl_flags & FL_LEASE)
768 cFYI(1, ("Lease on file - not implemented yet")); 769 cFYI(1, "Lease on file - not implemented yet");
769 if (pfLock->fl_flags & 770 if (pfLock->fl_flags &
770 (~(FL_POSIX | FL_FLOCK | FL_SLEEP | FL_ACCESS | FL_LEASE))) 771 (~(FL_POSIX | FL_FLOCK | FL_SLEEP | FL_ACCESS | FL_LEASE)))
771 cFYI(1, ("Unknown lock flags 0x%x", pfLock->fl_flags)); 772 cFYI(1, "Unknown lock flags 0x%x", pfLock->fl_flags);
772 773
773 if (pfLock->fl_type == F_WRLCK) { 774 if (pfLock->fl_type == F_WRLCK) {
774 cFYI(1, ("F_WRLCK ")); 775 cFYI(1, "F_WRLCK ");
775 numLock = 1; 776 numLock = 1;
776 } else if (pfLock->fl_type == F_UNLCK) { 777 } else if (pfLock->fl_type == F_UNLCK) {
777 cFYI(1, ("F_UNLCK")); 778 cFYI(1, "F_UNLCK");
778 numUnlock = 1; 779 numUnlock = 1;
779 /* Check if unlock includes more than 780 /* Check if unlock includes more than
780 one lock range */ 781 one lock range */
781 } else if (pfLock->fl_type == F_RDLCK) { 782 } else if (pfLock->fl_type == F_RDLCK) {
782 cFYI(1, ("F_RDLCK")); 783 cFYI(1, "F_RDLCK");
783 lockType |= LOCKING_ANDX_SHARED_LOCK; 784 lockType |= LOCKING_ANDX_SHARED_LOCK;
784 numLock = 1; 785 numLock = 1;
785 } else if (pfLock->fl_type == F_EXLCK) { 786 } else if (pfLock->fl_type == F_EXLCK) {
786 cFYI(1, ("F_EXLCK")); 787 cFYI(1, "F_EXLCK");
787 numLock = 1; 788 numLock = 1;
788 } else if (pfLock->fl_type == F_SHLCK) { 789 } else if (pfLock->fl_type == F_SHLCK) {
789 cFYI(1, ("F_SHLCK")); 790 cFYI(1, "F_SHLCK");
790 lockType |= LOCKING_ANDX_SHARED_LOCK; 791 lockType |= LOCKING_ANDX_SHARED_LOCK;
791 numLock = 1; 792 numLock = 1;
792 } else 793 } else
793 cFYI(1, ("Unknown type of lock")); 794 cFYI(1, "Unknown type of lock");
794 795
795 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb); 796 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb);
796 tcon = cifs_sb->tcon; 797 tcon = cifs_sb->tcon;
@@ -833,8 +834,8 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
833 0 /* wait flag */ ); 834 0 /* wait flag */ );
834 pfLock->fl_type = F_UNLCK; 835 pfLock->fl_type = F_UNLCK;
835 if (rc != 0) 836 if (rc != 0)
836 cERROR(1, ("Error unlocking previously locked " 837 cERROR(1, "Error unlocking previously locked "
837 "range %d during test of lock", rc)); 838 "range %d during test of lock", rc);
838 rc = 0; 839 rc = 0;
839 840
840 } else { 841 } else {
@@ -856,9 +857,9 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
856 0 /* wait flag */); 857 0 /* wait flag */);
857 pfLock->fl_type = F_RDLCK; 858 pfLock->fl_type = F_RDLCK;
858 if (rc != 0) 859 if (rc != 0)
859 cERROR(1, ("Error unlocking " 860 cERROR(1, "Error unlocking "
860 "previously locked range %d " 861 "previously locked range %d "
861 "during test of lock", rc)); 862 "during test of lock", rc);
862 rc = 0; 863 rc = 0;
863 } else { 864 } else {
864 pfLock->fl_type = F_WRLCK; 865 pfLock->fl_type = F_WRLCK;
@@ -923,9 +924,10 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
923 1, 0, li->type, false); 924 1, 0, li->type, false);
924 if (stored_rc) 925 if (stored_rc)
925 rc = stored_rc; 926 rc = stored_rc;
926 927 else {
927 list_del(&li->llist); 928 list_del(&li->llist);
928 kfree(li); 929 kfree(li);
930 }
929 } 931 }
930 } 932 }
931 mutex_unlock(&fid->lock_mutex); 933 mutex_unlock(&fid->lock_mutex);
@@ -988,9 +990,8 @@ ssize_t cifs_user_write(struct file *file, const char __user *write_data,
988 990
989 pTcon = cifs_sb->tcon; 991 pTcon = cifs_sb->tcon;
990 992
991 /* cFYI(1, 993 /* cFYI(1, " write %d bytes to offset %lld of %s", write_size,
992 (" write %d bytes to offset %lld of %s", write_size, 994 *poffset, file->f_path.dentry->d_name.name); */
993 *poffset, file->f_path.dentry->d_name.name)); */
994 995
995 if (file->private_data == NULL) 996 if (file->private_data == NULL)
996 return -EBADF; 997 return -EBADF;
@@ -1091,8 +1092,8 @@ static ssize_t cifs_write(struct file *file, const char *write_data,
1091 1092
1092 pTcon = cifs_sb->tcon; 1093 pTcon = cifs_sb->tcon;
1093 1094
1094 cFYI(1, ("write %zd bytes to offset %lld of %s", write_size, 1095 cFYI(1, "write %zd bytes to offset %lld of %s", write_size,
1095 *poffset, file->f_path.dentry->d_name.name)); 1096 *poffset, file->f_path.dentry->d_name.name);
1096 1097
1097 if (file->private_data == NULL) 1098 if (file->private_data == NULL)
1098 return -EBADF; 1099 return -EBADF;
@@ -1233,7 +1234,7 @@ struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *cifs_inode)
1233 it being zero) during stress testcases so we need to check for it */ 1234 it being zero) during stress testcases so we need to check for it */
1234 1235
1235 if (cifs_inode == NULL) { 1236 if (cifs_inode == NULL) {
1236 cERROR(1, ("Null inode passed to cifs_writeable_file")); 1237 cERROR(1, "Null inode passed to cifs_writeable_file");
1237 dump_stack(); 1238 dump_stack();
1238 return NULL; 1239 return NULL;
1239 } 1240 }
@@ -1277,7 +1278,7 @@ refind_writable:
1277 again. Note that it would be bad 1278 again. Note that it would be bad
1278 to hold up writepages here (rather than 1279 to hold up writepages here (rather than
1279 in caller) with continuous retries */ 1280 in caller) with continuous retries */
1280 cFYI(1, ("wp failed on reopen file")); 1281 cFYI(1, "wp failed on reopen file");
1281 read_lock(&GlobalSMBSeslock); 1282 read_lock(&GlobalSMBSeslock);
1282 /* can not use this handle, no write 1283 /* can not use this handle, no write
1283 pending on this one after all */ 1284 pending on this one after all */
@@ -1353,7 +1354,7 @@ static int cifs_partialpagewrite(struct page *page, unsigned from, unsigned to)
1353 else if (bytes_written < 0) 1354 else if (bytes_written < 0)
1354 rc = bytes_written; 1355 rc = bytes_written;
1355 } else { 1356 } else {
1356 cFYI(1, ("No writeable filehandles for inode")); 1357 cFYI(1, "No writeable filehandles for inode");
1357 rc = -EIO; 1358 rc = -EIO;
1358 } 1359 }
1359 1360
@@ -1525,7 +1526,7 @@ retry:
1525 */ 1526 */
1526 open_file = find_writable_file(CIFS_I(mapping->host)); 1527 open_file = find_writable_file(CIFS_I(mapping->host));
1527 if (!open_file) { 1528 if (!open_file) {
1528 cERROR(1, ("No writable handles for inode")); 1529 cERROR(1, "No writable handles for inode");
1529 rc = -EBADF; 1530 rc = -EBADF;
1530 } else { 1531 } else {
1531 long_op = cifs_write_timeout(cifsi, offset); 1532 long_op = cifs_write_timeout(cifsi, offset);
@@ -1538,8 +1539,8 @@ retry:
1538 cifs_update_eof(cifsi, offset, bytes_written); 1539 cifs_update_eof(cifsi, offset, bytes_written);
1539 1540
1540 if (rc || bytes_written < bytes_to_write) { 1541 if (rc || bytes_written < bytes_to_write) {
1541 cERROR(1, ("Write2 ret %d, wrote %d", 1542 cERROR(1, "Write2 ret %d, wrote %d",
1542 rc, bytes_written)); 1543 rc, bytes_written);
1543 /* BB what if continued retry is 1544 /* BB what if continued retry is
1544 requested via mount flags? */ 1545 requested via mount flags? */
1545 if (rc == -ENOSPC) 1546 if (rc == -ENOSPC)
@@ -1600,7 +1601,7 @@ static int cifs_writepage(struct page *page, struct writeback_control *wbc)
1600/* BB add check for wbc flags */ 1601/* BB add check for wbc flags */
1601 page_cache_get(page); 1602 page_cache_get(page);
1602 if (!PageUptodate(page)) 1603 if (!PageUptodate(page))
1603 cFYI(1, ("ppw - page not up to date")); 1604 cFYI(1, "ppw - page not up to date");
1604 1605
1605 /* 1606 /*
1606 * Set the "writeback" flag, and clear "dirty" in the radix tree. 1607 * Set the "writeback" flag, and clear "dirty" in the radix tree.
@@ -1629,8 +1630,8 @@ static int cifs_write_end(struct file *file, struct address_space *mapping,
1629 int rc; 1630 int rc;
1630 struct inode *inode = mapping->host; 1631 struct inode *inode = mapping->host;
1631 1632
1632 cFYI(1, ("write_end for page %p from pos %lld with %d bytes", 1633 cFYI(1, "write_end for page %p from pos %lld with %d bytes",
1633 page, pos, copied)); 1634 page, pos, copied);
1634 1635
1635 if (PageChecked(page)) { 1636 if (PageChecked(page)) {
1636 if (copied == len) 1637 if (copied == len)
@@ -1686,8 +1687,8 @@ int cifs_fsync(struct file *file, struct dentry *dentry, int datasync)
1686 1687
1687 xid = GetXid(); 1688 xid = GetXid();
1688 1689
1689 cFYI(1, ("Sync file - name: %s datasync: 0x%x", 1690 cFYI(1, "Sync file - name: %s datasync: 0x%x",
1690 dentry->d_name.name, datasync)); 1691 dentry->d_name.name, datasync);
1691 1692
1692 rc = filemap_write_and_wait(inode->i_mapping); 1693 rc = filemap_write_and_wait(inode->i_mapping);
1693 if (rc == 0) { 1694 if (rc == 0) {
@@ -1711,7 +1712,7 @@ int cifs_fsync(struct file *file, struct dentry *dentry, int datasync)
1711 unsigned int rpages = 0; 1712 unsigned int rpages = 0;
1712 int rc = 0; 1713 int rc = 0;
1713 1714
1714 cFYI(1, ("sync page %p",page)); 1715 cFYI(1, "sync page %p", page);
1715 mapping = page->mapping; 1716 mapping = page->mapping;
1716 if (!mapping) 1717 if (!mapping)
1717 return 0; 1718 return 0;
@@ -1722,7 +1723,7 @@ int cifs_fsync(struct file *file, struct dentry *dentry, int datasync)
1722/* fill in rpages then 1723/* fill in rpages then
1723 result = cifs_pagein_inode(inode, index, rpages); */ /* BB finish */ 1724 result = cifs_pagein_inode(inode, index, rpages); */ /* BB finish */
1724 1725
1725/* cFYI(1, ("rpages is %d for sync page of Index %ld", rpages, index)); 1726/* cFYI(1, "rpages is %d for sync page of Index %ld", rpages, index);
1726 1727
1727#if 0 1728#if 0
1728 if (rc < 0) 1729 if (rc < 0)
@@ -1756,7 +1757,7 @@ int cifs_flush(struct file *file, fl_owner_t id)
1756 CIFS_I(inode)->write_behind_rc = 0; 1757 CIFS_I(inode)->write_behind_rc = 0;
1757 } 1758 }
1758 1759
1759 cFYI(1, ("Flush inode %p file %p rc %d", inode, file, rc)); 1760 cFYI(1, "Flush inode %p file %p rc %d", inode, file, rc);
1760 1761
1761 return rc; 1762 return rc;
1762} 1763}
@@ -1788,7 +1789,7 @@ ssize_t cifs_user_read(struct file *file, char __user *read_data,
1788 open_file = (struct cifsFileInfo *)file->private_data; 1789 open_file = (struct cifsFileInfo *)file->private_data;
1789 1790
1790 if ((file->f_flags & O_ACCMODE) == O_WRONLY) 1791 if ((file->f_flags & O_ACCMODE) == O_WRONLY)
1791 cFYI(1, ("attempting read on write only file instance")); 1792 cFYI(1, "attempting read on write only file instance");
1792 1793
1793 for (total_read = 0, current_offset = read_data; 1794 for (total_read = 0, current_offset = read_data;
1794 read_size > total_read; 1795 read_size > total_read;
@@ -1869,7 +1870,7 @@ static ssize_t cifs_read(struct file *file, char *read_data, size_t read_size,
1869 open_file = (struct cifsFileInfo *)file->private_data; 1870 open_file = (struct cifsFileInfo *)file->private_data;
1870 1871
1871 if ((file->f_flags & O_ACCMODE) == O_WRONLY) 1872 if ((file->f_flags & O_ACCMODE) == O_WRONLY)
1872 cFYI(1, ("attempting read on write only file instance")); 1873 cFYI(1, "attempting read on write only file instance");
1873 1874
1874 for (total_read = 0, current_offset = read_data; 1875 for (total_read = 0, current_offset = read_data;
1875 read_size > total_read; 1876 read_size > total_read;
@@ -1920,7 +1921,7 @@ int cifs_file_mmap(struct file *file, struct vm_area_struct *vma)
1920 xid = GetXid(); 1921 xid = GetXid();
1921 rc = cifs_revalidate_file(file); 1922 rc = cifs_revalidate_file(file);
1922 if (rc) { 1923 if (rc) {
1923 cFYI(1, ("Validation prior to mmap failed, error=%d", rc)); 1924 cFYI(1, "Validation prior to mmap failed, error=%d", rc);
1924 FreeXid(xid); 1925 FreeXid(xid);
1925 return rc; 1926 return rc;
1926 } 1927 }
@@ -1931,8 +1932,7 @@ int cifs_file_mmap(struct file *file, struct vm_area_struct *vma)
1931 1932
1932 1933
1933static void cifs_copy_cache_pages(struct address_space *mapping, 1934static void cifs_copy_cache_pages(struct address_space *mapping,
1934 struct list_head *pages, int bytes_read, char *data, 1935 struct list_head *pages, int bytes_read, char *data)
1935 struct pagevec *plru_pvec)
1936{ 1936{
1937 struct page *page; 1937 struct page *page;
1938 char *target; 1938 char *target;
@@ -1944,10 +1944,10 @@ static void cifs_copy_cache_pages(struct address_space *mapping,
1944 page = list_entry(pages->prev, struct page, lru); 1944 page = list_entry(pages->prev, struct page, lru);
1945 list_del(&page->lru); 1945 list_del(&page->lru);
1946 1946
1947 if (add_to_page_cache(page, mapping, page->index, 1947 if (add_to_page_cache_lru(page, mapping, page->index,
1948 GFP_KERNEL)) { 1948 GFP_KERNEL)) {
1949 page_cache_release(page); 1949 page_cache_release(page);
1950 cFYI(1, ("Add page cache failed")); 1950 cFYI(1, "Add page cache failed");
1951 data += PAGE_CACHE_SIZE; 1951 data += PAGE_CACHE_SIZE;
1952 bytes_read -= PAGE_CACHE_SIZE; 1952 bytes_read -= PAGE_CACHE_SIZE;
1953 continue; 1953 continue;
@@ -1970,8 +1970,6 @@ static void cifs_copy_cache_pages(struct address_space *mapping,
1970 flush_dcache_page(page); 1970 flush_dcache_page(page);
1971 SetPageUptodate(page); 1971 SetPageUptodate(page);
1972 unlock_page(page); 1972 unlock_page(page);
1973 if (!pagevec_add(plru_pvec, page))
1974 __pagevec_lru_add_file(plru_pvec);
1975 data += PAGE_CACHE_SIZE; 1973 data += PAGE_CACHE_SIZE;
1976 } 1974 }
1977 return; 1975 return;
@@ -1990,7 +1988,6 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
1990 unsigned int read_size, i; 1988 unsigned int read_size, i;
1991 char *smb_read_data = NULL; 1989 char *smb_read_data = NULL;
1992 struct smb_com_read_rsp *pSMBr; 1990 struct smb_com_read_rsp *pSMBr;
1993 struct pagevec lru_pvec;
1994 struct cifsFileInfo *open_file; 1991 struct cifsFileInfo *open_file;
1995 int buf_type = CIFS_NO_BUFFER; 1992 int buf_type = CIFS_NO_BUFFER;
1996 1993
@@ -2004,8 +2001,7 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
2004 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb); 2001 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb);
2005 pTcon = cifs_sb->tcon; 2002 pTcon = cifs_sb->tcon;
2006 2003
2007 pagevec_init(&lru_pvec, 0); 2004 cFYI(DBG2, "rpages: num pages %d", num_pages);
2008 cFYI(DBG2, ("rpages: num pages %d", num_pages));
2009 for (i = 0; i < num_pages; ) { 2005 for (i = 0; i < num_pages; ) {
2010 unsigned contig_pages; 2006 unsigned contig_pages;
2011 struct page *tmp_page; 2007 struct page *tmp_page;
@@ -2038,8 +2034,8 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
2038 /* Read size needs to be in multiples of one page */ 2034 /* Read size needs to be in multiples of one page */
2039 read_size = min_t(const unsigned int, read_size, 2035 read_size = min_t(const unsigned int, read_size,
2040 cifs_sb->rsize & PAGE_CACHE_MASK); 2036 cifs_sb->rsize & PAGE_CACHE_MASK);
2041 cFYI(DBG2, ("rpages: read size 0x%x contiguous pages %d", 2037 cFYI(DBG2, "rpages: read size 0x%x contiguous pages %d",
2042 read_size, contig_pages)); 2038 read_size, contig_pages);
2043 rc = -EAGAIN; 2039 rc = -EAGAIN;
2044 while (rc == -EAGAIN) { 2040 while (rc == -EAGAIN) {
2045 if ((open_file->invalidHandle) && 2041 if ((open_file->invalidHandle) &&
@@ -2066,14 +2062,14 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
2066 } 2062 }
2067 } 2063 }
2068 if ((rc < 0) || (smb_read_data == NULL)) { 2064 if ((rc < 0) || (smb_read_data == NULL)) {
2069 cFYI(1, ("Read error in readpages: %d", rc)); 2065 cFYI(1, "Read error in readpages: %d", rc);
2070 break; 2066 break;
2071 } else if (bytes_read > 0) { 2067 } else if (bytes_read > 0) {
2072 task_io_account_read(bytes_read); 2068 task_io_account_read(bytes_read);
2073 pSMBr = (struct smb_com_read_rsp *)smb_read_data; 2069 pSMBr = (struct smb_com_read_rsp *)smb_read_data;
2074 cifs_copy_cache_pages(mapping, page_list, bytes_read, 2070 cifs_copy_cache_pages(mapping, page_list, bytes_read,
2075 smb_read_data + 4 /* RFC1001 hdr */ + 2071 smb_read_data + 4 /* RFC1001 hdr */ +
2076 le16_to_cpu(pSMBr->DataOffset), &lru_pvec); 2072 le16_to_cpu(pSMBr->DataOffset));
2077 2073
2078 i += bytes_read >> PAGE_CACHE_SHIFT; 2074 i += bytes_read >> PAGE_CACHE_SHIFT;
2079 cifs_stats_bytes_read(pTcon, bytes_read); 2075 cifs_stats_bytes_read(pTcon, bytes_read);
@@ -2089,9 +2085,9 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
2089 /* break; */ 2085 /* break; */
2090 } 2086 }
2091 } else { 2087 } else {
2092 cFYI(1, ("No bytes read (%d) at offset %lld . " 2088 cFYI(1, "No bytes read (%d) at offset %lld . "
2093 "Cleaning remaining pages from readahead list", 2089 "Cleaning remaining pages from readahead list",
2094 bytes_read, offset)); 2090 bytes_read, offset);
2095 /* BB turn off caching and do new lookup on 2091 /* BB turn off caching and do new lookup on
2096 file size at server? */ 2092 file size at server? */
2097 break; 2093 break;
@@ -2106,8 +2102,6 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
2106 bytes_read = 0; 2102 bytes_read = 0;
2107 } 2103 }
2108 2104
2109 pagevec_lru_add_file(&lru_pvec);
2110
2111/* need to free smb_read_data buf before exit */ 2105/* need to free smb_read_data buf before exit */
2112 if (smb_read_data) { 2106 if (smb_read_data) {
2113 if (buf_type == CIFS_SMALL_BUFFER) 2107 if (buf_type == CIFS_SMALL_BUFFER)
@@ -2136,7 +2130,7 @@ static int cifs_readpage_worker(struct file *file, struct page *page,
2136 if (rc < 0) 2130 if (rc < 0)
2137 goto io_error; 2131 goto io_error;
2138 else 2132 else
2139 cFYI(1, ("Bytes read %d", rc)); 2133 cFYI(1, "Bytes read %d", rc);
2140 2134
2141 file->f_path.dentry->d_inode->i_atime = 2135 file->f_path.dentry->d_inode->i_atime =
2142 current_fs_time(file->f_path.dentry->d_inode->i_sb); 2136 current_fs_time(file->f_path.dentry->d_inode->i_sb);
@@ -2168,8 +2162,8 @@ static int cifs_readpage(struct file *file, struct page *page)
2168 return rc; 2162 return rc;
2169 } 2163 }
2170 2164
2171 cFYI(1, ("readpage %p at offset %d 0x%x\n", 2165 cFYI(1, "readpage %p at offset %d 0x%x\n",
2172 page, (int)offset, (int)offset)); 2166 page, (int)offset, (int)offset);
2173 2167
2174 rc = cifs_readpage_worker(file, page, &offset); 2168 rc = cifs_readpage_worker(file, page, &offset);
2175 2169
@@ -2239,7 +2233,7 @@ static int cifs_write_begin(struct file *file, struct address_space *mapping,
2239 struct page *page; 2233 struct page *page;
2240 int rc = 0; 2234 int rc = 0;
2241 2235
2242 cFYI(1, ("write_begin from %lld len %d", (long long)pos, len)); 2236 cFYI(1, "write_begin from %lld len %d", (long long)pos, len);
2243 2237
2244 page = grab_cache_page_write_begin(mapping, index, flags); 2238 page = grab_cache_page_write_begin(mapping, index, flags);
2245 if (!page) { 2239 if (!page) {
@@ -2311,12 +2305,10 @@ cifs_oplock_break(struct slow_work *work)
2311 int rc, waitrc = 0; 2305 int rc, waitrc = 0;
2312 2306
2313 if (inode && S_ISREG(inode->i_mode)) { 2307 if (inode && S_ISREG(inode->i_mode)) {
2314#ifdef CONFIG_CIFS_EXPERIMENTAL 2308 if (cinode->clientCanCacheRead)
2315 if (cinode->clientCanCacheAll == 0)
2316 break_lease(inode, O_RDONLY); 2309 break_lease(inode, O_RDONLY);
2317 else if (cinode->clientCanCacheRead == 0) 2310 else
2318 break_lease(inode, O_WRONLY); 2311 break_lease(inode, O_WRONLY);
2319#endif
2320 rc = filemap_fdatawrite(inode->i_mapping); 2312 rc = filemap_fdatawrite(inode->i_mapping);
2321 if (cinode->clientCanCacheRead == 0) { 2313 if (cinode->clientCanCacheRead == 0) {
2322 waitrc = filemap_fdatawait(inode->i_mapping); 2314 waitrc = filemap_fdatawait(inode->i_mapping);
@@ -2326,7 +2318,7 @@ cifs_oplock_break(struct slow_work *work)
2326 rc = waitrc; 2318 rc = waitrc;
2327 if (rc) 2319 if (rc)
2328 cinode->write_behind_rc = rc; 2320 cinode->write_behind_rc = rc;
2329 cFYI(1, ("Oplock flush inode %p rc %d", inode, rc)); 2321 cFYI(1, "Oplock flush inode %p rc %d", inode, rc);
2330 } 2322 }
2331 2323
2332 /* 2324 /*
@@ -2338,7 +2330,7 @@ cifs_oplock_break(struct slow_work *work)
2338 if (!cfile->closePend && !cfile->oplock_break_cancelled) { 2330 if (!cfile->closePend && !cfile->oplock_break_cancelled) {
2339 rc = CIFSSMBLock(0, cifs_sb->tcon, cfile->netfid, 0, 0, 0, 0, 2331 rc = CIFSSMBLock(0, cifs_sb->tcon, cfile->netfid, 0, 0, 0, 0,
2340 LOCKING_ANDX_OPLOCK_RELEASE, false); 2332 LOCKING_ANDX_OPLOCK_RELEASE, false);
2341 cFYI(1, ("Oplock release rc = %d", rc)); 2333 cFYI(1, "Oplock release rc = %d", rc);
2342 } 2334 }
2343} 2335}
2344 2336
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
index 29b9ea244c81..62b324f26a56 100644
--- a/fs/cifs/inode.c
+++ b/fs/cifs/inode.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * fs/cifs/inode.c 2 * fs/cifs/inode.c
3 * 3 *
4 * Copyright (C) International Business Machines Corp., 2002,2008 4 * Copyright (C) International Business Machines Corp., 2002,2010
5 * Author(s): Steve French (sfrench@us.ibm.com) 5 * Author(s): Steve French (sfrench@us.ibm.com)
6 * 6 *
7 * This library is free software; you can redistribute it and/or modify 7 * This library is free software; you can redistribute it and/or modify
@@ -86,30 +86,30 @@ cifs_revalidate_cache(struct inode *inode, struct cifs_fattr *fattr)
86{ 86{
87 struct cifsInodeInfo *cifs_i = CIFS_I(inode); 87 struct cifsInodeInfo *cifs_i = CIFS_I(inode);
88 88
89 cFYI(1, ("%s: revalidating inode %llu", __func__, cifs_i->uniqueid)); 89 cFYI(1, "%s: revalidating inode %llu", __func__, cifs_i->uniqueid);
90 90
91 if (inode->i_state & I_NEW) { 91 if (inode->i_state & I_NEW) {
92 cFYI(1, ("%s: inode %llu is new", __func__, cifs_i->uniqueid)); 92 cFYI(1, "%s: inode %llu is new", __func__, cifs_i->uniqueid);
93 return; 93 return;
94 } 94 }
95 95
96 /* don't bother with revalidation if we have an oplock */ 96 /* don't bother with revalidation if we have an oplock */
97 if (cifs_i->clientCanCacheRead) { 97 if (cifs_i->clientCanCacheRead) {
98 cFYI(1, ("%s: inode %llu is oplocked", __func__, 98 cFYI(1, "%s: inode %llu is oplocked", __func__,
99 cifs_i->uniqueid)); 99 cifs_i->uniqueid);
100 return; 100 return;
101 } 101 }
102 102
103 /* revalidate if mtime or size have changed */ 103 /* revalidate if mtime or size have changed */
104 if (timespec_equal(&inode->i_mtime, &fattr->cf_mtime) && 104 if (timespec_equal(&inode->i_mtime, &fattr->cf_mtime) &&
105 cifs_i->server_eof == fattr->cf_eof) { 105 cifs_i->server_eof == fattr->cf_eof) {
106 cFYI(1, ("%s: inode %llu is unchanged", __func__, 106 cFYI(1, "%s: inode %llu is unchanged", __func__,
107 cifs_i->uniqueid)); 107 cifs_i->uniqueid);
108 return; 108 return;
109 } 109 }
110 110
111 cFYI(1, ("%s: invalidating inode %llu mapping", __func__, 111 cFYI(1, "%s: invalidating inode %llu mapping", __func__,
112 cifs_i->uniqueid)); 112 cifs_i->uniqueid);
113 cifs_i->invalid_mapping = true; 113 cifs_i->invalid_mapping = true;
114} 114}
115 115
@@ -137,15 +137,14 @@ cifs_fattr_to_inode(struct inode *inode, struct cifs_fattr *fattr)
137 inode->i_mode = fattr->cf_mode; 137 inode->i_mode = fattr->cf_mode;
138 138
139 cifs_i->cifsAttrs = fattr->cf_cifsattrs; 139 cifs_i->cifsAttrs = fattr->cf_cifsattrs;
140 cifs_i->uniqueid = fattr->cf_uniqueid;
141 140
142 if (fattr->cf_flags & CIFS_FATTR_NEED_REVAL) 141 if (fattr->cf_flags & CIFS_FATTR_NEED_REVAL)
143 cifs_i->time = 0; 142 cifs_i->time = 0;
144 else 143 else
145 cifs_i->time = jiffies; 144 cifs_i->time = jiffies;
146 145
147 cFYI(1, ("inode 0x%p old_time=%ld new_time=%ld", inode, 146 cFYI(1, "inode 0x%p old_time=%ld new_time=%ld", inode,
148 oldtime, cifs_i->time)); 147 oldtime, cifs_i->time);
149 148
150 cifs_i->delete_pending = fattr->cf_flags & CIFS_FATTR_DELETE_PENDING; 149 cifs_i->delete_pending = fattr->cf_flags & CIFS_FATTR_DELETE_PENDING;
151 150
@@ -170,6 +169,17 @@ cifs_fattr_to_inode(struct inode *inode, struct cifs_fattr *fattr)
170 cifs_set_ops(inode, fattr->cf_flags & CIFS_FATTR_DFS_REFERRAL); 169 cifs_set_ops(inode, fattr->cf_flags & CIFS_FATTR_DFS_REFERRAL);
171} 170}
172 171
172void
173cifs_fill_uniqueid(struct super_block *sb, struct cifs_fattr *fattr)
174{
175 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
176
177 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)
178 return;
179
180 fattr->cf_uniqueid = iunique(sb, ROOT_I);
181}
182
173/* Fill a cifs_fattr struct with info from FILE_UNIX_BASIC_INFO. */ 183/* Fill a cifs_fattr struct with info from FILE_UNIX_BASIC_INFO. */
174void 184void
175cifs_unix_basic_to_fattr(struct cifs_fattr *fattr, FILE_UNIX_BASIC_INFO *info, 185cifs_unix_basic_to_fattr(struct cifs_fattr *fattr, FILE_UNIX_BASIC_INFO *info,
@@ -227,7 +237,7 @@ cifs_unix_basic_to_fattr(struct cifs_fattr *fattr, FILE_UNIX_BASIC_INFO *info,
227 /* safest to call it a file if we do not know */ 237 /* safest to call it a file if we do not know */
228 fattr->cf_mode |= S_IFREG; 238 fattr->cf_mode |= S_IFREG;
229 fattr->cf_dtype = DT_REG; 239 fattr->cf_dtype = DT_REG;
230 cFYI(1, ("unknown type %d", le32_to_cpu(info->Type))); 240 cFYI(1, "unknown type %d", le32_to_cpu(info->Type));
231 break; 241 break;
232 } 242 }
233 243
@@ -256,7 +266,7 @@ cifs_create_dfs_fattr(struct cifs_fattr *fattr, struct super_block *sb)
256{ 266{
257 struct cifs_sb_info *cifs_sb = CIFS_SB(sb); 267 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
258 268
259 cFYI(1, ("creating fake fattr for DFS referral")); 269 cFYI(1, "creating fake fattr for DFS referral");
260 270
261 memset(fattr, 0, sizeof(*fattr)); 271 memset(fattr, 0, sizeof(*fattr));
262 fattr->cf_mode = S_IFDIR | S_IXUGO | S_IRWXU; 272 fattr->cf_mode = S_IFDIR | S_IXUGO | S_IRWXU;
@@ -305,7 +315,7 @@ int cifs_get_inode_info_unix(struct inode **pinode,
305 struct cifs_sb_info *cifs_sb = CIFS_SB(sb); 315 struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
306 316
307 tcon = cifs_sb->tcon; 317 tcon = cifs_sb->tcon;
308 cFYI(1, ("Getting info on %s", full_path)); 318 cFYI(1, "Getting info on %s", full_path);
309 319
310 /* could have done a find first instead but this returns more info */ 320 /* could have done a find first instead but this returns more info */
311 rc = CIFSSMBUnixQPathInfo(xid, tcon, full_path, &find_data, 321 rc = CIFSSMBUnixQPathInfo(xid, tcon, full_path, &find_data,
@@ -323,6 +333,7 @@ int cifs_get_inode_info_unix(struct inode **pinode,
323 333
324 if (*pinode == NULL) { 334 if (*pinode == NULL) {
325 /* get new inode */ 335 /* get new inode */
336 cifs_fill_uniqueid(sb, &fattr);
326 *pinode = cifs_iget(sb, &fattr); 337 *pinode = cifs_iget(sb, &fattr);
327 if (!*pinode) 338 if (!*pinode)
328 rc = -ENOMEM; 339 rc = -ENOMEM;
@@ -373,7 +384,7 @@ cifs_sfu_type(struct cifs_fattr *fattr, const unsigned char *path,
373 &bytes_read, &pbuf, &buf_type); 384 &bytes_read, &pbuf, &buf_type);
374 if ((rc == 0) && (bytes_read >= 8)) { 385 if ((rc == 0) && (bytes_read >= 8)) {
375 if (memcmp("IntxBLK", pbuf, 8) == 0) { 386 if (memcmp("IntxBLK", pbuf, 8) == 0) {
376 cFYI(1, ("Block device")); 387 cFYI(1, "Block device");
377 fattr->cf_mode |= S_IFBLK; 388 fattr->cf_mode |= S_IFBLK;
378 fattr->cf_dtype = DT_BLK; 389 fattr->cf_dtype = DT_BLK;
379 if (bytes_read == 24) { 390 if (bytes_read == 24) {
@@ -385,7 +396,7 @@ cifs_sfu_type(struct cifs_fattr *fattr, const unsigned char *path,
385 fattr->cf_rdev = MKDEV(mjr, mnr); 396 fattr->cf_rdev = MKDEV(mjr, mnr);
386 } 397 }
387 } else if (memcmp("IntxCHR", pbuf, 8) == 0) { 398 } else if (memcmp("IntxCHR", pbuf, 8) == 0) {
388 cFYI(1, ("Char device")); 399 cFYI(1, "Char device");
389 fattr->cf_mode |= S_IFCHR; 400 fattr->cf_mode |= S_IFCHR;
390 fattr->cf_dtype = DT_CHR; 401 fattr->cf_dtype = DT_CHR;
391 if (bytes_read == 24) { 402 if (bytes_read == 24) {
@@ -397,7 +408,7 @@ cifs_sfu_type(struct cifs_fattr *fattr, const unsigned char *path,
397 fattr->cf_rdev = MKDEV(mjr, mnr); 408 fattr->cf_rdev = MKDEV(mjr, mnr);
398 } 409 }
399 } else if (memcmp("IntxLNK", pbuf, 7) == 0) { 410 } else if (memcmp("IntxLNK", pbuf, 7) == 0) {
400 cFYI(1, ("Symlink")); 411 cFYI(1, "Symlink");
401 fattr->cf_mode |= S_IFLNK; 412 fattr->cf_mode |= S_IFLNK;
402 fattr->cf_dtype = DT_LNK; 413 fattr->cf_dtype = DT_LNK;
403 } else { 414 } else {
@@ -439,10 +450,10 @@ static int cifs_sfu_mode(struct cifs_fattr *fattr, const unsigned char *path,
439 else if (rc > 3) { 450 else if (rc > 3) {
440 mode = le32_to_cpu(*((__le32 *)ea_value)); 451 mode = le32_to_cpu(*((__le32 *)ea_value));
441 fattr->cf_mode &= ~SFBITS_MASK; 452 fattr->cf_mode &= ~SFBITS_MASK;
442 cFYI(1, ("special bits 0%o org mode 0%o", mode, 453 cFYI(1, "special bits 0%o org mode 0%o", mode,
443 fattr->cf_mode)); 454 fattr->cf_mode);
444 fattr->cf_mode = (mode & SFBITS_MASK) | fattr->cf_mode; 455 fattr->cf_mode = (mode & SFBITS_MASK) | fattr->cf_mode;
445 cFYI(1, ("special mode bits 0%o", mode)); 456 cFYI(1, "special mode bits 0%o", mode);
446 } 457 }
447 458
448 return 0; 459 return 0;
@@ -548,11 +559,11 @@ int cifs_get_inode_info(struct inode **pinode,
548 struct cifs_fattr fattr; 559 struct cifs_fattr fattr;
549 560
550 pTcon = cifs_sb->tcon; 561 pTcon = cifs_sb->tcon;
551 cFYI(1, ("Getting info on %s", full_path)); 562 cFYI(1, "Getting info on %s", full_path);
552 563
553 if ((pfindData == NULL) && (*pinode != NULL)) { 564 if ((pfindData == NULL) && (*pinode != NULL)) {
554 if (CIFS_I(*pinode)->clientCanCacheRead) { 565 if (CIFS_I(*pinode)->clientCanCacheRead) {
555 cFYI(1, ("No need to revalidate cached inode sizes")); 566 cFYI(1, "No need to revalidate cached inode sizes");
556 return rc; 567 return rc;
557 } 568 }
558 } 569 }
@@ -618,7 +629,7 @@ int cifs_get_inode_info(struct inode **pinode,
618 cifs_sb->mnt_cifs_flags & 629 cifs_sb->mnt_cifs_flags &
619 CIFS_MOUNT_MAP_SPECIAL_CHR); 630 CIFS_MOUNT_MAP_SPECIAL_CHR);
620 if (rc1 || !fattr.cf_uniqueid) { 631 if (rc1 || !fattr.cf_uniqueid) {
621 cFYI(1, ("GetSrvInodeNum rc %d", rc1)); 632 cFYI(1, "GetSrvInodeNum rc %d", rc1);
622 fattr.cf_uniqueid = iunique(sb, ROOT_I); 633 fattr.cf_uniqueid = iunique(sb, ROOT_I);
623 cifs_autodisable_serverino(cifs_sb); 634 cifs_autodisable_serverino(cifs_sb);
624 } 635 }
@@ -634,13 +645,13 @@ int cifs_get_inode_info(struct inode **pinode,
634 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_UNX_EMUL) { 645 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_UNX_EMUL) {
635 tmprc = cifs_sfu_type(&fattr, full_path, cifs_sb, xid); 646 tmprc = cifs_sfu_type(&fattr, full_path, cifs_sb, xid);
636 if (tmprc) 647 if (tmprc)
637 cFYI(1, ("cifs_sfu_type failed: %d", tmprc)); 648 cFYI(1, "cifs_sfu_type failed: %d", tmprc);
638 } 649 }
639 650
640#ifdef CONFIG_CIFS_EXPERIMENTAL 651#ifdef CONFIG_CIFS_EXPERIMENTAL
641 /* fill in 0777 bits from ACL */ 652 /* fill in 0777 bits from ACL */
642 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) { 653 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) {
643 cFYI(1, ("Getting mode bits from ACL")); 654 cFYI(1, "Getting mode bits from ACL");
644 cifs_acl_to_fattr(cifs_sb, &fattr, *pinode, full_path, pfid); 655 cifs_acl_to_fattr(cifs_sb, &fattr, *pinode, full_path, pfid);
645 } 656 }
646#endif 657#endif
@@ -745,7 +756,7 @@ cifs_iget(struct super_block *sb, struct cifs_fattr *fattr)
745 struct inode *inode; 756 struct inode *inode;
746 757
747retry_iget5_locked: 758retry_iget5_locked:
748 cFYI(1, ("looking for uniqueid=%llu", fattr->cf_uniqueid)); 759 cFYI(1, "looking for uniqueid=%llu", fattr->cf_uniqueid);
749 760
750 /* hash down to 32-bits on 32-bit arch */ 761 /* hash down to 32-bits on 32-bit arch */
751 hash = cifs_uniqueid_to_ino_t(fattr->cf_uniqueid); 762 hash = cifs_uniqueid_to_ino_t(fattr->cf_uniqueid);
@@ -797,7 +808,7 @@ struct inode *cifs_root_iget(struct super_block *sb, unsigned long ino)
797 return ERR_PTR(-ENOMEM); 808 return ERR_PTR(-ENOMEM);
798 809
799 if (rc && cifs_sb->tcon->ipc) { 810 if (rc && cifs_sb->tcon->ipc) {
800 cFYI(1, ("ipc connection - fake read inode")); 811 cFYI(1, "ipc connection - fake read inode");
801 inode->i_mode |= S_IFDIR; 812 inode->i_mode |= S_IFDIR;
802 inode->i_nlink = 2; 813 inode->i_nlink = 2;
803 inode->i_op = &cifs_ipc_inode_ops; 814 inode->i_op = &cifs_ipc_inode_ops;
@@ -859,7 +870,7 @@ cifs_set_file_info(struct inode *inode, struct iattr *attrs, int xid,
859 * server times. 870 * server times.
860 */ 871 */
861 if (set_time && (attrs->ia_valid & ATTR_CTIME)) { 872 if (set_time && (attrs->ia_valid & ATTR_CTIME)) {
862 cFYI(1, ("CIFS - CTIME changed")); 873 cFYI(1, "CIFS - CTIME changed");
863 info_buf.ChangeTime = 874 info_buf.ChangeTime =
864 cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_ctime)); 875 cpu_to_le64(cifs_UnixTimeToNT(attrs->ia_ctime));
865 } else 876 } else
@@ -894,8 +905,8 @@ cifs_set_file_info(struct inode *inode, struct iattr *attrs, int xid,
894 goto out; 905 goto out;
895 } 906 }
896 907
897 cFYI(1, ("calling SetFileInfo since SetPathInfo for " 908 cFYI(1, "calling SetFileInfo since SetPathInfo for "
898 "times not supported by this server")); 909 "times not supported by this server");
899 rc = CIFSSMBOpen(xid, pTcon, full_path, FILE_OPEN, 910 rc = CIFSSMBOpen(xid, pTcon, full_path, FILE_OPEN,
900 SYNCHRONIZE | FILE_WRITE_ATTRIBUTES, 911 SYNCHRONIZE | FILE_WRITE_ATTRIBUTES,
901 CREATE_NOT_DIR, &netfid, &oplock, 912 CREATE_NOT_DIR, &netfid, &oplock,
@@ -1053,7 +1064,7 @@ int cifs_unlink(struct inode *dir, struct dentry *dentry)
1053 struct iattr *attrs = NULL; 1064 struct iattr *attrs = NULL;
1054 __u32 dosattr = 0, origattr = 0; 1065 __u32 dosattr = 0, origattr = 0;
1055 1066
1056 cFYI(1, ("cifs_unlink, dir=0x%p, dentry=0x%p", dir, dentry)); 1067 cFYI(1, "cifs_unlink, dir=0x%p, dentry=0x%p", dir, dentry);
1057 1068
1058 xid = GetXid(); 1069 xid = GetXid();
1059 1070
@@ -1072,7 +1083,7 @@ int cifs_unlink(struct inode *dir, struct dentry *dentry)
1072 rc = CIFSPOSIXDelFile(xid, tcon, full_path, 1083 rc = CIFSPOSIXDelFile(xid, tcon, full_path,
1073 SMB_POSIX_UNLINK_FILE_TARGET, cifs_sb->local_nls, 1084 SMB_POSIX_UNLINK_FILE_TARGET, cifs_sb->local_nls,
1074 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); 1085 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR);
1075 cFYI(1, ("posix del rc %d", rc)); 1086 cFYI(1, "posix del rc %d", rc);
1076 if ((rc == 0) || (rc == -ENOENT)) 1087 if ((rc == 0) || (rc == -ENOENT))
1077 goto psx_del_no_retry; 1088 goto psx_del_no_retry;
1078 } 1089 }
@@ -1146,7 +1157,7 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode)
1146 struct inode *newinode = NULL; 1157 struct inode *newinode = NULL;
1147 struct cifs_fattr fattr; 1158 struct cifs_fattr fattr;
1148 1159
1149 cFYI(1, ("In cifs_mkdir, mode = 0x%x inode = 0x%p", mode, inode)); 1160 cFYI(1, "In cifs_mkdir, mode = 0x%x inode = 0x%p", mode, inode);
1150 1161
1151 xid = GetXid(); 1162 xid = GetXid();
1152 1163
@@ -1181,7 +1192,7 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode)
1181 kfree(pInfo); 1192 kfree(pInfo);
1182 goto mkdir_retry_old; 1193 goto mkdir_retry_old;
1183 } else if (rc) { 1194 } else if (rc) {
1184 cFYI(1, ("posix mkdir returned 0x%x", rc)); 1195 cFYI(1, "posix mkdir returned 0x%x", rc);
1185 d_drop(direntry); 1196 d_drop(direntry);
1186 } else { 1197 } else {
1187 if (pInfo->Type == cpu_to_le32(-1)) { 1198 if (pInfo->Type == cpu_to_le32(-1)) {
@@ -1198,6 +1209,7 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode)
1198 direntry->d_op = &cifs_dentry_ops; 1209 direntry->d_op = &cifs_dentry_ops;
1199 1210
1200 cifs_unix_basic_to_fattr(&fattr, pInfo, cifs_sb); 1211 cifs_unix_basic_to_fattr(&fattr, pInfo, cifs_sb);
1212 cifs_fill_uniqueid(inode->i_sb, &fattr);
1201 newinode = cifs_iget(inode->i_sb, &fattr); 1213 newinode = cifs_iget(inode->i_sb, &fattr);
1202 if (!newinode) { 1214 if (!newinode) {
1203 kfree(pInfo); 1215 kfree(pInfo);
@@ -1207,12 +1219,12 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode)
1207 d_instantiate(direntry, newinode); 1219 d_instantiate(direntry, newinode);
1208 1220
1209#ifdef CONFIG_CIFS_DEBUG2 1221#ifdef CONFIG_CIFS_DEBUG2
1210 cFYI(1, ("instantiated dentry %p %s to inode %p", 1222 cFYI(1, "instantiated dentry %p %s to inode %p",
1211 direntry, direntry->d_name.name, newinode)); 1223 direntry, direntry->d_name.name, newinode);
1212 1224
1213 if (newinode->i_nlink != 2) 1225 if (newinode->i_nlink != 2)
1214 cFYI(1, ("unexpected number of links %d", 1226 cFYI(1, "unexpected number of links %d",
1215 newinode->i_nlink)); 1227 newinode->i_nlink);
1216#endif 1228#endif
1217 } 1229 }
1218 kfree(pInfo); 1230 kfree(pInfo);
@@ -1223,7 +1235,7 @@ mkdir_retry_old:
1223 rc = CIFSSMBMkDir(xid, pTcon, full_path, cifs_sb->local_nls, 1235 rc = CIFSSMBMkDir(xid, pTcon, full_path, cifs_sb->local_nls,
1224 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); 1236 cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR);
1225 if (rc) { 1237 if (rc) {
1226 cFYI(1, ("cifs_mkdir returned 0x%x", rc)); 1238 cFYI(1, "cifs_mkdir returned 0x%x", rc);
1227 d_drop(direntry); 1239 d_drop(direntry);
1228 } else { 1240 } else {
1229mkdir_get_info: 1241mkdir_get_info:
@@ -1326,7 +1338,7 @@ int cifs_rmdir(struct inode *inode, struct dentry *direntry)
1326 char *full_path = NULL; 1338 char *full_path = NULL;
1327 struct cifsInodeInfo *cifsInode; 1339 struct cifsInodeInfo *cifsInode;
1328 1340
1329 cFYI(1, ("cifs_rmdir, inode = 0x%p", inode)); 1341 cFYI(1, "cifs_rmdir, inode = 0x%p", inode);
1330 1342
1331 xid = GetXid(); 1343 xid = GetXid();
1332 1344
@@ -1528,6 +1540,11 @@ cifs_inode_needs_reval(struct inode *inode)
1528 if (time_after_eq(jiffies, cifs_i->time + HZ)) 1540 if (time_after_eq(jiffies, cifs_i->time + HZ))
1529 return true; 1541 return true;
1530 1542
1543 /* hardlinked files w/ noserverino get "special" treatment */
1544 if (!(CIFS_SB(inode->i_sb)->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM) &&
1545 S_ISREG(inode->i_mode) && inode->i_nlink != 1)
1546 return true;
1547
1531 return false; 1548 return false;
1532} 1549}
1533 1550
@@ -1594,9 +1611,9 @@ int cifs_revalidate_dentry(struct dentry *dentry)
1594 goto check_inval; 1611 goto check_inval;
1595 } 1612 }
1596 1613
1597 cFYI(1, ("Revalidate: %s inode 0x%p count %d dentry: 0x%p d_time %ld " 1614 cFYI(1, "Revalidate: %s inode 0x%p count %d dentry: 0x%p d_time %ld "
1598 "jiffies %ld", full_path, inode, inode->i_count.counter, 1615 "jiffies %ld", full_path, inode, inode->i_count.counter,
1599 dentry, dentry->d_time, jiffies)); 1616 dentry, dentry->d_time, jiffies);
1600 1617
1601 if (CIFS_SB(sb)->tcon->unix_ext) 1618 if (CIFS_SB(sb)->tcon->unix_ext)
1602 rc = cifs_get_inode_info_unix(&inode, full_path, sb, xid); 1619 rc = cifs_get_inode_info_unix(&inode, full_path, sb, xid);
@@ -1690,12 +1707,12 @@ cifs_set_file_size(struct inode *inode, struct iattr *attrs,
1690 rc = CIFSSMBSetFileSize(xid, pTcon, attrs->ia_size, nfid, 1707 rc = CIFSSMBSetFileSize(xid, pTcon, attrs->ia_size, nfid,
1691 npid, false); 1708 npid, false);
1692 cifsFileInfo_put(open_file); 1709 cifsFileInfo_put(open_file);
1693 cFYI(1, ("SetFSize for attrs rc = %d", rc)); 1710 cFYI(1, "SetFSize for attrs rc = %d", rc);
1694 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) { 1711 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
1695 unsigned int bytes_written; 1712 unsigned int bytes_written;
1696 rc = CIFSSMBWrite(xid, pTcon, nfid, 0, attrs->ia_size, 1713 rc = CIFSSMBWrite(xid, pTcon, nfid, 0, attrs->ia_size,
1697 &bytes_written, NULL, NULL, 1); 1714 &bytes_written, NULL, NULL, 1);
1698 cFYI(1, ("Wrt seteof rc %d", rc)); 1715 cFYI(1, "Wrt seteof rc %d", rc);
1699 } 1716 }
1700 } else 1717 } else
1701 rc = -EINVAL; 1718 rc = -EINVAL;
@@ -1709,7 +1726,7 @@ cifs_set_file_size(struct inode *inode, struct iattr *attrs,
1709 false, cifs_sb->local_nls, 1726 false, cifs_sb->local_nls,
1710 cifs_sb->mnt_cifs_flags & 1727 cifs_sb->mnt_cifs_flags &
1711 CIFS_MOUNT_MAP_SPECIAL_CHR); 1728 CIFS_MOUNT_MAP_SPECIAL_CHR);
1712 cFYI(1, ("SetEOF by path (setattrs) rc = %d", rc)); 1729 cFYI(1, "SetEOF by path (setattrs) rc = %d", rc);
1713 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) { 1730 if ((rc == -EINVAL) || (rc == -EOPNOTSUPP)) {
1714 __u16 netfid; 1731 __u16 netfid;
1715 int oplock = 0; 1732 int oplock = 0;
@@ -1726,7 +1743,7 @@ cifs_set_file_size(struct inode *inode, struct iattr *attrs,
1726 attrs->ia_size, 1743 attrs->ia_size,
1727 &bytes_written, NULL, 1744 &bytes_written, NULL,
1728 NULL, 1); 1745 NULL, 1);
1729 cFYI(1, ("wrt seteof rc %d", rc)); 1746 cFYI(1, "wrt seteof rc %d", rc);
1730 CIFSSMBClose(xid, pTcon, netfid); 1747 CIFSSMBClose(xid, pTcon, netfid);
1731 } 1748 }
1732 } 1749 }
@@ -1754,8 +1771,8 @@ cifs_setattr_unix(struct dentry *direntry, struct iattr *attrs)
1754 struct cifs_unix_set_info_args *args = NULL; 1771 struct cifs_unix_set_info_args *args = NULL;
1755 struct cifsFileInfo *open_file; 1772 struct cifsFileInfo *open_file;
1756 1773
1757 cFYI(1, ("setattr_unix on file %s attrs->ia_valid=0x%x", 1774 cFYI(1, "setattr_unix on file %s attrs->ia_valid=0x%x",
1758 direntry->d_name.name, attrs->ia_valid)); 1775 direntry->d_name.name, attrs->ia_valid);
1759 1776
1760 xid = GetXid(); 1777 xid = GetXid();
1761 1778
@@ -1885,8 +1902,8 @@ cifs_setattr_nounix(struct dentry *direntry, struct iattr *attrs)
1885 1902
1886 xid = GetXid(); 1903 xid = GetXid();
1887 1904
1888 cFYI(1, ("setattr on file %s attrs->iavalid 0x%x", 1905 cFYI(1, "setattr on file %s attrs->iavalid 0x%x",
1889 direntry->d_name.name, attrs->ia_valid)); 1906 direntry->d_name.name, attrs->ia_valid);
1890 1907
1891 if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_PERM) == 0) { 1908 if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_PERM) == 0) {
1892 /* check if we have permission to change attrs */ 1909 /* check if we have permission to change attrs */
@@ -1943,7 +1960,7 @@ cifs_setattr_nounix(struct dentry *direntry, struct iattr *attrs)
1943 attrs->ia_valid &= ~ATTR_MODE; 1960 attrs->ia_valid &= ~ATTR_MODE;
1944 1961
1945 if (attrs->ia_valid & ATTR_MODE) { 1962 if (attrs->ia_valid & ATTR_MODE) {
1946 cFYI(1, ("Mode changed to 0%o", attrs->ia_mode)); 1963 cFYI(1, "Mode changed to 0%o", attrs->ia_mode);
1947 mode = attrs->ia_mode; 1964 mode = attrs->ia_mode;
1948 } 1965 }
1949 1966
@@ -2029,7 +2046,7 @@ cifs_setattr(struct dentry *direntry, struct iattr *attrs)
2029#if 0 2046#if 0
2030void cifs_delete_inode(struct inode *inode) 2047void cifs_delete_inode(struct inode *inode)
2031{ 2048{
2032 cFYI(1, ("In cifs_delete_inode, inode = 0x%p", inode)); 2049 cFYI(1, "In cifs_delete_inode, inode = 0x%p", inode);
2033 /* may have to add back in if and when safe distributed caching of 2050 /* may have to add back in if and when safe distributed caching of
2034 directories added e.g. via FindNotify */ 2051 directories added e.g. via FindNotify */
2035} 2052}
diff --git a/fs/cifs/ioctl.c b/fs/cifs/ioctl.c
index f94650683a00..505926f1ee6b 100644
--- a/fs/cifs/ioctl.c
+++ b/fs/cifs/ioctl.c
@@ -47,7 +47,7 @@ long cifs_ioctl(struct file *filep, unsigned int command, unsigned long arg)
47 47
48 xid = GetXid(); 48 xid = GetXid();
49 49
50 cFYI(1, ("ioctl file %p cmd %u arg %lu", filep, command, arg)); 50 cFYI(1, "ioctl file %p cmd %u arg %lu", filep, command, arg);
51 51
52 cifs_sb = CIFS_SB(inode->i_sb); 52 cifs_sb = CIFS_SB(inode->i_sb);
53 53
@@ -64,12 +64,12 @@ long cifs_ioctl(struct file *filep, unsigned int command, unsigned long arg)
64 64
65 switch (command) { 65 switch (command) {
66 case CIFS_IOC_CHECKUMOUNT: 66 case CIFS_IOC_CHECKUMOUNT:
67 cFYI(1, ("User unmount attempted")); 67 cFYI(1, "User unmount attempted");
68 if (cifs_sb->mnt_uid == current_uid()) 68 if (cifs_sb->mnt_uid == current_uid())
69 rc = 0; 69 rc = 0;
70 else { 70 else {
71 rc = -EACCES; 71 rc = -EACCES;
72 cFYI(1, ("uids do not match")); 72 cFYI(1, "uids do not match");
73 } 73 }
74 break; 74 break;
75#ifdef CONFIG_CIFS_POSIX 75#ifdef CONFIG_CIFS_POSIX
@@ -97,11 +97,11 @@ long cifs_ioctl(struct file *filep, unsigned int command, unsigned long arg)
97 /* rc= CIFSGetExtAttr(xid,tcon,pSMBFile->netfid, 97 /* rc= CIFSGetExtAttr(xid,tcon,pSMBFile->netfid,
98 extAttrBits, &ExtAttrMask);*/ 98 extAttrBits, &ExtAttrMask);*/
99 } 99 }
100 cFYI(1, ("set flags not implemented yet")); 100 cFYI(1, "set flags not implemented yet");
101 break; 101 break;
102#endif /* CONFIG_CIFS_POSIX */ 102#endif /* CONFIG_CIFS_POSIX */
103 default: 103 default:
104 cFYI(1, ("unsupported ioctl")); 104 cFYI(1, "unsupported ioctl");
105 break; 105 break;
106 } 106 }
107 107
diff --git a/fs/cifs/link.c b/fs/cifs/link.c
index c1a9d4236a8c..473ca8033656 100644
--- a/fs/cifs/link.c
+++ b/fs/cifs/link.c
@@ -139,7 +139,7 @@ cifs_follow_link(struct dentry *direntry, struct nameidata *nd)
139 if (!full_path) 139 if (!full_path)
140 goto out; 140 goto out;
141 141
142 cFYI(1, ("Full path: %s inode = 0x%p", full_path, inode)); 142 cFYI(1, "Full path: %s inode = 0x%p", full_path, inode);
143 143
144 rc = CIFSSMBUnixQuerySymLink(xid, tcon, full_path, &target_path, 144 rc = CIFSSMBUnixQuerySymLink(xid, tcon, full_path, &target_path,
145 cifs_sb->local_nls); 145 cifs_sb->local_nls);
@@ -178,8 +178,8 @@ cifs_symlink(struct inode *inode, struct dentry *direntry, const char *symname)
178 return rc; 178 return rc;
179 } 179 }
180 180
181 cFYI(1, ("Full path: %s", full_path)); 181 cFYI(1, "Full path: %s", full_path);
182 cFYI(1, ("symname is %s", symname)); 182 cFYI(1, "symname is %s", symname);
183 183
184 /* BB what if DFS and this volume is on different share? BB */ 184 /* BB what if DFS and this volume is on different share? BB */
185 if (pTcon->unix_ext) 185 if (pTcon->unix_ext)
@@ -198,8 +198,8 @@ cifs_symlink(struct inode *inode, struct dentry *direntry, const char *symname)
198 inode->i_sb, xid, NULL); 198 inode->i_sb, xid, NULL);
199 199
200 if (rc != 0) { 200 if (rc != 0) {
201 cFYI(1, ("Create symlink ok, getinodeinfo fail rc = %d", 201 cFYI(1, "Create symlink ok, getinodeinfo fail rc = %d",
202 rc)); 202 rc);
203 } else { 203 } else {
204 if (pTcon->nocase) 204 if (pTcon->nocase)
205 direntry->d_op = &cifs_ci_dentry_ops; 205 direntry->d_op = &cifs_ci_dentry_ops;
diff --git a/fs/cifs/misc.c b/fs/cifs/misc.c
index d1474996a812..1394aa37f26c 100644
--- a/fs/cifs/misc.c
+++ b/fs/cifs/misc.c
@@ -51,7 +51,7 @@ _GetXid(void)
51 if (GlobalTotalActiveXid > GlobalMaxActiveXid) 51 if (GlobalTotalActiveXid > GlobalMaxActiveXid)
52 GlobalMaxActiveXid = GlobalTotalActiveXid; 52 GlobalMaxActiveXid = GlobalTotalActiveXid;
53 if (GlobalTotalActiveXid > 65000) 53 if (GlobalTotalActiveXid > 65000)
54 cFYI(1, ("warning: more than 65000 requests active")); 54 cFYI(1, "warning: more than 65000 requests active");
55 xid = GlobalCurrentXid++; 55 xid = GlobalCurrentXid++;
56 spin_unlock(&GlobalMid_Lock); 56 spin_unlock(&GlobalMid_Lock);
57 return xid; 57 return xid;
@@ -88,7 +88,7 @@ void
88sesInfoFree(struct cifsSesInfo *buf_to_free) 88sesInfoFree(struct cifsSesInfo *buf_to_free)
89{ 89{
90 if (buf_to_free == NULL) { 90 if (buf_to_free == NULL) {
91 cFYI(1, ("Null buffer passed to sesInfoFree")); 91 cFYI(1, "Null buffer passed to sesInfoFree");
92 return; 92 return;
93 } 93 }
94 94
@@ -126,7 +126,7 @@ void
126tconInfoFree(struct cifsTconInfo *buf_to_free) 126tconInfoFree(struct cifsTconInfo *buf_to_free)
127{ 127{
128 if (buf_to_free == NULL) { 128 if (buf_to_free == NULL) {
129 cFYI(1, ("Null buffer passed to tconInfoFree")); 129 cFYI(1, "Null buffer passed to tconInfoFree");
130 return; 130 return;
131 } 131 }
132 atomic_dec(&tconInfoAllocCount); 132 atomic_dec(&tconInfoAllocCount);
@@ -166,7 +166,7 @@ void
166cifs_buf_release(void *buf_to_free) 166cifs_buf_release(void *buf_to_free)
167{ 167{
168 if (buf_to_free == NULL) { 168 if (buf_to_free == NULL) {
169 /* cFYI(1, ("Null buffer passed to cifs_buf_release"));*/ 169 /* cFYI(1, "Null buffer passed to cifs_buf_release");*/
170 return; 170 return;
171 } 171 }
172 mempool_free(buf_to_free, cifs_req_poolp); 172 mempool_free(buf_to_free, cifs_req_poolp);
@@ -202,7 +202,7 @@ cifs_small_buf_release(void *buf_to_free)
202{ 202{
203 203
204 if (buf_to_free == NULL) { 204 if (buf_to_free == NULL) {
205 cFYI(1, ("Null buffer passed to cifs_small_buf_release")); 205 cFYI(1, "Null buffer passed to cifs_small_buf_release");
206 return; 206 return;
207 } 207 }
208 mempool_free(buf_to_free, cifs_sm_req_poolp); 208 mempool_free(buf_to_free, cifs_sm_req_poolp);
@@ -345,19 +345,19 @@ header_assemble(struct smb_hdr *buffer, char smb_command /* command */ ,
345 /* with userid/password pairs found on the smb session */ 345 /* with userid/password pairs found on the smb session */
346 /* for other target tcp/ip addresses BB */ 346 /* for other target tcp/ip addresses BB */
347 if (current_fsuid() != treeCon->ses->linux_uid) { 347 if (current_fsuid() != treeCon->ses->linux_uid) {
348 cFYI(1, ("Multiuser mode and UID " 348 cFYI(1, "Multiuser mode and UID "
349 "did not match tcon uid")); 349 "did not match tcon uid");
350 read_lock(&cifs_tcp_ses_lock); 350 read_lock(&cifs_tcp_ses_lock);
351 list_for_each(temp_item, &treeCon->ses->server->smb_ses_list) { 351 list_for_each(temp_item, &treeCon->ses->server->smb_ses_list) {
352 ses = list_entry(temp_item, struct cifsSesInfo, smb_ses_list); 352 ses = list_entry(temp_item, struct cifsSesInfo, smb_ses_list);
353 if (ses->linux_uid == current_fsuid()) { 353 if (ses->linux_uid == current_fsuid()) {
354 if (ses->server == treeCon->ses->server) { 354 if (ses->server == treeCon->ses->server) {
355 cFYI(1, ("found matching uid substitute right smb_uid")); 355 cFYI(1, "found matching uid substitute right smb_uid");
356 buffer->Uid = ses->Suid; 356 buffer->Uid = ses->Suid;
357 break; 357 break;
358 } else { 358 } else {
359 /* BB eventually call cifs_setup_session here */ 359 /* BB eventually call cifs_setup_session here */
360 cFYI(1, ("local UID found but no smb sess with this server exists")); 360 cFYI(1, "local UID found but no smb sess with this server exists");
361 } 361 }
362 } 362 }
363 } 363 }
@@ -394,17 +394,16 @@ checkSMBhdr(struct smb_hdr *smb, __u16 mid)
394 if (smb->Command == SMB_COM_LOCKING_ANDX) 394 if (smb->Command == SMB_COM_LOCKING_ANDX)
395 return 0; 395 return 0;
396 else 396 else
397 cERROR(1, ("Received Request not response")); 397 cERROR(1, "Received Request not response");
398 } 398 }
399 } else { /* bad signature or mid */ 399 } else { /* bad signature or mid */
400 if (*(__le32 *) smb->Protocol != cpu_to_le32(0x424d53ff)) 400 if (*(__le32 *) smb->Protocol != cpu_to_le32(0x424d53ff))
401 cERROR(1, 401 cERROR(1, "Bad protocol string signature header %x",
402 ("Bad protocol string signature header %x", 402 *(unsigned int *) smb->Protocol);
403 *(unsigned int *) smb->Protocol));
404 if (mid != smb->Mid) 403 if (mid != smb->Mid)
405 cERROR(1, ("Mids do not match")); 404 cERROR(1, "Mids do not match");
406 } 405 }
407 cERROR(1, ("bad smb detected. The Mid=%d", smb->Mid)); 406 cERROR(1, "bad smb detected. The Mid=%d", smb->Mid);
408 return 1; 407 return 1;
409} 408}
410 409
@@ -413,7 +412,7 @@ checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length)
413{ 412{
414 __u32 len = smb->smb_buf_length; 413 __u32 len = smb->smb_buf_length;
415 __u32 clc_len; /* calculated length */ 414 __u32 clc_len; /* calculated length */
416 cFYI(0, ("checkSMB Length: 0x%x, smb_buf_length: 0x%x", length, len)); 415 cFYI(0, "checkSMB Length: 0x%x, smb_buf_length: 0x%x", length, len);
417 416
418 if (length < 2 + sizeof(struct smb_hdr)) { 417 if (length < 2 + sizeof(struct smb_hdr)) {
419 if ((length >= sizeof(struct smb_hdr) - 1) 418 if ((length >= sizeof(struct smb_hdr) - 1)
@@ -437,15 +436,15 @@ checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length)
437 tmp[sizeof(struct smb_hdr)+1] = 0; 436 tmp[sizeof(struct smb_hdr)+1] = 0;
438 return 0; 437 return 0;
439 } 438 }
440 cERROR(1, ("rcvd invalid byte count (bcc)")); 439 cERROR(1, "rcvd invalid byte count (bcc)");
441 } else { 440 } else {
442 cERROR(1, ("Length less than smb header size")); 441 cERROR(1, "Length less than smb header size");
443 } 442 }
444 return 1; 443 return 1;
445 } 444 }
446 if (len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) { 445 if (len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) {
447 cERROR(1, ("smb length greater than MaxBufSize, mid=%d", 446 cERROR(1, "smb length greater than MaxBufSize, mid=%d",
448 smb->Mid)); 447 smb->Mid);
449 return 1; 448 return 1;
450 } 449 }
451 450
@@ -454,8 +453,8 @@ checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length)
454 clc_len = smbCalcSize_LE(smb); 453 clc_len = smbCalcSize_LE(smb);
455 454
456 if (4 + len != length) { 455 if (4 + len != length) {
457 cERROR(1, ("Length read does not match RFC1001 length %d", 456 cERROR(1, "Length read does not match RFC1001 length %d",
458 len)); 457 len);
459 return 1; 458 return 1;
460 } 459 }
461 460
@@ -466,8 +465,8 @@ checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length)
466 if (((4 + len) & 0xFFFF) == (clc_len & 0xFFFF)) 465 if (((4 + len) & 0xFFFF) == (clc_len & 0xFFFF))
467 return 0; /* bcc wrapped */ 466 return 0; /* bcc wrapped */
468 } 467 }
469 cFYI(1, ("Calculated size %d vs length %d mismatch for mid %d", 468 cFYI(1, "Calculated size %d vs length %d mismatch for mid %d",
470 clc_len, 4 + len, smb->Mid)); 469 clc_len, 4 + len, smb->Mid);
471 /* Windows XP can return a few bytes too much, presumably 470 /* Windows XP can return a few bytes too much, presumably
472 an illegal pad, at the end of byte range lock responses 471 an illegal pad, at the end of byte range lock responses
473 so we allow for that three byte pad, as long as actual 472 so we allow for that three byte pad, as long as actual
@@ -482,8 +481,8 @@ checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length)
482 if ((4+len > clc_len) && (len <= clc_len + 512)) 481 if ((4+len > clc_len) && (len <= clc_len + 512))
483 return 0; 482 return 0;
484 else { 483 else {
485 cERROR(1, ("RFC1001 size %d bigger than SMB for Mid=%d", 484 cERROR(1, "RFC1001 size %d bigger than SMB for Mid=%d",
486 len, smb->Mid)); 485 len, smb->Mid);
487 return 1; 486 return 1;
488 } 487 }
489 } 488 }
@@ -501,7 +500,7 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
501 struct cifsFileInfo *netfile; 500 struct cifsFileInfo *netfile;
502 int rc; 501 int rc;
503 502
504 cFYI(1, ("Checking for oplock break or dnotify response")); 503 cFYI(1, "Checking for oplock break or dnotify response");
505 if ((pSMB->hdr.Command == SMB_COM_NT_TRANSACT) && 504 if ((pSMB->hdr.Command == SMB_COM_NT_TRANSACT) &&
506 (pSMB->hdr.Flags & SMBFLG_RESPONSE)) { 505 (pSMB->hdr.Flags & SMBFLG_RESPONSE)) {
507 struct smb_com_transaction_change_notify_rsp *pSMBr = 506 struct smb_com_transaction_change_notify_rsp *pSMBr =
@@ -513,15 +512,15 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
513 512
514 pnotify = (struct file_notify_information *) 513 pnotify = (struct file_notify_information *)
515 ((char *)&pSMBr->hdr.Protocol + data_offset); 514 ((char *)&pSMBr->hdr.Protocol + data_offset);
516 cFYI(1, ("dnotify on %s Action: 0x%x", 515 cFYI(1, "dnotify on %s Action: 0x%x",
517 pnotify->FileName, pnotify->Action)); 516 pnotify->FileName, pnotify->Action);
518 /* cifs_dump_mem("Rcvd notify Data: ",buf, 517 /* cifs_dump_mem("Rcvd notify Data: ",buf,
519 sizeof(struct smb_hdr)+60); */ 518 sizeof(struct smb_hdr)+60); */
520 return true; 519 return true;
521 } 520 }
522 if (pSMBr->hdr.Status.CifsError) { 521 if (pSMBr->hdr.Status.CifsError) {
523 cFYI(1, ("notify err 0x%d", 522 cFYI(1, "notify err 0x%d",
524 pSMBr->hdr.Status.CifsError)); 523 pSMBr->hdr.Status.CifsError);
525 return true; 524 return true;
526 } 525 }
527 return false; 526 return false;
@@ -535,7 +534,7 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
535 large dirty files cached on the client */ 534 large dirty files cached on the client */
536 if ((NT_STATUS_INVALID_HANDLE) == 535 if ((NT_STATUS_INVALID_HANDLE) ==
537 le32_to_cpu(pSMB->hdr.Status.CifsError)) { 536 le32_to_cpu(pSMB->hdr.Status.CifsError)) {
538 cFYI(1, ("invalid handle on oplock break")); 537 cFYI(1, "invalid handle on oplock break");
539 return true; 538 return true;
540 } else if (ERRbadfid == 539 } else if (ERRbadfid ==
541 le16_to_cpu(pSMB->hdr.Status.DosError.Error)) { 540 le16_to_cpu(pSMB->hdr.Status.DosError.Error)) {
@@ -547,8 +546,8 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
547 if (pSMB->hdr.WordCount != 8) 546 if (pSMB->hdr.WordCount != 8)
548 return false; 547 return false;
549 548
550 cFYI(1, ("oplock type 0x%d level 0x%d", 549 cFYI(1, "oplock type 0x%d level 0x%d",
551 pSMB->LockType, pSMB->OplockLevel)); 550 pSMB->LockType, pSMB->OplockLevel);
552 if (!(pSMB->LockType & LOCKING_ANDX_OPLOCK_RELEASE)) 551 if (!(pSMB->LockType & LOCKING_ANDX_OPLOCK_RELEASE))
553 return false; 552 return false;
554 553
@@ -579,15 +578,15 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
579 return true; 578 return true;
580 } 579 }
581 580
582 cFYI(1, ("file id match, oplock break")); 581 cFYI(1, "file id match, oplock break");
583 pCifsInode = CIFS_I(netfile->pInode); 582 pCifsInode = CIFS_I(netfile->pInode);
584 pCifsInode->clientCanCacheAll = false; 583 pCifsInode->clientCanCacheAll = false;
585 if (pSMB->OplockLevel == 0) 584 if (pSMB->OplockLevel == 0)
586 pCifsInode->clientCanCacheRead = false; 585 pCifsInode->clientCanCacheRead = false;
587 rc = slow_work_enqueue(&netfile->oplock_break); 586 rc = slow_work_enqueue(&netfile->oplock_break);
588 if (rc) { 587 if (rc) {
589 cERROR(1, ("failed to enqueue oplock " 588 cERROR(1, "failed to enqueue oplock "
590 "break: %d\n", rc)); 589 "break: %d\n", rc);
591 } else { 590 } else {
592 netfile->oplock_break_cancelled = false; 591 netfile->oplock_break_cancelled = false;
593 } 592 }
@@ -597,12 +596,12 @@ is_valid_oplock_break(struct smb_hdr *buf, struct TCP_Server_Info *srv)
597 } 596 }
598 read_unlock(&GlobalSMBSeslock); 597 read_unlock(&GlobalSMBSeslock);
599 read_unlock(&cifs_tcp_ses_lock); 598 read_unlock(&cifs_tcp_ses_lock);
600 cFYI(1, ("No matching file for oplock break")); 599 cFYI(1, "No matching file for oplock break");
601 return true; 600 return true;
602 } 601 }
603 } 602 }
604 read_unlock(&cifs_tcp_ses_lock); 603 read_unlock(&cifs_tcp_ses_lock);
605 cFYI(1, ("Can not process oplock break for non-existent connection")); 604 cFYI(1, "Can not process oplock break for non-existent connection");
606 return true; 605 return true;
607} 606}
608 607
@@ -721,11 +720,11 @@ cifs_autodisable_serverino(struct cifs_sb_info *cifs_sb)
721{ 720{
722 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM) { 721 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM) {
723 cifs_sb->mnt_cifs_flags &= ~CIFS_MOUNT_SERVER_INUM; 722 cifs_sb->mnt_cifs_flags &= ~CIFS_MOUNT_SERVER_INUM;
724 cERROR(1, ("Autodisabling the use of server inode numbers on " 723 cERROR(1, "Autodisabling the use of server inode numbers on "
725 "%s. This server doesn't seem to support them " 724 "%s. This server doesn't seem to support them "
726 "properly. Hardlinks will not be recognized on this " 725 "properly. Hardlinks will not be recognized on this "
727 "mount. Consider mounting with the \"noserverino\" " 726 "mount. Consider mounting with the \"noserverino\" "
728 "option to silence this message.", 727 "option to silence this message.",
729 cifs_sb->tcon->treeName)); 728 cifs_sb->tcon->treeName);
730 } 729 }
731} 730}
diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c
index bd6d6895730d..d35d52889cb5 100644
--- a/fs/cifs/netmisc.c
+++ b/fs/cifs/netmisc.c
@@ -149,7 +149,7 @@ cifs_inet_pton(const int address_family, const char *cp, void *dst)
149 else if (address_family == AF_INET6) 149 else if (address_family == AF_INET6)
150 ret = in6_pton(cp, -1 /* len */, dst , '\\', NULL); 150 ret = in6_pton(cp, -1 /* len */, dst , '\\', NULL);
151 151
152 cFYI(DBG2, ("address conversion returned %d for %s", ret, cp)); 152 cFYI(DBG2, "address conversion returned %d for %s", ret, cp);
153 if (ret > 0) 153 if (ret > 0)
154 ret = 1; 154 ret = 1;
155 return ret; 155 return ret;
@@ -870,8 +870,8 @@ map_smb_to_linux_error(struct smb_hdr *smb, int logErr)
870 } 870 }
871 /* else ERRHRD class errors or junk - return EIO */ 871 /* else ERRHRD class errors or junk - return EIO */
872 872
873 cFYI(1, ("Mapping smb error code %d to POSIX err %d", 873 cFYI(1, "Mapping smb error code %d to POSIX err %d",
874 smberrcode, rc)); 874 smberrcode, rc);
875 875
876 /* generic corrective action e.g. reconnect SMB session on 876 /* generic corrective action e.g. reconnect SMB session on
877 * ERRbaduid could be added */ 877 * ERRbaduid could be added */
@@ -940,20 +940,20 @@ struct timespec cnvrtDosUnixTm(__le16 le_date, __le16 le_time, int offset)
940 SMB_TIME *st = (SMB_TIME *)&time; 940 SMB_TIME *st = (SMB_TIME *)&time;
941 SMB_DATE *sd = (SMB_DATE *)&date; 941 SMB_DATE *sd = (SMB_DATE *)&date;
942 942
943 cFYI(1, ("date %d time %d", date, time)); 943 cFYI(1, "date %d time %d", date, time);
944 944
945 sec = 2 * st->TwoSeconds; 945 sec = 2 * st->TwoSeconds;
946 min = st->Minutes; 946 min = st->Minutes;
947 if ((sec > 59) || (min > 59)) 947 if ((sec > 59) || (min > 59))
948 cERROR(1, ("illegal time min %d sec %d", min, sec)); 948 cERROR(1, "illegal time min %d sec %d", min, sec);
949 sec += (min * 60); 949 sec += (min * 60);
950 sec += 60 * 60 * st->Hours; 950 sec += 60 * 60 * st->Hours;
951 if (st->Hours > 24) 951 if (st->Hours > 24)
952 cERROR(1, ("illegal hours %d", st->Hours)); 952 cERROR(1, "illegal hours %d", st->Hours);
953 days = sd->Day; 953 days = sd->Day;
954 month = sd->Month; 954 month = sd->Month;
955 if ((days > 31) || (month > 12)) { 955 if ((days > 31) || (month > 12)) {
956 cERROR(1, ("illegal date, month %d day: %d", month, days)); 956 cERROR(1, "illegal date, month %d day: %d", month, days);
957 if (month > 12) 957 if (month > 12)
958 month = 12; 958 month = 12;
959 } 959 }
@@ -979,7 +979,7 @@ struct timespec cnvrtDosUnixTm(__le16 le_date, __le16 le_time, int offset)
979 979
980 ts.tv_sec = sec + offset; 980 ts.tv_sec = sec + offset;
981 981
982 /* cFYI(1,("sec after cnvrt dos to unix time %d",sec)); */ 982 /* cFYI(1, "sec after cnvrt dos to unix time %d",sec); */
983 983
984 ts.tv_nsec = 0; 984 ts.tv_nsec = 0;
985 return ts; 985 return ts;
diff --git a/fs/cifs/readdir.c b/fs/cifs/readdir.c
index 18e0bc1fb593..daf1753af674 100644
--- a/fs/cifs/readdir.c
+++ b/fs/cifs/readdir.c
@@ -47,15 +47,15 @@ static void dump_cifs_file_struct(struct file *file, char *label)
47 if (file) { 47 if (file) {
48 cf = file->private_data; 48 cf = file->private_data;
49 if (cf == NULL) { 49 if (cf == NULL) {
50 cFYI(1, ("empty cifs private file data")); 50 cFYI(1, "empty cifs private file data");
51 return; 51 return;
52 } 52 }
53 if (cf->invalidHandle) 53 if (cf->invalidHandle)
54 cFYI(1, ("invalid handle")); 54 cFYI(1, "invalid handle");
55 if (cf->srch_inf.endOfSearch) 55 if (cf->srch_inf.endOfSearch)
56 cFYI(1, ("end of search")); 56 cFYI(1, "end of search");
57 if (cf->srch_inf.emptyDir) 57 if (cf->srch_inf.emptyDir)
58 cFYI(1, ("empty dir")); 58 cFYI(1, "empty dir");
59 } 59 }
60} 60}
61#else 61#else
@@ -76,7 +76,7 @@ cifs_readdir_lookup(struct dentry *parent, struct qstr *name,
76 struct inode *inode; 76 struct inode *inode;
77 struct super_block *sb = parent->d_inode->i_sb; 77 struct super_block *sb = parent->d_inode->i_sb;
78 78
79 cFYI(1, ("For %s", name->name)); 79 cFYI(1, "For %s", name->name);
80 80
81 if (parent->d_op && parent->d_op->d_hash) 81 if (parent->d_op && parent->d_op->d_hash)
82 parent->d_op->d_hash(parent, name); 82 parent->d_op->d_hash(parent, name);
@@ -214,7 +214,7 @@ int get_symlink_reparse_path(char *full_path, struct cifs_sb_info *cifs_sb,
214 fid, 214 fid,
215 cifs_sb->local_nls); 215 cifs_sb->local_nls);
216 if (CIFSSMBClose(xid, ptcon, fid)) { 216 if (CIFSSMBClose(xid, ptcon, fid)) {
217 cFYI(1, ("Error closing temporary reparsepoint open)")); 217 cFYI(1, "Error closing temporary reparsepoint open");
218 } 218 }
219 } 219 }
220} 220}
@@ -252,7 +252,7 @@ static int initiate_cifs_search(const int xid, struct file *file)
252 if (full_path == NULL) 252 if (full_path == NULL)
253 return -ENOMEM; 253 return -ENOMEM;
254 254
255 cFYI(1, ("Full path: %s start at: %lld", full_path, file->f_pos)); 255 cFYI(1, "Full path: %s start at: %lld", full_path, file->f_pos);
256 256
257ffirst_retry: 257ffirst_retry:
258 /* test for Unix extensions */ 258 /* test for Unix extensions */
@@ -297,7 +297,7 @@ static int cifs_unicode_bytelen(char *str)
297 if (ustr[len] == 0) 297 if (ustr[len] == 0)
298 return len << 1; 298 return len << 1;
299 } 299 }
300 cFYI(1, ("Unicode string longer than PATH_MAX found")); 300 cFYI(1, "Unicode string longer than PATH_MAX found");
301 return len << 1; 301 return len << 1;
302} 302}
303 303
@@ -314,19 +314,18 @@ static char *nxt_dir_entry(char *old_entry, char *end_of_smb, int level)
314 pfData->FileNameLength; 314 pfData->FileNameLength;
315 } else 315 } else
316 new_entry = old_entry + le32_to_cpu(pDirInfo->NextEntryOffset); 316 new_entry = old_entry + le32_to_cpu(pDirInfo->NextEntryOffset);
317 cFYI(1, ("new entry %p old entry %p", new_entry, old_entry)); 317 cFYI(1, "new entry %p old entry %p", new_entry, old_entry);
318 /* validate that new_entry is not past end of SMB */ 318 /* validate that new_entry is not past end of SMB */
319 if (new_entry >= end_of_smb) { 319 if (new_entry >= end_of_smb) {
320 cERROR(1, 320 cERROR(1, "search entry %p began after end of SMB %p old entry %p",
321 ("search entry %p began after end of SMB %p old entry %p", 321 new_entry, end_of_smb, old_entry);
322 new_entry, end_of_smb, old_entry));
323 return NULL; 322 return NULL;
324 } else if (((level == SMB_FIND_FILE_INFO_STANDARD) && 323 } else if (((level == SMB_FIND_FILE_INFO_STANDARD) &&
325 (new_entry + sizeof(FIND_FILE_STANDARD_INFO) > end_of_smb)) 324 (new_entry + sizeof(FIND_FILE_STANDARD_INFO) > end_of_smb))
326 || ((level != SMB_FIND_FILE_INFO_STANDARD) && 325 || ((level != SMB_FIND_FILE_INFO_STANDARD) &&
327 (new_entry + sizeof(FILE_DIRECTORY_INFO) > end_of_smb))) { 326 (new_entry + sizeof(FILE_DIRECTORY_INFO) > end_of_smb))) {
328 cERROR(1, ("search entry %p extends after end of SMB %p", 327 cERROR(1, "search entry %p extends after end of SMB %p",
329 new_entry, end_of_smb)); 328 new_entry, end_of_smb);
330 return NULL; 329 return NULL;
331 } else 330 } else
332 return new_entry; 331 return new_entry;
@@ -380,8 +379,8 @@ static int cifs_entry_is_dot(char *current_entry, struct cifsFileInfo *cfile)
380 filename = &pFindData->FileName[0]; 379 filename = &pFindData->FileName[0];
381 len = pFindData->FileNameLength; 380 len = pFindData->FileNameLength;
382 } else { 381 } else {
383 cFYI(1, ("Unknown findfirst level %d", 382 cFYI(1, "Unknown findfirst level %d",
384 cfile->srch_inf.info_level)); 383 cfile->srch_inf.info_level);
385 } 384 }
386 385
387 if (filename) { 386 if (filename) {
@@ -481,7 +480,7 @@ static int cifs_save_resume_key(const char *current_entry,
481 len = (unsigned int)pFindData->FileNameLength; 480 len = (unsigned int)pFindData->FileNameLength;
482 cifsFile->srch_inf.resume_key = pFindData->ResumeKey; 481 cifsFile->srch_inf.resume_key = pFindData->ResumeKey;
483 } else { 482 } else {
484 cFYI(1, ("Unknown findfirst level %d", level)); 483 cFYI(1, "Unknown findfirst level %d", level);
485 return -EINVAL; 484 return -EINVAL;
486 } 485 }
487 cifsFile->srch_inf.resume_name_len = len; 486 cifsFile->srch_inf.resume_name_len = len;
@@ -525,7 +524,7 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
525 is_dir_changed(file)) || 524 is_dir_changed(file)) ||
526 (index_to_find < first_entry_in_buffer)) { 525 (index_to_find < first_entry_in_buffer)) {
527 /* close and restart search */ 526 /* close and restart search */
528 cFYI(1, ("search backing up - close and restart search")); 527 cFYI(1, "search backing up - close and restart search");
529 write_lock(&GlobalSMBSeslock); 528 write_lock(&GlobalSMBSeslock);
530 if (!cifsFile->srch_inf.endOfSearch && 529 if (!cifsFile->srch_inf.endOfSearch &&
531 !cifsFile->invalidHandle) { 530 !cifsFile->invalidHandle) {
@@ -535,7 +534,7 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
535 } else 534 } else
536 write_unlock(&GlobalSMBSeslock); 535 write_unlock(&GlobalSMBSeslock);
537 if (cifsFile->srch_inf.ntwrk_buf_start) { 536 if (cifsFile->srch_inf.ntwrk_buf_start) {
538 cFYI(1, ("freeing SMB ff cache buf on search rewind")); 537 cFYI(1, "freeing SMB ff cache buf on search rewind");
539 if (cifsFile->srch_inf.smallBuf) 538 if (cifsFile->srch_inf.smallBuf)
540 cifs_small_buf_release(cifsFile->srch_inf. 539 cifs_small_buf_release(cifsFile->srch_inf.
541 ntwrk_buf_start); 540 ntwrk_buf_start);
@@ -546,8 +545,8 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
546 } 545 }
547 rc = initiate_cifs_search(xid, file); 546 rc = initiate_cifs_search(xid, file);
548 if (rc) { 547 if (rc) {
549 cFYI(1, ("error %d reinitiating a search on rewind", 548 cFYI(1, "error %d reinitiating a search on rewind",
550 rc)); 549 rc);
551 return rc; 550 return rc;
552 } 551 }
553 cifs_save_resume_key(cifsFile->srch_inf.last_entry, cifsFile); 552 cifs_save_resume_key(cifsFile->srch_inf.last_entry, cifsFile);
@@ -555,7 +554,7 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
555 554
556 while ((index_to_find >= cifsFile->srch_inf.index_of_last_entry) && 555 while ((index_to_find >= cifsFile->srch_inf.index_of_last_entry) &&
557 (rc == 0) && !cifsFile->srch_inf.endOfSearch) { 556 (rc == 0) && !cifsFile->srch_inf.endOfSearch) {
558 cFYI(1, ("calling findnext2")); 557 cFYI(1, "calling findnext2");
559 rc = CIFSFindNext(xid, pTcon, cifsFile->netfid, 558 rc = CIFSFindNext(xid, pTcon, cifsFile->netfid,
560 &cifsFile->srch_inf); 559 &cifsFile->srch_inf);
561 cifs_save_resume_key(cifsFile->srch_inf.last_entry, cifsFile); 560 cifs_save_resume_key(cifsFile->srch_inf.last_entry, cifsFile);
@@ -575,7 +574,7 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
575 first_entry_in_buffer = cifsFile->srch_inf.index_of_last_entry 574 first_entry_in_buffer = cifsFile->srch_inf.index_of_last_entry
576 - cifsFile->srch_inf.entries_in_buffer; 575 - cifsFile->srch_inf.entries_in_buffer;
577 pos_in_buf = index_to_find - first_entry_in_buffer; 576 pos_in_buf = index_to_find - first_entry_in_buffer;
578 cFYI(1, ("found entry - pos_in_buf %d", pos_in_buf)); 577 cFYI(1, "found entry - pos_in_buf %d", pos_in_buf);
579 578
580 for (i = 0; (i < (pos_in_buf)) && (current_entry != NULL); i++) { 579 for (i = 0; (i < (pos_in_buf)) && (current_entry != NULL); i++) {
581 /* go entry by entry figuring out which is first */ 580 /* go entry by entry figuring out which is first */
@@ -584,19 +583,19 @@ static int find_cifs_entry(const int xid, struct cifsTconInfo *pTcon,
584 } 583 }
585 if ((current_entry == NULL) && (i < pos_in_buf)) { 584 if ((current_entry == NULL) && (i < pos_in_buf)) {
586 /* BB fixme - check if we should flag this error */ 585 /* BB fixme - check if we should flag this error */
587 cERROR(1, ("reached end of buf searching for pos in buf" 586 cERROR(1, "reached end of buf searching for pos in buf"
588 " %d index to find %lld rc %d", 587 " %d index to find %lld rc %d",
589 pos_in_buf, index_to_find, rc)); 588 pos_in_buf, index_to_find, rc);
590 } 589 }
591 rc = 0; 590 rc = 0;
592 *ppCurrentEntry = current_entry; 591 *ppCurrentEntry = current_entry;
593 } else { 592 } else {
594 cFYI(1, ("index not in buffer - could not findnext into it")); 593 cFYI(1, "index not in buffer - could not findnext into it");
595 return 0; 594 return 0;
596 } 595 }
597 596
598 if (pos_in_buf >= cifsFile->srch_inf.entries_in_buffer) { 597 if (pos_in_buf >= cifsFile->srch_inf.entries_in_buffer) {
599 cFYI(1, ("can not return entries pos_in_buf beyond last")); 598 cFYI(1, "can not return entries pos_in_buf beyond last");
600 *num_to_ret = 0; 599 *num_to_ret = 0;
601 } else 600 } else
602 *num_to_ret = cifsFile->srch_inf.entries_in_buffer - pos_in_buf; 601 *num_to_ret = cifsFile->srch_inf.entries_in_buffer - pos_in_buf;
@@ -656,12 +655,12 @@ static int cifs_get_name_from_search_buf(struct qstr *pqst,
656 /* one byte length, no name conversion */ 655 /* one byte length, no name conversion */
657 len = (unsigned int)pFindData->FileNameLength; 656 len = (unsigned int)pFindData->FileNameLength;
658 } else { 657 } else {
659 cFYI(1, ("Unknown findfirst level %d", level)); 658 cFYI(1, "Unknown findfirst level %d", level);
660 return -EINVAL; 659 return -EINVAL;
661 } 660 }
662 661
663 if (len > max_len) { 662 if (len > max_len) {
664 cERROR(1, ("bad search response length %d past smb end", len)); 663 cERROR(1, "bad search response length %d past smb end", len);
665 return -EINVAL; 664 return -EINVAL;
666 } 665 }
667 666
@@ -754,7 +753,7 @@ static int cifs_filldir(char *pfindEntry, struct file *file, filldir_t filldir,
754 * case already. Why should we be clobbering other errors from it? 753 * case already. Why should we be clobbering other errors from it?
755 */ 754 */
756 if (rc) { 755 if (rc) {
757 cFYI(1, ("filldir rc = %d", rc)); 756 cFYI(1, "filldir rc = %d", rc);
758 rc = -EOVERFLOW; 757 rc = -EOVERFLOW;
759 } 758 }
760 dput(tmp_dentry); 759 dput(tmp_dentry);
@@ -786,7 +785,7 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
786 case 0: 785 case 0:
787 if (filldir(direntry, ".", 1, file->f_pos, 786 if (filldir(direntry, ".", 1, file->f_pos,
788 file->f_path.dentry->d_inode->i_ino, DT_DIR) < 0) { 787 file->f_path.dentry->d_inode->i_ino, DT_DIR) < 0) {
789 cERROR(1, ("Filldir for current dir failed")); 788 cERROR(1, "Filldir for current dir failed");
790 rc = -ENOMEM; 789 rc = -ENOMEM;
791 break; 790 break;
792 } 791 }
@@ -794,7 +793,7 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
794 case 1: 793 case 1:
795 if (filldir(direntry, "..", 2, file->f_pos, 794 if (filldir(direntry, "..", 2, file->f_pos,
796 file->f_path.dentry->d_parent->d_inode->i_ino, DT_DIR) < 0) { 795 file->f_path.dentry->d_parent->d_inode->i_ino, DT_DIR) < 0) {
797 cERROR(1, ("Filldir for parent dir failed")); 796 cERROR(1, "Filldir for parent dir failed");
798 rc = -ENOMEM; 797 rc = -ENOMEM;
799 break; 798 break;
800 } 799 }
@@ -807,7 +806,7 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
807 806
808 if (file->private_data == NULL) { 807 if (file->private_data == NULL) {
809 rc = initiate_cifs_search(xid, file); 808 rc = initiate_cifs_search(xid, file);
810 cFYI(1, ("initiate cifs search rc %d", rc)); 809 cFYI(1, "initiate cifs search rc %d", rc);
811 if (rc) { 810 if (rc) {
812 FreeXid(xid); 811 FreeXid(xid);
813 return rc; 812 return rc;
@@ -821,7 +820,7 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
821 cifsFile = file->private_data; 820 cifsFile = file->private_data;
822 if (cifsFile->srch_inf.endOfSearch) { 821 if (cifsFile->srch_inf.endOfSearch) {
823 if (cifsFile->srch_inf.emptyDir) { 822 if (cifsFile->srch_inf.emptyDir) {
824 cFYI(1, ("End of search, empty dir")); 823 cFYI(1, "End of search, empty dir");
825 rc = 0; 824 rc = 0;
826 break; 825 break;
827 } 826 }
@@ -833,16 +832,16 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
833 rc = find_cifs_entry(xid, pTcon, file, 832 rc = find_cifs_entry(xid, pTcon, file,
834 &current_entry, &num_to_fill); 833 &current_entry, &num_to_fill);
835 if (rc) { 834 if (rc) {
836 cFYI(1, ("fce error %d", rc)); 835 cFYI(1, "fce error %d", rc);
837 goto rddir2_exit; 836 goto rddir2_exit;
838 } else if (current_entry != NULL) { 837 } else if (current_entry != NULL) {
839 cFYI(1, ("entry %lld found", file->f_pos)); 838 cFYI(1, "entry %lld found", file->f_pos);
840 } else { 839 } else {
841 cFYI(1, ("could not find entry")); 840 cFYI(1, "could not find entry");
842 goto rddir2_exit; 841 goto rddir2_exit;
843 } 842 }
844 cFYI(1, ("loop through %d times filling dir for net buf %p", 843 cFYI(1, "loop through %d times filling dir for net buf %p",
845 num_to_fill, cifsFile->srch_inf.ntwrk_buf_start)); 844 num_to_fill, cifsFile->srch_inf.ntwrk_buf_start);
846 max_len = smbCalcSize((struct smb_hdr *) 845 max_len = smbCalcSize((struct smb_hdr *)
847 cifsFile->srch_inf.ntwrk_buf_start); 846 cifsFile->srch_inf.ntwrk_buf_start);
848 end_of_smb = cifsFile->srch_inf.ntwrk_buf_start + max_len; 847 end_of_smb = cifsFile->srch_inf.ntwrk_buf_start + max_len;
@@ -851,8 +850,8 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
851 for (i = 0; (i < num_to_fill) && (rc == 0); i++) { 850 for (i = 0; (i < num_to_fill) && (rc == 0); i++) {
852 if (current_entry == NULL) { 851 if (current_entry == NULL) {
853 /* evaluate whether this case is an error */ 852 /* evaluate whether this case is an error */
854 cERROR(1, ("past SMB end, num to fill %d i %d", 853 cERROR(1, "past SMB end, num to fill %d i %d",
855 num_to_fill, i)); 854 num_to_fill, i);
856 break; 855 break;
857 } 856 }
858 /* if buggy server returns . and .. late do 857 /* if buggy server returns . and .. late do
@@ -867,8 +866,8 @@ int cifs_readdir(struct file *file, void *direntry, filldir_t filldir)
867 file->f_pos++; 866 file->f_pos++;
868 if (file->f_pos == 867 if (file->f_pos ==
869 cifsFile->srch_inf.index_of_last_entry) { 868 cifsFile->srch_inf.index_of_last_entry) {
870 cFYI(1, ("last entry in buf at pos %lld %s", 869 cFYI(1, "last entry in buf at pos %lld %s",
871 file->f_pos, tmp_buf)); 870 file->f_pos, tmp_buf);
872 cifs_save_resume_key(current_entry, cifsFile); 871 cifs_save_resume_key(current_entry, cifsFile);
873 break; 872 break;
874 } else 873 } else
diff --git a/fs/cifs/sess.c b/fs/cifs/sess.c
index 7c3fd7463f44..7707389bdf2c 100644
--- a/fs/cifs/sess.c
+++ b/fs/cifs/sess.c
@@ -35,9 +35,11 @@
35extern void SMBNTencrypt(unsigned char *passwd, unsigned char *c8, 35extern void SMBNTencrypt(unsigned char *passwd, unsigned char *c8,
36 unsigned char *p24); 36 unsigned char *p24);
37 37
38/* Checks if this is the first smb session to be reconnected after 38/*
39 the socket has been reestablished (so we know whether to use vc 0). 39 * Checks if this is the first smb session to be reconnected after
40 Called while holding the cifs_tcp_ses_lock, so do not block */ 40 * the socket has been reestablished (so we know whether to use vc 0).
41 * Called while holding the cifs_tcp_ses_lock, so do not block
42 */
41static bool is_first_ses_reconnect(struct cifsSesInfo *ses) 43static bool is_first_ses_reconnect(struct cifsSesInfo *ses)
42{ 44{
43 struct list_head *tmp; 45 struct list_head *tmp;
@@ -284,7 +286,7 @@ decode_unicode_ssetup(char **pbcc_area, int bleft, struct cifsSesInfo *ses,
284 int len; 286 int len;
285 char *data = *pbcc_area; 287 char *data = *pbcc_area;
286 288
287 cFYI(1, ("bleft %d", bleft)); 289 cFYI(1, "bleft %d", bleft);
288 290
289 /* 291 /*
290 * Windows servers do not always double null terminate their final 292 * Windows servers do not always double null terminate their final
@@ -301,7 +303,7 @@ decode_unicode_ssetup(char **pbcc_area, int bleft, struct cifsSesInfo *ses,
301 303
302 kfree(ses->serverOS); 304 kfree(ses->serverOS);
303 ses->serverOS = cifs_strndup_from_ucs(data, bleft, true, nls_cp); 305 ses->serverOS = cifs_strndup_from_ucs(data, bleft, true, nls_cp);
304 cFYI(1, ("serverOS=%s", ses->serverOS)); 306 cFYI(1, "serverOS=%s", ses->serverOS);
305 len = (UniStrnlen((wchar_t *) data, bleft / 2) * 2) + 2; 307 len = (UniStrnlen((wchar_t *) data, bleft / 2) * 2) + 2;
306 data += len; 308 data += len;
307 bleft -= len; 309 bleft -= len;
@@ -310,7 +312,7 @@ decode_unicode_ssetup(char **pbcc_area, int bleft, struct cifsSesInfo *ses,
310 312
311 kfree(ses->serverNOS); 313 kfree(ses->serverNOS);
312 ses->serverNOS = cifs_strndup_from_ucs(data, bleft, true, nls_cp); 314 ses->serverNOS = cifs_strndup_from_ucs(data, bleft, true, nls_cp);
313 cFYI(1, ("serverNOS=%s", ses->serverNOS)); 315 cFYI(1, "serverNOS=%s", ses->serverNOS);
314 len = (UniStrnlen((wchar_t *) data, bleft / 2) * 2) + 2; 316 len = (UniStrnlen((wchar_t *) data, bleft / 2) * 2) + 2;
315 data += len; 317 data += len;
316 bleft -= len; 318 bleft -= len;
@@ -319,7 +321,7 @@ decode_unicode_ssetup(char **pbcc_area, int bleft, struct cifsSesInfo *ses,
319 321
320 kfree(ses->serverDomain); 322 kfree(ses->serverDomain);
321 ses->serverDomain = cifs_strndup_from_ucs(data, bleft, true, nls_cp); 323 ses->serverDomain = cifs_strndup_from_ucs(data, bleft, true, nls_cp);
322 cFYI(1, ("serverDomain=%s", ses->serverDomain)); 324 cFYI(1, "serverDomain=%s", ses->serverDomain);
323 325
324 return; 326 return;
325} 327}
@@ -332,7 +334,7 @@ static int decode_ascii_ssetup(char **pbcc_area, int bleft,
332 int len; 334 int len;
333 char *bcc_ptr = *pbcc_area; 335 char *bcc_ptr = *pbcc_area;
334 336
335 cFYI(1, ("decode sessetup ascii. bleft %d", bleft)); 337 cFYI(1, "decode sessetup ascii. bleft %d", bleft);
336 338
337 len = strnlen(bcc_ptr, bleft); 339 len = strnlen(bcc_ptr, bleft);
338 if (len >= bleft) 340 if (len >= bleft)
@@ -344,7 +346,7 @@ static int decode_ascii_ssetup(char **pbcc_area, int bleft,
344 if (ses->serverOS) 346 if (ses->serverOS)
345 strncpy(ses->serverOS, bcc_ptr, len); 347 strncpy(ses->serverOS, bcc_ptr, len);
346 if (strncmp(ses->serverOS, "OS/2", 4) == 0) { 348 if (strncmp(ses->serverOS, "OS/2", 4) == 0) {
347 cFYI(1, ("OS/2 server")); 349 cFYI(1, "OS/2 server");
348 ses->flags |= CIFS_SES_OS2; 350 ses->flags |= CIFS_SES_OS2;
349 } 351 }
350 352
@@ -373,7 +375,7 @@ static int decode_ascii_ssetup(char **pbcc_area, int bleft,
373 /* BB For newer servers which do not support Unicode, 375 /* BB For newer servers which do not support Unicode,
374 but thus do return domain here we could add parsing 376 but thus do return domain here we could add parsing
375 for it later, but it is not very important */ 377 for it later, but it is not very important */
376 cFYI(1, ("ascii: bytes left %d", bleft)); 378 cFYI(1, "ascii: bytes left %d", bleft);
377 379
378 return rc; 380 return rc;
379} 381}
@@ -384,16 +386,16 @@ static int decode_ntlmssp_challenge(char *bcc_ptr, int blob_len,
384 CHALLENGE_MESSAGE *pblob = (CHALLENGE_MESSAGE *)bcc_ptr; 386 CHALLENGE_MESSAGE *pblob = (CHALLENGE_MESSAGE *)bcc_ptr;
385 387
386 if (blob_len < sizeof(CHALLENGE_MESSAGE)) { 388 if (blob_len < sizeof(CHALLENGE_MESSAGE)) {
387 cERROR(1, ("challenge blob len %d too small", blob_len)); 389 cERROR(1, "challenge blob len %d too small", blob_len);
388 return -EINVAL; 390 return -EINVAL;
389 } 391 }
390 392
391 if (memcmp(pblob->Signature, "NTLMSSP", 8)) { 393 if (memcmp(pblob->Signature, "NTLMSSP", 8)) {
392 cERROR(1, ("blob signature incorrect %s", pblob->Signature)); 394 cERROR(1, "blob signature incorrect %s", pblob->Signature);
393 return -EINVAL; 395 return -EINVAL;
394 } 396 }
395 if (pblob->MessageType != NtLmChallenge) { 397 if (pblob->MessageType != NtLmChallenge) {
396 cERROR(1, ("Incorrect message type %d", pblob->MessageType)); 398 cERROR(1, "Incorrect message type %d", pblob->MessageType);
397 return -EINVAL; 399 return -EINVAL;
398 } 400 }
399 401
@@ -447,7 +449,7 @@ static void build_ntlmssp_negotiate_blob(unsigned char *pbuffer,
447 This function returns the length of the data in the blob */ 449 This function returns the length of the data in the blob */
448static int build_ntlmssp_auth_blob(unsigned char *pbuffer, 450static int build_ntlmssp_auth_blob(unsigned char *pbuffer,
449 struct cifsSesInfo *ses, 451 struct cifsSesInfo *ses,
450 const struct nls_table *nls_cp, int first) 452 const struct nls_table *nls_cp, bool first)
451{ 453{
452 AUTHENTICATE_MESSAGE *sec_blob = (AUTHENTICATE_MESSAGE *)pbuffer; 454 AUTHENTICATE_MESSAGE *sec_blob = (AUTHENTICATE_MESSAGE *)pbuffer;
453 __u32 flags; 455 __u32 flags;
@@ -546,7 +548,7 @@ static void setup_ntlmssp_neg_req(SESSION_SETUP_ANDX *pSMB,
546 548
547static int setup_ntlmssp_auth_req(SESSION_SETUP_ANDX *pSMB, 549static int setup_ntlmssp_auth_req(SESSION_SETUP_ANDX *pSMB,
548 struct cifsSesInfo *ses, 550 struct cifsSesInfo *ses,
549 const struct nls_table *nls, int first_time) 551 const struct nls_table *nls, bool first_time)
550{ 552{
551 int bloblen; 553 int bloblen;
552 554
@@ -559,8 +561,8 @@ static int setup_ntlmssp_auth_req(SESSION_SETUP_ANDX *pSMB,
559#endif 561#endif
560 562
561int 563int
562CIFS_SessSetup(unsigned int xid, struct cifsSesInfo *ses, int first_time, 564CIFS_SessSetup(unsigned int xid, struct cifsSesInfo *ses,
563 const struct nls_table *nls_cp) 565 const struct nls_table *nls_cp)
564{ 566{
565 int rc = 0; 567 int rc = 0;
566 int wct; 568 int wct;
@@ -577,13 +579,18 @@ CIFS_SessSetup(unsigned int xid, struct cifsSesInfo *ses, int first_time,
577 int bytes_remaining; 579 int bytes_remaining;
578 struct key *spnego_key = NULL; 580 struct key *spnego_key = NULL;
579 __le32 phase = NtLmNegotiate; /* NTLMSSP, if needed, is multistage */ 581 __le32 phase = NtLmNegotiate; /* NTLMSSP, if needed, is multistage */
582 bool first_time;
580 583
581 if (ses == NULL) 584 if (ses == NULL)
582 return -EINVAL; 585 return -EINVAL;
583 586
587 read_lock(&cifs_tcp_ses_lock);
588 first_time = is_first_ses_reconnect(ses);
589 read_unlock(&cifs_tcp_ses_lock);
590
584 type = ses->server->secType; 591 type = ses->server->secType;
585 592
586 cFYI(1, ("sess setup type %d", type)); 593 cFYI(1, "sess setup type %d", type);
587ssetup_ntlmssp_authenticate: 594ssetup_ntlmssp_authenticate:
588 if (phase == NtLmChallenge) 595 if (phase == NtLmChallenge)
589 phase = NtLmAuthenticate; /* if ntlmssp, now final phase */ 596 phase = NtLmAuthenticate; /* if ntlmssp, now final phase */
@@ -664,7 +671,7 @@ ssetup_ntlmssp_authenticate:
664 changed to do higher than lanman dialect and 671 changed to do higher than lanman dialect and
665 we reconnected would we ever calc signing_key? */ 672 we reconnected would we ever calc signing_key? */
666 673
667 cFYI(1, ("Negotiating LANMAN setting up strings")); 674 cFYI(1, "Negotiating LANMAN setting up strings");
668 /* Unicode not allowed for LANMAN dialects */ 675 /* Unicode not allowed for LANMAN dialects */
669 ascii_ssetup_strings(&bcc_ptr, ses, nls_cp); 676 ascii_ssetup_strings(&bcc_ptr, ses, nls_cp);
670#endif 677#endif
@@ -744,7 +751,7 @@ ssetup_ntlmssp_authenticate:
744 unicode_ssetup_strings(&bcc_ptr, ses, nls_cp); 751 unicode_ssetup_strings(&bcc_ptr, ses, nls_cp);
745 } else 752 } else
746 ascii_ssetup_strings(&bcc_ptr, ses, nls_cp); 753 ascii_ssetup_strings(&bcc_ptr, ses, nls_cp);
747 } else if (type == Kerberos || type == MSKerberos) { 754 } else if (type == Kerberos) {
748#ifdef CONFIG_CIFS_UPCALL 755#ifdef CONFIG_CIFS_UPCALL
749 struct cifs_spnego_msg *msg; 756 struct cifs_spnego_msg *msg;
750 spnego_key = cifs_get_spnego_key(ses); 757 spnego_key = cifs_get_spnego_key(ses);
@@ -758,17 +765,17 @@ ssetup_ntlmssp_authenticate:
758 /* check version field to make sure that cifs.upcall is 765 /* check version field to make sure that cifs.upcall is
759 sending us a response in an expected form */ 766 sending us a response in an expected form */
760 if (msg->version != CIFS_SPNEGO_UPCALL_VERSION) { 767 if (msg->version != CIFS_SPNEGO_UPCALL_VERSION) {
761 cERROR(1, ("incorrect version of cifs.upcall (expected" 768 cERROR(1, "incorrect version of cifs.upcall (expected"
762 " %d but got %d)", 769 " %d but got %d)",
763 CIFS_SPNEGO_UPCALL_VERSION, msg->version)); 770 CIFS_SPNEGO_UPCALL_VERSION, msg->version);
764 rc = -EKEYREJECTED; 771 rc = -EKEYREJECTED;
765 goto ssetup_exit; 772 goto ssetup_exit;
766 } 773 }
767 /* bail out if key is too long */ 774 /* bail out if key is too long */
768 if (msg->sesskey_len > 775 if (msg->sesskey_len >
769 sizeof(ses->server->mac_signing_key.data.krb5)) { 776 sizeof(ses->server->mac_signing_key.data.krb5)) {
770 cERROR(1, ("Kerberos signing key too long (%u bytes)", 777 cERROR(1, "Kerberos signing key too long (%u bytes)",
771 msg->sesskey_len)); 778 msg->sesskey_len);
772 rc = -EOVERFLOW; 779 rc = -EOVERFLOW;
773 goto ssetup_exit; 780 goto ssetup_exit;
774 } 781 }
@@ -796,7 +803,7 @@ ssetup_ntlmssp_authenticate:
796 /* BB: is this right? */ 803 /* BB: is this right? */
797 ascii_ssetup_strings(&bcc_ptr, ses, nls_cp); 804 ascii_ssetup_strings(&bcc_ptr, ses, nls_cp);
798#else /* ! CONFIG_CIFS_UPCALL */ 805#else /* ! CONFIG_CIFS_UPCALL */
799 cERROR(1, ("Kerberos negotiated but upcall support disabled!")); 806 cERROR(1, "Kerberos negotiated but upcall support disabled!");
800 rc = -ENOSYS; 807 rc = -ENOSYS;
801 goto ssetup_exit; 808 goto ssetup_exit;
802#endif /* CONFIG_CIFS_UPCALL */ 809#endif /* CONFIG_CIFS_UPCALL */
@@ -804,12 +811,12 @@ ssetup_ntlmssp_authenticate:
804#ifdef CONFIG_CIFS_EXPERIMENTAL 811#ifdef CONFIG_CIFS_EXPERIMENTAL
805 if (type == RawNTLMSSP) { 812 if (type == RawNTLMSSP) {
806 if ((pSMB->req.hdr.Flags2 & SMBFLG2_UNICODE) == 0) { 813 if ((pSMB->req.hdr.Flags2 & SMBFLG2_UNICODE) == 0) {
807 cERROR(1, ("NTLMSSP requires Unicode support")); 814 cERROR(1, "NTLMSSP requires Unicode support");
808 rc = -ENOSYS; 815 rc = -ENOSYS;
809 goto ssetup_exit; 816 goto ssetup_exit;
810 } 817 }
811 818
812 cFYI(1, ("ntlmssp session setup phase %d", phase)); 819 cFYI(1, "ntlmssp session setup phase %d", phase);
813 pSMB->req.hdr.Flags2 |= SMBFLG2_EXT_SEC; 820 pSMB->req.hdr.Flags2 |= SMBFLG2_EXT_SEC;
814 capabilities |= CAP_EXTENDED_SECURITY; 821 capabilities |= CAP_EXTENDED_SECURITY;
815 pSMB->req.Capabilities |= cpu_to_le32(capabilities); 822 pSMB->req.Capabilities |= cpu_to_le32(capabilities);
@@ -827,7 +834,7 @@ ssetup_ntlmssp_authenticate:
827 on the response (challenge) */ 834 on the response (challenge) */
828 smb_buf->Uid = ses->Suid; 835 smb_buf->Uid = ses->Suid;
829 } else { 836 } else {
830 cERROR(1, ("invalid phase %d", phase)); 837 cERROR(1, "invalid phase %d", phase);
831 rc = -ENOSYS; 838 rc = -ENOSYS;
832 goto ssetup_exit; 839 goto ssetup_exit;
833 } 840 }
@@ -839,12 +846,12 @@ ssetup_ntlmssp_authenticate:
839 } 846 }
840 unicode_oslm_strings(&bcc_ptr, nls_cp); 847 unicode_oslm_strings(&bcc_ptr, nls_cp);
841 } else { 848 } else {
842 cERROR(1, ("secType %d not supported!", type)); 849 cERROR(1, "secType %d not supported!", type);
843 rc = -ENOSYS; 850 rc = -ENOSYS;
844 goto ssetup_exit; 851 goto ssetup_exit;
845 } 852 }
846#else 853#else
847 cERROR(1, ("secType %d not supported!", type)); 854 cERROR(1, "secType %d not supported!", type);
848 rc = -ENOSYS; 855 rc = -ENOSYS;
849 goto ssetup_exit; 856 goto ssetup_exit;
850#endif 857#endif
@@ -862,7 +869,7 @@ ssetup_ntlmssp_authenticate:
862 CIFS_STD_OP /* not long */ | CIFS_LOG_ERROR); 869 CIFS_STD_OP /* not long */ | CIFS_LOG_ERROR);
863 /* SMB request buf freed in SendReceive2 */ 870 /* SMB request buf freed in SendReceive2 */
864 871
865 cFYI(1, ("ssetup rc from sendrecv2 is %d", rc)); 872 cFYI(1, "ssetup rc from sendrecv2 is %d", rc);
866 873
867 pSMB = (SESSION_SETUP_ANDX *)iov[0].iov_base; 874 pSMB = (SESSION_SETUP_ANDX *)iov[0].iov_base;
868 smb_buf = (struct smb_hdr *)iov[0].iov_base; 875 smb_buf = (struct smb_hdr *)iov[0].iov_base;
@@ -870,7 +877,7 @@ ssetup_ntlmssp_authenticate:
870 if ((type == RawNTLMSSP) && (smb_buf->Status.CifsError == 877 if ((type == RawNTLMSSP) && (smb_buf->Status.CifsError ==
871 cpu_to_le32(NT_STATUS_MORE_PROCESSING_REQUIRED))) { 878 cpu_to_le32(NT_STATUS_MORE_PROCESSING_REQUIRED))) {
872 if (phase != NtLmNegotiate) { 879 if (phase != NtLmNegotiate) {
873 cERROR(1, ("Unexpected more processing error")); 880 cERROR(1, "Unexpected more processing error");
874 goto ssetup_exit; 881 goto ssetup_exit;
875 } 882 }
876 /* NTLMSSP Negotiate sent now processing challenge (response) */ 883 /* NTLMSSP Negotiate sent now processing challenge (response) */
@@ -882,14 +889,14 @@ ssetup_ntlmssp_authenticate:
882 889
883 if ((smb_buf->WordCount != 3) && (smb_buf->WordCount != 4)) { 890 if ((smb_buf->WordCount != 3) && (smb_buf->WordCount != 4)) {
884 rc = -EIO; 891 rc = -EIO;
885 cERROR(1, ("bad word count %d", smb_buf->WordCount)); 892 cERROR(1, "bad word count %d", smb_buf->WordCount);
886 goto ssetup_exit; 893 goto ssetup_exit;
887 } 894 }
888 action = le16_to_cpu(pSMB->resp.Action); 895 action = le16_to_cpu(pSMB->resp.Action);
889 if (action & GUEST_LOGIN) 896 if (action & GUEST_LOGIN)
890 cFYI(1, ("Guest login")); /* BB mark SesInfo struct? */ 897 cFYI(1, "Guest login"); /* BB mark SesInfo struct? */
891 ses->Suid = smb_buf->Uid; /* UID left in wire format (le) */ 898 ses->Suid = smb_buf->Uid; /* UID left in wire format (le) */
892 cFYI(1, ("UID = %d ", ses->Suid)); 899 cFYI(1, "UID = %d ", ses->Suid);
893 /* response can have either 3 or 4 word count - Samba sends 3 */ 900 /* response can have either 3 or 4 word count - Samba sends 3 */
894 /* and lanman response is 3 */ 901 /* and lanman response is 3 */
895 bytes_remaining = BCC(smb_buf); 902 bytes_remaining = BCC(smb_buf);
@@ -899,7 +906,7 @@ ssetup_ntlmssp_authenticate:
899 __u16 blob_len; 906 __u16 blob_len;
900 blob_len = le16_to_cpu(pSMB->resp.SecurityBlobLength); 907 blob_len = le16_to_cpu(pSMB->resp.SecurityBlobLength);
901 if (blob_len > bytes_remaining) { 908 if (blob_len > bytes_remaining) {
902 cERROR(1, ("bad security blob length %d", blob_len)); 909 cERROR(1, "bad security blob length %d", blob_len);
903 rc = -EINVAL; 910 rc = -EINVAL;
904 goto ssetup_exit; 911 goto ssetup_exit;
905 } 912 }
@@ -933,7 +940,7 @@ ssetup_exit:
933 } 940 }
934 kfree(str_area); 941 kfree(str_area);
935 if (resp_buf_type == CIFS_SMALL_BUFFER) { 942 if (resp_buf_type == CIFS_SMALL_BUFFER) {
936 cFYI(1, ("ssetup freeing small buf %p", iov[0].iov_base)); 943 cFYI(1, "ssetup freeing small buf %p", iov[0].iov_base);
937 cifs_small_buf_release(iov[0].iov_base); 944 cifs_small_buf_release(iov[0].iov_base);
938 } else if (resp_buf_type == CIFS_LARGE_BUFFER) 945 } else if (resp_buf_type == CIFS_LARGE_BUFFER)
939 cifs_buf_release(iov[0].iov_base); 946 cifs_buf_release(iov[0].iov_base);
diff --git a/fs/cifs/transport.c b/fs/cifs/transport.c
index ad081fe7eb18..82f78c4d6978 100644
--- a/fs/cifs/transport.c
+++ b/fs/cifs/transport.c
@@ -35,7 +35,6 @@
35#include "cifs_debug.h" 35#include "cifs_debug.h"
36 36
37extern mempool_t *cifs_mid_poolp; 37extern mempool_t *cifs_mid_poolp;
38extern struct kmem_cache *cifs_oplock_cachep;
39 38
40static struct mid_q_entry * 39static struct mid_q_entry *
41AllocMidQEntry(const struct smb_hdr *smb_buffer, struct TCP_Server_Info *server) 40AllocMidQEntry(const struct smb_hdr *smb_buffer, struct TCP_Server_Info *server)
@@ -43,7 +42,7 @@ AllocMidQEntry(const struct smb_hdr *smb_buffer, struct TCP_Server_Info *server)
43 struct mid_q_entry *temp; 42 struct mid_q_entry *temp;
44 43
45 if (server == NULL) { 44 if (server == NULL) {
46 cERROR(1, ("Null TCP session in AllocMidQEntry")); 45 cERROR(1, "Null TCP session in AllocMidQEntry");
47 return NULL; 46 return NULL;
48 } 47 }
49 48
@@ -55,7 +54,7 @@ AllocMidQEntry(const struct smb_hdr *smb_buffer, struct TCP_Server_Info *server)
55 temp->mid = smb_buffer->Mid; /* always LE */ 54 temp->mid = smb_buffer->Mid; /* always LE */
56 temp->pid = current->pid; 55 temp->pid = current->pid;
57 temp->command = smb_buffer->Command; 56 temp->command = smb_buffer->Command;
58 cFYI(1, ("For smb_command %d", temp->command)); 57 cFYI(1, "For smb_command %d", temp->command);
59 /* do_gettimeofday(&temp->when_sent);*/ /* easier to use jiffies */ 58 /* do_gettimeofday(&temp->when_sent);*/ /* easier to use jiffies */
60 /* when mid allocated can be before when sent */ 59 /* when mid allocated can be before when sent */
61 temp->when_alloc = jiffies; 60 temp->when_alloc = jiffies;
@@ -140,7 +139,7 @@ smb_sendv(struct TCP_Server_Info *server, struct kvec *iov, int n_vec)
140 total_len += iov[i].iov_len; 139 total_len += iov[i].iov_len;
141 140
142 smb_buffer->smb_buf_length = cpu_to_be32(smb_buffer->smb_buf_length); 141 smb_buffer->smb_buf_length = cpu_to_be32(smb_buffer->smb_buf_length);
143 cFYI(1, ("Sending smb: total_len %d", total_len)); 142 cFYI(1, "Sending smb: total_len %d", total_len);
144 dump_smb(smb_buffer, len); 143 dump_smb(smb_buffer, len);
145 144
146 i = 0; 145 i = 0;
@@ -168,9 +167,8 @@ smb_sendv(struct TCP_Server_Info *server, struct kvec *iov, int n_vec)
168 reconnect which may clear the network problem. 167 reconnect which may clear the network problem.
169 */ 168 */
170 if ((i >= 14) || (!server->noblocksnd && (i > 2))) { 169 if ((i >= 14) || (!server->noblocksnd && (i > 2))) {
171 cERROR(1, 170 cERROR(1, "sends on sock %p stuck for 15 seconds",
172 ("sends on sock %p stuck for 15 seconds", 171 ssocket);
173 ssocket));
174 rc = -EAGAIN; 172 rc = -EAGAIN;
175 break; 173 break;
176 } 174 }
@@ -184,13 +182,13 @@ smb_sendv(struct TCP_Server_Info *server, struct kvec *iov, int n_vec)
184 total_len = 0; 182 total_len = 0;
185 break; 183 break;
186 } else if (rc > total_len) { 184 } else if (rc > total_len) {
187 cERROR(1, ("sent %d requested %d", rc, total_len)); 185 cERROR(1, "sent %d requested %d", rc, total_len);
188 break; 186 break;
189 } 187 }
190 if (rc == 0) { 188 if (rc == 0) {
191 /* should never happen, letting socket clear before 189 /* should never happen, letting socket clear before
192 retrying is our only obvious option here */ 190 retrying is our only obvious option here */
193 cERROR(1, ("tcp sent no data")); 191 cERROR(1, "tcp sent no data");
194 msleep(500); 192 msleep(500);
195 continue; 193 continue;
196 } 194 }
@@ -213,8 +211,8 @@ smb_sendv(struct TCP_Server_Info *server, struct kvec *iov, int n_vec)
213 } 211 }
214 212
215 if ((total_len > 0) && (total_len != smb_buf_length + 4)) { 213 if ((total_len > 0) && (total_len != smb_buf_length + 4)) {
216 cFYI(1, ("partial send (%d remaining), terminating session", 214 cFYI(1, "partial send (%d remaining), terminating session",
217 total_len)); 215 total_len);
218 /* If we have only sent part of an SMB then the next SMB 216 /* If we have only sent part of an SMB then the next SMB
219 could be taken as the remainder of this one. We need 217 could be taken as the remainder of this one. We need
220 to kill the socket so the server throws away the partial 218 to kill the socket so the server throws away the partial
@@ -223,7 +221,7 @@ smb_sendv(struct TCP_Server_Info *server, struct kvec *iov, int n_vec)
223 } 221 }
224 222
225 if (rc < 0) { 223 if (rc < 0) {
226 cERROR(1, ("Error %d sending data on socket to server", rc)); 224 cERROR(1, "Error %d sending data on socket to server", rc);
227 } else 225 } else
228 rc = 0; 226 rc = 0;
229 227
@@ -296,7 +294,7 @@ static int allocate_mid(struct cifsSesInfo *ses, struct smb_hdr *in_buf,
296 } 294 }
297 295
298 if (ses->server->tcpStatus == CifsNeedReconnect) { 296 if (ses->server->tcpStatus == CifsNeedReconnect) {
299 cFYI(1, ("tcp session dead - return to caller to retry")); 297 cFYI(1, "tcp session dead - return to caller to retry");
300 return -EAGAIN; 298 return -EAGAIN;
301 } 299 }
302 300
@@ -348,7 +346,7 @@ static int wait_for_response(struct cifsSesInfo *ses,
348 lrt += time_to_wait; 346 lrt += time_to_wait;
349 if (time_after(jiffies, lrt)) { 347 if (time_after(jiffies, lrt)) {
350 /* No replies for time_to_wait. */ 348 /* No replies for time_to_wait. */
351 cERROR(1, ("server not responding")); 349 cERROR(1, "server not responding");
352 return -1; 350 return -1;
353 } 351 }
354 } else { 352 } else {
@@ -379,7 +377,7 @@ SendReceiveNoRsp(const unsigned int xid, struct cifsSesInfo *ses,
379 iov[0].iov_len = in_buf->smb_buf_length + 4; 377 iov[0].iov_len = in_buf->smb_buf_length + 4;
380 flags |= CIFS_NO_RESP; 378 flags |= CIFS_NO_RESP;
381 rc = SendReceive2(xid, ses, iov, 1, &resp_buf_type, flags); 379 rc = SendReceive2(xid, ses, iov, 1, &resp_buf_type, flags);
382 cFYI(DBG2, ("SendRcvNoRsp flags %d rc %d", flags, rc)); 380 cFYI(DBG2, "SendRcvNoRsp flags %d rc %d", flags, rc);
383 381
384 return rc; 382 return rc;
385} 383}
@@ -402,7 +400,7 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
402 400
403 if ((ses == NULL) || (ses->server == NULL)) { 401 if ((ses == NULL) || (ses->server == NULL)) {
404 cifs_small_buf_release(in_buf); 402 cifs_small_buf_release(in_buf);
405 cERROR(1, ("Null session")); 403 cERROR(1, "Null session");
406 return -EIO; 404 return -EIO;
407 } 405 }
408 406
@@ -471,7 +469,7 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
471 else if (long_op == CIFS_BLOCKING_OP) 469 else if (long_op == CIFS_BLOCKING_OP)
472 timeout = 0x7FFFFFFF; /* large, but not so large as to wrap */ 470 timeout = 0x7FFFFFFF; /* large, but not so large as to wrap */
473 else { 471 else {
474 cERROR(1, ("unknown timeout flag %d", long_op)); 472 cERROR(1, "unknown timeout flag %d", long_op);
475 rc = -EIO; 473 rc = -EIO;
476 goto out; 474 goto out;
477 } 475 }
@@ -490,8 +488,8 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
490 spin_lock(&GlobalMid_Lock); 488 spin_lock(&GlobalMid_Lock);
491 489
492 if (midQ->resp_buf == NULL) { 490 if (midQ->resp_buf == NULL) {
493 cERROR(1, ("No response to cmd %d mid %d", 491 cERROR(1, "No response to cmd %d mid %d",
494 midQ->command, midQ->mid)); 492 midQ->command, midQ->mid);
495 if (midQ->midState == MID_REQUEST_SUBMITTED) { 493 if (midQ->midState == MID_REQUEST_SUBMITTED) {
496 if (ses->server->tcpStatus == CifsExiting) 494 if (ses->server->tcpStatus == CifsExiting)
497 rc = -EHOSTDOWN; 495 rc = -EHOSTDOWN;
@@ -504,7 +502,7 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
504 if (rc != -EHOSTDOWN) { 502 if (rc != -EHOSTDOWN) {
505 if (midQ->midState == MID_RETRY_NEEDED) { 503 if (midQ->midState == MID_RETRY_NEEDED) {
506 rc = -EAGAIN; 504 rc = -EAGAIN;
507 cFYI(1, ("marking request for retry")); 505 cFYI(1, "marking request for retry");
508 } else { 506 } else {
509 rc = -EIO; 507 rc = -EIO;
510 } 508 }
@@ -521,8 +519,8 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
521 receive_len = midQ->resp_buf->smb_buf_length; 519 receive_len = midQ->resp_buf->smb_buf_length;
522 520
523 if (receive_len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE) { 521 if (receive_len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE) {
524 cERROR(1, ("Frame too large received. Length: %d Xid: %d", 522 cERROR(1, "Frame too large received. Length: %d Xid: %d",
525 receive_len, xid)); 523 receive_len, xid);
526 rc = -EIO; 524 rc = -EIO;
527 goto out; 525 goto out;
528 } 526 }
@@ -548,7 +546,7 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
548 &ses->server->mac_signing_key, 546 &ses->server->mac_signing_key,
549 midQ->sequence_number+1); 547 midQ->sequence_number+1);
550 if (rc) { 548 if (rc) {
551 cERROR(1, ("Unexpected SMB signature")); 549 cERROR(1, "Unexpected SMB signature");
552 /* BB FIXME add code to kill session */ 550 /* BB FIXME add code to kill session */
553 } 551 }
554 } 552 }
@@ -569,7 +567,7 @@ SendReceive2(const unsigned int xid, struct cifsSesInfo *ses,
569 DeleteMidQEntry */ 567 DeleteMidQEntry */
570 } else { 568 } else {
571 rc = -EIO; 569 rc = -EIO;
572 cFYI(1, ("Bad MID state?")); 570 cFYI(1, "Bad MID state?");
573 } 571 }
574 572
575out: 573out:
@@ -591,11 +589,11 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
591 struct mid_q_entry *midQ; 589 struct mid_q_entry *midQ;
592 590
593 if (ses == NULL) { 591 if (ses == NULL) {
594 cERROR(1, ("Null smb session")); 592 cERROR(1, "Null smb session");
595 return -EIO; 593 return -EIO;
596 } 594 }
597 if (ses->server == NULL) { 595 if (ses->server == NULL) {
598 cERROR(1, ("Null tcp session")); 596 cERROR(1, "Null tcp session");
599 return -EIO; 597 return -EIO;
600 } 598 }
601 599
@@ -607,8 +605,8 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
607 use ses->maxReq */ 605 use ses->maxReq */
608 606
609 if (in_buf->smb_buf_length > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) { 607 if (in_buf->smb_buf_length > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) {
610 cERROR(1, ("Illegal length, greater than maximum frame, %d", 608 cERROR(1, "Illegal length, greater than maximum frame, %d",
611 in_buf->smb_buf_length)); 609 in_buf->smb_buf_length);
612 return -EIO; 610 return -EIO;
613 } 611 }
614 612
@@ -665,7 +663,7 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
665 else if (long_op == CIFS_BLOCKING_OP) 663 else if (long_op == CIFS_BLOCKING_OP)
666 timeout = 0x7FFFFFFF; /* large but no so large as to wrap */ 664 timeout = 0x7FFFFFFF; /* large but no so large as to wrap */
667 else { 665 else {
668 cERROR(1, ("unknown timeout flag %d", long_op)); 666 cERROR(1, "unknown timeout flag %d", long_op);
669 rc = -EIO; 667 rc = -EIO;
670 goto out; 668 goto out;
671 } 669 }
@@ -681,8 +679,8 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
681 679
682 spin_lock(&GlobalMid_Lock); 680 spin_lock(&GlobalMid_Lock);
683 if (midQ->resp_buf == NULL) { 681 if (midQ->resp_buf == NULL) {
684 cERROR(1, ("No response for cmd %d mid %d", 682 cERROR(1, "No response for cmd %d mid %d",
685 midQ->command, midQ->mid)); 683 midQ->command, midQ->mid);
686 if (midQ->midState == MID_REQUEST_SUBMITTED) { 684 if (midQ->midState == MID_REQUEST_SUBMITTED) {
687 if (ses->server->tcpStatus == CifsExiting) 685 if (ses->server->tcpStatus == CifsExiting)
688 rc = -EHOSTDOWN; 686 rc = -EHOSTDOWN;
@@ -695,7 +693,7 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
695 if (rc != -EHOSTDOWN) { 693 if (rc != -EHOSTDOWN) {
696 if (midQ->midState == MID_RETRY_NEEDED) { 694 if (midQ->midState == MID_RETRY_NEEDED) {
697 rc = -EAGAIN; 695 rc = -EAGAIN;
698 cFYI(1, ("marking request for retry")); 696 cFYI(1, "marking request for retry");
699 } else { 697 } else {
700 rc = -EIO; 698 rc = -EIO;
701 } 699 }
@@ -712,8 +710,8 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
712 receive_len = midQ->resp_buf->smb_buf_length; 710 receive_len = midQ->resp_buf->smb_buf_length;
713 711
714 if (receive_len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE) { 712 if (receive_len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE) {
715 cERROR(1, ("Frame too large received. Length: %d Xid: %d", 713 cERROR(1, "Frame too large received. Length: %d Xid: %d",
716 receive_len, xid)); 714 receive_len, xid);
717 rc = -EIO; 715 rc = -EIO;
718 goto out; 716 goto out;
719 } 717 }
@@ -736,7 +734,7 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
736 &ses->server->mac_signing_key, 734 &ses->server->mac_signing_key,
737 midQ->sequence_number+1); 735 midQ->sequence_number+1);
738 if (rc) { 736 if (rc) {
739 cERROR(1, ("Unexpected SMB signature")); 737 cERROR(1, "Unexpected SMB signature");
740 /* BB FIXME add code to kill session */ 738 /* BB FIXME add code to kill session */
741 } 739 }
742 } 740 }
@@ -753,7 +751,7 @@ SendReceive(const unsigned int xid, struct cifsSesInfo *ses,
753 BCC(out_buf) = le16_to_cpu(BCC_LE(out_buf)); 751 BCC(out_buf) = le16_to_cpu(BCC_LE(out_buf));
754 } else { 752 } else {
755 rc = -EIO; 753 rc = -EIO;
756 cERROR(1, ("Bad MID state?")); 754 cERROR(1, "Bad MID state?");
757 } 755 }
758 756
759out: 757out:
@@ -824,13 +822,13 @@ SendReceiveBlockingLock(const unsigned int xid, struct cifsTconInfo *tcon,
824 struct cifsSesInfo *ses; 822 struct cifsSesInfo *ses;
825 823
826 if (tcon == NULL || tcon->ses == NULL) { 824 if (tcon == NULL || tcon->ses == NULL) {
827 cERROR(1, ("Null smb session")); 825 cERROR(1, "Null smb session");
828 return -EIO; 826 return -EIO;
829 } 827 }
830 ses = tcon->ses; 828 ses = tcon->ses;
831 829
832 if (ses->server == NULL) { 830 if (ses->server == NULL) {
833 cERROR(1, ("Null tcp session")); 831 cERROR(1, "Null tcp session");
834 return -EIO; 832 return -EIO;
835 } 833 }
836 834
@@ -842,8 +840,8 @@ SendReceiveBlockingLock(const unsigned int xid, struct cifsTconInfo *tcon,
842 use ses->maxReq */ 840 use ses->maxReq */
843 841
844 if (in_buf->smb_buf_length > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) { 842 if (in_buf->smb_buf_length > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE - 4) {
845 cERROR(1, ("Illegal length, greater than maximum frame, %d", 843 cERROR(1, "Illegal length, greater than maximum frame, %d",
846 in_buf->smb_buf_length)); 844 in_buf->smb_buf_length);
847 return -EIO; 845 return -EIO;
848 } 846 }
849 847
@@ -933,8 +931,8 @@ SendReceiveBlockingLock(const unsigned int xid, struct cifsTconInfo *tcon,
933 spin_unlock(&GlobalMid_Lock); 931 spin_unlock(&GlobalMid_Lock);
934 receive_len = midQ->resp_buf->smb_buf_length; 932 receive_len = midQ->resp_buf->smb_buf_length;
935 } else { 933 } else {
936 cERROR(1, ("No response for cmd %d mid %d", 934 cERROR(1, "No response for cmd %d mid %d",
937 midQ->command, midQ->mid)); 935 midQ->command, midQ->mid);
938 if (midQ->midState == MID_REQUEST_SUBMITTED) { 936 if (midQ->midState == MID_REQUEST_SUBMITTED) {
939 if (ses->server->tcpStatus == CifsExiting) 937 if (ses->server->tcpStatus == CifsExiting)
940 rc = -EHOSTDOWN; 938 rc = -EHOSTDOWN;
@@ -947,7 +945,7 @@ SendReceiveBlockingLock(const unsigned int xid, struct cifsTconInfo *tcon,
947 if (rc != -EHOSTDOWN) { 945 if (rc != -EHOSTDOWN) {
948 if (midQ->midState == MID_RETRY_NEEDED) { 946 if (midQ->midState == MID_RETRY_NEEDED) {
949 rc = -EAGAIN; 947 rc = -EAGAIN;
950 cFYI(1, ("marking request for retry")); 948 cFYI(1, "marking request for retry");
951 } else { 949 } else {
952 rc = -EIO; 950 rc = -EIO;
953 } 951 }
@@ -958,8 +956,8 @@ SendReceiveBlockingLock(const unsigned int xid, struct cifsTconInfo *tcon,
958 } 956 }
959 957
960 if (receive_len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE) { 958 if (receive_len > CIFSMaxBufSize + MAX_CIFS_HDR_SIZE) {
961 cERROR(1, ("Frame too large received. Length: %d Xid: %d", 959 cERROR(1, "Frame too large received. Length: %d Xid: %d",
962 receive_len, xid)); 960 receive_len, xid);
963 rc = -EIO; 961 rc = -EIO;
964 goto out; 962 goto out;
965 } 963 }
@@ -968,7 +966,7 @@ SendReceiveBlockingLock(const unsigned int xid, struct cifsTconInfo *tcon,
968 966
969 if ((out_buf == NULL) || (midQ->midState != MID_RESPONSE_RECEIVED)) { 967 if ((out_buf == NULL) || (midQ->midState != MID_RESPONSE_RECEIVED)) {
970 rc = -EIO; 968 rc = -EIO;
971 cERROR(1, ("Bad MID state?")); 969 cERROR(1, "Bad MID state?");
972 goto out; 970 goto out;
973 } 971 }
974 972
@@ -986,7 +984,7 @@ SendReceiveBlockingLock(const unsigned int xid, struct cifsTconInfo *tcon,
986 &ses->server->mac_signing_key, 984 &ses->server->mac_signing_key,
987 midQ->sequence_number+1); 985 midQ->sequence_number+1);
988 if (rc) { 986 if (rc) {
989 cERROR(1, ("Unexpected SMB signature")); 987 cERROR(1, "Unexpected SMB signature");
990 /* BB FIXME add code to kill session */ 988 /* BB FIXME add code to kill session */
991 } 989 }
992 } 990 }
diff --git a/fs/cifs/xattr.c b/fs/cifs/xattr.c
index f555ce077d4f..a1509207bfa6 100644
--- a/fs/cifs/xattr.c
+++ b/fs/cifs/xattr.c
@@ -70,12 +70,12 @@ int cifs_removexattr(struct dentry *direntry, const char *ea_name)
70 return rc; 70 return rc;
71 } 71 }
72 if (ea_name == NULL) { 72 if (ea_name == NULL) {
73 cFYI(1, ("Null xattr names not supported")); 73 cFYI(1, "Null xattr names not supported");
74 } else if (strncmp(ea_name, CIFS_XATTR_USER_PREFIX, 5) 74 } else if (strncmp(ea_name, CIFS_XATTR_USER_PREFIX, 5)
75 && (strncmp(ea_name, CIFS_XATTR_OS2_PREFIX, 4))) { 75 && (strncmp(ea_name, CIFS_XATTR_OS2_PREFIX, 4))) {
76 cFYI(1, 76 cFYI(1,
77 ("illegal xattr request %s (only user namespace supported)", 77 "illegal xattr request %s (only user namespace supported)",
78 ea_name)); 78 ea_name);
79 /* BB what if no namespace prefix? */ 79 /* BB what if no namespace prefix? */
80 /* Should we just pass them to server, except for 80 /* Should we just pass them to server, except for
81 system and perhaps security prefixes? */ 81 system and perhaps security prefixes? */
@@ -131,19 +131,19 @@ int cifs_setxattr(struct dentry *direntry, const char *ea_name,
131 search server for EAs or streams to 131 search server for EAs or streams to
132 returns as xattrs */ 132 returns as xattrs */
133 if (value_size > MAX_EA_VALUE_SIZE) { 133 if (value_size > MAX_EA_VALUE_SIZE) {
134 cFYI(1, ("size of EA value too large")); 134 cFYI(1, "size of EA value too large");
135 kfree(full_path); 135 kfree(full_path);
136 FreeXid(xid); 136 FreeXid(xid);
137 return -EOPNOTSUPP; 137 return -EOPNOTSUPP;
138 } 138 }
139 139
140 if (ea_name == NULL) { 140 if (ea_name == NULL) {
141 cFYI(1, ("Null xattr names not supported")); 141 cFYI(1, "Null xattr names not supported");
142 } else if (strncmp(ea_name, CIFS_XATTR_USER_PREFIX, 5) == 0) { 142 } else if (strncmp(ea_name, CIFS_XATTR_USER_PREFIX, 5) == 0) {
143 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR) 143 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR)
144 goto set_ea_exit; 144 goto set_ea_exit;
145 if (strncmp(ea_name, CIFS_XATTR_DOS_ATTRIB, 14) == 0) 145 if (strncmp(ea_name, CIFS_XATTR_DOS_ATTRIB, 14) == 0)
146 cFYI(1, ("attempt to set cifs inode metadata")); 146 cFYI(1, "attempt to set cifs inode metadata");
147 147
148 ea_name += 5; /* skip past user. prefix */ 148 ea_name += 5; /* skip past user. prefix */
149 rc = CIFSSMBSetEA(xid, pTcon, full_path, ea_name, ea_value, 149 rc = CIFSSMBSetEA(xid, pTcon, full_path, ea_name, ea_value,
@@ -169,9 +169,9 @@ int cifs_setxattr(struct dentry *direntry, const char *ea_name,
169 ACL_TYPE_ACCESS, cifs_sb->local_nls, 169 ACL_TYPE_ACCESS, cifs_sb->local_nls,
170 cifs_sb->mnt_cifs_flags & 170 cifs_sb->mnt_cifs_flags &
171 CIFS_MOUNT_MAP_SPECIAL_CHR); 171 CIFS_MOUNT_MAP_SPECIAL_CHR);
172 cFYI(1, ("set POSIX ACL rc %d", rc)); 172 cFYI(1, "set POSIX ACL rc %d", rc);
173#else 173#else
174 cFYI(1, ("set POSIX ACL not supported")); 174 cFYI(1, "set POSIX ACL not supported");
175#endif 175#endif
176 } else if (strncmp(ea_name, POSIX_ACL_XATTR_DEFAULT, 176 } else if (strncmp(ea_name, POSIX_ACL_XATTR_DEFAULT,
177 strlen(POSIX_ACL_XATTR_DEFAULT)) == 0) { 177 strlen(POSIX_ACL_XATTR_DEFAULT)) == 0) {
@@ -182,13 +182,13 @@ int cifs_setxattr(struct dentry *direntry, const char *ea_name,
182 ACL_TYPE_DEFAULT, cifs_sb->local_nls, 182 ACL_TYPE_DEFAULT, cifs_sb->local_nls,
183 cifs_sb->mnt_cifs_flags & 183 cifs_sb->mnt_cifs_flags &
184 CIFS_MOUNT_MAP_SPECIAL_CHR); 184 CIFS_MOUNT_MAP_SPECIAL_CHR);
185 cFYI(1, ("set POSIX default ACL rc %d", rc)); 185 cFYI(1, "set POSIX default ACL rc %d", rc);
186#else 186#else
187 cFYI(1, ("set default POSIX ACL not supported")); 187 cFYI(1, "set default POSIX ACL not supported");
188#endif 188#endif
189 } else { 189 } else {
190 cFYI(1, ("illegal xattr request %s (only user namespace" 190 cFYI(1, "illegal xattr request %s (only user namespace"
191 " supported)", ea_name)); 191 " supported)", ea_name);
192 /* BB what if no namespace prefix? */ 192 /* BB what if no namespace prefix? */
193 /* Should we just pass them to server, except for 193 /* Should we just pass them to server, except for
194 system and perhaps security prefixes? */ 194 system and perhaps security prefixes? */
@@ -235,13 +235,13 @@ ssize_t cifs_getxattr(struct dentry *direntry, const char *ea_name,
235 /* return dos attributes as pseudo xattr */ 235 /* return dos attributes as pseudo xattr */
236 /* return alt name if available as pseudo attr */ 236 /* return alt name if available as pseudo attr */
237 if (ea_name == NULL) { 237 if (ea_name == NULL) {
238 cFYI(1, ("Null xattr names not supported")); 238 cFYI(1, "Null xattr names not supported");
239 } else if (strncmp(ea_name, CIFS_XATTR_USER_PREFIX, 5) == 0) { 239 } else if (strncmp(ea_name, CIFS_XATTR_USER_PREFIX, 5) == 0) {
240 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR) 240 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR)
241 goto get_ea_exit; 241 goto get_ea_exit;
242 242
243 if (strncmp(ea_name, CIFS_XATTR_DOS_ATTRIB, 14) == 0) { 243 if (strncmp(ea_name, CIFS_XATTR_DOS_ATTRIB, 14) == 0) {
244 cFYI(1, ("attempt to query cifs inode metadata")); 244 cFYI(1, "attempt to query cifs inode metadata");
245 /* revalidate/getattr then populate from inode */ 245 /* revalidate/getattr then populate from inode */
246 } /* BB add else when above is implemented */ 246 } /* BB add else when above is implemented */
247 ea_name += 5; /* skip past user. prefix */ 247 ea_name += 5; /* skip past user. prefix */
@@ -287,7 +287,7 @@ ssize_t cifs_getxattr(struct dentry *direntry, const char *ea_name,
287 } 287 }
288#endif /* EXPERIMENTAL */ 288#endif /* EXPERIMENTAL */
289#else 289#else
290 cFYI(1, ("query POSIX ACL not supported yet")); 290 cFYI(1, "query POSIX ACL not supported yet");
291#endif /* CONFIG_CIFS_POSIX */ 291#endif /* CONFIG_CIFS_POSIX */
292 } else if (strncmp(ea_name, POSIX_ACL_XATTR_DEFAULT, 292 } else if (strncmp(ea_name, POSIX_ACL_XATTR_DEFAULT,
293 strlen(POSIX_ACL_XATTR_DEFAULT)) == 0) { 293 strlen(POSIX_ACL_XATTR_DEFAULT)) == 0) {
@@ -299,18 +299,18 @@ ssize_t cifs_getxattr(struct dentry *direntry, const char *ea_name,
299 cifs_sb->mnt_cifs_flags & 299 cifs_sb->mnt_cifs_flags &
300 CIFS_MOUNT_MAP_SPECIAL_CHR); 300 CIFS_MOUNT_MAP_SPECIAL_CHR);
301#else 301#else
302 cFYI(1, ("query POSIX default ACL not supported yet")); 302 cFYI(1, "query POSIX default ACL not supported yet");
303#endif 303#endif
304 } else if (strncmp(ea_name, 304 } else if (strncmp(ea_name,
305 CIFS_XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN) == 0) { 305 CIFS_XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN) == 0) {
306 cFYI(1, ("Trusted xattr namespace not supported yet")); 306 cFYI(1, "Trusted xattr namespace not supported yet");
307 } else if (strncmp(ea_name, 307 } else if (strncmp(ea_name,
308 CIFS_XATTR_SECURITY_PREFIX, XATTR_SECURITY_PREFIX_LEN) == 0) { 308 CIFS_XATTR_SECURITY_PREFIX, XATTR_SECURITY_PREFIX_LEN) == 0) {
309 cFYI(1, ("Security xattr namespace not supported yet")); 309 cFYI(1, "Security xattr namespace not supported yet");
310 } else 310 } else
311 cFYI(1, 311 cFYI(1,
312 ("illegal xattr request %s (only user namespace supported)", 312 "illegal xattr request %s (only user namespace supported)",
313 ea_name)); 313 ea_name);
314 314
315 /* We could add an additional check for streams ie 315 /* We could add an additional check for streams ie
316 if proc/fs/cifs/streamstoxattr is set then 316 if proc/fs/cifs/streamstoxattr is set then
diff --git a/fs/configfs/dir.c b/fs/configfs/dir.c
index 8e48b52205aa..0b502f80c691 100644
--- a/fs/configfs/dir.c
+++ b/fs/configfs/dir.c
@@ -645,6 +645,7 @@ static void detach_groups(struct config_group *group)
645 645
646 configfs_detach_group(sd->s_element); 646 configfs_detach_group(sd->s_element);
647 child->d_inode->i_flags |= S_DEAD; 647 child->d_inode->i_flags |= S_DEAD;
648 dont_mount(child);
648 649
649 mutex_unlock(&child->d_inode->i_mutex); 650 mutex_unlock(&child->d_inode->i_mutex);
650 651
@@ -840,6 +841,7 @@ static int configfs_attach_item(struct config_item *parent_item,
840 mutex_lock(&dentry->d_inode->i_mutex); 841 mutex_lock(&dentry->d_inode->i_mutex);
841 configfs_remove_dir(item); 842 configfs_remove_dir(item);
842 dentry->d_inode->i_flags |= S_DEAD; 843 dentry->d_inode->i_flags |= S_DEAD;
844 dont_mount(dentry);
843 mutex_unlock(&dentry->d_inode->i_mutex); 845 mutex_unlock(&dentry->d_inode->i_mutex);
844 d_delete(dentry); 846 d_delete(dentry);
845 } 847 }
@@ -882,6 +884,7 @@ static int configfs_attach_group(struct config_item *parent_item,
882 if (ret) { 884 if (ret) {
883 configfs_detach_item(item); 885 configfs_detach_item(item);
884 dentry->d_inode->i_flags |= S_DEAD; 886 dentry->d_inode->i_flags |= S_DEAD;
887 dont_mount(dentry);
885 } 888 }
886 configfs_adjust_dir_dirent_depth_after_populate(sd); 889 configfs_adjust_dir_dirent_depth_after_populate(sd);
887 mutex_unlock(&dentry->d_inode->i_mutex); 890 mutex_unlock(&dentry->d_inode->i_mutex);
@@ -1725,6 +1728,7 @@ void configfs_unregister_subsystem(struct configfs_subsystem *subsys)
1725 mutex_unlock(&configfs_symlink_mutex); 1728 mutex_unlock(&configfs_symlink_mutex);
1726 configfs_detach_group(&group->cg_item); 1729 configfs_detach_group(&group->cg_item);
1727 dentry->d_inode->i_flags |= S_DEAD; 1730 dentry->d_inode->i_flags |= S_DEAD;
1731 dont_mount(dentry);
1728 mutex_unlock(&dentry->d_inode->i_mutex); 1732 mutex_unlock(&dentry->d_inode->i_mutex);
1729 1733
1730 d_delete(dentry); 1734 d_delete(dentry);
diff --git a/fs/eventpoll.c b/fs/eventpoll.c
index bd056a5b4efc..3817149919cb 100644
--- a/fs/eventpoll.c
+++ b/fs/eventpoll.c
@@ -1140,8 +1140,7 @@ retry:
1140 * ep_poll_callback() when events will become available. 1140 * ep_poll_callback() when events will become available.
1141 */ 1141 */
1142 init_waitqueue_entry(&wait, current); 1142 init_waitqueue_entry(&wait, current);
1143 wait.flags |= WQ_FLAG_EXCLUSIVE; 1143 __add_wait_queue_exclusive(&ep->wq, &wait);
1144 __add_wait_queue(&ep->wq, &wait);
1145 1144
1146 for (;;) { 1145 for (;;) {
1147 /* 1146 /*
diff --git a/fs/jfs/super.c b/fs/jfs/super.c
index 157382fa6256..b66832ac33ac 100644
--- a/fs/jfs/super.c
+++ b/fs/jfs/super.c
@@ -446,10 +446,8 @@ static int jfs_fill_super(struct super_block *sb, void *data, int silent)
446 /* initialize the mount flag and determine the default error handler */ 446 /* initialize the mount flag and determine the default error handler */
447 flag = JFS_ERR_REMOUNT_RO; 447 flag = JFS_ERR_REMOUNT_RO;
448 448
449 if (!parse_options((char *) data, sb, &newLVSize, &flag)) { 449 if (!parse_options((char *) data, sb, &newLVSize, &flag))
450 kfree(sbi); 450 goto out_kfree;
451 return -EINVAL;
452 }
453 sbi->flag = flag; 451 sbi->flag = flag;
454 452
455#ifdef CONFIG_JFS_POSIX_ACL 453#ifdef CONFIG_JFS_POSIX_ACL
@@ -458,7 +456,7 @@ static int jfs_fill_super(struct super_block *sb, void *data, int silent)
458 456
459 if (newLVSize) { 457 if (newLVSize) {
460 printk(KERN_ERR "resize option for remount only\n"); 458 printk(KERN_ERR "resize option for remount only\n");
461 return -EINVAL; 459 goto out_kfree;
462 } 460 }
463 461
464 /* 462 /*
@@ -478,7 +476,7 @@ static int jfs_fill_super(struct super_block *sb, void *data, int silent)
478 inode = new_inode(sb); 476 inode = new_inode(sb);
479 if (inode == NULL) { 477 if (inode == NULL) {
480 ret = -ENOMEM; 478 ret = -ENOMEM;
481 goto out_kfree; 479 goto out_unload;
482 } 480 }
483 inode->i_ino = 0; 481 inode->i_ino = 0;
484 inode->i_nlink = 1; 482 inode->i_nlink = 1;
@@ -550,9 +548,10 @@ out_mount_failed:
550 make_bad_inode(sbi->direct_inode); 548 make_bad_inode(sbi->direct_inode);
551 iput(sbi->direct_inode); 549 iput(sbi->direct_inode);
552 sbi->direct_inode = NULL; 550 sbi->direct_inode = NULL;
553out_kfree: 551out_unload:
554 if (sbi->nls_tab) 552 if (sbi->nls_tab)
555 unload_nls(sbi->nls_tab); 553 unload_nls(sbi->nls_tab);
554out_kfree:
556 kfree(sbi); 555 kfree(sbi);
557 return ret; 556 return ret;
558} 557}
diff --git a/fs/logfs/dev_bdev.c b/fs/logfs/dev_bdev.c
index 243c00071f76..9bd2ce2a3040 100644
--- a/fs/logfs/dev_bdev.c
+++ b/fs/logfs/dev_bdev.c
@@ -303,6 +303,11 @@ static void bdev_put_device(struct super_block *sb)
303 close_bdev_exclusive(logfs_super(sb)->s_bdev, FMODE_READ|FMODE_WRITE); 303 close_bdev_exclusive(logfs_super(sb)->s_bdev, FMODE_READ|FMODE_WRITE);
304} 304}
305 305
306static int bdev_can_write_buf(struct super_block *sb, u64 ofs)
307{
308 return 0;
309}
310
306static const struct logfs_device_ops bd_devops = { 311static const struct logfs_device_ops bd_devops = {
307 .find_first_sb = bdev_find_first_sb, 312 .find_first_sb = bdev_find_first_sb,
308 .find_last_sb = bdev_find_last_sb, 313 .find_last_sb = bdev_find_last_sb,
@@ -310,6 +315,7 @@ static const struct logfs_device_ops bd_devops = {
310 .readpage = bdev_readpage, 315 .readpage = bdev_readpage,
311 .writeseg = bdev_writeseg, 316 .writeseg = bdev_writeseg,
312 .erase = bdev_erase, 317 .erase = bdev_erase,
318 .can_write_buf = bdev_can_write_buf,
313 .sync = bdev_sync, 319 .sync = bdev_sync,
314 .put_device = bdev_put_device, 320 .put_device = bdev_put_device,
315}; 321};
diff --git a/fs/logfs/dev_mtd.c b/fs/logfs/dev_mtd.c
index cafb6ef2e05b..a85d47d13e4b 100644
--- a/fs/logfs/dev_mtd.c
+++ b/fs/logfs/dev_mtd.c
@@ -9,6 +9,7 @@
9#include <linux/completion.h> 9#include <linux/completion.h>
10#include <linux/mount.h> 10#include <linux/mount.h>
11#include <linux/sched.h> 11#include <linux/sched.h>
12#include <linux/slab.h>
12 13
13#define PAGE_OFS(ofs) ((ofs) & (PAGE_SIZE-1)) 14#define PAGE_OFS(ofs) ((ofs) & (PAGE_SIZE-1))
14 15
@@ -126,7 +127,8 @@ static int mtd_readpage(void *_sb, struct page *page)
126 127
127 err = mtd_read(sb, page->index << PAGE_SHIFT, PAGE_SIZE, 128 err = mtd_read(sb, page->index << PAGE_SHIFT, PAGE_SIZE,
128 page_address(page)); 129 page_address(page));
129 if (err == -EUCLEAN) { 130 if (err == -EUCLEAN || err == -EBADMSG) {
131 /* -EBADMSG happens regularly on power failures */
130 err = 0; 132 err = 0;
131 /* FIXME: force GC this segment */ 133 /* FIXME: force GC this segment */
132 } 134 }
@@ -233,12 +235,32 @@ static void mtd_put_device(struct super_block *sb)
233 put_mtd_device(logfs_super(sb)->s_mtd); 235 put_mtd_device(logfs_super(sb)->s_mtd);
234} 236}
235 237
238static int mtd_can_write_buf(struct super_block *sb, u64 ofs)
239{
240 struct logfs_super *super = logfs_super(sb);
241 void *buf;
242 int err;
243
244 buf = kmalloc(super->s_writesize, GFP_KERNEL);
245 if (!buf)
246 return -ENOMEM;
247 err = mtd_read(sb, ofs, super->s_writesize, buf);
248 if (err)
249 goto out;
250 if (memchr_inv(buf, 0xff, super->s_writesize))
251 err = -EIO;
252 kfree(buf);
253out:
254 return err;
255}
256
236static const struct logfs_device_ops mtd_devops = { 257static const struct logfs_device_ops mtd_devops = {
237 .find_first_sb = mtd_find_first_sb, 258 .find_first_sb = mtd_find_first_sb,
238 .find_last_sb = mtd_find_last_sb, 259 .find_last_sb = mtd_find_last_sb,
239 .readpage = mtd_readpage, 260 .readpage = mtd_readpage,
240 .writeseg = mtd_writeseg, 261 .writeseg = mtd_writeseg,
241 .erase = mtd_erase, 262 .erase = mtd_erase,
263 .can_write_buf = mtd_can_write_buf,
242 .sync = mtd_sync, 264 .sync = mtd_sync,
243 .put_device = mtd_put_device, 265 .put_device = mtd_put_device,
244}; 266};
@@ -250,5 +272,7 @@ int logfs_get_sb_mtd(struct file_system_type *type, int flags,
250 const struct logfs_device_ops *devops = &mtd_devops; 272 const struct logfs_device_ops *devops = &mtd_devops;
251 273
252 mtd = get_mtd_device(NULL, mtdnr); 274 mtd = get_mtd_device(NULL, mtdnr);
275 if (IS_ERR(mtd))
276 return PTR_ERR(mtd);
253 return logfs_get_sb_device(type, flags, mtd, NULL, devops, mnt); 277 return logfs_get_sb_device(type, flags, mtd, NULL, devops, mnt);
254} 278}
diff --git a/fs/logfs/file.c b/fs/logfs/file.c
index 370f367a933e..0de524071870 100644
--- a/fs/logfs/file.c
+++ b/fs/logfs/file.c
@@ -161,7 +161,17 @@ static int logfs_writepage(struct page *page, struct writeback_control *wbc)
161 161
162static void logfs_invalidatepage(struct page *page, unsigned long offset) 162static void logfs_invalidatepage(struct page *page, unsigned long offset)
163{ 163{
164 move_page_to_btree(page); 164 struct logfs_block *block = logfs_block(page);
165
166 if (block->reserved_bytes) {
167 struct super_block *sb = page->mapping->host->i_sb;
168 struct logfs_super *super = logfs_super(sb);
169
170 super->s_dirty_pages -= block->reserved_bytes;
171 block->ops->free_block(sb, block);
172 BUG_ON(bitmap_weight(block->alias_map, LOGFS_BLOCK_FACTOR));
173 } else
174 move_page_to_btree(page);
165 BUG_ON(PagePrivate(page) || page->private); 175 BUG_ON(PagePrivate(page) || page->private);
166} 176}
167 177
@@ -212,10 +222,8 @@ int logfs_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
212int logfs_fsync(struct file *file, struct dentry *dentry, int datasync) 222int logfs_fsync(struct file *file, struct dentry *dentry, int datasync)
213{ 223{
214 struct super_block *sb = dentry->d_inode->i_sb; 224 struct super_block *sb = dentry->d_inode->i_sb;
215 struct logfs_super *super = logfs_super(sb);
216 225
217 /* FIXME: write anchor */ 226 logfs_write_anchor(sb);
218 super->s_devops->sync(sb);
219 return 0; 227 return 0;
220} 228}
221 229
diff --git a/fs/logfs/gc.c b/fs/logfs/gc.c
index 76c242fbe1b0..caa4419285dc 100644
--- a/fs/logfs/gc.c
+++ b/fs/logfs/gc.c
@@ -122,7 +122,7 @@ static void logfs_cleanse_block(struct super_block *sb, u64 ofs, u64 ino,
122 logfs_safe_iput(inode, cookie); 122 logfs_safe_iput(inode, cookie);
123} 123}
124 124
125static u32 logfs_gc_segment(struct super_block *sb, u32 segno, u8 dist) 125static u32 logfs_gc_segment(struct super_block *sb, u32 segno)
126{ 126{
127 struct logfs_super *super = logfs_super(sb); 127 struct logfs_super *super = logfs_super(sb);
128 struct logfs_segment_header sh; 128 struct logfs_segment_header sh;
@@ -401,7 +401,7 @@ static int __logfs_gc_once(struct super_block *sb, struct gc_candidate *cand)
401 segno, (u64)segno << super->s_segshift, 401 segno, (u64)segno << super->s_segshift,
402 dist, no_free_segments(sb), valid, 402 dist, no_free_segments(sb), valid,
403 super->s_free_bytes); 403 super->s_free_bytes);
404 cleaned = logfs_gc_segment(sb, segno, dist); 404 cleaned = logfs_gc_segment(sb, segno);
405 log_gc("GC segment #%02x complete - now %x valid\n", segno, 405 log_gc("GC segment #%02x complete - now %x valid\n", segno,
406 valid - cleaned); 406 valid - cleaned);
407 BUG_ON(cleaned != valid); 407 BUG_ON(cleaned != valid);
@@ -632,38 +632,31 @@ static int check_area(struct super_block *sb, int i)
632{ 632{
633 struct logfs_super *super = logfs_super(sb); 633 struct logfs_super *super = logfs_super(sb);
634 struct logfs_area *area = super->s_area[i]; 634 struct logfs_area *area = super->s_area[i];
635 struct logfs_object_header oh; 635 gc_level_t gc_level;
636 u32 cleaned, valid, ec;
636 u32 segno = area->a_segno; 637 u32 segno = area->a_segno;
637 u32 ofs = area->a_used_bytes; 638 u64 ofs = dev_ofs(sb, area->a_segno, area->a_written_bytes);
638 __be32 crc;
639 int err;
640 639
641 if (!area->a_is_open) 640 if (!area->a_is_open)
642 return 0; 641 return 0;
643 642
644 for (ofs = area->a_used_bytes; 643 if (super->s_devops->can_write_buf(sb, ofs) == 0)
645 ofs <= super->s_segsize - sizeof(oh); 644 return 0;
646 ofs += (u32)be16_to_cpu(oh.len) + sizeof(oh)) {
647 err = wbuf_read(sb, dev_ofs(sb, segno, ofs), sizeof(oh), &oh);
648 if (err)
649 return err;
650
651 if (!memchr_inv(&oh, 0xff, sizeof(oh)))
652 break;
653 645
654 crc = logfs_crc32(&oh, sizeof(oh) - 4, 4); 646 printk(KERN_INFO"LogFS: Possibly incomplete write at %llx\n", ofs);
655 if (crc != oh.crc) { 647 /*
656 printk(KERN_INFO "interrupted header at %llx\n", 648 * The device cannot write back the write buffer. Most likely the
657 dev_ofs(sb, segno, ofs)); 649 * wbuf was already written out and the system crashed at some point
658 return 0; 650 * before the journal commit happened. In that case we wouldn't have
659 } 651 * to do anything. But if the crash happened before the wbuf was
660 } 652 * written out correctly, we must GC this segment. So assume the
661 if (ofs != area->a_used_bytes) { 653 * worst and always do the GC run.
662 printk(KERN_INFO "%x bytes unaccounted data found at %llx\n", 654 */
663 ofs - area->a_used_bytes, 655 area->a_is_open = 0;
664 dev_ofs(sb, segno, area->a_used_bytes)); 656 valid = logfs_valid_bytes(sb, segno, &ec, &gc_level);
665 area->a_used_bytes = ofs; 657 cleaned = logfs_gc_segment(sb, segno);
666 } 658 if (cleaned != valid)
659 return -EIO;
667 return 0; 660 return 0;
668} 661}
669 662
diff --git a/fs/logfs/inode.c b/fs/logfs/inode.c
index 14ed27274da2..755a92e8daa7 100644
--- a/fs/logfs/inode.c
+++ b/fs/logfs/inode.c
@@ -193,6 +193,7 @@ static void logfs_init_inode(struct super_block *sb, struct inode *inode)
193 inode->i_ctime = CURRENT_TIME; 193 inode->i_ctime = CURRENT_TIME;
194 inode->i_mtime = CURRENT_TIME; 194 inode->i_mtime = CURRENT_TIME;
195 inode->i_nlink = 1; 195 inode->i_nlink = 1;
196 li->li_refcount = 1;
196 INIT_LIST_HEAD(&li->li_freeing_list); 197 INIT_LIST_HEAD(&li->li_freeing_list);
197 198
198 for (i = 0; i < LOGFS_EMBEDDED_FIELDS; i++) 199 for (i = 0; i < LOGFS_EMBEDDED_FIELDS; i++)
@@ -326,7 +327,7 @@ static void logfs_set_ino_generation(struct super_block *sb,
326 u64 ino; 327 u64 ino;
327 328
328 mutex_lock(&super->s_journal_mutex); 329 mutex_lock(&super->s_journal_mutex);
329 ino = logfs_seek_hole(super->s_master_inode, super->s_last_ino); 330 ino = logfs_seek_hole(super->s_master_inode, super->s_last_ino + 1);
330 super->s_last_ino = ino; 331 super->s_last_ino = ino;
331 super->s_inos_till_wrap--; 332 super->s_inos_till_wrap--;
332 if (super->s_inos_till_wrap < 0) { 333 if (super->s_inos_till_wrap < 0) {
@@ -386,8 +387,7 @@ static void logfs_init_once(void *_li)
386 387
387static int logfs_sync_fs(struct super_block *sb, int wait) 388static int logfs_sync_fs(struct super_block *sb, int wait)
388{ 389{
389 /* FIXME: write anchor */ 390 logfs_write_anchor(sb);
390 logfs_super(sb)->s_devops->sync(sb);
391 return 0; 391 return 0;
392} 392}
393 393
diff --git a/fs/logfs/journal.c b/fs/logfs/journal.c
index fb0a613f885b..4b0e0616b357 100644
--- a/fs/logfs/journal.c
+++ b/fs/logfs/journal.c
@@ -132,10 +132,9 @@ static int read_area(struct super_block *sb, struct logfs_je_area *a)
132 132
133 ofs = dev_ofs(sb, area->a_segno, area->a_written_bytes); 133 ofs = dev_ofs(sb, area->a_segno, area->a_written_bytes);
134 if (super->s_writesize > 1) 134 if (super->s_writesize > 1)
135 logfs_buf_recover(area, ofs, a + 1, super->s_writesize); 135 return logfs_buf_recover(area, ofs, a + 1, super->s_writesize);
136 else 136 else
137 logfs_buf_recover(area, ofs, NULL, 0); 137 return logfs_buf_recover(area, ofs, NULL, 0);
138 return 0;
139} 138}
140 139
141static void *unpack(void *from, void *to) 140static void *unpack(void *from, void *to)
@@ -245,7 +244,7 @@ static int read_je(struct super_block *sb, u64 ofs)
245 read_erasecount(sb, unpack(jh, scratch)); 244 read_erasecount(sb, unpack(jh, scratch));
246 break; 245 break;
247 case JE_AREA: 246 case JE_AREA:
248 read_area(sb, unpack(jh, scratch)); 247 err = read_area(sb, unpack(jh, scratch));
249 break; 248 break;
250 case JE_OBJ_ALIAS: 249 case JE_OBJ_ALIAS:
251 err = logfs_load_object_aliases(sb, unpack(jh, scratch), 250 err = logfs_load_object_aliases(sb, unpack(jh, scratch),
diff --git a/fs/logfs/logfs.h b/fs/logfs/logfs.h
index 0a3df1a0c936..93b55f337245 100644
--- a/fs/logfs/logfs.h
+++ b/fs/logfs/logfs.h
@@ -144,6 +144,7 @@ struct logfs_area_ops {
144 * @erase: erase one segment 144 * @erase: erase one segment
145 * @read: read from the device 145 * @read: read from the device
146 * @erase: erase part of the device 146 * @erase: erase part of the device
147 * @can_write_buf: decide whether wbuf can be written to ofs
147 */ 148 */
148struct logfs_device_ops { 149struct logfs_device_ops {
149 struct page *(*find_first_sb)(struct super_block *sb, u64 *ofs); 150 struct page *(*find_first_sb)(struct super_block *sb, u64 *ofs);
@@ -153,6 +154,7 @@ struct logfs_device_ops {
153 void (*writeseg)(struct super_block *sb, u64 ofs, size_t len); 154 void (*writeseg)(struct super_block *sb, u64 ofs, size_t len);
154 int (*erase)(struct super_block *sb, loff_t ofs, size_t len, 155 int (*erase)(struct super_block *sb, loff_t ofs, size_t len,
155 int ensure_write); 156 int ensure_write);
157 int (*can_write_buf)(struct super_block *sb, u64 ofs);
156 void (*sync)(struct super_block *sb); 158 void (*sync)(struct super_block *sb);
157 void (*put_device)(struct super_block *sb); 159 void (*put_device)(struct super_block *sb);
158}; 160};
@@ -394,6 +396,7 @@ struct logfs_super {
394 int s_lock_count; 396 int s_lock_count;
395 mempool_t *s_block_pool; /* struct logfs_block pool */ 397 mempool_t *s_block_pool; /* struct logfs_block pool */
396 mempool_t *s_shadow_pool; /* struct logfs_shadow pool */ 398 mempool_t *s_shadow_pool; /* struct logfs_shadow pool */
399 struct list_head s_writeback_list; /* writeback pages */
397 /* 400 /*
398 * Space accounting: 401 * Space accounting:
399 * - s_used_bytes specifies space used to store valid data objects. 402 * - s_used_bytes specifies space used to store valid data objects.
@@ -598,19 +601,19 @@ void freeseg(struct super_block *sb, u32 segno);
598int logfs_init_areas(struct super_block *sb); 601int logfs_init_areas(struct super_block *sb);
599void logfs_cleanup_areas(struct super_block *sb); 602void logfs_cleanup_areas(struct super_block *sb);
600int logfs_open_area(struct logfs_area *area, size_t bytes); 603int logfs_open_area(struct logfs_area *area, size_t bytes);
601void __logfs_buf_write(struct logfs_area *area, u64 ofs, void *buf, size_t len, 604int __logfs_buf_write(struct logfs_area *area, u64 ofs, void *buf, size_t len,
602 int use_filler); 605 int use_filler);
603 606
604static inline void logfs_buf_write(struct logfs_area *area, u64 ofs, 607static inline int logfs_buf_write(struct logfs_area *area, u64 ofs,
605 void *buf, size_t len) 608 void *buf, size_t len)
606{ 609{
607 __logfs_buf_write(area, ofs, buf, len, 0); 610 return __logfs_buf_write(area, ofs, buf, len, 0);
608} 611}
609 612
610static inline void logfs_buf_recover(struct logfs_area *area, u64 ofs, 613static inline int logfs_buf_recover(struct logfs_area *area, u64 ofs,
611 void *buf, size_t len) 614 void *buf, size_t len)
612{ 615{
613 __logfs_buf_write(area, ofs, buf, len, 1); 616 return __logfs_buf_write(area, ofs, buf, len, 1);
614} 617}
615 618
616/* super.c */ 619/* super.c */
diff --git a/fs/logfs/readwrite.c b/fs/logfs/readwrite.c
index 3159db6958e5..0718d112a1a5 100644
--- a/fs/logfs/readwrite.c
+++ b/fs/logfs/readwrite.c
@@ -892,6 +892,8 @@ u64 logfs_seek_hole(struct inode *inode, u64 bix)
892 return bix; 892 return bix;
893 else if (li->li_data[INDIRECT_INDEX] & LOGFS_FULLY_POPULATED) 893 else if (li->li_data[INDIRECT_INDEX] & LOGFS_FULLY_POPULATED)
894 bix = maxbix(li->li_height); 894 bix = maxbix(li->li_height);
895 else if (bix >= maxbix(li->li_height))
896 return bix;
895 else { 897 else {
896 bix = seek_holedata_loop(inode, bix, 0); 898 bix = seek_holedata_loop(inode, bix, 0);
897 if (bix < maxbix(li->li_height)) 899 if (bix < maxbix(li->li_height))
@@ -1093,17 +1095,25 @@ static int logfs_reserve_bytes(struct inode *inode, int bytes)
1093int get_page_reserve(struct inode *inode, struct page *page) 1095int get_page_reserve(struct inode *inode, struct page *page)
1094{ 1096{
1095 struct logfs_super *super = logfs_super(inode->i_sb); 1097 struct logfs_super *super = logfs_super(inode->i_sb);
1098 struct logfs_block *block = logfs_block(page);
1096 int ret; 1099 int ret;
1097 1100
1098 if (logfs_block(page) && logfs_block(page)->reserved_bytes) 1101 if (block && block->reserved_bytes)
1099 return 0; 1102 return 0;
1100 1103
1101 logfs_get_wblocks(inode->i_sb, page, WF_LOCK); 1104 logfs_get_wblocks(inode->i_sb, page, WF_LOCK);
1102 ret = logfs_reserve_bytes(inode, 6 * LOGFS_MAX_OBJECTSIZE); 1105 while ((ret = logfs_reserve_bytes(inode, 6 * LOGFS_MAX_OBJECTSIZE)) &&
1106 !list_empty(&super->s_writeback_list)) {
1107 block = list_entry(super->s_writeback_list.next,
1108 struct logfs_block, alias_list);
1109 block->ops->write_block(block);
1110 }
1103 if (!ret) { 1111 if (!ret) {
1104 alloc_data_block(inode, page); 1112 alloc_data_block(inode, page);
1105 logfs_block(page)->reserved_bytes += 6 * LOGFS_MAX_OBJECTSIZE; 1113 block = logfs_block(page);
1114 block->reserved_bytes += 6 * LOGFS_MAX_OBJECTSIZE;
1106 super->s_dirty_pages += 6 * LOGFS_MAX_OBJECTSIZE; 1115 super->s_dirty_pages += 6 * LOGFS_MAX_OBJECTSIZE;
1116 list_move_tail(&block->alias_list, &super->s_writeback_list);
1107 } 1117 }
1108 logfs_put_wblocks(inode->i_sb, page, WF_LOCK); 1118 logfs_put_wblocks(inode->i_sb, page, WF_LOCK);
1109 return ret; 1119 return ret;
@@ -1861,7 +1871,7 @@ int logfs_truncate(struct inode *inode, u64 target)
1861 size = target; 1871 size = target;
1862 1872
1863 logfs_get_wblocks(sb, NULL, 1); 1873 logfs_get_wblocks(sb, NULL, 1);
1864 err = __logfs_truncate(inode, target); 1874 err = __logfs_truncate(inode, size);
1865 if (!err) 1875 if (!err)
1866 err = __logfs_write_inode(inode, 0); 1876 err = __logfs_write_inode(inode, 0);
1867 logfs_put_wblocks(sb, NULL, 1); 1877 logfs_put_wblocks(sb, NULL, 1);
@@ -2249,6 +2259,7 @@ int logfs_init_rw(struct super_block *sb)
2249 int min_fill = 3 * super->s_no_blocks; 2259 int min_fill = 3 * super->s_no_blocks;
2250 2260
2251 INIT_LIST_HEAD(&super->s_object_alias); 2261 INIT_LIST_HEAD(&super->s_object_alias);
2262 INIT_LIST_HEAD(&super->s_writeback_list);
2252 mutex_init(&super->s_write_mutex); 2263 mutex_init(&super->s_write_mutex);
2253 super->s_block_pool = mempool_create_kmalloc_pool(min_fill, 2264 super->s_block_pool = mempool_create_kmalloc_pool(min_fill,
2254 sizeof(struct logfs_block)); 2265 sizeof(struct logfs_block));
diff --git a/fs/logfs/segment.c b/fs/logfs/segment.c
index f77ce2b470ba..a9657afb70ad 100644
--- a/fs/logfs/segment.c
+++ b/fs/logfs/segment.c
@@ -67,7 +67,7 @@ static struct page *get_mapping_page(struct super_block *sb, pgoff_t index,
67 return page; 67 return page;
68} 68}
69 69
70void __logfs_buf_write(struct logfs_area *area, u64 ofs, void *buf, size_t len, 70int __logfs_buf_write(struct logfs_area *area, u64 ofs, void *buf, size_t len,
71 int use_filler) 71 int use_filler)
72{ 72{
73 pgoff_t index = ofs >> PAGE_SHIFT; 73 pgoff_t index = ofs >> PAGE_SHIFT;
@@ -81,8 +81,10 @@ void __logfs_buf_write(struct logfs_area *area, u64 ofs, void *buf, size_t len,
81 copylen = min((ulong)len, PAGE_SIZE - offset); 81 copylen = min((ulong)len, PAGE_SIZE - offset);
82 82
83 page = get_mapping_page(area->a_sb, index, use_filler); 83 page = get_mapping_page(area->a_sb, index, use_filler);
84 SetPageUptodate(page); 84 if (IS_ERR(page))
85 return PTR_ERR(page);
85 BUG_ON(!page); /* FIXME: reserve a pool */ 86 BUG_ON(!page); /* FIXME: reserve a pool */
87 SetPageUptodate(page);
86 memcpy(page_address(page) + offset, buf, copylen); 88 memcpy(page_address(page) + offset, buf, copylen);
87 SetPagePrivate(page); 89 SetPagePrivate(page);
88 page_cache_release(page); 90 page_cache_release(page);
@@ -92,6 +94,7 @@ void __logfs_buf_write(struct logfs_area *area, u64 ofs, void *buf, size_t len,
92 offset = 0; 94 offset = 0;
93 index++; 95 index++;
94 } while (len); 96 } while (len);
97 return 0;
95} 98}
96 99
97static void pad_partial_page(struct logfs_area *area) 100static void pad_partial_page(struct logfs_area *area)
diff --git a/fs/logfs/super.c b/fs/logfs/super.c
index 5866ee6e1327..d651e10a1e9c 100644
--- a/fs/logfs/super.c
+++ b/fs/logfs/super.c
@@ -138,10 +138,14 @@ static int logfs_sb_set(struct super_block *sb, void *_super)
138 sb->s_fs_info = super; 138 sb->s_fs_info = super;
139 sb->s_mtd = super->s_mtd; 139 sb->s_mtd = super->s_mtd;
140 sb->s_bdev = super->s_bdev; 140 sb->s_bdev = super->s_bdev;
141#ifdef CONFIG_BLOCK
141 if (sb->s_bdev) 142 if (sb->s_bdev)
142 sb->s_bdi = &bdev_get_queue(sb->s_bdev)->backing_dev_info; 143 sb->s_bdi = &bdev_get_queue(sb->s_bdev)->backing_dev_info;
144#endif
145#ifdef CONFIG_MTD
143 if (sb->s_mtd) 146 if (sb->s_mtd)
144 sb->s_bdi = sb->s_mtd->backing_dev_info; 147 sb->s_bdi = sb->s_mtd->backing_dev_info;
148#endif
145 return 0; 149 return 0;
146} 150}
147 151
@@ -333,27 +337,27 @@ static int logfs_get_sb_final(struct super_block *sb, struct vfsmount *mnt)
333 goto fail; 337 goto fail;
334 338
335 sb->s_root = d_alloc_root(rootdir); 339 sb->s_root = d_alloc_root(rootdir);
336 if (!sb->s_root) 340 if (!sb->s_root) {
337 goto fail2; 341 iput(rootdir);
342 goto fail;
343 }
338 344
339 super->s_erase_page = alloc_pages(GFP_KERNEL, 0); 345 super->s_erase_page = alloc_pages(GFP_KERNEL, 0);
340 if (!super->s_erase_page) 346 if (!super->s_erase_page)
341 goto fail2; 347 goto fail;
342 memset(page_address(super->s_erase_page), 0xFF, PAGE_SIZE); 348 memset(page_address(super->s_erase_page), 0xFF, PAGE_SIZE);
343 349
344 /* FIXME: check for read-only mounts */ 350 /* FIXME: check for read-only mounts */
345 err = logfs_make_writeable(sb); 351 err = logfs_make_writeable(sb);
346 if (err) 352 if (err)
347 goto fail3; 353 goto fail1;
348 354
349 log_super("LogFS: Finished mounting\n"); 355 log_super("LogFS: Finished mounting\n");
350 simple_set_mnt(mnt, sb); 356 simple_set_mnt(mnt, sb);
351 return 0; 357 return 0;
352 358
353fail3: 359fail1:
354 __free_page(super->s_erase_page); 360 __free_page(super->s_erase_page);
355fail2:
356 iput(rootdir);
357fail: 361fail:
358 iput(logfs_super(sb)->s_master_inode); 362 iput(logfs_super(sb)->s_master_inode);
359 return -EIO; 363 return -EIO;
@@ -382,7 +386,7 @@ static struct page *find_super_block(struct super_block *sb)
382 if (!first || IS_ERR(first)) 386 if (!first || IS_ERR(first))
383 return NULL; 387 return NULL;
384 last = super->s_devops->find_last_sb(sb, &super->s_sb_ofs[1]); 388 last = super->s_devops->find_last_sb(sb, &super->s_sb_ofs[1]);
385 if (!last || IS_ERR(first)) { 389 if (!last || IS_ERR(last)) {
386 page_cache_release(first); 390 page_cache_release(first);
387 return NULL; 391 return NULL;
388 } 392 }
@@ -413,7 +417,7 @@ static int __logfs_read_sb(struct super_block *sb)
413 417
414 page = find_super_block(sb); 418 page = find_super_block(sb);
415 if (!page) 419 if (!page)
416 return -EIO; 420 return -EINVAL;
417 421
418 ds = page_address(page); 422 ds = page_address(page);
419 super->s_size = be64_to_cpu(ds->ds_filesystem_size); 423 super->s_size = be64_to_cpu(ds->ds_filesystem_size);
diff --git a/fs/namei.c b/fs/namei.c
index 16df7277a92e..b86b96fe1dc3 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -2176,8 +2176,10 @@ int vfs_rmdir(struct inode *dir, struct dentry *dentry)
2176 error = security_inode_rmdir(dir, dentry); 2176 error = security_inode_rmdir(dir, dentry);
2177 if (!error) { 2177 if (!error) {
2178 error = dir->i_op->rmdir(dir, dentry); 2178 error = dir->i_op->rmdir(dir, dentry);
2179 if (!error) 2179 if (!error) {
2180 dentry->d_inode->i_flags |= S_DEAD; 2180 dentry->d_inode->i_flags |= S_DEAD;
2181 dont_mount(dentry);
2182 }
2181 } 2183 }
2182 } 2184 }
2183 mutex_unlock(&dentry->d_inode->i_mutex); 2185 mutex_unlock(&dentry->d_inode->i_mutex);
@@ -2261,7 +2263,7 @@ int vfs_unlink(struct inode *dir, struct dentry *dentry)
2261 if (!error) { 2263 if (!error) {
2262 error = dir->i_op->unlink(dir, dentry); 2264 error = dir->i_op->unlink(dir, dentry);
2263 if (!error) 2265 if (!error)
2264 dentry->d_inode->i_flags |= S_DEAD; 2266 dont_mount(dentry);
2265 } 2267 }
2266 } 2268 }
2267 mutex_unlock(&dentry->d_inode->i_mutex); 2269 mutex_unlock(&dentry->d_inode->i_mutex);
@@ -2572,17 +2574,20 @@ static int vfs_rename_dir(struct inode *old_dir, struct dentry *old_dentry,
2572 return error; 2574 return error;
2573 2575
2574 target = new_dentry->d_inode; 2576 target = new_dentry->d_inode;
2575 if (target) { 2577 if (target)
2576 mutex_lock(&target->i_mutex); 2578 mutex_lock(&target->i_mutex);
2577 dentry_unhash(new_dentry);
2578 }
2579 if (d_mountpoint(old_dentry)||d_mountpoint(new_dentry)) 2579 if (d_mountpoint(old_dentry)||d_mountpoint(new_dentry))
2580 error = -EBUSY; 2580 error = -EBUSY;
2581 else 2581 else {
2582 if (target)
2583 dentry_unhash(new_dentry);
2582 error = old_dir->i_op->rename(old_dir, old_dentry, new_dir, new_dentry); 2584 error = old_dir->i_op->rename(old_dir, old_dentry, new_dir, new_dentry);
2585 }
2583 if (target) { 2586 if (target) {
2584 if (!error) 2587 if (!error) {
2585 target->i_flags |= S_DEAD; 2588 target->i_flags |= S_DEAD;
2589 dont_mount(new_dentry);
2590 }
2586 mutex_unlock(&target->i_mutex); 2591 mutex_unlock(&target->i_mutex);
2587 if (d_unhashed(new_dentry)) 2592 if (d_unhashed(new_dentry))
2588 d_rehash(new_dentry); 2593 d_rehash(new_dentry);
@@ -2614,7 +2619,7 @@ static int vfs_rename_other(struct inode *old_dir, struct dentry *old_dentry,
2614 error = old_dir->i_op->rename(old_dir, old_dentry, new_dir, new_dentry); 2619 error = old_dir->i_op->rename(old_dir, old_dentry, new_dir, new_dentry);
2615 if (!error) { 2620 if (!error) {
2616 if (target) 2621 if (target)
2617 target->i_flags |= S_DEAD; 2622 dont_mount(new_dentry);
2618 if (!(old_dir->i_sb->s_type->fs_flags & FS_RENAME_DOES_D_MOVE)) 2623 if (!(old_dir->i_sb->s_type->fs_flags & FS_RENAME_DOES_D_MOVE))
2619 d_move(old_dentry, new_dentry); 2624 d_move(old_dentry, new_dentry);
2620 } 2625 }
diff --git a/fs/namespace.c b/fs/namespace.c
index 8174c8ab5c70..f20cb57d1067 100644
--- a/fs/namespace.c
+++ b/fs/namespace.c
@@ -1432,7 +1432,7 @@ static int graft_tree(struct vfsmount *mnt, struct path *path)
1432 1432
1433 err = -ENOENT; 1433 err = -ENOENT;
1434 mutex_lock(&path->dentry->d_inode->i_mutex); 1434 mutex_lock(&path->dentry->d_inode->i_mutex);
1435 if (IS_DEADDIR(path->dentry->d_inode)) 1435 if (cant_mount(path->dentry))
1436 goto out_unlock; 1436 goto out_unlock;
1437 1437
1438 err = security_sb_check_sb(mnt, path); 1438 err = security_sb_check_sb(mnt, path);
@@ -1623,7 +1623,7 @@ static int do_move_mount(struct path *path, char *old_name)
1623 1623
1624 err = -ENOENT; 1624 err = -ENOENT;
1625 mutex_lock(&path->dentry->d_inode->i_mutex); 1625 mutex_lock(&path->dentry->d_inode->i_mutex);
1626 if (IS_DEADDIR(path->dentry->d_inode)) 1626 if (cant_mount(path->dentry))
1627 goto out1; 1627 goto out1;
1628 1628
1629 if (d_unlinked(path->dentry)) 1629 if (d_unlinked(path->dentry))
@@ -2234,7 +2234,7 @@ SYSCALL_DEFINE2(pivot_root, const char __user *, new_root,
2234 if (!check_mnt(root.mnt)) 2234 if (!check_mnt(root.mnt))
2235 goto out2; 2235 goto out2;
2236 error = -ENOENT; 2236 error = -ENOENT;
2237 if (IS_DEADDIR(new.dentry->d_inode)) 2237 if (cant_mount(old.dentry))
2238 goto out2; 2238 goto out2;
2239 if (d_unlinked(new.dentry)) 2239 if (d_unlinked(new.dentry))
2240 goto out2; 2240 goto out2;
diff --git a/fs/proc/base.c b/fs/proc/base.c
index 8418fcc0a6ab..c7f9f23449dc 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -730,6 +730,7 @@ out_no_task:
730 730
731static const struct file_operations proc_info_file_operations = { 731static const struct file_operations proc_info_file_operations = {
732 .read = proc_info_read, 732 .read = proc_info_read,
733 .llseek = generic_file_llseek,
733}; 734};
734 735
735static int proc_single_show(struct seq_file *m, void *v) 736static int proc_single_show(struct seq_file *m, void *v)
@@ -987,6 +988,7 @@ out_no_task:
987 988
988static const struct file_operations proc_environ_operations = { 989static const struct file_operations proc_environ_operations = {
989 .read = environ_read, 990 .read = environ_read,
991 .llseek = generic_file_llseek,
990}; 992};
991 993
992static ssize_t oom_adjust_read(struct file *file, char __user *buf, 994static ssize_t oom_adjust_read(struct file *file, char __user *buf,
@@ -1060,6 +1062,7 @@ static ssize_t oom_adjust_write(struct file *file, const char __user *buf,
1060static const struct file_operations proc_oom_adjust_operations = { 1062static const struct file_operations proc_oom_adjust_operations = {
1061 .read = oom_adjust_read, 1063 .read = oom_adjust_read,
1062 .write = oom_adjust_write, 1064 .write = oom_adjust_write,
1065 .llseek = generic_file_llseek,
1063}; 1066};
1064 1067
1065#ifdef CONFIG_AUDITSYSCALL 1068#ifdef CONFIG_AUDITSYSCALL
@@ -1131,6 +1134,7 @@ out_free_page:
1131static const struct file_operations proc_loginuid_operations = { 1134static const struct file_operations proc_loginuid_operations = {
1132 .read = proc_loginuid_read, 1135 .read = proc_loginuid_read,
1133 .write = proc_loginuid_write, 1136 .write = proc_loginuid_write,
1137 .llseek = generic_file_llseek,
1134}; 1138};
1135 1139
1136static ssize_t proc_sessionid_read(struct file * file, char __user * buf, 1140static ssize_t proc_sessionid_read(struct file * file, char __user * buf,
@@ -1151,6 +1155,7 @@ static ssize_t proc_sessionid_read(struct file * file, char __user * buf,
1151 1155
1152static const struct file_operations proc_sessionid_operations = { 1156static const struct file_operations proc_sessionid_operations = {
1153 .read = proc_sessionid_read, 1157 .read = proc_sessionid_read,
1158 .llseek = generic_file_llseek,
1154}; 1159};
1155#endif 1160#endif
1156 1161
@@ -1202,6 +1207,7 @@ static ssize_t proc_fault_inject_write(struct file * file,
1202static const struct file_operations proc_fault_inject_operations = { 1207static const struct file_operations proc_fault_inject_operations = {
1203 .read = proc_fault_inject_read, 1208 .read = proc_fault_inject_read,
1204 .write = proc_fault_inject_write, 1209 .write = proc_fault_inject_write,
1210 .llseek = generic_file_llseek,
1205}; 1211};
1206#endif 1212#endif
1207 1213
@@ -1943,7 +1949,7 @@ static ssize_t proc_fdinfo_read(struct file *file, char __user *buf,
1943} 1949}
1944 1950
1945static const struct file_operations proc_fdinfo_file_operations = { 1951static const struct file_operations proc_fdinfo_file_operations = {
1946 .open = nonseekable_open, 1952 .open = nonseekable_open,
1947 .read = proc_fdinfo_read, 1953 .read = proc_fdinfo_read,
1948}; 1954};
1949 1955
@@ -2227,6 +2233,7 @@ out_no_task:
2227static const struct file_operations proc_pid_attr_operations = { 2233static const struct file_operations proc_pid_attr_operations = {
2228 .read = proc_pid_attr_read, 2234 .read = proc_pid_attr_read,
2229 .write = proc_pid_attr_write, 2235 .write = proc_pid_attr_write,
2236 .llseek = generic_file_llseek,
2230}; 2237};
2231 2238
2232static const struct pid_entry attr_dir_stuff[] = { 2239static const struct pid_entry attr_dir_stuff[] = {
@@ -2347,6 +2354,7 @@ static ssize_t proc_coredump_filter_write(struct file *file,
2347static const struct file_operations proc_coredump_filter_operations = { 2354static const struct file_operations proc_coredump_filter_operations = {
2348 .read = proc_coredump_filter_read, 2355 .read = proc_coredump_filter_read,
2349 .write = proc_coredump_filter_write, 2356 .write = proc_coredump_filter_write,
2357 .llseek = generic_file_llseek,
2350}; 2358};
2351#endif 2359#endif
2352 2360
diff --git a/fs/proc/inode.c b/fs/proc/inode.c
index d35b23238fb1..aea8502e58a3 100644
--- a/fs/proc/inode.c
+++ b/fs/proc/inode.c
@@ -232,9 +232,9 @@ static long proc_reg_unlocked_ioctl(struct file *file, unsigned int cmd, unsigne
232 if (rv == -ENOIOCTLCMD) 232 if (rv == -ENOIOCTLCMD)
233 rv = -EINVAL; 233 rv = -EINVAL;
234 } else if (ioctl) { 234 } else if (ioctl) {
235 lock_kernel(); 235 WARN_ONCE(1, "Procfs ioctl handlers must use unlocked_ioctl, "
236 "%pf will be called without the Bkl held\n", ioctl);
236 rv = ioctl(file->f_path.dentry->d_inode, file, cmd, arg); 237 rv = ioctl(file->f_path.dentry->d_inode, file, cmd, arg);
237 unlock_kernel();
238 } 238 }
239 239
240 pde_users_dec(pde); 240 pde_users_dec(pde);
diff --git a/fs/proc/kcore.c b/fs/proc/kcore.c
index 19979a2ce272..c837a77351be 100644
--- a/fs/proc/kcore.c
+++ b/fs/proc/kcore.c
@@ -558,6 +558,7 @@ static int open_kcore(struct inode *inode, struct file *filp)
558static const struct file_operations proc_kcore_operations = { 558static const struct file_operations proc_kcore_operations = {
559 .read = read_kcore, 559 .read = read_kcore,
560 .open = open_kcore, 560 .open = open_kcore,
561 .llseek = generic_file_llseek,
561}; 562};
562 563
563#ifdef CONFIG_MEMORY_HOTPLUG 564#ifdef CONFIG_MEMORY_HOTPLUG
diff --git a/fs/proc/kmsg.c b/fs/proc/kmsg.c
index cfe90a48a6e8..bd4b5a740ff1 100644
--- a/fs/proc/kmsg.c
+++ b/fs/proc/kmsg.c
@@ -53,6 +53,7 @@ static const struct file_operations proc_kmsg_operations = {
53 .poll = kmsg_poll, 53 .poll = kmsg_poll,
54 .open = kmsg_open, 54 .open = kmsg_open,
55 .release = kmsg_release, 55 .release = kmsg_release,
56 .llseek = generic_file_llseek,
56}; 57};
57 58
58static int __init proc_kmsg_init(void) 59static int __init proc_kmsg_init(void)
diff --git a/fs/proc/vmcore.c b/fs/proc/vmcore.c
index 9fbc99ec799a..91c817ff02c3 100644
--- a/fs/proc/vmcore.c
+++ b/fs/proc/vmcore.c
@@ -163,6 +163,7 @@ static ssize_t read_vmcore(struct file *file, char __user *buffer,
163 163
164static const struct file_operations proc_vmcore_operations = { 164static const struct file_operations proc_vmcore_operations = {
165 .read = read_vmcore, 165 .read = read_vmcore,
166 .llseek = generic_file_llseek,
166}; 167};
167 168
168static struct vmcore* __init get_new_element(void) 169static struct vmcore* __init get_new_element(void)
diff --git a/fs/sysv/dir.c b/fs/sysv/dir.c
index 4e50286a4cc3..1dabed286b4c 100644
--- a/fs/sysv/dir.c
+++ b/fs/sysv/dir.c
@@ -164,8 +164,8 @@ struct sysv_dir_entry *sysv_find_entry(struct dentry *dentry, struct page **res_
164 name, de->name)) 164 name, de->name))
165 goto found; 165 goto found;
166 } 166 }
167 dir_put_page(page);
167 } 168 }
168 dir_put_page(page);
169 169
170 if (++n >= npages) 170 if (++n >= npages)
171 n = 0; 171 n = 0;
diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h
index c99c64dc5f3d..c33749f95b32 100644
--- a/include/asm-generic/atomic.h
+++ b/include/asm-generic/atomic.h
@@ -33,7 +33,7 @@
33 * Atomically reads the value of @v. Note that the guaranteed 33 * Atomically reads the value of @v. Note that the guaranteed
34 * useful range of an atomic_t is only 24 bits. 34 * useful range of an atomic_t is only 24 bits.
35 */ 35 */
36#define atomic_read(v) ((v)->counter) 36#define atomic_read(v) (*(volatile int *)&(v)->counter)
37 37
38/** 38/**
39 * atomic_set - set atomic variable 39 * atomic_set - set atomic variable
diff --git a/include/asm-generic/bitops/arch_hweight.h b/include/asm-generic/bitops/arch_hweight.h
new file mode 100644
index 000000000000..6a211f40665c
--- /dev/null
+++ b/include/asm-generic/bitops/arch_hweight.h
@@ -0,0 +1,25 @@
1#ifndef _ASM_GENERIC_BITOPS_ARCH_HWEIGHT_H_
2#define _ASM_GENERIC_BITOPS_ARCH_HWEIGHT_H_
3
4#include <asm/types.h>
5
6static inline unsigned int __arch_hweight32(unsigned int w)
7{
8 return __sw_hweight32(w);
9}
10
11static inline unsigned int __arch_hweight16(unsigned int w)
12{
13 return __sw_hweight16(w);
14}
15
16static inline unsigned int __arch_hweight8(unsigned int w)
17{
18 return __sw_hweight8(w);
19}
20
21static inline unsigned long __arch_hweight64(__u64 w)
22{
23 return __sw_hweight64(w);
24}
25#endif /* _ASM_GENERIC_BITOPS_HWEIGHT_H_ */
diff --git a/include/asm-generic/bitops/const_hweight.h b/include/asm-generic/bitops/const_hweight.h
new file mode 100644
index 000000000000..fa2a50b7ee66
--- /dev/null
+++ b/include/asm-generic/bitops/const_hweight.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_GENERIC_BITOPS_CONST_HWEIGHT_H_
2#define _ASM_GENERIC_BITOPS_CONST_HWEIGHT_H_
3
4/*
5 * Compile time versions of __arch_hweightN()
6 */
7#define __const_hweight8(w) \
8 ( (!!((w) & (1ULL << 0))) + \
9 (!!((w) & (1ULL << 1))) + \
10 (!!((w) & (1ULL << 2))) + \
11 (!!((w) & (1ULL << 3))) + \
12 (!!((w) & (1ULL << 4))) + \
13 (!!((w) & (1ULL << 5))) + \
14 (!!((w) & (1ULL << 6))) + \
15 (!!((w) & (1ULL << 7))) )
16
17#define __const_hweight16(w) (__const_hweight8(w) + __const_hweight8((w) >> 8 ))
18#define __const_hweight32(w) (__const_hweight16(w) + __const_hweight16((w) >> 16))
19#define __const_hweight64(w) (__const_hweight32(w) + __const_hweight32((w) >> 32))
20
21/*
22 * Generic interface.
23 */
24#define hweight8(w) (__builtin_constant_p(w) ? __const_hweight8(w) : __arch_hweight8(w))
25#define hweight16(w) (__builtin_constant_p(w) ? __const_hweight16(w) : __arch_hweight16(w))
26#define hweight32(w) (__builtin_constant_p(w) ? __const_hweight32(w) : __arch_hweight32(w))
27#define hweight64(w) (__builtin_constant_p(w) ? __const_hweight64(w) : __arch_hweight64(w))
28
29/*
30 * Interface for known constant arguments
31 */
32#define HWEIGHT8(w) (BUILD_BUG_ON_ZERO(!__builtin_constant_p(w)) + __const_hweight8(w))
33#define HWEIGHT16(w) (BUILD_BUG_ON_ZERO(!__builtin_constant_p(w)) + __const_hweight16(w))
34#define HWEIGHT32(w) (BUILD_BUG_ON_ZERO(!__builtin_constant_p(w)) + __const_hweight32(w))
35#define HWEIGHT64(w) (BUILD_BUG_ON_ZERO(!__builtin_constant_p(w)) + __const_hweight64(w))
36
37/*
38 * Type invariant interface to the compile time constant hweight functions.
39 */
40#define HWEIGHT(w) HWEIGHT64((u64)w)
41
42#endif /* _ASM_GENERIC_BITOPS_CONST_HWEIGHT_H_ */
diff --git a/include/asm-generic/bitops/hweight.h b/include/asm-generic/bitops/hweight.h
index fbbc383771da..a94d6519c7ed 100644
--- a/include/asm-generic/bitops/hweight.h
+++ b/include/asm-generic/bitops/hweight.h
@@ -1,11 +1,7 @@
1#ifndef _ASM_GENERIC_BITOPS_HWEIGHT_H_ 1#ifndef _ASM_GENERIC_BITOPS_HWEIGHT_H_
2#define _ASM_GENERIC_BITOPS_HWEIGHT_H_ 2#define _ASM_GENERIC_BITOPS_HWEIGHT_H_
3 3
4#include <asm/types.h> 4#include <asm-generic/bitops/arch_hweight.h>
5 5#include <asm-generic/bitops/const_hweight.h>
6extern unsigned int hweight32(unsigned int w);
7extern unsigned int hweight16(unsigned int w);
8extern unsigned int hweight8(unsigned int w);
9extern unsigned long hweight64(__u64 w);
10 6
11#endif /* _ASM_GENERIC_BITOPS_HWEIGHT_H_ */ 7#endif /* _ASM_GENERIC_BITOPS_HWEIGHT_H_ */
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index b926afe8c03e..3da73f5f0ae9 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -116,11 +116,12 @@ extern unsigned long acpi_realmode_flags;
116 116
117int acpi_register_gsi (struct device *dev, u32 gsi, int triggering, int polarity); 117int acpi_register_gsi (struct device *dev, u32 gsi, int triggering, int polarity);
118int acpi_gsi_to_irq (u32 gsi, unsigned int *irq); 118int acpi_gsi_to_irq (u32 gsi, unsigned int *irq);
119int acpi_isa_irq_to_gsi (unsigned isa_irq, u32 *gsi);
119 120
120#ifdef CONFIG_X86_IO_APIC 121#ifdef CONFIG_X86_IO_APIC
121extern int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity); 122extern int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity);
122#else 123#else
123#define acpi_get_override_irq(bus, trigger, polarity) (-1) 124#define acpi_get_override_irq(gsi, trigger, polarity) (-1)
124#endif 125#endif
125/* 126/*
126 * This function undoes the effect of one call to acpi_register_gsi(). 127 * This function undoes the effect of one call to acpi_register_gsi().
diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h
index 6b4241748dda..7e466fe72025 100644
--- a/include/linux/amba/mmci.h
+++ b/include/linux/amba/mmci.h
@@ -6,8 +6,29 @@
6 6
7#include <linux/mmc/host.h> 7#include <linux/mmc/host.h>
8 8
9/**
10 * struct mmci_platform_data - platform configuration for the MMCI
11 * (also known as PL180) block.
12 * @f_max: the maximum operational frequency for this host in this
13 * platform configuration. When this is specified it takes precedence
14 * over the module parameter for the same frequency.
15 * @ocr_mask: available voltages on the 4 pins from the block, this
16 * is ignored if a regulator is used, see the MMC_VDD_* masks in
17 * mmc/host.h
18 * @translate_vdd: a callback function to translate a MMC_VDD_*
19 * mask into a value to be binary or:ed and written into the
20 * MMCIPWR register of the block
21 * @status: if no GPIO read function was given to the block in
22 * gpio_wp (below) this function will be called to determine
23 * whether a card is present in the MMC slot or not
24 * @gpio_wp: read this GPIO pin to see if the card is write protected
25 * @gpio_cd: read this GPIO pin to detect card insertion
26 * @capabilities: the capabilities of the block as implemented in
27 * this platform, signify anything MMC_CAP_* from mmc/host.h
28 */
9struct mmci_platform_data { 29struct mmci_platform_data {
10 unsigned int ocr_mask; /* available voltages */ 30 unsigned int f_max;
31 unsigned int ocr_mask;
11 u32 (*translate_vdd)(struct device *, unsigned int); 32 u32 (*translate_vdd)(struct device *, unsigned int);
12 unsigned int (*status)(struct device *); 33 unsigned int (*status)(struct device *);
13 int gpio_wp; 34 int gpio_wp;
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index b796eab5ca75..fc68053378ce 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -10,6 +10,11 @@
10#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) 10#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
11#endif 11#endif
12 12
13extern unsigned int __sw_hweight8(unsigned int w);
14extern unsigned int __sw_hweight16(unsigned int w);
15extern unsigned int __sw_hweight32(unsigned int w);
16extern unsigned long __sw_hweight64(__u64 w);
17
13/* 18/*
14 * Include this here because some architectures need generic_ffs/fls in 19 * Include this here because some architectures need generic_ffs/fls in
15 * scope 20 * scope
@@ -44,31 +49,6 @@ static inline unsigned long hweight_long(unsigned long w)
44 return sizeof(w) == 4 ? hweight32(w) : hweight64(w); 49 return sizeof(w) == 4 ? hweight32(w) : hweight64(w);
45} 50}
46 51
47/*
48 * Clearly slow versions of the hweightN() functions, their benefit is
49 * of course compile time evaluation of constant arguments.
50 */
51#define HWEIGHT8(w) \
52 ( BUILD_BUG_ON_ZERO(!__builtin_constant_p(w)) + \
53 (!!((w) & (1ULL << 0))) + \
54 (!!((w) & (1ULL << 1))) + \
55 (!!((w) & (1ULL << 2))) + \
56 (!!((w) & (1ULL << 3))) + \
57 (!!((w) & (1ULL << 4))) + \
58 (!!((w) & (1ULL << 5))) + \
59 (!!((w) & (1ULL << 6))) + \
60 (!!((w) & (1ULL << 7))) )
61
62#define HWEIGHT16(w) (HWEIGHT8(w) + HWEIGHT8((w) >> 8))
63#define HWEIGHT32(w) (HWEIGHT16(w) + HWEIGHT16((w) >> 16))
64#define HWEIGHT64(w) (HWEIGHT32(w) + HWEIGHT32((w) >> 32))
65
66/*
67 * Type invariant version that simply casts things to the
68 * largest type.
69 */
70#define HWEIGHT(w) HWEIGHT64((u64)(w))
71
72/** 52/**
73 * rol32 - rotate a 32-bit value left 53 * rol32 - rotate a 32-bit value left
74 * @word: value to rotate 54 * @word: value to rotate
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 4bca8b60cdf7..5ea3c60c160c 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -273,7 +273,6 @@ static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift)
273} 273}
274 274
275 275
276/* used to install a new clocksource */
277extern int clocksource_register(struct clocksource*); 276extern int clocksource_register(struct clocksource*);
278extern void clocksource_unregister(struct clocksource*); 277extern void clocksource_unregister(struct clocksource*);
279extern void clocksource_touch_watchdog(void); 278extern void clocksource_touch_watchdog(void);
@@ -287,6 +286,24 @@ extern void clocksource_mark_unstable(struct clocksource *cs);
287extern void 286extern void
288clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec); 287clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
289 288
289/*
290 * Don't call __clocksource_register_scale directly, use
291 * clocksource_register_hz/khz
292 */
293extern int
294__clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq);
295
296static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
297{
298 return __clocksource_register_scale(cs, 1, hz);
299}
300
301static inline int clocksource_register_khz(struct clocksource *cs, u32 khz)
302{
303 return __clocksource_register_scale(cs, 1000, khz);
304}
305
306
290static inline void 307static inline void
291clocksource_calc_mult_shift(struct clocksource *cs, u32 freq, u32 minsec) 308clocksource_calc_mult_shift(struct clocksource *cs, u32 freq, u32 minsec)
292{ 309{
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 4de02b10007f..9f15150ce8d6 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -278,6 +278,27 @@ struct freq_attr {
278 ssize_t (*store)(struct cpufreq_policy *, const char *, size_t count); 278 ssize_t (*store)(struct cpufreq_policy *, const char *, size_t count);
279}; 279};
280 280
281#define cpufreq_freq_attr_ro(_name) \
282static struct freq_attr _name = \
283__ATTR(_name, 0444, show_##_name, NULL)
284
285#define cpufreq_freq_attr_ro_perm(_name, _perm) \
286static struct freq_attr _name = \
287__ATTR(_name, _perm, show_##_name, NULL)
288
289#define cpufreq_freq_attr_ro_old(_name) \
290static struct freq_attr _name##_old = \
291__ATTR(_name, 0444, show_##_name##_old, NULL)
292
293#define cpufreq_freq_attr_rw(_name) \
294static struct freq_attr _name = \
295__ATTR(_name, 0644, show_##_name, store_##_name)
296
297#define cpufreq_freq_attr_rw_old(_name) \
298static struct freq_attr _name##_old = \
299__ATTR(_name, 0644, show_##_name##_old, store_##_name##_old)
300
301
281struct global_attr { 302struct global_attr {
282 struct attribute attr; 303 struct attribute attr;
283 ssize_t (*show)(struct kobject *kobj, 304 ssize_t (*show)(struct kobject *kobj,
@@ -286,6 +307,15 @@ struct global_attr {
286 const char *c, size_t count); 307 const char *c, size_t count);
287}; 308};
288 309
310#define define_one_global_ro(_name) \
311static struct global_attr _name = \
312__ATTR(_name, 0444, show_##_name, NULL)
313
314#define define_one_global_rw(_name) \
315static struct global_attr _name = \
316__ATTR(_name, 0644, show_##_name, store_##_name)
317
318
289/********************************************************************* 319/*********************************************************************
290 * CPUFREQ 2.6. INTERFACE * 320 * CPUFREQ 2.6. INTERFACE *
291 *********************************************************************/ 321 *********************************************************************/
diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h
index a5740fc4d04b..a73454aec333 100644
--- a/include/linux/cpuset.h
+++ b/include/linux/cpuset.h
@@ -21,8 +21,7 @@ extern int number_of_cpusets; /* How many cpusets are defined in system? */
21extern int cpuset_init(void); 21extern int cpuset_init(void);
22extern void cpuset_init_smp(void); 22extern void cpuset_init_smp(void);
23extern void cpuset_cpus_allowed(struct task_struct *p, struct cpumask *mask); 23extern void cpuset_cpus_allowed(struct task_struct *p, struct cpumask *mask);
24extern void cpuset_cpus_allowed_locked(struct task_struct *p, 24extern int cpuset_cpus_allowed_fallback(struct task_struct *p);
25 struct cpumask *mask);
26extern nodemask_t cpuset_mems_allowed(struct task_struct *p); 25extern nodemask_t cpuset_mems_allowed(struct task_struct *p);
27#define cpuset_current_mems_allowed (current->mems_allowed) 26#define cpuset_current_mems_allowed (current->mems_allowed)
28void cpuset_init_current_mems_allowed(void); 27void cpuset_init_current_mems_allowed(void);
@@ -69,9 +68,6 @@ struct seq_file;
69extern void cpuset_task_status_allowed(struct seq_file *m, 68extern void cpuset_task_status_allowed(struct seq_file *m,
70 struct task_struct *task); 69 struct task_struct *task);
71 70
72extern void cpuset_lock(void);
73extern void cpuset_unlock(void);
74
75extern int cpuset_mem_spread_node(void); 71extern int cpuset_mem_spread_node(void);
76 72
77static inline int cpuset_do_page_mem_spread(void) 73static inline int cpuset_do_page_mem_spread(void)
@@ -105,10 +101,11 @@ static inline void cpuset_cpus_allowed(struct task_struct *p,
105{ 101{
106 cpumask_copy(mask, cpu_possible_mask); 102 cpumask_copy(mask, cpu_possible_mask);
107} 103}
108static inline void cpuset_cpus_allowed_locked(struct task_struct *p, 104
109 struct cpumask *mask) 105static inline int cpuset_cpus_allowed_fallback(struct task_struct *p)
110{ 106{
111 cpumask_copy(mask, cpu_possible_mask); 107 cpumask_copy(&p->cpus_allowed, cpu_possible_mask);
108 return cpumask_any(cpu_active_mask);
112} 109}
113 110
114static inline nodemask_t cpuset_mems_allowed(struct task_struct *p) 111static inline nodemask_t cpuset_mems_allowed(struct task_struct *p)
@@ -157,9 +154,6 @@ static inline void cpuset_task_status_allowed(struct seq_file *m,
157{ 154{
158} 155}
159 156
160static inline void cpuset_lock(void) {}
161static inline void cpuset_unlock(void) {}
162
163static inline int cpuset_mem_spread_node(void) 157static inline int cpuset_mem_spread_node(void)
164{ 158{
165 return 0; 159 return 0;
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 30b93b2a01a4..eebb617c17d8 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -186,6 +186,8 @@ d_iput: no no no yes
186 186
187#define DCACHE_FSNOTIFY_PARENT_WATCHED 0x0080 /* Parent inode is watched by some fsnotify listener */ 187#define DCACHE_FSNOTIFY_PARENT_WATCHED 0x0080 /* Parent inode is watched by some fsnotify listener */
188 188
189#define DCACHE_CANT_MOUNT 0x0100
190
189extern spinlock_t dcache_lock; 191extern spinlock_t dcache_lock;
190extern seqlock_t rename_lock; 192extern seqlock_t rename_lock;
191 193
@@ -358,6 +360,18 @@ static inline int d_unlinked(struct dentry *dentry)
358 return d_unhashed(dentry) && !IS_ROOT(dentry); 360 return d_unhashed(dentry) && !IS_ROOT(dentry);
359} 361}
360 362
363static inline int cant_mount(struct dentry *dentry)
364{
365 return (dentry->d_flags & DCACHE_CANT_MOUNT);
366}
367
368static inline void dont_mount(struct dentry *dentry)
369{
370 spin_lock(&dentry->d_lock);
371 dentry->d_flags |= DCACHE_CANT_MOUNT;
372 spin_unlock(&dentry->d_lock);
373}
374
361static inline struct dentry *dget_parent(struct dentry *dentry) 375static inline struct dentry *dget_parent(struct dentry *dentry)
362{ 376{
363 struct dentry *ret; 377 struct dentry *ret;
diff --git a/include/linux/debugobjects.h b/include/linux/debugobjects.h
index 8c243aaa86a7..597692f1fc8d 100644
--- a/include/linux/debugobjects.h
+++ b/include/linux/debugobjects.h
@@ -20,12 +20,14 @@ struct debug_obj_descr;
20 * struct debug_obj - representaion of an tracked object 20 * struct debug_obj - representaion of an tracked object
21 * @node: hlist node to link the object into the tracker list 21 * @node: hlist node to link the object into the tracker list
22 * @state: tracked object state 22 * @state: tracked object state
23 * @astate: current active state
23 * @object: pointer to the real object 24 * @object: pointer to the real object
24 * @descr: pointer to an object type specific debug description structure 25 * @descr: pointer to an object type specific debug description structure
25 */ 26 */
26struct debug_obj { 27struct debug_obj {
27 struct hlist_node node; 28 struct hlist_node node;
28 enum debug_obj_state state; 29 enum debug_obj_state state;
30 unsigned int astate;
29 void *object; 31 void *object;
30 struct debug_obj_descr *descr; 32 struct debug_obj_descr *descr;
31}; 33};
@@ -60,6 +62,15 @@ extern void debug_object_deactivate(void *addr, struct debug_obj_descr *descr);
60extern void debug_object_destroy (void *addr, struct debug_obj_descr *descr); 62extern void debug_object_destroy (void *addr, struct debug_obj_descr *descr);
61extern void debug_object_free (void *addr, struct debug_obj_descr *descr); 63extern void debug_object_free (void *addr, struct debug_obj_descr *descr);
62 64
65/*
66 * Active state:
67 * - Set at 0 upon initialization.
68 * - Must return to 0 before deactivation.
69 */
70extern void
71debug_object_active_state(void *addr, struct debug_obj_descr *descr,
72 unsigned int expect, unsigned int next);
73
63extern void debug_objects_early_init(void); 74extern void debug_objects_early_init(void);
64extern void debug_objects_mem_init(void); 75extern void debug_objects_mem_init(void);
65#else 76#else
diff --git a/include/linux/device.h b/include/linux/device.h
index 182192892d45..241b96bcd7ad 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -451,6 +451,10 @@ struct device {
451 451
452static inline const char *dev_name(const struct device *dev) 452static inline const char *dev_name(const struct device *dev)
453{ 453{
454 /* Use the init name until the kobject becomes available */
455 if (dev->init_name)
456 return dev->init_name;
457
454 return kobject_name(&dev->kobj); 458 return kobject_name(&dev->kobj);
455} 459}
456 460
diff --git a/include/linux/elf.h b/include/linux/elf.h
index 597858418051..4d608014753a 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -394,6 +394,7 @@ typedef struct elf64_shdr {
394#define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */ 394#define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */
395#define NT_S390_CTRS 0x304 /* s390 control registers */ 395#define NT_S390_CTRS 0x304 /* s390 control registers */
396#define NT_S390_PREFIX 0x305 /* s390 prefix register */ 396#define NT_S390_PREFIX 0x305 /* s390 prefix register */
397#define NT_S390_LAST_BREAK 0x306 /* s390 breaking event address */
397 398
398 399
399/* Note header in a PT_NOTE section */ 400/* Note header in a PT_NOTE section */
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index 01e6adea07ec..41e46330d9be 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -82,9 +82,13 @@ void clear_ftrace_function(void);
82extern void ftrace_stub(unsigned long a0, unsigned long a1); 82extern void ftrace_stub(unsigned long a0, unsigned long a1);
83 83
84#else /* !CONFIG_FUNCTION_TRACER */ 84#else /* !CONFIG_FUNCTION_TRACER */
85# define register_ftrace_function(ops) do { } while (0) 85/*
86# define unregister_ftrace_function(ops) do { } while (0) 86 * (un)register_ftrace_function must be a macro since the ops parameter
87# define clear_ftrace_function(ops) do { } while (0) 87 * must not be evaluated.
88 */
89#define register_ftrace_function(ops) ({ 0; })
90#define unregister_ftrace_function(ops) ({ 0; })
91static inline void clear_ftrace_function(void) { }
88static inline void ftrace_kill(void) { } 92static inline void ftrace_kill(void) { }
89static inline void ftrace_stop(void) { } 93static inline void ftrace_stop(void) { }
90static inline void ftrace_start(void) { } 94static inline void ftrace_start(void) { }
@@ -237,11 +241,13 @@ extern int skip_trace(unsigned long ip);
237extern void ftrace_disable_daemon(void); 241extern void ftrace_disable_daemon(void);
238extern void ftrace_enable_daemon(void); 242extern void ftrace_enable_daemon(void);
239#else 243#else
240# define skip_trace(ip) ({ 0; }) 244static inline int skip_trace(unsigned long ip) { return 0; }
241# define ftrace_force_update() ({ 0; }) 245static inline int ftrace_force_update(void) { return 0; }
242# define ftrace_set_filter(buf, len, reset) do { } while (0) 246static inline void ftrace_set_filter(unsigned char *buf, int len, int reset)
243# define ftrace_disable_daemon() do { } while (0) 247{
244# define ftrace_enable_daemon() do { } while (0) 248}
249static inline void ftrace_disable_daemon(void) { }
250static inline void ftrace_enable_daemon(void) { }
245static inline void ftrace_release_mod(struct module *mod) {} 251static inline void ftrace_release_mod(struct module *mod) {}
246static inline int register_ftrace_command(struct ftrace_func_command *cmd) 252static inline int register_ftrace_command(struct ftrace_func_command *cmd)
247{ 253{
@@ -314,16 +320,16 @@ static inline void __ftrace_enabled_restore(int enabled)
314 extern void time_hardirqs_on(unsigned long a0, unsigned long a1); 320 extern void time_hardirqs_on(unsigned long a0, unsigned long a1);
315 extern void time_hardirqs_off(unsigned long a0, unsigned long a1); 321 extern void time_hardirqs_off(unsigned long a0, unsigned long a1);
316#else 322#else
317# define time_hardirqs_on(a0, a1) do { } while (0) 323 static inline void time_hardirqs_on(unsigned long a0, unsigned long a1) { }
318# define time_hardirqs_off(a0, a1) do { } while (0) 324 static inline void time_hardirqs_off(unsigned long a0, unsigned long a1) { }
319#endif 325#endif
320 326
321#ifdef CONFIG_PREEMPT_TRACER 327#ifdef CONFIG_PREEMPT_TRACER
322 extern void trace_preempt_on(unsigned long a0, unsigned long a1); 328 extern void trace_preempt_on(unsigned long a0, unsigned long a1);
323 extern void trace_preempt_off(unsigned long a0, unsigned long a1); 329 extern void trace_preempt_off(unsigned long a0, unsigned long a1);
324#else 330#else
325# define trace_preempt_on(a0, a1) do { } while (0) 331 static inline void trace_preempt_on(unsigned long a0, unsigned long a1) { }
326# define trace_preempt_off(a0, a1) do { } while (0) 332 static inline void trace_preempt_off(unsigned long a0, unsigned long a1) { }
327#endif 333#endif
328 334
329#ifdef CONFIG_FTRACE_MCOUNT_RECORD 335#ifdef CONFIG_FTRACE_MCOUNT_RECORD
@@ -352,6 +358,10 @@ struct ftrace_graph_ret {
352 int depth; 358 int depth;
353}; 359};
354 360
361/* Type of the callback handlers for tracing function graph*/
362typedef void (*trace_func_graph_ret_t)(struct ftrace_graph_ret *); /* return */
363typedef int (*trace_func_graph_ent_t)(struct ftrace_graph_ent *); /* entry */
364
355#ifdef CONFIG_FUNCTION_GRAPH_TRACER 365#ifdef CONFIG_FUNCTION_GRAPH_TRACER
356 366
357/* for init task */ 367/* for init task */
@@ -400,10 +410,6 @@ extern char __irqentry_text_end[];
400 410
401#define FTRACE_RETFUNC_DEPTH 50 411#define FTRACE_RETFUNC_DEPTH 50
402#define FTRACE_RETSTACK_ALLOC_SIZE 32 412#define FTRACE_RETSTACK_ALLOC_SIZE 32
403/* Type of the callback handlers for tracing function graph*/
404typedef void (*trace_func_graph_ret_t)(struct ftrace_graph_ret *); /* return */
405typedef int (*trace_func_graph_ent_t)(struct ftrace_graph_ent *); /* entry */
406
407extern int register_ftrace_graph(trace_func_graph_ret_t retfunc, 413extern int register_ftrace_graph(trace_func_graph_ret_t retfunc,
408 trace_func_graph_ent_t entryfunc); 414 trace_func_graph_ent_t entryfunc);
409 415
@@ -441,6 +447,13 @@ static inline void unpause_graph_tracing(void)
441static inline void ftrace_graph_init_task(struct task_struct *t) { } 447static inline void ftrace_graph_init_task(struct task_struct *t) { }
442static inline void ftrace_graph_exit_task(struct task_struct *t) { } 448static inline void ftrace_graph_exit_task(struct task_struct *t) { }
443 449
450static inline int register_ftrace_graph(trace_func_graph_ret_t retfunc,
451 trace_func_graph_ent_t entryfunc)
452{
453 return -1;
454}
455static inline void unregister_ftrace_graph(void) { }
456
444static inline int task_curr_ret_stack(struct task_struct *tsk) 457static inline int task_curr_ret_stack(struct task_struct *tsk)
445{ 458{
446 return -1; 459 return -1;
@@ -492,7 +505,9 @@ static inline int test_tsk_trace_graph(struct task_struct *tsk)
492 return tsk->trace & TSK_TRACE_FL_GRAPH; 505 return tsk->trace & TSK_TRACE_FL_GRAPH;
493} 506}
494 507
495extern int ftrace_dump_on_oops; 508enum ftrace_dump_mode;
509
510extern enum ftrace_dump_mode ftrace_dump_on_oops;
496 511
497#ifdef CONFIG_PREEMPT 512#ifdef CONFIG_PREEMPT
498#define INIT_TRACE_RECURSION .trace_recursion = 0, 513#define INIT_TRACE_RECURSION .trace_recursion = 0,
@@ -504,18 +519,6 @@ extern int ftrace_dump_on_oops;
504#define INIT_TRACE_RECURSION 519#define INIT_TRACE_RECURSION
505#endif 520#endif
506 521
507#ifdef CONFIG_HW_BRANCH_TRACER
508
509void trace_hw_branch(u64 from, u64 to);
510void trace_hw_branch_oops(void);
511
512#else /* CONFIG_HW_BRANCH_TRACER */
513
514static inline void trace_hw_branch(u64 from, u64 to) {}
515static inline void trace_hw_branch_oops(void) {}
516
517#endif /* CONFIG_HW_BRANCH_TRACER */
518
519#ifdef CONFIG_FTRACE_SYSCALLS 522#ifdef CONFIG_FTRACE_SYSCALLS
520 523
521unsigned long arch_syscall_addr(int nr); 524unsigned long arch_syscall_addr(int nr);
diff --git a/include/linux/ftrace_event.h b/include/linux/ftrace_event.h
index c0f4b364c711..39e71b0a3bfd 100644
--- a/include/linux/ftrace_event.h
+++ b/include/linux/ftrace_event.h
@@ -58,6 +58,7 @@ struct trace_iterator {
58 /* The below is zeroed out in pipe_read */ 58 /* The below is zeroed out in pipe_read */
59 struct trace_seq seq; 59 struct trace_seq seq;
60 struct trace_entry *ent; 60 struct trace_entry *ent;
61 unsigned long lost_events;
61 int leftover; 62 int leftover;
62 int cpu; 63 int cpu;
63 u64 ts; 64 u64 ts;
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h
index 5d86fb2309d2..fd0c1b857d3d 100644
--- a/include/linux/hrtimer.h
+++ b/include/linux/hrtimer.h
@@ -422,6 +422,8 @@ extern void hrtimer_init_sleeper(struct hrtimer_sleeper *sl,
422 422
423extern int schedule_hrtimeout_range(ktime_t *expires, unsigned long delta, 423extern int schedule_hrtimeout_range(ktime_t *expires, unsigned long delta,
424 const enum hrtimer_mode mode); 424 const enum hrtimer_mode mode);
425extern int schedule_hrtimeout_range_clock(ktime_t *expires,
426 unsigned long delta, const enum hrtimer_mode mode, int clock);
425extern int schedule_hrtimeout(ktime_t *expires, const enum hrtimer_mode mode); 427extern int schedule_hrtimeout(ktime_t *expires, const enum hrtimer_mode mode);
426 428
427/* Soft interrupt function to run the hrtimer queues: */ 429/* Soft interrupt function to run the hrtimer queues: */
diff --git a/include/linux/hw_breakpoint.h b/include/linux/hw_breakpoint.h
index c70d27af03f9..a2d6ea49ec56 100644
--- a/include/linux/hw_breakpoint.h
+++ b/include/linux/hw_breakpoint.h
@@ -9,9 +9,22 @@ enum {
9}; 9};
10 10
11enum { 11enum {
12 HW_BREAKPOINT_R = 1, 12 HW_BREAKPOINT_EMPTY = 0,
13 HW_BREAKPOINT_W = 2, 13 HW_BREAKPOINT_R = 1,
14 HW_BREAKPOINT_X = 4, 14 HW_BREAKPOINT_W = 2,
15 HW_BREAKPOINT_RW = HW_BREAKPOINT_R | HW_BREAKPOINT_W,
16 HW_BREAKPOINT_X = 4,
17 HW_BREAKPOINT_INVALID = HW_BREAKPOINT_RW | HW_BREAKPOINT_X,
18};
19
20enum bp_type_idx {
21 TYPE_INST = 0,
22#ifdef CONFIG_HAVE_MIXED_BREAKPOINTS_REGS
23 TYPE_DATA = 0,
24#else
25 TYPE_DATA = 1,
26#endif
27 TYPE_MAX
15}; 28};
16 29
17#ifdef __KERNEL__ 30#ifdef __KERNEL__
@@ -34,6 +47,12 @@ static inline void hw_breakpoint_init(struct perf_event_attr *attr)
34 attr->sample_period = 1; 47 attr->sample_period = 1;
35} 48}
36 49
50static inline void ptrace_breakpoint_init(struct perf_event_attr *attr)
51{
52 hw_breakpoint_init(attr);
53 attr->exclude_kernel = 1;
54}
55
37static inline unsigned long hw_breakpoint_addr(struct perf_event *bp) 56static inline unsigned long hw_breakpoint_addr(struct perf_event *bp)
38{ 57{
39 return bp->attr.bp_addr; 58 return bp->attr.bp_addr;
diff --git a/include/linux/if_link.h b/include/linux/if_link.h
index c9bf92cd7653..d94963b379d9 100644
--- a/include/linux/if_link.h
+++ b/include/linux/if_link.h
@@ -79,10 +79,7 @@ enum {
79 IFLA_NET_NS_PID, 79 IFLA_NET_NS_PID,
80 IFLA_IFALIAS, 80 IFLA_IFALIAS,
81 IFLA_NUM_VF, /* Number of VFs if device is SR-IOV PF */ 81 IFLA_NUM_VF, /* Number of VFs if device is SR-IOV PF */
82 IFLA_VF_MAC, /* Hardware queue specific attributes */ 82 IFLA_VFINFO_LIST,
83 IFLA_VF_VLAN,
84 IFLA_VF_TX_RATE, /* TX Bandwidth Allocation */
85 IFLA_VFINFO,
86 __IFLA_MAX 83 __IFLA_MAX
87}; 84};
88 85
@@ -203,6 +200,24 @@ enum macvlan_mode {
203 200
204/* SR-IOV virtual function managment section */ 201/* SR-IOV virtual function managment section */
205 202
203enum {
204 IFLA_VF_INFO_UNSPEC,
205 IFLA_VF_INFO,
206 __IFLA_VF_INFO_MAX,
207};
208
209#define IFLA_VF_INFO_MAX (__IFLA_VF_INFO_MAX - 1)
210
211enum {
212 IFLA_VF_UNSPEC,
213 IFLA_VF_MAC, /* Hardware queue specific attributes */
214 IFLA_VF_VLAN,
215 IFLA_VF_TX_RATE, /* TX Bandwidth Allocation */
216 __IFLA_VF_MAX,
217};
218
219#define IFLA_VF_MAX (__IFLA_VF_MAX - 1)
220
206struct ifla_vf_mac { 221struct ifla_vf_mac {
207 __u32 vf; 222 __u32 vf;
208 __u8 mac[32]; /* MAX_ADDR_LEN */ 223 __u8 mac[32]; /* MAX_ADDR_LEN */
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index b1ed1cd8e2a8..7996fc2c9ba9 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -49,7 +49,6 @@ extern struct group_info init_groups;
49 { .first = &init_task.pids[PIDTYPE_PGID].node }, \ 49 { .first = &init_task.pids[PIDTYPE_PGID].node }, \
50 { .first = &init_task.pids[PIDTYPE_SID].node }, \ 50 { .first = &init_task.pids[PIDTYPE_SID].node }, \
51 }, \ 51 }, \
52 .rcu = RCU_HEAD_INIT, \
53 .level = 0, \ 52 .level = 0, \
54 .numbers = { { \ 53 .numbers = { { \
55 .nr = 0, \ 54 .nr = 0, \
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 75f3f00ac1e5..5137db3317f9 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -39,7 +39,8 @@
39 * These flags used only by the kernel as part of the 39 * These flags used only by the kernel as part of the
40 * irq handling routines. 40 * irq handling routines.
41 * 41 *
42 * IRQF_DISABLED - keep irqs disabled when calling the action handler 42 * IRQF_DISABLED - keep irqs disabled when calling the action handler.
43 * DEPRECATED. This flag is a NOOP and scheduled to be removed
43 * IRQF_SAMPLE_RANDOM - irq is used to feed the random generator 44 * IRQF_SAMPLE_RANDOM - irq is used to feed the random generator
44 * IRQF_SHARED - allow sharing the irq among several devices 45 * IRQF_SHARED - allow sharing the irq among several devices
45 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur 46 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
@@ -77,6 +78,18 @@ enum {
77 IRQTF_AFFINITY, 78 IRQTF_AFFINITY,
78}; 79};
79 80
81/**
82 * These values can be returned by request_any_context_irq() and
83 * describe the context the interrupt will be run in.
84 *
85 * IRQC_IS_HARDIRQ - interrupt runs in hardirq context
86 * IRQC_IS_NESTED - interrupt runs in a nested threaded context
87 */
88enum {
89 IRQC_IS_HARDIRQ = 0,
90 IRQC_IS_NESTED,
91};
92
80typedef irqreturn_t (*irq_handler_t)(int, void *); 93typedef irqreturn_t (*irq_handler_t)(int, void *);
81 94
82/** 95/**
@@ -120,6 +133,10 @@ request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags,
120 return request_threaded_irq(irq, handler, NULL, flags, name, dev); 133 return request_threaded_irq(irq, handler, NULL, flags, name, dev);
121} 134}
122 135
136extern int __must_check
137request_any_context_irq(unsigned int irq, irq_handler_t handler,
138 unsigned long flags, const char *name, void *dev_id);
139
123extern void exit_irq_thread(void); 140extern void exit_irq_thread(void);
124#else 141#else
125 142
@@ -141,6 +158,13 @@ request_threaded_irq(unsigned int irq, irq_handler_t handler,
141 return request_irq(irq, handler, flags, name, dev); 158 return request_irq(irq, handler, flags, name, dev);
142} 159}
143 160
161static inline int __must_check
162request_any_context_irq(unsigned int irq, irq_handler_t handler,
163 unsigned long flags, const char *name, void *dev_id)
164{
165 return request_irq(irq, handler, flags, name, dev_id);
166}
167
144static inline void exit_irq_thread(void) { } 168static inline void exit_irq_thread(void) { }
145#endif 169#endif
146 170
@@ -209,6 +233,7 @@ extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask);
209extern int irq_can_set_affinity(unsigned int irq); 233extern int irq_can_set_affinity(unsigned int irq);
210extern int irq_select_affinity(unsigned int irq); 234extern int irq_select_affinity(unsigned int irq);
211 235
236extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m);
212#else /* CONFIG_SMP */ 237#else /* CONFIG_SMP */
213 238
214static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m) 239static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m)
@@ -223,6 +248,11 @@ static inline int irq_can_set_affinity(unsigned int irq)
223 248
224static inline int irq_select_affinity(unsigned int irq) { return 0; } 249static inline int irq_select_affinity(unsigned int irq) { return 0; }
225 250
251static inline int irq_set_affinity_hint(unsigned int irq,
252 const struct cpumask *m)
253{
254 return -EINVAL;
255}
226#endif /* CONFIG_SMP && CONFIG_GENERIC_HARDIRQS */ 256#endif /* CONFIG_SMP && CONFIG_GENERIC_HARDIRQS */
227 257
228#ifdef CONFIG_GENERIC_HARDIRQS 258#ifdef CONFIG_GENERIC_HARDIRQS
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 3af4ffd591b9..be22ad83689c 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -37,9 +37,9 @@ struct iommu_ops {
37 int (*attach_dev)(struct iommu_domain *domain, struct device *dev); 37 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
38 void (*detach_dev)(struct iommu_domain *domain, struct device *dev); 38 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
39 int (*map)(struct iommu_domain *domain, unsigned long iova, 39 int (*map)(struct iommu_domain *domain, unsigned long iova,
40 phys_addr_t paddr, size_t size, int prot); 40 phys_addr_t paddr, int gfp_order, int prot);
41 void (*unmap)(struct iommu_domain *domain, unsigned long iova, 41 int (*unmap)(struct iommu_domain *domain, unsigned long iova,
42 size_t size); 42 int gfp_order);
43 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, 43 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain,
44 unsigned long iova); 44 unsigned long iova);
45 int (*domain_has_cap)(struct iommu_domain *domain, 45 int (*domain_has_cap)(struct iommu_domain *domain,
@@ -56,10 +56,10 @@ extern int iommu_attach_device(struct iommu_domain *domain,
56 struct device *dev); 56 struct device *dev);
57extern void iommu_detach_device(struct iommu_domain *domain, 57extern void iommu_detach_device(struct iommu_domain *domain,
58 struct device *dev); 58 struct device *dev);
59extern int iommu_map_range(struct iommu_domain *domain, unsigned long iova, 59extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
60 phys_addr_t paddr, size_t size, int prot); 60 phys_addr_t paddr, int gfp_order, int prot);
61extern void iommu_unmap_range(struct iommu_domain *domain, unsigned long iova, 61extern int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
62 size_t size); 62 int gfp_order);
63extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, 63extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
64 unsigned long iova); 64 unsigned long iova);
65extern int iommu_domain_has_cap(struct iommu_domain *domain, 65extern int iommu_domain_has_cap(struct iommu_domain *domain,
@@ -96,16 +96,16 @@ static inline void iommu_detach_device(struct iommu_domain *domain,
96{ 96{
97} 97}
98 98
99static inline int iommu_map_range(struct iommu_domain *domain, 99static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
100 unsigned long iova, phys_addr_t paddr, 100 phys_addr_t paddr, int gfp_order, int prot)
101 size_t size, int prot)
102{ 101{
103 return -ENODEV; 102 return -ENODEV;
104} 103}
105 104
106static inline void iommu_unmap_range(struct iommu_domain *domain, 105static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
107 unsigned long iova, size_t size) 106 int gfp_order)
108{ 107{
108 return -ENODEV;
109} 109}
110 110
111static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, 111static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 707ab122e2e6..c03243ad84b4 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -195,6 +195,7 @@ struct irq_desc {
195 raw_spinlock_t lock; 195 raw_spinlock_t lock;
196#ifdef CONFIG_SMP 196#ifdef CONFIG_SMP
197 cpumask_var_t affinity; 197 cpumask_var_t affinity;
198 const struct cpumask *affinity_hint;
198 unsigned int node; 199 unsigned int node;
199#ifdef CONFIG_GENERIC_PENDING_IRQ 200#ifdef CONFIG_GENERIC_PENDING_IRQ
200 cpumask_var_t pending_mask; 201 cpumask_var_t pending_mask;
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 9365227dbaf6..9fb1c1299032 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -490,6 +490,13 @@ static inline void tracing_off(void) { }
490static inline void tracing_off_permanent(void) { } 490static inline void tracing_off_permanent(void) { }
491static inline int tracing_is_on(void) { return 0; } 491static inline int tracing_is_on(void) { return 0; }
492#endif 492#endif
493
494enum ftrace_dump_mode {
495 DUMP_NONE,
496 DUMP_ALL,
497 DUMP_ORIG,
498};
499
493#ifdef CONFIG_TRACING 500#ifdef CONFIG_TRACING
494extern void tracing_start(void); 501extern void tracing_start(void);
495extern void tracing_stop(void); 502extern void tracing_stop(void);
@@ -571,7 +578,7 @@ __ftrace_vbprintk(unsigned long ip, const char *fmt, va_list ap);
571extern int 578extern int
572__ftrace_vprintk(unsigned long ip, const char *fmt, va_list ap); 579__ftrace_vprintk(unsigned long ip, const char *fmt, va_list ap);
573 580
574extern void ftrace_dump(void); 581extern void ftrace_dump(enum ftrace_dump_mode oops_dump_mode);
575#else 582#else
576static inline void 583static inline void
577ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3) { } 584ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3) { }
@@ -592,7 +599,7 @@ ftrace_vprintk(const char *fmt, va_list ap)
592{ 599{
593 return 0; 600 return 0;
594} 601}
595static inline void ftrace_dump(void) { } 602static inline void ftrace_dump(enum ftrace_dump_mode oops_dump_mode) { }
596#endif /* CONFIG_TRACING */ 603#endif /* CONFIG_TRACING */
597 604
598/* 605/*
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 462acaf36f3a..fb19bb92b809 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -19,7 +19,6 @@ struct anon_vma;
19struct file_ra_state; 19struct file_ra_state;
20struct user_struct; 20struct user_struct;
21struct writeback_control; 21struct writeback_control;
22struct rlimit;
23 22
24#ifndef CONFIG_DISCONTIGMEM /* Don't use mapnrs, do it properly */ 23#ifndef CONFIG_DISCONTIGMEM /* Don't use mapnrs, do it properly */
25extern unsigned long max_mapnr; 24extern unsigned long max_mapnr;
@@ -1449,9 +1448,6 @@ int vmemmap_populate_basepages(struct page *start_page,
1449int vmemmap_populate(struct page *start_page, unsigned long pages, int node); 1448int vmemmap_populate(struct page *start_page, unsigned long pages, int node);
1450void vmemmap_populate_print_last(void); 1449void vmemmap_populate_print_last(void);
1451 1450
1452extern int account_locked_memory(struct mm_struct *mm, struct rlimit *rlim,
1453 size_t size);
1454extern void refund_locked_memory(struct mm_struct *mm, size_t size);
1455 1451
1456enum mf_flags { 1452enum mf_flags {
1457 MF_COUNT_INCREASED = 1 << 0, 1453 MF_COUNT_INCREASED = 1 << 0,
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index f58e9d836f32..56fde4364e4c 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -474,4 +474,13 @@ struct platform_device_id {
474 __attribute__((aligned(sizeof(kernel_ulong_t)))); 474 __attribute__((aligned(sizeof(kernel_ulong_t))));
475}; 475};
476 476
477struct zorro_device_id {
478 __u32 id; /* Device ID or ZORRO_WILDCARD */
479 kernel_ulong_t driver_data; /* Data private to the driver */
480};
481
482#define ZORRO_WILDCARD (0xffffffff) /* not official */
483
484#define ZORRO_DEVICE_MODALIAS_FMT "zorro:i%08X"
485
477#endif /* LINUX_MOD_DEVICETABLE_H */ 486#endif /* LINUX_MOD_DEVICETABLE_H */
diff --git a/include/linux/module.h b/include/linux/module.h
index 515d53ae6a79..6914fcad4673 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -465,8 +465,7 @@ static inline void __module_get(struct module *module)
465 if (module) { 465 if (module) {
466 preempt_disable(); 466 preempt_disable();
467 __this_cpu_inc(module->refptr->incs); 467 __this_cpu_inc(module->refptr->incs);
468 trace_module_get(module, _THIS_IP_, 468 trace_module_get(module, _THIS_IP_);
469 __this_cpu_read(module->refptr->incs));
470 preempt_enable(); 469 preempt_enable();
471 } 470 }
472} 471}
@@ -480,8 +479,7 @@ static inline int try_module_get(struct module *module)
480 479
481 if (likely(module_is_live(module))) { 480 if (likely(module_is_live(module))) {
482 __this_cpu_inc(module->refptr->incs); 481 __this_cpu_inc(module->refptr->incs);
483 trace_module_get(module, _THIS_IP_, 482 trace_module_get(module, _THIS_IP_);
484 __this_cpu_read(module->refptr->incs));
485 } else 483 } else
486 ret = 0; 484 ret = 0;
487 485
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index c8e375440403..3fd5c82e0e18 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -203,8 +203,19 @@ struct perf_event_attr {
203 enable_on_exec : 1, /* next exec enables */ 203 enable_on_exec : 1, /* next exec enables */
204 task : 1, /* trace fork/exit */ 204 task : 1, /* trace fork/exit */
205 watermark : 1, /* wakeup_watermark */ 205 watermark : 1, /* wakeup_watermark */
206 206 /*
207 __reserved_1 : 49; 207 * precise_ip:
208 *
209 * 0 - SAMPLE_IP can have arbitrary skid
210 * 1 - SAMPLE_IP must have constant skid
211 * 2 - SAMPLE_IP requested to have 0 skid
212 * 3 - SAMPLE_IP must have 0 skid
213 *
214 * See also PERF_RECORD_MISC_EXACT_IP
215 */
216 precise_ip : 2, /* skid constraint */
217
218 __reserved_1 : 47;
208 219
209 union { 220 union {
210 __u32 wakeup_events; /* wakeup every n events */ 221 __u32 wakeup_events; /* wakeup every n events */
@@ -287,11 +298,24 @@ struct perf_event_mmap_page {
287 __u64 data_tail; /* user-space written tail */ 298 __u64 data_tail; /* user-space written tail */
288}; 299};
289 300
290#define PERF_RECORD_MISC_CPUMODE_MASK (3 << 0) 301#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
291#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 302#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
292#define PERF_RECORD_MISC_KERNEL (1 << 0) 303#define PERF_RECORD_MISC_KERNEL (1 << 0)
293#define PERF_RECORD_MISC_USER (2 << 0) 304#define PERF_RECORD_MISC_USER (2 << 0)
294#define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 305#define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
306#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
307#define PERF_RECORD_MISC_GUEST_USER (5 << 0)
308
309/*
310 * Indicates that the content of PERF_SAMPLE_IP points to
311 * the actual instruction that triggered the event. See also
312 * perf_event_attr::precise_ip.
313 */
314#define PERF_RECORD_MISC_EXACT_IP (1 << 14)
315/*
316 * Reserve the last bit to indicate some extended misc field
317 */
318#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
295 319
296struct perf_event_header { 320struct perf_event_header {
297 __u32 type; 321 __u32 type;
@@ -439,6 +463,12 @@ enum perf_callchain_context {
439# include <asm/perf_event.h> 463# include <asm/perf_event.h>
440#endif 464#endif
441 465
466struct perf_guest_info_callbacks {
467 int (*is_in_guest) (void);
468 int (*is_user_mode) (void);
469 unsigned long (*get_guest_ip) (void);
470};
471
442#ifdef CONFIG_HAVE_HW_BREAKPOINT 472#ifdef CONFIG_HAVE_HW_BREAKPOINT
443#include <asm/hw_breakpoint.h> 473#include <asm/hw_breakpoint.h>
444#endif 474#endif
@@ -468,6 +498,17 @@ struct perf_raw_record {
468 void *data; 498 void *data;
469}; 499};
470 500
501struct perf_branch_entry {
502 __u64 from;
503 __u64 to;
504 __u64 flags;
505};
506
507struct perf_branch_stack {
508 __u64 nr;
509 struct perf_branch_entry entries[0];
510};
511
471struct task_struct; 512struct task_struct;
472 513
473/** 514/**
@@ -506,6 +547,8 @@ struct hw_perf_event {
506 547
507struct perf_event; 548struct perf_event;
508 549
550#define PERF_EVENT_TXN_STARTED 1
551
509/** 552/**
510 * struct pmu - generic performance monitoring unit 553 * struct pmu - generic performance monitoring unit
511 */ 554 */
@@ -516,6 +559,16 @@ struct pmu {
516 void (*stop) (struct perf_event *event); 559 void (*stop) (struct perf_event *event);
517 void (*read) (struct perf_event *event); 560 void (*read) (struct perf_event *event);
518 void (*unthrottle) (struct perf_event *event); 561 void (*unthrottle) (struct perf_event *event);
562
563 /*
564 * group events scheduling is treated as a transaction,
565 * add group events as a whole and perform one schedulability test.
566 * If test fails, roll back the whole group
567 */
568
569 void (*start_txn) (const struct pmu *pmu);
570 void (*cancel_txn) (const struct pmu *pmu);
571 int (*commit_txn) (const struct pmu *pmu);
519}; 572};
520 573
521/** 574/**
@@ -571,6 +624,14 @@ enum perf_group_flag {
571 PERF_GROUP_SOFTWARE = 0x1, 624 PERF_GROUP_SOFTWARE = 0x1,
572}; 625};
573 626
627#define SWEVENT_HLIST_BITS 8
628#define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS)
629
630struct swevent_hlist {
631 struct hlist_head heads[SWEVENT_HLIST_SIZE];
632 struct rcu_head rcu_head;
633};
634
574/** 635/**
575 * struct perf_event - performance event kernel representation: 636 * struct perf_event - performance event kernel representation:
576 */ 637 */
@@ -579,6 +640,7 @@ struct perf_event {
579 struct list_head group_entry; 640 struct list_head group_entry;
580 struct list_head event_entry; 641 struct list_head event_entry;
581 struct list_head sibling_list; 642 struct list_head sibling_list;
643 struct hlist_node hlist_entry;
582 int nr_siblings; 644 int nr_siblings;
583 int group_flags; 645 int group_flags;
584 struct perf_event *group_leader; 646 struct perf_event *group_leader;
@@ -726,6 +788,9 @@ struct perf_cpu_context {
726 int active_oncpu; 788 int active_oncpu;
727 int max_pertask; 789 int max_pertask;
728 int exclusive; 790 int exclusive;
791 struct swevent_hlist *swevent_hlist;
792 struct mutex hlist_mutex;
793 int hlist_refcount;
729 794
730 /* 795 /*
731 * Recursion avoidance: 796 * Recursion avoidance:
@@ -769,9 +834,6 @@ extern void perf_disable(void);
769extern void perf_enable(void); 834extern void perf_enable(void);
770extern int perf_event_task_disable(void); 835extern int perf_event_task_disable(void);
771extern int perf_event_task_enable(void); 836extern int perf_event_task_enable(void);
772extern int hw_perf_group_sched_in(struct perf_event *group_leader,
773 struct perf_cpu_context *cpuctx,
774 struct perf_event_context *ctx);
775extern void perf_event_update_userpage(struct perf_event *event); 837extern void perf_event_update_userpage(struct perf_event *event);
776extern int perf_event_release_kernel(struct perf_event *event); 838extern int perf_event_release_kernel(struct perf_event *event);
777extern struct perf_event * 839extern struct perf_event *
@@ -902,6 +964,10 @@ static inline void perf_event_mmap(struct vm_area_struct *vma)
902 __perf_event_mmap(vma); 964 __perf_event_mmap(vma);
903} 965}
904 966
967extern struct perf_guest_info_callbacks *perf_guest_cbs;
968extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
969extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
970
905extern void perf_event_comm(struct task_struct *tsk); 971extern void perf_event_comm(struct task_struct *tsk);
906extern void perf_event_fork(struct task_struct *tsk); 972extern void perf_event_fork(struct task_struct *tsk);
907 973
@@ -971,6 +1037,11 @@ perf_sw_event(u32 event_id, u64 nr, int nmi,
971static inline void 1037static inline void
972perf_bp_event(struct perf_event *event, void *data) { } 1038perf_bp_event(struct perf_event *event, void *data) { }
973 1039
1040static inline int perf_register_guest_info_callbacks
1041(struct perf_guest_info_callbacks *callbacks) { return 0; }
1042static inline int perf_unregister_guest_info_callbacks
1043(struct perf_guest_info_callbacks *callbacks) { return 0; }
1044
974static inline void perf_event_mmap(struct vm_area_struct *vma) { } 1045static inline void perf_event_mmap(struct vm_area_struct *vma) { }
975static inline void perf_event_comm(struct task_struct *tsk) { } 1046static inline void perf_event_comm(struct task_struct *tsk) { }
976static inline void perf_event_fork(struct task_struct *tsk) { } 1047static inline void perf_event_fork(struct task_struct *tsk) { }
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index 212da17d06af..5417944d3687 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -44,12 +44,14 @@ extern int platform_get_irq_byname(struct platform_device *, const char *);
44extern int platform_add_devices(struct platform_device **, int); 44extern int platform_add_devices(struct platform_device **, int);
45 45
46extern struct platform_device *platform_device_register_simple(const char *, int id, 46extern struct platform_device *platform_device_register_simple(const char *, int id,
47 struct resource *, unsigned int); 47 const struct resource *, unsigned int);
48extern struct platform_device *platform_device_register_data(struct device *, 48extern struct platform_device *platform_device_register_data(struct device *,
49 const char *, int, const void *, size_t); 49 const char *, int, const void *, size_t);
50 50
51extern struct platform_device *platform_device_alloc(const char *name, int id); 51extern struct platform_device *platform_device_alloc(const char *name, int id);
52extern int platform_device_add_resources(struct platform_device *pdev, struct resource *res, unsigned int num); 52extern int platform_device_add_resources(struct platform_device *pdev,
53 const struct resource *res,
54 unsigned int num);
53extern int platform_device_add_data(struct platform_device *pdev, const void *data, size_t size); 55extern int platform_device_add_data(struct platform_device *pdev, const void *data, size_t size);
54extern int platform_device_add(struct platform_device *pdev); 56extern int platform_device_add(struct platform_device *pdev);
55extern void platform_device_del(struct platform_device *pdev); 57extern void platform_device_del(struct platform_device *pdev);
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index e1fb60729979..4272521e29e9 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -345,18 +345,6 @@ static inline void user_single_step_siginfo(struct task_struct *tsk,
345#define arch_ptrace_stop(code, info) do { } while (0) 345#define arch_ptrace_stop(code, info) do { } while (0)
346#endif 346#endif
347 347
348#ifndef arch_ptrace_untrace
349/*
350 * Do machine-specific work before untracing child.
351 *
352 * This is called for a normal detach as well as from ptrace_exit()
353 * when the tracing task dies.
354 *
355 * Called with write_lock(&tasklist_lock) held.
356 */
357#define arch_ptrace_untrace(task) do { } while (0)
358#endif
359
360extern int task_current_syscall(struct task_struct *target, long *callno, 348extern int task_current_syscall(struct task_struct *target, long *callno,
361 unsigned long args[6], unsigned int maxargs, 349 unsigned long args[6], unsigned int maxargs,
362 unsigned long *sp, unsigned long *pc); 350 unsigned long *sp, unsigned long *pc);
diff --git a/include/linux/rbtree.h b/include/linux/rbtree.h
index 5210a5c60877..fe1872e5b37e 100644
--- a/include/linux/rbtree.h
+++ b/include/linux/rbtree.h
@@ -110,6 +110,7 @@ struct rb_node
110struct rb_root 110struct rb_root
111{ 111{
112 struct rb_node *rb_node; 112 struct rb_node *rb_node;
113 void (*augment_cb)(struct rb_node *node);
113}; 114};
114 115
115 116
@@ -129,7 +130,9 @@ static inline void rb_set_color(struct rb_node *rb, int color)
129 rb->rb_parent_color = (rb->rb_parent_color & ~1) | color; 130 rb->rb_parent_color = (rb->rb_parent_color & ~1) | color;
130} 131}
131 132
132#define RB_ROOT (struct rb_root) { NULL, } 133#define RB_ROOT (struct rb_root) { NULL, NULL, }
134#define RB_AUGMENT_ROOT(x) (struct rb_root) { NULL, x}
135
133#define rb_entry(ptr, type, member) container_of(ptr, type, member) 136#define rb_entry(ptr, type, member) container_of(ptr, type, member)
134 137
135#define RB_EMPTY_ROOT(root) ((root)->rb_node == NULL) 138#define RB_EMPTY_ROOT(root) ((root)->rb_node == NULL)
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index db266bbed23f..b653b4aaa8a6 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -56,8 +56,6 @@ struct rcu_head {
56}; 56};
57 57
58/* Exported common interfaces */ 58/* Exported common interfaces */
59extern void synchronize_rcu_bh(void);
60extern void synchronize_sched(void);
61extern void rcu_barrier(void); 59extern void rcu_barrier(void);
62extern void rcu_barrier_bh(void); 60extern void rcu_barrier_bh(void);
63extern void rcu_barrier_sched(void); 61extern void rcu_barrier_sched(void);
@@ -66,8 +64,6 @@ extern int sched_expedited_torture_stats(char *page);
66 64
67/* Internal to kernel */ 65/* Internal to kernel */
68extern void rcu_init(void); 66extern void rcu_init(void);
69extern int rcu_scheduler_active;
70extern void rcu_scheduler_starting(void);
71 67
72#if defined(CONFIG_TREE_RCU) || defined(CONFIG_TREE_PREEMPT_RCU) 68#if defined(CONFIG_TREE_RCU) || defined(CONFIG_TREE_PREEMPT_RCU)
73#include <linux/rcutree.h> 69#include <linux/rcutree.h>
@@ -83,6 +79,14 @@ extern void rcu_scheduler_starting(void);
83 (ptr)->next = NULL; (ptr)->func = NULL; \ 79 (ptr)->next = NULL; (ptr)->func = NULL; \
84} while (0) 80} while (0)
85 81
82static inline void init_rcu_head_on_stack(struct rcu_head *head)
83{
84}
85
86static inline void destroy_rcu_head_on_stack(struct rcu_head *head)
87{
88}
89
86#ifdef CONFIG_DEBUG_LOCK_ALLOC 90#ifdef CONFIG_DEBUG_LOCK_ALLOC
87 91
88extern struct lockdep_map rcu_lock_map; 92extern struct lockdep_map rcu_lock_map;
@@ -106,12 +110,13 @@ extern int debug_lockdep_rcu_enabled(void);
106/** 110/**
107 * rcu_read_lock_held - might we be in RCU read-side critical section? 111 * rcu_read_lock_held - might we be in RCU read-side critical section?
108 * 112 *
109 * If CONFIG_PROVE_LOCKING is selected and enabled, returns nonzero iff in 113 * If CONFIG_DEBUG_LOCK_ALLOC is selected, returns nonzero iff in an RCU
110 * an RCU read-side critical section. In absence of CONFIG_PROVE_LOCKING, 114 * read-side critical section. In absence of CONFIG_DEBUG_LOCK_ALLOC,
111 * this assumes we are in an RCU read-side critical section unless it can 115 * this assumes we are in an RCU read-side critical section unless it can
112 * prove otherwise. 116 * prove otherwise.
113 * 117 *
114 * Check rcu_scheduler_active to prevent false positives during boot. 118 * Check debug_lockdep_rcu_enabled() to prevent false positives during boot
119 * and while lockdep is disabled.
115 */ 120 */
116static inline int rcu_read_lock_held(void) 121static inline int rcu_read_lock_held(void)
117{ 122{
@@ -129,13 +134,15 @@ extern int rcu_read_lock_bh_held(void);
129/** 134/**
130 * rcu_read_lock_sched_held - might we be in RCU-sched read-side critical section? 135 * rcu_read_lock_sched_held - might we be in RCU-sched read-side critical section?
131 * 136 *
132 * If CONFIG_PROVE_LOCKING is selected and enabled, returns nonzero iff in an 137 * If CONFIG_DEBUG_LOCK_ALLOC is selected, returns nonzero iff in an
133 * RCU-sched read-side critical section. In absence of CONFIG_PROVE_LOCKING, 138 * RCU-sched read-side critical section. In absence of
134 * this assumes we are in an RCU-sched read-side critical section unless it 139 * CONFIG_DEBUG_LOCK_ALLOC, this assumes we are in an RCU-sched read-side
135 * can prove otherwise. Note that disabling of preemption (including 140 * critical section unless it can prove otherwise. Note that disabling
136 * disabling irqs) counts as an RCU-sched read-side critical section. 141 * of preemption (including disabling irqs) counts as an RCU-sched
142 * read-side critical section.
137 * 143 *
138 * Check rcu_scheduler_active to prevent false positives during boot. 144 * Check debug_lockdep_rcu_enabled() to prevent false positives during boot
145 * and while lockdep is disabled.
139 */ 146 */
140#ifdef CONFIG_PREEMPT 147#ifdef CONFIG_PREEMPT
141static inline int rcu_read_lock_sched_held(void) 148static inline int rcu_read_lock_sched_held(void)
@@ -177,7 +184,7 @@ static inline int rcu_read_lock_bh_held(void)
177#ifdef CONFIG_PREEMPT 184#ifdef CONFIG_PREEMPT
178static inline int rcu_read_lock_sched_held(void) 185static inline int rcu_read_lock_sched_held(void)
179{ 186{
180 return !rcu_scheduler_active || preempt_count() != 0 || irqs_disabled(); 187 return preempt_count() != 0 || irqs_disabled();
181} 188}
182#else /* #ifdef CONFIG_PREEMPT */ 189#else /* #ifdef CONFIG_PREEMPT */
183static inline int rcu_read_lock_sched_held(void) 190static inline int rcu_read_lock_sched_held(void)
@@ -192,6 +199,15 @@ static inline int rcu_read_lock_sched_held(void)
192 199
193extern int rcu_my_thread_group_empty(void); 200extern int rcu_my_thread_group_empty(void);
194 201
202#define __do_rcu_dereference_check(c) \
203 do { \
204 static bool __warned; \
205 if (debug_lockdep_rcu_enabled() && !__warned && !(c)) { \
206 __warned = true; \
207 lockdep_rcu_dereference(__FILE__, __LINE__); \
208 } \
209 } while (0)
210
195/** 211/**
196 * rcu_dereference_check - rcu_dereference with debug checking 212 * rcu_dereference_check - rcu_dereference with debug checking
197 * @p: The pointer to read, prior to dereferencing 213 * @p: The pointer to read, prior to dereferencing
@@ -221,8 +237,7 @@ extern int rcu_my_thread_group_empty(void);
221 */ 237 */
222#define rcu_dereference_check(p, c) \ 238#define rcu_dereference_check(p, c) \
223 ({ \ 239 ({ \
224 if (debug_lockdep_rcu_enabled() && !(c)) \ 240 __do_rcu_dereference_check(c); \
225 lockdep_rcu_dereference(__FILE__, __LINE__); \
226 rcu_dereference_raw(p); \ 241 rcu_dereference_raw(p); \
227 }) 242 })
228 243
@@ -239,8 +254,7 @@ extern int rcu_my_thread_group_empty(void);
239 */ 254 */
240#define rcu_dereference_protected(p, c) \ 255#define rcu_dereference_protected(p, c) \
241 ({ \ 256 ({ \
242 if (debug_lockdep_rcu_enabled() && !(c)) \ 257 __do_rcu_dereference_check(c); \
243 lockdep_rcu_dereference(__FILE__, __LINE__); \
244 (p); \ 258 (p); \
245 }) 259 })
246 260
diff --git a/include/linux/rcutiny.h b/include/linux/rcutiny.h
index a5195875480a..e2e893144a84 100644
--- a/include/linux/rcutiny.h
+++ b/include/linux/rcutiny.h
@@ -29,6 +29,10 @@
29 29
30void rcu_sched_qs(int cpu); 30void rcu_sched_qs(int cpu);
31void rcu_bh_qs(int cpu); 31void rcu_bh_qs(int cpu);
32static inline void rcu_note_context_switch(int cpu)
33{
34 rcu_sched_qs(cpu);
35}
32 36
33#define __rcu_read_lock() preempt_disable() 37#define __rcu_read_lock() preempt_disable()
34#define __rcu_read_unlock() preempt_enable() 38#define __rcu_read_unlock() preempt_enable()
@@ -60,8 +64,6 @@ static inline long rcu_batches_completed_bh(void)
60 return 0; 64 return 0;
61} 65}
62 66
63extern int rcu_expedited_torture_stats(char *page);
64
65static inline void rcu_force_quiescent_state(void) 67static inline void rcu_force_quiescent_state(void)
66{ 68{
67} 69}
@@ -74,7 +76,17 @@ static inline void rcu_sched_force_quiescent_state(void)
74{ 76{
75} 77}
76 78
77#define synchronize_rcu synchronize_sched 79extern void synchronize_sched(void);
80
81static inline void synchronize_rcu(void)
82{
83 synchronize_sched();
84}
85
86static inline void synchronize_rcu_bh(void)
87{
88 synchronize_sched();
89}
78 90
79static inline void synchronize_rcu_expedited(void) 91static inline void synchronize_rcu_expedited(void)
80{ 92{
@@ -114,4 +126,17 @@ static inline int rcu_preempt_depth(void)
114 return 0; 126 return 0;
115} 127}
116 128
129#ifdef CONFIG_DEBUG_LOCK_ALLOC
130
131extern int rcu_scheduler_active __read_mostly;
132extern void rcu_scheduler_starting(void);
133
134#else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */
135
136static inline void rcu_scheduler_starting(void)
137{
138}
139
140#endif /* #else #ifdef CONFIG_DEBUG_LOCK_ALLOC */
141
117#endif /* __LINUX_RCUTINY_H */ 142#endif /* __LINUX_RCUTINY_H */
diff --git a/include/linux/rcutree.h b/include/linux/rcutree.h
index 42cc3a04779e..c0ed1c056f29 100644
--- a/include/linux/rcutree.h
+++ b/include/linux/rcutree.h
@@ -34,8 +34,8 @@ struct notifier_block;
34 34
35extern void rcu_sched_qs(int cpu); 35extern void rcu_sched_qs(int cpu);
36extern void rcu_bh_qs(int cpu); 36extern void rcu_bh_qs(int cpu);
37extern void rcu_note_context_switch(int cpu);
37extern int rcu_needs_cpu(int cpu); 38extern int rcu_needs_cpu(int cpu);
38extern int rcu_expedited_torture_stats(char *page);
39 39
40#ifdef CONFIG_TREE_PREEMPT_RCU 40#ifdef CONFIG_TREE_PREEMPT_RCU
41 41
@@ -86,6 +86,8 @@ static inline void __rcu_read_unlock_bh(void)
86 86
87extern void call_rcu_sched(struct rcu_head *head, 87extern void call_rcu_sched(struct rcu_head *head,
88 void (*func)(struct rcu_head *rcu)); 88 void (*func)(struct rcu_head *rcu));
89extern void synchronize_rcu_bh(void);
90extern void synchronize_sched(void);
89extern void synchronize_rcu_expedited(void); 91extern void synchronize_rcu_expedited(void);
90 92
91static inline void synchronize_rcu_bh_expedited(void) 93static inline void synchronize_rcu_bh_expedited(void)
@@ -120,4 +122,7 @@ static inline int rcu_blocking_is_gp(void)
120 return num_online_cpus() == 1; 122 return num_online_cpus() == 1;
121} 123}
122 124
125extern void rcu_scheduler_starting(void);
126extern int rcu_scheduler_active __read_mostly;
127
123#endif /* __LINUX_RCUTREE_H */ 128#endif /* __LINUX_RCUTREE_H */
diff --git a/include/linux/ring_buffer.h b/include/linux/ring_buffer.h
index 5fcc31ed5771..25b4f686d918 100644
--- a/include/linux/ring_buffer.h
+++ b/include/linux/ring_buffer.h
@@ -120,12 +120,16 @@ int ring_buffer_write(struct ring_buffer *buffer,
120 unsigned long length, void *data); 120 unsigned long length, void *data);
121 121
122struct ring_buffer_event * 122struct ring_buffer_event *
123ring_buffer_peek(struct ring_buffer *buffer, int cpu, u64 *ts); 123ring_buffer_peek(struct ring_buffer *buffer, int cpu, u64 *ts,
124 unsigned long *lost_events);
124struct ring_buffer_event * 125struct ring_buffer_event *
125ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts); 126ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts,
127 unsigned long *lost_events);
126 128
127struct ring_buffer_iter * 129struct ring_buffer_iter *
128ring_buffer_read_start(struct ring_buffer *buffer, int cpu); 130ring_buffer_read_prepare(struct ring_buffer *buffer, int cpu);
131void ring_buffer_read_prepare_sync(void);
132void ring_buffer_read_start(struct ring_buffer_iter *iter);
129void ring_buffer_read_finish(struct ring_buffer_iter *iter); 133void ring_buffer_read_finish(struct ring_buffer_iter *iter);
130 134
131struct ring_buffer_event * 135struct ring_buffer_event *
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 2b7b81df78b3..b55e988988b5 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -99,7 +99,6 @@ struct futex_pi_state;
99struct robust_list_head; 99struct robust_list_head;
100struct bio_list; 100struct bio_list;
101struct fs_struct; 101struct fs_struct;
102struct bts_context;
103struct perf_event_context; 102struct perf_event_context;
104 103
105/* 104/*
@@ -275,11 +274,17 @@ extern cpumask_var_t nohz_cpu_mask;
275#if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ) 274#if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ)
276extern int select_nohz_load_balancer(int cpu); 275extern int select_nohz_load_balancer(int cpu);
277extern int get_nohz_load_balancer(void); 276extern int get_nohz_load_balancer(void);
277extern int nohz_ratelimit(int cpu);
278#else 278#else
279static inline int select_nohz_load_balancer(int cpu) 279static inline int select_nohz_load_balancer(int cpu)
280{ 280{
281 return 0; 281 return 0;
282} 282}
283
284static inline int nohz_ratelimit(int cpu)
285{
286 return 0;
287}
283#endif 288#endif
284 289
285/* 290/*
@@ -954,6 +959,7 @@ struct sched_domain {
954 char *name; 959 char *name;
955#endif 960#endif
956 961
962 unsigned int span_weight;
957 /* 963 /*
958 * Span of all CPUs in this domain. 964 * Span of all CPUs in this domain.
959 * 965 *
@@ -1026,12 +1032,17 @@ struct sched_domain;
1026#define WF_SYNC 0x01 /* waker goes to sleep after wakup */ 1032#define WF_SYNC 0x01 /* waker goes to sleep after wakup */
1027#define WF_FORK 0x02 /* child wakeup after fork */ 1033#define WF_FORK 0x02 /* child wakeup after fork */
1028 1034
1035#define ENQUEUE_WAKEUP 1
1036#define ENQUEUE_WAKING 2
1037#define ENQUEUE_HEAD 4
1038
1039#define DEQUEUE_SLEEP 1
1040
1029struct sched_class { 1041struct sched_class {
1030 const struct sched_class *next; 1042 const struct sched_class *next;
1031 1043
1032 void (*enqueue_task) (struct rq *rq, struct task_struct *p, int wakeup, 1044 void (*enqueue_task) (struct rq *rq, struct task_struct *p, int flags);
1033 bool head); 1045 void (*dequeue_task) (struct rq *rq, struct task_struct *p, int flags);
1034 void (*dequeue_task) (struct rq *rq, struct task_struct *p, int sleep);
1035 void (*yield_task) (struct rq *rq); 1046 void (*yield_task) (struct rq *rq);
1036 1047
1037 void (*check_preempt_curr) (struct rq *rq, struct task_struct *p, int flags); 1048 void (*check_preempt_curr) (struct rq *rq, struct task_struct *p, int flags);
@@ -1040,7 +1051,8 @@ struct sched_class {
1040 void (*put_prev_task) (struct rq *rq, struct task_struct *p); 1051 void (*put_prev_task) (struct rq *rq, struct task_struct *p);
1041 1052
1042#ifdef CONFIG_SMP 1053#ifdef CONFIG_SMP
1043 int (*select_task_rq)(struct task_struct *p, int sd_flag, int flags); 1054 int (*select_task_rq)(struct rq *rq, struct task_struct *p,
1055 int sd_flag, int flags);
1044 1056
1045 void (*pre_schedule) (struct rq *this_rq, struct task_struct *task); 1057 void (*pre_schedule) (struct rq *this_rq, struct task_struct *task);
1046 void (*post_schedule) (struct rq *this_rq); 1058 void (*post_schedule) (struct rq *this_rq);
@@ -1077,36 +1089,8 @@ struct load_weight {
1077 unsigned long weight, inv_weight; 1089 unsigned long weight, inv_weight;
1078}; 1090};
1079 1091
1080/*
1081 * CFS stats for a schedulable entity (task, task-group etc)
1082 *
1083 * Current field usage histogram:
1084 *
1085 * 4 se->block_start
1086 * 4 se->run_node
1087 * 4 se->sleep_start
1088 * 6 se->load.weight
1089 */
1090struct sched_entity {
1091 struct load_weight load; /* for load-balancing */
1092 struct rb_node run_node;
1093 struct list_head group_node;
1094 unsigned int on_rq;
1095
1096 u64 exec_start;
1097 u64 sum_exec_runtime;
1098 u64 vruntime;
1099 u64 prev_sum_exec_runtime;
1100
1101 u64 last_wakeup;
1102 u64 avg_overlap;
1103
1104 u64 nr_migrations;
1105
1106 u64 start_runtime;
1107 u64 avg_wakeup;
1108
1109#ifdef CONFIG_SCHEDSTATS 1092#ifdef CONFIG_SCHEDSTATS
1093struct sched_statistics {
1110 u64 wait_start; 1094 u64 wait_start;
1111 u64 wait_max; 1095 u64 wait_max;
1112 u64 wait_count; 1096 u64 wait_count;
@@ -1138,6 +1122,24 @@ struct sched_entity {
1138 u64 nr_wakeups_affine_attempts; 1122 u64 nr_wakeups_affine_attempts;
1139 u64 nr_wakeups_passive; 1123 u64 nr_wakeups_passive;
1140 u64 nr_wakeups_idle; 1124 u64 nr_wakeups_idle;
1125};
1126#endif
1127
1128struct sched_entity {
1129 struct load_weight load; /* for load-balancing */
1130 struct rb_node run_node;
1131 struct list_head group_node;
1132 unsigned int on_rq;
1133
1134 u64 exec_start;
1135 u64 sum_exec_runtime;
1136 u64 vruntime;
1137 u64 prev_sum_exec_runtime;
1138
1139 u64 nr_migrations;
1140
1141#ifdef CONFIG_SCHEDSTATS
1142 struct sched_statistics statistics;
1141#endif 1143#endif
1142 1144
1143#ifdef CONFIG_FAIR_GROUP_SCHED 1145#ifdef CONFIG_FAIR_GROUP_SCHED
@@ -1272,12 +1274,6 @@ struct task_struct {
1272 struct list_head ptraced; 1274 struct list_head ptraced;
1273 struct list_head ptrace_entry; 1275 struct list_head ptrace_entry;
1274 1276
1275 /*
1276 * This is the tracer handle for the ptrace BTS extension.
1277 * This field actually belongs to the ptracer task.
1278 */
1279 struct bts_context *bts;
1280
1281 /* PID/PID hash table linkage. */ 1277 /* PID/PID hash table linkage. */
1282 struct pid_link pids[PIDTYPE_MAX]; 1278 struct pid_link pids[PIDTYPE_MAX];
1283 struct list_head thread_group; 1279 struct list_head thread_group;
@@ -1846,6 +1842,7 @@ extern void sched_clock_idle_sleep_event(void);
1846extern void sched_clock_idle_wakeup_event(u64 delta_ns); 1842extern void sched_clock_idle_wakeup_event(u64 delta_ns);
1847 1843
1848#ifdef CONFIG_HOTPLUG_CPU 1844#ifdef CONFIG_HOTPLUG_CPU
1845extern void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p);
1849extern void idle_task_exit(void); 1846extern void idle_task_exit(void);
1850#else 1847#else
1851static inline void idle_task_exit(void) {} 1848static inline void idle_task_exit(void) {}
@@ -2122,10 +2119,8 @@ extern void set_task_comm(struct task_struct *tsk, char *from);
2122extern char *get_task_comm(char *to, struct task_struct *tsk); 2119extern char *get_task_comm(char *to, struct task_struct *tsk);
2123 2120
2124#ifdef CONFIG_SMP 2121#ifdef CONFIG_SMP
2125extern void wait_task_context_switch(struct task_struct *p);
2126extern unsigned long wait_task_inactive(struct task_struct *, long match_state); 2122extern unsigned long wait_task_inactive(struct task_struct *, long match_state);
2127#else 2123#else
2128static inline void wait_task_context_switch(struct task_struct *p) {}
2129static inline unsigned long wait_task_inactive(struct task_struct *p, 2124static inline unsigned long wait_task_inactive(struct task_struct *p,
2130 long match_state) 2125 long match_state)
2131{ 2126{
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index 193d4bfe42ff..f5364a1de68b 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -33,8 +33,8 @@ struct plat_sci_port {
33 char *clk; /* clock string */ 33 char *clk; /* clock string */
34 struct device *dma_dev; 34 struct device *dma_dev;
35#ifdef CONFIG_SERIAL_SH_SCI_DMA 35#ifdef CONFIG_SERIAL_SH_SCI_DMA
36 enum sh_dmae_slave_chan_id dma_slave_tx; 36 unsigned int dma_slave_tx;
37 enum sh_dmae_slave_chan_id dma_slave_rx; 37 unsigned int dma_slave_rx;
38#endif 38#endif
39}; 39};
40 40
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
new file mode 100644
index 000000000000..1636d1e2a5f1
--- /dev/null
+++ b/include/linux/sh_clk.h
@@ -0,0 +1,150 @@
1#ifndef __SH_CLOCK_H
2#define __SH_CLOCK_H
3
4#include <linux/list.h>
5#include <linux/seq_file.h>
6#include <linux/cpufreq.h>
7#include <linux/clk.h>
8#include <linux/err.h>
9
10struct clk;
11
12struct clk_ops {
13 void (*init)(struct clk *clk);
14 int (*enable)(struct clk *clk);
15 void (*disable)(struct clk *clk);
16 unsigned long (*recalc)(struct clk *clk);
17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
18 int (*set_parent)(struct clk *clk, struct clk *parent);
19 long (*round_rate)(struct clk *clk, unsigned long rate);
20};
21
22struct clk {
23 struct list_head node;
24 const char *name;
25 int id;
26
27 struct clk *parent;
28 struct clk_ops *ops;
29
30 struct list_head children;
31 struct list_head sibling; /* node for children */
32
33 int usecount;
34
35 unsigned long rate;
36 unsigned long flags;
37
38 void __iomem *enable_reg;
39 unsigned int enable_bit;
40
41 unsigned long arch_flags;
42 void *priv;
43 struct dentry *dentry;
44 struct cpufreq_frequency_table *freq_table;
45};
46
47#define CLK_ENABLE_ON_INIT (1 << 0)
48
49/* drivers/sh/clk.c */
50unsigned long followparent_recalc(struct clk *);
51void recalculate_root_clocks(void);
52void propagate_rate(struct clk *);
53int clk_reparent(struct clk *child, struct clk *parent);
54int clk_register(struct clk *);
55void clk_unregister(struct clk *);
56void clk_enable_init_clocks(void);
57
58/**
59 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
60 * @clk: clock source
61 * @rate: desired clock rate in Hz
62 * @algo_id: algorithm id to be passed down to ops->set_rate
63 *
64 * Returns success (0) or negative errno.
65 */
66int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
67
68enum clk_sh_algo_id {
69 NO_CHANGE = 0,
70
71 IUS_N1_N1,
72 IUS_322,
73 IUS_522,
74 IUS_N11,
75
76 SB_N1,
77
78 SB3_N1,
79 SB3_32,
80 SB3_43,
81 SB3_54,
82
83 BP_N1,
84
85 IP_N1,
86};
87
88struct clk_div_mult_table {
89 unsigned int *divisors;
90 unsigned int nr_divisors;
91 unsigned int *multipliers;
92 unsigned int nr_multipliers;
93};
94
95struct cpufreq_frequency_table;
96void clk_rate_table_build(struct clk *clk,
97 struct cpufreq_frequency_table *freq_table,
98 int nr_freqs,
99 struct clk_div_mult_table *src_table,
100 unsigned long *bitmap);
101
102long clk_rate_table_round(struct clk *clk,
103 struct cpufreq_frequency_table *freq_table,
104 unsigned long rate);
105
106int clk_rate_table_find(struct clk *clk,
107 struct cpufreq_frequency_table *freq_table,
108 unsigned long rate);
109
110#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
111{ \
112 .parent = _parent, \
113 .enable_reg = (void __iomem *)_enable_reg, \
114 .enable_bit = _enable_bit, \
115 .flags = _flags, \
116}
117
118int sh_clk_mstp32_register(struct clk *clks, int nr);
119
120#define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
121{ \
122 .parent = _parent, \
123 .enable_reg = (void __iomem *)_reg, \
124 .enable_bit = _shift, \
125 .arch_flags = _div_bitmap, \
126 .flags = _flags, \
127}
128
129struct clk_div4_table {
130 struct clk_div_mult_table *div_mult_table;
131 void (*kick)(struct clk *clk);
132};
133
134int sh_clk_div4_register(struct clk *clks, int nr,
135 struct clk_div4_table *table);
136int sh_clk_div4_enable_register(struct clk *clks, int nr,
137 struct clk_div4_table *table);
138int sh_clk_div4_reparent_register(struct clk *clks, int nr,
139 struct clk_div4_table *table);
140
141#define SH_CLK_DIV6(_parent, _reg, _flags) \
142{ \
143 .parent = _parent, \
144 .enable_reg = (void __iomem *)_reg, \
145 .flags = _flags, \
146}
147
148int sh_clk_div6_register(struct clk *clks, int nr);
149
150#endif /* __SH_CLOCK_H */
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
new file mode 100644
index 000000000000..b08cd4efa15c
--- /dev/null
+++ b/include/linux/sh_dma.h
@@ -0,0 +1,102 @@
1/*
2 * Header for the new SH dmaengine driver
3 *
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef SH_DMA_H
11#define SH_DMA_H
12
13#include <linux/list.h>
14#include <linux/dmaengine.h>
15
16/* Used by slave DMA clients to request DMA to/from a specific peripheral */
17struct sh_dmae_slave {
18 unsigned int slave_id; /* Set by the platform */
19 struct device *dma_dev; /* Set by the platform */
20 const struct sh_dmae_slave_config *config; /* Set by the driver */
21};
22
23struct sh_dmae_regs {
24 u32 sar; /* SAR / source address */
25 u32 dar; /* DAR / destination address */
26 u32 tcr; /* TCR / transfer count */
27};
28
29struct sh_desc {
30 struct sh_dmae_regs hw;
31 struct list_head node;
32 struct dma_async_tx_descriptor async_tx;
33 enum dma_data_direction direction;
34 dma_cookie_t cookie;
35 size_t partial;
36 int chunks;
37 int mark;
38};
39
40struct sh_dmae_slave_config {
41 unsigned int slave_id;
42 dma_addr_t addr;
43 u32 chcr;
44 char mid_rid;
45};
46
47struct sh_dmae_channel {
48 unsigned int offset;
49 unsigned int dmars;
50 unsigned int dmars_bit;
51};
52
53struct sh_dmae_pdata {
54 const struct sh_dmae_slave_config *slave;
55 int slave_num;
56 const struct sh_dmae_channel *channel;
57 int channel_num;
58 unsigned int ts_low_shift;
59 unsigned int ts_low_mask;
60 unsigned int ts_high_shift;
61 unsigned int ts_high_mask;
62 const unsigned int *ts_shift;
63 int ts_shift_num;
64 u16 dmaor_init;
65};
66
67/* DMA register */
68#define SAR 0x00
69#define DAR 0x04
70#define TCR 0x08
71#define CHCR 0x0C
72#define DMAOR 0x40
73
74/* DMAOR definitions */
75#define DMAOR_AE 0x00000004
76#define DMAOR_NMIF 0x00000002
77#define DMAOR_DME 0x00000001
78
79/* Definitions for the SuperH DMAC */
80#define REQ_L 0x00000000
81#define REQ_E 0x00080000
82#define RACK_H 0x00000000
83#define RACK_L 0x00040000
84#define ACK_R 0x00000000
85#define ACK_W 0x00020000
86#define ACK_H 0x00000000
87#define ACK_L 0x00010000
88#define DM_INC 0x00004000
89#define DM_DEC 0x00008000
90#define DM_FIX 0x0000c000
91#define SM_INC 0x00001000
92#define SM_DEC 0x00002000
93#define SM_FIX 0x00003000
94#define RS_IN 0x00000200
95#define RS_OUT 0x00000300
96#define TS_BLK 0x00000040
97#define TM_BUR 0x00000020
98#define CHCR_DE 0x00000001
99#define CHCR_TE 0x00000002
100#define CHCR_IE 0x00000004
101
102#endif
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 51d288d8ac88..0d6cd38e673d 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -1,6 +1,8 @@
1#ifndef __SH_INTC_H 1#ifndef __SH_INTC_H
2#define __SH_INTC_H 2#define __SH_INTC_H
3 3
4#include <linux/ioport.h>
5
4typedef unsigned char intc_enum; 6typedef unsigned char intc_enum;
5 7
6struct intc_vect { 8struct intc_vect {
@@ -21,6 +23,9 @@ struct intc_group {
21struct intc_mask_reg { 23struct intc_mask_reg {
22 unsigned long set_reg, clr_reg, reg_width; 24 unsigned long set_reg, clr_reg, reg_width;
23 intc_enum enum_ids[32]; 25 intc_enum enum_ids[32];
26#ifdef CONFIG_INTC_BALANCING
27 unsigned long dist_reg;
28#endif
24#ifdef CONFIG_SMP 29#ifdef CONFIG_SMP
25 unsigned long smp; 30 unsigned long smp;
26#endif 31#endif
@@ -39,8 +44,14 @@ struct intc_sense_reg {
39 intc_enum enum_ids[16]; 44 intc_enum enum_ids[16];
40}; 45};
41 46
47#ifdef CONFIG_INTC_BALANCING
48#define INTC_SMP_BALANCING(reg) .dist_reg = (reg)
49#else
50#define INTC_SMP_BALANCING(reg)
51#endif
52
42#ifdef CONFIG_SMP 53#ifdef CONFIG_SMP
43#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8) 54#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
44#else 55#else
45#define INTC_SMP(stride, nr) 56#define INTC_SMP(stride, nr)
46#endif 57#endif
@@ -71,6 +82,8 @@ struct intc_hw_desc {
71 82
72struct intc_desc { 83struct intc_desc {
73 char *name; 84 char *name;
85 struct resource *resource;
86 unsigned int num_resources;
74 intc_enum force_enable; 87 intc_enum force_enable;
75 intc_enum force_disable; 88 intc_enum force_disable;
76 struct intc_hw_desc hw; 89 struct intc_hw_desc hw;
@@ -92,9 +105,18 @@ struct intc_desc symbol __initdata = { \
92 prio_regs, sense_regs, ack_regs), \ 105 prio_regs, sense_regs, ack_regs), \
93} 106}
94 107
95void __init register_intc_controller(struct intc_desc *desc); 108int __init register_intc_controller(struct intc_desc *desc);
96int intc_set_priority(unsigned int irq, unsigned int prio); 109int intc_set_priority(unsigned int irq, unsigned int prio);
97 110
111#ifdef CONFIG_INTC_USERIMASK
112int register_intc_userimask(unsigned long addr);
113#else
114static inline int register_intc_userimask(unsigned long addr)
115{
116 return 0;
117}
118#endif
119
98int reserve_irq_vector(unsigned int irq); 120int reserve_irq_vector(unsigned int irq);
99void reserve_irq_legacy(void); 121void reserve_irq_legacy(void);
100 122
diff --git a/include/linux/srcu.h b/include/linux/srcu.h
index 4d5ecb222af9..4d5d2f546dbf 100644
--- a/include/linux/srcu.h
+++ b/include/linux/srcu.h
@@ -27,6 +27,8 @@
27#ifndef _LINUX_SRCU_H 27#ifndef _LINUX_SRCU_H
28#define _LINUX_SRCU_H 28#define _LINUX_SRCU_H
29 29
30#include <linux/mutex.h>
31
30struct srcu_struct_array { 32struct srcu_struct_array {
31 int c[2]; 33 int c[2];
32}; 34};
@@ -84,8 +86,8 @@ long srcu_batches_completed(struct srcu_struct *sp);
84/** 86/**
85 * srcu_read_lock_held - might we be in SRCU read-side critical section? 87 * srcu_read_lock_held - might we be in SRCU read-side critical section?
86 * 88 *
87 * If CONFIG_PROVE_LOCKING is selected and enabled, returns nonzero iff in 89 * If CONFIG_DEBUG_LOCK_ALLOC is selected, returns nonzero iff in an SRCU
88 * an SRCU read-side critical section. In absence of CONFIG_PROVE_LOCKING, 90 * read-side critical section. In absence of CONFIG_DEBUG_LOCK_ALLOC,
89 * this assumes we are in an SRCU read-side critical section unless it can 91 * this assumes we are in an SRCU read-side critical section unless it can
90 * prove otherwise. 92 * prove otherwise.
91 */ 93 */
diff --git a/include/linux/stop_machine.h b/include/linux/stop_machine.h
index baba3a23a814..6b524a0d02e4 100644
--- a/include/linux/stop_machine.h
+++ b/include/linux/stop_machine.h
@@ -1,13 +1,101 @@
1#ifndef _LINUX_STOP_MACHINE 1#ifndef _LINUX_STOP_MACHINE
2#define _LINUX_STOP_MACHINE 2#define _LINUX_STOP_MACHINE
3/* "Bogolock": stop the entire machine, disable interrupts. This is a 3
4 very heavy lock, which is equivalent to grabbing every spinlock
5 (and more). So the "read" side to such a lock is anything which
6 disables preeempt. */
7#include <linux/cpu.h> 4#include <linux/cpu.h>
8#include <linux/cpumask.h> 5#include <linux/cpumask.h>
6#include <linux/list.h>
9#include <asm/system.h> 7#include <asm/system.h>
10 8
9/*
10 * stop_cpu[s]() is simplistic per-cpu maximum priority cpu
11 * monopolization mechanism. The caller can specify a non-sleeping
12 * function to be executed on a single or multiple cpus preempting all
13 * other processes and monopolizing those cpus until it finishes.
14 *
15 * Resources for this mechanism are preallocated when a cpu is brought
16 * up and requests are guaranteed to be served as long as the target
17 * cpus are online.
18 */
19typedef int (*cpu_stop_fn_t)(void *arg);
20
21#ifdef CONFIG_SMP
22
23struct cpu_stop_work {
24 struct list_head list; /* cpu_stopper->works */
25 cpu_stop_fn_t fn;
26 void *arg;
27 struct cpu_stop_done *done;
28};
29
30int stop_one_cpu(unsigned int cpu, cpu_stop_fn_t fn, void *arg);
31void stop_one_cpu_nowait(unsigned int cpu, cpu_stop_fn_t fn, void *arg,
32 struct cpu_stop_work *work_buf);
33int stop_cpus(const struct cpumask *cpumask, cpu_stop_fn_t fn, void *arg);
34int try_stop_cpus(const struct cpumask *cpumask, cpu_stop_fn_t fn, void *arg);
35
36#else /* CONFIG_SMP */
37
38#include <linux/workqueue.h>
39
40struct cpu_stop_work {
41 struct work_struct work;
42 cpu_stop_fn_t fn;
43 void *arg;
44};
45
46static inline int stop_one_cpu(unsigned int cpu, cpu_stop_fn_t fn, void *arg)
47{
48 int ret = -ENOENT;
49 preempt_disable();
50 if (cpu == smp_processor_id())
51 ret = fn(arg);
52 preempt_enable();
53 return ret;
54}
55
56static void stop_one_cpu_nowait_workfn(struct work_struct *work)
57{
58 struct cpu_stop_work *stwork =
59 container_of(work, struct cpu_stop_work, work);
60 preempt_disable();
61 stwork->fn(stwork->arg);
62 preempt_enable();
63}
64
65static inline void stop_one_cpu_nowait(unsigned int cpu,
66 cpu_stop_fn_t fn, void *arg,
67 struct cpu_stop_work *work_buf)
68{
69 if (cpu == smp_processor_id()) {
70 INIT_WORK(&work_buf->work, stop_one_cpu_nowait_workfn);
71 work_buf->fn = fn;
72 work_buf->arg = arg;
73 schedule_work(&work_buf->work);
74 }
75}
76
77static inline int stop_cpus(const struct cpumask *cpumask,
78 cpu_stop_fn_t fn, void *arg)
79{
80 if (cpumask_test_cpu(raw_smp_processor_id(), cpumask))
81 return stop_one_cpu(raw_smp_processor_id(), fn, arg);
82 return -ENOENT;
83}
84
85static inline int try_stop_cpus(const struct cpumask *cpumask,
86 cpu_stop_fn_t fn, void *arg)
87{
88 return stop_cpus(cpumask, fn, arg);
89}
90
91#endif /* CONFIG_SMP */
92
93/*
94 * stop_machine "Bogolock": stop the entire machine, disable
95 * interrupts. This is a very heavy lock, which is equivalent to
96 * grabbing every spinlock (and more). So the "read" side to such a
97 * lock is anything which disables preeempt.
98 */
11#if defined(CONFIG_STOP_MACHINE) && defined(CONFIG_SMP) 99#if defined(CONFIG_STOP_MACHINE) && defined(CONFIG_SMP)
12 100
13/** 101/**
@@ -36,24 +124,7 @@ int stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus);
36 */ 124 */
37int __stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus); 125int __stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus);
38 126
39/** 127#else /* CONFIG_STOP_MACHINE && CONFIG_SMP */
40 * stop_machine_create: create all stop_machine threads
41 *
42 * Description: This causes all stop_machine threads to be created before
43 * stop_machine actually gets called. This can be used by subsystems that
44 * need a non failing stop_machine infrastructure.
45 */
46int stop_machine_create(void);
47
48/**
49 * stop_machine_destroy: destroy all stop_machine threads
50 *
51 * Description: This causes all stop_machine threads which were created with
52 * stop_machine_create to be destroyed again.
53 */
54void stop_machine_destroy(void);
55
56#else
57 128
58static inline int stop_machine(int (*fn)(void *), void *data, 129static inline int stop_machine(int (*fn)(void *), void *data,
59 const struct cpumask *cpus) 130 const struct cpumask *cpus)
@@ -65,8 +136,5 @@ static inline int stop_machine(int (*fn)(void *), void *data,
65 return ret; 136 return ret;
66} 137}
67 138
68static inline int stop_machine_create(void) { return 0; } 139#endif /* CONFIG_STOP_MACHINE && CONFIG_SMP */
69static inline void stop_machine_destroy(void) { } 140#endif /* _LINUX_STOP_MACHINE */
70
71#endif /* CONFIG_SMP */
72#endif /* _LINUX_STOP_MACHINE */
diff --git a/include/linux/tick.h b/include/linux/tick.h
index d2ae79e21be3..b232ccc0ee29 100644
--- a/include/linux/tick.h
+++ b/include/linux/tick.h
@@ -42,6 +42,7 @@ enum tick_nohz_mode {
42 * @idle_waketime: Time when the idle was interrupted 42 * @idle_waketime: Time when the idle was interrupted
43 * @idle_exittime: Time when the idle state was left 43 * @idle_exittime: Time when the idle state was left
44 * @idle_sleeptime: Sum of the time slept in idle with sched tick stopped 44 * @idle_sleeptime: Sum of the time slept in idle with sched tick stopped
45 * @iowait_sleeptime: Sum of the time slept in idle with sched tick stopped, with IO outstanding
45 * @sleep_length: Duration of the current idle sleep 46 * @sleep_length: Duration of the current idle sleep
46 * @do_timer_lst: CPU was the last one doing do_timer before going idle 47 * @do_timer_lst: CPU was the last one doing do_timer before going idle
47 */ 48 */
@@ -60,7 +61,7 @@ struct tick_sched {
60 ktime_t idle_waketime; 61 ktime_t idle_waketime;
61 ktime_t idle_exittime; 62 ktime_t idle_exittime;
62 ktime_t idle_sleeptime; 63 ktime_t idle_sleeptime;
63 ktime_t idle_lastupdate; 64 ktime_t iowait_sleeptime;
64 ktime_t sleep_length; 65 ktime_t sleep_length;
65 unsigned long last_jiffies; 66 unsigned long last_jiffies;
66 unsigned long next_jiffies; 67 unsigned long next_jiffies;
@@ -124,6 +125,7 @@ extern void tick_nohz_stop_sched_tick(int inidle);
124extern void tick_nohz_restart_sched_tick(void); 125extern void tick_nohz_restart_sched_tick(void);
125extern ktime_t tick_nohz_get_sleep_length(void); 126extern ktime_t tick_nohz_get_sleep_length(void);
126extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time); 127extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time);
128extern u64 get_cpu_iowait_time_us(int cpu, u64 *last_update_time);
127# else 129# else
128static inline void tick_nohz_stop_sched_tick(int inidle) { } 130static inline void tick_nohz_stop_sched_tick(int inidle) { }
129static inline void tick_nohz_restart_sched_tick(void) { } 131static inline void tick_nohz_restart_sched_tick(void) { }
@@ -134,6 +136,7 @@ static inline ktime_t tick_nohz_get_sleep_length(void)
134 return len; 136 return len;
135} 137}
136static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; } 138static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; }
139static inline u64 get_cpu_iowait_time_us(int cpu, u64 *unused) { return -1; }
137# endif /* !NO_HZ */ 140# endif /* !NO_HZ */
138 141
139#endif 142#endif
diff --git a/include/linux/time.h b/include/linux/time.h
index 6e026e45a179..ea3559f0b3f2 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -150,7 +150,6 @@ extern struct timespec timespec_trunc(struct timespec t, unsigned gran);
150extern int timekeeping_valid_for_hres(void); 150extern int timekeeping_valid_for_hres(void);
151extern u64 timekeeping_max_deferment(void); 151extern u64 timekeeping_max_deferment(void);
152extern void update_wall_time(void); 152extern void update_wall_time(void);
153extern void update_xtime_cache(u64 nsec);
154extern void timekeeping_leap_insert(int leapsecond); 153extern void timekeeping_leap_insert(int leapsecond);
155 154
156struct tms; 155struct tms;
diff --git a/include/linux/timer.h b/include/linux/timer.h
index a2d1eb6cb3f0..ea965b857a50 100644
--- a/include/linux/timer.h
+++ b/include/linux/timer.h
@@ -10,13 +10,19 @@
10struct tvec_base; 10struct tvec_base;
11 11
12struct timer_list { 12struct timer_list {
13 /*
14 * All fields that change during normal runtime grouped to the
15 * same cacheline
16 */
13 struct list_head entry; 17 struct list_head entry;
14 unsigned long expires; 18 unsigned long expires;
19 struct tvec_base *base;
15 20
16 void (*function)(unsigned long); 21 void (*function)(unsigned long);
17 unsigned long data; 22 unsigned long data;
18 23
19 struct tvec_base *base; 24 int slack;
25
20#ifdef CONFIG_TIMER_STATS 26#ifdef CONFIG_TIMER_STATS
21 void *start_site; 27 void *start_site;
22 char start_comm[16]; 28 char start_comm[16];
@@ -165,6 +171,8 @@ extern int mod_timer(struct timer_list *timer, unsigned long expires);
165extern int mod_timer_pending(struct timer_list *timer, unsigned long expires); 171extern int mod_timer_pending(struct timer_list *timer, unsigned long expires);
166extern int mod_timer_pinned(struct timer_list *timer, unsigned long expires); 172extern int mod_timer_pinned(struct timer_list *timer, unsigned long expires);
167 173
174extern void set_timer_slack(struct timer_list *time, int slack_hz);
175
168#define TIMER_NOT_PINNED 0 176#define TIMER_NOT_PINNED 0
169#define TIMER_PINNED 1 177#define TIMER_PINNED 1
170/* 178/*
diff --git a/include/linux/timex.h b/include/linux/timex.h
index 7a082b32d8e1..32d852f8cbe4 100644
--- a/include/linux/timex.h
+++ b/include/linux/timex.h
@@ -232,13 +232,11 @@ struct timex {
232 */ 232 */
233extern unsigned long tick_usec; /* USER_HZ period (usec) */ 233extern unsigned long tick_usec; /* USER_HZ period (usec) */
234extern unsigned long tick_nsec; /* ACTHZ period (nsec) */ 234extern unsigned long tick_nsec; /* ACTHZ period (nsec) */
235extern int tickadj; /* amount of adjustment per tick */
236 235
237/* 236/*
238 * phase-lock loop variables 237 * phase-lock loop variables
239 */ 238 */
240extern int time_status; /* clock synchronization status bits */ 239extern int time_status; /* clock synchronization status bits */
241extern long time_adjust; /* The amount of adjtime left */
242 240
243extern void ntp_init(void); 241extern void ntp_init(void);
244extern void ntp_clear(void); 242extern void ntp_clear(void);
@@ -271,9 +269,6 @@ extern void second_overflow(void);
271extern void update_ntp_one_tick(void); 269extern void update_ntp_one_tick(void);
272extern int do_adjtimex(struct timex *); 270extern int do_adjtimex(struct timex *);
273 271
274/* Don't use! Compatibility define for existing users. */
275#define tickadj (500/HZ ? : 1)
276
277int read_current_timer(unsigned long *timer_val); 272int read_current_timer(unsigned long *timer_val);
278 273
279/* The clock frequency of the i8253/i8254 PIT */ 274/* The clock frequency of the i8253/i8254 PIT */
diff --git a/include/linux/tracepoint.h b/include/linux/tracepoint.h
index 78b4bd3be496..1d85f9a6a199 100644
--- a/include/linux/tracepoint.h
+++ b/include/linux/tracepoint.h
@@ -33,6 +33,65 @@ struct tracepoint {
33 * Keep in sync with vmlinux.lds.h. 33 * Keep in sync with vmlinux.lds.h.
34 */ 34 */
35 35
36/*
37 * Connect a probe to a tracepoint.
38 * Internal API, should not be used directly.
39 */
40extern int tracepoint_probe_register(const char *name, void *probe);
41
42/*
43 * Disconnect a probe from a tracepoint.
44 * Internal API, should not be used directly.
45 */
46extern int tracepoint_probe_unregister(const char *name, void *probe);
47
48extern int tracepoint_probe_register_noupdate(const char *name, void *probe);
49extern int tracepoint_probe_unregister_noupdate(const char *name, void *probe);
50extern void tracepoint_probe_update_all(void);
51
52struct tracepoint_iter {
53 struct module *module;
54 struct tracepoint *tracepoint;
55};
56
57extern void tracepoint_iter_start(struct tracepoint_iter *iter);
58extern void tracepoint_iter_next(struct tracepoint_iter *iter);
59extern void tracepoint_iter_stop(struct tracepoint_iter *iter);
60extern void tracepoint_iter_reset(struct tracepoint_iter *iter);
61extern int tracepoint_get_iter_range(struct tracepoint **tracepoint,
62 struct tracepoint *begin, struct tracepoint *end);
63
64/*
65 * tracepoint_synchronize_unregister must be called between the last tracepoint
66 * probe unregistration and the end of module exit to make sure there is no
67 * caller executing a probe when it is freed.
68 */
69static inline void tracepoint_synchronize_unregister(void)
70{
71 synchronize_sched();
72}
73
74#define PARAMS(args...) args
75
76#ifdef CONFIG_TRACEPOINTS
77extern void tracepoint_update_probe_range(struct tracepoint *begin,
78 struct tracepoint *end);
79#else
80static inline void tracepoint_update_probe_range(struct tracepoint *begin,
81 struct tracepoint *end)
82{ }
83#endif /* CONFIG_TRACEPOINTS */
84
85#endif /* _LINUX_TRACEPOINT_H */
86
87/*
88 * Note: we keep the TRACE_EVENT and DECLARE_TRACE outside the include
89 * file ifdef protection.
90 * This is due to the way trace events work. If a file includes two
91 * trace event headers under one "CREATE_TRACE_POINTS" the first include
92 * will override the TRACE_EVENT and break the second include.
93 */
94
36#ifndef DECLARE_TRACE 95#ifndef DECLARE_TRACE
37 96
38#define TP_PROTO(args...) args 97#define TP_PROTO(args...) args
@@ -96,9 +155,6 @@ struct tracepoint {
96#define EXPORT_TRACEPOINT_SYMBOL(name) \ 155#define EXPORT_TRACEPOINT_SYMBOL(name) \
97 EXPORT_SYMBOL(__tracepoint_##name) 156 EXPORT_SYMBOL(__tracepoint_##name)
98 157
99extern void tracepoint_update_probe_range(struct tracepoint *begin,
100 struct tracepoint *end);
101
102#else /* !CONFIG_TRACEPOINTS */ 158#else /* !CONFIG_TRACEPOINTS */
103#define DECLARE_TRACE(name, proto, args) \ 159#define DECLARE_TRACE(name, proto, args) \
104 static inline void _do_trace_##name(struct tracepoint *tp, proto) \ 160 static inline void _do_trace_##name(struct tracepoint *tp, proto) \
@@ -119,61 +175,9 @@ extern void tracepoint_update_probe_range(struct tracepoint *begin,
119#define EXPORT_TRACEPOINT_SYMBOL_GPL(name) 175#define EXPORT_TRACEPOINT_SYMBOL_GPL(name)
120#define EXPORT_TRACEPOINT_SYMBOL(name) 176#define EXPORT_TRACEPOINT_SYMBOL(name)
121 177
122static inline void tracepoint_update_probe_range(struct tracepoint *begin,
123 struct tracepoint *end)
124{ }
125#endif /* CONFIG_TRACEPOINTS */ 178#endif /* CONFIG_TRACEPOINTS */
126#endif /* DECLARE_TRACE */ 179#endif /* DECLARE_TRACE */
127 180
128/*
129 * Connect a probe to a tracepoint.
130 * Internal API, should not be used directly.
131 */
132extern int tracepoint_probe_register(const char *name, void *probe);
133
134/*
135 * Disconnect a probe from a tracepoint.
136 * Internal API, should not be used directly.
137 */
138extern int tracepoint_probe_unregister(const char *name, void *probe);
139
140extern int tracepoint_probe_register_noupdate(const char *name, void *probe);
141extern int tracepoint_probe_unregister_noupdate(const char *name, void *probe);
142extern void tracepoint_probe_update_all(void);
143
144struct tracepoint_iter {
145 struct module *module;
146 struct tracepoint *tracepoint;
147};
148
149extern void tracepoint_iter_start(struct tracepoint_iter *iter);
150extern void tracepoint_iter_next(struct tracepoint_iter *iter);
151extern void tracepoint_iter_stop(struct tracepoint_iter *iter);
152extern void tracepoint_iter_reset(struct tracepoint_iter *iter);
153extern int tracepoint_get_iter_range(struct tracepoint **tracepoint,
154 struct tracepoint *begin, struct tracepoint *end);
155
156/*
157 * tracepoint_synchronize_unregister must be called between the last tracepoint
158 * probe unregistration and the end of module exit to make sure there is no
159 * caller executing a probe when it is freed.
160 */
161static inline void tracepoint_synchronize_unregister(void)
162{
163 synchronize_sched();
164}
165
166#define PARAMS(args...) args
167
168#endif /* _LINUX_TRACEPOINT_H */
169
170/*
171 * Note: we keep the TRACE_EVENT outside the include file ifdef protection.
172 * This is due to the way trace events work. If a file includes two
173 * trace event headers under one "CREATE_TRACE_POINTS" the first include
174 * will override the TRACE_EVENT and break the second include.
175 */
176
177#ifndef TRACE_EVENT 181#ifndef TRACE_EVENT
178/* 182/*
179 * For use with the TRACE_EVENT macro: 183 * For use with the TRACE_EVENT macro:
diff --git a/include/linux/types.h b/include/linux/types.h
index c42724f8c802..23d237a075e2 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -188,12 +188,12 @@ typedef u32 phys_addr_t;
188typedef phys_addr_t resource_size_t; 188typedef phys_addr_t resource_size_t;
189 189
190typedef struct { 190typedef struct {
191 volatile int counter; 191 int counter;
192} atomic_t; 192} atomic_t;
193 193
194#ifdef CONFIG_64BIT 194#ifdef CONFIG_64BIT
195typedef struct { 195typedef struct {
196 volatile long counter; 196 long counter;
197} atomic64_t; 197} atomic64_t;
198#endif 198#endif
199 199
diff --git a/include/linux/wait.h b/include/linux/wait.h
index a48e16b77d5e..76d96d035ea0 100644
--- a/include/linux/wait.h
+++ b/include/linux/wait.h
@@ -127,12 +127,26 @@ static inline void __add_wait_queue(wait_queue_head_t *head, wait_queue_t *new)
127/* 127/*
128 * Used for wake-one threads: 128 * Used for wake-one threads:
129 */ 129 */
130static inline void __add_wait_queue_exclusive(wait_queue_head_t *q,
131 wait_queue_t *wait)
132{
133 wait->flags |= WQ_FLAG_EXCLUSIVE;
134 __add_wait_queue(q, wait);
135}
136
130static inline void __add_wait_queue_tail(wait_queue_head_t *head, 137static inline void __add_wait_queue_tail(wait_queue_head_t *head,
131 wait_queue_t *new) 138 wait_queue_t *new)
132{ 139{
133 list_add_tail(&new->task_list, &head->task_list); 140 list_add_tail(&new->task_list, &head->task_list);
134} 141}
135 142
143static inline void __add_wait_queue_tail_exclusive(wait_queue_head_t *q,
144 wait_queue_t *wait)
145{
146 wait->flags |= WQ_FLAG_EXCLUSIVE;
147 __add_wait_queue_tail(q, wait);
148}
149
136static inline void __remove_wait_queue(wait_queue_head_t *head, 150static inline void __remove_wait_queue(wait_queue_head_t *head,
137 wait_queue_t *old) 151 wait_queue_t *old)
138{ 152{
@@ -404,25 +418,6 @@ do { \
404}) 418})
405 419
406/* 420/*
407 * Must be called with the spinlock in the wait_queue_head_t held.
408 */
409static inline void add_wait_queue_exclusive_locked(wait_queue_head_t *q,
410 wait_queue_t * wait)
411{
412 wait->flags |= WQ_FLAG_EXCLUSIVE;
413 __add_wait_queue_tail(q, wait);
414}
415
416/*
417 * Must be called with the spinlock in the wait_queue_head_t held.
418 */
419static inline void remove_wait_queue_locked(wait_queue_head_t *q,
420 wait_queue_t * wait)
421{
422 __remove_wait_queue(q, wait);
423}
424
425/*
426 * These are the old interfaces to sleep waiting for an event. 421 * These are the old interfaces to sleep waiting for an event.
427 * They are racy. DO NOT use them, use the wait_event* interfaces above. 422 * They are racy. DO NOT use them, use the wait_event* interfaces above.
428 * We plan to remove these interfaces. 423 * We plan to remove these interfaces.
diff --git a/include/linux/zorro.h b/include/linux/zorro.h
index 913bfc226dda..7bf9db525e9e 100644
--- a/include/linux/zorro.h
+++ b/include/linux/zorro.h
@@ -38,8 +38,6 @@
38typedef __u32 zorro_id; 38typedef __u32 zorro_id;
39 39
40 40
41#define ZORRO_WILDCARD (0xffffffff) /* not official */
42
43/* Include the ID list */ 41/* Include the ID list */
44#include <linux/zorro_ids.h> 42#include <linux/zorro_ids.h>
45 43
@@ -116,6 +114,7 @@ struct ConfigDev {
116 114
117#include <linux/init.h> 115#include <linux/init.h>
118#include <linux/ioport.h> 116#include <linux/ioport.h>
117#include <linux/mod_devicetable.h>
119 118
120#include <asm/zorro.h> 119#include <asm/zorro.h>
121 120
@@ -142,29 +141,10 @@ struct zorro_dev {
142 * Zorro bus 141 * Zorro bus
143 */ 142 */
144 143
145struct zorro_bus {
146 struct list_head devices; /* list of devices on this bus */
147 unsigned int num_resources; /* number of resources */
148 struct resource resources[4]; /* address space routed to this bus */
149 struct device dev;
150 char name[10];
151};
152
153extern struct zorro_bus zorro_bus; /* single Zorro bus */
154extern struct bus_type zorro_bus_type; 144extern struct bus_type zorro_bus_type;
155 145
156 146
157 /* 147 /*
158 * Zorro device IDs
159 */
160
161struct zorro_device_id {
162 zorro_id id; /* Device ID or ZORRO_WILDCARD */
163 unsigned long driver_data; /* Data private to the driver */
164};
165
166
167 /*
168 * Zorro device drivers 148 * Zorro device drivers
169 */ 149 */
170 150
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 75be5a28815d..aa04b9a5093b 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -1197,30 +1197,15 @@ extern int tcp_v4_md5_do_del(struct sock *sk,
1197extern struct tcp_md5sig_pool * __percpu *tcp_alloc_md5sig_pool(struct sock *); 1197extern struct tcp_md5sig_pool * __percpu *tcp_alloc_md5sig_pool(struct sock *);
1198extern void tcp_free_md5sig_pool(void); 1198extern void tcp_free_md5sig_pool(void);
1199 1199
1200extern struct tcp_md5sig_pool *__tcp_get_md5sig_pool(int cpu); 1200extern struct tcp_md5sig_pool *tcp_get_md5sig_pool(void);
1201extern void __tcp_put_md5sig_pool(void); 1201extern void tcp_put_md5sig_pool(void);
1202
1202extern int tcp_md5_hash_header(struct tcp_md5sig_pool *, struct tcphdr *); 1203extern int tcp_md5_hash_header(struct tcp_md5sig_pool *, struct tcphdr *);
1203extern int tcp_md5_hash_skb_data(struct tcp_md5sig_pool *, struct sk_buff *, 1204extern int tcp_md5_hash_skb_data(struct tcp_md5sig_pool *, struct sk_buff *,
1204 unsigned header_len); 1205 unsigned header_len);
1205extern int tcp_md5_hash_key(struct tcp_md5sig_pool *hp, 1206extern int tcp_md5_hash_key(struct tcp_md5sig_pool *hp,
1206 struct tcp_md5sig_key *key); 1207 struct tcp_md5sig_key *key);
1207 1208
1208static inline
1209struct tcp_md5sig_pool *tcp_get_md5sig_pool(void)
1210{
1211 int cpu = get_cpu();
1212 struct tcp_md5sig_pool *ret = __tcp_get_md5sig_pool(cpu);
1213 if (!ret)
1214 put_cpu();
1215 return ret;
1216}
1217
1218static inline void tcp_put_md5sig_pool(void)
1219{
1220 __tcp_put_md5sig_pool();
1221 put_cpu();
1222}
1223
1224/* write queue abstraction */ 1209/* write queue abstraction */
1225static inline void tcp_write_queue_purge(struct sock *sk) 1210static inline void tcp_write_queue_purge(struct sock *sk)
1226{ 1211{
diff --git a/include/trace/define_trace.h b/include/trace/define_trace.h
index 5acfb1eb4df9..1dfab5401511 100644
--- a/include/trace/define_trace.h
+++ b/include/trace/define_trace.h
@@ -65,6 +65,10 @@
65 65
66#include TRACE_INCLUDE(TRACE_INCLUDE_FILE) 66#include TRACE_INCLUDE(TRACE_INCLUDE_FILE)
67 67
68/* Make all open coded DECLARE_TRACE nops */
69#undef DECLARE_TRACE
70#define DECLARE_TRACE(name, proto, args)
71
68#ifdef CONFIG_EVENT_TRACING 72#ifdef CONFIG_EVENT_TRACING
69#include <trace/ftrace.h> 73#include <trace/ftrace.h>
70#endif 74#endif
@@ -75,6 +79,7 @@
75#undef DEFINE_EVENT 79#undef DEFINE_EVENT
76#undef DEFINE_EVENT_PRINT 80#undef DEFINE_EVENT_PRINT
77#undef TRACE_HEADER_MULTI_READ 81#undef TRACE_HEADER_MULTI_READ
82#undef DECLARE_TRACE
78 83
79/* Only undef what we defined in this file */ 84/* Only undef what we defined in this file */
80#ifdef UNDEF_TRACE_INCLUDE_FILE 85#ifdef UNDEF_TRACE_INCLUDE_FILE
diff --git a/include/trace/events/lock.h b/include/trace/events/lock.h
index 5c1dcfc16c60..2821b86de63b 100644
--- a/include/trace/events/lock.h
+++ b/include/trace/events/lock.h
@@ -35,15 +35,15 @@ TRACE_EVENT(lock_acquire,
35 __get_str(name)) 35 __get_str(name))
36); 36);
37 37
38TRACE_EVENT(lock_release, 38DECLARE_EVENT_CLASS(lock,
39 39
40 TP_PROTO(struct lockdep_map *lock, int nested, unsigned long ip), 40 TP_PROTO(struct lockdep_map *lock, unsigned long ip),
41 41
42 TP_ARGS(lock, nested, ip), 42 TP_ARGS(lock, ip),
43 43
44 TP_STRUCT__entry( 44 TP_STRUCT__entry(
45 __string(name, lock->name) 45 __string( name, lock->name )
46 __field(void *, lockdep_addr) 46 __field( void *, lockdep_addr )
47 ), 47 ),
48 48
49 TP_fast_assign( 49 TP_fast_assign(
@@ -51,51 +51,30 @@ TRACE_EVENT(lock_release,
51 __entry->lockdep_addr = lock; 51 __entry->lockdep_addr = lock;
52 ), 52 ),
53 53
54 TP_printk("%p %s", 54 TP_printk("%p %s", __entry->lockdep_addr, __get_str(name))
55 __entry->lockdep_addr, __get_str(name))
56); 55);
57 56
58#ifdef CONFIG_LOCK_STAT 57DEFINE_EVENT(lock, lock_release,
59
60TRACE_EVENT(lock_contended,
61 58
62 TP_PROTO(struct lockdep_map *lock, unsigned long ip), 59 TP_PROTO(struct lockdep_map *lock, unsigned long ip),
63 60
64 TP_ARGS(lock, ip), 61 TP_ARGS(lock, ip)
62);
65 63
66 TP_STRUCT__entry( 64#ifdef CONFIG_LOCK_STAT
67 __string(name, lock->name)
68 __field(void *, lockdep_addr)
69 ),
70 65
71 TP_fast_assign( 66DEFINE_EVENT(lock, lock_contended,
72 __assign_str(name, lock->name);
73 __entry->lockdep_addr = lock;
74 ),
75 67
76 TP_printk("%p %s", 68 TP_PROTO(struct lockdep_map *lock, unsigned long ip),
77 __entry->lockdep_addr, __get_str(name))
78);
79 69
80TRACE_EVENT(lock_acquired, 70 TP_ARGS(lock, ip)
81 TP_PROTO(struct lockdep_map *lock, unsigned long ip, s64 waittime), 71);
82 72
83 TP_ARGS(lock, ip, waittime), 73DEFINE_EVENT(lock, lock_acquired,
84 74
85 TP_STRUCT__entry( 75 TP_PROTO(struct lockdep_map *lock, unsigned long ip),
86 __string(name, lock->name)
87 __field(s64, wait_nsec)
88 __field(void *, lockdep_addr)
89 ),
90 76
91 TP_fast_assign( 77 TP_ARGS(lock, ip)
92 __assign_str(name, lock->name);
93 __entry->wait_nsec = waittime;
94 __entry->lockdep_addr = lock;
95 ),
96 TP_printk("%p %s (%llu ns)", __entry->lockdep_addr,
97 __get_str(name),
98 __entry->wait_nsec)
99); 78);
100 79
101#endif 80#endif
diff --git a/include/trace/events/module.h b/include/trace/events/module.h
index 4b0f48ba16a6..c7bb2f0482fe 100644
--- a/include/trace/events/module.h
+++ b/include/trace/events/module.h
@@ -51,11 +51,14 @@ TRACE_EVENT(module_free,
51 TP_printk("%s", __get_str(name)) 51 TP_printk("%s", __get_str(name))
52); 52);
53 53
54#ifdef CONFIG_MODULE_UNLOAD
55/* trace_module_get/put are only used if CONFIG_MODULE_UNLOAD is defined */
56
54DECLARE_EVENT_CLASS(module_refcnt, 57DECLARE_EVENT_CLASS(module_refcnt,
55 58
56 TP_PROTO(struct module *mod, unsigned long ip, int refcnt), 59 TP_PROTO(struct module *mod, unsigned long ip),
57 60
58 TP_ARGS(mod, ip, refcnt), 61 TP_ARGS(mod, ip),
59 62
60 TP_STRUCT__entry( 63 TP_STRUCT__entry(
61 __field( unsigned long, ip ) 64 __field( unsigned long, ip )
@@ -65,7 +68,7 @@ DECLARE_EVENT_CLASS(module_refcnt,
65 68
66 TP_fast_assign( 69 TP_fast_assign(
67 __entry->ip = ip; 70 __entry->ip = ip;
68 __entry->refcnt = refcnt; 71 __entry->refcnt = __this_cpu_read(mod->refptr->incs) + __this_cpu_read(mod->refptr->decs);
69 __assign_str(name, mod->name); 72 __assign_str(name, mod->name);
70 ), 73 ),
71 74
@@ -75,17 +78,18 @@ DECLARE_EVENT_CLASS(module_refcnt,
75 78
76DEFINE_EVENT(module_refcnt, module_get, 79DEFINE_EVENT(module_refcnt, module_get,
77 80
78 TP_PROTO(struct module *mod, unsigned long ip, int refcnt), 81 TP_PROTO(struct module *mod, unsigned long ip),
79 82
80 TP_ARGS(mod, ip, refcnt) 83 TP_ARGS(mod, ip)
81); 84);
82 85
83DEFINE_EVENT(module_refcnt, module_put, 86DEFINE_EVENT(module_refcnt, module_put,
84 87
85 TP_PROTO(struct module *mod, unsigned long ip, int refcnt), 88 TP_PROTO(struct module *mod, unsigned long ip),
86 89
87 TP_ARGS(mod, ip, refcnt) 90 TP_ARGS(mod, ip)
88); 91);
92#endif /* CONFIG_MODULE_UNLOAD */
89 93
90TRACE_EVENT(module_request, 94TRACE_EVENT(module_request,
91 95
diff --git a/include/trace/events/napi.h b/include/trace/events/napi.h
index a8989c4547e7..188deca2f3c7 100644
--- a/include/trace/events/napi.h
+++ b/include/trace/events/napi.h
@@ -1,4 +1,7 @@
1#ifndef _TRACE_NAPI_H_ 1#undef TRACE_SYSTEM
2#define TRACE_SYSTEM napi
3
4#if !defined(_TRACE_NAPI_H) || defined(TRACE_HEADER_MULTI_READ)
2#define _TRACE_NAPI_H_ 5#define _TRACE_NAPI_H_
3 6
4#include <linux/netdevice.h> 7#include <linux/netdevice.h>
@@ -8,4 +11,7 @@ DECLARE_TRACE(napi_poll,
8 TP_PROTO(struct napi_struct *napi), 11 TP_PROTO(struct napi_struct *napi),
9 TP_ARGS(napi)); 12 TP_ARGS(napi));
10 13
11#endif 14#endif /* _TRACE_NAPI_H_ */
15
16/* This part must be outside protection */
17#include <trace/define_trace.h>
diff --git a/include/trace/events/sched.h b/include/trace/events/sched.h
index cfceb0b73e20..4f733ecea46e 100644
--- a/include/trace/events/sched.h
+++ b/include/trace/events/sched.h
@@ -51,15 +51,12 @@ TRACE_EVENT(sched_kthread_stop_ret,
51 51
52/* 52/*
53 * Tracepoint for waiting on task to unschedule: 53 * Tracepoint for waiting on task to unschedule:
54 *
55 * (NOTE: the 'rq' argument is not used by generic trace events,
56 * but used by the latency tracer plugin. )
57 */ 54 */
58TRACE_EVENT(sched_wait_task, 55TRACE_EVENT(sched_wait_task,
59 56
60 TP_PROTO(struct rq *rq, struct task_struct *p), 57 TP_PROTO(struct task_struct *p),
61 58
62 TP_ARGS(rq, p), 59 TP_ARGS(p),
63 60
64 TP_STRUCT__entry( 61 TP_STRUCT__entry(
65 __array( char, comm, TASK_COMM_LEN ) 62 __array( char, comm, TASK_COMM_LEN )
@@ -79,15 +76,12 @@ TRACE_EVENT(sched_wait_task,
79 76
80/* 77/*
81 * Tracepoint for waking up a task: 78 * Tracepoint for waking up a task:
82 *
83 * (NOTE: the 'rq' argument is not used by generic trace events,
84 * but used by the latency tracer plugin. )
85 */ 79 */
86DECLARE_EVENT_CLASS(sched_wakeup_template, 80DECLARE_EVENT_CLASS(sched_wakeup_template,
87 81
88 TP_PROTO(struct rq *rq, struct task_struct *p, int success), 82 TP_PROTO(struct task_struct *p, int success),
89 83
90 TP_ARGS(rq, p, success), 84 TP_ARGS(p, success),
91 85
92 TP_STRUCT__entry( 86 TP_STRUCT__entry(
93 __array( char, comm, TASK_COMM_LEN ) 87 __array( char, comm, TASK_COMM_LEN )
@@ -111,31 +105,25 @@ DECLARE_EVENT_CLASS(sched_wakeup_template,
111); 105);
112 106
113DEFINE_EVENT(sched_wakeup_template, sched_wakeup, 107DEFINE_EVENT(sched_wakeup_template, sched_wakeup,
114 TP_PROTO(struct rq *rq, struct task_struct *p, int success), 108 TP_PROTO(struct task_struct *p, int success),
115 TP_ARGS(rq, p, success)); 109 TP_ARGS(p, success));
116 110
117/* 111/*
118 * Tracepoint for waking up a new task: 112 * Tracepoint for waking up a new task:
119 *
120 * (NOTE: the 'rq' argument is not used by generic trace events,
121 * but used by the latency tracer plugin. )
122 */ 113 */
123DEFINE_EVENT(sched_wakeup_template, sched_wakeup_new, 114DEFINE_EVENT(sched_wakeup_template, sched_wakeup_new,
124 TP_PROTO(struct rq *rq, struct task_struct *p, int success), 115 TP_PROTO(struct task_struct *p, int success),
125 TP_ARGS(rq, p, success)); 116 TP_ARGS(p, success));
126 117
127/* 118/*
128 * Tracepoint for task switches, performed by the scheduler: 119 * Tracepoint for task switches, performed by the scheduler:
129 *
130 * (NOTE: the 'rq' argument is not used by generic trace events,
131 * but used by the latency tracer plugin. )
132 */ 120 */
133TRACE_EVENT(sched_switch, 121TRACE_EVENT(sched_switch,
134 122
135 TP_PROTO(struct rq *rq, struct task_struct *prev, 123 TP_PROTO(struct task_struct *prev,
136 struct task_struct *next), 124 struct task_struct *next),
137 125
138 TP_ARGS(rq, prev, next), 126 TP_ARGS(prev, next),
139 127
140 TP_STRUCT__entry( 128 TP_STRUCT__entry(
141 __array( char, prev_comm, TASK_COMM_LEN ) 129 __array( char, prev_comm, TASK_COMM_LEN )
diff --git a/include/trace/events/signal.h b/include/trace/events/signal.h
index a510b75ac304..814566c99d29 100644
--- a/include/trace/events/signal.h
+++ b/include/trace/events/signal.h
@@ -100,18 +100,7 @@ TRACE_EVENT(signal_deliver,
100 __entry->sa_handler, __entry->sa_flags) 100 __entry->sa_handler, __entry->sa_flags)
101); 101);
102 102
103/** 103DECLARE_EVENT_CLASS(signal_queue_overflow,
104 * signal_overflow_fail - called when signal queue is overflow
105 * @sig: signal number
106 * @group: signal to process group or not (bool)
107 * @info: pointer to struct siginfo
108 *
109 * Kernel fails to generate 'sig' signal with 'info' siginfo, because
110 * siginfo queue is overflow, and the signal is dropped.
111 * 'group' is not 0 if the signal will be sent to a process group.
112 * 'sig' is always one of RT signals.
113 */
114TRACE_EVENT(signal_overflow_fail,
115 104
116 TP_PROTO(int sig, int group, struct siginfo *info), 105 TP_PROTO(int sig, int group, struct siginfo *info),
117 106
@@ -135,6 +124,24 @@ TRACE_EVENT(signal_overflow_fail,
135); 124);
136 125
137/** 126/**
127 * signal_overflow_fail - called when signal queue is overflow
128 * @sig: signal number
129 * @group: signal to process group or not (bool)
130 * @info: pointer to struct siginfo
131 *
132 * Kernel fails to generate 'sig' signal with 'info' siginfo, because
133 * siginfo queue is overflow, and the signal is dropped.
134 * 'group' is not 0 if the signal will be sent to a process group.
135 * 'sig' is always one of RT signals.
136 */
137DEFINE_EVENT(signal_queue_overflow, signal_overflow_fail,
138
139 TP_PROTO(int sig, int group, struct siginfo *info),
140
141 TP_ARGS(sig, group, info)
142);
143
144/**
138 * signal_lose_info - called when siginfo is lost 145 * signal_lose_info - called when siginfo is lost
139 * @sig: signal number 146 * @sig: signal number
140 * @group: signal to process group or not (bool) 147 * @group: signal to process group or not (bool)
@@ -145,28 +152,13 @@ TRACE_EVENT(signal_overflow_fail,
145 * 'group' is not 0 if the signal will be sent to a process group. 152 * 'group' is not 0 if the signal will be sent to a process group.
146 * 'sig' is always one of non-RT signals. 153 * 'sig' is always one of non-RT signals.
147 */ 154 */
148TRACE_EVENT(signal_lose_info, 155DEFINE_EVENT(signal_queue_overflow, signal_lose_info,
149 156
150 TP_PROTO(int sig, int group, struct siginfo *info), 157 TP_PROTO(int sig, int group, struct siginfo *info),
151 158
152 TP_ARGS(sig, group, info), 159 TP_ARGS(sig, group, info)
153
154 TP_STRUCT__entry(
155 __field( int, sig )
156 __field( int, group )
157 __field( int, errno )
158 __field( int, code )
159 ),
160
161 TP_fast_assign(
162 __entry->sig = sig;
163 __entry->group = group;
164 TP_STORE_SIGINFO(__entry, info);
165 ),
166
167 TP_printk("sig=%d group=%d errno=%d code=%d",
168 __entry->sig, __entry->group, __entry->errno, __entry->code)
169); 160);
161
170#endif /* _TRACE_SIGNAL_H */ 162#endif /* _TRACE_SIGNAL_H */
171 163
172/* This part must be outside protection */ 164/* This part must be outside protection */
diff --git a/include/trace/ftrace.h b/include/trace/ftrace.h
index ea6f9d4a20e9..16253db38d73 100644
--- a/include/trace/ftrace.h
+++ b/include/trace/ftrace.h
@@ -154,9 +154,11 @@
154 * 154 *
155 * field = (typeof(field))entry; 155 * field = (typeof(field))entry;
156 * 156 *
157 * p = get_cpu_var(ftrace_event_seq); 157 * p = &get_cpu_var(ftrace_event_seq);
158 * trace_seq_init(p); 158 * trace_seq_init(p);
159 * ret = trace_seq_printf(s, <TP_printk> "\n"); 159 * ret = trace_seq_printf(s, "%s: ", <call>);
160 * if (ret)
161 * ret = trace_seq_printf(s, <TP_printk> "\n");
160 * put_cpu(); 162 * put_cpu();
161 * if (!ret) 163 * if (!ret)
162 * return TRACE_TYPE_PARTIAL_LINE; 164 * return TRACE_TYPE_PARTIAL_LINE;
@@ -450,38 +452,38 @@ perf_trace_disable_##name(struct ftrace_event_call *unused) \
450 * 452 *
451 * static void ftrace_raw_event_<call>(proto) 453 * static void ftrace_raw_event_<call>(proto)
452 * { 454 * {
455 * struct ftrace_data_offsets_<call> __maybe_unused __data_offsets;
453 * struct ring_buffer_event *event; 456 * struct ring_buffer_event *event;
454 * struct ftrace_raw_<call> *entry; <-- defined in stage 1 457 * struct ftrace_raw_<call> *entry; <-- defined in stage 1
455 * struct ring_buffer *buffer; 458 * struct ring_buffer *buffer;
456 * unsigned long irq_flags; 459 * unsigned long irq_flags;
460 * int __data_size;
457 * int pc; 461 * int pc;
458 * 462 *
459 * local_save_flags(irq_flags); 463 * local_save_flags(irq_flags);
460 * pc = preempt_count(); 464 * pc = preempt_count();
461 * 465 *
466 * __data_size = ftrace_get_offsets_<call>(&__data_offsets, args);
467 *
462 * event = trace_current_buffer_lock_reserve(&buffer, 468 * event = trace_current_buffer_lock_reserve(&buffer,
463 * event_<call>.id, 469 * event_<call>.id,
464 * sizeof(struct ftrace_raw_<call>), 470 * sizeof(*entry) + __data_size,
465 * irq_flags, pc); 471 * irq_flags, pc);
466 * if (!event) 472 * if (!event)
467 * return; 473 * return;
468 * entry = ring_buffer_event_data(event); 474 * entry = ring_buffer_event_data(event);
469 * 475 *
470 * <assign>; <-- Here we assign the entries by the __field and 476 * { <assign>; } <-- Here we assign the entries by the __field and
471 * __array macros. 477 * __array macros.
472 * 478 *
473 * trace_current_buffer_unlock_commit(buffer, event, irq_flags, pc); 479 * if (!filter_current_check_discard(buffer, event_call, entry, event))
480 * trace_current_buffer_unlock_commit(buffer,
481 * event, irq_flags, pc);
474 * } 482 * }
475 * 483 *
476 * static int ftrace_raw_reg_event_<call>(struct ftrace_event_call *unused) 484 * static int ftrace_raw_reg_event_<call>(struct ftrace_event_call *unused)
477 * { 485 * {
478 * int ret; 486 * return register_trace_<call>(ftrace_raw_event_<call>);
479 *
480 * ret = register_trace_<call>(ftrace_raw_event_<call>);
481 * if (!ret)
482 * pr_info("event trace: Could not activate trace point "
483 * "probe to <call>");
484 * return ret;
485 * } 487 * }
486 * 488 *
487 * static void ftrace_unreg_event_<call>(struct ftrace_event_call *unused) 489 * static void ftrace_unreg_event_<call>(struct ftrace_event_call *unused)
@@ -493,6 +495,8 @@ perf_trace_disable_##name(struct ftrace_event_call *unused) \
493 * .trace = ftrace_raw_output_<call>, <-- stage 2 495 * .trace = ftrace_raw_output_<call>, <-- stage 2
494 * }; 496 * };
495 * 497 *
498 * static const char print_fmt_<call>[] = <TP_printk>;
499 *
496 * static struct ftrace_event_call __used 500 * static struct ftrace_event_call __used
497 * __attribute__((__aligned__(4))) 501 * __attribute__((__aligned__(4)))
498 * __attribute__((section("_ftrace_events"))) event_<call> = { 502 * __attribute__((section("_ftrace_events"))) event_<call> = {
@@ -501,6 +505,8 @@ perf_trace_disable_##name(struct ftrace_event_call *unused) \
501 * .raw_init = trace_event_raw_init, 505 * .raw_init = trace_event_raw_init,
502 * .regfunc = ftrace_reg_event_<call>, 506 * .regfunc = ftrace_reg_event_<call>,
503 * .unregfunc = ftrace_unreg_event_<call>, 507 * .unregfunc = ftrace_unreg_event_<call>,
508 * .print_fmt = print_fmt_<call>,
509 * .define_fields = ftrace_define_fields_<call>,
504 * } 510 * }
505 * 511 *
506 */ 512 */
@@ -569,7 +575,6 @@ ftrace_raw_event_id_##call(struct ftrace_event_call *event_call, \
569 return; \ 575 return; \
570 entry = ring_buffer_event_data(event); \ 576 entry = ring_buffer_event_data(event); \
571 \ 577 \
572 \
573 tstruct \ 578 tstruct \
574 \ 579 \
575 { assign; } \ 580 { assign; } \
@@ -758,13 +763,12 @@ __attribute__((section("_ftrace_events"))) event_##call = { \
758#define DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print) \ 763#define DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print) \
759static notrace void \ 764static notrace void \
760perf_trace_templ_##call(struct ftrace_event_call *event_call, \ 765perf_trace_templ_##call(struct ftrace_event_call *event_call, \
761 proto) \ 766 struct pt_regs *__regs, proto) \
762{ \ 767{ \
763 struct ftrace_data_offsets_##call __maybe_unused __data_offsets;\ 768 struct ftrace_data_offsets_##call __maybe_unused __data_offsets;\
764 struct ftrace_raw_##call *entry; \ 769 struct ftrace_raw_##call *entry; \
765 u64 __addr = 0, __count = 1; \ 770 u64 __addr = 0, __count = 1; \
766 unsigned long irq_flags; \ 771 unsigned long irq_flags; \
767 struct pt_regs *__regs; \
768 int __entry_size; \ 772 int __entry_size; \
769 int __data_size; \ 773 int __data_size; \
770 int rctx; \ 774 int rctx; \
@@ -785,20 +789,22 @@ perf_trace_templ_##call(struct ftrace_event_call *event_call, \
785 \ 789 \
786 { assign; } \ 790 { assign; } \
787 \ 791 \
788 __regs = &__get_cpu_var(perf_trace_regs); \
789 perf_fetch_caller_regs(__regs, 2); \
790 \
791 perf_trace_buf_submit(entry, __entry_size, rctx, __addr, \ 792 perf_trace_buf_submit(entry, __entry_size, rctx, __addr, \
792 __count, irq_flags, __regs); \ 793 __count, irq_flags, __regs); \
793} 794}
794 795
795#undef DEFINE_EVENT 796#undef DEFINE_EVENT
796#define DEFINE_EVENT(template, call, proto, args) \ 797#define DEFINE_EVENT(template, call, proto, args) \
797static notrace void perf_trace_##call(proto) \ 798static notrace void perf_trace_##call(proto) \
798{ \ 799{ \
799 struct ftrace_event_call *event_call = &event_##call; \ 800 struct ftrace_event_call *event_call = &event_##call; \
800 \ 801 struct pt_regs *__regs = &get_cpu_var(perf_trace_regs); \
801 perf_trace_templ_##template(event_call, args); \ 802 \
803 perf_fetch_caller_regs(__regs, 1); \
804 \
805 perf_trace_templ_##template(event_call, __regs, args); \
806 \
807 put_cpu_var(perf_trace_regs); \
802} 808}
803 809
804#undef DEFINE_EVENT_PRINT 810#undef DEFINE_EVENT_PRINT
diff --git a/init/Kconfig b/init/Kconfig
index eb77e8ccde1c..5fe94b82e4c0 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -604,8 +604,7 @@ config RT_GROUP_SCHED
604 default n 604 default n
605 help 605 help
606 This feature lets you explicitly allocate real CPU bandwidth 606 This feature lets you explicitly allocate real CPU bandwidth
607 to users or control groups (depending on the "Basis for grouping tasks" 607 to task groups. If enabled, it will also make it impossible to
608 setting below. If enabled, it will also make it impossible to
609 schedule realtime tasks for non-root users until you allocate 608 schedule realtime tasks for non-root users until you allocate
610 realtime bandwidth for them. 609 realtime bandwidth for them.
611 See Documentation/scheduler/sched-rt-group.txt for more information. 610 See Documentation/scheduler/sched-rt-group.txt for more information.
diff --git a/ipc/mqueue.c b/ipc/mqueue.c
index 59a009dc54a8..5108232f93d4 100644
--- a/ipc/mqueue.c
+++ b/ipc/mqueue.c
@@ -429,7 +429,7 @@ static void wq_add(struct mqueue_inode_info *info, int sr,
429 * sr: SEND or RECV 429 * sr: SEND or RECV
430 */ 430 */
431static int wq_sleep(struct mqueue_inode_info *info, int sr, 431static int wq_sleep(struct mqueue_inode_info *info, int sr,
432 long timeout, struct ext_wait_queue *ewp) 432 ktime_t *timeout, struct ext_wait_queue *ewp)
433{ 433{
434 int retval; 434 int retval;
435 signed long time; 435 signed long time;
@@ -440,7 +440,8 @@ static int wq_sleep(struct mqueue_inode_info *info, int sr,
440 set_current_state(TASK_INTERRUPTIBLE); 440 set_current_state(TASK_INTERRUPTIBLE);
441 441
442 spin_unlock(&info->lock); 442 spin_unlock(&info->lock);
443 time = schedule_timeout(timeout); 443 time = schedule_hrtimeout_range_clock(timeout,
444 HRTIMER_MODE_ABS, 0, CLOCK_REALTIME);
444 445
445 while (ewp->state == STATE_PENDING) 446 while (ewp->state == STATE_PENDING)
446 cpu_relax(); 447 cpu_relax();
@@ -552,31 +553,16 @@ static void __do_notify(struct mqueue_inode_info *info)
552 wake_up(&info->wait_q); 553 wake_up(&info->wait_q);
553} 554}
554 555
555static long prepare_timeout(struct timespec *p) 556static int prepare_timeout(const struct timespec __user *u_abs_timeout,
557 ktime_t *expires, struct timespec *ts)
556{ 558{
557 struct timespec nowts; 559 if (copy_from_user(ts, u_abs_timeout, sizeof(struct timespec)))
558 long timeout; 560 return -EFAULT;
559 561 if (!timespec_valid(ts))
560 if (p) { 562 return -EINVAL;
561 if (unlikely(p->tv_nsec < 0 || p->tv_sec < 0
562 || p->tv_nsec >= NSEC_PER_SEC))
563 return -EINVAL;
564 nowts = CURRENT_TIME;
565 /* first subtract as jiffies can't be too big */
566 p->tv_sec -= nowts.tv_sec;
567 if (p->tv_nsec < nowts.tv_nsec) {
568 p->tv_nsec += NSEC_PER_SEC;
569 p->tv_sec--;
570 }
571 p->tv_nsec -= nowts.tv_nsec;
572 if (p->tv_sec < 0)
573 return 0;
574
575 timeout = timespec_to_jiffies(p) + 1;
576 } else
577 return MAX_SCHEDULE_TIMEOUT;
578 563
579 return timeout; 564 *expires = timespec_to_ktime(*ts);
565 return 0;
580} 566}
581 567
582static void remove_notification(struct mqueue_inode_info *info) 568static void remove_notification(struct mqueue_inode_info *info)
@@ -862,22 +848,21 @@ SYSCALL_DEFINE5(mq_timedsend, mqd_t, mqdes, const char __user *, u_msg_ptr,
862 struct ext_wait_queue *receiver; 848 struct ext_wait_queue *receiver;
863 struct msg_msg *msg_ptr; 849 struct msg_msg *msg_ptr;
864 struct mqueue_inode_info *info; 850 struct mqueue_inode_info *info;
865 struct timespec ts, *p = NULL; 851 ktime_t expires, *timeout = NULL;
866 long timeout; 852 struct timespec ts;
867 int ret; 853 int ret;
868 854
869 if (u_abs_timeout) { 855 if (u_abs_timeout) {
870 if (copy_from_user(&ts, u_abs_timeout, 856 int res = prepare_timeout(u_abs_timeout, &expires, &ts);
871 sizeof(struct timespec))) 857 if (res)
872 return -EFAULT; 858 return res;
873 p = &ts; 859 timeout = &expires;
874 } 860 }
875 861
876 if (unlikely(msg_prio >= (unsigned long) MQ_PRIO_MAX)) 862 if (unlikely(msg_prio >= (unsigned long) MQ_PRIO_MAX))
877 return -EINVAL; 863 return -EINVAL;
878 864
879 audit_mq_sendrecv(mqdes, msg_len, msg_prio, p); 865 audit_mq_sendrecv(mqdes, msg_len, msg_prio, timeout ? &ts : NULL);
880 timeout = prepare_timeout(p);
881 866
882 filp = fget(mqdes); 867 filp = fget(mqdes);
883 if (unlikely(!filp)) { 868 if (unlikely(!filp)) {
@@ -919,9 +904,6 @@ SYSCALL_DEFINE5(mq_timedsend, mqd_t, mqdes, const char __user *, u_msg_ptr,
919 if (filp->f_flags & O_NONBLOCK) { 904 if (filp->f_flags & O_NONBLOCK) {
920 spin_unlock(&info->lock); 905 spin_unlock(&info->lock);
921 ret = -EAGAIN; 906 ret = -EAGAIN;
922 } else if (unlikely(timeout < 0)) {
923 spin_unlock(&info->lock);
924 ret = timeout;
925 } else { 907 } else {
926 wait.task = current; 908 wait.task = current;
927 wait.msg = (void *) msg_ptr; 909 wait.msg = (void *) msg_ptr;
@@ -954,24 +936,23 @@ SYSCALL_DEFINE5(mq_timedreceive, mqd_t, mqdes, char __user *, u_msg_ptr,
954 size_t, msg_len, unsigned int __user *, u_msg_prio, 936 size_t, msg_len, unsigned int __user *, u_msg_prio,
955 const struct timespec __user *, u_abs_timeout) 937 const struct timespec __user *, u_abs_timeout)
956{ 938{
957 long timeout;
958 ssize_t ret; 939 ssize_t ret;
959 struct msg_msg *msg_ptr; 940 struct msg_msg *msg_ptr;
960 struct file *filp; 941 struct file *filp;
961 struct inode *inode; 942 struct inode *inode;
962 struct mqueue_inode_info *info; 943 struct mqueue_inode_info *info;
963 struct ext_wait_queue wait; 944 struct ext_wait_queue wait;
964 struct timespec ts, *p = NULL; 945 ktime_t expires, *timeout = NULL;
946 struct timespec ts;
965 947
966 if (u_abs_timeout) { 948 if (u_abs_timeout) {
967 if (copy_from_user(&ts, u_abs_timeout, 949 int res = prepare_timeout(u_abs_timeout, &expires, &ts);
968 sizeof(struct timespec))) 950 if (res)
969 return -EFAULT; 951 return res;
970 p = &ts; 952 timeout = &expires;
971 } 953 }
972 954
973 audit_mq_sendrecv(mqdes, msg_len, 0, p); 955 audit_mq_sendrecv(mqdes, msg_len, 0, timeout ? &ts : NULL);
974 timeout = prepare_timeout(p);
975 956
976 filp = fget(mqdes); 957 filp = fget(mqdes);
977 if (unlikely(!filp)) { 958 if (unlikely(!filp)) {
@@ -1003,11 +984,6 @@ SYSCALL_DEFINE5(mq_timedreceive, mqd_t, mqdes, char __user *, u_msg_ptr,
1003 if (filp->f_flags & O_NONBLOCK) { 984 if (filp->f_flags & O_NONBLOCK) {
1004 spin_unlock(&info->lock); 985 spin_unlock(&info->lock);
1005 ret = -EAGAIN; 986 ret = -EAGAIN;
1006 msg_ptr = NULL;
1007 } else if (unlikely(timeout < 0)) {
1008 spin_unlock(&info->lock);
1009 ret = timeout;
1010 msg_ptr = NULL;
1011 } else { 987 } else {
1012 wait.task = current; 988 wait.task = current;
1013 wait.state = STATE_NONE; 989 wait.state = STATE_NONE;
diff --git a/kernel/Makefile b/kernel/Makefile
index a987aa1676b5..149e18ef1ab1 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -68,7 +68,7 @@ obj-$(CONFIG_USER_NS) += user_namespace.o
68obj-$(CONFIG_PID_NS) += pid_namespace.o 68obj-$(CONFIG_PID_NS) += pid_namespace.o
69obj-$(CONFIG_IKCONFIG) += configs.o 69obj-$(CONFIG_IKCONFIG) += configs.o
70obj-$(CONFIG_RESOURCE_COUNTERS) += res_counter.o 70obj-$(CONFIG_RESOURCE_COUNTERS) += res_counter.o
71obj-$(CONFIG_STOP_MACHINE) += stop_machine.o 71obj-$(CONFIG_SMP) += stop_machine.o
72obj-$(CONFIG_KPROBES_SANITY_TEST) += test_kprobes.o 72obj-$(CONFIG_KPROBES_SANITY_TEST) += test_kprobes.o
73obj-$(CONFIG_AUDIT) += audit.o auditfilter.o audit_watch.o 73obj-$(CONFIG_AUDIT) += audit.o auditfilter.o audit_watch.o
74obj-$(CONFIG_AUDITSYSCALL) += auditsc.o 74obj-$(CONFIG_AUDITSYSCALL) += auditsc.o
diff --git a/kernel/capability.c b/kernel/capability.c
index 9e4697e9b276..2f05303715a5 100644
--- a/kernel/capability.c
+++ b/kernel/capability.c
@@ -15,7 +15,6 @@
15#include <linux/syscalls.h> 15#include <linux/syscalls.h>
16#include <linux/pid_namespace.h> 16#include <linux/pid_namespace.h>
17#include <asm/uaccess.h> 17#include <asm/uaccess.h>
18#include "cred-internals.h"
19 18
20/* 19/*
21 * Leveraged for setting/resetting capabilities 20 * Leveraged for setting/resetting capabilities
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index 6d870f2d1228..e9ec642932ee 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -3016,7 +3016,7 @@ static int cgroup_event_wake(wait_queue_t *wait, unsigned mode,
3016 unsigned long flags = (unsigned long)key; 3016 unsigned long flags = (unsigned long)key;
3017 3017
3018 if (flags & POLLHUP) { 3018 if (flags & POLLHUP) {
3019 remove_wait_queue_locked(event->wqh, &event->wait); 3019 __remove_wait_queue(event->wqh, &event->wait);
3020 spin_lock(&cgrp->event_list_lock); 3020 spin_lock(&cgrp->event_list_lock);
3021 list_del(&event->list); 3021 list_del(&event->list);
3022 spin_unlock(&cgrp->event_list_lock); 3022 spin_unlock(&cgrp->event_list_lock);
diff --git a/kernel/compat.c b/kernel/compat.c
index 7f40e9275fd9..5adab05a3172 100644
--- a/kernel/compat.c
+++ b/kernel/compat.c
@@ -495,29 +495,26 @@ asmlinkage long compat_sys_sched_getaffinity(compat_pid_t pid, unsigned int len,
495{ 495{
496 int ret; 496 int ret;
497 cpumask_var_t mask; 497 cpumask_var_t mask;
498 unsigned long *k;
499 unsigned int min_length = cpumask_size();
500
501 if (nr_cpu_ids <= BITS_PER_COMPAT_LONG)
502 min_length = sizeof(compat_ulong_t);
503 498
504 if (len < min_length) 499 if ((len * BITS_PER_BYTE) < nr_cpu_ids)
500 return -EINVAL;
501 if (len & (sizeof(compat_ulong_t)-1))
505 return -EINVAL; 502 return -EINVAL;
506 503
507 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) 504 if (!alloc_cpumask_var(&mask, GFP_KERNEL))
508 return -ENOMEM; 505 return -ENOMEM;
509 506
510 ret = sched_getaffinity(pid, mask); 507 ret = sched_getaffinity(pid, mask);
511 if (ret < 0) 508 if (ret == 0) {
512 goto out; 509 size_t retlen = min_t(size_t, len, cpumask_size());
513 510
514 k = cpumask_bits(mask); 511 if (compat_put_bitmap(user_mask_ptr, cpumask_bits(mask), retlen * 8))
515 ret = compat_put_bitmap(user_mask_ptr, k, min_length * 8); 512 ret = -EFAULT;
516 if (ret == 0) 513 else
517 ret = min_length; 514 ret = retlen;
518 515 }
519out:
520 free_cpumask_var(mask); 516 free_cpumask_var(mask);
517
521 return ret; 518 return ret;
522} 519}
523 520
diff --git a/kernel/cpu.c b/kernel/cpu.c
index 25bba73b1be3..545777574779 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -164,6 +164,7 @@ static inline void check_for_tasks(int cpu)
164} 164}
165 165
166struct take_cpu_down_param { 166struct take_cpu_down_param {
167 struct task_struct *caller;
167 unsigned long mod; 168 unsigned long mod;
168 void *hcpu; 169 void *hcpu;
169}; 170};
@@ -172,6 +173,7 @@ struct take_cpu_down_param {
172static int __ref take_cpu_down(void *_param) 173static int __ref take_cpu_down(void *_param)
173{ 174{
174 struct take_cpu_down_param *param = _param; 175 struct take_cpu_down_param *param = _param;
176 unsigned int cpu = (unsigned long)param->hcpu;
175 int err; 177 int err;
176 178
177 /* Ensure this CPU doesn't handle any more interrupts. */ 179 /* Ensure this CPU doesn't handle any more interrupts. */
@@ -182,6 +184,8 @@ static int __ref take_cpu_down(void *_param)
182 raw_notifier_call_chain(&cpu_chain, CPU_DYING | param->mod, 184 raw_notifier_call_chain(&cpu_chain, CPU_DYING | param->mod,
183 param->hcpu); 185 param->hcpu);
184 186
187 if (task_cpu(param->caller) == cpu)
188 move_task_off_dead_cpu(cpu, param->caller);
185 /* Force idle task to run as soon as we yield: it should 189 /* Force idle task to run as soon as we yield: it should
186 immediately notice cpu is offline and die quickly. */ 190 immediately notice cpu is offline and die quickly. */
187 sched_idle_next(); 191 sched_idle_next();
@@ -192,10 +196,10 @@ static int __ref take_cpu_down(void *_param)
192static int __ref _cpu_down(unsigned int cpu, int tasks_frozen) 196static int __ref _cpu_down(unsigned int cpu, int tasks_frozen)
193{ 197{
194 int err, nr_calls = 0; 198 int err, nr_calls = 0;
195 cpumask_var_t old_allowed;
196 void *hcpu = (void *)(long)cpu; 199 void *hcpu = (void *)(long)cpu;
197 unsigned long mod = tasks_frozen ? CPU_TASKS_FROZEN : 0; 200 unsigned long mod = tasks_frozen ? CPU_TASKS_FROZEN : 0;
198 struct take_cpu_down_param tcd_param = { 201 struct take_cpu_down_param tcd_param = {
202 .caller = current,
199 .mod = mod, 203 .mod = mod,
200 .hcpu = hcpu, 204 .hcpu = hcpu,
201 }; 205 };
@@ -206,9 +210,6 @@ static int __ref _cpu_down(unsigned int cpu, int tasks_frozen)
206 if (!cpu_online(cpu)) 210 if (!cpu_online(cpu))
207 return -EINVAL; 211 return -EINVAL;
208 212
209 if (!alloc_cpumask_var(&old_allowed, GFP_KERNEL))
210 return -ENOMEM;
211
212 cpu_hotplug_begin(); 213 cpu_hotplug_begin();
213 set_cpu_active(cpu, false); 214 set_cpu_active(cpu, false);
214 err = __raw_notifier_call_chain(&cpu_chain, CPU_DOWN_PREPARE | mod, 215 err = __raw_notifier_call_chain(&cpu_chain, CPU_DOWN_PREPARE | mod,
@@ -225,10 +226,6 @@ static int __ref _cpu_down(unsigned int cpu, int tasks_frozen)
225 goto out_release; 226 goto out_release;
226 } 227 }
227 228
228 /* Ensure that we are not runnable on dying cpu */
229 cpumask_copy(old_allowed, &current->cpus_allowed);
230 set_cpus_allowed_ptr(current, cpu_active_mask);
231
232 err = __stop_machine(take_cpu_down, &tcd_param, cpumask_of(cpu)); 229 err = __stop_machine(take_cpu_down, &tcd_param, cpumask_of(cpu));
233 if (err) { 230 if (err) {
234 set_cpu_active(cpu, true); 231 set_cpu_active(cpu, true);
@@ -237,7 +234,7 @@ static int __ref _cpu_down(unsigned int cpu, int tasks_frozen)
237 hcpu) == NOTIFY_BAD) 234 hcpu) == NOTIFY_BAD)
238 BUG(); 235 BUG();
239 236
240 goto out_allowed; 237 goto out_release;
241 } 238 }
242 BUG_ON(cpu_online(cpu)); 239 BUG_ON(cpu_online(cpu));
243 240
@@ -255,8 +252,6 @@ static int __ref _cpu_down(unsigned int cpu, int tasks_frozen)
255 252
256 check_for_tasks(cpu); 253 check_for_tasks(cpu);
257 254
258out_allowed:
259 set_cpus_allowed_ptr(current, old_allowed);
260out_release: 255out_release:
261 cpu_hotplug_done(); 256 cpu_hotplug_done();
262 if (!err) { 257 if (!err) {
@@ -264,7 +259,6 @@ out_release:
264 hcpu) == NOTIFY_BAD) 259 hcpu) == NOTIFY_BAD)
265 BUG(); 260 BUG();
266 } 261 }
267 free_cpumask_var(old_allowed);
268 return err; 262 return err;
269} 263}
270 264
@@ -272,9 +266,6 @@ int __ref cpu_down(unsigned int cpu)
272{ 266{
273 int err; 267 int err;
274 268
275 err = stop_machine_create();
276 if (err)
277 return err;
278 cpu_maps_update_begin(); 269 cpu_maps_update_begin();
279 270
280 if (cpu_hotplug_disabled) { 271 if (cpu_hotplug_disabled) {
@@ -286,7 +277,6 @@ int __ref cpu_down(unsigned int cpu)
286 277
287out: 278out:
288 cpu_maps_update_done(); 279 cpu_maps_update_done();
289 stop_machine_destroy();
290 return err; 280 return err;
291} 281}
292EXPORT_SYMBOL(cpu_down); 282EXPORT_SYMBOL(cpu_down);
@@ -367,9 +357,6 @@ int disable_nonboot_cpus(void)
367{ 357{
368 int cpu, first_cpu, error; 358 int cpu, first_cpu, error;
369 359
370 error = stop_machine_create();
371 if (error)
372 return error;
373 cpu_maps_update_begin(); 360 cpu_maps_update_begin();
374 first_cpu = cpumask_first(cpu_online_mask); 361 first_cpu = cpumask_first(cpu_online_mask);
375 /* 362 /*
@@ -400,7 +387,6 @@ int disable_nonboot_cpus(void)
400 printk(KERN_ERR "Non-boot CPUs are not disabled\n"); 387 printk(KERN_ERR "Non-boot CPUs are not disabled\n");
401 } 388 }
402 cpu_maps_update_done(); 389 cpu_maps_update_done();
403 stop_machine_destroy();
404 return error; 390 return error;
405} 391}
406 392
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index d10946748ec2..9a50c5f6e727 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -2182,19 +2182,52 @@ void __init cpuset_init_smp(void)
2182void cpuset_cpus_allowed(struct task_struct *tsk, struct cpumask *pmask) 2182void cpuset_cpus_allowed(struct task_struct *tsk, struct cpumask *pmask)
2183{ 2183{
2184 mutex_lock(&callback_mutex); 2184 mutex_lock(&callback_mutex);
2185 cpuset_cpus_allowed_locked(tsk, pmask); 2185 task_lock(tsk);
2186 guarantee_online_cpus(task_cs(tsk), pmask);
2187 task_unlock(tsk);
2186 mutex_unlock(&callback_mutex); 2188 mutex_unlock(&callback_mutex);
2187} 2189}
2188 2190
2189/** 2191int cpuset_cpus_allowed_fallback(struct task_struct *tsk)
2190 * cpuset_cpus_allowed_locked - return cpus_allowed mask from a tasks cpuset.
2191 * Must be called with callback_mutex held.
2192 **/
2193void cpuset_cpus_allowed_locked(struct task_struct *tsk, struct cpumask *pmask)
2194{ 2192{
2195 task_lock(tsk); 2193 const struct cpuset *cs;
2196 guarantee_online_cpus(task_cs(tsk), pmask); 2194 int cpu;
2197 task_unlock(tsk); 2195
2196 rcu_read_lock();
2197 cs = task_cs(tsk);
2198 if (cs)
2199 cpumask_copy(&tsk->cpus_allowed, cs->cpus_allowed);
2200 rcu_read_unlock();
2201
2202 /*
2203 * We own tsk->cpus_allowed, nobody can change it under us.
2204 *
2205 * But we used cs && cs->cpus_allowed lockless and thus can
2206 * race with cgroup_attach_task() or update_cpumask() and get
2207 * the wrong tsk->cpus_allowed. However, both cases imply the
2208 * subsequent cpuset_change_cpumask()->set_cpus_allowed_ptr()
2209 * which takes task_rq_lock().
2210 *
2211 * If we are called after it dropped the lock we must see all
2212 * changes in tsk_cs()->cpus_allowed. Otherwise we can temporary
2213 * set any mask even if it is not right from task_cs() pov,
2214 * the pending set_cpus_allowed_ptr() will fix things.
2215 */
2216
2217 cpu = cpumask_any_and(&tsk->cpus_allowed, cpu_active_mask);
2218 if (cpu >= nr_cpu_ids) {
2219 /*
2220 * Either tsk->cpus_allowed is wrong (see above) or it
2221 * is actually empty. The latter case is only possible
2222 * if we are racing with remove_tasks_in_empty_cpuset().
2223 * Like above we can temporary set any mask and rely on
2224 * set_cpus_allowed_ptr() as synchronization point.
2225 */
2226 cpumask_copy(&tsk->cpus_allowed, cpu_possible_mask);
2227 cpu = cpumask_any(cpu_active_mask);
2228 }
2229
2230 return cpu;
2198} 2231}
2199 2232
2200void cpuset_init_current_mems_allowed(void) 2233void cpuset_init_current_mems_allowed(void)
@@ -2383,22 +2416,6 @@ int __cpuset_node_allowed_hardwall(int node, gfp_t gfp_mask)
2383} 2416}
2384 2417
2385/** 2418/**
2386 * cpuset_lock - lock out any changes to cpuset structures
2387 *
2388 * The out of memory (oom) code needs to mutex_lock cpusets
2389 * from being changed while it scans the tasklist looking for a
2390 * task in an overlapping cpuset. Expose callback_mutex via this
2391 * cpuset_lock() routine, so the oom code can lock it, before
2392 * locking the task list. The tasklist_lock is a spinlock, so
2393 * must be taken inside callback_mutex.
2394 */
2395
2396void cpuset_lock(void)
2397{
2398 mutex_lock(&callback_mutex);
2399}
2400
2401/**
2402 * cpuset_unlock - release lock on cpuset changes 2419 * cpuset_unlock - release lock on cpuset changes
2403 * 2420 *
2404 * Undo the lock taken in a previous cpuset_lock() call. 2421 * Undo the lock taken in a previous cpuset_lock() call.
diff --git a/kernel/cred-internals.h b/kernel/cred-internals.h
deleted file mode 100644
index 2dc4fc2d0bf1..000000000000
--- a/kernel/cred-internals.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* Internal credentials stuff
2 *
3 * Copyright (C) 2008 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * user.c
14 */
15static inline void sched_switch_user(struct task_struct *p)
16{
17#ifdef CONFIG_USER_SCHED
18 sched_move_task(p);
19#endif /* CONFIG_USER_SCHED */
20}
21
diff --git a/kernel/cred.c b/kernel/cred.c
index 62af1816c235..8f3672a58a1e 100644
--- a/kernel/cred.c
+++ b/kernel/cred.c
@@ -17,7 +17,6 @@
17#include <linux/init_task.h> 17#include <linux/init_task.h>
18#include <linux/security.h> 18#include <linux/security.h>
19#include <linux/cn_proc.h> 19#include <linux/cn_proc.h>
20#include "cred-internals.h"
21 20
22#if 0 21#if 0
23#define kdebug(FMT, ...) \ 22#define kdebug(FMT, ...) \
@@ -560,8 +559,6 @@ int commit_creds(struct cred *new)
560 atomic_dec(&old->user->processes); 559 atomic_dec(&old->user->processes);
561 alter_cred_subscribers(old, -2); 560 alter_cred_subscribers(old, -2);
562 561
563 sched_switch_user(task);
564
565 /* send notifications */ 562 /* send notifications */
566 if (new->uid != old->uid || 563 if (new->uid != old->uid ||
567 new->euid != old->euid || 564 new->euid != old->euid ||
diff --git a/kernel/exit.c b/kernel/exit.c
index 7f2683a10ac4..eabca5a73a85 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -55,7 +55,6 @@
55#include <asm/unistd.h> 55#include <asm/unistd.h>
56#include <asm/pgtable.h> 56#include <asm/pgtable.h>
57#include <asm/mmu_context.h> 57#include <asm/mmu_context.h>
58#include "cred-internals.h"
59 58
60static void exit_mm(struct task_struct * tsk); 59static void exit_mm(struct task_struct * tsk);
61 60
diff --git a/kernel/fork.c b/kernel/fork.c
index 4c14942a0ee3..4d57d9e3a6e9 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -1112,8 +1112,6 @@ static struct task_struct *copy_process(unsigned long clone_flags,
1112 p->memcg_batch.memcg = NULL; 1112 p->memcg_batch.memcg = NULL;
1113#endif 1113#endif
1114 1114
1115 p->bts = NULL;
1116
1117 /* Perform scheduler related setup. Assign this task to a CPU. */ 1115 /* Perform scheduler related setup. Assign this task to a CPU. */
1118 sched_fork(p, clone_flags); 1116 sched_fork(p, clone_flags);
1119 1117
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index 0086628b6e97..b9b134b35088 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -1749,35 +1749,15 @@ void __init hrtimers_init(void)
1749} 1749}
1750 1750
1751/** 1751/**
1752 * schedule_hrtimeout_range - sleep until timeout 1752 * schedule_hrtimeout_range_clock - sleep until timeout
1753 * @expires: timeout value (ktime_t) 1753 * @expires: timeout value (ktime_t)
1754 * @delta: slack in expires timeout (ktime_t) 1754 * @delta: slack in expires timeout (ktime_t)
1755 * @mode: timer mode, HRTIMER_MODE_ABS or HRTIMER_MODE_REL 1755 * @mode: timer mode, HRTIMER_MODE_ABS or HRTIMER_MODE_REL
1756 * 1756 * @clock: timer clock, CLOCK_MONOTONIC or CLOCK_REALTIME
1757 * Make the current task sleep until the given expiry time has
1758 * elapsed. The routine will return immediately unless
1759 * the current task state has been set (see set_current_state()).
1760 *
1761 * The @delta argument gives the kernel the freedom to schedule the
1762 * actual wakeup to a time that is both power and performance friendly.
1763 * The kernel give the normal best effort behavior for "@expires+@delta",
1764 * but may decide to fire the timer earlier, but no earlier than @expires.
1765 *
1766 * You can set the task state as follows -
1767 *
1768 * %TASK_UNINTERRUPTIBLE - at least @timeout time is guaranteed to
1769 * pass before the routine returns.
1770 *
1771 * %TASK_INTERRUPTIBLE - the routine may return early if a signal is
1772 * delivered to the current task.
1773 *
1774 * The current task state is guaranteed to be TASK_RUNNING when this
1775 * routine returns.
1776 *
1777 * Returns 0 when the timer has expired otherwise -EINTR
1778 */ 1757 */
1779int __sched schedule_hrtimeout_range(ktime_t *expires, unsigned long delta, 1758int __sched
1780 const enum hrtimer_mode mode) 1759schedule_hrtimeout_range_clock(ktime_t *expires, unsigned long delta,
1760 const enum hrtimer_mode mode, int clock)
1781{ 1761{
1782 struct hrtimer_sleeper t; 1762 struct hrtimer_sleeper t;
1783 1763
@@ -1799,7 +1779,7 @@ int __sched schedule_hrtimeout_range(ktime_t *expires, unsigned long delta,
1799 return -EINTR; 1779 return -EINTR;
1800 } 1780 }
1801 1781
1802 hrtimer_init_on_stack(&t.timer, CLOCK_MONOTONIC, mode); 1782 hrtimer_init_on_stack(&t.timer, clock, mode);
1803 hrtimer_set_expires_range_ns(&t.timer, *expires, delta); 1783 hrtimer_set_expires_range_ns(&t.timer, *expires, delta);
1804 1784
1805 hrtimer_init_sleeper(&t, current); 1785 hrtimer_init_sleeper(&t, current);
@@ -1818,6 +1798,41 @@ int __sched schedule_hrtimeout_range(ktime_t *expires, unsigned long delta,
1818 1798
1819 return !t.task ? 0 : -EINTR; 1799 return !t.task ? 0 : -EINTR;
1820} 1800}
1801
1802/**
1803 * schedule_hrtimeout_range - sleep until timeout
1804 * @expires: timeout value (ktime_t)
1805 * @delta: slack in expires timeout (ktime_t)
1806 * @mode: timer mode, HRTIMER_MODE_ABS or HRTIMER_MODE_REL
1807 *
1808 * Make the current task sleep until the given expiry time has
1809 * elapsed. The routine will return immediately unless
1810 * the current task state has been set (see set_current_state()).
1811 *
1812 * The @delta argument gives the kernel the freedom to schedule the
1813 * actual wakeup to a time that is both power and performance friendly.
1814 * The kernel give the normal best effort behavior for "@expires+@delta",
1815 * but may decide to fire the timer earlier, but no earlier than @expires.
1816 *
1817 * You can set the task state as follows -
1818 *
1819 * %TASK_UNINTERRUPTIBLE - at least @timeout time is guaranteed to
1820 * pass before the routine returns.
1821 *
1822 * %TASK_INTERRUPTIBLE - the routine may return early if a signal is
1823 * delivered to the current task.
1824 *
1825 * The current task state is guaranteed to be TASK_RUNNING when this
1826 * routine returns.
1827 *
1828 * Returns 0 when the timer has expired otherwise -EINTR
1829 */
1830int __sched schedule_hrtimeout_range(ktime_t *expires, unsigned long delta,
1831 const enum hrtimer_mode mode)
1832{
1833 return schedule_hrtimeout_range_clock(expires, delta, mode,
1834 CLOCK_MONOTONIC);
1835}
1821EXPORT_SYMBOL_GPL(schedule_hrtimeout_range); 1836EXPORT_SYMBOL_GPL(schedule_hrtimeout_range);
1822 1837
1823/** 1838/**
diff --git a/kernel/hw_breakpoint.c b/kernel/hw_breakpoint.c
index 03808ed342a6..7a56b22e0602 100644
--- a/kernel/hw_breakpoint.c
+++ b/kernel/hw_breakpoint.c
@@ -40,23 +40,29 @@
40#include <linux/percpu.h> 40#include <linux/percpu.h>
41#include <linux/sched.h> 41#include <linux/sched.h>
42#include <linux/init.h> 42#include <linux/init.h>
43#include <linux/slab.h>
43#include <linux/cpu.h> 44#include <linux/cpu.h>
44#include <linux/smp.h> 45#include <linux/smp.h>
45 46
46#include <linux/hw_breakpoint.h> 47#include <linux/hw_breakpoint.h>
47 48
49
48/* 50/*
49 * Constraints data 51 * Constraints data
50 */ 52 */
51 53
52/* Number of pinned cpu breakpoints in a cpu */ 54/* Number of pinned cpu breakpoints in a cpu */
53static DEFINE_PER_CPU(unsigned int, nr_cpu_bp_pinned); 55static DEFINE_PER_CPU(unsigned int, nr_cpu_bp_pinned[TYPE_MAX]);
54 56
55/* Number of pinned task breakpoints in a cpu */ 57/* Number of pinned task breakpoints in a cpu */
56static DEFINE_PER_CPU(unsigned int, nr_task_bp_pinned[HBP_NUM]); 58static DEFINE_PER_CPU(unsigned int *, nr_task_bp_pinned[TYPE_MAX]);
57 59
58/* Number of non-pinned cpu/task breakpoints in a cpu */ 60/* Number of non-pinned cpu/task breakpoints in a cpu */
59static DEFINE_PER_CPU(unsigned int, nr_bp_flexible); 61static DEFINE_PER_CPU(unsigned int, nr_bp_flexible[TYPE_MAX]);
62
63static int nr_slots[TYPE_MAX];
64
65static int constraints_initialized;
60 66
61/* Gather the number of total pinned and un-pinned bp in a cpuset */ 67/* Gather the number of total pinned and un-pinned bp in a cpuset */
62struct bp_busy_slots { 68struct bp_busy_slots {
@@ -67,16 +73,29 @@ struct bp_busy_slots {
67/* Serialize accesses to the above constraints */ 73/* Serialize accesses to the above constraints */
68static DEFINE_MUTEX(nr_bp_mutex); 74static DEFINE_MUTEX(nr_bp_mutex);
69 75
76__weak int hw_breakpoint_weight(struct perf_event *bp)
77{
78 return 1;
79}
80
81static inline enum bp_type_idx find_slot_idx(struct perf_event *bp)
82{
83 if (bp->attr.bp_type & HW_BREAKPOINT_RW)
84 return TYPE_DATA;
85
86 return TYPE_INST;
87}
88
70/* 89/*
71 * Report the maximum number of pinned breakpoints a task 90 * Report the maximum number of pinned breakpoints a task
72 * have in this cpu 91 * have in this cpu
73 */ 92 */
74static unsigned int max_task_bp_pinned(int cpu) 93static unsigned int max_task_bp_pinned(int cpu, enum bp_type_idx type)
75{ 94{
76 int i; 95 int i;
77 unsigned int *tsk_pinned = per_cpu(nr_task_bp_pinned, cpu); 96 unsigned int *tsk_pinned = per_cpu(nr_task_bp_pinned[type], cpu);
78 97
79 for (i = HBP_NUM -1; i >= 0; i--) { 98 for (i = nr_slots[type] - 1; i >= 0; i--) {
80 if (tsk_pinned[i] > 0) 99 if (tsk_pinned[i] > 0)
81 return i + 1; 100 return i + 1;
82 } 101 }
@@ -84,7 +103,7 @@ static unsigned int max_task_bp_pinned(int cpu)
84 return 0; 103 return 0;
85} 104}
86 105
87static int task_bp_pinned(struct task_struct *tsk) 106static int task_bp_pinned(struct task_struct *tsk, enum bp_type_idx type)
88{ 107{
89 struct perf_event_context *ctx = tsk->perf_event_ctxp; 108 struct perf_event_context *ctx = tsk->perf_event_ctxp;
90 struct list_head *list; 109 struct list_head *list;
@@ -105,7 +124,8 @@ static int task_bp_pinned(struct task_struct *tsk)
105 */ 124 */
106 list_for_each_entry(bp, list, event_entry) { 125 list_for_each_entry(bp, list, event_entry) {
107 if (bp->attr.type == PERF_TYPE_BREAKPOINT) 126 if (bp->attr.type == PERF_TYPE_BREAKPOINT)
108 count++; 127 if (find_slot_idx(bp) == type)
128 count += hw_breakpoint_weight(bp);
109 } 129 }
110 130
111 raw_spin_unlock_irqrestore(&ctx->lock, flags); 131 raw_spin_unlock_irqrestore(&ctx->lock, flags);
@@ -118,18 +138,19 @@ static int task_bp_pinned(struct task_struct *tsk)
118 * a given cpu (cpu > -1) or in all of them (cpu = -1). 138 * a given cpu (cpu > -1) or in all of them (cpu = -1).
119 */ 139 */
120static void 140static void
121fetch_bp_busy_slots(struct bp_busy_slots *slots, struct perf_event *bp) 141fetch_bp_busy_slots(struct bp_busy_slots *slots, struct perf_event *bp,
142 enum bp_type_idx type)
122{ 143{
123 int cpu = bp->cpu; 144 int cpu = bp->cpu;
124 struct task_struct *tsk = bp->ctx->task; 145 struct task_struct *tsk = bp->ctx->task;
125 146
126 if (cpu >= 0) { 147 if (cpu >= 0) {
127 slots->pinned = per_cpu(nr_cpu_bp_pinned, cpu); 148 slots->pinned = per_cpu(nr_cpu_bp_pinned[type], cpu);
128 if (!tsk) 149 if (!tsk)
129 slots->pinned += max_task_bp_pinned(cpu); 150 slots->pinned += max_task_bp_pinned(cpu, type);
130 else 151 else
131 slots->pinned += task_bp_pinned(tsk); 152 slots->pinned += task_bp_pinned(tsk, type);
132 slots->flexible = per_cpu(nr_bp_flexible, cpu); 153 slots->flexible = per_cpu(nr_bp_flexible[type], cpu);
133 154
134 return; 155 return;
135 } 156 }
@@ -137,16 +158,16 @@ fetch_bp_busy_slots(struct bp_busy_slots *slots, struct perf_event *bp)
137 for_each_online_cpu(cpu) { 158 for_each_online_cpu(cpu) {
138 unsigned int nr; 159 unsigned int nr;
139 160
140 nr = per_cpu(nr_cpu_bp_pinned, cpu); 161 nr = per_cpu(nr_cpu_bp_pinned[type], cpu);
141 if (!tsk) 162 if (!tsk)
142 nr += max_task_bp_pinned(cpu); 163 nr += max_task_bp_pinned(cpu, type);
143 else 164 else
144 nr += task_bp_pinned(tsk); 165 nr += task_bp_pinned(tsk, type);
145 166
146 if (nr > slots->pinned) 167 if (nr > slots->pinned)
147 slots->pinned = nr; 168 slots->pinned = nr;
148 169
149 nr = per_cpu(nr_bp_flexible, cpu); 170 nr = per_cpu(nr_bp_flexible[type], cpu);
150 171
151 if (nr > slots->flexible) 172 if (nr > slots->flexible)
152 slots->flexible = nr; 173 slots->flexible = nr;
@@ -154,31 +175,49 @@ fetch_bp_busy_slots(struct bp_busy_slots *slots, struct perf_event *bp)
154} 175}
155 176
156/* 177/*
178 * For now, continue to consider flexible as pinned, until we can
179 * ensure no flexible event can ever be scheduled before a pinned event
180 * in a same cpu.
181 */
182static void
183fetch_this_slot(struct bp_busy_slots *slots, int weight)
184{
185 slots->pinned += weight;
186}
187
188/*
157 * Add a pinned breakpoint for the given task in our constraint table 189 * Add a pinned breakpoint for the given task in our constraint table
158 */ 190 */
159static void toggle_bp_task_slot(struct task_struct *tsk, int cpu, bool enable) 191static void toggle_bp_task_slot(struct task_struct *tsk, int cpu, bool enable,
192 enum bp_type_idx type, int weight)
160{ 193{
161 unsigned int *tsk_pinned; 194 unsigned int *tsk_pinned;
162 int count = 0; 195 int old_count = 0;
196 int old_idx = 0;
197 int idx = 0;
163 198
164 count = task_bp_pinned(tsk); 199 old_count = task_bp_pinned(tsk, type);
200 old_idx = old_count - 1;
201 idx = old_idx + weight;
165 202
166 tsk_pinned = per_cpu(nr_task_bp_pinned, cpu); 203 tsk_pinned = per_cpu(nr_task_bp_pinned[type], cpu);
167 if (enable) { 204 if (enable) {
168 tsk_pinned[count]++; 205 tsk_pinned[idx]++;
169 if (count > 0) 206 if (old_count > 0)
170 tsk_pinned[count-1]--; 207 tsk_pinned[old_idx]--;
171 } else { 208 } else {
172 tsk_pinned[count]--; 209 tsk_pinned[idx]--;
173 if (count > 0) 210 if (old_count > 0)
174 tsk_pinned[count-1]++; 211 tsk_pinned[old_idx]++;
175 } 212 }
176} 213}
177 214
178/* 215/*
179 * Add/remove the given breakpoint in our constraint table 216 * Add/remove the given breakpoint in our constraint table
180 */ 217 */
181static void toggle_bp_slot(struct perf_event *bp, bool enable) 218static void
219toggle_bp_slot(struct perf_event *bp, bool enable, enum bp_type_idx type,
220 int weight)
182{ 221{
183 int cpu = bp->cpu; 222 int cpu = bp->cpu;
184 struct task_struct *tsk = bp->ctx->task; 223 struct task_struct *tsk = bp->ctx->task;
@@ -186,20 +225,20 @@ static void toggle_bp_slot(struct perf_event *bp, bool enable)
186 /* Pinned counter task profiling */ 225 /* Pinned counter task profiling */
187 if (tsk) { 226 if (tsk) {
188 if (cpu >= 0) { 227 if (cpu >= 0) {
189 toggle_bp_task_slot(tsk, cpu, enable); 228 toggle_bp_task_slot(tsk, cpu, enable, type, weight);
190 return; 229 return;
191 } 230 }
192 231
193 for_each_online_cpu(cpu) 232 for_each_online_cpu(cpu)
194 toggle_bp_task_slot(tsk, cpu, enable); 233 toggle_bp_task_slot(tsk, cpu, enable, type, weight);
195 return; 234 return;
196 } 235 }
197 236
198 /* Pinned counter cpu profiling */ 237 /* Pinned counter cpu profiling */
199 if (enable) 238 if (enable)
200 per_cpu(nr_cpu_bp_pinned, bp->cpu)++; 239 per_cpu(nr_cpu_bp_pinned[type], bp->cpu) += weight;
201 else 240 else
202 per_cpu(nr_cpu_bp_pinned, bp->cpu)--; 241 per_cpu(nr_cpu_bp_pinned[type], bp->cpu) -= weight;
203} 242}
204 243
205/* 244/*
@@ -246,14 +285,29 @@ static void toggle_bp_slot(struct perf_event *bp, bool enable)
246static int __reserve_bp_slot(struct perf_event *bp) 285static int __reserve_bp_slot(struct perf_event *bp)
247{ 286{
248 struct bp_busy_slots slots = {0}; 287 struct bp_busy_slots slots = {0};
288 enum bp_type_idx type;
289 int weight;
249 290
250 fetch_bp_busy_slots(&slots, bp); 291 /* We couldn't initialize breakpoint constraints on boot */
292 if (!constraints_initialized)
293 return -ENOMEM;
294
295 /* Basic checks */
296 if (bp->attr.bp_type == HW_BREAKPOINT_EMPTY ||
297 bp->attr.bp_type == HW_BREAKPOINT_INVALID)
298 return -EINVAL;
299
300 type = find_slot_idx(bp);
301 weight = hw_breakpoint_weight(bp);
302
303 fetch_bp_busy_slots(&slots, bp, type);
304 fetch_this_slot(&slots, weight);
251 305
252 /* Flexible counters need to keep at least one slot */ 306 /* Flexible counters need to keep at least one slot */
253 if (slots.pinned + (!!slots.flexible) == HBP_NUM) 307 if (slots.pinned + (!!slots.flexible) > nr_slots[type])
254 return -ENOSPC; 308 return -ENOSPC;
255 309
256 toggle_bp_slot(bp, true); 310 toggle_bp_slot(bp, true, type, weight);
257 311
258 return 0; 312 return 0;
259} 313}
@@ -273,7 +327,12 @@ int reserve_bp_slot(struct perf_event *bp)
273 327
274static void __release_bp_slot(struct perf_event *bp) 328static void __release_bp_slot(struct perf_event *bp)
275{ 329{
276 toggle_bp_slot(bp, false); 330 enum bp_type_idx type;
331 int weight;
332
333 type = find_slot_idx(bp);
334 weight = hw_breakpoint_weight(bp);
335 toggle_bp_slot(bp, false, type, weight);
277} 336}
278 337
279void release_bp_slot(struct perf_event *bp) 338void release_bp_slot(struct perf_event *bp)
@@ -308,6 +367,28 @@ int dbg_release_bp_slot(struct perf_event *bp)
308 return 0; 367 return 0;
309} 368}
310 369
370static int validate_hw_breakpoint(struct perf_event *bp)
371{
372 int ret;
373
374 ret = arch_validate_hwbkpt_settings(bp);
375 if (ret)
376 return ret;
377
378 if (arch_check_bp_in_kernelspace(bp)) {
379 if (bp->attr.exclude_kernel)
380 return -EINVAL;
381 /*
382 * Don't let unprivileged users set a breakpoint in the trap
383 * path to avoid trap recursion attacks.
384 */
385 if (!capable(CAP_SYS_ADMIN))
386 return -EPERM;
387 }
388
389 return 0;
390}
391
311int register_perf_hw_breakpoint(struct perf_event *bp) 392int register_perf_hw_breakpoint(struct perf_event *bp)
312{ 393{
313 int ret; 394 int ret;
@@ -316,17 +397,7 @@ int register_perf_hw_breakpoint(struct perf_event *bp)
316 if (ret) 397 if (ret)
317 return ret; 398 return ret;
318 399
319 /* 400 ret = validate_hw_breakpoint(bp);
320 * Ptrace breakpoints can be temporary perf events only
321 * meant to reserve a slot. In this case, it is created disabled and
322 * we don't want to check the params right now (as we put a null addr)
323 * But perf tools create events as disabled and we want to check
324 * the params for them.
325 * This is a quick hack that will be removed soon, once we remove
326 * the tmp breakpoints from ptrace
327 */
328 if (!bp->attr.disabled || !bp->overflow_handler)
329 ret = arch_validate_hwbkpt_settings(bp, bp->ctx->task);
330 401
331 /* if arch_validate_hwbkpt_settings() fails then release bp slot */ 402 /* if arch_validate_hwbkpt_settings() fails then release bp slot */
332 if (ret) 403 if (ret)
@@ -373,7 +444,7 @@ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *att
373 if (attr->disabled) 444 if (attr->disabled)
374 goto end; 445 goto end;
375 446
376 err = arch_validate_hwbkpt_settings(bp, bp->ctx->task); 447 err = validate_hw_breakpoint(bp);
377 if (!err) 448 if (!err)
378 perf_event_enable(bp); 449 perf_event_enable(bp);
379 450
@@ -480,7 +551,36 @@ static struct notifier_block hw_breakpoint_exceptions_nb = {
480 551
481static int __init init_hw_breakpoint(void) 552static int __init init_hw_breakpoint(void)
482{ 553{
554 unsigned int **task_bp_pinned;
555 int cpu, err_cpu;
556 int i;
557
558 for (i = 0; i < TYPE_MAX; i++)
559 nr_slots[i] = hw_breakpoint_slots(i);
560
561 for_each_possible_cpu(cpu) {
562 for (i = 0; i < TYPE_MAX; i++) {
563 task_bp_pinned = &per_cpu(nr_task_bp_pinned[i], cpu);
564 *task_bp_pinned = kzalloc(sizeof(int) * nr_slots[i],
565 GFP_KERNEL);
566 if (!*task_bp_pinned)
567 goto err_alloc;
568 }
569 }
570
571 constraints_initialized = 1;
572
483 return register_die_notifier(&hw_breakpoint_exceptions_nb); 573 return register_die_notifier(&hw_breakpoint_exceptions_nb);
574
575 err_alloc:
576 for_each_possible_cpu(err_cpu) {
577 if (err_cpu == cpu)
578 break;
579 for (i = 0; i < TYPE_MAX; i++)
580 kfree(per_cpu(nr_task_bp_pinned[i], cpu));
581 }
582
583 return -ENOMEM;
484} 584}
485core_initcall(init_hw_breakpoint); 585core_initcall(init_hw_breakpoint);
486 586
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index 76d5a671bfe1..27e5c6911223 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -370,9 +370,6 @@ irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
370 irqreturn_t ret, retval = IRQ_NONE; 370 irqreturn_t ret, retval = IRQ_NONE;
371 unsigned int status = 0; 371 unsigned int status = 0;
372 372
373 if (!(action->flags & IRQF_DISABLED))
374 local_irq_enable_in_hardirq();
375
376 do { 373 do {
377 trace_irq_handler_entry(irq, action); 374 trace_irq_handler_entry(irq, action);
378 ret = action->handler(irq, action->dev_id); 375 ret = action->handler(irq, action->dev_id);
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 704e488730a5..3164ba7ce151 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -138,6 +138,22 @@ int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask)
138 return 0; 138 return 0;
139} 139}
140 140
141int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
142{
143 struct irq_desc *desc = irq_to_desc(irq);
144 unsigned long flags;
145
146 if (!desc)
147 return -EINVAL;
148
149 raw_spin_lock_irqsave(&desc->lock, flags);
150 desc->affinity_hint = m;
151 raw_spin_unlock_irqrestore(&desc->lock, flags);
152
153 return 0;
154}
155EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
156
141#ifndef CONFIG_AUTO_IRQ_AFFINITY 157#ifndef CONFIG_AUTO_IRQ_AFFINITY
142/* 158/*
143 * Generic version of the affinity autoselector. 159 * Generic version of the affinity autoselector.
@@ -757,16 +773,6 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
757 if (new->flags & IRQF_ONESHOT) 773 if (new->flags & IRQF_ONESHOT)
758 desc->status |= IRQ_ONESHOT; 774 desc->status |= IRQ_ONESHOT;
759 775
760 /*
761 * Force MSI interrupts to run with interrupts
762 * disabled. The multi vector cards can cause stack
763 * overflows due to nested interrupts when enough of
764 * them are directed to a core and fire at the same
765 * time.
766 */
767 if (desc->msi_desc)
768 new->flags |= IRQF_DISABLED;
769
770 if (!(desc->status & IRQ_NOAUTOEN)) { 776 if (!(desc->status & IRQ_NOAUTOEN)) {
771 desc->depth = 0; 777 desc->depth = 0;
772 desc->status &= ~IRQ_DISABLED; 778 desc->status &= ~IRQ_DISABLED;
@@ -916,6 +922,12 @@ static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
916 desc->chip->disable(irq); 922 desc->chip->disable(irq);
917 } 923 }
918 924
925#ifdef CONFIG_SMP
926 /* make sure affinity_hint is cleaned up */
927 if (WARN_ON_ONCE(desc->affinity_hint))
928 desc->affinity_hint = NULL;
929#endif
930
919 raw_spin_unlock_irqrestore(&desc->lock, flags); 931 raw_spin_unlock_irqrestore(&desc->lock, flags);
920 932
921 unregister_handler_proc(irq, action); 933 unregister_handler_proc(irq, action);
@@ -1027,7 +1039,6 @@ EXPORT_SYMBOL(free_irq);
1027 * Flags: 1039 * Flags:
1028 * 1040 *
1029 * IRQF_SHARED Interrupt is shared 1041 * IRQF_SHARED Interrupt is shared
1030 * IRQF_DISABLED Disable local interrupts while processing
1031 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy 1042 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
1032 * IRQF_TRIGGER_* Specify active edge(s) or level 1043 * IRQF_TRIGGER_* Specify active edge(s) or level
1033 * 1044 *
@@ -1041,25 +1052,6 @@ int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1041 int retval; 1052 int retval;
1042 1053
1043 /* 1054 /*
1044 * handle_IRQ_event() always ignores IRQF_DISABLED except for
1045 * the _first_ irqaction (sigh). That can cause oopsing, but
1046 * the behavior is classified as "will not fix" so we need to
1047 * start nudging drivers away from using that idiom.
1048 */
1049 if ((irqflags & (IRQF_SHARED|IRQF_DISABLED)) ==
1050 (IRQF_SHARED|IRQF_DISABLED)) {
1051 pr_warning(
1052 "IRQ %d/%s: IRQF_DISABLED is not guaranteed on shared IRQs\n",
1053 irq, devname);
1054 }
1055
1056#ifdef CONFIG_LOCKDEP
1057 /*
1058 * Lockdep wants atomic interrupt handlers:
1059 */
1060 irqflags |= IRQF_DISABLED;
1061#endif
1062 /*
1063 * Sanity-check: shared interrupts must pass in a real dev-ID, 1055 * Sanity-check: shared interrupts must pass in a real dev-ID,
1064 * otherwise we'll have trouble later trying to figure out 1056 * otherwise we'll have trouble later trying to figure out
1065 * which interrupt is which (messes up the interrupt freeing 1057 * which interrupt is which (messes up the interrupt freeing
@@ -1120,3 +1112,40 @@ int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1120 return retval; 1112 return retval;
1121} 1113}
1122EXPORT_SYMBOL(request_threaded_irq); 1114EXPORT_SYMBOL(request_threaded_irq);
1115
1116/**
1117 * request_any_context_irq - allocate an interrupt line
1118 * @irq: Interrupt line to allocate
1119 * @handler: Function to be called when the IRQ occurs.
1120 * Threaded handler for threaded interrupts.
1121 * @flags: Interrupt type flags
1122 * @name: An ascii name for the claiming device
1123 * @dev_id: A cookie passed back to the handler function
1124 *
1125 * This call allocates interrupt resources and enables the
1126 * interrupt line and IRQ handling. It selects either a
1127 * hardirq or threaded handling method depending on the
1128 * context.
1129 *
1130 * On failure, it returns a negative value. On success,
1131 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1132 */
1133int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1134 unsigned long flags, const char *name, void *dev_id)
1135{
1136 struct irq_desc *desc = irq_to_desc(irq);
1137 int ret;
1138
1139 if (!desc)
1140 return -EINVAL;
1141
1142 if (desc->status & IRQ_NESTED_THREAD) {
1143 ret = request_threaded_irq(irq, NULL, handler,
1144 flags, name, dev_id);
1145 return !ret ? IRQC_IS_NESTED : ret;
1146 }
1147
1148 ret = request_irq(irq, handler, flags, name, dev_id);
1149 return !ret ? IRQC_IS_HARDIRQ : ret;
1150}
1151EXPORT_SYMBOL_GPL(request_any_context_irq);
diff --git a/kernel/irq/proc.c b/kernel/irq/proc.c
index 7a6eb04ef6b5..09a2ee540bd2 100644
--- a/kernel/irq/proc.c
+++ b/kernel/irq/proc.c
@@ -32,6 +32,27 @@ static int irq_affinity_proc_show(struct seq_file *m, void *v)
32 return 0; 32 return 0;
33} 33}
34 34
35static int irq_affinity_hint_proc_show(struct seq_file *m, void *v)
36{
37 struct irq_desc *desc = irq_to_desc((long)m->private);
38 unsigned long flags;
39 cpumask_var_t mask;
40
41 if (!zalloc_cpumask_var(&mask, GFP_KERNEL))
42 return -ENOMEM;
43
44 raw_spin_lock_irqsave(&desc->lock, flags);
45 if (desc->affinity_hint)
46 cpumask_copy(mask, desc->affinity_hint);
47 raw_spin_unlock_irqrestore(&desc->lock, flags);
48
49 seq_cpumask(m, mask);
50 seq_putc(m, '\n');
51 free_cpumask_var(mask);
52
53 return 0;
54}
55
35#ifndef is_affinity_mask_valid 56#ifndef is_affinity_mask_valid
36#define is_affinity_mask_valid(val) 1 57#define is_affinity_mask_valid(val) 1
37#endif 58#endif
@@ -84,6 +105,11 @@ static int irq_affinity_proc_open(struct inode *inode, struct file *file)
84 return single_open(file, irq_affinity_proc_show, PDE(inode)->data); 105 return single_open(file, irq_affinity_proc_show, PDE(inode)->data);
85} 106}
86 107
108static int irq_affinity_hint_proc_open(struct inode *inode, struct file *file)
109{
110 return single_open(file, irq_affinity_hint_proc_show, PDE(inode)->data);
111}
112
87static const struct file_operations irq_affinity_proc_fops = { 113static const struct file_operations irq_affinity_proc_fops = {
88 .open = irq_affinity_proc_open, 114 .open = irq_affinity_proc_open,
89 .read = seq_read, 115 .read = seq_read,
@@ -92,6 +118,13 @@ static const struct file_operations irq_affinity_proc_fops = {
92 .write = irq_affinity_proc_write, 118 .write = irq_affinity_proc_write,
93}; 119};
94 120
121static const struct file_operations irq_affinity_hint_proc_fops = {
122 .open = irq_affinity_hint_proc_open,
123 .read = seq_read,
124 .llseek = seq_lseek,
125 .release = single_release,
126};
127
95static int default_affinity_show(struct seq_file *m, void *v) 128static int default_affinity_show(struct seq_file *m, void *v)
96{ 129{
97 seq_cpumask(m, irq_default_affinity); 130 seq_cpumask(m, irq_default_affinity);
@@ -147,6 +180,26 @@ static const struct file_operations default_affinity_proc_fops = {
147 .release = single_release, 180 .release = single_release,
148 .write = default_affinity_write, 181 .write = default_affinity_write,
149}; 182};
183
184static int irq_node_proc_show(struct seq_file *m, void *v)
185{
186 struct irq_desc *desc = irq_to_desc((long) m->private);
187
188 seq_printf(m, "%d\n", desc->node);
189 return 0;
190}
191
192static int irq_node_proc_open(struct inode *inode, struct file *file)
193{
194 return single_open(file, irq_node_proc_show, PDE(inode)->data);
195}
196
197static const struct file_operations irq_node_proc_fops = {
198 .open = irq_node_proc_open,
199 .read = seq_read,
200 .llseek = seq_lseek,
201 .release = single_release,
202};
150#endif 203#endif
151 204
152static int irq_spurious_proc_show(struct seq_file *m, void *v) 205static int irq_spurious_proc_show(struct seq_file *m, void *v)
@@ -231,6 +284,13 @@ void register_irq_proc(unsigned int irq, struct irq_desc *desc)
231 /* create /proc/irq/<irq>/smp_affinity */ 284 /* create /proc/irq/<irq>/smp_affinity */
232 proc_create_data("smp_affinity", 0600, desc->dir, 285 proc_create_data("smp_affinity", 0600, desc->dir,
233 &irq_affinity_proc_fops, (void *)(long)irq); 286 &irq_affinity_proc_fops, (void *)(long)irq);
287
288 /* create /proc/irq/<irq>/affinity_hint */
289 proc_create_data("affinity_hint", 0400, desc->dir,
290 &irq_affinity_hint_proc_fops, (void *)(long)irq);
291
292 proc_create_data("node", 0444, desc->dir,
293 &irq_node_proc_fops, (void *)(long)irq);
234#endif 294#endif
235 295
236 proc_create_data("spurious", 0444, desc->dir, 296 proc_create_data("spurious", 0444, desc->dir,
diff --git a/kernel/kprobes.c b/kernel/kprobes.c
index 0ed46f3e51e9..282035f3ae96 100644
--- a/kernel/kprobes.c
+++ b/kernel/kprobes.c
@@ -1588,6 +1588,72 @@ static void __kprobes kill_kprobe(struct kprobe *p)
1588 arch_remove_kprobe(p); 1588 arch_remove_kprobe(p);
1589} 1589}
1590 1590
1591/* Disable one kprobe */
1592int __kprobes disable_kprobe(struct kprobe *kp)
1593{
1594 int ret = 0;
1595 struct kprobe *p;
1596
1597 mutex_lock(&kprobe_mutex);
1598
1599 /* Check whether specified probe is valid. */
1600 p = __get_valid_kprobe(kp);
1601 if (unlikely(p == NULL)) {
1602 ret = -EINVAL;
1603 goto out;
1604 }
1605
1606 /* If the probe is already disabled (or gone), just return */
1607 if (kprobe_disabled(kp))
1608 goto out;
1609
1610 kp->flags |= KPROBE_FLAG_DISABLED;
1611 if (p != kp)
1612 /* When kp != p, p is always enabled. */
1613 try_to_disable_aggr_kprobe(p);
1614
1615 if (!kprobes_all_disarmed && kprobe_disabled(p))
1616 disarm_kprobe(p);
1617out:
1618 mutex_unlock(&kprobe_mutex);
1619 return ret;
1620}
1621EXPORT_SYMBOL_GPL(disable_kprobe);
1622
1623/* Enable one kprobe */
1624int __kprobes enable_kprobe(struct kprobe *kp)
1625{
1626 int ret = 0;
1627 struct kprobe *p;
1628
1629 mutex_lock(&kprobe_mutex);
1630
1631 /* Check whether specified probe is valid. */
1632 p = __get_valid_kprobe(kp);
1633 if (unlikely(p == NULL)) {
1634 ret = -EINVAL;
1635 goto out;
1636 }
1637
1638 if (kprobe_gone(kp)) {
1639 /* This kprobe has gone, we couldn't enable it. */
1640 ret = -EINVAL;
1641 goto out;
1642 }
1643
1644 if (p != kp)
1645 kp->flags &= ~KPROBE_FLAG_DISABLED;
1646
1647 if (!kprobes_all_disarmed && kprobe_disabled(p)) {
1648 p->flags &= ~KPROBE_FLAG_DISABLED;
1649 arm_kprobe(p);
1650 }
1651out:
1652 mutex_unlock(&kprobe_mutex);
1653 return ret;
1654}
1655EXPORT_SYMBOL_GPL(enable_kprobe);
1656
1591void __kprobes dump_kprobe(struct kprobe *kp) 1657void __kprobes dump_kprobe(struct kprobe *kp)
1592{ 1658{
1593 printk(KERN_WARNING "Dumping kprobe:\n"); 1659 printk(KERN_WARNING "Dumping kprobe:\n");
@@ -1805,72 +1871,6 @@ static const struct file_operations debugfs_kprobes_operations = {
1805 .release = seq_release, 1871 .release = seq_release,
1806}; 1872};
1807 1873
1808/* Disable one kprobe */
1809int __kprobes disable_kprobe(struct kprobe *kp)
1810{
1811 int ret = 0;
1812 struct kprobe *p;
1813
1814 mutex_lock(&kprobe_mutex);
1815
1816 /* Check whether specified probe is valid. */
1817 p = __get_valid_kprobe(kp);
1818 if (unlikely(p == NULL)) {
1819 ret = -EINVAL;
1820 goto out;
1821 }
1822
1823 /* If the probe is already disabled (or gone), just return */
1824 if (kprobe_disabled(kp))
1825 goto out;
1826
1827 kp->flags |= KPROBE_FLAG_DISABLED;
1828 if (p != kp)
1829 /* When kp != p, p is always enabled. */
1830 try_to_disable_aggr_kprobe(p);
1831
1832 if (!kprobes_all_disarmed && kprobe_disabled(p))
1833 disarm_kprobe(p);
1834out:
1835 mutex_unlock(&kprobe_mutex);
1836 return ret;
1837}
1838EXPORT_SYMBOL_GPL(disable_kprobe);
1839
1840/* Enable one kprobe */
1841int __kprobes enable_kprobe(struct kprobe *kp)
1842{
1843 int ret = 0;
1844 struct kprobe *p;
1845
1846 mutex_lock(&kprobe_mutex);
1847
1848 /* Check whether specified probe is valid. */
1849 p = __get_valid_kprobe(kp);
1850 if (unlikely(p == NULL)) {
1851 ret = -EINVAL;
1852 goto out;
1853 }
1854
1855 if (kprobe_gone(kp)) {
1856 /* This kprobe has gone, we couldn't enable it. */
1857 ret = -EINVAL;
1858 goto out;
1859 }
1860
1861 if (p != kp)
1862 kp->flags &= ~KPROBE_FLAG_DISABLED;
1863
1864 if (!kprobes_all_disarmed && kprobe_disabled(p)) {
1865 p->flags &= ~KPROBE_FLAG_DISABLED;
1866 arm_kprobe(p);
1867 }
1868out:
1869 mutex_unlock(&kprobe_mutex);
1870 return ret;
1871}
1872EXPORT_SYMBOL_GPL(enable_kprobe);
1873
1874static void __kprobes arm_all_kprobes(void) 1874static void __kprobes arm_all_kprobes(void)
1875{ 1875{
1876 struct hlist_head *head; 1876 struct hlist_head *head;
diff --git a/kernel/lockdep.c b/kernel/lockdep.c
index 2594e1ce41cb..ec21304856d1 100644
--- a/kernel/lockdep.c
+++ b/kernel/lockdep.c
@@ -431,20 +431,7 @@ static struct stack_trace lockdep_init_trace = {
431/* 431/*
432 * Various lockdep statistics: 432 * Various lockdep statistics:
433 */ 433 */
434atomic_t chain_lookup_hits; 434DEFINE_PER_CPU(struct lockdep_stats, lockdep_stats);
435atomic_t chain_lookup_misses;
436atomic_t hardirqs_on_events;
437atomic_t hardirqs_off_events;
438atomic_t redundant_hardirqs_on;
439atomic_t redundant_hardirqs_off;
440atomic_t softirqs_on_events;
441atomic_t softirqs_off_events;
442atomic_t redundant_softirqs_on;
443atomic_t redundant_softirqs_off;
444atomic_t nr_unused_locks;
445atomic_t nr_cyclic_checks;
446atomic_t nr_find_usage_forwards_checks;
447atomic_t nr_find_usage_backwards_checks;
448#endif 435#endif
449 436
450/* 437/*
@@ -748,7 +735,7 @@ register_lock_class(struct lockdep_map *lock, unsigned int subclass, int force)
748 return NULL; 735 return NULL;
749 } 736 }
750 class = lock_classes + nr_lock_classes++; 737 class = lock_classes + nr_lock_classes++;
751 debug_atomic_inc(&nr_unused_locks); 738 debug_atomic_inc(nr_unused_locks);
752 class->key = key; 739 class->key = key;
753 class->name = lock->name; 740 class->name = lock->name;
754 class->subclass = subclass; 741 class->subclass = subclass;
@@ -818,7 +805,8 @@ static struct lock_list *alloc_list_entry(void)
818 * Add a new dependency to the head of the list: 805 * Add a new dependency to the head of the list:
819 */ 806 */
820static int add_lock_to_list(struct lock_class *class, struct lock_class *this, 807static int add_lock_to_list(struct lock_class *class, struct lock_class *this,
821 struct list_head *head, unsigned long ip, int distance) 808 struct list_head *head, unsigned long ip,
809 int distance, struct stack_trace *trace)
822{ 810{
823 struct lock_list *entry; 811 struct lock_list *entry;
824 /* 812 /*
@@ -829,11 +817,9 @@ static int add_lock_to_list(struct lock_class *class, struct lock_class *this,
829 if (!entry) 817 if (!entry)
830 return 0; 818 return 0;
831 819
832 if (!save_trace(&entry->trace))
833 return 0;
834
835 entry->class = this; 820 entry->class = this;
836 entry->distance = distance; 821 entry->distance = distance;
822 entry->trace = *trace;
837 /* 823 /*
838 * Since we never remove from the dependency list, the list can 824 * Since we never remove from the dependency list, the list can
839 * be walked lockless by other CPUs, it's only allocation 825 * be walked lockless by other CPUs, it's only allocation
@@ -1205,7 +1191,7 @@ check_noncircular(struct lock_list *root, struct lock_class *target,
1205{ 1191{
1206 int result; 1192 int result;
1207 1193
1208 debug_atomic_inc(&nr_cyclic_checks); 1194 debug_atomic_inc(nr_cyclic_checks);
1209 1195
1210 result = __bfs_forwards(root, target, class_equal, target_entry); 1196 result = __bfs_forwards(root, target, class_equal, target_entry);
1211 1197
@@ -1242,7 +1228,7 @@ find_usage_forwards(struct lock_list *root, enum lock_usage_bit bit,
1242{ 1228{
1243 int result; 1229 int result;
1244 1230
1245 debug_atomic_inc(&nr_find_usage_forwards_checks); 1231 debug_atomic_inc(nr_find_usage_forwards_checks);
1246 1232
1247 result = __bfs_forwards(root, (void *)bit, usage_match, target_entry); 1233 result = __bfs_forwards(root, (void *)bit, usage_match, target_entry);
1248 1234
@@ -1265,7 +1251,7 @@ find_usage_backwards(struct lock_list *root, enum lock_usage_bit bit,
1265{ 1251{
1266 int result; 1252 int result;
1267 1253
1268 debug_atomic_inc(&nr_find_usage_backwards_checks); 1254 debug_atomic_inc(nr_find_usage_backwards_checks);
1269 1255
1270 result = __bfs_backwards(root, (void *)bit, usage_match, target_entry); 1256 result = __bfs_backwards(root, (void *)bit, usage_match, target_entry);
1271 1257
@@ -1635,12 +1621,20 @@ check_deadlock(struct task_struct *curr, struct held_lock *next,
1635 */ 1621 */
1636static int 1622static int
1637check_prev_add(struct task_struct *curr, struct held_lock *prev, 1623check_prev_add(struct task_struct *curr, struct held_lock *prev,
1638 struct held_lock *next, int distance) 1624 struct held_lock *next, int distance, int trylock_loop)
1639{ 1625{
1640 struct lock_list *entry; 1626 struct lock_list *entry;
1641 int ret; 1627 int ret;
1642 struct lock_list this; 1628 struct lock_list this;
1643 struct lock_list *uninitialized_var(target_entry); 1629 struct lock_list *uninitialized_var(target_entry);
1630 /*
1631 * Static variable, serialized by the graph_lock().
1632 *
1633 * We use this static variable to save the stack trace in case
1634 * we call into this function multiple times due to encountering
1635 * trylocks in the held lock stack.
1636 */
1637 static struct stack_trace trace;
1644 1638
1645 /* 1639 /*
1646 * Prove that the new <prev> -> <next> dependency would not 1640 * Prove that the new <prev> -> <next> dependency would not
@@ -1688,20 +1682,23 @@ check_prev_add(struct task_struct *curr, struct held_lock *prev,
1688 } 1682 }
1689 } 1683 }
1690 1684
1685 if (!trylock_loop && !save_trace(&trace))
1686 return 0;
1687
1691 /* 1688 /*
1692 * Ok, all validations passed, add the new lock 1689 * Ok, all validations passed, add the new lock
1693 * to the previous lock's dependency list: 1690 * to the previous lock's dependency list:
1694 */ 1691 */
1695 ret = add_lock_to_list(hlock_class(prev), hlock_class(next), 1692 ret = add_lock_to_list(hlock_class(prev), hlock_class(next),
1696 &hlock_class(prev)->locks_after, 1693 &hlock_class(prev)->locks_after,
1697 next->acquire_ip, distance); 1694 next->acquire_ip, distance, &trace);
1698 1695
1699 if (!ret) 1696 if (!ret)
1700 return 0; 1697 return 0;
1701 1698
1702 ret = add_lock_to_list(hlock_class(next), hlock_class(prev), 1699 ret = add_lock_to_list(hlock_class(next), hlock_class(prev),
1703 &hlock_class(next)->locks_before, 1700 &hlock_class(next)->locks_before,
1704 next->acquire_ip, distance); 1701 next->acquire_ip, distance, &trace);
1705 if (!ret) 1702 if (!ret)
1706 return 0; 1703 return 0;
1707 1704
@@ -1731,6 +1728,7 @@ static int
1731check_prevs_add(struct task_struct *curr, struct held_lock *next) 1728check_prevs_add(struct task_struct *curr, struct held_lock *next)
1732{ 1729{
1733 int depth = curr->lockdep_depth; 1730 int depth = curr->lockdep_depth;
1731 int trylock_loop = 0;
1734 struct held_lock *hlock; 1732 struct held_lock *hlock;
1735 1733
1736 /* 1734 /*
@@ -1756,7 +1754,8 @@ check_prevs_add(struct task_struct *curr, struct held_lock *next)
1756 * added: 1754 * added:
1757 */ 1755 */
1758 if (hlock->read != 2) { 1756 if (hlock->read != 2) {
1759 if (!check_prev_add(curr, hlock, next, distance)) 1757 if (!check_prev_add(curr, hlock, next,
1758 distance, trylock_loop))
1760 return 0; 1759 return 0;
1761 /* 1760 /*
1762 * Stop after the first non-trylock entry, 1761 * Stop after the first non-trylock entry,
@@ -1779,6 +1778,7 @@ check_prevs_add(struct task_struct *curr, struct held_lock *next)
1779 if (curr->held_locks[depth].irq_context != 1778 if (curr->held_locks[depth].irq_context !=
1780 curr->held_locks[depth-1].irq_context) 1779 curr->held_locks[depth-1].irq_context)
1781 break; 1780 break;
1781 trylock_loop = 1;
1782 } 1782 }
1783 return 1; 1783 return 1;
1784out_bug: 1784out_bug:
@@ -1825,7 +1825,7 @@ static inline int lookup_chain_cache(struct task_struct *curr,
1825 list_for_each_entry(chain, hash_head, entry) { 1825 list_for_each_entry(chain, hash_head, entry) {
1826 if (chain->chain_key == chain_key) { 1826 if (chain->chain_key == chain_key) {
1827cache_hit: 1827cache_hit:
1828 debug_atomic_inc(&chain_lookup_hits); 1828 debug_atomic_inc(chain_lookup_hits);
1829 if (very_verbose(class)) 1829 if (very_verbose(class))
1830 printk("\nhash chain already cached, key: " 1830 printk("\nhash chain already cached, key: "
1831 "%016Lx tail class: [%p] %s\n", 1831 "%016Lx tail class: [%p] %s\n",
@@ -1890,7 +1890,7 @@ cache_hit:
1890 chain_hlocks[chain->base + j] = class - lock_classes; 1890 chain_hlocks[chain->base + j] = class - lock_classes;
1891 } 1891 }
1892 list_add_tail_rcu(&chain->entry, hash_head); 1892 list_add_tail_rcu(&chain->entry, hash_head);
1893 debug_atomic_inc(&chain_lookup_misses); 1893 debug_atomic_inc(chain_lookup_misses);
1894 inc_chains(); 1894 inc_chains();
1895 1895
1896 return 1; 1896 return 1;
@@ -2311,7 +2311,12 @@ void trace_hardirqs_on_caller(unsigned long ip)
2311 return; 2311 return;
2312 2312
2313 if (unlikely(curr->hardirqs_enabled)) { 2313 if (unlikely(curr->hardirqs_enabled)) {
2314 debug_atomic_inc(&redundant_hardirqs_on); 2314 /*
2315 * Neither irq nor preemption are disabled here
2316 * so this is racy by nature but loosing one hit
2317 * in a stat is not a big deal.
2318 */
2319 __debug_atomic_inc(redundant_hardirqs_on);
2315 return; 2320 return;
2316 } 2321 }
2317 /* we'll do an OFF -> ON transition: */ 2322 /* we'll do an OFF -> ON transition: */
@@ -2338,7 +2343,7 @@ void trace_hardirqs_on_caller(unsigned long ip)
2338 2343
2339 curr->hardirq_enable_ip = ip; 2344 curr->hardirq_enable_ip = ip;
2340 curr->hardirq_enable_event = ++curr->irq_events; 2345 curr->hardirq_enable_event = ++curr->irq_events;
2341 debug_atomic_inc(&hardirqs_on_events); 2346 debug_atomic_inc(hardirqs_on_events);
2342} 2347}
2343EXPORT_SYMBOL(trace_hardirqs_on_caller); 2348EXPORT_SYMBOL(trace_hardirqs_on_caller);
2344 2349
@@ -2370,9 +2375,9 @@ void trace_hardirqs_off_caller(unsigned long ip)
2370 curr->hardirqs_enabled = 0; 2375 curr->hardirqs_enabled = 0;
2371 curr->hardirq_disable_ip = ip; 2376 curr->hardirq_disable_ip = ip;
2372 curr->hardirq_disable_event = ++curr->irq_events; 2377 curr->hardirq_disable_event = ++curr->irq_events;
2373 debug_atomic_inc(&hardirqs_off_events); 2378 debug_atomic_inc(hardirqs_off_events);
2374 } else 2379 } else
2375 debug_atomic_inc(&redundant_hardirqs_off); 2380 debug_atomic_inc(redundant_hardirqs_off);
2376} 2381}
2377EXPORT_SYMBOL(trace_hardirqs_off_caller); 2382EXPORT_SYMBOL(trace_hardirqs_off_caller);
2378 2383
@@ -2396,7 +2401,7 @@ void trace_softirqs_on(unsigned long ip)
2396 return; 2401 return;
2397 2402
2398 if (curr->softirqs_enabled) { 2403 if (curr->softirqs_enabled) {
2399 debug_atomic_inc(&redundant_softirqs_on); 2404 debug_atomic_inc(redundant_softirqs_on);
2400 return; 2405 return;
2401 } 2406 }
2402 2407
@@ -2406,7 +2411,7 @@ void trace_softirqs_on(unsigned long ip)
2406 curr->softirqs_enabled = 1; 2411 curr->softirqs_enabled = 1;
2407 curr->softirq_enable_ip = ip; 2412 curr->softirq_enable_ip = ip;
2408 curr->softirq_enable_event = ++curr->irq_events; 2413 curr->softirq_enable_event = ++curr->irq_events;
2409 debug_atomic_inc(&softirqs_on_events); 2414 debug_atomic_inc(softirqs_on_events);
2410 /* 2415 /*
2411 * We are going to turn softirqs on, so set the 2416 * We are going to turn softirqs on, so set the
2412 * usage bit for all held locks, if hardirqs are 2417 * usage bit for all held locks, if hardirqs are
@@ -2436,10 +2441,10 @@ void trace_softirqs_off(unsigned long ip)
2436 curr->softirqs_enabled = 0; 2441 curr->softirqs_enabled = 0;
2437 curr->softirq_disable_ip = ip; 2442 curr->softirq_disable_ip = ip;
2438 curr->softirq_disable_event = ++curr->irq_events; 2443 curr->softirq_disable_event = ++curr->irq_events;
2439 debug_atomic_inc(&softirqs_off_events); 2444 debug_atomic_inc(softirqs_off_events);
2440 DEBUG_LOCKS_WARN_ON(!softirq_count()); 2445 DEBUG_LOCKS_WARN_ON(!softirq_count());
2441 } else 2446 } else
2442 debug_atomic_inc(&redundant_softirqs_off); 2447 debug_atomic_inc(redundant_softirqs_off);
2443} 2448}
2444 2449
2445static void __lockdep_trace_alloc(gfp_t gfp_mask, unsigned long flags) 2450static void __lockdep_trace_alloc(gfp_t gfp_mask, unsigned long flags)
@@ -2644,7 +2649,7 @@ static int mark_lock(struct task_struct *curr, struct held_lock *this,
2644 return 0; 2649 return 0;
2645 break; 2650 break;
2646 case LOCK_USED: 2651 case LOCK_USED:
2647 debug_atomic_dec(&nr_unused_locks); 2652 debug_atomic_dec(nr_unused_locks);
2648 break; 2653 break;
2649 default: 2654 default:
2650 if (!debug_locks_off_graph_unlock()) 2655 if (!debug_locks_off_graph_unlock())
@@ -2750,7 +2755,7 @@ static int __lock_acquire(struct lockdep_map *lock, unsigned int subclass,
2750 if (!class) 2755 if (!class)
2751 return 0; 2756 return 0;
2752 } 2757 }
2753 debug_atomic_inc((atomic_t *)&class->ops); 2758 atomic_inc((atomic_t *)&class->ops);
2754 if (very_verbose(class)) { 2759 if (very_verbose(class)) {
2755 printk("\nacquire class [%p] %s", class->key, class->name); 2760 printk("\nacquire class [%p] %s", class->key, class->name);
2756 if (class->name_version > 1) 2761 if (class->name_version > 1)
@@ -3227,7 +3232,7 @@ void lock_release(struct lockdep_map *lock, int nested,
3227 raw_local_irq_save(flags); 3232 raw_local_irq_save(flags);
3228 check_flags(flags); 3233 check_flags(flags);
3229 current->lockdep_recursion = 1; 3234 current->lockdep_recursion = 1;
3230 trace_lock_release(lock, nested, ip); 3235 trace_lock_release(lock, ip);
3231 __lock_release(lock, nested, ip); 3236 __lock_release(lock, nested, ip);
3232 current->lockdep_recursion = 0; 3237 current->lockdep_recursion = 0;
3233 raw_local_irq_restore(flags); 3238 raw_local_irq_restore(flags);
@@ -3380,7 +3385,7 @@ found_it:
3380 hlock->holdtime_stamp = now; 3385 hlock->holdtime_stamp = now;
3381 } 3386 }
3382 3387
3383 trace_lock_acquired(lock, ip, waittime); 3388 trace_lock_acquired(lock, ip);
3384 3389
3385 stats = get_lock_stats(hlock_class(hlock)); 3390 stats = get_lock_stats(hlock_class(hlock));
3386 if (waittime) { 3391 if (waittime) {
@@ -3801,8 +3806,11 @@ void lockdep_rcu_dereference(const char *file, const int line)
3801{ 3806{
3802 struct task_struct *curr = current; 3807 struct task_struct *curr = current;
3803 3808
3809#ifndef CONFIG_PROVE_RCU_REPEATEDLY
3804 if (!debug_locks_off()) 3810 if (!debug_locks_off())
3805 return; 3811 return;
3812#endif /* #ifdef CONFIG_PROVE_RCU_REPEATEDLY */
3813 /* Note: the following can be executed concurrently, so be careful. */
3806 printk("\n===================================================\n"); 3814 printk("\n===================================================\n");
3807 printk( "[ INFO: suspicious rcu_dereference_check() usage. ]\n"); 3815 printk( "[ INFO: suspicious rcu_dereference_check() usage. ]\n");
3808 printk( "---------------------------------------------------\n"); 3816 printk( "---------------------------------------------------\n");
diff --git a/kernel/lockdep_internals.h b/kernel/lockdep_internals.h
index a2ee95ad1313..4f560cfedc8f 100644
--- a/kernel/lockdep_internals.h
+++ b/kernel/lockdep_internals.h
@@ -110,30 +110,60 @@ lockdep_count_backward_deps(struct lock_class *class)
110#endif 110#endif
111 111
112#ifdef CONFIG_DEBUG_LOCKDEP 112#ifdef CONFIG_DEBUG_LOCKDEP
113
114#include <asm/local.h>
113/* 115/*
114 * Various lockdep statistics: 116 * Various lockdep statistics.
117 * We want them per cpu as they are often accessed in fast path
118 * and we want to avoid too much cache bouncing.
115 */ 119 */
116extern atomic_t chain_lookup_hits; 120struct lockdep_stats {
117extern atomic_t chain_lookup_misses; 121 int chain_lookup_hits;
118extern atomic_t hardirqs_on_events; 122 int chain_lookup_misses;
119extern atomic_t hardirqs_off_events; 123 int hardirqs_on_events;
120extern atomic_t redundant_hardirqs_on; 124 int hardirqs_off_events;
121extern atomic_t redundant_hardirqs_off; 125 int redundant_hardirqs_on;
122extern atomic_t softirqs_on_events; 126 int redundant_hardirqs_off;
123extern atomic_t softirqs_off_events; 127 int softirqs_on_events;
124extern atomic_t redundant_softirqs_on; 128 int softirqs_off_events;
125extern atomic_t redundant_softirqs_off; 129 int redundant_softirqs_on;
126extern atomic_t nr_unused_locks; 130 int redundant_softirqs_off;
127extern atomic_t nr_cyclic_checks; 131 int nr_unused_locks;
128extern atomic_t nr_cyclic_check_recursions; 132 int nr_cyclic_checks;
129extern atomic_t nr_find_usage_forwards_checks; 133 int nr_cyclic_check_recursions;
130extern atomic_t nr_find_usage_forwards_recursions; 134 int nr_find_usage_forwards_checks;
131extern atomic_t nr_find_usage_backwards_checks; 135 int nr_find_usage_forwards_recursions;
132extern atomic_t nr_find_usage_backwards_recursions; 136 int nr_find_usage_backwards_checks;
133# define debug_atomic_inc(ptr) atomic_inc(ptr) 137 int nr_find_usage_backwards_recursions;
134# define debug_atomic_dec(ptr) atomic_dec(ptr) 138};
135# define debug_atomic_read(ptr) atomic_read(ptr) 139
140DECLARE_PER_CPU(struct lockdep_stats, lockdep_stats);
141
142#define __debug_atomic_inc(ptr) \
143 this_cpu_inc(lockdep_stats.ptr);
144
145#define debug_atomic_inc(ptr) { \
146 WARN_ON_ONCE(!irqs_disabled()); \
147 __this_cpu_inc(lockdep_stats.ptr); \
148}
149
150#define debug_atomic_dec(ptr) { \
151 WARN_ON_ONCE(!irqs_disabled()); \
152 __this_cpu_dec(lockdep_stats.ptr); \
153}
154
155#define debug_atomic_read(ptr) ({ \
156 struct lockdep_stats *__cpu_lockdep_stats; \
157 unsigned long long __total = 0; \
158 int __cpu; \
159 for_each_possible_cpu(__cpu) { \
160 __cpu_lockdep_stats = &per_cpu(lockdep_stats, __cpu); \
161 __total += __cpu_lockdep_stats->ptr; \
162 } \
163 __total; \
164})
136#else 165#else
166# define __debug_atomic_inc(ptr) do { } while (0)
137# define debug_atomic_inc(ptr) do { } while (0) 167# define debug_atomic_inc(ptr) do { } while (0)
138# define debug_atomic_dec(ptr) do { } while (0) 168# define debug_atomic_dec(ptr) do { } while (0)
139# define debug_atomic_read(ptr) 0 169# define debug_atomic_read(ptr) 0
diff --git a/kernel/lockdep_proc.c b/kernel/lockdep_proc.c
index d4aba4f3584c..59b76c8ce9d7 100644
--- a/kernel/lockdep_proc.c
+++ b/kernel/lockdep_proc.c
@@ -184,34 +184,34 @@ static const struct file_operations proc_lockdep_chains_operations = {
184static void lockdep_stats_debug_show(struct seq_file *m) 184static void lockdep_stats_debug_show(struct seq_file *m)
185{ 185{
186#ifdef CONFIG_DEBUG_LOCKDEP 186#ifdef CONFIG_DEBUG_LOCKDEP
187 unsigned int hi1 = debug_atomic_read(&hardirqs_on_events), 187 unsigned long long hi1 = debug_atomic_read(hardirqs_on_events),
188 hi2 = debug_atomic_read(&hardirqs_off_events), 188 hi2 = debug_atomic_read(hardirqs_off_events),
189 hr1 = debug_atomic_read(&redundant_hardirqs_on), 189 hr1 = debug_atomic_read(redundant_hardirqs_on),
190 hr2 = debug_atomic_read(&redundant_hardirqs_off), 190 hr2 = debug_atomic_read(redundant_hardirqs_off),
191 si1 = debug_atomic_read(&softirqs_on_events), 191 si1 = debug_atomic_read(softirqs_on_events),
192 si2 = debug_atomic_read(&softirqs_off_events), 192 si2 = debug_atomic_read(softirqs_off_events),
193 sr1 = debug_atomic_read(&redundant_softirqs_on), 193 sr1 = debug_atomic_read(redundant_softirqs_on),
194 sr2 = debug_atomic_read(&redundant_softirqs_off); 194 sr2 = debug_atomic_read(redundant_softirqs_off);
195 195
196 seq_printf(m, " chain lookup misses: %11u\n", 196 seq_printf(m, " chain lookup misses: %11llu\n",
197 debug_atomic_read(&chain_lookup_misses)); 197 debug_atomic_read(chain_lookup_misses));
198 seq_printf(m, " chain lookup hits: %11u\n", 198 seq_printf(m, " chain lookup hits: %11llu\n",
199 debug_atomic_read(&chain_lookup_hits)); 199 debug_atomic_read(chain_lookup_hits));
200 seq_printf(m, " cyclic checks: %11u\n", 200 seq_printf(m, " cyclic checks: %11llu\n",
201 debug_atomic_read(&nr_cyclic_checks)); 201 debug_atomic_read(nr_cyclic_checks));
202 seq_printf(m, " find-mask forwards checks: %11u\n", 202 seq_printf(m, " find-mask forwards checks: %11llu\n",
203 debug_atomic_read(&nr_find_usage_forwards_checks)); 203 debug_atomic_read(nr_find_usage_forwards_checks));
204 seq_printf(m, " find-mask backwards checks: %11u\n", 204 seq_printf(m, " find-mask backwards checks: %11llu\n",
205 debug_atomic_read(&nr_find_usage_backwards_checks)); 205 debug_atomic_read(nr_find_usage_backwards_checks));
206 206
207 seq_printf(m, " hardirq on events: %11u\n", hi1); 207 seq_printf(m, " hardirq on events: %11llu\n", hi1);
208 seq_printf(m, " hardirq off events: %11u\n", hi2); 208 seq_printf(m, " hardirq off events: %11llu\n", hi2);
209 seq_printf(m, " redundant hardirq ons: %11u\n", hr1); 209 seq_printf(m, " redundant hardirq ons: %11llu\n", hr1);
210 seq_printf(m, " redundant hardirq offs: %11u\n", hr2); 210 seq_printf(m, " redundant hardirq offs: %11llu\n", hr2);
211 seq_printf(m, " softirq on events: %11u\n", si1); 211 seq_printf(m, " softirq on events: %11llu\n", si1);
212 seq_printf(m, " softirq off events: %11u\n", si2); 212 seq_printf(m, " softirq off events: %11llu\n", si2);
213 seq_printf(m, " redundant softirq ons: %11u\n", sr1); 213 seq_printf(m, " redundant softirq ons: %11llu\n", sr1);
214 seq_printf(m, " redundant softirq offs: %11u\n", sr2); 214 seq_printf(m, " redundant softirq offs: %11llu\n", sr2);
215#endif 215#endif
216} 216}
217 217
@@ -263,7 +263,7 @@ static int lockdep_stats_show(struct seq_file *m, void *v)
263#endif 263#endif
264 } 264 }
265#ifdef CONFIG_DEBUG_LOCKDEP 265#ifdef CONFIG_DEBUG_LOCKDEP
266 DEBUG_LOCKS_WARN_ON(debug_atomic_read(&nr_unused_locks) != nr_unused); 266 DEBUG_LOCKS_WARN_ON(debug_atomic_read(nr_unused_locks) != nr_unused);
267#endif 267#endif
268 seq_printf(m, " lock-classes: %11lu [max: %lu]\n", 268 seq_printf(m, " lock-classes: %11lu [max: %lu]\n",
269 nr_lock_classes, MAX_LOCKDEP_KEYS); 269 nr_lock_classes, MAX_LOCKDEP_KEYS);
diff --git a/kernel/module.c b/kernel/module.c
index 1016b75b026a..e2564580f3f1 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -59,8 +59,6 @@
59#define CREATE_TRACE_POINTS 59#define CREATE_TRACE_POINTS
60#include <trace/events/module.h> 60#include <trace/events/module.h>
61 61
62EXPORT_TRACEPOINT_SYMBOL(module_get);
63
64#if 0 62#if 0
65#define DEBUGP printk 63#define DEBUGP printk
66#else 64#else
@@ -515,6 +513,9 @@ MODINFO_ATTR(srcversion);
515static char last_unloaded_module[MODULE_NAME_LEN+1]; 513static char last_unloaded_module[MODULE_NAME_LEN+1];
516 514
517#ifdef CONFIG_MODULE_UNLOAD 515#ifdef CONFIG_MODULE_UNLOAD
516
517EXPORT_TRACEPOINT_SYMBOL(module_get);
518
518/* Init the unload section of the module. */ 519/* Init the unload section of the module. */
519static void module_unload_init(struct module *mod) 520static void module_unload_init(struct module *mod)
520{ 521{
@@ -723,16 +724,8 @@ SYSCALL_DEFINE2(delete_module, const char __user *, name_user,
723 return -EFAULT; 724 return -EFAULT;
724 name[MODULE_NAME_LEN-1] = '\0'; 725 name[MODULE_NAME_LEN-1] = '\0';
725 726
726 /* Create stop_machine threads since free_module relies on 727 if (mutex_lock_interruptible(&module_mutex) != 0)
727 * a non-failing stop_machine call. */ 728 return -EINTR;
728 ret = stop_machine_create();
729 if (ret)
730 return ret;
731
732 if (mutex_lock_interruptible(&module_mutex) != 0) {
733 ret = -EINTR;
734 goto out_stop;
735 }
736 729
737 mod = find_module(name); 730 mod = find_module(name);
738 if (!mod) { 731 if (!mod) {
@@ -792,8 +785,6 @@ SYSCALL_DEFINE2(delete_module, const char __user *, name_user,
792 785
793 out: 786 out:
794 mutex_unlock(&module_mutex); 787 mutex_unlock(&module_mutex);
795out_stop:
796 stop_machine_destroy();
797 return ret; 788 return ret;
798} 789}
799 790
@@ -867,8 +858,7 @@ void module_put(struct module *module)
867 smp_wmb(); /* see comment in module_refcount */ 858 smp_wmb(); /* see comment in module_refcount */
868 __this_cpu_inc(module->refptr->decs); 859 __this_cpu_inc(module->refptr->decs);
869 860
870 trace_module_put(module, _RET_IP_, 861 trace_module_put(module, _RET_IP_);
871 __this_cpu_read(module->refptr->decs));
872 /* Maybe they're waiting for us to drop reference? */ 862 /* Maybe they're waiting for us to drop reference? */
873 if (unlikely(!module_is_live(module))) 863 if (unlikely(!module_is_live(module)))
874 wake_up_process(module->waiter); 864 wake_up_process(module->waiter);
diff --git a/kernel/perf_event.c b/kernel/perf_event.c
index 3d1552d3c12b..a4fa381db3c2 100644
--- a/kernel/perf_event.c
+++ b/kernel/perf_event.c
@@ -16,6 +16,7 @@
16#include <linux/file.h> 16#include <linux/file.h>
17#include <linux/poll.h> 17#include <linux/poll.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/hash.h>
19#include <linux/sysfs.h> 20#include <linux/sysfs.h>
20#include <linux/dcache.h> 21#include <linux/dcache.h>
21#include <linux/percpu.h> 22#include <linux/percpu.h>
@@ -82,14 +83,6 @@ extern __weak const struct pmu *hw_perf_event_init(struct perf_event *event)
82void __weak hw_perf_disable(void) { barrier(); } 83void __weak hw_perf_disable(void) { barrier(); }
83void __weak hw_perf_enable(void) { barrier(); } 84void __weak hw_perf_enable(void) { barrier(); }
84 85
85int __weak
86hw_perf_group_sched_in(struct perf_event *group_leader,
87 struct perf_cpu_context *cpuctx,
88 struct perf_event_context *ctx)
89{
90 return 0;
91}
92
93void __weak perf_event_print_debug(void) { } 86void __weak perf_event_print_debug(void) { }
94 87
95static DEFINE_PER_CPU(int, perf_disable_count); 88static DEFINE_PER_CPU(int, perf_disable_count);
@@ -262,6 +255,18 @@ static void update_event_times(struct perf_event *event)
262 event->total_time_running = run_end - event->tstamp_running; 255 event->total_time_running = run_end - event->tstamp_running;
263} 256}
264 257
258/*
259 * Update total_time_enabled and total_time_running for all events in a group.
260 */
261static void update_group_times(struct perf_event *leader)
262{
263 struct perf_event *event;
264
265 update_event_times(leader);
266 list_for_each_entry(event, &leader->sibling_list, group_entry)
267 update_event_times(event);
268}
269
265static struct list_head * 270static struct list_head *
266ctx_group_list(struct perf_event *event, struct perf_event_context *ctx) 271ctx_group_list(struct perf_event *event, struct perf_event_context *ctx)
267{ 272{
@@ -315,8 +320,6 @@ list_add_event(struct perf_event *event, struct perf_event_context *ctx)
315static void 320static void
316list_del_event(struct perf_event *event, struct perf_event_context *ctx) 321list_del_event(struct perf_event *event, struct perf_event_context *ctx)
317{ 322{
318 struct perf_event *sibling, *tmp;
319
320 if (list_empty(&event->group_entry)) 323 if (list_empty(&event->group_entry))
321 return; 324 return;
322 ctx->nr_events--; 325 ctx->nr_events--;
@@ -329,7 +332,7 @@ list_del_event(struct perf_event *event, struct perf_event_context *ctx)
329 if (event->group_leader != event) 332 if (event->group_leader != event)
330 event->group_leader->nr_siblings--; 333 event->group_leader->nr_siblings--;
331 334
332 update_event_times(event); 335 update_group_times(event);
333 336
334 /* 337 /*
335 * If event was in error state, then keep it 338 * If event was in error state, then keep it
@@ -340,6 +343,12 @@ list_del_event(struct perf_event *event, struct perf_event_context *ctx)
340 */ 343 */
341 if (event->state > PERF_EVENT_STATE_OFF) 344 if (event->state > PERF_EVENT_STATE_OFF)
342 event->state = PERF_EVENT_STATE_OFF; 345 event->state = PERF_EVENT_STATE_OFF;
346}
347
348static void
349perf_destroy_group(struct perf_event *event, struct perf_event_context *ctx)
350{
351 struct perf_event *sibling, *tmp;
343 352
344 /* 353 /*
345 * If this was a group event with sibling events then 354 * If this was a group event with sibling events then
@@ -505,18 +514,6 @@ retry:
505} 514}
506 515
507/* 516/*
508 * Update total_time_enabled and total_time_running for all events in a group.
509 */
510static void update_group_times(struct perf_event *leader)
511{
512 struct perf_event *event;
513
514 update_event_times(leader);
515 list_for_each_entry(event, &leader->sibling_list, group_entry)
516 update_event_times(event);
517}
518
519/*
520 * Cross CPU call to disable a performance event 517 * Cross CPU call to disable a performance event
521 */ 518 */
522static void __perf_event_disable(void *info) 519static void __perf_event_disable(void *info)
@@ -640,15 +637,20 @@ group_sched_in(struct perf_event *group_event,
640 struct perf_cpu_context *cpuctx, 637 struct perf_cpu_context *cpuctx,
641 struct perf_event_context *ctx) 638 struct perf_event_context *ctx)
642{ 639{
643 struct perf_event *event, *partial_group; 640 struct perf_event *event, *partial_group = NULL;
641 const struct pmu *pmu = group_event->pmu;
642 bool txn = false;
644 int ret; 643 int ret;
645 644
646 if (group_event->state == PERF_EVENT_STATE_OFF) 645 if (group_event->state == PERF_EVENT_STATE_OFF)
647 return 0; 646 return 0;
648 647
649 ret = hw_perf_group_sched_in(group_event, cpuctx, ctx); 648 /* Check if group transaction availabe */
650 if (ret) 649 if (pmu->start_txn)
651 return ret < 0 ? ret : 0; 650 txn = true;
651
652 if (txn)
653 pmu->start_txn(pmu);
652 654
653 if (event_sched_in(group_event, cpuctx, ctx)) 655 if (event_sched_in(group_event, cpuctx, ctx))
654 return -EAGAIN; 656 return -EAGAIN;
@@ -663,9 +665,19 @@ group_sched_in(struct perf_event *group_event,
663 } 665 }
664 } 666 }
665 667
666 return 0; 668 if (!txn)
669 return 0;
670
671 ret = pmu->commit_txn(pmu);
672 if (!ret) {
673 pmu->cancel_txn(pmu);
674 return 0;
675 }
667 676
668group_error: 677group_error:
678 if (txn)
679 pmu->cancel_txn(pmu);
680
669 /* 681 /*
670 * Groups can be scheduled in as one unit only, so undo any 682 * Groups can be scheduled in as one unit only, so undo any
671 * partial group before returning: 683 * partial group before returning:
@@ -1367,6 +1379,8 @@ void perf_event_task_sched_in(struct task_struct *task)
1367 if (cpuctx->task_ctx == ctx) 1379 if (cpuctx->task_ctx == ctx)
1368 return; 1380 return;
1369 1381
1382 perf_disable();
1383
1370 /* 1384 /*
1371 * We want to keep the following priority order: 1385 * We want to keep the following priority order:
1372 * cpu pinned (that don't need to move), task pinned, 1386 * cpu pinned (that don't need to move), task pinned,
@@ -1379,6 +1393,8 @@ void perf_event_task_sched_in(struct task_struct *task)
1379 ctx_sched_in(ctx, cpuctx, EVENT_FLEXIBLE); 1393 ctx_sched_in(ctx, cpuctx, EVENT_FLEXIBLE);
1380 1394
1381 cpuctx->task_ctx = ctx; 1395 cpuctx->task_ctx = ctx;
1396
1397 perf_enable();
1382} 1398}
1383 1399
1384#define MAX_INTERRUPTS (~0ULL) 1400#define MAX_INTERRUPTS (~0ULL)
@@ -1856,9 +1872,30 @@ int perf_event_release_kernel(struct perf_event *event)
1856{ 1872{
1857 struct perf_event_context *ctx = event->ctx; 1873 struct perf_event_context *ctx = event->ctx;
1858 1874
1875 /*
1876 * Remove from the PMU, can't get re-enabled since we got
1877 * here because the last ref went.
1878 */
1879 perf_event_disable(event);
1880
1859 WARN_ON_ONCE(ctx->parent_ctx); 1881 WARN_ON_ONCE(ctx->parent_ctx);
1860 mutex_lock(&ctx->mutex); 1882 /*
1861 perf_event_remove_from_context(event); 1883 * There are two ways this annotation is useful:
1884 *
1885 * 1) there is a lock recursion from perf_event_exit_task
1886 * see the comment there.
1887 *
1888 * 2) there is a lock-inversion with mmap_sem through
1889 * perf_event_read_group(), which takes faults while
1890 * holding ctx->mutex, however this is called after
1891 * the last filedesc died, so there is no possibility
1892 * to trigger the AB-BA case.
1893 */
1894 mutex_lock_nested(&ctx->mutex, SINGLE_DEPTH_NESTING);
1895 raw_spin_lock_irq(&ctx->lock);
1896 list_del_event(event, ctx);
1897 perf_destroy_group(event, ctx);
1898 raw_spin_unlock_irq(&ctx->lock);
1862 mutex_unlock(&ctx->mutex); 1899 mutex_unlock(&ctx->mutex);
1863 1900
1864 mutex_lock(&event->owner->perf_event_mutex); 1901 mutex_lock(&event->owner->perf_event_mutex);
@@ -2642,6 +2679,7 @@ static int perf_fasync(int fd, struct file *filp, int on)
2642} 2679}
2643 2680
2644static const struct file_operations perf_fops = { 2681static const struct file_operations perf_fops = {
2682 .llseek = no_llseek,
2645 .release = perf_release, 2683 .release = perf_release,
2646 .read = perf_read, 2684 .read = perf_read,
2647 .poll = perf_poll, 2685 .poll = perf_poll,
@@ -2792,6 +2830,27 @@ void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int ski
2792 2830
2793 2831
2794/* 2832/*
2833 * We assume there is only KVM supporting the callbacks.
2834 * Later on, we might change it to a list if there is
2835 * another virtualization implementation supporting the callbacks.
2836 */
2837struct perf_guest_info_callbacks *perf_guest_cbs;
2838
2839int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *cbs)
2840{
2841 perf_guest_cbs = cbs;
2842 return 0;
2843}
2844EXPORT_SYMBOL_GPL(perf_register_guest_info_callbacks);
2845
2846int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *cbs)
2847{
2848 perf_guest_cbs = NULL;
2849 return 0;
2850}
2851EXPORT_SYMBOL_GPL(perf_unregister_guest_info_callbacks);
2852
2853/*
2795 * Output 2854 * Output
2796 */ 2855 */
2797static bool perf_output_space(struct perf_mmap_data *data, unsigned long tail, 2856static bool perf_output_space(struct perf_mmap_data *data, unsigned long tail,
@@ -3743,7 +3802,7 @@ void __perf_event_mmap(struct vm_area_struct *vma)
3743 .event_id = { 3802 .event_id = {
3744 .header = { 3803 .header = {
3745 .type = PERF_RECORD_MMAP, 3804 .type = PERF_RECORD_MMAP,
3746 .misc = 0, 3805 .misc = PERF_RECORD_MISC_USER,
3747 /* .size */ 3806 /* .size */
3748 }, 3807 },
3749 /* .pid */ 3808 /* .pid */
@@ -3961,36 +4020,6 @@ static void perf_swevent_add(struct perf_event *event, u64 nr,
3961 perf_swevent_overflow(event, 0, nmi, data, regs); 4020 perf_swevent_overflow(event, 0, nmi, data, regs);
3962} 4021}
3963 4022
3964static int perf_swevent_is_counting(struct perf_event *event)
3965{
3966 /*
3967 * The event is active, we're good!
3968 */
3969 if (event->state == PERF_EVENT_STATE_ACTIVE)
3970 return 1;
3971
3972 /*
3973 * The event is off/error, not counting.
3974 */
3975 if (event->state != PERF_EVENT_STATE_INACTIVE)
3976 return 0;
3977
3978 /*
3979 * The event is inactive, if the context is active
3980 * we're part of a group that didn't make it on the 'pmu',
3981 * not counting.
3982 */
3983 if (event->ctx->is_active)
3984 return 0;
3985
3986 /*
3987 * We're inactive and the context is too, this means the
3988 * task is scheduled out, we're counting events that happen
3989 * to us, like migration events.
3990 */
3991 return 1;
3992}
3993
3994static int perf_tp_event_match(struct perf_event *event, 4023static int perf_tp_event_match(struct perf_event *event,
3995 struct perf_sample_data *data); 4024 struct perf_sample_data *data);
3996 4025
@@ -4014,12 +4043,6 @@ static int perf_swevent_match(struct perf_event *event,
4014 struct perf_sample_data *data, 4043 struct perf_sample_data *data,
4015 struct pt_regs *regs) 4044 struct pt_regs *regs)
4016{ 4045{
4017 if (event->cpu != -1 && event->cpu != smp_processor_id())
4018 return 0;
4019
4020 if (!perf_swevent_is_counting(event))
4021 return 0;
4022
4023 if (event->attr.type != type) 4046 if (event->attr.type != type)
4024 return 0; 4047 return 0;
4025 4048
@@ -4036,18 +4059,53 @@ static int perf_swevent_match(struct perf_event *event,
4036 return 1; 4059 return 1;
4037} 4060}
4038 4061
4039static void perf_swevent_ctx_event(struct perf_event_context *ctx, 4062static inline u64 swevent_hash(u64 type, u32 event_id)
4040 enum perf_type_id type,
4041 u32 event_id, u64 nr, int nmi,
4042 struct perf_sample_data *data,
4043 struct pt_regs *regs)
4044{ 4063{
4064 u64 val = event_id | (type << 32);
4065
4066 return hash_64(val, SWEVENT_HLIST_BITS);
4067}
4068
4069static struct hlist_head *
4070find_swevent_head(struct perf_cpu_context *ctx, u64 type, u32 event_id)
4071{
4072 u64 hash;
4073 struct swevent_hlist *hlist;
4074
4075 hash = swevent_hash(type, event_id);
4076
4077 hlist = rcu_dereference(ctx->swevent_hlist);
4078 if (!hlist)
4079 return NULL;
4080
4081 return &hlist->heads[hash];
4082}
4083
4084static void do_perf_sw_event(enum perf_type_id type, u32 event_id,
4085 u64 nr, int nmi,
4086 struct perf_sample_data *data,
4087 struct pt_regs *regs)
4088{
4089 struct perf_cpu_context *cpuctx;
4045 struct perf_event *event; 4090 struct perf_event *event;
4091 struct hlist_node *node;
4092 struct hlist_head *head;
4046 4093
4047 list_for_each_entry_rcu(event, &ctx->event_list, event_entry) { 4094 cpuctx = &__get_cpu_var(perf_cpu_context);
4095
4096 rcu_read_lock();
4097
4098 head = find_swevent_head(cpuctx, type, event_id);
4099
4100 if (!head)
4101 goto end;
4102
4103 hlist_for_each_entry_rcu(event, node, head, hlist_entry) {
4048 if (perf_swevent_match(event, type, event_id, data, regs)) 4104 if (perf_swevent_match(event, type, event_id, data, regs))
4049 perf_swevent_add(event, nr, nmi, data, regs); 4105 perf_swevent_add(event, nr, nmi, data, regs);
4050 } 4106 }
4107end:
4108 rcu_read_unlock();
4051} 4109}
4052 4110
4053int perf_swevent_get_recursion_context(void) 4111int perf_swevent_get_recursion_context(void)
@@ -4085,27 +4143,6 @@ void perf_swevent_put_recursion_context(int rctx)
4085} 4143}
4086EXPORT_SYMBOL_GPL(perf_swevent_put_recursion_context); 4144EXPORT_SYMBOL_GPL(perf_swevent_put_recursion_context);
4087 4145
4088static void do_perf_sw_event(enum perf_type_id type, u32 event_id,
4089 u64 nr, int nmi,
4090 struct perf_sample_data *data,
4091 struct pt_regs *regs)
4092{
4093 struct perf_cpu_context *cpuctx;
4094 struct perf_event_context *ctx;
4095
4096 cpuctx = &__get_cpu_var(perf_cpu_context);
4097 rcu_read_lock();
4098 perf_swevent_ctx_event(&cpuctx->ctx, type, event_id,
4099 nr, nmi, data, regs);
4100 /*
4101 * doesn't really matter which of the child contexts the
4102 * events ends up in.
4103 */
4104 ctx = rcu_dereference(current->perf_event_ctxp);
4105 if (ctx)
4106 perf_swevent_ctx_event(ctx, type, event_id, nr, nmi, data, regs);
4107 rcu_read_unlock();
4108}
4109 4146
4110void __perf_sw_event(u32 event_id, u64 nr, int nmi, 4147void __perf_sw_event(u32 event_id, u64 nr, int nmi,
4111 struct pt_regs *regs, u64 addr) 4148 struct pt_regs *regs, u64 addr)
@@ -4131,16 +4168,28 @@ static void perf_swevent_read(struct perf_event *event)
4131static int perf_swevent_enable(struct perf_event *event) 4168static int perf_swevent_enable(struct perf_event *event)
4132{ 4169{
4133 struct hw_perf_event *hwc = &event->hw; 4170 struct hw_perf_event *hwc = &event->hw;
4171 struct perf_cpu_context *cpuctx;
4172 struct hlist_head *head;
4173
4174 cpuctx = &__get_cpu_var(perf_cpu_context);
4134 4175
4135 if (hwc->sample_period) { 4176 if (hwc->sample_period) {
4136 hwc->last_period = hwc->sample_period; 4177 hwc->last_period = hwc->sample_period;
4137 perf_swevent_set_period(event); 4178 perf_swevent_set_period(event);
4138 } 4179 }
4180
4181 head = find_swevent_head(cpuctx, event->attr.type, event->attr.config);
4182 if (WARN_ON_ONCE(!head))
4183 return -EINVAL;
4184
4185 hlist_add_head_rcu(&event->hlist_entry, head);
4186
4139 return 0; 4187 return 0;
4140} 4188}
4141 4189
4142static void perf_swevent_disable(struct perf_event *event) 4190static void perf_swevent_disable(struct perf_event *event)
4143{ 4191{
4192 hlist_del_rcu(&event->hlist_entry);
4144} 4193}
4145 4194
4146static const struct pmu perf_ops_generic = { 4195static const struct pmu perf_ops_generic = {
@@ -4168,15 +4217,8 @@ static enum hrtimer_restart perf_swevent_hrtimer(struct hrtimer *hrtimer)
4168 perf_sample_data_init(&data, 0); 4217 perf_sample_data_init(&data, 0);
4169 data.period = event->hw.last_period; 4218 data.period = event->hw.last_period;
4170 regs = get_irq_regs(); 4219 regs = get_irq_regs();
4171 /*
4172 * In case we exclude kernel IPs or are somehow not in interrupt
4173 * context, provide the next best thing, the user IP.
4174 */
4175 if ((event->attr.exclude_kernel || !regs) &&
4176 !event->attr.exclude_user)
4177 regs = task_pt_regs(current);
4178 4220
4179 if (regs) { 4221 if (regs && !perf_exclude_event(event, regs)) {
4180 if (!(event->attr.exclude_idle && current->pid == 0)) 4222 if (!(event->attr.exclude_idle && current->pid == 0))
4181 if (perf_event_overflow(event, 0, &data, regs)) 4223 if (perf_event_overflow(event, 0, &data, regs))
4182 ret = HRTIMER_NORESTART; 4224 ret = HRTIMER_NORESTART;
@@ -4324,6 +4366,105 @@ static const struct pmu perf_ops_task_clock = {
4324 .read = task_clock_perf_event_read, 4366 .read = task_clock_perf_event_read,
4325}; 4367};
4326 4368
4369static void swevent_hlist_release_rcu(struct rcu_head *rcu_head)
4370{
4371 struct swevent_hlist *hlist;
4372
4373 hlist = container_of(rcu_head, struct swevent_hlist, rcu_head);
4374 kfree(hlist);
4375}
4376
4377static void swevent_hlist_release(struct perf_cpu_context *cpuctx)
4378{
4379 struct swevent_hlist *hlist;
4380
4381 if (!cpuctx->swevent_hlist)
4382 return;
4383
4384 hlist = cpuctx->swevent_hlist;
4385 rcu_assign_pointer(cpuctx->swevent_hlist, NULL);
4386 call_rcu(&hlist->rcu_head, swevent_hlist_release_rcu);
4387}
4388
4389static void swevent_hlist_put_cpu(struct perf_event *event, int cpu)
4390{
4391 struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu);
4392
4393 mutex_lock(&cpuctx->hlist_mutex);
4394
4395 if (!--cpuctx->hlist_refcount)
4396 swevent_hlist_release(cpuctx);
4397
4398 mutex_unlock(&cpuctx->hlist_mutex);
4399}
4400
4401static void swevent_hlist_put(struct perf_event *event)
4402{
4403 int cpu;
4404
4405 if (event->cpu != -1) {
4406 swevent_hlist_put_cpu(event, event->cpu);
4407 return;
4408 }
4409
4410 for_each_possible_cpu(cpu)
4411 swevent_hlist_put_cpu(event, cpu);
4412}
4413
4414static int swevent_hlist_get_cpu(struct perf_event *event, int cpu)
4415{
4416 struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu);
4417 int err = 0;
4418
4419 mutex_lock(&cpuctx->hlist_mutex);
4420
4421 if (!cpuctx->swevent_hlist && cpu_online(cpu)) {
4422 struct swevent_hlist *hlist;
4423
4424 hlist = kzalloc(sizeof(*hlist), GFP_KERNEL);
4425 if (!hlist) {
4426 err = -ENOMEM;
4427 goto exit;
4428 }
4429 rcu_assign_pointer(cpuctx->swevent_hlist, hlist);
4430 }
4431 cpuctx->hlist_refcount++;
4432 exit:
4433 mutex_unlock(&cpuctx->hlist_mutex);
4434
4435 return err;
4436}
4437
4438static int swevent_hlist_get(struct perf_event *event)
4439{
4440 int err;
4441 int cpu, failed_cpu;
4442
4443 if (event->cpu != -1)
4444 return swevent_hlist_get_cpu(event, event->cpu);
4445
4446 get_online_cpus();
4447 for_each_possible_cpu(cpu) {
4448 err = swevent_hlist_get_cpu(event, cpu);
4449 if (err) {
4450 failed_cpu = cpu;
4451 goto fail;
4452 }
4453 }
4454 put_online_cpus();
4455
4456 return 0;
4457 fail:
4458 for_each_possible_cpu(cpu) {
4459 if (cpu == failed_cpu)
4460 break;
4461 swevent_hlist_put_cpu(event, cpu);
4462 }
4463
4464 put_online_cpus();
4465 return err;
4466}
4467
4327#ifdef CONFIG_EVENT_TRACING 4468#ifdef CONFIG_EVENT_TRACING
4328 4469
4329void perf_tp_event(int event_id, u64 addr, u64 count, void *record, 4470void perf_tp_event(int event_id, u64 addr, u64 count, void *record,
@@ -4357,10 +4498,13 @@ static int perf_tp_event_match(struct perf_event *event,
4357static void tp_perf_event_destroy(struct perf_event *event) 4498static void tp_perf_event_destroy(struct perf_event *event)
4358{ 4499{
4359 perf_trace_disable(event->attr.config); 4500 perf_trace_disable(event->attr.config);
4501 swevent_hlist_put(event);
4360} 4502}
4361 4503
4362static const struct pmu *tp_perf_event_init(struct perf_event *event) 4504static const struct pmu *tp_perf_event_init(struct perf_event *event)
4363{ 4505{
4506 int err;
4507
4364 /* 4508 /*
4365 * Raw tracepoint data is a severe data leak, only allow root to 4509 * Raw tracepoint data is a severe data leak, only allow root to
4366 * have these. 4510 * have these.
@@ -4374,6 +4518,11 @@ static const struct pmu *tp_perf_event_init(struct perf_event *event)
4374 return NULL; 4518 return NULL;
4375 4519
4376 event->destroy = tp_perf_event_destroy; 4520 event->destroy = tp_perf_event_destroy;
4521 err = swevent_hlist_get(event);
4522 if (err) {
4523 perf_trace_disable(event->attr.config);
4524 return ERR_PTR(err);
4525 }
4377 4526
4378 return &perf_ops_generic; 4527 return &perf_ops_generic;
4379} 4528}
@@ -4474,6 +4623,7 @@ static void sw_perf_event_destroy(struct perf_event *event)
4474 WARN_ON(event->parent); 4623 WARN_ON(event->parent);
4475 4624
4476 atomic_dec(&perf_swevent_enabled[event_id]); 4625 atomic_dec(&perf_swevent_enabled[event_id]);
4626 swevent_hlist_put(event);
4477} 4627}
4478 4628
4479static const struct pmu *sw_perf_event_init(struct perf_event *event) 4629static const struct pmu *sw_perf_event_init(struct perf_event *event)
@@ -4512,6 +4662,12 @@ static const struct pmu *sw_perf_event_init(struct perf_event *event)
4512 case PERF_COUNT_SW_ALIGNMENT_FAULTS: 4662 case PERF_COUNT_SW_ALIGNMENT_FAULTS:
4513 case PERF_COUNT_SW_EMULATION_FAULTS: 4663 case PERF_COUNT_SW_EMULATION_FAULTS:
4514 if (!event->parent) { 4664 if (!event->parent) {
4665 int err;
4666
4667 err = swevent_hlist_get(event);
4668 if (err)
4669 return ERR_PTR(err);
4670
4515 atomic_inc(&perf_swevent_enabled[event_id]); 4671 atomic_inc(&perf_swevent_enabled[event_id]);
4516 event->destroy = sw_perf_event_destroy; 4672 event->destroy = sw_perf_event_destroy;
4517 } 4673 }
@@ -5176,7 +5332,7 @@ void perf_event_exit_task(struct task_struct *child)
5176 * 5332 *
5177 * But since its the parent context it won't be the same instance. 5333 * But since its the parent context it won't be the same instance.
5178 */ 5334 */
5179 mutex_lock_nested(&child_ctx->mutex, SINGLE_DEPTH_NESTING); 5335 mutex_lock(&child_ctx->mutex);
5180 5336
5181again: 5337again:
5182 list_for_each_entry_safe(child_event, tmp, &child_ctx->pinned_groups, 5338 list_for_each_entry_safe(child_event, tmp, &child_ctx->pinned_groups,
@@ -5384,6 +5540,7 @@ static void __init perf_event_init_all_cpus(void)
5384 5540
5385 for_each_possible_cpu(cpu) { 5541 for_each_possible_cpu(cpu) {
5386 cpuctx = &per_cpu(perf_cpu_context, cpu); 5542 cpuctx = &per_cpu(perf_cpu_context, cpu);
5543 mutex_init(&cpuctx->hlist_mutex);
5387 __perf_event_init_context(&cpuctx->ctx, NULL); 5544 __perf_event_init_context(&cpuctx->ctx, NULL);
5388 } 5545 }
5389} 5546}
@@ -5397,6 +5554,16 @@ static void __cpuinit perf_event_init_cpu(int cpu)
5397 spin_lock(&perf_resource_lock); 5554 spin_lock(&perf_resource_lock);
5398 cpuctx->max_pertask = perf_max_events - perf_reserved_percpu; 5555 cpuctx->max_pertask = perf_max_events - perf_reserved_percpu;
5399 spin_unlock(&perf_resource_lock); 5556 spin_unlock(&perf_resource_lock);
5557
5558 mutex_lock(&cpuctx->hlist_mutex);
5559 if (cpuctx->hlist_refcount > 0) {
5560 struct swevent_hlist *hlist;
5561
5562 hlist = kzalloc(sizeof(*hlist), GFP_KERNEL);
5563 WARN_ON_ONCE(!hlist);
5564 rcu_assign_pointer(cpuctx->swevent_hlist, hlist);
5565 }
5566 mutex_unlock(&cpuctx->hlist_mutex);
5400} 5567}
5401 5568
5402#ifdef CONFIG_HOTPLUG_CPU 5569#ifdef CONFIG_HOTPLUG_CPU
@@ -5416,6 +5583,10 @@ static void perf_event_exit_cpu(int cpu)
5416 struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); 5583 struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu);
5417 struct perf_event_context *ctx = &cpuctx->ctx; 5584 struct perf_event_context *ctx = &cpuctx->ctx;
5418 5585
5586 mutex_lock(&cpuctx->hlist_mutex);
5587 swevent_hlist_release(cpuctx);
5588 mutex_unlock(&cpuctx->hlist_mutex);
5589
5419 mutex_lock(&ctx->mutex); 5590 mutex_lock(&ctx->mutex);
5420 smp_call_function_single(cpu, __perf_event_exit_cpu, NULL, 1); 5591 smp_call_function_single(cpu, __perf_event_exit_cpu, NULL, 1);
5421 mutex_unlock(&ctx->mutex); 5592 mutex_unlock(&ctx->mutex);
diff --git a/kernel/posix-cpu-timers.c b/kernel/posix-cpu-timers.c
index bc7704b3a443..00bb252f29a2 100644
--- a/kernel/posix-cpu-timers.c
+++ b/kernel/posix-cpu-timers.c
@@ -11,19 +11,18 @@
11#include <trace/events/timer.h> 11#include <trace/events/timer.h>
12 12
13/* 13/*
14 * Called after updating RLIMIT_CPU to set timer expiration if necessary. 14 * Called after updating RLIMIT_CPU to run cpu timer and update
15 * tsk->signal->cputime_expires expiration cache if necessary. Needs
16 * siglock protection since other code may update expiration cache as
17 * well.
15 */ 18 */
16void update_rlimit_cpu(unsigned long rlim_new) 19void update_rlimit_cpu(unsigned long rlim_new)
17{ 20{
18 cputime_t cputime = secs_to_cputime(rlim_new); 21 cputime_t cputime = secs_to_cputime(rlim_new);
19 struct signal_struct *const sig = current->signal;
20 22
21 if (cputime_eq(sig->it[CPUCLOCK_PROF].expires, cputime_zero) || 23 spin_lock_irq(&current->sighand->siglock);
22 cputime_gt(sig->it[CPUCLOCK_PROF].expires, cputime)) { 24 set_process_cpu_timer(current, CPUCLOCK_PROF, &cputime, NULL);
23 spin_lock_irq(&current->sighand->siglock); 25 spin_unlock_irq(&current->sighand->siglock);
24 set_process_cpu_timer(current, CPUCLOCK_PROF, &cputime, NULL);
25 spin_unlock_irq(&current->sighand->siglock);
26 }
27} 26}
28 27
29static int check_clock(const clockid_t which_clock) 28static int check_clock(const clockid_t which_clock)
@@ -548,111 +547,62 @@ static inline int expires_gt(cputime_t expires, cputime_t new_exp)
548 cputime_gt(expires, new_exp); 547 cputime_gt(expires, new_exp);
549} 548}
550 549
551static inline int expires_le(cputime_t expires, cputime_t new_exp)
552{
553 return !cputime_eq(expires, cputime_zero) &&
554 cputime_le(expires, new_exp);
555}
556/* 550/*
557 * Insert the timer on the appropriate list before any timers that 551 * Insert the timer on the appropriate list before any timers that
558 * expire later. This must be called with the tasklist_lock held 552 * expire later. This must be called with the tasklist_lock held
559 * for reading, and interrupts disabled. 553 * for reading, interrupts disabled and p->sighand->siglock taken.
560 */ 554 */
561static void arm_timer(struct k_itimer *timer, union cpu_time_count now) 555static void arm_timer(struct k_itimer *timer)
562{ 556{
563 struct task_struct *p = timer->it.cpu.task; 557 struct task_struct *p = timer->it.cpu.task;
564 struct list_head *head, *listpos; 558 struct list_head *head, *listpos;
559 struct task_cputime *cputime_expires;
565 struct cpu_timer_list *const nt = &timer->it.cpu; 560 struct cpu_timer_list *const nt = &timer->it.cpu;
566 struct cpu_timer_list *next; 561 struct cpu_timer_list *next;
567 unsigned long i;
568 562
569 head = (CPUCLOCK_PERTHREAD(timer->it_clock) ? 563 if (CPUCLOCK_PERTHREAD(timer->it_clock)) {
570 p->cpu_timers : p->signal->cpu_timers); 564 head = p->cpu_timers;
565 cputime_expires = &p->cputime_expires;
566 } else {
567 head = p->signal->cpu_timers;
568 cputime_expires = &p->signal->cputime_expires;
569 }
571 head += CPUCLOCK_WHICH(timer->it_clock); 570 head += CPUCLOCK_WHICH(timer->it_clock);
572 571
573 BUG_ON(!irqs_disabled());
574 spin_lock(&p->sighand->siglock);
575
576 listpos = head; 572 listpos = head;
577 if (CPUCLOCK_WHICH(timer->it_clock) == CPUCLOCK_SCHED) { 573 list_for_each_entry(next, head, entry) {
578 list_for_each_entry(next, head, entry) { 574 if (cpu_time_before(timer->it_clock, nt->expires, next->expires))
579 if (next->expires.sched > nt->expires.sched) 575 break;
580 break; 576 listpos = &next->entry;
581 listpos = &next->entry;
582 }
583 } else {
584 list_for_each_entry(next, head, entry) {
585 if (cputime_gt(next->expires.cpu, nt->expires.cpu))
586 break;
587 listpos = &next->entry;
588 }
589 } 577 }
590 list_add(&nt->entry, listpos); 578 list_add(&nt->entry, listpos);
591 579
592 if (listpos == head) { 580 if (listpos == head) {
581 union cpu_time_count *exp = &nt->expires;
582
593 /* 583 /*
594 * We are the new earliest-expiring timer. 584 * We are the new earliest-expiring POSIX 1.b timer, hence
595 * If we are a thread timer, there can always 585 * need to update expiration cache. Take into account that
596 * be a process timer telling us to stop earlier. 586 * for process timers we share expiration cache with itimers
587 * and RLIMIT_CPU and for thread timers with RLIMIT_RTTIME.
597 */ 588 */
598 589
599 if (CPUCLOCK_PERTHREAD(timer->it_clock)) { 590 switch (CPUCLOCK_WHICH(timer->it_clock)) {
600 union cpu_time_count *exp = &nt->expires; 591 case CPUCLOCK_PROF:
601 592 if (expires_gt(cputime_expires->prof_exp, exp->cpu))
602 switch (CPUCLOCK_WHICH(timer->it_clock)) { 593 cputime_expires->prof_exp = exp->cpu;
603 default: 594 break;
604 BUG(); 595 case CPUCLOCK_VIRT:
605 case CPUCLOCK_PROF: 596 if (expires_gt(cputime_expires->virt_exp, exp->cpu))
606 if (expires_gt(p->cputime_expires.prof_exp, 597 cputime_expires->virt_exp = exp->cpu;
607 exp->cpu)) 598 break;
608 p->cputime_expires.prof_exp = exp->cpu; 599 case CPUCLOCK_SCHED:
609 break; 600 if (cputime_expires->sched_exp == 0 ||
610 case CPUCLOCK_VIRT: 601 cputime_expires->sched_exp > exp->sched)
611 if (expires_gt(p->cputime_expires.virt_exp, 602 cputime_expires->sched_exp = exp->sched;
612 exp->cpu)) 603 break;
613 p->cputime_expires.virt_exp = exp->cpu;
614 break;
615 case CPUCLOCK_SCHED:
616 if (p->cputime_expires.sched_exp == 0 ||
617 p->cputime_expires.sched_exp > exp->sched)
618 p->cputime_expires.sched_exp =
619 exp->sched;
620 break;
621 }
622 } else {
623 struct signal_struct *const sig = p->signal;
624 union cpu_time_count *exp = &timer->it.cpu.expires;
625
626 /*
627 * For a process timer, set the cached expiration time.
628 */
629 switch (CPUCLOCK_WHICH(timer->it_clock)) {
630 default:
631 BUG();
632 case CPUCLOCK_VIRT:
633 if (expires_le(sig->it[CPUCLOCK_VIRT].expires,
634 exp->cpu))
635 break;
636 sig->cputime_expires.virt_exp = exp->cpu;
637 break;
638 case CPUCLOCK_PROF:
639 if (expires_le(sig->it[CPUCLOCK_PROF].expires,
640 exp->cpu))
641 break;
642 i = sig->rlim[RLIMIT_CPU].rlim_cur;
643 if (i != RLIM_INFINITY &&
644 i <= cputime_to_secs(exp->cpu))
645 break;
646 sig->cputime_expires.prof_exp = exp->cpu;
647 break;
648 case CPUCLOCK_SCHED:
649 sig->cputime_expires.sched_exp = exp->sched;
650 break;
651 }
652 } 604 }
653 } 605 }
654
655 spin_unlock(&p->sighand->siglock);
656} 606}
657 607
658/* 608/*
@@ -660,7 +610,12 @@ static void arm_timer(struct k_itimer *timer, union cpu_time_count now)
660 */ 610 */
661static void cpu_timer_fire(struct k_itimer *timer) 611static void cpu_timer_fire(struct k_itimer *timer)
662{ 612{
663 if (unlikely(timer->sigq == NULL)) { 613 if ((timer->it_sigev_notify & ~SIGEV_THREAD_ID) == SIGEV_NONE) {
614 /*
615 * User don't want any signal.
616 */
617 timer->it.cpu.expires.sched = 0;
618 } else if (unlikely(timer->sigq == NULL)) {
664 /* 619 /*
665 * This a special case for clock_nanosleep, 620 * This a special case for clock_nanosleep,
666 * not a normal timer from sys_timer_create. 621 * not a normal timer from sys_timer_create.
@@ -721,7 +676,7 @@ int posix_cpu_timer_set(struct k_itimer *timer, int flags,
721 struct itimerspec *new, struct itimerspec *old) 676 struct itimerspec *new, struct itimerspec *old)
722{ 677{
723 struct task_struct *p = timer->it.cpu.task; 678 struct task_struct *p = timer->it.cpu.task;
724 union cpu_time_count old_expires, new_expires, val; 679 union cpu_time_count old_expires, new_expires, old_incr, val;
725 int ret; 680 int ret;
726 681
727 if (unlikely(p == NULL)) { 682 if (unlikely(p == NULL)) {
@@ -752,6 +707,7 @@ int posix_cpu_timer_set(struct k_itimer *timer, int flags,
752 BUG_ON(!irqs_disabled()); 707 BUG_ON(!irqs_disabled());
753 708
754 ret = 0; 709 ret = 0;
710 old_incr = timer->it.cpu.incr;
755 spin_lock(&p->sighand->siglock); 711 spin_lock(&p->sighand->siglock);
756 old_expires = timer->it.cpu.expires; 712 old_expires = timer->it.cpu.expires;
757 if (unlikely(timer->it.cpu.firing)) { 713 if (unlikely(timer->it.cpu.firing)) {
@@ -759,7 +715,6 @@ int posix_cpu_timer_set(struct k_itimer *timer, int flags,
759 ret = TIMER_RETRY; 715 ret = TIMER_RETRY;
760 } else 716 } else
761 list_del_init(&timer->it.cpu.entry); 717 list_del_init(&timer->it.cpu.entry);
762 spin_unlock(&p->sighand->siglock);
763 718
764 /* 719 /*
765 * We need to sample the current value to convert the new 720 * We need to sample the current value to convert the new
@@ -813,6 +768,7 @@ int posix_cpu_timer_set(struct k_itimer *timer, int flags,
813 * disable this firing since we are already reporting 768 * disable this firing since we are already reporting
814 * it as an overrun (thanks to bump_cpu_timer above). 769 * it as an overrun (thanks to bump_cpu_timer above).
815 */ 770 */
771 spin_unlock(&p->sighand->siglock);
816 read_unlock(&tasklist_lock); 772 read_unlock(&tasklist_lock);
817 goto out; 773 goto out;
818 } 774 }
@@ -828,11 +784,11 @@ int posix_cpu_timer_set(struct k_itimer *timer, int flags,
828 */ 784 */
829 timer->it.cpu.expires = new_expires; 785 timer->it.cpu.expires = new_expires;
830 if (new_expires.sched != 0 && 786 if (new_expires.sched != 0 &&
831 (timer->it_sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_NONE &&
832 cpu_time_before(timer->it_clock, val, new_expires)) { 787 cpu_time_before(timer->it_clock, val, new_expires)) {
833 arm_timer(timer, val); 788 arm_timer(timer);
834 } 789 }
835 790
791 spin_unlock(&p->sighand->siglock);
836 read_unlock(&tasklist_lock); 792 read_unlock(&tasklist_lock);
837 793
838 /* 794 /*
@@ -853,7 +809,6 @@ int posix_cpu_timer_set(struct k_itimer *timer, int flags,
853 timer->it_overrun = -1; 809 timer->it_overrun = -1;
854 810
855 if (new_expires.sched != 0 && 811 if (new_expires.sched != 0 &&
856 (timer->it_sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_NONE &&
857 !cpu_time_before(timer->it_clock, val, new_expires)) { 812 !cpu_time_before(timer->it_clock, val, new_expires)) {
858 /* 813 /*
859 * The designated time already passed, so we notify 814 * The designated time already passed, so we notify
@@ -867,7 +822,7 @@ int posix_cpu_timer_set(struct k_itimer *timer, int flags,
867 out: 822 out:
868 if (old) { 823 if (old) {
869 sample_to_timespec(timer->it_clock, 824 sample_to_timespec(timer->it_clock,
870 timer->it.cpu.incr, &old->it_interval); 825 old_incr, &old->it_interval);
871 } 826 }
872 return ret; 827 return ret;
873} 828}
@@ -927,25 +882,6 @@ void posix_cpu_timer_get(struct k_itimer *timer, struct itimerspec *itp)
927 read_unlock(&tasklist_lock); 882 read_unlock(&tasklist_lock);
928 } 883 }
929 884
930 if ((timer->it_sigev_notify & ~SIGEV_THREAD_ID) == SIGEV_NONE) {
931 if (timer->it.cpu.incr.sched == 0 &&
932 cpu_time_before(timer->it_clock,
933 timer->it.cpu.expires, now)) {
934 /*
935 * Do-nothing timer expired and has no reload,
936 * so it's as if it was never set.
937 */
938 timer->it.cpu.expires.sched = 0;
939 itp->it_value.tv_sec = itp->it_value.tv_nsec = 0;
940 return;
941 }
942 /*
943 * Account for any expirations and reloads that should
944 * have happened.
945 */
946 bump_cpu_timer(timer, now);
947 }
948
949 if (unlikely(clear_dead)) { 885 if (unlikely(clear_dead)) {
950 /* 886 /*
951 * We've noticed that the thread is dead, but 887 * We've noticed that the thread is dead, but
@@ -1066,16 +1002,9 @@ static void stop_process_timers(struct signal_struct *sig)
1066 struct thread_group_cputimer *cputimer = &sig->cputimer; 1002 struct thread_group_cputimer *cputimer = &sig->cputimer;
1067 unsigned long flags; 1003 unsigned long flags;
1068 1004
1069 if (!cputimer->running)
1070 return;
1071
1072 spin_lock_irqsave(&cputimer->lock, flags); 1005 spin_lock_irqsave(&cputimer->lock, flags);
1073 cputimer->running = 0; 1006 cputimer->running = 0;
1074 spin_unlock_irqrestore(&cputimer->lock, flags); 1007 spin_unlock_irqrestore(&cputimer->lock, flags);
1075
1076 sig->cputime_expires.prof_exp = cputime_zero;
1077 sig->cputime_expires.virt_exp = cputime_zero;
1078 sig->cputime_expires.sched_exp = 0;
1079} 1008}
1080 1009
1081static u32 onecputick; 1010static u32 onecputick;
@@ -1112,6 +1041,23 @@ static void check_cpu_itimer(struct task_struct *tsk, struct cpu_itimer *it,
1112 } 1041 }
1113} 1042}
1114 1043
1044/**
1045 * task_cputime_zero - Check a task_cputime struct for all zero fields.
1046 *
1047 * @cputime: The struct to compare.
1048 *
1049 * Checks @cputime to see if all fields are zero. Returns true if all fields
1050 * are zero, false if any field is nonzero.
1051 */
1052static inline int task_cputime_zero(const struct task_cputime *cputime)
1053{
1054 if (cputime_eq(cputime->utime, cputime_zero) &&
1055 cputime_eq(cputime->stime, cputime_zero) &&
1056 cputime->sum_exec_runtime == 0)
1057 return 1;
1058 return 0;
1059}
1060
1115/* 1061/*
1116 * Check for any per-thread CPU timers that have fired and move them 1062 * Check for any per-thread CPU timers that have fired and move them
1117 * off the tsk->*_timers list onto the firing list. Per-thread timers 1063 * off the tsk->*_timers list onto the firing list. Per-thread timers
@@ -1129,19 +1075,6 @@ static void check_process_timers(struct task_struct *tsk,
1129 unsigned long soft; 1075 unsigned long soft;
1130 1076
1131 /* 1077 /*
1132 * Don't sample the current process CPU clocks if there are no timers.
1133 */
1134 if (list_empty(&timers[CPUCLOCK_PROF]) &&
1135 cputime_eq(sig->it[CPUCLOCK_PROF].expires, cputime_zero) &&
1136 sig->rlim[RLIMIT_CPU].rlim_cur == RLIM_INFINITY &&
1137 list_empty(&timers[CPUCLOCK_VIRT]) &&
1138 cputime_eq(sig->it[CPUCLOCK_VIRT].expires, cputime_zero) &&
1139 list_empty(&timers[CPUCLOCK_SCHED])) {
1140 stop_process_timers(sig);
1141 return;
1142 }
1143
1144 /*
1145 * Collect the current process totals. 1078 * Collect the current process totals.
1146 */ 1079 */
1147 thread_group_cputimer(tsk, &cputime); 1080 thread_group_cputimer(tsk, &cputime);
@@ -1230,18 +1163,11 @@ static void check_process_timers(struct task_struct *tsk,
1230 } 1163 }
1231 } 1164 }
1232 1165
1233 if (!cputime_eq(prof_expires, cputime_zero) && 1166 sig->cputime_expires.prof_exp = prof_expires;
1234 (cputime_eq(sig->cputime_expires.prof_exp, cputime_zero) || 1167 sig->cputime_expires.virt_exp = virt_expires;
1235 cputime_gt(sig->cputime_expires.prof_exp, prof_expires))) 1168 sig->cputime_expires.sched_exp = sched_expires;
1236 sig->cputime_expires.prof_exp = prof_expires; 1169 if (task_cputime_zero(&sig->cputime_expires))
1237 if (!cputime_eq(virt_expires, cputime_zero) && 1170 stop_process_timers(sig);
1238 (cputime_eq(sig->cputime_expires.virt_exp, cputime_zero) ||
1239 cputime_gt(sig->cputime_expires.virt_exp, virt_expires)))
1240 sig->cputime_expires.virt_exp = virt_expires;
1241 if (sched_expires != 0 &&
1242 (sig->cputime_expires.sched_exp == 0 ||
1243 sig->cputime_expires.sched_exp > sched_expires))
1244 sig->cputime_expires.sched_exp = sched_expires;
1245} 1171}
1246 1172
1247/* 1173/*
@@ -1270,6 +1196,7 @@ void posix_cpu_timer_schedule(struct k_itimer *timer)
1270 goto out; 1196 goto out;
1271 } 1197 }
1272 read_lock(&tasklist_lock); /* arm_timer needs it. */ 1198 read_lock(&tasklist_lock); /* arm_timer needs it. */
1199 spin_lock(&p->sighand->siglock);
1273 } else { 1200 } else {
1274 read_lock(&tasklist_lock); 1201 read_lock(&tasklist_lock);
1275 if (unlikely(p->signal == NULL)) { 1202 if (unlikely(p->signal == NULL)) {
@@ -1290,6 +1217,7 @@ void posix_cpu_timer_schedule(struct k_itimer *timer)
1290 clear_dead_task(timer, now); 1217 clear_dead_task(timer, now);
1291 goto out_unlock; 1218 goto out_unlock;
1292 } 1219 }
1220 spin_lock(&p->sighand->siglock);
1293 cpu_timer_sample_group(timer->it_clock, p, &now); 1221 cpu_timer_sample_group(timer->it_clock, p, &now);
1294 bump_cpu_timer(timer, now); 1222 bump_cpu_timer(timer, now);
1295 /* Leave the tasklist_lock locked for the call below. */ 1223 /* Leave the tasklist_lock locked for the call below. */
@@ -1298,7 +1226,9 @@ void posix_cpu_timer_schedule(struct k_itimer *timer)
1298 /* 1226 /*
1299 * Now re-arm for the new expiry time. 1227 * Now re-arm for the new expiry time.
1300 */ 1228 */
1301 arm_timer(timer, now); 1229 BUG_ON(!irqs_disabled());
1230 arm_timer(timer);
1231 spin_unlock(&p->sighand->siglock);
1302 1232
1303out_unlock: 1233out_unlock:
1304 read_unlock(&tasklist_lock); 1234 read_unlock(&tasklist_lock);
@@ -1310,23 +1240,6 @@ out:
1310} 1240}
1311 1241
1312/** 1242/**
1313 * task_cputime_zero - Check a task_cputime struct for all zero fields.
1314 *
1315 * @cputime: The struct to compare.
1316 *
1317 * Checks @cputime to see if all fields are zero. Returns true if all fields
1318 * are zero, false if any field is nonzero.
1319 */
1320static inline int task_cputime_zero(const struct task_cputime *cputime)
1321{
1322 if (cputime_eq(cputime->utime, cputime_zero) &&
1323 cputime_eq(cputime->stime, cputime_zero) &&
1324 cputime->sum_exec_runtime == 0)
1325 return 1;
1326 return 0;
1327}
1328
1329/**
1330 * task_cputime_expired - Compare two task_cputime entities. 1243 * task_cputime_expired - Compare two task_cputime entities.
1331 * 1244 *
1332 * @sample: The task_cputime structure to be checked for expiration. 1245 * @sample: The task_cputime structure to be checked for expiration.
@@ -1382,7 +1295,7 @@ static inline int fastpath_timer_check(struct task_struct *tsk)
1382 } 1295 }
1383 1296
1384 sig = tsk->signal; 1297 sig = tsk->signal;
1385 if (!task_cputime_zero(&sig->cputime_expires)) { 1298 if (sig->cputimer.running) {
1386 struct task_cputime group_sample; 1299 struct task_cputime group_sample;
1387 1300
1388 thread_group_cputimer(tsk, &group_sample); 1301 thread_group_cputimer(tsk, &group_sample);
@@ -1390,7 +1303,7 @@ static inline int fastpath_timer_check(struct task_struct *tsk)
1390 return 1; 1303 return 1;
1391 } 1304 }
1392 1305
1393 return sig->rlim[RLIMIT_CPU].rlim_cur != RLIM_INFINITY; 1306 return 0;
1394} 1307}
1395 1308
1396/* 1309/*
@@ -1419,7 +1332,12 @@ void run_posix_cpu_timers(struct task_struct *tsk)
1419 * put them on the firing list. 1332 * put them on the firing list.
1420 */ 1333 */
1421 check_thread_timers(tsk, &firing); 1334 check_thread_timers(tsk, &firing);
1422 check_process_timers(tsk, &firing); 1335 /*
1336 * If there are any active process wide timers (POSIX 1.b, itimers,
1337 * RLIMIT_CPU) cputimer must be running.
1338 */
1339 if (tsk->signal->cputimer.running)
1340 check_process_timers(tsk, &firing);
1423 1341
1424 /* 1342 /*
1425 * We must release these locks before taking any timer's lock. 1343 * We must release these locks before taking any timer's lock.
@@ -1456,21 +1374,23 @@ void run_posix_cpu_timers(struct task_struct *tsk)
1456} 1374}
1457 1375
1458/* 1376/*
1459 * Set one of the process-wide special case CPU timers. 1377 * Set one of the process-wide special case CPU timers or RLIMIT_CPU.
1460 * The tsk->sighand->siglock must be held by the caller. 1378 * The tsk->sighand->siglock must be held by the caller.
1461 * The *newval argument is relative and we update it to be absolute, *oldval
1462 * is absolute and we update it to be relative.
1463 */ 1379 */
1464void set_process_cpu_timer(struct task_struct *tsk, unsigned int clock_idx, 1380void set_process_cpu_timer(struct task_struct *tsk, unsigned int clock_idx,
1465 cputime_t *newval, cputime_t *oldval) 1381 cputime_t *newval, cputime_t *oldval)
1466{ 1382{
1467 union cpu_time_count now; 1383 union cpu_time_count now;
1468 struct list_head *head;
1469 1384
1470 BUG_ON(clock_idx == CPUCLOCK_SCHED); 1385 BUG_ON(clock_idx == CPUCLOCK_SCHED);
1471 cpu_timer_sample_group(clock_idx, tsk, &now); 1386 cpu_timer_sample_group(clock_idx, tsk, &now);
1472 1387
1473 if (oldval) { 1388 if (oldval) {
1389 /*
1390 * We are setting itimer. The *oldval is absolute and we update
1391 * it to be relative, *newval argument is relative and we update
1392 * it to be absolute.
1393 */
1474 if (!cputime_eq(*oldval, cputime_zero)) { 1394 if (!cputime_eq(*oldval, cputime_zero)) {
1475 if (cputime_le(*oldval, now.cpu)) { 1395 if (cputime_le(*oldval, now.cpu)) {
1476 /* Just about to fire. */ 1396 /* Just about to fire. */
@@ -1483,33 +1403,21 @@ void set_process_cpu_timer(struct task_struct *tsk, unsigned int clock_idx,
1483 if (cputime_eq(*newval, cputime_zero)) 1403 if (cputime_eq(*newval, cputime_zero))
1484 return; 1404 return;
1485 *newval = cputime_add(*newval, now.cpu); 1405 *newval = cputime_add(*newval, now.cpu);
1486
1487 /*
1488 * If the RLIMIT_CPU timer will expire before the
1489 * ITIMER_PROF timer, we have nothing else to do.
1490 */
1491 if (tsk->signal->rlim[RLIMIT_CPU].rlim_cur
1492 < cputime_to_secs(*newval))
1493 return;
1494 } 1406 }
1495 1407
1496 /* 1408 /*
1497 * Check whether there are any process timers already set to fire 1409 * Update expiration cache if we are the earliest timer, or eventually
1498 * before this one. If so, we don't have anything more to do. 1410 * RLIMIT_CPU limit is earlier than prof_exp cpu timer expire.
1499 */ 1411 */
1500 head = &tsk->signal->cpu_timers[clock_idx]; 1412 switch (clock_idx) {
1501 if (list_empty(head) || 1413 case CPUCLOCK_PROF:
1502 cputime_ge(list_first_entry(head, 1414 if (expires_gt(tsk->signal->cputime_expires.prof_exp, *newval))
1503 struct cpu_timer_list, entry)->expires.cpu,
1504 *newval)) {
1505 switch (clock_idx) {
1506 case CPUCLOCK_PROF:
1507 tsk->signal->cputime_expires.prof_exp = *newval; 1415 tsk->signal->cputime_expires.prof_exp = *newval;
1508 break; 1416 break;
1509 case CPUCLOCK_VIRT: 1417 case CPUCLOCK_VIRT:
1418 if (expires_gt(tsk->signal->cputime_expires.virt_exp, *newval))
1510 tsk->signal->cputime_expires.virt_exp = *newval; 1419 tsk->signal->cputime_expires.virt_exp = *newval;
1511 break; 1420 break;
1512 }
1513 } 1421 }
1514} 1422}
1515 1423
diff --git a/kernel/profile.c b/kernel/profile.c
index a55d3a367ae8..dfadc5b729f1 100644
--- a/kernel/profile.c
+++ b/kernel/profile.c
@@ -127,8 +127,10 @@ int __ref profile_init(void)
127 return 0; 127 return 0;
128 128
129 prof_buffer = vmalloc(buffer_bytes); 129 prof_buffer = vmalloc(buffer_bytes);
130 if (prof_buffer) 130 if (prof_buffer) {
131 memset(prof_buffer, 0, buffer_bytes);
131 return 0; 132 return 0;
133 }
132 134
133 free_cpumask_var(prof_cpu_mask); 135 free_cpumask_var(prof_cpu_mask);
134 return -ENOMEM; 136 return -ENOMEM;
diff --git a/kernel/ptrace.c b/kernel/ptrace.c
index 42ad8ae729a0..6af9cdd558b7 100644
--- a/kernel/ptrace.c
+++ b/kernel/ptrace.c
@@ -14,7 +14,6 @@
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/highmem.h> 15#include <linux/highmem.h>
16#include <linux/pagemap.h> 16#include <linux/pagemap.h>
17#include <linux/smp_lock.h>
18#include <linux/ptrace.h> 17#include <linux/ptrace.h>
19#include <linux/security.h> 18#include <linux/security.h>
20#include <linux/signal.h> 19#include <linux/signal.h>
@@ -76,7 +75,6 @@ void __ptrace_unlink(struct task_struct *child)
76 child->parent = child->real_parent; 75 child->parent = child->real_parent;
77 list_del_init(&child->ptrace_entry); 76 list_del_init(&child->ptrace_entry);
78 77
79 arch_ptrace_untrace(child);
80 if (task_is_traced(child)) 78 if (task_is_traced(child))
81 ptrace_untrace(child); 79 ptrace_untrace(child);
82} 80}
@@ -666,10 +664,6 @@ SYSCALL_DEFINE4(ptrace, long, request, long, pid, long, addr, long, data)
666 struct task_struct *child; 664 struct task_struct *child;
667 long ret; 665 long ret;
668 666
669 /*
670 * This lock_kernel fixes a subtle race with suid exec
671 */
672 lock_kernel();
673 if (request == PTRACE_TRACEME) { 667 if (request == PTRACE_TRACEME) {
674 ret = ptrace_traceme(); 668 ret = ptrace_traceme();
675 if (!ret) 669 if (!ret)
@@ -703,7 +697,6 @@ SYSCALL_DEFINE4(ptrace, long, request, long, pid, long, addr, long, data)
703 out_put_task_struct: 697 out_put_task_struct:
704 put_task_struct(child); 698 put_task_struct(child);
705 out: 699 out:
706 unlock_kernel();
707 return ret; 700 return ret;
708} 701}
709 702
@@ -813,10 +806,6 @@ asmlinkage long compat_sys_ptrace(compat_long_t request, compat_long_t pid,
813 struct task_struct *child; 806 struct task_struct *child;
814 long ret; 807 long ret;
815 808
816 /*
817 * This lock_kernel fixes a subtle race with suid exec
818 */
819 lock_kernel();
820 if (request == PTRACE_TRACEME) { 809 if (request == PTRACE_TRACEME) {
821 ret = ptrace_traceme(); 810 ret = ptrace_traceme();
822 goto out; 811 goto out;
@@ -846,7 +835,6 @@ asmlinkage long compat_sys_ptrace(compat_long_t request, compat_long_t pid,
846 out_put_task_struct: 835 out_put_task_struct:
847 put_task_struct(child); 836 put_task_struct(child);
848 out: 837 out:
849 unlock_kernel();
850 return ret; 838 return ret;
851} 839}
852#endif /* CONFIG_COMPAT */ 840#endif /* CONFIG_COMPAT */
diff --git a/kernel/rcupdate.c b/kernel/rcupdate.c
index 49d808e833b0..72a8dc9567f5 100644
--- a/kernel/rcupdate.c
+++ b/kernel/rcupdate.c
@@ -44,7 +44,6 @@
44#include <linux/cpu.h> 44#include <linux/cpu.h>
45#include <linux/mutex.h> 45#include <linux/mutex.h>
46#include <linux/module.h> 46#include <linux/module.h>
47#include <linux/kernel_stat.h>
48#include <linux/hardirq.h> 47#include <linux/hardirq.h>
49 48
50#ifdef CONFIG_DEBUG_LOCK_ALLOC 49#ifdef CONFIG_DEBUG_LOCK_ALLOC
@@ -64,9 +63,6 @@ struct lockdep_map rcu_sched_lock_map =
64EXPORT_SYMBOL_GPL(rcu_sched_lock_map); 63EXPORT_SYMBOL_GPL(rcu_sched_lock_map);
65#endif 64#endif
66 65
67int rcu_scheduler_active __read_mostly;
68EXPORT_SYMBOL_GPL(rcu_scheduler_active);
69
70#ifdef CONFIG_DEBUG_LOCK_ALLOC 66#ifdef CONFIG_DEBUG_LOCK_ALLOC
71 67
72int debug_lockdep_rcu_enabled(void) 68int debug_lockdep_rcu_enabled(void)
@@ -97,21 +93,6 @@ EXPORT_SYMBOL_GPL(rcu_read_lock_bh_held);
97#endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ 93#endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */
98 94
99/* 95/*
100 * This function is invoked towards the end of the scheduler's initialization
101 * process. Before this is called, the idle task might contain
102 * RCU read-side critical sections (during which time, this idle
103 * task is booting the system). After this function is called, the
104 * idle tasks are prohibited from containing RCU read-side critical
105 * sections.
106 */
107void rcu_scheduler_starting(void)
108{
109 WARN_ON(num_online_cpus() != 1);
110 WARN_ON(nr_context_switches() > 0);
111 rcu_scheduler_active = 1;
112}
113
114/*
115 * Awaken the corresponding synchronize_rcu() instance now that a 96 * Awaken the corresponding synchronize_rcu() instance now that a
116 * grace period has elapsed. 97 * grace period has elapsed.
117 */ 98 */
diff --git a/kernel/rcutiny.c b/kernel/rcutiny.c
index 9f6d9ff2572c..38729d3cd236 100644
--- a/kernel/rcutiny.c
+++ b/kernel/rcutiny.c
@@ -44,9 +44,9 @@ struct rcu_ctrlblk {
44}; 44};
45 45
46/* Definition for rcupdate control block. */ 46/* Definition for rcupdate control block. */
47static struct rcu_ctrlblk rcu_ctrlblk = { 47static struct rcu_ctrlblk rcu_sched_ctrlblk = {
48 .donetail = &rcu_ctrlblk.rcucblist, 48 .donetail = &rcu_sched_ctrlblk.rcucblist,
49 .curtail = &rcu_ctrlblk.rcucblist, 49 .curtail = &rcu_sched_ctrlblk.rcucblist,
50}; 50};
51 51
52static struct rcu_ctrlblk rcu_bh_ctrlblk = { 52static struct rcu_ctrlblk rcu_bh_ctrlblk = {
@@ -54,6 +54,11 @@ static struct rcu_ctrlblk rcu_bh_ctrlblk = {
54 .curtail = &rcu_bh_ctrlblk.rcucblist, 54 .curtail = &rcu_bh_ctrlblk.rcucblist,
55}; 55};
56 56
57#ifdef CONFIG_DEBUG_LOCK_ALLOC
58int rcu_scheduler_active __read_mostly;
59EXPORT_SYMBOL_GPL(rcu_scheduler_active);
60#endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */
61
57#ifdef CONFIG_NO_HZ 62#ifdef CONFIG_NO_HZ
58 63
59static long rcu_dynticks_nesting = 1; 64static long rcu_dynticks_nesting = 1;
@@ -108,7 +113,8 @@ static int rcu_qsctr_help(struct rcu_ctrlblk *rcp)
108 */ 113 */
109void rcu_sched_qs(int cpu) 114void rcu_sched_qs(int cpu)
110{ 115{
111 if (rcu_qsctr_help(&rcu_ctrlblk) + rcu_qsctr_help(&rcu_bh_ctrlblk)) 116 if (rcu_qsctr_help(&rcu_sched_ctrlblk) +
117 rcu_qsctr_help(&rcu_bh_ctrlblk))
112 raise_softirq(RCU_SOFTIRQ); 118 raise_softirq(RCU_SOFTIRQ);
113} 119}
114 120
@@ -173,7 +179,7 @@ static void __rcu_process_callbacks(struct rcu_ctrlblk *rcp)
173 */ 179 */
174static void rcu_process_callbacks(struct softirq_action *unused) 180static void rcu_process_callbacks(struct softirq_action *unused)
175{ 181{
176 __rcu_process_callbacks(&rcu_ctrlblk); 182 __rcu_process_callbacks(&rcu_sched_ctrlblk);
177 __rcu_process_callbacks(&rcu_bh_ctrlblk); 183 __rcu_process_callbacks(&rcu_bh_ctrlblk);
178} 184}
179 185
@@ -187,7 +193,8 @@ static void rcu_process_callbacks(struct softirq_action *unused)
187 * 193 *
188 * Cool, huh? (Due to Josh Triplett.) 194 * Cool, huh? (Due to Josh Triplett.)
189 * 195 *
190 * But we want to make this a static inline later. 196 * But we want to make this a static inline later. The cond_resched()
197 * currently makes this problematic.
191 */ 198 */
192void synchronize_sched(void) 199void synchronize_sched(void)
193{ 200{
@@ -195,12 +202,6 @@ void synchronize_sched(void)
195} 202}
196EXPORT_SYMBOL_GPL(synchronize_sched); 203EXPORT_SYMBOL_GPL(synchronize_sched);
197 204
198void synchronize_rcu_bh(void)
199{
200 synchronize_sched();
201}
202EXPORT_SYMBOL_GPL(synchronize_rcu_bh);
203
204/* 205/*
205 * Helper function for call_rcu() and call_rcu_bh(). 206 * Helper function for call_rcu() and call_rcu_bh().
206 */ 207 */
@@ -226,7 +227,7 @@ static void __call_rcu(struct rcu_head *head,
226 */ 227 */
227void call_rcu(struct rcu_head *head, void (*func)(struct rcu_head *rcu)) 228void call_rcu(struct rcu_head *head, void (*func)(struct rcu_head *rcu))
228{ 229{
229 __call_rcu(head, func, &rcu_ctrlblk); 230 __call_rcu(head, func, &rcu_sched_ctrlblk);
230} 231}
231EXPORT_SYMBOL_GPL(call_rcu); 232EXPORT_SYMBOL_GPL(call_rcu);
232 233
@@ -244,11 +245,13 @@ void rcu_barrier(void)
244{ 245{
245 struct rcu_synchronize rcu; 246 struct rcu_synchronize rcu;
246 247
248 init_rcu_head_on_stack(&rcu.head);
247 init_completion(&rcu.completion); 249 init_completion(&rcu.completion);
248 /* Will wake me after RCU finished. */ 250 /* Will wake me after RCU finished. */
249 call_rcu(&rcu.head, wakeme_after_rcu); 251 call_rcu(&rcu.head, wakeme_after_rcu);
250 /* Wait for it. */ 252 /* Wait for it. */
251 wait_for_completion(&rcu.completion); 253 wait_for_completion(&rcu.completion);
254 destroy_rcu_head_on_stack(&rcu.head);
252} 255}
253EXPORT_SYMBOL_GPL(rcu_barrier); 256EXPORT_SYMBOL_GPL(rcu_barrier);
254 257
@@ -256,11 +259,13 @@ void rcu_barrier_bh(void)
256{ 259{
257 struct rcu_synchronize rcu; 260 struct rcu_synchronize rcu;
258 261
262 init_rcu_head_on_stack(&rcu.head);
259 init_completion(&rcu.completion); 263 init_completion(&rcu.completion);
260 /* Will wake me after RCU finished. */ 264 /* Will wake me after RCU finished. */
261 call_rcu_bh(&rcu.head, wakeme_after_rcu); 265 call_rcu_bh(&rcu.head, wakeme_after_rcu);
262 /* Wait for it. */ 266 /* Wait for it. */
263 wait_for_completion(&rcu.completion); 267 wait_for_completion(&rcu.completion);
268 destroy_rcu_head_on_stack(&rcu.head);
264} 269}
265EXPORT_SYMBOL_GPL(rcu_barrier_bh); 270EXPORT_SYMBOL_GPL(rcu_barrier_bh);
266 271
@@ -268,11 +273,13 @@ void rcu_barrier_sched(void)
268{ 273{
269 struct rcu_synchronize rcu; 274 struct rcu_synchronize rcu;
270 275
276 init_rcu_head_on_stack(&rcu.head);
271 init_completion(&rcu.completion); 277 init_completion(&rcu.completion);
272 /* Will wake me after RCU finished. */ 278 /* Will wake me after RCU finished. */
273 call_rcu_sched(&rcu.head, wakeme_after_rcu); 279 call_rcu_sched(&rcu.head, wakeme_after_rcu);
274 /* Wait for it. */ 280 /* Wait for it. */
275 wait_for_completion(&rcu.completion); 281 wait_for_completion(&rcu.completion);
282 destroy_rcu_head_on_stack(&rcu.head);
276} 283}
277EXPORT_SYMBOL_GPL(rcu_barrier_sched); 284EXPORT_SYMBOL_GPL(rcu_barrier_sched);
278 285
@@ -280,3 +287,5 @@ void __init rcu_init(void)
280{ 287{
281 open_softirq(RCU_SOFTIRQ, rcu_process_callbacks); 288 open_softirq(RCU_SOFTIRQ, rcu_process_callbacks);
282} 289}
290
291#include "rcutiny_plugin.h"
diff --git a/kernel/rcutiny_plugin.h b/kernel/rcutiny_plugin.h
new file mode 100644
index 000000000000..d223a92bc742
--- /dev/null
+++ b/kernel/rcutiny_plugin.h
@@ -0,0 +1,39 @@
1/*
2 * Read-Copy Update mechanism for mutual exclusion (tree-based version)
3 * Internal non-public definitions that provide either classic
4 * or preemptable semantics.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 * Copyright IBM Corporation, 2009
21 *
22 * Author: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
23 */
24
25#ifdef CONFIG_DEBUG_LOCK_ALLOC
26
27#include <linux/kernel_stat.h>
28
29/*
30 * During boot, we forgive RCU lockdep issues. After this function is
31 * invoked, we start taking RCU lockdep issues seriously.
32 */
33void rcu_scheduler_starting(void)
34{
35 WARN_ON(nr_context_switches() > 0);
36 rcu_scheduler_active = 1;
37}
38
39#endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */
diff --git a/kernel/rcutorture.c b/kernel/rcutorture.c
index 58df55bf83ed..6535ac8bc6a5 100644
--- a/kernel/rcutorture.c
+++ b/kernel/rcutorture.c
@@ -464,9 +464,11 @@ static void rcu_bh_torture_synchronize(void)
464{ 464{
465 struct rcu_bh_torture_synchronize rcu; 465 struct rcu_bh_torture_synchronize rcu;
466 466
467 init_rcu_head_on_stack(&rcu.head);
467 init_completion(&rcu.completion); 468 init_completion(&rcu.completion);
468 call_rcu_bh(&rcu.head, rcu_bh_torture_wakeme_after_cb); 469 call_rcu_bh(&rcu.head, rcu_bh_torture_wakeme_after_cb);
469 wait_for_completion(&rcu.completion); 470 wait_for_completion(&rcu.completion);
471 destroy_rcu_head_on_stack(&rcu.head);
470} 472}
471 473
472static struct rcu_torture_ops rcu_bh_ops = { 474static struct rcu_torture_ops rcu_bh_ops = {
@@ -669,7 +671,7 @@ static struct rcu_torture_ops sched_expedited_ops = {
669 .sync = synchronize_sched_expedited, 671 .sync = synchronize_sched_expedited,
670 .cb_barrier = NULL, 672 .cb_barrier = NULL,
671 .fqs = rcu_sched_force_quiescent_state, 673 .fqs = rcu_sched_force_quiescent_state,
672 .stats = rcu_expedited_torture_stats, 674 .stats = NULL,
673 .irq_capable = 1, 675 .irq_capable = 1,
674 .name = "sched_expedited" 676 .name = "sched_expedited"
675}; 677};
diff --git a/kernel/rcutree.c b/kernel/rcutree.c
index 3ec8160fc75f..d4437345706f 100644
--- a/kernel/rcutree.c
+++ b/kernel/rcutree.c
@@ -46,6 +46,7 @@
46#include <linux/cpu.h> 46#include <linux/cpu.h>
47#include <linux/mutex.h> 47#include <linux/mutex.h>
48#include <linux/time.h> 48#include <linux/time.h>
49#include <linux/kernel_stat.h>
49 50
50#include "rcutree.h" 51#include "rcutree.h"
51 52
@@ -53,8 +54,8 @@
53 54
54static struct lock_class_key rcu_node_class[NUM_RCU_LVLS]; 55static struct lock_class_key rcu_node_class[NUM_RCU_LVLS];
55 56
56#define RCU_STATE_INITIALIZER(name) { \ 57#define RCU_STATE_INITIALIZER(structname) { \
57 .level = { &name.node[0] }, \ 58 .level = { &structname.node[0] }, \
58 .levelcnt = { \ 59 .levelcnt = { \
59 NUM_RCU_LVL_0, /* root of hierarchy. */ \ 60 NUM_RCU_LVL_0, /* root of hierarchy. */ \
60 NUM_RCU_LVL_1, \ 61 NUM_RCU_LVL_1, \
@@ -65,13 +66,14 @@ static struct lock_class_key rcu_node_class[NUM_RCU_LVLS];
65 .signaled = RCU_GP_IDLE, \ 66 .signaled = RCU_GP_IDLE, \
66 .gpnum = -300, \ 67 .gpnum = -300, \
67 .completed = -300, \ 68 .completed = -300, \
68 .onofflock = __RAW_SPIN_LOCK_UNLOCKED(&name.onofflock), \ 69 .onofflock = __RAW_SPIN_LOCK_UNLOCKED(&structname.onofflock), \
69 .orphan_cbs_list = NULL, \ 70 .orphan_cbs_list = NULL, \
70 .orphan_cbs_tail = &name.orphan_cbs_list, \ 71 .orphan_cbs_tail = &structname.orphan_cbs_list, \
71 .orphan_qlen = 0, \ 72 .orphan_qlen = 0, \
72 .fqslock = __RAW_SPIN_LOCK_UNLOCKED(&name.fqslock), \ 73 .fqslock = __RAW_SPIN_LOCK_UNLOCKED(&structname.fqslock), \
73 .n_force_qs = 0, \ 74 .n_force_qs = 0, \
74 .n_force_qs_ngp = 0, \ 75 .n_force_qs_ngp = 0, \
76 .name = #structname, \
75} 77}
76 78
77struct rcu_state rcu_sched_state = RCU_STATE_INITIALIZER(rcu_sched_state); 79struct rcu_state rcu_sched_state = RCU_STATE_INITIALIZER(rcu_sched_state);
@@ -80,6 +82,9 @@ DEFINE_PER_CPU(struct rcu_data, rcu_sched_data);
80struct rcu_state rcu_bh_state = RCU_STATE_INITIALIZER(rcu_bh_state); 82struct rcu_state rcu_bh_state = RCU_STATE_INITIALIZER(rcu_bh_state);
81DEFINE_PER_CPU(struct rcu_data, rcu_bh_data); 83DEFINE_PER_CPU(struct rcu_data, rcu_bh_data);
82 84
85int rcu_scheduler_active __read_mostly;
86EXPORT_SYMBOL_GPL(rcu_scheduler_active);
87
83/* 88/*
84 * Return true if an RCU grace period is in progress. The ACCESS_ONCE()s 89 * Return true if an RCU grace period is in progress. The ACCESS_ONCE()s
85 * permit this function to be invoked without holding the root rcu_node 90 * permit this function to be invoked without holding the root rcu_node
@@ -97,25 +102,32 @@ static int rcu_gp_in_progress(struct rcu_state *rsp)
97 */ 102 */
98void rcu_sched_qs(int cpu) 103void rcu_sched_qs(int cpu)
99{ 104{
100 struct rcu_data *rdp; 105 struct rcu_data *rdp = &per_cpu(rcu_sched_data, cpu);
101 106
102 rdp = &per_cpu(rcu_sched_data, cpu);
103 rdp->passed_quiesc_completed = rdp->gpnum - 1; 107 rdp->passed_quiesc_completed = rdp->gpnum - 1;
104 barrier(); 108 barrier();
105 rdp->passed_quiesc = 1; 109 rdp->passed_quiesc = 1;
106 rcu_preempt_note_context_switch(cpu);
107} 110}
108 111
109void rcu_bh_qs(int cpu) 112void rcu_bh_qs(int cpu)
110{ 113{
111 struct rcu_data *rdp; 114 struct rcu_data *rdp = &per_cpu(rcu_bh_data, cpu);
112 115
113 rdp = &per_cpu(rcu_bh_data, cpu);
114 rdp->passed_quiesc_completed = rdp->gpnum - 1; 116 rdp->passed_quiesc_completed = rdp->gpnum - 1;
115 barrier(); 117 barrier();
116 rdp->passed_quiesc = 1; 118 rdp->passed_quiesc = 1;
117} 119}
118 120
121/*
122 * Note a context switch. This is a quiescent state for RCU-sched,
123 * and requires special handling for preemptible RCU.
124 */
125void rcu_note_context_switch(int cpu)
126{
127 rcu_sched_qs(cpu);
128 rcu_preempt_note_context_switch(cpu);
129}
130
119#ifdef CONFIG_NO_HZ 131#ifdef CONFIG_NO_HZ
120DEFINE_PER_CPU(struct rcu_dynticks, rcu_dynticks) = { 132DEFINE_PER_CPU(struct rcu_dynticks, rcu_dynticks) = {
121 .dynticks_nesting = 1, 133 .dynticks_nesting = 1,
@@ -438,6 +450,8 @@ static int rcu_implicit_dynticks_qs(struct rcu_data *rdp)
438 450
439#ifdef CONFIG_RCU_CPU_STALL_DETECTOR 451#ifdef CONFIG_RCU_CPU_STALL_DETECTOR
440 452
453int rcu_cpu_stall_panicking __read_mostly;
454
441static void record_gp_stall_check_time(struct rcu_state *rsp) 455static void record_gp_stall_check_time(struct rcu_state *rsp)
442{ 456{
443 rsp->gp_start = jiffies; 457 rsp->gp_start = jiffies;
@@ -470,7 +484,8 @@ static void print_other_cpu_stall(struct rcu_state *rsp)
470 484
471 /* OK, time to rat on our buddy... */ 485 /* OK, time to rat on our buddy... */
472 486
473 printk(KERN_ERR "INFO: RCU detected CPU stalls:"); 487 printk(KERN_ERR "INFO: %s detected stalls on CPUs/tasks: {",
488 rsp->name);
474 rcu_for_each_leaf_node(rsp, rnp) { 489 rcu_for_each_leaf_node(rsp, rnp) {
475 raw_spin_lock_irqsave(&rnp->lock, flags); 490 raw_spin_lock_irqsave(&rnp->lock, flags);
476 rcu_print_task_stall(rnp); 491 rcu_print_task_stall(rnp);
@@ -481,7 +496,7 @@ static void print_other_cpu_stall(struct rcu_state *rsp)
481 if (rnp->qsmask & (1UL << cpu)) 496 if (rnp->qsmask & (1UL << cpu))
482 printk(" %d", rnp->grplo + cpu); 497 printk(" %d", rnp->grplo + cpu);
483 } 498 }
484 printk(" (detected by %d, t=%ld jiffies)\n", 499 printk("} (detected by %d, t=%ld jiffies)\n",
485 smp_processor_id(), (long)(jiffies - rsp->gp_start)); 500 smp_processor_id(), (long)(jiffies - rsp->gp_start));
486 trigger_all_cpu_backtrace(); 501 trigger_all_cpu_backtrace();
487 502
@@ -497,8 +512,8 @@ static void print_cpu_stall(struct rcu_state *rsp)
497 unsigned long flags; 512 unsigned long flags;
498 struct rcu_node *rnp = rcu_get_root(rsp); 513 struct rcu_node *rnp = rcu_get_root(rsp);
499 514
500 printk(KERN_ERR "INFO: RCU detected CPU %d stall (t=%lu jiffies)\n", 515 printk(KERN_ERR "INFO: %s detected stall on CPU %d (t=%lu jiffies)\n",
501 smp_processor_id(), jiffies - rsp->gp_start); 516 rsp->name, smp_processor_id(), jiffies - rsp->gp_start);
502 trigger_all_cpu_backtrace(); 517 trigger_all_cpu_backtrace();
503 518
504 raw_spin_lock_irqsave(&rnp->lock, flags); 519 raw_spin_lock_irqsave(&rnp->lock, flags);
@@ -515,6 +530,8 @@ static void check_cpu_stall(struct rcu_state *rsp, struct rcu_data *rdp)
515 long delta; 530 long delta;
516 struct rcu_node *rnp; 531 struct rcu_node *rnp;
517 532
533 if (rcu_cpu_stall_panicking)
534 return;
518 delta = jiffies - rsp->jiffies_stall; 535 delta = jiffies - rsp->jiffies_stall;
519 rnp = rdp->mynode; 536 rnp = rdp->mynode;
520 if ((rnp->qsmask & rdp->grpmask) && delta >= 0) { 537 if ((rnp->qsmask & rdp->grpmask) && delta >= 0) {
@@ -529,6 +546,21 @@ static void check_cpu_stall(struct rcu_state *rsp, struct rcu_data *rdp)
529 } 546 }
530} 547}
531 548
549static int rcu_panic(struct notifier_block *this, unsigned long ev, void *ptr)
550{
551 rcu_cpu_stall_panicking = 1;
552 return NOTIFY_DONE;
553}
554
555static struct notifier_block rcu_panic_block = {
556 .notifier_call = rcu_panic,
557};
558
559static void __init check_cpu_stall_init(void)
560{
561 atomic_notifier_chain_register(&panic_notifier_list, &rcu_panic_block);
562}
563
532#else /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */ 564#else /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */
533 565
534static void record_gp_stall_check_time(struct rcu_state *rsp) 566static void record_gp_stall_check_time(struct rcu_state *rsp)
@@ -539,6 +571,10 @@ static void check_cpu_stall(struct rcu_state *rsp, struct rcu_data *rdp)
539{ 571{
540} 572}
541 573
574static void __init check_cpu_stall_init(void)
575{
576}
577
542#endif /* #else #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */ 578#endif /* #else #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */
543 579
544/* 580/*
@@ -1125,8 +1161,6 @@ static void rcu_do_batch(struct rcu_state *rsp, struct rcu_data *rdp)
1125 */ 1161 */
1126void rcu_check_callbacks(int cpu, int user) 1162void rcu_check_callbacks(int cpu, int user)
1127{ 1163{
1128 if (!rcu_pending(cpu))
1129 return; /* if nothing for RCU to do. */
1130 if (user || 1164 if (user ||
1131 (idle_cpu(cpu) && rcu_scheduler_active && 1165 (idle_cpu(cpu) && rcu_scheduler_active &&
1132 !in_softirq() && hardirq_count() <= (1 << HARDIRQ_SHIFT))) { 1166 !in_softirq() && hardirq_count() <= (1 << HARDIRQ_SHIFT))) {
@@ -1158,7 +1192,8 @@ void rcu_check_callbacks(int cpu, int user)
1158 rcu_bh_qs(cpu); 1192 rcu_bh_qs(cpu);
1159 } 1193 }
1160 rcu_preempt_check_callbacks(cpu); 1194 rcu_preempt_check_callbacks(cpu);
1161 raise_softirq(RCU_SOFTIRQ); 1195 if (rcu_pending(cpu))
1196 raise_softirq(RCU_SOFTIRQ);
1162} 1197}
1163 1198
1164#ifdef CONFIG_SMP 1199#ifdef CONFIG_SMP
@@ -1236,11 +1271,11 @@ static void force_quiescent_state(struct rcu_state *rsp, int relaxed)
1236 break; /* grace period idle or initializing, ignore. */ 1271 break; /* grace period idle or initializing, ignore. */
1237 1272
1238 case RCU_SAVE_DYNTICK: 1273 case RCU_SAVE_DYNTICK:
1239
1240 raw_spin_unlock(&rnp->lock); /* irqs remain disabled */
1241 if (RCU_SIGNAL_INIT != RCU_SAVE_DYNTICK) 1274 if (RCU_SIGNAL_INIT != RCU_SAVE_DYNTICK)
1242 break; /* So gcc recognizes the dead code. */ 1275 break; /* So gcc recognizes the dead code. */
1243 1276
1277 raw_spin_unlock(&rnp->lock); /* irqs remain disabled */
1278
1244 /* Record dyntick-idle state. */ 1279 /* Record dyntick-idle state. */
1245 force_qs_rnp(rsp, dyntick_save_progress_counter); 1280 force_qs_rnp(rsp, dyntick_save_progress_counter);
1246 raw_spin_lock(&rnp->lock); /* irqs already disabled */ 1281 raw_spin_lock(&rnp->lock); /* irqs already disabled */
@@ -1449,11 +1484,13 @@ void synchronize_sched(void)
1449 if (rcu_blocking_is_gp()) 1484 if (rcu_blocking_is_gp())
1450 return; 1485 return;
1451 1486
1487 init_rcu_head_on_stack(&rcu.head);
1452 init_completion(&rcu.completion); 1488 init_completion(&rcu.completion);
1453 /* Will wake me after RCU finished. */ 1489 /* Will wake me after RCU finished. */
1454 call_rcu_sched(&rcu.head, wakeme_after_rcu); 1490 call_rcu_sched(&rcu.head, wakeme_after_rcu);
1455 /* Wait for it. */ 1491 /* Wait for it. */
1456 wait_for_completion(&rcu.completion); 1492 wait_for_completion(&rcu.completion);
1493 destroy_rcu_head_on_stack(&rcu.head);
1457} 1494}
1458EXPORT_SYMBOL_GPL(synchronize_sched); 1495EXPORT_SYMBOL_GPL(synchronize_sched);
1459 1496
@@ -1473,11 +1510,13 @@ void synchronize_rcu_bh(void)
1473 if (rcu_blocking_is_gp()) 1510 if (rcu_blocking_is_gp())
1474 return; 1511 return;
1475 1512
1513 init_rcu_head_on_stack(&rcu.head);
1476 init_completion(&rcu.completion); 1514 init_completion(&rcu.completion);
1477 /* Will wake me after RCU finished. */ 1515 /* Will wake me after RCU finished. */
1478 call_rcu_bh(&rcu.head, wakeme_after_rcu); 1516 call_rcu_bh(&rcu.head, wakeme_after_rcu);
1479 /* Wait for it. */ 1517 /* Wait for it. */
1480 wait_for_completion(&rcu.completion); 1518 wait_for_completion(&rcu.completion);
1519 destroy_rcu_head_on_stack(&rcu.head);
1481} 1520}
1482EXPORT_SYMBOL_GPL(synchronize_rcu_bh); 1521EXPORT_SYMBOL_GPL(synchronize_rcu_bh);
1483 1522
@@ -1498,8 +1537,20 @@ static int __rcu_pending(struct rcu_state *rsp, struct rcu_data *rdp)
1498 check_cpu_stall(rsp, rdp); 1537 check_cpu_stall(rsp, rdp);
1499 1538
1500 /* Is the RCU core waiting for a quiescent state from this CPU? */ 1539 /* Is the RCU core waiting for a quiescent state from this CPU? */
1501 if (rdp->qs_pending) { 1540 if (rdp->qs_pending && !rdp->passed_quiesc) {
1541
1542 /*
1543 * If force_quiescent_state() coming soon and this CPU
1544 * needs a quiescent state, and this is either RCU-sched
1545 * or RCU-bh, force a local reschedule.
1546 */
1502 rdp->n_rp_qs_pending++; 1547 rdp->n_rp_qs_pending++;
1548 if (!rdp->preemptable &&
1549 ULONG_CMP_LT(ACCESS_ONCE(rsp->jiffies_force_qs) - 1,
1550 jiffies))
1551 set_need_resched();
1552 } else if (rdp->qs_pending && rdp->passed_quiesc) {
1553 rdp->n_rp_report_qs++;
1503 return 1; 1554 return 1;
1504 } 1555 }
1505 1556
@@ -1767,6 +1818,21 @@ static int __cpuinit rcu_cpu_notify(struct notifier_block *self,
1767} 1818}
1768 1819
1769/* 1820/*
1821 * This function is invoked towards the end of the scheduler's initialization
1822 * process. Before this is called, the idle task might contain
1823 * RCU read-side critical sections (during which time, this idle
1824 * task is booting the system). After this function is called, the
1825 * idle tasks are prohibited from containing RCU read-side critical
1826 * sections. This function also enables RCU lockdep checking.
1827 */
1828void rcu_scheduler_starting(void)
1829{
1830 WARN_ON(num_online_cpus() != 1);
1831 WARN_ON(nr_context_switches() > 0);
1832 rcu_scheduler_active = 1;
1833}
1834
1835/*
1770 * Compute the per-level fanout, either using the exact fanout specified 1836 * Compute the per-level fanout, either using the exact fanout specified
1771 * or balancing the tree, depending on CONFIG_RCU_FANOUT_EXACT. 1837 * or balancing the tree, depending on CONFIG_RCU_FANOUT_EXACT.
1772 */ 1838 */
@@ -1849,6 +1915,14 @@ static void __init rcu_init_one(struct rcu_state *rsp)
1849 INIT_LIST_HEAD(&rnp->blocked_tasks[3]); 1915 INIT_LIST_HEAD(&rnp->blocked_tasks[3]);
1850 } 1916 }
1851 } 1917 }
1918
1919 rnp = rsp->level[NUM_RCU_LVLS - 1];
1920 for_each_possible_cpu(i) {
1921 while (i > rnp->grphi)
1922 rnp++;
1923 rsp->rda[i]->mynode = rnp;
1924 rcu_boot_init_percpu_data(i, rsp);
1925 }
1852} 1926}
1853 1927
1854/* 1928/*
@@ -1859,19 +1933,11 @@ static void __init rcu_init_one(struct rcu_state *rsp)
1859#define RCU_INIT_FLAVOR(rsp, rcu_data) \ 1933#define RCU_INIT_FLAVOR(rsp, rcu_data) \
1860do { \ 1934do { \
1861 int i; \ 1935 int i; \
1862 int j; \
1863 struct rcu_node *rnp; \
1864 \ 1936 \
1865 rcu_init_one(rsp); \
1866 rnp = (rsp)->level[NUM_RCU_LVLS - 1]; \
1867 j = 0; \
1868 for_each_possible_cpu(i) { \ 1937 for_each_possible_cpu(i) { \
1869 if (i > rnp[j].grphi) \
1870 j++; \
1871 per_cpu(rcu_data, i).mynode = &rnp[j]; \
1872 (rsp)->rda[i] = &per_cpu(rcu_data, i); \ 1938 (rsp)->rda[i] = &per_cpu(rcu_data, i); \
1873 rcu_boot_init_percpu_data(i, rsp); \
1874 } \ 1939 } \
1940 rcu_init_one(rsp); \
1875} while (0) 1941} while (0)
1876 1942
1877void __init rcu_init(void) 1943void __init rcu_init(void)
@@ -1879,12 +1945,6 @@ void __init rcu_init(void)
1879 int cpu; 1945 int cpu;
1880 1946
1881 rcu_bootup_announce(); 1947 rcu_bootup_announce();
1882#ifdef CONFIG_RCU_CPU_STALL_DETECTOR
1883 printk(KERN_INFO "RCU-based detection of stalled CPUs is enabled.\n");
1884#endif /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */
1885#if NUM_RCU_LVL_4 != 0
1886 printk(KERN_INFO "Experimental four-level hierarchy is enabled.\n");
1887#endif /* #if NUM_RCU_LVL_4 != 0 */
1888 RCU_INIT_FLAVOR(&rcu_sched_state, rcu_sched_data); 1948 RCU_INIT_FLAVOR(&rcu_sched_state, rcu_sched_data);
1889 RCU_INIT_FLAVOR(&rcu_bh_state, rcu_bh_data); 1949 RCU_INIT_FLAVOR(&rcu_bh_state, rcu_bh_data);
1890 __rcu_init_preempt(); 1950 __rcu_init_preempt();
@@ -1898,6 +1958,7 @@ void __init rcu_init(void)
1898 cpu_notifier(rcu_cpu_notify, 0); 1958 cpu_notifier(rcu_cpu_notify, 0);
1899 for_each_online_cpu(cpu) 1959 for_each_online_cpu(cpu)
1900 rcu_cpu_notify(NULL, CPU_UP_PREPARE, (void *)(long)cpu); 1960 rcu_cpu_notify(NULL, CPU_UP_PREPARE, (void *)(long)cpu);
1961 check_cpu_stall_init();
1901} 1962}
1902 1963
1903#include "rcutree_plugin.h" 1964#include "rcutree_plugin.h"
diff --git a/kernel/rcutree.h b/kernel/rcutree.h
index 4a525a30e08e..14c040b18ed0 100644
--- a/kernel/rcutree.h
+++ b/kernel/rcutree.h
@@ -223,6 +223,7 @@ struct rcu_data {
223 /* 5) __rcu_pending() statistics. */ 223 /* 5) __rcu_pending() statistics. */
224 unsigned long n_rcu_pending; /* rcu_pending() calls since boot. */ 224 unsigned long n_rcu_pending; /* rcu_pending() calls since boot. */
225 unsigned long n_rp_qs_pending; 225 unsigned long n_rp_qs_pending;
226 unsigned long n_rp_report_qs;
226 unsigned long n_rp_cb_ready; 227 unsigned long n_rp_cb_ready;
227 unsigned long n_rp_cpu_needs_gp; 228 unsigned long n_rp_cpu_needs_gp;
228 unsigned long n_rp_gp_completed; 229 unsigned long n_rp_gp_completed;
@@ -326,6 +327,7 @@ struct rcu_state {
326 unsigned long jiffies_stall; /* Time at which to check */ 327 unsigned long jiffies_stall; /* Time at which to check */
327 /* for CPU stalls. */ 328 /* for CPU stalls. */
328#endif /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */ 329#endif /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */
330 char *name; /* Name of structure. */
329}; 331};
330 332
331/* Return values for rcu_preempt_offline_tasks(). */ 333/* Return values for rcu_preempt_offline_tasks(). */
diff --git a/kernel/rcutree_plugin.h b/kernel/rcutree_plugin.h
index 79b53bda8943..0e4f420245d9 100644
--- a/kernel/rcutree_plugin.h
+++ b/kernel/rcutree_plugin.h
@@ -26,6 +26,45 @@
26 26
27#include <linux/delay.h> 27#include <linux/delay.h>
28 28
29/*
30 * Check the RCU kernel configuration parameters and print informative
31 * messages about anything out of the ordinary. If you like #ifdef, you
32 * will love this function.
33 */
34static void __init rcu_bootup_announce_oddness(void)
35{
36#ifdef CONFIG_RCU_TRACE
37 printk(KERN_INFO "\tRCU debugfs-based tracing is enabled.\n");
38#endif
39#if (defined(CONFIG_64BIT) && CONFIG_RCU_FANOUT != 64) || (!defined(CONFIG_64BIT) && CONFIG_RCU_FANOUT != 32)
40 printk(KERN_INFO "\tCONFIG_RCU_FANOUT set to non-default value of %d\n",
41 CONFIG_RCU_FANOUT);
42#endif
43#ifdef CONFIG_RCU_FANOUT_EXACT
44 printk(KERN_INFO "\tHierarchical RCU autobalancing is disabled.\n");
45#endif
46#ifdef CONFIG_RCU_FAST_NO_HZ
47 printk(KERN_INFO
48 "\tRCU dyntick-idle grace-period acceleration is enabled.\n");
49#endif
50#ifdef CONFIG_PROVE_RCU
51 printk(KERN_INFO "\tRCU lockdep checking is enabled.\n");
52#endif
53#ifdef CONFIG_RCU_TORTURE_TEST_RUNNABLE
54 printk(KERN_INFO "\tRCU torture testing starts during boot.\n");
55#endif
56#ifndef CONFIG_RCU_CPU_STALL_DETECTOR
57 printk(KERN_INFO
58 "\tRCU-based detection of stalled CPUs is disabled.\n");
59#endif
60#ifndef CONFIG_RCU_CPU_STALL_VERBOSE
61 printk(KERN_INFO "\tVerbose stalled-CPUs detection is disabled.\n");
62#endif
63#if NUM_RCU_LVL_4 != 0
64 printk(KERN_INFO "\tExperimental four-level hierarchy is enabled.\n");
65#endif
66}
67
29#ifdef CONFIG_TREE_PREEMPT_RCU 68#ifdef CONFIG_TREE_PREEMPT_RCU
30 69
31struct rcu_state rcu_preempt_state = RCU_STATE_INITIALIZER(rcu_preempt_state); 70struct rcu_state rcu_preempt_state = RCU_STATE_INITIALIZER(rcu_preempt_state);
@@ -38,8 +77,8 @@ static int rcu_preempted_readers_exp(struct rcu_node *rnp);
38 */ 77 */
39static void __init rcu_bootup_announce(void) 78static void __init rcu_bootup_announce(void)
40{ 79{
41 printk(KERN_INFO 80 printk(KERN_INFO "Preemptable hierarchical RCU implementation.\n");
42 "Experimental preemptable hierarchical RCU implementation.\n"); 81 rcu_bootup_announce_oddness();
43} 82}
44 83
45/* 84/*
@@ -75,13 +114,19 @@ EXPORT_SYMBOL_GPL(rcu_force_quiescent_state);
75 * that this just means that the task currently running on the CPU is 114 * that this just means that the task currently running on the CPU is
76 * not in a quiescent state. There might be any number of tasks blocked 115 * not in a quiescent state. There might be any number of tasks blocked
77 * while in an RCU read-side critical section. 116 * while in an RCU read-side critical section.
117 *
118 * Unlike the other rcu_*_qs() functions, callers to this function
119 * must disable irqs in order to protect the assignment to
120 * ->rcu_read_unlock_special.
78 */ 121 */
79static void rcu_preempt_qs(int cpu) 122static void rcu_preempt_qs(int cpu)
80{ 123{
81 struct rcu_data *rdp = &per_cpu(rcu_preempt_data, cpu); 124 struct rcu_data *rdp = &per_cpu(rcu_preempt_data, cpu);
125
82 rdp->passed_quiesc_completed = rdp->gpnum - 1; 126 rdp->passed_quiesc_completed = rdp->gpnum - 1;
83 barrier(); 127 barrier();
84 rdp->passed_quiesc = 1; 128 rdp->passed_quiesc = 1;
129 current->rcu_read_unlock_special &= ~RCU_READ_UNLOCK_NEED_QS;
85} 130}
86 131
87/* 132/*
@@ -144,9 +189,8 @@ static void rcu_preempt_note_context_switch(int cpu)
144 * grace period, then the fact that the task has been enqueued 189 * grace period, then the fact that the task has been enqueued
145 * means that we continue to block the current grace period. 190 * means that we continue to block the current grace period.
146 */ 191 */
147 rcu_preempt_qs(cpu);
148 local_irq_save(flags); 192 local_irq_save(flags);
149 t->rcu_read_unlock_special &= ~RCU_READ_UNLOCK_NEED_QS; 193 rcu_preempt_qs(cpu);
150 local_irq_restore(flags); 194 local_irq_restore(flags);
151} 195}
152 196
@@ -236,7 +280,6 @@ static void rcu_read_unlock_special(struct task_struct *t)
236 */ 280 */
237 special = t->rcu_read_unlock_special; 281 special = t->rcu_read_unlock_special;
238 if (special & RCU_READ_UNLOCK_NEED_QS) { 282 if (special & RCU_READ_UNLOCK_NEED_QS) {
239 t->rcu_read_unlock_special &= ~RCU_READ_UNLOCK_NEED_QS;
240 rcu_preempt_qs(smp_processor_id()); 283 rcu_preempt_qs(smp_processor_id());
241 } 284 }
242 285
@@ -473,7 +516,6 @@ static void rcu_preempt_check_callbacks(int cpu)
473 struct task_struct *t = current; 516 struct task_struct *t = current;
474 517
475 if (t->rcu_read_lock_nesting == 0) { 518 if (t->rcu_read_lock_nesting == 0) {
476 t->rcu_read_unlock_special &= ~RCU_READ_UNLOCK_NEED_QS;
477 rcu_preempt_qs(cpu); 519 rcu_preempt_qs(cpu);
478 return; 520 return;
479 } 521 }
@@ -515,11 +557,13 @@ void synchronize_rcu(void)
515 if (!rcu_scheduler_active) 557 if (!rcu_scheduler_active)
516 return; 558 return;
517 559
560 init_rcu_head_on_stack(&rcu.head);
518 init_completion(&rcu.completion); 561 init_completion(&rcu.completion);
519 /* Will wake me after RCU finished. */ 562 /* Will wake me after RCU finished. */
520 call_rcu(&rcu.head, wakeme_after_rcu); 563 call_rcu(&rcu.head, wakeme_after_rcu);
521 /* Wait for it. */ 564 /* Wait for it. */
522 wait_for_completion(&rcu.completion); 565 wait_for_completion(&rcu.completion);
566 destroy_rcu_head_on_stack(&rcu.head);
523} 567}
524EXPORT_SYMBOL_GPL(synchronize_rcu); 568EXPORT_SYMBOL_GPL(synchronize_rcu);
525 569
@@ -754,6 +798,7 @@ void exit_rcu(void)
754static void __init rcu_bootup_announce(void) 798static void __init rcu_bootup_announce(void)
755{ 799{
756 printk(KERN_INFO "Hierarchical RCU implementation.\n"); 800 printk(KERN_INFO "Hierarchical RCU implementation.\n");
801 rcu_bootup_announce_oddness();
757} 802}
758 803
759/* 804/*
@@ -1008,6 +1053,8 @@ static DEFINE_PER_CPU(unsigned long, rcu_dyntick_holdoff);
1008int rcu_needs_cpu(int cpu) 1053int rcu_needs_cpu(int cpu)
1009{ 1054{
1010 int c = 0; 1055 int c = 0;
1056 int snap;
1057 int snap_nmi;
1011 int thatcpu; 1058 int thatcpu;
1012 1059
1013 /* Check for being in the holdoff period. */ 1060 /* Check for being in the holdoff period. */
@@ -1015,12 +1062,18 @@ int rcu_needs_cpu(int cpu)
1015 return rcu_needs_cpu_quick_check(cpu); 1062 return rcu_needs_cpu_quick_check(cpu);
1016 1063
1017 /* Don't bother unless we are the last non-dyntick-idle CPU. */ 1064 /* Don't bother unless we are the last non-dyntick-idle CPU. */
1018 for_each_cpu_not(thatcpu, nohz_cpu_mask) 1065 for_each_online_cpu(thatcpu) {
1019 if (thatcpu != cpu) { 1066 if (thatcpu == cpu)
1067 continue;
1068 snap = per_cpu(rcu_dynticks, thatcpu).dynticks;
1069 snap_nmi = per_cpu(rcu_dynticks, thatcpu).dynticks_nmi;
1070 smp_mb(); /* Order sampling of snap with end of grace period. */
1071 if (((snap & 0x1) != 0) || ((snap_nmi & 0x1) != 0)) {
1020 per_cpu(rcu_dyntick_drain, cpu) = 0; 1072 per_cpu(rcu_dyntick_drain, cpu) = 0;
1021 per_cpu(rcu_dyntick_holdoff, cpu) = jiffies - 1; 1073 per_cpu(rcu_dyntick_holdoff, cpu) = jiffies - 1;
1022 return rcu_needs_cpu_quick_check(cpu); 1074 return rcu_needs_cpu_quick_check(cpu);
1023 } 1075 }
1076 }
1024 1077
1025 /* Check and update the rcu_dyntick_drain sequencing. */ 1078 /* Check and update the rcu_dyntick_drain sequencing. */
1026 if (per_cpu(rcu_dyntick_drain, cpu) <= 0) { 1079 if (per_cpu(rcu_dyntick_drain, cpu) <= 0) {
diff --git a/kernel/rcutree_trace.c b/kernel/rcutree_trace.c
index d45db2e35d27..36c95b45738e 100644
--- a/kernel/rcutree_trace.c
+++ b/kernel/rcutree_trace.c
@@ -241,11 +241,13 @@ static const struct file_operations rcugp_fops = {
241static void print_one_rcu_pending(struct seq_file *m, struct rcu_data *rdp) 241static void print_one_rcu_pending(struct seq_file *m, struct rcu_data *rdp)
242{ 242{
243 seq_printf(m, "%3d%cnp=%ld " 243 seq_printf(m, "%3d%cnp=%ld "
244 "qsp=%ld cbr=%ld cng=%ld gpc=%ld gps=%ld nf=%ld nn=%ld\n", 244 "qsp=%ld rpq=%ld cbr=%ld cng=%ld "
245 "gpc=%ld gps=%ld nf=%ld nn=%ld\n",
245 rdp->cpu, 246 rdp->cpu,
246 cpu_is_offline(rdp->cpu) ? '!' : ' ', 247 cpu_is_offline(rdp->cpu) ? '!' : ' ',
247 rdp->n_rcu_pending, 248 rdp->n_rcu_pending,
248 rdp->n_rp_qs_pending, 249 rdp->n_rp_qs_pending,
250 rdp->n_rp_report_qs,
249 rdp->n_rp_cb_ready, 251 rdp->n_rp_cb_ready,
250 rdp->n_rp_cpu_needs_gp, 252 rdp->n_rp_cpu_needs_gp,
251 rdp->n_rp_gp_completed, 253 rdp->n_rp_gp_completed,
diff --git a/kernel/sched.c b/kernel/sched.c
index 3c2a54f70ffe..1d93cd0ae4d3 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -55,9 +55,9 @@
55#include <linux/cpu.h> 55#include <linux/cpu.h>
56#include <linux/cpuset.h> 56#include <linux/cpuset.h>
57#include <linux/percpu.h> 57#include <linux/percpu.h>
58#include <linux/kthread.h>
59#include <linux/proc_fs.h> 58#include <linux/proc_fs.h>
60#include <linux/seq_file.h> 59#include <linux/seq_file.h>
60#include <linux/stop_machine.h>
61#include <linux/sysctl.h> 61#include <linux/sysctl.h>
62#include <linux/syscalls.h> 62#include <linux/syscalls.h>
63#include <linux/times.h> 63#include <linux/times.h>
@@ -503,8 +503,11 @@ struct rq {
503 #define CPU_LOAD_IDX_MAX 5 503 #define CPU_LOAD_IDX_MAX 5
504 unsigned long cpu_load[CPU_LOAD_IDX_MAX]; 504 unsigned long cpu_load[CPU_LOAD_IDX_MAX];
505#ifdef CONFIG_NO_HZ 505#ifdef CONFIG_NO_HZ
506 u64 nohz_stamp;
506 unsigned char in_nohz_recently; 507 unsigned char in_nohz_recently;
507#endif 508#endif
509 unsigned int skip_clock_update;
510
508 /* capture load from *all* tasks on this cpu: */ 511 /* capture load from *all* tasks on this cpu: */
509 struct load_weight load; 512 struct load_weight load;
510 unsigned long nr_load_updates; 513 unsigned long nr_load_updates;
@@ -546,15 +549,13 @@ struct rq {
546 int post_schedule; 549 int post_schedule;
547 int active_balance; 550 int active_balance;
548 int push_cpu; 551 int push_cpu;
552 struct cpu_stop_work active_balance_work;
549 /* cpu of this runqueue: */ 553 /* cpu of this runqueue: */
550 int cpu; 554 int cpu;
551 int online; 555 int online;
552 556
553 unsigned long avg_load_per_task; 557 unsigned long avg_load_per_task;
554 558
555 struct task_struct *migration_thread;
556 struct list_head migration_queue;
557
558 u64 rt_avg; 559 u64 rt_avg;
559 u64 age_stamp; 560 u64 age_stamp;
560 u64 idle_stamp; 561 u64 idle_stamp;
@@ -602,6 +603,13 @@ static inline
602void check_preempt_curr(struct rq *rq, struct task_struct *p, int flags) 603void check_preempt_curr(struct rq *rq, struct task_struct *p, int flags)
603{ 604{
604 rq->curr->sched_class->check_preempt_curr(rq, p, flags); 605 rq->curr->sched_class->check_preempt_curr(rq, p, flags);
606
607 /*
608 * A queue event has occurred, and we're going to schedule. In
609 * this case, we can save a useless back to back clock update.
610 */
611 if (test_tsk_need_resched(p))
612 rq->skip_clock_update = 1;
605} 613}
606 614
607static inline int cpu_of(struct rq *rq) 615static inline int cpu_of(struct rq *rq)
@@ -636,7 +644,8 @@ static inline int cpu_of(struct rq *rq)
636 644
637inline void update_rq_clock(struct rq *rq) 645inline void update_rq_clock(struct rq *rq)
638{ 646{
639 rq->clock = sched_clock_cpu(cpu_of(rq)); 647 if (!rq->skip_clock_update)
648 rq->clock = sched_clock_cpu(cpu_of(rq));
640} 649}
641 650
642/* 651/*
@@ -914,16 +923,12 @@ static inline void finish_lock_switch(struct rq *rq, struct task_struct *prev)
914#endif /* __ARCH_WANT_UNLOCKED_CTXSW */ 923#endif /* __ARCH_WANT_UNLOCKED_CTXSW */
915 924
916/* 925/*
917 * Check whether the task is waking, we use this to synchronize against 926 * Check whether the task is waking, we use this to synchronize ->cpus_allowed
918 * ttwu() so that task_cpu() reports a stable number. 927 * against ttwu().
919 *
920 * We need to make an exception for PF_STARTING tasks because the fork
921 * path might require task_rq_lock() to work, eg. it can call
922 * set_cpus_allowed_ptr() from the cpuset clone_ns code.
923 */ 928 */
924static inline int task_is_waking(struct task_struct *p) 929static inline int task_is_waking(struct task_struct *p)
925{ 930{
926 return unlikely((p->state == TASK_WAKING) && !(p->flags & PF_STARTING)); 931 return unlikely(p->state == TASK_WAKING);
927} 932}
928 933
929/* 934/*
@@ -936,11 +941,9 @@ static inline struct rq *__task_rq_lock(struct task_struct *p)
936 struct rq *rq; 941 struct rq *rq;
937 942
938 for (;;) { 943 for (;;) {
939 while (task_is_waking(p))
940 cpu_relax();
941 rq = task_rq(p); 944 rq = task_rq(p);
942 raw_spin_lock(&rq->lock); 945 raw_spin_lock(&rq->lock);
943 if (likely(rq == task_rq(p) && !task_is_waking(p))) 946 if (likely(rq == task_rq(p)))
944 return rq; 947 return rq;
945 raw_spin_unlock(&rq->lock); 948 raw_spin_unlock(&rq->lock);
946 } 949 }
@@ -957,12 +960,10 @@ static struct rq *task_rq_lock(struct task_struct *p, unsigned long *flags)
957 struct rq *rq; 960 struct rq *rq;
958 961
959 for (;;) { 962 for (;;) {
960 while (task_is_waking(p))
961 cpu_relax();
962 local_irq_save(*flags); 963 local_irq_save(*flags);
963 rq = task_rq(p); 964 rq = task_rq(p);
964 raw_spin_lock(&rq->lock); 965 raw_spin_lock(&rq->lock);
965 if (likely(rq == task_rq(p) && !task_is_waking(p))) 966 if (likely(rq == task_rq(p)))
966 return rq; 967 return rq;
967 raw_spin_unlock_irqrestore(&rq->lock, *flags); 968 raw_spin_unlock_irqrestore(&rq->lock, *flags);
968 } 969 }
@@ -1239,6 +1240,17 @@ void wake_up_idle_cpu(int cpu)
1239 if (!tsk_is_polling(rq->idle)) 1240 if (!tsk_is_polling(rq->idle))
1240 smp_send_reschedule(cpu); 1241 smp_send_reschedule(cpu);
1241} 1242}
1243
1244int nohz_ratelimit(int cpu)
1245{
1246 struct rq *rq = cpu_rq(cpu);
1247 u64 diff = rq->clock - rq->nohz_stamp;
1248
1249 rq->nohz_stamp = rq->clock;
1250
1251 return diff < (NSEC_PER_SEC / HZ) >> 1;
1252}
1253
1242#endif /* CONFIG_NO_HZ */ 1254#endif /* CONFIG_NO_HZ */
1243 1255
1244static u64 sched_avg_period(void) 1256static u64 sched_avg_period(void)
@@ -1781,8 +1793,6 @@ static void double_rq_lock(struct rq *rq1, struct rq *rq2)
1781 raw_spin_lock_nested(&rq1->lock, SINGLE_DEPTH_NESTING); 1793 raw_spin_lock_nested(&rq1->lock, SINGLE_DEPTH_NESTING);
1782 } 1794 }
1783 } 1795 }
1784 update_rq_clock(rq1);
1785 update_rq_clock(rq2);
1786} 1796}
1787 1797
1788/* 1798/*
@@ -1813,7 +1823,7 @@ static void cfs_rq_set_shares(struct cfs_rq *cfs_rq, unsigned long shares)
1813} 1823}
1814#endif 1824#endif
1815 1825
1816static void calc_load_account_active(struct rq *this_rq); 1826static void calc_load_account_idle(struct rq *this_rq);
1817static void update_sysctl(void); 1827static void update_sysctl(void);
1818static int get_update_sysctl_factor(void); 1828static int get_update_sysctl_factor(void);
1819 1829
@@ -1870,62 +1880,43 @@ static void set_load_weight(struct task_struct *p)
1870 p->se.load.inv_weight = prio_to_wmult[p->static_prio - MAX_RT_PRIO]; 1880 p->se.load.inv_weight = prio_to_wmult[p->static_prio - MAX_RT_PRIO];
1871} 1881}
1872 1882
1873static void update_avg(u64 *avg, u64 sample) 1883static void enqueue_task(struct rq *rq, struct task_struct *p, int flags)
1874{
1875 s64 diff = sample - *avg;
1876 *avg += diff >> 3;
1877}
1878
1879static void
1880enqueue_task(struct rq *rq, struct task_struct *p, int wakeup, bool head)
1881{ 1884{
1882 if (wakeup) 1885 update_rq_clock(rq);
1883 p->se.start_runtime = p->se.sum_exec_runtime;
1884
1885 sched_info_queued(p); 1886 sched_info_queued(p);
1886 p->sched_class->enqueue_task(rq, p, wakeup, head); 1887 p->sched_class->enqueue_task(rq, p, flags);
1887 p->se.on_rq = 1; 1888 p->se.on_rq = 1;
1888} 1889}
1889 1890
1890static void dequeue_task(struct rq *rq, struct task_struct *p, int sleep) 1891static void dequeue_task(struct rq *rq, struct task_struct *p, int flags)
1891{ 1892{
1892 if (sleep) { 1893 update_rq_clock(rq);
1893 if (p->se.last_wakeup) {
1894 update_avg(&p->se.avg_overlap,
1895 p->se.sum_exec_runtime - p->se.last_wakeup);
1896 p->se.last_wakeup = 0;
1897 } else {
1898 update_avg(&p->se.avg_wakeup,
1899 sysctl_sched_wakeup_granularity);
1900 }
1901 }
1902
1903 sched_info_dequeued(p); 1894 sched_info_dequeued(p);
1904 p->sched_class->dequeue_task(rq, p, sleep); 1895 p->sched_class->dequeue_task(rq, p, flags);
1905 p->se.on_rq = 0; 1896 p->se.on_rq = 0;
1906} 1897}
1907 1898
1908/* 1899/*
1909 * activate_task - move a task to the runqueue. 1900 * activate_task - move a task to the runqueue.
1910 */ 1901 */
1911static void activate_task(struct rq *rq, struct task_struct *p, int wakeup) 1902static void activate_task(struct rq *rq, struct task_struct *p, int flags)
1912{ 1903{
1913 if (task_contributes_to_load(p)) 1904 if (task_contributes_to_load(p))
1914 rq->nr_uninterruptible--; 1905 rq->nr_uninterruptible--;
1915 1906
1916 enqueue_task(rq, p, wakeup, false); 1907 enqueue_task(rq, p, flags);
1917 inc_nr_running(rq); 1908 inc_nr_running(rq);
1918} 1909}
1919 1910
1920/* 1911/*
1921 * deactivate_task - remove a task from the runqueue. 1912 * deactivate_task - remove a task from the runqueue.
1922 */ 1913 */
1923static void deactivate_task(struct rq *rq, struct task_struct *p, int sleep) 1914static void deactivate_task(struct rq *rq, struct task_struct *p, int flags)
1924{ 1915{
1925 if (task_contributes_to_load(p)) 1916 if (task_contributes_to_load(p))
1926 rq->nr_uninterruptible++; 1917 rq->nr_uninterruptible++;
1927 1918
1928 dequeue_task(rq, p, sleep); 1919 dequeue_task(rq, p, flags);
1929 dec_nr_running(rq); 1920 dec_nr_running(rq);
1930} 1921}
1931 1922
@@ -2054,21 +2045,18 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
2054 __set_task_cpu(p, new_cpu); 2045 __set_task_cpu(p, new_cpu);
2055} 2046}
2056 2047
2057struct migration_req { 2048struct migration_arg {
2058 struct list_head list;
2059
2060 struct task_struct *task; 2049 struct task_struct *task;
2061 int dest_cpu; 2050 int dest_cpu;
2062
2063 struct completion done;
2064}; 2051};
2065 2052
2053static int migration_cpu_stop(void *data);
2054
2066/* 2055/*
2067 * The task's runqueue lock must be held. 2056 * The task's runqueue lock must be held.
2068 * Returns true if you have to wait for migration thread. 2057 * Returns true if you have to wait for migration thread.
2069 */ 2058 */
2070static int 2059static bool migrate_task(struct task_struct *p, int dest_cpu)
2071migrate_task(struct task_struct *p, int dest_cpu, struct migration_req *req)
2072{ 2060{
2073 struct rq *rq = task_rq(p); 2061 struct rq *rq = task_rq(p);
2074 2062
@@ -2076,58 +2064,7 @@ migrate_task(struct task_struct *p, int dest_cpu, struct migration_req *req)
2076 * If the task is not on a runqueue (and not running), then 2064 * If the task is not on a runqueue (and not running), then
2077 * the next wake-up will properly place the task. 2065 * the next wake-up will properly place the task.
2078 */ 2066 */
2079 if (!p->se.on_rq && !task_running(rq, p)) 2067 return p->se.on_rq || task_running(rq, p);
2080 return 0;
2081
2082 init_completion(&req->done);
2083 req->task = p;
2084 req->dest_cpu = dest_cpu;
2085 list_add(&req->list, &rq->migration_queue);
2086
2087 return 1;
2088}
2089
2090/*
2091 * wait_task_context_switch - wait for a thread to complete at least one
2092 * context switch.
2093 *
2094 * @p must not be current.
2095 */
2096void wait_task_context_switch(struct task_struct *p)
2097{
2098 unsigned long nvcsw, nivcsw, flags;
2099 int running;
2100 struct rq *rq;
2101
2102 nvcsw = p->nvcsw;
2103 nivcsw = p->nivcsw;
2104 for (;;) {
2105 /*
2106 * The runqueue is assigned before the actual context
2107 * switch. We need to take the runqueue lock.
2108 *
2109 * We could check initially without the lock but it is
2110 * very likely that we need to take the lock in every
2111 * iteration.
2112 */
2113 rq = task_rq_lock(p, &flags);
2114 running = task_running(rq, p);
2115 task_rq_unlock(rq, &flags);
2116
2117 if (likely(!running))
2118 break;
2119 /*
2120 * The switch count is incremented before the actual
2121 * context switch. We thus wait for two switches to be
2122 * sure at least one completed.
2123 */
2124 if ((p->nvcsw - nvcsw) > 1)
2125 break;
2126 if ((p->nivcsw - nivcsw) > 1)
2127 break;
2128
2129 cpu_relax();
2130 }
2131} 2068}
2132 2069
2133/* 2070/*
@@ -2185,7 +2122,7 @@ unsigned long wait_task_inactive(struct task_struct *p, long match_state)
2185 * just go back and repeat. 2122 * just go back and repeat.
2186 */ 2123 */
2187 rq = task_rq_lock(p, &flags); 2124 rq = task_rq_lock(p, &flags);
2188 trace_sched_wait_task(rq, p); 2125 trace_sched_wait_task(p);
2189 running = task_running(rq, p); 2126 running = task_running(rq, p);
2190 on_rq = p->se.on_rq; 2127 on_rq = p->se.on_rq;
2191 ncsw = 0; 2128 ncsw = 0;
@@ -2283,6 +2220,9 @@ void task_oncpu_function_call(struct task_struct *p,
2283} 2220}
2284 2221
2285#ifdef CONFIG_SMP 2222#ifdef CONFIG_SMP
2223/*
2224 * ->cpus_allowed is protected by either TASK_WAKING or rq->lock held.
2225 */
2286static int select_fallback_rq(int cpu, struct task_struct *p) 2226static int select_fallback_rq(int cpu, struct task_struct *p)
2287{ 2227{
2288 int dest_cpu; 2228 int dest_cpu;
@@ -2299,12 +2239,8 @@ static int select_fallback_rq(int cpu, struct task_struct *p)
2299 return dest_cpu; 2239 return dest_cpu;
2300 2240
2301 /* No more Mr. Nice Guy. */ 2241 /* No more Mr. Nice Guy. */
2302 if (dest_cpu >= nr_cpu_ids) { 2242 if (unlikely(dest_cpu >= nr_cpu_ids)) {
2303 rcu_read_lock(); 2243 dest_cpu = cpuset_cpus_allowed_fallback(p);
2304 cpuset_cpus_allowed_locked(p, &p->cpus_allowed);
2305 rcu_read_unlock();
2306 dest_cpu = cpumask_any_and(cpu_active_mask, &p->cpus_allowed);
2307
2308 /* 2244 /*
2309 * Don't tell them about moving exiting tasks or 2245 * Don't tell them about moving exiting tasks or
2310 * kernel threads (both mm NULL), since they never 2246 * kernel threads (both mm NULL), since they never
@@ -2321,17 +2257,12 @@ static int select_fallback_rq(int cpu, struct task_struct *p)
2321} 2257}
2322 2258
2323/* 2259/*
2324 * Gets called from 3 sites (exec, fork, wakeup), since it is called without 2260 * The caller (fork, wakeup) owns TASK_WAKING, ->cpus_allowed is stable.
2325 * holding rq->lock we need to ensure ->cpus_allowed is stable, this is done
2326 * by:
2327 *
2328 * exec: is unstable, retry loop
2329 * fork & wake-up: serialize ->cpus_allowed against TASK_WAKING
2330 */ 2261 */
2331static inline 2262static inline
2332int select_task_rq(struct task_struct *p, int sd_flags, int wake_flags) 2263int select_task_rq(struct rq *rq, struct task_struct *p, int sd_flags, int wake_flags)
2333{ 2264{
2334 int cpu = p->sched_class->select_task_rq(p, sd_flags, wake_flags); 2265 int cpu = p->sched_class->select_task_rq(rq, p, sd_flags, wake_flags);
2335 2266
2336 /* 2267 /*
2337 * In order not to call set_task_cpu() on a blocking task we need 2268 * In order not to call set_task_cpu() on a blocking task we need
@@ -2349,6 +2280,12 @@ int select_task_rq(struct task_struct *p, int sd_flags, int wake_flags)
2349 2280
2350 return cpu; 2281 return cpu;
2351} 2282}
2283
2284static void update_avg(u64 *avg, u64 sample)
2285{
2286 s64 diff = sample - *avg;
2287 *avg += diff >> 3;
2288}
2352#endif 2289#endif
2353 2290
2354/*** 2291/***
@@ -2370,16 +2307,13 @@ static int try_to_wake_up(struct task_struct *p, unsigned int state,
2370{ 2307{
2371 int cpu, orig_cpu, this_cpu, success = 0; 2308 int cpu, orig_cpu, this_cpu, success = 0;
2372 unsigned long flags; 2309 unsigned long flags;
2310 unsigned long en_flags = ENQUEUE_WAKEUP;
2373 struct rq *rq; 2311 struct rq *rq;
2374 2312
2375 if (!sched_feat(SYNC_WAKEUPS))
2376 wake_flags &= ~WF_SYNC;
2377
2378 this_cpu = get_cpu(); 2313 this_cpu = get_cpu();
2379 2314
2380 smp_wmb(); 2315 smp_wmb();
2381 rq = task_rq_lock(p, &flags); 2316 rq = task_rq_lock(p, &flags);
2382 update_rq_clock(rq);
2383 if (!(p->state & state)) 2317 if (!(p->state & state))
2384 goto out; 2318 goto out;
2385 2319
@@ -2399,28 +2333,26 @@ static int try_to_wake_up(struct task_struct *p, unsigned int state,
2399 * 2333 *
2400 * First fix up the nr_uninterruptible count: 2334 * First fix up the nr_uninterruptible count:
2401 */ 2335 */
2402 if (task_contributes_to_load(p)) 2336 if (task_contributes_to_load(p)) {
2403 rq->nr_uninterruptible--; 2337 if (likely(cpu_online(orig_cpu)))
2338 rq->nr_uninterruptible--;
2339 else
2340 this_rq()->nr_uninterruptible--;
2341 }
2404 p->state = TASK_WAKING; 2342 p->state = TASK_WAKING;
2405 2343
2406 if (p->sched_class->task_waking) 2344 if (p->sched_class->task_waking) {
2407 p->sched_class->task_waking(rq, p); 2345 p->sched_class->task_waking(rq, p);
2346 en_flags |= ENQUEUE_WAKING;
2347 }
2408 2348
2409 __task_rq_unlock(rq); 2349 cpu = select_task_rq(rq, p, SD_BALANCE_WAKE, wake_flags);
2410 2350 if (cpu != orig_cpu)
2411 cpu = select_task_rq(p, SD_BALANCE_WAKE, wake_flags);
2412 if (cpu != orig_cpu) {
2413 /*
2414 * Since we migrate the task without holding any rq->lock,
2415 * we need to be careful with task_rq_lock(), since that
2416 * might end up locking an invalid rq.
2417 */
2418 set_task_cpu(p, cpu); 2351 set_task_cpu(p, cpu);
2419 } 2352 __task_rq_unlock(rq);
2420 2353
2421 rq = cpu_rq(cpu); 2354 rq = cpu_rq(cpu);
2422 raw_spin_lock(&rq->lock); 2355 raw_spin_lock(&rq->lock);
2423 update_rq_clock(rq);
2424 2356
2425 /* 2357 /*
2426 * We migrated the task without holding either rq->lock, however 2358 * We migrated the task without holding either rq->lock, however
@@ -2448,36 +2380,20 @@ static int try_to_wake_up(struct task_struct *p, unsigned int state,
2448 2380
2449out_activate: 2381out_activate:
2450#endif /* CONFIG_SMP */ 2382#endif /* CONFIG_SMP */
2451 schedstat_inc(p, se.nr_wakeups); 2383 schedstat_inc(p, se.statistics.nr_wakeups);
2452 if (wake_flags & WF_SYNC) 2384 if (wake_flags & WF_SYNC)
2453 schedstat_inc(p, se.nr_wakeups_sync); 2385 schedstat_inc(p, se.statistics.nr_wakeups_sync);
2454 if (orig_cpu != cpu) 2386 if (orig_cpu != cpu)
2455 schedstat_inc(p, se.nr_wakeups_migrate); 2387 schedstat_inc(p, se.statistics.nr_wakeups_migrate);
2456 if (cpu == this_cpu) 2388 if (cpu == this_cpu)
2457 schedstat_inc(p, se.nr_wakeups_local); 2389 schedstat_inc(p, se.statistics.nr_wakeups_local);
2458 else 2390 else
2459 schedstat_inc(p, se.nr_wakeups_remote); 2391 schedstat_inc(p, se.statistics.nr_wakeups_remote);
2460 activate_task(rq, p, 1); 2392 activate_task(rq, p, en_flags);
2461 success = 1; 2393 success = 1;
2462 2394
2463 /*
2464 * Only attribute actual wakeups done by this task.
2465 */
2466 if (!in_interrupt()) {
2467 struct sched_entity *se = &current->se;
2468 u64 sample = se->sum_exec_runtime;
2469
2470 if (se->last_wakeup)
2471 sample -= se->last_wakeup;
2472 else
2473 sample -= se->start_runtime;
2474 update_avg(&se->avg_wakeup, sample);
2475
2476 se->last_wakeup = se->sum_exec_runtime;
2477 }
2478
2479out_running: 2395out_running:
2480 trace_sched_wakeup(rq, p, success); 2396 trace_sched_wakeup(p, success);
2481 check_preempt_curr(rq, p, wake_flags); 2397 check_preempt_curr(rq, p, wake_flags);
2482 2398
2483 p->state = TASK_RUNNING; 2399 p->state = TASK_RUNNING;
@@ -2537,42 +2453,9 @@ static void __sched_fork(struct task_struct *p)
2537 p->se.sum_exec_runtime = 0; 2453 p->se.sum_exec_runtime = 0;
2538 p->se.prev_sum_exec_runtime = 0; 2454 p->se.prev_sum_exec_runtime = 0;
2539 p->se.nr_migrations = 0; 2455 p->se.nr_migrations = 0;
2540 p->se.last_wakeup = 0;
2541 p->se.avg_overlap = 0;
2542 p->se.start_runtime = 0;
2543 p->se.avg_wakeup = sysctl_sched_wakeup_granularity;
2544 2456
2545#ifdef CONFIG_SCHEDSTATS 2457#ifdef CONFIG_SCHEDSTATS
2546 p->se.wait_start = 0; 2458 memset(&p->se.statistics, 0, sizeof(p->se.statistics));
2547 p->se.wait_max = 0;
2548 p->se.wait_count = 0;
2549 p->se.wait_sum = 0;
2550
2551 p->se.sleep_start = 0;
2552 p->se.sleep_max = 0;
2553 p->se.sum_sleep_runtime = 0;
2554
2555 p->se.block_start = 0;
2556 p->se.block_max = 0;
2557 p->se.exec_max = 0;
2558 p->se.slice_max = 0;
2559
2560 p->se.nr_migrations_cold = 0;
2561 p->se.nr_failed_migrations_affine = 0;
2562 p->se.nr_failed_migrations_running = 0;
2563 p->se.nr_failed_migrations_hot = 0;
2564 p->se.nr_forced_migrations = 0;
2565
2566 p->se.nr_wakeups = 0;
2567 p->se.nr_wakeups_sync = 0;
2568 p->se.nr_wakeups_migrate = 0;
2569 p->se.nr_wakeups_local = 0;
2570 p->se.nr_wakeups_remote = 0;
2571 p->se.nr_wakeups_affine = 0;
2572 p->se.nr_wakeups_affine_attempts = 0;
2573 p->se.nr_wakeups_passive = 0;
2574 p->se.nr_wakeups_idle = 0;
2575
2576#endif 2459#endif
2577 2460
2578 INIT_LIST_HEAD(&p->rt.run_list); 2461 INIT_LIST_HEAD(&p->rt.run_list);
@@ -2593,11 +2476,11 @@ void sched_fork(struct task_struct *p, int clone_flags)
2593 2476
2594 __sched_fork(p); 2477 __sched_fork(p);
2595 /* 2478 /*
2596 * We mark the process as waking here. This guarantees that 2479 * We mark the process as running here. This guarantees that
2597 * nobody will actually run it, and a signal or other external 2480 * nobody will actually run it, and a signal or other external
2598 * event cannot wake it up and insert it on the runqueue either. 2481 * event cannot wake it up and insert it on the runqueue either.
2599 */ 2482 */
2600 p->state = TASK_WAKING; 2483 p->state = TASK_RUNNING;
2601 2484
2602 /* 2485 /*
2603 * Revert to default priority/policy on fork if requested. 2486 * Revert to default priority/policy on fork if requested.
@@ -2664,31 +2547,27 @@ void wake_up_new_task(struct task_struct *p, unsigned long clone_flags)
2664 int cpu __maybe_unused = get_cpu(); 2547 int cpu __maybe_unused = get_cpu();
2665 2548
2666#ifdef CONFIG_SMP 2549#ifdef CONFIG_SMP
2550 rq = task_rq_lock(p, &flags);
2551 p->state = TASK_WAKING;
2552
2667 /* 2553 /*
2668 * Fork balancing, do it here and not earlier because: 2554 * Fork balancing, do it here and not earlier because:
2669 * - cpus_allowed can change in the fork path 2555 * - cpus_allowed can change in the fork path
2670 * - any previously selected cpu might disappear through hotplug 2556 * - any previously selected cpu might disappear through hotplug
2671 * 2557 *
2672 * We still have TASK_WAKING but PF_STARTING is gone now, meaning 2558 * We set TASK_WAKING so that select_task_rq() can drop rq->lock
2673 * ->cpus_allowed is stable, we have preemption disabled, meaning 2559 * without people poking at ->cpus_allowed.
2674 * cpu_online_mask is stable.
2675 */ 2560 */
2676 cpu = select_task_rq(p, SD_BALANCE_FORK, 0); 2561 cpu = select_task_rq(rq, p, SD_BALANCE_FORK, 0);
2677 set_task_cpu(p, cpu); 2562 set_task_cpu(p, cpu);
2678#endif
2679
2680 /*
2681 * Since the task is not on the rq and we still have TASK_WAKING set
2682 * nobody else will migrate this task.
2683 */
2684 rq = cpu_rq(cpu);
2685 raw_spin_lock_irqsave(&rq->lock, flags);
2686 2563
2687 BUG_ON(p->state != TASK_WAKING);
2688 p->state = TASK_RUNNING; 2564 p->state = TASK_RUNNING;
2689 update_rq_clock(rq); 2565 task_rq_unlock(rq, &flags);
2566#endif
2567
2568 rq = task_rq_lock(p, &flags);
2690 activate_task(rq, p, 0); 2569 activate_task(rq, p, 0);
2691 trace_sched_wakeup_new(rq, p, 1); 2570 trace_sched_wakeup_new(p, 1);
2692 check_preempt_curr(rq, p, WF_FORK); 2571 check_preempt_curr(rq, p, WF_FORK);
2693#ifdef CONFIG_SMP 2572#ifdef CONFIG_SMP
2694 if (p->sched_class->task_woken) 2573 if (p->sched_class->task_woken)
@@ -2908,7 +2787,7 @@ context_switch(struct rq *rq, struct task_struct *prev,
2908 struct mm_struct *mm, *oldmm; 2787 struct mm_struct *mm, *oldmm;
2909 2788
2910 prepare_task_switch(rq, prev, next); 2789 prepare_task_switch(rq, prev, next);
2911 trace_sched_switch(rq, prev, next); 2790 trace_sched_switch(prev, next);
2912 mm = next->mm; 2791 mm = next->mm;
2913 oldmm = prev->active_mm; 2792 oldmm = prev->active_mm;
2914 /* 2793 /*
@@ -3025,6 +2904,61 @@ static unsigned long calc_load_update;
3025unsigned long avenrun[3]; 2904unsigned long avenrun[3];
3026EXPORT_SYMBOL(avenrun); 2905EXPORT_SYMBOL(avenrun);
3027 2906
2907static long calc_load_fold_active(struct rq *this_rq)
2908{
2909 long nr_active, delta = 0;
2910
2911 nr_active = this_rq->nr_running;
2912 nr_active += (long) this_rq->nr_uninterruptible;
2913
2914 if (nr_active != this_rq->calc_load_active) {
2915 delta = nr_active - this_rq->calc_load_active;
2916 this_rq->calc_load_active = nr_active;
2917 }
2918
2919 return delta;
2920}
2921
2922#ifdef CONFIG_NO_HZ
2923/*
2924 * For NO_HZ we delay the active fold to the next LOAD_FREQ update.
2925 *
2926 * When making the ILB scale, we should try to pull this in as well.
2927 */
2928static atomic_long_t calc_load_tasks_idle;
2929
2930static void calc_load_account_idle(struct rq *this_rq)
2931{
2932 long delta;
2933
2934 delta = calc_load_fold_active(this_rq);
2935 if (delta)
2936 atomic_long_add(delta, &calc_load_tasks_idle);
2937}
2938
2939static long calc_load_fold_idle(void)
2940{
2941 long delta = 0;
2942
2943 /*
2944 * Its got a race, we don't care...
2945 */
2946 if (atomic_long_read(&calc_load_tasks_idle))
2947 delta = atomic_long_xchg(&calc_load_tasks_idle, 0);
2948
2949 return delta;
2950}
2951#else
2952static void calc_load_account_idle(struct rq *this_rq)
2953{
2954}
2955
2956static inline long calc_load_fold_idle(void)
2957{
2958 return 0;
2959}
2960#endif
2961
3028/** 2962/**
3029 * get_avenrun - get the load average array 2963 * get_avenrun - get the load average array
3030 * @loads: pointer to dest load array 2964 * @loads: pointer to dest load array
@@ -3071,20 +3005,22 @@ void calc_global_load(void)
3071} 3005}
3072 3006
3073/* 3007/*
3074 * Either called from update_cpu_load() or from a cpu going idle 3008 * Called from update_cpu_load() to periodically update this CPU's
3009 * active count.
3075 */ 3010 */
3076static void calc_load_account_active(struct rq *this_rq) 3011static void calc_load_account_active(struct rq *this_rq)
3077{ 3012{
3078 long nr_active, delta; 3013 long delta;
3079 3014
3080 nr_active = this_rq->nr_running; 3015 if (time_before(jiffies, this_rq->calc_load_update))
3081 nr_active += (long) this_rq->nr_uninterruptible; 3016 return;
3082 3017
3083 if (nr_active != this_rq->calc_load_active) { 3018 delta = calc_load_fold_active(this_rq);
3084 delta = nr_active - this_rq->calc_load_active; 3019 delta += calc_load_fold_idle();
3085 this_rq->calc_load_active = nr_active; 3020 if (delta)
3086 atomic_long_add(delta, &calc_load_tasks); 3021 atomic_long_add(delta, &calc_load_tasks);
3087 } 3022
3023 this_rq->calc_load_update += LOAD_FREQ;
3088} 3024}
3089 3025
3090/* 3026/*
@@ -3116,10 +3052,7 @@ static void update_cpu_load(struct rq *this_rq)
3116 this_rq->cpu_load[i] = (old_load*(scale-1) + new_load) >> i; 3052 this_rq->cpu_load[i] = (old_load*(scale-1) + new_load) >> i;
3117 } 3053 }
3118 3054
3119 if (time_after_eq(jiffies, this_rq->calc_load_update)) { 3055 calc_load_account_active(this_rq);
3120 this_rq->calc_load_update += LOAD_FREQ;
3121 calc_load_account_active(this_rq);
3122 }
3123} 3056}
3124 3057
3125#ifdef CONFIG_SMP 3058#ifdef CONFIG_SMP
@@ -3131,44 +3064,27 @@ static void update_cpu_load(struct rq *this_rq)
3131void sched_exec(void) 3064void sched_exec(void)
3132{ 3065{
3133 struct task_struct *p = current; 3066 struct task_struct *p = current;
3134 struct migration_req req;
3135 int dest_cpu, this_cpu;
3136 unsigned long flags; 3067 unsigned long flags;
3137 struct rq *rq; 3068 struct rq *rq;
3138 3069 int dest_cpu;
3139again:
3140 this_cpu = get_cpu();
3141 dest_cpu = select_task_rq(p, SD_BALANCE_EXEC, 0);
3142 if (dest_cpu == this_cpu) {
3143 put_cpu();
3144 return;
3145 }
3146 3070
3147 rq = task_rq_lock(p, &flags); 3071 rq = task_rq_lock(p, &flags);
3148 put_cpu(); 3072 dest_cpu = p->sched_class->select_task_rq(rq, p, SD_BALANCE_EXEC, 0);
3073 if (dest_cpu == smp_processor_id())
3074 goto unlock;
3149 3075
3150 /* 3076 /*
3151 * select_task_rq() can race against ->cpus_allowed 3077 * select_task_rq() can race against ->cpus_allowed
3152 */ 3078 */
3153 if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed) 3079 if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed) &&
3154 || unlikely(!cpu_active(dest_cpu))) { 3080 likely(cpu_active(dest_cpu)) && migrate_task(p, dest_cpu)) {
3155 task_rq_unlock(rq, &flags); 3081 struct migration_arg arg = { p, dest_cpu };
3156 goto again;
3157 }
3158 3082
3159 /* force the process onto the specified CPU */
3160 if (migrate_task(p, dest_cpu, &req)) {
3161 /* Need to wait for migration thread (might exit: take ref). */
3162 struct task_struct *mt = rq->migration_thread;
3163
3164 get_task_struct(mt);
3165 task_rq_unlock(rq, &flags); 3083 task_rq_unlock(rq, &flags);
3166 wake_up_process(mt); 3084 stop_one_cpu(cpu_of(rq), migration_cpu_stop, &arg);
3167 put_task_struct(mt);
3168 wait_for_completion(&req.done);
3169
3170 return; 3085 return;
3171 } 3086 }
3087unlock:
3172 task_rq_unlock(rq, &flags); 3088 task_rq_unlock(rq, &flags);
3173} 3089}
3174 3090
@@ -3640,23 +3556,9 @@ static inline void schedule_debug(struct task_struct *prev)
3640 3556
3641static void put_prev_task(struct rq *rq, struct task_struct *prev) 3557static void put_prev_task(struct rq *rq, struct task_struct *prev)
3642{ 3558{
3643 if (prev->state == TASK_RUNNING) { 3559 if (prev->se.on_rq)
3644 u64 runtime = prev->se.sum_exec_runtime; 3560 update_rq_clock(rq);
3645 3561 rq->skip_clock_update = 0;
3646 runtime -= prev->se.prev_sum_exec_runtime;
3647 runtime = min_t(u64, runtime, 2*sysctl_sched_migration_cost);
3648
3649 /*
3650 * In order to avoid avg_overlap growing stale when we are
3651 * indeed overlapping and hence not getting put to sleep, grow
3652 * the avg_overlap on preemption.
3653 *
3654 * We use the average preemption runtime because that
3655 * correlates to the amount of cache footprint a task can
3656 * build up.
3657 */
3658 update_avg(&prev->se.avg_overlap, runtime);
3659 }
3660 prev->sched_class->put_prev_task(rq, prev); 3562 prev->sched_class->put_prev_task(rq, prev);
3661} 3563}
3662 3564
@@ -3706,7 +3608,7 @@ need_resched:
3706 preempt_disable(); 3608 preempt_disable();
3707 cpu = smp_processor_id(); 3609 cpu = smp_processor_id();
3708 rq = cpu_rq(cpu); 3610 rq = cpu_rq(cpu);
3709 rcu_sched_qs(cpu); 3611 rcu_note_context_switch(cpu);
3710 prev = rq->curr; 3612 prev = rq->curr;
3711 switch_count = &prev->nivcsw; 3613 switch_count = &prev->nivcsw;
3712 3614
@@ -3719,14 +3621,13 @@ need_resched_nonpreemptible:
3719 hrtick_clear(rq); 3621 hrtick_clear(rq);
3720 3622
3721 raw_spin_lock_irq(&rq->lock); 3623 raw_spin_lock_irq(&rq->lock);
3722 update_rq_clock(rq);
3723 clear_tsk_need_resched(prev); 3624 clear_tsk_need_resched(prev);
3724 3625
3725 if (prev->state && !(preempt_count() & PREEMPT_ACTIVE)) { 3626 if (prev->state && !(preempt_count() & PREEMPT_ACTIVE)) {
3726 if (unlikely(signal_pending_state(prev->state, prev))) 3627 if (unlikely(signal_pending_state(prev->state, prev)))
3727 prev->state = TASK_RUNNING; 3628 prev->state = TASK_RUNNING;
3728 else 3629 else
3729 deactivate_task(rq, prev, 1); 3630 deactivate_task(rq, prev, DEQUEUE_SLEEP);
3730 switch_count = &prev->nvcsw; 3631 switch_count = &prev->nvcsw;
3731 } 3632 }
3732 3633
@@ -4049,8 +3950,7 @@ do_wait_for_common(struct completion *x, long timeout, int state)
4049 if (!x->done) { 3950 if (!x->done) {
4050 DECLARE_WAITQUEUE(wait, current); 3951 DECLARE_WAITQUEUE(wait, current);
4051 3952
4052 wait.flags |= WQ_FLAG_EXCLUSIVE; 3953 __add_wait_queue_tail_exclusive(&x->wait, &wait);
4053 __add_wait_queue_tail(&x->wait, &wait);
4054 do { 3954 do {
4055 if (signal_pending_state(state, current)) { 3955 if (signal_pending_state(state, current)) {
4056 timeout = -ERESTARTSYS; 3956 timeout = -ERESTARTSYS;
@@ -4276,7 +4176,6 @@ void rt_mutex_setprio(struct task_struct *p, int prio)
4276 BUG_ON(prio < 0 || prio > MAX_PRIO); 4176 BUG_ON(prio < 0 || prio > MAX_PRIO);
4277 4177
4278 rq = task_rq_lock(p, &flags); 4178 rq = task_rq_lock(p, &flags);
4279 update_rq_clock(rq);
4280 4179
4281 oldprio = p->prio; 4180 oldprio = p->prio;
4282 prev_class = p->sched_class; 4181 prev_class = p->sched_class;
@@ -4297,7 +4196,7 @@ void rt_mutex_setprio(struct task_struct *p, int prio)
4297 if (running) 4196 if (running)
4298 p->sched_class->set_curr_task(rq); 4197 p->sched_class->set_curr_task(rq);
4299 if (on_rq) { 4198 if (on_rq) {
4300 enqueue_task(rq, p, 0, oldprio < prio); 4199 enqueue_task(rq, p, oldprio < prio ? ENQUEUE_HEAD : 0);
4301 4200
4302 check_class_changed(rq, p, prev_class, oldprio, running); 4201 check_class_changed(rq, p, prev_class, oldprio, running);
4303 } 4202 }
@@ -4319,7 +4218,6 @@ void set_user_nice(struct task_struct *p, long nice)
4319 * the task might be in the middle of scheduling on another CPU. 4218 * the task might be in the middle of scheduling on another CPU.
4320 */ 4219 */
4321 rq = task_rq_lock(p, &flags); 4220 rq = task_rq_lock(p, &flags);
4322 update_rq_clock(rq);
4323 /* 4221 /*
4324 * The RT priorities are set via sched_setscheduler(), but we still 4222 * The RT priorities are set via sched_setscheduler(), but we still
4325 * allow the 'normal' nice value to be set - but as expected 4223 * allow the 'normal' nice value to be set - but as expected
@@ -4341,7 +4239,7 @@ void set_user_nice(struct task_struct *p, long nice)
4341 delta = p->prio - old_prio; 4239 delta = p->prio - old_prio;
4342 4240
4343 if (on_rq) { 4241 if (on_rq) {
4344 enqueue_task(rq, p, 0, false); 4242 enqueue_task(rq, p, 0);
4345 /* 4243 /*
4346 * If the task increased its priority or is running and 4244 * If the task increased its priority or is running and
4347 * lowered its priority, then reschedule its CPU: 4245 * lowered its priority, then reschedule its CPU:
@@ -4602,7 +4500,6 @@ recheck:
4602 raw_spin_unlock_irqrestore(&p->pi_lock, flags); 4500 raw_spin_unlock_irqrestore(&p->pi_lock, flags);
4603 goto recheck; 4501 goto recheck;
4604 } 4502 }
4605 update_rq_clock(rq);
4606 on_rq = p->se.on_rq; 4503 on_rq = p->se.on_rq;
4607 running = task_current(rq, p); 4504 running = task_current(rq, p);
4608 if (on_rq) 4505 if (on_rq)
@@ -5339,17 +5236,15 @@ static inline void sched_init_granularity(void)
5339/* 5236/*
5340 * This is how migration works: 5237 * This is how migration works:
5341 * 5238 *
5342 * 1) we queue a struct migration_req structure in the source CPU's 5239 * 1) we invoke migration_cpu_stop() on the target CPU using
5343 * runqueue and wake up that CPU's migration thread. 5240 * stop_one_cpu().
5344 * 2) we down() the locked semaphore => thread blocks. 5241 * 2) stopper starts to run (implicitly forcing the migrated thread
5345 * 3) migration thread wakes up (implicitly it forces the migrated 5242 * off the CPU)
5346 * thread off the CPU) 5243 * 3) it checks whether the migrated task is still in the wrong runqueue.
5347 * 4) it gets the migration request and checks whether the migrated 5244 * 4) if it's in the wrong runqueue then the migration thread removes
5348 * task is still in the wrong runqueue.
5349 * 5) if it's in the wrong runqueue then the migration thread removes
5350 * it and puts it into the right queue. 5245 * it and puts it into the right queue.
5351 * 6) migration thread up()s the semaphore. 5246 * 5) stopper completes and stop_one_cpu() returns and the migration
5352 * 7) we wake up and the migration is done. 5247 * is done.
5353 */ 5248 */
5354 5249
5355/* 5250/*
@@ -5363,12 +5258,23 @@ static inline void sched_init_granularity(void)
5363 */ 5258 */
5364int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask) 5259int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask)
5365{ 5260{
5366 struct migration_req req;
5367 unsigned long flags; 5261 unsigned long flags;
5368 struct rq *rq; 5262 struct rq *rq;
5263 unsigned int dest_cpu;
5369 int ret = 0; 5264 int ret = 0;
5370 5265
5266 /*
5267 * Serialize against TASK_WAKING so that ttwu() and wunt() can
5268 * drop the rq->lock and still rely on ->cpus_allowed.
5269 */
5270again:
5271 while (task_is_waking(p))
5272 cpu_relax();
5371 rq = task_rq_lock(p, &flags); 5273 rq = task_rq_lock(p, &flags);
5274 if (task_is_waking(p)) {
5275 task_rq_unlock(rq, &flags);
5276 goto again;
5277 }
5372 5278
5373 if (!cpumask_intersects(new_mask, cpu_active_mask)) { 5279 if (!cpumask_intersects(new_mask, cpu_active_mask)) {
5374 ret = -EINVAL; 5280 ret = -EINVAL;
@@ -5392,15 +5298,12 @@ int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask)
5392 if (cpumask_test_cpu(task_cpu(p), new_mask)) 5298 if (cpumask_test_cpu(task_cpu(p), new_mask))
5393 goto out; 5299 goto out;
5394 5300
5395 if (migrate_task(p, cpumask_any_and(cpu_active_mask, new_mask), &req)) { 5301 dest_cpu = cpumask_any_and(cpu_active_mask, new_mask);
5302 if (migrate_task(p, dest_cpu)) {
5303 struct migration_arg arg = { p, dest_cpu };
5396 /* Need help from migration thread: drop lock and wait. */ 5304 /* Need help from migration thread: drop lock and wait. */
5397 struct task_struct *mt = rq->migration_thread;
5398
5399 get_task_struct(mt);
5400 task_rq_unlock(rq, &flags); 5305 task_rq_unlock(rq, &flags);
5401 wake_up_process(mt); 5306 stop_one_cpu(cpu_of(rq), migration_cpu_stop, &arg);
5402 put_task_struct(mt);
5403 wait_for_completion(&req.done);
5404 tlb_migrate_finish(p->mm); 5307 tlb_migrate_finish(p->mm);
5405 return 0; 5308 return 0;
5406 } 5309 }
@@ -5458,98 +5361,49 @@ fail:
5458 return ret; 5361 return ret;
5459} 5362}
5460 5363
5461#define RCU_MIGRATION_IDLE 0
5462#define RCU_MIGRATION_NEED_QS 1
5463#define RCU_MIGRATION_GOT_QS 2
5464#define RCU_MIGRATION_MUST_SYNC 3
5465
5466/* 5364/*
5467 * migration_thread - this is a highprio system thread that performs 5365 * migration_cpu_stop - this will be executed by a highprio stopper thread
5468 * thread migration by bumping thread off CPU then 'pushing' onto 5366 * and performs thread migration by bumping thread off CPU then
5469 * another runqueue. 5367 * 'pushing' onto another runqueue.
5470 */ 5368 */
5471static int migration_thread(void *data) 5369static int migration_cpu_stop(void *data)
5472{
5473 int badcpu;
5474 int cpu = (long)data;
5475 struct rq *rq;
5476
5477 rq = cpu_rq(cpu);
5478 BUG_ON(rq->migration_thread != current);
5479
5480 set_current_state(TASK_INTERRUPTIBLE);
5481 while (!kthread_should_stop()) {
5482 struct migration_req *req;
5483 struct list_head *head;
5484
5485 raw_spin_lock_irq(&rq->lock);
5486
5487 if (cpu_is_offline(cpu)) {
5488 raw_spin_unlock_irq(&rq->lock);
5489 break;
5490 }
5491
5492 if (rq->active_balance) {
5493 active_load_balance(rq, cpu);
5494 rq->active_balance = 0;
5495 }
5496
5497 head = &rq->migration_queue;
5498
5499 if (list_empty(head)) {
5500 raw_spin_unlock_irq(&rq->lock);
5501 schedule();
5502 set_current_state(TASK_INTERRUPTIBLE);
5503 continue;
5504 }
5505 req = list_entry(head->next, struct migration_req, list);
5506 list_del_init(head->next);
5507
5508 if (req->task != NULL) {
5509 raw_spin_unlock(&rq->lock);
5510 __migrate_task(req->task, cpu, req->dest_cpu);
5511 } else if (likely(cpu == (badcpu = smp_processor_id()))) {
5512 req->dest_cpu = RCU_MIGRATION_GOT_QS;
5513 raw_spin_unlock(&rq->lock);
5514 } else {
5515 req->dest_cpu = RCU_MIGRATION_MUST_SYNC;
5516 raw_spin_unlock(&rq->lock);
5517 WARN_ONCE(1, "migration_thread() on CPU %d, expected %d\n", badcpu, cpu);
5518 }
5519 local_irq_enable();
5520
5521 complete(&req->done);
5522 }
5523 __set_current_state(TASK_RUNNING);
5524
5525 return 0;
5526}
5527
5528#ifdef CONFIG_HOTPLUG_CPU
5529
5530static int __migrate_task_irq(struct task_struct *p, int src_cpu, int dest_cpu)
5531{ 5370{
5532 int ret; 5371 struct migration_arg *arg = data;
5533 5372
5373 /*
5374 * The original target cpu might have gone down and we might
5375 * be on another cpu but it doesn't matter.
5376 */
5534 local_irq_disable(); 5377 local_irq_disable();
5535 ret = __migrate_task(p, src_cpu, dest_cpu); 5378 __migrate_task(arg->task, raw_smp_processor_id(), arg->dest_cpu);
5536 local_irq_enable(); 5379 local_irq_enable();
5537 return ret; 5380 return 0;
5538} 5381}
5539 5382
5383#ifdef CONFIG_HOTPLUG_CPU
5540/* 5384/*
5541 * Figure out where task on dead CPU should go, use force if necessary. 5385 * Figure out where task on dead CPU should go, use force if necessary.
5542 */ 5386 */
5543static void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p) 5387void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p)
5544{ 5388{
5545 int dest_cpu; 5389 struct rq *rq = cpu_rq(dead_cpu);
5390 int needs_cpu, uninitialized_var(dest_cpu);
5391 unsigned long flags;
5546 5392
5547again: 5393 local_irq_save(flags);
5548 dest_cpu = select_fallback_rq(dead_cpu, p);
5549 5394
5550 /* It can have affinity changed while we were choosing. */ 5395 raw_spin_lock(&rq->lock);
5551 if (unlikely(!__migrate_task_irq(p, dead_cpu, dest_cpu))) 5396 needs_cpu = (task_cpu(p) == dead_cpu) && (p->state != TASK_WAKING);
5552 goto again; 5397 if (needs_cpu)
5398 dest_cpu = select_fallback_rq(dead_cpu, p);
5399 raw_spin_unlock(&rq->lock);
5400 /*
5401 * It can only fail if we race with set_cpus_allowed(),
5402 * in the racer should migrate the task anyway.
5403 */
5404 if (needs_cpu)
5405 __migrate_task(p, dead_cpu, dest_cpu);
5406 local_irq_restore(flags);
5553} 5407}
5554 5408
5555/* 5409/*
@@ -5613,7 +5467,6 @@ void sched_idle_next(void)
5613 5467
5614 __setscheduler(rq, p, SCHED_FIFO, MAX_RT_PRIO-1); 5468 __setscheduler(rq, p, SCHED_FIFO, MAX_RT_PRIO-1);
5615 5469
5616 update_rq_clock(rq);
5617 activate_task(rq, p, 0); 5470 activate_task(rq, p, 0);
5618 5471
5619 raw_spin_unlock_irqrestore(&rq->lock, flags); 5472 raw_spin_unlock_irqrestore(&rq->lock, flags);
@@ -5668,7 +5521,6 @@ static void migrate_dead_tasks(unsigned int dead_cpu)
5668 for ( ; ; ) { 5521 for ( ; ; ) {
5669 if (!rq->nr_running) 5522 if (!rq->nr_running)
5670 break; 5523 break;
5671 update_rq_clock(rq);
5672 next = pick_next_task(rq); 5524 next = pick_next_task(rq);
5673 if (!next) 5525 if (!next)
5674 break; 5526 break;
@@ -5891,35 +5743,20 @@ static void set_rq_offline(struct rq *rq)
5891static int __cpuinit 5743static int __cpuinit
5892migration_call(struct notifier_block *nfb, unsigned long action, void *hcpu) 5744migration_call(struct notifier_block *nfb, unsigned long action, void *hcpu)
5893{ 5745{
5894 struct task_struct *p;
5895 int cpu = (long)hcpu; 5746 int cpu = (long)hcpu;
5896 unsigned long flags; 5747 unsigned long flags;
5897 struct rq *rq; 5748 struct rq *rq = cpu_rq(cpu);
5898 5749
5899 switch (action) { 5750 switch (action) {
5900 5751
5901 case CPU_UP_PREPARE: 5752 case CPU_UP_PREPARE:
5902 case CPU_UP_PREPARE_FROZEN: 5753 case CPU_UP_PREPARE_FROZEN:
5903 p = kthread_create(migration_thread, hcpu, "migration/%d", cpu);
5904 if (IS_ERR(p))
5905 return NOTIFY_BAD;
5906 kthread_bind(p, cpu);
5907 /* Must be high prio: stop_machine expects to yield to it. */
5908 rq = task_rq_lock(p, &flags);
5909 __setscheduler(rq, p, SCHED_FIFO, MAX_RT_PRIO-1);
5910 task_rq_unlock(rq, &flags);
5911 get_task_struct(p);
5912 cpu_rq(cpu)->migration_thread = p;
5913 rq->calc_load_update = calc_load_update; 5754 rq->calc_load_update = calc_load_update;
5914 break; 5755 break;
5915 5756
5916 case CPU_ONLINE: 5757 case CPU_ONLINE:
5917 case CPU_ONLINE_FROZEN: 5758 case CPU_ONLINE_FROZEN:
5918 /* Strictly unnecessary, as first user will wake it. */
5919 wake_up_process(cpu_rq(cpu)->migration_thread);
5920
5921 /* Update our root-domain */ 5759 /* Update our root-domain */
5922 rq = cpu_rq(cpu);
5923 raw_spin_lock_irqsave(&rq->lock, flags); 5760 raw_spin_lock_irqsave(&rq->lock, flags);
5924 if (rq->rd) { 5761 if (rq->rd) {
5925 BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); 5762 BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span));
@@ -5930,61 +5767,24 @@ migration_call(struct notifier_block *nfb, unsigned long action, void *hcpu)
5930 break; 5767 break;
5931 5768
5932#ifdef CONFIG_HOTPLUG_CPU 5769#ifdef CONFIG_HOTPLUG_CPU
5933 case CPU_UP_CANCELED:
5934 case CPU_UP_CANCELED_FROZEN:
5935 if (!cpu_rq(cpu)->migration_thread)
5936 break;
5937 /* Unbind it from offline cpu so it can run. Fall thru. */
5938 kthread_bind(cpu_rq(cpu)->migration_thread,
5939 cpumask_any(cpu_online_mask));
5940 kthread_stop(cpu_rq(cpu)->migration_thread);
5941 put_task_struct(cpu_rq(cpu)->migration_thread);
5942 cpu_rq(cpu)->migration_thread = NULL;
5943 break;
5944
5945 case CPU_DEAD: 5770 case CPU_DEAD:
5946 case CPU_DEAD_FROZEN: 5771 case CPU_DEAD_FROZEN:
5947 cpuset_lock(); /* around calls to cpuset_cpus_allowed_lock() */
5948 migrate_live_tasks(cpu); 5772 migrate_live_tasks(cpu);
5949 rq = cpu_rq(cpu);
5950 kthread_stop(rq->migration_thread);
5951 put_task_struct(rq->migration_thread);
5952 rq->migration_thread = NULL;
5953 /* Idle task back to normal (off runqueue, low prio) */ 5773 /* Idle task back to normal (off runqueue, low prio) */
5954 raw_spin_lock_irq(&rq->lock); 5774 raw_spin_lock_irq(&rq->lock);
5955 update_rq_clock(rq);
5956 deactivate_task(rq, rq->idle, 0); 5775 deactivate_task(rq, rq->idle, 0);
5957 __setscheduler(rq, rq->idle, SCHED_NORMAL, 0); 5776 __setscheduler(rq, rq->idle, SCHED_NORMAL, 0);
5958 rq->idle->sched_class = &idle_sched_class; 5777 rq->idle->sched_class = &idle_sched_class;
5959 migrate_dead_tasks(cpu); 5778 migrate_dead_tasks(cpu);
5960 raw_spin_unlock_irq(&rq->lock); 5779 raw_spin_unlock_irq(&rq->lock);
5961 cpuset_unlock();
5962 migrate_nr_uninterruptible(rq); 5780 migrate_nr_uninterruptible(rq);
5963 BUG_ON(rq->nr_running != 0); 5781 BUG_ON(rq->nr_running != 0);
5964 calc_global_load_remove(rq); 5782 calc_global_load_remove(rq);
5965 /*
5966 * No need to migrate the tasks: it was best-effort if
5967 * they didn't take sched_hotcpu_mutex. Just wake up
5968 * the requestors.
5969 */
5970 raw_spin_lock_irq(&rq->lock);
5971 while (!list_empty(&rq->migration_queue)) {
5972 struct migration_req *req;
5973
5974 req = list_entry(rq->migration_queue.next,
5975 struct migration_req, list);
5976 list_del_init(&req->list);
5977 raw_spin_unlock_irq(&rq->lock);
5978 complete(&req->done);
5979 raw_spin_lock_irq(&rq->lock);
5980 }
5981 raw_spin_unlock_irq(&rq->lock);
5982 break; 5783 break;
5983 5784
5984 case CPU_DYING: 5785 case CPU_DYING:
5985 case CPU_DYING_FROZEN: 5786 case CPU_DYING_FROZEN:
5986 /* Update our root-domain */ 5787 /* Update our root-domain */
5987 rq = cpu_rq(cpu);
5988 raw_spin_lock_irqsave(&rq->lock, flags); 5788 raw_spin_lock_irqsave(&rq->lock, flags);
5989 if (rq->rd) { 5789 if (rq->rd) {
5990 BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); 5790 BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span));
@@ -6315,6 +6115,9 @@ cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu)
6315 struct rq *rq = cpu_rq(cpu); 6115 struct rq *rq = cpu_rq(cpu);
6316 struct sched_domain *tmp; 6116 struct sched_domain *tmp;
6317 6117
6118 for (tmp = sd; tmp; tmp = tmp->parent)
6119 tmp->span_weight = cpumask_weight(sched_domain_span(tmp));
6120
6318 /* Remove the sched domains which do not contribute to scheduling. */ 6121 /* Remove the sched domains which do not contribute to scheduling. */
6319 for (tmp = sd; tmp; ) { 6122 for (tmp = sd; tmp; ) {
6320 struct sched_domain *parent = tmp->parent; 6123 struct sched_domain *parent = tmp->parent;
@@ -7798,10 +7601,8 @@ void __init sched_init(void)
7798 rq->push_cpu = 0; 7601 rq->push_cpu = 0;
7799 rq->cpu = i; 7602 rq->cpu = i;
7800 rq->online = 0; 7603 rq->online = 0;
7801 rq->migration_thread = NULL;
7802 rq->idle_stamp = 0; 7604 rq->idle_stamp = 0;
7803 rq->avg_idle = 2*sysctl_sched_migration_cost; 7605 rq->avg_idle = 2*sysctl_sched_migration_cost;
7804 INIT_LIST_HEAD(&rq->migration_queue);
7805 rq_attach_root(rq, &def_root_domain); 7606 rq_attach_root(rq, &def_root_domain);
7806#endif 7607#endif
7807 init_rq_hrtick(rq); 7608 init_rq_hrtick(rq);
@@ -7902,7 +7703,6 @@ static void normalize_task(struct rq *rq, struct task_struct *p)
7902{ 7703{
7903 int on_rq; 7704 int on_rq;
7904 7705
7905 update_rq_clock(rq);
7906 on_rq = p->se.on_rq; 7706 on_rq = p->se.on_rq;
7907 if (on_rq) 7707 if (on_rq)
7908 deactivate_task(rq, p, 0); 7708 deactivate_task(rq, p, 0);
@@ -7929,9 +7729,9 @@ void normalize_rt_tasks(void)
7929 7729
7930 p->se.exec_start = 0; 7730 p->se.exec_start = 0;
7931#ifdef CONFIG_SCHEDSTATS 7731#ifdef CONFIG_SCHEDSTATS
7932 p->se.wait_start = 0; 7732 p->se.statistics.wait_start = 0;
7933 p->se.sleep_start = 0; 7733 p->se.statistics.sleep_start = 0;
7934 p->se.block_start = 0; 7734 p->se.statistics.block_start = 0;
7935#endif 7735#endif
7936 7736
7937 if (!rt_task(p)) { 7737 if (!rt_task(p)) {
@@ -8264,8 +8064,6 @@ void sched_move_task(struct task_struct *tsk)
8264 8064
8265 rq = task_rq_lock(tsk, &flags); 8065 rq = task_rq_lock(tsk, &flags);
8266 8066
8267 update_rq_clock(rq);
8268
8269 running = task_current(rq, tsk); 8067 running = task_current(rq, tsk);
8270 on_rq = tsk->se.on_rq; 8068 on_rq = tsk->se.on_rq;
8271 8069
@@ -8284,7 +8082,7 @@ void sched_move_task(struct task_struct *tsk)
8284 if (unlikely(running)) 8082 if (unlikely(running))
8285 tsk->sched_class->set_curr_task(rq); 8083 tsk->sched_class->set_curr_task(rq);
8286 if (on_rq) 8084 if (on_rq)
8287 enqueue_task(rq, tsk, 0, false); 8085 enqueue_task(rq, tsk, 0);
8288 8086
8289 task_rq_unlock(rq, &flags); 8087 task_rq_unlock(rq, &flags);
8290} 8088}
@@ -9098,43 +8896,32 @@ struct cgroup_subsys cpuacct_subsys = {
9098 8896
9099#ifndef CONFIG_SMP 8897#ifndef CONFIG_SMP
9100 8898
9101int rcu_expedited_torture_stats(char *page)
9102{
9103 return 0;
9104}
9105EXPORT_SYMBOL_GPL(rcu_expedited_torture_stats);
9106
9107void synchronize_sched_expedited(void) 8899void synchronize_sched_expedited(void)
9108{ 8900{
8901 barrier();
9109} 8902}
9110EXPORT_SYMBOL_GPL(synchronize_sched_expedited); 8903EXPORT_SYMBOL_GPL(synchronize_sched_expedited);
9111 8904
9112#else /* #ifndef CONFIG_SMP */ 8905#else /* #ifndef CONFIG_SMP */
9113 8906
9114static DEFINE_PER_CPU(struct migration_req, rcu_migration_req); 8907static atomic_t synchronize_sched_expedited_count = ATOMIC_INIT(0);
9115static DEFINE_MUTEX(rcu_sched_expedited_mutex);
9116 8908
9117#define RCU_EXPEDITED_STATE_POST -2 8909static int synchronize_sched_expedited_cpu_stop(void *data)
9118#define RCU_EXPEDITED_STATE_IDLE -1
9119
9120static int rcu_expedited_state = RCU_EXPEDITED_STATE_IDLE;
9121
9122int rcu_expedited_torture_stats(char *page)
9123{ 8910{
9124 int cnt = 0; 8911 /*
9125 int cpu; 8912 * There must be a full memory barrier on each affected CPU
9126 8913 * between the time that try_stop_cpus() is called and the
9127 cnt += sprintf(&page[cnt], "state: %d /", rcu_expedited_state); 8914 * time that it returns.
9128 for_each_online_cpu(cpu) { 8915 *
9129 cnt += sprintf(&page[cnt], " %d:%d", 8916 * In the current initial implementation of cpu_stop, the
9130 cpu, per_cpu(rcu_migration_req, cpu).dest_cpu); 8917 * above condition is already met when the control reaches
9131 } 8918 * this point and the following smp_mb() is not strictly
9132 cnt += sprintf(&page[cnt], "\n"); 8919 * necessary. Do smp_mb() anyway for documentation and
9133 return cnt; 8920 * robustness against future implementation changes.
8921 */
8922 smp_mb(); /* See above comment block. */
8923 return 0;
9134} 8924}
9135EXPORT_SYMBOL_GPL(rcu_expedited_torture_stats);
9136
9137static long synchronize_sched_expedited_count;
9138 8925
9139/* 8926/*
9140 * Wait for an rcu-sched grace period to elapse, but use "big hammer" 8927 * Wait for an rcu-sched grace period to elapse, but use "big hammer"
@@ -9148,18 +8935,14 @@ static long synchronize_sched_expedited_count;
9148 */ 8935 */
9149void synchronize_sched_expedited(void) 8936void synchronize_sched_expedited(void)
9150{ 8937{
9151 int cpu; 8938 int snap, trycount = 0;
9152 unsigned long flags;
9153 bool need_full_sync = 0;
9154 struct rq *rq;
9155 struct migration_req *req;
9156 long snap;
9157 int trycount = 0;
9158 8939
9159 smp_mb(); /* ensure prior mod happens before capturing snap. */ 8940 smp_mb(); /* ensure prior mod happens before capturing snap. */
9160 snap = ACCESS_ONCE(synchronize_sched_expedited_count) + 1; 8941 snap = atomic_read(&synchronize_sched_expedited_count) + 1;
9161 get_online_cpus(); 8942 get_online_cpus();
9162 while (!mutex_trylock(&rcu_sched_expedited_mutex)) { 8943 while (try_stop_cpus(cpu_online_mask,
8944 synchronize_sched_expedited_cpu_stop,
8945 NULL) == -EAGAIN) {
9163 put_online_cpus(); 8946 put_online_cpus();
9164 if (trycount++ < 10) 8947 if (trycount++ < 10)
9165 udelay(trycount * num_online_cpus()); 8948 udelay(trycount * num_online_cpus());
@@ -9167,41 +8950,15 @@ void synchronize_sched_expedited(void)
9167 synchronize_sched(); 8950 synchronize_sched();
9168 return; 8951 return;
9169 } 8952 }
9170 if (ACCESS_ONCE(synchronize_sched_expedited_count) - snap > 0) { 8953 if (atomic_read(&synchronize_sched_expedited_count) - snap > 0) {
9171 smp_mb(); /* ensure test happens before caller kfree */ 8954 smp_mb(); /* ensure test happens before caller kfree */
9172 return; 8955 return;
9173 } 8956 }
9174 get_online_cpus(); 8957 get_online_cpus();
9175 } 8958 }
9176 rcu_expedited_state = RCU_EXPEDITED_STATE_POST; 8959 atomic_inc(&synchronize_sched_expedited_count);
9177 for_each_online_cpu(cpu) { 8960 smp_mb__after_atomic_inc(); /* ensure post-GP actions seen after GP. */
9178 rq = cpu_rq(cpu);
9179 req = &per_cpu(rcu_migration_req, cpu);
9180 init_completion(&req->done);
9181 req->task = NULL;
9182 req->dest_cpu = RCU_MIGRATION_NEED_QS;
9183 raw_spin_lock_irqsave(&rq->lock, flags);
9184 list_add(&req->list, &rq->migration_queue);
9185 raw_spin_unlock_irqrestore(&rq->lock, flags);
9186 wake_up_process(rq->migration_thread);
9187 }
9188 for_each_online_cpu(cpu) {
9189 rcu_expedited_state = cpu;
9190 req = &per_cpu(rcu_migration_req, cpu);
9191 rq = cpu_rq(cpu);
9192 wait_for_completion(&req->done);
9193 raw_spin_lock_irqsave(&rq->lock, flags);
9194 if (unlikely(req->dest_cpu == RCU_MIGRATION_MUST_SYNC))
9195 need_full_sync = 1;
9196 req->dest_cpu = RCU_MIGRATION_IDLE;
9197 raw_spin_unlock_irqrestore(&rq->lock, flags);
9198 }
9199 rcu_expedited_state = RCU_EXPEDITED_STATE_IDLE;
9200 synchronize_sched_expedited_count++;
9201 mutex_unlock(&rcu_sched_expedited_mutex);
9202 put_online_cpus(); 8961 put_online_cpus();
9203 if (need_full_sync)
9204 synchronize_sched();
9205} 8962}
9206EXPORT_SYMBOL_GPL(synchronize_sched_expedited); 8963EXPORT_SYMBOL_GPL(synchronize_sched_expedited);
9207 8964
diff --git a/kernel/sched_debug.c b/kernel/sched_debug.c
index 19be00ba6123..87a330a7185f 100644
--- a/kernel/sched_debug.c
+++ b/kernel/sched_debug.c
@@ -70,16 +70,16 @@ static void print_cfs_group_stats(struct seq_file *m, int cpu,
70 PN(se->vruntime); 70 PN(se->vruntime);
71 PN(se->sum_exec_runtime); 71 PN(se->sum_exec_runtime);
72#ifdef CONFIG_SCHEDSTATS 72#ifdef CONFIG_SCHEDSTATS
73 PN(se->wait_start); 73 PN(se->statistics.wait_start);
74 PN(se->sleep_start); 74 PN(se->statistics.sleep_start);
75 PN(se->block_start); 75 PN(se->statistics.block_start);
76 PN(se->sleep_max); 76 PN(se->statistics.sleep_max);
77 PN(se->block_max); 77 PN(se->statistics.block_max);
78 PN(se->exec_max); 78 PN(se->statistics.exec_max);
79 PN(se->slice_max); 79 PN(se->statistics.slice_max);
80 PN(se->wait_max); 80 PN(se->statistics.wait_max);
81 PN(se->wait_sum); 81 PN(se->statistics.wait_sum);
82 P(se->wait_count); 82 P(se->statistics.wait_count);
83#endif 83#endif
84 P(se->load.weight); 84 P(se->load.weight);
85#undef PN 85#undef PN
@@ -104,7 +104,7 @@ print_task(struct seq_file *m, struct rq *rq, struct task_struct *p)
104 SEQ_printf(m, "%9Ld.%06ld %9Ld.%06ld %9Ld.%06ld", 104 SEQ_printf(m, "%9Ld.%06ld %9Ld.%06ld %9Ld.%06ld",
105 SPLIT_NS(p->se.vruntime), 105 SPLIT_NS(p->se.vruntime),
106 SPLIT_NS(p->se.sum_exec_runtime), 106 SPLIT_NS(p->se.sum_exec_runtime),
107 SPLIT_NS(p->se.sum_sleep_runtime)); 107 SPLIT_NS(p->se.statistics.sum_sleep_runtime));
108#else 108#else
109 SEQ_printf(m, "%15Ld %15Ld %15Ld.%06ld %15Ld.%06ld %15Ld.%06ld", 109 SEQ_printf(m, "%15Ld %15Ld %15Ld.%06ld %15Ld.%06ld %15Ld.%06ld",
110 0LL, 0LL, 0LL, 0L, 0LL, 0L, 0LL, 0L); 110 0LL, 0LL, 0LL, 0L, 0LL, 0L, 0LL, 0L);
@@ -175,11 +175,6 @@ void print_cfs_rq(struct seq_file *m, int cpu, struct cfs_rq *cfs_rq)
175 task_group_path(tg, path, sizeof(path)); 175 task_group_path(tg, path, sizeof(path));
176 176
177 SEQ_printf(m, "\ncfs_rq[%d]:%s\n", cpu, path); 177 SEQ_printf(m, "\ncfs_rq[%d]:%s\n", cpu, path);
178#elif defined(CONFIG_USER_SCHED) && defined(CONFIG_FAIR_GROUP_SCHED)
179 {
180 uid_t uid = cfs_rq->tg->uid;
181 SEQ_printf(m, "\ncfs_rq[%d] for UID: %u\n", cpu, uid);
182 }
183#else 178#else
184 SEQ_printf(m, "\ncfs_rq[%d]:\n", cpu); 179 SEQ_printf(m, "\ncfs_rq[%d]:\n", cpu);
185#endif 180#endif
@@ -409,40 +404,38 @@ void proc_sched_show_task(struct task_struct *p, struct seq_file *m)
409 PN(se.exec_start); 404 PN(se.exec_start);
410 PN(se.vruntime); 405 PN(se.vruntime);
411 PN(se.sum_exec_runtime); 406 PN(se.sum_exec_runtime);
412 PN(se.avg_overlap);
413 PN(se.avg_wakeup);
414 407
415 nr_switches = p->nvcsw + p->nivcsw; 408 nr_switches = p->nvcsw + p->nivcsw;
416 409
417#ifdef CONFIG_SCHEDSTATS 410#ifdef CONFIG_SCHEDSTATS
418 PN(se.wait_start); 411 PN(se.statistics.wait_start);
419 PN(se.sleep_start); 412 PN(se.statistics.sleep_start);
420 PN(se.block_start); 413 PN(se.statistics.block_start);
421 PN(se.sleep_max); 414 PN(se.statistics.sleep_max);
422 PN(se.block_max); 415 PN(se.statistics.block_max);
423 PN(se.exec_max); 416 PN(se.statistics.exec_max);
424 PN(se.slice_max); 417 PN(se.statistics.slice_max);
425 PN(se.wait_max); 418 PN(se.statistics.wait_max);
426 PN(se.wait_sum); 419 PN(se.statistics.wait_sum);
427 P(se.wait_count); 420 P(se.statistics.wait_count);
428 PN(se.iowait_sum); 421 PN(se.statistics.iowait_sum);
429 P(se.iowait_count); 422 P(se.statistics.iowait_count);
430 P(sched_info.bkl_count); 423 P(sched_info.bkl_count);
431 P(se.nr_migrations); 424 P(se.nr_migrations);
432 P(se.nr_migrations_cold); 425 P(se.statistics.nr_migrations_cold);
433 P(se.nr_failed_migrations_affine); 426 P(se.statistics.nr_failed_migrations_affine);
434 P(se.nr_failed_migrations_running); 427 P(se.statistics.nr_failed_migrations_running);
435 P(se.nr_failed_migrations_hot); 428 P(se.statistics.nr_failed_migrations_hot);
436 P(se.nr_forced_migrations); 429 P(se.statistics.nr_forced_migrations);
437 P(se.nr_wakeups); 430 P(se.statistics.nr_wakeups);
438 P(se.nr_wakeups_sync); 431 P(se.statistics.nr_wakeups_sync);
439 P(se.nr_wakeups_migrate); 432 P(se.statistics.nr_wakeups_migrate);
440 P(se.nr_wakeups_local); 433 P(se.statistics.nr_wakeups_local);
441 P(se.nr_wakeups_remote); 434 P(se.statistics.nr_wakeups_remote);
442 P(se.nr_wakeups_affine); 435 P(se.statistics.nr_wakeups_affine);
443 P(se.nr_wakeups_affine_attempts); 436 P(se.statistics.nr_wakeups_affine_attempts);
444 P(se.nr_wakeups_passive); 437 P(se.statistics.nr_wakeups_passive);
445 P(se.nr_wakeups_idle); 438 P(se.statistics.nr_wakeups_idle);
446 439
447 { 440 {
448 u64 avg_atom, avg_per_cpu; 441 u64 avg_atom, avg_per_cpu;
@@ -493,31 +486,6 @@ void proc_sched_show_task(struct task_struct *p, struct seq_file *m)
493void proc_sched_set_task(struct task_struct *p) 486void proc_sched_set_task(struct task_struct *p)
494{ 487{
495#ifdef CONFIG_SCHEDSTATS 488#ifdef CONFIG_SCHEDSTATS
496 p->se.wait_max = 0; 489 memset(&p->se.statistics, 0, sizeof(p->se.statistics));
497 p->se.wait_sum = 0;
498 p->se.wait_count = 0;
499 p->se.iowait_sum = 0;
500 p->se.iowait_count = 0;
501 p->se.sleep_max = 0;
502 p->se.sum_sleep_runtime = 0;
503 p->se.block_max = 0;
504 p->se.exec_max = 0;
505 p->se.slice_max = 0;
506 p->se.nr_migrations = 0;
507 p->se.nr_migrations_cold = 0;
508 p->se.nr_failed_migrations_affine = 0;
509 p->se.nr_failed_migrations_running = 0;
510 p->se.nr_failed_migrations_hot = 0;
511 p->se.nr_forced_migrations = 0;
512 p->se.nr_wakeups = 0;
513 p->se.nr_wakeups_sync = 0;
514 p->se.nr_wakeups_migrate = 0;
515 p->se.nr_wakeups_local = 0;
516 p->se.nr_wakeups_remote = 0;
517 p->se.nr_wakeups_affine = 0;
518 p->se.nr_wakeups_affine_attempts = 0;
519 p->se.nr_wakeups_passive = 0;
520 p->se.nr_wakeups_idle = 0;
521 p->sched_info.bkl_count = 0;
522#endif 490#endif
523} 491}
diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c
index 5a5ea2cd924f..217e4a9393e4 100644
--- a/kernel/sched_fair.c
+++ b/kernel/sched_fair.c
@@ -35,8 +35,8 @@
35 * (to see the precise effective timeslice length of your workload, 35 * (to see the precise effective timeslice length of your workload,
36 * run vmstat and monitor the context-switches (cs) field) 36 * run vmstat and monitor the context-switches (cs) field)
37 */ 37 */
38unsigned int sysctl_sched_latency = 5000000ULL; 38unsigned int sysctl_sched_latency = 6000000ULL;
39unsigned int normalized_sysctl_sched_latency = 5000000ULL; 39unsigned int normalized_sysctl_sched_latency = 6000000ULL;
40 40
41/* 41/*
42 * The initial- and re-scaling of tunables is configurable 42 * The initial- and re-scaling of tunables is configurable
@@ -52,15 +52,15 @@ enum sched_tunable_scaling sysctl_sched_tunable_scaling
52 52
53/* 53/*
54 * Minimal preemption granularity for CPU-bound tasks: 54 * Minimal preemption granularity for CPU-bound tasks:
55 * (default: 1 msec * (1 + ilog(ncpus)), units: nanoseconds) 55 * (default: 2 msec * (1 + ilog(ncpus)), units: nanoseconds)
56 */ 56 */
57unsigned int sysctl_sched_min_granularity = 1000000ULL; 57unsigned int sysctl_sched_min_granularity = 2000000ULL;
58unsigned int normalized_sysctl_sched_min_granularity = 1000000ULL; 58unsigned int normalized_sysctl_sched_min_granularity = 2000000ULL;
59 59
60/* 60/*
61 * is kept at sysctl_sched_latency / sysctl_sched_min_granularity 61 * is kept at sysctl_sched_latency / sysctl_sched_min_granularity
62 */ 62 */
63static unsigned int sched_nr_latency = 5; 63static unsigned int sched_nr_latency = 3;
64 64
65/* 65/*
66 * After fork, child runs first. If set to 0 (default) then 66 * After fork, child runs first. If set to 0 (default) then
@@ -505,7 +505,8 @@ __update_curr(struct cfs_rq *cfs_rq, struct sched_entity *curr,
505{ 505{
506 unsigned long delta_exec_weighted; 506 unsigned long delta_exec_weighted;
507 507
508 schedstat_set(curr->exec_max, max((u64)delta_exec, curr->exec_max)); 508 schedstat_set(curr->statistics.exec_max,
509 max((u64)delta_exec, curr->statistics.exec_max));
509 510
510 curr->sum_exec_runtime += delta_exec; 511 curr->sum_exec_runtime += delta_exec;
511 schedstat_add(cfs_rq, exec_clock, delta_exec); 512 schedstat_add(cfs_rq, exec_clock, delta_exec);
@@ -548,7 +549,7 @@ static void update_curr(struct cfs_rq *cfs_rq)
548static inline void 549static inline void
549update_stats_wait_start(struct cfs_rq *cfs_rq, struct sched_entity *se) 550update_stats_wait_start(struct cfs_rq *cfs_rq, struct sched_entity *se)
550{ 551{
551 schedstat_set(se->wait_start, rq_of(cfs_rq)->clock); 552 schedstat_set(se->statistics.wait_start, rq_of(cfs_rq)->clock);
552} 553}
553 554
554/* 555/*
@@ -567,18 +568,18 @@ static void update_stats_enqueue(struct cfs_rq *cfs_rq, struct sched_entity *se)
567static void 568static void
568update_stats_wait_end(struct cfs_rq *cfs_rq, struct sched_entity *se) 569update_stats_wait_end(struct cfs_rq *cfs_rq, struct sched_entity *se)
569{ 570{
570 schedstat_set(se->wait_max, max(se->wait_max, 571 schedstat_set(se->statistics.wait_max, max(se->statistics.wait_max,
571 rq_of(cfs_rq)->clock - se->wait_start)); 572 rq_of(cfs_rq)->clock - se->statistics.wait_start));
572 schedstat_set(se->wait_count, se->wait_count + 1); 573 schedstat_set(se->statistics.wait_count, se->statistics.wait_count + 1);
573 schedstat_set(se->wait_sum, se->wait_sum + 574 schedstat_set(se->statistics.wait_sum, se->statistics.wait_sum +
574 rq_of(cfs_rq)->clock - se->wait_start); 575 rq_of(cfs_rq)->clock - se->statistics.wait_start);
575#ifdef CONFIG_SCHEDSTATS 576#ifdef CONFIG_SCHEDSTATS
576 if (entity_is_task(se)) { 577 if (entity_is_task(se)) {
577 trace_sched_stat_wait(task_of(se), 578 trace_sched_stat_wait(task_of(se),
578 rq_of(cfs_rq)->clock - se->wait_start); 579 rq_of(cfs_rq)->clock - se->statistics.wait_start);
579 } 580 }
580#endif 581#endif
581 schedstat_set(se->wait_start, 0); 582 schedstat_set(se->statistics.wait_start, 0);
582} 583}
583 584
584static inline void 585static inline void
@@ -657,39 +658,39 @@ static void enqueue_sleeper(struct cfs_rq *cfs_rq, struct sched_entity *se)
657 if (entity_is_task(se)) 658 if (entity_is_task(se))
658 tsk = task_of(se); 659 tsk = task_of(se);
659 660
660 if (se->sleep_start) { 661 if (se->statistics.sleep_start) {
661 u64 delta = rq_of(cfs_rq)->clock - se->sleep_start; 662 u64 delta = rq_of(cfs_rq)->clock - se->statistics.sleep_start;
662 663
663 if ((s64)delta < 0) 664 if ((s64)delta < 0)
664 delta = 0; 665 delta = 0;
665 666
666 if (unlikely(delta > se->sleep_max)) 667 if (unlikely(delta > se->statistics.sleep_max))
667 se->sleep_max = delta; 668 se->statistics.sleep_max = delta;
668 669
669 se->sleep_start = 0; 670 se->statistics.sleep_start = 0;
670 se->sum_sleep_runtime += delta; 671 se->statistics.sum_sleep_runtime += delta;
671 672
672 if (tsk) { 673 if (tsk) {
673 account_scheduler_latency(tsk, delta >> 10, 1); 674 account_scheduler_latency(tsk, delta >> 10, 1);
674 trace_sched_stat_sleep(tsk, delta); 675 trace_sched_stat_sleep(tsk, delta);
675 } 676 }
676 } 677 }
677 if (se->block_start) { 678 if (se->statistics.block_start) {
678 u64 delta = rq_of(cfs_rq)->clock - se->block_start; 679 u64 delta = rq_of(cfs_rq)->clock - se->statistics.block_start;
679 680
680 if ((s64)delta < 0) 681 if ((s64)delta < 0)
681 delta = 0; 682 delta = 0;
682 683
683 if (unlikely(delta > se->block_max)) 684 if (unlikely(delta > se->statistics.block_max))
684 se->block_max = delta; 685 se->statistics.block_max = delta;
685 686
686 se->block_start = 0; 687 se->statistics.block_start = 0;
687 se->sum_sleep_runtime += delta; 688 se->statistics.sum_sleep_runtime += delta;
688 689
689 if (tsk) { 690 if (tsk) {
690 if (tsk->in_iowait) { 691 if (tsk->in_iowait) {
691 se->iowait_sum += delta; 692 se->statistics.iowait_sum += delta;
692 se->iowait_count++; 693 se->statistics.iowait_count++;
693 trace_sched_stat_iowait(tsk, delta); 694 trace_sched_stat_iowait(tsk, delta);
694 } 695 }
695 696
@@ -737,20 +738,10 @@ place_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int initial)
737 vruntime += sched_vslice(cfs_rq, se); 738 vruntime += sched_vslice(cfs_rq, se);
738 739
739 /* sleeps up to a single latency don't count. */ 740 /* sleeps up to a single latency don't count. */
740 if (!initial && sched_feat(FAIR_SLEEPERS)) { 741 if (!initial) {
741 unsigned long thresh = sysctl_sched_latency; 742 unsigned long thresh = sysctl_sched_latency;
742 743
743 /* 744 /*
744 * Convert the sleeper threshold into virtual time.
745 * SCHED_IDLE is a special sub-class. We care about
746 * fairness only relative to other SCHED_IDLE tasks,
747 * all of which have the same weight.
748 */
749 if (sched_feat(NORMALIZED_SLEEPER) && (!entity_is_task(se) ||
750 task_of(se)->policy != SCHED_IDLE))
751 thresh = calc_delta_fair(thresh, se);
752
753 /*
754 * Halve their sleep time's effect, to allow 745 * Halve their sleep time's effect, to allow
755 * for a gentler effect of sleepers: 746 * for a gentler effect of sleepers:
756 */ 747 */
@@ -766,9 +757,6 @@ place_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int initial)
766 se->vruntime = vruntime; 757 se->vruntime = vruntime;
767} 758}
768 759
769#define ENQUEUE_WAKEUP 1
770#define ENQUEUE_MIGRATE 2
771
772static void 760static void
773enqueue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int flags) 761enqueue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int flags)
774{ 762{
@@ -776,7 +764,7 @@ enqueue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int flags)
776 * Update the normalized vruntime before updating min_vruntime 764 * Update the normalized vruntime before updating min_vruntime
777 * through callig update_curr(). 765 * through callig update_curr().
778 */ 766 */
779 if (!(flags & ENQUEUE_WAKEUP) || (flags & ENQUEUE_MIGRATE)) 767 if (!(flags & ENQUEUE_WAKEUP) || (flags & ENQUEUE_WAKING))
780 se->vruntime += cfs_rq->min_vruntime; 768 se->vruntime += cfs_rq->min_vruntime;
781 769
782 /* 770 /*
@@ -812,7 +800,7 @@ static void clear_buddies(struct cfs_rq *cfs_rq, struct sched_entity *se)
812} 800}
813 801
814static void 802static void
815dequeue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int sleep) 803dequeue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int flags)
816{ 804{
817 /* 805 /*
818 * Update run-time statistics of the 'current'. 806 * Update run-time statistics of the 'current'.
@@ -820,15 +808,15 @@ dequeue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int sleep)
820 update_curr(cfs_rq); 808 update_curr(cfs_rq);
821 809
822 update_stats_dequeue(cfs_rq, se); 810 update_stats_dequeue(cfs_rq, se);
823 if (sleep) { 811 if (flags & DEQUEUE_SLEEP) {
824#ifdef CONFIG_SCHEDSTATS 812#ifdef CONFIG_SCHEDSTATS
825 if (entity_is_task(se)) { 813 if (entity_is_task(se)) {
826 struct task_struct *tsk = task_of(se); 814 struct task_struct *tsk = task_of(se);
827 815
828 if (tsk->state & TASK_INTERRUPTIBLE) 816 if (tsk->state & TASK_INTERRUPTIBLE)
829 se->sleep_start = rq_of(cfs_rq)->clock; 817 se->statistics.sleep_start = rq_of(cfs_rq)->clock;
830 if (tsk->state & TASK_UNINTERRUPTIBLE) 818 if (tsk->state & TASK_UNINTERRUPTIBLE)
831 se->block_start = rq_of(cfs_rq)->clock; 819 se->statistics.block_start = rq_of(cfs_rq)->clock;
832 } 820 }
833#endif 821#endif
834 } 822 }
@@ -845,7 +833,7 @@ dequeue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int sleep)
845 * update can refer to the ->curr item and we need to reflect this 833 * update can refer to the ->curr item and we need to reflect this
846 * movement in our normalized position. 834 * movement in our normalized position.
847 */ 835 */
848 if (!sleep) 836 if (!(flags & DEQUEUE_SLEEP))
849 se->vruntime -= cfs_rq->min_vruntime; 837 se->vruntime -= cfs_rq->min_vruntime;
850} 838}
851 839
@@ -912,7 +900,7 @@ set_next_entity(struct cfs_rq *cfs_rq, struct sched_entity *se)
912 * when there are only lesser-weight tasks around): 900 * when there are only lesser-weight tasks around):
913 */ 901 */
914 if (rq_of(cfs_rq)->load.weight >= 2*se->load.weight) { 902 if (rq_of(cfs_rq)->load.weight >= 2*se->load.weight) {
915 se->slice_max = max(se->slice_max, 903 se->statistics.slice_max = max(se->statistics.slice_max,
916 se->sum_exec_runtime - se->prev_sum_exec_runtime); 904 se->sum_exec_runtime - se->prev_sum_exec_runtime);
917 } 905 }
918#endif 906#endif
@@ -1054,16 +1042,10 @@ static inline void hrtick_update(struct rq *rq)
1054 * then put the task into the rbtree: 1042 * then put the task into the rbtree:
1055 */ 1043 */
1056static void 1044static void
1057enqueue_task_fair(struct rq *rq, struct task_struct *p, int wakeup, bool head) 1045enqueue_task_fair(struct rq *rq, struct task_struct *p, int flags)
1058{ 1046{
1059 struct cfs_rq *cfs_rq; 1047 struct cfs_rq *cfs_rq;
1060 struct sched_entity *se = &p->se; 1048 struct sched_entity *se = &p->se;
1061 int flags = 0;
1062
1063 if (wakeup)
1064 flags |= ENQUEUE_WAKEUP;
1065 if (p->state == TASK_WAKING)
1066 flags |= ENQUEUE_MIGRATE;
1067 1049
1068 for_each_sched_entity(se) { 1050 for_each_sched_entity(se) {
1069 if (se->on_rq) 1051 if (se->on_rq)
@@ -1081,18 +1063,18 @@ enqueue_task_fair(struct rq *rq, struct task_struct *p, int wakeup, bool head)
1081 * decreased. We remove the task from the rbtree and 1063 * decreased. We remove the task from the rbtree and
1082 * update the fair scheduling stats: 1064 * update the fair scheduling stats:
1083 */ 1065 */
1084static void dequeue_task_fair(struct rq *rq, struct task_struct *p, int sleep) 1066static void dequeue_task_fair(struct rq *rq, struct task_struct *p, int flags)
1085{ 1067{
1086 struct cfs_rq *cfs_rq; 1068 struct cfs_rq *cfs_rq;
1087 struct sched_entity *se = &p->se; 1069 struct sched_entity *se = &p->se;
1088 1070
1089 for_each_sched_entity(se) { 1071 for_each_sched_entity(se) {
1090 cfs_rq = cfs_rq_of(se); 1072 cfs_rq = cfs_rq_of(se);
1091 dequeue_entity(cfs_rq, se, sleep); 1073 dequeue_entity(cfs_rq, se, flags);
1092 /* Don't dequeue parent if it has other entities besides us */ 1074 /* Don't dequeue parent if it has other entities besides us */
1093 if (cfs_rq->load.weight) 1075 if (cfs_rq->load.weight)
1094 break; 1076 break;
1095 sleep = 1; 1077 flags |= DEQUEUE_SLEEP;
1096 } 1078 }
1097 1079
1098 hrtick_update(rq); 1080 hrtick_update(rq);
@@ -1240,7 +1222,6 @@ static inline unsigned long effective_load(struct task_group *tg, int cpu,
1240 1222
1241static int wake_affine(struct sched_domain *sd, struct task_struct *p, int sync) 1223static int wake_affine(struct sched_domain *sd, struct task_struct *p, int sync)
1242{ 1224{
1243 struct task_struct *curr = current;
1244 unsigned long this_load, load; 1225 unsigned long this_load, load;
1245 int idx, this_cpu, prev_cpu; 1226 int idx, this_cpu, prev_cpu;
1246 unsigned long tl_per_task; 1227 unsigned long tl_per_task;
@@ -1255,18 +1236,6 @@ static int wake_affine(struct sched_domain *sd, struct task_struct *p, int sync)
1255 load = source_load(prev_cpu, idx); 1236 load = source_load(prev_cpu, idx);
1256 this_load = target_load(this_cpu, idx); 1237 this_load = target_load(this_cpu, idx);
1257 1238
1258 if (sync) {
1259 if (sched_feat(SYNC_LESS) &&
1260 (curr->se.avg_overlap > sysctl_sched_migration_cost ||
1261 p->se.avg_overlap > sysctl_sched_migration_cost))
1262 sync = 0;
1263 } else {
1264 if (sched_feat(SYNC_MORE) &&
1265 (curr->se.avg_overlap < sysctl_sched_migration_cost &&
1266 p->se.avg_overlap < sysctl_sched_migration_cost))
1267 sync = 1;
1268 }
1269
1270 /* 1239 /*
1271 * If sync wakeup then subtract the (maximum possible) 1240 * If sync wakeup then subtract the (maximum possible)
1272 * effect of the currently running task from the load 1241 * effect of the currently running task from the load
@@ -1306,7 +1275,7 @@ static int wake_affine(struct sched_domain *sd, struct task_struct *p, int sync)
1306 if (sync && balanced) 1275 if (sync && balanced)
1307 return 1; 1276 return 1;
1308 1277
1309 schedstat_inc(p, se.nr_wakeups_affine_attempts); 1278 schedstat_inc(p, se.statistics.nr_wakeups_affine_attempts);
1310 tl_per_task = cpu_avg_load_per_task(this_cpu); 1279 tl_per_task = cpu_avg_load_per_task(this_cpu);
1311 1280
1312 if (balanced || 1281 if (balanced ||
@@ -1318,7 +1287,7 @@ static int wake_affine(struct sched_domain *sd, struct task_struct *p, int sync)
1318 * there is no bad imbalance. 1287 * there is no bad imbalance.
1319 */ 1288 */
1320 schedstat_inc(sd, ttwu_move_affine); 1289 schedstat_inc(sd, ttwu_move_affine);
1321 schedstat_inc(p, se.nr_wakeups_affine); 1290 schedstat_inc(p, se.statistics.nr_wakeups_affine);
1322 1291
1323 return 1; 1292 return 1;
1324 } 1293 }
@@ -1406,29 +1375,48 @@ find_idlest_cpu(struct sched_group *group, struct task_struct *p, int this_cpu)
1406/* 1375/*
1407 * Try and locate an idle CPU in the sched_domain. 1376 * Try and locate an idle CPU in the sched_domain.
1408 */ 1377 */
1409static int 1378static int select_idle_sibling(struct task_struct *p, int target)
1410select_idle_sibling(struct task_struct *p, struct sched_domain *sd, int target)
1411{ 1379{
1412 int cpu = smp_processor_id(); 1380 int cpu = smp_processor_id();
1413 int prev_cpu = task_cpu(p); 1381 int prev_cpu = task_cpu(p);
1382 struct sched_domain *sd;
1414 int i; 1383 int i;
1415 1384
1416 /* 1385 /*
1417 * If this domain spans both cpu and prev_cpu (see the SD_WAKE_AFFINE 1386 * If the task is going to be woken-up on this cpu and if it is
1418 * test in select_task_rq_fair) and the prev_cpu is idle then that's 1387 * already idle, then it is the right target.
1419 * always a better target than the current cpu.
1420 */ 1388 */
1421 if (target == cpu && !cpu_rq(prev_cpu)->cfs.nr_running) 1389 if (target == cpu && idle_cpu(cpu))
1390 return cpu;
1391
1392 /*
1393 * If the task is going to be woken-up on the cpu where it previously
1394 * ran and if it is currently idle, then it the right target.
1395 */
1396 if (target == prev_cpu && idle_cpu(prev_cpu))
1422 return prev_cpu; 1397 return prev_cpu;
1423 1398
1424 /* 1399 /*
1425 * Otherwise, iterate the domain and find an elegible idle cpu. 1400 * Otherwise, iterate the domains and find an elegible idle cpu.
1426 */ 1401 */
1427 for_each_cpu_and(i, sched_domain_span(sd), &p->cpus_allowed) { 1402 for_each_domain(target, sd) {
1428 if (!cpu_rq(i)->cfs.nr_running) { 1403 if (!(sd->flags & SD_SHARE_PKG_RESOURCES))
1429 target = i;
1430 break; 1404 break;
1405
1406 for_each_cpu_and(i, sched_domain_span(sd), &p->cpus_allowed) {
1407 if (idle_cpu(i)) {
1408 target = i;
1409 break;
1410 }
1431 } 1411 }
1412
1413 /*
1414 * Lets stop looking for an idle sibling when we reached
1415 * the domain that spans the current cpu and prev_cpu.
1416 */
1417 if (cpumask_test_cpu(cpu, sched_domain_span(sd)) &&
1418 cpumask_test_cpu(prev_cpu, sched_domain_span(sd)))
1419 break;
1432 } 1420 }
1433 1421
1434 return target; 1422 return target;
@@ -1445,7 +1433,8 @@ select_idle_sibling(struct task_struct *p, struct sched_domain *sd, int target)
1445 * 1433 *
1446 * preempt must be disabled. 1434 * preempt must be disabled.
1447 */ 1435 */
1448static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flags) 1436static int
1437select_task_rq_fair(struct rq *rq, struct task_struct *p, int sd_flag, int wake_flags)
1449{ 1438{
1450 struct sched_domain *tmp, *affine_sd = NULL, *sd = NULL; 1439 struct sched_domain *tmp, *affine_sd = NULL, *sd = NULL;
1451 int cpu = smp_processor_id(); 1440 int cpu = smp_processor_id();
@@ -1456,8 +1445,7 @@ static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flag
1456 int sync = wake_flags & WF_SYNC; 1445 int sync = wake_flags & WF_SYNC;
1457 1446
1458 if (sd_flag & SD_BALANCE_WAKE) { 1447 if (sd_flag & SD_BALANCE_WAKE) {
1459 if (sched_feat(AFFINE_WAKEUPS) && 1448 if (cpumask_test_cpu(cpu, &p->cpus_allowed))
1460 cpumask_test_cpu(cpu, &p->cpus_allowed))
1461 want_affine = 1; 1449 want_affine = 1;
1462 new_cpu = prev_cpu; 1450 new_cpu = prev_cpu;
1463 } 1451 }
@@ -1491,34 +1479,13 @@ static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flag
1491 } 1479 }
1492 1480
1493 /* 1481 /*
1494 * While iterating the domains looking for a spanning 1482 * If both cpu and prev_cpu are part of this domain,
1495 * WAKE_AFFINE domain, adjust the affine target to any idle cpu 1483 * cpu is a valid SD_WAKE_AFFINE target.
1496 * in cache sharing domains along the way.
1497 */ 1484 */
1498 if (want_affine) { 1485 if (want_affine && (tmp->flags & SD_WAKE_AFFINE) &&
1499 int target = -1; 1486 cpumask_test_cpu(prev_cpu, sched_domain_span(tmp))) {
1500 1487 affine_sd = tmp;
1501 /* 1488 want_affine = 0;
1502 * If both cpu and prev_cpu are part of this domain,
1503 * cpu is a valid SD_WAKE_AFFINE target.
1504 */
1505 if (cpumask_test_cpu(prev_cpu, sched_domain_span(tmp)))
1506 target = cpu;
1507
1508 /*
1509 * If there's an idle sibling in this domain, make that
1510 * the wake_affine target instead of the current cpu.
1511 */
1512 if (tmp->flags & SD_SHARE_PKG_RESOURCES)
1513 target = select_idle_sibling(p, tmp, target);
1514
1515 if (target >= 0) {
1516 if (tmp->flags & SD_WAKE_AFFINE) {
1517 affine_sd = tmp;
1518 want_affine = 0;
1519 }
1520 cpu = target;
1521 }
1522 } 1489 }
1523 1490
1524 if (!want_sd && !want_affine) 1491 if (!want_sd && !want_affine)
@@ -1531,22 +1498,29 @@ static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flag
1531 sd = tmp; 1498 sd = tmp;
1532 } 1499 }
1533 1500
1501#ifdef CONFIG_FAIR_GROUP_SCHED
1534 if (sched_feat(LB_SHARES_UPDATE)) { 1502 if (sched_feat(LB_SHARES_UPDATE)) {
1535 /* 1503 /*
1536 * Pick the largest domain to update shares over 1504 * Pick the largest domain to update shares over
1537 */ 1505 */
1538 tmp = sd; 1506 tmp = sd;
1539 if (affine_sd && (!tmp || 1507 if (affine_sd && (!tmp || affine_sd->span_weight > sd->span_weight))
1540 cpumask_weight(sched_domain_span(affine_sd)) >
1541 cpumask_weight(sched_domain_span(sd))))
1542 tmp = affine_sd; 1508 tmp = affine_sd;
1543 1509
1544 if (tmp) 1510 if (tmp) {
1511 raw_spin_unlock(&rq->lock);
1545 update_shares(tmp); 1512 update_shares(tmp);
1513 raw_spin_lock(&rq->lock);
1514 }
1546 } 1515 }
1516#endif
1547 1517
1548 if (affine_sd && wake_affine(affine_sd, p, sync)) 1518 if (affine_sd) {
1549 return cpu; 1519 if (cpu == prev_cpu || wake_affine(affine_sd, p, sync))
1520 return select_idle_sibling(p, cpu);
1521 else
1522 return select_idle_sibling(p, prev_cpu);
1523 }
1550 1524
1551 while (sd) { 1525 while (sd) {
1552 int load_idx = sd->forkexec_idx; 1526 int load_idx = sd->forkexec_idx;
@@ -1576,10 +1550,10 @@ static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flag
1576 1550
1577 /* Now try balancing at a lower domain level of new_cpu */ 1551 /* Now try balancing at a lower domain level of new_cpu */
1578 cpu = new_cpu; 1552 cpu = new_cpu;
1579 weight = cpumask_weight(sched_domain_span(sd)); 1553 weight = sd->span_weight;
1580 sd = NULL; 1554 sd = NULL;
1581 for_each_domain(cpu, tmp) { 1555 for_each_domain(cpu, tmp) {
1582 if (weight <= cpumask_weight(sched_domain_span(tmp))) 1556 if (weight <= tmp->span_weight)
1583 break; 1557 break;
1584 if (tmp->flags & sd_flag) 1558 if (tmp->flags & sd_flag)
1585 sd = tmp; 1559 sd = tmp;
@@ -1591,63 +1565,26 @@ static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flag
1591} 1565}
1592#endif /* CONFIG_SMP */ 1566#endif /* CONFIG_SMP */
1593 1567
1594/*
1595 * Adaptive granularity
1596 *
1597 * se->avg_wakeup gives the average time a task runs until it does a wakeup,
1598 * with the limit of wakeup_gran -- when it never does a wakeup.
1599 *
1600 * So the smaller avg_wakeup is the faster we want this task to preempt,
1601 * but we don't want to treat the preemptee unfairly and therefore allow it
1602 * to run for at least the amount of time we'd like to run.
1603 *
1604 * NOTE: we use 2*avg_wakeup to increase the probability of actually doing one
1605 *
1606 * NOTE: we use *nr_running to scale with load, this nicely matches the
1607 * degrading latency on load.
1608 */
1609static unsigned long
1610adaptive_gran(struct sched_entity *curr, struct sched_entity *se)
1611{
1612 u64 this_run = curr->sum_exec_runtime - curr->prev_sum_exec_runtime;
1613 u64 expected_wakeup = 2*se->avg_wakeup * cfs_rq_of(se)->nr_running;
1614 u64 gran = 0;
1615
1616 if (this_run < expected_wakeup)
1617 gran = expected_wakeup - this_run;
1618
1619 return min_t(s64, gran, sysctl_sched_wakeup_granularity);
1620}
1621
1622static unsigned long 1568static unsigned long
1623wakeup_gran(struct sched_entity *curr, struct sched_entity *se) 1569wakeup_gran(struct sched_entity *curr, struct sched_entity *se)
1624{ 1570{
1625 unsigned long gran = sysctl_sched_wakeup_granularity; 1571 unsigned long gran = sysctl_sched_wakeup_granularity;
1626 1572
1627 if (cfs_rq_of(curr)->curr && sched_feat(ADAPTIVE_GRAN))
1628 gran = adaptive_gran(curr, se);
1629
1630 /* 1573 /*
1631 * Since its curr running now, convert the gran from real-time 1574 * Since its curr running now, convert the gran from real-time
1632 * to virtual-time in his units. 1575 * to virtual-time in his units.
1576 *
1577 * By using 'se' instead of 'curr' we penalize light tasks, so
1578 * they get preempted easier. That is, if 'se' < 'curr' then
1579 * the resulting gran will be larger, therefore penalizing the
1580 * lighter, if otoh 'se' > 'curr' then the resulting gran will
1581 * be smaller, again penalizing the lighter task.
1582 *
1583 * This is especially important for buddies when the leftmost
1584 * task is higher priority than the buddy.
1633 */ 1585 */
1634 if (sched_feat(ASYM_GRAN)) { 1586 if (unlikely(se->load.weight != NICE_0_LOAD))
1635 /* 1587 gran = calc_delta_fair(gran, se);
1636 * By using 'se' instead of 'curr' we penalize light tasks, so
1637 * they get preempted easier. That is, if 'se' < 'curr' then
1638 * the resulting gran will be larger, therefore penalizing the
1639 * lighter, if otoh 'se' > 'curr' then the resulting gran will
1640 * be smaller, again penalizing the lighter task.
1641 *
1642 * This is especially important for buddies when the leftmost
1643 * task is higher priority than the buddy.
1644 */
1645 if (unlikely(se->load.weight != NICE_0_LOAD))
1646 gran = calc_delta_fair(gran, se);
1647 } else {
1648 if (unlikely(curr->load.weight != NICE_0_LOAD))
1649 gran = calc_delta_fair(gran, curr);
1650 }
1651 1588
1652 return gran; 1589 return gran;
1653} 1590}
@@ -1705,7 +1642,6 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p, int wake_
1705 struct task_struct *curr = rq->curr; 1642 struct task_struct *curr = rq->curr;
1706 struct sched_entity *se = &curr->se, *pse = &p->se; 1643 struct sched_entity *se = &curr->se, *pse = &p->se;
1707 struct cfs_rq *cfs_rq = task_cfs_rq(curr); 1644 struct cfs_rq *cfs_rq = task_cfs_rq(curr);
1708 int sync = wake_flags & WF_SYNC;
1709 int scale = cfs_rq->nr_running >= sched_nr_latency; 1645 int scale = cfs_rq->nr_running >= sched_nr_latency;
1710 1646
1711 if (unlikely(rt_prio(p->prio))) 1647 if (unlikely(rt_prio(p->prio)))
@@ -1738,14 +1674,6 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p, int wake_
1738 if (unlikely(curr->policy == SCHED_IDLE)) 1674 if (unlikely(curr->policy == SCHED_IDLE))
1739 goto preempt; 1675 goto preempt;
1740 1676
1741 if (sched_feat(WAKEUP_SYNC) && sync)
1742 goto preempt;
1743
1744 if (sched_feat(WAKEUP_OVERLAP) &&
1745 se->avg_overlap < sysctl_sched_migration_cost &&
1746 pse->avg_overlap < sysctl_sched_migration_cost)
1747 goto preempt;
1748
1749 if (!sched_feat(WAKEUP_PREEMPT)) 1677 if (!sched_feat(WAKEUP_PREEMPT))
1750 return; 1678 return;
1751 1679
@@ -1844,13 +1772,13 @@ int can_migrate_task(struct task_struct *p, struct rq *rq, int this_cpu,
1844 * 3) are cache-hot on their current CPU. 1772 * 3) are cache-hot on their current CPU.
1845 */ 1773 */
1846 if (!cpumask_test_cpu(this_cpu, &p->cpus_allowed)) { 1774 if (!cpumask_test_cpu(this_cpu, &p->cpus_allowed)) {
1847 schedstat_inc(p, se.nr_failed_migrations_affine); 1775 schedstat_inc(p, se.statistics.nr_failed_migrations_affine);
1848 return 0; 1776 return 0;
1849 } 1777 }
1850 *all_pinned = 0; 1778 *all_pinned = 0;
1851 1779
1852 if (task_running(rq, p)) { 1780 if (task_running(rq, p)) {
1853 schedstat_inc(p, se.nr_failed_migrations_running); 1781 schedstat_inc(p, se.statistics.nr_failed_migrations_running);
1854 return 0; 1782 return 0;
1855 } 1783 }
1856 1784
@@ -1866,14 +1794,14 @@ int can_migrate_task(struct task_struct *p, struct rq *rq, int this_cpu,
1866#ifdef CONFIG_SCHEDSTATS 1794#ifdef CONFIG_SCHEDSTATS
1867 if (tsk_cache_hot) { 1795 if (tsk_cache_hot) {
1868 schedstat_inc(sd, lb_hot_gained[idle]); 1796 schedstat_inc(sd, lb_hot_gained[idle]);
1869 schedstat_inc(p, se.nr_forced_migrations); 1797 schedstat_inc(p, se.statistics.nr_forced_migrations);
1870 } 1798 }
1871#endif 1799#endif
1872 return 1; 1800 return 1;
1873 } 1801 }
1874 1802
1875 if (tsk_cache_hot) { 1803 if (tsk_cache_hot) {
1876 schedstat_inc(p, se.nr_failed_migrations_hot); 1804 schedstat_inc(p, se.statistics.nr_failed_migrations_hot);
1877 return 0; 1805 return 0;
1878 } 1806 }
1879 return 1; 1807 return 1;
@@ -2311,7 +2239,7 @@ unsigned long __weak arch_scale_freq_power(struct sched_domain *sd, int cpu)
2311 2239
2312unsigned long default_scale_smt_power(struct sched_domain *sd, int cpu) 2240unsigned long default_scale_smt_power(struct sched_domain *sd, int cpu)
2313{ 2241{
2314 unsigned long weight = cpumask_weight(sched_domain_span(sd)); 2242 unsigned long weight = sd->span_weight;
2315 unsigned long smt_gain = sd->smt_gain; 2243 unsigned long smt_gain = sd->smt_gain;
2316 2244
2317 smt_gain /= weight; 2245 smt_gain /= weight;
@@ -2344,7 +2272,7 @@ unsigned long scale_rt_power(int cpu)
2344 2272
2345static void update_cpu_power(struct sched_domain *sd, int cpu) 2273static void update_cpu_power(struct sched_domain *sd, int cpu)
2346{ 2274{
2347 unsigned long weight = cpumask_weight(sched_domain_span(sd)); 2275 unsigned long weight = sd->span_weight;
2348 unsigned long power = SCHED_LOAD_SCALE; 2276 unsigned long power = SCHED_LOAD_SCALE;
2349 struct sched_group *sdg = sd->groups; 2277 struct sched_group *sdg = sd->groups;
2350 2278
@@ -2870,6 +2798,8 @@ static int need_active_balance(struct sched_domain *sd, int sd_idle, int idle)
2870 return unlikely(sd->nr_balance_failed > sd->cache_nice_tries+2); 2798 return unlikely(sd->nr_balance_failed > sd->cache_nice_tries+2);
2871} 2799}
2872 2800
2801static int active_load_balance_cpu_stop(void *data);
2802
2873/* 2803/*
2874 * Check this_cpu to ensure it is balanced within domain. Attempt to move 2804 * Check this_cpu to ensure it is balanced within domain. Attempt to move
2875 * tasks if there is an imbalance. 2805 * tasks if there is an imbalance.
@@ -2959,8 +2889,9 @@ redo:
2959 if (need_active_balance(sd, sd_idle, idle)) { 2889 if (need_active_balance(sd, sd_idle, idle)) {
2960 raw_spin_lock_irqsave(&busiest->lock, flags); 2890 raw_spin_lock_irqsave(&busiest->lock, flags);
2961 2891
2962 /* don't kick the migration_thread, if the curr 2892 /* don't kick the active_load_balance_cpu_stop,
2963 * task on busiest cpu can't be moved to this_cpu 2893 * if the curr task on busiest cpu can't be
2894 * moved to this_cpu
2964 */ 2895 */
2965 if (!cpumask_test_cpu(this_cpu, 2896 if (!cpumask_test_cpu(this_cpu,
2966 &busiest->curr->cpus_allowed)) { 2897 &busiest->curr->cpus_allowed)) {
@@ -2970,14 +2901,22 @@ redo:
2970 goto out_one_pinned; 2901 goto out_one_pinned;
2971 } 2902 }
2972 2903
2904 /*
2905 * ->active_balance synchronizes accesses to
2906 * ->active_balance_work. Once set, it's cleared
2907 * only after active load balance is finished.
2908 */
2973 if (!busiest->active_balance) { 2909 if (!busiest->active_balance) {
2974 busiest->active_balance = 1; 2910 busiest->active_balance = 1;
2975 busiest->push_cpu = this_cpu; 2911 busiest->push_cpu = this_cpu;
2976 active_balance = 1; 2912 active_balance = 1;
2977 } 2913 }
2978 raw_spin_unlock_irqrestore(&busiest->lock, flags); 2914 raw_spin_unlock_irqrestore(&busiest->lock, flags);
2915
2979 if (active_balance) 2916 if (active_balance)
2980 wake_up_process(busiest->migration_thread); 2917 stop_one_cpu_nowait(cpu_of(busiest),
2918 active_load_balance_cpu_stop, busiest,
2919 &busiest->active_balance_work);
2981 2920
2982 /* 2921 /*
2983 * We've kicked active balancing, reset the failure 2922 * We've kicked active balancing, reset the failure
@@ -3084,24 +3023,29 @@ static void idle_balance(int this_cpu, struct rq *this_rq)
3084} 3023}
3085 3024
3086/* 3025/*
3087 * active_load_balance is run by migration threads. It pushes running tasks 3026 * active_load_balance_cpu_stop is run by cpu stopper. It pushes
3088 * off the busiest CPU onto idle CPUs. It requires at least 1 task to be 3027 * running tasks off the busiest CPU onto idle CPUs. It requires at
3089 * running on each physical CPU where possible, and avoids physical / 3028 * least 1 task to be running on each physical CPU where possible, and
3090 * logical imbalances. 3029 * avoids physical / logical imbalances.
3091 *
3092 * Called with busiest_rq locked.
3093 */ 3030 */
3094static void active_load_balance(struct rq *busiest_rq, int busiest_cpu) 3031static int active_load_balance_cpu_stop(void *data)
3095{ 3032{
3033 struct rq *busiest_rq = data;
3034 int busiest_cpu = cpu_of(busiest_rq);
3096 int target_cpu = busiest_rq->push_cpu; 3035 int target_cpu = busiest_rq->push_cpu;
3036 struct rq *target_rq = cpu_rq(target_cpu);
3097 struct sched_domain *sd; 3037 struct sched_domain *sd;
3098 struct rq *target_rq; 3038
3039 raw_spin_lock_irq(&busiest_rq->lock);
3040
3041 /* make sure the requested cpu hasn't gone down in the meantime */
3042 if (unlikely(busiest_cpu != smp_processor_id() ||
3043 !busiest_rq->active_balance))
3044 goto out_unlock;
3099 3045
3100 /* Is there any task to move? */ 3046 /* Is there any task to move? */
3101 if (busiest_rq->nr_running <= 1) 3047 if (busiest_rq->nr_running <= 1)
3102 return; 3048 goto out_unlock;
3103
3104 target_rq = cpu_rq(target_cpu);
3105 3049
3106 /* 3050 /*
3107 * This condition is "impossible", if it occurs 3051 * This condition is "impossible", if it occurs
@@ -3112,8 +3056,6 @@ static void active_load_balance(struct rq *busiest_rq, int busiest_cpu)
3112 3056
3113 /* move a task from busiest_rq to target_rq */ 3057 /* move a task from busiest_rq to target_rq */
3114 double_lock_balance(busiest_rq, target_rq); 3058 double_lock_balance(busiest_rq, target_rq);
3115 update_rq_clock(busiest_rq);
3116 update_rq_clock(target_rq);
3117 3059
3118 /* Search for an sd spanning us and the target CPU. */ 3060 /* Search for an sd spanning us and the target CPU. */
3119 for_each_domain(target_cpu, sd) { 3061 for_each_domain(target_cpu, sd) {
@@ -3132,6 +3074,10 @@ static void active_load_balance(struct rq *busiest_rq, int busiest_cpu)
3132 schedstat_inc(sd, alb_failed); 3074 schedstat_inc(sd, alb_failed);
3133 } 3075 }
3134 double_unlock_balance(busiest_rq, target_rq); 3076 double_unlock_balance(busiest_rq, target_rq);
3077out_unlock:
3078 busiest_rq->active_balance = 0;
3079 raw_spin_unlock_irq(&busiest_rq->lock);
3080 return 0;
3135} 3081}
3136 3082
3137#ifdef CONFIG_NO_HZ 3083#ifdef CONFIG_NO_HZ
diff --git a/kernel/sched_features.h b/kernel/sched_features.h
index d5059fd761d9..83c66e8ad3ee 100644
--- a/kernel/sched_features.h
+++ b/kernel/sched_features.h
@@ -1,11 +1,4 @@
1/* 1/*
2 * Disregards a certain amount of sleep time (sched_latency_ns) and
3 * considers the task to be running during that period. This gives it
4 * a service deficit on wakeup, allowing it to run sooner.
5 */
6SCHED_FEAT(FAIR_SLEEPERS, 1)
7
8/*
9 * Only give sleepers 50% of their service deficit. This allows 2 * Only give sleepers 50% of their service deficit. This allows
10 * them to run sooner, but does not allow tons of sleepers to 3 * them to run sooner, but does not allow tons of sleepers to
11 * rip the spread apart. 4 * rip the spread apart.
@@ -13,13 +6,6 @@ SCHED_FEAT(FAIR_SLEEPERS, 1)
13SCHED_FEAT(GENTLE_FAIR_SLEEPERS, 1) 6SCHED_FEAT(GENTLE_FAIR_SLEEPERS, 1)
14 7
15/* 8/*
16 * By not normalizing the sleep time, heavy tasks get an effective
17 * longer period, and lighter task an effective shorter period they
18 * are considered running.
19 */
20SCHED_FEAT(NORMALIZED_SLEEPER, 0)
21
22/*
23 * Place new tasks ahead so that they do not starve already running 9 * Place new tasks ahead so that they do not starve already running
24 * tasks 10 * tasks
25 */ 11 */
@@ -31,37 +17,6 @@ SCHED_FEAT(START_DEBIT, 1)
31SCHED_FEAT(WAKEUP_PREEMPT, 1) 17SCHED_FEAT(WAKEUP_PREEMPT, 1)
32 18
33/* 19/*
34 * Compute wakeup_gran based on task behaviour, clipped to
35 * [0, sched_wakeup_gran_ns]
36 */
37SCHED_FEAT(ADAPTIVE_GRAN, 1)
38
39/*
40 * When converting the wakeup granularity to virtual time, do it such
41 * that heavier tasks preempting a lighter task have an edge.
42 */
43SCHED_FEAT(ASYM_GRAN, 1)
44
45/*
46 * Always wakeup-preempt SYNC wakeups, see SYNC_WAKEUPS.
47 */
48SCHED_FEAT(WAKEUP_SYNC, 0)
49
50/*
51 * Wakeup preempt based on task behaviour. Tasks that do not overlap
52 * don't get preempted.
53 */
54SCHED_FEAT(WAKEUP_OVERLAP, 0)
55
56/*
57 * Use the SYNC wakeup hint, pipes and the likes use this to indicate
58 * the remote end is likely to consume the data we just wrote, and
59 * therefore has cache benefit from being placed on the same cpu, see
60 * also AFFINE_WAKEUPS.
61 */
62SCHED_FEAT(SYNC_WAKEUPS, 1)
63
64/*
65 * Based on load and program behaviour, see if it makes sense to place 20 * Based on load and program behaviour, see if it makes sense to place
66 * a newly woken task on the same cpu as the task that woke it -- 21 * a newly woken task on the same cpu as the task that woke it --
67 * improve cache locality. Typically used with SYNC wakeups as 22 * improve cache locality. Typically used with SYNC wakeups as
@@ -70,16 +25,6 @@ SCHED_FEAT(SYNC_WAKEUPS, 1)
70SCHED_FEAT(AFFINE_WAKEUPS, 1) 25SCHED_FEAT(AFFINE_WAKEUPS, 1)
71 26
72/* 27/*
73 * Weaken SYNC hint based on overlap
74 */
75SCHED_FEAT(SYNC_LESS, 1)
76
77/*
78 * Add SYNC hint based on overlap
79 */
80SCHED_FEAT(SYNC_MORE, 0)
81
82/*
83 * Prefer to schedule the task we woke last (assuming it failed 28 * Prefer to schedule the task we woke last (assuming it failed
84 * wakeup-preemption), since its likely going to consume data we 29 * wakeup-preemption), since its likely going to consume data we
85 * touched, increases cache locality. 30 * touched, increases cache locality.
diff --git a/kernel/sched_idletask.c b/kernel/sched_idletask.c
index a8a6d8a50947..9fa0f402c87c 100644
--- a/kernel/sched_idletask.c
+++ b/kernel/sched_idletask.c
@@ -6,7 +6,8 @@
6 */ 6 */
7 7
8#ifdef CONFIG_SMP 8#ifdef CONFIG_SMP
9static int select_task_rq_idle(struct task_struct *p, int sd_flag, int flags) 9static int
10select_task_rq_idle(struct rq *rq, struct task_struct *p, int sd_flag, int flags)
10{ 11{
11 return task_cpu(p); /* IDLE tasks as never migrated */ 12 return task_cpu(p); /* IDLE tasks as never migrated */
12} 13}
@@ -22,8 +23,7 @@ static void check_preempt_curr_idle(struct rq *rq, struct task_struct *p, int fl
22static struct task_struct *pick_next_task_idle(struct rq *rq) 23static struct task_struct *pick_next_task_idle(struct rq *rq)
23{ 24{
24 schedstat_inc(rq, sched_goidle); 25 schedstat_inc(rq, sched_goidle);
25 /* adjust the active tasks as we might go into a long sleep */ 26 calc_load_account_idle(rq);
26 calc_load_account_active(rq);
27 return rq->idle; 27 return rq->idle;
28} 28}
29 29
@@ -32,7 +32,7 @@ static struct task_struct *pick_next_task_idle(struct rq *rq)
32 * message if some code attempts to do it: 32 * message if some code attempts to do it:
33 */ 33 */
34static void 34static void
35dequeue_task_idle(struct rq *rq, struct task_struct *p, int sleep) 35dequeue_task_idle(struct rq *rq, struct task_struct *p, int flags)
36{ 36{
37 raw_spin_unlock_irq(&rq->lock); 37 raw_spin_unlock_irq(&rq->lock);
38 printk(KERN_ERR "bad: scheduling from the idle thread!\n"); 38 printk(KERN_ERR "bad: scheduling from the idle thread!\n");
diff --git a/kernel/sched_rt.c b/kernel/sched_rt.c
index b5b920ae2ea7..8afb953e31c6 100644
--- a/kernel/sched_rt.c
+++ b/kernel/sched_rt.c
@@ -613,7 +613,7 @@ static void update_curr_rt(struct rq *rq)
613 if (unlikely((s64)delta_exec < 0)) 613 if (unlikely((s64)delta_exec < 0))
614 delta_exec = 0; 614 delta_exec = 0;
615 615
616 schedstat_set(curr->se.exec_max, max(curr->se.exec_max, delta_exec)); 616 schedstat_set(curr->se.statistics.exec_max, max(curr->se.statistics.exec_max, delta_exec));
617 617
618 curr->se.sum_exec_runtime += delta_exec; 618 curr->se.sum_exec_runtime += delta_exec;
619 account_group_exec_runtime(curr, delta_exec); 619 account_group_exec_runtime(curr, delta_exec);
@@ -888,20 +888,20 @@ static void dequeue_rt_entity(struct sched_rt_entity *rt_se)
888 * Adding/removing a task to/from a priority array: 888 * Adding/removing a task to/from a priority array:
889 */ 889 */
890static void 890static void
891enqueue_task_rt(struct rq *rq, struct task_struct *p, int wakeup, bool head) 891enqueue_task_rt(struct rq *rq, struct task_struct *p, int flags)
892{ 892{
893 struct sched_rt_entity *rt_se = &p->rt; 893 struct sched_rt_entity *rt_se = &p->rt;
894 894
895 if (wakeup) 895 if (flags & ENQUEUE_WAKEUP)
896 rt_se->timeout = 0; 896 rt_se->timeout = 0;
897 897
898 enqueue_rt_entity(rt_se, head); 898 enqueue_rt_entity(rt_se, flags & ENQUEUE_HEAD);
899 899
900 if (!task_current(rq, p) && p->rt.nr_cpus_allowed > 1) 900 if (!task_current(rq, p) && p->rt.nr_cpus_allowed > 1)
901 enqueue_pushable_task(rq, p); 901 enqueue_pushable_task(rq, p);
902} 902}
903 903
904static void dequeue_task_rt(struct rq *rq, struct task_struct *p, int sleep) 904static void dequeue_task_rt(struct rq *rq, struct task_struct *p, int flags)
905{ 905{
906 struct sched_rt_entity *rt_se = &p->rt; 906 struct sched_rt_entity *rt_se = &p->rt;
907 907
@@ -948,10 +948,9 @@ static void yield_task_rt(struct rq *rq)
948#ifdef CONFIG_SMP 948#ifdef CONFIG_SMP
949static int find_lowest_rq(struct task_struct *task); 949static int find_lowest_rq(struct task_struct *task);
950 950
951static int select_task_rq_rt(struct task_struct *p, int sd_flag, int flags) 951static int
952select_task_rq_rt(struct rq *rq, struct task_struct *p, int sd_flag, int flags)
952{ 953{
953 struct rq *rq = task_rq(p);
954
955 if (sd_flag != SD_BALANCE_WAKE) 954 if (sd_flag != SD_BALANCE_WAKE)
956 return smp_processor_id(); 955 return smp_processor_id();
957 956
diff --git a/kernel/softirq.c b/kernel/softirq.c
index 7c1a67ef0274..0db913a5c60f 100644
--- a/kernel/softirq.c
+++ b/kernel/softirq.c
@@ -716,7 +716,7 @@ static int run_ksoftirqd(void * __bind_cpu)
716 preempt_enable_no_resched(); 716 preempt_enable_no_resched();
717 cond_resched(); 717 cond_resched();
718 preempt_disable(); 718 preempt_disable();
719 rcu_sched_qs((long)__bind_cpu); 719 rcu_note_context_switch((long)__bind_cpu);
720 } 720 }
721 preempt_enable(); 721 preempt_enable();
722 set_current_state(TASK_INTERRUPTIBLE); 722 set_current_state(TASK_INTERRUPTIBLE);
diff --git a/kernel/stop_machine.c b/kernel/stop_machine.c
index 9bb9fb1bd79c..b4e7431e7c78 100644
--- a/kernel/stop_machine.c
+++ b/kernel/stop_machine.c
@@ -1,17 +1,384 @@
1/* Copyright 2008, 2005 Rusty Russell rusty@rustcorp.com.au IBM Corporation. 1/*
2 * GPL v2 and any later version. 2 * kernel/stop_machine.c
3 *
4 * Copyright (C) 2008, 2005 IBM Corporation.
5 * Copyright (C) 2008, 2005 Rusty Russell rusty@rustcorp.com.au
6 * Copyright (C) 2010 SUSE Linux Products GmbH
7 * Copyright (C) 2010 Tejun Heo <tj@kernel.org>
8 *
9 * This file is released under the GPLv2 and any later version.
3 */ 10 */
11#include <linux/completion.h>
4#include <linux/cpu.h> 12#include <linux/cpu.h>
5#include <linux/err.h> 13#include <linux/init.h>
6#include <linux/kthread.h> 14#include <linux/kthread.h>
7#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/percpu.h>
8#include <linux/sched.h> 17#include <linux/sched.h>
9#include <linux/stop_machine.h> 18#include <linux/stop_machine.h>
10#include <linux/syscalls.h>
11#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/kallsyms.h>
12 21
13#include <asm/atomic.h> 22#include <asm/atomic.h>
14#include <asm/uaccess.h> 23
24/*
25 * Structure to determine completion condition and record errors. May
26 * be shared by works on different cpus.
27 */
28struct cpu_stop_done {
29 atomic_t nr_todo; /* nr left to execute */
30 bool executed; /* actually executed? */
31 int ret; /* collected return value */
32 struct completion completion; /* fired if nr_todo reaches 0 */
33};
34
35/* the actual stopper, one per every possible cpu, enabled on online cpus */
36struct cpu_stopper {
37 spinlock_t lock;
38 struct list_head works; /* list of pending works */
39 struct task_struct *thread; /* stopper thread */
40 bool enabled; /* is this stopper enabled? */
41};
42
43static DEFINE_PER_CPU(struct cpu_stopper, cpu_stopper);
44
45static void cpu_stop_init_done(struct cpu_stop_done *done, unsigned int nr_todo)
46{
47 memset(done, 0, sizeof(*done));
48 atomic_set(&done->nr_todo, nr_todo);
49 init_completion(&done->completion);
50}
51
52/* signal completion unless @done is NULL */
53static void cpu_stop_signal_done(struct cpu_stop_done *done, bool executed)
54{
55 if (done) {
56 if (executed)
57 done->executed = true;
58 if (atomic_dec_and_test(&done->nr_todo))
59 complete(&done->completion);
60 }
61}
62
63/* queue @work to @stopper. if offline, @work is completed immediately */
64static void cpu_stop_queue_work(struct cpu_stopper *stopper,
65 struct cpu_stop_work *work)
66{
67 unsigned long flags;
68
69 spin_lock_irqsave(&stopper->lock, flags);
70
71 if (stopper->enabled) {
72 list_add_tail(&work->list, &stopper->works);
73 wake_up_process(stopper->thread);
74 } else
75 cpu_stop_signal_done(work->done, false);
76
77 spin_unlock_irqrestore(&stopper->lock, flags);
78}
79
80/**
81 * stop_one_cpu - stop a cpu
82 * @cpu: cpu to stop
83 * @fn: function to execute
84 * @arg: argument to @fn
85 *
86 * Execute @fn(@arg) on @cpu. @fn is run in a process context with
87 * the highest priority preempting any task on the cpu and
88 * monopolizing it. This function returns after the execution is
89 * complete.
90 *
91 * This function doesn't guarantee @cpu stays online till @fn
92 * completes. If @cpu goes down in the middle, execution may happen
93 * partially or fully on different cpus. @fn should either be ready
94 * for that or the caller should ensure that @cpu stays online until
95 * this function completes.
96 *
97 * CONTEXT:
98 * Might sleep.
99 *
100 * RETURNS:
101 * -ENOENT if @fn(@arg) was not executed because @cpu was offline;
102 * otherwise, the return value of @fn.
103 */
104int stop_one_cpu(unsigned int cpu, cpu_stop_fn_t fn, void *arg)
105{
106 struct cpu_stop_done done;
107 struct cpu_stop_work work = { .fn = fn, .arg = arg, .done = &done };
108
109 cpu_stop_init_done(&done, 1);
110 cpu_stop_queue_work(&per_cpu(cpu_stopper, cpu), &work);
111 wait_for_completion(&done.completion);
112 return done.executed ? done.ret : -ENOENT;
113}
114
115/**
116 * stop_one_cpu_nowait - stop a cpu but don't wait for completion
117 * @cpu: cpu to stop
118 * @fn: function to execute
119 * @arg: argument to @fn
120 *
121 * Similar to stop_one_cpu() but doesn't wait for completion. The
122 * caller is responsible for ensuring @work_buf is currently unused
123 * and will remain untouched until stopper starts executing @fn.
124 *
125 * CONTEXT:
126 * Don't care.
127 */
128void stop_one_cpu_nowait(unsigned int cpu, cpu_stop_fn_t fn, void *arg,
129 struct cpu_stop_work *work_buf)
130{
131 *work_buf = (struct cpu_stop_work){ .fn = fn, .arg = arg, };
132 cpu_stop_queue_work(&per_cpu(cpu_stopper, cpu), work_buf);
133}
134
135/* static data for stop_cpus */
136static DEFINE_MUTEX(stop_cpus_mutex);
137static DEFINE_PER_CPU(struct cpu_stop_work, stop_cpus_work);
138
139int __stop_cpus(const struct cpumask *cpumask, cpu_stop_fn_t fn, void *arg)
140{
141 struct cpu_stop_work *work;
142 struct cpu_stop_done done;
143 unsigned int cpu;
144
145 /* initialize works and done */
146 for_each_cpu(cpu, cpumask) {
147 work = &per_cpu(stop_cpus_work, cpu);
148 work->fn = fn;
149 work->arg = arg;
150 work->done = &done;
151 }
152 cpu_stop_init_done(&done, cpumask_weight(cpumask));
153
154 /*
155 * Disable preemption while queueing to avoid getting
156 * preempted by a stopper which might wait for other stoppers
157 * to enter @fn which can lead to deadlock.
158 */
159 preempt_disable();
160 for_each_cpu(cpu, cpumask)
161 cpu_stop_queue_work(&per_cpu(cpu_stopper, cpu),
162 &per_cpu(stop_cpus_work, cpu));
163 preempt_enable();
164
165 wait_for_completion(&done.completion);
166 return done.executed ? done.ret : -ENOENT;
167}
168
169/**
170 * stop_cpus - stop multiple cpus
171 * @cpumask: cpus to stop
172 * @fn: function to execute
173 * @arg: argument to @fn
174 *
175 * Execute @fn(@arg) on online cpus in @cpumask. On each target cpu,
176 * @fn is run in a process context with the highest priority
177 * preempting any task on the cpu and monopolizing it. This function
178 * returns after all executions are complete.
179 *
180 * This function doesn't guarantee the cpus in @cpumask stay online
181 * till @fn completes. If some cpus go down in the middle, execution
182 * on the cpu may happen partially or fully on different cpus. @fn
183 * should either be ready for that or the caller should ensure that
184 * the cpus stay online until this function completes.
185 *
186 * All stop_cpus() calls are serialized making it safe for @fn to wait
187 * for all cpus to start executing it.
188 *
189 * CONTEXT:
190 * Might sleep.
191 *
192 * RETURNS:
193 * -ENOENT if @fn(@arg) was not executed at all because all cpus in
194 * @cpumask were offline; otherwise, 0 if all executions of @fn
195 * returned 0, any non zero return value if any returned non zero.
196 */
197int stop_cpus(const struct cpumask *cpumask, cpu_stop_fn_t fn, void *arg)
198{
199 int ret;
200
201 /* static works are used, process one request at a time */
202 mutex_lock(&stop_cpus_mutex);
203 ret = __stop_cpus(cpumask, fn, arg);
204 mutex_unlock(&stop_cpus_mutex);
205 return ret;
206}
207
208/**
209 * try_stop_cpus - try to stop multiple cpus
210 * @cpumask: cpus to stop
211 * @fn: function to execute
212 * @arg: argument to @fn
213 *
214 * Identical to stop_cpus() except that it fails with -EAGAIN if
215 * someone else is already using the facility.
216 *
217 * CONTEXT:
218 * Might sleep.
219 *
220 * RETURNS:
221 * -EAGAIN if someone else is already stopping cpus, -ENOENT if
222 * @fn(@arg) was not executed at all because all cpus in @cpumask were
223 * offline; otherwise, 0 if all executions of @fn returned 0, any non
224 * zero return value if any returned non zero.
225 */
226int try_stop_cpus(const struct cpumask *cpumask, cpu_stop_fn_t fn, void *arg)
227{
228 int ret;
229
230 /* static works are used, process one request at a time */
231 if (!mutex_trylock(&stop_cpus_mutex))
232 return -EAGAIN;
233 ret = __stop_cpus(cpumask, fn, arg);
234 mutex_unlock(&stop_cpus_mutex);
235 return ret;
236}
237
238static int cpu_stopper_thread(void *data)
239{
240 struct cpu_stopper *stopper = data;
241 struct cpu_stop_work *work;
242 int ret;
243
244repeat:
245 set_current_state(TASK_INTERRUPTIBLE); /* mb paired w/ kthread_stop */
246
247 if (kthread_should_stop()) {
248 __set_current_state(TASK_RUNNING);
249 return 0;
250 }
251
252 work = NULL;
253 spin_lock_irq(&stopper->lock);
254 if (!list_empty(&stopper->works)) {
255 work = list_first_entry(&stopper->works,
256 struct cpu_stop_work, list);
257 list_del_init(&work->list);
258 }
259 spin_unlock_irq(&stopper->lock);
260
261 if (work) {
262 cpu_stop_fn_t fn = work->fn;
263 void *arg = work->arg;
264 struct cpu_stop_done *done = work->done;
265 char ksym_buf[KSYM_NAME_LEN];
266
267 __set_current_state(TASK_RUNNING);
268
269 /* cpu stop callbacks are not allowed to sleep */
270 preempt_disable();
271
272 ret = fn(arg);
273 if (ret)
274 done->ret = ret;
275
276 /* restore preemption and check it's still balanced */
277 preempt_enable();
278 WARN_ONCE(preempt_count(),
279 "cpu_stop: %s(%p) leaked preempt count\n",
280 kallsyms_lookup((unsigned long)fn, NULL, NULL, NULL,
281 ksym_buf), arg);
282
283 cpu_stop_signal_done(done, true);
284 } else
285 schedule();
286
287 goto repeat;
288}
289
290/* manage stopper for a cpu, mostly lifted from sched migration thread mgmt */
291static int __cpuinit cpu_stop_cpu_callback(struct notifier_block *nfb,
292 unsigned long action, void *hcpu)
293{
294 struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 };
295 unsigned int cpu = (unsigned long)hcpu;
296 struct cpu_stopper *stopper = &per_cpu(cpu_stopper, cpu);
297 struct task_struct *p;
298
299 switch (action & ~CPU_TASKS_FROZEN) {
300 case CPU_UP_PREPARE:
301 BUG_ON(stopper->thread || stopper->enabled ||
302 !list_empty(&stopper->works));
303 p = kthread_create(cpu_stopper_thread, stopper, "migration/%d",
304 cpu);
305 if (IS_ERR(p))
306 return NOTIFY_BAD;
307 sched_setscheduler_nocheck(p, SCHED_FIFO, &param);
308 get_task_struct(p);
309 stopper->thread = p;
310 break;
311
312 case CPU_ONLINE:
313 kthread_bind(stopper->thread, cpu);
314 /* strictly unnecessary, as first user will wake it */
315 wake_up_process(stopper->thread);
316 /* mark enabled */
317 spin_lock_irq(&stopper->lock);
318 stopper->enabled = true;
319 spin_unlock_irq(&stopper->lock);
320 break;
321
322#ifdef CONFIG_HOTPLUG_CPU
323 case CPU_UP_CANCELED:
324 case CPU_DEAD:
325 {
326 struct cpu_stop_work *work;
327
328 /* kill the stopper */
329 kthread_stop(stopper->thread);
330 /* drain remaining works */
331 spin_lock_irq(&stopper->lock);
332 list_for_each_entry(work, &stopper->works, list)
333 cpu_stop_signal_done(work->done, false);
334 stopper->enabled = false;
335 spin_unlock_irq(&stopper->lock);
336 /* release the stopper */
337 put_task_struct(stopper->thread);
338 stopper->thread = NULL;
339 break;
340 }
341#endif
342 }
343
344 return NOTIFY_OK;
345}
346
347/*
348 * Give it a higher priority so that cpu stopper is available to other
349 * cpu notifiers. It currently shares the same priority as sched
350 * migration_notifier.
351 */
352static struct notifier_block __cpuinitdata cpu_stop_cpu_notifier = {
353 .notifier_call = cpu_stop_cpu_callback,
354 .priority = 10,
355};
356
357static int __init cpu_stop_init(void)
358{
359 void *bcpu = (void *)(long)smp_processor_id();
360 unsigned int cpu;
361 int err;
362
363 for_each_possible_cpu(cpu) {
364 struct cpu_stopper *stopper = &per_cpu(cpu_stopper, cpu);
365
366 spin_lock_init(&stopper->lock);
367 INIT_LIST_HEAD(&stopper->works);
368 }
369
370 /* start one for the boot cpu */
371 err = cpu_stop_cpu_callback(&cpu_stop_cpu_notifier, CPU_UP_PREPARE,
372 bcpu);
373 BUG_ON(err == NOTIFY_BAD);
374 cpu_stop_cpu_callback(&cpu_stop_cpu_notifier, CPU_ONLINE, bcpu);
375 register_cpu_notifier(&cpu_stop_cpu_notifier);
376
377 return 0;
378}
379early_initcall(cpu_stop_init);
380
381#ifdef CONFIG_STOP_MACHINE
15 382
16/* This controls the threads on each CPU. */ 383/* This controls the threads on each CPU. */
17enum stopmachine_state { 384enum stopmachine_state {
@@ -26,174 +393,94 @@ enum stopmachine_state {
26 /* Exit */ 393 /* Exit */
27 STOPMACHINE_EXIT, 394 STOPMACHINE_EXIT,
28}; 395};
29static enum stopmachine_state state;
30 396
31struct stop_machine_data { 397struct stop_machine_data {
32 int (*fn)(void *); 398 int (*fn)(void *);
33 void *data; 399 void *data;
34 int fnret; 400 /* Like num_online_cpus(), but hotplug cpu uses us, so we need this. */
401 unsigned int num_threads;
402 const struct cpumask *active_cpus;
403
404 enum stopmachine_state state;
405 atomic_t thread_ack;
35}; 406};
36 407
37/* Like num_online_cpus(), but hotplug cpu uses us, so we need this. */ 408static void set_state(struct stop_machine_data *smdata,
38static unsigned int num_threads; 409 enum stopmachine_state newstate)
39static atomic_t thread_ack;
40static DEFINE_MUTEX(lock);
41/* setup_lock protects refcount, stop_machine_wq and stop_machine_work. */
42static DEFINE_MUTEX(setup_lock);
43/* Users of stop_machine. */
44static int refcount;
45static struct workqueue_struct *stop_machine_wq;
46static struct stop_machine_data active, idle;
47static const struct cpumask *active_cpus;
48static void __percpu *stop_machine_work;
49
50static void set_state(enum stopmachine_state newstate)
51{ 410{
52 /* Reset ack counter. */ 411 /* Reset ack counter. */
53 atomic_set(&thread_ack, num_threads); 412 atomic_set(&smdata->thread_ack, smdata->num_threads);
54 smp_wmb(); 413 smp_wmb();
55 state = newstate; 414 smdata->state = newstate;
56} 415}
57 416
58/* Last one to ack a state moves to the next state. */ 417/* Last one to ack a state moves to the next state. */
59static void ack_state(void) 418static void ack_state(struct stop_machine_data *smdata)
60{ 419{
61 if (atomic_dec_and_test(&thread_ack)) 420 if (atomic_dec_and_test(&smdata->thread_ack))
62 set_state(state + 1); 421 set_state(smdata, smdata->state + 1);
63} 422}
64 423
65/* This is the actual function which stops the CPU. It runs 424/* This is the cpu_stop function which stops the CPU. */
66 * in the context of a dedicated stopmachine workqueue. */ 425static int stop_machine_cpu_stop(void *data)
67static void stop_cpu(struct work_struct *unused)
68{ 426{
427 struct stop_machine_data *smdata = data;
69 enum stopmachine_state curstate = STOPMACHINE_NONE; 428 enum stopmachine_state curstate = STOPMACHINE_NONE;
70 struct stop_machine_data *smdata = &idle; 429 int cpu = smp_processor_id(), err = 0;
71 int cpu = smp_processor_id(); 430 bool is_active;
72 int err; 431
432 if (!smdata->active_cpus)
433 is_active = cpu == cpumask_first(cpu_online_mask);
434 else
435 is_active = cpumask_test_cpu(cpu, smdata->active_cpus);
73 436
74 if (!active_cpus) {
75 if (cpu == cpumask_first(cpu_online_mask))
76 smdata = &active;
77 } else {
78 if (cpumask_test_cpu(cpu, active_cpus))
79 smdata = &active;
80 }
81 /* Simple state machine */ 437 /* Simple state machine */
82 do { 438 do {
83 /* Chill out and ensure we re-read stopmachine_state. */ 439 /* Chill out and ensure we re-read stopmachine_state. */
84 cpu_relax(); 440 cpu_relax();
85 if (state != curstate) { 441 if (smdata->state != curstate) {
86 curstate = state; 442 curstate = smdata->state;
87 switch (curstate) { 443 switch (curstate) {
88 case STOPMACHINE_DISABLE_IRQ: 444 case STOPMACHINE_DISABLE_IRQ:
89 local_irq_disable(); 445 local_irq_disable();
90 hard_irq_disable(); 446 hard_irq_disable();
91 break; 447 break;
92 case STOPMACHINE_RUN: 448 case STOPMACHINE_RUN:
93 /* On multiple CPUs only a single error code 449 if (is_active)
94 * is needed to tell that something failed. */ 450 err = smdata->fn(smdata->data);
95 err = smdata->fn(smdata->data);
96 if (err)
97 smdata->fnret = err;
98 break; 451 break;
99 default: 452 default:
100 break; 453 break;
101 } 454 }
102 ack_state(); 455 ack_state(smdata);
103 } 456 }
104 } while (curstate != STOPMACHINE_EXIT); 457 } while (curstate != STOPMACHINE_EXIT);
105 458
106 local_irq_enable(); 459 local_irq_enable();
460 return err;
107} 461}
108 462
109/* Callback for CPUs which aren't supposed to do anything. */
110static int chill(void *unused)
111{
112 return 0;
113}
114
115int stop_machine_create(void)
116{
117 mutex_lock(&setup_lock);
118 if (refcount)
119 goto done;
120 stop_machine_wq = create_rt_workqueue("kstop");
121 if (!stop_machine_wq)
122 goto err_out;
123 stop_machine_work = alloc_percpu(struct work_struct);
124 if (!stop_machine_work)
125 goto err_out;
126done:
127 refcount++;
128 mutex_unlock(&setup_lock);
129 return 0;
130
131err_out:
132 if (stop_machine_wq)
133 destroy_workqueue(stop_machine_wq);
134 mutex_unlock(&setup_lock);
135 return -ENOMEM;
136}
137EXPORT_SYMBOL_GPL(stop_machine_create);
138
139void stop_machine_destroy(void)
140{
141 mutex_lock(&setup_lock);
142 refcount--;
143 if (refcount)
144 goto done;
145 destroy_workqueue(stop_machine_wq);
146 free_percpu(stop_machine_work);
147done:
148 mutex_unlock(&setup_lock);
149}
150EXPORT_SYMBOL_GPL(stop_machine_destroy);
151
152int __stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus) 463int __stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus)
153{ 464{
154 struct work_struct *sm_work; 465 struct stop_machine_data smdata = { .fn = fn, .data = data,
155 int i, ret; 466 .num_threads = num_online_cpus(),
156 467 .active_cpus = cpus };
157 /* Set up initial state. */ 468
158 mutex_lock(&lock); 469 /* Set the initial state and stop all online cpus. */
159 num_threads = num_online_cpus(); 470 set_state(&smdata, STOPMACHINE_PREPARE);
160 active_cpus = cpus; 471 return stop_cpus(cpu_online_mask, stop_machine_cpu_stop, &smdata);
161 active.fn = fn;
162 active.data = data;
163 active.fnret = 0;
164 idle.fn = chill;
165 idle.data = NULL;
166
167 set_state(STOPMACHINE_PREPARE);
168
169 /* Schedule the stop_cpu work on all cpus: hold this CPU so one
170 * doesn't hit this CPU until we're ready. */
171 get_cpu();
172 for_each_online_cpu(i) {
173 sm_work = per_cpu_ptr(stop_machine_work, i);
174 INIT_WORK(sm_work, stop_cpu);
175 queue_work_on(i, stop_machine_wq, sm_work);
176 }
177 /* This will release the thread on our CPU. */
178 put_cpu();
179 flush_workqueue(stop_machine_wq);
180 ret = active.fnret;
181 mutex_unlock(&lock);
182 return ret;
183} 472}
184 473
185int stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus) 474int stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus)
186{ 475{
187 int ret; 476 int ret;
188 477
189 ret = stop_machine_create();
190 if (ret)
191 return ret;
192 /* No CPUs can come up or down during this. */ 478 /* No CPUs can come up or down during this. */
193 get_online_cpus(); 479 get_online_cpus();
194 ret = __stop_machine(fn, data, cpus); 480 ret = __stop_machine(fn, data, cpus);
195 put_online_cpus(); 481 put_online_cpus();
196 stop_machine_destroy();
197 return ret; 482 return ret;
198} 483}
199EXPORT_SYMBOL_GPL(stop_machine); 484EXPORT_SYMBOL_GPL(stop_machine);
485
486#endif /* CONFIG_STOP_MACHINE */
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 8686b0f5fc12..90f536d84643 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -621,7 +621,7 @@ static struct ctl_table kern_table[] = {
621#endif 621#endif
622 { 622 {
623 .procname = "userprocess_debug", 623 .procname = "userprocess_debug",
624 .data = &sysctl_userprocess_debug, 624 .data = &show_unhandled_signals,
625 .maxlen = sizeof(int), 625 .maxlen = sizeof(int),
626 .mode = 0644, 626 .mode = 0644,
627 .proc_handler = proc_dointvec, 627 .proc_handler = proc_dointvec,
@@ -1431,7 +1431,8 @@ static struct ctl_table fs_table[] = {
1431}; 1431};
1432 1432
1433static struct ctl_table debug_table[] = { 1433static struct ctl_table debug_table[] = {
1434#if defined(CONFIG_X86) || defined(CONFIG_PPC) || defined(CONFIG_SPARC) 1434#if defined(CONFIG_X86) || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || \
1435 defined(CONFIG_S390)
1435 { 1436 {
1436 .procname = "exception-trace", 1437 .procname = "exception-trace",
1437 .data = &show_unhandled_signals, 1438 .data = &show_unhandled_signals,
diff --git a/kernel/time.c b/kernel/time.c
index 656dccfe1cbb..50612faa9baf 100644
--- a/kernel/time.c
+++ b/kernel/time.c
@@ -132,12 +132,11 @@ SYSCALL_DEFINE2(gettimeofday, struct timeval __user *, tv,
132 */ 132 */
133static inline void warp_clock(void) 133static inline void warp_clock(void)
134{ 134{
135 write_seqlock_irq(&xtime_lock); 135 struct timespec delta, adjust;
136 wall_to_monotonic.tv_sec -= sys_tz.tz_minuteswest * 60; 136 delta.tv_sec = sys_tz.tz_minuteswest * 60;
137 xtime.tv_sec += sys_tz.tz_minuteswest * 60; 137 delta.tv_nsec = 0;
138 update_xtime_cache(0); 138 adjust = timespec_add_safe(current_kernel_time(), delta);
139 write_sequnlock_irq(&xtime_lock); 139 do_settimeofday(&adjust);
140 clock_was_set();
141} 140}
142 141
143/* 142/*
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index 1f5dde637457..f08e99c1d561 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -625,6 +625,54 @@ static void clocksource_enqueue(struct clocksource *cs)
625 list_add(&cs->list, entry); 625 list_add(&cs->list, entry);
626} 626}
627 627
628
629/*
630 * Maximum time we expect to go between ticks. This includes idle
631 * tickless time. It provides the trade off between selecting a
632 * mult/shift pair that is very precise but can only handle a short
633 * period of time, vs. a mult/shift pair that can handle long periods
634 * of time but isn't as precise.
635 *
636 * This is a subsystem constant, and actual hardware limitations
637 * may override it (ie: clocksources that wrap every 3 seconds).
638 */
639#define MAX_UPDATE_LENGTH 5 /* Seconds */
640
641/**
642 * __clocksource_register_scale - Used to install new clocksources
643 * @t: clocksource to be registered
644 * @scale: Scale factor multiplied against freq to get clocksource hz
645 * @freq: clocksource frequency (cycles per second) divided by scale
646 *
647 * Returns -EBUSY if registration fails, zero otherwise.
648 *
649 * This *SHOULD NOT* be called directly! Please use the
650 * clocksource_register_hz() or clocksource_register_khz helper functions.
651 */
652int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
653{
654
655 /*
656 * Ideally we want to use some of the limits used in
657 * clocksource_max_deferment, to provide a more informed
658 * MAX_UPDATE_LENGTH. But for now this just gets the
659 * register interface working properly.
660 */
661 clocks_calc_mult_shift(&cs->mult, &cs->shift, freq,
662 NSEC_PER_SEC/scale,
663 MAX_UPDATE_LENGTH*scale);
664 cs->max_idle_ns = clocksource_max_deferment(cs);
665
666 mutex_lock(&clocksource_mutex);
667 clocksource_enqueue(cs);
668 clocksource_select();
669 clocksource_enqueue_watchdog(cs);
670 mutex_unlock(&clocksource_mutex);
671 return 0;
672}
673EXPORT_SYMBOL_GPL(__clocksource_register_scale);
674
675
628/** 676/**
629 * clocksource_register - Used to install new clocksources 677 * clocksource_register - Used to install new clocksources
630 * @t: clocksource to be registered 678 * @t: clocksource to be registered
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c
index 7c0f180d6e9d..c63116863a80 100644
--- a/kernel/time/ntp.c
+++ b/kernel/time/ntp.c
@@ -69,7 +69,7 @@ static s64 time_freq;
69/* time at last adjustment (secs): */ 69/* time at last adjustment (secs): */
70static long time_reftime; 70static long time_reftime;
71 71
72long time_adjust; 72static long time_adjust;
73 73
74/* constant (boot-param configurable) NTP tick adjustment (upscaled) */ 74/* constant (boot-param configurable) NTP tick adjustment (upscaled) */
75static s64 ntp_tick_adj; 75static s64 ntp_tick_adj;
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index f992762d7f51..1d7b9bc1c034 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -150,14 +150,32 @@ static void tick_nohz_update_jiffies(ktime_t now)
150 touch_softlockup_watchdog(); 150 touch_softlockup_watchdog();
151} 151}
152 152
153/*
154 * Updates the per cpu time idle statistics counters
155 */
156static void
157update_ts_time_stats(struct tick_sched *ts, ktime_t now, u64 *last_update_time)
158{
159 ktime_t delta;
160
161 if (ts->idle_active) {
162 delta = ktime_sub(now, ts->idle_entrytime);
163 ts->idle_sleeptime = ktime_add(ts->idle_sleeptime, delta);
164 if (nr_iowait_cpu() > 0)
165 ts->iowait_sleeptime = ktime_add(ts->iowait_sleeptime, delta);
166 ts->idle_entrytime = now;
167 }
168
169 if (last_update_time)
170 *last_update_time = ktime_to_us(now);
171
172}
173
153static void tick_nohz_stop_idle(int cpu, ktime_t now) 174static void tick_nohz_stop_idle(int cpu, ktime_t now)
154{ 175{
155 struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu); 176 struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
156 ktime_t delta;
157 177
158 delta = ktime_sub(now, ts->idle_entrytime); 178 update_ts_time_stats(ts, now, NULL);
159 ts->idle_lastupdate = now;
160 ts->idle_sleeptime = ktime_add(ts->idle_sleeptime, delta);
161 ts->idle_active = 0; 179 ts->idle_active = 0;
162 180
163 sched_clock_idle_wakeup_event(0); 181 sched_clock_idle_wakeup_event(0);
@@ -165,20 +183,32 @@ static void tick_nohz_stop_idle(int cpu, ktime_t now)
165 183
166static ktime_t tick_nohz_start_idle(struct tick_sched *ts) 184static ktime_t tick_nohz_start_idle(struct tick_sched *ts)
167{ 185{
168 ktime_t now, delta; 186 ktime_t now;
169 187
170 now = ktime_get(); 188 now = ktime_get();
171 if (ts->idle_active) { 189
172 delta = ktime_sub(now, ts->idle_entrytime); 190 update_ts_time_stats(ts, now, NULL);
173 ts->idle_lastupdate = now; 191
174 ts->idle_sleeptime = ktime_add(ts->idle_sleeptime, delta);
175 }
176 ts->idle_entrytime = now; 192 ts->idle_entrytime = now;
177 ts->idle_active = 1; 193 ts->idle_active = 1;
178 sched_clock_idle_sleep_event(); 194 sched_clock_idle_sleep_event();
179 return now; 195 return now;
180} 196}
181 197
198/**
199 * get_cpu_idle_time_us - get the total idle time of a cpu
200 * @cpu: CPU number to query
201 * @last_update_time: variable to store update time in
202 *
203 * Return the cummulative idle time (since boot) for a given
204 * CPU, in microseconds. The idle time returned includes
205 * the iowait time (unlike what "top" and co report).
206 *
207 * This time is measured via accounting rather than sampling,
208 * and is as accurate as ktime_get() is.
209 *
210 * This function returns -1 if NOHZ is not enabled.
211 */
182u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time) 212u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time)
183{ 213{
184 struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu); 214 struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
@@ -186,15 +216,38 @@ u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time)
186 if (!tick_nohz_enabled) 216 if (!tick_nohz_enabled)
187 return -1; 217 return -1;
188 218
189 if (ts->idle_active) 219 update_ts_time_stats(ts, ktime_get(), last_update_time);
190 *last_update_time = ktime_to_us(ts->idle_lastupdate);
191 else
192 *last_update_time = ktime_to_us(ktime_get());
193 220
194 return ktime_to_us(ts->idle_sleeptime); 221 return ktime_to_us(ts->idle_sleeptime);
195} 222}
196EXPORT_SYMBOL_GPL(get_cpu_idle_time_us); 223EXPORT_SYMBOL_GPL(get_cpu_idle_time_us);
197 224
225/*
226 * get_cpu_iowait_time_us - get the total iowait time of a cpu
227 * @cpu: CPU number to query
228 * @last_update_time: variable to store update time in
229 *
230 * Return the cummulative iowait time (since boot) for a given
231 * CPU, in microseconds.
232 *
233 * This time is measured via accounting rather than sampling,
234 * and is as accurate as ktime_get() is.
235 *
236 * This function returns -1 if NOHZ is not enabled.
237 */
238u64 get_cpu_iowait_time_us(int cpu, u64 *last_update_time)
239{
240 struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
241
242 if (!tick_nohz_enabled)
243 return -1;
244
245 update_ts_time_stats(ts, ktime_get(), last_update_time);
246
247 return ktime_to_us(ts->iowait_sleeptime);
248}
249EXPORT_SYMBOL_GPL(get_cpu_iowait_time_us);
250
198/** 251/**
199 * tick_nohz_stop_sched_tick - stop the idle tick from the idle task 252 * tick_nohz_stop_sched_tick - stop the idle tick from the idle task
200 * 253 *
@@ -262,6 +315,9 @@ void tick_nohz_stop_sched_tick(int inidle)
262 goto end; 315 goto end;
263 } 316 }
264 317
318 if (nohz_ratelimit(cpu))
319 goto end;
320
265 ts->idle_calls++; 321 ts->idle_calls++;
266 /* Read jiffies and the time when jiffies were updated last */ 322 /* Read jiffies and the time when jiffies were updated last */
267 do { 323 do {
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index 39f6177fafac..caf8d4d4f5c8 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -165,13 +165,6 @@ struct timespec raw_time;
165/* flag for if timekeeping is suspended */ 165/* flag for if timekeeping is suspended */
166int __read_mostly timekeeping_suspended; 166int __read_mostly timekeeping_suspended;
167 167
168static struct timespec xtime_cache __attribute__ ((aligned (16)));
169void update_xtime_cache(u64 nsec)
170{
171 xtime_cache = xtime;
172 timespec_add_ns(&xtime_cache, nsec);
173}
174
175/* must hold xtime_lock */ 168/* must hold xtime_lock */
176void timekeeping_leap_insert(int leapsecond) 169void timekeeping_leap_insert(int leapsecond)
177{ 170{
@@ -332,8 +325,6 @@ int do_settimeofday(struct timespec *tv)
332 325
333 xtime = *tv; 326 xtime = *tv;
334 327
335 update_xtime_cache(0);
336
337 timekeeper.ntp_error = 0; 328 timekeeper.ntp_error = 0;
338 ntp_clear(); 329 ntp_clear();
339 330
@@ -559,7 +550,6 @@ void __init timekeeping_init(void)
559 } 550 }
560 set_normalized_timespec(&wall_to_monotonic, 551 set_normalized_timespec(&wall_to_monotonic,
561 -boot.tv_sec, -boot.tv_nsec); 552 -boot.tv_sec, -boot.tv_nsec);
562 update_xtime_cache(0);
563 total_sleep_time.tv_sec = 0; 553 total_sleep_time.tv_sec = 0;
564 total_sleep_time.tv_nsec = 0; 554 total_sleep_time.tv_nsec = 0;
565 write_sequnlock_irqrestore(&xtime_lock, flags); 555 write_sequnlock_irqrestore(&xtime_lock, flags);
@@ -593,7 +583,6 @@ static int timekeeping_resume(struct sys_device *dev)
593 wall_to_monotonic = timespec_sub(wall_to_monotonic, ts); 583 wall_to_monotonic = timespec_sub(wall_to_monotonic, ts);
594 total_sleep_time = timespec_add_safe(total_sleep_time, ts); 584 total_sleep_time = timespec_add_safe(total_sleep_time, ts);
595 } 585 }
596 update_xtime_cache(0);
597 /* re-base the last cycle value */ 586 /* re-base the last cycle value */
598 timekeeper.clock->cycle_last = timekeeper.clock->read(timekeeper.clock); 587 timekeeper.clock->cycle_last = timekeeper.clock->read(timekeeper.clock);
599 timekeeper.ntp_error = 0; 588 timekeeper.ntp_error = 0;
@@ -788,7 +777,6 @@ void update_wall_time(void)
788{ 777{
789 struct clocksource *clock; 778 struct clocksource *clock;
790 cycle_t offset; 779 cycle_t offset;
791 u64 nsecs;
792 int shift = 0, maxshift; 780 int shift = 0, maxshift;
793 781
794 /* Make sure we're fully resumed: */ 782 /* Make sure we're fully resumed: */
@@ -847,7 +835,9 @@ void update_wall_time(void)
847 timekeeper.ntp_error += neg << timekeeper.ntp_error_shift; 835 timekeeper.ntp_error += neg << timekeeper.ntp_error_shift;
848 } 836 }
849 837
850 /* store full nanoseconds into xtime after rounding it up and 838
839 /*
840 * Store full nanoseconds into xtime after rounding it up and
851 * add the remainder to the error difference. 841 * add the remainder to the error difference.
852 */ 842 */
853 xtime.tv_nsec = ((s64) timekeeper.xtime_nsec >> timekeeper.shift) + 1; 843 xtime.tv_nsec = ((s64) timekeeper.xtime_nsec >> timekeeper.shift) + 1;
@@ -855,8 +845,15 @@ void update_wall_time(void)
855 timekeeper.ntp_error += timekeeper.xtime_nsec << 845 timekeeper.ntp_error += timekeeper.xtime_nsec <<
856 timekeeper.ntp_error_shift; 846 timekeeper.ntp_error_shift;
857 847
858 nsecs = clocksource_cyc2ns(offset, timekeeper.mult, timekeeper.shift); 848 /*
859 update_xtime_cache(nsecs); 849 * Finally, make sure that after the rounding
850 * xtime.tv_nsec isn't larger then NSEC_PER_SEC
851 */
852 if (unlikely(xtime.tv_nsec >= NSEC_PER_SEC)) {
853 xtime.tv_nsec -= NSEC_PER_SEC;
854 xtime.tv_sec++;
855 second_overflow();
856 }
860 857
861 /* check to see if there is a new clocksource to use */ 858 /* check to see if there is a new clocksource to use */
862 update_vsyscall(&xtime, timekeeper.clock, timekeeper.mult); 859 update_vsyscall(&xtime, timekeeper.clock, timekeeper.mult);
@@ -896,13 +893,13 @@ EXPORT_SYMBOL_GPL(monotonic_to_bootbased);
896 893
897unsigned long get_seconds(void) 894unsigned long get_seconds(void)
898{ 895{
899 return xtime_cache.tv_sec; 896 return xtime.tv_sec;
900} 897}
901EXPORT_SYMBOL(get_seconds); 898EXPORT_SYMBOL(get_seconds);
902 899
903struct timespec __current_kernel_time(void) 900struct timespec __current_kernel_time(void)
904{ 901{
905 return xtime_cache; 902 return xtime;
906} 903}
907 904
908struct timespec current_kernel_time(void) 905struct timespec current_kernel_time(void)
@@ -913,7 +910,7 @@ struct timespec current_kernel_time(void)
913 do { 910 do {
914 seq = read_seqbegin(&xtime_lock); 911 seq = read_seqbegin(&xtime_lock);
915 912
916 now = xtime_cache; 913 now = xtime;
917 } while (read_seqretry(&xtime_lock, seq)); 914 } while (read_seqretry(&xtime_lock, seq));
918 915
919 return now; 916 return now;
@@ -928,7 +925,7 @@ struct timespec get_monotonic_coarse(void)
928 do { 925 do {
929 seq = read_seqbegin(&xtime_lock); 926 seq = read_seqbegin(&xtime_lock);
930 927
931 now = xtime_cache; 928 now = xtime;
932 mono = wall_to_monotonic; 929 mono = wall_to_monotonic;
933 } while (read_seqretry(&xtime_lock, seq)); 930 } while (read_seqretry(&xtime_lock, seq));
934 931
diff --git a/kernel/time/timer_list.c b/kernel/time/timer_list.c
index 1a4a7dd78777..ab8f5e33fa92 100644
--- a/kernel/time/timer_list.c
+++ b/kernel/time/timer_list.c
@@ -176,6 +176,7 @@ static void print_cpu(struct seq_file *m, int cpu, u64 now)
176 P_ns(idle_waketime); 176 P_ns(idle_waketime);
177 P_ns(idle_exittime); 177 P_ns(idle_exittime);
178 P_ns(idle_sleeptime); 178 P_ns(idle_sleeptime);
179 P_ns(iowait_sleeptime);
179 P(last_jiffies); 180 P(last_jiffies);
180 P(next_jiffies); 181 P(next_jiffies);
181 P_ns(idle_expires); 182 P_ns(idle_expires);
diff --git a/kernel/timer.c b/kernel/timer.c
index aeb6a54f2771..9199f3c52215 100644
--- a/kernel/timer.c
+++ b/kernel/timer.c
@@ -319,6 +319,24 @@ unsigned long round_jiffies_up_relative(unsigned long j)
319} 319}
320EXPORT_SYMBOL_GPL(round_jiffies_up_relative); 320EXPORT_SYMBOL_GPL(round_jiffies_up_relative);
321 321
322/**
323 * set_timer_slack - set the allowed slack for a timer
324 * @slack_hz: the amount of time (in jiffies) allowed for rounding
325 *
326 * Set the amount of time, in jiffies, that a certain timer has
327 * in terms of slack. By setting this value, the timer subsystem
328 * will schedule the actual timer somewhere between
329 * the time mod_timer() asks for, and that time plus the slack.
330 *
331 * By setting the slack to -1, a percentage of the delay is used
332 * instead.
333 */
334void set_timer_slack(struct timer_list *timer, int slack_hz)
335{
336 timer->slack = slack_hz;
337}
338EXPORT_SYMBOL_GPL(set_timer_slack);
339
322 340
323static inline void set_running_timer(struct tvec_base *base, 341static inline void set_running_timer(struct tvec_base *base,
324 struct timer_list *timer) 342 struct timer_list *timer)
@@ -550,6 +568,7 @@ static void __init_timer(struct timer_list *timer,
550{ 568{
551 timer->entry.next = NULL; 569 timer->entry.next = NULL;
552 timer->base = __raw_get_cpu_var(tvec_bases); 570 timer->base = __raw_get_cpu_var(tvec_bases);
571 timer->slack = -1;
553#ifdef CONFIG_TIMER_STATS 572#ifdef CONFIG_TIMER_STATS
554 timer->start_site = NULL; 573 timer->start_site = NULL;
555 timer->start_pid = -1; 574 timer->start_pid = -1;
@@ -715,6 +734,41 @@ int mod_timer_pending(struct timer_list *timer, unsigned long expires)
715} 734}
716EXPORT_SYMBOL(mod_timer_pending); 735EXPORT_SYMBOL(mod_timer_pending);
717 736
737/*
738 * Decide where to put the timer while taking the slack into account
739 *
740 * Algorithm:
741 * 1) calculate the maximum (absolute) time
742 * 2) calculate the highest bit where the expires and new max are different
743 * 3) use this bit to make a mask
744 * 4) use the bitmask to round down the maximum time, so that all last
745 * bits are zeros
746 */
747static inline
748unsigned long apply_slack(struct timer_list *timer, unsigned long expires)
749{
750 unsigned long expires_limit, mask;
751 int bit;
752
753 expires_limit = expires + timer->slack;
754
755 if (timer->slack < 0) /* auto slack: use 0.4% */
756 expires_limit = expires + (expires - jiffies)/256;
757
758 mask = expires ^ expires_limit;
759
760 if (mask == 0)
761 return expires;
762
763 bit = find_last_bit(&mask, BITS_PER_LONG);
764
765 mask = (1 << bit) - 1;
766
767 expires_limit = expires_limit & ~(mask);
768
769 return expires_limit;
770}
771
718/** 772/**
719 * mod_timer - modify a timer's timeout 773 * mod_timer - modify a timer's timeout
720 * @timer: the timer to be modified 774 * @timer: the timer to be modified
@@ -745,6 +799,8 @@ int mod_timer(struct timer_list *timer, unsigned long expires)
745 if (timer_pending(timer) && timer->expires == expires) 799 if (timer_pending(timer) && timer->expires == expires)
746 return 1; 800 return 1;
747 801
802 expires = apply_slack(timer, expires);
803
748 return __mod_timer(timer, expires, false, TIMER_NOT_PINNED); 804 return __mod_timer(timer, expires, false, TIMER_NOT_PINNED);
749} 805}
750EXPORT_SYMBOL(mod_timer); 806EXPORT_SYMBOL(mod_timer);
@@ -955,6 +1011,47 @@ static int cascade(struct tvec_base *base, struct tvec *tv, int index)
955 return index; 1011 return index;
956} 1012}
957 1013
1014static void call_timer_fn(struct timer_list *timer, void (*fn)(unsigned long),
1015 unsigned long data)
1016{
1017 int preempt_count = preempt_count();
1018
1019#ifdef CONFIG_LOCKDEP
1020 /*
1021 * It is permissible to free the timer from inside the
1022 * function that is called from it, this we need to take into
1023 * account for lockdep too. To avoid bogus "held lock freed"
1024 * warnings as well as problems when looking into
1025 * timer->lockdep_map, make a copy and use that here.
1026 */
1027 struct lockdep_map lockdep_map = timer->lockdep_map;
1028#endif
1029 /*
1030 * Couple the lock chain with the lock chain at
1031 * del_timer_sync() by acquiring the lock_map around the fn()
1032 * call here and in del_timer_sync().
1033 */
1034 lock_map_acquire(&lockdep_map);
1035
1036 trace_timer_expire_entry(timer);
1037 fn(data);
1038 trace_timer_expire_exit(timer);
1039
1040 lock_map_release(&lockdep_map);
1041
1042 if (preempt_count != preempt_count()) {
1043 WARN_ONCE(1, "timer: %pF preempt leak: %08x -> %08x\n",
1044 fn, preempt_count, preempt_count());
1045 /*
1046 * Restore the preempt count. That gives us a decent
1047 * chance to survive and extract information. If the
1048 * callback kept a lock held, bad luck, but not worse
1049 * than the BUG() we had.
1050 */
1051 preempt_count() = preempt_count;
1052 }
1053}
1054
958#define INDEX(N) ((base->timer_jiffies >> (TVR_BITS + (N) * TVN_BITS)) & TVN_MASK) 1055#define INDEX(N) ((base->timer_jiffies >> (TVR_BITS + (N) * TVN_BITS)) & TVN_MASK)
959 1056
960/** 1057/**
@@ -998,45 +1095,7 @@ static inline void __run_timers(struct tvec_base *base)
998 detach_timer(timer, 1); 1095 detach_timer(timer, 1);
999 1096
1000 spin_unlock_irq(&base->lock); 1097 spin_unlock_irq(&base->lock);
1001 { 1098 call_timer_fn(timer, fn, data);
1002 int preempt_count = preempt_count();
1003
1004#ifdef CONFIG_LOCKDEP
1005 /*
1006 * It is permissible to free the timer from
1007 * inside the function that is called from
1008 * it, this we need to take into account for
1009 * lockdep too. To avoid bogus "held lock
1010 * freed" warnings as well as problems when
1011 * looking into timer->lockdep_map, make a
1012 * copy and use that here.
1013 */
1014 struct lockdep_map lockdep_map =
1015 timer->lockdep_map;
1016#endif
1017 /*
1018 * Couple the lock chain with the lock chain at
1019 * del_timer_sync() by acquiring the lock_map
1020 * around the fn() call here and in
1021 * del_timer_sync().
1022 */
1023 lock_map_acquire(&lockdep_map);
1024
1025 trace_timer_expire_entry(timer);
1026 fn(data);
1027 trace_timer_expire_exit(timer);
1028
1029 lock_map_release(&lockdep_map);
1030
1031 if (preempt_count != preempt_count()) {
1032 printk(KERN_ERR "huh, entered %p "
1033 "with preempt_count %08x, exited"
1034 " with %08x?\n",
1035 fn, preempt_count,
1036 preempt_count());
1037 BUG();
1038 }
1039 }
1040 spin_lock_irq(&base->lock); 1099 spin_lock_irq(&base->lock);
1041 } 1100 }
1042 } 1101 }
diff --git a/kernel/trace/Kconfig b/kernel/trace/Kconfig
index 13e13d428cd3..8b1797c4545b 100644
--- a/kernel/trace/Kconfig
+++ b/kernel/trace/Kconfig
@@ -44,9 +44,6 @@ config HAVE_FTRACE_MCOUNT_RECORD
44 help 44 help
45 See Documentation/trace/ftrace-design.txt 45 See Documentation/trace/ftrace-design.txt
46 46
47config HAVE_HW_BRANCH_TRACER
48 bool
49
50config HAVE_SYSCALL_TRACEPOINTS 47config HAVE_SYSCALL_TRACEPOINTS
51 bool 48 bool
52 help 49 help
@@ -374,14 +371,6 @@ config STACK_TRACER
374 371
375 Say N if unsure. 372 Say N if unsure.
376 373
377config HW_BRANCH_TRACER
378 depends on HAVE_HW_BRANCH_TRACER
379 bool "Trace hw branches"
380 select GENERIC_TRACER
381 help
382 This tracer records all branches on the system in a circular
383 buffer, giving access to the last N branches for each cpu.
384
385config KMEMTRACE 374config KMEMTRACE
386 bool "Trace SLAB allocations" 375 bool "Trace SLAB allocations"
387 select GENERIC_TRACER 376 select GENERIC_TRACER
diff --git a/kernel/trace/Makefile b/kernel/trace/Makefile
index 78edc6490038..ffb1a5b0550e 100644
--- a/kernel/trace/Makefile
+++ b/kernel/trace/Makefile
@@ -41,7 +41,6 @@ obj-$(CONFIG_MMIOTRACE) += trace_mmiotrace.o
41obj-$(CONFIG_BOOT_TRACER) += trace_boot.o 41obj-$(CONFIG_BOOT_TRACER) += trace_boot.o
42obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += trace_functions_graph.o 42obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += trace_functions_graph.o
43obj-$(CONFIG_TRACE_BRANCH_PROFILING) += trace_branch.o 43obj-$(CONFIG_TRACE_BRANCH_PROFILING) += trace_branch.o
44obj-$(CONFIG_HW_BRANCH_TRACER) += trace_hw_branches.o
45obj-$(CONFIG_KMEMTRACE) += kmemtrace.o 44obj-$(CONFIG_KMEMTRACE) += kmemtrace.o
46obj-$(CONFIG_WORKQUEUE_TRACER) += trace_workqueue.o 45obj-$(CONFIG_WORKQUEUE_TRACER) += trace_workqueue.o
47obj-$(CONFIG_BLK_DEV_IO_TRACE) += blktrace.o 46obj-$(CONFIG_BLK_DEV_IO_TRACE) += blktrace.o
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 2404b59b3097..32837e19e3bd 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -264,6 +264,7 @@ struct ftrace_profile {
264 unsigned long counter; 264 unsigned long counter;
265#ifdef CONFIG_FUNCTION_GRAPH_TRACER 265#ifdef CONFIG_FUNCTION_GRAPH_TRACER
266 unsigned long long time; 266 unsigned long long time;
267 unsigned long long time_squared;
267#endif 268#endif
268}; 269};
269 270
@@ -366,9 +367,9 @@ static int function_stat_headers(struct seq_file *m)
366{ 367{
367#ifdef CONFIG_FUNCTION_GRAPH_TRACER 368#ifdef CONFIG_FUNCTION_GRAPH_TRACER
368 seq_printf(m, " Function " 369 seq_printf(m, " Function "
369 "Hit Time Avg\n" 370 "Hit Time Avg s^2\n"
370 " -------- " 371 " -------- "
371 "--- ---- ---\n"); 372 "--- ---- --- ---\n");
372#else 373#else
373 seq_printf(m, " Function Hit\n" 374 seq_printf(m, " Function Hit\n"
374 " -------- ---\n"); 375 " -------- ---\n");
@@ -384,6 +385,7 @@ static int function_stat_show(struct seq_file *m, void *v)
384 static DEFINE_MUTEX(mutex); 385 static DEFINE_MUTEX(mutex);
385 static struct trace_seq s; 386 static struct trace_seq s;
386 unsigned long long avg; 387 unsigned long long avg;
388 unsigned long long stddev;
387#endif 389#endif
388 390
389 kallsyms_lookup(rec->ip, NULL, NULL, NULL, str); 391 kallsyms_lookup(rec->ip, NULL, NULL, NULL, str);
@@ -394,11 +396,25 @@ static int function_stat_show(struct seq_file *m, void *v)
394 avg = rec->time; 396 avg = rec->time;
395 do_div(avg, rec->counter); 397 do_div(avg, rec->counter);
396 398
399 /* Sample standard deviation (s^2) */
400 if (rec->counter <= 1)
401 stddev = 0;
402 else {
403 stddev = rec->time_squared - rec->counter * avg * avg;
404 /*
405 * Divide only 1000 for ns^2 -> us^2 conversion.
406 * trace_print_graph_duration will divide 1000 again.
407 */
408 do_div(stddev, (rec->counter - 1) * 1000);
409 }
410
397 mutex_lock(&mutex); 411 mutex_lock(&mutex);
398 trace_seq_init(&s); 412 trace_seq_init(&s);
399 trace_print_graph_duration(rec->time, &s); 413 trace_print_graph_duration(rec->time, &s);
400 trace_seq_puts(&s, " "); 414 trace_seq_puts(&s, " ");
401 trace_print_graph_duration(avg, &s); 415 trace_print_graph_duration(avg, &s);
416 trace_seq_puts(&s, " ");
417 trace_print_graph_duration(stddev, &s);
402 trace_print_seq(m, &s); 418 trace_print_seq(m, &s);
403 mutex_unlock(&mutex); 419 mutex_unlock(&mutex);
404#endif 420#endif
@@ -650,6 +666,10 @@ static void profile_graph_return(struct ftrace_graph_ret *trace)
650 if (!stat->hash || !ftrace_profile_enabled) 666 if (!stat->hash || !ftrace_profile_enabled)
651 goto out; 667 goto out;
652 668
669 /* If the calltime was zero'd ignore it */
670 if (!trace->calltime)
671 goto out;
672
653 calltime = trace->rettime - trace->calltime; 673 calltime = trace->rettime - trace->calltime;
654 674
655 if (!(trace_flags & TRACE_ITER_GRAPH_TIME)) { 675 if (!(trace_flags & TRACE_ITER_GRAPH_TIME)) {
@@ -668,8 +688,10 @@ static void profile_graph_return(struct ftrace_graph_ret *trace)
668 } 688 }
669 689
670 rec = ftrace_find_profiled_func(stat, trace->func); 690 rec = ftrace_find_profiled_func(stat, trace->func);
671 if (rec) 691 if (rec) {
672 rec->time += calltime; 692 rec->time += calltime;
693 rec->time_squared += calltime * calltime;
694 }
673 695
674 out: 696 out:
675 local_irq_restore(flags); 697 local_irq_restore(flags);
@@ -3212,8 +3234,7 @@ free:
3212} 3234}
3213 3235
3214static void 3236static void
3215ftrace_graph_probe_sched_switch(struct rq *__rq, struct task_struct *prev, 3237ftrace_graph_probe_sched_switch(struct task_struct *prev, struct task_struct *next)
3216 struct task_struct *next)
3217{ 3238{
3218 unsigned long long timestamp; 3239 unsigned long long timestamp;
3219 int index; 3240 int index;
@@ -3339,11 +3360,11 @@ void unregister_ftrace_graph(void)
3339 goto out; 3360 goto out;
3340 3361
3341 ftrace_graph_active--; 3362 ftrace_graph_active--;
3342 unregister_trace_sched_switch(ftrace_graph_probe_sched_switch);
3343 ftrace_graph_return = (trace_func_graph_ret_t)ftrace_stub; 3363 ftrace_graph_return = (trace_func_graph_ret_t)ftrace_stub;
3344 ftrace_graph_entry = ftrace_graph_entry_stub; 3364 ftrace_graph_entry = ftrace_graph_entry_stub;
3345 ftrace_shutdown(FTRACE_STOP_FUNC_RET); 3365 ftrace_shutdown(FTRACE_STOP_FUNC_RET);
3346 unregister_pm_notifier(&ftrace_suspend_notifier); 3366 unregister_pm_notifier(&ftrace_suspend_notifier);
3367 unregister_trace_sched_switch(ftrace_graph_probe_sched_switch);
3347 3368
3348 out: 3369 out:
3349 mutex_unlock(&ftrace_lock); 3370 mutex_unlock(&ftrace_lock);
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 41ca394feb22..7f6059c5aa94 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -319,6 +319,11 @@ EXPORT_SYMBOL_GPL(ring_buffer_event_data);
319#define TS_MASK ((1ULL << TS_SHIFT) - 1) 319#define TS_MASK ((1ULL << TS_SHIFT) - 1)
320#define TS_DELTA_TEST (~TS_MASK) 320#define TS_DELTA_TEST (~TS_MASK)
321 321
322/* Flag when events were overwritten */
323#define RB_MISSED_EVENTS (1 << 31)
324/* Missed count stored at end */
325#define RB_MISSED_STORED (1 << 30)
326
322struct buffer_data_page { 327struct buffer_data_page {
323 u64 time_stamp; /* page time stamp */ 328 u64 time_stamp; /* page time stamp */
324 local_t commit; /* write committed index */ 329 local_t commit; /* write committed index */
@@ -338,6 +343,7 @@ struct buffer_page {
338 local_t write; /* index for next write */ 343 local_t write; /* index for next write */
339 unsigned read; /* index for next read */ 344 unsigned read; /* index for next read */
340 local_t entries; /* entries on this page */ 345 local_t entries; /* entries on this page */
346 unsigned long real_end; /* real end of data */
341 struct buffer_data_page *page; /* Actual data page */ 347 struct buffer_data_page *page; /* Actual data page */
342}; 348};
343 349
@@ -417,6 +423,12 @@ int ring_buffer_print_page_header(struct trace_seq *s)
417 (unsigned int)sizeof(field.commit), 423 (unsigned int)sizeof(field.commit),
418 (unsigned int)is_signed_type(long)); 424 (unsigned int)is_signed_type(long));
419 425
426 ret = trace_seq_printf(s, "\tfield: int overwrite;\t"
427 "offset:%u;\tsize:%u;\tsigned:%u;\n",
428 (unsigned int)offsetof(typeof(field), commit),
429 1,
430 (unsigned int)is_signed_type(long));
431
420 ret = trace_seq_printf(s, "\tfield: char data;\t" 432 ret = trace_seq_printf(s, "\tfield: char data;\t"
421 "offset:%u;\tsize:%u;\tsigned:%u;\n", 433 "offset:%u;\tsize:%u;\tsigned:%u;\n",
422 (unsigned int)offsetof(typeof(field), data), 434 (unsigned int)offsetof(typeof(field), data),
@@ -440,6 +452,8 @@ struct ring_buffer_per_cpu {
440 struct buffer_page *tail_page; /* write to tail */ 452 struct buffer_page *tail_page; /* write to tail */
441 struct buffer_page *commit_page; /* committed pages */ 453 struct buffer_page *commit_page; /* committed pages */
442 struct buffer_page *reader_page; 454 struct buffer_page *reader_page;
455 unsigned long lost_events;
456 unsigned long last_overrun;
443 local_t commit_overrun; 457 local_t commit_overrun;
444 local_t overrun; 458 local_t overrun;
445 local_t entries; 459 local_t entries;
@@ -1762,6 +1776,13 @@ rb_reset_tail(struct ring_buffer_per_cpu *cpu_buffer,
1762 kmemcheck_annotate_bitfield(event, bitfield); 1776 kmemcheck_annotate_bitfield(event, bitfield);
1763 1777
1764 /* 1778 /*
1779 * Save the original length to the meta data.
1780 * This will be used by the reader to add lost event
1781 * counter.
1782 */
1783 tail_page->real_end = tail;
1784
1785 /*
1765 * If this event is bigger than the minimum size, then 1786 * If this event is bigger than the minimum size, then
1766 * we need to be careful that we don't subtract the 1787 * we need to be careful that we don't subtract the
1767 * write counter enough to allow another writer to slip 1788 * write counter enough to allow another writer to slip
@@ -1979,17 +2000,13 @@ rb_add_time_stamp(struct ring_buffer_per_cpu *cpu_buffer,
1979 u64 *ts, u64 *delta) 2000 u64 *ts, u64 *delta)
1980{ 2001{
1981 struct ring_buffer_event *event; 2002 struct ring_buffer_event *event;
1982 static int once;
1983 int ret; 2003 int ret;
1984 2004
1985 if (unlikely(*delta > (1ULL << 59) && !once++)) { 2005 WARN_ONCE(*delta > (1ULL << 59),
1986 printk(KERN_WARNING "Delta way too big! %llu" 2006 KERN_WARNING "Delta way too big! %llu ts=%llu write stamp = %llu\n",
1987 " ts=%llu write stamp = %llu\n", 2007 (unsigned long long)*delta,
1988 (unsigned long long)*delta, 2008 (unsigned long long)*ts,
1989 (unsigned long long)*ts, 2009 (unsigned long long)cpu_buffer->write_stamp);
1990 (unsigned long long)cpu_buffer->write_stamp);
1991 WARN_ON(1);
1992 }
1993 2010
1994 /* 2011 /*
1995 * The delta is too big, we to add a 2012 * The delta is too big, we to add a
@@ -2838,6 +2855,7 @@ static struct buffer_page *
2838rb_get_reader_page(struct ring_buffer_per_cpu *cpu_buffer) 2855rb_get_reader_page(struct ring_buffer_per_cpu *cpu_buffer)
2839{ 2856{
2840 struct buffer_page *reader = NULL; 2857 struct buffer_page *reader = NULL;
2858 unsigned long overwrite;
2841 unsigned long flags; 2859 unsigned long flags;
2842 int nr_loops = 0; 2860 int nr_loops = 0;
2843 int ret; 2861 int ret;
@@ -2879,6 +2897,7 @@ rb_get_reader_page(struct ring_buffer_per_cpu *cpu_buffer)
2879 local_set(&cpu_buffer->reader_page->write, 0); 2897 local_set(&cpu_buffer->reader_page->write, 0);
2880 local_set(&cpu_buffer->reader_page->entries, 0); 2898 local_set(&cpu_buffer->reader_page->entries, 0);
2881 local_set(&cpu_buffer->reader_page->page->commit, 0); 2899 local_set(&cpu_buffer->reader_page->page->commit, 0);
2900 cpu_buffer->reader_page->real_end = 0;
2882 2901
2883 spin: 2902 spin:
2884 /* 2903 /*
@@ -2899,6 +2918,18 @@ rb_get_reader_page(struct ring_buffer_per_cpu *cpu_buffer)
2899 rb_set_list_to_head(cpu_buffer, &cpu_buffer->reader_page->list); 2918 rb_set_list_to_head(cpu_buffer, &cpu_buffer->reader_page->list);
2900 2919
2901 /* 2920 /*
2921 * We want to make sure we read the overruns after we set up our
2922 * pointers to the next object. The writer side does a
2923 * cmpxchg to cross pages which acts as the mb on the writer
2924 * side. Note, the reader will constantly fail the swap
2925 * while the writer is updating the pointers, so this
2926 * guarantees that the overwrite recorded here is the one we
2927 * want to compare with the last_overrun.
2928 */
2929 smp_mb();
2930 overwrite = local_read(&(cpu_buffer->overrun));
2931
2932 /*
2902 * Here's the tricky part. 2933 * Here's the tricky part.
2903 * 2934 *
2904 * We need to move the pointer past the header page. 2935 * We need to move the pointer past the header page.
@@ -2929,6 +2960,11 @@ rb_get_reader_page(struct ring_buffer_per_cpu *cpu_buffer)
2929 cpu_buffer->reader_page = reader; 2960 cpu_buffer->reader_page = reader;
2930 rb_reset_reader_page(cpu_buffer); 2961 rb_reset_reader_page(cpu_buffer);
2931 2962
2963 if (overwrite != cpu_buffer->last_overrun) {
2964 cpu_buffer->lost_events = overwrite - cpu_buffer->last_overrun;
2965 cpu_buffer->last_overrun = overwrite;
2966 }
2967
2932 goto again; 2968 goto again;
2933 2969
2934 out: 2970 out:
@@ -3005,8 +3041,14 @@ static void rb_advance_iter(struct ring_buffer_iter *iter)
3005 rb_advance_iter(iter); 3041 rb_advance_iter(iter);
3006} 3042}
3007 3043
3044static int rb_lost_events(struct ring_buffer_per_cpu *cpu_buffer)
3045{
3046 return cpu_buffer->lost_events;
3047}
3048
3008static struct ring_buffer_event * 3049static struct ring_buffer_event *
3009rb_buffer_peek(struct ring_buffer_per_cpu *cpu_buffer, u64 *ts) 3050rb_buffer_peek(struct ring_buffer_per_cpu *cpu_buffer, u64 *ts,
3051 unsigned long *lost_events)
3010{ 3052{
3011 struct ring_buffer_event *event; 3053 struct ring_buffer_event *event;
3012 struct buffer_page *reader; 3054 struct buffer_page *reader;
@@ -3058,6 +3100,8 @@ rb_buffer_peek(struct ring_buffer_per_cpu *cpu_buffer, u64 *ts)
3058 ring_buffer_normalize_time_stamp(cpu_buffer->buffer, 3100 ring_buffer_normalize_time_stamp(cpu_buffer->buffer,
3059 cpu_buffer->cpu, ts); 3101 cpu_buffer->cpu, ts);
3060 } 3102 }
3103 if (lost_events)
3104 *lost_events = rb_lost_events(cpu_buffer);
3061 return event; 3105 return event;
3062 3106
3063 default: 3107 default:
@@ -3168,12 +3212,14 @@ static inline int rb_ok_to_lock(void)
3168 * @buffer: The ring buffer to read 3212 * @buffer: The ring buffer to read
3169 * @cpu: The cpu to peak at 3213 * @cpu: The cpu to peak at
3170 * @ts: The timestamp counter of this event. 3214 * @ts: The timestamp counter of this event.
3215 * @lost_events: a variable to store if events were lost (may be NULL)
3171 * 3216 *
3172 * This will return the event that will be read next, but does 3217 * This will return the event that will be read next, but does
3173 * not consume the data. 3218 * not consume the data.
3174 */ 3219 */
3175struct ring_buffer_event * 3220struct ring_buffer_event *
3176ring_buffer_peek(struct ring_buffer *buffer, int cpu, u64 *ts) 3221ring_buffer_peek(struct ring_buffer *buffer, int cpu, u64 *ts,
3222 unsigned long *lost_events)
3177{ 3223{
3178 struct ring_buffer_per_cpu *cpu_buffer = buffer->buffers[cpu]; 3224 struct ring_buffer_per_cpu *cpu_buffer = buffer->buffers[cpu];
3179 struct ring_buffer_event *event; 3225 struct ring_buffer_event *event;
@@ -3188,7 +3234,7 @@ ring_buffer_peek(struct ring_buffer *buffer, int cpu, u64 *ts)
3188 local_irq_save(flags); 3234 local_irq_save(flags);
3189 if (dolock) 3235 if (dolock)
3190 spin_lock(&cpu_buffer->reader_lock); 3236 spin_lock(&cpu_buffer->reader_lock);
3191 event = rb_buffer_peek(cpu_buffer, ts); 3237 event = rb_buffer_peek(cpu_buffer, ts, lost_events);
3192 if (event && event->type_len == RINGBUF_TYPE_PADDING) 3238 if (event && event->type_len == RINGBUF_TYPE_PADDING)
3193 rb_advance_reader(cpu_buffer); 3239 rb_advance_reader(cpu_buffer);
3194 if (dolock) 3240 if (dolock)
@@ -3230,13 +3276,17 @@ ring_buffer_iter_peek(struct ring_buffer_iter *iter, u64 *ts)
3230/** 3276/**
3231 * ring_buffer_consume - return an event and consume it 3277 * ring_buffer_consume - return an event and consume it
3232 * @buffer: The ring buffer to get the next event from 3278 * @buffer: The ring buffer to get the next event from
3279 * @cpu: the cpu to read the buffer from
3280 * @ts: a variable to store the timestamp (may be NULL)
3281 * @lost_events: a variable to store if events were lost (may be NULL)
3233 * 3282 *
3234 * Returns the next event in the ring buffer, and that event is consumed. 3283 * Returns the next event in the ring buffer, and that event is consumed.
3235 * Meaning, that sequential reads will keep returning a different event, 3284 * Meaning, that sequential reads will keep returning a different event,
3236 * and eventually empty the ring buffer if the producer is slower. 3285 * and eventually empty the ring buffer if the producer is slower.
3237 */ 3286 */
3238struct ring_buffer_event * 3287struct ring_buffer_event *
3239ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts) 3288ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts,
3289 unsigned long *lost_events)
3240{ 3290{
3241 struct ring_buffer_per_cpu *cpu_buffer; 3291 struct ring_buffer_per_cpu *cpu_buffer;
3242 struct ring_buffer_event *event = NULL; 3292 struct ring_buffer_event *event = NULL;
@@ -3257,9 +3307,11 @@ ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts)
3257 if (dolock) 3307 if (dolock)
3258 spin_lock(&cpu_buffer->reader_lock); 3308 spin_lock(&cpu_buffer->reader_lock);
3259 3309
3260 event = rb_buffer_peek(cpu_buffer, ts); 3310 event = rb_buffer_peek(cpu_buffer, ts, lost_events);
3261 if (event) 3311 if (event) {
3312 cpu_buffer->lost_events = 0;
3262 rb_advance_reader(cpu_buffer); 3313 rb_advance_reader(cpu_buffer);
3314 }
3263 3315
3264 if (dolock) 3316 if (dolock)
3265 spin_unlock(&cpu_buffer->reader_lock); 3317 spin_unlock(&cpu_buffer->reader_lock);
@@ -3276,23 +3328,30 @@ ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts)
3276EXPORT_SYMBOL_GPL(ring_buffer_consume); 3328EXPORT_SYMBOL_GPL(ring_buffer_consume);
3277 3329
3278/** 3330/**
3279 * ring_buffer_read_start - start a non consuming read of the buffer 3331 * ring_buffer_read_prepare - Prepare for a non consuming read of the buffer
3280 * @buffer: The ring buffer to read from 3332 * @buffer: The ring buffer to read from
3281 * @cpu: The cpu buffer to iterate over 3333 * @cpu: The cpu buffer to iterate over
3282 * 3334 *
3283 * This starts up an iteration through the buffer. It also disables 3335 * This performs the initial preparations necessary to iterate
3284 * the recording to the buffer until the reading is finished. 3336 * through the buffer. Memory is allocated, buffer recording
3285 * This prevents the reading from being corrupted. This is not 3337 * is disabled, and the iterator pointer is returned to the caller.
3286 * a consuming read, so a producer is not expected.
3287 * 3338 *
3288 * Must be paired with ring_buffer_finish. 3339 * Disabling buffer recordng prevents the reading from being
3340 * corrupted. This is not a consuming read, so a producer is not
3341 * expected.
3342 *
3343 * After a sequence of ring_buffer_read_prepare calls, the user is
3344 * expected to make at least one call to ring_buffer_prepare_sync.
3345 * Afterwards, ring_buffer_read_start is invoked to get things going
3346 * for real.
3347 *
3348 * This overall must be paired with ring_buffer_finish.
3289 */ 3349 */
3290struct ring_buffer_iter * 3350struct ring_buffer_iter *
3291ring_buffer_read_start(struct ring_buffer *buffer, int cpu) 3351ring_buffer_read_prepare(struct ring_buffer *buffer, int cpu)
3292{ 3352{
3293 struct ring_buffer_per_cpu *cpu_buffer; 3353 struct ring_buffer_per_cpu *cpu_buffer;
3294 struct ring_buffer_iter *iter; 3354 struct ring_buffer_iter *iter;
3295 unsigned long flags;
3296 3355
3297 if (!cpumask_test_cpu(cpu, buffer->cpumask)) 3356 if (!cpumask_test_cpu(cpu, buffer->cpumask))
3298 return NULL; 3357 return NULL;
@@ -3306,15 +3365,52 @@ ring_buffer_read_start(struct ring_buffer *buffer, int cpu)
3306 iter->cpu_buffer = cpu_buffer; 3365 iter->cpu_buffer = cpu_buffer;
3307 3366
3308 atomic_inc(&cpu_buffer->record_disabled); 3367 atomic_inc(&cpu_buffer->record_disabled);
3368
3369 return iter;
3370}
3371EXPORT_SYMBOL_GPL(ring_buffer_read_prepare);
3372
3373/**
3374 * ring_buffer_read_prepare_sync - Synchronize a set of prepare calls
3375 *
3376 * All previously invoked ring_buffer_read_prepare calls to prepare
3377 * iterators will be synchronized. Afterwards, read_buffer_read_start
3378 * calls on those iterators are allowed.
3379 */
3380void
3381ring_buffer_read_prepare_sync(void)
3382{
3309 synchronize_sched(); 3383 synchronize_sched();
3384}
3385EXPORT_SYMBOL_GPL(ring_buffer_read_prepare_sync);
3386
3387/**
3388 * ring_buffer_read_start - start a non consuming read of the buffer
3389 * @iter: The iterator returned by ring_buffer_read_prepare
3390 *
3391 * This finalizes the startup of an iteration through the buffer.
3392 * The iterator comes from a call to ring_buffer_read_prepare and
3393 * an intervening ring_buffer_read_prepare_sync must have been
3394 * performed.
3395 *
3396 * Must be paired with ring_buffer_finish.
3397 */
3398void
3399ring_buffer_read_start(struct ring_buffer_iter *iter)
3400{
3401 struct ring_buffer_per_cpu *cpu_buffer;
3402 unsigned long flags;
3403
3404 if (!iter)
3405 return;
3406
3407 cpu_buffer = iter->cpu_buffer;
3310 3408
3311 spin_lock_irqsave(&cpu_buffer->reader_lock, flags); 3409 spin_lock_irqsave(&cpu_buffer->reader_lock, flags);
3312 arch_spin_lock(&cpu_buffer->lock); 3410 arch_spin_lock(&cpu_buffer->lock);
3313 rb_iter_reset(iter); 3411 rb_iter_reset(iter);
3314 arch_spin_unlock(&cpu_buffer->lock); 3412 arch_spin_unlock(&cpu_buffer->lock);
3315 spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); 3413 spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags);
3316
3317 return iter;
3318} 3414}
3319EXPORT_SYMBOL_GPL(ring_buffer_read_start); 3415EXPORT_SYMBOL_GPL(ring_buffer_read_start);
3320 3416
@@ -3408,6 +3504,9 @@ rb_reset_cpu(struct ring_buffer_per_cpu *cpu_buffer)
3408 cpu_buffer->write_stamp = 0; 3504 cpu_buffer->write_stamp = 0;
3409 cpu_buffer->read_stamp = 0; 3505 cpu_buffer->read_stamp = 0;
3410 3506
3507 cpu_buffer->lost_events = 0;
3508 cpu_buffer->last_overrun = 0;
3509
3411 rb_head_page_activate(cpu_buffer); 3510 rb_head_page_activate(cpu_buffer);
3412} 3511}
3413 3512
@@ -3683,6 +3782,7 @@ int ring_buffer_read_page(struct ring_buffer *buffer,
3683 struct ring_buffer_event *event; 3782 struct ring_buffer_event *event;
3684 struct buffer_data_page *bpage; 3783 struct buffer_data_page *bpage;
3685 struct buffer_page *reader; 3784 struct buffer_page *reader;
3785 unsigned long missed_events;
3686 unsigned long flags; 3786 unsigned long flags;
3687 unsigned int commit; 3787 unsigned int commit;
3688 unsigned int read; 3788 unsigned int read;
@@ -3719,6 +3819,9 @@ int ring_buffer_read_page(struct ring_buffer *buffer,
3719 read = reader->read; 3819 read = reader->read;
3720 commit = rb_page_commit(reader); 3820 commit = rb_page_commit(reader);
3721 3821
3822 /* Check if any events were dropped */
3823 missed_events = cpu_buffer->lost_events;
3824
3722 /* 3825 /*
3723 * If this page has been partially read or 3826 * If this page has been partially read or
3724 * if len is not big enough to read the rest of the page or 3827 * if len is not big enough to read the rest of the page or
@@ -3779,9 +3882,35 @@ int ring_buffer_read_page(struct ring_buffer *buffer,
3779 local_set(&reader->entries, 0); 3882 local_set(&reader->entries, 0);
3780 reader->read = 0; 3883 reader->read = 0;
3781 *data_page = bpage; 3884 *data_page = bpage;
3885
3886 /*
3887 * Use the real_end for the data size,
3888 * This gives us a chance to store the lost events
3889 * on the page.
3890 */
3891 if (reader->real_end)
3892 local_set(&bpage->commit, reader->real_end);
3782 } 3893 }
3783 ret = read; 3894 ret = read;
3784 3895
3896 cpu_buffer->lost_events = 0;
3897 /*
3898 * Set a flag in the commit field if we lost events
3899 */
3900 if (missed_events) {
3901 commit = local_read(&bpage->commit);
3902
3903 /* If there is room at the end of the page to save the
3904 * missed events, then record it there.
3905 */
3906 if (BUF_PAGE_SIZE - commit >= sizeof(missed_events)) {
3907 memcpy(&bpage->data[commit], &missed_events,
3908 sizeof(missed_events));
3909 local_add(RB_MISSED_STORED, &bpage->commit);
3910 }
3911 local_add(RB_MISSED_EVENTS, &bpage->commit);
3912 }
3913
3785 out_unlock: 3914 out_unlock:
3786 spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags); 3915 spin_unlock_irqrestore(&cpu_buffer->reader_lock, flags);
3787 3916
diff --git a/kernel/trace/ring_buffer_benchmark.c b/kernel/trace/ring_buffer_benchmark.c
index df74c7982255..302f8a614635 100644
--- a/kernel/trace/ring_buffer_benchmark.c
+++ b/kernel/trace/ring_buffer_benchmark.c
@@ -81,7 +81,7 @@ static enum event_status read_event(int cpu)
81 int *entry; 81 int *entry;
82 u64 ts; 82 u64 ts;
83 83
84 event = ring_buffer_consume(buffer, cpu, &ts); 84 event = ring_buffer_consume(buffer, cpu, &ts, NULL);
85 if (!event) 85 if (!event)
86 return EVENT_DROPPED; 86 return EVENT_DROPPED;
87 87
@@ -113,7 +113,8 @@ static enum event_status read_page(int cpu)
113 ret = ring_buffer_read_page(buffer, &bpage, PAGE_SIZE, cpu, 1); 113 ret = ring_buffer_read_page(buffer, &bpage, PAGE_SIZE, cpu, 1);
114 if (ret >= 0) { 114 if (ret >= 0) {
115 rpage = bpage; 115 rpage = bpage;
116 commit = local_read(&rpage->commit); 116 /* The commit may have missed event flags set, clear them */
117 commit = local_read(&rpage->commit) & 0xfffff;
117 for (i = 0; i < commit && !kill_test; i += inc) { 118 for (i = 0; i < commit && !kill_test; i += inc) {
118 119
119 if (i >= (PAGE_SIZE - offsetof(struct rb_page, data))) { 120 if (i >= (PAGE_SIZE - offsetof(struct rb_page, data))) {
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
index 44f916a04065..756d7283318b 100644
--- a/kernel/trace/trace.c
+++ b/kernel/trace/trace.c
@@ -117,9 +117,12 @@ static cpumask_var_t __read_mostly tracing_buffer_mask;
117 * 117 *
118 * It is default off, but you can enable it with either specifying 118 * It is default off, but you can enable it with either specifying
119 * "ftrace_dump_on_oops" in the kernel command line, or setting 119 * "ftrace_dump_on_oops" in the kernel command line, or setting
120 * /proc/sys/kernel/ftrace_dump_on_oops to true. 120 * /proc/sys/kernel/ftrace_dump_on_oops
121 * Set 1 if you want to dump buffers of all CPUs
122 * Set 2 if you want to dump the buffer of the CPU that triggered oops
121 */ 123 */
122int ftrace_dump_on_oops; 124
125enum ftrace_dump_mode ftrace_dump_on_oops;
123 126
124static int tracing_set_tracer(const char *buf); 127static int tracing_set_tracer(const char *buf);
125 128
@@ -139,8 +142,17 @@ __setup("ftrace=", set_cmdline_ftrace);
139 142
140static int __init set_ftrace_dump_on_oops(char *str) 143static int __init set_ftrace_dump_on_oops(char *str)
141{ 144{
142 ftrace_dump_on_oops = 1; 145 if (*str++ != '=' || !*str) {
143 return 1; 146 ftrace_dump_on_oops = DUMP_ALL;
147 return 1;
148 }
149
150 if (!strcmp("orig_cpu", str)) {
151 ftrace_dump_on_oops = DUMP_ORIG;
152 return 1;
153 }
154
155 return 0;
144} 156}
145__setup("ftrace_dump_on_oops", set_ftrace_dump_on_oops); 157__setup("ftrace_dump_on_oops", set_ftrace_dump_on_oops);
146 158
@@ -1545,7 +1557,8 @@ static void trace_iterator_increment(struct trace_iterator *iter)
1545} 1557}
1546 1558
1547static struct trace_entry * 1559static struct trace_entry *
1548peek_next_entry(struct trace_iterator *iter, int cpu, u64 *ts) 1560peek_next_entry(struct trace_iterator *iter, int cpu, u64 *ts,
1561 unsigned long *lost_events)
1549{ 1562{
1550 struct ring_buffer_event *event; 1563 struct ring_buffer_event *event;
1551 struct ring_buffer_iter *buf_iter = iter->buffer_iter[cpu]; 1564 struct ring_buffer_iter *buf_iter = iter->buffer_iter[cpu];
@@ -1556,7 +1569,8 @@ peek_next_entry(struct trace_iterator *iter, int cpu, u64 *ts)
1556 if (buf_iter) 1569 if (buf_iter)
1557 event = ring_buffer_iter_peek(buf_iter, ts); 1570 event = ring_buffer_iter_peek(buf_iter, ts);
1558 else 1571 else
1559 event = ring_buffer_peek(iter->tr->buffer, cpu, ts); 1572 event = ring_buffer_peek(iter->tr->buffer, cpu, ts,
1573 lost_events);
1560 1574
1561 ftrace_enable_cpu(); 1575 ftrace_enable_cpu();
1562 1576
@@ -1564,10 +1578,12 @@ peek_next_entry(struct trace_iterator *iter, int cpu, u64 *ts)
1564} 1578}
1565 1579
1566static struct trace_entry * 1580static struct trace_entry *
1567__find_next_entry(struct trace_iterator *iter, int *ent_cpu, u64 *ent_ts) 1581__find_next_entry(struct trace_iterator *iter, int *ent_cpu,
1582 unsigned long *missing_events, u64 *ent_ts)
1568{ 1583{
1569 struct ring_buffer *buffer = iter->tr->buffer; 1584 struct ring_buffer *buffer = iter->tr->buffer;
1570 struct trace_entry *ent, *next = NULL; 1585 struct trace_entry *ent, *next = NULL;
1586 unsigned long lost_events = 0, next_lost = 0;
1571 int cpu_file = iter->cpu_file; 1587 int cpu_file = iter->cpu_file;
1572 u64 next_ts = 0, ts; 1588 u64 next_ts = 0, ts;
1573 int next_cpu = -1; 1589 int next_cpu = -1;
@@ -1580,7 +1596,7 @@ __find_next_entry(struct trace_iterator *iter, int *ent_cpu, u64 *ent_ts)
1580 if (cpu_file > TRACE_PIPE_ALL_CPU) { 1596 if (cpu_file > TRACE_PIPE_ALL_CPU) {
1581 if (ring_buffer_empty_cpu(buffer, cpu_file)) 1597 if (ring_buffer_empty_cpu(buffer, cpu_file))
1582 return NULL; 1598 return NULL;
1583 ent = peek_next_entry(iter, cpu_file, ent_ts); 1599 ent = peek_next_entry(iter, cpu_file, ent_ts, missing_events);
1584 if (ent_cpu) 1600 if (ent_cpu)
1585 *ent_cpu = cpu_file; 1601 *ent_cpu = cpu_file;
1586 1602
@@ -1592,7 +1608,7 @@ __find_next_entry(struct trace_iterator *iter, int *ent_cpu, u64 *ent_ts)
1592 if (ring_buffer_empty_cpu(buffer, cpu)) 1608 if (ring_buffer_empty_cpu(buffer, cpu))
1593 continue; 1609 continue;
1594 1610
1595 ent = peek_next_entry(iter, cpu, &ts); 1611 ent = peek_next_entry(iter, cpu, &ts, &lost_events);
1596 1612
1597 /* 1613 /*
1598 * Pick the entry with the smallest timestamp: 1614 * Pick the entry with the smallest timestamp:
@@ -1601,6 +1617,7 @@ __find_next_entry(struct trace_iterator *iter, int *ent_cpu, u64 *ent_ts)
1601 next = ent; 1617 next = ent;
1602 next_cpu = cpu; 1618 next_cpu = cpu;
1603 next_ts = ts; 1619 next_ts = ts;
1620 next_lost = lost_events;
1604 } 1621 }
1605 } 1622 }
1606 1623
@@ -1610,6 +1627,9 @@ __find_next_entry(struct trace_iterator *iter, int *ent_cpu, u64 *ent_ts)
1610 if (ent_ts) 1627 if (ent_ts)
1611 *ent_ts = next_ts; 1628 *ent_ts = next_ts;
1612 1629
1630 if (missing_events)
1631 *missing_events = next_lost;
1632
1613 return next; 1633 return next;
1614} 1634}
1615 1635
@@ -1617,13 +1637,14 @@ __find_next_entry(struct trace_iterator *iter, int *ent_cpu, u64 *ent_ts)
1617struct trace_entry *trace_find_next_entry(struct trace_iterator *iter, 1637struct trace_entry *trace_find_next_entry(struct trace_iterator *iter,
1618 int *ent_cpu, u64 *ent_ts) 1638 int *ent_cpu, u64 *ent_ts)
1619{ 1639{
1620 return __find_next_entry(iter, ent_cpu, ent_ts); 1640 return __find_next_entry(iter, ent_cpu, NULL, ent_ts);
1621} 1641}
1622 1642
1623/* Find the next real entry, and increment the iterator to the next entry */ 1643/* Find the next real entry, and increment the iterator to the next entry */
1624static void *find_next_entry_inc(struct trace_iterator *iter) 1644static void *find_next_entry_inc(struct trace_iterator *iter)
1625{ 1645{
1626 iter->ent = __find_next_entry(iter, &iter->cpu, &iter->ts); 1646 iter->ent = __find_next_entry(iter, &iter->cpu,
1647 &iter->lost_events, &iter->ts);
1627 1648
1628 if (iter->ent) 1649 if (iter->ent)
1629 trace_iterator_increment(iter); 1650 trace_iterator_increment(iter);
@@ -1635,7 +1656,8 @@ static void trace_consume(struct trace_iterator *iter)
1635{ 1656{
1636 /* Don't allow ftrace to trace into the ring buffers */ 1657 /* Don't allow ftrace to trace into the ring buffers */
1637 ftrace_disable_cpu(); 1658 ftrace_disable_cpu();
1638 ring_buffer_consume(iter->tr->buffer, iter->cpu, &iter->ts); 1659 ring_buffer_consume(iter->tr->buffer, iter->cpu, &iter->ts,
1660 &iter->lost_events);
1639 ftrace_enable_cpu(); 1661 ftrace_enable_cpu();
1640} 1662}
1641 1663
@@ -1786,7 +1808,7 @@ static void print_func_help_header(struct seq_file *m)
1786} 1808}
1787 1809
1788 1810
1789static void 1811void
1790print_trace_header(struct seq_file *m, struct trace_iterator *iter) 1812print_trace_header(struct seq_file *m, struct trace_iterator *iter)
1791{ 1813{
1792 unsigned long sym_flags = (trace_flags & TRACE_ITER_SYM_MASK); 1814 unsigned long sym_flags = (trace_flags & TRACE_ITER_SYM_MASK);
@@ -1995,7 +2017,7 @@ static enum print_line_t print_bin_fmt(struct trace_iterator *iter)
1995 return event ? event->binary(iter, 0) : TRACE_TYPE_HANDLED; 2017 return event ? event->binary(iter, 0) : TRACE_TYPE_HANDLED;
1996} 2018}
1997 2019
1998static int trace_empty(struct trace_iterator *iter) 2020int trace_empty(struct trace_iterator *iter)
1999{ 2021{
2000 int cpu; 2022 int cpu;
2001 2023
@@ -2030,6 +2052,10 @@ static enum print_line_t print_trace_line(struct trace_iterator *iter)
2030{ 2052{
2031 enum print_line_t ret; 2053 enum print_line_t ret;
2032 2054
2055 if (iter->lost_events)
2056 trace_seq_printf(&iter->seq, "CPU:%d [LOST %lu EVENTS]\n",
2057 iter->cpu, iter->lost_events);
2058
2033 if (iter->trace && iter->trace->print_line) { 2059 if (iter->trace && iter->trace->print_line) {
2034 ret = iter->trace->print_line(iter); 2060 ret = iter->trace->print_line(iter);
2035 if (ret != TRACE_TYPE_UNHANDLED) 2061 if (ret != TRACE_TYPE_UNHANDLED)
@@ -2058,6 +2084,23 @@ static enum print_line_t print_trace_line(struct trace_iterator *iter)
2058 return print_trace_fmt(iter); 2084 return print_trace_fmt(iter);
2059} 2085}
2060 2086
2087void trace_default_header(struct seq_file *m)
2088{
2089 struct trace_iterator *iter = m->private;
2090
2091 if (iter->iter_flags & TRACE_FILE_LAT_FMT) {
2092 /* print nothing if the buffers are empty */
2093 if (trace_empty(iter))
2094 return;
2095 print_trace_header(m, iter);
2096 if (!(trace_flags & TRACE_ITER_VERBOSE))
2097 print_lat_help_header(m);
2098 } else {
2099 if (!(trace_flags & TRACE_ITER_VERBOSE))
2100 print_func_help_header(m);
2101 }
2102}
2103
2061static int s_show(struct seq_file *m, void *v) 2104static int s_show(struct seq_file *m, void *v)
2062{ 2105{
2063 struct trace_iterator *iter = v; 2106 struct trace_iterator *iter = v;
@@ -2070,17 +2113,9 @@ static int s_show(struct seq_file *m, void *v)
2070 } 2113 }
2071 if (iter->trace && iter->trace->print_header) 2114 if (iter->trace && iter->trace->print_header)
2072 iter->trace->print_header(m); 2115 iter->trace->print_header(m);
2073 else if (iter->iter_flags & TRACE_FILE_LAT_FMT) { 2116 else
2074 /* print nothing if the buffers are empty */ 2117 trace_default_header(m);
2075 if (trace_empty(iter)) 2118
2076 return 0;
2077 print_trace_header(m, iter);
2078 if (!(trace_flags & TRACE_ITER_VERBOSE))
2079 print_lat_help_header(m);
2080 } else {
2081 if (!(trace_flags & TRACE_ITER_VERBOSE))
2082 print_func_help_header(m);
2083 }
2084 } else if (iter->leftover) { 2119 } else if (iter->leftover) {
2085 /* 2120 /*
2086 * If we filled the seq_file buffer earlier, we 2121 * If we filled the seq_file buffer earlier, we
@@ -2166,15 +2201,20 @@ __tracing_open(struct inode *inode, struct file *file)
2166 2201
2167 if (iter->cpu_file == TRACE_PIPE_ALL_CPU) { 2202 if (iter->cpu_file == TRACE_PIPE_ALL_CPU) {
2168 for_each_tracing_cpu(cpu) { 2203 for_each_tracing_cpu(cpu) {
2169
2170 iter->buffer_iter[cpu] = 2204 iter->buffer_iter[cpu] =
2171 ring_buffer_read_start(iter->tr->buffer, cpu); 2205 ring_buffer_read_prepare(iter->tr->buffer, cpu);
2206 }
2207 ring_buffer_read_prepare_sync();
2208 for_each_tracing_cpu(cpu) {
2209 ring_buffer_read_start(iter->buffer_iter[cpu]);
2172 tracing_iter_reset(iter, cpu); 2210 tracing_iter_reset(iter, cpu);
2173 } 2211 }
2174 } else { 2212 } else {
2175 cpu = iter->cpu_file; 2213 cpu = iter->cpu_file;
2176 iter->buffer_iter[cpu] = 2214 iter->buffer_iter[cpu] =
2177 ring_buffer_read_start(iter->tr->buffer, cpu); 2215 ring_buffer_read_prepare(iter->tr->buffer, cpu);
2216 ring_buffer_read_prepare_sync();
2217 ring_buffer_read_start(iter->buffer_iter[cpu]);
2178 tracing_iter_reset(iter, cpu); 2218 tracing_iter_reset(iter, cpu);
2179 } 2219 }
2180 2220
@@ -4324,7 +4364,7 @@ static int trace_panic_handler(struct notifier_block *this,
4324 unsigned long event, void *unused) 4364 unsigned long event, void *unused)
4325{ 4365{
4326 if (ftrace_dump_on_oops) 4366 if (ftrace_dump_on_oops)
4327 ftrace_dump(); 4367 ftrace_dump(ftrace_dump_on_oops);
4328 return NOTIFY_OK; 4368 return NOTIFY_OK;
4329} 4369}
4330 4370
@@ -4341,7 +4381,7 @@ static int trace_die_handler(struct notifier_block *self,
4341 switch (val) { 4381 switch (val) {
4342 case DIE_OOPS: 4382 case DIE_OOPS:
4343 if (ftrace_dump_on_oops) 4383 if (ftrace_dump_on_oops)
4344 ftrace_dump(); 4384 ftrace_dump(ftrace_dump_on_oops);
4345 break; 4385 break;
4346 default: 4386 default:
4347 break; 4387 break;
@@ -4382,7 +4422,8 @@ trace_printk_seq(struct trace_seq *s)
4382 trace_seq_init(s); 4422 trace_seq_init(s);
4383} 4423}
4384 4424
4385static void __ftrace_dump(bool disable_tracing) 4425static void
4426__ftrace_dump(bool disable_tracing, enum ftrace_dump_mode oops_dump_mode)
4386{ 4427{
4387 static arch_spinlock_t ftrace_dump_lock = 4428 static arch_spinlock_t ftrace_dump_lock =
4388 (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; 4429 (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED;
@@ -4415,12 +4456,25 @@ static void __ftrace_dump(bool disable_tracing)
4415 /* don't look at user memory in panic mode */ 4456 /* don't look at user memory in panic mode */
4416 trace_flags &= ~TRACE_ITER_SYM_USEROBJ; 4457 trace_flags &= ~TRACE_ITER_SYM_USEROBJ;
4417 4458
4418 printk(KERN_TRACE "Dumping ftrace buffer:\n");
4419
4420 /* Simulate the iterator */ 4459 /* Simulate the iterator */
4421 iter.tr = &global_trace; 4460 iter.tr = &global_trace;
4422 iter.trace = current_trace; 4461 iter.trace = current_trace;
4423 iter.cpu_file = TRACE_PIPE_ALL_CPU; 4462
4463 switch (oops_dump_mode) {
4464 case DUMP_ALL:
4465 iter.cpu_file = TRACE_PIPE_ALL_CPU;
4466 break;
4467 case DUMP_ORIG:
4468 iter.cpu_file = raw_smp_processor_id();
4469 break;
4470 case DUMP_NONE:
4471 goto out_enable;
4472 default:
4473 printk(KERN_TRACE "Bad dumping mode, switching to all CPUs dump\n");
4474 iter.cpu_file = TRACE_PIPE_ALL_CPU;
4475 }
4476
4477 printk(KERN_TRACE "Dumping ftrace buffer:\n");
4424 4478
4425 /* 4479 /*
4426 * We need to stop all tracing on all CPUS to read the 4480 * We need to stop all tracing on all CPUS to read the
@@ -4459,6 +4513,7 @@ static void __ftrace_dump(bool disable_tracing)
4459 else 4513 else
4460 printk(KERN_TRACE "---------------------------------\n"); 4514 printk(KERN_TRACE "---------------------------------\n");
4461 4515
4516 out_enable:
4462 /* Re-enable tracing if requested */ 4517 /* Re-enable tracing if requested */
4463 if (!disable_tracing) { 4518 if (!disable_tracing) {
4464 trace_flags |= old_userobj; 4519 trace_flags |= old_userobj;
@@ -4475,9 +4530,9 @@ static void __ftrace_dump(bool disable_tracing)
4475} 4530}
4476 4531
4477/* By default: disable tracing after the dump */ 4532/* By default: disable tracing after the dump */
4478void ftrace_dump(void) 4533void ftrace_dump(enum ftrace_dump_mode oops_dump_mode)
4479{ 4534{
4480 __ftrace_dump(true); 4535 __ftrace_dump(true, oops_dump_mode);
4481} 4536}
4482 4537
4483__init static int tracer_alloc_buffers(void) 4538__init static int tracer_alloc_buffers(void)
diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h
index 2825ef2c0b15..d1ce0bec1b3f 100644
--- a/kernel/trace/trace.h
+++ b/kernel/trace/trace.h
@@ -34,7 +34,6 @@ enum trace_type {
34 TRACE_GRAPH_RET, 34 TRACE_GRAPH_RET,
35 TRACE_GRAPH_ENT, 35 TRACE_GRAPH_ENT,
36 TRACE_USER_STACK, 36 TRACE_USER_STACK,
37 TRACE_HW_BRANCHES,
38 TRACE_KMEM_ALLOC, 37 TRACE_KMEM_ALLOC,
39 TRACE_KMEM_FREE, 38 TRACE_KMEM_FREE,
40 TRACE_BLK, 39 TRACE_BLK,
@@ -103,29 +102,17 @@ struct syscall_trace_exit {
103 long ret; 102 long ret;
104}; 103};
105 104
106struct kprobe_trace_entry { 105struct kprobe_trace_entry_head {
107 struct trace_entry ent; 106 struct trace_entry ent;
108 unsigned long ip; 107 unsigned long ip;
109 int nargs;
110 unsigned long args[];
111}; 108};
112 109
113#define SIZEOF_KPROBE_TRACE_ENTRY(n) \ 110struct kretprobe_trace_entry_head {
114 (offsetof(struct kprobe_trace_entry, args) + \
115 (sizeof(unsigned long) * (n)))
116
117struct kretprobe_trace_entry {
118 struct trace_entry ent; 111 struct trace_entry ent;
119 unsigned long func; 112 unsigned long func;
120 unsigned long ret_ip; 113 unsigned long ret_ip;
121 int nargs;
122 unsigned long args[];
123}; 114};
124 115
125#define SIZEOF_KRETPROBE_TRACE_ENTRY(n) \
126 (offsetof(struct kretprobe_trace_entry, args) + \
127 (sizeof(unsigned long) * (n)))
128
129/* 116/*
130 * trace_flag_type is an enumeration that holds different 117 * trace_flag_type is an enumeration that holds different
131 * states when a trace occurs. These are: 118 * states when a trace occurs. These are:
@@ -229,7 +216,6 @@ extern void __ftrace_bad_type(void);
229 TRACE_GRAPH_ENT); \ 216 TRACE_GRAPH_ENT); \
230 IF_ASSIGN(var, ent, struct ftrace_graph_ret_entry, \ 217 IF_ASSIGN(var, ent, struct ftrace_graph_ret_entry, \
231 TRACE_GRAPH_RET); \ 218 TRACE_GRAPH_RET); \
232 IF_ASSIGN(var, ent, struct hw_branch_entry, TRACE_HW_BRANCHES);\
233 IF_ASSIGN(var, ent, struct kmemtrace_alloc_entry, \ 219 IF_ASSIGN(var, ent, struct kmemtrace_alloc_entry, \
234 TRACE_KMEM_ALLOC); \ 220 TRACE_KMEM_ALLOC); \
235 IF_ASSIGN(var, ent, struct kmemtrace_free_entry, \ 221 IF_ASSIGN(var, ent, struct kmemtrace_free_entry, \
@@ -378,6 +364,9 @@ void trace_function(struct trace_array *tr,
378 unsigned long ip, 364 unsigned long ip,
379 unsigned long parent_ip, 365 unsigned long parent_ip,
380 unsigned long flags, int pc); 366 unsigned long flags, int pc);
367void trace_default_header(struct seq_file *m);
368void print_trace_header(struct seq_file *m, struct trace_iterator *iter);
369int trace_empty(struct trace_iterator *iter);
381 370
382void trace_graph_return(struct ftrace_graph_ret *trace); 371void trace_graph_return(struct ftrace_graph_ret *trace);
383int trace_graph_entry(struct ftrace_graph_ent *trace); 372int trace_graph_entry(struct ftrace_graph_ent *trace);
@@ -467,8 +456,6 @@ extern int trace_selftest_startup_sysprof(struct tracer *trace,
467 struct trace_array *tr); 456 struct trace_array *tr);
468extern int trace_selftest_startup_branch(struct tracer *trace, 457extern int trace_selftest_startup_branch(struct tracer *trace,
469 struct trace_array *tr); 458 struct trace_array *tr);
470extern int trace_selftest_startup_hw_branches(struct tracer *trace,
471 struct trace_array *tr);
472extern int trace_selftest_startup_ksym(struct tracer *trace, 459extern int trace_selftest_startup_ksym(struct tracer *trace,
473 struct trace_array *tr); 460 struct trace_array *tr);
474#endif /* CONFIG_FTRACE_STARTUP_TEST */ 461#endif /* CONFIG_FTRACE_STARTUP_TEST */
@@ -491,9 +478,29 @@ extern int trace_clock_id;
491 478
492/* Standard output formatting function used for function return traces */ 479/* Standard output formatting function used for function return traces */
493#ifdef CONFIG_FUNCTION_GRAPH_TRACER 480#ifdef CONFIG_FUNCTION_GRAPH_TRACER
494extern enum print_line_t print_graph_function(struct trace_iterator *iter); 481
482/* Flag options */
483#define TRACE_GRAPH_PRINT_OVERRUN 0x1
484#define TRACE_GRAPH_PRINT_CPU 0x2
485#define TRACE_GRAPH_PRINT_OVERHEAD 0x4
486#define TRACE_GRAPH_PRINT_PROC 0x8
487#define TRACE_GRAPH_PRINT_DURATION 0x10
488#define TRACE_GRAPH_PRINT_ABS_TIME 0x20
489
490extern enum print_line_t
491print_graph_function_flags(struct trace_iterator *iter, u32 flags);
492extern void print_graph_headers_flags(struct seq_file *s, u32 flags);
495extern enum print_line_t 493extern enum print_line_t
496trace_print_graph_duration(unsigned long long duration, struct trace_seq *s); 494trace_print_graph_duration(unsigned long long duration, struct trace_seq *s);
495extern void graph_trace_open(struct trace_iterator *iter);
496extern void graph_trace_close(struct trace_iterator *iter);
497extern int __trace_graph_entry(struct trace_array *tr,
498 struct ftrace_graph_ent *trace,
499 unsigned long flags, int pc);
500extern void __trace_graph_return(struct trace_array *tr,
501 struct ftrace_graph_ret *trace,
502 unsigned long flags, int pc);
503
497 504
498#ifdef CONFIG_DYNAMIC_FTRACE 505#ifdef CONFIG_DYNAMIC_FTRACE
499/* TODO: make this variable */ 506/* TODO: make this variable */
@@ -524,7 +531,7 @@ static inline int ftrace_graph_addr(unsigned long addr)
524#endif /* CONFIG_DYNAMIC_FTRACE */ 531#endif /* CONFIG_DYNAMIC_FTRACE */
525#else /* CONFIG_FUNCTION_GRAPH_TRACER */ 532#else /* CONFIG_FUNCTION_GRAPH_TRACER */
526static inline enum print_line_t 533static inline enum print_line_t
527print_graph_function(struct trace_iterator *iter) 534print_graph_function_flags(struct trace_iterator *iter, u32 flags)
528{ 535{
529 return TRACE_TYPE_UNHANDLED; 536 return TRACE_TYPE_UNHANDLED;
530} 537}
diff --git a/kernel/trace/trace_entries.h b/kernel/trace/trace_entries.h
index c16a08f399df..dc008c1240da 100644
--- a/kernel/trace/trace_entries.h
+++ b/kernel/trace/trace_entries.h
@@ -318,18 +318,6 @@ FTRACE_ENTRY(branch, trace_branch,
318 __entry->func, __entry->file, __entry->correct) 318 __entry->func, __entry->file, __entry->correct)
319); 319);
320 320
321FTRACE_ENTRY(hw_branch, hw_branch_entry,
322
323 TRACE_HW_BRANCHES,
324
325 F_STRUCT(
326 __field( u64, from )
327 __field( u64, to )
328 ),
329
330 F_printk("from: %llx to: %llx", __entry->from, __entry->to)
331);
332
333FTRACE_ENTRY(kmem_alloc, kmemtrace_alloc_entry, 321FTRACE_ENTRY(kmem_alloc, kmemtrace_alloc_entry,
334 322
335 TRACE_KMEM_ALLOC, 323 TRACE_KMEM_ALLOC,
diff --git a/kernel/trace/trace_events_filter.c b/kernel/trace/trace_events_filter.c
index 88c0b6dbd7fe..58092d844a1f 100644
--- a/kernel/trace/trace_events_filter.c
+++ b/kernel/trace/trace_events_filter.c
@@ -1398,7 +1398,7 @@ int ftrace_profile_set_filter(struct perf_event *event, int event_id,
1398 } 1398 }
1399 1399
1400 err = -EINVAL; 1400 err = -EINVAL;
1401 if (!call) 1401 if (&call->list == &ftrace_events)
1402 goto out_unlock; 1402 goto out_unlock;
1403 1403
1404 err = -EEXIST; 1404 err = -EEXIST;
diff --git a/kernel/trace/trace_functions_graph.c b/kernel/trace/trace_functions_graph.c
index 9aed1a5cf553..dd11c830eb84 100644
--- a/kernel/trace/trace_functions_graph.c
+++ b/kernel/trace/trace_functions_graph.c
@@ -40,7 +40,7 @@ struct fgraph_data {
40#define TRACE_GRAPH_PRINT_OVERHEAD 0x4 40#define TRACE_GRAPH_PRINT_OVERHEAD 0x4
41#define TRACE_GRAPH_PRINT_PROC 0x8 41#define TRACE_GRAPH_PRINT_PROC 0x8
42#define TRACE_GRAPH_PRINT_DURATION 0x10 42#define TRACE_GRAPH_PRINT_DURATION 0x10
43#define TRACE_GRAPH_PRINT_ABS_TIME 0X20 43#define TRACE_GRAPH_PRINT_ABS_TIME 0x20
44 44
45static struct tracer_opt trace_opts[] = { 45static struct tracer_opt trace_opts[] = {
46 /* Display overruns? (for self-debug purpose) */ 46 /* Display overruns? (for self-debug purpose) */
@@ -179,7 +179,7 @@ unsigned long ftrace_return_to_handler(unsigned long frame_pointer)
179 return ret; 179 return ret;
180} 180}
181 181
182static int __trace_graph_entry(struct trace_array *tr, 182int __trace_graph_entry(struct trace_array *tr,
183 struct ftrace_graph_ent *trace, 183 struct ftrace_graph_ent *trace,
184 unsigned long flags, 184 unsigned long flags,
185 int pc) 185 int pc)
@@ -246,7 +246,7 @@ int trace_graph_thresh_entry(struct ftrace_graph_ent *trace)
246 return trace_graph_entry(trace); 246 return trace_graph_entry(trace);
247} 247}
248 248
249static void __trace_graph_return(struct trace_array *tr, 249void __trace_graph_return(struct trace_array *tr,
250 struct ftrace_graph_ret *trace, 250 struct ftrace_graph_ret *trace,
251 unsigned long flags, 251 unsigned long flags,
252 int pc) 252 int pc)
@@ -490,9 +490,10 @@ get_return_for_leaf(struct trace_iterator *iter,
490 * We need to consume the current entry to see 490 * We need to consume the current entry to see
491 * the next one. 491 * the next one.
492 */ 492 */
493 ring_buffer_consume(iter->tr->buffer, iter->cpu, NULL); 493 ring_buffer_consume(iter->tr->buffer, iter->cpu,
494 NULL, NULL);
494 event = ring_buffer_peek(iter->tr->buffer, iter->cpu, 495 event = ring_buffer_peek(iter->tr->buffer, iter->cpu,
495 NULL); 496 NULL, NULL);
496 } 497 }
497 498
498 if (!event) 499 if (!event)
@@ -526,17 +527,18 @@ get_return_for_leaf(struct trace_iterator *iter,
526 527
527/* Signal a overhead of time execution to the output */ 528/* Signal a overhead of time execution to the output */
528static int 529static int
529print_graph_overhead(unsigned long long duration, struct trace_seq *s) 530print_graph_overhead(unsigned long long duration, struct trace_seq *s,
531 u32 flags)
530{ 532{
531 /* If duration disappear, we don't need anything */ 533 /* If duration disappear, we don't need anything */
532 if (!(tracer_flags.val & TRACE_GRAPH_PRINT_DURATION)) 534 if (!(flags & TRACE_GRAPH_PRINT_DURATION))
533 return 1; 535 return 1;
534 536
535 /* Non nested entry or return */ 537 /* Non nested entry or return */
536 if (duration == -1) 538 if (duration == -1)
537 return trace_seq_printf(s, " "); 539 return trace_seq_printf(s, " ");
538 540
539 if (tracer_flags.val & TRACE_GRAPH_PRINT_OVERHEAD) { 541 if (flags & TRACE_GRAPH_PRINT_OVERHEAD) {
540 /* Duration exceeded 100 msecs */ 542 /* Duration exceeded 100 msecs */
541 if (duration > 100000ULL) 543 if (duration > 100000ULL)
542 return trace_seq_printf(s, "! "); 544 return trace_seq_printf(s, "! ");
@@ -562,7 +564,7 @@ static int print_graph_abs_time(u64 t, struct trace_seq *s)
562 564
563static enum print_line_t 565static enum print_line_t
564print_graph_irq(struct trace_iterator *iter, unsigned long addr, 566print_graph_irq(struct trace_iterator *iter, unsigned long addr,
565 enum trace_type type, int cpu, pid_t pid) 567 enum trace_type type, int cpu, pid_t pid, u32 flags)
566{ 568{
567 int ret; 569 int ret;
568 struct trace_seq *s = &iter->seq; 570 struct trace_seq *s = &iter->seq;
@@ -572,21 +574,21 @@ print_graph_irq(struct trace_iterator *iter, unsigned long addr,
572 return TRACE_TYPE_UNHANDLED; 574 return TRACE_TYPE_UNHANDLED;
573 575
574 /* Absolute time */ 576 /* Absolute time */
575 if (tracer_flags.val & TRACE_GRAPH_PRINT_ABS_TIME) { 577 if (flags & TRACE_GRAPH_PRINT_ABS_TIME) {
576 ret = print_graph_abs_time(iter->ts, s); 578 ret = print_graph_abs_time(iter->ts, s);
577 if (!ret) 579 if (!ret)
578 return TRACE_TYPE_PARTIAL_LINE; 580 return TRACE_TYPE_PARTIAL_LINE;
579 } 581 }
580 582
581 /* Cpu */ 583 /* Cpu */
582 if (tracer_flags.val & TRACE_GRAPH_PRINT_CPU) { 584 if (flags & TRACE_GRAPH_PRINT_CPU) {
583 ret = print_graph_cpu(s, cpu); 585 ret = print_graph_cpu(s, cpu);
584 if (ret == TRACE_TYPE_PARTIAL_LINE) 586 if (ret == TRACE_TYPE_PARTIAL_LINE)
585 return TRACE_TYPE_PARTIAL_LINE; 587 return TRACE_TYPE_PARTIAL_LINE;
586 } 588 }
587 589
588 /* Proc */ 590 /* Proc */
589 if (tracer_flags.val & TRACE_GRAPH_PRINT_PROC) { 591 if (flags & TRACE_GRAPH_PRINT_PROC) {
590 ret = print_graph_proc(s, pid); 592 ret = print_graph_proc(s, pid);
591 if (ret == TRACE_TYPE_PARTIAL_LINE) 593 if (ret == TRACE_TYPE_PARTIAL_LINE)
592 return TRACE_TYPE_PARTIAL_LINE; 594 return TRACE_TYPE_PARTIAL_LINE;
@@ -596,7 +598,7 @@ print_graph_irq(struct trace_iterator *iter, unsigned long addr,
596 } 598 }
597 599
598 /* No overhead */ 600 /* No overhead */
599 ret = print_graph_overhead(-1, s); 601 ret = print_graph_overhead(-1, s, flags);
600 if (!ret) 602 if (!ret)
601 return TRACE_TYPE_PARTIAL_LINE; 603 return TRACE_TYPE_PARTIAL_LINE;
602 604
@@ -609,7 +611,7 @@ print_graph_irq(struct trace_iterator *iter, unsigned long addr,
609 return TRACE_TYPE_PARTIAL_LINE; 611 return TRACE_TYPE_PARTIAL_LINE;
610 612
611 /* Don't close the duration column if haven't one */ 613 /* Don't close the duration column if haven't one */
612 if (tracer_flags.val & TRACE_GRAPH_PRINT_DURATION) 614 if (flags & TRACE_GRAPH_PRINT_DURATION)
613 trace_seq_printf(s, " |"); 615 trace_seq_printf(s, " |");
614 ret = trace_seq_printf(s, "\n"); 616 ret = trace_seq_printf(s, "\n");
615 617
@@ -679,7 +681,8 @@ print_graph_duration(unsigned long long duration, struct trace_seq *s)
679static enum print_line_t 681static enum print_line_t
680print_graph_entry_leaf(struct trace_iterator *iter, 682print_graph_entry_leaf(struct trace_iterator *iter,
681 struct ftrace_graph_ent_entry *entry, 683 struct ftrace_graph_ent_entry *entry,
682 struct ftrace_graph_ret_entry *ret_entry, struct trace_seq *s) 684 struct ftrace_graph_ret_entry *ret_entry,
685 struct trace_seq *s, u32 flags)
683{ 686{
684 struct fgraph_data *data = iter->private; 687 struct fgraph_data *data = iter->private;
685 struct ftrace_graph_ret *graph_ret; 688 struct ftrace_graph_ret *graph_ret;
@@ -711,12 +714,12 @@ print_graph_entry_leaf(struct trace_iterator *iter,
711 } 714 }
712 715
713 /* Overhead */ 716 /* Overhead */
714 ret = print_graph_overhead(duration, s); 717 ret = print_graph_overhead(duration, s, flags);
715 if (!ret) 718 if (!ret)
716 return TRACE_TYPE_PARTIAL_LINE; 719 return TRACE_TYPE_PARTIAL_LINE;
717 720
718 /* Duration */ 721 /* Duration */
719 if (tracer_flags.val & TRACE_GRAPH_PRINT_DURATION) { 722 if (flags & TRACE_GRAPH_PRINT_DURATION) {
720 ret = print_graph_duration(duration, s); 723 ret = print_graph_duration(duration, s);
721 if (ret == TRACE_TYPE_PARTIAL_LINE) 724 if (ret == TRACE_TYPE_PARTIAL_LINE)
722 return TRACE_TYPE_PARTIAL_LINE; 725 return TRACE_TYPE_PARTIAL_LINE;
@@ -739,7 +742,7 @@ print_graph_entry_leaf(struct trace_iterator *iter,
739static enum print_line_t 742static enum print_line_t
740print_graph_entry_nested(struct trace_iterator *iter, 743print_graph_entry_nested(struct trace_iterator *iter,
741 struct ftrace_graph_ent_entry *entry, 744 struct ftrace_graph_ent_entry *entry,
742 struct trace_seq *s, int cpu) 745 struct trace_seq *s, int cpu, u32 flags)
743{ 746{
744 struct ftrace_graph_ent *call = &entry->graph_ent; 747 struct ftrace_graph_ent *call = &entry->graph_ent;
745 struct fgraph_data *data = iter->private; 748 struct fgraph_data *data = iter->private;
@@ -759,12 +762,12 @@ print_graph_entry_nested(struct trace_iterator *iter,
759 } 762 }
760 763
761 /* No overhead */ 764 /* No overhead */
762 ret = print_graph_overhead(-1, s); 765 ret = print_graph_overhead(-1, s, flags);
763 if (!ret) 766 if (!ret)
764 return TRACE_TYPE_PARTIAL_LINE; 767 return TRACE_TYPE_PARTIAL_LINE;
765 768
766 /* No time */ 769 /* No time */
767 if (tracer_flags.val & TRACE_GRAPH_PRINT_DURATION) { 770 if (flags & TRACE_GRAPH_PRINT_DURATION) {
768 ret = trace_seq_printf(s, " | "); 771 ret = trace_seq_printf(s, " | ");
769 if (!ret) 772 if (!ret)
770 return TRACE_TYPE_PARTIAL_LINE; 773 return TRACE_TYPE_PARTIAL_LINE;
@@ -790,7 +793,7 @@ print_graph_entry_nested(struct trace_iterator *iter,
790 793
791static enum print_line_t 794static enum print_line_t
792print_graph_prologue(struct trace_iterator *iter, struct trace_seq *s, 795print_graph_prologue(struct trace_iterator *iter, struct trace_seq *s,
793 int type, unsigned long addr) 796 int type, unsigned long addr, u32 flags)
794{ 797{
795 struct fgraph_data *data = iter->private; 798 struct fgraph_data *data = iter->private;
796 struct trace_entry *ent = iter->ent; 799 struct trace_entry *ent = iter->ent;
@@ -803,27 +806,27 @@ print_graph_prologue(struct trace_iterator *iter, struct trace_seq *s,
803 806
804 if (type) { 807 if (type) {
805 /* Interrupt */ 808 /* Interrupt */
806 ret = print_graph_irq(iter, addr, type, cpu, ent->pid); 809 ret = print_graph_irq(iter, addr, type, cpu, ent->pid, flags);
807 if (ret == TRACE_TYPE_PARTIAL_LINE) 810 if (ret == TRACE_TYPE_PARTIAL_LINE)
808 return TRACE_TYPE_PARTIAL_LINE; 811 return TRACE_TYPE_PARTIAL_LINE;
809 } 812 }
810 813
811 /* Absolute time */ 814 /* Absolute time */
812 if (tracer_flags.val & TRACE_GRAPH_PRINT_ABS_TIME) { 815 if (flags & TRACE_GRAPH_PRINT_ABS_TIME) {
813 ret = print_graph_abs_time(iter->ts, s); 816 ret = print_graph_abs_time(iter->ts, s);
814 if (!ret) 817 if (!ret)
815 return TRACE_TYPE_PARTIAL_LINE; 818 return TRACE_TYPE_PARTIAL_LINE;
816 } 819 }
817 820
818 /* Cpu */ 821 /* Cpu */
819 if (tracer_flags.val & TRACE_GRAPH_PRINT_CPU) { 822 if (flags & TRACE_GRAPH_PRINT_CPU) {
820 ret = print_graph_cpu(s, cpu); 823 ret = print_graph_cpu(s, cpu);
821 if (ret == TRACE_TYPE_PARTIAL_LINE) 824 if (ret == TRACE_TYPE_PARTIAL_LINE)
822 return TRACE_TYPE_PARTIAL_LINE; 825 return TRACE_TYPE_PARTIAL_LINE;
823 } 826 }
824 827
825 /* Proc */ 828 /* Proc */
826 if (tracer_flags.val & TRACE_GRAPH_PRINT_PROC) { 829 if (flags & TRACE_GRAPH_PRINT_PROC) {
827 ret = print_graph_proc(s, ent->pid); 830 ret = print_graph_proc(s, ent->pid);
828 if (ret == TRACE_TYPE_PARTIAL_LINE) 831 if (ret == TRACE_TYPE_PARTIAL_LINE)
829 return TRACE_TYPE_PARTIAL_LINE; 832 return TRACE_TYPE_PARTIAL_LINE;
@@ -845,7 +848,7 @@ print_graph_prologue(struct trace_iterator *iter, struct trace_seq *s,
845 848
846static enum print_line_t 849static enum print_line_t
847print_graph_entry(struct ftrace_graph_ent_entry *field, struct trace_seq *s, 850print_graph_entry(struct ftrace_graph_ent_entry *field, struct trace_seq *s,
848 struct trace_iterator *iter) 851 struct trace_iterator *iter, u32 flags)
849{ 852{
850 struct fgraph_data *data = iter->private; 853 struct fgraph_data *data = iter->private;
851 struct ftrace_graph_ent *call = &field->graph_ent; 854 struct ftrace_graph_ent *call = &field->graph_ent;
@@ -853,14 +856,14 @@ print_graph_entry(struct ftrace_graph_ent_entry *field, struct trace_seq *s,
853 static enum print_line_t ret; 856 static enum print_line_t ret;
854 int cpu = iter->cpu; 857 int cpu = iter->cpu;
855 858
856 if (print_graph_prologue(iter, s, TRACE_GRAPH_ENT, call->func)) 859 if (print_graph_prologue(iter, s, TRACE_GRAPH_ENT, call->func, flags))
857 return TRACE_TYPE_PARTIAL_LINE; 860 return TRACE_TYPE_PARTIAL_LINE;
858 861
859 leaf_ret = get_return_for_leaf(iter, field); 862 leaf_ret = get_return_for_leaf(iter, field);
860 if (leaf_ret) 863 if (leaf_ret)
861 ret = print_graph_entry_leaf(iter, field, leaf_ret, s); 864 ret = print_graph_entry_leaf(iter, field, leaf_ret, s, flags);
862 else 865 else
863 ret = print_graph_entry_nested(iter, field, s, cpu); 866 ret = print_graph_entry_nested(iter, field, s, cpu, flags);
864 867
865 if (data) { 868 if (data) {
866 /* 869 /*
@@ -879,7 +882,8 @@ print_graph_entry(struct ftrace_graph_ent_entry *field, struct trace_seq *s,
879 882
880static enum print_line_t 883static enum print_line_t
881print_graph_return(struct ftrace_graph_ret *trace, struct trace_seq *s, 884print_graph_return(struct ftrace_graph_ret *trace, struct trace_seq *s,
882 struct trace_entry *ent, struct trace_iterator *iter) 885 struct trace_entry *ent, struct trace_iterator *iter,
886 u32 flags)
883{ 887{
884 unsigned long long duration = trace->rettime - trace->calltime; 888 unsigned long long duration = trace->rettime - trace->calltime;
885 struct fgraph_data *data = iter->private; 889 struct fgraph_data *data = iter->private;
@@ -909,16 +913,16 @@ print_graph_return(struct ftrace_graph_ret *trace, struct trace_seq *s,
909 } 913 }
910 } 914 }
911 915
912 if (print_graph_prologue(iter, s, 0, 0)) 916 if (print_graph_prologue(iter, s, 0, 0, flags))
913 return TRACE_TYPE_PARTIAL_LINE; 917 return TRACE_TYPE_PARTIAL_LINE;
914 918
915 /* Overhead */ 919 /* Overhead */
916 ret = print_graph_overhead(duration, s); 920 ret = print_graph_overhead(duration, s, flags);
917 if (!ret) 921 if (!ret)
918 return TRACE_TYPE_PARTIAL_LINE; 922 return TRACE_TYPE_PARTIAL_LINE;
919 923
920 /* Duration */ 924 /* Duration */
921 if (tracer_flags.val & TRACE_GRAPH_PRINT_DURATION) { 925 if (flags & TRACE_GRAPH_PRINT_DURATION) {
922 ret = print_graph_duration(duration, s); 926 ret = print_graph_duration(duration, s);
923 if (ret == TRACE_TYPE_PARTIAL_LINE) 927 if (ret == TRACE_TYPE_PARTIAL_LINE)
924 return TRACE_TYPE_PARTIAL_LINE; 928 return TRACE_TYPE_PARTIAL_LINE;
@@ -948,14 +952,15 @@ print_graph_return(struct ftrace_graph_ret *trace, struct trace_seq *s,
948 } 952 }
949 953
950 /* Overrun */ 954 /* Overrun */
951 if (tracer_flags.val & TRACE_GRAPH_PRINT_OVERRUN) { 955 if (flags & TRACE_GRAPH_PRINT_OVERRUN) {
952 ret = trace_seq_printf(s, " (Overruns: %lu)\n", 956 ret = trace_seq_printf(s, " (Overruns: %lu)\n",
953 trace->overrun); 957 trace->overrun);
954 if (!ret) 958 if (!ret)
955 return TRACE_TYPE_PARTIAL_LINE; 959 return TRACE_TYPE_PARTIAL_LINE;
956 } 960 }
957 961
958 ret = print_graph_irq(iter, trace->func, TRACE_GRAPH_RET, cpu, pid); 962 ret = print_graph_irq(iter, trace->func, TRACE_GRAPH_RET,
963 cpu, pid, flags);
959 if (ret == TRACE_TYPE_PARTIAL_LINE) 964 if (ret == TRACE_TYPE_PARTIAL_LINE)
960 return TRACE_TYPE_PARTIAL_LINE; 965 return TRACE_TYPE_PARTIAL_LINE;
961 966
@@ -963,8 +968,8 @@ print_graph_return(struct ftrace_graph_ret *trace, struct trace_seq *s,
963} 968}
964 969
965static enum print_line_t 970static enum print_line_t
966print_graph_comment(struct trace_seq *s, struct trace_entry *ent, 971print_graph_comment(struct trace_seq *s, struct trace_entry *ent,
967 struct trace_iterator *iter) 972 struct trace_iterator *iter, u32 flags)
968{ 973{
969 unsigned long sym_flags = (trace_flags & TRACE_ITER_SYM_MASK); 974 unsigned long sym_flags = (trace_flags & TRACE_ITER_SYM_MASK);
970 struct fgraph_data *data = iter->private; 975 struct fgraph_data *data = iter->private;
@@ -976,16 +981,16 @@ print_graph_comment(struct trace_seq *s, struct trace_entry *ent,
976 if (data) 981 if (data)
977 depth = per_cpu_ptr(data->cpu_data, iter->cpu)->depth; 982 depth = per_cpu_ptr(data->cpu_data, iter->cpu)->depth;
978 983
979 if (print_graph_prologue(iter, s, 0, 0)) 984 if (print_graph_prologue(iter, s, 0, 0, flags))
980 return TRACE_TYPE_PARTIAL_LINE; 985 return TRACE_TYPE_PARTIAL_LINE;
981 986
982 /* No overhead */ 987 /* No overhead */
983 ret = print_graph_overhead(-1, s); 988 ret = print_graph_overhead(-1, s, flags);
984 if (!ret) 989 if (!ret)
985 return TRACE_TYPE_PARTIAL_LINE; 990 return TRACE_TYPE_PARTIAL_LINE;
986 991
987 /* No time */ 992 /* No time */
988 if (tracer_flags.val & TRACE_GRAPH_PRINT_DURATION) { 993 if (flags & TRACE_GRAPH_PRINT_DURATION) {
989 ret = trace_seq_printf(s, " | "); 994 ret = trace_seq_printf(s, " | ");
990 if (!ret) 995 if (!ret)
991 return TRACE_TYPE_PARTIAL_LINE; 996 return TRACE_TYPE_PARTIAL_LINE;
@@ -1040,7 +1045,7 @@ print_graph_comment(struct trace_seq *s, struct trace_entry *ent,
1040 1045
1041 1046
1042enum print_line_t 1047enum print_line_t
1043print_graph_function(struct trace_iterator *iter) 1048print_graph_function_flags(struct trace_iterator *iter, u32 flags)
1044{ 1049{
1045 struct ftrace_graph_ent_entry *field; 1050 struct ftrace_graph_ent_entry *field;
1046 struct fgraph_data *data = iter->private; 1051 struct fgraph_data *data = iter->private;
@@ -1061,7 +1066,7 @@ print_graph_function(struct trace_iterator *iter)
1061 if (data && data->failed) { 1066 if (data && data->failed) {
1062 field = &data->ent; 1067 field = &data->ent;
1063 iter->cpu = data->cpu; 1068 iter->cpu = data->cpu;
1064 ret = print_graph_entry(field, s, iter); 1069 ret = print_graph_entry(field, s, iter, flags);
1065 if (ret == TRACE_TYPE_HANDLED && iter->cpu != cpu) { 1070 if (ret == TRACE_TYPE_HANDLED && iter->cpu != cpu) {
1066 per_cpu_ptr(data->cpu_data, iter->cpu)->ignore = 1; 1071 per_cpu_ptr(data->cpu_data, iter->cpu)->ignore = 1;
1067 ret = TRACE_TYPE_NO_CONSUME; 1072 ret = TRACE_TYPE_NO_CONSUME;
@@ -1081,32 +1086,49 @@ print_graph_function(struct trace_iterator *iter)
1081 struct ftrace_graph_ent_entry saved; 1086 struct ftrace_graph_ent_entry saved;
1082 trace_assign_type(field, entry); 1087 trace_assign_type(field, entry);
1083 saved = *field; 1088 saved = *field;
1084 return print_graph_entry(&saved, s, iter); 1089 return print_graph_entry(&saved, s, iter, flags);
1085 } 1090 }
1086 case TRACE_GRAPH_RET: { 1091 case TRACE_GRAPH_RET: {
1087 struct ftrace_graph_ret_entry *field; 1092 struct ftrace_graph_ret_entry *field;
1088 trace_assign_type(field, entry); 1093 trace_assign_type(field, entry);
1089 return print_graph_return(&field->ret, s, entry, iter); 1094 return print_graph_return(&field->ret, s, entry, iter, flags);
1090 } 1095 }
1096 case TRACE_STACK:
1097 case TRACE_FN:
1098 /* dont trace stack and functions as comments */
1099 return TRACE_TYPE_UNHANDLED;
1100
1091 default: 1101 default:
1092 return print_graph_comment(s, entry, iter); 1102 return print_graph_comment(s, entry, iter, flags);
1093 } 1103 }
1094 1104
1095 return TRACE_TYPE_HANDLED; 1105 return TRACE_TYPE_HANDLED;
1096} 1106}
1097 1107
1098static void print_lat_header(struct seq_file *s) 1108static enum print_line_t
1109print_graph_function(struct trace_iterator *iter)
1110{
1111 return print_graph_function_flags(iter, tracer_flags.val);
1112}
1113
1114static enum print_line_t
1115print_graph_function_event(struct trace_iterator *iter, int flags)
1116{
1117 return print_graph_function(iter);
1118}
1119
1120static void print_lat_header(struct seq_file *s, u32 flags)
1099{ 1121{
1100 static const char spaces[] = " " /* 16 spaces */ 1122 static const char spaces[] = " " /* 16 spaces */
1101 " " /* 4 spaces */ 1123 " " /* 4 spaces */
1102 " "; /* 17 spaces */ 1124 " "; /* 17 spaces */
1103 int size = 0; 1125 int size = 0;
1104 1126
1105 if (tracer_flags.val & TRACE_GRAPH_PRINT_ABS_TIME) 1127 if (flags & TRACE_GRAPH_PRINT_ABS_TIME)
1106 size += 16; 1128 size += 16;
1107 if (tracer_flags.val & TRACE_GRAPH_PRINT_CPU) 1129 if (flags & TRACE_GRAPH_PRINT_CPU)
1108 size += 4; 1130 size += 4;
1109 if (tracer_flags.val & TRACE_GRAPH_PRINT_PROC) 1131 if (flags & TRACE_GRAPH_PRINT_PROC)
1110 size += 17; 1132 size += 17;
1111 1133
1112 seq_printf(s, "#%.*s _-----=> irqs-off \n", size, spaces); 1134 seq_printf(s, "#%.*s _-----=> irqs-off \n", size, spaces);
@@ -1117,43 +1139,48 @@ static void print_lat_header(struct seq_file *s)
1117 seq_printf(s, "#%.*s|||| / \n", size, spaces); 1139 seq_printf(s, "#%.*s|||| / \n", size, spaces);
1118} 1140}
1119 1141
1120static void print_graph_headers(struct seq_file *s) 1142void print_graph_headers_flags(struct seq_file *s, u32 flags)
1121{ 1143{
1122 int lat = trace_flags & TRACE_ITER_LATENCY_FMT; 1144 int lat = trace_flags & TRACE_ITER_LATENCY_FMT;
1123 1145
1124 if (lat) 1146 if (lat)
1125 print_lat_header(s); 1147 print_lat_header(s, flags);
1126 1148
1127 /* 1st line */ 1149 /* 1st line */
1128 seq_printf(s, "#"); 1150 seq_printf(s, "#");
1129 if (tracer_flags.val & TRACE_GRAPH_PRINT_ABS_TIME) 1151 if (flags & TRACE_GRAPH_PRINT_ABS_TIME)
1130 seq_printf(s, " TIME "); 1152 seq_printf(s, " TIME ");
1131 if (tracer_flags.val & TRACE_GRAPH_PRINT_CPU) 1153 if (flags & TRACE_GRAPH_PRINT_CPU)
1132 seq_printf(s, " CPU"); 1154 seq_printf(s, " CPU");
1133 if (tracer_flags.val & TRACE_GRAPH_PRINT_PROC) 1155 if (flags & TRACE_GRAPH_PRINT_PROC)
1134 seq_printf(s, " TASK/PID "); 1156 seq_printf(s, " TASK/PID ");
1135 if (lat) 1157 if (lat)
1136 seq_printf(s, "|||||"); 1158 seq_printf(s, "|||||");
1137 if (tracer_flags.val & TRACE_GRAPH_PRINT_DURATION) 1159 if (flags & TRACE_GRAPH_PRINT_DURATION)
1138 seq_printf(s, " DURATION "); 1160 seq_printf(s, " DURATION ");
1139 seq_printf(s, " FUNCTION CALLS\n"); 1161 seq_printf(s, " FUNCTION CALLS\n");
1140 1162
1141 /* 2nd line */ 1163 /* 2nd line */
1142 seq_printf(s, "#"); 1164 seq_printf(s, "#");
1143 if (tracer_flags.val & TRACE_GRAPH_PRINT_ABS_TIME) 1165 if (flags & TRACE_GRAPH_PRINT_ABS_TIME)
1144 seq_printf(s, " | "); 1166 seq_printf(s, " | ");
1145 if (tracer_flags.val & TRACE_GRAPH_PRINT_CPU) 1167 if (flags & TRACE_GRAPH_PRINT_CPU)
1146 seq_printf(s, " | "); 1168 seq_printf(s, " | ");
1147 if (tracer_flags.val & TRACE_GRAPH_PRINT_PROC) 1169 if (flags & TRACE_GRAPH_PRINT_PROC)
1148 seq_printf(s, " | | "); 1170 seq_printf(s, " | | ");
1149 if (lat) 1171 if (lat)
1150 seq_printf(s, "|||||"); 1172 seq_printf(s, "|||||");
1151 if (tracer_flags.val & TRACE_GRAPH_PRINT_DURATION) 1173 if (flags & TRACE_GRAPH_PRINT_DURATION)
1152 seq_printf(s, " | | "); 1174 seq_printf(s, " | | ");
1153 seq_printf(s, " | | | |\n"); 1175 seq_printf(s, " | | | |\n");
1154} 1176}
1155 1177
1156static void graph_trace_open(struct trace_iterator *iter) 1178void print_graph_headers(struct seq_file *s)
1179{
1180 print_graph_headers_flags(s, tracer_flags.val);
1181}
1182
1183void graph_trace_open(struct trace_iterator *iter)
1157{ 1184{
1158 /* pid and depth on the last trace processed */ 1185 /* pid and depth on the last trace processed */
1159 struct fgraph_data *data; 1186 struct fgraph_data *data;
@@ -1188,7 +1215,7 @@ static void graph_trace_open(struct trace_iterator *iter)
1188 pr_warning("function graph tracer: not enough memory\n"); 1215 pr_warning("function graph tracer: not enough memory\n");
1189} 1216}
1190 1217
1191static void graph_trace_close(struct trace_iterator *iter) 1218void graph_trace_close(struct trace_iterator *iter)
1192{ 1219{
1193 struct fgraph_data *data = iter->private; 1220 struct fgraph_data *data = iter->private;
1194 1221
@@ -1198,6 +1225,16 @@ static void graph_trace_close(struct trace_iterator *iter)
1198 } 1225 }
1199} 1226}
1200 1227
1228static struct trace_event graph_trace_entry_event = {
1229 .type = TRACE_GRAPH_ENT,
1230 .trace = print_graph_function_event,
1231};
1232
1233static struct trace_event graph_trace_ret_event = {
1234 .type = TRACE_GRAPH_RET,
1235 .trace = print_graph_function_event,
1236};
1237
1201static struct tracer graph_trace __read_mostly = { 1238static struct tracer graph_trace __read_mostly = {
1202 .name = "function_graph", 1239 .name = "function_graph",
1203 .open = graph_trace_open, 1240 .open = graph_trace_open,
@@ -1219,6 +1256,16 @@ static __init int init_graph_trace(void)
1219{ 1256{
1220 max_bytes_for_cpu = snprintf(NULL, 0, "%d", nr_cpu_ids - 1); 1257 max_bytes_for_cpu = snprintf(NULL, 0, "%d", nr_cpu_ids - 1);
1221 1258
1259 if (!register_ftrace_event(&graph_trace_entry_event)) {
1260 pr_warning("Warning: could not register graph trace events\n");
1261 return 1;
1262 }
1263
1264 if (!register_ftrace_event(&graph_trace_ret_event)) {
1265 pr_warning("Warning: could not register graph trace events\n");
1266 return 1;
1267 }
1268
1222 return register_tracer(&graph_trace); 1269 return register_tracer(&graph_trace);
1223} 1270}
1224 1271
diff --git a/kernel/trace/trace_hw_branches.c b/kernel/trace/trace_hw_branches.c
deleted file mode 100644
index 7b97000745f5..000000000000
--- a/kernel/trace/trace_hw_branches.c
+++ /dev/null
@@ -1,312 +0,0 @@
1/*
2 * h/w branch tracer for x86 based on BTS
3 *
4 * Copyright (C) 2008-2009 Intel Corporation.
5 * Markus Metzger <markus.t.metzger@gmail.com>, 2008-2009
6 */
7#include <linux/kallsyms.h>
8#include <linux/debugfs.h>
9#include <linux/ftrace.h>
10#include <linux/module.h>
11#include <linux/cpu.h>
12#include <linux/smp.h>
13#include <linux/fs.h>
14
15#include <asm/ds.h>
16
17#include "trace_output.h"
18#include "trace.h"
19
20
21#define BTS_BUFFER_SIZE (1 << 13)
22
23static DEFINE_PER_CPU(struct bts_tracer *, hwb_tracer);
24static DEFINE_PER_CPU(unsigned char[BTS_BUFFER_SIZE], hwb_buffer);
25
26#define this_tracer per_cpu(hwb_tracer, smp_processor_id())
27
28static int trace_hw_branches_enabled __read_mostly;
29static int trace_hw_branches_suspended __read_mostly;
30static struct trace_array *hw_branch_trace __read_mostly;
31
32
33static void bts_trace_init_cpu(int cpu)
34{
35 per_cpu(hwb_tracer, cpu) =
36 ds_request_bts_cpu(cpu, per_cpu(hwb_buffer, cpu),
37 BTS_BUFFER_SIZE, NULL, (size_t)-1,
38 BTS_KERNEL);
39
40 if (IS_ERR(per_cpu(hwb_tracer, cpu)))
41 per_cpu(hwb_tracer, cpu) = NULL;
42}
43
44static int bts_trace_init(struct trace_array *tr)
45{
46 int cpu;
47
48 hw_branch_trace = tr;
49 trace_hw_branches_enabled = 0;
50
51 get_online_cpus();
52 for_each_online_cpu(cpu) {
53 bts_trace_init_cpu(cpu);
54
55 if (likely(per_cpu(hwb_tracer, cpu)))
56 trace_hw_branches_enabled = 1;
57 }
58 trace_hw_branches_suspended = 0;
59 put_online_cpus();
60
61 /* If we could not enable tracing on a single cpu, we fail. */
62 return trace_hw_branches_enabled ? 0 : -EOPNOTSUPP;
63}
64
65static void bts_trace_reset(struct trace_array *tr)
66{
67 int cpu;
68
69 get_online_cpus();
70 for_each_online_cpu(cpu) {
71 if (likely(per_cpu(hwb_tracer, cpu))) {
72 ds_release_bts(per_cpu(hwb_tracer, cpu));
73 per_cpu(hwb_tracer, cpu) = NULL;
74 }
75 }
76 trace_hw_branches_enabled = 0;
77 trace_hw_branches_suspended = 0;
78 put_online_cpus();
79}
80
81static void bts_trace_start(struct trace_array *tr)
82{
83 int cpu;
84
85 get_online_cpus();
86 for_each_online_cpu(cpu)
87 if (likely(per_cpu(hwb_tracer, cpu)))
88 ds_resume_bts(per_cpu(hwb_tracer, cpu));
89 trace_hw_branches_suspended = 0;
90 put_online_cpus();
91}
92
93static void bts_trace_stop(struct trace_array *tr)
94{
95 int cpu;
96
97 get_online_cpus();
98 for_each_online_cpu(cpu)
99 if (likely(per_cpu(hwb_tracer, cpu)))
100 ds_suspend_bts(per_cpu(hwb_tracer, cpu));
101 trace_hw_branches_suspended = 1;
102 put_online_cpus();
103}
104
105static int __cpuinit bts_hotcpu_handler(struct notifier_block *nfb,
106 unsigned long action, void *hcpu)
107{
108 int cpu = (long)hcpu;
109
110 switch (action) {
111 case CPU_ONLINE:
112 case CPU_DOWN_FAILED:
113 /* The notification is sent with interrupts enabled. */
114 if (trace_hw_branches_enabled) {
115 bts_trace_init_cpu(cpu);
116
117 if (trace_hw_branches_suspended &&
118 likely(per_cpu(hwb_tracer, cpu)))
119 ds_suspend_bts(per_cpu(hwb_tracer, cpu));
120 }
121 break;
122
123 case CPU_DOWN_PREPARE:
124 /* The notification is sent with interrupts enabled. */
125 if (likely(per_cpu(hwb_tracer, cpu))) {
126 ds_release_bts(per_cpu(hwb_tracer, cpu));
127 per_cpu(hwb_tracer, cpu) = NULL;
128 }
129 }
130
131 return NOTIFY_DONE;
132}
133
134static struct notifier_block bts_hotcpu_notifier __cpuinitdata = {
135 .notifier_call = bts_hotcpu_handler
136};
137
138static void bts_trace_print_header(struct seq_file *m)
139{
140 seq_puts(m, "# CPU# TO <- FROM\n");
141}
142
143static enum print_line_t bts_trace_print_line(struct trace_iterator *iter)
144{
145 unsigned long symflags = TRACE_ITER_SYM_OFFSET;
146 struct trace_entry *entry = iter->ent;
147 struct trace_seq *seq = &iter->seq;
148 struct hw_branch_entry *it;
149
150 trace_assign_type(it, entry);
151
152 if (entry->type == TRACE_HW_BRANCHES) {
153 if (trace_seq_printf(seq, "%4d ", iter->cpu) &&
154 seq_print_ip_sym(seq, it->to, symflags) &&
155 trace_seq_printf(seq, "\t <- ") &&
156 seq_print_ip_sym(seq, it->from, symflags) &&
157 trace_seq_printf(seq, "\n"))
158 return TRACE_TYPE_HANDLED;
159 return TRACE_TYPE_PARTIAL_LINE;
160 }
161 return TRACE_TYPE_UNHANDLED;
162}
163
164void trace_hw_branch(u64 from, u64 to)
165{
166 struct ftrace_event_call *call = &event_hw_branch;
167 struct trace_array *tr = hw_branch_trace;
168 struct ring_buffer_event *event;
169 struct ring_buffer *buf;
170 struct hw_branch_entry *entry;
171 unsigned long irq1;
172 int cpu;
173
174 if (unlikely(!tr))
175 return;
176
177 if (unlikely(!trace_hw_branches_enabled))
178 return;
179
180 local_irq_save(irq1);
181 cpu = raw_smp_processor_id();
182 if (atomic_inc_return(&tr->data[cpu]->disabled) != 1)
183 goto out;
184
185 buf = tr->buffer;
186 event = trace_buffer_lock_reserve(buf, TRACE_HW_BRANCHES,
187 sizeof(*entry), 0, 0);
188 if (!event)
189 goto out;
190 entry = ring_buffer_event_data(event);
191 tracing_generic_entry_update(&entry->ent, 0, from);
192 entry->ent.type = TRACE_HW_BRANCHES;
193 entry->from = from;
194 entry->to = to;
195 if (!filter_check_discard(call, entry, buf, event))
196 trace_buffer_unlock_commit(buf, event, 0, 0);
197
198 out:
199 atomic_dec(&tr->data[cpu]->disabled);
200 local_irq_restore(irq1);
201}
202
203static void trace_bts_at(const struct bts_trace *trace, void *at)
204{
205 struct bts_struct bts;
206 int err = 0;
207
208 WARN_ON_ONCE(!trace->read);
209 if (!trace->read)
210 return;
211
212 err = trace->read(this_tracer, at, &bts);
213 if (err < 0)
214 return;
215
216 switch (bts.qualifier) {
217 case BTS_BRANCH:
218 trace_hw_branch(bts.variant.lbr.from, bts.variant.lbr.to);
219 break;
220 }
221}
222
223/*
224 * Collect the trace on the current cpu and write it into the ftrace buffer.
225 *
226 * pre: tracing must be suspended on the current cpu
227 */
228static void trace_bts_cpu(void *arg)
229{
230 struct trace_array *tr = (struct trace_array *)arg;
231 const struct bts_trace *trace;
232 unsigned char *at;
233
234 if (unlikely(!tr))
235 return;
236
237 if (unlikely(atomic_read(&tr->data[raw_smp_processor_id()]->disabled)))
238 return;
239
240 if (unlikely(!this_tracer))
241 return;
242
243 trace = ds_read_bts(this_tracer);
244 if (!trace)
245 return;
246
247 for (at = trace->ds.top; (void *)at < trace->ds.end;
248 at += trace->ds.size)
249 trace_bts_at(trace, at);
250
251 for (at = trace->ds.begin; (void *)at < trace->ds.top;
252 at += trace->ds.size)
253 trace_bts_at(trace, at);
254}
255
256static void trace_bts_prepare(struct trace_iterator *iter)
257{
258 int cpu;
259
260 get_online_cpus();
261 for_each_online_cpu(cpu)
262 if (likely(per_cpu(hwb_tracer, cpu)))
263 ds_suspend_bts(per_cpu(hwb_tracer, cpu));
264 /*
265 * We need to collect the trace on the respective cpu since ftrace
266 * implicitly adds the record for the current cpu.
267 * Once that is more flexible, we could collect the data from any cpu.
268 */
269 on_each_cpu(trace_bts_cpu, iter->tr, 1);
270
271 for_each_online_cpu(cpu)
272 if (likely(per_cpu(hwb_tracer, cpu)))
273 ds_resume_bts(per_cpu(hwb_tracer, cpu));
274 put_online_cpus();
275}
276
277static void trace_bts_close(struct trace_iterator *iter)
278{
279 tracing_reset_online_cpus(iter->tr);
280}
281
282void trace_hw_branch_oops(void)
283{
284 if (this_tracer) {
285 ds_suspend_bts_noirq(this_tracer);
286 trace_bts_cpu(hw_branch_trace);
287 ds_resume_bts_noirq(this_tracer);
288 }
289}
290
291struct tracer bts_tracer __read_mostly =
292{
293 .name = "hw-branch-tracer",
294 .init = bts_trace_init,
295 .reset = bts_trace_reset,
296 .print_header = bts_trace_print_header,
297 .print_line = bts_trace_print_line,
298 .start = bts_trace_start,
299 .stop = bts_trace_stop,
300 .open = trace_bts_prepare,
301 .close = trace_bts_close,
302#ifdef CONFIG_FTRACE_SELFTEST
303 .selftest = trace_selftest_startup_hw_branches,
304#endif /* CONFIG_FTRACE_SELFTEST */
305};
306
307__init static int init_bts_trace(void)
308{
309 register_hotcpu_notifier(&bts_hotcpu_notifier);
310 return register_tracer(&bts_tracer);
311}
312device_initcall(init_bts_trace);
diff --git a/kernel/trace/trace_irqsoff.c b/kernel/trace/trace_irqsoff.c
index 2974bc7538c7..6fd486e0cef4 100644
--- a/kernel/trace/trace_irqsoff.c
+++ b/kernel/trace/trace_irqsoff.c
@@ -34,6 +34,9 @@ static int trace_type __read_mostly;
34 34
35static int save_lat_flag; 35static int save_lat_flag;
36 36
37static void stop_irqsoff_tracer(struct trace_array *tr, int graph);
38static int start_irqsoff_tracer(struct trace_array *tr, int graph);
39
37#ifdef CONFIG_PREEMPT_TRACER 40#ifdef CONFIG_PREEMPT_TRACER
38static inline int 41static inline int
39preempt_trace(void) 42preempt_trace(void)
@@ -55,6 +58,23 @@ irq_trace(void)
55# define irq_trace() (0) 58# define irq_trace() (0)
56#endif 59#endif
57 60
61#define TRACE_DISPLAY_GRAPH 1
62
63static struct tracer_opt trace_opts[] = {
64#ifdef CONFIG_FUNCTION_GRAPH_TRACER
65 /* display latency trace as call graph */
66 { TRACER_OPT(display-graph, TRACE_DISPLAY_GRAPH) },
67#endif
68 { } /* Empty entry */
69};
70
71static struct tracer_flags tracer_flags = {
72 .val = 0,
73 .opts = trace_opts,
74};
75
76#define is_graph() (tracer_flags.val & TRACE_DISPLAY_GRAPH)
77
58/* 78/*
59 * Sequence count - we record it when starting a measurement and 79 * Sequence count - we record it when starting a measurement and
60 * skip the latency if the sequence has changed - some other section 80 * skip the latency if the sequence has changed - some other section
@@ -108,6 +128,202 @@ static struct ftrace_ops trace_ops __read_mostly =
108}; 128};
109#endif /* CONFIG_FUNCTION_TRACER */ 129#endif /* CONFIG_FUNCTION_TRACER */
110 130
131#ifdef CONFIG_FUNCTION_GRAPH_TRACER
132static int irqsoff_set_flag(u32 old_flags, u32 bit, int set)
133{
134 int cpu;
135
136 if (!(bit & TRACE_DISPLAY_GRAPH))
137 return -EINVAL;
138
139 if (!(is_graph() ^ set))
140 return 0;
141
142 stop_irqsoff_tracer(irqsoff_trace, !set);
143
144 for_each_possible_cpu(cpu)
145 per_cpu(tracing_cpu, cpu) = 0;
146
147 tracing_max_latency = 0;
148 tracing_reset_online_cpus(irqsoff_trace);
149
150 return start_irqsoff_tracer(irqsoff_trace, set);
151}
152
153static int irqsoff_graph_entry(struct ftrace_graph_ent *trace)
154{
155 struct trace_array *tr = irqsoff_trace;
156 struct trace_array_cpu *data;
157 unsigned long flags;
158 long disabled;
159 int ret;
160 int cpu;
161 int pc;
162
163 cpu = raw_smp_processor_id();
164 if (likely(!per_cpu(tracing_cpu, cpu)))
165 return 0;
166
167 local_save_flags(flags);
168 /* slight chance to get a false positive on tracing_cpu */
169 if (!irqs_disabled_flags(flags))
170 return 0;
171
172 data = tr->data[cpu];
173 disabled = atomic_inc_return(&data->disabled);
174
175 if (likely(disabled == 1)) {
176 pc = preempt_count();
177 ret = __trace_graph_entry(tr, trace, flags, pc);
178 } else
179 ret = 0;
180
181 atomic_dec(&data->disabled);
182 return ret;
183}
184
185static void irqsoff_graph_return(struct ftrace_graph_ret *trace)
186{
187 struct trace_array *tr = irqsoff_trace;
188 struct trace_array_cpu *data;
189 unsigned long flags;
190 long disabled;
191 int cpu;
192 int pc;
193
194 cpu = raw_smp_processor_id();
195 if (likely(!per_cpu(tracing_cpu, cpu)))
196 return;
197
198 local_save_flags(flags);
199 /* slight chance to get a false positive on tracing_cpu */
200 if (!irqs_disabled_flags(flags))
201 return;
202
203 data = tr->data[cpu];
204 disabled = atomic_inc_return(&data->disabled);
205
206 if (likely(disabled == 1)) {
207 pc = preempt_count();
208 __trace_graph_return(tr, trace, flags, pc);
209 }
210
211 atomic_dec(&data->disabled);
212}
213
214static void irqsoff_trace_open(struct trace_iterator *iter)
215{
216 if (is_graph())
217 graph_trace_open(iter);
218
219}
220
221static void irqsoff_trace_close(struct trace_iterator *iter)
222{
223 if (iter->private)
224 graph_trace_close(iter);
225}
226
227#define GRAPH_TRACER_FLAGS (TRACE_GRAPH_PRINT_CPU | \
228 TRACE_GRAPH_PRINT_PROC)
229
230static enum print_line_t irqsoff_print_line(struct trace_iterator *iter)
231{
232 u32 flags = GRAPH_TRACER_FLAGS;
233
234 if (trace_flags & TRACE_ITER_LATENCY_FMT)
235 flags |= TRACE_GRAPH_PRINT_DURATION;
236 else
237 flags |= TRACE_GRAPH_PRINT_ABS_TIME;
238
239 /*
240 * In graph mode call the graph tracer output function,
241 * otherwise go with the TRACE_FN event handler
242 */
243 if (is_graph())
244 return print_graph_function_flags(iter, flags);
245
246 return TRACE_TYPE_UNHANDLED;
247}
248
249static void irqsoff_print_header(struct seq_file *s)
250{
251 if (is_graph()) {
252 struct trace_iterator *iter = s->private;
253 u32 flags = GRAPH_TRACER_FLAGS;
254
255 if (trace_flags & TRACE_ITER_LATENCY_FMT) {
256 /* print nothing if the buffers are empty */
257 if (trace_empty(iter))
258 return;
259
260 print_trace_header(s, iter);
261 flags |= TRACE_GRAPH_PRINT_DURATION;
262 } else
263 flags |= TRACE_GRAPH_PRINT_ABS_TIME;
264
265 print_graph_headers_flags(s, flags);
266 } else
267 trace_default_header(s);
268}
269
270static void
271trace_graph_function(struct trace_array *tr,
272 unsigned long ip, unsigned long flags, int pc)
273{
274 u64 time = trace_clock_local();
275 struct ftrace_graph_ent ent = {
276 .func = ip,
277 .depth = 0,
278 };
279 struct ftrace_graph_ret ret = {
280 .func = ip,
281 .depth = 0,
282 .calltime = time,
283 .rettime = time,
284 };
285
286 __trace_graph_entry(tr, &ent, flags, pc);
287 __trace_graph_return(tr, &ret, flags, pc);
288}
289
290static void
291__trace_function(struct trace_array *tr,
292 unsigned long ip, unsigned long parent_ip,
293 unsigned long flags, int pc)
294{
295 if (!is_graph())
296 trace_function(tr, ip, parent_ip, flags, pc);
297 else {
298 trace_graph_function(tr, parent_ip, flags, pc);
299 trace_graph_function(tr, ip, flags, pc);
300 }
301}
302
303#else
304#define __trace_function trace_function
305
306static int irqsoff_set_flag(u32 old_flags, u32 bit, int set)
307{
308 return -EINVAL;
309}
310
311static int irqsoff_graph_entry(struct ftrace_graph_ent *trace)
312{
313 return -1;
314}
315
316static enum print_line_t irqsoff_print_line(struct trace_iterator *iter)
317{
318 return TRACE_TYPE_UNHANDLED;
319}
320
321static void irqsoff_graph_return(struct ftrace_graph_ret *trace) { }
322static void irqsoff_print_header(struct seq_file *s) { }
323static void irqsoff_trace_open(struct trace_iterator *iter) { }
324static void irqsoff_trace_close(struct trace_iterator *iter) { }
325#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
326
111/* 327/*
112 * Should this new latency be reported/recorded? 328 * Should this new latency be reported/recorded?
113 */ 329 */
@@ -150,7 +366,7 @@ check_critical_timing(struct trace_array *tr,
150 if (!report_latency(delta)) 366 if (!report_latency(delta))
151 goto out_unlock; 367 goto out_unlock;
152 368
153 trace_function(tr, CALLER_ADDR0, parent_ip, flags, pc); 369 __trace_function(tr, CALLER_ADDR0, parent_ip, flags, pc);
154 /* Skip 5 functions to get to the irq/preempt enable function */ 370 /* Skip 5 functions to get to the irq/preempt enable function */
155 __trace_stack(tr, flags, 5, pc); 371 __trace_stack(tr, flags, 5, pc);
156 372
@@ -172,7 +388,7 @@ out_unlock:
172out: 388out:
173 data->critical_sequence = max_sequence; 389 data->critical_sequence = max_sequence;
174 data->preempt_timestamp = ftrace_now(cpu); 390 data->preempt_timestamp = ftrace_now(cpu);
175 trace_function(tr, CALLER_ADDR0, parent_ip, flags, pc); 391 __trace_function(tr, CALLER_ADDR0, parent_ip, flags, pc);
176} 392}
177 393
178static inline void 394static inline void
@@ -204,7 +420,7 @@ start_critical_timing(unsigned long ip, unsigned long parent_ip)
204 420
205 local_save_flags(flags); 421 local_save_flags(flags);
206 422
207 trace_function(tr, ip, parent_ip, flags, preempt_count()); 423 __trace_function(tr, ip, parent_ip, flags, preempt_count());
208 424
209 per_cpu(tracing_cpu, cpu) = 1; 425 per_cpu(tracing_cpu, cpu) = 1;
210 426
@@ -238,7 +454,7 @@ stop_critical_timing(unsigned long ip, unsigned long parent_ip)
238 atomic_inc(&data->disabled); 454 atomic_inc(&data->disabled);
239 455
240 local_save_flags(flags); 456 local_save_flags(flags);
241 trace_function(tr, ip, parent_ip, flags, preempt_count()); 457 __trace_function(tr, ip, parent_ip, flags, preempt_count());
242 check_critical_timing(tr, data, parent_ip ? : ip, cpu); 458 check_critical_timing(tr, data, parent_ip ? : ip, cpu);
243 data->critical_start = 0; 459 data->critical_start = 0;
244 atomic_dec(&data->disabled); 460 atomic_dec(&data->disabled);
@@ -347,19 +563,32 @@ void trace_preempt_off(unsigned long a0, unsigned long a1)
347} 563}
348#endif /* CONFIG_PREEMPT_TRACER */ 564#endif /* CONFIG_PREEMPT_TRACER */
349 565
350static void start_irqsoff_tracer(struct trace_array *tr) 566static int start_irqsoff_tracer(struct trace_array *tr, int graph)
351{ 567{
352 register_ftrace_function(&trace_ops); 568 int ret = 0;
353 if (tracing_is_enabled()) 569
570 if (!graph)
571 ret = register_ftrace_function(&trace_ops);
572 else
573 ret = register_ftrace_graph(&irqsoff_graph_return,
574 &irqsoff_graph_entry);
575
576 if (!ret && tracing_is_enabled())
354 tracer_enabled = 1; 577 tracer_enabled = 1;
355 else 578 else
356 tracer_enabled = 0; 579 tracer_enabled = 0;
580
581 return ret;
357} 582}
358 583
359static void stop_irqsoff_tracer(struct trace_array *tr) 584static void stop_irqsoff_tracer(struct trace_array *tr, int graph)
360{ 585{
361 tracer_enabled = 0; 586 tracer_enabled = 0;
362 unregister_ftrace_function(&trace_ops); 587
588 if (!graph)
589 unregister_ftrace_function(&trace_ops);
590 else
591 unregister_ftrace_graph();
363} 592}
364 593
365static void __irqsoff_tracer_init(struct trace_array *tr) 594static void __irqsoff_tracer_init(struct trace_array *tr)
@@ -372,12 +601,14 @@ static void __irqsoff_tracer_init(struct trace_array *tr)
372 /* make sure that the tracer is visible */ 601 /* make sure that the tracer is visible */
373 smp_wmb(); 602 smp_wmb();
374 tracing_reset_online_cpus(tr); 603 tracing_reset_online_cpus(tr);
375 start_irqsoff_tracer(tr); 604
605 if (start_irqsoff_tracer(tr, is_graph()))
606 printk(KERN_ERR "failed to start irqsoff tracer\n");
376} 607}
377 608
378static void irqsoff_tracer_reset(struct trace_array *tr) 609static void irqsoff_tracer_reset(struct trace_array *tr)
379{ 610{
380 stop_irqsoff_tracer(tr); 611 stop_irqsoff_tracer(tr, is_graph());
381 612
382 if (!save_lat_flag) 613 if (!save_lat_flag)
383 trace_flags &= ~TRACE_ITER_LATENCY_FMT; 614 trace_flags &= ~TRACE_ITER_LATENCY_FMT;
@@ -409,9 +640,15 @@ static struct tracer irqsoff_tracer __read_mostly =
409 .start = irqsoff_tracer_start, 640 .start = irqsoff_tracer_start,
410 .stop = irqsoff_tracer_stop, 641 .stop = irqsoff_tracer_stop,
411 .print_max = 1, 642 .print_max = 1,
643 .print_header = irqsoff_print_header,
644 .print_line = irqsoff_print_line,
645 .flags = &tracer_flags,
646 .set_flag = irqsoff_set_flag,
412#ifdef CONFIG_FTRACE_SELFTEST 647#ifdef CONFIG_FTRACE_SELFTEST
413 .selftest = trace_selftest_startup_irqsoff, 648 .selftest = trace_selftest_startup_irqsoff,
414#endif 649#endif
650 .open = irqsoff_trace_open,
651 .close = irqsoff_trace_close,
415}; 652};
416# define register_irqsoff(trace) register_tracer(&trace) 653# define register_irqsoff(trace) register_tracer(&trace)
417#else 654#else
@@ -435,9 +672,15 @@ static struct tracer preemptoff_tracer __read_mostly =
435 .start = irqsoff_tracer_start, 672 .start = irqsoff_tracer_start,
436 .stop = irqsoff_tracer_stop, 673 .stop = irqsoff_tracer_stop,
437 .print_max = 1, 674 .print_max = 1,
675 .print_header = irqsoff_print_header,
676 .print_line = irqsoff_print_line,
677 .flags = &tracer_flags,
678 .set_flag = irqsoff_set_flag,
438#ifdef CONFIG_FTRACE_SELFTEST 679#ifdef CONFIG_FTRACE_SELFTEST
439 .selftest = trace_selftest_startup_preemptoff, 680 .selftest = trace_selftest_startup_preemptoff,
440#endif 681#endif
682 .open = irqsoff_trace_open,
683 .close = irqsoff_trace_close,
441}; 684};
442# define register_preemptoff(trace) register_tracer(&trace) 685# define register_preemptoff(trace) register_tracer(&trace)
443#else 686#else
@@ -463,9 +706,15 @@ static struct tracer preemptirqsoff_tracer __read_mostly =
463 .start = irqsoff_tracer_start, 706 .start = irqsoff_tracer_start,
464 .stop = irqsoff_tracer_stop, 707 .stop = irqsoff_tracer_stop,
465 .print_max = 1, 708 .print_max = 1,
709 .print_header = irqsoff_print_header,
710 .print_line = irqsoff_print_line,
711 .flags = &tracer_flags,
712 .set_flag = irqsoff_set_flag,
466#ifdef CONFIG_FTRACE_SELFTEST 713#ifdef CONFIG_FTRACE_SELFTEST
467 .selftest = trace_selftest_startup_preemptirqsoff, 714 .selftest = trace_selftest_startup_preemptirqsoff,
468#endif 715#endif
716 .open = irqsoff_trace_open,
717 .close = irqsoff_trace_close,
469}; 718};
470 719
471# define register_preemptirqsoff(trace) register_tracer(&trace) 720# define register_preemptirqsoff(trace) register_tracer(&trace)
diff --git a/kernel/trace/trace_kprobe.c b/kernel/trace/trace_kprobe.c
index 1251e367bae9..a7514326052b 100644
--- a/kernel/trace/trace_kprobe.c
+++ b/kernel/trace/trace_kprobe.c
@@ -29,6 +29,8 @@
29#include <linux/ctype.h> 29#include <linux/ctype.h>
30#include <linux/ptrace.h> 30#include <linux/ptrace.h>
31#include <linux/perf_event.h> 31#include <linux/perf_event.h>
32#include <linux/stringify.h>
33#include <asm/bitsperlong.h>
32 34
33#include "trace.h" 35#include "trace.h"
34#include "trace_output.h" 36#include "trace_output.h"
@@ -40,7 +42,6 @@
40 42
41/* Reserved field names */ 43/* Reserved field names */
42#define FIELD_STRING_IP "__probe_ip" 44#define FIELD_STRING_IP "__probe_ip"
43#define FIELD_STRING_NARGS "__probe_nargs"
44#define FIELD_STRING_RETIP "__probe_ret_ip" 45#define FIELD_STRING_RETIP "__probe_ret_ip"
45#define FIELD_STRING_FUNC "__probe_func" 46#define FIELD_STRING_FUNC "__probe_func"
46 47
@@ -52,56 +53,102 @@ const char *reserved_field_names[] = {
52 "common_tgid", 53 "common_tgid",
53 "common_lock_depth", 54 "common_lock_depth",
54 FIELD_STRING_IP, 55 FIELD_STRING_IP,
55 FIELD_STRING_NARGS,
56 FIELD_STRING_RETIP, 56 FIELD_STRING_RETIP,
57 FIELD_STRING_FUNC, 57 FIELD_STRING_FUNC,
58}; 58};
59 59
60struct fetch_func { 60/* Printing function type */
61 unsigned long (*func)(struct pt_regs *, void *); 61typedef int (*print_type_func_t)(struct trace_seq *, const char *, void *);
62#define PRINT_TYPE_FUNC_NAME(type) print_type_##type
63#define PRINT_TYPE_FMT_NAME(type) print_type_format_##type
64
65/* Printing in basic type function template */
66#define DEFINE_BASIC_PRINT_TYPE_FUNC(type, fmt, cast) \
67static __kprobes int PRINT_TYPE_FUNC_NAME(type)(struct trace_seq *s, \
68 const char *name, void *data)\
69{ \
70 return trace_seq_printf(s, " %s=" fmt, name, (cast)*(type *)data);\
71} \
72static const char PRINT_TYPE_FMT_NAME(type)[] = fmt;
73
74DEFINE_BASIC_PRINT_TYPE_FUNC(u8, "%x", unsigned int)
75DEFINE_BASIC_PRINT_TYPE_FUNC(u16, "%x", unsigned int)
76DEFINE_BASIC_PRINT_TYPE_FUNC(u32, "%lx", unsigned long)
77DEFINE_BASIC_PRINT_TYPE_FUNC(u64, "%llx", unsigned long long)
78DEFINE_BASIC_PRINT_TYPE_FUNC(s8, "%d", int)
79DEFINE_BASIC_PRINT_TYPE_FUNC(s16, "%d", int)
80DEFINE_BASIC_PRINT_TYPE_FUNC(s32, "%ld", long)
81DEFINE_BASIC_PRINT_TYPE_FUNC(s64, "%lld", long long)
82
83/* Data fetch function type */
84typedef void (*fetch_func_t)(struct pt_regs *, void *, void *);
85
86struct fetch_param {
87 fetch_func_t fn;
62 void *data; 88 void *data;
63}; 89};
64 90
65static __kprobes unsigned long call_fetch(struct fetch_func *f, 91static __kprobes void call_fetch(struct fetch_param *fprm,
66 struct pt_regs *regs) 92 struct pt_regs *regs, void *dest)
67{ 93{
68 return f->func(regs, f->data); 94 return fprm->fn(regs, fprm->data, dest);
69} 95}
70 96
71/* fetch handlers */ 97#define FETCH_FUNC_NAME(kind, type) fetch_##kind##_##type
72static __kprobes unsigned long fetch_register(struct pt_regs *regs, 98/*
73 void *offset) 99 * Define macro for basic types - we don't need to define s* types, because
74{ 100 * we have to care only about bitwidth at recording time.
75 return regs_get_register(regs, (unsigned int)((unsigned long)offset)); 101 */
102#define DEFINE_BASIC_FETCH_FUNCS(kind) \
103DEFINE_FETCH_##kind(u8) \
104DEFINE_FETCH_##kind(u16) \
105DEFINE_FETCH_##kind(u32) \
106DEFINE_FETCH_##kind(u64)
107
108#define CHECK_BASIC_FETCH_FUNCS(kind, fn) \
109 ((FETCH_FUNC_NAME(kind, u8) == fn) || \
110 (FETCH_FUNC_NAME(kind, u16) == fn) || \
111 (FETCH_FUNC_NAME(kind, u32) == fn) || \
112 (FETCH_FUNC_NAME(kind, u64) == fn))
113
114/* Data fetch function templates */
115#define DEFINE_FETCH_reg(type) \
116static __kprobes void FETCH_FUNC_NAME(reg, type)(struct pt_regs *regs, \
117 void *offset, void *dest) \
118{ \
119 *(type *)dest = (type)regs_get_register(regs, \
120 (unsigned int)((unsigned long)offset)); \
76} 121}
77 122DEFINE_BASIC_FETCH_FUNCS(reg)
78static __kprobes unsigned long fetch_stack(struct pt_regs *regs, 123
79 void *num) 124#define DEFINE_FETCH_stack(type) \
80{ 125static __kprobes void FETCH_FUNC_NAME(stack, type)(struct pt_regs *regs,\
81 return regs_get_kernel_stack_nth(regs, 126 void *offset, void *dest) \
82 (unsigned int)((unsigned long)num)); 127{ \
128 *(type *)dest = (type)regs_get_kernel_stack_nth(regs, \
129 (unsigned int)((unsigned long)offset)); \
83} 130}
131DEFINE_BASIC_FETCH_FUNCS(stack)
84 132
85static __kprobes unsigned long fetch_memory(struct pt_regs *regs, void *addr) 133#define DEFINE_FETCH_retval(type) \
86{ 134static __kprobes void FETCH_FUNC_NAME(retval, type)(struct pt_regs *regs,\
87 unsigned long retval; 135 void *dummy, void *dest) \
88 136{ \
89 if (probe_kernel_address(addr, retval)) 137 *(type *)dest = (type)regs_return_value(regs); \
90 return 0;
91 return retval;
92} 138}
93 139DEFINE_BASIC_FETCH_FUNCS(retval)
94static __kprobes unsigned long fetch_retvalue(struct pt_regs *regs, 140
95 void *dummy) 141#define DEFINE_FETCH_memory(type) \
96{ 142static __kprobes void FETCH_FUNC_NAME(memory, type)(struct pt_regs *regs,\
97 return regs_return_value(regs); 143 void *addr, void *dest) \
98} 144{ \
99 145 type retval; \
100static __kprobes unsigned long fetch_stack_address(struct pt_regs *regs, 146 if (probe_kernel_address(addr, retval)) \
101 void *dummy) 147 *(type *)dest = 0; \
102{ 148 else \
103 return kernel_stack_pointer(regs); 149 *(type *)dest = retval; \
104} 150}
151DEFINE_BASIC_FETCH_FUNCS(memory)
105 152
106/* Memory fetching by symbol */ 153/* Memory fetching by symbol */
107struct symbol_cache { 154struct symbol_cache {
@@ -145,51 +192,126 @@ static struct symbol_cache *alloc_symbol_cache(const char *sym, long offset)
145 return sc; 192 return sc;
146} 193}
147 194
148static __kprobes unsigned long fetch_symbol(struct pt_regs *regs, void *data) 195#define DEFINE_FETCH_symbol(type) \
149{ 196static __kprobes void FETCH_FUNC_NAME(symbol, type)(struct pt_regs *regs,\
150 struct symbol_cache *sc = data; 197 void *data, void *dest) \
151 198{ \
152 if (sc->addr) 199 struct symbol_cache *sc = data; \
153 return fetch_memory(regs, (void *)sc->addr); 200 if (sc->addr) \
154 else 201 fetch_memory_##type(regs, (void *)sc->addr, dest); \
155 return 0; 202 else \
203 *(type *)dest = 0; \
156} 204}
205DEFINE_BASIC_FETCH_FUNCS(symbol)
157 206
158/* Special indirect memory access interface */ 207/* Dereference memory access function */
159struct indirect_fetch_data { 208struct deref_fetch_param {
160 struct fetch_func orig; 209 struct fetch_param orig;
161 long offset; 210 long offset;
162}; 211};
163 212
164static __kprobes unsigned long fetch_indirect(struct pt_regs *regs, void *data) 213#define DEFINE_FETCH_deref(type) \
165{ 214static __kprobes void FETCH_FUNC_NAME(deref, type)(struct pt_regs *regs,\
166 struct indirect_fetch_data *ind = data; 215 void *data, void *dest) \
167 unsigned long addr; 216{ \
168 217 struct deref_fetch_param *dprm = data; \
169 addr = call_fetch(&ind->orig, regs); 218 unsigned long addr; \
170 if (addr) { 219 call_fetch(&dprm->orig, regs, &addr); \
171 addr += ind->offset; 220 if (addr) { \
172 return fetch_memory(regs, (void *)addr); 221 addr += dprm->offset; \
173 } else 222 fetch_memory_##type(regs, (void *)addr, dest); \
174 return 0; 223 } else \
224 *(type *)dest = 0; \
175} 225}
226DEFINE_BASIC_FETCH_FUNCS(deref)
176 227
177static __kprobes void free_indirect_fetch_data(struct indirect_fetch_data *data) 228static __kprobes void free_deref_fetch_param(struct deref_fetch_param *data)
178{ 229{
179 if (data->orig.func == fetch_indirect) 230 if (CHECK_BASIC_FETCH_FUNCS(deref, data->orig.fn))
180 free_indirect_fetch_data(data->orig.data); 231 free_deref_fetch_param(data->orig.data);
181 else if (data->orig.func == fetch_symbol) 232 else if (CHECK_BASIC_FETCH_FUNCS(symbol, data->orig.fn))
182 free_symbol_cache(data->orig.data); 233 free_symbol_cache(data->orig.data);
183 kfree(data); 234 kfree(data);
184} 235}
185 236
237/* Default (unsigned long) fetch type */
238#define __DEFAULT_FETCH_TYPE(t) u##t
239#define _DEFAULT_FETCH_TYPE(t) __DEFAULT_FETCH_TYPE(t)
240#define DEFAULT_FETCH_TYPE _DEFAULT_FETCH_TYPE(BITS_PER_LONG)
241#define DEFAULT_FETCH_TYPE_STR __stringify(DEFAULT_FETCH_TYPE)
242
243#define ASSIGN_FETCH_FUNC(kind, type) \
244 .kind = FETCH_FUNC_NAME(kind, type)
245
246#define ASSIGN_FETCH_TYPE(ptype, ftype, sign) \
247 {.name = #ptype, \
248 .size = sizeof(ftype), \
249 .is_signed = sign, \
250 .print = PRINT_TYPE_FUNC_NAME(ptype), \
251 .fmt = PRINT_TYPE_FMT_NAME(ptype), \
252ASSIGN_FETCH_FUNC(reg, ftype), \
253ASSIGN_FETCH_FUNC(stack, ftype), \
254ASSIGN_FETCH_FUNC(retval, ftype), \
255ASSIGN_FETCH_FUNC(memory, ftype), \
256ASSIGN_FETCH_FUNC(symbol, ftype), \
257ASSIGN_FETCH_FUNC(deref, ftype), \
258 }
259
260/* Fetch type information table */
261static const struct fetch_type {
262 const char *name; /* Name of type */
263 size_t size; /* Byte size of type */
264 int is_signed; /* Signed flag */
265 print_type_func_t print; /* Print functions */
266 const char *fmt; /* Fromat string */
267 /* Fetch functions */
268 fetch_func_t reg;
269 fetch_func_t stack;
270 fetch_func_t retval;
271 fetch_func_t memory;
272 fetch_func_t symbol;
273 fetch_func_t deref;
274} fetch_type_table[] = {
275 ASSIGN_FETCH_TYPE(u8, u8, 0),
276 ASSIGN_FETCH_TYPE(u16, u16, 0),
277 ASSIGN_FETCH_TYPE(u32, u32, 0),
278 ASSIGN_FETCH_TYPE(u64, u64, 0),
279 ASSIGN_FETCH_TYPE(s8, u8, 1),
280 ASSIGN_FETCH_TYPE(s16, u16, 1),
281 ASSIGN_FETCH_TYPE(s32, u32, 1),
282 ASSIGN_FETCH_TYPE(s64, u64, 1),
283};
284
285static const struct fetch_type *find_fetch_type(const char *type)
286{
287 int i;
288
289 if (!type)
290 type = DEFAULT_FETCH_TYPE_STR;
291
292 for (i = 0; i < ARRAY_SIZE(fetch_type_table); i++)
293 if (strcmp(type, fetch_type_table[i].name) == 0)
294 return &fetch_type_table[i];
295 return NULL;
296}
297
298/* Special function : only accept unsigned long */
299static __kprobes void fetch_stack_address(struct pt_regs *regs,
300 void *dummy, void *dest)
301{
302 *(unsigned long *)dest = kernel_stack_pointer(regs);
303}
304
186/** 305/**
187 * Kprobe event core functions 306 * Kprobe event core functions
188 */ 307 */
189 308
190struct probe_arg { 309struct probe_arg {
191 struct fetch_func fetch; 310 struct fetch_param fetch;
192 const char *name; 311 unsigned int offset; /* Offset from argument entry */
312 const char *name; /* Name of this argument */
313 const char *comm; /* Command of this argument */
314 const struct fetch_type *type; /* Type of this argument */
193}; 315};
194 316
195/* Flags for trace_probe */ 317/* Flags for trace_probe */
@@ -204,6 +326,7 @@ struct trace_probe {
204 const char *symbol; /* symbol name */ 326 const char *symbol; /* symbol name */
205 struct ftrace_event_call call; 327 struct ftrace_event_call call;
206 struct trace_event event; 328 struct trace_event event;
329 ssize_t size; /* trace entry size */
207 unsigned int nr_args; 330 unsigned int nr_args;
208 struct probe_arg args[]; 331 struct probe_arg args[];
209}; 332};
@@ -212,6 +335,7 @@ struct trace_probe {
212 (offsetof(struct trace_probe, args) + \ 335 (offsetof(struct trace_probe, args) + \
213 (sizeof(struct probe_arg) * (n))) 336 (sizeof(struct probe_arg) * (n)))
214 337
338
215static __kprobes int probe_is_return(struct trace_probe *tp) 339static __kprobes int probe_is_return(struct trace_probe *tp)
216{ 340{
217 return tp->rp.handler != NULL; 341 return tp->rp.handler != NULL;
@@ -222,49 +346,6 @@ static __kprobes const char *probe_symbol(struct trace_probe *tp)
222 return tp->symbol ? tp->symbol : "unknown"; 346 return tp->symbol ? tp->symbol : "unknown";
223} 347}
224 348
225static int probe_arg_string(char *buf, size_t n, struct fetch_func *ff)
226{
227 int ret = -EINVAL;
228
229 if (ff->func == fetch_register) {
230 const char *name;
231 name = regs_query_register_name((unsigned int)((long)ff->data));
232 ret = snprintf(buf, n, "%%%s", name);
233 } else if (ff->func == fetch_stack)
234 ret = snprintf(buf, n, "$stack%lu", (unsigned long)ff->data);
235 else if (ff->func == fetch_memory)
236 ret = snprintf(buf, n, "@0x%p", ff->data);
237 else if (ff->func == fetch_symbol) {
238 struct symbol_cache *sc = ff->data;
239 if (sc->offset)
240 ret = snprintf(buf, n, "@%s%+ld", sc->symbol,
241 sc->offset);
242 else
243 ret = snprintf(buf, n, "@%s", sc->symbol);
244 } else if (ff->func == fetch_retvalue)
245 ret = snprintf(buf, n, "$retval");
246 else if (ff->func == fetch_stack_address)
247 ret = snprintf(buf, n, "$stack");
248 else if (ff->func == fetch_indirect) {
249 struct indirect_fetch_data *id = ff->data;
250 size_t l = 0;
251 ret = snprintf(buf, n, "%+ld(", id->offset);
252 if (ret >= n)
253 goto end;
254 l += ret;
255 ret = probe_arg_string(buf + l, n - l, &id->orig);
256 if (ret < 0)
257 goto end;
258 l += ret;
259 ret = snprintf(buf + l, n - l, ")");
260 ret += l;
261 }
262end:
263 if (ret >= n)
264 return -ENOSPC;
265 return ret;
266}
267
268static int register_probe_event(struct trace_probe *tp); 349static int register_probe_event(struct trace_probe *tp);
269static void unregister_probe_event(struct trace_probe *tp); 350static void unregister_probe_event(struct trace_probe *tp);
270 351
@@ -347,11 +428,12 @@ error:
347 428
348static void free_probe_arg(struct probe_arg *arg) 429static void free_probe_arg(struct probe_arg *arg)
349{ 430{
350 if (arg->fetch.func == fetch_symbol) 431 if (CHECK_BASIC_FETCH_FUNCS(deref, arg->fetch.fn))
432 free_deref_fetch_param(arg->fetch.data);
433 else if (CHECK_BASIC_FETCH_FUNCS(symbol, arg->fetch.fn))
351 free_symbol_cache(arg->fetch.data); 434 free_symbol_cache(arg->fetch.data);
352 else if (arg->fetch.func == fetch_indirect)
353 free_indirect_fetch_data(arg->fetch.data);
354 kfree(arg->name); 435 kfree(arg->name);
436 kfree(arg->comm);
355} 437}
356 438
357static void free_trace_probe(struct trace_probe *tp) 439static void free_trace_probe(struct trace_probe *tp)
@@ -457,28 +539,30 @@ static int split_symbol_offset(char *symbol, unsigned long *offset)
457#define PARAM_MAX_ARGS 16 539#define PARAM_MAX_ARGS 16
458#define PARAM_MAX_STACK (THREAD_SIZE / sizeof(unsigned long)) 540#define PARAM_MAX_STACK (THREAD_SIZE / sizeof(unsigned long))
459 541
460static int parse_probe_vars(char *arg, struct fetch_func *ff, int is_return) 542static int parse_probe_vars(char *arg, const struct fetch_type *t,
543 struct fetch_param *f, int is_return)
461{ 544{
462 int ret = 0; 545 int ret = 0;
463 unsigned long param; 546 unsigned long param;
464 547
465 if (strcmp(arg, "retval") == 0) { 548 if (strcmp(arg, "retval") == 0) {
466 if (is_return) { 549 if (is_return)
467 ff->func = fetch_retvalue; 550 f->fn = t->retval;
468 ff->data = NULL; 551 else
469 } else
470 ret = -EINVAL; 552 ret = -EINVAL;
471 } else if (strncmp(arg, "stack", 5) == 0) { 553 } else if (strncmp(arg, "stack", 5) == 0) {
472 if (arg[5] == '\0') { 554 if (arg[5] == '\0') {
473 ff->func = fetch_stack_address; 555 if (strcmp(t->name, DEFAULT_FETCH_TYPE_STR) == 0)
474 ff->data = NULL; 556 f->fn = fetch_stack_address;
557 else
558 ret = -EINVAL;
475 } else if (isdigit(arg[5])) { 559 } else if (isdigit(arg[5])) {
476 ret = strict_strtoul(arg + 5, 10, &param); 560 ret = strict_strtoul(arg + 5, 10, &param);
477 if (ret || param > PARAM_MAX_STACK) 561 if (ret || param > PARAM_MAX_STACK)
478 ret = -EINVAL; 562 ret = -EINVAL;
479 else { 563 else {
480 ff->func = fetch_stack; 564 f->fn = t->stack;
481 ff->data = (void *)param; 565 f->data = (void *)param;
482 } 566 }
483 } else 567 } else
484 ret = -EINVAL; 568 ret = -EINVAL;
@@ -488,7 +572,8 @@ static int parse_probe_vars(char *arg, struct fetch_func *ff, int is_return)
488} 572}
489 573
490/* Recursive argument parser */ 574/* Recursive argument parser */
491static int __parse_probe_arg(char *arg, struct fetch_func *ff, int is_return) 575static int __parse_probe_arg(char *arg, const struct fetch_type *t,
576 struct fetch_param *f, int is_return)
492{ 577{
493 int ret = 0; 578 int ret = 0;
494 unsigned long param; 579 unsigned long param;
@@ -497,13 +582,13 @@ static int __parse_probe_arg(char *arg, struct fetch_func *ff, int is_return)
497 582
498 switch (arg[0]) { 583 switch (arg[0]) {
499 case '$': 584 case '$':
500 ret = parse_probe_vars(arg + 1, ff, is_return); 585 ret = parse_probe_vars(arg + 1, t, f, is_return);
501 break; 586 break;
502 case '%': /* named register */ 587 case '%': /* named register */
503 ret = regs_query_register_offset(arg + 1); 588 ret = regs_query_register_offset(arg + 1);
504 if (ret >= 0) { 589 if (ret >= 0) {
505 ff->func = fetch_register; 590 f->fn = t->reg;
506 ff->data = (void *)(unsigned long)ret; 591 f->data = (void *)(unsigned long)ret;
507 ret = 0; 592 ret = 0;
508 } 593 }
509 break; 594 break;
@@ -512,26 +597,22 @@ static int __parse_probe_arg(char *arg, struct fetch_func *ff, int is_return)
512 ret = strict_strtoul(arg + 1, 0, &param); 597 ret = strict_strtoul(arg + 1, 0, &param);
513 if (ret) 598 if (ret)
514 break; 599 break;
515 ff->func = fetch_memory; 600 f->fn = t->memory;
516 ff->data = (void *)param; 601 f->data = (void *)param;
517 } else { 602 } else {
518 ret = split_symbol_offset(arg + 1, &offset); 603 ret = split_symbol_offset(arg + 1, &offset);
519 if (ret) 604 if (ret)
520 break; 605 break;
521 ff->data = alloc_symbol_cache(arg + 1, offset); 606 f->data = alloc_symbol_cache(arg + 1, offset);
522 if (ff->data) 607 if (f->data)
523 ff->func = fetch_symbol; 608 f->fn = t->symbol;
524 else
525 ret = -EINVAL;
526 } 609 }
527 break; 610 break;
528 case '+': /* indirect memory */ 611 case '+': /* deref memory */
529 case '-': 612 case '-':
530 tmp = strchr(arg, '('); 613 tmp = strchr(arg, '(');
531 if (!tmp) { 614 if (!tmp)
532 ret = -EINVAL;
533 break; 615 break;
534 }
535 *tmp = '\0'; 616 *tmp = '\0';
536 ret = strict_strtol(arg + 1, 0, &offset); 617 ret = strict_strtol(arg + 1, 0, &offset);
537 if (ret) 618 if (ret)
@@ -541,38 +622,58 @@ static int __parse_probe_arg(char *arg, struct fetch_func *ff, int is_return)
541 arg = tmp + 1; 622 arg = tmp + 1;
542 tmp = strrchr(arg, ')'); 623 tmp = strrchr(arg, ')');
543 if (tmp) { 624 if (tmp) {
544 struct indirect_fetch_data *id; 625 struct deref_fetch_param *dprm;
626 const struct fetch_type *t2 = find_fetch_type(NULL);
545 *tmp = '\0'; 627 *tmp = '\0';
546 id = kzalloc(sizeof(struct indirect_fetch_data), 628 dprm = kzalloc(sizeof(struct deref_fetch_param),
547 GFP_KERNEL); 629 GFP_KERNEL);
548 if (!id) 630 if (!dprm)
549 return -ENOMEM; 631 return -ENOMEM;
550 id->offset = offset; 632 dprm->offset = offset;
551 ret = __parse_probe_arg(arg, &id->orig, is_return); 633 ret = __parse_probe_arg(arg, t2, &dprm->orig,
634 is_return);
552 if (ret) 635 if (ret)
553 kfree(id); 636 kfree(dprm);
554 else { 637 else {
555 ff->func = fetch_indirect; 638 f->fn = t->deref;
556 ff->data = (void *)id; 639 f->data = (void *)dprm;
557 } 640 }
558 } else 641 }
559 ret = -EINVAL;
560 break; 642 break;
561 default:
562 /* TODO: support custom handler */
563 ret = -EINVAL;
564 } 643 }
644 if (!ret && !f->fn)
645 ret = -EINVAL;
565 return ret; 646 return ret;
566} 647}
567 648
568/* String length checking wrapper */ 649/* String length checking wrapper */
569static int parse_probe_arg(char *arg, struct fetch_func *ff, int is_return) 650static int parse_probe_arg(char *arg, struct trace_probe *tp,
651 struct probe_arg *parg, int is_return)
570{ 652{
653 const char *t;
654
571 if (strlen(arg) > MAX_ARGSTR_LEN) { 655 if (strlen(arg) > MAX_ARGSTR_LEN) {
572 pr_info("Argument is too long.: %s\n", arg); 656 pr_info("Argument is too long.: %s\n", arg);
573 return -ENOSPC; 657 return -ENOSPC;
574 } 658 }
575 return __parse_probe_arg(arg, ff, is_return); 659 parg->comm = kstrdup(arg, GFP_KERNEL);
660 if (!parg->comm) {
661 pr_info("Failed to allocate memory for command '%s'.\n", arg);
662 return -ENOMEM;
663 }
664 t = strchr(parg->comm, ':');
665 if (t) {
666 arg[t - parg->comm] = '\0';
667 t++;
668 }
669 parg->type = find_fetch_type(t);
670 if (!parg->type) {
671 pr_info("Unsupported type: %s\n", t);
672 return -EINVAL;
673 }
674 parg->offset = tp->size;
675 tp->size += parg->type->size;
676 return __parse_probe_arg(arg, parg->type, &parg->fetch, is_return);
576} 677}
577 678
578/* Return 1 if name is reserved or already used by another argument */ 679/* Return 1 if name is reserved or already used by another argument */
@@ -602,15 +703,18 @@ static int create_trace_probe(int argc, char **argv)
602 * @ADDR : fetch memory at ADDR (ADDR should be in kernel) 703 * @ADDR : fetch memory at ADDR (ADDR should be in kernel)
603 * @SYM[+|-offs] : fetch memory at SYM +|- offs (SYM is a data symbol) 704 * @SYM[+|-offs] : fetch memory at SYM +|- offs (SYM is a data symbol)
604 * %REG : fetch register REG 705 * %REG : fetch register REG
605 * Indirect memory fetch: 706 * Dereferencing memory fetch:
606 * +|-offs(ARG) : fetch memory at ARG +|- offs address. 707 * +|-offs(ARG) : fetch memory at ARG +|- offs address.
607 * Alias name of args: 708 * Alias name of args:
608 * NAME=FETCHARG : set NAME as alias of FETCHARG. 709 * NAME=FETCHARG : set NAME as alias of FETCHARG.
710 * Type of args:
711 * FETCHARG:TYPE : use TYPE instead of unsigned long.
609 */ 712 */
610 struct trace_probe *tp; 713 struct trace_probe *tp;
611 int i, ret = 0; 714 int i, ret = 0;
612 int is_return = 0, is_delete = 0; 715 int is_return = 0, is_delete = 0;
613 char *symbol = NULL, *event = NULL, *arg = NULL, *group = NULL; 716 char *symbol = NULL, *event = NULL, *group = NULL;
717 char *arg, *tmp;
614 unsigned long offset = 0; 718 unsigned long offset = 0;
615 void *addr = NULL; 719 void *addr = NULL;
616 char buf[MAX_EVENT_NAME_LEN]; 720 char buf[MAX_EVENT_NAME_LEN];
@@ -723,13 +827,6 @@ static int create_trace_probe(int argc, char **argv)
723 else 827 else
724 arg = argv[i]; 828 arg = argv[i];
725 829
726 if (conflict_field_name(argv[i], tp->args, i)) {
727 pr_info("Argument%d name '%s' conflicts with "
728 "another field.\n", i, argv[i]);
729 ret = -EINVAL;
730 goto error;
731 }
732
733 tp->args[i].name = kstrdup(argv[i], GFP_KERNEL); 830 tp->args[i].name = kstrdup(argv[i], GFP_KERNEL);
734 if (!tp->args[i].name) { 831 if (!tp->args[i].name) {
735 pr_info("Failed to allocate argument%d name '%s'.\n", 832 pr_info("Failed to allocate argument%d name '%s'.\n",
@@ -737,9 +834,19 @@ static int create_trace_probe(int argc, char **argv)
737 ret = -ENOMEM; 834 ret = -ENOMEM;
738 goto error; 835 goto error;
739 } 836 }
837 tmp = strchr(tp->args[i].name, ':');
838 if (tmp)
839 *tmp = '_'; /* convert : to _ */
840
841 if (conflict_field_name(tp->args[i].name, tp->args, i)) {
842 pr_info("Argument%d name '%s' conflicts with "
843 "another field.\n", i, argv[i]);
844 ret = -EINVAL;
845 goto error;
846 }
740 847
741 /* Parse fetch argument */ 848 /* Parse fetch argument */
742 ret = parse_probe_arg(arg, &tp->args[i].fetch, is_return); 849 ret = parse_probe_arg(arg, tp, &tp->args[i], is_return);
743 if (ret) { 850 if (ret) {
744 pr_info("Parse error at argument%d. (%d)\n", i, ret); 851 pr_info("Parse error at argument%d. (%d)\n", i, ret);
745 kfree(tp->args[i].name); 852 kfree(tp->args[i].name);
@@ -794,8 +901,7 @@ static void probes_seq_stop(struct seq_file *m, void *v)
794static int probes_seq_show(struct seq_file *m, void *v) 901static int probes_seq_show(struct seq_file *m, void *v)
795{ 902{
796 struct trace_probe *tp = v; 903 struct trace_probe *tp = v;
797 int i, ret; 904 int i;
798 char buf[MAX_ARGSTR_LEN + 1];
799 905
800 seq_printf(m, "%c", probe_is_return(tp) ? 'r' : 'p'); 906 seq_printf(m, "%c", probe_is_return(tp) ? 'r' : 'p');
801 seq_printf(m, ":%s/%s", tp->call.system, tp->call.name); 907 seq_printf(m, ":%s/%s", tp->call.system, tp->call.name);
@@ -807,15 +913,10 @@ static int probes_seq_show(struct seq_file *m, void *v)
807 else 913 else
808 seq_printf(m, " %s", probe_symbol(tp)); 914 seq_printf(m, " %s", probe_symbol(tp));
809 915
810 for (i = 0; i < tp->nr_args; i++) { 916 for (i = 0; i < tp->nr_args; i++)
811 ret = probe_arg_string(buf, MAX_ARGSTR_LEN, &tp->args[i].fetch); 917 seq_printf(m, " %s=%s", tp->args[i].name, tp->args[i].comm);
812 if (ret < 0) {
813 pr_warning("Argument%d decoding error(%d).\n", i, ret);
814 return ret;
815 }
816 seq_printf(m, " %s=%s", tp->args[i].name, buf);
817 }
818 seq_printf(m, "\n"); 918 seq_printf(m, "\n");
919
819 return 0; 920 return 0;
820} 921}
821 922
@@ -945,9 +1046,10 @@ static const struct file_operations kprobe_profile_ops = {
945static __kprobes void kprobe_trace_func(struct kprobe *kp, struct pt_regs *regs) 1046static __kprobes void kprobe_trace_func(struct kprobe *kp, struct pt_regs *regs)
946{ 1047{
947 struct trace_probe *tp = container_of(kp, struct trace_probe, rp.kp); 1048 struct trace_probe *tp = container_of(kp, struct trace_probe, rp.kp);
948 struct kprobe_trace_entry *entry; 1049 struct kprobe_trace_entry_head *entry;
949 struct ring_buffer_event *event; 1050 struct ring_buffer_event *event;
950 struct ring_buffer *buffer; 1051 struct ring_buffer *buffer;
1052 u8 *data;
951 int size, i, pc; 1053 int size, i, pc;
952 unsigned long irq_flags; 1054 unsigned long irq_flags;
953 struct ftrace_event_call *call = &tp->call; 1055 struct ftrace_event_call *call = &tp->call;
@@ -957,7 +1059,7 @@ static __kprobes void kprobe_trace_func(struct kprobe *kp, struct pt_regs *regs)
957 local_save_flags(irq_flags); 1059 local_save_flags(irq_flags);
958 pc = preempt_count(); 1060 pc = preempt_count();
959 1061
960 size = SIZEOF_KPROBE_TRACE_ENTRY(tp->nr_args); 1062 size = sizeof(*entry) + tp->size;
961 1063
962 event = trace_current_buffer_lock_reserve(&buffer, call->id, size, 1064 event = trace_current_buffer_lock_reserve(&buffer, call->id, size,
963 irq_flags, pc); 1065 irq_flags, pc);
@@ -965,10 +1067,10 @@ static __kprobes void kprobe_trace_func(struct kprobe *kp, struct pt_regs *regs)
965 return; 1067 return;
966 1068
967 entry = ring_buffer_event_data(event); 1069 entry = ring_buffer_event_data(event);
968 entry->nargs = tp->nr_args;
969 entry->ip = (unsigned long)kp->addr; 1070 entry->ip = (unsigned long)kp->addr;
1071 data = (u8 *)&entry[1];
970 for (i = 0; i < tp->nr_args; i++) 1072 for (i = 0; i < tp->nr_args; i++)
971 entry->args[i] = call_fetch(&tp->args[i].fetch, regs); 1073 call_fetch(&tp->args[i].fetch, regs, data + tp->args[i].offset);
972 1074
973 if (!filter_current_check_discard(buffer, call, entry, event)) 1075 if (!filter_current_check_discard(buffer, call, entry, event))
974 trace_nowake_buffer_unlock_commit(buffer, event, irq_flags, pc); 1076 trace_nowake_buffer_unlock_commit(buffer, event, irq_flags, pc);
@@ -979,9 +1081,10 @@ static __kprobes void kretprobe_trace_func(struct kretprobe_instance *ri,
979 struct pt_regs *regs) 1081 struct pt_regs *regs)
980{ 1082{
981 struct trace_probe *tp = container_of(ri->rp, struct trace_probe, rp); 1083 struct trace_probe *tp = container_of(ri->rp, struct trace_probe, rp);
982 struct kretprobe_trace_entry *entry; 1084 struct kretprobe_trace_entry_head *entry;
983 struct ring_buffer_event *event; 1085 struct ring_buffer_event *event;
984 struct ring_buffer *buffer; 1086 struct ring_buffer *buffer;
1087 u8 *data;
985 int size, i, pc; 1088 int size, i, pc;
986 unsigned long irq_flags; 1089 unsigned long irq_flags;
987 struct ftrace_event_call *call = &tp->call; 1090 struct ftrace_event_call *call = &tp->call;
@@ -989,7 +1092,7 @@ static __kprobes void kretprobe_trace_func(struct kretprobe_instance *ri,
989 local_save_flags(irq_flags); 1092 local_save_flags(irq_flags);
990 pc = preempt_count(); 1093 pc = preempt_count();
991 1094
992 size = SIZEOF_KRETPROBE_TRACE_ENTRY(tp->nr_args); 1095 size = sizeof(*entry) + tp->size;
993 1096
994 event = trace_current_buffer_lock_reserve(&buffer, call->id, size, 1097 event = trace_current_buffer_lock_reserve(&buffer, call->id, size,
995 irq_flags, pc); 1098 irq_flags, pc);
@@ -997,11 +1100,11 @@ static __kprobes void kretprobe_trace_func(struct kretprobe_instance *ri,
997 return; 1100 return;
998 1101
999 entry = ring_buffer_event_data(event); 1102 entry = ring_buffer_event_data(event);
1000 entry->nargs = tp->nr_args;
1001 entry->func = (unsigned long)tp->rp.kp.addr; 1103 entry->func = (unsigned long)tp->rp.kp.addr;
1002 entry->ret_ip = (unsigned long)ri->ret_addr; 1104 entry->ret_ip = (unsigned long)ri->ret_addr;
1105 data = (u8 *)&entry[1];
1003 for (i = 0; i < tp->nr_args; i++) 1106 for (i = 0; i < tp->nr_args; i++)
1004 entry->args[i] = call_fetch(&tp->args[i].fetch, regs); 1107 call_fetch(&tp->args[i].fetch, regs, data + tp->args[i].offset);
1005 1108
1006 if (!filter_current_check_discard(buffer, call, entry, event)) 1109 if (!filter_current_check_discard(buffer, call, entry, event))
1007 trace_nowake_buffer_unlock_commit(buffer, event, irq_flags, pc); 1110 trace_nowake_buffer_unlock_commit(buffer, event, irq_flags, pc);
@@ -1011,13 +1114,14 @@ static __kprobes void kretprobe_trace_func(struct kretprobe_instance *ri,
1011enum print_line_t 1114enum print_line_t
1012print_kprobe_event(struct trace_iterator *iter, int flags) 1115print_kprobe_event(struct trace_iterator *iter, int flags)
1013{ 1116{
1014 struct kprobe_trace_entry *field; 1117 struct kprobe_trace_entry_head *field;
1015 struct trace_seq *s = &iter->seq; 1118 struct trace_seq *s = &iter->seq;
1016 struct trace_event *event; 1119 struct trace_event *event;
1017 struct trace_probe *tp; 1120 struct trace_probe *tp;
1121 u8 *data;
1018 int i; 1122 int i;
1019 1123
1020 field = (struct kprobe_trace_entry *)iter->ent; 1124 field = (struct kprobe_trace_entry_head *)iter->ent;
1021 event = ftrace_find_event(field->ent.type); 1125 event = ftrace_find_event(field->ent.type);
1022 tp = container_of(event, struct trace_probe, event); 1126 tp = container_of(event, struct trace_probe, event);
1023 1127
@@ -1030,9 +1134,10 @@ print_kprobe_event(struct trace_iterator *iter, int flags)
1030 if (!trace_seq_puts(s, ")")) 1134 if (!trace_seq_puts(s, ")"))
1031 goto partial; 1135 goto partial;
1032 1136
1033 for (i = 0; i < field->nargs; i++) 1137 data = (u8 *)&field[1];
1034 if (!trace_seq_printf(s, " %s=%lx", 1138 for (i = 0; i < tp->nr_args; i++)
1035 tp->args[i].name, field->args[i])) 1139 if (!tp->args[i].type->print(s, tp->args[i].name,
1140 data + tp->args[i].offset))
1036 goto partial; 1141 goto partial;
1037 1142
1038 if (!trace_seq_puts(s, "\n")) 1143 if (!trace_seq_puts(s, "\n"))
@@ -1046,13 +1151,14 @@ partial:
1046enum print_line_t 1151enum print_line_t
1047print_kretprobe_event(struct trace_iterator *iter, int flags) 1152print_kretprobe_event(struct trace_iterator *iter, int flags)
1048{ 1153{
1049 struct kretprobe_trace_entry *field; 1154 struct kretprobe_trace_entry_head *field;
1050 struct trace_seq *s = &iter->seq; 1155 struct trace_seq *s = &iter->seq;
1051 struct trace_event *event; 1156 struct trace_event *event;
1052 struct trace_probe *tp; 1157 struct trace_probe *tp;
1158 u8 *data;
1053 int i; 1159 int i;
1054 1160
1055 field = (struct kretprobe_trace_entry *)iter->ent; 1161 field = (struct kretprobe_trace_entry_head *)iter->ent;
1056 event = ftrace_find_event(field->ent.type); 1162 event = ftrace_find_event(field->ent.type);
1057 tp = container_of(event, struct trace_probe, event); 1163 tp = container_of(event, struct trace_probe, event);
1058 1164
@@ -1071,9 +1177,10 @@ print_kretprobe_event(struct trace_iterator *iter, int flags)
1071 if (!trace_seq_puts(s, ")")) 1177 if (!trace_seq_puts(s, ")"))
1072 goto partial; 1178 goto partial;
1073 1179
1074 for (i = 0; i < field->nargs; i++) 1180 data = (u8 *)&field[1];
1075 if (!trace_seq_printf(s, " %s=%lx", 1181 for (i = 0; i < tp->nr_args; i++)
1076 tp->args[i].name, field->args[i])) 1182 if (!tp->args[i].type->print(s, tp->args[i].name,
1183 data + tp->args[i].offset))
1077 goto partial; 1184 goto partial;
1078 1185
1079 if (!trace_seq_puts(s, "\n")) 1186 if (!trace_seq_puts(s, "\n"))
@@ -1129,29 +1236,43 @@ static int probe_event_raw_init(struct ftrace_event_call *event_call)
1129static int kprobe_event_define_fields(struct ftrace_event_call *event_call) 1236static int kprobe_event_define_fields(struct ftrace_event_call *event_call)
1130{ 1237{
1131 int ret, i; 1238 int ret, i;
1132 struct kprobe_trace_entry field; 1239 struct kprobe_trace_entry_head field;
1133 struct trace_probe *tp = (struct trace_probe *)event_call->data; 1240 struct trace_probe *tp = (struct trace_probe *)event_call->data;
1134 1241
1135 DEFINE_FIELD(unsigned long, ip, FIELD_STRING_IP, 0); 1242 DEFINE_FIELD(unsigned long, ip, FIELD_STRING_IP, 0);
1136 DEFINE_FIELD(int, nargs, FIELD_STRING_NARGS, 1);
1137 /* Set argument names as fields */ 1243 /* Set argument names as fields */
1138 for (i = 0; i < tp->nr_args; i++) 1244 for (i = 0; i < tp->nr_args; i++) {
1139 DEFINE_FIELD(unsigned long, args[i], tp->args[i].name, 0); 1245 ret = trace_define_field(event_call, tp->args[i].type->name,
1246 tp->args[i].name,
1247 sizeof(field) + tp->args[i].offset,
1248 tp->args[i].type->size,
1249 tp->args[i].type->is_signed,
1250 FILTER_OTHER);
1251 if (ret)
1252 return ret;
1253 }
1140 return 0; 1254 return 0;
1141} 1255}
1142 1256
1143static int kretprobe_event_define_fields(struct ftrace_event_call *event_call) 1257static int kretprobe_event_define_fields(struct ftrace_event_call *event_call)
1144{ 1258{
1145 int ret, i; 1259 int ret, i;
1146 struct kretprobe_trace_entry field; 1260 struct kretprobe_trace_entry_head field;
1147 struct trace_probe *tp = (struct trace_probe *)event_call->data; 1261 struct trace_probe *tp = (struct trace_probe *)event_call->data;
1148 1262
1149 DEFINE_FIELD(unsigned long, func, FIELD_STRING_FUNC, 0); 1263 DEFINE_FIELD(unsigned long, func, FIELD_STRING_FUNC, 0);
1150 DEFINE_FIELD(unsigned long, ret_ip, FIELD_STRING_RETIP, 0); 1264 DEFINE_FIELD(unsigned long, ret_ip, FIELD_STRING_RETIP, 0);
1151 DEFINE_FIELD(int, nargs, FIELD_STRING_NARGS, 1);
1152 /* Set argument names as fields */ 1265 /* Set argument names as fields */
1153 for (i = 0; i < tp->nr_args; i++) 1266 for (i = 0; i < tp->nr_args; i++) {
1154 DEFINE_FIELD(unsigned long, args[i], tp->args[i].name, 0); 1267 ret = trace_define_field(event_call, tp->args[i].type->name,
1268 tp->args[i].name,
1269 sizeof(field) + tp->args[i].offset,
1270 tp->args[i].type->size,
1271 tp->args[i].type->is_signed,
1272 FILTER_OTHER);
1273 if (ret)
1274 return ret;
1275 }
1155 return 0; 1276 return 0;
1156} 1277}
1157 1278
@@ -1176,8 +1297,8 @@ static int __set_print_fmt(struct trace_probe *tp, char *buf, int len)
1176 pos += snprintf(buf + pos, LEN_OR_ZERO, "\"%s", fmt); 1297 pos += snprintf(buf + pos, LEN_OR_ZERO, "\"%s", fmt);
1177 1298
1178 for (i = 0; i < tp->nr_args; i++) { 1299 for (i = 0; i < tp->nr_args; i++) {
1179 pos += snprintf(buf + pos, LEN_OR_ZERO, " %s=%%lx", 1300 pos += snprintf(buf + pos, LEN_OR_ZERO, " %s=%s",
1180 tp->args[i].name); 1301 tp->args[i].name, tp->args[i].type->fmt);
1181 } 1302 }
1182 1303
1183 pos += snprintf(buf + pos, LEN_OR_ZERO, "\", %s", arg); 1304 pos += snprintf(buf + pos, LEN_OR_ZERO, "\", %s", arg);
@@ -1219,12 +1340,13 @@ static __kprobes void kprobe_perf_func(struct kprobe *kp,
1219{ 1340{
1220 struct trace_probe *tp = container_of(kp, struct trace_probe, rp.kp); 1341 struct trace_probe *tp = container_of(kp, struct trace_probe, rp.kp);
1221 struct ftrace_event_call *call = &tp->call; 1342 struct ftrace_event_call *call = &tp->call;
1222 struct kprobe_trace_entry *entry; 1343 struct kprobe_trace_entry_head *entry;
1344 u8 *data;
1223 int size, __size, i; 1345 int size, __size, i;
1224 unsigned long irq_flags; 1346 unsigned long irq_flags;
1225 int rctx; 1347 int rctx;
1226 1348
1227 __size = SIZEOF_KPROBE_TRACE_ENTRY(tp->nr_args); 1349 __size = sizeof(*entry) + tp->size;
1228 size = ALIGN(__size + sizeof(u32), sizeof(u64)); 1350 size = ALIGN(__size + sizeof(u32), sizeof(u64));
1229 size -= sizeof(u32); 1351 size -= sizeof(u32);
1230 if (WARN_ONCE(size > PERF_MAX_TRACE_SIZE, 1352 if (WARN_ONCE(size > PERF_MAX_TRACE_SIZE,
@@ -1235,10 +1357,10 @@ static __kprobes void kprobe_perf_func(struct kprobe *kp,
1235 if (!entry) 1357 if (!entry)
1236 return; 1358 return;
1237 1359
1238 entry->nargs = tp->nr_args;
1239 entry->ip = (unsigned long)kp->addr; 1360 entry->ip = (unsigned long)kp->addr;
1361 data = (u8 *)&entry[1];
1240 for (i = 0; i < tp->nr_args; i++) 1362 for (i = 0; i < tp->nr_args; i++)
1241 entry->args[i] = call_fetch(&tp->args[i].fetch, regs); 1363 call_fetch(&tp->args[i].fetch, regs, data + tp->args[i].offset);
1242 1364
1243 perf_trace_buf_submit(entry, size, rctx, entry->ip, 1, irq_flags, regs); 1365 perf_trace_buf_submit(entry, size, rctx, entry->ip, 1, irq_flags, regs);
1244} 1366}
@@ -1249,12 +1371,13 @@ static __kprobes void kretprobe_perf_func(struct kretprobe_instance *ri,
1249{ 1371{
1250 struct trace_probe *tp = container_of(ri->rp, struct trace_probe, rp); 1372 struct trace_probe *tp = container_of(ri->rp, struct trace_probe, rp);
1251 struct ftrace_event_call *call = &tp->call; 1373 struct ftrace_event_call *call = &tp->call;
1252 struct kretprobe_trace_entry *entry; 1374 struct kretprobe_trace_entry_head *entry;
1375 u8 *data;
1253 int size, __size, i; 1376 int size, __size, i;
1254 unsigned long irq_flags; 1377 unsigned long irq_flags;
1255 int rctx; 1378 int rctx;
1256 1379
1257 __size = SIZEOF_KRETPROBE_TRACE_ENTRY(tp->nr_args); 1380 __size = sizeof(*entry) + tp->size;
1258 size = ALIGN(__size + sizeof(u32), sizeof(u64)); 1381 size = ALIGN(__size + sizeof(u32), sizeof(u64));
1259 size -= sizeof(u32); 1382 size -= sizeof(u32);
1260 if (WARN_ONCE(size > PERF_MAX_TRACE_SIZE, 1383 if (WARN_ONCE(size > PERF_MAX_TRACE_SIZE,
@@ -1265,11 +1388,11 @@ static __kprobes void kretprobe_perf_func(struct kretprobe_instance *ri,
1265 if (!entry) 1388 if (!entry)
1266 return; 1389 return;
1267 1390
1268 entry->nargs = tp->nr_args;
1269 entry->func = (unsigned long)tp->rp.kp.addr; 1391 entry->func = (unsigned long)tp->rp.kp.addr;
1270 entry->ret_ip = (unsigned long)ri->ret_addr; 1392 entry->ret_ip = (unsigned long)ri->ret_addr;
1393 data = (u8 *)&entry[1];
1271 for (i = 0; i < tp->nr_args; i++) 1394 for (i = 0; i < tp->nr_args; i++)
1272 entry->args[i] = call_fetch(&tp->args[i].fetch, regs); 1395 call_fetch(&tp->args[i].fetch, regs, data + tp->args[i].offset);
1273 1396
1274 perf_trace_buf_submit(entry, size, rctx, entry->ret_ip, 1, 1397 perf_trace_buf_submit(entry, size, rctx, entry->ret_ip, 1,
1275 irq_flags, regs); 1398 irq_flags, regs);
diff --git a/kernel/trace/trace_ksym.c b/kernel/trace/trace_ksym.c
index d59cd6879477..8eaf00749b65 100644
--- a/kernel/trace/trace_ksym.c
+++ b/kernel/trace/trace_ksym.c
@@ -34,12 +34,6 @@
34 34
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36 36
37/*
38 * For now, let us restrict the no. of symbols traced simultaneously to number
39 * of available hardware breakpoint registers.
40 */
41#define KSYM_TRACER_MAX HBP_NUM
42
43#define KSYM_TRACER_OP_LEN 3 /* rw- */ 37#define KSYM_TRACER_OP_LEN 3 /* rw- */
44 38
45struct trace_ksym { 39struct trace_ksym {
@@ -53,7 +47,6 @@ struct trace_ksym {
53 47
54static struct trace_array *ksym_trace_array; 48static struct trace_array *ksym_trace_array;
55 49
56static unsigned int ksym_filter_entry_count;
57static unsigned int ksym_tracing_enabled; 50static unsigned int ksym_tracing_enabled;
58 51
59static HLIST_HEAD(ksym_filter_head); 52static HLIST_HEAD(ksym_filter_head);
@@ -181,13 +174,6 @@ int process_new_ksym_entry(char *ksymname, int op, unsigned long addr)
181 struct trace_ksym *entry; 174 struct trace_ksym *entry;
182 int ret = -ENOMEM; 175 int ret = -ENOMEM;
183 176
184 if (ksym_filter_entry_count >= KSYM_TRACER_MAX) {
185 printk(KERN_ERR "ksym_tracer: Maximum limit:(%d) reached. No"
186 " new requests for tracing can be accepted now.\n",
187 KSYM_TRACER_MAX);
188 return -ENOSPC;
189 }
190
191 entry = kzalloc(sizeof(struct trace_ksym), GFP_KERNEL); 177 entry = kzalloc(sizeof(struct trace_ksym), GFP_KERNEL);
192 if (!entry) 178 if (!entry)
193 return -ENOMEM; 179 return -ENOMEM;
@@ -203,13 +189,17 @@ int process_new_ksym_entry(char *ksymname, int op, unsigned long addr)
203 189
204 if (IS_ERR(entry->ksym_hbp)) { 190 if (IS_ERR(entry->ksym_hbp)) {
205 ret = PTR_ERR(entry->ksym_hbp); 191 ret = PTR_ERR(entry->ksym_hbp);
206 printk(KERN_INFO "ksym_tracer request failed. Try again" 192 if (ret == -ENOSPC) {
207 " later!!\n"); 193 printk(KERN_ERR "ksym_tracer: Maximum limit reached."
194 " No new requests for tracing can be accepted now.\n");
195 } else {
196 printk(KERN_INFO "ksym_tracer request failed. Try again"
197 " later!!\n");
198 }
208 goto err; 199 goto err;
209 } 200 }
210 201
211 hlist_add_head_rcu(&(entry->ksym_hlist), &ksym_filter_head); 202 hlist_add_head_rcu(&(entry->ksym_hlist), &ksym_filter_head);
212 ksym_filter_entry_count++;
213 203
214 return 0; 204 return 0;
215 205
@@ -265,7 +255,6 @@ static void __ksym_trace_reset(void)
265 hlist_for_each_entry_safe(entry, node, node1, &ksym_filter_head, 255 hlist_for_each_entry_safe(entry, node, node1, &ksym_filter_head,
266 ksym_hlist) { 256 ksym_hlist) {
267 unregister_wide_hw_breakpoint(entry->ksym_hbp); 257 unregister_wide_hw_breakpoint(entry->ksym_hbp);
268 ksym_filter_entry_count--;
269 hlist_del_rcu(&(entry->ksym_hlist)); 258 hlist_del_rcu(&(entry->ksym_hlist));
270 synchronize_rcu(); 259 synchronize_rcu();
271 kfree(entry); 260 kfree(entry);
@@ -338,7 +327,6 @@ static ssize_t ksym_trace_filter_write(struct file *file,
338 goto out_unlock; 327 goto out_unlock;
339 } 328 }
340 /* Error or "symbol:---" case: drop it */ 329 /* Error or "symbol:---" case: drop it */
341 ksym_filter_entry_count--;
342 hlist_del_rcu(&(entry->ksym_hlist)); 330 hlist_del_rcu(&(entry->ksym_hlist));
343 synchronize_rcu(); 331 synchronize_rcu();
344 kfree(entry); 332 kfree(entry);
diff --git a/kernel/trace/trace_output.c b/kernel/trace/trace_output.c
index 8e46b3323cdc..2404c129a8c9 100644
--- a/kernel/trace/trace_output.c
+++ b/kernel/trace/trace_output.c
@@ -253,7 +253,7 @@ void *trace_seq_reserve(struct trace_seq *s, size_t len)
253 void *ret; 253 void *ret;
254 254
255 if (s->full) 255 if (s->full)
256 return 0; 256 return NULL;
257 257
258 if (len > ((PAGE_SIZE - 1) - s->len)) { 258 if (len > ((PAGE_SIZE - 1) - s->len)) {
259 s->full = 1; 259 s->full = 1;
diff --git a/kernel/trace/trace_sched_switch.c b/kernel/trace/trace_sched_switch.c
index 5fca0f51fde4..a55fccfede5d 100644
--- a/kernel/trace/trace_sched_switch.c
+++ b/kernel/trace/trace_sched_switch.c
@@ -50,8 +50,7 @@ tracing_sched_switch_trace(struct trace_array *tr,
50} 50}
51 51
52static void 52static void
53probe_sched_switch(struct rq *__rq, struct task_struct *prev, 53probe_sched_switch(struct task_struct *prev, struct task_struct *next)
54 struct task_struct *next)
55{ 54{
56 struct trace_array_cpu *data; 55 struct trace_array_cpu *data;
57 unsigned long flags; 56 unsigned long flags;
@@ -109,7 +108,7 @@ tracing_sched_wakeup_trace(struct trace_array *tr,
109} 108}
110 109
111static void 110static void
112probe_sched_wakeup(struct rq *__rq, struct task_struct *wakee, int success) 111probe_sched_wakeup(struct task_struct *wakee, int success)
113{ 112{
114 struct trace_array_cpu *data; 113 struct trace_array_cpu *data;
115 unsigned long flags; 114 unsigned long flags;
diff --git a/kernel/trace/trace_sched_wakeup.c b/kernel/trace/trace_sched_wakeup.c
index 0271742abb8d..8052446ceeaa 100644
--- a/kernel/trace/trace_sched_wakeup.c
+++ b/kernel/trace/trace_sched_wakeup.c
@@ -107,8 +107,7 @@ static void probe_wakeup_migrate_task(struct task_struct *task, int cpu)
107} 107}
108 108
109static void notrace 109static void notrace
110probe_wakeup_sched_switch(struct rq *rq, struct task_struct *prev, 110probe_wakeup_sched_switch(struct task_struct *prev, struct task_struct *next)
111 struct task_struct *next)
112{ 111{
113 struct trace_array_cpu *data; 112 struct trace_array_cpu *data;
114 cycle_t T0, T1, delta; 113 cycle_t T0, T1, delta;
@@ -200,7 +199,7 @@ static void wakeup_reset(struct trace_array *tr)
200} 199}
201 200
202static void 201static void
203probe_wakeup(struct rq *rq, struct task_struct *p, int success) 202probe_wakeup(struct task_struct *p, int success)
204{ 203{
205 struct trace_array_cpu *data; 204 struct trace_array_cpu *data;
206 int cpu = smp_processor_id(); 205 int cpu = smp_processor_id();
diff --git a/kernel/trace/trace_selftest.c b/kernel/trace/trace_selftest.c
index 81003b4d617f..250e7f9bd2f0 100644
--- a/kernel/trace/trace_selftest.c
+++ b/kernel/trace/trace_selftest.c
@@ -17,7 +17,6 @@ static inline int trace_valid_entry(struct trace_entry *entry)
17 case TRACE_BRANCH: 17 case TRACE_BRANCH:
18 case TRACE_GRAPH_ENT: 18 case TRACE_GRAPH_ENT:
19 case TRACE_GRAPH_RET: 19 case TRACE_GRAPH_RET:
20 case TRACE_HW_BRANCHES:
21 case TRACE_KSYM: 20 case TRACE_KSYM:
22 return 1; 21 return 1;
23 } 22 }
@@ -30,7 +29,7 @@ static int trace_test_buffer_cpu(struct trace_array *tr, int cpu)
30 struct trace_entry *entry; 29 struct trace_entry *entry;
31 unsigned int loops = 0; 30 unsigned int loops = 0;
32 31
33 while ((event = ring_buffer_consume(tr->buffer, cpu, NULL))) { 32 while ((event = ring_buffer_consume(tr->buffer, cpu, NULL, NULL))) {
34 entry = ring_buffer_event_data(event); 33 entry = ring_buffer_event_data(event);
35 34
36 /* 35 /*
@@ -256,7 +255,8 @@ trace_selftest_startup_function(struct tracer *trace, struct trace_array *tr)
256/* Maximum number of functions to trace before diagnosing a hang */ 255/* Maximum number of functions to trace before diagnosing a hang */
257#define GRAPH_MAX_FUNC_TEST 100000000 256#define GRAPH_MAX_FUNC_TEST 100000000
258 257
259static void __ftrace_dump(bool disable_tracing); 258static void
259__ftrace_dump(bool disable_tracing, enum ftrace_dump_mode oops_dump_mode);
260static unsigned int graph_hang_thresh; 260static unsigned int graph_hang_thresh;
261 261
262/* Wrap the real function entry probe to avoid possible hanging */ 262/* Wrap the real function entry probe to avoid possible hanging */
@@ -267,7 +267,7 @@ static int trace_graph_entry_watchdog(struct ftrace_graph_ent *trace)
267 ftrace_graph_stop(); 267 ftrace_graph_stop();
268 printk(KERN_WARNING "BUG: Function graph tracer hang!\n"); 268 printk(KERN_WARNING "BUG: Function graph tracer hang!\n");
269 if (ftrace_dump_on_oops) 269 if (ftrace_dump_on_oops)
270 __ftrace_dump(false); 270 __ftrace_dump(false, DUMP_ALL);
271 return 0; 271 return 0;
272 } 272 }
273 273
@@ -755,62 +755,6 @@ trace_selftest_startup_branch(struct tracer *trace, struct trace_array *tr)
755} 755}
756#endif /* CONFIG_BRANCH_TRACER */ 756#endif /* CONFIG_BRANCH_TRACER */
757 757
758#ifdef CONFIG_HW_BRANCH_TRACER
759int
760trace_selftest_startup_hw_branches(struct tracer *trace,
761 struct trace_array *tr)
762{
763 struct trace_iterator *iter;
764 struct tracer tracer;
765 unsigned long count;
766 int ret;
767
768 if (!trace->open) {
769 printk(KERN_CONT "missing open function...");
770 return -1;
771 }
772
773 ret = tracer_init(trace, tr);
774 if (ret) {
775 warn_failed_init_tracer(trace, ret);
776 return ret;
777 }
778
779 /*
780 * The hw-branch tracer needs to collect the trace from the various
781 * cpu trace buffers - before tracing is stopped.
782 */
783 iter = kzalloc(sizeof(*iter), GFP_KERNEL);
784 if (!iter)
785 return -ENOMEM;
786
787 memcpy(&tracer, trace, sizeof(tracer));
788
789 iter->trace = &tracer;
790 iter->tr = tr;
791 iter->pos = -1;
792 mutex_init(&iter->mutex);
793
794 trace->open(iter);
795
796 mutex_destroy(&iter->mutex);
797 kfree(iter);
798
799 tracing_stop();
800
801 ret = trace_test_buffer(tr, &count);
802 trace->reset(tr);
803 tracing_start();
804
805 if (!ret && !count) {
806 printk(KERN_CONT "no entries found..");
807 ret = -1;
808 }
809
810 return ret;
811}
812#endif /* CONFIG_HW_BRANCH_TRACER */
813
814#ifdef CONFIG_KSYM_TRACER 758#ifdef CONFIG_KSYM_TRACER
815static int ksym_selftest_dummy; 759static int ksym_selftest_dummy;
816 760
diff --git a/kernel/user.c b/kernel/user.c
index 766467b3bcb7..7e72614b736d 100644
--- a/kernel/user.c
+++ b/kernel/user.c
@@ -16,7 +16,6 @@
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/user_namespace.h> 18#include <linux/user_namespace.h>
19#include "cred-internals.h"
20 19
21struct user_namespace init_user_ns = { 20struct user_namespace init_user_ns = {
22 .kref = { 21 .kref = {
@@ -137,9 +136,6 @@ struct user_struct *alloc_uid(struct user_namespace *ns, uid_t uid)
137 struct hlist_head *hashent = uidhashentry(ns, uid); 136 struct hlist_head *hashent = uidhashentry(ns, uid);
138 struct user_struct *up, *new; 137 struct user_struct *up, *new;
139 138
140 /* Make uid_hash_find() + uids_user_create() + uid_hash_insert()
141 * atomic.
142 */
143 spin_lock_irq(&uidhash_lock); 139 spin_lock_irq(&uidhash_lock);
144 up = uid_hash_find(uid, hashent); 140 up = uid_hash_find(uid, hashent);
145 spin_unlock_irq(&uidhash_lock); 141 spin_unlock_irq(&uidhash_lock);
@@ -161,11 +157,6 @@ struct user_struct *alloc_uid(struct user_namespace *ns, uid_t uid)
161 spin_lock_irq(&uidhash_lock); 157 spin_lock_irq(&uidhash_lock);
162 up = uid_hash_find(uid, hashent); 158 up = uid_hash_find(uid, hashent);
163 if (up) { 159 if (up) {
164 /* This case is not possible when CONFIG_USER_SCHED
165 * is defined, since we serialize alloc_uid() using
166 * uids_mutex. Hence no need to call
167 * sched_destroy_user() or remove_user_sysfs_dir().
168 */
169 key_put(new->uid_keyring); 160 key_put(new->uid_keyring);
170 key_put(new->session_keyring); 161 key_put(new->session_keyring);
171 kmem_cache_free(uid_cachep, new); 162 kmem_cache_free(uid_cachep, new);
@@ -178,8 +169,6 @@ struct user_struct *alloc_uid(struct user_namespace *ns, uid_t uid)
178 169
179 return up; 170 return up;
180 171
181 put_user_ns(new->user_ns);
182 kmem_cache_free(uid_cachep, new);
183out_unlock: 172out_unlock:
184 return NULL; 173 return NULL;
185} 174}
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 935248bdbc47..d85be90d5888 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -512,6 +512,18 @@ config PROVE_RCU
512 512
513 Say N if you are unsure. 513 Say N if you are unsure.
514 514
515config PROVE_RCU_REPEATEDLY
516 bool "RCU debugging: don't disable PROVE_RCU on first splat"
517 depends on PROVE_RCU
518 default n
519 help
520 By itself, PROVE_RCU will disable checking upon issuing the
521 first warning (or "splat"). This feature prevents such
522 disabling, allowing multiple RCU-lockdep warnings to be printed
523 on a single reboot.
524
525 Say N if you are unsure.
526
515config LOCKDEP 527config LOCKDEP
516 bool 528 bool
517 depends on DEBUG_KERNEL && TRACE_IRQFLAGS_SUPPORT && STACKTRACE_SUPPORT && LOCKDEP_SUPPORT 529 depends on DEBUG_KERNEL && TRACE_IRQFLAGS_SUPPORT && STACKTRACE_SUPPORT && LOCKDEP_SUPPORT
@@ -793,7 +805,7 @@ config RCU_CPU_STALL_DETECTOR
793config RCU_CPU_STALL_VERBOSE 805config RCU_CPU_STALL_VERBOSE
794 bool "Print additional per-task information for RCU_CPU_STALL_DETECTOR" 806 bool "Print additional per-task information for RCU_CPU_STALL_DETECTOR"
795 depends on RCU_CPU_STALL_DETECTOR && TREE_PREEMPT_RCU 807 depends on RCU_CPU_STALL_DETECTOR && TREE_PREEMPT_RCU
796 default n 808 default y
797 help 809 help
798 This option causes RCU to printk detailed per-task information 810 This option causes RCU to printk detailed per-task information
799 for any tasks that are stalling the current RCU grace period. 811 for any tasks that are stalling the current RCU grace period.
@@ -1086,6 +1098,13 @@ config DMA_API_DEBUG
1086 This option causes a performance degredation. Use only if you want 1098 This option causes a performance degredation. Use only if you want
1087 to debug device drivers. If unsure, say N. 1099 to debug device drivers. If unsure, say N.
1088 1100
1101config ATOMIC64_SELFTEST
1102 bool "Perform an atomic64_t self-test at boot"
1103 help
1104 Enable this option to test the atomic64_t functions at boot.
1105
1106 If unsure, say N.
1107
1089source "samples/Kconfig" 1108source "samples/Kconfig"
1090 1109
1091source "lib/Kconfig.kgdb" 1110source "lib/Kconfig.kgdb"
diff --git a/lib/Makefile b/lib/Makefile
index 0d4015205c64..9e6d3c29d73a 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -39,7 +39,10 @@ lib-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem.o
39lib-$(CONFIG_GENERIC_FIND_FIRST_BIT) += find_next_bit.o 39lib-$(CONFIG_GENERIC_FIND_FIRST_BIT) += find_next_bit.o
40lib-$(CONFIG_GENERIC_FIND_NEXT_BIT) += find_next_bit.o 40lib-$(CONFIG_GENERIC_FIND_NEXT_BIT) += find_next_bit.o
41obj-$(CONFIG_GENERIC_FIND_LAST_BIT) += find_last_bit.o 41obj-$(CONFIG_GENERIC_FIND_LAST_BIT) += find_last_bit.o
42
43CFLAGS_hweight.o = $(subst $(quote),,$(CONFIG_ARCH_HWEIGHT_CFLAGS))
42obj-$(CONFIG_GENERIC_HWEIGHT) += hweight.o 44obj-$(CONFIG_GENERIC_HWEIGHT) += hweight.o
45
43obj-$(CONFIG_LOCK_KERNEL) += kernel_lock.o 46obj-$(CONFIG_LOCK_KERNEL) += kernel_lock.o
44obj-$(CONFIG_BTREE) += btree.o 47obj-$(CONFIG_BTREE) += btree.o
45obj-$(CONFIG_DEBUG_PREEMPT) += smp_processor_id.o 48obj-$(CONFIG_DEBUG_PREEMPT) += smp_processor_id.o
@@ -101,6 +104,8 @@ obj-$(CONFIG_GENERIC_CSUM) += checksum.o
101 104
102obj-$(CONFIG_GENERIC_ATOMIC64) += atomic64.o 105obj-$(CONFIG_GENERIC_ATOMIC64) += atomic64.o
103 106
107obj-$(CONFIG_ATOMIC64_SELFTEST) += atomic64_test.o
108
104hostprogs-y := gen_crc32table 109hostprogs-y := gen_crc32table
105clean-files := crc32table.h 110clean-files := crc32table.h
106 111
diff --git a/lib/atomic64.c b/lib/atomic64.c
index 8bee16ec7524..a21c12bc727c 100644
--- a/lib/atomic64.c
+++ b/lib/atomic64.c
@@ -162,12 +162,12 @@ int atomic64_add_unless(atomic64_t *v, long long a, long long u)
162{ 162{
163 unsigned long flags; 163 unsigned long flags;
164 spinlock_t *lock = lock_addr(v); 164 spinlock_t *lock = lock_addr(v);
165 int ret = 1; 165 int ret = 0;
166 166
167 spin_lock_irqsave(lock, flags); 167 spin_lock_irqsave(lock, flags);
168 if (v->counter != u) { 168 if (v->counter != u) {
169 v->counter += a; 169 v->counter += a;
170 ret = 0; 170 ret = 1;
171 } 171 }
172 spin_unlock_irqrestore(lock, flags); 172 spin_unlock_irqrestore(lock, flags);
173 return ret; 173 return ret;
diff --git a/lib/atomic64_test.c b/lib/atomic64_test.c
new file mode 100644
index 000000000000..65e482caf5e9
--- /dev/null
+++ b/lib/atomic64_test.c
@@ -0,0 +1,164 @@
1/*
2 * Testsuite for atomic64_t functions
3 *
4 * Copyright © 2010 Luca Barbieri
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11#include <linux/init.h>
12#include <asm/atomic.h>
13
14#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
15static __init int test_atomic64(void)
16{
17 long long v0 = 0xaaa31337c001d00dLL;
18 long long v1 = 0xdeadbeefdeafcafeLL;
19 long long v2 = 0xfaceabadf00df001LL;
20 long long onestwos = 0x1111111122222222LL;
21 long long one = 1LL;
22
23 atomic64_t v = ATOMIC64_INIT(v0);
24 long long r = v0;
25 BUG_ON(v.counter != r);
26
27 atomic64_set(&v, v1);
28 r = v1;
29 BUG_ON(v.counter != r);
30 BUG_ON(atomic64_read(&v) != r);
31
32 INIT(v0);
33 atomic64_add(onestwos, &v);
34 r += onestwos;
35 BUG_ON(v.counter != r);
36
37 INIT(v0);
38 atomic64_add(-one, &v);
39 r += -one;
40 BUG_ON(v.counter != r);
41
42 INIT(v0);
43 r += onestwos;
44 BUG_ON(atomic64_add_return(onestwos, &v) != r);
45 BUG_ON(v.counter != r);
46
47 INIT(v0);
48 r += -one;
49 BUG_ON(atomic64_add_return(-one, &v) != r);
50 BUG_ON(v.counter != r);
51
52 INIT(v0);
53 atomic64_sub(onestwos, &v);
54 r -= onestwos;
55 BUG_ON(v.counter != r);
56
57 INIT(v0);
58 atomic64_sub(-one, &v);
59 r -= -one;
60 BUG_ON(v.counter != r);
61
62 INIT(v0);
63 r -= onestwos;
64 BUG_ON(atomic64_sub_return(onestwos, &v) != r);
65 BUG_ON(v.counter != r);
66
67 INIT(v0);
68 r -= -one;
69 BUG_ON(atomic64_sub_return(-one, &v) != r);
70 BUG_ON(v.counter != r);
71
72 INIT(v0);
73 atomic64_inc(&v);
74 r += one;
75 BUG_ON(v.counter != r);
76
77 INIT(v0);
78 r += one;
79 BUG_ON(atomic64_inc_return(&v) != r);
80 BUG_ON(v.counter != r);
81
82 INIT(v0);
83 atomic64_dec(&v);
84 r -= one;
85 BUG_ON(v.counter != r);
86
87 INIT(v0);
88 r -= one;
89 BUG_ON(atomic64_dec_return(&v) != r);
90 BUG_ON(v.counter != r);
91
92 INIT(v0);
93 BUG_ON(atomic64_xchg(&v, v1) != v0);
94 r = v1;
95 BUG_ON(v.counter != r);
96
97 INIT(v0);
98 BUG_ON(atomic64_cmpxchg(&v, v0, v1) != v0);
99 r = v1;
100 BUG_ON(v.counter != r);
101
102 INIT(v0);
103 BUG_ON(atomic64_cmpxchg(&v, v2, v1) != v0);
104 BUG_ON(v.counter != r);
105
106 INIT(v0);
107 BUG_ON(atomic64_add_unless(&v, one, v0));
108 BUG_ON(v.counter != r);
109
110 INIT(v0);
111 BUG_ON(!atomic64_add_unless(&v, one, v1));
112 r += one;
113 BUG_ON(v.counter != r);
114
115#if defined(CONFIG_X86) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(_ASM_GENERIC_ATOMIC64_H)
116 INIT(onestwos);
117 BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
118 r -= one;
119 BUG_ON(v.counter != r);
120
121 INIT(0);
122 BUG_ON(atomic64_dec_if_positive(&v) != -one);
123 BUG_ON(v.counter != r);
124
125 INIT(-one);
126 BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
127 BUG_ON(v.counter != r);
128#else
129#warning Please implement atomic64_dec_if_positive for your architecture, and add it to the IF above
130#endif
131
132 INIT(onestwos);
133 BUG_ON(!atomic64_inc_not_zero(&v));
134 r += one;
135 BUG_ON(v.counter != r);
136
137 INIT(0);
138 BUG_ON(atomic64_inc_not_zero(&v));
139 BUG_ON(v.counter != r);
140
141 INIT(-one);
142 BUG_ON(!atomic64_inc_not_zero(&v));
143 r += one;
144 BUG_ON(v.counter != r);
145
146#ifdef CONFIG_X86
147 printk(KERN_INFO "atomic64 test passed for %s platform %s CX8 and %s SSE\n",
148#ifdef CONFIG_X86_64
149 "x86-64",
150#elif defined(CONFIG_X86_CMPXCHG64)
151 "i586+",
152#else
153 "i386+",
154#endif
155 boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
156 boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
157#else
158 printk(KERN_INFO "atomic64 test passed\n");
159#endif
160
161 return 0;
162}
163
164core_initcall(test_atomic64);
diff --git a/lib/btree.c b/lib/btree.c
index 41859a820218..c9c6f0351526 100644
--- a/lib/btree.c
+++ b/lib/btree.c
@@ -95,7 +95,8 @@ static unsigned long *btree_node_alloc(struct btree_head *head, gfp_t gfp)
95 unsigned long *node; 95 unsigned long *node;
96 96
97 node = mempool_alloc(head->mempool, gfp); 97 node = mempool_alloc(head->mempool, gfp);
98 memset(node, 0, NODESIZE); 98 if (likely(node))
99 memset(node, 0, NODESIZE);
99 return node; 100 return node;
100} 101}
101 102
diff --git a/lib/debugobjects.c b/lib/debugobjects.c
index b862b30369ff..deebcc57d4e6 100644
--- a/lib/debugobjects.c
+++ b/lib/debugobjects.c
@@ -141,6 +141,7 @@ alloc_object(void *addr, struct debug_bucket *b, struct debug_obj_descr *descr)
141 obj->object = addr; 141 obj->object = addr;
142 obj->descr = descr; 142 obj->descr = descr;
143 obj->state = ODEBUG_STATE_NONE; 143 obj->state = ODEBUG_STATE_NONE;
144 obj->astate = 0;
144 hlist_del(&obj->node); 145 hlist_del(&obj->node);
145 146
146 hlist_add_head(&obj->node, &b->list); 147 hlist_add_head(&obj->node, &b->list);
@@ -252,8 +253,10 @@ static void debug_print_object(struct debug_obj *obj, char *msg)
252 253
253 if (limit < 5 && obj->descr != descr_test) { 254 if (limit < 5 && obj->descr != descr_test) {
254 limit++; 255 limit++;
255 WARN(1, KERN_ERR "ODEBUG: %s %s object type: %s\n", msg, 256 WARN(1, KERN_ERR "ODEBUG: %s %s (active state %u) "
256 obj_states[obj->state], obj->descr->name); 257 "object type: %s\n",
258 msg, obj_states[obj->state], obj->astate,
259 obj->descr->name);
257 } 260 }
258 debug_objects_warnings++; 261 debug_objects_warnings++;
259} 262}
@@ -447,7 +450,10 @@ void debug_object_deactivate(void *addr, struct debug_obj_descr *descr)
447 case ODEBUG_STATE_INIT: 450 case ODEBUG_STATE_INIT:
448 case ODEBUG_STATE_INACTIVE: 451 case ODEBUG_STATE_INACTIVE:
449 case ODEBUG_STATE_ACTIVE: 452 case ODEBUG_STATE_ACTIVE:
450 obj->state = ODEBUG_STATE_INACTIVE; 453 if (!obj->astate)
454 obj->state = ODEBUG_STATE_INACTIVE;
455 else
456 debug_print_object(obj, "deactivate");
451 break; 457 break;
452 458
453 case ODEBUG_STATE_DESTROYED: 459 case ODEBUG_STATE_DESTROYED:
@@ -553,6 +559,53 @@ out_unlock:
553 raw_spin_unlock_irqrestore(&db->lock, flags); 559 raw_spin_unlock_irqrestore(&db->lock, flags);
554} 560}
555 561
562/**
563 * debug_object_active_state - debug checks object usage state machine
564 * @addr: address of the object
565 * @descr: pointer to an object specific debug description structure
566 * @expect: expected state
567 * @next: state to move to if expected state is found
568 */
569void
570debug_object_active_state(void *addr, struct debug_obj_descr *descr,
571 unsigned int expect, unsigned int next)
572{
573 struct debug_bucket *db;
574 struct debug_obj *obj;
575 unsigned long flags;
576
577 if (!debug_objects_enabled)
578 return;
579
580 db = get_bucket((unsigned long) addr);
581
582 raw_spin_lock_irqsave(&db->lock, flags);
583
584 obj = lookup_object(addr, db);
585 if (obj) {
586 switch (obj->state) {
587 case ODEBUG_STATE_ACTIVE:
588 if (obj->astate == expect)
589 obj->astate = next;
590 else
591 debug_print_object(obj, "active_state");
592 break;
593
594 default:
595 debug_print_object(obj, "active_state");
596 break;
597 }
598 } else {
599 struct debug_obj o = { .object = addr,
600 .state = ODEBUG_STATE_NOTAVAILABLE,
601 .descr = descr };
602
603 debug_print_object(&o, "active_state");
604 }
605
606 raw_spin_unlock_irqrestore(&db->lock, flags);
607}
608
556#ifdef CONFIG_DEBUG_OBJECTS_FREE 609#ifdef CONFIG_DEBUG_OBJECTS_FREE
557static void __debug_check_no_obj_freed(const void *address, unsigned long size) 610static void __debug_check_no_obj_freed(const void *address, unsigned long size)
558{ 611{
@@ -774,7 +827,7 @@ static int __init fixup_free(void *addr, enum debug_obj_state state)
774 } 827 }
775} 828}
776 829
777static int 830static int __init
778check_results(void *addr, enum debug_obj_state state, int fixups, int warnings) 831check_results(void *addr, enum debug_obj_state state, int fixups, int warnings)
779{ 832{
780 struct debug_bucket *db; 833 struct debug_bucket *db;
@@ -917,7 +970,7 @@ void __init debug_objects_early_init(void)
917/* 970/*
918 * Convert the statically allocated objects to dynamic ones: 971 * Convert the statically allocated objects to dynamic ones:
919 */ 972 */
920static int debug_objects_replace_static_objects(void) 973static int __init debug_objects_replace_static_objects(void)
921{ 974{
922 struct debug_bucket *db = obj_hash; 975 struct debug_bucket *db = obj_hash;
923 struct hlist_node *node, *tmp; 976 struct hlist_node *node, *tmp;
diff --git a/lib/hweight.c b/lib/hweight.c
index 63ee4eb1228d..3c79d50814cf 100644
--- a/lib/hweight.c
+++ b/lib/hweight.c
@@ -9,7 +9,7 @@
9 * The Hamming Weight of a number is the total number of bits set in it. 9 * The Hamming Weight of a number is the total number of bits set in it.
10 */ 10 */
11 11
12unsigned int hweight32(unsigned int w) 12unsigned int __sw_hweight32(unsigned int w)
13{ 13{
14#ifdef ARCH_HAS_FAST_MULTIPLIER 14#ifdef ARCH_HAS_FAST_MULTIPLIER
15 w -= (w >> 1) & 0x55555555; 15 w -= (w >> 1) & 0x55555555;
@@ -24,29 +24,30 @@ unsigned int hweight32(unsigned int w)
24 return (res + (res >> 16)) & 0x000000FF; 24 return (res + (res >> 16)) & 0x000000FF;
25#endif 25#endif
26} 26}
27EXPORT_SYMBOL(hweight32); 27EXPORT_SYMBOL(__sw_hweight32);
28 28
29unsigned int hweight16(unsigned int w) 29unsigned int __sw_hweight16(unsigned int w)
30{ 30{
31 unsigned int res = w - ((w >> 1) & 0x5555); 31 unsigned int res = w - ((w >> 1) & 0x5555);
32 res = (res & 0x3333) + ((res >> 2) & 0x3333); 32 res = (res & 0x3333) + ((res >> 2) & 0x3333);
33 res = (res + (res >> 4)) & 0x0F0F; 33 res = (res + (res >> 4)) & 0x0F0F;
34 return (res + (res >> 8)) & 0x00FF; 34 return (res + (res >> 8)) & 0x00FF;
35} 35}
36EXPORT_SYMBOL(hweight16); 36EXPORT_SYMBOL(__sw_hweight16);
37 37
38unsigned int hweight8(unsigned int w) 38unsigned int __sw_hweight8(unsigned int w)
39{ 39{
40 unsigned int res = w - ((w >> 1) & 0x55); 40 unsigned int res = w - ((w >> 1) & 0x55);
41 res = (res & 0x33) + ((res >> 2) & 0x33); 41 res = (res & 0x33) + ((res >> 2) & 0x33);
42 return (res + (res >> 4)) & 0x0F; 42 return (res + (res >> 4)) & 0x0F;
43} 43}
44EXPORT_SYMBOL(hweight8); 44EXPORT_SYMBOL(__sw_hweight8);
45 45
46unsigned long hweight64(__u64 w) 46unsigned long __sw_hweight64(__u64 w)
47{ 47{
48#if BITS_PER_LONG == 32 48#if BITS_PER_LONG == 32
49 return hweight32((unsigned int)(w >> 32)) + hweight32((unsigned int)w); 49 return __sw_hweight32((unsigned int)(w >> 32)) +
50 __sw_hweight32((unsigned int)w);
50#elif BITS_PER_LONG == 64 51#elif BITS_PER_LONG == 64
51#ifdef ARCH_HAS_FAST_MULTIPLIER 52#ifdef ARCH_HAS_FAST_MULTIPLIER
52 w -= (w >> 1) & 0x5555555555555555ul; 53 w -= (w >> 1) & 0x5555555555555555ul;
@@ -63,4 +64,4 @@ unsigned long hweight64(__u64 w)
63#endif 64#endif
64#endif 65#endif
65} 66}
66EXPORT_SYMBOL(hweight64); 67EXPORT_SYMBOL(__sw_hweight64);
diff --git a/lib/rbtree.c b/lib/rbtree.c
index e2aa3be29858..15e10b1afdd2 100644
--- a/lib/rbtree.c
+++ b/lib/rbtree.c
@@ -44,6 +44,11 @@ static void __rb_rotate_left(struct rb_node *node, struct rb_root *root)
44 else 44 else
45 root->rb_node = right; 45 root->rb_node = right;
46 rb_set_parent(node, right); 46 rb_set_parent(node, right);
47
48 if (root->augment_cb) {
49 root->augment_cb(node);
50 root->augment_cb(right);
51 }
47} 52}
48 53
49static void __rb_rotate_right(struct rb_node *node, struct rb_root *root) 54static void __rb_rotate_right(struct rb_node *node, struct rb_root *root)
@@ -67,12 +72,20 @@ static void __rb_rotate_right(struct rb_node *node, struct rb_root *root)
67 else 72 else
68 root->rb_node = left; 73 root->rb_node = left;
69 rb_set_parent(node, left); 74 rb_set_parent(node, left);
75
76 if (root->augment_cb) {
77 root->augment_cb(node);
78 root->augment_cb(left);
79 }
70} 80}
71 81
72void rb_insert_color(struct rb_node *node, struct rb_root *root) 82void rb_insert_color(struct rb_node *node, struct rb_root *root)
73{ 83{
74 struct rb_node *parent, *gparent; 84 struct rb_node *parent, *gparent;
75 85
86 if (root->augment_cb)
87 root->augment_cb(node);
88
76 while ((parent = rb_parent(node)) && rb_is_red(parent)) 89 while ((parent = rb_parent(node)) && rb_is_red(parent))
77 { 90 {
78 gparent = rb_parent(parent); 91 gparent = rb_parent(parent);
@@ -227,12 +240,15 @@ void rb_erase(struct rb_node *node, struct rb_root *root)
227 else 240 else
228 { 241 {
229 struct rb_node *old = node, *left; 242 struct rb_node *old = node, *left;
243 int old_parent_cb = 0;
244 int successor_parent_cb = 0;
230 245
231 node = node->rb_right; 246 node = node->rb_right;
232 while ((left = node->rb_left) != NULL) 247 while ((left = node->rb_left) != NULL)
233 node = left; 248 node = left;
234 249
235 if (rb_parent(old)) { 250 if (rb_parent(old)) {
251 old_parent_cb = 1;
236 if (rb_parent(old)->rb_left == old) 252 if (rb_parent(old)->rb_left == old)
237 rb_parent(old)->rb_left = node; 253 rb_parent(old)->rb_left = node;
238 else 254 else
@@ -247,8 +263,10 @@ void rb_erase(struct rb_node *node, struct rb_root *root)
247 if (parent == old) { 263 if (parent == old) {
248 parent = node; 264 parent = node;
249 } else { 265 } else {
266 successor_parent_cb = 1;
250 if (child) 267 if (child)
251 rb_set_parent(child, parent); 268 rb_set_parent(child, parent);
269
252 parent->rb_left = child; 270 parent->rb_left = child;
253 271
254 node->rb_right = old->rb_right; 272 node->rb_right = old->rb_right;
@@ -259,6 +277,24 @@ void rb_erase(struct rb_node *node, struct rb_root *root)
259 node->rb_left = old->rb_left; 277 node->rb_left = old->rb_left;
260 rb_set_parent(old->rb_left, node); 278 rb_set_parent(old->rb_left, node);
261 279
280 if (root->augment_cb) {
281 /*
282 * Here, three different nodes can have new children.
283 * The parent of the successor node that was selected
284 * to replace the node to be erased.
285 * The node that is getting erased and is now replaced
286 * by its successor.
287 * The parent of the node getting erased-replaced.
288 */
289 if (successor_parent_cb)
290 root->augment_cb(parent);
291
292 root->augment_cb(node);
293
294 if (old_parent_cb)
295 root->augment_cb(rb_parent(old));
296 }
297
262 goto color; 298 goto color;
263 } 299 }
264 300
@@ -267,15 +303,19 @@ void rb_erase(struct rb_node *node, struct rb_root *root)
267 303
268 if (child) 304 if (child)
269 rb_set_parent(child, parent); 305 rb_set_parent(child, parent);
270 if (parent) 306
271 { 307 if (parent) {
272 if (parent->rb_left == node) 308 if (parent->rb_left == node)
273 parent->rb_left = child; 309 parent->rb_left = child;
274 else 310 else
275 parent->rb_right = child; 311 parent->rb_right = child;
276 } 312
277 else 313 if (root->augment_cb)
314 root->augment_cb(parent);
315
316 } else {
278 root->rb_node = child; 317 root->rb_node = child;
318 }
279 319
280 color: 320 color:
281 if (color == RB_BLACK) 321 if (color == RB_BLACK)
diff --git a/mm/mlock.c b/mm/mlock.c
index 8f4e2dfceec1..3f82720e0515 100644
--- a/mm/mlock.c
+++ b/mm/mlock.c
@@ -607,44 +607,3 @@ void user_shm_unlock(size_t size, struct user_struct *user)
607 spin_unlock(&shmlock_user_lock); 607 spin_unlock(&shmlock_user_lock);
608 free_uid(user); 608 free_uid(user);
609} 609}
610
611int account_locked_memory(struct mm_struct *mm, struct rlimit *rlim,
612 size_t size)
613{
614 unsigned long lim, vm, pgsz;
615 int error = -ENOMEM;
616
617 pgsz = PAGE_ALIGN(size) >> PAGE_SHIFT;
618
619 down_write(&mm->mmap_sem);
620
621 lim = ACCESS_ONCE(rlim[RLIMIT_AS].rlim_cur) >> PAGE_SHIFT;
622 vm = mm->total_vm + pgsz;
623 if (lim < vm)
624 goto out;
625
626 lim = ACCESS_ONCE(rlim[RLIMIT_MEMLOCK].rlim_cur) >> PAGE_SHIFT;
627 vm = mm->locked_vm + pgsz;
628 if (lim < vm)
629 goto out;
630
631 mm->total_vm += pgsz;
632 mm->locked_vm += pgsz;
633
634 error = 0;
635 out:
636 up_write(&mm->mmap_sem);
637 return error;
638}
639
640void refund_locked_memory(struct mm_struct *mm, size_t size)
641{
642 unsigned long pgsz = PAGE_ALIGN(size) >> PAGE_SHIFT;
643
644 down_write(&mm->mmap_sem);
645
646 mm->total_vm -= pgsz;
647 mm->locked_vm -= pgsz;
648
649 up_write(&mm->mmap_sem);
650}
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index fe776c9ddeca..31e85d327aa2 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -602,12 +602,19 @@ static void copy_rtnl_link_stats(struct rtnl_link_stats *a,
602 a->tx_compressed = b->tx_compressed; 602 a->tx_compressed = b->tx_compressed;
603}; 603};
604 604
605/* All VF info */
605static inline int rtnl_vfinfo_size(const struct net_device *dev) 606static inline int rtnl_vfinfo_size(const struct net_device *dev)
606{ 607{
607 if (dev->dev.parent && dev_is_pci(dev->dev.parent)) 608 if (dev->dev.parent && dev_is_pci(dev->dev.parent)) {
608 return dev_num_vf(dev->dev.parent) * 609
609 sizeof(struct ifla_vf_info); 610 int num_vfs = dev_num_vf(dev->dev.parent);
610 else 611 size_t size = nlmsg_total_size(sizeof(struct nlattr));
612 size += nlmsg_total_size(num_vfs * sizeof(struct nlattr));
613 size += num_vfs * (sizeof(struct ifla_vf_mac) +
614 sizeof(struct ifla_vf_vlan) +
615 sizeof(struct ifla_vf_tx_rate));
616 return size;
617 } else
611 return 0; 618 return 0;
612} 619}
613 620
@@ -629,7 +636,7 @@ static inline size_t if_nlmsg_size(const struct net_device *dev)
629 + nla_total_size(1) /* IFLA_OPERSTATE */ 636 + nla_total_size(1) /* IFLA_OPERSTATE */
630 + nla_total_size(1) /* IFLA_LINKMODE */ 637 + nla_total_size(1) /* IFLA_LINKMODE */
631 + nla_total_size(4) /* IFLA_NUM_VF */ 638 + nla_total_size(4) /* IFLA_NUM_VF */
632 + nla_total_size(rtnl_vfinfo_size(dev)) /* IFLA_VFINFO */ 639 + rtnl_vfinfo_size(dev) /* IFLA_VFINFO_LIST */
633 + rtnl_link_get_size(dev); /* IFLA_LINKINFO */ 640 + rtnl_link_get_size(dev); /* IFLA_LINKINFO */
634} 641}
635 642
@@ -700,14 +707,37 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
700 707
701 if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent) { 708 if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent) {
702 int i; 709 int i;
703 struct ifla_vf_info ivi;
704 710
705 NLA_PUT_U32(skb, IFLA_NUM_VF, dev_num_vf(dev->dev.parent)); 711 struct nlattr *vfinfo, *vf;
706 for (i = 0; i < dev_num_vf(dev->dev.parent); i++) { 712 int num_vfs = dev_num_vf(dev->dev.parent);
713
714 NLA_PUT_U32(skb, IFLA_NUM_VF, num_vfs);
715 vfinfo = nla_nest_start(skb, IFLA_VFINFO_LIST);
716 if (!vfinfo)
717 goto nla_put_failure;
718 for (i = 0; i < num_vfs; i++) {
719 struct ifla_vf_info ivi;
720 struct ifla_vf_mac vf_mac;
721 struct ifla_vf_vlan vf_vlan;
722 struct ifla_vf_tx_rate vf_tx_rate;
707 if (dev->netdev_ops->ndo_get_vf_config(dev, i, &ivi)) 723 if (dev->netdev_ops->ndo_get_vf_config(dev, i, &ivi))
708 break; 724 break;
709 NLA_PUT(skb, IFLA_VFINFO, sizeof(ivi), &ivi); 725 vf_mac.vf = vf_vlan.vf = vf_tx_rate.vf = ivi.vf;
726 memcpy(vf_mac.mac, ivi.mac, sizeof(ivi.mac));
727 vf_vlan.vlan = ivi.vlan;
728 vf_vlan.qos = ivi.qos;
729 vf_tx_rate.rate = ivi.tx_rate;
730 vf = nla_nest_start(skb, IFLA_VF_INFO);
731 if (!vf) {
732 nla_nest_cancel(skb, vfinfo);
733 goto nla_put_failure;
734 }
735 NLA_PUT(skb, IFLA_VF_MAC, sizeof(vf_mac), &vf_mac);
736 NLA_PUT(skb, IFLA_VF_VLAN, sizeof(vf_vlan), &vf_vlan);
737 NLA_PUT(skb, IFLA_VF_TX_RATE, sizeof(vf_tx_rate), &vf_tx_rate);
738 nla_nest_end(skb, vf);
710 } 739 }
740 nla_nest_end(skb, vfinfo);
711 } 741 }
712 if (dev->rtnl_link_ops) { 742 if (dev->rtnl_link_ops) {
713 if (rtnl_link_fill(skb, dev) < 0) 743 if (rtnl_link_fill(skb, dev) < 0)
@@ -769,12 +799,7 @@ const struct nla_policy ifla_policy[IFLA_MAX+1] = {
769 [IFLA_LINKINFO] = { .type = NLA_NESTED }, 799 [IFLA_LINKINFO] = { .type = NLA_NESTED },
770 [IFLA_NET_NS_PID] = { .type = NLA_U32 }, 800 [IFLA_NET_NS_PID] = { .type = NLA_U32 },
771 [IFLA_IFALIAS] = { .type = NLA_STRING, .len = IFALIASZ-1 }, 801 [IFLA_IFALIAS] = { .type = NLA_STRING, .len = IFALIASZ-1 },
772 [IFLA_VF_MAC] = { .type = NLA_BINARY, 802 [IFLA_VFINFO_LIST] = {. type = NLA_NESTED },
773 .len = sizeof(struct ifla_vf_mac) },
774 [IFLA_VF_VLAN] = { .type = NLA_BINARY,
775 .len = sizeof(struct ifla_vf_vlan) },
776 [IFLA_VF_TX_RATE] = { .type = NLA_BINARY,
777 .len = sizeof(struct ifla_vf_tx_rate) },
778}; 803};
779EXPORT_SYMBOL(ifla_policy); 804EXPORT_SYMBOL(ifla_policy);
780 805
@@ -783,6 +808,19 @@ static const struct nla_policy ifla_info_policy[IFLA_INFO_MAX+1] = {
783 [IFLA_INFO_DATA] = { .type = NLA_NESTED }, 808 [IFLA_INFO_DATA] = { .type = NLA_NESTED },
784}; 809};
785 810
811static const struct nla_policy ifla_vfinfo_policy[IFLA_VF_INFO_MAX+1] = {
812 [IFLA_VF_INFO] = { .type = NLA_NESTED },
813};
814
815static const struct nla_policy ifla_vf_policy[IFLA_VF_MAX+1] = {
816 [IFLA_VF_MAC] = { .type = NLA_BINARY,
817 .len = sizeof(struct ifla_vf_mac) },
818 [IFLA_VF_VLAN] = { .type = NLA_BINARY,
819 .len = sizeof(struct ifla_vf_vlan) },
820 [IFLA_VF_TX_RATE] = { .type = NLA_BINARY,
821 .len = sizeof(struct ifla_vf_tx_rate) },
822};
823
786struct net *rtnl_link_get_net(struct net *src_net, struct nlattr *tb[]) 824struct net *rtnl_link_get_net(struct net *src_net, struct nlattr *tb[])
787{ 825{
788 struct net *net; 826 struct net *net;
@@ -812,6 +850,52 @@ static int validate_linkmsg(struct net_device *dev, struct nlattr *tb[])
812 return 0; 850 return 0;
813} 851}
814 852
853static int do_setvfinfo(struct net_device *dev, struct nlattr *attr)
854{
855 int rem, err = -EINVAL;
856 struct nlattr *vf;
857 const struct net_device_ops *ops = dev->netdev_ops;
858
859 nla_for_each_nested(vf, attr, rem) {
860 switch (nla_type(vf)) {
861 case IFLA_VF_MAC: {
862 struct ifla_vf_mac *ivm;
863 ivm = nla_data(vf);
864 err = -EOPNOTSUPP;
865 if (ops->ndo_set_vf_mac)
866 err = ops->ndo_set_vf_mac(dev, ivm->vf,
867 ivm->mac);
868 break;
869 }
870 case IFLA_VF_VLAN: {
871 struct ifla_vf_vlan *ivv;
872 ivv = nla_data(vf);
873 err = -EOPNOTSUPP;
874 if (ops->ndo_set_vf_vlan)
875 err = ops->ndo_set_vf_vlan(dev, ivv->vf,
876 ivv->vlan,
877 ivv->qos);
878 break;
879 }
880 case IFLA_VF_TX_RATE: {
881 struct ifla_vf_tx_rate *ivt;
882 ivt = nla_data(vf);
883 err = -EOPNOTSUPP;
884 if (ops->ndo_set_vf_tx_rate)
885 err = ops->ndo_set_vf_tx_rate(dev, ivt->vf,
886 ivt->rate);
887 break;
888 }
889 default:
890 err = -EINVAL;
891 break;
892 }
893 if (err)
894 break;
895 }
896 return err;
897}
898
815static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm, 899static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
816 struct nlattr **tb, char *ifname, int modified) 900 struct nlattr **tb, char *ifname, int modified)
817{ 901{
@@ -942,40 +1026,17 @@ static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
942 write_unlock_bh(&dev_base_lock); 1026 write_unlock_bh(&dev_base_lock);
943 } 1027 }
944 1028
945 if (tb[IFLA_VF_MAC]) { 1029 if (tb[IFLA_VFINFO_LIST]) {
946 struct ifla_vf_mac *ivm; 1030 struct nlattr *attr;
947 ivm = nla_data(tb[IFLA_VF_MAC]); 1031 int rem;
948 err = -EOPNOTSUPP; 1032 nla_for_each_nested(attr, tb[IFLA_VFINFO_LIST], rem) {
949 if (ops->ndo_set_vf_mac) 1033 if (nla_type(attr) != IFLA_VF_INFO)
950 err = ops->ndo_set_vf_mac(dev, ivm->vf, ivm->mac); 1034 goto errout;
951 if (err < 0) 1035 err = do_setvfinfo(dev, attr);
952 goto errout; 1036 if (err < 0)
953 modified = 1; 1037 goto errout;
954 } 1038 modified = 1;
955 1039 }
956 if (tb[IFLA_VF_VLAN]) {
957 struct ifla_vf_vlan *ivv;
958 ivv = nla_data(tb[IFLA_VF_VLAN]);
959 err = -EOPNOTSUPP;
960 if (ops->ndo_set_vf_vlan)
961 err = ops->ndo_set_vf_vlan(dev, ivv->vf,
962 ivv->vlan,
963 ivv->qos);
964 if (err < 0)
965 goto errout;
966 modified = 1;
967 }
968 err = 0;
969
970 if (tb[IFLA_VF_TX_RATE]) {
971 struct ifla_vf_tx_rate *ivt;
972 ivt = nla_data(tb[IFLA_VF_TX_RATE]);
973 err = -EOPNOTSUPP;
974 if (ops->ndo_set_vf_tx_rate)
975 err = ops->ndo_set_vf_tx_rate(dev, ivt->vf, ivt->rate);
976 if (err < 0)
977 goto errout;
978 modified = 1;
979 } 1040 }
980 err = 0; 1041 err = 0;
981 1042
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 0f8caf64caa3..296150b2a62f 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -2839,7 +2839,6 @@ static void __tcp_free_md5sig_pool(struct tcp_md5sig_pool * __percpu *pool)
2839 if (p->md5_desc.tfm) 2839 if (p->md5_desc.tfm)
2840 crypto_free_hash(p->md5_desc.tfm); 2840 crypto_free_hash(p->md5_desc.tfm);
2841 kfree(p); 2841 kfree(p);
2842 p = NULL;
2843 } 2842 }
2844 } 2843 }
2845 free_percpu(pool); 2844 free_percpu(pool);
@@ -2937,25 +2936,40 @@ retry:
2937 2936
2938EXPORT_SYMBOL(tcp_alloc_md5sig_pool); 2937EXPORT_SYMBOL(tcp_alloc_md5sig_pool);
2939 2938
2940struct tcp_md5sig_pool *__tcp_get_md5sig_pool(int cpu) 2939
2940/**
2941 * tcp_get_md5sig_pool - get md5sig_pool for this user
2942 *
2943 * We use percpu structure, so if we succeed, we exit with preemption
2944 * and BH disabled, to make sure another thread or softirq handling
2945 * wont try to get same context.
2946 */
2947struct tcp_md5sig_pool *tcp_get_md5sig_pool(void)
2941{ 2948{
2942 struct tcp_md5sig_pool * __percpu *p; 2949 struct tcp_md5sig_pool * __percpu *p;
2943 spin_lock_bh(&tcp_md5sig_pool_lock); 2950
2951 local_bh_disable();
2952
2953 spin_lock(&tcp_md5sig_pool_lock);
2944 p = tcp_md5sig_pool; 2954 p = tcp_md5sig_pool;
2945 if (p) 2955 if (p)
2946 tcp_md5sig_users++; 2956 tcp_md5sig_users++;
2947 spin_unlock_bh(&tcp_md5sig_pool_lock); 2957 spin_unlock(&tcp_md5sig_pool_lock);
2948 return (p ? *per_cpu_ptr(p, cpu) : NULL); 2958
2949} 2959 if (p)
2960 return *per_cpu_ptr(p, smp_processor_id());
2950 2961
2951EXPORT_SYMBOL(__tcp_get_md5sig_pool); 2962 local_bh_enable();
2963 return NULL;
2964}
2965EXPORT_SYMBOL(tcp_get_md5sig_pool);
2952 2966
2953void __tcp_put_md5sig_pool(void) 2967void tcp_put_md5sig_pool(void)
2954{ 2968{
2969 local_bh_enable();
2955 tcp_free_md5sig_pool(); 2970 tcp_free_md5sig_pool();
2956} 2971}
2957 2972EXPORT_SYMBOL(tcp_put_md5sig_pool);
2958EXPORT_SYMBOL(__tcp_put_md5sig_pool);
2959 2973
2960int tcp_md5_hash_header(struct tcp_md5sig_pool *hp, 2974int tcp_md5_hash_header(struct tcp_md5sig_pool *hp,
2961 struct tcphdr *th) 2975 struct tcphdr *th)
diff --git a/net/sctp/transport.c b/net/sctp/transport.c
index 4a368038d46f..165d54e07fcd 100644
--- a/net/sctp/transport.c
+++ b/net/sctp/transport.c
@@ -173,6 +173,10 @@ void sctp_transport_free(struct sctp_transport *transport)
173 del_timer(&transport->T3_rtx_timer)) 173 del_timer(&transport->T3_rtx_timer))
174 sctp_transport_put(transport); 174 sctp_transport_put(transport);
175 175
176 /* Delete the ICMP proto unreachable timer if it's active. */
177 if (timer_pending(&transport->proto_unreach_timer) &&
178 del_timer(&transport->proto_unreach_timer))
179 sctp_association_put(transport->asoc);
176 180
177 sctp_transport_put(transport); 181 sctp_transport_put(transport);
178} 182}
diff --git a/net/sunrpc/cache.c b/net/sunrpc/cache.c
index 39bddba53ba1..77970fe8bff2 100644
--- a/net/sunrpc/cache.c
+++ b/net/sunrpc/cache.c
@@ -28,6 +28,7 @@
28#include <linux/workqueue.h> 28#include <linux/workqueue.h>
29#include <linux/mutex.h> 29#include <linux/mutex.h>
30#include <linux/pagemap.h> 30#include <linux/pagemap.h>
31#include <linux/smp_lock.h>
31#include <asm/ioctls.h> 32#include <asm/ioctls.h>
32#include <linux/sunrpc/types.h> 33#include <linux/sunrpc/types.h>
33#include <linux/sunrpc/cache.h> 34#include <linux/sunrpc/cache.h>
@@ -1331,12 +1332,18 @@ static unsigned int cache_poll_procfs(struct file *filp, poll_table *wait)
1331 return cache_poll(filp, wait, cd); 1332 return cache_poll(filp, wait, cd);
1332} 1333}
1333 1334
1334static int cache_ioctl_procfs(struct inode *inode, struct file *filp, 1335static long cache_ioctl_procfs(struct file *filp,
1335 unsigned int cmd, unsigned long arg) 1336 unsigned int cmd, unsigned long arg)
1336{ 1337{
1338 long ret;
1339 struct inode *inode = filp->f_path.dentry->d_inode;
1337 struct cache_detail *cd = PDE(inode)->data; 1340 struct cache_detail *cd = PDE(inode)->data;
1338 1341
1339 return cache_ioctl(inode, filp, cmd, arg, cd); 1342 lock_kernel();
1343 ret = cache_ioctl(inode, filp, cmd, arg, cd);
1344 unlock_kernel();
1345
1346 return ret;
1340} 1347}
1341 1348
1342static int cache_open_procfs(struct inode *inode, struct file *filp) 1349static int cache_open_procfs(struct inode *inode, struct file *filp)
@@ -1359,7 +1366,7 @@ static const struct file_operations cache_file_operations_procfs = {
1359 .read = cache_read_procfs, 1366 .read = cache_read_procfs,
1360 .write = cache_write_procfs, 1367 .write = cache_write_procfs,
1361 .poll = cache_poll_procfs, 1368 .poll = cache_poll_procfs,
1362 .ioctl = cache_ioctl_procfs, /* for FIONREAD */ 1369 .unlocked_ioctl = cache_ioctl_procfs, /* for FIONREAD */
1363 .open = cache_open_procfs, 1370 .open = cache_open_procfs,
1364 .release = cache_release_procfs, 1371 .release = cache_release_procfs,
1365}; 1372};
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index f9bdf264473d..cbcd654215e6 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -245,3 +245,7 @@ quiet_cmd_lzo = LZO $@
245cmd_lzo = (cat $(filter-out FORCE,$^) | \ 245cmd_lzo = (cat $(filter-out FORCE,$^) | \
246 lzop -9 && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ 246 lzop -9 && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
247 (rm -f $@ ; false) 247 (rm -f $@ ; false)
248
249# misc stuff
250# ---------------------------------------------------------------------------
251quote:="
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
index 220213e603db..df90f31d14bf 100644
--- a/scripts/mod/file2alias.c
+++ b/scripts/mod/file2alias.c
@@ -796,6 +796,16 @@ static int do_platform_entry(const char *filename,
796 return 1; 796 return 1;
797} 797}
798 798
799/* Looks like: zorro:iN. */
800static int do_zorro_entry(const char *filename, struct zorro_device_id *id,
801 char *alias)
802{
803 id->id = TO_NATIVE(id->id);
804 strcpy(alias, "zorro:");
805 ADD(alias, "i", id->id != ZORRO_WILDCARD, id->id);
806 return 1;
807}
808
799/* Ignore any prefix, eg. some architectures prepend _ */ 809/* Ignore any prefix, eg. some architectures prepend _ */
800static inline int sym_is(const char *symbol, const char *name) 810static inline int sym_is(const char *symbol, const char *name)
801{ 811{
@@ -943,6 +953,10 @@ void handle_moddevtable(struct module *mod, struct elf_info *info,
943 do_table(symval, sym->st_size, 953 do_table(symval, sym->st_size,
944 sizeof(struct platform_device_id), "platform", 954 sizeof(struct platform_device_id), "platform",
945 do_platform_entry, mod); 955 do_platform_entry, mod);
956 else if (sym_is(symname, "__mod_zorro_device_table"))
957 do_table(symval, sym->st_size,
958 sizeof(struct zorro_device_id), "zorro",
959 do_zorro_entry, mod);
946 free(zeros); 960 free(zeros);
947} 961}
948 962
diff --git a/sound/drivers/pcsp/pcsp.h b/sound/drivers/pcsp/pcsp.h
index 1e123077923d..4ff6c8cc5077 100644
--- a/sound/drivers/pcsp/pcsp.h
+++ b/sound/drivers/pcsp/pcsp.h
@@ -16,7 +16,7 @@
16#include <asm/i8253.h> 16#include <asm/i8253.h>
17#else 17#else
18#include <asm/8253pit.h> 18#include <asm/8253pit.h>
19static DEFINE_SPINLOCK(i8253_lock); 19static DEFINE_RAW_SPINLOCK(i8253_lock);
20#endif 20#endif
21 21
22#define PCSP_SOUND_VERSION 0x400 /* read 4.00 */ 22#define PCSP_SOUND_VERSION 0x400 /* read 4.00 */
diff --git a/sound/drivers/pcsp/pcsp_input.c b/sound/drivers/pcsp/pcsp_input.c
index 0444cdeb4bec..b5e2b54c2604 100644
--- a/sound/drivers/pcsp/pcsp_input.c
+++ b/sound/drivers/pcsp/pcsp_input.c
@@ -21,7 +21,7 @@ static void pcspkr_do_sound(unsigned int count)
21{ 21{
22 unsigned long flags; 22 unsigned long flags;
23 23
24 spin_lock_irqsave(&i8253_lock, flags); 24 raw_spin_lock_irqsave(&i8253_lock, flags);
25 25
26 if (count) { 26 if (count) {
27 /* set command for counter 2, 2 byte write */ 27 /* set command for counter 2, 2 byte write */
@@ -36,7 +36,7 @@ static void pcspkr_do_sound(unsigned int count)
36 outb(inb_p(0x61) & 0xFC, 0x61); 36 outb(inb_p(0x61) & 0xFC, 0x61);
37 } 37 }
38 38
39 spin_unlock_irqrestore(&i8253_lock, flags); 39 raw_spin_unlock_irqrestore(&i8253_lock, flags);
40} 40}
41 41
42void pcspkr_stop_sound(void) 42void pcspkr_stop_sound(void)
diff --git a/sound/drivers/pcsp/pcsp_lib.c b/sound/drivers/pcsp/pcsp_lib.c
index d77ffa9a9387..ce9e7d170c0d 100644
--- a/sound/drivers/pcsp/pcsp_lib.c
+++ b/sound/drivers/pcsp/pcsp_lib.c
@@ -66,7 +66,7 @@ static u64 pcsp_timer_update(struct snd_pcsp *chip)
66 timer_cnt = val * CUR_DIV() / 256; 66 timer_cnt = val * CUR_DIV() / 256;
67 67
68 if (timer_cnt && chip->enable) { 68 if (timer_cnt && chip->enable) {
69 spin_lock_irqsave(&i8253_lock, flags); 69 raw_spin_lock_irqsave(&i8253_lock, flags);
70 if (!nforce_wa) { 70 if (!nforce_wa) {
71 outb_p(chip->val61, 0x61); 71 outb_p(chip->val61, 0x61);
72 outb_p(timer_cnt, 0x42); 72 outb_p(timer_cnt, 0x42);
@@ -75,7 +75,7 @@ static u64 pcsp_timer_update(struct snd_pcsp *chip)
75 outb(chip->val61 ^ 2, 0x61); 75 outb(chip->val61 ^ 2, 0x61);
76 chip->thalf = 1; 76 chip->thalf = 1;
77 } 77 }
78 spin_unlock_irqrestore(&i8253_lock, flags); 78 raw_spin_unlock_irqrestore(&i8253_lock, flags);
79 } 79 }
80 80
81 chip->ns_rem = PCSP_PERIOD_NS(); 81 chip->ns_rem = PCSP_PERIOD_NS();
@@ -159,10 +159,10 @@ static int pcsp_start_playing(struct snd_pcsp *chip)
159 return -EIO; 159 return -EIO;
160 } 160 }
161 161
162 spin_lock(&i8253_lock); 162 raw_spin_lock(&i8253_lock);
163 chip->val61 = inb(0x61) | 0x03; 163 chip->val61 = inb(0x61) | 0x03;
164 outb_p(0x92, 0x43); /* binary, mode 1, LSB only, ch 2 */ 164 outb_p(0x92, 0x43); /* binary, mode 1, LSB only, ch 2 */
165 spin_unlock(&i8253_lock); 165 raw_spin_unlock(&i8253_lock);
166 atomic_set(&chip->timer_active, 1); 166 atomic_set(&chip->timer_active, 1);
167 chip->thalf = 0; 167 chip->thalf = 0;
168 168
@@ -179,11 +179,11 @@ static void pcsp_stop_playing(struct snd_pcsp *chip)
179 return; 179 return;
180 180
181 atomic_set(&chip->timer_active, 0); 181 atomic_set(&chip->timer_active, 0);
182 spin_lock(&i8253_lock); 182 raw_spin_lock(&i8253_lock);
183 /* restore the timer */ 183 /* restore the timer */
184 outb_p(0xb6, 0x43); /* binary, mode 3, LSB/MSB, ch 2 */ 184 outb_p(0xb6, 0x43); /* binary, mode 3, LSB/MSB, ch 2 */
185 outb(chip->val61 & 0xFC, 0x61); 185 outb(chip->val61 & 0xFC, 0x61);
186 spin_unlock(&i8253_lock); 186 raw_spin_unlock(&i8253_lock);
187} 187}
188 188
189/* 189/*
diff --git a/sound/oss/dmasound/dmasound_paula.c b/sound/oss/dmasound/dmasound_paula.c
index bb14e4c67e89..87910e992133 100644
--- a/sound/oss/dmasound/dmasound_paula.c
+++ b/sound/oss/dmasound/dmasound_paula.c
@@ -21,6 +21,7 @@
21#include <linux/ioport.h> 21#include <linux/ioport.h>
22#include <linux/soundcard.h> 22#include <linux/soundcard.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/platform_device.h>
24 25
25#include <asm/uaccess.h> 26#include <asm/uaccess.h>
26#include <asm/setup.h> 27#include <asm/setup.h>
@@ -710,31 +711,41 @@ static MACHINE machAmiga = {
710/*** Config & Setup **********************************************************/ 711/*** Config & Setup **********************************************************/
711 712
712 713
713static int __init dmasound_paula_init(void) 714static int __init amiga_audio_probe(struct platform_device *pdev)
714{ 715{
715 int err; 716 dmasound.mach = machAmiga;
716 717 dmasound.mach.default_hard = def_hard ;
717 if (MACH_IS_AMIGA && AMIGAHW_PRESENT(AMI_AUDIO)) { 718 dmasound.mach.default_soft = def_soft ;
718 if (!request_mem_region(CUSTOM_PHYSADDR+0xa0, 0x40, 719 return dmasound_init();
719 "dmasound [Paula]"))
720 return -EBUSY;
721 dmasound.mach = machAmiga;
722 dmasound.mach.default_hard = def_hard ;
723 dmasound.mach.default_soft = def_soft ;
724 err = dmasound_init();
725 if (err)
726 release_mem_region(CUSTOM_PHYSADDR+0xa0, 0x40);
727 return err;
728 } else
729 return -ENODEV;
730} 720}
731 721
732static void __exit dmasound_paula_cleanup(void) 722static int __exit amiga_audio_remove(struct platform_device *pdev)
733{ 723{
734 dmasound_deinit(); 724 dmasound_deinit();
735 release_mem_region(CUSTOM_PHYSADDR+0xa0, 0x40); 725 return 0;
726}
727
728static struct platform_driver amiga_audio_driver = {
729 .remove = __exit_p(amiga_audio_remove),
730 .driver = {
731 .name = "amiga-audio",
732 .owner = THIS_MODULE,
733 },
734};
735
736static int __init amiga_audio_init(void)
737{
738 return platform_driver_probe(&amiga_audio_driver, amiga_audio_probe);
736} 739}
737 740
738module_init(dmasound_paula_init); 741module_init(amiga_audio_init);
739module_exit(dmasound_paula_cleanup); 742
743static void __exit amiga_audio_exit(void)
744{
745 platform_driver_unregister(&amiga_audio_driver);
746}
747
748module_exit(amiga_audio_exit);
749
740MODULE_LICENSE("GPL"); 750MODULE_LICENSE("GPL");
751MODULE_ALIAS("platform:amiga-audio");
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index 376e14a9c273..78e612100782 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -23,6 +23,7 @@ config SND_PXA2XX_SOC_I2S
23 23
24config SND_PXA_SOC_SSP 24config SND_PXA_SOC_SSP
25 tristate 25 tristate
26 select PXA_SSP
26 27
27config SND_PXA2XX_SOC_CORGI 28config SND_PXA2XX_SOC_CORGI
28 tristate "SoC Audio support for Sharp Zaurus SL-C7x0" 29 tristate "SoC Audio support for Sharp Zaurus SL-C7x0"
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index 544fd9566f4d..a1fd23e0e3d0 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -32,9 +32,8 @@
32 32
33#include <mach/hardware.h> 33#include <mach/hardware.h>
34#include <mach/dma.h> 34#include <mach/dma.h>
35#include <mach/regs-ssp.h>
36#include <mach/audio.h> 35#include <mach/audio.h>
37#include <mach/ssp.h> 36#include <plat/ssp.h>
38 37
39#include "pxa2xx-pcm.h" 38#include "pxa2xx-pcm.h"
40#include "pxa-ssp.h" 39#include "pxa-ssp.h"
@@ -57,15 +56,15 @@ struct ssp_priv {
57static void dump_registers(struct ssp_device *ssp) 56static void dump_registers(struct ssp_device *ssp)
58{ 57{
59 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n", 58 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
60 ssp_read_reg(ssp, SSCR0), ssp_read_reg(ssp, SSCR1), 59 pxa_ssp_read_reg(ssp, SSCR0), pxa_ssp_read_reg(ssp, SSCR1),
61 ssp_read_reg(ssp, SSTO)); 60 pxa_ssp_read_reg(ssp, SSTO));
62 61
63 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n", 62 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
64 ssp_read_reg(ssp, SSPSP), ssp_read_reg(ssp, SSSR), 63 pxa_ssp_read_reg(ssp, SSPSP), pxa_ssp_read_reg(ssp, SSSR),
65 ssp_read_reg(ssp, SSACD)); 64 pxa_ssp_read_reg(ssp, SSACD));
66} 65}
67 66
68static void ssp_enable(struct ssp_device *ssp) 67static void pxa_ssp_enable(struct ssp_device *ssp)
69{ 68{
70 uint32_t sscr0; 69 uint32_t sscr0;
71 70
@@ -73,7 +72,7 @@ static void ssp_enable(struct ssp_device *ssp)
73 __raw_writel(sscr0, ssp->mmio_base + SSCR0); 72 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
74} 73}
75 74
76static void ssp_disable(struct ssp_device *ssp) 75static void pxa_ssp_disable(struct ssp_device *ssp)
77{ 76{
78 uint32_t sscr0; 77 uint32_t sscr0;
79 78
@@ -87,7 +86,7 @@ struct pxa2xx_pcm_dma_data {
87}; 86};
88 87
89static struct pxa2xx_pcm_dma_params * 88static struct pxa2xx_pcm_dma_params *
90ssp_get_dma_params(struct ssp_device *ssp, int width4, int out) 89pxa_ssp_get_dma_params(struct ssp_device *ssp, int width4, int out)
91{ 90{
92 struct pxa2xx_pcm_dma_data *dma; 91 struct pxa2xx_pcm_dma_data *dma;
93 92
@@ -119,7 +118,7 @@ static int pxa_ssp_startup(struct snd_pcm_substream *substream,
119 118
120 if (!cpu_dai->active) { 119 if (!cpu_dai->active) {
121 clk_enable(ssp->clk); 120 clk_enable(ssp->clk);
122 ssp_disable(ssp); 121 pxa_ssp_disable(ssp);
123 } 122 }
124 123
125 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream)); 124 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream));
@@ -137,7 +136,7 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
137 struct ssp_device *ssp = priv->ssp; 136 struct ssp_device *ssp = priv->ssp;
138 137
139 if (!cpu_dai->active) { 138 if (!cpu_dai->active) {
140 ssp_disable(ssp); 139 pxa_ssp_disable(ssp);
141 clk_disable(ssp->clk); 140 clk_disable(ssp->clk);
142 } 141 }
143 142
@@ -160,7 +159,7 @@ static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
160 priv->to = __raw_readl(ssp->mmio_base + SSTO); 159 priv->to = __raw_readl(ssp->mmio_base + SSTO);
161 priv->psp = __raw_readl(ssp->mmio_base + SSPSP); 160 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
162 161
163 ssp_disable(ssp); 162 pxa_ssp_disable(ssp);
164 clk_disable(ssp->clk); 163 clk_disable(ssp->clk);
165 return 0; 164 return 0;
166} 165}
@@ -180,7 +179,7 @@ static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
180 __raw_writel(priv->psp, ssp->mmio_base + SSPSP); 179 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
181 180
182 if (cpu_dai->active) 181 if (cpu_dai->active)
183 ssp_enable(ssp); 182 pxa_ssp_enable(ssp);
184 else 183 else
185 clk_disable(ssp->clk); 184 clk_disable(ssp->clk);
186 185
@@ -196,9 +195,9 @@ static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
196 * ssp_set_clkdiv - set SSP clock divider 195 * ssp_set_clkdiv - set SSP clock divider
197 * @div: serial clock rate divider 196 * @div: serial clock rate divider
198 */ 197 */
199static void ssp_set_scr(struct ssp_device *ssp, u32 div) 198static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
200{ 199{
201 u32 sscr0 = ssp_read_reg(ssp, SSCR0); 200 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
202 201
203 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) { 202 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
204 sscr0 &= ~0x0000ff00; 203 sscr0 &= ~0x0000ff00;
@@ -207,15 +206,15 @@ static void ssp_set_scr(struct ssp_device *ssp, u32 div)
207 sscr0 &= ~0x000fff00; 206 sscr0 &= ~0x000fff00;
208 sscr0 |= (div - 1) << 8; /* 1..4096 */ 207 sscr0 |= (div - 1) << 8; /* 1..4096 */
209 } 208 }
210 ssp_write_reg(ssp, SSCR0, sscr0); 209 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
211} 210}
212 211
213/** 212/**
214 * ssp_get_clkdiv - get SSP clock divider 213 * pxa_ssp_get_clkdiv - get SSP clock divider
215 */ 214 */
216static u32 ssp_get_scr(struct ssp_device *ssp) 215static u32 pxa_ssp_get_scr(struct ssp_device *ssp)
217{ 216{
218 u32 sscr0 = ssp_read_reg(ssp, SSCR0); 217 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
219 u32 div; 218 u32 div;
220 219
221 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) 220 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
@@ -235,7 +234,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
235 struct ssp_device *ssp = priv->ssp; 234 struct ssp_device *ssp = priv->ssp;
236 int val; 235 int val;
237 236
238 u32 sscr0 = ssp_read_reg(ssp, SSCR0) & 237 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
239 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); 238 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
240 239
241 dev_dbg(&ssp->pdev->dev, 240 dev_dbg(&ssp->pdev->dev,
@@ -263,7 +262,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
263 break; 262 break;
264 case PXA_SSP_CLK_AUDIO: 263 case PXA_SSP_CLK_AUDIO:
265 priv->sysclk = 0; 264 priv->sysclk = 0;
266 ssp_set_scr(ssp, 1); 265 pxa_ssp_set_scr(ssp, 1);
267 sscr0 |= SSCR0_ACS; 266 sscr0 |= SSCR0_ACS;
268 break; 267 break;
269 default: 268 default:
@@ -274,8 +273,8 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
274 * on PXA2xx. On PXA3xx it must be enabled when doing so. */ 273 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
275 if (!cpu_is_pxa3xx()) 274 if (!cpu_is_pxa3xx())
276 clk_disable(ssp->clk); 275 clk_disable(ssp->clk);
277 val = ssp_read_reg(ssp, SSCR0) | sscr0; 276 val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
278 ssp_write_reg(ssp, SSCR0, val); 277 pxa_ssp_write_reg(ssp, SSCR0, val);
279 if (!cpu_is_pxa3xx()) 278 if (!cpu_is_pxa3xx())
280 clk_enable(ssp->clk); 279 clk_enable(ssp->clk);
281 280
@@ -294,11 +293,11 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
294 293
295 switch (div_id) { 294 switch (div_id) {
296 case PXA_SSP_AUDIO_DIV_ACDS: 295 case PXA_SSP_AUDIO_DIV_ACDS:
297 val = (ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div); 296 val = (pxa_ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
298 ssp_write_reg(ssp, SSACD, val); 297 pxa_ssp_write_reg(ssp, SSACD, val);
299 break; 298 break;
300 case PXA_SSP_AUDIO_DIV_SCDB: 299 case PXA_SSP_AUDIO_DIV_SCDB:
301 val = ssp_read_reg(ssp, SSACD); 300 val = pxa_ssp_read_reg(ssp, SSACD);
302 val &= ~SSACD_SCDB; 301 val &= ~SSACD_SCDB;
303#if defined(CONFIG_PXA3xx) 302#if defined(CONFIG_PXA3xx)
304 if (cpu_is_pxa3xx()) 303 if (cpu_is_pxa3xx())
@@ -321,10 +320,10 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
321 default: 320 default:
322 return -EINVAL; 321 return -EINVAL;
323 } 322 }
324 ssp_write_reg(ssp, SSACD, val); 323 pxa_ssp_write_reg(ssp, SSACD, val);
325 break; 324 break;
326 case PXA_SSP_DIV_SCR: 325 case PXA_SSP_DIV_SCR:
327 ssp_set_scr(ssp, div); 326 pxa_ssp_set_scr(ssp, div);
328 break; 327 break;
329 default: 328 default:
330 return -ENODEV; 329 return -ENODEV;
@@ -341,11 +340,11 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
341{ 340{
342 struct ssp_priv *priv = cpu_dai->private_data; 341 struct ssp_priv *priv = cpu_dai->private_data;
343 struct ssp_device *ssp = priv->ssp; 342 struct ssp_device *ssp = priv->ssp;
344 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70; 343 u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
345 344
346#if defined(CONFIG_PXA3xx) 345#if defined(CONFIG_PXA3xx)
347 if (cpu_is_pxa3xx()) 346 if (cpu_is_pxa3xx())
348 ssp_write_reg(ssp, SSACDD, 0); 347 pxa_ssp_write_reg(ssp, SSACDD, 0);
349#endif 348#endif
350 349
351 switch (freq_out) { 350 switch (freq_out) {
@@ -383,7 +382,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
383 val = tmp; 382 val = tmp;
384 383
385 val = (val << 16) | 64; 384 val = (val << 16) | 64;
386 ssp_write_reg(ssp, SSACDD, val); 385 pxa_ssp_write_reg(ssp, SSACDD, val);
387 386
388 ssacd |= (0x6 << 4); 387 ssacd |= (0x6 << 4);
389 388
@@ -397,7 +396,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
397 return -EINVAL; 396 return -EINVAL;
398 } 397 }
399 398
400 ssp_write_reg(ssp, SSACD, ssacd); 399 pxa_ssp_write_reg(ssp, SSACD, ssacd);
401 400
402 return 0; 401 return 0;
403} 402}
@@ -412,7 +411,7 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
412 struct ssp_device *ssp = priv->ssp; 411 struct ssp_device *ssp = priv->ssp;
413 u32 sscr0; 412 u32 sscr0;
414 413
415 sscr0 = ssp_read_reg(ssp, SSCR0); 414 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
416 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS); 415 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
417 416
418 /* set slot width */ 417 /* set slot width */
@@ -429,10 +428,10 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
429 sscr0 |= SSCR0_SlotsPerFrm(slots); 428 sscr0 |= SSCR0_SlotsPerFrm(slots);
430 429
431 /* set active slot mask */ 430 /* set active slot mask */
432 ssp_write_reg(ssp, SSTSA, tx_mask); 431 pxa_ssp_write_reg(ssp, SSTSA, tx_mask);
433 ssp_write_reg(ssp, SSRSA, rx_mask); 432 pxa_ssp_write_reg(ssp, SSRSA, rx_mask);
434 } 433 }
435 ssp_write_reg(ssp, SSCR0, sscr0); 434 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
436 435
437 return 0; 436 return 0;
438} 437}
@@ -447,12 +446,12 @@ static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
447 struct ssp_device *ssp = priv->ssp; 446 struct ssp_device *ssp = priv->ssp;
448 u32 sscr1; 447 u32 sscr1;
449 448
450 sscr1 = ssp_read_reg(ssp, SSCR1); 449 sscr1 = pxa_ssp_read_reg(ssp, SSCR1);
451 if (tristate) 450 if (tristate)
452 sscr1 &= ~SSCR1_TTE; 451 sscr1 &= ~SSCR1_TTE;
453 else 452 else
454 sscr1 |= SSCR1_TTE; 453 sscr1 |= SSCR1_TTE;
455 ssp_write_reg(ssp, SSCR1, sscr1); 454 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
456 455
457 return 0; 456 return 0;
458} 457}
@@ -476,14 +475,14 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
476 return 0; 475 return 0;
477 476
478 /* we can only change the settings if the port is not in use */ 477 /* we can only change the settings if the port is not in use */
479 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) { 478 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
480 dev_err(&ssp->pdev->dev, 479 dev_err(&ssp->pdev->dev,
481 "can't change hardware dai format: stream is in use"); 480 "can't change hardware dai format: stream is in use");
482 return -EINVAL; 481 return -EINVAL;
483 } 482 }
484 483
485 /* reset port settings */ 484 /* reset port settings */
486 sscr0 = ssp_read_reg(ssp, SSCR0) & 485 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
487 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); 486 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
488 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7); 487 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
489 sspsp = 0; 488 sspsp = 0;
@@ -535,9 +534,9 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
535 return -EINVAL; 534 return -EINVAL;
536 } 535 }
537 536
538 ssp_write_reg(ssp, SSCR0, sscr0); 537 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
539 ssp_write_reg(ssp, SSCR1, sscr1); 538 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
540 ssp_write_reg(ssp, SSPSP, sspsp); 539 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
541 540
542 dump_registers(ssp); 541 dump_registers(ssp);
543 542
@@ -566,7 +565,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
566 u32 sscr0; 565 u32 sscr0;
567 u32 sspsp; 566 u32 sspsp;
568 int width = snd_pcm_format_physical_width(params_format(params)); 567 int width = snd_pcm_format_physical_width(params_format(params));
569 int ttsa = ssp_read_reg(ssp, SSTSA) & 0xf; 568 int ttsa = pxa_ssp_read_reg(ssp, SSTSA) & 0xf;
570 struct pxa2xx_pcm_dma_params *dma_data; 569 struct pxa2xx_pcm_dma_params *dma_data;
571 570
572 dma_data = snd_soc_dai_get_dma_data(dai, substream); 571 dma_data = snd_soc_dai_get_dma_data(dai, substream);
@@ -578,22 +577,22 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
578 * to force 16-bit frame width on the wire (for S16_LE), even 577 * to force 16-bit frame width on the wire (for S16_LE), even
579 * with two channels. Use 16-bit DMA transfers for this case. 578 * with two channels. Use 16-bit DMA transfers for this case.
580 */ 579 */
581 dma_data = ssp_get_dma_params(ssp, 580 dma_data = pxa_ssp_get_dma_params(ssp,
582 ((chn == 2) && (ttsa != 1)) || (width == 32), 581 ((chn == 2) && (ttsa != 1)) || (width == 32),
583 substream->stream == SNDRV_PCM_STREAM_PLAYBACK); 582 substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
584 583
585 snd_soc_dai_set_dma_data(dai, substream, dma_data); 584 snd_soc_dai_set_dma_data(dai, substream, dma_data);
586 585
587 /* we can only change the settings if the port is not in use */ 586 /* we can only change the settings if the port is not in use */
588 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) 587 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
589 return 0; 588 return 0;
590 589
591 /* clear selected SSP bits */ 590 /* clear selected SSP bits */
592 sscr0 = ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS); 591 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
593 ssp_write_reg(ssp, SSCR0, sscr0); 592 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
594 593
595 /* bit size */ 594 /* bit size */
596 sscr0 = ssp_read_reg(ssp, SSCR0); 595 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
597 switch (params_format(params)) { 596 switch (params_format(params)) {
598 case SNDRV_PCM_FORMAT_S16_LE: 597 case SNDRV_PCM_FORMAT_S16_LE:
599#ifdef CONFIG_PXA3xx 598#ifdef CONFIG_PXA3xx
@@ -609,13 +608,13 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
609 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16)); 608 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
610 break; 609 break;
611 } 610 }
612 ssp_write_reg(ssp, SSCR0, sscr0); 611 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
613 612
614 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 613 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
615 case SND_SOC_DAIFMT_I2S: 614 case SND_SOC_DAIFMT_I2S:
616 sspsp = ssp_read_reg(ssp, SSPSP); 615 sspsp = pxa_ssp_read_reg(ssp, SSPSP);
617 616
618 if ((ssp_get_scr(ssp) == 4) && (width == 16)) { 617 if ((pxa_ssp_get_scr(ssp) == 4) && (width == 16)) {
619 /* This is a special case where the bitclk is 64fs 618 /* This is a special case where the bitclk is 64fs
620 * and we're not dealing with 2*32 bits of audio 619 * and we're not dealing with 2*32 bits of audio
621 * samples. 620 * samples.
@@ -649,7 +648,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
649 sspsp |= SSPSP_DMYSTRT(1); 648 sspsp |= SSPSP_DMYSTRT(1);
650 } 649 }
651 650
652 ssp_write_reg(ssp, SSPSP, sspsp); 651 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
653 break; 652 break;
654 default: 653 default:
655 break; 654 break;
@@ -680,45 +679,45 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
680 679
681 switch (cmd) { 680 switch (cmd) {
682 case SNDRV_PCM_TRIGGER_RESUME: 681 case SNDRV_PCM_TRIGGER_RESUME:
683 ssp_enable(ssp); 682 pxa_ssp_enable(ssp);
684 break; 683 break;
685 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 684 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
686 val = ssp_read_reg(ssp, SSCR1); 685 val = pxa_ssp_read_reg(ssp, SSCR1);
687 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 686 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
688 val |= SSCR1_TSRE; 687 val |= SSCR1_TSRE;
689 else 688 else
690 val |= SSCR1_RSRE; 689 val |= SSCR1_RSRE;
691 ssp_write_reg(ssp, SSCR1, val); 690 pxa_ssp_write_reg(ssp, SSCR1, val);
692 val = ssp_read_reg(ssp, SSSR); 691 val = pxa_ssp_read_reg(ssp, SSSR);
693 ssp_write_reg(ssp, SSSR, val); 692 pxa_ssp_write_reg(ssp, SSSR, val);
694 break; 693 break;
695 case SNDRV_PCM_TRIGGER_START: 694 case SNDRV_PCM_TRIGGER_START:
696 val = ssp_read_reg(ssp, SSCR1); 695 val = pxa_ssp_read_reg(ssp, SSCR1);
697 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 696 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
698 val |= SSCR1_TSRE; 697 val |= SSCR1_TSRE;
699 else 698 else
700 val |= SSCR1_RSRE; 699 val |= SSCR1_RSRE;
701 ssp_write_reg(ssp, SSCR1, val); 700 pxa_ssp_write_reg(ssp, SSCR1, val);
702 ssp_enable(ssp); 701 pxa_ssp_enable(ssp);
703 break; 702 break;
704 case SNDRV_PCM_TRIGGER_STOP: 703 case SNDRV_PCM_TRIGGER_STOP:
705 val = ssp_read_reg(ssp, SSCR1); 704 val = pxa_ssp_read_reg(ssp, SSCR1);
706 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 705 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
707 val &= ~SSCR1_TSRE; 706 val &= ~SSCR1_TSRE;
708 else 707 else
709 val &= ~SSCR1_RSRE; 708 val &= ~SSCR1_RSRE;
710 ssp_write_reg(ssp, SSCR1, val); 709 pxa_ssp_write_reg(ssp, SSCR1, val);
711 break; 710 break;
712 case SNDRV_PCM_TRIGGER_SUSPEND: 711 case SNDRV_PCM_TRIGGER_SUSPEND:
713 ssp_disable(ssp); 712 pxa_ssp_disable(ssp);
714 break; 713 break;
715 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 714 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
716 val = ssp_read_reg(ssp, SSCR1); 715 val = pxa_ssp_read_reg(ssp, SSCR1);
717 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 716 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
718 val &= ~SSCR1_TSRE; 717 val &= ~SSCR1_TSRE;
719 else 718 else
720 val &= ~SSCR1_RSRE; 719 val &= ~SSCR1_RSRE;
721 ssp_write_reg(ssp, SSCR1, val); 720 pxa_ssp_write_reg(ssp, SSCR1, val);
722 break; 721 break;
723 722
724 default: 723 default:
@@ -740,7 +739,7 @@ static int pxa_ssp_probe(struct platform_device *pdev,
740 if (!priv) 739 if (!priv)
741 return -ENOMEM; 740 return -ENOMEM;
742 741
743 priv->ssp = ssp_request(dai->id + 1, "SoC audio"); 742 priv->ssp = pxa_ssp_request(dai->id + 1, "SoC audio");
744 if (priv->ssp == NULL) { 743 if (priv->ssp == NULL) {
745 ret = -ENODEV; 744 ret = -ENODEV;
746 goto err_priv; 745 goto err_priv;
@@ -760,7 +759,7 @@ static void pxa_ssp_remove(struct platform_device *pdev,
760 struct snd_soc_dai *dai) 759 struct snd_soc_dai *dai)
761{ 760{
762 struct ssp_priv *priv = dai->private_data; 761 struct ssp_priv *priv = dai->private_data;
763 ssp_free(priv->ssp); 762 pxa_ssp_free(priv->ssp);
764} 763}
765 764
766#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 765#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
diff --git a/tools/perf/Documentation/perf-annotate.txt b/tools/perf/Documentation/perf-annotate.txt
index c9dcade06831..5164a655c39f 100644
--- a/tools/perf/Documentation/perf-annotate.txt
+++ b/tools/perf/Documentation/perf-annotate.txt
@@ -1,5 +1,5 @@
1perf-annotate(1) 1perf-annotate(1)
2============== 2================
3 3
4NAME 4NAME
5---- 5----
diff --git a/tools/perf/Documentation/perf-bench.txt b/tools/perf/Documentation/perf-bench.txt
index ae525ac5a2ce..a3dbadb26ef5 100644
--- a/tools/perf/Documentation/perf-bench.txt
+++ b/tools/perf/Documentation/perf-bench.txt
@@ -1,5 +1,5 @@
1perf-bench(1) 1perf-bench(1)
2============ 2=============
3 3
4NAME 4NAME
5---- 5----
@@ -19,12 +19,12 @@ COMMON OPTIONS
19-f:: 19-f::
20--format=:: 20--format=::
21Specify format style. 21Specify format style.
22Current available format styles are, 22Current available format styles are:
23 23
24'default':: 24'default'::
25Default style. This is mainly for human reading. 25Default style. This is mainly for human reading.
26--------------------- 26---------------------
27% perf bench sched pipe # with no style specify 27% perf bench sched pipe # with no style specified
28(executing 1000000 pipe operations between two tasks) 28(executing 1000000 pipe operations between two tasks)
29 Total time:5.855 sec 29 Total time:5.855 sec
30 5.855061 usecs/op 30 5.855061 usecs/op
@@ -79,7 +79,7 @@ options (20 sender and receiver processes per group)
79 79
80 Total time:0.308 sec 80 Total time:0.308 sec
81 81
82% perf bench sched messaging -t -g 20 # be multi-thread,with 20 groups 82% perf bench sched messaging -t -g 20 # be multi-thread, with 20 groups
83(20 sender and receiver threads per group) 83(20 sender and receiver threads per group)
84(20 groups == 800 threads run) 84(20 groups == 800 threads run)
85 85
diff --git a/tools/perf/Documentation/perf-buildid-cache.txt b/tools/perf/Documentation/perf-buildid-cache.txt
index 88bc3b519746..5d1a9500277f 100644
--- a/tools/perf/Documentation/perf-buildid-cache.txt
+++ b/tools/perf/Documentation/perf-buildid-cache.txt
@@ -8,7 +8,7 @@ perf-buildid-cache - Manage build-id cache.
8SYNOPSIS 8SYNOPSIS
9-------- 9--------
10[verse] 10[verse]
11'perf buildid-list <options>' 11'perf buildid-cache <options>'
12 12
13DESCRIPTION 13DESCRIPTION
14----------- 14-----------
@@ -30,4 +30,4 @@ OPTIONS
30 30
31SEE ALSO 31SEE ALSO
32-------- 32--------
33linkperf:perf-record[1], linkperf:perf-report[1] 33linkperf:perf-record[1], linkperf:perf-report[1], linkperf:perf-buildid-list[1]
diff --git a/tools/perf/Documentation/perf-diff.txt b/tools/perf/Documentation/perf-diff.txt
index 8974e208cba6..20d97d84ea1c 100644
--- a/tools/perf/Documentation/perf-diff.txt
+++ b/tools/perf/Documentation/perf-diff.txt
@@ -1,5 +1,5 @@
1perf-diff(1) 1perf-diff(1)
2============== 2============
3 3
4NAME 4NAME
5---- 5----
diff --git a/tools/perf/Documentation/perf-inject.txt b/tools/perf/Documentation/perf-inject.txt
new file mode 100644
index 000000000000..025630d43cd2
--- /dev/null
+++ b/tools/perf/Documentation/perf-inject.txt
@@ -0,0 +1,35 @@
1perf-inject(1)
2==============
3
4NAME
5----
6perf-inject - Filter to augment the events stream with additional information
7
8SYNOPSIS
9--------
10[verse]
11'perf inject <options>'
12
13DESCRIPTION
14-----------
15perf-inject reads a perf-record event stream and repipes it to stdout. At any
16point the processing code can inject other events into the event stream - in
17this case build-ids (-b option) are read and injected as needed into the event
18stream.
19
20Build-ids are just the first user of perf-inject - potentially anything that
21needs userspace processing to augment the events stream with additional
22information could make use of this facility.
23
24OPTIONS
25-------
26-b::
27--build-ids=::
28 Inject build-ids into the output stream
29-v::
30--verbose::
31 Be more verbose.
32
33SEE ALSO
34--------
35linkperf:perf-record[1], linkperf:perf-report[1], linkperf:perf-archive[1]
diff --git a/tools/perf/Documentation/perf-kmem.txt b/tools/perf/Documentation/perf-kmem.txt
index eac4d852e7cd..a52fcde894c7 100644
--- a/tools/perf/Documentation/perf-kmem.txt
+++ b/tools/perf/Documentation/perf-kmem.txt
@@ -1,5 +1,5 @@
1perf-kmem(1) 1perf-kmem(1)
2============== 2============
3 3
4NAME 4NAME
5---- 5----
diff --git a/tools/perf/Documentation/perf-kvm.txt b/tools/perf/Documentation/perf-kvm.txt
new file mode 100644
index 000000000000..d004e19fe6d6
--- /dev/null
+++ b/tools/perf/Documentation/perf-kvm.txt
@@ -0,0 +1,68 @@
1perf-kvm(1)
2===========
3
4NAME
5----
6perf-kvm - Tool to trace/measure kvm guest os
7
8SYNOPSIS
9--------
10[verse]
11'perf kvm' [--host] [--guest] [--guestmount=<path>
12 [--guestkallsyms=<path> --guestmodules=<path> | --guestvmlinux=<path>]]
13 {top|record|report|diff|buildid-list}
14'perf kvm' [--host] [--guest] [--guestkallsyms=<path> --guestmodules=<path>
15 | --guestvmlinux=<path>] {top|record|report|diff|buildid-list}
16
17DESCRIPTION
18-----------
19There are a couple of variants of perf kvm:
20
21 'perf kvm [options] top <command>' to generates and displays
22 a performance counter profile of guest os in realtime
23 of an arbitrary workload.
24
25 'perf kvm record <command>' to record the performance couinter profile
26 of an arbitrary workload and save it into a perf data file. If both
27 --host and --guest are input, the perf data file name is perf.data.kvm.
28 If there is no --host but --guest, the file name is perf.data.guest.
29 If there is no --guest but --host, the file name is perf.data.host.
30
31 'perf kvm report' to display the performance counter profile information
32 recorded via perf kvm record.
33
34 'perf kvm diff' to displays the performance difference amongst two perf.data
35 files captured via perf record.
36
37 'perf kvm buildid-list' to display the buildids found in a perf data file,
38 so that other tools can be used to fetch packages with matching symbol tables
39 for use by perf report.
40
41OPTIONS
42-------
43--host=::
44 Collect host side performance profile.
45--guest=::
46 Collect guest side performance profile.
47--guestmount=<path>::
48 Guest os root file system mount directory. Users mounts guest os
49 root directories under <path> by a specific filesystem access method,
50 typically, sshfs. For example, start 2 guest os. The one's pid is 8888
51 and the other's is 9999.
52 #mkdir ~/guestmount; cd ~/guestmount
53 #sshfs -o allow_other,direct_io -p 5551 localhost:/ 8888/
54 #sshfs -o allow_other,direct_io -p 5552 localhost:/ 9999/
55 #perf kvm --host --guest --guestmount=~/guestmount top
56--guestkallsyms=<path>::
57 Guest os /proc/kallsyms file copy. 'perf' kvm' reads it to get guest
58 kernel symbols. Users copy it out from guest os.
59--guestmodules=<path>::
60 Guest os /proc/modules file copy. 'perf' kvm' reads it to get guest
61 kernel module information. Users copy it out from guest os.
62--guestvmlinux=<path>::
63 Guest os kernel vmlinux.
64
65SEE ALSO
66--------
67linkperf:perf-top[1], linkperf:perf-record[1], linkperf:perf-report[1],
68linkperf:perf-diff[1], linkperf:perf-buildid-list[1]
diff --git a/tools/perf/Documentation/perf-list.txt b/tools/perf/Documentation/perf-list.txt
index 8290b9422668..43e3dd284b90 100644
--- a/tools/perf/Documentation/perf-list.txt
+++ b/tools/perf/Documentation/perf-list.txt
@@ -15,6 +15,35 @@ DESCRIPTION
15This command displays the symbolic event types which can be selected in the 15This command displays the symbolic event types which can be selected in the
16various perf commands with the -e option. 16various perf commands with the -e option.
17 17
18RAW HARDWARE EVENT DESCRIPTOR
19-----------------------------
20Even when an event is not available in a symbolic form within perf right now,
21it can be encoded in a per processor specific way.
22
23For instance For x86 CPUs NNN represents the raw register encoding with the
24layout of IA32_PERFEVTSELx MSRs (see [Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide] Figure 30-1 Layout
25of IA32_PERFEVTSELx MSRs) or AMD's PerfEvtSeln (see [AMD64 Architecture Programmer’s Manual Volume 2: System Programming], Page 344,
26Figure 13-7 Performance Event-Select Register (PerfEvtSeln)).
27
28Example:
29
30If the Intel docs for a QM720 Core i7 describe an event as:
31
32 Event Umask Event Mask
33 Num. Value Mnemonic Description Comment
34
35 A8H 01H LSD.UOPS Counts the number of micro-ops Use cmask=1 and
36 delivered by loop stream detector invert to count
37 cycles
38
39raw encoding of 0x1A8 can be used:
40
41 perf stat -e r1a8 -a sleep 1
42 perf record -e r1a8 ...
43
44You should refer to the processor specific documentation for getting these
45details. Some of them are referenced in the SEE ALSO section below.
46
18OPTIONS 47OPTIONS
19------- 48-------
20None 49None
@@ -22,4 +51,6 @@ None
22SEE ALSO 51SEE ALSO
23-------- 52--------
24linkperf:perf-stat[1], linkperf:perf-top[1], 53linkperf:perf-stat[1], linkperf:perf-top[1],
25linkperf:perf-record[1] 54linkperf:perf-record[1],
55http://www.intel.com/Assets/PDF/manual/253669.pdf[Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide],
56http://support.amd.com/us/Processor_TechDocs/24593.pdf[AMD64 Architecture Programmer’s Manual Volume 2: System Programming]
diff --git a/tools/perf/Documentation/perf-probe.txt b/tools/perf/Documentation/perf-probe.txt
index 34202b1be0bb..94a258c96a44 100644
--- a/tools/perf/Documentation/perf-probe.txt
+++ b/tools/perf/Documentation/perf-probe.txt
@@ -57,6 +57,14 @@ OPTIONS
57--force:: 57--force::
58 Forcibly add events with existing name. 58 Forcibly add events with existing name.
59 59
60-n::
61--dry-run::
62 Dry run. With this option, --add and --del doesn't execute actual
63 adding and removal operations.
64
65--max-probes::
66 Set the maximum number of probe points for an event. Default is 128.
67
60PROBE SYNTAX 68PROBE SYNTAX
61------------ 69------------
62Probe points are defined by following syntax. 70Probe points are defined by following syntax.
@@ -74,13 +82,22 @@ Probe points are defined by following syntax.
74'EVENT' specifies the name of new event, if omitted, it will be set the name of the probed function. Currently, event group name is set as 'probe'. 82'EVENT' specifies the name of new event, if omitted, it will be set the name of the probed function. Currently, event group name is set as 'probe'.
75'FUNC' specifies a probed function name, and it may have one of the following options; '+OFFS' is the offset from function entry address in bytes, ':RLN' is the relative-line number from function entry line, and '%return' means that it probes function return. And ';PTN' means lazy matching pattern (see LAZY MATCHING). Note that ';PTN' must be the end of the probe point definition. In addition, '@SRC' specifies a source file which has that function. 83'FUNC' specifies a probed function name, and it may have one of the following options; '+OFFS' is the offset from function entry address in bytes, ':RLN' is the relative-line number from function entry line, and '%return' means that it probes function return. And ';PTN' means lazy matching pattern (see LAZY MATCHING). Note that ';PTN' must be the end of the probe point definition. In addition, '@SRC' specifies a source file which has that function.
76It is also possible to specify a probe point by the source line number or lazy matching by using 'SRC:ALN' or 'SRC;PTN' syntax, where 'SRC' is the source file path, ':ALN' is the line number and ';PTN' is the lazy matching pattern. 84It is also possible to specify a probe point by the source line number or lazy matching by using 'SRC:ALN' or 'SRC;PTN' syntax, where 'SRC' is the source file path, ':ALN' is the line number and ';PTN' is the lazy matching pattern.
77'ARG' specifies the arguments of this probe point. You can use the name of local variable, or kprobe-tracer argument format (e.g. $retval, %ax, etc). 85'ARG' specifies the arguments of this probe point, (see PROBE ARGUMENT).
86
87PROBE ARGUMENT
88--------------
89Each probe argument follows below syntax.
90
91 [NAME=]LOCALVAR|$retval|%REG|@SYMBOL[:TYPE]
92
93'NAME' specifies the name of this argument (optional). You can use the name of local variable, local data structure member (e.g. var->field, var.field2), or kprobe-tracer argument format (e.g. $retval, %ax, etc). Note that the name of this argument will be set as the last member name if you specify a local data structure member (e.g. field2 for 'var->field1.field2'.)
94'TYPE' casts the type of this argument (optional). If omitted, perf probe automatically set the type based on debuginfo.
78 95
79LINE SYNTAX 96LINE SYNTAX
80----------- 97-----------
81Line range is descripted by following syntax. 98Line range is descripted by following syntax.
82 99
83 "FUNC[:RLN[+NUM|:RLN2]]|SRC:ALN[+NUM|:ALN2]" 100 "FUNC[:RLN[+NUM|-RLN2]]|SRC:ALN[+NUM|-ALN2]"
84 101
85FUNC specifies the function name of showing lines. 'RLN' is the start line 102FUNC specifies the function name of showing lines. 'RLN' is the start line
86number from function entry line, and 'RLN2' is the end line number. As same as 103number from function entry line, and 'RLN2' is the end line number. As same as
diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt
index fc46c0b40f6e..34e255fc3e2f 100644
--- a/tools/perf/Documentation/perf-record.txt
+++ b/tools/perf/Documentation/perf-record.txt
@@ -58,7 +58,7 @@ OPTIONS
58 58
59-f:: 59-f::
60--force:: 60--force::
61 Overwrite existing data file. 61 Overwrite existing data file. (deprecated)
62 62
63-c:: 63-c::
64--count=:: 64--count=::
@@ -69,8 +69,8 @@ OPTIONS
69 Output file name. 69 Output file name.
70 70
71-i:: 71-i::
72--inherit:: 72--no-inherit::
73 Child tasks inherit counters. 73 Child tasks do not inherit counters.
74-F:: 74-F::
75--freq=:: 75--freq=::
76 Profile at this frequency. 76 Profile at this frequency.
@@ -101,7 +101,7 @@ OPTIONS
101 101
102-R:: 102-R::
103--raw-samples:: 103--raw-samples::
104Collect raw sample records from all opened counters (typically for tracepoint counters). 104Collect raw sample records from all opened counters (default for tracepoint counters).
105 105
106SEE ALSO 106SEE ALSO
107-------- 107--------
diff --git a/tools/perf/Documentation/perf-sched.txt b/tools/perf/Documentation/perf-sched.txt
index 1ce79198997b..8417644a6166 100644
--- a/tools/perf/Documentation/perf-sched.txt
+++ b/tools/perf/Documentation/perf-sched.txt
@@ -12,7 +12,7 @@ SYNOPSIS
12 12
13DESCRIPTION 13DESCRIPTION
14----------- 14-----------
15There's four variants of perf sched: 15There are four variants of perf sched:
16 16
17 'perf sched record <command>' to record the scheduling events 17 'perf sched record <command>' to record the scheduling events
18 of an arbitrary workload. 18 of an arbitrary workload.
@@ -27,7 +27,7 @@ There's four variants of perf sched:
27 via perf sched record. (this is done by starting up mockup threads 27 via perf sched record. (this is done by starting up mockup threads
28 that mimic the workload based on the events in the trace. These 28 that mimic the workload based on the events in the trace. These
29 threads can then replay the timings (CPU runtime and sleep patterns) 29 threads can then replay the timings (CPU runtime and sleep patterns)
30 of the workload as it occured when it was recorded - and can repeat 30 of the workload as it occurred when it was recorded - and can repeat
31 it a number of times, measuring its performance.) 31 it a number of times, measuring its performance.)
32 32
33OPTIONS 33OPTIONS
diff --git a/tools/perf/Documentation/perf-stat.txt b/tools/perf/Documentation/perf-stat.txt
index 484080dd5b6f..2cab8e8c33d0 100644
--- a/tools/perf/Documentation/perf-stat.txt
+++ b/tools/perf/Documentation/perf-stat.txt
@@ -31,8 +31,8 @@ OPTIONS
31 hexadecimal event descriptor. 31 hexadecimal event descriptor.
32 32
33-i:: 33-i::
34--inherit:: 34--no-inherit::
35 child tasks inherit counters 35 child tasks do not inherit counters
36-p:: 36-p::
37--pid=<pid>:: 37--pid=<pid>::
38 stat events on existing pid 38 stat events on existing pid
diff --git a/tools/perf/Documentation/perf-test.txt b/tools/perf/Documentation/perf-test.txt
new file mode 100644
index 000000000000..1c4b5f5b7f71
--- /dev/null
+++ b/tools/perf/Documentation/perf-test.txt
@@ -0,0 +1,22 @@
1perf-test(1)
2============
3
4NAME
5----
6perf-test - Runs sanity tests.
7
8SYNOPSIS
9--------
10[verse]
11'perf test <options>'
12
13DESCRIPTION
14-----------
15This command does assorted sanity tests, initially thru linked routines but
16also will look for a directory with more tests in the form of scripts.
17
18OPTIONS
19-------
20-v::
21--verbose::
22 Be more verbose.
diff --git a/tools/perf/Documentation/perf-trace-perl.txt b/tools/perf/Documentation/perf-trace-perl.txt
index d729cee8d987..ee6525ee6d69 100644
--- a/tools/perf/Documentation/perf-trace-perl.txt
+++ b/tools/perf/Documentation/perf-trace-perl.txt
@@ -49,12 +49,10 @@ available as calls back into the perf executable (see below).
49As an example, the following perf record command can be used to record 49As an example, the following perf record command can be used to record
50all sched_wakeup events in the system: 50all sched_wakeup events in the system:
51 51
52 # perf record -c 1 -f -a -M -R -e sched:sched_wakeup 52 # perf record -a -e sched:sched_wakeup
53 53
54Traces meant to be processed using a script should be recorded with 54Traces meant to be processed using a script should be recorded with
55the above options: -c 1 says to sample every event, -a to enable 55the above option: -a to enable system-wide collection.
56system-wide collection, -M to multiplex the output, and -R to collect
57raw samples.
58 56
59The format file for the sched_wakep event defines the following fields 57The format file for the sched_wakep event defines the following fields
60(see /sys/kernel/debug/tracing/events/sched/sched_wakeup/format): 58(see /sys/kernel/debug/tracing/events/sched/sched_wakeup/format):
diff --git a/tools/perf/Documentation/perf-trace-python.txt b/tools/perf/Documentation/perf-trace-python.txt
index a241aca77184..693be804dd3d 100644
--- a/tools/perf/Documentation/perf-trace-python.txt
+++ b/tools/perf/Documentation/perf-trace-python.txt
@@ -1,5 +1,5 @@
1perf-trace-python(1) 1perf-trace-python(1)
2================== 2====================
3 3
4NAME 4NAME
5---- 5----
@@ -93,7 +93,7 @@ don't care how it exited, so we'll use 'perf record' to record only
93the sys_enter events: 93the sys_enter events:
94 94
95---- 95----
96# perf record -c 1 -f -a -M -R -e raw_syscalls:sys_enter 96# perf record -a -e raw_syscalls:sys_enter
97 97
98^C[ perf record: Woken up 1 times to write data ] 98^C[ perf record: Woken up 1 times to write data ]
99[ perf record: Captured and wrote 56.545 MB perf.data (~2470503 samples) ] 99[ perf record: Captured and wrote 56.545 MB perf.data (~2470503 samples) ]
@@ -182,7 +182,7 @@ mean either that the record step recorded event types that it wasn't
182really interested in, or the script was run against a trace file that 182really interested in, or the script was run against a trace file that
183doesn't correspond to the script. 183doesn't correspond to the script.
184 184
185The script generated by -g option option simply prints a line for each 185The script generated by -g option simply prints a line for each
186event found in the trace stream i.e. it basically just dumps the event 186event found in the trace stream i.e. it basically just dumps the event
187and its parameter values to stdout. The print_header() function is 187and its parameter values to stdout. The print_header() function is
188simply a utility function used for that purpose. Let's rename the 188simply a utility function used for that purpose. Let's rename the
@@ -359,7 +359,7 @@ your script:
359# cat kernel-source/tools/perf/scripts/python/bin/syscall-counts-record 359# cat kernel-source/tools/perf/scripts/python/bin/syscall-counts-record
360 360
361#!/bin/bash 361#!/bin/bash
362perf record -c 1 -f -a -M -R -e raw_syscalls:sys_enter 362perf record -a -e raw_syscalls:sys_enter
363---- 363----
364 364
365The 'report' script is also a shell script with the same base name as 365The 'report' script is also a shell script with the same base name as
@@ -449,12 +449,10 @@ available as calls back into the perf executable (see below).
449As an example, the following perf record command can be used to record 449As an example, the following perf record command can be used to record
450all sched_wakeup events in the system: 450all sched_wakeup events in the system:
451 451
452 # perf record -c 1 -f -a -M -R -e sched:sched_wakeup 452 # perf record -a -e sched:sched_wakeup
453 453
454Traces meant to be processed using a script should be recorded with 454Traces meant to be processed using a script should be recorded with
455the above options: -c 1 says to sample every event, -a to enable 455the above option: -a to enable system-wide collection.
456system-wide collection, -M to multiplex the output, and -R to collect
457raw samples.
458 456
459The format file for the sched_wakep event defines the following fields 457The format file for the sched_wakep event defines the following fields
460(see /sys/kernel/debug/tracing/events/sched/sched_wakeup/format): 458(see /sys/kernel/debug/tracing/events/sched/sched_wakeup/format):
@@ -584,7 +582,7 @@ files:
584 flag_str(event_name, field_name, field_value) - returns the string represention corresponding to field_value for the flag field field_name of event event_name 582 flag_str(event_name, field_name, field_value) - returns the string represention corresponding to field_value for the flag field field_name of event event_name
585 symbol_str(event_name, field_name, field_value) - returns the string represention corresponding to field_value for the symbolic field field_name of event event_name 583 symbol_str(event_name, field_name, field_value) - returns the string represention corresponding to field_value for the symbolic field field_name of event event_name
586 584
587The *autodict* function returns a special special kind of Python 585The *autodict* function returns a special kind of Python
588dictionary that implements Perl's 'autovivifying' hashes in Python 586dictionary that implements Perl's 'autovivifying' hashes in Python
589i.e. with autovivifying hashes, you can assign nested hash values 587i.e. with autovivifying hashes, you can assign nested hash values
590without having to go to the trouble of creating intermediate levels if 588without having to go to the trouble of creating intermediate levels if
diff --git a/tools/perf/Documentation/perf-trace.txt b/tools/perf/Documentation/perf-trace.txt
index 8879299cd9df..122ec9dc4853 100644
--- a/tools/perf/Documentation/perf-trace.txt
+++ b/tools/perf/Documentation/perf-trace.txt
@@ -1,5 +1,5 @@
1perf-trace(1) 1perf-trace(1)
2============== 2=============
3 3
4NAME 4NAME
5---- 5----
diff --git a/tools/perf/Makefile b/tools/perf/Makefile
index bc0f670a8338..3d8f31ed771d 100644
--- a/tools/perf/Makefile
+++ b/tools/perf/Makefile
@@ -1,3 +1,7 @@
1ifeq ("$(origin O)", "command line")
2 OUTPUT := $(O)/
3endif
4
1# The default target of this Makefile is... 5# The default target of this Makefile is...
2all:: 6all::
3 7
@@ -150,10 +154,17 @@ all::
150# Define LDFLAGS=-static to build a static binary. 154# Define LDFLAGS=-static to build a static binary.
151# 155#
152# Define EXTRA_CFLAGS=-m64 or EXTRA_CFLAGS=-m32 as appropriate for cross-builds. 156# Define EXTRA_CFLAGS=-m64 or EXTRA_CFLAGS=-m32 as appropriate for cross-builds.
157#
158# Define NO_DWARF if you do not want debug-info analysis feature at all.
153 159
154PERF-VERSION-FILE: .FORCE-PERF-VERSION-FILE 160$(shell sh -c 'mkdir -p $(OUTPUT)scripts/python/Perf-Trace-Util/' 2> /dev/null)
155 @$(SHELL_PATH) util/PERF-VERSION-GEN 161$(shell sh -c 'mkdir -p $(OUTPUT)scripts/perl/Perf-Trace-Util/' 2> /dev/null)
156-include PERF-VERSION-FILE 162$(shell sh -c 'mkdir -p $(OUTPUT)util/scripting-engines/' 2> /dev/null)
163$(shell sh -c 'mkdir $(OUTPUT)bench' 2> /dev/null)
164
165$(OUTPUT)PERF-VERSION-FILE: .FORCE-PERF-VERSION-FILE
166 @$(SHELL_PATH) util/PERF-VERSION-GEN $(OUTPUT)
167-include $(OUTPUT)PERF-VERSION-FILE
157 168
158uname_S := $(shell sh -c 'uname -s 2>/dev/null || echo not') 169uname_S := $(shell sh -c 'uname -s 2>/dev/null || echo not')
159uname_M := $(shell sh -c 'uname -m 2>/dev/null || echo not') 170uname_M := $(shell sh -c 'uname -m 2>/dev/null || echo not')
@@ -162,6 +173,22 @@ uname_R := $(shell sh -c 'uname -r 2>/dev/null || echo not')
162uname_P := $(shell sh -c 'uname -p 2>/dev/null || echo not') 173uname_P := $(shell sh -c 'uname -p 2>/dev/null || echo not')
163uname_V := $(shell sh -c 'uname -v 2>/dev/null || echo not') 174uname_V := $(shell sh -c 'uname -v 2>/dev/null || echo not')
164 175
176ARCH ?= $(shell echo $(uname_M) | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
177 -e s/arm.*/arm/ -e s/sa110/arm/ \
178 -e s/s390x/s390/ -e s/parisc64/parisc/ \
179 -e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
180 -e s/sh[234].*/sh/ )
181
182# Additional ARCH settings for x86
183ifeq ($(ARCH),i386)
184 ARCH := x86
185endif
186ifeq ($(ARCH),x86_64)
187 ARCH := x86
188endif
189
190$(shell sh -c 'mkdir -p $(OUTPUT)arch/$(ARCH)/util/' 2> /dev/null)
191
165# CFLAGS and LDFLAGS are for the users to override from the command line. 192# CFLAGS and LDFLAGS are for the users to override from the command line.
166 193
167# 194#
@@ -274,7 +301,7 @@ endif
274# Those must not be GNU-specific; they are shared with perl/ which may 301# Those must not be GNU-specific; they are shared with perl/ which may
275# be built by a different compiler. (Note that this is an artifact now 302# be built by a different compiler. (Note that this is an artifact now
276# but it still might be nice to keep that distinction.) 303# but it still might be nice to keep that distinction.)
277BASIC_CFLAGS = -Iutil/include 304BASIC_CFLAGS = -Iutil/include -Iarch/$(ARCH)/include
278BASIC_LDFLAGS = 305BASIC_LDFLAGS =
279 306
280# Guard against environment variables 307# Guard against environment variables
@@ -308,7 +335,7 @@ PROGRAMS += $(EXTRA_PROGRAMS)
308# 335#
309# Single 'perf' binary right now: 336# Single 'perf' binary right now:
310# 337#
311PROGRAMS += perf 338PROGRAMS += $(OUTPUT)perf
312 339
313# List built-in command $C whose implementation cmd_$C() is not in 340# List built-in command $C whose implementation cmd_$C() is not in
314# builtin-$C.o but is linked in as part of some other command. 341# builtin-$C.o but is linked in as part of some other command.
@@ -318,7 +345,7 @@ PROGRAMS += perf
318ALL_PROGRAMS = $(PROGRAMS) $(SCRIPTS) 345ALL_PROGRAMS = $(PROGRAMS) $(SCRIPTS)
319 346
320# what 'all' will build but not install in perfexecdir 347# what 'all' will build but not install in perfexecdir
321OTHER_PROGRAMS = perf$X 348OTHER_PROGRAMS = $(OUTPUT)perf$X
322 349
323# Set paths to tools early so that they can be used for version tests. 350# Set paths to tools early so that they can be used for version tests.
324ifndef SHELL_PATH 351ifndef SHELL_PATH
@@ -330,7 +357,7 @@ endif
330 357
331export PERL_PATH 358export PERL_PATH
332 359
333LIB_FILE=libperf.a 360LIB_FILE=$(OUTPUT)libperf.a
334 361
335LIB_H += ../../include/linux/perf_event.h 362LIB_H += ../../include/linux/perf_event.h
336LIB_H += ../../include/linux/rbtree.h 363LIB_H += ../../include/linux/rbtree.h
@@ -350,12 +377,13 @@ LIB_H += util/include/linux/rbtree.h
350LIB_H += util/include/linux/string.h 377LIB_H += util/include/linux/string.h
351LIB_H += util/include/linux/types.h 378LIB_H += util/include/linux/types.h
352LIB_H += util/include/asm/asm-offsets.h 379LIB_H += util/include/asm/asm-offsets.h
353LIB_H += util/include/asm/bitops.h
354LIB_H += util/include/asm/bug.h 380LIB_H += util/include/asm/bug.h
355LIB_H += util/include/asm/byteorder.h 381LIB_H += util/include/asm/byteorder.h
382LIB_H += util/include/asm/hweight.h
356LIB_H += util/include/asm/swab.h 383LIB_H += util/include/asm/swab.h
357LIB_H += util/include/asm/system.h 384LIB_H += util/include/asm/system.h
358LIB_H += util/include/asm/uaccess.h 385LIB_H += util/include/asm/uaccess.h
386LIB_H += util/include/dwarf-regs.h
359LIB_H += perf.h 387LIB_H += perf.h
360LIB_H += util/cache.h 388LIB_H += util/cache.h
361LIB_H += util/callchain.h 389LIB_H += util/callchain.h
@@ -375,7 +403,6 @@ LIB_H += util/header.h
375LIB_H += util/help.h 403LIB_H += util/help.h
376LIB_H += util/session.h 404LIB_H += util/session.h
377LIB_H += util/strbuf.h 405LIB_H += util/strbuf.h
378LIB_H += util/string.h
379LIB_H += util/strlist.h 406LIB_H += util/strlist.h
380LIB_H += util/svghelper.h 407LIB_H += util/svghelper.h
381LIB_H += util/run-command.h 408LIB_H += util/run-command.h
@@ -389,79 +416,83 @@ LIB_H += util/thread.h
389LIB_H += util/trace-event.h 416LIB_H += util/trace-event.h
390LIB_H += util/probe-finder.h 417LIB_H += util/probe-finder.h
391LIB_H += util/probe-event.h 418LIB_H += util/probe-event.h
419LIB_H += util/pstack.h
392LIB_H += util/cpumap.h 420LIB_H += util/cpumap.h
393 421
394LIB_OBJS += util/abspath.o 422LIB_OBJS += $(OUTPUT)util/abspath.o
395LIB_OBJS += util/alias.o 423LIB_OBJS += $(OUTPUT)util/alias.o
396LIB_OBJS += util/build-id.o 424LIB_OBJS += $(OUTPUT)util/build-id.o
397LIB_OBJS += util/config.o 425LIB_OBJS += $(OUTPUT)util/config.o
398LIB_OBJS += util/ctype.o 426LIB_OBJS += $(OUTPUT)util/ctype.o
399LIB_OBJS += util/debugfs.o 427LIB_OBJS += $(OUTPUT)util/debugfs.o
400LIB_OBJS += util/environment.o 428LIB_OBJS += $(OUTPUT)util/environment.o
401LIB_OBJS += util/event.o 429LIB_OBJS += $(OUTPUT)util/event.o
402LIB_OBJS += util/exec_cmd.o 430LIB_OBJS += $(OUTPUT)util/exec_cmd.o
403LIB_OBJS += util/help.o 431LIB_OBJS += $(OUTPUT)util/help.o
404LIB_OBJS += util/levenshtein.o 432LIB_OBJS += $(OUTPUT)util/levenshtein.o
405LIB_OBJS += util/parse-options.o 433LIB_OBJS += $(OUTPUT)util/parse-options.o
406LIB_OBJS += util/parse-events.o 434LIB_OBJS += $(OUTPUT)util/parse-events.o
407LIB_OBJS += util/path.o 435LIB_OBJS += $(OUTPUT)util/path.o
408LIB_OBJS += util/rbtree.o 436LIB_OBJS += $(OUTPUT)util/rbtree.o
409LIB_OBJS += util/bitmap.o 437LIB_OBJS += $(OUTPUT)util/bitmap.o
410LIB_OBJS += util/hweight.o 438LIB_OBJS += $(OUTPUT)util/hweight.o
411LIB_OBJS += util/find_next_bit.o 439LIB_OBJS += $(OUTPUT)util/run-command.o
412LIB_OBJS += util/run-command.o 440LIB_OBJS += $(OUTPUT)util/quote.o
413LIB_OBJS += util/quote.o 441LIB_OBJS += $(OUTPUT)util/strbuf.o
414LIB_OBJS += util/strbuf.o 442LIB_OBJS += $(OUTPUT)util/string.o
415LIB_OBJS += util/string.o 443LIB_OBJS += $(OUTPUT)util/strlist.o
416LIB_OBJS += util/strlist.o 444LIB_OBJS += $(OUTPUT)util/usage.o
417LIB_OBJS += util/usage.o 445LIB_OBJS += $(OUTPUT)util/wrapper.o
418LIB_OBJS += util/wrapper.o 446LIB_OBJS += $(OUTPUT)util/sigchain.o
419LIB_OBJS += util/sigchain.o 447LIB_OBJS += $(OUTPUT)util/symbol.o
420LIB_OBJS += util/symbol.o 448LIB_OBJS += $(OUTPUT)util/color.o
421LIB_OBJS += util/color.o 449LIB_OBJS += $(OUTPUT)util/pager.o
422LIB_OBJS += util/pager.o 450LIB_OBJS += $(OUTPUT)util/header.o
423LIB_OBJS += util/header.o 451LIB_OBJS += $(OUTPUT)util/callchain.o
424LIB_OBJS += util/callchain.o 452LIB_OBJS += $(OUTPUT)util/values.o
425LIB_OBJS += util/values.o 453LIB_OBJS += $(OUTPUT)util/debug.o
426LIB_OBJS += util/debug.o 454LIB_OBJS += $(OUTPUT)util/map.o
427LIB_OBJS += util/map.o 455LIB_OBJS += $(OUTPUT)util/pstack.o
428LIB_OBJS += util/session.o 456LIB_OBJS += $(OUTPUT)util/session.o
429LIB_OBJS += util/thread.o 457LIB_OBJS += $(OUTPUT)util/thread.o
430LIB_OBJS += util/trace-event-parse.o 458LIB_OBJS += $(OUTPUT)util/trace-event-parse.o
431LIB_OBJS += util/trace-event-read.o 459LIB_OBJS += $(OUTPUT)util/trace-event-read.o
432LIB_OBJS += util/trace-event-info.o 460LIB_OBJS += $(OUTPUT)util/trace-event-info.o
433LIB_OBJS += util/trace-event-scripting.o 461LIB_OBJS += $(OUTPUT)util/trace-event-scripting.o
434LIB_OBJS += util/svghelper.o 462LIB_OBJS += $(OUTPUT)util/svghelper.o
435LIB_OBJS += util/sort.o 463LIB_OBJS += $(OUTPUT)util/sort.o
436LIB_OBJS += util/hist.o 464LIB_OBJS += $(OUTPUT)util/hist.o
437LIB_OBJS += util/probe-event.o 465LIB_OBJS += $(OUTPUT)util/probe-event.o
438LIB_OBJS += util/util.o 466LIB_OBJS += $(OUTPUT)util/util.o
439LIB_OBJS += util/cpumap.o 467LIB_OBJS += $(OUTPUT)util/cpumap.o
440 468
441BUILTIN_OBJS += builtin-annotate.o 469BUILTIN_OBJS += $(OUTPUT)builtin-annotate.o
442 470
443BUILTIN_OBJS += builtin-bench.o 471BUILTIN_OBJS += $(OUTPUT)builtin-bench.o
444 472
445# Benchmark modules 473# Benchmark modules
446BUILTIN_OBJS += bench/sched-messaging.o 474BUILTIN_OBJS += $(OUTPUT)bench/sched-messaging.o
447BUILTIN_OBJS += bench/sched-pipe.o 475BUILTIN_OBJS += $(OUTPUT)bench/sched-pipe.o
448BUILTIN_OBJS += bench/mem-memcpy.o 476BUILTIN_OBJS += $(OUTPUT)bench/mem-memcpy.o
449 477
450BUILTIN_OBJS += builtin-diff.o 478BUILTIN_OBJS += $(OUTPUT)builtin-diff.o
451BUILTIN_OBJS += builtin-help.o 479BUILTIN_OBJS += $(OUTPUT)builtin-help.o
452BUILTIN_OBJS += builtin-sched.o 480BUILTIN_OBJS += $(OUTPUT)builtin-sched.o
453BUILTIN_OBJS += builtin-buildid-list.o 481BUILTIN_OBJS += $(OUTPUT)builtin-buildid-list.o
454BUILTIN_OBJS += builtin-buildid-cache.o 482BUILTIN_OBJS += $(OUTPUT)builtin-buildid-cache.o
455BUILTIN_OBJS += builtin-list.o 483BUILTIN_OBJS += $(OUTPUT)builtin-list.o
456BUILTIN_OBJS += builtin-record.o 484BUILTIN_OBJS += $(OUTPUT)builtin-record.o
457BUILTIN_OBJS += builtin-report.o 485BUILTIN_OBJS += $(OUTPUT)builtin-report.o
458BUILTIN_OBJS += builtin-stat.o 486BUILTIN_OBJS += $(OUTPUT)builtin-stat.o
459BUILTIN_OBJS += builtin-timechart.o 487BUILTIN_OBJS += $(OUTPUT)builtin-timechart.o
460BUILTIN_OBJS += builtin-top.o 488BUILTIN_OBJS += $(OUTPUT)builtin-top.o
461BUILTIN_OBJS += builtin-trace.o 489BUILTIN_OBJS += $(OUTPUT)builtin-trace.o
462BUILTIN_OBJS += builtin-probe.o 490BUILTIN_OBJS += $(OUTPUT)builtin-probe.o
463BUILTIN_OBJS += builtin-kmem.o 491BUILTIN_OBJS += $(OUTPUT)builtin-kmem.o
464BUILTIN_OBJS += builtin-lock.o 492BUILTIN_OBJS += $(OUTPUT)builtin-lock.o
493BUILTIN_OBJS += $(OUTPUT)builtin-kvm.o
494BUILTIN_OBJS += $(OUTPUT)builtin-test.o
495BUILTIN_OBJS += $(OUTPUT)builtin-inject.o
465 496
466PERFLIBS = $(LIB_FILE) 497PERFLIBS = $(LIB_FILE)
467 498
@@ -476,6 +507,15 @@ PERFLIBS = $(LIB_FILE)
476-include config.mak.autogen 507-include config.mak.autogen
477-include config.mak 508-include config.mak
478 509
510ifndef NO_DWARF
511ifneq ($(shell sh -c "(echo '\#include <dwarf.h>'; echo '\#include <libdw.h>'; echo '\#include <version.h>'; echo '\#ifndef _ELFUTILS_PREREQ'; echo '\#error'; echo '\#endif'; echo 'int main(void) { Dwarf *dbg; dbg = dwarf_begin(0, DWARF_C_READ); return (long)dbg; }') | $(CC) -x c - $(ALL_CFLAGS) -I/usr/include/elfutils -ldw -lelf -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y)
512 msg := $(warning No libdw.h found or old libdw.h found or elfutils is older than 0.138, disables dwarf support. Please install new elfutils-devel/libdw-dev);
513 NO_DWARF := 1
514endif # Dwarf support
515endif # NO_DWARF
516
517-include arch/$(ARCH)/Makefile
518
479ifeq ($(uname_S),Darwin) 519ifeq ($(uname_S),Darwin)
480 ifndef NO_FINK 520 ifndef NO_FINK
481 ifeq ($(shell test -d /sw/lib && echo y),y) 521 ifeq ($(shell test -d /sw/lib && echo y),y)
@@ -492,6 +532,10 @@ ifeq ($(uname_S),Darwin)
492 PTHREAD_LIBS = 532 PTHREAD_LIBS =
493endif 533endif
494 534
535ifneq ($(OUTPUT),)
536 BASIC_CFLAGS += -I$(OUTPUT)
537endif
538
495ifeq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y) 539ifeq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y)
496ifneq ($(shell sh -c "(echo '\#include <gnu/libc-version.h>'; echo 'int main(void) { const char * version = gnu_get_libc_version(); return (long)version; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y) 540ifneq ($(shell sh -c "(echo '\#include <gnu/libc-version.h>'; echo 'int main(void) { const char * version = gnu_get_libc_version(); return (long)version; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y)
497 msg := $(error No gnu/libc-version.h found, please install glibc-dev[el]/glibc-static); 541 msg := $(error No gnu/libc-version.h found, please install glibc-dev[el]/glibc-static);
@@ -504,14 +548,29 @@ else
504 msg := $(error No libelf.h/libelf found, please install libelf-dev/elfutils-libelf-devel and glibc-dev[el]); 548 msg := $(error No libelf.h/libelf found, please install libelf-dev/elfutils-libelf-devel and glibc-dev[el]);
505endif 549endif
506 550
507ifneq ($(shell sh -c "(echo '\#include <dwarf.h>'; echo '\#include <libdw.h>'; echo 'int main(void) { Dwarf *dbg; dbg = dwarf_begin(0, DWARF_C_READ); return (long)dbg; }') | $(CC) -x c - $(ALL_CFLAGS) -I/usr/include/elfutils -ldw -lelf -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y) 551ifndef NO_DWARF
508 msg := $(warning No libdw.h found or old libdw.h found, disables dwarf support. Please install elfutils-devel/elfutils-dev); 552ifeq ($(origin PERF_HAVE_DWARF_REGS), undefined)
509 BASIC_CFLAGS += -DNO_DWARF_SUPPORT 553 msg := $(warning DWARF register mappings have not been defined for architecture $(ARCH), DWARF support disabled);
510else 554else
511 BASIC_CFLAGS += -I/usr/include/elfutils 555 BASIC_CFLAGS += -I/usr/include/elfutils -DDWARF_SUPPORT
512 EXTLIBS += -lelf -ldw 556 EXTLIBS += -lelf -ldw
513 LIB_OBJS += util/probe-finder.o 557 LIB_OBJS += $(OUTPUT)util/probe-finder.o
558endif # PERF_HAVE_DWARF_REGS
559endif # NO_DWARF
560
561ifdef NO_NEWT
562 BASIC_CFLAGS += -DNO_NEWT_SUPPORT
563else
564ifneq ($(shell sh -c "(echo '\#include <newt.h>'; echo 'int main(void) { newtInit(); newtCls(); return newtFinished(); }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -lnewt -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y)
565 msg := $(warning newt not found, disables TUI support. Please install newt-devel or libnewt-dev);
566 BASIC_CFLAGS += -DNO_NEWT_SUPPORT
567else
568 # Fedora has /usr/include/slang/slang.h, but ubuntu /usr/include/slang.h
569 BASIC_CFLAGS += -I/usr/include/slang
570 EXTLIBS += -lnewt -lslang
571 LIB_OBJS += $(OUTPUT)util/newt.o
514endif 572endif
573endif # NO_NEWT
515 574
516ifndef NO_LIBPERL 575ifndef NO_LIBPERL
517PERL_EMBED_LDOPTS = `perl -MExtUtils::Embed -e ldopts 2>/dev/null` 576PERL_EMBED_LDOPTS = `perl -MExtUtils::Embed -e ldopts 2>/dev/null`
@@ -522,8 +581,8 @@ ifneq ($(shell sh -c "(echo '\#include <EXTERN.h>'; echo '\#include <perl.h>'; e
522 BASIC_CFLAGS += -DNO_LIBPERL 581 BASIC_CFLAGS += -DNO_LIBPERL
523else 582else
524 ALL_LDFLAGS += $(PERL_EMBED_LDOPTS) 583 ALL_LDFLAGS += $(PERL_EMBED_LDOPTS)
525 LIB_OBJS += util/scripting-engines/trace-event-perl.o 584 LIB_OBJS += $(OUTPUT)util/scripting-engines/trace-event-perl.o
526 LIB_OBJS += scripts/perl/Perf-Trace-Util/Context.o 585 LIB_OBJS += $(OUTPUT)scripts/perl/Perf-Trace-Util/Context.o
527endif 586endif
528 587
529ifndef NO_LIBPYTHON 588ifndef NO_LIBPYTHON
@@ -531,16 +590,19 @@ PYTHON_EMBED_LDOPTS = `python-config --ldflags 2>/dev/null`
531PYTHON_EMBED_CCOPTS = `python-config --cflags 2>/dev/null` 590PYTHON_EMBED_CCOPTS = `python-config --cflags 2>/dev/null`
532endif 591endif
533 592
534ifneq ($(shell sh -c "(echo '\#include <Python.h>'; echo 'int main(void) { Py_Initialize(); return 0; }') | $(CC) -x c - $(PYTHON_EMBED_CCOPTS) -o /dev/null $(PYTHON_EMBED_LDOPTS) > /dev/null 2>&1 && echo y"), y) 593ifneq ($(shell sh -c "(echo '\#include <Python.h>'; echo 'int main(void) { Py_Initialize(); return 0; }') | $(CC) -x c - $(PYTHON_EMBED_CCOPTS) -o $(BITBUCKET) $(PYTHON_EMBED_LDOPTS) > /dev/null 2>&1 && echo y"), y)
535 BASIC_CFLAGS += -DNO_LIBPYTHON 594 BASIC_CFLAGS += -DNO_LIBPYTHON
536else 595else
537 ALL_LDFLAGS += $(PYTHON_EMBED_LDOPTS) 596 ALL_LDFLAGS += $(PYTHON_EMBED_LDOPTS)
538 LIB_OBJS += util/scripting-engines/trace-event-python.o 597 LIB_OBJS += $(OUTPUT)util/scripting-engines/trace-event-python.o
539 LIB_OBJS += scripts/python/Perf-Trace-Util/Context.o 598 LIB_OBJS += $(OUTPUT)scripts/python/Perf-Trace-Util/Context.o
540endif 599endif
541 600
542ifdef NO_DEMANGLE 601ifdef NO_DEMANGLE
543 BASIC_CFLAGS += -DNO_DEMANGLE 602 BASIC_CFLAGS += -DNO_DEMANGLE
603else ifdef HAVE_CPLUS_DEMANGLE
604 EXTLIBS += -liberty
605 BASIC_CFLAGS += -DHAVE_CPLUS_DEMANGLE
544else 606else
545 has_bfd := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd "$(QUIET_STDERR)" && echo y") 607 has_bfd := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd "$(QUIET_STDERR)" && echo y")
546 608
@@ -607,53 +669,53 @@ ifdef NO_C99_FORMAT
607endif 669endif
608ifdef SNPRINTF_RETURNS_BOGUS 670ifdef SNPRINTF_RETURNS_BOGUS
609 COMPAT_CFLAGS += -DSNPRINTF_RETURNS_BOGUS 671 COMPAT_CFLAGS += -DSNPRINTF_RETURNS_BOGUS
610 COMPAT_OBJS += compat/snprintf.o 672 COMPAT_OBJS += $(OUTPUT)compat/snprintf.o
611endif 673endif
612ifdef FREAD_READS_DIRECTORIES 674ifdef FREAD_READS_DIRECTORIES
613 COMPAT_CFLAGS += -DFREAD_READS_DIRECTORIES 675 COMPAT_CFLAGS += -DFREAD_READS_DIRECTORIES
614 COMPAT_OBJS += compat/fopen.o 676 COMPAT_OBJS += $(OUTPUT)compat/fopen.o
615endif 677endif
616ifdef NO_SYMLINK_HEAD 678ifdef NO_SYMLINK_HEAD
617 BASIC_CFLAGS += -DNO_SYMLINK_HEAD 679 BASIC_CFLAGS += -DNO_SYMLINK_HEAD
618endif 680endif
619ifdef NO_STRCASESTR 681ifdef NO_STRCASESTR
620 COMPAT_CFLAGS += -DNO_STRCASESTR 682 COMPAT_CFLAGS += -DNO_STRCASESTR
621 COMPAT_OBJS += compat/strcasestr.o 683 COMPAT_OBJS += $(OUTPUT)compat/strcasestr.o
622endif 684endif
623ifdef NO_STRTOUMAX 685ifdef NO_STRTOUMAX
624 COMPAT_CFLAGS += -DNO_STRTOUMAX 686 COMPAT_CFLAGS += -DNO_STRTOUMAX
625 COMPAT_OBJS += compat/strtoumax.o 687 COMPAT_OBJS += $(OUTPUT)compat/strtoumax.o
626endif 688endif
627ifdef NO_STRTOULL 689ifdef NO_STRTOULL
628 COMPAT_CFLAGS += -DNO_STRTOULL 690 COMPAT_CFLAGS += -DNO_STRTOULL
629endif 691endif
630ifdef NO_SETENV 692ifdef NO_SETENV
631 COMPAT_CFLAGS += -DNO_SETENV 693 COMPAT_CFLAGS += -DNO_SETENV
632 COMPAT_OBJS += compat/setenv.o 694 COMPAT_OBJS += $(OUTPUT)compat/setenv.o
633endif 695endif
634ifdef NO_MKDTEMP 696ifdef NO_MKDTEMP
635 COMPAT_CFLAGS += -DNO_MKDTEMP 697 COMPAT_CFLAGS += -DNO_MKDTEMP
636 COMPAT_OBJS += compat/mkdtemp.o 698 COMPAT_OBJS += $(OUTPUT)compat/mkdtemp.o
637endif 699endif
638ifdef NO_UNSETENV 700ifdef NO_UNSETENV
639 COMPAT_CFLAGS += -DNO_UNSETENV 701 COMPAT_CFLAGS += -DNO_UNSETENV
640 COMPAT_OBJS += compat/unsetenv.o 702 COMPAT_OBJS += $(OUTPUT)compat/unsetenv.o
641endif 703endif
642ifdef NO_SYS_SELECT_H 704ifdef NO_SYS_SELECT_H
643 BASIC_CFLAGS += -DNO_SYS_SELECT_H 705 BASIC_CFLAGS += -DNO_SYS_SELECT_H
644endif 706endif
645ifdef NO_MMAP 707ifdef NO_MMAP
646 COMPAT_CFLAGS += -DNO_MMAP 708 COMPAT_CFLAGS += -DNO_MMAP
647 COMPAT_OBJS += compat/mmap.o 709 COMPAT_OBJS += $(OUTPUT)compat/mmap.o
648else 710else
649 ifdef USE_WIN32_MMAP 711 ifdef USE_WIN32_MMAP
650 COMPAT_CFLAGS += -DUSE_WIN32_MMAP 712 COMPAT_CFLAGS += -DUSE_WIN32_MMAP
651 COMPAT_OBJS += compat/win32mmap.o 713 COMPAT_OBJS += $(OUTPUT)compat/win32mmap.o
652 endif 714 endif
653endif 715endif
654ifdef NO_PREAD 716ifdef NO_PREAD
655 COMPAT_CFLAGS += -DNO_PREAD 717 COMPAT_CFLAGS += -DNO_PREAD
656 COMPAT_OBJS += compat/pread.o 718 COMPAT_OBJS += $(OUTPUT)compat/pread.o
657endif 719endif
658ifdef NO_FAST_WORKING_DIRECTORY 720ifdef NO_FAST_WORKING_DIRECTORY
659 BASIC_CFLAGS += -DNO_FAST_WORKING_DIRECTORY 721 BASIC_CFLAGS += -DNO_FAST_WORKING_DIRECTORY
@@ -675,10 +737,10 @@ else
675endif 737endif
676endif 738endif
677ifdef NO_INET_NTOP 739ifdef NO_INET_NTOP
678 LIB_OBJS += compat/inet_ntop.o 740 LIB_OBJS += $(OUTPUT)compat/inet_ntop.o
679endif 741endif
680ifdef NO_INET_PTON 742ifdef NO_INET_PTON
681 LIB_OBJS += compat/inet_pton.o 743 LIB_OBJS += $(OUTPUT)compat/inet_pton.o
682endif 744endif
683 745
684ifdef NO_ICONV 746ifdef NO_ICONV
@@ -695,15 +757,15 @@ endif
695 757
696ifdef PPC_SHA1 758ifdef PPC_SHA1
697 SHA1_HEADER = "ppc/sha1.h" 759 SHA1_HEADER = "ppc/sha1.h"
698 LIB_OBJS += ppc/sha1.o ppc/sha1ppc.o 760 LIB_OBJS += $(OUTPUT)ppc/sha1.o ppc/sha1ppc.o
699else 761else
700ifdef ARM_SHA1 762ifdef ARM_SHA1
701 SHA1_HEADER = "arm/sha1.h" 763 SHA1_HEADER = "arm/sha1.h"
702 LIB_OBJS += arm/sha1.o arm/sha1_arm.o 764 LIB_OBJS += $(OUTPUT)arm/sha1.o $(OUTPUT)arm/sha1_arm.o
703else 765else
704ifdef MOZILLA_SHA1 766ifdef MOZILLA_SHA1
705 SHA1_HEADER = "mozilla-sha1/sha1.h" 767 SHA1_HEADER = "mozilla-sha1/sha1.h"
706 LIB_OBJS += mozilla-sha1/sha1.o 768 LIB_OBJS += $(OUTPUT)mozilla-sha1/sha1.o
707else 769else
708 SHA1_HEADER = <openssl/sha.h> 770 SHA1_HEADER = <openssl/sha.h>
709 EXTLIBS += $(LIB_4_CRYPTO) 771 EXTLIBS += $(LIB_4_CRYPTO)
@@ -715,15 +777,15 @@ ifdef NO_PERL_MAKEMAKER
715endif 777endif
716ifdef NO_HSTRERROR 778ifdef NO_HSTRERROR
717 COMPAT_CFLAGS += -DNO_HSTRERROR 779 COMPAT_CFLAGS += -DNO_HSTRERROR
718 COMPAT_OBJS += compat/hstrerror.o 780 COMPAT_OBJS += $(OUTPUT)compat/hstrerror.o
719endif 781endif
720ifdef NO_MEMMEM 782ifdef NO_MEMMEM
721 COMPAT_CFLAGS += -DNO_MEMMEM 783 COMPAT_CFLAGS += -DNO_MEMMEM
722 COMPAT_OBJS += compat/memmem.o 784 COMPAT_OBJS += $(OUTPUT)compat/memmem.o
723endif 785endif
724ifdef INTERNAL_QSORT 786ifdef INTERNAL_QSORT
725 COMPAT_CFLAGS += -DINTERNAL_QSORT 787 COMPAT_CFLAGS += -DINTERNAL_QSORT
726 COMPAT_OBJS += compat/qsort.o 788 COMPAT_OBJS += $(OUTPUT)compat/qsort.o
727endif 789endif
728ifdef RUNTIME_PREFIX 790ifdef RUNTIME_PREFIX
729 COMPAT_CFLAGS += -DRUNTIME_PREFIX 791 COMPAT_CFLAGS += -DRUNTIME_PREFIX
@@ -803,7 +865,7 @@ export TAR INSTALL DESTDIR SHELL_PATH
803 865
804SHELL = $(SHELL_PATH) 866SHELL = $(SHELL_PATH)
805 867
806all:: .perf.dev.null shell_compatibility_test $(ALL_PROGRAMS) $(BUILT_INS) $(OTHER_PROGRAMS) PERF-BUILD-OPTIONS 868all:: .perf.dev.null shell_compatibility_test $(ALL_PROGRAMS) $(BUILT_INS) $(OTHER_PROGRAMS) $(OUTPUT)PERF-BUILD-OPTIONS
807ifneq (,$X) 869ifneq (,$X)
808 $(foreach p,$(patsubst %$X,%,$(filter %$X,$(ALL_PROGRAMS) $(BUILT_INS) perf$X)), test '$p' -ef '$p$X' || $(RM) '$p';) 870 $(foreach p,$(patsubst %$X,%,$(filter %$X,$(ALL_PROGRAMS) $(BUILT_INS) perf$X)), test '$p' -ef '$p$X' || $(RM) '$p';)
809endif 871endif
@@ -815,39 +877,39 @@ please_set_SHELL_PATH_to_a_more_modern_shell:
815 877
816shell_compatibility_test: please_set_SHELL_PATH_to_a_more_modern_shell 878shell_compatibility_test: please_set_SHELL_PATH_to_a_more_modern_shell
817 879
818strip: $(PROGRAMS) perf$X 880strip: $(PROGRAMS) $(OUTPUT)perf$X
819 $(STRIP) $(STRIP_OPTS) $(PROGRAMS) perf$X 881 $(STRIP) $(STRIP_OPTS) $(PROGRAMS) $(OUTPUT)perf$X
820 882
821perf.o: perf.c common-cmds.h PERF-CFLAGS 883$(OUTPUT)perf.o: perf.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
822 $(QUIET_CC)$(CC) -DPERF_VERSION='"$(PERF_VERSION)"' \ 884 $(QUIET_CC)$(CC) -DPERF_VERSION='"$(PERF_VERSION)"' \
823 '-DPERF_HTML_PATH="$(htmldir_SQ)"' \ 885 '-DPERF_HTML_PATH="$(htmldir_SQ)"' \
824 $(ALL_CFLAGS) -c $(filter %.c,$^) 886 $(ALL_CFLAGS) -c $(filter %.c,$^) -o $@
825 887
826perf$X: perf.o $(BUILTIN_OBJS) $(PERFLIBS) 888$(OUTPUT)perf$X: $(OUTPUT)perf.o $(BUILTIN_OBJS) $(PERFLIBS)
827 $(QUIET_LINK)$(CC) $(ALL_CFLAGS) -o $@ perf.o \ 889 $(QUIET_LINK)$(CC) $(ALL_CFLAGS) -o $@ $(OUTPUT)perf.o \
828 $(BUILTIN_OBJS) $(ALL_LDFLAGS) $(LIBS) 890 $(BUILTIN_OBJS) $(ALL_LDFLAGS) $(LIBS)
829 891
830builtin-help.o: builtin-help.c common-cmds.h PERF-CFLAGS 892$(OUTPUT)builtin-help.o: builtin-help.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
831 $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) \ 893 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) \
832 '-DPERF_HTML_PATH="$(htmldir_SQ)"' \ 894 '-DPERF_HTML_PATH="$(htmldir_SQ)"' \
833 '-DPERF_MAN_PATH="$(mandir_SQ)"' \ 895 '-DPERF_MAN_PATH="$(mandir_SQ)"' \
834 '-DPERF_INFO_PATH="$(infodir_SQ)"' $< 896 '-DPERF_INFO_PATH="$(infodir_SQ)"' $<
835 897
836builtin-timechart.o: builtin-timechart.c common-cmds.h PERF-CFLAGS 898$(OUTPUT)builtin-timechart.o: builtin-timechart.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
837 $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) \ 899 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) \
838 '-DPERF_HTML_PATH="$(htmldir_SQ)"' \ 900 '-DPERF_HTML_PATH="$(htmldir_SQ)"' \
839 '-DPERF_MAN_PATH="$(mandir_SQ)"' \ 901 '-DPERF_MAN_PATH="$(mandir_SQ)"' \
840 '-DPERF_INFO_PATH="$(infodir_SQ)"' $< 902 '-DPERF_INFO_PATH="$(infodir_SQ)"' $<
841 903
842$(BUILT_INS): perf$X 904$(BUILT_INS): $(OUTPUT)perf$X
843 $(QUIET_BUILT_IN)$(RM) $@ && \ 905 $(QUIET_BUILT_IN)$(RM) $@ && \
844 ln perf$X $@ 2>/dev/null || \ 906 ln perf$X $@ 2>/dev/null || \
845 ln -s perf$X $@ 2>/dev/null || \ 907 ln -s perf$X $@ 2>/dev/null || \
846 cp perf$X $@ 908 cp perf$X $@
847 909
848common-cmds.h: util/generate-cmdlist.sh command-list.txt 910$(OUTPUT)common-cmds.h: util/generate-cmdlist.sh command-list.txt
849 911
850common-cmds.h: $(wildcard Documentation/perf-*.txt) 912$(OUTPUT)common-cmds.h: $(wildcard Documentation/perf-*.txt)
851 $(QUIET_GEN). util/generate-cmdlist.sh > $@+ && mv $@+ $@ 913 $(QUIET_GEN). util/generate-cmdlist.sh > $@+ && mv $@+ $@
852 914
853$(patsubst %.sh,%,$(SCRIPT_SH)) : % : %.sh 915$(patsubst %.sh,%,$(SCRIPT_SH)) : % : %.sh
@@ -859,7 +921,7 @@ $(patsubst %.sh,%,$(SCRIPT_SH)) : % : %.sh
859 -e 's/@@NO_CURL@@/$(NO_CURL)/g' \ 921 -e 's/@@NO_CURL@@/$(NO_CURL)/g' \
860 $@.sh >$@+ && \ 922 $@.sh >$@+ && \
861 chmod +x $@+ && \ 923 chmod +x $@+ && \
862 mv $@+ $@ 924 mv $@+ $(OUTPUT)$@
863 925
864configure: configure.ac 926configure: configure.ac
865 $(QUIET_GEN)$(RM) $@ $<+ && \ 927 $(QUIET_GEN)$(RM) $@ $<+ && \
@@ -869,60 +931,50 @@ configure: configure.ac
869 $(RM) $<+ 931 $(RM) $<+
870 932
871# These can record PERF_VERSION 933# These can record PERF_VERSION
872perf.o perf.spec \ 934$(OUTPUT)perf.o perf.spec \
873 $(patsubst %.sh,%,$(SCRIPT_SH)) \ 935 $(patsubst %.sh,%,$(SCRIPT_SH)) \
874 $(patsubst %.perl,%,$(SCRIPT_PERL)) \ 936 $(patsubst %.perl,%,$(SCRIPT_PERL)) \
875 : PERF-VERSION-FILE 937 : $(OUTPUT)PERF-VERSION-FILE
876 938
877%.o: %.c PERF-CFLAGS 939$(OUTPUT)%.o: %.c $(OUTPUT)PERF-CFLAGS
878 $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) $< 940 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $<
879%.s: %.c PERF-CFLAGS 941$(OUTPUT)%.s: %.c $(OUTPUT)PERF-CFLAGS
880 $(QUIET_CC)$(CC) -S $(ALL_CFLAGS) $< 942 $(QUIET_CC)$(CC) -S $(ALL_CFLAGS) $<
881%.o: %.S 943$(OUTPUT)%.o: %.S
882 $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) $< 944 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $<
883 945
884util/exec_cmd.o: util/exec_cmd.c PERF-CFLAGS 946$(OUTPUT)util/exec_cmd.o: util/exec_cmd.c $(OUTPUT)PERF-CFLAGS
885 $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) \ 947 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) \
886 '-DPERF_EXEC_PATH="$(perfexecdir_SQ)"' \ 948 '-DPERF_EXEC_PATH="$(perfexecdir_SQ)"' \
887 '-DBINDIR="$(bindir_relative_SQ)"' \ 949 '-DBINDIR="$(bindir_relative_SQ)"' \
888 '-DPREFIX="$(prefix_SQ)"' \ 950 '-DPREFIX="$(prefix_SQ)"' \
889 $< 951 $<
890 952
891builtin-init-db.o: builtin-init-db.c PERF-CFLAGS 953$(OUTPUT)builtin-init-db.o: builtin-init-db.c $(OUTPUT)PERF-CFLAGS
892 $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) -DDEFAULT_PERF_TEMPLATE_DIR='"$(template_dir_SQ)"' $< 954 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -DDEFAULT_PERF_TEMPLATE_DIR='"$(template_dir_SQ)"' $<
893
894util/config.o: util/config.c PERF-CFLAGS
895 $(QUIET_CC)$(CC) -o $*.o -c $(ALL_CFLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
896
897util/rbtree.o: ../../lib/rbtree.c PERF-CFLAGS
898 $(QUIET_CC)$(CC) -o util/rbtree.o -c $(ALL_CFLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
899
900# some perf warning policies can't fit to lib/bitmap.c, eg: it warns about variable shadowing
901# from <string.h> that comes from kernel headers wrapping.
902KBITMAP_FLAGS=`echo $(ALL_CFLAGS) | sed s/-Wshadow// | sed s/-Wswitch-default// | sed s/-Wextra//`
903 955
904util/bitmap.o: ../../lib/bitmap.c PERF-CFLAGS 956$(OUTPUT)util/config.o: util/config.c $(OUTPUT)PERF-CFLAGS
905 $(QUIET_CC)$(CC) -o util/bitmap.o -c $(KBITMAP_FLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $< 957 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
906 958
907util/hweight.o: ../../lib/hweight.c PERF-CFLAGS 959$(OUTPUT)util/newt.o: util/newt.c $(OUTPUT)PERF-CFLAGS
908 $(QUIET_CC)$(CC) -o util/hweight.o -c $(ALL_CFLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $< 960 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -DENABLE_SLFUTURE_CONST $<
909 961
910util/find_next_bit.o: ../../lib/find_next_bit.c PERF-CFLAGS 962$(OUTPUT)util/rbtree.o: ../../lib/rbtree.c $(OUTPUT)PERF-CFLAGS
911 $(QUIET_CC)$(CC) -o util/find_next_bit.o -c $(ALL_CFLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $< 963 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
912 964
913util/scripting-engines/trace-event-perl.o: util/scripting-engines/trace-event-perl.c PERF-CFLAGS 965$(OUTPUT)util/scripting-engines/trace-event-perl.o: util/scripting-engines/trace-event-perl.c $(OUTPUT)PERF-CFLAGS
914 $(QUIET_CC)$(CC) -o util/scripting-engines/trace-event-perl.o -c $(ALL_CFLAGS) $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow $< 966 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow $<
915 967
916scripts/perl/Perf-Trace-Util/Context.o: scripts/perl/Perf-Trace-Util/Context.c PERF-CFLAGS 968$(OUTPUT)scripts/perl/Perf-Trace-Util/Context.o: scripts/perl/Perf-Trace-Util/Context.c $(OUTPUT)PERF-CFLAGS
917 $(QUIET_CC)$(CC) -o scripts/perl/Perf-Trace-Util/Context.o -c $(ALL_CFLAGS) $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs $< 969 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs $<
918 970
919util/scripting-engines/trace-event-python.o: util/scripting-engines/trace-event-python.c PERF-CFLAGS 971$(OUTPUT)util/scripting-engines/trace-event-python.o: util/scripting-engines/trace-event-python.c $(OUTPUT)PERF-CFLAGS
920 $(QUIET_CC)$(CC) -o util/scripting-engines/trace-event-python.o -c $(ALL_CFLAGS) $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow $< 972 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow $<
921 973
922scripts/python/Perf-Trace-Util/Context.o: scripts/python/Perf-Trace-Util/Context.c PERF-CFLAGS 974$(OUTPUT)scripts/python/Perf-Trace-Util/Context.o: scripts/python/Perf-Trace-Util/Context.c $(OUTPUT)PERF-CFLAGS
923 $(QUIET_CC)$(CC) -o scripts/python/Perf-Trace-Util/Context.o -c $(ALL_CFLAGS) $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs $< 975 $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs $<
924 976
925perf-%$X: %.o $(PERFLIBS) 977$(OUTPUT)perf-%$X: %.o $(PERFLIBS)
926 $(QUIET_LINK)$(CC) $(ALL_CFLAGS) -o $@ $(ALL_LDFLAGS) $(filter %.o,$^) $(LIBS) 978 $(QUIET_LINK)$(CC) $(ALL_CFLAGS) -o $@ $(ALL_LDFLAGS) $(filter %.o,$^) $(LIBS)
927 979
928$(LIB_OBJS) $(BUILTIN_OBJS): $(LIB_H) 980$(LIB_OBJS) $(BUILTIN_OBJS): $(LIB_H)
@@ -963,17 +1015,17 @@ cscope:
963TRACK_CFLAGS = $(subst ','\'',$(ALL_CFLAGS)):\ 1015TRACK_CFLAGS = $(subst ','\'',$(ALL_CFLAGS)):\
964 $(bindir_SQ):$(perfexecdir_SQ):$(template_dir_SQ):$(prefix_SQ) 1016 $(bindir_SQ):$(perfexecdir_SQ):$(template_dir_SQ):$(prefix_SQ)
965 1017
966PERF-CFLAGS: .FORCE-PERF-CFLAGS 1018$(OUTPUT)PERF-CFLAGS: .FORCE-PERF-CFLAGS
967 @FLAGS='$(TRACK_CFLAGS)'; \ 1019 @FLAGS='$(TRACK_CFLAGS)'; \
968 if test x"$$FLAGS" != x"`cat PERF-CFLAGS 2>/dev/null`" ; then \ 1020 if test x"$$FLAGS" != x"`cat $(OUTPUT)PERF-CFLAGS 2>/dev/null`" ; then \
969 echo 1>&2 " * new build flags or prefix"; \ 1021 echo 1>&2 " * new build flags or prefix"; \
970 echo "$$FLAGS" >PERF-CFLAGS; \ 1022 echo "$$FLAGS" >$(OUTPUT)PERF-CFLAGS; \
971 fi 1023 fi
972 1024
973# We need to apply sq twice, once to protect from the shell 1025# We need to apply sq twice, once to protect from the shell
974# that runs PERF-BUILD-OPTIONS, and then again to protect it 1026# that runs $(OUTPUT)PERF-BUILD-OPTIONS, and then again to protect it
975# and the first level quoting from the shell that runs "echo". 1027# and the first level quoting from the shell that runs "echo".
976PERF-BUILD-OPTIONS: .FORCE-PERF-BUILD-OPTIONS 1028$(OUTPUT)PERF-BUILD-OPTIONS: .FORCE-PERF-BUILD-OPTIONS
977 @echo SHELL_PATH=\''$(subst ','\'',$(SHELL_PATH_SQ))'\' >$@ 1029 @echo SHELL_PATH=\''$(subst ','\'',$(SHELL_PATH_SQ))'\' >$@
978 @echo TAR=\''$(subst ','\'',$(subst ','\'',$(TAR)))'\' >>$@ 1030 @echo TAR=\''$(subst ','\'',$(subst ','\'',$(TAR)))'\' >>$@
979 @echo NO_CURL=\''$(subst ','\'',$(subst ','\'',$(NO_CURL)))'\' >>$@ 1031 @echo NO_CURL=\''$(subst ','\'',$(subst ','\'',$(NO_CURL)))'\' >>$@
@@ -994,7 +1046,7 @@ all:: $(TEST_PROGRAMS)
994 1046
995export NO_SVN_TESTS 1047export NO_SVN_TESTS
996 1048
997check: common-cmds.h 1049check: $(OUTPUT)common-cmds.h
998 if sparse; \ 1050 if sparse; \
999 then \ 1051 then \
1000 for i in *.c */*.c; \ 1052 for i in *.c */*.c; \
@@ -1028,10 +1080,10 @@ export perfexec_instdir
1028 1080
1029install: all 1081install: all
1030 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(bindir_SQ)' 1082 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(bindir_SQ)'
1031 $(INSTALL) perf$X '$(DESTDIR_SQ)$(bindir_SQ)' 1083 $(INSTALL) $(OUTPUT)perf$X '$(DESTDIR_SQ)$(bindir_SQ)'
1032 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/Perf-Trace-Util/lib/Perf/Trace' 1084 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/Perf-Trace-Util/lib/Perf/Trace'
1033 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/bin' 1085 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/bin'
1034 $(INSTALL) perf-archive -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)' 1086 $(INSTALL) $(OUTPUT)perf-archive -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)'
1035 $(INSTALL) scripts/perl/Perf-Trace-Util/lib/Perf/Trace/* -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/Perf-Trace-Util/lib/Perf/Trace' 1087 $(INSTALL) scripts/perl/Perf-Trace-Util/lib/Perf/Trace/* -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/Perf-Trace-Util/lib/Perf/Trace'
1036 $(INSTALL) scripts/perl/*.pl -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl' 1088 $(INSTALL) scripts/perl/*.pl -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl'
1037 $(INSTALL) scripts/perl/bin/* -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/bin' 1089 $(INSTALL) scripts/perl/bin/* -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/bin'
@@ -1045,7 +1097,7 @@ ifdef BUILT_INS
1045 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(perfexec_instdir_SQ)' 1097 $(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(perfexec_instdir_SQ)'
1046 $(INSTALL) $(BUILT_INS) '$(DESTDIR_SQ)$(perfexec_instdir_SQ)' 1098 $(INSTALL) $(BUILT_INS) '$(DESTDIR_SQ)$(perfexec_instdir_SQ)'
1047ifneq (,$X) 1099ifneq (,$X)
1048 $(foreach p,$(patsubst %$X,%,$(filter %$X,$(ALL_PROGRAMS) $(BUILT_INS) perf$X)), $(RM) '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/$p';) 1100 $(foreach p,$(patsubst %$X,%,$(filter %$X,$(ALL_PROGRAMS) $(BUILT_INS) $(OUTPUT)perf$X)), $(RM) '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/$p';)
1049endif 1101endif
1050endif 1102endif
1051 1103
@@ -1129,14 +1181,14 @@ clean:
1129 $(RM) *.o */*.o */*/*.o */*/*/*.o $(LIB_FILE) 1181 $(RM) *.o */*.o */*/*.o */*/*/*.o $(LIB_FILE)
1130 $(RM) $(ALL_PROGRAMS) $(BUILT_INS) perf$X 1182 $(RM) $(ALL_PROGRAMS) $(BUILT_INS) perf$X
1131 $(RM) $(TEST_PROGRAMS) 1183 $(RM) $(TEST_PROGRAMS)
1132 $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo common-cmds.h TAGS tags cscope* 1184 $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope*
1133 $(RM) -r autom4te.cache 1185 $(RM) -r autom4te.cache
1134 $(RM) config.log config.mak.autogen config.mak.append config.status config.cache 1186 $(RM) config.log config.mak.autogen config.mak.append config.status config.cache
1135 $(RM) -r $(PERF_TARNAME) .doc-tmp-dir 1187 $(RM) -r $(PERF_TARNAME) .doc-tmp-dir
1136 $(RM) $(PERF_TARNAME).tar.gz perf-core_$(PERF_VERSION)-*.tar.gz 1188 $(RM) $(PERF_TARNAME).tar.gz perf-core_$(PERF_VERSION)-*.tar.gz
1137 $(RM) $(htmldocs).tar.gz $(manpages).tar.gz 1189 $(RM) $(htmldocs).tar.gz $(manpages).tar.gz
1138 $(MAKE) -C Documentation/ clean 1190 $(MAKE) -C Documentation/ clean
1139 $(RM) PERF-VERSION-FILE PERF-CFLAGS PERF-BUILD-OPTIONS 1191 $(RM) $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)PERF-CFLAGS $(OUTPUT)PERF-BUILD-OPTIONS
1140 1192
1141.PHONY: all install clean strip 1193.PHONY: all install clean strip
1142.PHONY: shell_compatibility_test please_set_SHELL_PATH_to_a_more_modern_shell 1194.PHONY: shell_compatibility_test please_set_SHELL_PATH_to_a_more_modern_shell
diff --git a/tools/perf/arch/powerpc/Makefile b/tools/perf/arch/powerpc/Makefile
new file mode 100644
index 000000000000..15130b50dfe3
--- /dev/null
+++ b/tools/perf/arch/powerpc/Makefile
@@ -0,0 +1,4 @@
1ifndef NO_DWARF
2PERF_HAVE_DWARF_REGS := 1
3LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
4endif
diff --git a/tools/perf/arch/powerpc/util/dwarf-regs.c b/tools/perf/arch/powerpc/util/dwarf-regs.c
new file mode 100644
index 000000000000..48ae0c5e3f73
--- /dev/null
+++ b/tools/perf/arch/powerpc/util/dwarf-regs.c
@@ -0,0 +1,88 @@
1/*
2 * Mapping of DWARF debug register numbers into register names.
3 *
4 * Copyright (C) 2010 Ian Munsie, IBM Corporation.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <libio.h>
13#include <dwarf-regs.h>
14
15
16struct pt_regs_dwarfnum {
17 const char *name;
18 unsigned int dwarfnum;
19};
20
21#define STR(s) #s
22#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num}
23#define GPR_DWARFNUM_NAME(num) \
24 {.name = STR(%gpr##num), .dwarfnum = num}
25#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0}
26
27/*
28 * Reference:
29 * http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html
30 */
31static const struct pt_regs_dwarfnum regdwarfnum_table[] = {
32 GPR_DWARFNUM_NAME(0),
33 GPR_DWARFNUM_NAME(1),
34 GPR_DWARFNUM_NAME(2),
35 GPR_DWARFNUM_NAME(3),
36 GPR_DWARFNUM_NAME(4),
37 GPR_DWARFNUM_NAME(5),
38 GPR_DWARFNUM_NAME(6),
39 GPR_DWARFNUM_NAME(7),
40 GPR_DWARFNUM_NAME(8),
41 GPR_DWARFNUM_NAME(9),
42 GPR_DWARFNUM_NAME(10),
43 GPR_DWARFNUM_NAME(11),
44 GPR_DWARFNUM_NAME(12),
45 GPR_DWARFNUM_NAME(13),
46 GPR_DWARFNUM_NAME(14),
47 GPR_DWARFNUM_NAME(15),
48 GPR_DWARFNUM_NAME(16),
49 GPR_DWARFNUM_NAME(17),
50 GPR_DWARFNUM_NAME(18),
51 GPR_DWARFNUM_NAME(19),
52 GPR_DWARFNUM_NAME(20),
53 GPR_DWARFNUM_NAME(21),
54 GPR_DWARFNUM_NAME(22),
55 GPR_DWARFNUM_NAME(23),
56 GPR_DWARFNUM_NAME(24),
57 GPR_DWARFNUM_NAME(25),
58 GPR_DWARFNUM_NAME(26),
59 GPR_DWARFNUM_NAME(27),
60 GPR_DWARFNUM_NAME(28),
61 GPR_DWARFNUM_NAME(29),
62 GPR_DWARFNUM_NAME(30),
63 GPR_DWARFNUM_NAME(31),
64 REG_DWARFNUM_NAME("%msr", 66),
65 REG_DWARFNUM_NAME("%ctr", 109),
66 REG_DWARFNUM_NAME("%link", 108),
67 REG_DWARFNUM_NAME("%xer", 101),
68 REG_DWARFNUM_NAME("%dar", 119),
69 REG_DWARFNUM_NAME("%dsisr", 118),
70 REG_DWARFNUM_END,
71};
72
73/**
74 * get_arch_regstr() - lookup register name from it's DWARF register number
75 * @n: the DWARF register number
76 *
77 * get_arch_regstr() returns the name of the register in struct
78 * regdwarfnum_table from it's DWARF register number. If the register is not
79 * found in the table, this returns NULL;
80 */
81const char *get_arch_regstr(unsigned int n)
82{
83 const struct pt_regs_dwarfnum *roff;
84 for (roff = regdwarfnum_table; roff->name != NULL; roff++)
85 if (roff->dwarfnum == n)
86 return roff->name;
87 return NULL;
88}
diff --git a/tools/perf/arch/x86/Makefile b/tools/perf/arch/x86/Makefile
new file mode 100644
index 000000000000..15130b50dfe3
--- /dev/null
+++ b/tools/perf/arch/x86/Makefile
@@ -0,0 +1,4 @@
1ifndef NO_DWARF
2PERF_HAVE_DWARF_REGS := 1
3LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
4endif
diff --git a/tools/perf/arch/x86/util/dwarf-regs.c b/tools/perf/arch/x86/util/dwarf-regs.c
new file mode 100644
index 000000000000..a794d3081928
--- /dev/null
+++ b/tools/perf/arch/x86/util/dwarf-regs.c
@@ -0,0 +1,75 @@
1/*
2 * dwarf-regs.c : Mapping of DWARF debug register numbers into register names.
3 * Extracted from probe-finder.c
4 *
5 * Written by Masami Hiramatsu <mhiramat@redhat.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 *
21 */
22
23#include <libio.h>
24#include <dwarf-regs.h>
25
26/*
27 * Generic dwarf analysis helpers
28 */
29
30#define X86_32_MAX_REGS 8
31const char *x86_32_regs_table[X86_32_MAX_REGS] = {
32 "%ax",
33 "%cx",
34 "%dx",
35 "%bx",
36 "$stack", /* Stack address instead of %sp */
37 "%bp",
38 "%si",
39 "%di",
40};
41
42#define X86_64_MAX_REGS 16
43const char *x86_64_regs_table[X86_64_MAX_REGS] = {
44 "%ax",
45 "%dx",
46 "%cx",
47 "%bx",
48 "%si",
49 "%di",
50 "%bp",
51 "%sp",
52 "%r8",
53 "%r9",
54 "%r10",
55 "%r11",
56 "%r12",
57 "%r13",
58 "%r14",
59 "%r15",
60};
61
62/* TODO: switching by dwarf address size */
63#ifdef __x86_64__
64#define ARCH_MAX_REGS X86_64_MAX_REGS
65#define arch_regs_table x86_64_regs_table
66#else
67#define ARCH_MAX_REGS X86_32_MAX_REGS
68#define arch_regs_table x86_32_regs_table
69#endif
70
71/* Return architecture dependent register string (for kprobe-tracer) */
72const char *get_arch_regstr(unsigned int n)
73{
74 return (n <= ARCH_MAX_REGS) ? arch_regs_table[n] : NULL;
75}
diff --git a/tools/perf/bench/mem-memcpy.c b/tools/perf/bench/mem-memcpy.c
index 89773178e894..38dae7465142 100644
--- a/tools/perf/bench/mem-memcpy.c
+++ b/tools/perf/bench/mem-memcpy.c
@@ -10,7 +10,6 @@
10#include "../perf.h" 10#include "../perf.h"
11#include "../util/util.h" 11#include "../util/util.h"
12#include "../util/parse-options.h" 12#include "../util/parse-options.h"
13#include "../util/string.h"
14#include "../util/header.h" 13#include "../util/header.h"
15#include "bench.h" 14#include "bench.h"
16 15
@@ -24,7 +23,7 @@
24 23
25static const char *length_str = "1MB"; 24static const char *length_str = "1MB";
26static const char *routine = "default"; 25static const char *routine = "default";
27static int use_clock = 0; 26static bool use_clock = false;
28static int clock_fd; 27static int clock_fd;
29 28
30static const struct option options[] = { 29static const struct option options[] = {
diff --git a/tools/perf/bench/sched-messaging.c b/tools/perf/bench/sched-messaging.c
index 81cee78181fa..d1d1b30f99c1 100644
--- a/tools/perf/bench/sched-messaging.c
+++ b/tools/perf/bench/sched-messaging.c
@@ -31,9 +31,9 @@
31 31
32#define DATASIZE 100 32#define DATASIZE 100
33 33
34static int use_pipes = 0; 34static bool use_pipes = false;
35static unsigned int loops = 100; 35static unsigned int loops = 100;
36static unsigned int thread_mode = 0; 36static bool thread_mode = false;
37static unsigned int num_groups = 10; 37static unsigned int num_groups = 10;
38 38
39struct sender_context { 39struct sender_context {
@@ -256,10 +256,8 @@ static const struct option options[] = {
256 "Use pipe() instead of socketpair()"), 256 "Use pipe() instead of socketpair()"),
257 OPT_BOOLEAN('t', "thread", &thread_mode, 257 OPT_BOOLEAN('t', "thread", &thread_mode,
258 "Be multi thread instead of multi process"), 258 "Be multi thread instead of multi process"),
259 OPT_INTEGER('g', "group", &num_groups, 259 OPT_UINTEGER('g', "group", &num_groups, "Specify number of groups"),
260 "Specify number of groups"), 260 OPT_UINTEGER('l', "loop", &loops, "Specify number of loops"),
261 OPT_INTEGER('l', "loop", &loops,
262 "Specify number of loops"),
263 OPT_END() 261 OPT_END()
264}; 262};
265 263
diff --git a/tools/perf/bench/sched-pipe.c b/tools/perf/bench/sched-pipe.c
index 4f77c7c27640..d9ab3ce446ac 100644
--- a/tools/perf/bench/sched-pipe.c
+++ b/tools/perf/bench/sched-pipe.c
@@ -93,7 +93,7 @@ int bench_sched_pipe(int argc, const char **argv,
93 93
94 switch (bench_format) { 94 switch (bench_format) {
95 case BENCH_FORMAT_DEFAULT: 95 case BENCH_FORMAT_DEFAULT:
96 printf("# Extecuted %d pipe operations between two tasks\n\n", 96 printf("# Executed %d pipe operations between two tasks\n\n",
97 loops); 97 loops);
98 98
99 result_usec = diff.tv_sec * 1000000; 99 result_usec = diff.tv_sec * 1000000;
diff --git a/tools/perf/builtin-annotate.c b/tools/perf/builtin-annotate.c
index 6ad7148451c5..77bcc9b130f5 100644
--- a/tools/perf/builtin-annotate.c
+++ b/tools/perf/builtin-annotate.c
@@ -14,7 +14,6 @@
14#include "util/cache.h" 14#include "util/cache.h"
15#include <linux/rbtree.h> 15#include <linux/rbtree.h>
16#include "util/symbol.h" 16#include "util/symbol.h"
17#include "util/string.h"
18 17
19#include "perf.h" 18#include "perf.h"
20#include "util/debug.h" 19#include "util/debug.h"
@@ -29,80 +28,16 @@
29 28
30static char const *input_name = "perf.data"; 29static char const *input_name = "perf.data";
31 30
32static int force; 31static bool force;
33 32
34static int full_paths; 33static bool full_paths;
35 34
36static int print_line; 35static bool print_line;
37
38struct sym_hist {
39 u64 sum;
40 u64 ip[0];
41};
42
43struct sym_ext {
44 struct rb_node node;
45 double percent;
46 char *path;
47};
48
49struct sym_priv {
50 struct sym_hist *hist;
51 struct sym_ext *ext;
52};
53 36
54static const char *sym_hist_filter; 37static const char *sym_hist_filter;
55 38
56static int sym__alloc_hist(struct symbol *self) 39static int hists__add_entry(struct hists *self, struct addr_location *al)
57{
58 struct sym_priv *priv = symbol__priv(self);
59 const int size = (sizeof(*priv->hist) +
60 (self->end - self->start) * sizeof(u64));
61
62 priv->hist = zalloc(size);
63 return priv->hist == NULL ? -1 : 0;
64}
65
66/*
67 * collect histogram counts
68 */
69static int annotate__hist_hit(struct hist_entry *he, u64 ip)
70{
71 unsigned int sym_size, offset;
72 struct symbol *sym = he->sym;
73 struct sym_priv *priv;
74 struct sym_hist *h;
75
76 he->count++;
77
78 if (!sym || !he->map)
79 return 0;
80
81 priv = symbol__priv(sym);
82 if (priv->hist == NULL && sym__alloc_hist(sym) < 0)
83 return -ENOMEM;
84
85 sym_size = sym->end - sym->start;
86 offset = ip - sym->start;
87
88 pr_debug3("%s: ip=%#Lx\n", __func__, he->map->unmap_ip(he->map, ip));
89
90 if (offset >= sym_size)
91 return 0;
92
93 h = priv->hist;
94 h->sum++;
95 h->ip[offset]++;
96
97 pr_debug3("%#Lx %s: count++ [ip: %#Lx, %#Lx] => %Ld\n", he->sym->start,
98 he->sym->name, ip, ip - he->sym->start, h->ip[offset]);
99 return 0;
100}
101
102static int perf_session__add_hist_entry(struct perf_session *self,
103 struct addr_location *al, u64 count)
104{ 40{
105 bool hit;
106 struct hist_entry *he; 41 struct hist_entry *he;
107 42
108 if (sym_hist_filter != NULL && 43 if (sym_hist_filter != NULL &&
@@ -116,11 +51,11 @@ static int perf_session__add_hist_entry(struct perf_session *self,
116 return 0; 51 return 0;
117 } 52 }
118 53
119 he = __perf_session__add_hist_entry(&self->hists, al, NULL, count, &hit); 54 he = __hists__add_entry(self, al, NULL, 1);
120 if (he == NULL) 55 if (he == NULL)
121 return -ENOMEM; 56 return -ENOMEM;
122 57
123 return annotate__hist_hit(he, al->addr); 58 return hist_entry__inc_addr_samples(he, al->addr);
124} 59}
125 60
126static int process_sample_event(event_t *event, struct perf_session *session) 61static int process_sample_event(event_t *event, struct perf_session *session)
@@ -136,7 +71,7 @@ static int process_sample_event(event_t *event, struct perf_session *session)
136 return -1; 71 return -1;
137 } 72 }
138 73
139 if (!al.filtered && perf_session__add_hist_entry(session, &al, 1)) { 74 if (!al.filtered && hists__add_entry(&session->hists, &al)) {
140 pr_warning("problem incrementing symbol count, " 75 pr_warning("problem incrementing symbol count, "
141 "skipping event\n"); 76 "skipping event\n");
142 return -1; 77 return -1;
@@ -145,106 +80,11 @@ static int process_sample_event(event_t *event, struct perf_session *session)
145 return 0; 80 return 0;
146} 81}
147 82
148struct objdump_line {
149 struct list_head node;
150 s64 offset;
151 char *line;
152};
153
154static struct objdump_line *objdump_line__new(s64 offset, char *line)
155{
156 struct objdump_line *self = malloc(sizeof(*self));
157
158 if (self != NULL) {
159 self->offset = offset;
160 self->line = line;
161 }
162
163 return self;
164}
165
166static void objdump_line__free(struct objdump_line *self)
167{
168 free(self->line);
169 free(self);
170}
171
172static void objdump__add_line(struct list_head *head, struct objdump_line *line)
173{
174 list_add_tail(&line->node, head);
175}
176
177static struct objdump_line *objdump__get_next_ip_line(struct list_head *head,
178 struct objdump_line *pos)
179{
180 list_for_each_entry_continue(pos, head, node)
181 if (pos->offset >= 0)
182 return pos;
183
184 return NULL;
185}
186
187static int parse_line(FILE *file, struct hist_entry *he,
188 struct list_head *head)
189{
190 struct symbol *sym = he->sym;
191 struct objdump_line *objdump_line;
192 char *line = NULL, *tmp, *tmp2;
193 size_t line_len;
194 s64 line_ip, offset = -1;
195 char *c;
196
197 if (getline(&line, &line_len, file) < 0)
198 return -1;
199
200 if (!line)
201 return -1;
202
203 c = strchr(line, '\n');
204 if (c)
205 *c = 0;
206
207 line_ip = -1;
208
209 /*
210 * Strip leading spaces:
211 */
212 tmp = line;
213 while (*tmp) {
214 if (*tmp != ' ')
215 break;
216 tmp++;
217 }
218
219 if (*tmp) {
220 /*
221 * Parse hexa addresses followed by ':'
222 */
223 line_ip = strtoull(tmp, &tmp2, 16);
224 if (*tmp2 != ':')
225 line_ip = -1;
226 }
227
228 if (line_ip != -1) {
229 u64 start = map__rip_2objdump(he->map, sym->start);
230 offset = line_ip - start;
231 }
232
233 objdump_line = objdump_line__new(offset, line);
234 if (objdump_line == NULL) {
235 free(line);
236 return -1;
237 }
238 objdump__add_line(head, objdump_line);
239
240 return 0;
241}
242
243static int objdump_line__print(struct objdump_line *self, 83static int objdump_line__print(struct objdump_line *self,
244 struct list_head *head, 84 struct list_head *head,
245 struct hist_entry *he, u64 len) 85 struct hist_entry *he, u64 len)
246{ 86{
247 struct symbol *sym = he->sym; 87 struct symbol *sym = he->ms.sym;
248 static const char *prev_line; 88 static const char *prev_line;
249 static const char *prev_color; 89 static const char *prev_color;
250 90
@@ -327,7 +167,7 @@ static void insert_source_line(struct sym_ext *sym_ext)
327 167
328static void free_source_line(struct hist_entry *he, int len) 168static void free_source_line(struct hist_entry *he, int len)
329{ 169{
330 struct sym_priv *priv = symbol__priv(he->sym); 170 struct sym_priv *priv = symbol__priv(he->ms.sym);
331 struct sym_ext *sym_ext = priv->ext; 171 struct sym_ext *sym_ext = priv->ext;
332 int i; 172 int i;
333 173
@@ -346,7 +186,7 @@ static void free_source_line(struct hist_entry *he, int len)
346static void 186static void
347get_source_line(struct hist_entry *he, int len, const char *filename) 187get_source_line(struct hist_entry *he, int len, const char *filename)
348{ 188{
349 struct symbol *sym = he->sym; 189 struct symbol *sym = he->ms.sym;
350 u64 start; 190 u64 start;
351 int i; 191 int i;
352 char cmd[PATH_MAX * 2]; 192 char cmd[PATH_MAX * 2];
@@ -361,7 +201,7 @@ get_source_line(struct hist_entry *he, int len, const char *filename)
361 if (!priv->ext) 201 if (!priv->ext)
362 return; 202 return;
363 203
364 start = he->map->unmap_ip(he->map, sym->start); 204 start = he->ms.map->unmap_ip(he->ms.map, sym->start);
365 205
366 for (i = 0; i < len; i++) { 206 for (i = 0; i < len; i++) {
367 char *path = NULL; 207 char *path = NULL;
@@ -425,7 +265,7 @@ static void print_summary(const char *filename)
425 265
426static void hist_entry__print_hits(struct hist_entry *self) 266static void hist_entry__print_hits(struct hist_entry *self)
427{ 267{
428 struct symbol *sym = self->sym; 268 struct symbol *sym = self->ms.sym;
429 struct sym_priv *priv = symbol__priv(sym); 269 struct sym_priv *priv = symbol__priv(sym);
430 struct sym_hist *h = priv->hist; 270 struct sym_hist *h = priv->hist;
431 u64 len = sym->end - sym->start, offset; 271 u64 len = sym->end - sym->start, offset;
@@ -439,23 +279,17 @@ static void hist_entry__print_hits(struct hist_entry *self)
439 279
440static void annotate_sym(struct hist_entry *he) 280static void annotate_sym(struct hist_entry *he)
441{ 281{
442 struct map *map = he->map; 282 struct map *map = he->ms.map;
443 struct dso *dso = map->dso; 283 struct dso *dso = map->dso;
444 struct symbol *sym = he->sym; 284 struct symbol *sym = he->ms.sym;
445 const char *filename = dso->long_name, *d_filename; 285 const char *filename = dso->long_name, *d_filename;
446 u64 len; 286 u64 len;
447 char command[PATH_MAX*2];
448 FILE *file;
449 LIST_HEAD(head); 287 LIST_HEAD(head);
450 struct objdump_line *pos, *n; 288 struct objdump_line *pos, *n;
451 289
452 if (!filename) 290 if (hist_entry__annotate(he, &head) < 0)
453 return; 291 return;
454 292
455 pr_debug("%s: filename=%s, sym=%s, start=%#Lx, end=%#Lx\n", __func__,
456 filename, sym->name, map->unmap_ip(map, sym->start),
457 map->unmap_ip(map, sym->end));
458
459 if (full_paths) 293 if (full_paths)
460 d_filename = filename; 294 d_filename = filename;
461 else 295 else
@@ -472,29 +306,6 @@ static void annotate_sym(struct hist_entry *he)
472 printf(" Percent | Source code & Disassembly of %s\n", d_filename); 306 printf(" Percent | Source code & Disassembly of %s\n", d_filename);
473 printf("------------------------------------------------\n"); 307 printf("------------------------------------------------\n");
474 308
475 if (verbose >= 2)
476 printf("annotating [%p] %30s : [%p] %30s\n",
477 dso, dso->long_name, sym, sym->name);
478
479 sprintf(command, "objdump --start-address=0x%016Lx --stop-address=0x%016Lx -dS %s|grep -v %s",
480 map__rip_2objdump(map, sym->start),
481 map__rip_2objdump(map, sym->end),
482 filename, filename);
483
484 if (verbose >= 3)
485 printf("doing: %s\n", command);
486
487 file = popen(command, "r");
488 if (!file)
489 return;
490
491 while (!feof(file)) {
492 if (parse_line(file, he, &head) < 0)
493 break;
494 }
495
496 pclose(file);
497
498 if (verbose) 309 if (verbose)
499 hist_entry__print_hits(he); 310 hist_entry__print_hits(he);
500 311
@@ -508,25 +319,25 @@ static void annotate_sym(struct hist_entry *he)
508 free_source_line(he, len); 319 free_source_line(he, len);
509} 320}
510 321
511static void perf_session__find_annotations(struct perf_session *self) 322static void hists__find_annotations(struct hists *self)
512{ 323{
513 struct rb_node *nd; 324 struct rb_node *nd;
514 325
515 for (nd = rb_first(&self->hists); nd; nd = rb_next(nd)) { 326 for (nd = rb_first(&self->entries); nd; nd = rb_next(nd)) {
516 struct hist_entry *he = rb_entry(nd, struct hist_entry, rb_node); 327 struct hist_entry *he = rb_entry(nd, struct hist_entry, rb_node);
517 struct sym_priv *priv; 328 struct sym_priv *priv;
518 329
519 if (he->sym == NULL) 330 if (he->ms.sym == NULL)
520 continue; 331 continue;
521 332
522 priv = symbol__priv(he->sym); 333 priv = symbol__priv(he->ms.sym);
523 if (priv->hist == NULL) 334 if (priv->hist == NULL)
524 continue; 335 continue;
525 336
526 annotate_sym(he); 337 annotate_sym(he);
527 /* 338 /*
528 * Since we have a hist_entry per IP for the same symbol, free 339 * Since we have a hist_entry per IP for the same symbol, free
529 * he->sym->hist to signal we already processed this symbol. 340 * he->ms.sym->hist to signal we already processed this symbol.
530 */ 341 */
531 free(priv->hist); 342 free(priv->hist);
532 priv->hist = NULL; 343 priv->hist = NULL;
@@ -545,7 +356,7 @@ static int __cmd_annotate(void)
545 int ret; 356 int ret;
546 struct perf_session *session; 357 struct perf_session *session;
547 358
548 session = perf_session__new(input_name, O_RDONLY, force); 359 session = perf_session__new(input_name, O_RDONLY, force, false);
549 if (session == NULL) 360 if (session == NULL)
550 return -ENOMEM; 361 return -ENOMEM;
551 362
@@ -554,7 +365,7 @@ static int __cmd_annotate(void)
554 goto out_delete; 365 goto out_delete;
555 366
556 if (dump_trace) { 367 if (dump_trace) {
557 event__print_totals(); 368 perf_session__fprintf_nr_events(session, stdout);
558 goto out_delete; 369 goto out_delete;
559 } 370 }
560 371
@@ -562,11 +373,11 @@ static int __cmd_annotate(void)
562 perf_session__fprintf(session, stdout); 373 perf_session__fprintf(session, stdout);
563 374
564 if (verbose > 2) 375 if (verbose > 2)
565 dsos__fprintf(stdout); 376 perf_session__fprintf_dsos(session, stdout);
566 377
567 perf_session__collapse_resort(&session->hists); 378 hists__collapse_resort(&session->hists);
568 perf_session__output_resort(&session->hists, session->event_total[0]); 379 hists__output_resort(&session->hists);
569 perf_session__find_annotations(session); 380 hists__find_annotations(&session->hists);
570out_delete: 381out_delete:
571 perf_session__delete(session); 382 perf_session__delete(session);
572 383
@@ -581,10 +392,12 @@ static const char * const annotate_usage[] = {
581static const struct option options[] = { 392static const struct option options[] = {
582 OPT_STRING('i', "input", &input_name, "file", 393 OPT_STRING('i', "input", &input_name, "file",
583 "input file name"), 394 "input file name"),
395 OPT_STRING('d', "dsos", &symbol_conf.dso_list_str, "dso[,dso...]",
396 "only consider symbols in these dsos"),
584 OPT_STRING('s', "symbol", &sym_hist_filter, "symbol", 397 OPT_STRING('s', "symbol", &sym_hist_filter, "symbol",
585 "symbol to annotate"), 398 "symbol to annotate"),
586 OPT_BOOLEAN('f', "force", &force, "don't complain, do it"), 399 OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
587 OPT_BOOLEAN('v', "verbose", &verbose, 400 OPT_INCR('v', "verbose", &verbose,
588 "be more verbose (show symbol address, etc)"), 401 "be more verbose (show symbol address, etc)"),
589 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace, 402 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
590 "dump raw trace in ASCII"), 403 "dump raw trace in ASCII"),
diff --git a/tools/perf/builtin-bench.c b/tools/perf/builtin-bench.c
index 46996774e559..fcb96269852a 100644
--- a/tools/perf/builtin-bench.c
+++ b/tools/perf/builtin-bench.c
@@ -95,7 +95,7 @@ static void dump_suites(int subsys_index)
95 return; 95 return;
96} 96}
97 97
98static char *bench_format_str; 98static const char *bench_format_str;
99int bench_format = BENCH_FORMAT_DEFAULT; 99int bench_format = BENCH_FORMAT_DEFAULT;
100 100
101static const struct option bench_options[] = { 101static const struct option bench_options[] = {
@@ -126,7 +126,7 @@ static void print_usage(void)
126 printf("\n"); 126 printf("\n");
127} 127}
128 128
129static int bench_str2int(char *str) 129static int bench_str2int(const char *str)
130{ 130{
131 if (!str) 131 if (!str)
132 return BENCH_FORMAT_DEFAULT; 132 return BENCH_FORMAT_DEFAULT;
diff --git a/tools/perf/builtin-buildid-cache.c b/tools/perf/builtin-buildid-cache.c
index 30a05f552c96..f8e3d1852029 100644
--- a/tools/perf/builtin-buildid-cache.c
+++ b/tools/perf/builtin-buildid-cache.c
@@ -27,7 +27,7 @@ static const struct option buildid_cache_options[] = {
27 "file list", "file(s) to add"), 27 "file list", "file(s) to add"),
28 OPT_STRING('r', "remove", &remove_name_list_str, "file list", 28 OPT_STRING('r', "remove", &remove_name_list_str, "file list",
29 "file(s) to remove"), 29 "file(s) to remove"),
30 OPT_BOOLEAN('v', "verbose", &verbose, "be more verbose"), 30 OPT_INCR('v', "verbose", &verbose, "be more verbose"),
31 OPT_END() 31 OPT_END()
32}; 32};
33 33
diff --git a/tools/perf/builtin-buildid-list.c b/tools/perf/builtin-buildid-list.c
index d0675c02f81e..44a47e13bd67 100644
--- a/tools/perf/builtin-buildid-list.c
+++ b/tools/perf/builtin-buildid-list.c
@@ -16,7 +16,7 @@
16#include "util/symbol.h" 16#include "util/symbol.h"
17 17
18static char const *input_name = "perf.data"; 18static char const *input_name = "perf.data";
19static int force; 19static bool force;
20static bool with_hits; 20static bool with_hits;
21 21
22static const char * const buildid_list_usage[] = { 22static const char * const buildid_list_usage[] = {
@@ -29,7 +29,7 @@ static const struct option options[] = {
29 OPT_STRING('i', "input", &input_name, "file", 29 OPT_STRING('i', "input", &input_name, "file",
30 "input file name"), 30 "input file name"),
31 OPT_BOOLEAN('f', "force", &force, "don't complain, do it"), 31 OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
32 OPT_BOOLEAN('v', "verbose", &verbose, 32 OPT_INCR('v', "verbose", &verbose,
33 "be more verbose"), 33 "be more verbose"),
34 OPT_END() 34 OPT_END()
35}; 35};
@@ -39,14 +39,14 @@ static int __cmd_buildid_list(void)
39 int err = -1; 39 int err = -1;
40 struct perf_session *session; 40 struct perf_session *session;
41 41
42 session = perf_session__new(input_name, O_RDONLY, force); 42 session = perf_session__new(input_name, O_RDONLY, force, false);
43 if (session == NULL) 43 if (session == NULL)
44 return -1; 44 return -1;
45 45
46 if (with_hits) 46 if (with_hits)
47 perf_session__process_events(session, &build_id__mark_dso_hit_ops); 47 perf_session__process_events(session, &build_id__mark_dso_hit_ops);
48 48
49 dsos__fprintf_buildid(stdout, with_hits); 49 perf_session__fprintf_dsos_buildid(session, stdout, with_hits);
50 50
51 perf_session__delete(session); 51 perf_session__delete(session);
52 return err; 52 return err;
diff --git a/tools/perf/builtin-diff.c b/tools/perf/builtin-diff.c
index 1ea15d8aeed1..a6e2fdc7a04e 100644
--- a/tools/perf/builtin-diff.c
+++ b/tools/perf/builtin-diff.c
@@ -19,23 +19,15 @@
19static char const *input_old = "perf.data.old", 19static char const *input_old = "perf.data.old",
20 *input_new = "perf.data"; 20 *input_new = "perf.data";
21static char diff__default_sort_order[] = "dso,symbol"; 21static char diff__default_sort_order[] = "dso,symbol";
22static int force; 22static bool force;
23static bool show_displacement; 23static bool show_displacement;
24 24
25static int perf_session__add_hist_entry(struct perf_session *self, 25static int hists__add_entry(struct hists *self,
26 struct addr_location *al, u64 count) 26 struct addr_location *al, u64 period)
27{ 27{
28 bool hit; 28 if (__hists__add_entry(self, al, NULL, period) != NULL)
29 struct hist_entry *he = __perf_session__add_hist_entry(&self->hists, 29 return 0;
30 al, NULL, 30 return -ENOMEM;
31 count, &hit);
32 if (he == NULL)
33 return -ENOMEM;
34
35 if (hit)
36 he->count += count;
37
38 return 0;
39} 31}
40 32
41static int diff__process_sample_event(event_t *event, struct perf_session *session) 33static int diff__process_sample_event(event_t *event, struct perf_session *session)
@@ -57,12 +49,12 @@ static int diff__process_sample_event(event_t *event, struct perf_session *sessi
57 49
58 event__parse_sample(event, session->sample_type, &data); 50 event__parse_sample(event, session->sample_type, &data);
59 51
60 if (perf_session__add_hist_entry(session, &al, data.period)) { 52 if (hists__add_entry(&session->hists, &al, data.period)) {
61 pr_warning("problem incrementing symbol count, skipping event\n"); 53 pr_warning("problem incrementing symbol period, skipping event\n");
62 return -1; 54 return -1;
63 } 55 }
64 56
65 session->events_stats.total += data.period; 57 session->hists.stats.total_period += data.period;
66 return 0; 58 return 0;
67} 59}
68 60
@@ -95,35 +87,34 @@ static void perf_session__insert_hist_entry_by_name(struct rb_root *root,
95 rb_insert_color(&he->rb_node, root); 87 rb_insert_color(&he->rb_node, root);
96} 88}
97 89
98static void perf_session__resort_hist_entries(struct perf_session *self) 90static void hists__resort_entries(struct hists *self)
99{ 91{
100 unsigned long position = 1; 92 unsigned long position = 1;
101 struct rb_root tmp = RB_ROOT; 93 struct rb_root tmp = RB_ROOT;
102 struct rb_node *next = rb_first(&self->hists); 94 struct rb_node *next = rb_first(&self->entries);
103 95
104 while (next != NULL) { 96 while (next != NULL) {
105 struct hist_entry *n = rb_entry(next, struct hist_entry, rb_node); 97 struct hist_entry *n = rb_entry(next, struct hist_entry, rb_node);
106 98
107 next = rb_next(&n->rb_node); 99 next = rb_next(&n->rb_node);
108 rb_erase(&n->rb_node, &self->hists); 100 rb_erase(&n->rb_node, &self->entries);
109 n->position = position++; 101 n->position = position++;
110 perf_session__insert_hist_entry_by_name(&tmp, n); 102 perf_session__insert_hist_entry_by_name(&tmp, n);
111 } 103 }
112 104
113 self->hists = tmp; 105 self->entries = tmp;
114} 106}
115 107
116static void perf_session__set_hist_entries_positions(struct perf_session *self) 108static void hists__set_positions(struct hists *self)
117{ 109{
118 perf_session__output_resort(&self->hists, self->events_stats.total); 110 hists__output_resort(self);
119 perf_session__resort_hist_entries(self); 111 hists__resort_entries(self);
120} 112}
121 113
122static struct hist_entry * 114static struct hist_entry *hists__find_entry(struct hists *self,
123perf_session__find_hist_entry(struct perf_session *self, 115 struct hist_entry *he)
124 struct hist_entry *he)
125{ 116{
126 struct rb_node *n = self->hists.rb_node; 117 struct rb_node *n = self->entries.rb_node;
127 118
128 while (n) { 119 while (n) {
129 struct hist_entry *iter = rb_entry(n, struct hist_entry, rb_node); 120 struct hist_entry *iter = rb_entry(n, struct hist_entry, rb_node);
@@ -140,14 +131,13 @@ perf_session__find_hist_entry(struct perf_session *self,
140 return NULL; 131 return NULL;
141} 132}
142 133
143static void perf_session__match_hists(struct perf_session *old_session, 134static void hists__match(struct hists *older, struct hists *newer)
144 struct perf_session *new_session)
145{ 135{
146 struct rb_node *nd; 136 struct rb_node *nd;
147 137
148 for (nd = rb_first(&new_session->hists); nd; nd = rb_next(nd)) { 138 for (nd = rb_first(&newer->entries); nd; nd = rb_next(nd)) {
149 struct hist_entry *pos = rb_entry(nd, struct hist_entry, rb_node); 139 struct hist_entry *pos = rb_entry(nd, struct hist_entry, rb_node);
150 pos->pair = perf_session__find_hist_entry(old_session, pos); 140 pos->pair = hists__find_entry(older, pos);
151 } 141 }
152} 142}
153 143
@@ -156,8 +146,8 @@ static int __cmd_diff(void)
156 int ret, i; 146 int ret, i;
157 struct perf_session *session[2]; 147 struct perf_session *session[2];
158 148
159 session[0] = perf_session__new(input_old, O_RDONLY, force); 149 session[0] = perf_session__new(input_old, O_RDONLY, force, false);
160 session[1] = perf_session__new(input_new, O_RDONLY, force); 150 session[1] = perf_session__new(input_new, O_RDONLY, force, false);
161 if (session[0] == NULL || session[1] == NULL) 151 if (session[0] == NULL || session[1] == NULL)
162 return -ENOMEM; 152 return -ENOMEM;
163 153
@@ -167,15 +157,13 @@ static int __cmd_diff(void)
167 goto out_delete; 157 goto out_delete;
168 } 158 }
169 159
170 perf_session__output_resort(&session[1]->hists, 160 hists__output_resort(&session[1]->hists);
171 session[1]->events_stats.total);
172 if (show_displacement) 161 if (show_displacement)
173 perf_session__set_hist_entries_positions(session[0]); 162 hists__set_positions(&session[0]->hists);
174 163
175 perf_session__match_hists(session[0], session[1]); 164 hists__match(&session[0]->hists, &session[1]->hists);
176 perf_session__fprintf_hists(&session[1]->hists, session[0], 165 hists__fprintf(&session[1]->hists, &session[0]->hists,
177 show_displacement, stdout, 166 show_displacement, stdout);
178 session[1]->events_stats.total);
179out_delete: 167out_delete:
180 for (i = 0; i < 2; ++i) 168 for (i = 0; i < 2; ++i)
181 perf_session__delete(session[i]); 169 perf_session__delete(session[i]);
@@ -188,7 +176,7 @@ static const char * const diff_usage[] = {
188}; 176};
189 177
190static const struct option options[] = { 178static const struct option options[] = {
191 OPT_BOOLEAN('v', "verbose", &verbose, 179 OPT_INCR('v', "verbose", &verbose,
192 "be more verbose (show symbol address, etc)"), 180 "be more verbose (show symbol address, etc)"),
193 OPT_BOOLEAN('m', "displacement", &show_displacement, 181 OPT_BOOLEAN('m', "displacement", &show_displacement,
194 "Show position displacement relative to baseline"), 182 "Show position displacement relative to baseline"),
@@ -225,6 +213,10 @@ int cmd_diff(int argc, const char **argv, const char *prefix __used)
225 input_new = argv[1]; 213 input_new = argv[1];
226 } else 214 } else
227 input_new = argv[0]; 215 input_new = argv[0];
216 } else if (symbol_conf.default_guest_vmlinux_name ||
217 symbol_conf.default_guest_kallsyms) {
218 input_old = "perf.data.host";
219 input_new = "perf.data.guest";
228 } 220 }
229 221
230 symbol_conf.exclude_other = false; 222 symbol_conf.exclude_other = false;
diff --git a/tools/perf/builtin-help.c b/tools/perf/builtin-help.c
index 215b584007b1..6d5a8a7faf48 100644
--- a/tools/perf/builtin-help.c
+++ b/tools/perf/builtin-help.c
@@ -29,14 +29,14 @@ enum help_format {
29 HELP_FORMAT_WEB, 29 HELP_FORMAT_WEB,
30}; 30};
31 31
32static int show_all = 0; 32static bool show_all = false;
33static enum help_format help_format = HELP_FORMAT_MAN; 33static enum help_format help_format = HELP_FORMAT_MAN;
34static struct option builtin_help_options[] = { 34static struct option builtin_help_options[] = {
35 OPT_BOOLEAN('a', "all", &show_all, "print all available commands"), 35 OPT_BOOLEAN('a', "all", &show_all, "print all available commands"),
36 OPT_SET_INT('m', "man", &help_format, "show man page", HELP_FORMAT_MAN), 36 OPT_SET_UINT('m', "man", &help_format, "show man page", HELP_FORMAT_MAN),
37 OPT_SET_INT('w', "web", &help_format, "show manual in web browser", 37 OPT_SET_UINT('w', "web", &help_format, "show manual in web browser",
38 HELP_FORMAT_WEB), 38 HELP_FORMAT_WEB),
39 OPT_SET_INT('i', "info", &help_format, "show info page", 39 OPT_SET_UINT('i', "info", &help_format, "show info page",
40 HELP_FORMAT_INFO), 40 HELP_FORMAT_INFO),
41 OPT_END(), 41 OPT_END(),
42}; 42};
diff --git a/tools/perf/builtin-inject.c b/tools/perf/builtin-inject.c
new file mode 100644
index 000000000000..8e3e47b064ce
--- /dev/null
+++ b/tools/perf/builtin-inject.c
@@ -0,0 +1,228 @@
1/*
2 * builtin-inject.c
3 *
4 * Builtin inject command: Examine the live mode (stdin) event stream
5 * and repipe it to stdout while optionally injecting additional
6 * events into it.
7 */
8#include "builtin.h"
9
10#include "perf.h"
11#include "util/session.h"
12#include "util/debug.h"
13
14#include "util/parse-options.h"
15
16static char const *input_name = "-";
17static bool inject_build_ids;
18
19static int event__repipe(event_t *event __used,
20 struct perf_session *session __used)
21{
22 uint32_t size;
23 void *buf = event;
24
25 size = event->header.size;
26
27 while (size) {
28 int ret = write(STDOUT_FILENO, buf, size);
29 if (ret < 0)
30 return -errno;
31
32 size -= ret;
33 buf += ret;
34 }
35
36 return 0;
37}
38
39static int event__repipe_mmap(event_t *self, struct perf_session *session)
40{
41 int err;
42
43 err = event__process_mmap(self, session);
44 event__repipe(self, session);
45
46 return err;
47}
48
49static int event__repipe_task(event_t *self, struct perf_session *session)
50{
51 int err;
52
53 err = event__process_task(self, session);
54 event__repipe(self, session);
55
56 return err;
57}
58
59static int event__repipe_tracing_data(event_t *self,
60 struct perf_session *session)
61{
62 int err;
63
64 event__repipe(self, session);
65 err = event__process_tracing_data(self, session);
66
67 return err;
68}
69
70static int dso__read_build_id(struct dso *self)
71{
72 if (self->has_build_id)
73 return 0;
74
75 if (filename__read_build_id(self->long_name, self->build_id,
76 sizeof(self->build_id)) > 0) {
77 self->has_build_id = true;
78 return 0;
79 }
80
81 return -1;
82}
83
84static int dso__inject_build_id(struct dso *self, struct perf_session *session)
85{
86 u16 misc = PERF_RECORD_MISC_USER;
87 struct machine *machine;
88 int err;
89
90 if (dso__read_build_id(self) < 0) {
91 pr_debug("no build_id found for %s\n", self->long_name);
92 return -1;
93 }
94
95 machine = perf_session__find_host_machine(session);
96 if (machine == NULL) {
97 pr_err("Can't find machine for session\n");
98 return -1;
99 }
100
101 if (self->kernel)
102 misc = PERF_RECORD_MISC_KERNEL;
103
104 err = event__synthesize_build_id(self, misc, event__repipe,
105 machine, session);
106 if (err) {
107 pr_err("Can't synthesize build_id event for %s\n", self->long_name);
108 return -1;
109 }
110
111 return 0;
112}
113
114static int event__inject_buildid(event_t *event, struct perf_session *session)
115{
116 struct addr_location al;
117 struct thread *thread;
118 u8 cpumode;
119
120 cpumode = event->header.misc & PERF_RECORD_MISC_CPUMODE_MASK;
121
122 thread = perf_session__findnew(session, event->ip.pid);
123 if (thread == NULL) {
124 pr_err("problem processing %d event, skipping it.\n",
125 event->header.type);
126 goto repipe;
127 }
128
129 thread__find_addr_map(thread, session, cpumode, MAP__FUNCTION,
130 event->ip.pid, event->ip.ip, &al);
131
132 if (al.map != NULL) {
133 if (!al.map->dso->hit) {
134 al.map->dso->hit = 1;
135 if (map__load(al.map, NULL) >= 0) {
136 dso__inject_build_id(al.map->dso, session);
137 /*
138 * If this fails, too bad, let the other side
139 * account this as unresolved.
140 */
141 } else
142 pr_warning("no symbols found in %s, maybe "
143 "install a debug package?\n",
144 al.map->dso->long_name);
145 }
146 }
147
148repipe:
149 event__repipe(event, session);
150 return 0;
151}
152
153struct perf_event_ops inject_ops = {
154 .sample = event__repipe,
155 .mmap = event__repipe,
156 .comm = event__repipe,
157 .fork = event__repipe,
158 .exit = event__repipe,
159 .lost = event__repipe,
160 .read = event__repipe,
161 .throttle = event__repipe,
162 .unthrottle = event__repipe,
163 .attr = event__repipe,
164 .event_type = event__repipe,
165 .tracing_data = event__repipe,
166 .build_id = event__repipe,
167};
168
169extern volatile int session_done;
170
171static void sig_handler(int sig __attribute__((__unused__)))
172{
173 session_done = 1;
174}
175
176static int __cmd_inject(void)
177{
178 struct perf_session *session;
179 int ret = -EINVAL;
180
181 signal(SIGINT, sig_handler);
182
183 if (inject_build_ids) {
184 inject_ops.sample = event__inject_buildid;
185 inject_ops.mmap = event__repipe_mmap;
186 inject_ops.fork = event__repipe_task;
187 inject_ops.tracing_data = event__repipe_tracing_data;
188 }
189
190 session = perf_session__new(input_name, O_RDONLY, false, true);
191 if (session == NULL)
192 return -ENOMEM;
193
194 ret = perf_session__process_events(session, &inject_ops);
195
196 perf_session__delete(session);
197
198 return ret;
199}
200
201static const char * const report_usage[] = {
202 "perf inject [<options>]",
203 NULL
204};
205
206static const struct option options[] = {
207 OPT_BOOLEAN('b', "build-ids", &inject_build_ids,
208 "Inject build-ids into the output stream"),
209 OPT_INCR('v', "verbose", &verbose,
210 "be more verbose (show build ids, etc)"),
211 OPT_END()
212};
213
214int cmd_inject(int argc, const char **argv, const char *prefix __used)
215{
216 argc = parse_options(argc, argv, options, report_usage, 0);
217
218 /*
219 * Any (unrecognized) arguments left?
220 */
221 if (argc)
222 usage_with_options(report_usage, options);
223
224 if (symbol__init() < 0)
225 return -1;
226
227 return __cmd_inject();
228}
diff --git a/tools/perf/builtin-kmem.c b/tools/perf/builtin-kmem.c
index 924a9518931a..31f60a2535e0 100644
--- a/tools/perf/builtin-kmem.c
+++ b/tools/perf/builtin-kmem.c
@@ -335,8 +335,9 @@ static int process_sample_event(event_t *event, struct perf_session *session)
335} 335}
336 336
337static struct perf_event_ops event_ops = { 337static struct perf_event_ops event_ops = {
338 .sample = process_sample_event, 338 .sample = process_sample_event,
339 .comm = event__process_comm, 339 .comm = event__process_comm,
340 .ordered_samples = true,
340}; 341};
341 342
342static double fragmentation(unsigned long n_req, unsigned long n_alloc) 343static double fragmentation(unsigned long n_req, unsigned long n_alloc)
@@ -351,6 +352,7 @@ static void __print_result(struct rb_root *root, struct perf_session *session,
351 int n_lines, int is_caller) 352 int n_lines, int is_caller)
352{ 353{
353 struct rb_node *next; 354 struct rb_node *next;
355 struct machine *machine;
354 356
355 printf("%.102s\n", graph_dotted_line); 357 printf("%.102s\n", graph_dotted_line);
356 printf(" %-34s |", is_caller ? "Callsite": "Alloc Ptr"); 358 printf(" %-34s |", is_caller ? "Callsite": "Alloc Ptr");
@@ -359,23 +361,29 @@ static void __print_result(struct rb_root *root, struct perf_session *session,
359 361
360 next = rb_first(root); 362 next = rb_first(root);
361 363
364 machine = perf_session__find_host_machine(session);
365 if (!machine) {
366 pr_err("__print_result: couldn't find kernel information\n");
367 return;
368 }
362 while (next && n_lines--) { 369 while (next && n_lines--) {
363 struct alloc_stat *data = rb_entry(next, struct alloc_stat, 370 struct alloc_stat *data = rb_entry(next, struct alloc_stat,
364 node); 371 node);
365 struct symbol *sym = NULL; 372 struct symbol *sym = NULL;
373 struct map *map;
366 char buf[BUFSIZ]; 374 char buf[BUFSIZ];
367 u64 addr; 375 u64 addr;
368 376
369 if (is_caller) { 377 if (is_caller) {
370 addr = data->call_site; 378 addr = data->call_site;
371 if (!raw_ip) 379 if (!raw_ip)
372 sym = map_groups__find_function(&session->kmaps, addr, NULL); 380 sym = machine__find_kernel_function(machine, addr, &map, NULL);
373 } else 381 } else
374 addr = data->ptr; 382 addr = data->ptr;
375 383
376 if (sym != NULL) 384 if (sym != NULL)
377 snprintf(buf, sizeof(buf), "%s+%Lx", sym->name, 385 snprintf(buf, sizeof(buf), "%s+%Lx", sym->name,
378 addr - sym->start); 386 addr - map->unmap_ip(map, sym->start));
379 else 387 else
380 snprintf(buf, sizeof(buf), "%#Lx", addr); 388 snprintf(buf, sizeof(buf), "%#Lx", addr);
381 printf(" %-34s |", buf); 389 printf(" %-34s |", buf);
@@ -484,10 +492,13 @@ static void sort_result(void)
484static int __cmd_kmem(void) 492static int __cmd_kmem(void)
485{ 493{
486 int err = -EINVAL; 494 int err = -EINVAL;
487 struct perf_session *session = perf_session__new(input_name, O_RDONLY, 0); 495 struct perf_session *session = perf_session__new(input_name, O_RDONLY, 0, false);
488 if (session == NULL) 496 if (session == NULL)
489 return -ENOMEM; 497 return -ENOMEM;
490 498
499 if (perf_session__create_kernel_maps(session) < 0)
500 goto out_delete;
501
491 if (!perf_session__has_traces(session, "kmem record")) 502 if (!perf_session__has_traces(session, "kmem record"))
492 goto out_delete; 503 goto out_delete;
493 504
@@ -718,7 +729,6 @@ static const char *record_args[] = {
718 "record", 729 "record",
719 "-a", 730 "-a",
720 "-R", 731 "-R",
721 "-M",
722 "-f", 732 "-f",
723 "-c", "1", 733 "-c", "1",
724 "-e", "kmem:kmalloc", 734 "-e", "kmem:kmalloc",
diff --git a/tools/perf/builtin-kvm.c b/tools/perf/builtin-kvm.c
new file mode 100644
index 000000000000..34d1e853829d
--- /dev/null
+++ b/tools/perf/builtin-kvm.c
@@ -0,0 +1,144 @@
1#include "builtin.h"
2#include "perf.h"
3
4#include "util/util.h"
5#include "util/cache.h"
6#include "util/symbol.h"
7#include "util/thread.h"
8#include "util/header.h"
9#include "util/session.h"
10
11#include "util/parse-options.h"
12#include "util/trace-event.h"
13
14#include "util/debug.h"
15
16#include <sys/prctl.h>
17
18#include <semaphore.h>
19#include <pthread.h>
20#include <math.h>
21
22static const char *file_name;
23static char name_buffer[256];
24
25bool perf_host = 1;
26bool perf_guest;
27
28static const char * const kvm_usage[] = {
29 "perf kvm [<options>] {top|record|report|diff|buildid-list}",
30 NULL
31};
32
33static const struct option kvm_options[] = {
34 OPT_STRING('i', "input", &file_name, "file",
35 "Input file name"),
36 OPT_STRING('o', "output", &file_name, "file",
37 "Output file name"),
38 OPT_BOOLEAN(0, "guest", &perf_guest,
39 "Collect guest os data"),
40 OPT_BOOLEAN(0, "host", &perf_host,
41 "Collect guest os data"),
42 OPT_STRING(0, "guestmount", &symbol_conf.guestmount, "directory",
43 "guest mount directory under which every guest os"
44 " instance has a subdir"),
45 OPT_STRING(0, "guestvmlinux", &symbol_conf.default_guest_vmlinux_name,
46 "file", "file saving guest os vmlinux"),
47 OPT_STRING(0, "guestkallsyms", &symbol_conf.default_guest_kallsyms,
48 "file", "file saving guest os /proc/kallsyms"),
49 OPT_STRING(0, "guestmodules", &symbol_conf.default_guest_modules,
50 "file", "file saving guest os /proc/modules"),
51 OPT_END()
52};
53
54static int __cmd_record(int argc, const char **argv)
55{
56 int rec_argc, i = 0, j;
57 const char **rec_argv;
58
59 rec_argc = argc + 2;
60 rec_argv = calloc(rec_argc + 1, sizeof(char *));
61 rec_argv[i++] = strdup("record");
62 rec_argv[i++] = strdup("-o");
63 rec_argv[i++] = strdup(file_name);
64 for (j = 1; j < argc; j++, i++)
65 rec_argv[i] = argv[j];
66
67 BUG_ON(i != rec_argc);
68
69 return cmd_record(i, rec_argv, NULL);
70}
71
72static int __cmd_report(int argc, const char **argv)
73{
74 int rec_argc, i = 0, j;
75 const char **rec_argv;
76
77 rec_argc = argc + 2;
78 rec_argv = calloc(rec_argc + 1, sizeof(char *));
79 rec_argv[i++] = strdup("report");
80 rec_argv[i++] = strdup("-i");
81 rec_argv[i++] = strdup(file_name);
82 for (j = 1; j < argc; j++, i++)
83 rec_argv[i] = argv[j];
84
85 BUG_ON(i != rec_argc);
86
87 return cmd_report(i, rec_argv, NULL);
88}
89
90static int __cmd_buildid_list(int argc, const char **argv)
91{
92 int rec_argc, i = 0, j;
93 const char **rec_argv;
94
95 rec_argc = argc + 2;
96 rec_argv = calloc(rec_argc + 1, sizeof(char *));
97 rec_argv[i++] = strdup("buildid-list");
98 rec_argv[i++] = strdup("-i");
99 rec_argv[i++] = strdup(file_name);
100 for (j = 1; j < argc; j++, i++)
101 rec_argv[i] = argv[j];
102
103 BUG_ON(i != rec_argc);
104
105 return cmd_buildid_list(i, rec_argv, NULL);
106}
107
108int cmd_kvm(int argc, const char **argv, const char *prefix __used)
109{
110 perf_host = perf_guest = 0;
111
112 argc = parse_options(argc, argv, kvm_options, kvm_usage,
113 PARSE_OPT_STOP_AT_NON_OPTION);
114 if (!argc)
115 usage_with_options(kvm_usage, kvm_options);
116
117 if (!perf_host)
118 perf_guest = 1;
119
120 if (!file_name) {
121 if (perf_host && !perf_guest)
122 sprintf(name_buffer, "perf.data.host");
123 else if (!perf_host && perf_guest)
124 sprintf(name_buffer, "perf.data.guest");
125 else
126 sprintf(name_buffer, "perf.data.kvm");
127 file_name = name_buffer;
128 }
129
130 if (!strncmp(argv[0], "rec", 3))
131 return __cmd_record(argc, argv);
132 else if (!strncmp(argv[0], "rep", 3))
133 return __cmd_report(argc, argv);
134 else if (!strncmp(argv[0], "diff", 4))
135 return cmd_diff(argc, argv, NULL);
136 else if (!strncmp(argv[0], "top", 3))
137 return cmd_top(argc, argv, NULL);
138 else if (!strncmp(argv[0], "buildid-list", 12))
139 return __cmd_buildid_list(argc, argv);
140 else
141 usage_with_options(kvm_usage, kvm_options);
142
143 return 0;
144}
diff --git a/tools/perf/builtin-lock.c b/tools/perf/builtin-lock.c
index e12c844df1e2..821c1586a22b 100644
--- a/tools/perf/builtin-lock.c
+++ b/tools/perf/builtin-lock.c
@@ -23,6 +23,8 @@
23#include <linux/list.h> 23#include <linux/list.h>
24#include <linux/hash.h> 24#include <linux/hash.h>
25 25
26static struct perf_session *session;
27
26/* based on kernel/lockdep.c */ 28/* based on kernel/lockdep.c */
27#define LOCKHASH_BITS 12 29#define LOCKHASH_BITS 12
28#define LOCKHASH_SIZE (1UL << LOCKHASH_BITS) 30#define LOCKHASH_SIZE (1UL << LOCKHASH_BITS)
@@ -32,9 +34,6 @@ static struct list_head lockhash_table[LOCKHASH_SIZE];
32#define __lockhashfn(key) hash_long((unsigned long)key, LOCKHASH_BITS) 34#define __lockhashfn(key) hash_long((unsigned long)key, LOCKHASH_BITS)
33#define lockhashentry(key) (lockhash_table + __lockhashfn((key))) 35#define lockhashentry(key) (lockhash_table + __lockhashfn((key)))
34 36
35#define LOCK_STATE_UNLOCKED 0 /* initial state */
36#define LOCK_STATE_LOCKED 1
37
38struct lock_stat { 37struct lock_stat {
39 struct list_head hash_entry; 38 struct list_head hash_entry;
40 struct rb_node rb; /* used for sorting */ 39 struct rb_node rb; /* used for sorting */
@@ -47,20 +46,151 @@ struct lock_stat {
47 void *addr; /* address of lockdep_map, used as ID */ 46 void *addr; /* address of lockdep_map, used as ID */
48 char *name; /* for strcpy(), we cannot use const */ 47 char *name; /* for strcpy(), we cannot use const */
49 48
50 int state;
51 u64 prev_event_time; /* timestamp of previous event */
52
53 unsigned int nr_acquired;
54 unsigned int nr_acquire; 49 unsigned int nr_acquire;
50 unsigned int nr_acquired;
55 unsigned int nr_contended; 51 unsigned int nr_contended;
56 unsigned int nr_release; 52 unsigned int nr_release;
57 53
54 unsigned int nr_readlock;
55 unsigned int nr_trylock;
58 /* these times are in nano sec. */ 56 /* these times are in nano sec. */
59 u64 wait_time_total; 57 u64 wait_time_total;
60 u64 wait_time_min; 58 u64 wait_time_min;
61 u64 wait_time_max; 59 u64 wait_time_max;
60
61 int discard; /* flag of blacklist */
62}; 62};
63 63
64/*
65 * States of lock_seq_stat
66 *
67 * UNINITIALIZED is required for detecting first event of acquire.
68 * As the nature of lock events, there is no guarantee
69 * that the first event for the locks are acquire,
70 * it can be acquired, contended or release.
71 */
72#define SEQ_STATE_UNINITIALIZED 0 /* initial state */
73#define SEQ_STATE_RELEASED 1
74#define SEQ_STATE_ACQUIRING 2
75#define SEQ_STATE_ACQUIRED 3
76#define SEQ_STATE_READ_ACQUIRED 4
77#define SEQ_STATE_CONTENDED 5
78
79/*
80 * MAX_LOCK_DEPTH
81 * Imported from include/linux/sched.h.
82 * Should this be synchronized?
83 */
84#define MAX_LOCK_DEPTH 48
85
86/*
87 * struct lock_seq_stat:
88 * Place to put on state of one lock sequence
89 * 1) acquire -> acquired -> release
90 * 2) acquire -> contended -> acquired -> release
91 * 3) acquire (with read or try) -> release
92 * 4) Are there other patterns?
93 */
94struct lock_seq_stat {
95 struct list_head list;
96 int state;
97 u64 prev_event_time;
98 void *addr;
99
100 int read_count;
101};
102
103struct thread_stat {
104 struct rb_node rb;
105
106 u32 tid;
107 struct list_head seq_list;
108};
109
110static struct rb_root thread_stats;
111
112static struct thread_stat *thread_stat_find(u32 tid)
113{
114 struct rb_node *node;
115 struct thread_stat *st;
116
117 node = thread_stats.rb_node;
118 while (node) {
119 st = container_of(node, struct thread_stat, rb);
120 if (st->tid == tid)
121 return st;
122 else if (tid < st->tid)
123 node = node->rb_left;
124 else
125 node = node->rb_right;
126 }
127
128 return NULL;
129}
130
131static void thread_stat_insert(struct thread_stat *new)
132{
133 struct rb_node **rb = &thread_stats.rb_node;
134 struct rb_node *parent = NULL;
135 struct thread_stat *p;
136
137 while (*rb) {
138 p = container_of(*rb, struct thread_stat, rb);
139 parent = *rb;
140
141 if (new->tid < p->tid)
142 rb = &(*rb)->rb_left;
143 else if (new->tid > p->tid)
144 rb = &(*rb)->rb_right;
145 else
146 BUG_ON("inserting invalid thread_stat\n");
147 }
148
149 rb_link_node(&new->rb, parent, rb);
150 rb_insert_color(&new->rb, &thread_stats);
151}
152
153static struct thread_stat *thread_stat_findnew_after_first(u32 tid)
154{
155 struct thread_stat *st;
156
157 st = thread_stat_find(tid);
158 if (st)
159 return st;
160
161 st = zalloc(sizeof(struct thread_stat));
162 if (!st)
163 die("memory allocation failed\n");
164
165 st->tid = tid;
166 INIT_LIST_HEAD(&st->seq_list);
167
168 thread_stat_insert(st);
169
170 return st;
171}
172
173static struct thread_stat *thread_stat_findnew_first(u32 tid);
174static struct thread_stat *(*thread_stat_findnew)(u32 tid) =
175 thread_stat_findnew_first;
176
177static struct thread_stat *thread_stat_findnew_first(u32 tid)
178{
179 struct thread_stat *st;
180
181 st = zalloc(sizeof(struct thread_stat));
182 if (!st)
183 die("memory allocation failed\n");
184 st->tid = tid;
185 INIT_LIST_HEAD(&st->seq_list);
186
187 rb_link_node(&st->rb, NULL, &thread_stats.rb_node);
188 rb_insert_color(&st->rb, &thread_stats);
189
190 thread_stat_findnew = thread_stat_findnew_after_first;
191 return st;
192}
193
64/* build simple key function one is bigger than two */ 194/* build simple key function one is bigger than two */
65#define SINGLE_KEY(member) \ 195#define SINGLE_KEY(member) \
66 static int lock_stat_key_ ## member(struct lock_stat *one, \ 196 static int lock_stat_key_ ## member(struct lock_stat *one, \
@@ -175,8 +305,6 @@ static struct lock_stat *lock_stat_findnew(void *addr, const char *name)
175 goto alloc_failed; 305 goto alloc_failed;
176 strcpy(new->name, name); 306 strcpy(new->name, name);
177 307
178 /* LOCK_STATE_UNLOCKED == 0 isn't guaranteed forever */
179 new->state = LOCK_STATE_UNLOCKED;
180 new->wait_time_min = ULLONG_MAX; 308 new->wait_time_min = ULLONG_MAX;
181 309
182 list_add(&new->hash_entry, entry); 310 list_add(&new->hash_entry, entry);
@@ -188,8 +316,6 @@ alloc_failed:
188 316
189static char const *input_name = "perf.data"; 317static char const *input_name = "perf.data";
190 318
191static int profile_cpu = -1;
192
193struct raw_event_sample { 319struct raw_event_sample {
194 u32 size; 320 u32 size;
195 char data[0]; 321 char data[0];
@@ -198,6 +324,7 @@ struct raw_event_sample {
198struct trace_acquire_event { 324struct trace_acquire_event {
199 void *addr; 325 void *addr;
200 const char *name; 326 const char *name;
327 int flag;
201}; 328};
202 329
203struct trace_acquired_event { 330struct trace_acquired_event {
@@ -241,120 +368,258 @@ struct trace_lock_handler {
241 struct thread *thread); 368 struct thread *thread);
242}; 369};
243 370
371static struct lock_seq_stat *get_seq(struct thread_stat *ts, void *addr)
372{
373 struct lock_seq_stat *seq;
374
375 list_for_each_entry(seq, &ts->seq_list, list) {
376 if (seq->addr == addr)
377 return seq;
378 }
379
380 seq = zalloc(sizeof(struct lock_seq_stat));
381 if (!seq)
382 die("Not enough memory\n");
383 seq->state = SEQ_STATE_UNINITIALIZED;
384 seq->addr = addr;
385
386 list_add(&seq->list, &ts->seq_list);
387 return seq;
388}
389
390enum broken_state {
391 BROKEN_ACQUIRE,
392 BROKEN_ACQUIRED,
393 BROKEN_CONTENDED,
394 BROKEN_RELEASE,
395 BROKEN_MAX,
396};
397
398static int bad_hist[BROKEN_MAX];
399
400enum acquire_flags {
401 TRY_LOCK = 1,
402 READ_LOCK = 2,
403};
404
244static void 405static void
245report_lock_acquire_event(struct trace_acquire_event *acquire_event, 406report_lock_acquire_event(struct trace_acquire_event *acquire_event,
246 struct event *__event __used, 407 struct event *__event __used,
247 int cpu __used, 408 int cpu __used,
248 u64 timestamp, 409 u64 timestamp __used,
249 struct thread *thread __used) 410 struct thread *thread __used)
250{ 411{
251 struct lock_stat *st; 412 struct lock_stat *ls;
413 struct thread_stat *ts;
414 struct lock_seq_stat *seq;
415
416 ls = lock_stat_findnew(acquire_event->addr, acquire_event->name);
417 if (ls->discard)
418 return;
252 419
253 st = lock_stat_findnew(acquire_event->addr, acquire_event->name); 420 ts = thread_stat_findnew(thread->pid);
421 seq = get_seq(ts, acquire_event->addr);
254 422
255 switch (st->state) { 423 switch (seq->state) {
256 case LOCK_STATE_UNLOCKED: 424 case SEQ_STATE_UNINITIALIZED:
425 case SEQ_STATE_RELEASED:
426 if (!acquire_event->flag) {
427 seq->state = SEQ_STATE_ACQUIRING;
428 } else {
429 if (acquire_event->flag & TRY_LOCK)
430 ls->nr_trylock++;
431 if (acquire_event->flag & READ_LOCK)
432 ls->nr_readlock++;
433 seq->state = SEQ_STATE_READ_ACQUIRED;
434 seq->read_count = 1;
435 ls->nr_acquired++;
436 }
437 break;
438 case SEQ_STATE_READ_ACQUIRED:
439 if (acquire_event->flag & READ_LOCK) {
440 seq->read_count++;
441 ls->nr_acquired++;
442 goto end;
443 } else {
444 goto broken;
445 }
257 break; 446 break;
258 case LOCK_STATE_LOCKED: 447 case SEQ_STATE_ACQUIRED:
448 case SEQ_STATE_ACQUIRING:
449 case SEQ_STATE_CONTENDED:
450broken:
451 /* broken lock sequence, discard it */
452 ls->discard = 1;
453 bad_hist[BROKEN_ACQUIRE]++;
454 list_del(&seq->list);
455 free(seq);
456 goto end;
259 break; 457 break;
260 default: 458 default:
261 BUG_ON(1); 459 BUG_ON("Unknown state of lock sequence found!\n");
262 break; 460 break;
263 } 461 }
264 462
265 st->prev_event_time = timestamp; 463 ls->nr_acquire++;
464 seq->prev_event_time = timestamp;
465end:
466 return;
266} 467}
267 468
268static void 469static void
269report_lock_acquired_event(struct trace_acquired_event *acquired_event, 470report_lock_acquired_event(struct trace_acquired_event *acquired_event,
270 struct event *__event __used, 471 struct event *__event __used,
271 int cpu __used, 472 int cpu __used,
272 u64 timestamp, 473 u64 timestamp __used,
273 struct thread *thread __used) 474 struct thread *thread __used)
274{ 475{
275 struct lock_stat *st; 476 struct lock_stat *ls;
477 struct thread_stat *ts;
478 struct lock_seq_stat *seq;
479 u64 contended_term;
480
481 ls = lock_stat_findnew(acquired_event->addr, acquired_event->name);
482 if (ls->discard)
483 return;
276 484
277 st = lock_stat_findnew(acquired_event->addr, acquired_event->name); 485 ts = thread_stat_findnew(thread->pid);
486 seq = get_seq(ts, acquired_event->addr);
278 487
279 switch (st->state) { 488 switch (seq->state) {
280 case LOCK_STATE_UNLOCKED: 489 case SEQ_STATE_UNINITIALIZED:
281 st->state = LOCK_STATE_LOCKED; 490 /* orphan event, do nothing */
282 st->nr_acquired++; 491 return;
492 case SEQ_STATE_ACQUIRING:
493 break;
494 case SEQ_STATE_CONTENDED:
495 contended_term = timestamp - seq->prev_event_time;
496 ls->wait_time_total += contended_term;
497 if (contended_term < ls->wait_time_min)
498 ls->wait_time_min = contended_term;
499 if (ls->wait_time_max < contended_term)
500 ls->wait_time_max = contended_term;
283 break; 501 break;
284 case LOCK_STATE_LOCKED: 502 case SEQ_STATE_RELEASED:
503 case SEQ_STATE_ACQUIRED:
504 case SEQ_STATE_READ_ACQUIRED:
505 /* broken lock sequence, discard it */
506 ls->discard = 1;
507 bad_hist[BROKEN_ACQUIRED]++;
508 list_del(&seq->list);
509 free(seq);
510 goto end;
285 break; 511 break;
512
286 default: 513 default:
287 BUG_ON(1); 514 BUG_ON("Unknown state of lock sequence found!\n");
288 break; 515 break;
289 } 516 }
290 517
291 st->prev_event_time = timestamp; 518 seq->state = SEQ_STATE_ACQUIRED;
519 ls->nr_acquired++;
520 seq->prev_event_time = timestamp;
521end:
522 return;
292} 523}
293 524
294static void 525static void
295report_lock_contended_event(struct trace_contended_event *contended_event, 526report_lock_contended_event(struct trace_contended_event *contended_event,
296 struct event *__event __used, 527 struct event *__event __used,
297 int cpu __used, 528 int cpu __used,
298 u64 timestamp, 529 u64 timestamp __used,
299 struct thread *thread __used) 530 struct thread *thread __used)
300{ 531{
301 struct lock_stat *st; 532 struct lock_stat *ls;
533 struct thread_stat *ts;
534 struct lock_seq_stat *seq;
302 535
303 st = lock_stat_findnew(contended_event->addr, contended_event->name); 536 ls = lock_stat_findnew(contended_event->addr, contended_event->name);
537 if (ls->discard)
538 return;
304 539
305 switch (st->state) { 540 ts = thread_stat_findnew(thread->pid);
306 case LOCK_STATE_UNLOCKED: 541 seq = get_seq(ts, contended_event->addr);
542
543 switch (seq->state) {
544 case SEQ_STATE_UNINITIALIZED:
545 /* orphan event, do nothing */
546 return;
547 case SEQ_STATE_ACQUIRING:
307 break; 548 break;
308 case LOCK_STATE_LOCKED: 549 case SEQ_STATE_RELEASED:
309 st->nr_contended++; 550 case SEQ_STATE_ACQUIRED:
551 case SEQ_STATE_READ_ACQUIRED:
552 case SEQ_STATE_CONTENDED:
553 /* broken lock sequence, discard it */
554 ls->discard = 1;
555 bad_hist[BROKEN_CONTENDED]++;
556 list_del(&seq->list);
557 free(seq);
558 goto end;
310 break; 559 break;
311 default: 560 default:
312 BUG_ON(1); 561 BUG_ON("Unknown state of lock sequence found!\n");
313 break; 562 break;
314 } 563 }
315 564
316 st->prev_event_time = timestamp; 565 seq->state = SEQ_STATE_CONTENDED;
566 ls->nr_contended++;
567 seq->prev_event_time = timestamp;
568end:
569 return;
317} 570}
318 571
319static void 572static void
320report_lock_release_event(struct trace_release_event *release_event, 573report_lock_release_event(struct trace_release_event *release_event,
321 struct event *__event __used, 574 struct event *__event __used,
322 int cpu __used, 575 int cpu __used,
323 u64 timestamp, 576 u64 timestamp __used,
324 struct thread *thread __used) 577 struct thread *thread __used)
325{ 578{
326 struct lock_stat *st; 579 struct lock_stat *ls;
327 u64 hold_time; 580 struct thread_stat *ts;
581 struct lock_seq_stat *seq;
328 582
329 st = lock_stat_findnew(release_event->addr, release_event->name); 583 ls = lock_stat_findnew(release_event->addr, release_event->name);
584 if (ls->discard)
585 return;
330 586
331 switch (st->state) { 587 ts = thread_stat_findnew(thread->pid);
332 case LOCK_STATE_UNLOCKED: 588 seq = get_seq(ts, release_event->addr);
333 break;
334 case LOCK_STATE_LOCKED:
335 st->state = LOCK_STATE_UNLOCKED;
336 hold_time = timestamp - st->prev_event_time;
337 589
338 if (timestamp < st->prev_event_time) { 590 switch (seq->state) {
339 /* terribly, this can happen... */ 591 case SEQ_STATE_UNINITIALIZED:
592 goto end;
593 break;
594 case SEQ_STATE_ACQUIRED:
595 break;
596 case SEQ_STATE_READ_ACQUIRED:
597 seq->read_count--;
598 BUG_ON(seq->read_count < 0);
599 if (!seq->read_count) {
600 ls->nr_release++;
340 goto end; 601 goto end;
341 } 602 }
342 603 break;
343 if (st->wait_time_min > hold_time) 604 case SEQ_STATE_ACQUIRING:
344 st->wait_time_min = hold_time; 605 case SEQ_STATE_CONTENDED:
345 if (st->wait_time_max < hold_time) 606 case SEQ_STATE_RELEASED:
346 st->wait_time_max = hold_time; 607 /* broken lock sequence, discard it */
347 st->wait_time_total += hold_time; 608 ls->discard = 1;
348 609 bad_hist[BROKEN_RELEASE]++;
349 st->nr_release++; 610 goto free_seq;
350 break; 611 break;
351 default: 612 default:
352 BUG_ON(1); 613 BUG_ON("Unknown state of lock sequence found!\n");
353 break; 614 break;
354 } 615 }
355 616
617 ls->nr_release++;
618free_seq:
619 list_del(&seq->list);
620 free(seq);
356end: 621end:
357 st->prev_event_time = timestamp; 622 return;
358} 623}
359 624
360/* lock oriented handlers */ 625/* lock oriented handlers */
@@ -381,6 +646,7 @@ process_lock_acquire_event(void *data,
381 tmp = raw_field_value(event, "lockdep_addr", data); 646 tmp = raw_field_value(event, "lockdep_addr", data);
382 memcpy(&acquire_event.addr, &tmp, sizeof(void *)); 647 memcpy(&acquire_event.addr, &tmp, sizeof(void *));
383 acquire_event.name = (char *)raw_field_ptr(event, "name", data); 648 acquire_event.name = (char *)raw_field_ptr(event, "name", data);
649 acquire_event.flag = (int)raw_field_value(event, "flag", data);
384 650
385 if (trace_handler->acquire_event) 651 if (trace_handler->acquire_event)
386 trace_handler->acquire_event(&acquire_event, event, cpu, timestamp, thread); 652 trace_handler->acquire_event(&acquire_event, event, cpu, timestamp, thread);
@@ -441,8 +707,7 @@ process_lock_release_event(void *data,
441} 707}
442 708
443static void 709static void
444process_raw_event(void *data, int cpu, 710process_raw_event(void *data, int cpu, u64 timestamp, struct thread *thread)
445 u64 timestamp, struct thread *thread)
446{ 711{
447 struct event *event; 712 struct event *event;
448 int type; 713 int type;
@@ -460,173 +725,19 @@ process_raw_event(void *data, int cpu,
460 process_lock_release_event(data, event, cpu, timestamp, thread); 725 process_lock_release_event(data, event, cpu, timestamp, thread);
461} 726}
462 727
463struct raw_event_queue { 728static void print_bad_events(int bad, int total)
464 u64 timestamp;
465 int cpu;
466 void *data;
467 struct thread *thread;
468 struct list_head list;
469};
470
471static LIST_HEAD(raw_event_head);
472
473#define FLUSH_PERIOD (5 * NSEC_PER_SEC)
474
475static u64 flush_limit = ULLONG_MAX;
476static u64 last_flush = 0;
477struct raw_event_queue *last_inserted;
478
479static void flush_raw_event_queue(u64 limit)
480{
481 struct raw_event_queue *tmp, *iter;
482
483 list_for_each_entry_safe(iter, tmp, &raw_event_head, list) {
484 if (iter->timestamp > limit)
485 return;
486
487 if (iter == last_inserted)
488 last_inserted = NULL;
489
490 process_raw_event(iter->data, iter->cpu, iter->timestamp,
491 iter->thread);
492
493 last_flush = iter->timestamp;
494 list_del(&iter->list);
495 free(iter->data);
496 free(iter);
497 }
498}
499
500static void __queue_raw_event_end(struct raw_event_queue *new)
501{
502 struct raw_event_queue *iter;
503
504 list_for_each_entry_reverse(iter, &raw_event_head, list) {
505 if (iter->timestamp < new->timestamp) {
506 list_add(&new->list, &iter->list);
507 return;
508 }
509 }
510
511 list_add(&new->list, &raw_event_head);
512}
513
514static void __queue_raw_event_before(struct raw_event_queue *new,
515 struct raw_event_queue *iter)
516{ 729{
517 list_for_each_entry_continue_reverse(iter, &raw_event_head, list) { 730 /* Output for debug, this have to be removed */
518 if (iter->timestamp < new->timestamp) { 731 int i;
519 list_add(&new->list, &iter->list); 732 const char *name[4] =
520 return; 733 { "acquire", "acquired", "contended", "release" };
521 } 734
522 } 735 pr_info("\n=== output for debug===\n\n");
523 736 pr_info("bad: %d, total: %d\n", bad, total);
524 list_add(&new->list, &raw_event_head); 737 pr_info("bad rate: %f %%\n", (double)bad / (double)total * 100);
525} 738 pr_info("histogram of events caused bad sequence\n");
526 739 for (i = 0; i < BROKEN_MAX; i++)
527static void __queue_raw_event_after(struct raw_event_queue *new, 740 pr_info(" %10s: %d\n", name[i], bad_hist[i]);
528 struct raw_event_queue *iter)
529{
530 list_for_each_entry_continue(iter, &raw_event_head, list) {
531 if (iter->timestamp > new->timestamp) {
532 list_add_tail(&new->list, &iter->list);
533 return;
534 }
535 }
536 list_add_tail(&new->list, &raw_event_head);
537}
538
539/* The queue is ordered by time */
540static void __queue_raw_event(struct raw_event_queue *new)
541{
542 if (!last_inserted) {
543 __queue_raw_event_end(new);
544 return;
545 }
546
547 /*
548 * Most of the time the current event has a timestamp
549 * very close to the last event inserted, unless we just switched
550 * to another event buffer. Having a sorting based on a list and
551 * on the last inserted event that is close to the current one is
552 * probably more efficient than an rbtree based sorting.
553 */
554 if (last_inserted->timestamp >= new->timestamp)
555 __queue_raw_event_before(new, last_inserted);
556 else
557 __queue_raw_event_after(new, last_inserted);
558}
559
560static void queue_raw_event(void *data, int raw_size, int cpu,
561 u64 timestamp, struct thread *thread)
562{
563 struct raw_event_queue *new;
564
565 if (flush_limit == ULLONG_MAX)
566 flush_limit = timestamp + FLUSH_PERIOD;
567
568 if (timestamp < last_flush) {
569 printf("Warning: Timestamp below last timeslice flush\n");
570 return;
571 }
572
573 new = malloc(sizeof(*new));
574 if (!new)
575 die("Not enough memory\n");
576
577 new->timestamp = timestamp;
578 new->cpu = cpu;
579 new->thread = thread;
580
581 new->data = malloc(raw_size);
582 if (!new->data)
583 die("Not enough memory\n");
584
585 memcpy(new->data, data, raw_size);
586
587 __queue_raw_event(new);
588 last_inserted = new;
589
590 /*
591 * We want to have a slice of events covering 2 * FLUSH_PERIOD
592 * If FLUSH_PERIOD is big enough, it ensures every events that occured
593 * in the first half of the timeslice have all been buffered and there
594 * are none remaining (we need that because of the weakly ordered
595 * event recording we have). Then once we reach the 2 * FLUSH_PERIOD
596 * timeslice, we flush the first half to be gentle with the memory
597 * (the second half can still get new events in the middle, so wait
598 * another period to flush it)
599 */
600 if (new->timestamp > flush_limit &&
601 new->timestamp - flush_limit > FLUSH_PERIOD) {
602 flush_limit += FLUSH_PERIOD;
603 flush_raw_event_queue(flush_limit);
604 }
605}
606
607static int process_sample_event(event_t *event, struct perf_session *session)
608{
609 struct thread *thread;
610 struct sample_data data;
611
612 bzero(&data, sizeof(struct sample_data));
613 event__parse_sample(event, session->sample_type, &data);
614 thread = perf_session__findnew(session, data.pid);
615
616 if (thread == NULL) {
617 pr_debug("problem processing %d event, skipping it.\n",
618 event->header.type);
619 return -1;
620 }
621
622 dump_printf(" ... thread: %s:%d\n", thread->comm, thread->pid);
623
624 if (profile_cpu != -1 && profile_cpu != (int) data.cpu)
625 return 0;
626
627 queue_raw_event(data.raw_data, data.raw_size, data.cpu, data.time, thread);
628
629 return 0;
630} 741}
631 742
632/* TODO: various way to print, coloring, nano or milli sec */ 743/* TODO: various way to print, coloring, nano or milli sec */
@@ -634,26 +745,30 @@ static void print_result(void)
634{ 745{
635 struct lock_stat *st; 746 struct lock_stat *st;
636 char cut_name[20]; 747 char cut_name[20];
748 int bad, total;
637 749
638 printf("%18s ", "ID"); 750 pr_info("%20s ", "Name");
639 printf("%20s ", "Name"); 751 pr_info("%10s ", "acquired");
640 printf("%10s ", "acquired"); 752 pr_info("%10s ", "contended");
641 printf("%10s ", "contended");
642 753
643 printf("%15s ", "total wait (ns)"); 754 pr_info("%15s ", "total wait (ns)");
644 printf("%15s ", "max wait (ns)"); 755 pr_info("%15s ", "max wait (ns)");
645 printf("%15s ", "min wait (ns)"); 756 pr_info("%15s ", "min wait (ns)");
646 757
647 printf("\n\n"); 758 pr_info("\n\n");
648 759
760 bad = total = 0;
649 while ((st = pop_from_result())) { 761 while ((st = pop_from_result())) {
762 total++;
763 if (st->discard) {
764 bad++;
765 continue;
766 }
650 bzero(cut_name, 20); 767 bzero(cut_name, 20);
651 768
652 printf("%p ", st->addr);
653
654 if (strlen(st->name) < 16) { 769 if (strlen(st->name) < 16) {
655 /* output raw name */ 770 /* output raw name */
656 printf("%20s ", st->name); 771 pr_info("%20s ", st->name);
657 } else { 772 } else {
658 strncpy(cut_name, st->name, 16); 773 strncpy(cut_name, st->name, 16);
659 cut_name[16] = '.'; 774 cut_name[16] = '.';
@@ -661,18 +776,39 @@ static void print_result(void)
661 cut_name[18] = '.'; 776 cut_name[18] = '.';
662 cut_name[19] = '\0'; 777 cut_name[19] = '\0';
663 /* cut off name for saving output style */ 778 /* cut off name for saving output style */
664 printf("%20s ", cut_name); 779 pr_info("%20s ", cut_name);
665 } 780 }
666 781
667 printf("%10u ", st->nr_acquired); 782 pr_info("%10u ", st->nr_acquired);
668 printf("%10u ", st->nr_contended); 783 pr_info("%10u ", st->nr_contended);
669 784
670 printf("%15llu ", st->wait_time_total); 785 pr_info("%15llu ", st->wait_time_total);
671 printf("%15llu ", st->wait_time_max); 786 pr_info("%15llu ", st->wait_time_max);
672 printf("%15llu ", st->wait_time_min == ULLONG_MAX ? 787 pr_info("%15llu ", st->wait_time_min == ULLONG_MAX ?
673 0 : st->wait_time_min); 788 0 : st->wait_time_min);
674 printf("\n"); 789 pr_info("\n");
675 } 790 }
791
792 print_bad_events(bad, total);
793}
794
795static bool info_threads, info_map;
796
797static void dump_threads(void)
798{
799 struct thread_stat *st;
800 struct rb_node *node;
801 struct thread *t;
802
803 pr_info("%10s: comm\n", "Thread ID");
804
805 node = rb_first(&thread_stats);
806 while (node) {
807 st = container_of(node, struct thread_stat, rb);
808 t = perf_session__findnew(session, st->tid);
809 pr_info("%10d: %s\n", st->tid, t->comm);
810 node = rb_next(node);
811 };
676} 812}
677 813
678static void dump_map(void) 814static void dump_map(void)
@@ -680,23 +816,53 @@ static void dump_map(void)
680 unsigned int i; 816 unsigned int i;
681 struct lock_stat *st; 817 struct lock_stat *st;
682 818
819 pr_info("Address of instance: name of class\n");
683 for (i = 0; i < LOCKHASH_SIZE; i++) { 820 for (i = 0; i < LOCKHASH_SIZE; i++) {
684 list_for_each_entry(st, &lockhash_table[i], hash_entry) { 821 list_for_each_entry(st, &lockhash_table[i], hash_entry) {
685 printf("%p: %s\n", st->addr, st->name); 822 pr_info(" %p: %s\n", st->addr, st->name);
686 } 823 }
687 } 824 }
688} 825}
689 826
827static void dump_info(void)
828{
829 if (info_threads)
830 dump_threads();
831 else if (info_map)
832 dump_map();
833 else
834 die("Unknown type of information\n");
835}
836
837static int process_sample_event(event_t *self, struct perf_session *s)
838{
839 struct sample_data data;
840 struct thread *thread;
841
842 bzero(&data, sizeof(data));
843 event__parse_sample(self, s->sample_type, &data);
844
845 thread = perf_session__findnew(s, data.tid);
846 if (thread == NULL) {
847 pr_debug("problem processing %d event, skipping it.\n",
848 self->header.type);
849 return -1;
850 }
851
852 process_raw_event(data.raw_data, data.cpu, data.time, thread);
853
854 return 0;
855}
856
690static struct perf_event_ops eops = { 857static struct perf_event_ops eops = {
691 .sample = process_sample_event, 858 .sample = process_sample_event,
692 .comm = event__process_comm, 859 .comm = event__process_comm,
860 .ordered_samples = true,
693}; 861};
694 862
695static struct perf_session *session;
696
697static int read_events(void) 863static int read_events(void)
698{ 864{
699 session = perf_session__new(input_name, O_RDONLY, 0); 865 session = perf_session__new(input_name, O_RDONLY, 0, false);
700 if (!session) 866 if (!session)
701 die("Initializing perf session failed\n"); 867 die("Initializing perf session failed\n");
702 868
@@ -720,7 +886,6 @@ static void __cmd_report(void)
720 setup_pager(); 886 setup_pager();
721 select_key(); 887 select_key();
722 read_events(); 888 read_events();
723 flush_raw_event_queue(ULLONG_MAX);
724 sort_result(); 889 sort_result();
725 print_result(); 890 print_result();
726} 891}
@@ -737,6 +902,19 @@ static const struct option report_options[] = {
737 OPT_END() 902 OPT_END()
738}; 903};
739 904
905static const char * const info_usage[] = {
906 "perf lock info [<options>]",
907 NULL
908};
909
910static const struct option info_options[] = {
911 OPT_BOOLEAN('t', "threads", &info_threads,
912 "dump thread list in perf.data"),
913 OPT_BOOLEAN('m', "map", &info_map,
914 "map of lock instances (name:address table)"),
915 OPT_END()
916};
917
740static const char * const lock_usage[] = { 918static const char * const lock_usage[] = {
741 "perf lock [<options>] {record|trace|report}", 919 "perf lock [<options>] {record|trace|report}",
742 NULL 920 NULL
@@ -744,14 +922,13 @@ static const char * const lock_usage[] = {
744 922
745static const struct option lock_options[] = { 923static const struct option lock_options[] = {
746 OPT_STRING('i', "input", &input_name, "file", "input file name"), 924 OPT_STRING('i', "input", &input_name, "file", "input file name"),
747 OPT_BOOLEAN('v', "verbose", &verbose, "be more verbose (show symbol address, etc)"), 925 OPT_INCR('v', "verbose", &verbose, "be more verbose (show symbol address, etc)"),
748 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace, "dump raw trace in ASCII"), 926 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace, "dump raw trace in ASCII"),
749 OPT_END() 927 OPT_END()
750}; 928};
751 929
752static const char *record_args[] = { 930static const char *record_args[] = {
753 "record", 931 "record",
754 "-a",
755 "-R", 932 "-R",
756 "-f", 933 "-f",
757 "-m", "1024", 934 "-m", "1024",
@@ -808,12 +985,18 @@ int cmd_lock(int argc, const char **argv, const char *prefix __used)
808 } else if (!strcmp(argv[0], "trace")) { 985 } else if (!strcmp(argv[0], "trace")) {
809 /* Aliased to 'perf trace' */ 986 /* Aliased to 'perf trace' */
810 return cmd_trace(argc, argv, prefix); 987 return cmd_trace(argc, argv, prefix);
811 } else if (!strcmp(argv[0], "map")) { 988 } else if (!strcmp(argv[0], "info")) {
989 if (argc) {
990 argc = parse_options(argc, argv,
991 info_options, info_usage, 0);
992 if (argc)
993 usage_with_options(info_usage, info_options);
994 }
812 /* recycling report_lock_ops */ 995 /* recycling report_lock_ops */
813 trace_handler = &report_lock_ops; 996 trace_handler = &report_lock_ops;
814 setup_pager(); 997 setup_pager();
815 read_events(); 998 read_events();
816 dump_map(); 999 dump_info();
817 } else { 1000 } else {
818 usage_with_options(lock_usage, lock_options); 1001 usage_with_options(lock_usage, lock_options);
819 } 1002 }
diff --git a/tools/perf/builtin-probe.c b/tools/perf/builtin-probe.c
index 152d6c9b1fa4..61c6d70732c9 100644
--- a/tools/perf/builtin-probe.c
+++ b/tools/perf/builtin-probe.c
@@ -36,13 +36,10 @@
36#include "builtin.h" 36#include "builtin.h"
37#include "util/util.h" 37#include "util/util.h"
38#include "util/strlist.h" 38#include "util/strlist.h"
39#include "util/event.h" 39#include "util/symbol.h"
40#include "util/debug.h" 40#include "util/debug.h"
41#include "util/debugfs.h" 41#include "util/debugfs.h"
42#include "util/symbol.h"
43#include "util/thread.h"
44#include "util/parse-options.h" 42#include "util/parse-options.h"
45#include "util/parse-events.h" /* For debugfs_path */
46#include "util/probe-finder.h" 43#include "util/probe-finder.h"
47#include "util/probe-event.h" 44#include "util/probe-event.h"
48 45
@@ -50,103 +47,84 @@
50 47
51/* Session management structure */ 48/* Session management structure */
52static struct { 49static struct {
53 bool need_dwarf;
54 bool list_events; 50 bool list_events;
55 bool force_add; 51 bool force_add;
56 bool show_lines; 52 bool show_lines;
57 int nr_probe; 53 int nevents;
58 struct probe_point probes[MAX_PROBES]; 54 struct perf_probe_event events[MAX_PROBES];
59 struct strlist *dellist; 55 struct strlist *dellist;
60 struct map_groups kmap_groups;
61 struct map *kmaps[MAP__NR_TYPES];
62 struct line_range line_range; 56 struct line_range line_range;
63} session; 57 int max_probe_points;
58} params;
64 59
65 60
66/* Parse an event definition. Note that any error must die. */ 61/* Parse an event definition. Note that any error must die. */
67static void parse_probe_event(const char *str) 62static int parse_probe_event(const char *str)
68{ 63{
69 struct probe_point *pp = &session.probes[session.nr_probe]; 64 struct perf_probe_event *pev = &params.events[params.nevents];
65 int ret;
70 66
71 pr_debug("probe-definition(%d): %s\n", session.nr_probe, str); 67 pr_debug("probe-definition(%d): %s\n", params.nevents, str);
72 if (++session.nr_probe == MAX_PROBES) 68 if (++params.nevents == MAX_PROBES)
73 die("Too many probes (> %d) are specified.", MAX_PROBES); 69 die("Too many probes (> %d) are specified.", MAX_PROBES);
74 70
75 /* Parse perf-probe event into probe_point */ 71 /* Parse a perf-probe command into event */
76 parse_perf_probe_event(str, pp, &session.need_dwarf); 72 ret = parse_perf_probe_command(str, pev);
73 pr_debug("%d arguments\n", pev->nargs);
77 74
78 pr_debug("%d arguments\n", pp->nr_args); 75 return ret;
79} 76}
80 77
81static void parse_probe_event_argv(int argc, const char **argv) 78static int parse_probe_event_argv(int argc, const char **argv)
82{ 79{
83 int i, len; 80 int i, len, ret;
84 char *buf; 81 char *buf;
85 82
86 /* Bind up rest arguments */ 83 /* Bind up rest arguments */
87 len = 0; 84 len = 0;
88 for (i = 0; i < argc; i++) 85 for (i = 0; i < argc; i++)
89 len += strlen(argv[i]) + 1; 86 len += strlen(argv[i]) + 1;
90 buf = zalloc(len + 1); 87 buf = xzalloc(len + 1);
91 if (!buf)
92 die("Failed to allocate memory for binding arguments.");
93 len = 0; 88 len = 0;
94 for (i = 0; i < argc; i++) 89 for (i = 0; i < argc; i++)
95 len += sprintf(&buf[len], "%s ", argv[i]); 90 len += sprintf(&buf[len], "%s ", argv[i]);
96 parse_probe_event(buf); 91 ret = parse_probe_event(buf);
97 free(buf); 92 free(buf);
93 return ret;
98} 94}
99 95
100static int opt_add_probe_event(const struct option *opt __used, 96static int opt_add_probe_event(const struct option *opt __used,
101 const char *str, int unset __used) 97 const char *str, int unset __used)
102{ 98{
103 if (str) 99 if (str)
104 parse_probe_event(str); 100 return parse_probe_event(str);
105 return 0; 101 else
102 return 0;
106} 103}
107 104
108static int opt_del_probe_event(const struct option *opt __used, 105static int opt_del_probe_event(const struct option *opt __used,
109 const char *str, int unset __used) 106 const char *str, int unset __used)
110{ 107{
111 if (str) { 108 if (str) {
112 if (!session.dellist) 109 if (!params.dellist)
113 session.dellist = strlist__new(true, NULL); 110 params.dellist = strlist__new(true, NULL);
114 strlist__add(session.dellist, str); 111 strlist__add(params.dellist, str);
115 } 112 }
116 return 0; 113 return 0;
117} 114}
118 115
119/* Currently just checking function name from symbol map */ 116#ifdef DWARF_SUPPORT
120static void evaluate_probe_point(struct probe_point *pp)
121{
122 struct symbol *sym;
123 sym = map__find_symbol_by_name(session.kmaps[MAP__FUNCTION],
124 pp->function, NULL);
125 if (!sym)
126 die("Kernel symbol \'%s\' not found - probe not added.",
127 pp->function);
128}
129
130#ifndef NO_DWARF_SUPPORT
131static int open_vmlinux(void)
132{
133 if (map__load(session.kmaps[MAP__FUNCTION], NULL) < 0) {
134 pr_debug("Failed to load kernel map.\n");
135 return -EINVAL;
136 }
137 pr_debug("Try to open %s\n",
138 session.kmaps[MAP__FUNCTION]->dso->long_name);
139 return open(session.kmaps[MAP__FUNCTION]->dso->long_name, O_RDONLY);
140}
141
142static int opt_show_lines(const struct option *opt __used, 117static int opt_show_lines(const struct option *opt __used,
143 const char *str, int unset __used) 118 const char *str, int unset __used)
144{ 119{
120 int ret = 0;
121
145 if (str) 122 if (str)
146 parse_line_range_desc(str, &session.line_range); 123 ret = parse_line_range_desc(str, &params.line_range);
147 INIT_LIST_HEAD(&session.line_range.line_list); 124 INIT_LIST_HEAD(&params.line_range.line_list);
148 session.show_lines = true; 125 params.show_lines = true;
149 return 0; 126
127 return ret;
150} 128}
151#endif 129#endif
152 130
@@ -155,29 +133,25 @@ static const char * const probe_usage[] = {
155 "perf probe [<options>] --add 'PROBEDEF' [--add 'PROBEDEF' ...]", 133 "perf probe [<options>] --add 'PROBEDEF' [--add 'PROBEDEF' ...]",
156 "perf probe [<options>] --del '[GROUP:]EVENT' ...", 134 "perf probe [<options>] --del '[GROUP:]EVENT' ...",
157 "perf probe --list", 135 "perf probe --list",
158#ifndef NO_DWARF_SUPPORT 136#ifdef DWARF_SUPPORT
159 "perf probe --line 'LINEDESC'", 137 "perf probe --line 'LINEDESC'",
160#endif 138#endif
161 NULL 139 NULL
162}; 140};
163 141
164static const struct option options[] = { 142static const struct option options[] = {
165 OPT_BOOLEAN('v', "verbose", &verbose, 143 OPT_INCR('v', "verbose", &verbose,
166 "be more verbose (show parsed arguments, etc)"), 144 "be more verbose (show parsed arguments, etc)"),
167#ifndef NO_DWARF_SUPPORT 145 OPT_BOOLEAN('l', "list", &params.list_events,
168 OPT_STRING('k', "vmlinux", &symbol_conf.vmlinux_name,
169 "file", "vmlinux pathname"),
170#endif
171 OPT_BOOLEAN('l', "list", &session.list_events,
172 "list up current probe events"), 146 "list up current probe events"),
173 OPT_CALLBACK('d', "del", NULL, "[GROUP:]EVENT", "delete a probe event.", 147 OPT_CALLBACK('d', "del", NULL, "[GROUP:]EVENT", "delete a probe event.",
174 opt_del_probe_event), 148 opt_del_probe_event),
175 OPT_CALLBACK('a', "add", NULL, 149 OPT_CALLBACK('a', "add", NULL,
176#ifdef NO_DWARF_SUPPORT 150#ifdef DWARF_SUPPORT
177 "[EVENT=]FUNC[+OFF|%return] [ARG ...]",
178#else
179 "[EVENT=]FUNC[@SRC][+OFF|%return|:RL|;PT]|SRC:AL|SRC;PT" 151 "[EVENT=]FUNC[@SRC][+OFF|%return|:RL|;PT]|SRC:AL|SRC;PT"
180 " [ARG ...]", 152 " [[NAME=]ARG ...]",
153#else
154 "[EVENT=]FUNC[+OFF|%return] [[NAME=]ARG ...]",
181#endif 155#endif
182 "probe point definition, where\n" 156 "probe point definition, where\n"
183 "\t\tGROUP:\tGroup name (optional)\n" 157 "\t\tGROUP:\tGroup name (optional)\n"
@@ -185,51 +159,35 @@ static const struct option options[] = {
185 "\t\tFUNC:\tFunction name\n" 159 "\t\tFUNC:\tFunction name\n"
186 "\t\tOFF:\tOffset from function entry (in byte)\n" 160 "\t\tOFF:\tOffset from function entry (in byte)\n"
187 "\t\t%return:\tPut the probe at function return\n" 161 "\t\t%return:\tPut the probe at function return\n"
188#ifdef NO_DWARF_SUPPORT 162#ifdef DWARF_SUPPORT
189 "\t\tARG:\tProbe argument (only \n"
190#else
191 "\t\tSRC:\tSource code path\n" 163 "\t\tSRC:\tSource code path\n"
192 "\t\tRL:\tRelative line number from function entry.\n" 164 "\t\tRL:\tRelative line number from function entry.\n"
193 "\t\tAL:\tAbsolute line number in file.\n" 165 "\t\tAL:\tAbsolute line number in file.\n"
194 "\t\tPT:\tLazy expression of line code.\n" 166 "\t\tPT:\tLazy expression of line code.\n"
195 "\t\tARG:\tProbe argument (local variable name or\n" 167 "\t\tARG:\tProbe argument (local variable name or\n"
196#endif
197 "\t\t\tkprobe-tracer argument format.)\n", 168 "\t\t\tkprobe-tracer argument format.)\n",
169#else
170 "\t\tARG:\tProbe argument (kprobe-tracer argument format.)\n",
171#endif
198 opt_add_probe_event), 172 opt_add_probe_event),
199 OPT_BOOLEAN('f', "force", &session.force_add, "forcibly add events" 173 OPT_BOOLEAN('f', "force", &params.force_add, "forcibly add events"
200 " with existing name"), 174 " with existing name"),
201#ifndef NO_DWARF_SUPPORT 175#ifdef DWARF_SUPPORT
202 OPT_CALLBACK('L', "line", NULL, 176 OPT_CALLBACK('L', "line", NULL,
203 "FUNC[:RLN[+NUM|:RLN2]]|SRC:ALN[+NUM|:ALN2]", 177 "FUNC[:RLN[+NUM|-RLN2]]|SRC:ALN[+NUM|-ALN2]",
204 "Show source code lines.", opt_show_lines), 178 "Show source code lines.", opt_show_lines),
179 OPT_STRING('k', "vmlinux", &symbol_conf.vmlinux_name,
180 "file", "vmlinux pathname"),
205#endif 181#endif
182 OPT__DRY_RUN(&probe_event_dry_run),
183 OPT_INTEGER('\0', "max-probes", &params.max_probe_points,
184 "Set how many probe points can be found for a probe."),
206 OPT_END() 185 OPT_END()
207}; 186};
208 187
209/* Initialize symbol maps for vmlinux */
210static void init_vmlinux(void)
211{
212 symbol_conf.sort_by_name = true;
213 if (symbol_conf.vmlinux_name == NULL)
214 symbol_conf.try_vmlinux_path = true;
215 else
216 pr_debug("Use vmlinux: %s\n", symbol_conf.vmlinux_name);
217 if (symbol__init() < 0)
218 die("Failed to init symbol map.");
219
220 map_groups__init(&session.kmap_groups);
221 if (map_groups__create_kernel_maps(&session.kmap_groups,
222 session.kmaps) < 0)
223 die("Failed to create kernel maps.");
224}
225
226int cmd_probe(int argc, const char **argv, const char *prefix __used) 188int cmd_probe(int argc, const char **argv, const char *prefix __used)
227{ 189{
228 int i, ret; 190 int ret;
229#ifndef NO_DWARF_SUPPORT
230 int fd;
231#endif
232 struct probe_point *pp;
233 191
234 argc = parse_options(argc, argv, options, probe_usage, 192 argc = parse_options(argc, argv, options, probe_usage,
235 PARSE_OPT_STOP_AT_NON_OPTION); 193 PARSE_OPT_STOP_AT_NON_OPTION);
@@ -238,123 +196,69 @@ int cmd_probe(int argc, const char **argv, const char *prefix __used)
238 pr_warning(" Error: '-' is not supported.\n"); 196 pr_warning(" Error: '-' is not supported.\n");
239 usage_with_options(probe_usage, options); 197 usage_with_options(probe_usage, options);
240 } 198 }
241 parse_probe_event_argv(argc, argv); 199 ret = parse_probe_event_argv(argc, argv);
200 if (ret < 0) {
201 pr_err(" Error: Parse Error. (%d)\n", ret);
202 return ret;
203 }
242 } 204 }
243 205
244 if ((!session.nr_probe && !session.dellist && !session.list_events && 206 if (params.max_probe_points == 0)
245 !session.show_lines)) 207 params.max_probe_points = MAX_PROBES;
246 usage_with_options(probe_usage, options);
247 208
248 if (debugfs_valid_mountpoint(debugfs_path) < 0) 209 if ((!params.nevents && !params.dellist && !params.list_events &&
249 die("Failed to find debugfs path."); 210 !params.show_lines))
211 usage_with_options(probe_usage, options);
250 212
251 if (session.list_events) { 213 if (params.list_events) {
252 if (session.nr_probe != 0 || session.dellist) { 214 if (params.nevents != 0 || params.dellist) {
253 pr_warning(" Error: Don't use --list with" 215 pr_err(" Error: Don't use --list with --add/--del.\n");
254 " --add/--del.\n");
255 usage_with_options(probe_usage, options); 216 usage_with_options(probe_usage, options);
256 } 217 }
257 if (session.show_lines) { 218 if (params.show_lines) {
258 pr_warning(" Error: Don't use --list with --line.\n"); 219 pr_err(" Error: Don't use --list with --line.\n");
259 usage_with_options(probe_usage, options); 220 usage_with_options(probe_usage, options);
260 } 221 }
261 show_perf_probe_events(); 222 ret = show_perf_probe_events();
262 return 0; 223 if (ret < 0)
224 pr_err(" Error: Failed to show event list. (%d)\n",
225 ret);
226 return ret;
263 } 227 }
264 228
265#ifndef NO_DWARF_SUPPORT 229#ifdef DWARF_SUPPORT
266 if (session.show_lines) { 230 if (params.show_lines) {
267 if (session.nr_probe != 0 || session.dellist) { 231 if (params.nevents != 0 || params.dellist) {
268 pr_warning(" Error: Don't use --line with" 232 pr_warning(" Error: Don't use --line with"
269 " --add/--del.\n"); 233 " --add/--del.\n");
270 usage_with_options(probe_usage, options); 234 usage_with_options(probe_usage, options);
271 } 235 }
272 init_vmlinux();
273 fd = open_vmlinux();
274 if (fd < 0)
275 die("Could not open debuginfo file.");
276 ret = find_line_range(fd, &session.line_range);
277 if (ret <= 0)
278 die("Source line is not found.\n");
279 close(fd);
280 show_line_range(&session.line_range);
281 return 0;
282 }
283#endif
284 236
285 if (session.dellist) { 237 ret = show_line_range(&params.line_range);
286 del_trace_kprobe_events(session.dellist); 238 if (ret < 0)
287 strlist__delete(session.dellist); 239 pr_err(" Error: Failed to show lines. (%d)\n", ret);
288 if (session.nr_probe == 0) 240 return ret;
289 return 0;
290 } 241 }
242#endif
291 243
292 /* Add probes */ 244 if (params.dellist) {
293 init_vmlinux(); 245 ret = del_perf_probe_events(params.dellist);
294 246 strlist__delete(params.dellist);
295 if (session.need_dwarf) 247 if (ret < 0) {
296#ifdef NO_DWARF_SUPPORT 248 pr_err(" Error: Failed to delete events. (%d)\n", ret);
297 die("Debuginfo-analysis is not supported"); 249 return ret;
298#else /* !NO_DWARF_SUPPORT */
299 pr_debug("Some probes require debuginfo.\n");
300
301 fd = open_vmlinux();
302 if (fd < 0) {
303 if (session.need_dwarf)
304 die("Could not open debuginfo file.");
305
306 pr_debug("Could not open vmlinux/module file."
307 " Try to use symbols.\n");
308 goto end_dwarf;
309 }
310
311 /* Searching probe points */
312 for (i = 0; i < session.nr_probe; i++) {
313 pp = &session.probes[i];
314 if (pp->found)
315 continue;
316
317 lseek(fd, SEEK_SET, 0);
318 ret = find_probe_point(fd, pp);
319 if (ret > 0)
320 continue;
321 if (ret == 0) { /* No error but failed to find probe point. */
322 synthesize_perf_probe_point(pp);
323 die("Probe point '%s' not found. - probe not added.",
324 pp->probes[0]);
325 }
326 /* Error path */
327 if (session.need_dwarf) {
328 if (ret == -ENOENT)
329 pr_warning("No dwarf info found in the vmlinux - please rebuild with CONFIG_DEBUG_INFO=y.\n");
330 die("Could not analyze debuginfo.");
331 } 250 }
332 pr_debug("An error occurred in debuginfo analysis."
333 " Try to use symbols.\n");
334 break;
335 } 251 }
336 close(fd);
337
338end_dwarf:
339#endif /* !NO_DWARF_SUPPORT */
340 252
341 /* Synthesize probes without dwarf */ 253 if (params.nevents) {
342 for (i = 0; i < session.nr_probe; i++) { 254 ret = add_perf_probe_events(params.events, params.nevents,
343 pp = &session.probes[i]; 255 params.force_add,
344 if (pp->found) /* This probe is already found. */ 256 params.max_probe_points);
345 continue; 257 if (ret < 0) {
346 258 pr_err(" Error: Failed to add events. (%d)\n", ret);
347 evaluate_probe_point(pp); 259 return ret;
348 ret = synthesize_trace_kprobe_event(pp); 260 }
349 if (ret == -E2BIG)
350 die("probe point definition becomes too long.");
351 else if (ret < 0)
352 die("Failed to synthesize a probe point.");
353 } 261 }
354
355 /* Settng up probe points */
356 add_trace_kprobe_events(session.probes, session.nr_probe,
357 session.force_add);
358 return 0; 262 return 0;
359} 263}
360 264
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index 3b8b6387c47c..cb46c7d0ea99 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -15,7 +15,6 @@
15#include "util/util.h" 15#include "util/util.h"
16#include "util/parse-options.h" 16#include "util/parse-options.h"
17#include "util/parse-events.h" 17#include "util/parse-events.h"
18#include "util/string.h"
19 18
20#include "util/header.h" 19#include "util/header.h"
21#include "util/event.h" 20#include "util/event.h"
@@ -27,31 +26,41 @@
27#include <unistd.h> 26#include <unistd.h>
28#include <sched.h> 27#include <sched.h>
29 28
30static int fd[MAX_NR_CPUS][MAX_COUNTERS]; 29enum write_mode_t {
30 WRITE_FORCE,
31 WRITE_APPEND
32};
33
34static int *fd[MAX_NR_CPUS][MAX_COUNTERS];
31 35
32static long default_interval = 0; 36static u64 user_interval = ULLONG_MAX;
37static u64 default_interval = 0;
33 38
34static int nr_cpus = 0; 39static int nr_cpus = 0;
35static unsigned int page_size; 40static unsigned int page_size;
36static unsigned int mmap_pages = 128; 41static unsigned int mmap_pages = 128;
42static unsigned int user_freq = UINT_MAX;
37static int freq = 1000; 43static int freq = 1000;
38static int output; 44static int output;
45static int pipe_output = 0;
39static const char *output_name = "perf.data"; 46static const char *output_name = "perf.data";
40static int group = 0; 47static int group = 0;
41static unsigned int realtime_prio = 0; 48static int realtime_prio = 0;
42static int raw_samples = 0; 49static bool raw_samples = false;
43static int system_wide = 0; 50static bool system_wide = false;
44static int profile_cpu = -1; 51static int profile_cpu = -1;
45static pid_t target_pid = -1; 52static pid_t target_pid = -1;
53static pid_t target_tid = -1;
54static pid_t *all_tids = NULL;
55static int thread_num = 0;
46static pid_t child_pid = -1; 56static pid_t child_pid = -1;
47static int inherit = 1; 57static bool no_inherit = false;
48static int force = 0; 58static enum write_mode_t write_mode = WRITE_FORCE;
49static int append_file = 0; 59static bool call_graph = false;
50static int call_graph = 0; 60static bool inherit_stat = false;
51static int inherit_stat = 0; 61static bool no_samples = false;
52static int no_samples = 0; 62static bool sample_address = false;
53static int sample_address = 0; 63static bool multiplex = false;
54static int multiplex = 0;
55static int multiplex_fd = -1; 64static int multiplex_fd = -1;
56 65
57static long samples = 0; 66static long samples = 0;
@@ -60,7 +69,7 @@ static struct timeval this_read;
60 69
61static u64 bytes_written = 0; 70static u64 bytes_written = 0;
62 71
63static struct pollfd event_array[MAX_NR_CPUS * MAX_COUNTERS]; 72static struct pollfd *event_array;
64 73
65static int nr_poll = 0; 74static int nr_poll = 0;
66static int nr_cpu = 0; 75static int nr_cpu = 0;
@@ -77,7 +86,7 @@ struct mmap_data {
77 unsigned int prev; 86 unsigned int prev;
78}; 87};
79 88
80static struct mmap_data mmap_array[MAX_NR_CPUS][MAX_COUNTERS]; 89static struct mmap_data *mmap_array[MAX_NR_CPUS][MAX_COUNTERS];
81 90
82static unsigned long mmap_read_head(struct mmap_data *md) 91static unsigned long mmap_read_head(struct mmap_data *md)
83{ 92{
@@ -101,6 +110,11 @@ static void mmap_write_tail(struct mmap_data *md, unsigned long tail)
101 pc->data_tail = tail; 110 pc->data_tail = tail;
102} 111}
103 112
113static void advance_output(size_t size)
114{
115 bytes_written += size;
116}
117
104static void write_output(void *buf, size_t size) 118static void write_output(void *buf, size_t size)
105{ 119{
106 while (size) { 120 while (size) {
@@ -225,12 +239,13 @@ static struct perf_header_attr *get_header_attr(struct perf_event_attr *a, int n
225 return h_attr; 239 return h_attr;
226} 240}
227 241
228static void create_counter(int counter, int cpu, pid_t pid) 242static void create_counter(int counter, int cpu)
229{ 243{
230 char *filter = filters[counter]; 244 char *filter = filters[counter];
231 struct perf_event_attr *attr = attrs + counter; 245 struct perf_event_attr *attr = attrs + counter;
232 struct perf_header_attr *h_attr; 246 struct perf_header_attr *h_attr;
233 int track = !counter; /* only the first counter needs these */ 247 int track = !counter; /* only the first counter needs these */
248 int thread_index;
234 int ret; 249 int ret;
235 struct { 250 struct {
236 u64 count; 251 u64 count;
@@ -248,10 +263,19 @@ static void create_counter(int counter, int cpu, pid_t pid)
248 if (nr_counters > 1) 263 if (nr_counters > 1)
249 attr->sample_type |= PERF_SAMPLE_ID; 264 attr->sample_type |= PERF_SAMPLE_ID;
250 265
251 if (freq) { 266 /*
252 attr->sample_type |= PERF_SAMPLE_PERIOD; 267 * We default some events to a 1 default interval. But keep
253 attr->freq = 1; 268 * it a weak assumption overridable by the user.
254 attr->sample_freq = freq; 269 */
270 if (!attr->sample_period || (user_freq != UINT_MAX &&
271 user_interval != ULLONG_MAX)) {
272 if (freq) {
273 attr->sample_type |= PERF_SAMPLE_PERIOD;
274 attr->freq = 1;
275 attr->sample_freq = freq;
276 } else {
277 attr->sample_period = default_interval;
278 }
255 } 279 }
256 280
257 if (no_samples) 281 if (no_samples)
@@ -274,119 +298,130 @@ static void create_counter(int counter, int cpu, pid_t pid)
274 298
275 attr->mmap = track; 299 attr->mmap = track;
276 attr->comm = track; 300 attr->comm = track;
277 attr->inherit = inherit; 301 attr->inherit = !no_inherit;
278 attr->disabled = 1; 302 if (target_pid == -1 && target_tid == -1 && !system_wide) {
303 attr->disabled = 1;
304 attr->enable_on_exec = 1;
305 }
279 306
307 for (thread_index = 0; thread_index < thread_num; thread_index++) {
280try_again: 308try_again:
281 fd[nr_cpu][counter] = sys_perf_event_open(attr, pid, cpu, group_fd, 0); 309 fd[nr_cpu][counter][thread_index] = sys_perf_event_open(attr,
282 310 all_tids[thread_index], cpu, group_fd, 0);
283 if (fd[nr_cpu][counter] < 0) { 311
284 int err = errno; 312 if (fd[nr_cpu][counter][thread_index] < 0) {
285 313 int err = errno;
286 if (err == EPERM || err == EACCES) 314
287 die("Permission error - are you root?\n"); 315 if (err == EPERM || err == EACCES)
288 else if (err == ENODEV && profile_cpu != -1) 316 die("Permission error - are you root?\n"
289 die("No such device - did you specify an out-of-range profile CPU?\n"); 317 "\t Consider tweaking"
318 " /proc/sys/kernel/perf_event_paranoid.\n");
319 else if (err == ENODEV && profile_cpu != -1) {
320 die("No such device - did you specify"
321 " an out-of-range profile CPU?\n");
322 }
290 323
291 /* 324 /*
292 * If it's cycles then fall back to hrtimer 325 * If it's cycles then fall back to hrtimer
293 * based cpu-clock-tick sw counter, which 326 * based cpu-clock-tick sw counter, which
294 * is always available even if no PMU support: 327 * is always available even if no PMU support:
295 */ 328 */
296 if (attr->type == PERF_TYPE_HARDWARE 329 if (attr->type == PERF_TYPE_HARDWARE
297 && attr->config == PERF_COUNT_HW_CPU_CYCLES) { 330 && attr->config == PERF_COUNT_HW_CPU_CYCLES) {
298 331
299 if (verbose) 332 if (verbose)
300 warning(" ... trying to fall back to cpu-clock-ticks\n"); 333 warning(" ... trying to fall back to cpu-clock-ticks\n");
301 attr->type = PERF_TYPE_SOFTWARE; 334 attr->type = PERF_TYPE_SOFTWARE;
302 attr->config = PERF_COUNT_SW_CPU_CLOCK; 335 attr->config = PERF_COUNT_SW_CPU_CLOCK;
303 goto try_again; 336 goto try_again;
304 } 337 }
305 printf("\n"); 338 printf("\n");
306 error("perfcounter syscall returned with %d (%s)\n", 339 error("perfcounter syscall returned with %d (%s)\n",
307 fd[nr_cpu][counter], strerror(err)); 340 fd[nr_cpu][counter][thread_index], strerror(err));
308 341
309#if defined(__i386__) || defined(__x86_64__) 342#if defined(__i386__) || defined(__x86_64__)
310 if (attr->type == PERF_TYPE_HARDWARE && err == EOPNOTSUPP) 343 if (attr->type == PERF_TYPE_HARDWARE && err == EOPNOTSUPP)
311 die("No hardware sampling interrupt available. No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it.\n"); 344 die("No hardware sampling interrupt available."
345 " No APIC? If so then you can boot the kernel"
346 " with the \"lapic\" boot parameter to"
347 " force-enable it.\n");
312#endif 348#endif
313 349
314 die("No CONFIG_PERF_EVENTS=y kernel support configured?\n"); 350 die("No CONFIG_PERF_EVENTS=y kernel support configured?\n");
315 exit(-1); 351 exit(-1);
316 } 352 }
317 353
318 h_attr = get_header_attr(attr, counter); 354 h_attr = get_header_attr(attr, counter);
319 if (h_attr == NULL) 355 if (h_attr == NULL)
320 die("nomem\n"); 356 die("nomem\n");
321 357
322 if (!file_new) { 358 if (!file_new) {
323 if (memcmp(&h_attr->attr, attr, sizeof(*attr))) { 359 if (memcmp(&h_attr->attr, attr, sizeof(*attr))) {
324 fprintf(stderr, "incompatible append\n"); 360 fprintf(stderr, "incompatible append\n");
325 exit(-1); 361 exit(-1);
362 }
326 } 363 }
327 }
328 364
329 if (read(fd[nr_cpu][counter], &read_data, sizeof(read_data)) == -1) { 365 if (read(fd[nr_cpu][counter][thread_index], &read_data, sizeof(read_data)) == -1) {
330 perror("Unable to read perf file descriptor\n"); 366 perror("Unable to read perf file descriptor\n");
331 exit(-1); 367 exit(-1);
332 } 368 }
333 369
334 if (perf_header_attr__add_id(h_attr, read_data.id) < 0) { 370 if (perf_header_attr__add_id(h_attr, read_data.id) < 0) {
335 pr_warning("Not enough memory to add id\n"); 371 pr_warning("Not enough memory to add id\n");
336 exit(-1); 372 exit(-1);
337 } 373 }
338 374
339 assert(fd[nr_cpu][counter] >= 0); 375 assert(fd[nr_cpu][counter][thread_index] >= 0);
340 fcntl(fd[nr_cpu][counter], F_SETFL, O_NONBLOCK); 376 fcntl(fd[nr_cpu][counter][thread_index], F_SETFL, O_NONBLOCK);
341 377
342 /* 378 /*
343 * First counter acts as the group leader: 379 * First counter acts as the group leader:
344 */ 380 */
345 if (group && group_fd == -1) 381 if (group && group_fd == -1)
346 group_fd = fd[nr_cpu][counter]; 382 group_fd = fd[nr_cpu][counter][thread_index];
347 if (multiplex && multiplex_fd == -1) 383 if (multiplex && multiplex_fd == -1)
348 multiplex_fd = fd[nr_cpu][counter]; 384 multiplex_fd = fd[nr_cpu][counter][thread_index];
349 385
350 if (multiplex && fd[nr_cpu][counter] != multiplex_fd) { 386 if (multiplex && fd[nr_cpu][counter][thread_index] != multiplex_fd) {
351 387
352 ret = ioctl(fd[nr_cpu][counter], PERF_EVENT_IOC_SET_OUTPUT, multiplex_fd); 388 ret = ioctl(fd[nr_cpu][counter][thread_index], PERF_EVENT_IOC_SET_OUTPUT, multiplex_fd);
353 assert(ret != -1); 389 assert(ret != -1);
354 } else { 390 } else {
355 event_array[nr_poll].fd = fd[nr_cpu][counter]; 391 event_array[nr_poll].fd = fd[nr_cpu][counter][thread_index];
356 event_array[nr_poll].events = POLLIN; 392 event_array[nr_poll].events = POLLIN;
357 nr_poll++; 393 nr_poll++;
358 394
359 mmap_array[nr_cpu][counter].counter = counter; 395 mmap_array[nr_cpu][counter][thread_index].counter = counter;
360 mmap_array[nr_cpu][counter].prev = 0; 396 mmap_array[nr_cpu][counter][thread_index].prev = 0;
361 mmap_array[nr_cpu][counter].mask = mmap_pages*page_size - 1; 397 mmap_array[nr_cpu][counter][thread_index].mask = mmap_pages*page_size - 1;
362 mmap_array[nr_cpu][counter].base = mmap(NULL, (mmap_pages+1)*page_size, 398 mmap_array[nr_cpu][counter][thread_index].base = mmap(NULL, (mmap_pages+1)*page_size,
363 PROT_READ|PROT_WRITE, MAP_SHARED, fd[nr_cpu][counter], 0); 399 PROT_READ|PROT_WRITE, MAP_SHARED, fd[nr_cpu][counter][thread_index], 0);
364 if (mmap_array[nr_cpu][counter].base == MAP_FAILED) { 400 if (mmap_array[nr_cpu][counter][thread_index].base == MAP_FAILED) {
365 error("failed to mmap with %d (%s)\n", errno, strerror(errno)); 401 error("failed to mmap with %d (%s)\n", errno, strerror(errno));
366 exit(-1); 402 exit(-1);
403 }
367 } 404 }
368 }
369 405
370 if (filter != NULL) { 406 if (filter != NULL) {
371 ret = ioctl(fd[nr_cpu][counter], 407 ret = ioctl(fd[nr_cpu][counter][thread_index],
372 PERF_EVENT_IOC_SET_FILTER, filter); 408 PERF_EVENT_IOC_SET_FILTER, filter);
373 if (ret) { 409 if (ret) {
374 error("failed to set filter with %d (%s)\n", errno, 410 error("failed to set filter with %d (%s)\n", errno,
375 strerror(errno)); 411 strerror(errno));
376 exit(-1); 412 exit(-1);
413 }
377 } 414 }
378 } 415 }
379
380 ioctl(fd[nr_cpu][counter], PERF_EVENT_IOC_ENABLE);
381} 416}
382 417
383static void open_counters(int cpu, pid_t pid) 418static void open_counters(int cpu)
384{ 419{
385 int counter; 420 int counter;
386 421
387 group_fd = -1; 422 group_fd = -1;
388 for (counter = 0; counter < nr_counters; counter++) 423 for (counter = 0; counter < nr_counters; counter++)
389 create_counter(counter, cpu, pid); 424 create_counter(counter, cpu);
390 425
391 nr_cpu++; 426 nr_cpu++;
392} 427}
@@ -406,10 +441,80 @@ static int process_buildids(void)
406 441
407static void atexit_header(void) 442static void atexit_header(void)
408{ 443{
409 session->header.data_size += bytes_written; 444 if (!pipe_output) {
445 session->header.data_size += bytes_written;
446
447 process_buildids();
448 perf_header__write(&session->header, output, true);
449 }
450}
451
452static void event__synthesize_guest_os(struct machine *machine, void *data)
453{
454 int err;
455 char *guest_kallsyms;
456 char path[PATH_MAX];
457 struct perf_session *psession = data;
458
459 if (machine__is_host(machine))
460 return;
461
462 /*
463 *As for guest kernel when processing subcommand record&report,
464 *we arrange module mmap prior to guest kernel mmap and trigger
465 *a preload dso because default guest module symbols are loaded
466 *from guest kallsyms instead of /lib/modules/XXX/XXX. This
467 *method is used to avoid symbol missing when the first addr is
468 *in module instead of in guest kernel.
469 */
470 err = event__synthesize_modules(process_synthesized_event,
471 psession, machine);
472 if (err < 0)
473 pr_err("Couldn't record guest kernel [%d]'s reference"
474 " relocation symbol.\n", machine->pid);
475
476 if (machine__is_default_guest(machine))
477 guest_kallsyms = (char *) symbol_conf.default_guest_kallsyms;
478 else {
479 sprintf(path, "%s/proc/kallsyms", machine->root_dir);
480 guest_kallsyms = path;
481 }
482
483 /*
484 * We use _stext for guest kernel because guest kernel's /proc/kallsyms
485 * have no _text sometimes.
486 */
487 err = event__synthesize_kernel_mmap(process_synthesized_event,
488 psession, machine, "_text");
489 if (err < 0)
490 err = event__synthesize_kernel_mmap(process_synthesized_event,
491 psession, machine, "_stext");
492 if (err < 0)
493 pr_err("Couldn't record guest kernel [%d]'s reference"
494 " relocation symbol.\n", machine->pid);
495}
496
497static struct perf_event_header finished_round_event = {
498 .size = sizeof(struct perf_event_header),
499 .type = PERF_RECORD_FINISHED_ROUND,
500};
501
502static void mmap_read_all(void)
503{
504 int i, counter, thread;
410 505
411 process_buildids(); 506 for (i = 0; i < nr_cpu; i++) {
412 perf_header__write(&session->header, output, true); 507 for (counter = 0; counter < nr_counters; counter++) {
508 for (thread = 0; thread < thread_num; thread++) {
509 if (mmap_array[i][counter][thread].base)
510 mmap_read(&mmap_array[i][counter][thread]);
511 }
512
513 }
514 }
515
516 if (perf_header__has_feat(&session->header, HEADER_TRACE_INFO))
517 write_output(&finished_round_event, sizeof(finished_round_event));
413} 518}
414 519
415static int __cmd_record(int argc, const char **argv) 520static int __cmd_record(int argc, const char **argv)
@@ -421,8 +526,9 @@ static int __cmd_record(int argc, const char **argv)
421 int err; 526 int err;
422 unsigned long waking = 0; 527 unsigned long waking = 0;
423 int child_ready_pipe[2], go_pipe[2]; 528 int child_ready_pipe[2], go_pipe[2];
424 const bool forks = target_pid == -1 && argc > 0; 529 const bool forks = argc > 0;
425 char buf; 530 char buf;
531 struct machine *machine;
426 532
427 page_size = sysconf(_SC_PAGE_SIZE); 533 page_size = sysconf(_SC_PAGE_SIZE);
428 534
@@ -435,70 +541,63 @@ static int __cmd_record(int argc, const char **argv)
435 exit(-1); 541 exit(-1);
436 } 542 }
437 543
438 if (!stat(output_name, &st) && st.st_size) { 544 if (!strcmp(output_name, "-"))
439 if (!force) { 545 pipe_output = 1;
440 if (!append_file) { 546 else if (!stat(output_name, &st) && st.st_size) {
441 pr_err("Error, output file %s exists, use -A " 547 if (write_mode == WRITE_FORCE) {
442 "to append or -f to overwrite.\n",
443 output_name);
444 exit(-1);
445 }
446 } else {
447 char oldname[PATH_MAX]; 548 char oldname[PATH_MAX];
448 snprintf(oldname, sizeof(oldname), "%s.old", 549 snprintf(oldname, sizeof(oldname), "%s.old",
449 output_name); 550 output_name);
450 unlink(oldname); 551 unlink(oldname);
451 rename(output_name, oldname); 552 rename(output_name, oldname);
452 } 553 }
453 } else { 554 } else if (write_mode == WRITE_APPEND) {
454 append_file = 0; 555 write_mode = WRITE_FORCE;
455 } 556 }
456 557
457 flags = O_CREAT|O_RDWR; 558 flags = O_CREAT|O_RDWR;
458 if (append_file) 559 if (write_mode == WRITE_APPEND)
459 file_new = 0; 560 file_new = 0;
460 else 561 else
461 flags |= O_TRUNC; 562 flags |= O_TRUNC;
462 563
463 output = open(output_name, flags, S_IRUSR|S_IWUSR); 564 if (pipe_output)
565 output = STDOUT_FILENO;
566 else
567 output = open(output_name, flags, S_IRUSR | S_IWUSR);
464 if (output < 0) { 568 if (output < 0) {
465 perror("failed to create output file"); 569 perror("failed to create output file");
466 exit(-1); 570 exit(-1);
467 } 571 }
468 572
469 session = perf_session__new(output_name, O_WRONLY, force); 573 session = perf_session__new(output_name, O_WRONLY,
574 write_mode == WRITE_FORCE, false);
470 if (session == NULL) { 575 if (session == NULL) {
471 pr_err("Not enough memory for reading perf file header\n"); 576 pr_err("Not enough memory for reading perf file header\n");
472 return -1; 577 return -1;
473 } 578 }
474 579
475 if (!file_new) { 580 if (!file_new) {
476 err = perf_header__read(&session->header, output); 581 err = perf_header__read(session, output);
477 if (err < 0) 582 if (err < 0)
478 return err; 583 return err;
479 } 584 }
480 585
481 if (raw_samples) { 586 if (have_tracepoints(attrs, nr_counters))
482 perf_header__set_feat(&session->header, HEADER_TRACE_INFO); 587 perf_header__set_feat(&session->header, HEADER_TRACE_INFO);
483 } else {
484 for (i = 0; i < nr_counters; i++) {
485 if (attrs[i].sample_type & PERF_SAMPLE_RAW) {
486 perf_header__set_feat(&session->header, HEADER_TRACE_INFO);
487 break;
488 }
489 }
490 }
491 588
492 atexit(atexit_header); 589 atexit(atexit_header);
493 590
494 if (forks) { 591 if (forks) {
495 pid = fork(); 592 child_pid = fork();
496 if (pid < 0) { 593 if (pid < 0) {
497 perror("failed to fork"); 594 perror("failed to fork");
498 exit(-1); 595 exit(-1);
499 } 596 }
500 597
501 if (!pid) { 598 if (!child_pid) {
599 if (pipe_output)
600 dup2(2, 1);
502 close(child_ready_pipe[0]); 601 close(child_ready_pipe[0]);
503 close(go_pipe[1]); 602 close(go_pipe[1]);
504 fcntl(go_pipe[0], F_SETFD, FD_CLOEXEC); 603 fcntl(go_pipe[0], F_SETFD, FD_CLOEXEC);
@@ -527,10 +626,8 @@ static int __cmd_record(int argc, const char **argv)
527 exit(-1); 626 exit(-1);
528 } 627 }
529 628
530 child_pid = pid; 629 if (!system_wide && target_tid == -1 && target_pid == -1)
531 630 all_tids[0] = child_pid;
532 if (!system_wide)
533 target_pid = pid;
534 631
535 close(child_ready_pipe[1]); 632 close(child_ready_pipe[1]);
536 close(go_pipe[0]); 633 close(go_pipe[0]);
@@ -544,16 +641,19 @@ static int __cmd_record(int argc, const char **argv)
544 close(child_ready_pipe[0]); 641 close(child_ready_pipe[0]);
545 } 642 }
546 643
547 644 if ((!system_wide && no_inherit) || profile_cpu != -1) {
548 if ((!system_wide && !inherit) || profile_cpu != -1) { 645 open_counters(profile_cpu);
549 open_counters(profile_cpu, target_pid);
550 } else { 646 } else {
551 nr_cpus = read_cpu_map(); 647 nr_cpus = read_cpu_map();
552 for (i = 0; i < nr_cpus; i++) 648 for (i = 0; i < nr_cpus; i++)
553 open_counters(cpumap[i], target_pid); 649 open_counters(cpumap[i]);
554 } 650 }
555 651
556 if (file_new) { 652 if (pipe_output) {
653 err = perf_header__write_pipe(output);
654 if (err < 0)
655 return err;
656 } else if (file_new) {
557 err = perf_header__write(&session->header, output, false); 657 err = perf_header__write(&session->header, output, false);
558 if (err < 0) 658 if (err < 0)
559 return err; 659 return err;
@@ -561,21 +661,70 @@ static int __cmd_record(int argc, const char **argv)
561 661
562 post_processing_offset = lseek(output, 0, SEEK_CUR); 662 post_processing_offset = lseek(output, 0, SEEK_CUR);
563 663
664 if (pipe_output) {
665 err = event__synthesize_attrs(&session->header,
666 process_synthesized_event,
667 session);
668 if (err < 0) {
669 pr_err("Couldn't synthesize attrs.\n");
670 return err;
671 }
672
673 err = event__synthesize_event_types(process_synthesized_event,
674 session);
675 if (err < 0) {
676 pr_err("Couldn't synthesize event_types.\n");
677 return err;
678 }
679
680 if (have_tracepoints(attrs, nr_counters)) {
681 /*
682 * FIXME err <= 0 here actually means that
683 * there were no tracepoints so its not really
684 * an error, just that we don't need to
685 * synthesize anything. We really have to
686 * return this more properly and also
687 * propagate errors that now are calling die()
688 */
689 err = event__synthesize_tracing_data(output, attrs,
690 nr_counters,
691 process_synthesized_event,
692 session);
693 if (err <= 0) {
694 pr_err("Couldn't record tracing data.\n");
695 return err;
696 }
697 advance_output(err);
698 }
699 }
700
701 machine = perf_session__find_host_machine(session);
702 if (!machine) {
703 pr_err("Couldn't find native kernel information.\n");
704 return -1;
705 }
706
564 err = event__synthesize_kernel_mmap(process_synthesized_event, 707 err = event__synthesize_kernel_mmap(process_synthesized_event,
565 session, "_text"); 708 session, machine, "_text");
709 if (err < 0)
710 err = event__synthesize_kernel_mmap(process_synthesized_event,
711 session, machine, "_stext");
566 if (err < 0) { 712 if (err < 0) {
567 pr_err("Couldn't record kernel reference relocation symbol.\n"); 713 pr_err("Couldn't record kernel reference relocation symbol.\n");
568 return err; 714 return err;
569 } 715 }
570 716
571 err = event__synthesize_modules(process_synthesized_event, session); 717 err = event__synthesize_modules(process_synthesized_event,
718 session, machine);
572 if (err < 0) { 719 if (err < 0) {
573 pr_err("Couldn't record kernel reference relocation symbol.\n"); 720 pr_err("Couldn't record kernel reference relocation symbol.\n");
574 return err; 721 return err;
575 } 722 }
723 if (perf_guest)
724 perf_session__process_machines(session, event__synthesize_guest_os);
576 725
577 if (!system_wide && profile_cpu == -1) 726 if (!system_wide && profile_cpu == -1)
578 event__synthesize_thread(target_pid, process_synthesized_event, 727 event__synthesize_thread(target_tid, process_synthesized_event,
579 session); 728 session);
580 else 729 else
581 event__synthesize_threads(process_synthesized_event, session); 730 event__synthesize_threads(process_synthesized_event, session);
@@ -598,13 +747,9 @@ static int __cmd_record(int argc, const char **argv)
598 747
599 for (;;) { 748 for (;;) {
600 int hits = samples; 749 int hits = samples;
750 int thread;
601 751
602 for (i = 0; i < nr_cpu; i++) { 752 mmap_read_all();
603 for (counter = 0; counter < nr_counters; counter++) {
604 if (mmap_array[i][counter].base)
605 mmap_read(&mmap_array[i][counter]);
606 }
607 }
608 753
609 if (hits == samples) { 754 if (hits == samples) {
610 if (done) 755 if (done)
@@ -615,8 +760,15 @@ static int __cmd_record(int argc, const char **argv)
615 760
616 if (done) { 761 if (done) {
617 for (i = 0; i < nr_cpu; i++) { 762 for (i = 0; i < nr_cpu; i++) {
618 for (counter = 0; counter < nr_counters; counter++) 763 for (counter = 0;
619 ioctl(fd[i][counter], PERF_EVENT_IOC_DISABLE); 764 counter < nr_counters;
765 counter++) {
766 for (thread = 0;
767 thread < thread_num;
768 thread++)
769 ioctl(fd[i][counter][thread],
770 PERF_EVENT_IOC_DISABLE);
771 }
620 } 772 }
621 } 773 }
622 } 774 }
@@ -641,6 +793,8 @@ static const char * const record_usage[] = {
641 NULL 793 NULL
642}; 794};
643 795
796static bool force, append_file;
797
644static const struct option options[] = { 798static const struct option options[] = {
645 OPT_CALLBACK('e', "event", NULL, "event", 799 OPT_CALLBACK('e', "event", NULL, "event",
646 "event selector. use 'perf list' to list available events", 800 "event selector. use 'perf list' to list available events",
@@ -648,7 +802,9 @@ static const struct option options[] = {
648 OPT_CALLBACK(0, "filter", NULL, "filter", 802 OPT_CALLBACK(0, "filter", NULL, "filter",
649 "event filter", parse_filter), 803 "event filter", parse_filter),
650 OPT_INTEGER('p', "pid", &target_pid, 804 OPT_INTEGER('p', "pid", &target_pid,
651 "record events on existing pid"), 805 "record events on existing process id"),
806 OPT_INTEGER('t', "tid", &target_tid,
807 "record events on existing thread id"),
652 OPT_INTEGER('r', "realtime", &realtime_prio, 808 OPT_INTEGER('r', "realtime", &realtime_prio,
653 "collect data with this RT SCHED_FIFO priority"), 809 "collect data with this RT SCHED_FIFO priority"),
654 OPT_BOOLEAN('R', "raw-samples", &raw_samples, 810 OPT_BOOLEAN('R', "raw-samples", &raw_samples,
@@ -660,20 +816,17 @@ static const struct option options[] = {
660 OPT_INTEGER('C', "profile_cpu", &profile_cpu, 816 OPT_INTEGER('C', "profile_cpu", &profile_cpu,
661 "CPU to profile on"), 817 "CPU to profile on"),
662 OPT_BOOLEAN('f', "force", &force, 818 OPT_BOOLEAN('f', "force", &force,
663 "overwrite existing data file"), 819 "overwrite existing data file (deprecated)"),
664 OPT_LONG('c', "count", &default_interval, 820 OPT_U64('c', "count", &user_interval, "event period to sample"),
665 "event period to sample"),
666 OPT_STRING('o', "output", &output_name, "file", 821 OPT_STRING('o', "output", &output_name, "file",
667 "output file name"), 822 "output file name"),
668 OPT_BOOLEAN('i', "inherit", &inherit, 823 OPT_BOOLEAN('i', "no-inherit", &no_inherit,
669 "child tasks inherit counters"), 824 "child tasks do not inherit counters"),
670 OPT_INTEGER('F', "freq", &freq, 825 OPT_UINTEGER('F', "freq", &user_freq, "profile at this frequency"),
671 "profile at this frequency"), 826 OPT_UINTEGER('m', "mmap-pages", &mmap_pages, "number of mmap data pages"),
672 OPT_INTEGER('m', "mmap-pages", &mmap_pages,
673 "number of mmap data pages"),
674 OPT_BOOLEAN('g', "call-graph", &call_graph, 827 OPT_BOOLEAN('g', "call-graph", &call_graph,
675 "do call-graph (stack chain/backtrace) recording"), 828 "do call-graph (stack chain/backtrace) recording"),
676 OPT_BOOLEAN('v', "verbose", &verbose, 829 OPT_INCR('v', "verbose", &verbose,
677 "be more verbose (show counter open errors, etc)"), 830 "be more verbose (show counter open errors, etc)"),
678 OPT_BOOLEAN('s', "stat", &inherit_stat, 831 OPT_BOOLEAN('s', "stat", &inherit_stat,
679 "per thread counts"), 832 "per thread counts"),
@@ -688,13 +841,24 @@ static const struct option options[] = {
688 841
689int cmd_record(int argc, const char **argv, const char *prefix __used) 842int cmd_record(int argc, const char **argv, const char *prefix __used)
690{ 843{
691 int counter; 844 int i,j;
692 845
693 argc = parse_options(argc, argv, options, record_usage, 846 argc = parse_options(argc, argv, options, record_usage,
694 PARSE_OPT_STOP_AT_NON_OPTION); 847 PARSE_OPT_STOP_AT_NON_OPTION);
695 if (!argc && target_pid == -1 && !system_wide && profile_cpu == -1) 848 if (!argc && target_pid == -1 && target_tid == -1 &&
849 !system_wide && profile_cpu == -1)
696 usage_with_options(record_usage, options); 850 usage_with_options(record_usage, options);
697 851
852 if (force && append_file) {
853 fprintf(stderr, "Can't overwrite and append at the same time."
854 " You need to choose between -f and -A");
855 usage_with_options(record_usage, options);
856 } else if (append_file) {
857 write_mode = WRITE_APPEND;
858 } else {
859 write_mode = WRITE_FORCE;
860 }
861
698 symbol__init(); 862 symbol__init();
699 863
700 if (!nr_counters) { 864 if (!nr_counters) {
@@ -703,6 +867,42 @@ int cmd_record(int argc, const char **argv, const char *prefix __used)
703 attrs[0].config = PERF_COUNT_HW_CPU_CYCLES; 867 attrs[0].config = PERF_COUNT_HW_CPU_CYCLES;
704 } 868 }
705 869
870 if (target_pid != -1) {
871 target_tid = target_pid;
872 thread_num = find_all_tid(target_pid, &all_tids);
873 if (thread_num <= 0) {
874 fprintf(stderr, "Can't find all threads of pid %d\n",
875 target_pid);
876 usage_with_options(record_usage, options);
877 }
878 } else {
879 all_tids=malloc(sizeof(pid_t));
880 if (!all_tids)
881 return -ENOMEM;
882
883 all_tids[0] = target_tid;
884 thread_num = 1;
885 }
886
887 for (i = 0; i < MAX_NR_CPUS; i++) {
888 for (j = 0; j < MAX_COUNTERS; j++) {
889 fd[i][j] = malloc(sizeof(int)*thread_num);
890 mmap_array[i][j] = zalloc(
891 sizeof(struct mmap_data)*thread_num);
892 if (!fd[i][j] || !mmap_array[i][j])
893 return -ENOMEM;
894 }
895 }
896 event_array = malloc(
897 sizeof(struct pollfd)*MAX_NR_CPUS*MAX_COUNTERS*thread_num);
898 if (!event_array)
899 return -ENOMEM;
900
901 if (user_interval != ULLONG_MAX)
902 default_interval = user_interval;
903 if (user_freq != UINT_MAX)
904 freq = user_freq;
905
706 /* 906 /*
707 * User specified count overrides default frequency. 907 * User specified count overrides default frequency.
708 */ 908 */
@@ -715,12 +915,5 @@ int cmd_record(int argc, const char **argv, const char *prefix __used)
715 exit(EXIT_FAILURE); 915 exit(EXIT_FAILURE);
716 } 916 }
717 917
718 for (counter = 0; counter < nr_counters; counter++) {
719 if (attrs[counter].sample_period)
720 continue;
721
722 attrs[counter].sample_period = default_interval;
723 }
724
725 return __cmd_record(argc, argv); 918 return __cmd_record(argc, argv);
726} 919}
diff --git a/tools/perf/builtin-report.c b/tools/perf/builtin-report.c
index f815de25d0fc..1d3c1003b43a 100644
--- a/tools/perf/builtin-report.c
+++ b/tools/perf/builtin-report.c
@@ -14,7 +14,6 @@
14#include "util/cache.h" 14#include "util/cache.h"
15#include <linux/rbtree.h> 15#include <linux/rbtree.h>
16#include "util/symbol.h" 16#include "util/symbol.h"
17#include "util/string.h"
18#include "util/callchain.h" 17#include "util/callchain.h"
19#include "util/strlist.h" 18#include "util/strlist.h"
20#include "util/values.h" 19#include "util/values.h"
@@ -33,28 +32,29 @@
33 32
34static char const *input_name = "perf.data"; 33static char const *input_name = "perf.data";
35 34
36static int force; 35static bool force;
37static bool hide_unresolved; 36static bool hide_unresolved;
38static bool dont_use_callchains; 37static bool dont_use_callchains;
39 38
40static int show_threads; 39static bool show_threads;
41static struct perf_read_values show_threads_values; 40static struct perf_read_values show_threads_values;
42 41
43static char default_pretty_printing_style[] = "normal"; 42static const char default_pretty_printing_style[] = "normal";
44static char *pretty_printing_style = default_pretty_printing_style; 43static const char *pretty_printing_style = default_pretty_printing_style;
45 44
46static char callchain_default_opt[] = "fractal,0.5"; 45static char callchain_default_opt[] = "fractal,0.5";
47 46
48static struct event_stat_id *get_stats(struct perf_session *self, 47static struct hists *perf_session__hists_findnew(struct perf_session *self,
49 u64 event_stream, u32 type, u64 config) 48 u64 event_stream, u32 type,
49 u64 config)
50{ 50{
51 struct rb_node **p = &self->stats_by_id.rb_node; 51 struct rb_node **p = &self->hists_tree.rb_node;
52 struct rb_node *parent = NULL; 52 struct rb_node *parent = NULL;
53 struct event_stat_id *iter, *new; 53 struct hists *iter, *new;
54 54
55 while (*p != NULL) { 55 while (*p != NULL) {
56 parent = *p; 56 parent = *p;
57 iter = rb_entry(parent, struct event_stat_id, rb_node); 57 iter = rb_entry(parent, struct hists, rb_node);
58 if (iter->config == config) 58 if (iter->config == config)
59 return iter; 59 return iter;
60 60
@@ -65,15 +65,15 @@ static struct event_stat_id *get_stats(struct perf_session *self,
65 p = &(*p)->rb_left; 65 p = &(*p)->rb_left;
66 } 66 }
67 67
68 new = malloc(sizeof(struct event_stat_id)); 68 new = malloc(sizeof(struct hists));
69 if (new == NULL) 69 if (new == NULL)
70 return NULL; 70 return NULL;
71 memset(new, 0, sizeof(struct event_stat_id)); 71 memset(new, 0, sizeof(struct hists));
72 new->event_stream = event_stream; 72 new->event_stream = event_stream;
73 new->config = config; 73 new->config = config;
74 new->type = type; 74 new->type = type;
75 rb_link_node(&new->rb_node, parent, p); 75 rb_link_node(&new->rb_node, parent, p);
76 rb_insert_color(&new->rb_node, &self->stats_by_id); 76 rb_insert_color(&new->rb_node, &self->hists_tree);
77 return new; 77 return new;
78} 78}
79 79
@@ -81,70 +81,71 @@ static int perf_session__add_hist_entry(struct perf_session *self,
81 struct addr_location *al, 81 struct addr_location *al,
82 struct sample_data *data) 82 struct sample_data *data)
83{ 83{
84 struct symbol **syms = NULL, *parent = NULL; 84 struct map_symbol *syms = NULL;
85 bool hit; 85 struct symbol *parent = NULL;
86 int err = -ENOMEM;
86 struct hist_entry *he; 87 struct hist_entry *he;
87 struct event_stat_id *stats; 88 struct hists *hists;
88 struct perf_event_attr *attr; 89 struct perf_event_attr *attr;
89 90
90 if ((sort__has_parent || symbol_conf.use_callchain) && data->callchain) 91 if ((sort__has_parent || symbol_conf.use_callchain) && data->callchain) {
91 syms = perf_session__resolve_callchain(self, al->thread, 92 syms = perf_session__resolve_callchain(self, al->thread,
92 data->callchain, &parent); 93 data->callchain, &parent);
94 if (syms == NULL)
95 return -ENOMEM;
96 }
93 97
94 attr = perf_header__find_attr(data->id, &self->header); 98 attr = perf_header__find_attr(data->id, &self->header);
95 if (attr) 99 if (attr)
96 stats = get_stats(self, data->id, attr->type, attr->config); 100 hists = perf_session__hists_findnew(self, data->id, attr->type, attr->config);
97 else 101 else
98 stats = get_stats(self, data->id, 0, 0); 102 hists = perf_session__hists_findnew(self, data->id, 0, 0);
99 if (stats == NULL) 103 if (hists == NULL)
100 return -ENOMEM; 104 goto out_free_syms;
101 he = __perf_session__add_hist_entry(&stats->hists, al, parent, 105 he = __hists__add_entry(hists, al, parent, data->period);
102 data->period, &hit);
103 if (he == NULL) 106 if (he == NULL)
104 return -ENOMEM; 107 goto out_free_syms;
105 108 err = 0;
106 if (hit)
107 he->count += data->period;
108
109 if (symbol_conf.use_callchain) { 109 if (symbol_conf.use_callchain) {
110 if (!hit) 110 err = append_chain(he->callchain, data->callchain, syms);
111 callchain_init(&he->callchain); 111 if (err)
112 append_chain(&he->callchain, data->callchain, syms); 112 goto out_free_syms;
113 free(syms);
114 } 113 }
115 114 /*
116 return 0; 115 * Only in the newt browser we are doing integrated annotation,
117} 116 * so we don't allocated the extra space needed because the stdio
118 117 * code will not use it.
119static int validate_chain(struct ip_callchain *chain, event_t *event) 118 */
120{ 119 if (use_browser)
121 unsigned int chain_size; 120 err = hist_entry__inc_addr_samples(he, al->addr);
122 121out_free_syms:
123 chain_size = event->header.size; 122 free(syms);
124 chain_size -= (unsigned long)&event->ip.__more_data - (unsigned long)event; 123 return err;
125
126 if (chain->nr*sizeof(u64) > chain_size)
127 return -1;
128
129 return 0;
130} 124}
131 125
132static int add_event_total(struct perf_session *session, 126static int add_event_total(struct perf_session *session,
133 struct sample_data *data, 127 struct sample_data *data,
134 struct perf_event_attr *attr) 128 struct perf_event_attr *attr)
135{ 129{
136 struct event_stat_id *stats; 130 struct hists *hists;
137 131
138 if (attr) 132 if (attr)
139 stats = get_stats(session, data->id, attr->type, attr->config); 133 hists = perf_session__hists_findnew(session, data->id,
134 attr->type, attr->config);
140 else 135 else
141 stats = get_stats(session, data->id, 0, 0); 136 hists = perf_session__hists_findnew(session, data->id, 0, 0);
142 137
143 if (!stats) 138 if (!hists)
144 return -ENOMEM; 139 return -ENOMEM;
145 140
146 stats->stats.total += data->period; 141 hists->stats.total_period += data->period;
147 session->events_stats.total += data->period; 142 /*
143 * FIXME: add_event_total should be moved from here to
144 * perf_session__process_event so that the proper hist is passed to
145 * the event_op methods.
146 */
147 hists__inc_nr_events(hists, PERF_RECORD_SAMPLE);
148 session->hists.stats.total_period += data->period;
148 return 0; 149 return 0;
149} 150}
150 151
@@ -164,7 +165,7 @@ static int process_sample_event(event_t *event, struct perf_session *session)
164 165
165 dump_printf("... chain: nr:%Lu\n", data.callchain->nr); 166 dump_printf("... chain: nr:%Lu\n", data.callchain->nr);
166 167
167 if (validate_chain(data.callchain, event) < 0) { 168 if (!ip_callchain__valid(data.callchain, event)) {
168 pr_debug("call-chain problem with event, " 169 pr_debug("call-chain problem with event, "
169 "skipping it.\n"); 170 "skipping it.\n");
170 return 0; 171 return 0;
@@ -187,14 +188,14 @@ static int process_sample_event(event_t *event, struct perf_session *session)
187 return 0; 188 return 0;
188 189
189 if (perf_session__add_hist_entry(session, &al, &data)) { 190 if (perf_session__add_hist_entry(session, &al, &data)) {
190 pr_debug("problem incrementing symbol count, skipping event\n"); 191 pr_debug("problem incrementing symbol period, skipping event\n");
191 return -1; 192 return -1;
192 } 193 }
193 194
194 attr = perf_header__find_attr(data.id, &session->header); 195 attr = perf_header__find_attr(data.id, &session->header);
195 196
196 if (add_event_total(session, &data, attr)) { 197 if (add_event_total(session, &data, attr)) {
197 pr_debug("problem adding event count\n"); 198 pr_debug("problem adding event period\n");
198 return -1; 199 return -1;
199 } 200 }
200 201
@@ -260,15 +261,43 @@ static struct perf_event_ops event_ops = {
260 .fork = event__process_task, 261 .fork = event__process_task,
261 .lost = event__process_lost, 262 .lost = event__process_lost,
262 .read = process_read_event, 263 .read = process_read_event,
264 .attr = event__process_attr,
265 .event_type = event__process_event_type,
266 .tracing_data = event__process_tracing_data,
267 .build_id = event__process_build_id,
263}; 268};
264 269
270extern volatile int session_done;
271
272static void sig_handler(int sig __used)
273{
274 session_done = 1;
275}
276
277static size_t hists__fprintf_nr_sample_events(struct hists *self,
278 const char *evname, FILE *fp)
279{
280 size_t ret;
281 char unit;
282 unsigned long nr_events = self->stats.nr_events[PERF_RECORD_SAMPLE];
283
284 nr_events = convert_unit(nr_events, &unit);
285 ret = fprintf(fp, "# Events: %lu%c", nr_events, unit);
286 if (evname != NULL)
287 ret += fprintf(fp, " %s", evname);
288 return ret + fprintf(fp, "\n#\n");
289}
290
265static int __cmd_report(void) 291static int __cmd_report(void)
266{ 292{
267 int ret = -EINVAL; 293 int ret = -EINVAL;
268 struct perf_session *session; 294 struct perf_session *session;
269 struct rb_node *next; 295 struct rb_node *next;
296 const char *help = "For a higher level overview, try: perf report --sort comm,dso";
297
298 signal(SIGINT, sig_handler);
270 299
271 session = perf_session__new(input_name, O_RDONLY, force); 300 session = perf_session__new(input_name, O_RDONLY, force, false);
272 if (session == NULL) 301 if (session == NULL)
273 return -ENOMEM; 302 return -ENOMEM;
274 303
@@ -284,7 +313,7 @@ static int __cmd_report(void)
284 goto out_delete; 313 goto out_delete;
285 314
286 if (dump_trace) { 315 if (dump_trace) {
287 event__print_totals(); 316 perf_session__fprintf_nr_events(session, stdout);
288 goto out_delete; 317 goto out_delete;
289 } 318 }
290 319
@@ -292,39 +321,42 @@ static int __cmd_report(void)
292 perf_session__fprintf(session, stdout); 321 perf_session__fprintf(session, stdout);
293 322
294 if (verbose > 2) 323 if (verbose > 2)
295 dsos__fprintf(stdout); 324 perf_session__fprintf_dsos(session, stdout);
296 325
297 next = rb_first(&session->stats_by_id); 326 next = rb_first(&session->hists_tree);
298 while (next) { 327 while (next) {
299 struct event_stat_id *stats; 328 struct hists *hists;
300 329
301 stats = rb_entry(next, struct event_stat_id, rb_node); 330 hists = rb_entry(next, struct hists, rb_node);
302 perf_session__collapse_resort(&stats->hists); 331 hists__collapse_resort(hists);
303 perf_session__output_resort(&stats->hists, stats->stats.total); 332 hists__output_resort(hists);
304 if (rb_first(&session->stats_by_id) == 333 if (use_browser)
305 rb_last(&session->stats_by_id)) 334 hists__browse(hists, help, input_name);
306 fprintf(stdout, "# Samples: %Ld\n#\n", 335 else {
307 stats->stats.total); 336 const char *evname = NULL;
308 else 337 if (rb_first(&session->hists.entries) !=
309 fprintf(stdout, "# Samples: %Ld %s\n#\n", 338 rb_last(&session->hists.entries))
310 stats->stats.total, 339 evname = __event_name(hists->type, hists->config);
311 __event_name(stats->type, stats->config)); 340
312 341 hists__fprintf_nr_sample_events(hists, evname, stdout);
313 perf_session__fprintf_hists(&stats->hists, NULL, false, stdout, 342
314 stats->stats.total); 343 hists__fprintf(hists, NULL, false, stdout);
315 fprintf(stdout, "\n\n"); 344 fprintf(stdout, "\n\n");
316 next = rb_next(&stats->rb_node); 345 }
346
347 next = rb_next(&hists->rb_node);
317 } 348 }
318 349
319 if (sort_order == default_sort_order && 350 if (!use_browser && sort_order == default_sort_order &&
320 parent_pattern == default_parent_pattern) 351 parent_pattern == default_parent_pattern) {
321 fprintf(stdout, "#\n# (For a higher level overview, try: perf report --sort comm,dso)\n#\n"); 352 fprintf(stdout, "#\n# (%s)\n#\n", help);
322 353
323 if (show_threads) { 354 if (show_threads) {
324 bool raw_printing_style = !strcmp(pretty_printing_style, "raw"); 355 bool style = !strcmp(pretty_printing_style, "raw");
325 perf_read_values_display(stdout, &show_threads_values, 356 perf_read_values_display(stdout, &show_threads_values,
326 raw_printing_style); 357 style);
327 perf_read_values_destroy(&show_threads_values); 358 perf_read_values_destroy(&show_threads_values);
359 }
328 } 360 }
329out_delete: 361out_delete:
330 perf_session__delete(session); 362 perf_session__delete(session);
@@ -335,7 +367,7 @@ static int
335parse_callchain_opt(const struct option *opt __used, const char *arg, 367parse_callchain_opt(const struct option *opt __used, const char *arg,
336 int unset) 368 int unset)
337{ 369{
338 char *tok; 370 char *tok, *tok2;
339 char *endptr; 371 char *endptr;
340 372
341 /* 373 /*
@@ -380,10 +412,13 @@ parse_callchain_opt(const struct option *opt __used, const char *arg,
380 if (!tok) 412 if (!tok)
381 goto setup; 413 goto setup;
382 414
415 tok2 = strtok(NULL, ",");
383 callchain_param.min_percent = strtod(tok, &endptr); 416 callchain_param.min_percent = strtod(tok, &endptr);
384 if (tok == endptr) 417 if (tok == endptr)
385 return -1; 418 return -1;
386 419
420 if (tok2)
421 callchain_param.print_limit = strtod(tok2, &endptr);
387setup: 422setup:
388 if (register_callchain_param(&callchain_param) < 0) { 423 if (register_callchain_param(&callchain_param) < 0) {
389 fprintf(stderr, "Can't register callchain params\n"); 424 fprintf(stderr, "Can't register callchain params\n");
@@ -400,7 +435,7 @@ static const char * const report_usage[] = {
400static const struct option options[] = { 435static const struct option options[] = {
401 OPT_STRING('i', "input", &input_name, "file", 436 OPT_STRING('i', "input", &input_name, "file",
402 "input file name"), 437 "input file name"),
403 OPT_BOOLEAN('v', "verbose", &verbose, 438 OPT_INCR('v', "verbose", &verbose,
404 "be more verbose (show symbol address, etc)"), 439 "be more verbose (show symbol address, etc)"),
405 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace, 440 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
406 "dump raw trace in ASCII"), 441 "dump raw trace in ASCII"),
@@ -419,12 +454,14 @@ static const struct option options[] = {
419 "sort by key(s): pid, comm, dso, symbol, parent"), 454 "sort by key(s): pid, comm, dso, symbol, parent"),
420 OPT_BOOLEAN('P', "full-paths", &symbol_conf.full_paths, 455 OPT_BOOLEAN('P', "full-paths", &symbol_conf.full_paths,
421 "Don't shorten the pathnames taking into account the cwd"), 456 "Don't shorten the pathnames taking into account the cwd"),
457 OPT_BOOLEAN(0, "showcpuutilization", &symbol_conf.show_cpu_utilization,
458 "Show sample percentage for different cpu modes"),
422 OPT_STRING('p', "parent", &parent_pattern, "regex", 459 OPT_STRING('p', "parent", &parent_pattern, "regex",
423 "regex filter to identify parent, see: '--sort parent'"), 460 "regex filter to identify parent, see: '--sort parent'"),
424 OPT_BOOLEAN('x', "exclude-other", &symbol_conf.exclude_other, 461 OPT_BOOLEAN('x', "exclude-other", &symbol_conf.exclude_other,
425 "Only display entries with parent-match"), 462 "Only display entries with parent-match"),
426 OPT_CALLBACK_DEFAULT('g', "call-graph", NULL, "output_type,min_percent", 463 OPT_CALLBACK_DEFAULT('g', "call-graph", NULL, "output_type,min_percent",
427 "Display callchains using output_type and min percent threshold. " 464 "Display callchains using output_type (graph, flat, fractal, or none) and min percent threshold. "
428 "Default: fractal,0.5", &parse_callchain_opt, callchain_default_opt), 465 "Default: fractal,0.5", &parse_callchain_opt, callchain_default_opt),
429 OPT_STRING('d', "dsos", &symbol_conf.dso_list_str, "dso[,dso...]", 466 OPT_STRING('d', "dsos", &symbol_conf.dso_list_str, "dso[,dso...]",
430 "only consider symbols in these dsos"), 467 "only consider symbols in these dsos"),
@@ -447,7 +484,15 @@ int cmd_report(int argc, const char **argv, const char *prefix __used)
447{ 484{
448 argc = parse_options(argc, argv, options, report_usage, 0); 485 argc = parse_options(argc, argv, options, report_usage, 0);
449 486
450 setup_pager(); 487 if (strcmp(input_name, "-") != 0)
488 setup_browser();
489 /*
490 * Only in the newt browser we are doing integrated annotation,
491 * so don't allocate extra space that won't be used in the stdio
492 * implementation.
493 */
494 if (use_browser)
495 symbol_conf.priv_size = sizeof(struct sym_priv);
451 496
452 if (symbol__init() < 0) 497 if (symbol__init() < 0)
453 return -1; 498 return -1;
@@ -455,7 +500,8 @@ int cmd_report(int argc, const char **argv, const char *prefix __used)
455 setup_sorting(report_usage, options); 500 setup_sorting(report_usage, options);
456 501
457 if (parent_pattern != default_parent_pattern) { 502 if (parent_pattern != default_parent_pattern) {
458 sort_dimension__add("parent"); 503 if (sort_dimension__add("parent") < 0)
504 return -1;
459 sort_parent.elide = 1; 505 sort_parent.elide = 1;
460 } else 506 } else
461 symbol_conf.exclude_other = false; 507 symbol_conf.exclude_other = false;
diff --git a/tools/perf/builtin-sched.c b/tools/perf/builtin-sched.c
index 4f5a03e43444..f67bce2a83b4 100644
--- a/tools/perf/builtin-sched.c
+++ b/tools/perf/builtin-sched.c
@@ -22,7 +22,7 @@
22static char const *input_name = "perf.data"; 22static char const *input_name = "perf.data";
23 23
24static char default_sort_order[] = "avg, max, switch, runtime"; 24static char default_sort_order[] = "avg, max, switch, runtime";
25static char *sort_order = default_sort_order; 25static const char *sort_order = default_sort_order;
26 26
27static int profile_cpu = -1; 27static int profile_cpu = -1;
28 28
@@ -68,10 +68,10 @@ enum sched_event_type {
68 68
69struct sched_atom { 69struct sched_atom {
70 enum sched_event_type type; 70 enum sched_event_type type;
71 int specific_wait;
71 u64 timestamp; 72 u64 timestamp;
72 u64 duration; 73 u64 duration;
73 unsigned long nr; 74 unsigned long nr;
74 int specific_wait;
75 sem_t *wait_sem; 75 sem_t *wait_sem;
76 struct task_desc *wakee; 76 struct task_desc *wakee;
77}; 77};
@@ -105,7 +105,7 @@ static u64 sum_runtime;
105static u64 sum_fluct; 105static u64 sum_fluct;
106static u64 run_avg; 106static u64 run_avg;
107 107
108static unsigned long replay_repeat = 10; 108static unsigned int replay_repeat = 10;
109static unsigned long nr_timestamps; 109static unsigned long nr_timestamps;
110static unsigned long nr_unordered_timestamps; 110static unsigned long nr_unordered_timestamps;
111static unsigned long nr_state_machine_bugs; 111static unsigned long nr_state_machine_bugs;
@@ -1641,30 +1641,26 @@ static int process_sample_event(event_t *event, struct perf_session *session)
1641 return 0; 1641 return 0;
1642} 1642}
1643 1643
1644static int process_lost_event(event_t *event __used,
1645 struct perf_session *session __used)
1646{
1647 nr_lost_chunks++;
1648 nr_lost_events += event->lost.lost;
1649
1650 return 0;
1651}
1652
1653static struct perf_event_ops event_ops = { 1644static struct perf_event_ops event_ops = {
1654 .sample = process_sample_event, 1645 .sample = process_sample_event,
1655 .comm = event__process_comm, 1646 .comm = event__process_comm,
1656 .lost = process_lost_event, 1647 .lost = event__process_lost,
1648 .ordered_samples = true,
1657}; 1649};
1658 1650
1659static int read_events(void) 1651static int read_events(void)
1660{ 1652{
1661 int err = -EINVAL; 1653 int err = -EINVAL;
1662 struct perf_session *session = perf_session__new(input_name, O_RDONLY, 0); 1654 struct perf_session *session = perf_session__new(input_name, O_RDONLY, 0, false);
1663 if (session == NULL) 1655 if (session == NULL)
1664 return -ENOMEM; 1656 return -ENOMEM;
1665 1657
1666 if (perf_session__has_traces(session, "record -R")) 1658 if (perf_session__has_traces(session, "record -R")) {
1667 err = perf_session__process_events(session, &event_ops); 1659 err = perf_session__process_events(session, &event_ops);
1660 nr_events = session->hists.stats.nr_events[0];
1661 nr_lost_events = session->hists.stats.total_lost;
1662 nr_lost_chunks = session->hists.stats.nr_events[PERF_RECORD_LOST];
1663 }
1668 1664
1669 perf_session__delete(session); 1665 perf_session__delete(session);
1670 return err; 1666 return err;
@@ -1790,7 +1786,7 @@ static const char * const sched_usage[] = {
1790static const struct option sched_options[] = { 1786static const struct option sched_options[] = {
1791 OPT_STRING('i', "input", &input_name, "file", 1787 OPT_STRING('i', "input", &input_name, "file",
1792 "input file name"), 1788 "input file name"),
1793 OPT_BOOLEAN('v', "verbose", &verbose, 1789 OPT_INCR('v', "verbose", &verbose,
1794 "be more verbose (show symbol address, etc)"), 1790 "be more verbose (show symbol address, etc)"),
1795 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace, 1791 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
1796 "dump raw trace in ASCII"), 1792 "dump raw trace in ASCII"),
@@ -1805,7 +1801,7 @@ static const char * const latency_usage[] = {
1805static const struct option latency_options[] = { 1801static const struct option latency_options[] = {
1806 OPT_STRING('s', "sort", &sort_order, "key[,key2...]", 1802 OPT_STRING('s', "sort", &sort_order, "key[,key2...]",
1807 "sort by key(s): runtime, switch, avg, max"), 1803 "sort by key(s): runtime, switch, avg, max"),
1808 OPT_BOOLEAN('v', "verbose", &verbose, 1804 OPT_INCR('v', "verbose", &verbose,
1809 "be more verbose (show symbol address, etc)"), 1805 "be more verbose (show symbol address, etc)"),
1810 OPT_INTEGER('C', "CPU", &profile_cpu, 1806 OPT_INTEGER('C', "CPU", &profile_cpu,
1811 "CPU to profile on"), 1807 "CPU to profile on"),
@@ -1820,9 +1816,9 @@ static const char * const replay_usage[] = {
1820}; 1816};
1821 1817
1822static const struct option replay_options[] = { 1818static const struct option replay_options[] = {
1823 OPT_INTEGER('r', "repeat", &replay_repeat, 1819 OPT_UINTEGER('r', "repeat", &replay_repeat,
1824 "repeat the workload replay N times (-1: infinite)"), 1820 "repeat the workload replay N times (-1: infinite)"),
1825 OPT_BOOLEAN('v', "verbose", &verbose, 1821 OPT_INCR('v', "verbose", &verbose,
1826 "be more verbose (show symbol address, etc)"), 1822 "be more verbose (show symbol address, etc)"),
1827 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace, 1823 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
1828 "dump raw trace in ASCII"), 1824 "dump raw trace in ASCII"),
@@ -1850,7 +1846,6 @@ static const char *record_args[] = {
1850 "record", 1846 "record",
1851 "-a", 1847 "-a",
1852 "-R", 1848 "-R",
1853 "-M",
1854 "-f", 1849 "-f",
1855 "-m", "1024", 1850 "-m", "1024",
1856 "-c", "1", 1851 "-c", "1",
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index 95db31cff6fd..ff8c413b7e73 100644
--- a/tools/perf/builtin-stat.c
+++ b/tools/perf/builtin-stat.c
@@ -46,6 +46,7 @@
46#include "util/debug.h" 46#include "util/debug.h"
47#include "util/header.h" 47#include "util/header.h"
48#include "util/cpumap.h" 48#include "util/cpumap.h"
49#include "util/thread.h"
49 50
50#include <sys/prctl.h> 51#include <sys/prctl.h>
51#include <math.h> 52#include <math.h>
@@ -66,18 +67,21 @@ static struct perf_event_attr default_attrs[] = {
66 67
67}; 68};
68 69
69static int system_wide = 0; 70static bool system_wide = false;
70static unsigned int nr_cpus = 0; 71static unsigned int nr_cpus = 0;
71static int run_idx = 0; 72static int run_idx = 0;
72 73
73static int run_count = 1; 74static int run_count = 1;
74static int inherit = 1; 75static bool no_inherit = false;
75static int scale = 1; 76static bool scale = true;
76static pid_t target_pid = -1; 77static pid_t target_pid = -1;
78static pid_t target_tid = -1;
79static pid_t *all_tids = NULL;
80static int thread_num = 0;
77static pid_t child_pid = -1; 81static pid_t child_pid = -1;
78static int null_run = 0; 82static bool null_run = false;
79 83
80static int fd[MAX_NR_CPUS][MAX_COUNTERS]; 84static int *fd[MAX_NR_CPUS][MAX_COUNTERS];
81 85
82static int event_scaled[MAX_COUNTERS]; 86static int event_scaled[MAX_COUNTERS];
83 87
@@ -140,9 +144,11 @@ struct stats runtime_branches_stats;
140#define ERR_PERF_OPEN \ 144#define ERR_PERF_OPEN \
141"Error: counter %d, sys_perf_event_open() syscall returned with %d (%s)\n" 145"Error: counter %d, sys_perf_event_open() syscall returned with %d (%s)\n"
142 146
143static void create_perf_stat_counter(int counter, int pid) 147static int create_perf_stat_counter(int counter)
144{ 148{
145 struct perf_event_attr *attr = attrs + counter; 149 struct perf_event_attr *attr = attrs + counter;
150 int thread;
151 int ncreated = 0;
146 152
147 if (scale) 153 if (scale)
148 attr->read_format = PERF_FORMAT_TOTAL_TIME_ENABLED | 154 attr->read_format = PERF_FORMAT_TOTAL_TIME_ENABLED |
@@ -152,21 +158,33 @@ static void create_perf_stat_counter(int counter, int pid)
152 unsigned int cpu; 158 unsigned int cpu;
153 159
154 for (cpu = 0; cpu < nr_cpus; cpu++) { 160 for (cpu = 0; cpu < nr_cpus; cpu++) {
155 fd[cpu][counter] = sys_perf_event_open(attr, -1, cpumap[cpu], -1, 0); 161 fd[cpu][counter][0] = sys_perf_event_open(attr,
156 if (fd[cpu][counter] < 0 && verbose) 162 -1, cpumap[cpu], -1, 0);
157 fprintf(stderr, ERR_PERF_OPEN, counter, 163 if (fd[cpu][counter][0] < 0)
158 fd[cpu][counter], strerror(errno)); 164 pr_debug(ERR_PERF_OPEN, counter,
165 fd[cpu][counter][0], strerror(errno));
166 else
167 ++ncreated;
159 } 168 }
160 } else { 169 } else {
161 attr->inherit = inherit; 170 attr->inherit = !no_inherit;
162 attr->disabled = 1; 171 if (target_pid == -1 && target_tid == -1) {
163 attr->enable_on_exec = 1; 172 attr->disabled = 1;
164 173 attr->enable_on_exec = 1;
165 fd[0][counter] = sys_perf_event_open(attr, pid, -1, -1, 0); 174 }
166 if (fd[0][counter] < 0 && verbose) 175 for (thread = 0; thread < thread_num; thread++) {
167 fprintf(stderr, ERR_PERF_OPEN, counter, 176 fd[0][counter][thread] = sys_perf_event_open(attr,
168 fd[0][counter], strerror(errno)); 177 all_tids[thread], -1, -1, 0);
178 if (fd[0][counter][thread] < 0)
179 pr_debug(ERR_PERF_OPEN, counter,
180 fd[0][counter][thread],
181 strerror(errno));
182 else
183 ++ncreated;
184 }
169 } 185 }
186
187 return ncreated;
170} 188}
171 189
172/* 190/*
@@ -190,25 +208,28 @@ static void read_counter(int counter)
190 unsigned int cpu; 208 unsigned int cpu;
191 size_t res, nv; 209 size_t res, nv;
192 int scaled; 210 int scaled;
193 int i; 211 int i, thread;
194 212
195 count[0] = count[1] = count[2] = 0; 213 count[0] = count[1] = count[2] = 0;
196 214
197 nv = scale ? 3 : 1; 215 nv = scale ? 3 : 1;
198 for (cpu = 0; cpu < nr_cpus; cpu++) { 216 for (cpu = 0; cpu < nr_cpus; cpu++) {
199 if (fd[cpu][counter] < 0) 217 for (thread = 0; thread < thread_num; thread++) {
200 continue; 218 if (fd[cpu][counter][thread] < 0)
201 219 continue;
202 res = read(fd[cpu][counter], single_count, nv * sizeof(u64)); 220
203 assert(res == nv * sizeof(u64)); 221 res = read(fd[cpu][counter][thread],
204 222 single_count, nv * sizeof(u64));
205 close(fd[cpu][counter]); 223 assert(res == nv * sizeof(u64));
206 fd[cpu][counter] = -1; 224
207 225 close(fd[cpu][counter][thread]);
208 count[0] += single_count[0]; 226 fd[cpu][counter][thread] = -1;
209 if (scale) { 227
210 count[1] += single_count[1]; 228 count[0] += single_count[0];
211 count[2] += single_count[2]; 229 if (scale) {
230 count[1] += single_count[1];
231 count[2] += single_count[2];
232 }
212 } 233 }
213 } 234 }
214 235
@@ -250,10 +271,9 @@ static int run_perf_stat(int argc __used, const char **argv)
250{ 271{
251 unsigned long long t0, t1; 272 unsigned long long t0, t1;
252 int status = 0; 273 int status = 0;
253 int counter; 274 int counter, ncreated = 0;
254 int pid = target_pid;
255 int child_ready_pipe[2], go_pipe[2]; 275 int child_ready_pipe[2], go_pipe[2];
256 const bool forks = (target_pid == -1 && argc > 0); 276 const bool forks = (argc > 0);
257 char buf; 277 char buf;
258 278
259 if (!system_wide) 279 if (!system_wide)
@@ -265,10 +285,10 @@ static int run_perf_stat(int argc __used, const char **argv)
265 } 285 }
266 286
267 if (forks) { 287 if (forks) {
268 if ((pid = fork()) < 0) 288 if ((child_pid = fork()) < 0)
269 perror("failed to fork"); 289 perror("failed to fork");
270 290
271 if (!pid) { 291 if (!child_pid) {
272 close(child_ready_pipe[0]); 292 close(child_ready_pipe[0]);
273 close(go_pipe[1]); 293 close(go_pipe[1]);
274 fcntl(go_pipe[0], F_SETFD, FD_CLOEXEC); 294 fcntl(go_pipe[0], F_SETFD, FD_CLOEXEC);
@@ -297,7 +317,8 @@ static int run_perf_stat(int argc __used, const char **argv)
297 exit(-1); 317 exit(-1);
298 } 318 }
299 319
300 child_pid = pid; 320 if (target_tid == -1 && target_pid == -1 && !system_wide)
321 all_tids[0] = child_pid;
301 322
302 /* 323 /*
303 * Wait for the child to be ready to exec. 324 * Wait for the child to be ready to exec.
@@ -310,7 +331,16 @@ static int run_perf_stat(int argc __used, const char **argv)
310 } 331 }
311 332
312 for (counter = 0; counter < nr_counters; counter++) 333 for (counter = 0; counter < nr_counters; counter++)
313 create_perf_stat_counter(counter, pid); 334 ncreated += create_perf_stat_counter(counter);
335
336 if (ncreated == 0) {
337 pr_err("No permission to collect %sstats.\n"
338 "Consider tweaking /proc/sys/kernel/perf_event_paranoid.\n",
339 system_wide ? "system-wide " : "");
340 if (child_pid != -1)
341 kill(child_pid, SIGTERM);
342 return -1;
343 }
314 344
315 /* 345 /*
316 * Enable counters and exec the command: 346 * Enable counters and exec the command:
@@ -321,7 +351,7 @@ static int run_perf_stat(int argc __used, const char **argv)
321 close(go_pipe[1]); 351 close(go_pipe[1]);
322 wait(&status); 352 wait(&status);
323 } else { 353 } else {
324 while(!done); 354 while(!done) sleep(1);
325 } 355 }
326 356
327 t1 = rdclock(); 357 t1 = rdclock();
@@ -429,12 +459,14 @@ static void print_stat(int argc, const char **argv)
429 459
430 fprintf(stderr, "\n"); 460 fprintf(stderr, "\n");
431 fprintf(stderr, " Performance counter stats for "); 461 fprintf(stderr, " Performance counter stats for ");
432 if(target_pid == -1) { 462 if(target_pid == -1 && target_tid == -1) {
433 fprintf(stderr, "\'%s", argv[0]); 463 fprintf(stderr, "\'%s", argv[0]);
434 for (i = 1; i < argc; i++) 464 for (i = 1; i < argc; i++)
435 fprintf(stderr, " %s", argv[i]); 465 fprintf(stderr, " %s", argv[i]);
436 }else 466 } else if (target_pid != -1)
437 fprintf(stderr, "task pid \'%d", target_pid); 467 fprintf(stderr, "process id \'%d", target_pid);
468 else
469 fprintf(stderr, "thread id \'%d", target_tid);
438 470
439 fprintf(stderr, "\'"); 471 fprintf(stderr, "\'");
440 if (run_count > 1) 472 if (run_count > 1)
@@ -459,7 +491,7 @@ static volatile int signr = -1;
459 491
460static void skip_signal(int signo) 492static void skip_signal(int signo)
461{ 493{
462 if(target_pid != -1) 494 if(child_pid == -1)
463 done = 1; 495 done = 1;
464 496
465 signr = signo; 497 signr = signo;
@@ -486,15 +518,17 @@ static const struct option options[] = {
486 OPT_CALLBACK('e', "event", NULL, "event", 518 OPT_CALLBACK('e', "event", NULL, "event",
487 "event selector. use 'perf list' to list available events", 519 "event selector. use 'perf list' to list available events",
488 parse_events), 520 parse_events),
489 OPT_BOOLEAN('i', "inherit", &inherit, 521 OPT_BOOLEAN('i', "no-inherit", &no_inherit,
490 "child tasks inherit counters"), 522 "child tasks do not inherit counters"),
491 OPT_INTEGER('p', "pid", &target_pid, 523 OPT_INTEGER('p', "pid", &target_pid,
492 "stat events on existing pid"), 524 "stat events on existing process id"),
525 OPT_INTEGER('t', "tid", &target_tid,
526 "stat events on existing thread id"),
493 OPT_BOOLEAN('a', "all-cpus", &system_wide, 527 OPT_BOOLEAN('a', "all-cpus", &system_wide,
494 "system-wide collection from all CPUs"), 528 "system-wide collection from all CPUs"),
495 OPT_BOOLEAN('c', "scale", &scale, 529 OPT_BOOLEAN('c', "scale", &scale,
496 "scale/normalize counters"), 530 "scale/normalize counters"),
497 OPT_BOOLEAN('v', "verbose", &verbose, 531 OPT_INCR('v', "verbose", &verbose,
498 "be more verbose (show counter open errors, etc)"), 532 "be more verbose (show counter open errors, etc)"),
499 OPT_INTEGER('r', "repeat", &run_count, 533 OPT_INTEGER('r', "repeat", &run_count,
500 "repeat command and print average + stddev (max: 100)"), 534 "repeat command and print average + stddev (max: 100)"),
@@ -506,10 +540,11 @@ static const struct option options[] = {
506int cmd_stat(int argc, const char **argv, const char *prefix __used) 540int cmd_stat(int argc, const char **argv, const char *prefix __used)
507{ 541{
508 int status; 542 int status;
543 int i,j;
509 544
510 argc = parse_options(argc, argv, options, stat_usage, 545 argc = parse_options(argc, argv, options, stat_usage,
511 PARSE_OPT_STOP_AT_NON_OPTION); 546 PARSE_OPT_STOP_AT_NON_OPTION);
512 if (!argc && target_pid == -1) 547 if (!argc && target_pid == -1 && target_tid == -1)
513 usage_with_options(stat_usage, options); 548 usage_with_options(stat_usage, options);
514 if (run_count <= 0) 549 if (run_count <= 0)
515 usage_with_options(stat_usage, options); 550 usage_with_options(stat_usage, options);
@@ -525,6 +560,31 @@ int cmd_stat(int argc, const char **argv, const char *prefix __used)
525 else 560 else
526 nr_cpus = 1; 561 nr_cpus = 1;
527 562
563 if (target_pid != -1) {
564 target_tid = target_pid;
565 thread_num = find_all_tid(target_pid, &all_tids);
566 if (thread_num <= 0) {
567 fprintf(stderr, "Can't find all threads of pid %d\n",
568 target_pid);
569 usage_with_options(stat_usage, options);
570 }
571 } else {
572 all_tids=malloc(sizeof(pid_t));
573 if (!all_tids)
574 return -ENOMEM;
575
576 all_tids[0] = target_tid;
577 thread_num = 1;
578 }
579
580 for (i = 0; i < MAX_NR_CPUS; i++) {
581 for (j = 0; j < MAX_COUNTERS; j++) {
582 fd[i][j] = malloc(sizeof(int)*thread_num);
583 if (!fd[i][j])
584 return -ENOMEM;
585 }
586 }
587
528 /* 588 /*
529 * We dont want to block the signals - that would cause 589 * We dont want to block the signals - that would cause
530 * child tasks to inherit that and Ctrl-C would not work. 590 * child tasks to inherit that and Ctrl-C would not work.
@@ -543,7 +603,8 @@ int cmd_stat(int argc, const char **argv, const char *prefix __used)
543 status = run_perf_stat(argc, argv); 603 status = run_perf_stat(argc, argv);
544 } 604 }
545 605
546 print_stat(argc, argv); 606 if (status != -1)
607 print_stat(argc, argv);
547 608
548 return status; 609 return status;
549} 610}
diff --git a/tools/perf/builtin-test.c b/tools/perf/builtin-test.c
new file mode 100644
index 000000000000..035b9fa063a9
--- /dev/null
+++ b/tools/perf/builtin-test.c
@@ -0,0 +1,281 @@
1/*
2 * builtin-test.c
3 *
4 * Builtin regression testing command: ever growing number of sanity tests
5 */
6#include "builtin.h"
7
8#include "util/cache.h"
9#include "util/debug.h"
10#include "util/parse-options.h"
11#include "util/session.h"
12#include "util/symbol.h"
13#include "util/thread.h"
14
15static long page_size;
16
17static int vmlinux_matches_kallsyms_filter(struct map *map __used, struct symbol *sym)
18{
19 bool *visited = symbol__priv(sym);
20 *visited = true;
21 return 0;
22}
23
24static int test__vmlinux_matches_kallsyms(void)
25{
26 int err = -1;
27 struct rb_node *nd;
28 struct symbol *sym;
29 struct map *kallsyms_map, *vmlinux_map;
30 struct machine kallsyms, vmlinux;
31 enum map_type type = MAP__FUNCTION;
32 struct ref_reloc_sym ref_reloc_sym = { .name = "_stext", };
33
34 /*
35 * Step 1:
36 *
37 * Init the machines that will hold kernel, modules obtained from
38 * both vmlinux + .ko files and from /proc/kallsyms split by modules.
39 */
40 machine__init(&kallsyms, "", HOST_KERNEL_ID);
41 machine__init(&vmlinux, "", HOST_KERNEL_ID);
42
43 /*
44 * Step 2:
45 *
46 * Create the kernel maps for kallsyms and the DSO where we will then
47 * load /proc/kallsyms. Also create the modules maps from /proc/modules
48 * and find the .ko files that match them in /lib/modules/`uname -r`/.
49 */
50 if (machine__create_kernel_maps(&kallsyms) < 0) {
51 pr_debug("machine__create_kernel_maps ");
52 return -1;
53 }
54
55 /*
56 * Step 3:
57 *
58 * Load and split /proc/kallsyms into multiple maps, one per module.
59 */
60 if (machine__load_kallsyms(&kallsyms, "/proc/kallsyms", type, NULL) <= 0) {
61 pr_debug("dso__load_kallsyms ");
62 goto out;
63 }
64
65 /*
66 * Step 4:
67 *
68 * kallsyms will be internally on demand sorted by name so that we can
69 * find the reference relocation * symbol, i.e. the symbol we will use
70 * to see if the running kernel was relocated by checking if it has the
71 * same value in the vmlinux file we load.
72 */
73 kallsyms_map = machine__kernel_map(&kallsyms, type);
74
75 sym = map__find_symbol_by_name(kallsyms_map, ref_reloc_sym.name, NULL);
76 if (sym == NULL) {
77 pr_debug("dso__find_symbol_by_name ");
78 goto out;
79 }
80
81 ref_reloc_sym.addr = sym->start;
82
83 /*
84 * Step 5:
85 *
86 * Now repeat step 2, this time for the vmlinux file we'll auto-locate.
87 */
88 if (machine__create_kernel_maps(&vmlinux) < 0) {
89 pr_debug("machine__create_kernel_maps ");
90 goto out;
91 }
92
93 vmlinux_map = machine__kernel_map(&vmlinux, type);
94 map__kmap(vmlinux_map)->ref_reloc_sym = &ref_reloc_sym;
95
96 /*
97 * Step 6:
98 *
99 * Locate a vmlinux file in the vmlinux path that has a buildid that
100 * matches the one of the running kernel.
101 *
102 * While doing that look if we find the ref reloc symbol, if we find it
103 * we'll have its ref_reloc_symbol.unrelocated_addr and then
104 * maps__reloc_vmlinux will notice and set proper ->[un]map_ip routines
105 * to fixup the symbols.
106 */
107 if (machine__load_vmlinux_path(&vmlinux, type,
108 vmlinux_matches_kallsyms_filter) <= 0) {
109 pr_debug("machine__load_vmlinux_path ");
110 goto out;
111 }
112
113 err = 0;
114 /*
115 * Step 7:
116 *
117 * Now look at the symbols in the vmlinux DSO and check if we find all of them
118 * in the kallsyms dso. For the ones that are in both, check its names and
119 * end addresses too.
120 */
121 for (nd = rb_first(&vmlinux_map->dso->symbols[type]); nd; nd = rb_next(nd)) {
122 struct symbol *pair;
123
124 sym = rb_entry(nd, struct symbol, rb_node);
125 pair = machine__find_kernel_symbol(&kallsyms, type, sym->start, NULL, NULL);
126
127 if (pair && pair->start == sym->start) {
128next_pair:
129 if (strcmp(sym->name, pair->name) == 0) {
130 /*
131 * kallsyms don't have the symbol end, so we
132 * set that by using the next symbol start - 1,
133 * in some cases we get this up to a page
134 * wrong, trace_kmalloc when I was developing
135 * this code was one such example, 2106 bytes
136 * off the real size. More than that and we
137 * _really_ have a problem.
138 */
139 s64 skew = sym->end - pair->end;
140 if (llabs(skew) < page_size)
141 continue;
142
143 pr_debug("%#Lx: diff end addr for %s v: %#Lx k: %#Lx\n",
144 sym->start, sym->name, sym->end, pair->end);
145 } else {
146 struct rb_node *nnd = rb_prev(&pair->rb_node);
147
148 if (nnd) {
149 struct symbol *next = rb_entry(nnd, struct symbol, rb_node);
150
151 if (next->start == sym->start) {
152 pair = next;
153 goto next_pair;
154 }
155 }
156 pr_debug("%#Lx: diff name v: %s k: %s\n",
157 sym->start, sym->name, pair->name);
158 }
159 } else
160 pr_debug("%#Lx: %s not on kallsyms\n", sym->start, sym->name);
161
162 err = -1;
163 }
164
165 if (!verbose)
166 goto out;
167
168 pr_info("Maps only in vmlinux:\n");
169
170 for (nd = rb_first(&vmlinux.kmaps.maps[type]); nd; nd = rb_next(nd)) {
171 struct map *pos = rb_entry(nd, struct map, rb_node), *pair;
172 /*
173 * If it is the kernel, kallsyms is always "[kernel.kallsyms]", while
174 * the kernel will have the path for the vmlinux file being used,
175 * so use the short name, less descriptive but the same ("[kernel]" in
176 * both cases.
177 */
178 pair = map_groups__find_by_name(&kallsyms.kmaps, type,
179 (pos->dso->kernel ?
180 pos->dso->short_name :
181 pos->dso->name));
182 if (pair)
183 pair->priv = 1;
184 else
185 map__fprintf(pos, stderr);
186 }
187
188 pr_info("Maps in vmlinux with a different name in kallsyms:\n");
189
190 for (nd = rb_first(&vmlinux.kmaps.maps[type]); nd; nd = rb_next(nd)) {
191 struct map *pos = rb_entry(nd, struct map, rb_node), *pair;
192
193 pair = map_groups__find(&kallsyms.kmaps, type, pos->start);
194 if (pair == NULL || pair->priv)
195 continue;
196
197 if (pair->start == pos->start) {
198 pair->priv = 1;
199 pr_info(" %Lx-%Lx %Lx %s in kallsyms as",
200 pos->start, pos->end, pos->pgoff, pos->dso->name);
201 if (pos->pgoff != pair->pgoff || pos->end != pair->end)
202 pr_info(": \n*%Lx-%Lx %Lx",
203 pair->start, pair->end, pair->pgoff);
204 pr_info(" %s\n", pair->dso->name);
205 pair->priv = 1;
206 }
207 }
208
209 pr_info("Maps only in kallsyms:\n");
210
211 for (nd = rb_first(&kallsyms.kmaps.maps[type]);
212 nd; nd = rb_next(nd)) {
213 struct map *pos = rb_entry(nd, struct map, rb_node);
214
215 if (!pos->priv)
216 map__fprintf(pos, stderr);
217 }
218out:
219 return err;
220}
221
222static struct test {
223 const char *desc;
224 int (*func)(void);
225} tests[] = {
226 {
227 .desc = "vmlinux symtab matches kallsyms",
228 .func = test__vmlinux_matches_kallsyms,
229 },
230 {
231 .func = NULL,
232 },
233};
234
235static int __cmd_test(void)
236{
237 int i = 0;
238
239 page_size = sysconf(_SC_PAGE_SIZE);
240
241 while (tests[i].func) {
242 int err;
243 pr_info("%2d: %s:", i + 1, tests[i].desc);
244 pr_debug("\n--- start ---\n");
245 err = tests[i].func();
246 pr_debug("---- end ----\n%s:", tests[i].desc);
247 pr_info(" %s\n", err ? "FAILED!\n" : "Ok");
248 ++i;
249 }
250
251 return 0;
252}
253
254static const char * const test_usage[] = {
255 "perf test [<options>]",
256 NULL,
257};
258
259static const struct option test_options[] = {
260 OPT_INTEGER('v', "verbose", &verbose,
261 "be more verbose (show symbol address, etc)"),
262 OPT_END()
263};
264
265int cmd_test(int argc, const char **argv, const char *prefix __used)
266{
267 argc = parse_options(argc, argv, test_options, test_usage, 0);
268 if (argc)
269 usage_with_options(test_usage, test_options);
270
271 symbol_conf.priv_size = sizeof(int);
272 symbol_conf.sort_by_name = true;
273 symbol_conf.try_vmlinux_path = true;
274
275 if (symbol__init() < 0)
276 return -1;
277
278 setup_pager();
279
280 return __cmd_test();
281}
diff --git a/tools/perf/builtin-timechart.c b/tools/perf/builtin-timechart.c
index 0d4d8ff7914b..5a52ed9fc10b 100644
--- a/tools/perf/builtin-timechart.c
+++ b/tools/perf/builtin-timechart.c
@@ -21,7 +21,6 @@
21#include "util/cache.h" 21#include "util/cache.h"
22#include <linux/rbtree.h> 22#include <linux/rbtree.h>
23#include "util/symbol.h" 23#include "util/symbol.h"
24#include "util/string.h"
25#include "util/callchain.h" 24#include "util/callchain.h"
26#include "util/strlist.h" 25#include "util/strlist.h"
27 26
@@ -43,7 +42,7 @@ static u64 turbo_frequency;
43 42
44static u64 first_time, last_time; 43static u64 first_time, last_time;
45 44
46static int power_only; 45static bool power_only;
47 46
48 47
49struct per_pid; 48struct per_pid;
@@ -78,8 +77,6 @@ struct per_pid {
78 77
79 struct per_pidcomm *all; 78 struct per_pidcomm *all;
80 struct per_pidcomm *current; 79 struct per_pidcomm *current;
81
82 int painted;
83}; 80};
84 81
85 82
@@ -146,9 +143,6 @@ struct wake_event {
146static struct power_event *power_events; 143static struct power_event *power_events;
147static struct wake_event *wake_events; 144static struct wake_event *wake_events;
148 145
149struct sample_wrapper *all_samples;
150
151
152struct process_filter; 146struct process_filter;
153struct process_filter { 147struct process_filter {
154 char *name; 148 char *name;
@@ -569,88 +563,6 @@ static void end_sample_processing(void)
569 } 563 }
570} 564}
571 565
572static u64 sample_time(event_t *event, const struct perf_session *session)
573{
574 int cursor;
575
576 cursor = 0;
577 if (session->sample_type & PERF_SAMPLE_IP)
578 cursor++;
579 if (session->sample_type & PERF_SAMPLE_TID)
580 cursor++;
581 if (session->sample_type & PERF_SAMPLE_TIME)
582 return event->sample.array[cursor];
583 return 0;
584}
585
586
587/*
588 * We first queue all events, sorted backwards by insertion.
589 * The order will get flipped later.
590 */
591static int queue_sample_event(event_t *event, struct perf_session *session)
592{
593 struct sample_wrapper *copy, *prev;
594 int size;
595
596 size = event->sample.header.size + sizeof(struct sample_wrapper) + 8;
597
598 copy = malloc(size);
599 if (!copy)
600 return 1;
601
602 memset(copy, 0, size);
603
604 copy->next = NULL;
605 copy->timestamp = sample_time(event, session);
606
607 memcpy(&copy->data, event, event->sample.header.size);
608
609 /* insert in the right place in the list */
610
611 if (!all_samples) {
612 /* first sample ever */
613 all_samples = copy;
614 return 0;
615 }
616
617 if (all_samples->timestamp < copy->timestamp) {
618 /* insert at the head of the list */
619 copy->next = all_samples;
620 all_samples = copy;
621 return 0;
622 }
623
624 prev = all_samples;
625 while (prev->next) {
626 if (prev->next->timestamp < copy->timestamp) {
627 copy->next = prev->next;
628 prev->next = copy;
629 return 0;
630 }
631 prev = prev->next;
632 }
633 /* insert at the end of the list */
634 prev->next = copy;
635
636 return 0;
637}
638
639static void sort_queued_samples(void)
640{
641 struct sample_wrapper *cursor, *next;
642
643 cursor = all_samples;
644 all_samples = NULL;
645
646 while (cursor) {
647 next = cursor->next;
648 cursor->next = all_samples;
649 all_samples = cursor;
650 cursor = next;
651 }
652}
653
654/* 566/*
655 * Sort the pid datastructure 567 * Sort the pid datastructure
656 */ 568 */
@@ -1014,31 +926,17 @@ static void write_svg_file(const char *filename)
1014 svg_close(); 926 svg_close();
1015} 927}
1016 928
1017static void process_samples(struct perf_session *session)
1018{
1019 struct sample_wrapper *cursor;
1020 event_t *event;
1021
1022 sort_queued_samples();
1023
1024 cursor = all_samples;
1025 while (cursor) {
1026 event = (void *)&cursor->data;
1027 cursor = cursor->next;
1028 process_sample_event(event, session);
1029 }
1030}
1031
1032static struct perf_event_ops event_ops = { 929static struct perf_event_ops event_ops = {
1033 .comm = process_comm_event, 930 .comm = process_comm_event,
1034 .fork = process_fork_event, 931 .fork = process_fork_event,
1035 .exit = process_exit_event, 932 .exit = process_exit_event,
1036 .sample = queue_sample_event, 933 .sample = process_sample_event,
934 .ordered_samples = true,
1037}; 935};
1038 936
1039static int __cmd_timechart(void) 937static int __cmd_timechart(void)
1040{ 938{
1041 struct perf_session *session = perf_session__new(input_name, O_RDONLY, 0); 939 struct perf_session *session = perf_session__new(input_name, O_RDONLY, 0, false);
1042 int ret = -EINVAL; 940 int ret = -EINVAL;
1043 941
1044 if (session == NULL) 942 if (session == NULL)
@@ -1051,8 +949,6 @@ static int __cmd_timechart(void)
1051 if (ret) 949 if (ret)
1052 goto out_delete; 950 goto out_delete;
1053 951
1054 process_samples(session);
1055
1056 end_sample_processing(); 952 end_sample_processing();
1057 953
1058 sort_pids(); 954 sort_pids();
@@ -1075,7 +971,6 @@ static const char *record_args[] = {
1075 "record", 971 "record",
1076 "-a", 972 "-a",
1077 "-R", 973 "-R",
1078 "-M",
1079 "-f", 974 "-f",
1080 "-c", "1", 975 "-c", "1",
1081 "-e", "power:power_start", 976 "-e", "power:power_start",
diff --git a/tools/perf/builtin-top.c b/tools/perf/builtin-top.c
index 1f529321607e..397290a0a76e 100644
--- a/tools/perf/builtin-top.c
+++ b/tools/perf/builtin-top.c
@@ -55,9 +55,9 @@
55#include <linux/unistd.h> 55#include <linux/unistd.h>
56#include <linux/types.h> 56#include <linux/types.h>
57 57
58static int fd[MAX_NR_CPUS][MAX_COUNTERS]; 58static int *fd[MAX_NR_CPUS][MAX_COUNTERS];
59 59
60static int system_wide = 0; 60static bool system_wide = false;
61 61
62static int default_interval = 0; 62static int default_interval = 0;
63 63
@@ -65,18 +65,21 @@ static int count_filter = 5;
65static int print_entries; 65static int print_entries;
66 66
67static int target_pid = -1; 67static int target_pid = -1;
68static int inherit = 0; 68static int target_tid = -1;
69static pid_t *all_tids = NULL;
70static int thread_num = 0;
71static bool inherit = false;
69static int profile_cpu = -1; 72static int profile_cpu = -1;
70static int nr_cpus = 0; 73static int nr_cpus = 0;
71static unsigned int realtime_prio = 0; 74static int realtime_prio = 0;
72static int group = 0; 75static bool group = false;
73static unsigned int page_size; 76static unsigned int page_size;
74static unsigned int mmap_pages = 16; 77static unsigned int mmap_pages = 16;
75static int freq = 1000; /* 1 KHz */ 78static int freq = 1000; /* 1 KHz */
76 79
77static int delay_secs = 2; 80static int delay_secs = 2;
78static int zero = 0; 81static bool zero = false;
79static int dump_symtab = 0; 82static bool dump_symtab = false;
80 83
81static bool hide_kernel_symbols = false; 84static bool hide_kernel_symbols = false;
82static bool hide_user_symbols = false; 85static bool hide_user_symbols = false;
@@ -93,7 +96,7 @@ struct source_line {
93 struct source_line *next; 96 struct source_line *next;
94}; 97};
95 98
96static char *sym_filter = NULL; 99static const char *sym_filter = NULL;
97struct sym_entry *sym_filter_entry = NULL; 100struct sym_entry *sym_filter_entry = NULL;
98struct sym_entry *sym_filter_entry_sched = NULL; 101struct sym_entry *sym_filter_entry_sched = NULL;
99static int sym_pcnt_filter = 5; 102static int sym_pcnt_filter = 5;
@@ -133,7 +136,7 @@ static inline struct symbol *sym_entry__symbol(struct sym_entry *self)
133 return ((void *)self) + symbol_conf.priv_size; 136 return ((void *)self) + symbol_conf.priv_size;
134} 137}
135 138
136static void get_term_dimensions(struct winsize *ws) 139void get_term_dimensions(struct winsize *ws)
137{ 140{
138 char *s = getenv("LINES"); 141 char *s = getenv("LINES");
139 142
@@ -169,7 +172,7 @@ static void sig_winch_handler(int sig __used)
169 update_print_entries(&winsize); 172 update_print_entries(&winsize);
170} 173}
171 174
172static void parse_source(struct sym_entry *syme) 175static int parse_source(struct sym_entry *syme)
173{ 176{
174 struct symbol *sym; 177 struct symbol *sym;
175 struct sym_entry_source *source; 178 struct sym_entry_source *source;
@@ -180,12 +183,21 @@ static void parse_source(struct sym_entry *syme)
180 u64 len; 183 u64 len;
181 184
182 if (!syme) 185 if (!syme)
183 return; 186 return -1;
187
188 sym = sym_entry__symbol(syme);
189 map = syme->map;
190
191 /*
192 * We can't annotate with just /proc/kallsyms
193 */
194 if (map->dso->origin == DSO__ORIG_KERNEL)
195 return -1;
184 196
185 if (syme->src == NULL) { 197 if (syme->src == NULL) {
186 syme->src = zalloc(sizeof(*source)); 198 syme->src = zalloc(sizeof(*source));
187 if (syme->src == NULL) 199 if (syme->src == NULL)
188 return; 200 return -1;
189 pthread_mutex_init(&syme->src->lock, NULL); 201 pthread_mutex_init(&syme->src->lock, NULL);
190 } 202 }
191 203
@@ -195,9 +207,6 @@ static void parse_source(struct sym_entry *syme)
195 pthread_mutex_lock(&source->lock); 207 pthread_mutex_lock(&source->lock);
196 goto out_assign; 208 goto out_assign;
197 } 209 }
198
199 sym = sym_entry__symbol(syme);
200 map = syme->map;
201 path = map->dso->long_name; 210 path = map->dso->long_name;
202 211
203 len = sym->end - sym->start; 212 len = sym->end - sym->start;
@@ -209,7 +218,7 @@ static void parse_source(struct sym_entry *syme)
209 218
210 file = popen(command, "r"); 219 file = popen(command, "r");
211 if (!file) 220 if (!file)
212 return; 221 return -1;
213 222
214 pthread_mutex_lock(&source->lock); 223 pthread_mutex_lock(&source->lock);
215 source->lines_tail = &source->lines; 224 source->lines_tail = &source->lines;
@@ -245,6 +254,7 @@ static void parse_source(struct sym_entry *syme)
245out_assign: 254out_assign:
246 sym_filter_entry = syme; 255 sym_filter_entry = syme;
247 pthread_mutex_unlock(&source->lock); 256 pthread_mutex_unlock(&source->lock);
257 return 0;
248} 258}
249 259
250static void __zero_source_counters(struct sym_entry *syme) 260static void __zero_source_counters(struct sym_entry *syme)
@@ -410,7 +420,9 @@ static double sym_weight(const struct sym_entry *sym)
410} 420}
411 421
412static long samples; 422static long samples;
413static long userspace_samples; 423static long kernel_samples, us_samples;
424static long exact_samples;
425static long guest_us_samples, guest_kernel_samples;
414static const char CONSOLE_CLEAR[] = ""; 426static const char CONSOLE_CLEAR[] = "";
415 427
416static void __list_insert_active_sym(struct sym_entry *syme) 428static void __list_insert_active_sym(struct sym_entry *syme)
@@ -450,7 +462,11 @@ static void print_sym_table(void)
450 int printed = 0, j; 462 int printed = 0, j;
451 int counter, snap = !display_weighted ? sym_counter : 0; 463 int counter, snap = !display_weighted ? sym_counter : 0;
452 float samples_per_sec = samples/delay_secs; 464 float samples_per_sec = samples/delay_secs;
453 float ksamples_per_sec = (samples-userspace_samples)/delay_secs; 465 float ksamples_per_sec = kernel_samples/delay_secs;
466 float us_samples_per_sec = (us_samples)/delay_secs;
467 float guest_kernel_samples_per_sec = (guest_kernel_samples)/delay_secs;
468 float guest_us_samples_per_sec = (guest_us_samples)/delay_secs;
469 float esamples_percent = (100.0*exact_samples)/samples;
454 float sum_ksamples = 0.0; 470 float sum_ksamples = 0.0;
455 struct sym_entry *syme, *n; 471 struct sym_entry *syme, *n;
456 struct rb_root tmp = RB_ROOT; 472 struct rb_root tmp = RB_ROOT;
@@ -458,7 +474,8 @@ static void print_sym_table(void)
458 int sym_width = 0, dso_width = 0, dso_short_width = 0; 474 int sym_width = 0, dso_width = 0, dso_short_width = 0;
459 const int win_width = winsize.ws_col - 1; 475 const int win_width = winsize.ws_col - 1;
460 476
461 samples = userspace_samples = 0; 477 samples = us_samples = kernel_samples = exact_samples = 0;
478 guest_kernel_samples = guest_us_samples = 0;
462 479
463 /* Sort the active symbols */ 480 /* Sort the active symbols */
464 pthread_mutex_lock(&active_symbols_lock); 481 pthread_mutex_lock(&active_symbols_lock);
@@ -489,9 +506,30 @@ static void print_sym_table(void)
489 puts(CONSOLE_CLEAR); 506 puts(CONSOLE_CLEAR);
490 507
491 printf("%-*.*s\n", win_width, win_width, graph_dotted_line); 508 printf("%-*.*s\n", win_width, win_width, graph_dotted_line);
492 printf( " PerfTop:%8.0f irqs/sec kernel:%4.1f%% [", 509 if (!perf_guest) {
493 samples_per_sec, 510 printf(" PerfTop:%8.0f irqs/sec kernel:%4.1f%%"
494 100.0 - (100.0*((samples_per_sec-ksamples_per_sec)/samples_per_sec))); 511 " exact: %4.1f%% [",
512 samples_per_sec,
513 100.0 - (100.0 * ((samples_per_sec - ksamples_per_sec) /
514 samples_per_sec)),
515 esamples_percent);
516 } else {
517 printf(" PerfTop:%8.0f irqs/sec kernel:%4.1f%% us:%4.1f%%"
518 " guest kernel:%4.1f%% guest us:%4.1f%%"
519 " exact: %4.1f%% [",
520 samples_per_sec,
521 100.0 - (100.0 * ((samples_per_sec-ksamples_per_sec) /
522 samples_per_sec)),
523 100.0 - (100.0 * ((samples_per_sec-us_samples_per_sec) /
524 samples_per_sec)),
525 100.0 - (100.0 * ((samples_per_sec -
526 guest_kernel_samples_per_sec) /
527 samples_per_sec)),
528 100.0 - (100.0 * ((samples_per_sec -
529 guest_us_samples_per_sec) /
530 samples_per_sec)),
531 esamples_percent);
532 }
495 533
496 if (nr_counters == 1 || !display_weighted) { 534 if (nr_counters == 1 || !display_weighted) {
497 printf("%Ld", (u64)attrs[0].sample_period); 535 printf("%Ld", (u64)attrs[0].sample_period);
@@ -514,13 +552,15 @@ static void print_sym_table(void)
514 552
515 if (target_pid != -1) 553 if (target_pid != -1)
516 printf(" (target_pid: %d", target_pid); 554 printf(" (target_pid: %d", target_pid);
555 else if (target_tid != -1)
556 printf(" (target_tid: %d", target_tid);
517 else 557 else
518 printf(" (all"); 558 printf(" (all");
519 559
520 if (profile_cpu != -1) 560 if (profile_cpu != -1)
521 printf(", cpu: %d)\n", profile_cpu); 561 printf(", cpu: %d)\n", profile_cpu);
522 else { 562 else {
523 if (target_pid != -1) 563 if (target_tid != -1)
524 printf(")\n"); 564 printf(")\n");
525 else 565 else
526 printf(", %d CPUs)\n", nr_cpus); 566 printf(", %d CPUs)\n", nr_cpus);
@@ -582,7 +622,6 @@ static void print_sym_table(void)
582 622
583 syme = rb_entry(nd, struct sym_entry, rb_node); 623 syme = rb_entry(nd, struct sym_entry, rb_node);
584 sym = sym_entry__symbol(syme); 624 sym = sym_entry__symbol(syme);
585
586 if (++printed > print_entries || (int)syme->snap_count < count_filter) 625 if (++printed > print_entries || (int)syme->snap_count < count_filter)
587 continue; 626 continue;
588 627
@@ -746,7 +785,7 @@ static int key_mapped(int c)
746 return 0; 785 return 0;
747} 786}
748 787
749static void handle_keypress(int c) 788static void handle_keypress(struct perf_session *session, int c)
750{ 789{
751 if (!key_mapped(c)) { 790 if (!key_mapped(c)) {
752 struct pollfd stdin_poll = { .fd = 0, .events = POLLIN }; 791 struct pollfd stdin_poll = { .fd = 0, .events = POLLIN };
@@ -815,7 +854,7 @@ static void handle_keypress(int c)
815 case 'Q': 854 case 'Q':
816 printf("exiting.\n"); 855 printf("exiting.\n");
817 if (dump_symtab) 856 if (dump_symtab)
818 dsos__fprintf(stderr); 857 perf_session__fprintf_dsos(session, stderr);
819 exit(0); 858 exit(0);
820 case 's': 859 case 's':
821 prompt_symbol(&sym_filter_entry, "Enter details symbol"); 860 prompt_symbol(&sym_filter_entry, "Enter details symbol");
@@ -839,7 +878,7 @@ static void handle_keypress(int c)
839 display_weighted = ~display_weighted; 878 display_weighted = ~display_weighted;
840 break; 879 break;
841 case 'z': 880 case 'z':
842 zero = ~zero; 881 zero = !zero;
843 break; 882 break;
844 default: 883 default:
845 break; 884 break;
@@ -851,6 +890,7 @@ static void *display_thread(void *arg __used)
851 struct pollfd stdin_poll = { .fd = 0, .events = POLLIN }; 890 struct pollfd stdin_poll = { .fd = 0, .events = POLLIN };
852 struct termios tc, save; 891 struct termios tc, save;
853 int delay_msecs, c; 892 int delay_msecs, c;
893 struct perf_session *session = (struct perf_session *) arg;
854 894
855 tcgetattr(0, &save); 895 tcgetattr(0, &save);
856 tc = save; 896 tc = save;
@@ -871,7 +911,7 @@ repeat:
871 c = getc(stdin); 911 c = getc(stdin);
872 tcsetattr(0, TCSAFLUSH, &save); 912 tcsetattr(0, TCSAFLUSH, &save);
873 913
874 handle_keypress(c); 914 handle_keypress(session, c);
875 goto repeat; 915 goto repeat;
876 916
877 return NULL; 917 return NULL;
@@ -942,24 +982,48 @@ static void event__process_sample(const event_t *self,
942 u64 ip = self->ip.ip; 982 u64 ip = self->ip.ip;
943 struct sym_entry *syme; 983 struct sym_entry *syme;
944 struct addr_location al; 984 struct addr_location al;
985 struct machine *machine;
945 u8 origin = self->header.misc & PERF_RECORD_MISC_CPUMODE_MASK; 986 u8 origin = self->header.misc & PERF_RECORD_MISC_CPUMODE_MASK;
946 987
947 ++samples; 988 ++samples;
948 989
949 switch (origin) { 990 switch (origin) {
950 case PERF_RECORD_MISC_USER: 991 case PERF_RECORD_MISC_USER:
951 ++userspace_samples; 992 ++us_samples;
952 if (hide_user_symbols) 993 if (hide_user_symbols)
953 return; 994 return;
995 machine = perf_session__find_host_machine(session);
954 break; 996 break;
955 case PERF_RECORD_MISC_KERNEL: 997 case PERF_RECORD_MISC_KERNEL:
998 ++kernel_samples;
956 if (hide_kernel_symbols) 999 if (hide_kernel_symbols)
957 return; 1000 return;
1001 machine = perf_session__find_host_machine(session);
1002 break;
1003 case PERF_RECORD_MISC_GUEST_KERNEL:
1004 ++guest_kernel_samples;
1005 machine = perf_session__find_machine(session, self->ip.pid);
958 break; 1006 break;
1007 case PERF_RECORD_MISC_GUEST_USER:
1008 ++guest_us_samples;
1009 /*
1010 * TODO: we don't process guest user from host side
1011 * except simple counting.
1012 */
1013 return;
959 default: 1014 default:
960 return; 1015 return;
961 } 1016 }
962 1017
1018 if (!machine && perf_guest) {
1019 pr_err("Can't find guest [%d]'s kernel information\n",
1020 self->ip.pid);
1021 return;
1022 }
1023
1024 if (self->header.misc & PERF_RECORD_MISC_EXACT_IP)
1025 exact_samples++;
1026
963 if (event__preprocess_sample(self, session, &al, symbol_filter) < 0 || 1027 if (event__preprocess_sample(self, session, &al, symbol_filter) < 0 ||
964 al.filtered) 1028 al.filtered)
965 return; 1029 return;
@@ -976,7 +1040,7 @@ static void event__process_sample(const event_t *self,
976 * --hide-kernel-symbols, even if the user specifies an 1040 * --hide-kernel-symbols, even if the user specifies an
977 * invalid --vmlinux ;-) 1041 * invalid --vmlinux ;-)
978 */ 1042 */
979 if (al.map == session->vmlinux_maps[MAP__FUNCTION] && 1043 if (al.map == machine->vmlinux_maps[MAP__FUNCTION] &&
980 RB_EMPTY_ROOT(&al.map->dso->symbols[MAP__FUNCTION])) { 1044 RB_EMPTY_ROOT(&al.map->dso->symbols[MAP__FUNCTION])) {
981 pr_err("The %s file can't be used\n", 1045 pr_err("The %s file can't be used\n",
982 symbol_conf.vmlinux_name); 1046 symbol_conf.vmlinux_name);
@@ -990,7 +1054,17 @@ static void event__process_sample(const event_t *self,
990 if (sym_filter_entry_sched) { 1054 if (sym_filter_entry_sched) {
991 sym_filter_entry = sym_filter_entry_sched; 1055 sym_filter_entry = sym_filter_entry_sched;
992 sym_filter_entry_sched = NULL; 1056 sym_filter_entry_sched = NULL;
993 parse_source(sym_filter_entry); 1057 if (parse_source(sym_filter_entry) < 0) {
1058 struct symbol *sym = sym_entry__symbol(sym_filter_entry);
1059
1060 pr_err("Can't annotate %s", sym->name);
1061 if (sym_filter_entry->map->dso->origin == DSO__ORIG_KERNEL) {
1062 pr_err(": No vmlinux file was found in the path:\n");
1063 vmlinux_path__fprintf(stderr);
1064 } else
1065 pr_err(".\n");
1066 exit(1);
1067 }
994 } 1068 }
995 1069
996 syme = symbol__priv(al.sym); 1070 syme = symbol__priv(al.sym);
@@ -1106,16 +1180,21 @@ static void perf_session__mmap_read_counter(struct perf_session *self,
1106 md->prev = old; 1180 md->prev = old;
1107} 1181}
1108 1182
1109static struct pollfd event_array[MAX_NR_CPUS * MAX_COUNTERS]; 1183static struct pollfd *event_array;
1110static struct mmap_data mmap_array[MAX_NR_CPUS][MAX_COUNTERS]; 1184static struct mmap_data *mmap_array[MAX_NR_CPUS][MAX_COUNTERS];
1111 1185
1112static void perf_session__mmap_read(struct perf_session *self) 1186static void perf_session__mmap_read(struct perf_session *self)
1113{ 1187{
1114 int i, counter; 1188 int i, counter, thread_index;
1115 1189
1116 for (i = 0; i < nr_cpus; i++) { 1190 for (i = 0; i < nr_cpus; i++) {
1117 for (counter = 0; counter < nr_counters; counter++) 1191 for (counter = 0; counter < nr_counters; counter++)
1118 perf_session__mmap_read_counter(self, &mmap_array[i][counter]); 1192 for (thread_index = 0;
1193 thread_index < thread_num;
1194 thread_index++) {
1195 perf_session__mmap_read_counter(self,
1196 &mmap_array[i][counter][thread_index]);
1197 }
1119 } 1198 }
1120} 1199}
1121 1200
@@ -1126,9 +1205,10 @@ static void start_counter(int i, int counter)
1126{ 1205{
1127 struct perf_event_attr *attr; 1206 struct perf_event_attr *attr;
1128 int cpu; 1207 int cpu;
1208 int thread_index;
1129 1209
1130 cpu = profile_cpu; 1210 cpu = profile_cpu;
1131 if (target_pid == -1 && profile_cpu == -1) 1211 if (target_tid == -1 && profile_cpu == -1)
1132 cpu = cpumap[i]; 1212 cpu = cpumap[i];
1133 1213
1134 attr = attrs + counter; 1214 attr = attrs + counter;
@@ -1144,55 +1224,58 @@ static void start_counter(int i, int counter)
1144 attr->inherit = (cpu < 0) && inherit; 1224 attr->inherit = (cpu < 0) && inherit;
1145 attr->mmap = 1; 1225 attr->mmap = 1;
1146 1226
1227 for (thread_index = 0; thread_index < thread_num; thread_index++) {
1147try_again: 1228try_again:
1148 fd[i][counter] = sys_perf_event_open(attr, target_pid, cpu, group_fd, 0); 1229 fd[i][counter][thread_index] = sys_perf_event_open(attr,
1149 1230 all_tids[thread_index], cpu, group_fd, 0);
1150 if (fd[i][counter] < 0) { 1231
1151 int err = errno; 1232 if (fd[i][counter][thread_index] < 0) {
1233 int err = errno;
1234
1235 if (err == EPERM || err == EACCES)
1236 die("No permission - are you root?\n");
1237 /*
1238 * If it's cycles then fall back to hrtimer
1239 * based cpu-clock-tick sw counter, which
1240 * is always available even if no PMU support:
1241 */
1242 if (attr->type == PERF_TYPE_HARDWARE
1243 && attr->config == PERF_COUNT_HW_CPU_CYCLES) {
1244
1245 if (verbose)
1246 warning(" ... trying to fall back to cpu-clock-ticks\n");
1247
1248 attr->type = PERF_TYPE_SOFTWARE;
1249 attr->config = PERF_COUNT_SW_CPU_CLOCK;
1250 goto try_again;
1251 }
1252 printf("\n");
1253 error("perfcounter syscall returned with %d (%s)\n",
1254 fd[i][counter][thread_index], strerror(err));
1255 die("No CONFIG_PERF_EVENTS=y kernel support configured?\n");
1256 exit(-1);
1257 }
1258 assert(fd[i][counter][thread_index] >= 0);
1259 fcntl(fd[i][counter][thread_index], F_SETFL, O_NONBLOCK);
1152 1260
1153 if (err == EPERM || err == EACCES)
1154 die("No permission - are you root?\n");
1155 /* 1261 /*
1156 * If it's cycles then fall back to hrtimer 1262 * First counter acts as the group leader:
1157 * based cpu-clock-tick sw counter, which
1158 * is always available even if no PMU support:
1159 */ 1263 */
1160 if (attr->type == PERF_TYPE_HARDWARE 1264 if (group && group_fd == -1)
1161 && attr->config == PERF_COUNT_HW_CPU_CYCLES) { 1265 group_fd = fd[i][counter][thread_index];
1162 1266
1163 if (verbose) 1267 event_array[nr_poll].fd = fd[i][counter][thread_index];
1164 warning(" ... trying to fall back to cpu-clock-ticks\n"); 1268 event_array[nr_poll].events = POLLIN;
1165 1269 nr_poll++;
1166 attr->type = PERF_TYPE_SOFTWARE; 1270
1167 attr->config = PERF_COUNT_SW_CPU_CLOCK; 1271 mmap_array[i][counter][thread_index].counter = counter;
1168 goto try_again; 1272 mmap_array[i][counter][thread_index].prev = 0;
1169 } 1273 mmap_array[i][counter][thread_index].mask = mmap_pages*page_size - 1;
1170 printf("\n"); 1274 mmap_array[i][counter][thread_index].base = mmap(NULL, (mmap_pages+1)*page_size,
1171 error("perfcounter syscall returned with %d (%s)\n", 1275 PROT_READ, MAP_SHARED, fd[i][counter][thread_index], 0);
1172 fd[i][counter], strerror(err)); 1276 if (mmap_array[i][counter][thread_index].base == MAP_FAILED)
1173 die("No CONFIG_PERF_EVENTS=y kernel support configured?\n"); 1277 die("failed to mmap with %d (%s)\n", errno, strerror(errno));
1174 exit(-1);
1175 } 1278 }
1176 assert(fd[i][counter] >= 0);
1177 fcntl(fd[i][counter], F_SETFL, O_NONBLOCK);
1178
1179 /*
1180 * First counter acts as the group leader:
1181 */
1182 if (group && group_fd == -1)
1183 group_fd = fd[i][counter];
1184
1185 event_array[nr_poll].fd = fd[i][counter];
1186 event_array[nr_poll].events = POLLIN;
1187 nr_poll++;
1188
1189 mmap_array[i][counter].counter = counter;
1190 mmap_array[i][counter].prev = 0;
1191 mmap_array[i][counter].mask = mmap_pages*page_size - 1;
1192 mmap_array[i][counter].base = mmap(NULL, (mmap_pages+1)*page_size,
1193 PROT_READ, MAP_SHARED, fd[i][counter], 0);
1194 if (mmap_array[i][counter].base == MAP_FAILED)
1195 die("failed to mmap with %d (%s)\n", errno, strerror(errno));
1196} 1279}
1197 1280
1198static int __cmd_top(void) 1281static int __cmd_top(void)
@@ -1204,12 +1287,12 @@ static int __cmd_top(void)
1204 * FIXME: perf_session__new should allow passing a O_MMAP, so that all this 1287 * FIXME: perf_session__new should allow passing a O_MMAP, so that all this
1205 * mmap reading, etc is encapsulated in it. Use O_WRONLY for now. 1288 * mmap reading, etc is encapsulated in it. Use O_WRONLY for now.
1206 */ 1289 */
1207 struct perf_session *session = perf_session__new(NULL, O_WRONLY, false); 1290 struct perf_session *session = perf_session__new(NULL, O_WRONLY, false, false);
1208 if (session == NULL) 1291 if (session == NULL)
1209 return -ENOMEM; 1292 return -ENOMEM;
1210 1293
1211 if (target_pid != -1) 1294 if (target_tid != -1)
1212 event__synthesize_thread(target_pid, event__process, session); 1295 event__synthesize_thread(target_tid, event__process, session);
1213 else 1296 else
1214 event__synthesize_threads(event__process, session); 1297 event__synthesize_threads(event__process, session);
1215 1298
@@ -1220,11 +1303,11 @@ static int __cmd_top(void)
1220 } 1303 }
1221 1304
1222 /* Wait for a minimal set of events before starting the snapshot */ 1305 /* Wait for a minimal set of events before starting the snapshot */
1223 poll(event_array, nr_poll, 100); 1306 poll(&event_array[0], nr_poll, 100);
1224 1307
1225 perf_session__mmap_read(session); 1308 perf_session__mmap_read(session);
1226 1309
1227 if (pthread_create(&thread, NULL, display_thread, NULL)) { 1310 if (pthread_create(&thread, NULL, display_thread, session)) {
1228 printf("Could not create display thread.\n"); 1311 printf("Could not create display thread.\n");
1229 exit(-1); 1312 exit(-1);
1230 } 1313 }
@@ -1263,7 +1346,9 @@ static const struct option options[] = {
1263 OPT_INTEGER('c', "count", &default_interval, 1346 OPT_INTEGER('c', "count", &default_interval,
1264 "event period to sample"), 1347 "event period to sample"),
1265 OPT_INTEGER('p', "pid", &target_pid, 1348 OPT_INTEGER('p', "pid", &target_pid,
1266 "profile events on existing pid"), 1349 "profile events on existing process id"),
1350 OPT_INTEGER('t', "tid", &target_tid,
1351 "profile events on existing thread id"),
1267 OPT_BOOLEAN('a', "all-cpus", &system_wide, 1352 OPT_BOOLEAN('a', "all-cpus", &system_wide,
1268 "system-wide collection from all CPUs"), 1353 "system-wide collection from all CPUs"),
1269 OPT_INTEGER('C', "CPU", &profile_cpu, 1354 OPT_INTEGER('C', "CPU", &profile_cpu,
@@ -1272,8 +1357,7 @@ static const struct option options[] = {
1272 "file", "vmlinux pathname"), 1357 "file", "vmlinux pathname"),
1273 OPT_BOOLEAN('K', "hide_kernel_symbols", &hide_kernel_symbols, 1358 OPT_BOOLEAN('K', "hide_kernel_symbols", &hide_kernel_symbols,
1274 "hide kernel symbols"), 1359 "hide kernel symbols"),
1275 OPT_INTEGER('m', "mmap-pages", &mmap_pages, 1360 OPT_UINTEGER('m', "mmap-pages", &mmap_pages, "number of mmap data pages"),
1276 "number of mmap data pages"),
1277 OPT_INTEGER('r', "realtime", &realtime_prio, 1361 OPT_INTEGER('r', "realtime", &realtime_prio,
1278 "collect data with this RT SCHED_FIFO priority"), 1362 "collect data with this RT SCHED_FIFO priority"),
1279 OPT_INTEGER('d', "delay", &delay_secs, 1363 OPT_INTEGER('d', "delay", &delay_secs,
@@ -1296,7 +1380,7 @@ static const struct option options[] = {
1296 "display this many functions"), 1380 "display this many functions"),
1297 OPT_BOOLEAN('U', "hide_user_symbols", &hide_user_symbols, 1381 OPT_BOOLEAN('U', "hide_user_symbols", &hide_user_symbols,
1298 "hide user symbols"), 1382 "hide user symbols"),
1299 OPT_BOOLEAN('v', "verbose", &verbose, 1383 OPT_INCR('v', "verbose", &verbose,
1300 "be more verbose (show counter open errors, etc)"), 1384 "be more verbose (show counter open errors, etc)"),
1301 OPT_END() 1385 OPT_END()
1302}; 1386};
@@ -1304,6 +1388,7 @@ static const struct option options[] = {
1304int cmd_top(int argc, const char **argv, const char *prefix __used) 1388int cmd_top(int argc, const char **argv, const char *prefix __used)
1305{ 1389{
1306 int counter; 1390 int counter;
1391 int i,j;
1307 1392
1308 page_size = sysconf(_SC_PAGE_SIZE); 1393 page_size = sysconf(_SC_PAGE_SIZE);
1309 1394
@@ -1311,8 +1396,39 @@ int cmd_top(int argc, const char **argv, const char *prefix __used)
1311 if (argc) 1396 if (argc)
1312 usage_with_options(top_usage, options); 1397 usage_with_options(top_usage, options);
1313 1398
1399 if (target_pid != -1) {
1400 target_tid = target_pid;
1401 thread_num = find_all_tid(target_pid, &all_tids);
1402 if (thread_num <= 0) {
1403 fprintf(stderr, "Can't find all threads of pid %d\n",
1404 target_pid);
1405 usage_with_options(top_usage, options);
1406 }
1407 } else {
1408 all_tids=malloc(sizeof(pid_t));
1409 if (!all_tids)
1410 return -ENOMEM;
1411
1412 all_tids[0] = target_tid;
1413 thread_num = 1;
1414 }
1415
1416 for (i = 0; i < MAX_NR_CPUS; i++) {
1417 for (j = 0; j < MAX_COUNTERS; j++) {
1418 fd[i][j] = malloc(sizeof(int)*thread_num);
1419 mmap_array[i][j] = zalloc(
1420 sizeof(struct mmap_data)*thread_num);
1421 if (!fd[i][j] || !mmap_array[i][j])
1422 return -ENOMEM;
1423 }
1424 }
1425 event_array = malloc(
1426 sizeof(struct pollfd)*MAX_NR_CPUS*MAX_COUNTERS*thread_num);
1427 if (!event_array)
1428 return -ENOMEM;
1429
1314 /* CPU and PID are mutually exclusive */ 1430 /* CPU and PID are mutually exclusive */
1315 if (target_pid != -1 && profile_cpu != -1) { 1431 if (target_tid > 0 && profile_cpu != -1) {
1316 printf("WARNING: PID switch overriding CPU\n"); 1432 printf("WARNING: PID switch overriding CPU\n");
1317 sleep(1); 1433 sleep(1);
1318 profile_cpu = -1; 1434 profile_cpu = -1;
@@ -1353,7 +1469,7 @@ int cmd_top(int argc, const char **argv, const char *prefix __used)
1353 attrs[counter].sample_period = default_interval; 1469 attrs[counter].sample_period = default_interval;
1354 } 1470 }
1355 1471
1356 if (target_pid != -1 || profile_cpu != -1) 1472 if (target_tid != -1 || profile_cpu != -1)
1357 nr_cpus = 1; 1473 nr_cpus = 1;
1358 else 1474 else
1359 nr_cpus = read_cpu_map(); 1475 nr_cpus = read_cpu_map();
diff --git a/tools/perf/builtin-trace.c b/tools/perf/builtin-trace.c
index 407041d20de0..dddf3f01b5ab 100644
--- a/tools/perf/builtin-trace.c
+++ b/tools/perf/builtin-trace.c
@@ -11,6 +11,8 @@
11 11
12static char const *script_name; 12static char const *script_name;
13static char const *generate_script_lang; 13static char const *generate_script_lang;
14static bool debug_ordering;
15static u64 last_timestamp;
14 16
15static int default_start_script(const char *script __unused, 17static int default_start_script(const char *script __unused,
16 int argc __unused, 18 int argc __unused,
@@ -51,6 +53,8 @@ static void setup_scripting(void)
51 53
52static int cleanup_scripting(void) 54static int cleanup_scripting(void)
53{ 55{
56 pr_debug("\nperf trace script stopped\n");
57
54 return scripting_ops->stop_script(); 58 return scripting_ops->stop_script();
55} 59}
56 60
@@ -87,6 +91,14 @@ static int process_sample_event(event_t *event, struct perf_session *session)
87 } 91 }
88 92
89 if (session->sample_type & PERF_SAMPLE_RAW) { 93 if (session->sample_type & PERF_SAMPLE_RAW) {
94 if (debug_ordering) {
95 if (data.time < last_timestamp) {
96 pr_err("Samples misordered, previous: %llu "
97 "this: %llu\n", last_timestamp,
98 data.time);
99 }
100 last_timestamp = data.time;
101 }
90 /* 102 /*
91 * FIXME: better resolve from pid from the struct trace_entry 103 * FIXME: better resolve from pid from the struct trace_entry
92 * field, although it should be the same than this perf 104 * field, although it should be the same than this perf
@@ -97,17 +109,31 @@ static int process_sample_event(event_t *event, struct perf_session *session)
97 data.time, thread->comm); 109 data.time, thread->comm);
98 } 110 }
99 111
100 session->events_stats.total += data.period; 112 session->hists.stats.total_period += data.period;
101 return 0; 113 return 0;
102} 114}
103 115
104static struct perf_event_ops event_ops = { 116static struct perf_event_ops event_ops = {
105 .sample = process_sample_event, 117 .sample = process_sample_event,
106 .comm = event__process_comm, 118 .comm = event__process_comm,
119 .attr = event__process_attr,
120 .event_type = event__process_event_type,
121 .tracing_data = event__process_tracing_data,
122 .build_id = event__process_build_id,
123 .ordered_samples = true,
107}; 124};
108 125
126extern volatile int session_done;
127
128static void sig_handler(int sig __unused)
129{
130 session_done = 1;
131}
132
109static int __cmd_trace(struct perf_session *session) 133static int __cmd_trace(struct perf_session *session)
110{ 134{
135 signal(SIGINT, sig_handler);
136
111 return perf_session__process_events(session, &event_ops); 137 return perf_session__process_events(session, &event_ops);
112} 138}
113 139
@@ -505,7 +531,7 @@ static const char * const trace_usage[] = {
505static const struct option options[] = { 531static const struct option options[] = {
506 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace, 532 OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
507 "dump raw trace in ASCII"), 533 "dump raw trace in ASCII"),
508 OPT_BOOLEAN('v', "verbose", &verbose, 534 OPT_INCR('v', "verbose", &verbose,
509 "be more verbose (show symbol address, etc)"), 535 "be more verbose (show symbol address, etc)"),
510 OPT_BOOLEAN('L', "Latency", &latency_format, 536 OPT_BOOLEAN('L', "Latency", &latency_format,
511 "show latency attributes (irqs/preemption disabled, etc)"), 537 "show latency attributes (irqs/preemption disabled, etc)"),
@@ -518,6 +544,8 @@ static const struct option options[] = {
518 "generate perf-trace.xx script in specified language"), 544 "generate perf-trace.xx script in specified language"),
519 OPT_STRING('i', "input", &input_name, "file", 545 OPT_STRING('i', "input", &input_name, "file",
520 "input file name"), 546 "input file name"),
547 OPT_BOOLEAN('d', "debug-ordering", &debug_ordering,
548 "check that samples time ordering is monotonic"),
521 549
522 OPT_END() 550 OPT_END()
523}; 551};
@@ -548,6 +576,65 @@ int cmd_trace(int argc, const char **argv, const char *prefix __used)
548 suffix = REPORT_SUFFIX; 576 suffix = REPORT_SUFFIX;
549 } 577 }
550 578
579 if (!suffix && argc >= 2 && strncmp(argv[1], "-", strlen("-")) != 0) {
580 char *record_script_path, *report_script_path;
581 int live_pipe[2];
582 pid_t pid;
583
584 record_script_path = get_script_path(argv[1], RECORD_SUFFIX);
585 if (!record_script_path) {
586 fprintf(stderr, "record script not found\n");
587 return -1;
588 }
589
590 report_script_path = get_script_path(argv[1], REPORT_SUFFIX);
591 if (!report_script_path) {
592 fprintf(stderr, "report script not found\n");
593 return -1;
594 }
595
596 if (pipe(live_pipe) < 0) {
597 perror("failed to create pipe");
598 exit(-1);
599 }
600
601 pid = fork();
602 if (pid < 0) {
603 perror("failed to fork");
604 exit(-1);
605 }
606
607 if (!pid) {
608 dup2(live_pipe[1], 1);
609 close(live_pipe[0]);
610
611 __argv = malloc(5 * sizeof(const char *));
612 __argv[0] = "/bin/sh";
613 __argv[1] = record_script_path;
614 __argv[2] = "-o";
615 __argv[3] = "-";
616 __argv[4] = NULL;
617
618 execvp("/bin/sh", (char **)__argv);
619 exit(-1);
620 }
621
622 dup2(live_pipe[0], 0);
623 close(live_pipe[1]);
624
625 __argv = malloc((argc + 3) * sizeof(const char *));
626 __argv[0] = "/bin/sh";
627 __argv[1] = report_script_path;
628 for (i = 2; i < argc; i++)
629 __argv[i] = argv[i];
630 __argv[i++] = "-i";
631 __argv[i++] = "-";
632 __argv[i++] = NULL;
633
634 execvp("/bin/sh", (char **)__argv);
635 exit(-1);
636 }
637
551 if (suffix) { 638 if (suffix) {
552 script_path = get_script_path(argv[2], suffix); 639 script_path = get_script_path(argv[2], suffix);
553 if (!script_path) { 640 if (!script_path) {
@@ -576,11 +663,12 @@ int cmd_trace(int argc, const char **argv, const char *prefix __used)
576 if (!script_name) 663 if (!script_name)
577 setup_pager(); 664 setup_pager();
578 665
579 session = perf_session__new(input_name, O_RDONLY, 0); 666 session = perf_session__new(input_name, O_RDONLY, 0, false);
580 if (session == NULL) 667 if (session == NULL)
581 return -ENOMEM; 668 return -ENOMEM;
582 669
583 if (!perf_session__has_traces(session, "record -R")) 670 if (strcmp(input_name, "-") &&
671 !perf_session__has_traces(session, "record -R"))
584 return -EINVAL; 672 return -EINVAL;
585 673
586 if (generate_script_lang) { 674 if (generate_script_lang) {
@@ -617,6 +705,7 @@ int cmd_trace(int argc, const char **argv, const char *prefix __used)
617 err = scripting_ops->start_script(script_name, argc, argv); 705 err = scripting_ops->start_script(script_name, argc, argv);
618 if (err) 706 if (err)
619 goto out; 707 goto out;
708 pr_debug("perf trace started with script %s\n\n", script_name);
620 } 709 }
621 710
622 err = __cmd_trace(session); 711 err = __cmd_trace(session);
diff --git a/tools/perf/builtin.h b/tools/perf/builtin.h
index 10fe49e7048a..921245b28583 100644
--- a/tools/perf/builtin.h
+++ b/tools/perf/builtin.h
@@ -32,5 +32,8 @@ extern int cmd_version(int argc, const char **argv, const char *prefix);
32extern int cmd_probe(int argc, const char **argv, const char *prefix); 32extern int cmd_probe(int argc, const char **argv, const char *prefix);
33extern int cmd_kmem(int argc, const char **argv, const char *prefix); 33extern int cmd_kmem(int argc, const char **argv, const char *prefix);
34extern int cmd_lock(int argc, const char **argv, const char *prefix); 34extern int cmd_lock(int argc, const char **argv, const char *prefix);
35extern int cmd_kvm(int argc, const char **argv, const char *prefix);
36extern int cmd_test(int argc, const char **argv, const char *prefix);
37extern int cmd_inject(int argc, const char **argv, const char *prefix);
35 38
36#endif 39#endif
diff --git a/tools/perf/command-list.txt b/tools/perf/command-list.txt
index db6ee94d4a8e..949d77fc0b97 100644
--- a/tools/perf/command-list.txt
+++ b/tools/perf/command-list.txt
@@ -8,6 +8,7 @@ perf-bench mainporcelain common
8perf-buildid-cache mainporcelain common 8perf-buildid-cache mainporcelain common
9perf-buildid-list mainporcelain common 9perf-buildid-list mainporcelain common
10perf-diff mainporcelain common 10perf-diff mainporcelain common
11perf-inject mainporcelain common
11perf-list mainporcelain common 12perf-list mainporcelain common
12perf-sched mainporcelain common 13perf-sched mainporcelain common
13perf-record mainporcelain common 14perf-record mainporcelain common
@@ -19,3 +20,5 @@ perf-trace mainporcelain common
19perf-probe mainporcelain common 20perf-probe mainporcelain common
20perf-kmem mainporcelain common 21perf-kmem mainporcelain common
21perf-lock mainporcelain common 22perf-lock mainporcelain common
23perf-kvm mainporcelain common
24perf-test mainporcelain common
diff --git a/tools/perf/perf-archive.sh b/tools/perf/perf-archive.sh
index 910468e6e01c..2e7a4f417e20 100644
--- a/tools/perf/perf-archive.sh
+++ b/tools/perf/perf-archive.sh
@@ -30,4 +30,7 @@ done
30 30
31tar cfj $PERF_DATA.tar.bz2 -C $DEBUGDIR -T $MANIFEST 31tar cfj $PERF_DATA.tar.bz2 -C $DEBUGDIR -T $MANIFEST
32rm -f $MANIFEST $BUILDIDS 32rm -f $MANIFEST $BUILDIDS
33echo -e "Now please run:\n"
34echo -e "$ tar xvf $PERF_DATA.tar.bz2 -C ~/.debug\n"
35echo "wherever you need to run 'perf report' on."
33exit 0 36exit 0
diff --git a/tools/perf/perf.c b/tools/perf/perf.c
index cd32c200cdb3..08e0e5d2b50e 100644
--- a/tools/perf/perf.c
+++ b/tools/perf/perf.c
@@ -13,9 +13,10 @@
13#include "util/quote.h" 13#include "util/quote.h"
14#include "util/run-command.h" 14#include "util/run-command.h"
15#include "util/parse-events.h" 15#include "util/parse-events.h"
16#include "util/string.h"
17#include "util/debugfs.h" 16#include "util/debugfs.h"
18 17
18bool use_browser;
19
19const char perf_usage_string[] = 20const char perf_usage_string[] =
20 "perf [--version] [--help] COMMAND [ARGS]"; 21 "perf [--version] [--help] COMMAND [ARGS]";
21 22
@@ -262,6 +263,8 @@ static int run_builtin(struct cmd_struct *p, int argc, const char **argv)
262 set_debugfs_path(); 263 set_debugfs_path();
263 264
264 status = p->fn(argc, argv, prefix); 265 status = p->fn(argc, argv, prefix);
266 exit_browser(status);
267
265 if (status) 268 if (status)
266 return status & 0xff; 269 return status & 0xff;
267 270
@@ -304,6 +307,9 @@ static void handle_internal_command(int argc, const char **argv)
304 { "probe", cmd_probe, 0 }, 307 { "probe", cmd_probe, 0 },
305 { "kmem", cmd_kmem, 0 }, 308 { "kmem", cmd_kmem, 0 },
306 { "lock", cmd_lock, 0 }, 309 { "lock", cmd_lock, 0 },
310 { "kvm", cmd_kvm, 0 },
311 { "test", cmd_test, 0 },
312 { "inject", cmd_inject, 0 },
307 }; 313 };
308 unsigned int i; 314 unsigned int i;
309 static const char ext[] = STRIP_EXTENSION; 315 static const char ext[] = STRIP_EXTENSION;
diff --git a/tools/perf/perf.h b/tools/perf/perf.h
index 6fb379bc1d1f..ef7aa0a0c526 100644
--- a/tools/perf/perf.h
+++ b/tools/perf/perf.h
@@ -1,6 +1,10 @@
1#ifndef _PERF_PERF_H 1#ifndef _PERF_PERF_H
2#define _PERF_PERF_H 2#define _PERF_PERF_H
3 3
4struct winsize;
5
6void get_term_dimensions(struct winsize *ws);
7
4#if defined(__i386__) 8#if defined(__i386__)
5#include "../../arch/x86/include/asm/unistd.h" 9#include "../../arch/x86/include/asm/unistd.h"
6#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") 10#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
@@ -76,6 +80,7 @@
76 80
77#include "../../include/linux/perf_event.h" 81#include "../../include/linux/perf_event.h"
78#include "util/types.h" 82#include "util/types.h"
83#include <stdbool.h>
79 84
80/* 85/*
81 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all 86 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
@@ -102,8 +107,6 @@ static inline unsigned long long rdclock(void)
102#define __user 107#define __user
103#define asmlinkage 108#define asmlinkage
104 109
105#define __used __attribute__((__unused__))
106
107#define unlikely(x) __builtin_expect(!!(x), 0) 110#define unlikely(x) __builtin_expect(!!(x), 0)
108#define min(x, y) ({ \ 111#define min(x, y) ({ \
109 typeof(x) _min1 = (x); \ 112 typeof(x) _min1 = (x); \
@@ -129,4 +132,6 @@ struct ip_callchain {
129 u64 ips[0]; 132 u64 ips[0];
130}; 133};
131 134
135extern bool perf_host, perf_guest;
136
132#endif 137#endif
diff --git a/tools/perf/scripts/perl/Perf-Trace-Util/lib/Perf/Trace/Util.pm b/tools/perf/scripts/perl/Perf-Trace-Util/lib/Perf/Trace/Util.pm
index f869c48dc9b0..d94b40c8ac85 100644
--- a/tools/perf/scripts/perl/Perf-Trace-Util/lib/Perf/Trace/Util.pm
+++ b/tools/perf/scripts/perl/Perf-Trace-Util/lib/Perf/Trace/Util.pm
@@ -15,6 +15,7 @@ our @EXPORT_OK = ( @{ $EXPORT_TAGS{'all'} } );
15 15
16our @EXPORT = qw( 16our @EXPORT = qw(
17avg nsecs nsecs_secs nsecs_nsecs nsecs_usecs print_nsecs 17avg nsecs nsecs_secs nsecs_nsecs nsecs_usecs print_nsecs
18clear_term
18); 19);
19 20
20our $VERSION = '0.01'; 21our $VERSION = '0.01';
@@ -55,6 +56,11 @@ sub nsecs_str {
55 return $str; 56 return $str;
56} 57}
57 58
59sub clear_term
60{
61 print "\x1b[H\x1b[2J";
62}
63
581; 641;
59__END__ 65__END__
60=head1 NAME 66=head1 NAME
diff --git a/tools/perf/scripts/perl/bin/check-perf-trace-record b/tools/perf/scripts/perl/bin/check-perf-trace-record
index e6cb1474f8e8..423ad6aed056 100644
--- a/tools/perf/scripts/perl/bin/check-perf-trace-record
+++ b/tools/perf/scripts/perl/bin/check-perf-trace-record
@@ -1,2 +1,2 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e kmem:kmalloc -e irq:softirq_entry -e kmem:kfree 2perf record -a -e kmem:kmalloc -e irq:softirq_entry -e kmem:kfree
diff --git a/tools/perf/scripts/perl/bin/failed-syscalls-record b/tools/perf/scripts/perl/bin/failed-syscalls-record
index f8885d389e6f..eb5846bcb565 100644
--- a/tools/perf/scripts/perl/bin/failed-syscalls-record
+++ b/tools/perf/scripts/perl/bin/failed-syscalls-record
@@ -1,2 +1,2 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e raw_syscalls:sys_exit 2perf record -a -e raw_syscalls:sys_exit $@
diff --git a/tools/perf/scripts/perl/bin/failed-syscalls-report b/tools/perf/scripts/perl/bin/failed-syscalls-report
index 8bfc660e5056..e3a5e55d54ff 100644
--- a/tools/perf/scripts/perl/bin/failed-syscalls-report
+++ b/tools/perf/scripts/perl/bin/failed-syscalls-report
@@ -1,4 +1,10 @@
1#!/bin/bash 1#!/bin/bash
2# description: system-wide failed syscalls 2# description: system-wide failed syscalls
3# args: [comm] 3# args: [comm]
4perf trace -s ~/libexec/perf-core/scripts/perl/failed-syscalls.pl $1 4if [ $# -gt 0 ] ; then
5 if ! expr match "$1" "-" > /dev/null ; then
6 comm=$1
7 shift
8 fi
9fi
10perf trace $@ -s ~/libexec/perf-core/scripts/perl/failed-syscalls.pl $comm
diff --git a/tools/perf/scripts/perl/bin/rw-by-file-record b/tools/perf/scripts/perl/bin/rw-by-file-record
index b25056ebf963..5bfaae5a6cba 100644
--- a/tools/perf/scripts/perl/bin/rw-by-file-record
+++ b/tools/perf/scripts/perl/bin/rw-by-file-record
@@ -1,2 +1,3 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e syscalls:sys_enter_read -e syscalls:sys_enter_write 2perf record -a -e syscalls:sys_enter_read -e syscalls:sys_enter_write $@
3
diff --git a/tools/perf/scripts/perl/bin/rw-by-file-report b/tools/perf/scripts/perl/bin/rw-by-file-report
index eddb9ccce6a5..d83070b7eeb5 100644
--- a/tools/perf/scripts/perl/bin/rw-by-file-report
+++ b/tools/perf/scripts/perl/bin/rw-by-file-report
@@ -1,7 +1,13 @@
1#!/bin/bash 1#!/bin/bash
2# description: r/w activity for a program, by file 2# description: r/w activity for a program, by file
3# args: <comm> 3# args: <comm>
4perf trace -s ~/libexec/perf-core/scripts/perl/rw-by-file.pl $1 4if [ $# -lt 1 ] ; then
5 echo "usage: rw-by-file <comm>"
6 exit
7fi
8comm=$1
9shift
10perf trace $@ -s ~/libexec/perf-core/scripts/perl/rw-by-file.pl $comm
5 11
6 12
7 13
diff --git a/tools/perf/scripts/perl/bin/rw-by-pid-record b/tools/perf/scripts/perl/bin/rw-by-pid-record
index 8903979c5b6c..6e0b2f7755ac 100644
--- a/tools/perf/scripts/perl/bin/rw-by-pid-record
+++ b/tools/perf/scripts/perl/bin/rw-by-pid-record
@@ -1,2 +1,2 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e syscalls:sys_enter_read -e syscalls:sys_exit_read -e syscalls:sys_enter_write -e syscalls:sys_exit_write 2perf record -a -e syscalls:sys_enter_read -e syscalls:sys_exit_read -e syscalls:sys_enter_write -e syscalls:sys_exit_write $@
diff --git a/tools/perf/scripts/perl/bin/rw-by-pid-report b/tools/perf/scripts/perl/bin/rw-by-pid-report
index 7f44c25cc857..7ef46983f62f 100644
--- a/tools/perf/scripts/perl/bin/rw-by-pid-report
+++ b/tools/perf/scripts/perl/bin/rw-by-pid-report
@@ -1,6 +1,6 @@
1#!/bin/bash 1#!/bin/bash
2# description: system-wide r/w activity 2# description: system-wide r/w activity
3perf trace -s ~/libexec/perf-core/scripts/perl/rw-by-pid.pl 3perf trace $@ -s ~/libexec/perf-core/scripts/perl/rw-by-pid.pl
4 4
5 5
6 6
diff --git a/tools/perf/scripts/perl/bin/rwtop-record b/tools/perf/scripts/perl/bin/rwtop-record
new file mode 100644
index 000000000000..6e0b2f7755ac
--- /dev/null
+++ b/tools/perf/scripts/perl/bin/rwtop-record
@@ -0,0 +1,2 @@
1#!/bin/bash
2perf record -a -e syscalls:sys_enter_read -e syscalls:sys_exit_read -e syscalls:sys_enter_write -e syscalls:sys_exit_write $@
diff --git a/tools/perf/scripts/perl/bin/rwtop-report b/tools/perf/scripts/perl/bin/rwtop-report
new file mode 100644
index 000000000000..93e698cd3f38
--- /dev/null
+++ b/tools/perf/scripts/perl/bin/rwtop-report
@@ -0,0 +1,23 @@
1#!/bin/bash
2# description: system-wide r/w top
3# args: [interval]
4n_args=0
5for i in "$@"
6do
7 if expr match "$i" "-" > /dev/null ; then
8 break
9 fi
10 n_args=$(( $n_args + 1 ))
11done
12if [ "$n_args" -gt 1 ] ; then
13 echo "usage: rwtop-report [interval]"
14 exit
15fi
16if [ "$n_args" -gt 0 ] ; then
17 interval=$1
18 shift
19fi
20perf trace $@ -s ~/libexec/perf-core/scripts/perl/rwtop.pl $interval
21
22
23
diff --git a/tools/perf/scripts/perl/bin/wakeup-latency-record b/tools/perf/scripts/perl/bin/wakeup-latency-record
index 6abedda911a4..9f2acaaae9f0 100644
--- a/tools/perf/scripts/perl/bin/wakeup-latency-record
+++ b/tools/perf/scripts/perl/bin/wakeup-latency-record
@@ -1,5 +1,5 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e sched:sched_switch -e sched:sched_wakeup 2perf record -a -e sched:sched_switch -e sched:sched_wakeup $@
3 3
4 4
5 5
diff --git a/tools/perf/scripts/perl/bin/wakeup-latency-report b/tools/perf/scripts/perl/bin/wakeup-latency-report
index fce3adcb3249..a0d898f9ca1d 100644
--- a/tools/perf/scripts/perl/bin/wakeup-latency-report
+++ b/tools/perf/scripts/perl/bin/wakeup-latency-report
@@ -1,6 +1,6 @@
1#!/bin/bash 1#!/bin/bash
2# description: system-wide min/max/avg wakeup latency 2# description: system-wide min/max/avg wakeup latency
3perf trace -s ~/libexec/perf-core/scripts/perl/wakeup-latency.pl 3perf trace $@ -s ~/libexec/perf-core/scripts/perl/wakeup-latency.pl
4 4
5 5
6 6
diff --git a/tools/perf/scripts/perl/bin/workqueue-stats-record b/tools/perf/scripts/perl/bin/workqueue-stats-record
index fce6637b19ba..85301f2471ff 100644
--- a/tools/perf/scripts/perl/bin/workqueue-stats-record
+++ b/tools/perf/scripts/perl/bin/workqueue-stats-record
@@ -1,2 +1,2 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e workqueue:workqueue_creation -e workqueue:workqueue_destruction -e workqueue:workqueue_execution -e workqueue:workqueue_insertion 2perf record -a -e workqueue:workqueue_creation -e workqueue:workqueue_destruction -e workqueue:workqueue_execution -e workqueue:workqueue_insertion $@
diff --git a/tools/perf/scripts/perl/bin/workqueue-stats-report b/tools/perf/scripts/perl/bin/workqueue-stats-report
index 71cfbd182fb9..35081132ef97 100644
--- a/tools/perf/scripts/perl/bin/workqueue-stats-report
+++ b/tools/perf/scripts/perl/bin/workqueue-stats-report
@@ -1,6 +1,6 @@
1#!/bin/bash 1#!/bin/bash
2# description: workqueue stats (ins/exe/create/destroy) 2# description: workqueue stats (ins/exe/create/destroy)
3perf trace -s ~/libexec/perf-core/scripts/perl/workqueue-stats.pl 3perf trace $@ -s ~/libexec/perf-core/scripts/perl/workqueue-stats.pl
4 4
5 5
6 6
diff --git a/tools/perf/scripts/perl/failed-syscalls.pl b/tools/perf/scripts/perl/failed-syscalls.pl
index c18e7e27a84b..94bc25a347eb 100644
--- a/tools/perf/scripts/perl/failed-syscalls.pl
+++ b/tools/perf/scripts/perl/failed-syscalls.pl
@@ -11,6 +11,8 @@ use Perf::Trace::Core;
11use Perf::Trace::Context; 11use Perf::Trace::Context;
12use Perf::Trace::Util; 12use Perf::Trace::Util;
13 13
14my $for_comm = shift;
15
14my %failed_syscalls; 16my %failed_syscalls;
15 17
16sub raw_syscalls::sys_exit 18sub raw_syscalls::sys_exit
@@ -33,6 +35,8 @@ sub trace_end
33 35
34 foreach my $comm (sort {$failed_syscalls{$b} <=> $failed_syscalls{$a}} 36 foreach my $comm (sort {$failed_syscalls{$b} <=> $failed_syscalls{$a}}
35 keys %failed_syscalls) { 37 keys %failed_syscalls) {
36 printf("%-20s %10s\n", $comm, $failed_syscalls{$comm}); 38 next if ($for_comm && $comm ne $for_comm);
39
40 printf("%-20s %10s\n", $comm, $failed_syscalls{$comm});
37 } 41 }
38} 42}
diff --git a/tools/perf/scripts/perl/rw-by-pid.pl b/tools/perf/scripts/perl/rw-by-pid.pl
index da601fae1a00..9db23c9daf55 100644
--- a/tools/perf/scripts/perl/rw-by-pid.pl
+++ b/tools/perf/scripts/perl/rw-by-pid.pl
@@ -79,12 +79,12 @@ sub trace_end
79 printf("%6s %-20s %10s %10s %10s\n", "------", "--------------------", 79 printf("%6s %-20s %10s %10s %10s\n", "------", "--------------------",
80 "-----------", "----------", "----------"); 80 "-----------", "----------", "----------");
81 81
82 foreach my $pid (sort {$reads{$b}{bytes_read} <=> 82 foreach my $pid (sort { ($reads{$b}{bytes_read} || 0) <=>
83 $reads{$a}{bytes_read}} keys %reads) { 83 ($reads{$a}{bytes_read} || 0) } keys %reads) {
84 my $comm = $reads{$pid}{comm}; 84 my $comm = $reads{$pid}{comm} || "";
85 my $total_reads = $reads{$pid}{total_reads}; 85 my $total_reads = $reads{$pid}{total_reads} || 0;
86 my $bytes_requested = $reads{$pid}{bytes_requested}; 86 my $bytes_requested = $reads{$pid}{bytes_requested} || 0;
87 my $bytes_read = $reads{$pid}{bytes_read}; 87 my $bytes_read = $reads{$pid}{bytes_read} || 0;
88 88
89 printf("%6s %-20s %10s %10s %10s\n", $pid, $comm, 89 printf("%6s %-20s %10s %10s %10s\n", $pid, $comm,
90 $total_reads, $bytes_requested, $bytes_read); 90 $total_reads, $bytes_requested, $bytes_read);
@@ -96,16 +96,23 @@ sub trace_end
96 printf("%6s %20s %6s %10s\n", "------", "--------------------", 96 printf("%6s %20s %6s %10s\n", "------", "--------------------",
97 "------", "----------"); 97 "------", "----------");
98 98
99 foreach my $pid (keys %reads) { 99 my @errcounts = ();
100 my $comm = $reads{$pid}{comm};
101 foreach my $err (sort {$reads{$b}{comm} cmp $reads{$a}{comm}}
102 keys %{$reads{$pid}{errors}}) {
103 my $errors = $reads{$pid}{errors}{$err};
104 100
105 printf("%6d %-20s %6d %10s\n", $pid, $comm, $err, $errors); 101 foreach my $pid (keys %reads) {
102 foreach my $error (keys %{$reads{$pid}{errors}}) {
103 my $comm = $reads{$pid}{comm} || "";
104 my $errcount = $reads{$pid}{errors}{$error} || 0;
105 push @errcounts, [$pid, $comm, $error, $errcount];
106 } 106 }
107 } 107 }
108 108
109 @errcounts = sort { $b->[3] <=> $a->[3] } @errcounts;
110
111 for my $i (0 .. $#errcounts) {
112 printf("%6d %-20s %6d %10s\n", $errcounts[$i][0],
113 $errcounts[$i][1], $errcounts[$i][2], $errcounts[$i][3]);
114 }
115
109 printf("\nwrite counts by pid:\n\n"); 116 printf("\nwrite counts by pid:\n\n");
110 117
111 printf("%6s %20s %10s %10s\n", "pid", "comm", 118 printf("%6s %20s %10s %10s\n", "pid", "comm",
@@ -113,11 +120,11 @@ sub trace_end
113 printf("%6s %-20s %10s %10s\n", "------", "--------------------", 120 printf("%6s %-20s %10s %10s\n", "------", "--------------------",
114 "-----------", "----------"); 121 "-----------", "----------");
115 122
116 foreach my $pid (sort {$writes{$b}{bytes_written} <=> 123 foreach my $pid (sort { ($writes{$b}{bytes_written} || 0) <=>
117 $writes{$a}{bytes_written}} keys %writes) { 124 ($writes{$a}{bytes_written} || 0)} keys %writes) {
118 my $comm = $writes{$pid}{comm}; 125 my $comm = $writes{$pid}{comm} || "";
119 my $total_writes = $writes{$pid}{total_writes}; 126 my $total_writes = $writes{$pid}{total_writes} || 0;
120 my $bytes_written = $writes{$pid}{bytes_written}; 127 my $bytes_written = $writes{$pid}{bytes_written} || 0;
121 128
122 printf("%6s %-20s %10s %10s\n", $pid, $comm, 129 printf("%6s %-20s %10s %10s\n", $pid, $comm,
123 $total_writes, $bytes_written); 130 $total_writes, $bytes_written);
@@ -129,16 +136,23 @@ sub trace_end
129 printf("%6s %20s %6s %10s\n", "------", "--------------------", 136 printf("%6s %20s %6s %10s\n", "------", "--------------------",
130 "------", "----------"); 137 "------", "----------");
131 138
132 foreach my $pid (keys %writes) { 139 @errcounts = ();
133 my $comm = $writes{$pid}{comm};
134 foreach my $err (sort {$writes{$b}{comm} cmp $writes{$a}{comm}}
135 keys %{$writes{$pid}{errors}}) {
136 my $errors = $writes{$pid}{errors}{$err};
137 140
138 printf("%6d %-20s %6d %10s\n", $pid, $comm, $err, $errors); 141 foreach my $pid (keys %writes) {
142 foreach my $error (keys %{$writes{$pid}{errors}}) {
143 my $comm = $writes{$pid}{comm} || "";
144 my $errcount = $writes{$pid}{errors}{$error} || 0;
145 push @errcounts, [$pid, $comm, $error, $errcount];
139 } 146 }
140 } 147 }
141 148
149 @errcounts = sort { $b->[3] <=> $a->[3] } @errcounts;
150
151 for my $i (0 .. $#errcounts) {
152 printf("%6d %-20s %6d %10s\n", $errcounts[$i][0],
153 $errcounts[$i][1], $errcounts[$i][2], $errcounts[$i][3]);
154 }
155
142 print_unhandled(); 156 print_unhandled();
143} 157}
144 158
diff --git a/tools/perf/scripts/perl/rwtop.pl b/tools/perf/scripts/perl/rwtop.pl
new file mode 100644
index 000000000000..4bb3ecd33472
--- /dev/null
+++ b/tools/perf/scripts/perl/rwtop.pl
@@ -0,0 +1,199 @@
1#!/usr/bin/perl -w
2# (c) 2010, Tom Zanussi <tzanussi@gmail.com>
3# Licensed under the terms of the GNU GPL License version 2
4
5# read/write top
6#
7# Periodically displays system-wide r/w call activity, broken down by
8# pid. If an [interval] arg is specified, the display will be
9# refreshed every [interval] seconds. The default interval is 3
10# seconds.
11
12use 5.010000;
13use strict;
14use warnings;
15
16use lib "$ENV{'PERF_EXEC_PATH'}/scripts/perl/Perf-Trace-Util/lib";
17use lib "./Perf-Trace-Util/lib";
18use Perf::Trace::Core;
19use Perf::Trace::Util;
20
21my $default_interval = 3;
22my $nlines = 20;
23my $print_thread;
24my $print_pending = 0;
25
26my %reads;
27my %writes;
28
29my $interval = shift;
30if (!$interval) {
31 $interval = $default_interval;
32}
33
34sub syscalls::sys_exit_read
35{
36 my ($event_name, $context, $common_cpu, $common_secs, $common_nsecs,
37 $common_pid, $common_comm,
38 $nr, $ret) = @_;
39
40 print_check();
41
42 if ($ret > 0) {
43 $reads{$common_pid}{bytes_read} += $ret;
44 } else {
45 if (!defined ($reads{$common_pid}{bytes_read})) {
46 $reads{$common_pid}{bytes_read} = 0;
47 }
48 $reads{$common_pid}{errors}{$ret}++;
49 }
50}
51
52sub syscalls::sys_enter_read
53{
54 my ($event_name, $context, $common_cpu, $common_secs, $common_nsecs,
55 $common_pid, $common_comm,
56 $nr, $fd, $buf, $count) = @_;
57
58 print_check();
59
60 $reads{$common_pid}{bytes_requested} += $count;
61 $reads{$common_pid}{total_reads}++;
62 $reads{$common_pid}{comm} = $common_comm;
63}
64
65sub syscalls::sys_exit_write
66{
67 my ($event_name, $context, $common_cpu, $common_secs, $common_nsecs,
68 $common_pid, $common_comm,
69 $nr, $ret) = @_;
70
71 print_check();
72
73 if ($ret <= 0) {
74 $writes{$common_pid}{errors}{$ret}++;
75 }
76}
77
78sub syscalls::sys_enter_write
79{
80 my ($event_name, $context, $common_cpu, $common_secs, $common_nsecs,
81 $common_pid, $common_comm,
82 $nr, $fd, $buf, $count) = @_;
83
84 print_check();
85
86 $writes{$common_pid}{bytes_written} += $count;
87 $writes{$common_pid}{total_writes}++;
88 $writes{$common_pid}{comm} = $common_comm;
89}
90
91sub trace_begin
92{
93 $SIG{ALRM} = \&set_print_pending;
94 alarm 1;
95}
96
97sub trace_end
98{
99 print_unhandled();
100 print_totals();
101}
102
103sub print_check()
104{
105 if ($print_pending == 1) {
106 $print_pending = 0;
107 print_totals();
108 }
109}
110
111sub set_print_pending()
112{
113 $print_pending = 1;
114 alarm $interval;
115}
116
117sub print_totals
118{
119 my $count;
120
121 $count = 0;
122
123 clear_term();
124
125 printf("\nread counts by pid:\n\n");
126
127 printf("%6s %20s %10s %10s %10s\n", "pid", "comm",
128 "# reads", "bytes_req", "bytes_read");
129 printf("%6s %-20s %10s %10s %10s\n", "------", "--------------------",
130 "----------", "----------", "----------");
131
132 foreach my $pid (sort { ($reads{$b}{bytes_read} || 0) <=>
133 ($reads{$a}{bytes_read} || 0) } keys %reads) {
134 my $comm = $reads{$pid}{comm} || "";
135 my $total_reads = $reads{$pid}{total_reads} || 0;
136 my $bytes_requested = $reads{$pid}{bytes_requested} || 0;
137 my $bytes_read = $reads{$pid}{bytes_read} || 0;
138
139 printf("%6s %-20s %10s %10s %10s\n", $pid, $comm,
140 $total_reads, $bytes_requested, $bytes_read);
141
142 if (++$count == $nlines) {
143 last;
144 }
145 }
146
147 $count = 0;
148
149 printf("\nwrite counts by pid:\n\n");
150
151 printf("%6s %20s %10s %13s\n", "pid", "comm",
152 "# writes", "bytes_written");
153 printf("%6s %-20s %10s %13s\n", "------", "--------------------",
154 "----------", "-------------");
155
156 foreach my $pid (sort { ($writes{$b}{bytes_written} || 0) <=>
157 ($writes{$a}{bytes_written} || 0)} keys %writes) {
158 my $comm = $writes{$pid}{comm} || "";
159 my $total_writes = $writes{$pid}{total_writes} || 0;
160 my $bytes_written = $writes{$pid}{bytes_written} || 0;
161
162 printf("%6s %-20s %10s %13s\n", $pid, $comm,
163 $total_writes, $bytes_written);
164
165 if (++$count == $nlines) {
166 last;
167 }
168 }
169
170 %reads = ();
171 %writes = ();
172}
173
174my %unhandled;
175
176sub print_unhandled
177{
178 if ((scalar keys %unhandled) == 0) {
179 return;
180 }
181
182 print "\nunhandled events:\n\n";
183
184 printf("%-40s %10s\n", "event", "count");
185 printf("%-40s %10s\n", "----------------------------------------",
186 "-----------");
187
188 foreach my $event_name (keys %unhandled) {
189 printf("%-40s %10d\n", $event_name, $unhandled{$event_name});
190 }
191}
192
193sub trace_unhandled
194{
195 my ($event_name, $context, $common_cpu, $common_secs, $common_nsecs,
196 $common_pid, $common_comm) = @_;
197
198 $unhandled{$event_name}++;
199}
diff --git a/tools/perf/scripts/perl/wakeup-latency.pl b/tools/perf/scripts/perl/wakeup-latency.pl
index ed58ef284e23..d9143dcec6c6 100644
--- a/tools/perf/scripts/perl/wakeup-latency.pl
+++ b/tools/perf/scripts/perl/wakeup-latency.pl
@@ -22,8 +22,8 @@ my %last_wakeup;
22 22
23my $max_wakeup_latency; 23my $max_wakeup_latency;
24my $min_wakeup_latency; 24my $min_wakeup_latency;
25my $total_wakeup_latency; 25my $total_wakeup_latency = 0;
26my $total_wakeups; 26my $total_wakeups = 0;
27 27
28sub sched::sched_switch 28sub sched::sched_switch
29{ 29{
@@ -67,8 +67,12 @@ sub trace_end
67{ 67{
68 printf("wakeup_latency stats:\n\n"); 68 printf("wakeup_latency stats:\n\n");
69 print "total_wakeups: $total_wakeups\n"; 69 print "total_wakeups: $total_wakeups\n";
70 printf("avg_wakeup_latency (ns): %u\n", 70 if ($total_wakeups) {
71 avg($total_wakeup_latency, $total_wakeups)); 71 printf("avg_wakeup_latency (ns): %u\n",
72 avg($total_wakeup_latency, $total_wakeups));
73 } else {
74 printf("avg_wakeup_latency (ns): N/A\n");
75 }
72 printf("min_wakeup_latency (ns): %u\n", $min_wakeup_latency); 76 printf("min_wakeup_latency (ns): %u\n", $min_wakeup_latency);
73 printf("max_wakeup_latency (ns): %u\n", $max_wakeup_latency); 77 printf("max_wakeup_latency (ns): %u\n", $max_wakeup_latency);
74 78
diff --git a/tools/perf/scripts/perl/workqueue-stats.pl b/tools/perf/scripts/perl/workqueue-stats.pl
index 511302c8a494..b84b12699b70 100644
--- a/tools/perf/scripts/perl/workqueue-stats.pl
+++ b/tools/perf/scripts/perl/workqueue-stats.pl
@@ -71,9 +71,9 @@ sub trace_end
71 printf("%3s %6s %6s\t%-20s\n", "---", "---", "----", "----"); 71 printf("%3s %6s %6s\t%-20s\n", "---", "---", "----", "----");
72 foreach my $pidhash (@cpus) { 72 foreach my $pidhash (@cpus) {
73 while ((my $pid, my $wqhash) = each %$pidhash) { 73 while ((my $pid, my $wqhash) = each %$pidhash) {
74 my $ins = $$wqhash{'inserted'}; 74 my $ins = $$wqhash{'inserted'} || 0;
75 my $exe = $$wqhash{'executed'}; 75 my $exe = $$wqhash{'executed'} || 0;
76 my $comm = $$wqhash{'comm'}; 76 my $comm = $$wqhash{'comm'} || "";
77 if ($ins || $exe) { 77 if ($ins || $exe) {
78 printf("%3u %6u %6u\t%-20s\n", $cpu, $ins, $exe, $comm); 78 printf("%3u %6u %6u\t%-20s\n", $cpu, $ins, $exe, $comm);
79 } 79 }
@@ -87,9 +87,9 @@ sub trace_end
87 printf("%3s %6s %6s\t%-20s\n", "---", "-------", "---------", "----"); 87 printf("%3s %6s %6s\t%-20s\n", "---", "-------", "---------", "----");
88 foreach my $pidhash (@cpus) { 88 foreach my $pidhash (@cpus) {
89 while ((my $pid, my $wqhash) = each %$pidhash) { 89 while ((my $pid, my $wqhash) = each %$pidhash) {
90 my $created = $$wqhash{'created'}; 90 my $created = $$wqhash{'created'} || 0;
91 my $destroyed = $$wqhash{'destroyed'}; 91 my $destroyed = $$wqhash{'destroyed'} || 0;
92 my $comm = $$wqhash{'comm'}; 92 my $comm = $$wqhash{'comm'} || "";
93 if ($created || $destroyed) { 93 if ($created || $destroyed) {
94 printf("%3u %6u %6u\t%-20s\n", $cpu, $created, $destroyed, 94 printf("%3u %6u %6u\t%-20s\n", $cpu, $created, $destroyed,
95 $comm); 95 $comm);
diff --git a/tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py b/tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
index 83e91435ed09..9689bc0acd9f 100644
--- a/tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
+++ b/tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
@@ -23,3 +23,6 @@ def nsecs_nsecs(nsecs):
23def nsecs_str(nsecs): 23def nsecs_str(nsecs):
24 str = "%5u.%09u" % (nsecs_secs(nsecs), nsecs_nsecs(nsecs)), 24 str = "%5u.%09u" % (nsecs_secs(nsecs), nsecs_nsecs(nsecs)),
25 return str 25 return str
26
27def clear_term():
28 print("\x1b[H\x1b[2J")
diff --git a/tools/perf/scripts/python/bin/failed-syscalls-by-pid-record b/tools/perf/scripts/python/bin/failed-syscalls-by-pid-record
index f8885d389e6f..eb5846bcb565 100644
--- a/tools/perf/scripts/python/bin/failed-syscalls-by-pid-record
+++ b/tools/perf/scripts/python/bin/failed-syscalls-by-pid-record
@@ -1,2 +1,2 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e raw_syscalls:sys_exit 2perf record -a -e raw_syscalls:sys_exit $@
diff --git a/tools/perf/scripts/python/bin/failed-syscalls-by-pid-report b/tools/perf/scripts/python/bin/failed-syscalls-by-pid-report
index 1e0c0a860c87..30293545fcc2 100644
--- a/tools/perf/scripts/python/bin/failed-syscalls-by-pid-report
+++ b/tools/perf/scripts/python/bin/failed-syscalls-by-pid-report
@@ -1,4 +1,10 @@
1#!/bin/bash 1#!/bin/bash
2# description: system-wide failed syscalls, by pid 2# description: system-wide failed syscalls, by pid
3# args: [comm] 3# args: [comm]
4perf trace -s ~/libexec/perf-core/scripts/python/failed-syscalls-by-pid.py $1 4if [ $# -gt 0 ] ; then
5 if ! expr match "$1" "-" > /dev/null ; then
6 comm=$1
7 shift
8 fi
9fi
10perf trace $@ -s ~/libexec/perf-core/scripts/python/failed-syscalls-by-pid.py $comm
diff --git a/tools/perf/scripts/python/bin/sctop-record b/tools/perf/scripts/python/bin/sctop-record
new file mode 100644
index 000000000000..1fc5998b721d
--- /dev/null
+++ b/tools/perf/scripts/python/bin/sctop-record
@@ -0,0 +1,2 @@
1#!/bin/bash
2perf record -a -e raw_syscalls:sys_enter $@
diff --git a/tools/perf/scripts/python/bin/sctop-report b/tools/perf/scripts/python/bin/sctop-report
new file mode 100644
index 000000000000..b01c842ae7b4
--- /dev/null
+++ b/tools/perf/scripts/python/bin/sctop-report
@@ -0,0 +1,24 @@
1#!/bin/bash
2# description: syscall top
3# args: [comm] [interval]
4n_args=0
5for i in "$@"
6do
7 if expr match "$i" "-" > /dev/null ; then
8 break
9 fi
10 n_args=$(( $n_args + 1 ))
11done
12if [ "$n_args" -gt 2 ] ; then
13 echo "usage: sctop-report [comm] [interval]"
14 exit
15fi
16if [ "$n_args" -gt 1 ] ; then
17 comm=$1
18 interval=$2
19 shift 2
20elif [ "$n_args" -gt 0 ] ; then
21 interval=$1
22 shift
23fi
24perf trace $@ -s ~/libexec/perf-core/scripts/python/sctop.py $comm $interval
diff --git a/tools/perf/scripts/python/bin/syscall-counts-by-pid-record b/tools/perf/scripts/python/bin/syscall-counts-by-pid-record
index 45a8c50359da..1fc5998b721d 100644
--- a/tools/perf/scripts/python/bin/syscall-counts-by-pid-record
+++ b/tools/perf/scripts/python/bin/syscall-counts-by-pid-record
@@ -1,2 +1,2 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e raw_syscalls:sys_enter 2perf record -a -e raw_syscalls:sys_enter $@
diff --git a/tools/perf/scripts/python/bin/syscall-counts-by-pid-report b/tools/perf/scripts/python/bin/syscall-counts-by-pid-report
index f8044d192271..9e9d8ddd72ce 100644
--- a/tools/perf/scripts/python/bin/syscall-counts-by-pid-report
+++ b/tools/perf/scripts/python/bin/syscall-counts-by-pid-report
@@ -1,4 +1,10 @@
1#!/bin/bash 1#!/bin/bash
2# description: system-wide syscall counts, by pid 2# description: system-wide syscall counts, by pid
3# args: [comm] 3# args: [comm]
4perf trace -s ~/libexec/perf-core/scripts/python/syscall-counts-by-pid.py $1 4if [ $# -gt 0 ] ; then
5 if ! expr match "$1" "-" > /dev/null ; then
6 comm=$1
7 shift
8 fi
9fi
10perf trace $@ -s ~/libexec/perf-core/scripts/python/syscall-counts-by-pid.py $comm
diff --git a/tools/perf/scripts/python/bin/syscall-counts-record b/tools/perf/scripts/python/bin/syscall-counts-record
index 45a8c50359da..1fc5998b721d 100644
--- a/tools/perf/scripts/python/bin/syscall-counts-record
+++ b/tools/perf/scripts/python/bin/syscall-counts-record
@@ -1,2 +1,2 @@
1#!/bin/bash 1#!/bin/bash
2perf record -c 1 -f -a -M -R -e raw_syscalls:sys_enter 2perf record -a -e raw_syscalls:sys_enter $@
diff --git a/tools/perf/scripts/python/bin/syscall-counts-report b/tools/perf/scripts/python/bin/syscall-counts-report
index a366aa61612f..dc076b618796 100644
--- a/tools/perf/scripts/python/bin/syscall-counts-report
+++ b/tools/perf/scripts/python/bin/syscall-counts-report
@@ -1,4 +1,10 @@
1#!/bin/bash 1#!/bin/bash
2# description: system-wide syscall counts 2# description: system-wide syscall counts
3# args: [comm] 3# args: [comm]
4perf trace -s ~/libexec/perf-core/scripts/python/syscall-counts.py $1 4if [ $# -gt 0 ] ; then
5 if ! expr match "$1" "-" > /dev/null ; then
6 comm=$1
7 shift
8 fi
9fi
10perf trace $@ -s ~/libexec/perf-core/scripts/python/syscall-counts.py $comm
diff --git a/tools/perf/scripts/python/sctop.py b/tools/perf/scripts/python/sctop.py
new file mode 100644
index 000000000000..6cafad40c296
--- /dev/null
+++ b/tools/perf/scripts/python/sctop.py
@@ -0,0 +1,78 @@
1# system call top
2# (c) 2010, Tom Zanussi <tzanussi@gmail.com>
3# Licensed under the terms of the GNU GPL License version 2
4#
5# Periodically displays system-wide system call totals, broken down by
6# syscall. If a [comm] arg is specified, only syscalls called by
7# [comm] are displayed. If an [interval] arg is specified, the display
8# will be refreshed every [interval] seconds. The default interval is
9# 3 seconds.
10
11import thread
12import time
13import os
14import sys
15
16sys.path.append(os.environ['PERF_EXEC_PATH'] + \
17 '/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
18
19from perf_trace_context import *
20from Core import *
21from Util import *
22
23usage = "perf trace -s syscall-counts.py [comm] [interval]\n";
24
25for_comm = None
26default_interval = 3
27interval = default_interval
28
29if len(sys.argv) > 3:
30 sys.exit(usage)
31
32if len(sys.argv) > 2:
33 for_comm = sys.argv[1]
34 interval = int(sys.argv[2])
35elif len(sys.argv) > 1:
36 try:
37 interval = int(sys.argv[1])
38 except ValueError:
39 for_comm = sys.argv[1]
40 interval = default_interval
41
42syscalls = autodict()
43
44def trace_begin():
45 thread.start_new_thread(print_syscall_totals, (interval,))
46 pass
47
48def raw_syscalls__sys_enter(event_name, context, common_cpu,
49 common_secs, common_nsecs, common_pid, common_comm,
50 id, args):
51 if for_comm is not None:
52 if common_comm != for_comm:
53 return
54 try:
55 syscalls[id] += 1
56 except TypeError:
57 syscalls[id] = 1
58
59def print_syscall_totals(interval):
60 while 1:
61 clear_term()
62 if for_comm is not None:
63 print "\nsyscall events for %s:\n\n" % (for_comm),
64 else:
65 print "\nsyscall events:\n\n",
66
67 print "%-40s %10s\n" % ("event", "count"),
68 print "%-40s %10s\n" % ("----------------------------------------", \
69 "----------"),
70
71 for id, val in sorted(syscalls.iteritems(), key = lambda(k, v): (v, k), \
72 reverse = True):
73 try:
74 print "%-40d %10d\n" % (id, val),
75 except TypeError:
76 pass
77 syscalls.clear()
78 time.sleep(interval)
diff --git a/tools/perf/util/PERF-VERSION-GEN b/tools/perf/util/PERF-VERSION-GEN
index 54552a00a117..49ece7921914 100755
--- a/tools/perf/util/PERF-VERSION-GEN
+++ b/tools/perf/util/PERF-VERSION-GEN
@@ -1,6 +1,10 @@
1#!/bin/sh 1#!/bin/sh
2 2
3GVF=PERF-VERSION-FILE 3if [ $# -eq 1 ] ; then
4 OUTPUT=$1
5fi
6
7GVF=${OUTPUT}PERF-VERSION-FILE
4DEF_VER=v0.0.2.PERF 8DEF_VER=v0.0.2.PERF
5 9
6LF=' 10LF='
diff --git a/tools/perf/util/bitmap.c b/tools/perf/util/bitmap.c
new file mode 100644
index 000000000000..5e230acae1e9
--- /dev/null
+++ b/tools/perf/util/bitmap.c
@@ -0,0 +1,21 @@
1/*
2 * From lib/bitmap.c
3 * Helper functions for bitmap.h.
4 *
5 * This source code is licensed under the GNU General Public License,
6 * Version 2. See the file COPYING for more details.
7 */
8#include <linux/bitmap.h>
9
10int __bitmap_weight(const unsigned long *bitmap, int bits)
11{
12 int k, w = 0, lim = bits/BITS_PER_LONG;
13
14 for (k = 0; k < lim; k++)
15 w += hweight_long(bitmap[k]);
16
17 if (bits % BITS_PER_LONG)
18 w += hweight_long(bitmap[k] & BITMAP_LAST_WORD_MASK(bits));
19
20 return w;
21}
diff --git a/tools/perf/util/build-id.c b/tools/perf/util/build-id.c
index 04904b35ba81..0f60a3906808 100644
--- a/tools/perf/util/build-id.c
+++ b/tools/perf/util/build-id.c
@@ -24,7 +24,7 @@ static int build_id__mark_dso_hit(event_t *event, struct perf_session *session)
24 } 24 }
25 25
26 thread__find_addr_map(thread, session, cpumode, MAP__FUNCTION, 26 thread__find_addr_map(thread, session, cpumode, MAP__FUNCTION,
27 event->ip.ip, &al); 27 event->ip.pid, event->ip.ip, &al);
28 28
29 if (al.map != NULL) 29 if (al.map != NULL)
30 al.map->dso->hit = 1; 30 al.map->dso->hit = 1;
diff --git a/tools/perf/util/cache.h b/tools/perf/util/cache.h
index 918eb376abe3..4b9aab7f0405 100644
--- a/tools/perf/util/cache.h
+++ b/tools/perf/util/cache.h
@@ -1,6 +1,7 @@
1#ifndef __PERF_CACHE_H 1#ifndef __PERF_CACHE_H
2#define __PERF_CACHE_H 2#define __PERF_CACHE_H
3 3
4#include <stdbool.h>
4#include "util.h" 5#include "util.h"
5#include "strbuf.h" 6#include "strbuf.h"
6#include "../perf.h" 7#include "../perf.h"
@@ -69,6 +70,19 @@ extern const char *pager_program;
69extern int pager_in_use(void); 70extern int pager_in_use(void);
70extern int pager_use_color; 71extern int pager_use_color;
71 72
73extern bool use_browser;
74
75#ifdef NO_NEWT_SUPPORT
76static inline void setup_browser(void)
77{
78 setup_pager();
79}
80static inline void exit_browser(bool wait_for_ok __used) {}
81#else
82void setup_browser(void);
83void exit_browser(bool wait_for_ok);
84#endif
85
72extern const char *editor_program; 86extern const char *editor_program;
73extern const char *excludes_file; 87extern const char *excludes_file;
74 88
diff --git a/tools/perf/util/callchain.c b/tools/perf/util/callchain.c
index b3b71258272a..21a52e0a4435 100644
--- a/tools/perf/util/callchain.c
+++ b/tools/perf/util/callchain.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2009, Frederic Weisbecker <fweisbec@gmail.com> 2 * Copyright (C) 2009-2010, Frederic Weisbecker <fweisbec@gmail.com>
3 * 3 *
4 * Handle the callchains from the stream in an ad-hoc radix tree and then 4 * Handle the callchains from the stream in an ad-hoc radix tree and then
5 * sort them in an rbtree. 5 * sort them in an rbtree.
@@ -17,6 +17,13 @@
17 17
18#include "callchain.h" 18#include "callchain.h"
19 19
20bool ip_callchain__valid(struct ip_callchain *chain, event_t *event)
21{
22 unsigned int chain_size = event->header.size;
23 chain_size -= (unsigned long)&event->ip.__more_data - (unsigned long)event;
24 return chain->nr * sizeof(u64) <= chain_size;
25}
26
20#define chain_for_each_child(child, parent) \ 27#define chain_for_each_child(child, parent) \
21 list_for_each_entry(child, &parent->children, brothers) 28 list_for_each_entry(child, &parent->children, brothers)
22 29
@@ -160,7 +167,7 @@ create_child(struct callchain_node *parent, bool inherit_children)
160{ 167{
161 struct callchain_node *new; 168 struct callchain_node *new;
162 169
163 new = malloc(sizeof(*new)); 170 new = zalloc(sizeof(*new));
164 if (!new) { 171 if (!new) {
165 perror("not enough memory to create child for code path tree"); 172 perror("not enough memory to create child for code path tree");
166 return NULL; 173 return NULL;
@@ -183,25 +190,36 @@ create_child(struct callchain_node *parent, bool inherit_children)
183 return new; 190 return new;
184} 191}
185 192
193
194struct resolved_ip {
195 u64 ip;
196 struct map_symbol ms;
197};
198
199struct resolved_chain {
200 u64 nr;
201 struct resolved_ip ips[0];
202};
203
204
186/* 205/*
187 * Fill the node with callchain values 206 * Fill the node with callchain values
188 */ 207 */
189static void 208static void
190fill_node(struct callchain_node *node, struct ip_callchain *chain, 209fill_node(struct callchain_node *node, struct resolved_chain *chain, int start)
191 int start, struct symbol **syms)
192{ 210{
193 unsigned int i; 211 unsigned int i;
194 212
195 for (i = start; i < chain->nr; i++) { 213 for (i = start; i < chain->nr; i++) {
196 struct callchain_list *call; 214 struct callchain_list *call;
197 215
198 call = malloc(sizeof(*call)); 216 call = zalloc(sizeof(*call));
199 if (!call) { 217 if (!call) {
200 perror("not enough memory for the code path tree"); 218 perror("not enough memory for the code path tree");
201 return; 219 return;
202 } 220 }
203 call->ip = chain->ips[i]; 221 call->ip = chain->ips[i].ip;
204 call->sym = syms[i]; 222 call->ms = chain->ips[i].ms;
205 list_add_tail(&call->list, &node->val); 223 list_add_tail(&call->list, &node->val);
206 } 224 }
207 node->val_nr = chain->nr - start; 225 node->val_nr = chain->nr - start;
@@ -210,13 +228,13 @@ fill_node(struct callchain_node *node, struct ip_callchain *chain,
210} 228}
211 229
212static void 230static void
213add_child(struct callchain_node *parent, struct ip_callchain *chain, 231add_child(struct callchain_node *parent, struct resolved_chain *chain,
214 int start, struct symbol **syms) 232 int start)
215{ 233{
216 struct callchain_node *new; 234 struct callchain_node *new;
217 235
218 new = create_child(parent, false); 236 new = create_child(parent, false);
219 fill_node(new, chain, start, syms); 237 fill_node(new, chain, start);
220 238
221 new->children_hit = 0; 239 new->children_hit = 0;
222 new->hit = 1; 240 new->hit = 1;
@@ -228,9 +246,8 @@ add_child(struct callchain_node *parent, struct ip_callchain *chain,
228 * Then create another child to host the given callchain of new branch 246 * Then create another child to host the given callchain of new branch
229 */ 247 */
230static void 248static void
231split_add_child(struct callchain_node *parent, struct ip_callchain *chain, 249split_add_child(struct callchain_node *parent, struct resolved_chain *chain,
232 struct callchain_list *to_split, int idx_parents, int idx_local, 250 struct callchain_list *to_split, int idx_parents, int idx_local)
233 struct symbol **syms)
234{ 251{
235 struct callchain_node *new; 252 struct callchain_node *new;
236 struct list_head *old_tail; 253 struct list_head *old_tail;
@@ -257,7 +274,7 @@ split_add_child(struct callchain_node *parent, struct ip_callchain *chain,
257 /* create a new child for the new branch if any */ 274 /* create a new child for the new branch if any */
258 if (idx_total < chain->nr) { 275 if (idx_total < chain->nr) {
259 parent->hit = 0; 276 parent->hit = 0;
260 add_child(parent, chain, idx_total, syms); 277 add_child(parent, chain, idx_total);
261 parent->children_hit++; 278 parent->children_hit++;
262 } else { 279 } else {
263 parent->hit = 1; 280 parent->hit = 1;
@@ -265,32 +282,33 @@ split_add_child(struct callchain_node *parent, struct ip_callchain *chain,
265} 282}
266 283
267static int 284static int
268__append_chain(struct callchain_node *root, struct ip_callchain *chain, 285__append_chain(struct callchain_node *root, struct resolved_chain *chain,
269 unsigned int start, struct symbol **syms); 286 unsigned int start);
270 287
271static void 288static void
272__append_chain_children(struct callchain_node *root, struct ip_callchain *chain, 289__append_chain_children(struct callchain_node *root,
273 struct symbol **syms, unsigned int start) 290 struct resolved_chain *chain,
291 unsigned int start)
274{ 292{
275 struct callchain_node *rnode; 293 struct callchain_node *rnode;
276 294
277 /* lookup in childrens */ 295 /* lookup in childrens */
278 chain_for_each_child(rnode, root) { 296 chain_for_each_child(rnode, root) {
279 unsigned int ret = __append_chain(rnode, chain, start, syms); 297 unsigned int ret = __append_chain(rnode, chain, start);
280 298
281 if (!ret) 299 if (!ret)
282 goto inc_children_hit; 300 goto inc_children_hit;
283 } 301 }
284 /* nothing in children, add to the current node */ 302 /* nothing in children, add to the current node */
285 add_child(root, chain, start, syms); 303 add_child(root, chain, start);
286 304
287inc_children_hit: 305inc_children_hit:
288 root->children_hit++; 306 root->children_hit++;
289} 307}
290 308
291static int 309static int
292__append_chain(struct callchain_node *root, struct ip_callchain *chain, 310__append_chain(struct callchain_node *root, struct resolved_chain *chain,
293 unsigned int start, struct symbol **syms) 311 unsigned int start)
294{ 312{
295 struct callchain_list *cnode; 313 struct callchain_list *cnode;
296 unsigned int i = start; 314 unsigned int i = start;
@@ -302,13 +320,19 @@ __append_chain(struct callchain_node *root, struct ip_callchain *chain,
302 * anywhere inside a function. 320 * anywhere inside a function.
303 */ 321 */
304 list_for_each_entry(cnode, &root->val, list) { 322 list_for_each_entry(cnode, &root->val, list) {
323 struct symbol *sym;
324
305 if (i == chain->nr) 325 if (i == chain->nr)
306 break; 326 break;
307 if (cnode->sym && syms[i]) { 327
308 if (cnode->sym->start != syms[i]->start) 328 sym = chain->ips[i].ms.sym;
329
330 if (cnode->ms.sym && sym) {
331 if (cnode->ms.sym->start != sym->start)
309 break; 332 break;
310 } else if (cnode->ip != chain->ips[i]) 333 } else if (cnode->ip != chain->ips[i].ip)
311 break; 334 break;
335
312 if (!found) 336 if (!found)
313 found = true; 337 found = true;
314 i++; 338 i++;
@@ -320,7 +344,7 @@ __append_chain(struct callchain_node *root, struct ip_callchain *chain,
320 344
321 /* we match only a part of the node. Split it and add the new chain */ 345 /* we match only a part of the node. Split it and add the new chain */
322 if (i - start < root->val_nr) { 346 if (i - start < root->val_nr) {
323 split_add_child(root, chain, cnode, start, i - start, syms); 347 split_add_child(root, chain, cnode, start, i - start);
324 return 0; 348 return 0;
325 } 349 }
326 350
@@ -331,15 +355,50 @@ __append_chain(struct callchain_node *root, struct ip_callchain *chain,
331 } 355 }
332 356
333 /* We match the node and still have a part remaining */ 357 /* We match the node and still have a part remaining */
334 __append_chain_children(root, chain, syms, i); 358 __append_chain_children(root, chain, i);
335 359
336 return 0; 360 return 0;
337} 361}
338 362
339void append_chain(struct callchain_node *root, struct ip_callchain *chain, 363static void filter_context(struct ip_callchain *old, struct resolved_chain *new,
340 struct symbol **syms) 364 struct map_symbol *syms)
341{ 365{
366 int i, j = 0;
367
368 for (i = 0; i < (int)old->nr; i++) {
369 if (old->ips[i] >= PERF_CONTEXT_MAX)
370 continue;
371
372 new->ips[j].ip = old->ips[i];
373 new->ips[j].ms = syms[i];
374 j++;
375 }
376
377 new->nr = j;
378}
379
380
381int append_chain(struct callchain_node *root, struct ip_callchain *chain,
382 struct map_symbol *syms)
383{
384 struct resolved_chain *filtered;
385
342 if (!chain->nr) 386 if (!chain->nr)
343 return; 387 return 0;
344 __append_chain_children(root, chain, syms, 0); 388
389 filtered = zalloc(sizeof(*filtered) +
390 chain->nr * sizeof(struct resolved_ip));
391 if (!filtered)
392 return -ENOMEM;
393
394 filter_context(chain, filtered, syms);
395
396 if (!filtered->nr)
397 goto end;
398
399 __append_chain_children(root, filtered, 0);
400end:
401 free(filtered);
402
403 return 0;
345} 404}
diff --git a/tools/perf/util/callchain.h b/tools/perf/util/callchain.h
index ad4626de4c2b..1cba1f5504e7 100644
--- a/tools/perf/util/callchain.h
+++ b/tools/perf/util/callchain.h
@@ -4,6 +4,7 @@
4#include "../perf.h" 4#include "../perf.h"
5#include <linux/list.h> 5#include <linux/list.h>
6#include <linux/rbtree.h> 6#include <linux/rbtree.h>
7#include "event.h"
7#include "util.h" 8#include "util.h"
8#include "symbol.h" 9#include "symbol.h"
9 10
@@ -33,13 +34,14 @@ typedef void (*sort_chain_func_t)(struct rb_root *, struct callchain_node *,
33 34
34struct callchain_param { 35struct callchain_param {
35 enum chain_mode mode; 36 enum chain_mode mode;
37 u32 print_limit;
36 double min_percent; 38 double min_percent;
37 sort_chain_func_t sort; 39 sort_chain_func_t sort;
38}; 40};
39 41
40struct callchain_list { 42struct callchain_list {
41 u64 ip; 43 u64 ip;
42 struct symbol *sym; 44 struct map_symbol ms;
43 struct list_head list; 45 struct list_head list;
44}; 46};
45 47
@@ -56,6 +58,8 @@ static inline u64 cumul_hits(struct callchain_node *node)
56} 58}
57 59
58int register_callchain_param(struct callchain_param *param); 60int register_callchain_param(struct callchain_param *param);
59void append_chain(struct callchain_node *root, struct ip_callchain *chain, 61int append_chain(struct callchain_node *root, struct ip_callchain *chain,
60 struct symbol **syms); 62 struct map_symbol *syms);
63
64bool ip_callchain__valid(struct ip_callchain *chain, event_t *event);
61#endif /* __PERF_CALLCHAIN_H */ 65#endif /* __PERF_CALLCHAIN_H */
diff --git a/tools/perf/util/color.c b/tools/perf/util/color.c
index e88bca55a599..e191eb9a667f 100644
--- a/tools/perf/util/color.c
+++ b/tools/perf/util/color.c
@@ -166,6 +166,31 @@ int perf_color_default_config(const char *var, const char *value, void *cb)
166 return perf_default_config(var, value, cb); 166 return perf_default_config(var, value, cb);
167} 167}
168 168
169static int __color_vsnprintf(char *bf, size_t size, const char *color,
170 const char *fmt, va_list args, const char *trail)
171{
172 int r = 0;
173
174 /*
175 * Auto-detect:
176 */
177 if (perf_use_color_default < 0) {
178 if (isatty(1) || pager_in_use())
179 perf_use_color_default = 1;
180 else
181 perf_use_color_default = 0;
182 }
183
184 if (perf_use_color_default && *color)
185 r += snprintf(bf, size, "%s", color);
186 r += vsnprintf(bf + r, size - r, fmt, args);
187 if (perf_use_color_default && *color)
188 r += snprintf(bf + r, size - r, "%s", PERF_COLOR_RESET);
189 if (trail)
190 r += snprintf(bf + r, size - r, "%s", trail);
191 return r;
192}
193
169static int __color_vfprintf(FILE *fp, const char *color, const char *fmt, 194static int __color_vfprintf(FILE *fp, const char *color, const char *fmt,
170 va_list args, const char *trail) 195 va_list args, const char *trail)
171{ 196{
@@ -191,11 +216,28 @@ static int __color_vfprintf(FILE *fp, const char *color, const char *fmt,
191 return r; 216 return r;
192} 217}
193 218
219int color_vsnprintf(char *bf, size_t size, const char *color,
220 const char *fmt, va_list args)
221{
222 return __color_vsnprintf(bf, size, color, fmt, args, NULL);
223}
224
194int color_vfprintf(FILE *fp, const char *color, const char *fmt, va_list args) 225int color_vfprintf(FILE *fp, const char *color, const char *fmt, va_list args)
195{ 226{
196 return __color_vfprintf(fp, color, fmt, args, NULL); 227 return __color_vfprintf(fp, color, fmt, args, NULL);
197} 228}
198 229
230int color_snprintf(char *bf, size_t size, const char *color,
231 const char *fmt, ...)
232{
233 va_list args;
234 int r;
235
236 va_start(args, fmt);
237 r = color_vsnprintf(bf, size, color, fmt, args);
238 va_end(args);
239 return r;
240}
199 241
200int color_fprintf(FILE *fp, const char *color, const char *fmt, ...) 242int color_fprintf(FILE *fp, const char *color, const char *fmt, ...)
201{ 243{
@@ -274,3 +316,9 @@ int percent_color_fprintf(FILE *fp, const char *fmt, double percent)
274 316
275 return r; 317 return r;
276} 318}
319
320int percent_color_snprintf(char *bf, size_t size, const char *fmt, double percent)
321{
322 const char *color = get_percent_color(percent);
323 return color_snprintf(bf, size, color, fmt, percent);
324}
diff --git a/tools/perf/util/color.h b/tools/perf/util/color.h
index 24e8809210bb..dea082b79602 100644
--- a/tools/perf/util/color.h
+++ b/tools/perf/util/color.h
@@ -32,10 +32,14 @@ int perf_color_default_config(const char *var, const char *value, void *cb);
32int perf_config_colorbool(const char *var, const char *value, int stdout_is_tty); 32int perf_config_colorbool(const char *var, const char *value, int stdout_is_tty);
33void color_parse(const char *value, const char *var, char *dst); 33void color_parse(const char *value, const char *var, char *dst);
34void color_parse_mem(const char *value, int len, const char *var, char *dst); 34void color_parse_mem(const char *value, int len, const char *var, char *dst);
35int color_vsnprintf(char *bf, size_t size, const char *color,
36 const char *fmt, va_list args);
35int color_vfprintf(FILE *fp, const char *color, const char *fmt, va_list args); 37int color_vfprintf(FILE *fp, const char *color, const char *fmt, va_list args);
36int color_fprintf(FILE *fp, const char *color, const char *fmt, ...); 38int color_fprintf(FILE *fp, const char *color, const char *fmt, ...);
39int color_snprintf(char *bf, size_t size, const char *color, const char *fmt, ...);
37int color_fprintf_ln(FILE *fp, const char *color, const char *fmt, ...); 40int color_fprintf_ln(FILE *fp, const char *color, const char *fmt, ...);
38int color_fwrite_lines(FILE *fp, const char *color, size_t count, const char *buf); 41int color_fwrite_lines(FILE *fp, const char *color, size_t count, const char *buf);
42int percent_color_snprintf(char *bf, size_t size, const char *fmt, double percent);
39int percent_color_fprintf(FILE *fp, const char *fmt, double percent); 43int percent_color_fprintf(FILE *fp, const char *fmt, double percent);
40const char *get_percent_color(double percent); 44const char *get_percent_color(double percent);
41 45
diff --git a/tools/perf/util/debug.c b/tools/perf/util/debug.c
index 0905600c3851..dd824cf3b628 100644
--- a/tools/perf/util/debug.c
+++ b/tools/perf/util/debug.c
@@ -6,13 +6,14 @@
6#include <stdarg.h> 6#include <stdarg.h>
7#include <stdio.h> 7#include <stdio.h>
8 8
9#include "cache.h"
9#include "color.h" 10#include "color.h"
10#include "event.h" 11#include "event.h"
11#include "debug.h" 12#include "debug.h"
12#include "util.h" 13#include "util.h"
13 14
14int verbose = 0; 15int verbose = 0;
15int dump_trace = 0; 16bool dump_trace = false;
16 17
17int eprintf(int level, const char *fmt, ...) 18int eprintf(int level, const char *fmt, ...)
18{ 19{
@@ -21,7 +22,10 @@ int eprintf(int level, const char *fmt, ...)
21 22
22 if (verbose >= level) { 23 if (verbose >= level) {
23 va_start(args, fmt); 24 va_start(args, fmt);
24 ret = vfprintf(stderr, fmt, args); 25 if (use_browser)
26 ret = browser__show_help(fmt, args);
27 else
28 ret = vfprintf(stderr, fmt, args);
25 va_end(args); 29 va_end(args);
26 } 30 }
27 31
diff --git a/tools/perf/util/debug.h b/tools/perf/util/debug.h
index c6c24c522dea..047ac3324ebe 100644
--- a/tools/perf/util/debug.h
+++ b/tools/perf/util/debug.h
@@ -2,14 +2,38 @@
2#ifndef __PERF_DEBUG_H 2#ifndef __PERF_DEBUG_H
3#define __PERF_DEBUG_H 3#define __PERF_DEBUG_H
4 4
5#include <stdbool.h>
5#include "event.h" 6#include "event.h"
6 7
7extern int verbose; 8extern int verbose;
8extern int dump_trace; 9extern bool dump_trace;
9 10
10int eprintf(int level,
11 const char *fmt, ...) __attribute__((format(printf, 2, 3)));
12int dump_printf(const char *fmt, ...) __attribute__((format(printf, 1, 2))); 11int dump_printf(const char *fmt, ...) __attribute__((format(printf, 1, 2)));
13void trace_event(event_t *event); 12void trace_event(event_t *event);
14 13
14struct ui_progress;
15
16#ifdef NO_NEWT_SUPPORT
17static inline int browser__show_help(const char *format __used, va_list ap __used)
18{
19 return 0;
20}
21
22static inline struct ui_progress *ui_progress__new(const char *title __used,
23 u64 total __used)
24{
25 return (struct ui_progress *)1;
26}
27
28static inline void ui_progress__update(struct ui_progress *self __used,
29 u64 curr __used) {}
30
31static inline void ui_progress__delete(struct ui_progress *self __used) {}
32#else
33int browser__show_help(const char *format, va_list ap);
34struct ui_progress *ui_progress__new(const char *title, u64 total);
35void ui_progress__update(struct ui_progress *self, u64 curr);
36void ui_progress__delete(struct ui_progress *self);
37#endif
38
15#endif /* __PERF_DEBUG_H */ 39#endif /* __PERF_DEBUG_H */
diff --git a/tools/perf/util/event.c b/tools/perf/util/event.c
index 705ec63548b4..50771b5813ee 100644
--- a/tools/perf/util/event.c
+++ b/tools/perf/util/event.c
@@ -7,6 +7,23 @@
7#include "strlist.h" 7#include "strlist.h"
8#include "thread.h" 8#include "thread.h"
9 9
10const char *event__name[] = {
11 [0] = "TOTAL",
12 [PERF_RECORD_MMAP] = "MMAP",
13 [PERF_RECORD_LOST] = "LOST",
14 [PERF_RECORD_COMM] = "COMM",
15 [PERF_RECORD_EXIT] = "EXIT",
16 [PERF_RECORD_THROTTLE] = "THROTTLE",
17 [PERF_RECORD_UNTHROTTLE] = "UNTHROTTLE",
18 [PERF_RECORD_FORK] = "FORK",
19 [PERF_RECORD_READ] = "READ",
20 [PERF_RECORD_SAMPLE] = "SAMPLE",
21 [PERF_RECORD_HEADER_ATTR] = "ATTR",
22 [PERF_RECORD_HEADER_EVENT_TYPE] = "EVENT_TYPE",
23 [PERF_RECORD_HEADER_TRACING_DATA] = "TRACING_DATA",
24 [PERF_RECORD_HEADER_BUILD_ID] = "BUILD_ID",
25};
26
10static pid_t event__synthesize_comm(pid_t pid, int full, 27static pid_t event__synthesize_comm(pid_t pid, int full,
11 event__handler_t process, 28 event__handler_t process,
12 struct perf_session *session) 29 struct perf_session *session)
@@ -112,7 +129,11 @@ static int event__synthesize_mmap_events(pid_t pid, pid_t tgid,
112 event_t ev = { 129 event_t ev = {
113 .header = { 130 .header = {
114 .type = PERF_RECORD_MMAP, 131 .type = PERF_RECORD_MMAP,
115 .misc = 0, /* Just like the kernel, see kernel/perf_event.c __perf_event_mmap */ 132 /*
133 * Just like the kernel, see __perf_event_mmap
134 * in kernel/perf_event.c
135 */
136 .misc = PERF_RECORD_MISC_USER,
116 }, 137 },
117 }; 138 };
118 int n; 139 int n;
@@ -130,6 +151,7 @@ static int event__synthesize_mmap_events(pid_t pid, pid_t tgid,
130 continue; 151 continue;
131 pbf += n + 3; 152 pbf += n + 3;
132 if (*pbf == 'x') { /* vm_exec */ 153 if (*pbf == 'x') { /* vm_exec */
154 u64 vm_pgoff;
133 char *execname = strchr(bf, '/'); 155 char *execname = strchr(bf, '/');
134 156
135 /* Catch VDSO */ 157 /* Catch VDSO */
@@ -139,6 +161,14 @@ static int event__synthesize_mmap_events(pid_t pid, pid_t tgid,
139 if (execname == NULL) 161 if (execname == NULL)
140 continue; 162 continue;
141 163
164 pbf += 3;
165 n = hex2u64(pbf, &vm_pgoff);
166 /* pgoff is in bytes, not pages */
167 if (n >= 0)
168 ev.mmap.pgoff = vm_pgoff << getpagesize();
169 else
170 ev.mmap.pgoff = 0;
171
142 size = strlen(execname); 172 size = strlen(execname);
143 execname[size - 1] = '\0'; /* Remove \n */ 173 execname[size - 1] = '\0'; /* Remove \n */
144 memcpy(ev.mmap.filename, execname, size); 174 memcpy(ev.mmap.filename, execname, size);
@@ -158,11 +188,23 @@ static int event__synthesize_mmap_events(pid_t pid, pid_t tgid,
158} 188}
159 189
160int event__synthesize_modules(event__handler_t process, 190int event__synthesize_modules(event__handler_t process,
161 struct perf_session *session) 191 struct perf_session *session,
192 struct machine *machine)
162{ 193{
163 struct rb_node *nd; 194 struct rb_node *nd;
195 struct map_groups *kmaps = &machine->kmaps;
196 u16 misc;
197
198 /*
199 * kernel uses 0 for user space maps, see kernel/perf_event.c
200 * __perf_event_mmap
201 */
202 if (machine__is_host(machine))
203 misc = PERF_RECORD_MISC_KERNEL;
204 else
205 misc = PERF_RECORD_MISC_GUEST_KERNEL;
164 206
165 for (nd = rb_first(&session->kmaps.maps[MAP__FUNCTION]); 207 for (nd = rb_first(&kmaps->maps[MAP__FUNCTION]);
166 nd; nd = rb_next(nd)) { 208 nd; nd = rb_next(nd)) {
167 event_t ev; 209 event_t ev;
168 size_t size; 210 size_t size;
@@ -173,12 +215,13 @@ int event__synthesize_modules(event__handler_t process,
173 215
174 size = ALIGN(pos->dso->long_name_len + 1, sizeof(u64)); 216 size = ALIGN(pos->dso->long_name_len + 1, sizeof(u64));
175 memset(&ev, 0, sizeof(ev)); 217 memset(&ev, 0, sizeof(ev));
176 ev.mmap.header.misc = 1; /* kernel uses 0 for user space maps, see kernel/perf_event.c __perf_event_mmap */ 218 ev.mmap.header.misc = misc;
177 ev.mmap.header.type = PERF_RECORD_MMAP; 219 ev.mmap.header.type = PERF_RECORD_MMAP;
178 ev.mmap.header.size = (sizeof(ev.mmap) - 220 ev.mmap.header.size = (sizeof(ev.mmap) -
179 (sizeof(ev.mmap.filename) - size)); 221 (sizeof(ev.mmap.filename) - size));
180 ev.mmap.start = pos->start; 222 ev.mmap.start = pos->start;
181 ev.mmap.len = pos->end - pos->start; 223 ev.mmap.len = pos->end - pos->start;
224 ev.mmap.pid = machine->pid;
182 225
183 memcpy(ev.mmap.filename, pos->dso->long_name, 226 memcpy(ev.mmap.filename, pos->dso->long_name,
184 pos->dso->long_name_len + 1); 227 pos->dso->long_name_len + 1);
@@ -241,13 +284,18 @@ static int find_symbol_cb(void *arg, const char *name, char type, u64 start)
241 284
242int event__synthesize_kernel_mmap(event__handler_t process, 285int event__synthesize_kernel_mmap(event__handler_t process,
243 struct perf_session *session, 286 struct perf_session *session,
287 struct machine *machine,
244 const char *symbol_name) 288 const char *symbol_name)
245{ 289{
246 size_t size; 290 size_t size;
291 const char *filename, *mmap_name;
292 char path[PATH_MAX];
293 char name_buff[PATH_MAX];
294 struct map *map;
295
247 event_t ev = { 296 event_t ev = {
248 .header = { 297 .header = {
249 .type = PERF_RECORD_MMAP, 298 .type = PERF_RECORD_MMAP,
250 .misc = 1, /* kernel uses 0 for user space maps, see kernel/perf_event.c __perf_event_mmap */
251 }, 299 },
252 }; 300 };
253 /* 301 /*
@@ -257,16 +305,37 @@ int event__synthesize_kernel_mmap(event__handler_t process,
257 */ 305 */
258 struct process_symbol_args args = { .name = symbol_name, }; 306 struct process_symbol_args args = { .name = symbol_name, };
259 307
260 if (kallsyms__parse("/proc/kallsyms", &args, find_symbol_cb) <= 0) 308 mmap_name = machine__mmap_name(machine, name_buff, sizeof(name_buff));
309 if (machine__is_host(machine)) {
310 /*
311 * kernel uses PERF_RECORD_MISC_USER for user space maps,
312 * see kernel/perf_event.c __perf_event_mmap
313 */
314 ev.header.misc = PERF_RECORD_MISC_KERNEL;
315 filename = "/proc/kallsyms";
316 } else {
317 ev.header.misc = PERF_RECORD_MISC_GUEST_KERNEL;
318 if (machine__is_default_guest(machine))
319 filename = (char *) symbol_conf.default_guest_kallsyms;
320 else {
321 sprintf(path, "%s/proc/kallsyms", machine->root_dir);
322 filename = path;
323 }
324 }
325
326 if (kallsyms__parse(filename, &args, find_symbol_cb) <= 0)
261 return -ENOENT; 327 return -ENOENT;
262 328
329 map = machine->vmlinux_maps[MAP__FUNCTION];
263 size = snprintf(ev.mmap.filename, sizeof(ev.mmap.filename), 330 size = snprintf(ev.mmap.filename, sizeof(ev.mmap.filename),
264 "[kernel.kallsyms.%s]", symbol_name) + 1; 331 "%s%s", mmap_name, symbol_name) + 1;
265 size = ALIGN(size, sizeof(u64)); 332 size = ALIGN(size, sizeof(u64));
266 ev.mmap.header.size = (sizeof(ev.mmap) - (sizeof(ev.mmap.filename) - size)); 333 ev.mmap.header.size = (sizeof(ev.mmap) -
334 (sizeof(ev.mmap.filename) - size));
267 ev.mmap.pgoff = args.start; 335 ev.mmap.pgoff = args.start;
268 ev.mmap.start = session->vmlinux_maps[MAP__FUNCTION]->start; 336 ev.mmap.start = map->start;
269 ev.mmap.len = session->vmlinux_maps[MAP__FUNCTION]->end - ev.mmap.start ; 337 ev.mmap.len = map->end - ev.mmap.start;
338 ev.mmap.pid = machine->pid;
270 339
271 return process(&ev, session); 340 return process(&ev, session);
272} 341}
@@ -316,26 +385,54 @@ int event__process_comm(event_t *self, struct perf_session *session)
316int event__process_lost(event_t *self, struct perf_session *session) 385int event__process_lost(event_t *self, struct perf_session *session)
317{ 386{
318 dump_printf(": id:%Ld: lost:%Ld\n", self->lost.id, self->lost.lost); 387 dump_printf(": id:%Ld: lost:%Ld\n", self->lost.id, self->lost.lost);
319 session->events_stats.lost += self->lost.lost; 388 session->hists.stats.total_lost += self->lost.lost;
320 return 0; 389 return 0;
321} 390}
322 391
323int event__process_mmap(event_t *self, struct perf_session *session) 392static void event_set_kernel_mmap_len(struct map **maps, event_t *self)
393{
394 maps[MAP__FUNCTION]->start = self->mmap.start;
395 maps[MAP__FUNCTION]->end = self->mmap.start + self->mmap.len;
396 /*
397 * Be a bit paranoid here, some perf.data file came with
398 * a zero sized synthesized MMAP event for the kernel.
399 */
400 if (maps[MAP__FUNCTION]->end == 0)
401 maps[MAP__FUNCTION]->end = ~0UL;
402}
403
404static int event__process_kernel_mmap(event_t *self,
405 struct perf_session *session)
324{ 406{
325 struct thread *thread;
326 struct map *map; 407 struct map *map;
408 char kmmap_prefix[PATH_MAX];
409 struct machine *machine;
410 enum dso_kernel_type kernel_type;
411 bool is_kernel_mmap;
412
413 machine = perf_session__findnew_machine(session, self->mmap.pid);
414 if (!machine) {
415 pr_err("Can't find id %d's machine\n", self->mmap.pid);
416 goto out_problem;
417 }
327 418
328 dump_printf(" %d/%d: [%#Lx(%#Lx) @ %#Lx]: %s\n", 419 machine__mmap_name(machine, kmmap_prefix, sizeof(kmmap_prefix));
329 self->mmap.pid, self->mmap.tid, self->mmap.start, 420 if (machine__is_host(machine))
330 self->mmap.len, self->mmap.pgoff, self->mmap.filename); 421 kernel_type = DSO_TYPE_KERNEL;
422 else
423 kernel_type = DSO_TYPE_GUEST_KERNEL;
331 424
332 if (self->mmap.pid == 0) { 425 is_kernel_mmap = memcmp(self->mmap.filename,
333 static const char kmmap_prefix[] = "[kernel.kallsyms."; 426 kmmap_prefix,
427 strlen(kmmap_prefix)) == 0;
428 if (self->mmap.filename[0] == '/' ||
429 (!is_kernel_mmap && self->mmap.filename[0] == '[')) {
334 430
335 if (self->mmap.filename[0] == '/') { 431 char short_module_name[1024];
336 char short_module_name[1024]; 432 char *name, *dot;
337 char *name = strrchr(self->mmap.filename, '/'), *dot;
338 433
434 if (self->mmap.filename[0] == '/') {
435 name = strrchr(self->mmap.filename, '/');
339 if (name == NULL) 436 if (name == NULL)
340 goto out_problem; 437 goto out_problem;
341 438
@@ -343,58 +440,84 @@ int event__process_mmap(event_t *self, struct perf_session *session)
343 dot = strrchr(name, '.'); 440 dot = strrchr(name, '.');
344 if (dot == NULL) 441 if (dot == NULL)
345 goto out_problem; 442 goto out_problem;
346
347 snprintf(short_module_name, sizeof(short_module_name), 443 snprintf(short_module_name, sizeof(short_module_name),
348 "[%.*s]", (int)(dot - name), name); 444 "[%.*s]", (int)(dot - name), name);
349 strxfrchar(short_module_name, '-', '_'); 445 strxfrchar(short_module_name, '-', '_');
350 446 } else
351 map = perf_session__new_module_map(session, 447 strcpy(short_module_name, self->mmap.filename);
352 self->mmap.start, 448
353 self->mmap.filename); 449 map = machine__new_module(machine, self->mmap.start,
354 if (map == NULL) 450 self->mmap.filename);
355 goto out_problem; 451 if (map == NULL)
356 452 goto out_problem;
357 name = strdup(short_module_name); 453
358 if (name == NULL) 454 name = strdup(short_module_name);
359 goto out_problem; 455 if (name == NULL)
360 456 goto out_problem;
361 map->dso->short_name = name; 457
362 map->end = map->start + self->mmap.len; 458 map->dso->short_name = name;
363 } else if (memcmp(self->mmap.filename, kmmap_prefix, 459 map->end = map->start + self->mmap.len;
364 sizeof(kmmap_prefix) - 1) == 0) { 460 } else if (is_kernel_mmap) {
365 const char *symbol_name = (self->mmap.filename + 461 const char *symbol_name = (self->mmap.filename +
366 sizeof(kmmap_prefix) - 1); 462 strlen(kmmap_prefix));
463 /*
464 * Should be there already, from the build-id table in
465 * the header.
466 */
467 struct dso *kernel = __dsos__findnew(&machine->kernel_dsos,
468 kmmap_prefix);
469 if (kernel == NULL)
470 goto out_problem;
471
472 kernel->kernel = kernel_type;
473 if (__machine__create_kernel_maps(machine, kernel) < 0)
474 goto out_problem;
475
476 event_set_kernel_mmap_len(machine->vmlinux_maps, self);
477 perf_session__set_kallsyms_ref_reloc_sym(machine->vmlinux_maps,
478 symbol_name,
479 self->mmap.pgoff);
480 if (machine__is_default_guest(machine)) {
367 /* 481 /*
368 * Should be there already, from the build-id table in 482 * preload dso of guest kernel and modules
369 * the header.
370 */ 483 */
371 struct dso *kernel = __dsos__findnew(&dsos__kernel, 484 dso__load(kernel, machine->vmlinux_maps[MAP__FUNCTION],
372 "[kernel.kallsyms]"); 485 NULL);
373 if (kernel == NULL) 486 }
374 goto out_problem; 487 }
375 488 return 0;
376 kernel->kernel = 1; 489out_problem:
377 if (__perf_session__create_kernel_maps(session, kernel) < 0) 490 return -1;
378 goto out_problem; 491}
379 492
380 session->vmlinux_maps[MAP__FUNCTION]->start = self->mmap.start; 493int event__process_mmap(event_t *self, struct perf_session *session)
381 session->vmlinux_maps[MAP__FUNCTION]->end = self->mmap.start + self->mmap.len; 494{
382 /* 495 struct machine *machine;
383 * Be a bit paranoid here, some perf.data file came with 496 struct thread *thread;
384 * a zero sized synthesized MMAP event for the kernel. 497 struct map *map;
385 */ 498 u8 cpumode = self->header.misc & PERF_RECORD_MISC_CPUMODE_MASK;
386 if (session->vmlinux_maps[MAP__FUNCTION]->end == 0) 499 int ret = 0;
387 session->vmlinux_maps[MAP__FUNCTION]->end = ~0UL;
388 500
389 perf_session__set_kallsyms_ref_reloc_sym(session, symbol_name, 501 dump_printf(" %d/%d: [%#Lx(%#Lx) @ %#Lx]: %s\n",
390 self->mmap.pgoff); 502 self->mmap.pid, self->mmap.tid, self->mmap.start,
391 } 503 self->mmap.len, self->mmap.pgoff, self->mmap.filename);
504
505 if (cpumode == PERF_RECORD_MISC_GUEST_KERNEL ||
506 cpumode == PERF_RECORD_MISC_KERNEL) {
507 ret = event__process_kernel_mmap(self, session);
508 if (ret < 0)
509 goto out_problem;
392 return 0; 510 return 0;
393 } 511 }
394 512
513 machine = perf_session__find_host_machine(session);
514 if (machine == NULL)
515 goto out_problem;
395 thread = perf_session__findnew(session, self->mmap.pid); 516 thread = perf_session__findnew(session, self->mmap.pid);
396 map = map__new(&self->mmap, MAP__FUNCTION, 517 map = map__new(&machine->user_dsos, self->mmap.start,
397 session->cwd, session->cwdlen); 518 self->mmap.len, self->mmap.pgoff,
519 self->mmap.pid, self->mmap.filename,
520 MAP__FUNCTION, session->cwd, session->cwdlen);
398 521
399 if (thread == NULL || map == NULL) 522 if (thread == NULL || map == NULL)
400 goto out_problem; 523 goto out_problem;
@@ -434,22 +557,56 @@ int event__process_task(event_t *self, struct perf_session *session)
434 557
435void thread__find_addr_map(struct thread *self, 558void thread__find_addr_map(struct thread *self,
436 struct perf_session *session, u8 cpumode, 559 struct perf_session *session, u8 cpumode,
437 enum map_type type, u64 addr, 560 enum map_type type, pid_t pid, u64 addr,
438 struct addr_location *al) 561 struct addr_location *al)
439{ 562{
440 struct map_groups *mg = &self->mg; 563 struct map_groups *mg = &self->mg;
564 struct machine *machine = NULL;
441 565
442 al->thread = self; 566 al->thread = self;
443 al->addr = addr; 567 al->addr = addr;
568 al->cpumode = cpumode;
569 al->filtered = false;
444 570
445 if (cpumode == PERF_RECORD_MISC_KERNEL) { 571 if (cpumode == PERF_RECORD_MISC_KERNEL && perf_host) {
446 al->level = 'k'; 572 al->level = 'k';
447 mg = &session->kmaps; 573 machine = perf_session__find_host_machine(session);
448 } else if (cpumode == PERF_RECORD_MISC_USER) 574 if (machine == NULL) {
575 al->map = NULL;
576 return;
577 }
578 mg = &machine->kmaps;
579 } else if (cpumode == PERF_RECORD_MISC_USER && perf_host) {
449 al->level = '.'; 580 al->level = '.';
450 else { 581 machine = perf_session__find_host_machine(session);
451 al->level = 'H'; 582 } else if (cpumode == PERF_RECORD_MISC_GUEST_KERNEL && perf_guest) {
583 al->level = 'g';
584 machine = perf_session__find_machine(session, pid);
585 if (machine == NULL) {
586 al->map = NULL;
587 return;
588 }
589 mg = &machine->kmaps;
590 } else {
591 /*
592 * 'u' means guest os user space.
593 * TODO: We don't support guest user space. Might support late.
594 */
595 if (cpumode == PERF_RECORD_MISC_GUEST_USER && perf_guest)
596 al->level = 'u';
597 else
598 al->level = 'H';
452 al->map = NULL; 599 al->map = NULL;
600
601 if ((cpumode == PERF_RECORD_MISC_GUEST_USER ||
602 cpumode == PERF_RECORD_MISC_GUEST_KERNEL) &&
603 !perf_guest)
604 al->filtered = true;
605 if ((cpumode == PERF_RECORD_MISC_USER ||
606 cpumode == PERF_RECORD_MISC_KERNEL) &&
607 !perf_host)
608 al->filtered = true;
609
453 return; 610 return;
454 } 611 }
455try_again: 612try_again:
@@ -464,8 +621,10 @@ try_again:
464 * "[vdso]" dso, but for now lets use the old trick of looking 621 * "[vdso]" dso, but for now lets use the old trick of looking
465 * in the whole kernel symbol list. 622 * in the whole kernel symbol list.
466 */ 623 */
467 if ((long long)al->addr < 0 && mg != &session->kmaps) { 624 if ((long long)al->addr < 0 &&
468 mg = &session->kmaps; 625 cpumode == PERF_RECORD_MISC_KERNEL &&
626 machine && mg != &machine->kmaps) {
627 mg = &machine->kmaps;
469 goto try_again; 628 goto try_again;
470 } 629 }
471 } else 630 } else
@@ -474,11 +633,11 @@ try_again:
474 633
475void thread__find_addr_location(struct thread *self, 634void thread__find_addr_location(struct thread *self,
476 struct perf_session *session, u8 cpumode, 635 struct perf_session *session, u8 cpumode,
477 enum map_type type, u64 addr, 636 enum map_type type, pid_t pid, u64 addr,
478 struct addr_location *al, 637 struct addr_location *al,
479 symbol_filter_t filter) 638 symbol_filter_t filter)
480{ 639{
481 thread__find_addr_map(self, session, cpumode, type, addr, al); 640 thread__find_addr_map(self, session, cpumode, type, pid, addr, al);
482 if (al->map != NULL) 641 if (al->map != NULL)
483 al->sym = map__find_symbol(al->map, al->addr, filter); 642 al->sym = map__find_symbol(al->map, al->addr, filter);
484 else 643 else
@@ -490,8 +649,10 @@ static void dso__calc_col_width(struct dso *self)
490 if (!symbol_conf.col_width_list_str && !symbol_conf.field_sep && 649 if (!symbol_conf.col_width_list_str && !symbol_conf.field_sep &&
491 (!symbol_conf.dso_list || 650 (!symbol_conf.dso_list ||
492 strlist__has_entry(symbol_conf.dso_list, self->name))) { 651 strlist__has_entry(symbol_conf.dso_list, self->name))) {
493 unsigned int slen = strlen(self->name); 652 u16 slen = self->short_name_len;
494 if (slen > dsos__col_width) 653 if (verbose)
654 slen = self->long_name_len;
655 if (dsos__col_width < slen)
495 dsos__col_width = slen; 656 dsos__col_width = slen;
496 } 657 }
497 658
@@ -512,31 +673,55 @@ int event__preprocess_sample(const event_t *self, struct perf_session *session,
512 goto out_filtered; 673 goto out_filtered;
513 674
514 dump_printf(" ... thread: %s:%d\n", thread->comm, thread->pid); 675 dump_printf(" ... thread: %s:%d\n", thread->comm, thread->pid);
676 /*
677 * Have we already created the kernel maps for the host machine?
678 *
679 * This should have happened earlier, when we processed the kernel MMAP
680 * events, but for older perf.data files there was no such thing, so do
681 * it now.
682 */
683 if (cpumode == PERF_RECORD_MISC_KERNEL &&
684 session->host_machine.vmlinux_maps[MAP__FUNCTION] == NULL)
685 machine__create_kernel_maps(&session->host_machine);
515 686
516 thread__find_addr_location(thread, session, cpumode, MAP__FUNCTION, 687 thread__find_addr_map(thread, session, cpumode, MAP__FUNCTION,
517 self->ip.ip, al, filter); 688 self->ip.pid, self->ip.ip, al);
518 dump_printf(" ...... dso: %s\n", 689 dump_printf(" ...... dso: %s\n",
519 al->map ? al->map->dso->long_name : 690 al->map ? al->map->dso->long_name :
520 al->level == 'H' ? "[hypervisor]" : "<not found>"); 691 al->level == 'H' ? "[hypervisor]" : "<not found>");
521 /* 692 al->sym = NULL;
522 * We have to do this here as we may have a dso with no symbol hit that 693
523 * has a name longer than the ones with symbols sampled. 694 if (al->map) {
524 */ 695 if (symbol_conf.dso_list &&
525 if (al->map && !sort_dso.elide && !al->map->dso->slen_calculated) 696 (!al->map || !al->map->dso ||
526 dso__calc_col_width(al->map->dso); 697 !(strlist__has_entry(symbol_conf.dso_list,
527 698 al->map->dso->short_name) ||
528 if (symbol_conf.dso_list && 699 (al->map->dso->short_name != al->map->dso->long_name &&
529 (!al->map || !al->map->dso || 700 strlist__has_entry(symbol_conf.dso_list,
530 !(strlist__has_entry(symbol_conf.dso_list, al->map->dso->short_name) || 701 al->map->dso->long_name)))))
531 (al->map->dso->short_name != al->map->dso->long_name && 702 goto out_filtered;
532 strlist__has_entry(symbol_conf.dso_list, al->map->dso->long_name))))) 703 /*
533 goto out_filtered; 704 * We have to do this here as we may have a dso with no symbol
705 * hit that has a name longer than the ones with symbols
706 * sampled.
707 */
708 if (!sort_dso.elide && !al->map->dso->slen_calculated)
709 dso__calc_col_width(al->map->dso);
710
711 al->sym = map__find_symbol(al->map, al->addr, filter);
712 } else {
713 const unsigned int unresolved_col_width = BITS_PER_LONG / 4;
714
715 if (dsos__col_width < unresolved_col_width &&
716 !symbol_conf.col_width_list_str && !symbol_conf.field_sep &&
717 !symbol_conf.dso_list)
718 dsos__col_width = unresolved_col_width;
719 }
534 720
535 if (symbol_conf.sym_list && al->sym && 721 if (symbol_conf.sym_list && al->sym &&
536 !strlist__has_entry(symbol_conf.sym_list, al->sym->name)) 722 !strlist__has_entry(symbol_conf.sym_list, al->sym->name))
537 goto out_filtered; 723 goto out_filtered;
538 724
539 al->filtered = false;
540 return 0; 725 return 0;
541 726
542out_filtered: 727out_filtered:
@@ -570,6 +755,7 @@ int event__parse_sample(event_t *event, u64 type, struct sample_data *data)
570 array++; 755 array++;
571 } 756 }
572 757
758 data->id = -1ULL;
573 if (type & PERF_SAMPLE_ID) { 759 if (type & PERF_SAMPLE_ID) {
574 data->id = *array; 760 data->id = *array;
575 array++; 761 array++;
diff --git a/tools/perf/util/event.h b/tools/perf/util/event.h
index a33b94952e34..8577085db067 100644
--- a/tools/perf/util/event.h
+++ b/tools/perf/util/event.h
@@ -68,21 +68,54 @@ struct sample_data {
68 u64 addr; 68 u64 addr;
69 u64 id; 69 u64 id;
70 u64 stream_id; 70 u64 stream_id;
71 u32 cpu;
72 u64 period; 71 u64 period;
73 struct ip_callchain *callchain; 72 u32 cpu;
74 u32 raw_size; 73 u32 raw_size;
75 void *raw_data; 74 void *raw_data;
75 struct ip_callchain *callchain;
76}; 76};
77 77
78#define BUILD_ID_SIZE 20 78#define BUILD_ID_SIZE 20
79 79
80struct build_id_event { 80struct build_id_event {
81 struct perf_event_header header; 81 struct perf_event_header header;
82 pid_t pid;
82 u8 build_id[ALIGN(BUILD_ID_SIZE, sizeof(u64))]; 83 u8 build_id[ALIGN(BUILD_ID_SIZE, sizeof(u64))];
83 char filename[]; 84 char filename[];
84}; 85};
85 86
87enum perf_user_event_type { /* above any possible kernel type */
88 PERF_RECORD_HEADER_ATTR = 64,
89 PERF_RECORD_HEADER_EVENT_TYPE = 65,
90 PERF_RECORD_HEADER_TRACING_DATA = 66,
91 PERF_RECORD_HEADER_BUILD_ID = 67,
92 PERF_RECORD_FINISHED_ROUND = 68,
93 PERF_RECORD_HEADER_MAX
94};
95
96struct attr_event {
97 struct perf_event_header header;
98 struct perf_event_attr attr;
99 u64 id[];
100};
101
102#define MAX_EVENT_NAME 64
103
104struct perf_trace_event_type {
105 u64 event_id;
106 char name[MAX_EVENT_NAME];
107};
108
109struct event_type_event {
110 struct perf_event_header header;
111 struct perf_trace_event_type event_type;
112};
113
114struct tracing_data_event {
115 struct perf_event_header header;
116 u32 size;
117};
118
86typedef union event_union { 119typedef union event_union {
87 struct perf_event_header header; 120 struct perf_event_header header;
88 struct ip_event ip; 121 struct ip_event ip;
@@ -92,22 +125,12 @@ typedef union event_union {
92 struct lost_event lost; 125 struct lost_event lost;
93 struct read_event read; 126 struct read_event read;
94 struct sample_event sample; 127 struct sample_event sample;
128 struct attr_event attr;
129 struct event_type_event event_type;
130 struct tracing_data_event tracing_data;
131 struct build_id_event build_id;
95} event_t; 132} event_t;
96 133
97struct events_stats {
98 u64 total;
99 u64 lost;
100};
101
102struct event_stat_id {
103 struct rb_node rb_node;
104 struct rb_root hists;
105 struct events_stats stats;
106 u64 config;
107 u64 event_stream;
108 u32 type;
109};
110
111void event__print_totals(void); 134void event__print_totals(void);
112 135
113struct perf_session; 136struct perf_session;
@@ -119,10 +142,13 @@ int event__synthesize_thread(pid_t pid, event__handler_t process,
119void event__synthesize_threads(event__handler_t process, 142void event__synthesize_threads(event__handler_t process,
120 struct perf_session *session); 143 struct perf_session *session);
121int event__synthesize_kernel_mmap(event__handler_t process, 144int event__synthesize_kernel_mmap(event__handler_t process,
122 struct perf_session *session, 145 struct perf_session *session,
123 const char *symbol_name); 146 struct machine *machine,
147 const char *symbol_name);
148
124int event__synthesize_modules(event__handler_t process, 149int event__synthesize_modules(event__handler_t process,
125 struct perf_session *session); 150 struct perf_session *session,
151 struct machine *machine);
126 152
127int event__process_comm(event_t *self, struct perf_session *session); 153int event__process_comm(event_t *self, struct perf_session *session);
128int event__process_lost(event_t *self, struct perf_session *session); 154int event__process_lost(event_t *self, struct perf_session *session);
@@ -134,4 +160,6 @@ int event__preprocess_sample(const event_t *self, struct perf_session *session,
134 struct addr_location *al, symbol_filter_t filter); 160 struct addr_location *al, symbol_filter_t filter);
135int event__parse_sample(event_t *event, u64 type, struct sample_data *data); 161int event__parse_sample(event_t *event, u64 type, struct sample_data *data);
136 162
163extern const char *event__name[];
164
137#endif /* __PERF_RECORD_H */ 165#endif /* __PERF_RECORD_H */
diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
index 6c9aa16ee51f..8847bec64c54 100644
--- a/tools/perf/util/header.c
+++ b/tools/perf/util/header.c
@@ -99,13 +99,6 @@ int perf_header__add_attr(struct perf_header *self,
99 return 0; 99 return 0;
100} 100}
101 101
102#define MAX_EVENT_NAME 64
103
104struct perf_trace_event_type {
105 u64 event_id;
106 char name[MAX_EVENT_NAME];
107};
108
109static int event_count; 102static int event_count;
110static struct perf_trace_event_type *events; 103static struct perf_trace_event_type *events;
111 104
@@ -197,7 +190,8 @@ static int write_padded(int fd, const void *bf, size_t count,
197 continue; \ 190 continue; \
198 else 191 else
199 192
200static int __dsos__write_buildid_table(struct list_head *head, u16 misc, int fd) 193static int __dsos__write_buildid_table(struct list_head *head, pid_t pid,
194 u16 misc, int fd)
201{ 195{
202 struct dso *pos; 196 struct dso *pos;
203 197
@@ -212,6 +206,7 @@ static int __dsos__write_buildid_table(struct list_head *head, u16 misc, int fd)
212 len = ALIGN(len, NAME_ALIGN); 206 len = ALIGN(len, NAME_ALIGN);
213 memset(&b, 0, sizeof(b)); 207 memset(&b, 0, sizeof(b));
214 memcpy(&b.build_id, pos->build_id, sizeof(pos->build_id)); 208 memcpy(&b.build_id, pos->build_id, sizeof(pos->build_id));
209 b.pid = pid;
215 b.header.misc = misc; 210 b.header.misc = misc;
216 b.header.size = sizeof(b) + len; 211 b.header.size = sizeof(b) + len;
217 err = do_write(fd, &b, sizeof(b)); 212 err = do_write(fd, &b, sizeof(b));
@@ -226,13 +221,32 @@ static int __dsos__write_buildid_table(struct list_head *head, u16 misc, int fd)
226 return 0; 221 return 0;
227} 222}
228 223
229static int dsos__write_buildid_table(int fd) 224static int dsos__write_buildid_table(struct perf_header *header, int fd)
230{ 225{
231 int err = __dsos__write_buildid_table(&dsos__kernel, 226 struct perf_session *session = container_of(header,
232 PERF_RECORD_MISC_KERNEL, fd); 227 struct perf_session, header);
233 if (err == 0) 228 struct rb_node *nd;
234 err = __dsos__write_buildid_table(&dsos__user, 229 int err = 0;
235 PERF_RECORD_MISC_USER, fd); 230 u16 kmisc, umisc;
231
232 for (nd = rb_first(&session->machines); nd; nd = rb_next(nd)) {
233 struct machine *pos = rb_entry(nd, struct machine, rb_node);
234 if (machine__is_host(pos)) {
235 kmisc = PERF_RECORD_MISC_KERNEL;
236 umisc = PERF_RECORD_MISC_USER;
237 } else {
238 kmisc = PERF_RECORD_MISC_GUEST_KERNEL;
239 umisc = PERF_RECORD_MISC_GUEST_USER;
240 }
241
242 err = __dsos__write_buildid_table(&pos->kernel_dsos, pos->pid,
243 kmisc, fd);
244 if (err == 0)
245 err = __dsos__write_buildid_table(&pos->user_dsos,
246 pos->pid, umisc, fd);
247 if (err)
248 break;
249 }
236 return err; 250 return err;
237} 251}
238 252
@@ -349,9 +363,12 @@ static int __dsos__cache_build_ids(struct list_head *head, const char *debugdir)
349 return err; 363 return err;
350} 364}
351 365
352static int dsos__cache_build_ids(void) 366static int dsos__cache_build_ids(struct perf_header *self)
353{ 367{
354 int err_kernel, err_user; 368 struct perf_session *session = container_of(self,
369 struct perf_session, header);
370 struct rb_node *nd;
371 int ret = 0;
355 char debugdir[PATH_MAX]; 372 char debugdir[PATH_MAX];
356 373
357 snprintf(debugdir, sizeof(debugdir), "%s/%s", getenv("HOME"), 374 snprintf(debugdir, sizeof(debugdir), "%s/%s", getenv("HOME"),
@@ -360,9 +377,28 @@ static int dsos__cache_build_ids(void)
360 if (mkdir(debugdir, 0755) != 0 && errno != EEXIST) 377 if (mkdir(debugdir, 0755) != 0 && errno != EEXIST)
361 return -1; 378 return -1;
362 379
363 err_kernel = __dsos__cache_build_ids(&dsos__kernel, debugdir); 380 for (nd = rb_first(&session->machines); nd; nd = rb_next(nd)) {
364 err_user = __dsos__cache_build_ids(&dsos__user, debugdir); 381 struct machine *pos = rb_entry(nd, struct machine, rb_node);
365 return err_kernel || err_user ? -1 : 0; 382 ret |= __dsos__cache_build_ids(&pos->kernel_dsos, debugdir);
383 ret |= __dsos__cache_build_ids(&pos->user_dsos, debugdir);
384 }
385 return ret ? -1 : 0;
386}
387
388static bool dsos__read_build_ids(struct perf_header *self, bool with_hits)
389{
390 bool ret = false;
391 struct perf_session *session = container_of(self,
392 struct perf_session, header);
393 struct rb_node *nd;
394
395 for (nd = rb_first(&session->machines); nd; nd = rb_next(nd)) {
396 struct machine *pos = rb_entry(nd, struct machine, rb_node);
397 ret |= __dsos__read_build_ids(&pos->kernel_dsos, with_hits);
398 ret |= __dsos__read_build_ids(&pos->user_dsos, with_hits);
399 }
400
401 return ret;
366} 402}
367 403
368static int perf_header__adds_write(struct perf_header *self, int fd) 404static int perf_header__adds_write(struct perf_header *self, int fd)
@@ -373,7 +409,7 @@ static int perf_header__adds_write(struct perf_header *self, int fd)
373 u64 sec_start; 409 u64 sec_start;
374 int idx = 0, err; 410 int idx = 0, err;
375 411
376 if (dsos__read_build_ids(true)) 412 if (dsos__read_build_ids(self, true))
377 perf_header__set_feat(self, HEADER_BUILD_ID); 413 perf_header__set_feat(self, HEADER_BUILD_ID);
378 414
379 nr_sections = bitmap_weight(self->adds_features, HEADER_FEAT_BITS); 415 nr_sections = bitmap_weight(self->adds_features, HEADER_FEAT_BITS);
@@ -400,7 +436,6 @@ static int perf_header__adds_write(struct perf_header *self, int fd)
400 trace_sec->size = lseek(fd, 0, SEEK_CUR) - trace_sec->offset; 436 trace_sec->size = lseek(fd, 0, SEEK_CUR) - trace_sec->offset;
401 } 437 }
402 438
403
404 if (perf_header__has_feat(self, HEADER_BUILD_ID)) { 439 if (perf_header__has_feat(self, HEADER_BUILD_ID)) {
405 struct perf_file_section *buildid_sec; 440 struct perf_file_section *buildid_sec;
406 441
@@ -408,14 +443,14 @@ static int perf_header__adds_write(struct perf_header *self, int fd)
408 443
409 /* Write build-ids */ 444 /* Write build-ids */
410 buildid_sec->offset = lseek(fd, 0, SEEK_CUR); 445 buildid_sec->offset = lseek(fd, 0, SEEK_CUR);
411 err = dsos__write_buildid_table(fd); 446 err = dsos__write_buildid_table(self, fd);
412 if (err < 0) { 447 if (err < 0) {
413 pr_debug("failed to write buildid table\n"); 448 pr_debug("failed to write buildid table\n");
414 goto out_free; 449 goto out_free;
415 } 450 }
416 buildid_sec->size = lseek(fd, 0, SEEK_CUR) - 451 buildid_sec->size = lseek(fd, 0, SEEK_CUR) -
417 buildid_sec->offset; 452 buildid_sec->offset;
418 dsos__cache_build_ids(); 453 dsos__cache_build_ids(self);
419 } 454 }
420 455
421 lseek(fd, sec_start, SEEK_SET); 456 lseek(fd, sec_start, SEEK_SET);
@@ -427,6 +462,25 @@ out_free:
427 return err; 462 return err;
428} 463}
429 464
465int perf_header__write_pipe(int fd)
466{
467 struct perf_pipe_file_header f_header;
468 int err;
469
470 f_header = (struct perf_pipe_file_header){
471 .magic = PERF_MAGIC,
472 .size = sizeof(f_header),
473 };
474
475 err = do_write(fd, &f_header, sizeof(f_header));
476 if (err < 0) {
477 pr_debug("failed to write perf pipe header\n");
478 return err;
479 }
480
481 return 0;
482}
483
430int perf_header__write(struct perf_header *self, int fd, bool at_exit) 484int perf_header__write(struct perf_header *self, int fd, bool at_exit)
431{ 485{
432 struct perf_file_header f_header; 486 struct perf_file_header f_header;
@@ -518,25 +572,10 @@ int perf_header__write(struct perf_header *self, int fd, bool at_exit)
518 return 0; 572 return 0;
519} 573}
520 574
521static int do_read(int fd, void *buf, size_t size)
522{
523 while (size) {
524 int ret = read(fd, buf, size);
525
526 if (ret <= 0)
527 return -1;
528
529 size -= ret;
530 buf += ret;
531 }
532
533 return 0;
534}
535
536static int perf_header__getbuffer64(struct perf_header *self, 575static int perf_header__getbuffer64(struct perf_header *self,
537 int fd, void *buf, size_t size) 576 int fd, void *buf, size_t size)
538{ 577{
539 if (do_read(fd, buf, size)) 578 if (do_read(fd, buf, size) <= 0)
540 return -1; 579 return -1;
541 580
542 if (self->needs_swap) 581 if (self->needs_swap)
@@ -592,7 +631,7 @@ int perf_file_header__read(struct perf_file_header *self,
592{ 631{
593 lseek(fd, 0, SEEK_SET); 632 lseek(fd, 0, SEEK_SET);
594 633
595 if (do_read(fd, self, sizeof(*self)) || 634 if (do_read(fd, self, sizeof(*self)) <= 0 ||
596 memcmp(&self->magic, __perf_magic, sizeof(self->magic))) 635 memcmp(&self->magic, __perf_magic, sizeof(self->magic)))
597 return -1; 636 return -1;
598 637
@@ -636,6 +675,93 @@ int perf_file_header__read(struct perf_file_header *self,
636 return 0; 675 return 0;
637} 676}
638 677
678static int __event_process_build_id(struct build_id_event *bev,
679 char *filename,
680 struct perf_session *session)
681{
682 int err = -1;
683 struct list_head *head;
684 struct machine *machine;
685 u16 misc;
686 struct dso *dso;
687 enum dso_kernel_type dso_type;
688
689 machine = perf_session__findnew_machine(session, bev->pid);
690 if (!machine)
691 goto out;
692
693 misc = bev->header.misc & PERF_RECORD_MISC_CPUMODE_MASK;
694
695 switch (misc) {
696 case PERF_RECORD_MISC_KERNEL:
697 dso_type = DSO_TYPE_KERNEL;
698 head = &machine->kernel_dsos;
699 break;
700 case PERF_RECORD_MISC_GUEST_KERNEL:
701 dso_type = DSO_TYPE_GUEST_KERNEL;
702 head = &machine->kernel_dsos;
703 break;
704 case PERF_RECORD_MISC_USER:
705 case PERF_RECORD_MISC_GUEST_USER:
706 dso_type = DSO_TYPE_USER;
707 head = &machine->user_dsos;
708 break;
709 default:
710 goto out;
711 }
712
713 dso = __dsos__findnew(head, filename);
714 if (dso != NULL) {
715 char sbuild_id[BUILD_ID_SIZE * 2 + 1];
716
717 dso__set_build_id(dso, &bev->build_id);
718
719 if (filename[0] == '[')
720 dso->kernel = dso_type;
721
722 build_id__sprintf(dso->build_id, sizeof(dso->build_id),
723 sbuild_id);
724 pr_debug("build id event received for %s: %s\n",
725 dso->long_name, sbuild_id);
726 }
727
728 err = 0;
729out:
730 return err;
731}
732
733static int perf_header__read_build_ids(struct perf_header *self,
734 int input, u64 offset, u64 size)
735{
736 struct perf_session *session = container_of(self,
737 struct perf_session, header);
738 struct build_id_event bev;
739 char filename[PATH_MAX];
740 u64 limit = offset + size;
741 int err = -1;
742
743 while (offset < limit) {
744 ssize_t len;
745
746 if (read(input, &bev, sizeof(bev)) != sizeof(bev))
747 goto out;
748
749 if (self->needs_swap)
750 perf_event_header__bswap(&bev.header);
751
752 len = bev.header.size - sizeof(bev);
753 if (read(input, filename, len) != len)
754 goto out;
755
756 __event_process_build_id(&bev, filename, session);
757
758 offset += bev.header.size;
759 }
760 err = 0;
761out:
762 return err;
763}
764
639static int perf_file_section__process(struct perf_file_section *self, 765static int perf_file_section__process(struct perf_file_section *self,
640 struct perf_header *ph, 766 struct perf_header *ph,
641 int feat, int fd) 767 int feat, int fd)
@@ -648,7 +774,7 @@ static int perf_file_section__process(struct perf_file_section *self,
648 774
649 switch (feat) { 775 switch (feat) {
650 case HEADER_TRACE_INFO: 776 case HEADER_TRACE_INFO:
651 trace_report(fd); 777 trace_report(fd, false);
652 break; 778 break;
653 779
654 case HEADER_BUILD_ID: 780 case HEADER_BUILD_ID:
@@ -662,13 +788,56 @@ static int perf_file_section__process(struct perf_file_section *self,
662 return 0; 788 return 0;
663} 789}
664 790
665int perf_header__read(struct perf_header *self, int fd) 791static int perf_file_header__read_pipe(struct perf_pipe_file_header *self,
792 struct perf_header *ph, int fd,
793 bool repipe)
794{
795 if (do_read(fd, self, sizeof(*self)) <= 0 ||
796 memcmp(&self->magic, __perf_magic, sizeof(self->magic)))
797 return -1;
798
799 if (repipe && do_write(STDOUT_FILENO, self, sizeof(*self)) < 0)
800 return -1;
801
802 if (self->size != sizeof(*self)) {
803 u64 size = bswap_64(self->size);
804
805 if (size != sizeof(*self))
806 return -1;
807
808 ph->needs_swap = true;
809 }
810
811 return 0;
812}
813
814static int perf_header__read_pipe(struct perf_session *session, int fd)
666{ 815{
816 struct perf_header *self = &session->header;
817 struct perf_pipe_file_header f_header;
818
819 if (perf_file_header__read_pipe(&f_header, self, fd,
820 session->repipe) < 0) {
821 pr_debug("incompatible file format\n");
822 return -EINVAL;
823 }
824
825 session->fd = fd;
826
827 return 0;
828}
829
830int perf_header__read(struct perf_session *session, int fd)
831{
832 struct perf_header *self = &session->header;
667 struct perf_file_header f_header; 833 struct perf_file_header f_header;
668 struct perf_file_attr f_attr; 834 struct perf_file_attr f_attr;
669 u64 f_id; 835 u64 f_id;
670 int nr_attrs, nr_ids, i, j; 836 int nr_attrs, nr_ids, i, j;
671 837
838 if (session->fd_pipe)
839 return perf_header__read_pipe(session, fd);
840
672 if (perf_file_header__read(&f_header, self, fd) < 0) { 841 if (perf_file_header__read(&f_header, self, fd) < 0) {
673 pr_debug("incompatible file format\n"); 842 pr_debug("incompatible file format\n");
674 return -EINVAL; 843 return -EINVAL;
@@ -753,6 +922,14 @@ perf_header__find_attr(u64 id, struct perf_header *header)
753{ 922{
754 int i; 923 int i;
755 924
925 /*
926 * We set id to -1 if the data file doesn't contain sample
927 * ids. Check for this and avoid walking through the entire
928 * list of ids which may be large.
929 */
930 if (id == -1ULL)
931 return NULL;
932
756 for (i = 0; i < header->attrs; i++) { 933 for (i = 0; i < header->attrs; i++) {
757 struct perf_header_attr *attr = header->attr[i]; 934 struct perf_header_attr *attr = header->attr[i];
758 int j; 935 int j;
@@ -765,3 +942,231 @@ perf_header__find_attr(u64 id, struct perf_header *header)
765 942
766 return NULL; 943 return NULL;
767} 944}
945
946int event__synthesize_attr(struct perf_event_attr *attr, u16 ids, u64 *id,
947 event__handler_t process,
948 struct perf_session *session)
949{
950 event_t *ev;
951 size_t size;
952 int err;
953
954 size = sizeof(struct perf_event_attr);
955 size = ALIGN(size, sizeof(u64));
956 size += sizeof(struct perf_event_header);
957 size += ids * sizeof(u64);
958
959 ev = malloc(size);
960
961 ev->attr.attr = *attr;
962 memcpy(ev->attr.id, id, ids * sizeof(u64));
963
964 ev->attr.header.type = PERF_RECORD_HEADER_ATTR;
965 ev->attr.header.size = size;
966
967 err = process(ev, session);
968
969 free(ev);
970
971 return err;
972}
973
974int event__synthesize_attrs(struct perf_header *self,
975 event__handler_t process,
976 struct perf_session *session)
977{
978 struct perf_header_attr *attr;
979 int i, err = 0;
980
981 for (i = 0; i < self->attrs; i++) {
982 attr = self->attr[i];
983
984 err = event__synthesize_attr(&attr->attr, attr->ids, attr->id,
985 process, session);
986 if (err) {
987 pr_debug("failed to create perf header attribute\n");
988 return err;
989 }
990 }
991
992 return err;
993}
994
995int event__process_attr(event_t *self, struct perf_session *session)
996{
997 struct perf_header_attr *attr;
998 unsigned int i, ids, n_ids;
999
1000 attr = perf_header_attr__new(&self->attr.attr);
1001 if (attr == NULL)
1002 return -ENOMEM;
1003
1004 ids = self->header.size;
1005 ids -= (void *)&self->attr.id - (void *)self;
1006 n_ids = ids / sizeof(u64);
1007
1008 for (i = 0; i < n_ids; i++) {
1009 if (perf_header_attr__add_id(attr, self->attr.id[i]) < 0) {
1010 perf_header_attr__delete(attr);
1011 return -ENOMEM;
1012 }
1013 }
1014
1015 if (perf_header__add_attr(&session->header, attr) < 0) {
1016 perf_header_attr__delete(attr);
1017 return -ENOMEM;
1018 }
1019
1020 perf_session__update_sample_type(session);
1021
1022 return 0;
1023}
1024
1025int event__synthesize_event_type(u64 event_id, char *name,
1026 event__handler_t process,
1027 struct perf_session *session)
1028{
1029 event_t ev;
1030 size_t size = 0;
1031 int err = 0;
1032
1033 memset(&ev, 0, sizeof(ev));
1034
1035 ev.event_type.event_type.event_id = event_id;
1036 memset(ev.event_type.event_type.name, 0, MAX_EVENT_NAME);
1037 strncpy(ev.event_type.event_type.name, name, MAX_EVENT_NAME - 1);
1038
1039 ev.event_type.header.type = PERF_RECORD_HEADER_EVENT_TYPE;
1040 size = strlen(name);
1041 size = ALIGN(size, sizeof(u64));
1042 ev.event_type.header.size = sizeof(ev.event_type) -
1043 (sizeof(ev.event_type.event_type.name) - size);
1044
1045 err = process(&ev, session);
1046
1047 return err;
1048}
1049
1050int event__synthesize_event_types(event__handler_t process,
1051 struct perf_session *session)
1052{
1053 struct perf_trace_event_type *type;
1054 int i, err = 0;
1055
1056 for (i = 0; i < event_count; i++) {
1057 type = &events[i];
1058
1059 err = event__synthesize_event_type(type->event_id, type->name,
1060 process, session);
1061 if (err) {
1062 pr_debug("failed to create perf header event type\n");
1063 return err;
1064 }
1065 }
1066
1067 return err;
1068}
1069
1070int event__process_event_type(event_t *self,
1071 struct perf_session *session __unused)
1072{
1073 if (perf_header__push_event(self->event_type.event_type.event_id,
1074 self->event_type.event_type.name) < 0)
1075 return -ENOMEM;
1076
1077 return 0;
1078}
1079
1080int event__synthesize_tracing_data(int fd, struct perf_event_attr *pattrs,
1081 int nb_events,
1082 event__handler_t process,
1083 struct perf_session *session __unused)
1084{
1085 event_t ev;
1086 ssize_t size = 0, aligned_size = 0, padding;
1087 int err = 0;
1088
1089 memset(&ev, 0, sizeof(ev));
1090
1091 ev.tracing_data.header.type = PERF_RECORD_HEADER_TRACING_DATA;
1092 size = read_tracing_data_size(fd, pattrs, nb_events);
1093 if (size <= 0)
1094 return size;
1095 aligned_size = ALIGN(size, sizeof(u64));
1096 padding = aligned_size - size;
1097 ev.tracing_data.header.size = sizeof(ev.tracing_data);
1098 ev.tracing_data.size = aligned_size;
1099
1100 process(&ev, session);
1101
1102 err = read_tracing_data(fd, pattrs, nb_events);
1103 write_padded(fd, NULL, 0, padding);
1104
1105 return aligned_size;
1106}
1107
1108int event__process_tracing_data(event_t *self,
1109 struct perf_session *session)
1110{
1111 ssize_t size_read, padding, size = self->tracing_data.size;
1112 off_t offset = lseek(session->fd, 0, SEEK_CUR);
1113 char buf[BUFSIZ];
1114
1115 /* setup for reading amidst mmap */
1116 lseek(session->fd, offset + sizeof(struct tracing_data_event),
1117 SEEK_SET);
1118
1119 size_read = trace_report(session->fd, session->repipe);
1120
1121 padding = ALIGN(size_read, sizeof(u64)) - size_read;
1122
1123 if (read(session->fd, buf, padding) < 0)
1124 die("reading input file");
1125 if (session->repipe) {
1126 int retw = write(STDOUT_FILENO, buf, padding);
1127 if (retw <= 0 || retw != padding)
1128 die("repiping tracing data padding");
1129 }
1130
1131 if (size_read + padding != size)
1132 die("tracing data size mismatch");
1133
1134 return size_read + padding;
1135}
1136
1137int event__synthesize_build_id(struct dso *pos, u16 misc,
1138 event__handler_t process,
1139 struct machine *machine,
1140 struct perf_session *session)
1141{
1142 event_t ev;
1143 size_t len;
1144 int err = 0;
1145
1146 if (!pos->hit)
1147 return err;
1148
1149 memset(&ev, 0, sizeof(ev));
1150
1151 len = pos->long_name_len + 1;
1152 len = ALIGN(len, NAME_ALIGN);
1153 memcpy(&ev.build_id.build_id, pos->build_id, sizeof(pos->build_id));
1154 ev.build_id.header.type = PERF_RECORD_HEADER_BUILD_ID;
1155 ev.build_id.header.misc = misc;
1156 ev.build_id.pid = machine->pid;
1157 ev.build_id.header.size = sizeof(ev.build_id) + len;
1158 memcpy(&ev.build_id.filename, pos->long_name, pos->long_name_len);
1159
1160 err = process(&ev, session);
1161
1162 return err;
1163}
1164
1165int event__process_build_id(event_t *self,
1166 struct perf_session *session)
1167{
1168 __event_process_build_id(&self->build_id,
1169 self->build_id.filename,
1170 session);
1171 return 0;
1172}
diff --git a/tools/perf/util/header.h b/tools/perf/util/header.h
index 82a6af72d4cc..402ac2454cf8 100644
--- a/tools/perf/util/header.h
+++ b/tools/perf/util/header.h
@@ -39,6 +39,11 @@ struct perf_file_header {
39 DECLARE_BITMAP(adds_features, HEADER_FEAT_BITS); 39 DECLARE_BITMAP(adds_features, HEADER_FEAT_BITS);
40}; 40};
41 41
42struct perf_pipe_file_header {
43 u64 magic;
44 u64 size;
45};
46
42struct perf_header; 47struct perf_header;
43 48
44int perf_file_header__read(struct perf_file_header *self, 49int perf_file_header__read(struct perf_file_header *self,
@@ -47,21 +52,22 @@ int perf_file_header__read(struct perf_file_header *self,
47struct perf_header { 52struct perf_header {
48 int frozen; 53 int frozen;
49 int attrs, size; 54 int attrs, size;
55 bool needs_swap;
50 struct perf_header_attr **attr; 56 struct perf_header_attr **attr;
51 s64 attr_offset; 57 s64 attr_offset;
52 u64 data_offset; 58 u64 data_offset;
53 u64 data_size; 59 u64 data_size;
54 u64 event_offset; 60 u64 event_offset;
55 u64 event_size; 61 u64 event_size;
56 bool needs_swap;
57 DECLARE_BITMAP(adds_features, HEADER_FEAT_BITS); 62 DECLARE_BITMAP(adds_features, HEADER_FEAT_BITS);
58}; 63};
59 64
60int perf_header__init(struct perf_header *self); 65int perf_header__init(struct perf_header *self);
61void perf_header__exit(struct perf_header *self); 66void perf_header__exit(struct perf_header *self);
62 67
63int perf_header__read(struct perf_header *self, int fd); 68int perf_header__read(struct perf_session *session, int fd);
64int perf_header__write(struct perf_header *self, int fd, bool at_exit); 69int perf_header__write(struct perf_header *self, int fd, bool at_exit);
70int perf_header__write_pipe(int fd);
65 71
66int perf_header__add_attr(struct perf_header *self, 72int perf_header__add_attr(struct perf_header *self,
67 struct perf_header_attr *attr); 73 struct perf_header_attr *attr);
@@ -89,4 +95,33 @@ int build_id_cache__add_s(const char *sbuild_id, const char *debugdir,
89 const char *name, bool is_kallsyms); 95 const char *name, bool is_kallsyms);
90int build_id_cache__remove_s(const char *sbuild_id, const char *debugdir); 96int build_id_cache__remove_s(const char *sbuild_id, const char *debugdir);
91 97
98int event__synthesize_attr(struct perf_event_attr *attr, u16 ids, u64 *id,
99 event__handler_t process,
100 struct perf_session *session);
101int event__synthesize_attrs(struct perf_header *self,
102 event__handler_t process,
103 struct perf_session *session);
104int event__process_attr(event_t *self, struct perf_session *session);
105
106int event__synthesize_event_type(u64 event_id, char *name,
107 event__handler_t process,
108 struct perf_session *session);
109int event__synthesize_event_types(event__handler_t process,
110 struct perf_session *session);
111int event__process_event_type(event_t *self,
112 struct perf_session *session);
113
114int event__synthesize_tracing_data(int fd, struct perf_event_attr *pattrs,
115 int nb_events,
116 event__handler_t process,
117 struct perf_session *session);
118int event__process_tracing_data(event_t *self,
119 struct perf_session *session);
120
121int event__synthesize_build_id(struct dso *pos, u16 misc,
122 event__handler_t process,
123 struct machine *machine,
124 struct perf_session *session);
125int event__process_build_id(event_t *self, struct perf_session *session);
126
92#endif /* __PERF_HEADER_H */ 127#endif /* __PERF_HEADER_H */
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c
index 2be33c7dbf03..9a71c94f057a 100644
--- a/tools/perf/util/hist.c
+++ b/tools/perf/util/hist.c
@@ -1,3 +1,4 @@
1#include "util.h"
1#include "hist.h" 2#include "hist.h"
2#include "session.h" 3#include "session.h"
3#include "sort.h" 4#include "sort.h"
@@ -8,25 +9,69 @@ struct callchain_param callchain_param = {
8 .min_percent = 0.5 9 .min_percent = 0.5
9}; 10};
10 11
12static void hist_entry__add_cpumode_period(struct hist_entry *self,
13 unsigned int cpumode, u64 period)
14{
15 switch (cpumode) {
16 case PERF_RECORD_MISC_KERNEL:
17 self->period_sys += period;
18 break;
19 case PERF_RECORD_MISC_USER:
20 self->period_us += period;
21 break;
22 case PERF_RECORD_MISC_GUEST_KERNEL:
23 self->period_guest_sys += period;
24 break;
25 case PERF_RECORD_MISC_GUEST_USER:
26 self->period_guest_us += period;
27 break;
28 default:
29 break;
30 }
31}
32
11/* 33/*
12 * histogram, sorted on item, collects counts 34 * histogram, sorted on item, collects periods
13 */ 35 */
14 36
15struct hist_entry *__perf_session__add_hist_entry(struct rb_root *hists, 37static struct hist_entry *hist_entry__new(struct hist_entry *template)
16 struct addr_location *al, 38{
17 struct symbol *sym_parent, 39 size_t callchain_size = symbol_conf.use_callchain ? sizeof(struct callchain_node) : 0;
18 u64 count, bool *hit) 40 struct hist_entry *self = malloc(sizeof(*self) + callchain_size);
41
42 if (self != NULL) {
43 *self = *template;
44 self->nr_events = 1;
45 if (symbol_conf.use_callchain)
46 callchain_init(self->callchain);
47 }
48
49 return self;
50}
51
52static void hists__inc_nr_entries(struct hists *self, struct hist_entry *entry)
19{ 53{
20 struct rb_node **p = &hists->rb_node; 54 if (entry->ms.sym && self->max_sym_namelen < entry->ms.sym->namelen)
55 self->max_sym_namelen = entry->ms.sym->namelen;
56 ++self->nr_entries;
57}
58
59struct hist_entry *__hists__add_entry(struct hists *self,
60 struct addr_location *al,
61 struct symbol *sym_parent, u64 period)
62{
63 struct rb_node **p = &self->entries.rb_node;
21 struct rb_node *parent = NULL; 64 struct rb_node *parent = NULL;
22 struct hist_entry *he; 65 struct hist_entry *he;
23 struct hist_entry entry = { 66 struct hist_entry entry = {
24 .thread = al->thread, 67 .thread = al->thread,
25 .map = al->map, 68 .ms = {
26 .sym = al->sym, 69 .map = al->map,
70 .sym = al->sym,
71 },
27 .ip = al->addr, 72 .ip = al->addr,
28 .level = al->level, 73 .level = al->level,
29 .count = count, 74 .period = period,
30 .parent = sym_parent, 75 .parent = sym_parent,
31 }; 76 };
32 int cmp; 77 int cmp;
@@ -38,8 +83,9 @@ struct hist_entry *__perf_session__add_hist_entry(struct rb_root *hists,
38 cmp = hist_entry__cmp(&entry, he); 83 cmp = hist_entry__cmp(&entry, he);
39 84
40 if (!cmp) { 85 if (!cmp) {
41 *hit = true; 86 he->period += period;
42 return he; 87 ++he->nr_events;
88 goto out;
43 } 89 }
44 90
45 if (cmp < 0) 91 if (cmp < 0)
@@ -48,13 +94,14 @@ struct hist_entry *__perf_session__add_hist_entry(struct rb_root *hists,
48 p = &(*p)->rb_right; 94 p = &(*p)->rb_right;
49 } 95 }
50 96
51 he = malloc(sizeof(*he)); 97 he = hist_entry__new(&entry);
52 if (!he) 98 if (!he)
53 return NULL; 99 return NULL;
54 *he = entry;
55 rb_link_node(&he->rb_node, parent, p); 100 rb_link_node(&he->rb_node, parent, p);
56 rb_insert_color(&he->rb_node, hists); 101 rb_insert_color(&he->rb_node, &self->entries);
57 *hit = false; 102 hists__inc_nr_entries(self, he);
103out:
104 hist_entry__add_cpumode_period(he, al->cpumode, period);
58 return he; 105 return he;
59} 106}
60 107
@@ -65,7 +112,7 @@ hist_entry__cmp(struct hist_entry *left, struct hist_entry *right)
65 int64_t cmp = 0; 112 int64_t cmp = 0;
66 113
67 list_for_each_entry(se, &hist_entry__sort_list, list) { 114 list_for_each_entry(se, &hist_entry__sort_list, list) {
68 cmp = se->cmp(left, right); 115 cmp = se->se_cmp(left, right);
69 if (cmp) 116 if (cmp)
70 break; 117 break;
71 } 118 }
@@ -82,7 +129,7 @@ hist_entry__collapse(struct hist_entry *left, struct hist_entry *right)
82 list_for_each_entry(se, &hist_entry__sort_list, list) { 129 list_for_each_entry(se, &hist_entry__sort_list, list) {
83 int64_t (*f)(struct hist_entry *, struct hist_entry *); 130 int64_t (*f)(struct hist_entry *, struct hist_entry *);
84 131
85 f = se->collapse ?: se->cmp; 132 f = se->se_collapse ?: se->se_cmp;
86 133
87 cmp = f(left, right); 134 cmp = f(left, right);
88 if (cmp) 135 if (cmp)
@@ -101,7 +148,7 @@ void hist_entry__free(struct hist_entry *he)
101 * collapse the histogram 148 * collapse the histogram
102 */ 149 */
103 150
104static void collapse__insert_entry(struct rb_root *root, struct hist_entry *he) 151static bool collapse__insert_entry(struct rb_root *root, struct hist_entry *he)
105{ 152{
106 struct rb_node **p = &root->rb_node; 153 struct rb_node **p = &root->rb_node;
107 struct rb_node *parent = NULL; 154 struct rb_node *parent = NULL;
@@ -115,9 +162,9 @@ static void collapse__insert_entry(struct rb_root *root, struct hist_entry *he)
115 cmp = hist_entry__collapse(iter, he); 162 cmp = hist_entry__collapse(iter, he);
116 163
117 if (!cmp) { 164 if (!cmp) {
118 iter->count += he->count; 165 iter->period += he->period;
119 hist_entry__free(he); 166 hist_entry__free(he);
120 return; 167 return false;
121 } 168 }
122 169
123 if (cmp < 0) 170 if (cmp < 0)
@@ -128,9 +175,10 @@ static void collapse__insert_entry(struct rb_root *root, struct hist_entry *he)
128 175
129 rb_link_node(&he->rb_node, parent, p); 176 rb_link_node(&he->rb_node, parent, p);
130 rb_insert_color(&he->rb_node, root); 177 rb_insert_color(&he->rb_node, root);
178 return true;
131} 179}
132 180
133void perf_session__collapse_resort(struct rb_root *hists) 181void hists__collapse_resort(struct hists *self)
134{ 182{
135 struct rb_root tmp; 183 struct rb_root tmp;
136 struct rb_node *next; 184 struct rb_node *next;
@@ -140,72 +188,77 @@ void perf_session__collapse_resort(struct rb_root *hists)
140 return; 188 return;
141 189
142 tmp = RB_ROOT; 190 tmp = RB_ROOT;
143 next = rb_first(hists); 191 next = rb_first(&self->entries);
192 self->nr_entries = 0;
193 self->max_sym_namelen = 0;
144 194
145 while (next) { 195 while (next) {
146 n = rb_entry(next, struct hist_entry, rb_node); 196 n = rb_entry(next, struct hist_entry, rb_node);
147 next = rb_next(&n->rb_node); 197 next = rb_next(&n->rb_node);
148 198
149 rb_erase(&n->rb_node, hists); 199 rb_erase(&n->rb_node, &self->entries);
150 collapse__insert_entry(&tmp, n); 200 if (collapse__insert_entry(&tmp, n))
201 hists__inc_nr_entries(self, n);
151 } 202 }
152 203
153 *hists = tmp; 204 self->entries = tmp;
154} 205}
155 206
156/* 207/*
157 * reverse the map, sort on count. 208 * reverse the map, sort on period.
158 */ 209 */
159 210
160static void perf_session__insert_output_hist_entry(struct rb_root *root, 211static void __hists__insert_output_entry(struct rb_root *entries,
161 struct hist_entry *he, 212 struct hist_entry *he,
162 u64 min_callchain_hits) 213 u64 min_callchain_hits)
163{ 214{
164 struct rb_node **p = &root->rb_node; 215 struct rb_node **p = &entries->rb_node;
165 struct rb_node *parent = NULL; 216 struct rb_node *parent = NULL;
166 struct hist_entry *iter; 217 struct hist_entry *iter;
167 218
168 if (symbol_conf.use_callchain) 219 if (symbol_conf.use_callchain)
169 callchain_param.sort(&he->sorted_chain, &he->callchain, 220 callchain_param.sort(&he->sorted_chain, he->callchain,
170 min_callchain_hits, &callchain_param); 221 min_callchain_hits, &callchain_param);
171 222
172 while (*p != NULL) { 223 while (*p != NULL) {
173 parent = *p; 224 parent = *p;
174 iter = rb_entry(parent, struct hist_entry, rb_node); 225 iter = rb_entry(parent, struct hist_entry, rb_node);
175 226
176 if (he->count > iter->count) 227 if (he->period > iter->period)
177 p = &(*p)->rb_left; 228 p = &(*p)->rb_left;
178 else 229 else
179 p = &(*p)->rb_right; 230 p = &(*p)->rb_right;
180 } 231 }
181 232
182 rb_link_node(&he->rb_node, parent, p); 233 rb_link_node(&he->rb_node, parent, p);
183 rb_insert_color(&he->rb_node, root); 234 rb_insert_color(&he->rb_node, entries);
184} 235}
185 236
186void perf_session__output_resort(struct rb_root *hists, u64 total_samples) 237void hists__output_resort(struct hists *self)
187{ 238{
188 struct rb_root tmp; 239 struct rb_root tmp;
189 struct rb_node *next; 240 struct rb_node *next;
190 struct hist_entry *n; 241 struct hist_entry *n;
191 u64 min_callchain_hits; 242 u64 min_callchain_hits;
192 243
193 min_callchain_hits = 244 min_callchain_hits = self->stats.total_period * (callchain_param.min_percent / 100);
194 total_samples * (callchain_param.min_percent / 100);
195 245
196 tmp = RB_ROOT; 246 tmp = RB_ROOT;
197 next = rb_first(hists); 247 next = rb_first(&self->entries);
248
249 self->nr_entries = 0;
250 self->max_sym_namelen = 0;
198 251
199 while (next) { 252 while (next) {
200 n = rb_entry(next, struct hist_entry, rb_node); 253 n = rb_entry(next, struct hist_entry, rb_node);
201 next = rb_next(&n->rb_node); 254 next = rb_next(&n->rb_node);
202 255
203 rb_erase(&n->rb_node, hists); 256 rb_erase(&n->rb_node, &self->entries);
204 perf_session__insert_output_hist_entry(&tmp, n, 257 __hists__insert_output_entry(&tmp, n, min_callchain_hits);
205 min_callchain_hits); 258 hists__inc_nr_entries(self, n);
206 } 259 }
207 260
208 *hists = tmp; 261 self->entries = tmp;
209} 262}
210 263
211static size_t callchain__fprintf_left_margin(FILE *fp, int left_margin) 264static size_t callchain__fprintf_left_margin(FILE *fp, int left_margin)
@@ -237,7 +290,7 @@ static size_t ipchain__fprintf_graph_line(FILE *fp, int depth, int depth_mask,
237} 290}
238 291
239static size_t ipchain__fprintf_graph(FILE *fp, struct callchain_list *chain, 292static size_t ipchain__fprintf_graph(FILE *fp, struct callchain_list *chain,
240 int depth, int depth_mask, int count, 293 int depth, int depth_mask, int period,
241 u64 total_samples, int hits, 294 u64 total_samples, int hits,
242 int left_margin) 295 int left_margin)
243{ 296{
@@ -250,7 +303,7 @@ static size_t ipchain__fprintf_graph(FILE *fp, struct callchain_list *chain,
250 ret += fprintf(fp, "|"); 303 ret += fprintf(fp, "|");
251 else 304 else
252 ret += fprintf(fp, " "); 305 ret += fprintf(fp, " ");
253 if (!count && i == depth - 1) { 306 if (!period && i == depth - 1) {
254 double percent; 307 double percent;
255 308
256 percent = hits * 100.0 / total_samples; 309 percent = hits * 100.0 / total_samples;
@@ -258,8 +311,8 @@ static size_t ipchain__fprintf_graph(FILE *fp, struct callchain_list *chain,
258 } else 311 } else
259 ret += fprintf(fp, "%s", " "); 312 ret += fprintf(fp, "%s", " ");
260 } 313 }
261 if (chain->sym) 314 if (chain->ms.sym)
262 ret += fprintf(fp, "%s\n", chain->sym->name); 315 ret += fprintf(fp, "%s\n", chain->ms.sym->name);
263 else 316 else
264 ret += fprintf(fp, "%p\n", (void *)(long)chain->ip); 317 ret += fprintf(fp, "%p\n", (void *)(long)chain->ip);
265 318
@@ -278,7 +331,7 @@ static void init_rem_hits(void)
278 } 331 }
279 332
280 strcpy(rem_sq_bracket->name, "[...]"); 333 strcpy(rem_sq_bracket->name, "[...]");
281 rem_hits.sym = rem_sq_bracket; 334 rem_hits.ms.sym = rem_sq_bracket;
282} 335}
283 336
284static size_t __callchain__fprintf_graph(FILE *fp, struct callchain_node *self, 337static size_t __callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
@@ -293,6 +346,7 @@ static size_t __callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
293 u64 remaining; 346 u64 remaining;
294 size_t ret = 0; 347 size_t ret = 0;
295 int i; 348 int i;
349 uint entries_printed = 0;
296 350
297 if (callchain_param.mode == CHAIN_GRAPH_REL) 351 if (callchain_param.mode == CHAIN_GRAPH_REL)
298 new_total = self->children_hit; 352 new_total = self->children_hit;
@@ -328,8 +382,6 @@ static size_t __callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
328 left_margin); 382 left_margin);
329 i = 0; 383 i = 0;
330 list_for_each_entry(chain, &child->val, list) { 384 list_for_each_entry(chain, &child->val, list) {
331 if (chain->ip >= PERF_CONTEXT_MAX)
332 continue;
333 ret += ipchain__fprintf_graph(fp, chain, depth, 385 ret += ipchain__fprintf_graph(fp, chain, depth,
334 new_depth_mask, i++, 386 new_depth_mask, i++,
335 new_total, 387 new_total,
@@ -341,6 +393,8 @@ static size_t __callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
341 new_depth_mask | (1 << depth), 393 new_depth_mask | (1 << depth),
342 left_margin); 394 left_margin);
343 node = next; 395 node = next;
396 if (++entries_printed == callchain_param.print_limit)
397 break;
344 } 398 }
345 399
346 if (callchain_param.mode == CHAIN_GRAPH_REL && 400 if (callchain_param.mode == CHAIN_GRAPH_REL &&
@@ -366,11 +420,9 @@ static size_t callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
366 bool printed = false; 420 bool printed = false;
367 int i = 0; 421 int i = 0;
368 int ret = 0; 422 int ret = 0;
423 u32 entries_printed = 0;
369 424
370 list_for_each_entry(chain, &self->val, list) { 425 list_for_each_entry(chain, &self->val, list) {
371 if (chain->ip >= PERF_CONTEXT_MAX)
372 continue;
373
374 if (!i++ && sort__first_dimension == SORT_SYM) 426 if (!i++ && sort__first_dimension == SORT_SYM)
375 continue; 427 continue;
376 428
@@ -385,10 +437,13 @@ static size_t callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
385 } else 437 } else
386 ret += callchain__fprintf_left_margin(fp, left_margin); 438 ret += callchain__fprintf_left_margin(fp, left_margin);
387 439
388 if (chain->sym) 440 if (chain->ms.sym)
389 ret += fprintf(fp, " %s\n", chain->sym->name); 441 ret += fprintf(fp, " %s\n", chain->ms.sym->name);
390 else 442 else
391 ret += fprintf(fp, " %p\n", (void *)(long)chain->ip); 443 ret += fprintf(fp, " %p\n", (void *)(long)chain->ip);
444
445 if (++entries_printed == callchain_param.print_limit)
446 break;
392 } 447 }
393 448
394 ret += __callchain__fprintf_graph(fp, self, total_samples, 1, 1, left_margin); 449 ret += __callchain__fprintf_graph(fp, self, total_samples, 1, 1, left_margin);
@@ -411,8 +466,8 @@ static size_t callchain__fprintf_flat(FILE *fp, struct callchain_node *self,
411 list_for_each_entry(chain, &self->val, list) { 466 list_for_each_entry(chain, &self->val, list) {
412 if (chain->ip >= PERF_CONTEXT_MAX) 467 if (chain->ip >= PERF_CONTEXT_MAX)
413 continue; 468 continue;
414 if (chain->sym) 469 if (chain->ms.sym)
415 ret += fprintf(fp, " %s\n", chain->sym->name); 470 ret += fprintf(fp, " %s\n", chain->ms.sym->name);
416 else 471 else
417 ret += fprintf(fp, " %p\n", 472 ret += fprintf(fp, " %p\n",
418 (void *)(long)chain->ip); 473 (void *)(long)chain->ip);
@@ -427,6 +482,7 @@ static size_t hist_entry_callchain__fprintf(FILE *fp, struct hist_entry *self,
427 struct rb_node *rb_node; 482 struct rb_node *rb_node;
428 struct callchain_node *chain; 483 struct callchain_node *chain;
429 size_t ret = 0; 484 size_t ret = 0;
485 u32 entries_printed = 0;
430 486
431 rb_node = rb_first(&self->sorted_chain); 487 rb_node = rb_first(&self->sorted_chain);
432 while (rb_node) { 488 while (rb_node) {
@@ -449,55 +505,88 @@ static size_t hist_entry_callchain__fprintf(FILE *fp, struct hist_entry *self,
449 break; 505 break;
450 } 506 }
451 ret += fprintf(fp, "\n"); 507 ret += fprintf(fp, "\n");
508 if (++entries_printed == callchain_param.print_limit)
509 break;
452 rb_node = rb_next(rb_node); 510 rb_node = rb_next(rb_node);
453 } 511 }
454 512
455 return ret; 513 return ret;
456} 514}
457 515
458static size_t hist_entry__fprintf(struct hist_entry *self, 516int hist_entry__snprintf(struct hist_entry *self, char *s, size_t size,
459 struct perf_session *pair_session, 517 struct hists *pair_hists, bool show_displacement,
460 bool show_displacement, 518 long displacement, bool color, u64 session_total)
461 long displacement, FILE *fp,
462 u64 session_total)
463{ 519{
464 struct sort_entry *se; 520 struct sort_entry *se;
465 u64 count, total; 521 u64 period, total, period_sys, period_us, period_guest_sys, period_guest_us;
466 const char *sep = symbol_conf.field_sep; 522 const char *sep = symbol_conf.field_sep;
467 size_t ret; 523 int ret;
468 524
469 if (symbol_conf.exclude_other && !self->parent) 525 if (symbol_conf.exclude_other && !self->parent)
470 return 0; 526 return 0;
471 527
472 if (pair_session) { 528 if (pair_hists) {
473 count = self->pair ? self->pair->count : 0; 529 period = self->pair ? self->pair->period : 0;
474 total = pair_session->events_stats.total; 530 total = pair_hists->stats.total_period;
531 period_sys = self->pair ? self->pair->period_sys : 0;
532 period_us = self->pair ? self->pair->period_us : 0;
533 period_guest_sys = self->pair ? self->pair->period_guest_sys : 0;
534 period_guest_us = self->pair ? self->pair->period_guest_us : 0;
475 } else { 535 } else {
476 count = self->count; 536 period = self->period;
477 total = session_total; 537 total = session_total;
538 period_sys = self->period_sys;
539 period_us = self->period_us;
540 period_guest_sys = self->period_guest_sys;
541 period_guest_us = self->period_guest_us;
478 } 542 }
479 543
480 if (total) 544 if (total) {
481 ret = percent_color_fprintf(fp, sep ? "%.2f" : " %6.2f%%", 545 if (color)
482 (count * 100.0) / total); 546 ret = percent_color_snprintf(s, size,
483 else 547 sep ? "%.2f" : " %6.2f%%",
484 ret = fprintf(fp, sep ? "%lld" : "%12lld ", count); 548 (period * 100.0) / total);
549 else
550 ret = snprintf(s, size, sep ? "%.2f" : " %6.2f%%",
551 (period * 100.0) / total);
552 if (symbol_conf.show_cpu_utilization) {
553 ret += percent_color_snprintf(s + ret, size - ret,
554 sep ? "%.2f" : " %6.2f%%",
555 (period_sys * 100.0) / total);
556 ret += percent_color_snprintf(s + ret, size - ret,
557 sep ? "%.2f" : " %6.2f%%",
558 (period_us * 100.0) / total);
559 if (perf_guest) {
560 ret += percent_color_snprintf(s + ret,
561 size - ret,
562 sep ? "%.2f" : " %6.2f%%",
563 (period_guest_sys * 100.0) /
564 total);
565 ret += percent_color_snprintf(s + ret,
566 size - ret,
567 sep ? "%.2f" : " %6.2f%%",
568 (period_guest_us * 100.0) /
569 total);
570 }
571 }
572 } else
573 ret = snprintf(s, size, sep ? "%lld" : "%12lld ", period);
485 574
486 if (symbol_conf.show_nr_samples) { 575 if (symbol_conf.show_nr_samples) {
487 if (sep) 576 if (sep)
488 fprintf(fp, "%c%lld", *sep, count); 577 ret += snprintf(s + ret, size - ret, "%c%lld", *sep, period);
489 else 578 else
490 fprintf(fp, "%11lld", count); 579 ret += snprintf(s + ret, size - ret, "%11lld", period);
491 } 580 }
492 581
493 if (pair_session) { 582 if (pair_hists) {
494 char bf[32]; 583 char bf[32];
495 double old_percent = 0, new_percent = 0, diff; 584 double old_percent = 0, new_percent = 0, diff;
496 585
497 if (total > 0) 586 if (total > 0)
498 old_percent = (count * 100.0) / total; 587 old_percent = (period * 100.0) / total;
499 if (session_total > 0) 588 if (session_total > 0)
500 new_percent = (self->count * 100.0) / session_total; 589 new_percent = (self->period * 100.0) / session_total;
501 590
502 diff = new_percent - old_percent; 591 diff = new_percent - old_percent;
503 592
@@ -507,9 +596,9 @@ static size_t hist_entry__fprintf(struct hist_entry *self,
507 snprintf(bf, sizeof(bf), " "); 596 snprintf(bf, sizeof(bf), " ");
508 597
509 if (sep) 598 if (sep)
510 ret += fprintf(fp, "%c%s", *sep, bf); 599 ret += snprintf(s + ret, size - ret, "%c%s", *sep, bf);
511 else 600 else
512 ret += fprintf(fp, "%11.11s", bf); 601 ret += snprintf(s + ret, size - ret, "%11.11s", bf);
513 602
514 if (show_displacement) { 603 if (show_displacement) {
515 if (displacement) 604 if (displacement)
@@ -518,9 +607,9 @@ static size_t hist_entry__fprintf(struct hist_entry *self,
518 snprintf(bf, sizeof(bf), " "); 607 snprintf(bf, sizeof(bf), " ");
519 608
520 if (sep) 609 if (sep)
521 fprintf(fp, "%c%s", *sep, bf); 610 ret += snprintf(s + ret, size - ret, "%c%s", *sep, bf);
522 else 611 else
523 fprintf(fp, "%6.6s", bf); 612 ret += snprintf(s + ret, size - ret, "%6.6s", bf);
524 } 613 }
525 } 614 }
526 615
@@ -528,33 +617,43 @@ static size_t hist_entry__fprintf(struct hist_entry *self,
528 if (se->elide) 617 if (se->elide)
529 continue; 618 continue;
530 619
531 fprintf(fp, "%s", sep ?: " "); 620 ret += snprintf(s + ret, size - ret, "%s", sep ?: " ");
532 ret += se->print(fp, self, se->width ? *se->width : 0); 621 ret += se->se_snprintf(self, s + ret, size - ret,
622 se->se_width ? *se->se_width : 0);
533 } 623 }
534 624
535 ret += fprintf(fp, "\n"); 625 return ret;
626}
536 627
537 if (symbol_conf.use_callchain) { 628int hist_entry__fprintf(struct hist_entry *self, struct hists *pair_hists,
538 int left_margin = 0; 629 bool show_displacement, long displacement, FILE *fp,
630 u64 session_total)
631{
632 char bf[512];
633 hist_entry__snprintf(self, bf, sizeof(bf), pair_hists,
634 show_displacement, displacement,
635 true, session_total);
636 return fprintf(fp, "%s\n", bf);
637}
539 638
540 if (sort__first_dimension == SORT_COMM) { 639static size_t hist_entry__fprintf_callchain(struct hist_entry *self, FILE *fp,
541 se = list_first_entry(&hist_entry__sort_list, typeof(*se), 640 u64 session_total)
542 list); 641{
543 left_margin = se->width ? *se->width : 0; 642 int left_margin = 0;
544 left_margin -= thread__comm_len(self->thread);
545 }
546 643
547 hist_entry_callchain__fprintf(fp, self, session_total, 644 if (sort__first_dimension == SORT_COMM) {
548 left_margin); 645 struct sort_entry *se = list_first_entry(&hist_entry__sort_list,
646 typeof(*se), list);
647 left_margin = se->se_width ? *se->se_width : 0;
648 left_margin -= thread__comm_len(self->thread);
549 } 649 }
550 650
551 return ret; 651 return hist_entry_callchain__fprintf(fp, self, session_total,
652 left_margin);
552} 653}
553 654
554size_t perf_session__fprintf_hists(struct rb_root *hists, 655size_t hists__fprintf(struct hists *self, struct hists *pair,
555 struct perf_session *pair, 656 bool show_displacement, FILE *fp)
556 bool show_displacement, FILE *fp,
557 u64 session_total)
558{ 657{
559 struct sort_entry *se; 658 struct sort_entry *se;
560 struct rb_node *nd; 659 struct rb_node *nd;
@@ -563,7 +662,7 @@ size_t perf_session__fprintf_hists(struct rb_root *hists,
563 long displacement = 0; 662 long displacement = 0;
564 unsigned int width; 663 unsigned int width;
565 const char *sep = symbol_conf.field_sep; 664 const char *sep = symbol_conf.field_sep;
566 char *col_width = symbol_conf.col_width_list_str; 665 const char *col_width = symbol_conf.col_width_list_str;
567 666
568 init_rem_hits(); 667 init_rem_hits();
569 668
@@ -576,6 +675,24 @@ size_t perf_session__fprintf_hists(struct rb_root *hists,
576 fputs(" Samples ", fp); 675 fputs(" Samples ", fp);
577 } 676 }
578 677
678 if (symbol_conf.show_cpu_utilization) {
679 if (sep) {
680 ret += fprintf(fp, "%csys", *sep);
681 ret += fprintf(fp, "%cus", *sep);
682 if (perf_guest) {
683 ret += fprintf(fp, "%cguest sys", *sep);
684 ret += fprintf(fp, "%cguest us", *sep);
685 }
686 } else {
687 ret += fprintf(fp, " sys ");
688 ret += fprintf(fp, " us ");
689 if (perf_guest) {
690 ret += fprintf(fp, " guest sys ");
691 ret += fprintf(fp, " guest us ");
692 }
693 }
694 }
695
579 if (pair) { 696 if (pair) {
580 if (sep) 697 if (sep)
581 ret += fprintf(fp, "%cDelta", *sep); 698 ret += fprintf(fp, "%cDelta", *sep);
@@ -594,22 +711,22 @@ size_t perf_session__fprintf_hists(struct rb_root *hists,
594 if (se->elide) 711 if (se->elide)
595 continue; 712 continue;
596 if (sep) { 713 if (sep) {
597 fprintf(fp, "%c%s", *sep, se->header); 714 fprintf(fp, "%c%s", *sep, se->se_header);
598 continue; 715 continue;
599 } 716 }
600 width = strlen(se->header); 717 width = strlen(se->se_header);
601 if (se->width) { 718 if (se->se_width) {
602 if (symbol_conf.col_width_list_str) { 719 if (symbol_conf.col_width_list_str) {
603 if (col_width) { 720 if (col_width) {
604 *se->width = atoi(col_width); 721 *se->se_width = atoi(col_width);
605 col_width = strchr(col_width, ','); 722 col_width = strchr(col_width, ',');
606 if (col_width) 723 if (col_width)
607 ++col_width; 724 ++col_width;
608 } 725 }
609 } 726 }
610 width = *se->width = max(*se->width, width); 727 width = *se->se_width = max(*se->se_width, width);
611 } 728 }
612 fprintf(fp, " %*s", width, se->header); 729 fprintf(fp, " %*s", width, se->se_header);
613 } 730 }
614 fprintf(fp, "\n"); 731 fprintf(fp, "\n");
615 732
@@ -631,10 +748,10 @@ size_t perf_session__fprintf_hists(struct rb_root *hists,
631 continue; 748 continue;
632 749
633 fprintf(fp, " "); 750 fprintf(fp, " ");
634 if (se->width) 751 if (se->se_width)
635 width = *se->width; 752 width = *se->se_width;
636 else 753 else
637 width = strlen(se->header); 754 width = strlen(se->se_header);
638 for (i = 0; i < width; i++) 755 for (i = 0; i < width; i++)
639 fprintf(fp, "."); 756 fprintf(fp, ".");
640 } 757 }
@@ -642,7 +759,7 @@ size_t perf_session__fprintf_hists(struct rb_root *hists,
642 fprintf(fp, "\n#\n"); 759 fprintf(fp, "\n#\n");
643 760
644print_entries: 761print_entries:
645 for (nd = rb_first(hists); nd; nd = rb_next(nd)) { 762 for (nd = rb_first(&self->entries); nd; nd = rb_next(nd)) {
646 struct hist_entry *h = rb_entry(nd, struct hist_entry, rb_node); 763 struct hist_entry *h = rb_entry(nd, struct hist_entry, rb_node);
647 764
648 if (show_displacement) { 765 if (show_displacement) {
@@ -654,10 +771,14 @@ print_entries:
654 ++position; 771 ++position;
655 } 772 }
656 ret += hist_entry__fprintf(h, pair, show_displacement, 773 ret += hist_entry__fprintf(h, pair, show_displacement,
657 displacement, fp, session_total); 774 displacement, fp, self->stats.total_period);
658 if (h->map == NULL && verbose > 1) { 775
776 if (symbol_conf.use_callchain)
777 ret += hist_entry__fprintf_callchain(h, fp, self->stats.total_period);
778
779 if (h->ms.map == NULL && verbose > 1) {
659 __map_groups__fprintf_maps(&h->thread->mg, 780 __map_groups__fprintf_maps(&h->thread->mg,
660 MAP__FUNCTION, fp); 781 MAP__FUNCTION, verbose, fp);
661 fprintf(fp, "%.10s end\n", graph_dotted_line); 782 fprintf(fp, "%.10s end\n", graph_dotted_line);
662 } 783 }
663 } 784 }
@@ -666,3 +787,271 @@ print_entries:
666 787
667 return ret; 788 return ret;
668} 789}
790
791enum hist_filter {
792 HIST_FILTER__DSO,
793 HIST_FILTER__THREAD,
794};
795
796void hists__filter_by_dso(struct hists *self, const struct dso *dso)
797{
798 struct rb_node *nd;
799
800 self->nr_entries = self->stats.total_period = 0;
801 self->stats.nr_events[PERF_RECORD_SAMPLE] = 0;
802 self->max_sym_namelen = 0;
803
804 for (nd = rb_first(&self->entries); nd; nd = rb_next(nd)) {
805 struct hist_entry *h = rb_entry(nd, struct hist_entry, rb_node);
806
807 if (symbol_conf.exclude_other && !h->parent)
808 continue;
809
810 if (dso != NULL && (h->ms.map == NULL || h->ms.map->dso != dso)) {
811 h->filtered |= (1 << HIST_FILTER__DSO);
812 continue;
813 }
814
815 h->filtered &= ~(1 << HIST_FILTER__DSO);
816 if (!h->filtered) {
817 ++self->nr_entries;
818 self->stats.total_period += h->period;
819 self->stats.nr_events[PERF_RECORD_SAMPLE] += h->nr_events;
820 if (h->ms.sym &&
821 self->max_sym_namelen < h->ms.sym->namelen)
822 self->max_sym_namelen = h->ms.sym->namelen;
823 }
824 }
825}
826
827void hists__filter_by_thread(struct hists *self, const struct thread *thread)
828{
829 struct rb_node *nd;
830
831 self->nr_entries = self->stats.total_period = 0;
832 self->stats.nr_events[PERF_RECORD_SAMPLE] = 0;
833 self->max_sym_namelen = 0;
834
835 for (nd = rb_first(&self->entries); nd; nd = rb_next(nd)) {
836 struct hist_entry *h = rb_entry(nd, struct hist_entry, rb_node);
837
838 if (thread != NULL && h->thread != thread) {
839 h->filtered |= (1 << HIST_FILTER__THREAD);
840 continue;
841 }
842 h->filtered &= ~(1 << HIST_FILTER__THREAD);
843 if (!h->filtered) {
844 ++self->nr_entries;
845 self->stats.total_period += h->period;
846 self->stats.nr_events[PERF_RECORD_SAMPLE] += h->nr_events;
847 if (h->ms.sym &&
848 self->max_sym_namelen < h->ms.sym->namelen)
849 self->max_sym_namelen = h->ms.sym->namelen;
850 }
851 }
852}
853
854static int symbol__alloc_hist(struct symbol *self)
855{
856 struct sym_priv *priv = symbol__priv(self);
857 const int size = (sizeof(*priv->hist) +
858 (self->end - self->start) * sizeof(u64));
859
860 priv->hist = zalloc(size);
861 return priv->hist == NULL ? -1 : 0;
862}
863
864int hist_entry__inc_addr_samples(struct hist_entry *self, u64 ip)
865{
866 unsigned int sym_size, offset;
867 struct symbol *sym = self->ms.sym;
868 struct sym_priv *priv;
869 struct sym_hist *h;
870
871 if (!sym || !self->ms.map)
872 return 0;
873
874 priv = symbol__priv(sym);
875 if (priv->hist == NULL && symbol__alloc_hist(sym) < 0)
876 return -ENOMEM;
877
878 sym_size = sym->end - sym->start;
879 offset = ip - sym->start;
880
881 pr_debug3("%s: ip=%#Lx\n", __func__, self->ms.map->unmap_ip(self->ms.map, ip));
882
883 if (offset >= sym_size)
884 return 0;
885
886 h = priv->hist;
887 h->sum++;
888 h->ip[offset]++;
889
890 pr_debug3("%#Lx %s: period++ [ip: %#Lx, %#Lx] => %Ld\n", self->ms.sym->start,
891 self->ms.sym->name, ip, ip - self->ms.sym->start, h->ip[offset]);
892 return 0;
893}
894
895static struct objdump_line *objdump_line__new(s64 offset, char *line)
896{
897 struct objdump_line *self = malloc(sizeof(*self));
898
899 if (self != NULL) {
900 self->offset = offset;
901 self->line = line;
902 }
903
904 return self;
905}
906
907void objdump_line__free(struct objdump_line *self)
908{
909 free(self->line);
910 free(self);
911}
912
913static void objdump__add_line(struct list_head *head, struct objdump_line *line)
914{
915 list_add_tail(&line->node, head);
916}
917
918struct objdump_line *objdump__get_next_ip_line(struct list_head *head,
919 struct objdump_line *pos)
920{
921 list_for_each_entry_continue(pos, head, node)
922 if (pos->offset >= 0)
923 return pos;
924
925 return NULL;
926}
927
928static int hist_entry__parse_objdump_line(struct hist_entry *self, FILE *file,
929 struct list_head *head)
930{
931 struct symbol *sym = self->ms.sym;
932 struct objdump_line *objdump_line;
933 char *line = NULL, *tmp, *tmp2, *c;
934 size_t line_len;
935 s64 line_ip, offset = -1;
936
937 if (getline(&line, &line_len, file) < 0)
938 return -1;
939
940 if (!line)
941 return -1;
942
943 while (line_len != 0 && isspace(line[line_len - 1]))
944 line[--line_len] = '\0';
945
946 c = strchr(line, '\n');
947 if (c)
948 *c = 0;
949
950 line_ip = -1;
951
952 /*
953 * Strip leading spaces:
954 */
955 tmp = line;
956 while (*tmp) {
957 if (*tmp != ' ')
958 break;
959 tmp++;
960 }
961
962 if (*tmp) {
963 /*
964 * Parse hexa addresses followed by ':'
965 */
966 line_ip = strtoull(tmp, &tmp2, 16);
967 if (*tmp2 != ':')
968 line_ip = -1;
969 }
970
971 if (line_ip != -1) {
972 u64 start = map__rip_2objdump(self->ms.map, sym->start);
973 offset = line_ip - start;
974 }
975
976 objdump_line = objdump_line__new(offset, line);
977 if (objdump_line == NULL) {
978 free(line);
979 return -1;
980 }
981 objdump__add_line(head, objdump_line);
982
983 return 0;
984}
985
986int hist_entry__annotate(struct hist_entry *self, struct list_head *head)
987{
988 struct symbol *sym = self->ms.sym;
989 struct map *map = self->ms.map;
990 struct dso *dso = map->dso;
991 const char *filename = dso->long_name;
992 char command[PATH_MAX * 2];
993 FILE *file;
994 u64 len;
995
996 if (!filename)
997 return -1;
998
999 if (dso->origin == DSO__ORIG_KERNEL) {
1000 if (dso->annotate_warned)
1001 return 0;
1002 dso->annotate_warned = 1;
1003 pr_err("Can't annotate %s: No vmlinux file was found in the "
1004 "path:\n", sym->name);
1005 vmlinux_path__fprintf(stderr);
1006 return -1;
1007 }
1008
1009 pr_debug("%s: filename=%s, sym=%s, start=%#Lx, end=%#Lx\n", __func__,
1010 filename, sym->name, map->unmap_ip(map, sym->start),
1011 map->unmap_ip(map, sym->end));
1012
1013 len = sym->end - sym->start;
1014
1015 pr_debug("annotating [%p] %30s : [%p] %30s\n",
1016 dso, dso->long_name, sym, sym->name);
1017
1018 snprintf(command, sizeof(command),
1019 "objdump --start-address=0x%016Lx --stop-address=0x%016Lx -dS %s|grep -v %s|expand",
1020 map__rip_2objdump(map, sym->start),
1021 map__rip_2objdump(map, sym->end),
1022 filename, filename);
1023
1024 pr_debug("Executing: %s\n", command);
1025
1026 file = popen(command, "r");
1027 if (!file)
1028 return -1;
1029
1030 while (!feof(file))
1031 if (hist_entry__parse_objdump_line(self, file, head) < 0)
1032 break;
1033
1034 pclose(file);
1035 return 0;
1036}
1037
1038void hists__inc_nr_events(struct hists *self, u32 type)
1039{
1040 ++self->stats.nr_events[0];
1041 ++self->stats.nr_events[type];
1042}
1043
1044size_t hists__fprintf_nr_events(struct hists *self, FILE *fp)
1045{
1046 int i;
1047 size_t ret = 0;
1048
1049 for (i = 0; i < PERF_RECORD_HEADER_MAX; ++i) {
1050 if (!event__name[i])
1051 continue;
1052 ret += fprintf(fp, "%10s events: %10d\n",
1053 event__name[i], self->stats.nr_events[i]);
1054 }
1055
1056 return ret;
1057}
diff --git a/tools/perf/util/hist.h b/tools/perf/util/hist.h
index 16f360cce5bf..6f17dcd8412c 100644
--- a/tools/perf/util/hist.h
+++ b/tools/perf/util/hist.h
@@ -6,24 +6,104 @@
6 6
7extern struct callchain_param callchain_param; 7extern struct callchain_param callchain_param;
8 8
9struct perf_session;
10struct hist_entry; 9struct hist_entry;
11struct addr_location; 10struct addr_location;
12struct symbol; 11struct symbol;
13struct rb_root; 12struct rb_root;
14 13
15struct hist_entry *__perf_session__add_hist_entry(struct rb_root *hists, 14struct objdump_line {
16 struct addr_location *al, 15 struct list_head node;
17 struct symbol *parent, 16 s64 offset;
18 u64 count, bool *hit); 17 char *line;
18};
19
20void objdump_line__free(struct objdump_line *self);
21struct objdump_line *objdump__get_next_ip_line(struct list_head *head,
22 struct objdump_line *pos);
23
24struct sym_hist {
25 u64 sum;
26 u64 ip[0];
27};
28
29struct sym_ext {
30 struct rb_node node;
31 double percent;
32 char *path;
33};
34
35struct sym_priv {
36 struct sym_hist *hist;
37 struct sym_ext *ext;
38};
39
40/*
41 * The kernel collects the number of events it couldn't send in a stretch and
42 * when possible sends this number in a PERF_RECORD_LOST event. The number of
43 * such "chunks" of lost events is stored in .nr_events[PERF_EVENT_LOST] while
44 * total_lost tells exactly how many events the kernel in fact lost, i.e. it is
45 * the sum of all struct lost_event.lost fields reported.
46 *
47 * The total_period is needed because by default auto-freq is used, so
48 * multipling nr_events[PERF_EVENT_SAMPLE] by a frequency isn't possible to get
49 * the total number of low level events, it is necessary to to sum all struct
50 * sample_event.period and stash the result in total_period.
51 */
52struct events_stats {
53 u64 total_period;
54 u64 total_lost;
55 u32 nr_events[PERF_RECORD_HEADER_MAX];
56 u32 nr_unknown_events;
57};
58
59struct hists {
60 struct rb_node rb_node;
61 struct rb_root entries;
62 u64 nr_entries;
63 struct events_stats stats;
64 u64 config;
65 u64 event_stream;
66 u32 type;
67 u32 max_sym_namelen;
68};
69
70struct hist_entry *__hists__add_entry(struct hists *self,
71 struct addr_location *al,
72 struct symbol *parent, u64 period);
19extern int64_t hist_entry__cmp(struct hist_entry *, struct hist_entry *); 73extern int64_t hist_entry__cmp(struct hist_entry *, struct hist_entry *);
20extern int64_t hist_entry__collapse(struct hist_entry *, struct hist_entry *); 74extern int64_t hist_entry__collapse(struct hist_entry *, struct hist_entry *);
75int hist_entry__fprintf(struct hist_entry *self, struct hists *pair_hists,
76 bool show_displacement, long displacement, FILE *fp,
77 u64 total);
78int hist_entry__snprintf(struct hist_entry *self, char *bf, size_t size,
79 struct hists *pair_hists, bool show_displacement,
80 long displacement, bool color, u64 total);
21void hist_entry__free(struct hist_entry *); 81void hist_entry__free(struct hist_entry *);
22 82
23void perf_session__output_resort(struct rb_root *hists, u64 total_samples); 83void hists__output_resort(struct hists *self);
24void perf_session__collapse_resort(struct rb_root *hists); 84void hists__collapse_resort(struct hists *self);
25size_t perf_session__fprintf_hists(struct rb_root *hists, 85
26 struct perf_session *pair, 86void hists__inc_nr_events(struct hists *self, u32 type);
27 bool show_displacement, FILE *fp, 87size_t hists__fprintf_nr_events(struct hists *self, FILE *fp);
28 u64 session_total); 88
89size_t hists__fprintf(struct hists *self, struct hists *pair,
90 bool show_displacement, FILE *fp);
91
92int hist_entry__inc_addr_samples(struct hist_entry *self, u64 ip);
93int hist_entry__annotate(struct hist_entry *self, struct list_head *head);
94
95void hists__filter_by_dso(struct hists *self, const struct dso *dso);
96void hists__filter_by_thread(struct hists *self, const struct thread *thread);
97
98#ifdef NO_NEWT_SUPPORT
99static inline int hists__browse(struct hists *self __used,
100 const char *helpline __used,
101 const char *input_name __used)
102{
103 return 0;
104}
105#else
106int hists__browse(struct hists *self, const char *helpline,
107 const char *input_name);
108#endif
29#endif /* __PERF_HIST_H */ 109#endif /* __PERF_HIST_H */
diff --git a/tools/perf/util/hweight.c b/tools/perf/util/hweight.c
new file mode 100644
index 000000000000..5c1d0d099f0d
--- /dev/null
+++ b/tools/perf/util/hweight.c
@@ -0,0 +1,31 @@
1#include <linux/bitops.h>
2
3/**
4 * hweightN - returns the hamming weight of a N-bit word
5 * @x: the word to weigh
6 *
7 * The Hamming Weight of a number is the total number of bits set in it.
8 */
9
10unsigned int hweight32(unsigned int w)
11{
12 unsigned int res = w - ((w >> 1) & 0x55555555);
13 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
14 res = (res + (res >> 4)) & 0x0F0F0F0F;
15 res = res + (res >> 8);
16 return (res + (res >> 16)) & 0x000000FF;
17}
18
19unsigned long hweight64(__u64 w)
20{
21#if BITS_PER_LONG == 32
22 return hweight32((unsigned int)(w >> 32)) + hweight32((unsigned int)w);
23#elif BITS_PER_LONG == 64
24 __u64 res = w - ((w >> 1) & 0x5555555555555555ul);
25 res = (res & 0x3333333333333333ul) + ((res >> 2) & 0x3333333333333333ul);
26 res = (res + (res >> 4)) & 0x0F0F0F0F0F0F0F0Ful;
27 res = res + (res >> 8);
28 res = res + (res >> 16);
29 return (res + (res >> 32)) & 0x00000000000000FFul;
30#endif
31}
diff --git a/tools/perf/util/include/asm/bitops.h b/tools/perf/util/include/asm/bitops.h
deleted file mode 100644
index 58e9817ffae0..000000000000
--- a/tools/perf/util/include/asm/bitops.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _PERF_ASM_BITOPS_H_
2#define _PERF_ASM_BITOPS_H_
3
4#include <sys/types.h>
5#include "../../types.h"
6#include <linux/compiler.h>
7
8/* CHECKME: Not sure both always match */
9#define BITS_PER_LONG __WORDSIZE
10
11#include "../../../../include/asm-generic/bitops/__fls.h"
12#include "../../../../include/asm-generic/bitops/fls.h"
13#include "../../../../include/asm-generic/bitops/fls64.h"
14#include "../../../../include/asm-generic/bitops/__ffs.h"
15#include "../../../../include/asm-generic/bitops/ffz.h"
16#include "../../../../include/asm-generic/bitops/hweight.h"
17
18#endif
diff --git a/tools/perf/util/include/asm/hweight.h b/tools/perf/util/include/asm/hweight.h
new file mode 100644
index 000000000000..36cf26d434a5
--- /dev/null
+++ b/tools/perf/util/include/asm/hweight.h
@@ -0,0 +1,8 @@
1#ifndef PERF_HWEIGHT_H
2#define PERF_HWEIGHT_H
3
4#include <linux/types.h>
5unsigned int hweight32(unsigned int w);
6unsigned long hweight64(__u64 w);
7
8#endif /* PERF_HWEIGHT_H */
diff --git a/tools/perf/util/include/dwarf-regs.h b/tools/perf/util/include/dwarf-regs.h
new file mode 100644
index 000000000000..cf6727e99c44
--- /dev/null
+++ b/tools/perf/util/include/dwarf-regs.h
@@ -0,0 +1,8 @@
1#ifndef _PERF_DWARF_REGS_H_
2#define _PERF_DWARF_REGS_H_
3
4#ifdef DWARF_SUPPORT
5const char *get_arch_regstr(unsigned int n);
6#endif
7
8#endif
diff --git a/tools/perf/util/include/linux/bitmap.h b/tools/perf/util/include/linux/bitmap.h
index 94507639a8c4..eda4416efa0a 100644
--- a/tools/perf/util/include/linux/bitmap.h
+++ b/tools/perf/util/include/linux/bitmap.h
@@ -1,3 +1,35 @@
1#include "../../../../include/linux/bitmap.h" 1#ifndef _PERF_BITOPS_H
2#include "../../../../include/asm-generic/bitops/find.h" 2#define _PERF_BITOPS_H
3#include <linux/errno.h> 3
4#include <string.h>
5#include <linux/bitops.h>
6
7int __bitmap_weight(const unsigned long *bitmap, int bits);
8
9#define BITMAP_LAST_WORD_MASK(nbits) \
10( \
11 ((nbits) % BITS_PER_LONG) ? \
12 (1UL<<((nbits) % BITS_PER_LONG))-1 : ~0UL \
13)
14
15#define small_const_nbits(nbits) \
16 (__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG)
17
18static inline void bitmap_zero(unsigned long *dst, int nbits)
19{
20 if (small_const_nbits(nbits))
21 *dst = 0UL;
22 else {
23 int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
24 memset(dst, 0, len);
25 }
26}
27
28static inline int bitmap_weight(const unsigned long *src, int nbits)
29{
30 if (small_const_nbits(nbits))
31 return hweight_long(*src & BITMAP_LAST_WORD_MASK(nbits));
32 return __bitmap_weight(src, nbits);
33}
34
35#endif /* _PERF_BITOPS_H */
diff --git a/tools/perf/util/include/linux/bitops.h b/tools/perf/util/include/linux/bitops.h
index 8d63116e9435..bb4ac2e05385 100644
--- a/tools/perf/util/include/linux/bitops.h
+++ b/tools/perf/util/include/linux/bitops.h
@@ -1,13 +1,12 @@
1#ifndef _PERF_LINUX_BITOPS_H_ 1#ifndef _PERF_LINUX_BITOPS_H_
2#define _PERF_LINUX_BITOPS_H_ 2#define _PERF_LINUX_BITOPS_H_
3 3
4#define __KERNEL__ 4#include <linux/kernel.h>
5#include <asm/hweight.h>
5 6
6#define CONFIG_GENERIC_FIND_NEXT_BIT 7#define BITS_PER_LONG __WORDSIZE
7#define CONFIG_GENERIC_FIND_FIRST_BIT 8#define BITS_PER_BYTE 8
8#include "../../../../include/linux/bitops.h" 9#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
9
10#undef __KERNEL__
11 10
12static inline void set_bit(int nr, unsigned long *addr) 11static inline void set_bit(int nr, unsigned long *addr)
13{ 12{
@@ -20,10 +19,9 @@ static __always_inline int test_bit(unsigned int nr, const unsigned long *addr)
20 (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0; 19 (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0;
21} 20}
22 21
23unsigned long generic_find_next_zero_le_bit(const unsigned long *addr, unsigned 22static inline unsigned long hweight_long(unsigned long w)
24 long size, unsigned long offset); 23{
25 24 return sizeof(w) == 4 ? hweight32(w) : hweight64(w);
26unsigned long generic_find_next_le_bit(const unsigned long *addr, unsigned 25}
27 long size, unsigned long offset);
28 26
29#endif 27#endif
diff --git a/tools/perf/util/include/linux/compiler.h b/tools/perf/util/include/linux/compiler.h
index dfb0713ed47f..791f9dd27ebf 100644
--- a/tools/perf/util/include/linux/compiler.h
+++ b/tools/perf/util/include/linux/compiler.h
@@ -7,4 +7,6 @@
7#define __user 7#define __user
8#define __attribute_const__ 8#define __attribute_const__
9 9
10#define __used __attribute__((__unused__))
11
10#endif 12#endif
diff --git a/tools/perf/util/include/linux/kernel.h b/tools/perf/util/include/linux/kernel.h
index f2611655ab51..1eb804fd3fbf 100644
--- a/tools/perf/util/include/linux/kernel.h
+++ b/tools/perf/util/include/linux/kernel.h
@@ -28,6 +28,8 @@
28 (type *)((char *)__mptr - offsetof(type, member)); }) 28 (type *)((char *)__mptr - offsetof(type, member)); })
29#endif 29#endif
30 30
31#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); }))
32
31#ifndef max 33#ifndef max
32#define max(x, y) ({ \ 34#define max(x, y) ({ \
33 typeof(x) _max1 = (x); \ 35 typeof(x) _max1 = (x); \
@@ -85,16 +87,19 @@ simple_strtoul(const char *nptr, char **endptr, int base)
85 return strtoul(nptr, endptr, base); 87 return strtoul(nptr, endptr, base);
86} 88}
87 89
90int eprintf(int level,
91 const char *fmt, ...) __attribute__((format(printf, 2, 3)));
92
88#ifndef pr_fmt 93#ifndef pr_fmt
89#define pr_fmt(fmt) fmt 94#define pr_fmt(fmt) fmt
90#endif 95#endif
91 96
92#define pr_err(fmt, ...) \ 97#define pr_err(fmt, ...) \
93 do { fprintf(stderr, pr_fmt(fmt), ##__VA_ARGS__); } while (0) 98 eprintf(0, pr_fmt(fmt), ##__VA_ARGS__)
94#define pr_warning(fmt, ...) \ 99#define pr_warning(fmt, ...) \
95 do { fprintf(stderr, pr_fmt(fmt), ##__VA_ARGS__); } while (0) 100 eprintf(0, pr_fmt(fmt), ##__VA_ARGS__)
96#define pr_info(fmt, ...) \ 101#define pr_info(fmt, ...) \
97 do { fprintf(stderr, pr_fmt(fmt), ##__VA_ARGS__); } while (0) 102 eprintf(0, pr_fmt(fmt), ##__VA_ARGS__)
98#define pr_debug(fmt, ...) \ 103#define pr_debug(fmt, ...) \
99 eprintf(1, pr_fmt(fmt), ##__VA_ARGS__) 104 eprintf(1, pr_fmt(fmt), ##__VA_ARGS__)
100#define pr_debugN(n, fmt, ...) \ 105#define pr_debugN(n, fmt, ...) \
diff --git a/tools/perf/util/map.c b/tools/perf/util/map.c
index e509cd59c67d..e672f2fef65b 100644
--- a/tools/perf/util/map.c
+++ b/tools/perf/util/map.c
@@ -1,9 +1,11 @@
1#include "event.h"
2#include "symbol.h" 1#include "symbol.h"
2#include <errno.h>
3#include <limits.h>
3#include <stdlib.h> 4#include <stdlib.h>
4#include <string.h> 5#include <string.h>
5#include <stdio.h> 6#include <stdio.h>
6#include "debug.h" 7#include <unistd.h>
8#include "map.h"
7 9
8const char *map_type__name[MAP__NR_TYPES] = { 10const char *map_type__name[MAP__NR_TYPES] = {
9 [MAP__FUNCTION] = "Functions", 11 [MAP__FUNCTION] = "Functions",
@@ -36,15 +38,16 @@ void map__init(struct map *self, enum map_type type,
36 self->map_ip = map__map_ip; 38 self->map_ip = map__map_ip;
37 self->unmap_ip = map__unmap_ip; 39 self->unmap_ip = map__unmap_ip;
38 RB_CLEAR_NODE(&self->rb_node); 40 RB_CLEAR_NODE(&self->rb_node);
41 self->groups = NULL;
39} 42}
40 43
41struct map *map__new(struct mmap_event *event, enum map_type type, 44struct map *map__new(struct list_head *dsos__list, u64 start, u64 len,
42 char *cwd, int cwdlen) 45 u64 pgoff, u32 pid, char *filename,
46 enum map_type type, char *cwd, int cwdlen)
43{ 47{
44 struct map *self = malloc(sizeof(*self)); 48 struct map *self = malloc(sizeof(*self));
45 49
46 if (self != NULL) { 50 if (self != NULL) {
47 const char *filename = event->filename;
48 char newfilename[PATH_MAX]; 51 char newfilename[PATH_MAX];
49 struct dso *dso; 52 struct dso *dso;
50 int anon; 53 int anon;
@@ -62,16 +65,15 @@ struct map *map__new(struct mmap_event *event, enum map_type type,
62 anon = is_anon_memory(filename); 65 anon = is_anon_memory(filename);
63 66
64 if (anon) { 67 if (anon) {
65 snprintf(newfilename, sizeof(newfilename), "/tmp/perf-%d.map", event->pid); 68 snprintf(newfilename, sizeof(newfilename), "/tmp/perf-%d.map", pid);
66 filename = newfilename; 69 filename = newfilename;
67 } 70 }
68 71
69 dso = dsos__findnew(filename); 72 dso = __dsos__findnew(dsos__list, filename);
70 if (dso == NULL) 73 if (dso == NULL)
71 goto out_delete; 74 goto out_delete;
72 75
73 map__init(self, type, event->start, event->start + event->len, 76 map__init(self, type, start, start + len, pgoff, dso);
74 event->pgoff, dso);
75 77
76 if (anon) { 78 if (anon) {
77set_identity: 79set_identity:
@@ -235,3 +237,392 @@ u64 map__objdump_2ip(struct map *map, u64 addr)
235 map->unmap_ip(map, addr); /* RIP -> IP */ 237 map->unmap_ip(map, addr); /* RIP -> IP */
236 return ip; 238 return ip;
237} 239}
240
241void map_groups__init(struct map_groups *self)
242{
243 int i;
244 for (i = 0; i < MAP__NR_TYPES; ++i) {
245 self->maps[i] = RB_ROOT;
246 INIT_LIST_HEAD(&self->removed_maps[i]);
247 }
248 self->machine = NULL;
249}
250
251void map_groups__flush(struct map_groups *self)
252{
253 int type;
254
255 for (type = 0; type < MAP__NR_TYPES; type++) {
256 struct rb_root *root = &self->maps[type];
257 struct rb_node *next = rb_first(root);
258
259 while (next) {
260 struct map *pos = rb_entry(next, struct map, rb_node);
261 next = rb_next(&pos->rb_node);
262 rb_erase(&pos->rb_node, root);
263 /*
264 * We may have references to this map, for
265 * instance in some hist_entry instances, so
266 * just move them to a separate list.
267 */
268 list_add_tail(&pos->node, &self->removed_maps[pos->type]);
269 }
270 }
271}
272
273struct symbol *map_groups__find_symbol(struct map_groups *self,
274 enum map_type type, u64 addr,
275 struct map **mapp,
276 symbol_filter_t filter)
277{
278 struct map *map = map_groups__find(self, type, addr);
279
280 if (map != NULL) {
281 if (mapp != NULL)
282 *mapp = map;
283 return map__find_symbol(map, map->map_ip(map, addr), filter);
284 }
285
286 return NULL;
287}
288
289struct symbol *map_groups__find_symbol_by_name(struct map_groups *self,
290 enum map_type type,
291 const char *name,
292 struct map **mapp,
293 symbol_filter_t filter)
294{
295 struct rb_node *nd;
296
297 for (nd = rb_first(&self->maps[type]); nd; nd = rb_next(nd)) {
298 struct map *pos = rb_entry(nd, struct map, rb_node);
299 struct symbol *sym = map__find_symbol_by_name(pos, name, filter);
300
301 if (sym == NULL)
302 continue;
303 if (mapp != NULL)
304 *mapp = pos;
305 return sym;
306 }
307
308 return NULL;
309}
310
311size_t __map_groups__fprintf_maps(struct map_groups *self,
312 enum map_type type, int verbose, FILE *fp)
313{
314 size_t printed = fprintf(fp, "%s:\n", map_type__name[type]);
315 struct rb_node *nd;
316
317 for (nd = rb_first(&self->maps[type]); nd; nd = rb_next(nd)) {
318 struct map *pos = rb_entry(nd, struct map, rb_node);
319 printed += fprintf(fp, "Map:");
320 printed += map__fprintf(pos, fp);
321 if (verbose > 2) {
322 printed += dso__fprintf(pos->dso, type, fp);
323 printed += fprintf(fp, "--\n");
324 }
325 }
326
327 return printed;
328}
329
330size_t map_groups__fprintf_maps(struct map_groups *self, int verbose, FILE *fp)
331{
332 size_t printed = 0, i;
333 for (i = 0; i < MAP__NR_TYPES; ++i)
334 printed += __map_groups__fprintf_maps(self, i, verbose, fp);
335 return printed;
336}
337
338static size_t __map_groups__fprintf_removed_maps(struct map_groups *self,
339 enum map_type type,
340 int verbose, FILE *fp)
341{
342 struct map *pos;
343 size_t printed = 0;
344
345 list_for_each_entry(pos, &self->removed_maps[type], node) {
346 printed += fprintf(fp, "Map:");
347 printed += map__fprintf(pos, fp);
348 if (verbose > 1) {
349 printed += dso__fprintf(pos->dso, type, fp);
350 printed += fprintf(fp, "--\n");
351 }
352 }
353 return printed;
354}
355
356static size_t map_groups__fprintf_removed_maps(struct map_groups *self,
357 int verbose, FILE *fp)
358{
359 size_t printed = 0, i;
360 for (i = 0; i < MAP__NR_TYPES; ++i)
361 printed += __map_groups__fprintf_removed_maps(self, i, verbose, fp);
362 return printed;
363}
364
365size_t map_groups__fprintf(struct map_groups *self, int verbose, FILE *fp)
366{
367 size_t printed = map_groups__fprintf_maps(self, verbose, fp);
368 printed += fprintf(fp, "Removed maps:\n");
369 return printed + map_groups__fprintf_removed_maps(self, verbose, fp);
370}
371
372int map_groups__fixup_overlappings(struct map_groups *self, struct map *map,
373 int verbose, FILE *fp)
374{
375 struct rb_root *root = &self->maps[map->type];
376 struct rb_node *next = rb_first(root);
377
378 while (next) {
379 struct map *pos = rb_entry(next, struct map, rb_node);
380 next = rb_next(&pos->rb_node);
381
382 if (!map__overlap(pos, map))
383 continue;
384
385 if (verbose >= 2) {
386 fputs("overlapping maps:\n", fp);
387 map__fprintf(map, fp);
388 map__fprintf(pos, fp);
389 }
390
391 rb_erase(&pos->rb_node, root);
392 /*
393 * We may have references to this map, for instance in some
394 * hist_entry instances, so just move them to a separate
395 * list.
396 */
397 list_add_tail(&pos->node, &self->removed_maps[map->type]);
398 /*
399 * Now check if we need to create new maps for areas not
400 * overlapped by the new map:
401 */
402 if (map->start > pos->start) {
403 struct map *before = map__clone(pos);
404
405 if (before == NULL)
406 return -ENOMEM;
407
408 before->end = map->start - 1;
409 map_groups__insert(self, before);
410 if (verbose >= 2)
411 map__fprintf(before, fp);
412 }
413
414 if (map->end < pos->end) {
415 struct map *after = map__clone(pos);
416
417 if (after == NULL)
418 return -ENOMEM;
419
420 after->start = map->end + 1;
421 map_groups__insert(self, after);
422 if (verbose >= 2)
423 map__fprintf(after, fp);
424 }
425 }
426
427 return 0;
428}
429
430/*
431 * XXX This should not really _copy_ te maps, but refcount them.
432 */
433int map_groups__clone(struct map_groups *self,
434 struct map_groups *parent, enum map_type type)
435{
436 struct rb_node *nd;
437 for (nd = rb_first(&parent->maps[type]); nd; nd = rb_next(nd)) {
438 struct map *map = rb_entry(nd, struct map, rb_node);
439 struct map *new = map__clone(map);
440 if (new == NULL)
441 return -ENOMEM;
442 map_groups__insert(self, new);
443 }
444 return 0;
445}
446
447static u64 map__reloc_map_ip(struct map *map, u64 ip)
448{
449 return ip + (s64)map->pgoff;
450}
451
452static u64 map__reloc_unmap_ip(struct map *map, u64 ip)
453{
454 return ip - (s64)map->pgoff;
455}
456
457void map__reloc_vmlinux(struct map *self)
458{
459 struct kmap *kmap = map__kmap(self);
460 s64 reloc;
461
462 if (!kmap->ref_reloc_sym || !kmap->ref_reloc_sym->unrelocated_addr)
463 return;
464
465 reloc = (kmap->ref_reloc_sym->unrelocated_addr -
466 kmap->ref_reloc_sym->addr);
467
468 if (!reloc)
469 return;
470
471 self->map_ip = map__reloc_map_ip;
472 self->unmap_ip = map__reloc_unmap_ip;
473 self->pgoff = reloc;
474}
475
476void maps__insert(struct rb_root *maps, struct map *map)
477{
478 struct rb_node **p = &maps->rb_node;
479 struct rb_node *parent = NULL;
480 const u64 ip = map->start;
481 struct map *m;
482
483 while (*p != NULL) {
484 parent = *p;
485 m = rb_entry(parent, struct map, rb_node);
486 if (ip < m->start)
487 p = &(*p)->rb_left;
488 else
489 p = &(*p)->rb_right;
490 }
491
492 rb_link_node(&map->rb_node, parent, p);
493 rb_insert_color(&map->rb_node, maps);
494}
495
496struct map *maps__find(struct rb_root *maps, u64 ip)
497{
498 struct rb_node **p = &maps->rb_node;
499 struct rb_node *parent = NULL;
500 struct map *m;
501
502 while (*p != NULL) {
503 parent = *p;
504 m = rb_entry(parent, struct map, rb_node);
505 if (ip < m->start)
506 p = &(*p)->rb_left;
507 else if (ip > m->end)
508 p = &(*p)->rb_right;
509 else
510 return m;
511 }
512
513 return NULL;
514}
515
516int machine__init(struct machine *self, const char *root_dir, pid_t pid)
517{
518 map_groups__init(&self->kmaps);
519 RB_CLEAR_NODE(&self->rb_node);
520 INIT_LIST_HEAD(&self->user_dsos);
521 INIT_LIST_HEAD(&self->kernel_dsos);
522
523 self->kmaps.machine = self;
524 self->pid = pid;
525 self->root_dir = strdup(root_dir);
526 return self->root_dir == NULL ? -ENOMEM : 0;
527}
528
529struct machine *machines__add(struct rb_root *self, pid_t pid,
530 const char *root_dir)
531{
532 struct rb_node **p = &self->rb_node;
533 struct rb_node *parent = NULL;
534 struct machine *pos, *machine = malloc(sizeof(*machine));
535
536 if (!machine)
537 return NULL;
538
539 if (machine__init(machine, root_dir, pid) != 0) {
540 free(machine);
541 return NULL;
542 }
543
544 while (*p != NULL) {
545 parent = *p;
546 pos = rb_entry(parent, struct machine, rb_node);
547 if (pid < pos->pid)
548 p = &(*p)->rb_left;
549 else
550 p = &(*p)->rb_right;
551 }
552
553 rb_link_node(&machine->rb_node, parent, p);
554 rb_insert_color(&machine->rb_node, self);
555
556 return machine;
557}
558
559struct machine *machines__find(struct rb_root *self, pid_t pid)
560{
561 struct rb_node **p = &self->rb_node;
562 struct rb_node *parent = NULL;
563 struct machine *machine;
564 struct machine *default_machine = NULL;
565
566 while (*p != NULL) {
567 parent = *p;
568 machine = rb_entry(parent, struct machine, rb_node);
569 if (pid < machine->pid)
570 p = &(*p)->rb_left;
571 else if (pid > machine->pid)
572 p = &(*p)->rb_right;
573 else
574 return machine;
575 if (!machine->pid)
576 default_machine = machine;
577 }
578
579 return default_machine;
580}
581
582struct machine *machines__findnew(struct rb_root *self, pid_t pid)
583{
584 char path[PATH_MAX];
585 const char *root_dir;
586 struct machine *machine = machines__find(self, pid);
587
588 if (!machine || machine->pid != pid) {
589 if (pid == HOST_KERNEL_ID || pid == DEFAULT_GUEST_KERNEL_ID)
590 root_dir = "";
591 else {
592 if (!symbol_conf.guestmount)
593 goto out;
594 sprintf(path, "%s/%d", symbol_conf.guestmount, pid);
595 if (access(path, R_OK)) {
596 pr_err("Can't access file %s\n", path);
597 goto out;
598 }
599 root_dir = path;
600 }
601 machine = machines__add(self, pid, root_dir);
602 }
603
604out:
605 return machine;
606}
607
608void machines__process(struct rb_root *self, machine__process_t process, void *data)
609{
610 struct rb_node *nd;
611
612 for (nd = rb_first(self); nd; nd = rb_next(nd)) {
613 struct machine *pos = rb_entry(nd, struct machine, rb_node);
614 process(pos, data);
615 }
616}
617
618char *machine__mmap_name(struct machine *self, char *bf, size_t size)
619{
620 if (machine__is_host(self))
621 snprintf(bf, size, "[%s]", "kernel.kallsyms");
622 else if (machine__is_default_guest(self))
623 snprintf(bf, size, "[%s]", "guest.kernel.kallsyms");
624 else
625 snprintf(bf, size, "[%s.%d]", "guest.kernel.kallsyms", self->pid);
626
627 return bf;
628}
diff --git a/tools/perf/util/map.h b/tools/perf/util/map.h
index b756368076c6..f39134512829 100644
--- a/tools/perf/util/map.h
+++ b/tools/perf/util/map.h
@@ -4,7 +4,9 @@
4#include <linux/compiler.h> 4#include <linux/compiler.h>
5#include <linux/list.h> 5#include <linux/list.h>
6#include <linux/rbtree.h> 6#include <linux/rbtree.h>
7#include <linux/types.h> 7#include <stdio.h>
8#include <stdbool.h>
9#include "types.h"
8 10
9enum map_type { 11enum map_type {
10 MAP__FUNCTION = 0, 12 MAP__FUNCTION = 0,
@@ -18,6 +20,7 @@ extern const char *map_type__name[MAP__NR_TYPES];
18struct dso; 20struct dso;
19struct ref_reloc_sym; 21struct ref_reloc_sym;
20struct map_groups; 22struct map_groups;
23struct machine;
21 24
22struct map { 25struct map {
23 union { 26 union {
@@ -27,6 +30,7 @@ struct map {
27 u64 start; 30 u64 start;
28 u64 end; 31 u64 end;
29 enum map_type type; 32 enum map_type type;
33 u32 priv;
30 u64 pgoff; 34 u64 pgoff;
31 35
32 /* ip -> dso rip */ 36 /* ip -> dso rip */
@@ -35,6 +39,7 @@ struct map {
35 u64 (*unmap_ip)(struct map *, u64); 39 u64 (*unmap_ip)(struct map *, u64);
36 40
37 struct dso *dso; 41 struct dso *dso;
42 struct map_groups *groups;
38}; 43};
39 44
40struct kmap { 45struct kmap {
@@ -42,6 +47,32 @@ struct kmap {
42 struct map_groups *kmaps; 47 struct map_groups *kmaps;
43}; 48};
44 49
50struct map_groups {
51 struct rb_root maps[MAP__NR_TYPES];
52 struct list_head removed_maps[MAP__NR_TYPES];
53 struct machine *machine;
54};
55
56/* Native host kernel uses -1 as pid index in machine */
57#define HOST_KERNEL_ID (-1)
58#define DEFAULT_GUEST_KERNEL_ID (0)
59
60struct machine {
61 struct rb_node rb_node;
62 pid_t pid;
63 char *root_dir;
64 struct list_head user_dsos;
65 struct list_head kernel_dsos;
66 struct map_groups kmaps;
67 struct map *vmlinux_maps[MAP__NR_TYPES];
68};
69
70static inline
71struct map *machine__kernel_map(struct machine *self, enum map_type type)
72{
73 return self->vmlinux_maps[type];
74}
75
45static inline struct kmap *map__kmap(struct map *self) 76static inline struct kmap *map__kmap(struct map *self)
46{ 77{
47 return (struct kmap *)(self + 1); 78 return (struct kmap *)(self + 1);
@@ -68,14 +99,14 @@ u64 map__rip_2objdump(struct map *map, u64 rip);
68u64 map__objdump_2ip(struct map *map, u64 addr); 99u64 map__objdump_2ip(struct map *map, u64 addr);
69 100
70struct symbol; 101struct symbol;
71struct mmap_event;
72 102
73typedef int (*symbol_filter_t)(struct map *map, struct symbol *sym); 103typedef int (*symbol_filter_t)(struct map *map, struct symbol *sym);
74 104
75void map__init(struct map *self, enum map_type type, 105void map__init(struct map *self, enum map_type type,
76 u64 start, u64 end, u64 pgoff, struct dso *dso); 106 u64 start, u64 end, u64 pgoff, struct dso *dso);
77struct map *map__new(struct mmap_event *event, enum map_type, 107struct map *map__new(struct list_head *dsos__list, u64 start, u64 len,
78 char *cwd, int cwdlen); 108 u64 pgoff, u32 pid, char *filename,
109 enum map_type type, char *cwd, int cwdlen);
79void map__delete(struct map *self); 110void map__delete(struct map *self);
80struct map *map__clone(struct map *self); 111struct map *map__clone(struct map *self);
81int map__overlap(struct map *l, struct map *r); 112int map__overlap(struct map *l, struct map *r);
@@ -91,4 +122,96 @@ void map__fixup_end(struct map *self);
91 122
92void map__reloc_vmlinux(struct map *self); 123void map__reloc_vmlinux(struct map *self);
93 124
125size_t __map_groups__fprintf_maps(struct map_groups *self,
126 enum map_type type, int verbose, FILE *fp);
127void maps__insert(struct rb_root *maps, struct map *map);
128struct map *maps__find(struct rb_root *maps, u64 addr);
129void map_groups__init(struct map_groups *self);
130int map_groups__clone(struct map_groups *self,
131 struct map_groups *parent, enum map_type type);
132size_t map_groups__fprintf(struct map_groups *self, int verbose, FILE *fp);
133size_t map_groups__fprintf_maps(struct map_groups *self, int verbose, FILE *fp);
134
135typedef void (*machine__process_t)(struct machine *self, void *data);
136
137void machines__process(struct rb_root *self, machine__process_t process, void *data);
138struct machine *machines__add(struct rb_root *self, pid_t pid,
139 const char *root_dir);
140struct machine *machines__find_host(struct rb_root *self);
141struct machine *machines__find(struct rb_root *self, pid_t pid);
142struct machine *machines__findnew(struct rb_root *self, pid_t pid);
143char *machine__mmap_name(struct machine *self, char *bf, size_t size);
144int machine__init(struct machine *self, const char *root_dir, pid_t pid);
145
146/*
147 * Default guest kernel is defined by parameter --guestkallsyms
148 * and --guestmodules
149 */
150static inline bool machine__is_default_guest(struct machine *self)
151{
152 return self ? self->pid == DEFAULT_GUEST_KERNEL_ID : false;
153}
154
155static inline bool machine__is_host(struct machine *self)
156{
157 return self ? self->pid == HOST_KERNEL_ID : false;
158}
159
160static inline void map_groups__insert(struct map_groups *self, struct map *map)
161{
162 maps__insert(&self->maps[map->type], map);
163 map->groups = self;
164}
165
166static inline struct map *map_groups__find(struct map_groups *self,
167 enum map_type type, u64 addr)
168{
169 return maps__find(&self->maps[type], addr);
170}
171
172struct symbol *map_groups__find_symbol(struct map_groups *self,
173 enum map_type type, u64 addr,
174 struct map **mapp,
175 symbol_filter_t filter);
176
177struct symbol *map_groups__find_symbol_by_name(struct map_groups *self,
178 enum map_type type,
179 const char *name,
180 struct map **mapp,
181 symbol_filter_t filter);
182
183static inline
184struct symbol *machine__find_kernel_symbol(struct machine *self,
185 enum map_type type, u64 addr,
186 struct map **mapp,
187 symbol_filter_t filter)
188{
189 return map_groups__find_symbol(&self->kmaps, type, addr, mapp, filter);
190}
191
192static inline
193struct symbol *machine__find_kernel_function(struct machine *self, u64 addr,
194 struct map **mapp,
195 symbol_filter_t filter)
196{
197 return machine__find_kernel_symbol(self, MAP__FUNCTION, addr, mapp, filter);
198}
199
200static inline
201struct symbol *map_groups__find_function_by_name(struct map_groups *self,
202 const char *name, struct map **mapp,
203 symbol_filter_t filter)
204{
205 return map_groups__find_symbol_by_name(self, MAP__FUNCTION, name, mapp, filter);
206}
207
208int map_groups__fixup_overlappings(struct map_groups *self, struct map *map,
209 int verbose, FILE *fp);
210
211struct map *map_groups__find_by_name(struct map_groups *self,
212 enum map_type type, const char *name);
213struct map *machine__new_module(struct machine *self, u64 start, const char *filename);
214
215void map_groups__flush(struct map_groups *self);
216
94#endif /* __PERF_MAP_H */ 217#endif /* __PERF_MAP_H */
diff --git a/tools/perf/util/newt.c b/tools/perf/util/newt.c
new file mode 100644
index 000000000000..ccb7c5bb269e
--- /dev/null
+++ b/tools/perf/util/newt.c
@@ -0,0 +1,1084 @@
1#define _GNU_SOURCE
2#include <stdio.h>
3#undef _GNU_SOURCE
4
5#include <slang.h>
6#include <stdlib.h>
7#include <newt.h>
8#include <sys/ttydefaults.h>
9
10#include "cache.h"
11#include "hist.h"
12#include "pstack.h"
13#include "session.h"
14#include "sort.h"
15#include "symbol.h"
16
17#if SLANG_VERSION < 20104
18#define slsmg_printf(msg, args...) SLsmg_printf((char *)msg, ##args)
19#define slsmg_write_nstring(msg, len) SLsmg_write_nstring((char *)msg, len)
20#define sltt_set_color(obj, name, fg, bg) SLtt_set_color(obj,(char *)name,\
21 (char *)fg, (char *)bg)
22#else
23#define slsmg_printf SLsmg_printf
24#define slsmg_write_nstring SLsmg_write_nstring
25#define sltt_set_color SLtt_set_color
26#endif
27
28struct ui_progress {
29 newtComponent form, scale;
30};
31
32struct ui_progress *ui_progress__new(const char *title, u64 total)
33{
34 struct ui_progress *self = malloc(sizeof(*self));
35
36 if (self != NULL) {
37 int cols;
38 newtGetScreenSize(&cols, NULL);
39 cols -= 4;
40 newtCenteredWindow(cols, 1, title);
41 self->form = newtForm(NULL, NULL, 0);
42 if (self->form == NULL)
43 goto out_free_self;
44 self->scale = newtScale(0, 0, cols, total);
45 if (self->scale == NULL)
46 goto out_free_form;
47 newtFormAddComponent(self->form, self->scale);
48 newtRefresh();
49 }
50
51 return self;
52
53out_free_form:
54 newtFormDestroy(self->form);
55out_free_self:
56 free(self);
57 return NULL;
58}
59
60void ui_progress__update(struct ui_progress *self, u64 curr)
61{
62 newtScaleSet(self->scale, curr);
63 newtRefresh();
64}
65
66void ui_progress__delete(struct ui_progress *self)
67{
68 newtFormDestroy(self->form);
69 newtPopWindow();
70 free(self);
71}
72
73static void ui_helpline__pop(void)
74{
75 newtPopHelpLine();
76}
77
78static void ui_helpline__push(const char *msg)
79{
80 newtPushHelpLine(msg);
81}
82
83static void ui_helpline__vpush(const char *fmt, va_list ap)
84{
85 char *s;
86
87 if (vasprintf(&s, fmt, ap) < 0)
88 vfprintf(stderr, fmt, ap);
89 else {
90 ui_helpline__push(s);
91 free(s);
92 }
93}
94
95static void ui_helpline__fpush(const char *fmt, ...)
96{
97 va_list ap;
98
99 va_start(ap, fmt);
100 ui_helpline__vpush(fmt, ap);
101 va_end(ap);
102}
103
104static void ui_helpline__puts(const char *msg)
105{
106 ui_helpline__pop();
107 ui_helpline__push(msg);
108}
109
110static char browser__last_msg[1024];
111
112int browser__show_help(const char *format, va_list ap)
113{
114 int ret;
115 static int backlog;
116
117 ret = vsnprintf(browser__last_msg + backlog,
118 sizeof(browser__last_msg) - backlog, format, ap);
119 backlog += ret;
120
121 if (browser__last_msg[backlog - 1] == '\n') {
122 ui_helpline__puts(browser__last_msg);
123 newtRefresh();
124 backlog = 0;
125 }
126
127 return ret;
128}
129
130static void newt_form__set_exit_keys(newtComponent self)
131{
132 newtFormAddHotKey(self, NEWT_KEY_LEFT);
133 newtFormAddHotKey(self, NEWT_KEY_ESCAPE);
134 newtFormAddHotKey(self, 'Q');
135 newtFormAddHotKey(self, 'q');
136 newtFormAddHotKey(self, CTRL('c'));
137}
138
139static newtComponent newt_form__new(void)
140{
141 newtComponent self = newtForm(NULL, NULL, 0);
142 if (self)
143 newt_form__set_exit_keys(self);
144 return self;
145}
146
147static int popup_menu(int argc, char * const argv[])
148{
149 struct newtExitStruct es;
150 int i, rc = -1, max_len = 5;
151 newtComponent listbox, form = newt_form__new();
152
153 if (form == NULL)
154 return -1;
155
156 listbox = newtListbox(0, 0, argc, NEWT_FLAG_RETURNEXIT);
157 if (listbox == NULL)
158 goto out_destroy_form;
159
160 newtFormAddComponent(form, listbox);
161
162 for (i = 0; i < argc; ++i) {
163 int len = strlen(argv[i]);
164 if (len > max_len)
165 max_len = len;
166 if (newtListboxAddEntry(listbox, argv[i], (void *)(long)i))
167 goto out_destroy_form;
168 }
169
170 newtCenteredWindow(max_len, argc, NULL);
171 newtFormRun(form, &es);
172 rc = newtListboxGetCurrent(listbox) - NULL;
173 if (es.reason == NEWT_EXIT_HOTKEY)
174 rc = -1;
175 newtPopWindow();
176out_destroy_form:
177 newtFormDestroy(form);
178 return rc;
179}
180
181static int ui__help_window(const char *text)
182{
183 struct newtExitStruct es;
184 newtComponent tb, form = newt_form__new();
185 int rc = -1;
186 int max_len = 0, nr_lines = 0;
187 const char *t;
188
189 if (form == NULL)
190 return -1;
191
192 t = text;
193 while (1) {
194 const char *sep = strchr(t, '\n');
195 int len;
196
197 if (sep == NULL)
198 sep = strchr(t, '\0');
199 len = sep - t;
200 if (max_len < len)
201 max_len = len;
202 ++nr_lines;
203 if (*sep == '\0')
204 break;
205 t = sep + 1;
206 }
207
208 tb = newtTextbox(0, 0, max_len, nr_lines, 0);
209 if (tb == NULL)
210 goto out_destroy_form;
211
212 newtTextboxSetText(tb, text);
213 newtFormAddComponent(form, tb);
214 newtCenteredWindow(max_len, nr_lines, NULL);
215 newtFormRun(form, &es);
216 newtPopWindow();
217 rc = 0;
218out_destroy_form:
219 newtFormDestroy(form);
220 return rc;
221}
222
223static bool dialog_yesno(const char *msg)
224{
225 /* newtWinChoice should really be accepting const char pointers... */
226 char yes[] = "Yes", no[] = "No";
227 return newtWinChoice(NULL, yes, no, (char *)msg) == 1;
228}
229
230#define HE_COLORSET_TOP 50
231#define HE_COLORSET_MEDIUM 51
232#define HE_COLORSET_NORMAL 52
233#define HE_COLORSET_SELECTED 53
234#define HE_COLORSET_CODE 54
235
236static int ui_browser__percent_color(double percent, bool current)
237{
238 if (current)
239 return HE_COLORSET_SELECTED;
240 if (percent >= MIN_RED)
241 return HE_COLORSET_TOP;
242 if (percent >= MIN_GREEN)
243 return HE_COLORSET_MEDIUM;
244 return HE_COLORSET_NORMAL;
245}
246
247struct ui_browser {
248 newtComponent form, sb;
249 u64 index, first_visible_entry_idx;
250 void *first_visible_entry, *entries;
251 u16 top, left, width, height;
252 void *priv;
253 u32 nr_entries;
254};
255
256static void ui_browser__refresh_dimensions(struct ui_browser *self)
257{
258 int cols, rows;
259 newtGetScreenSize(&cols, &rows);
260
261 if (self->width > cols - 4)
262 self->width = cols - 4;
263 self->height = rows - 5;
264 if (self->height > self->nr_entries)
265 self->height = self->nr_entries;
266 self->top = (rows - self->height) / 2;
267 self->left = (cols - self->width) / 2;
268}
269
270static void ui_browser__reset_index(struct ui_browser *self)
271{
272 self->index = self->first_visible_entry_idx = 0;
273 self->first_visible_entry = NULL;
274}
275
276static int objdump_line__show(struct objdump_line *self, struct list_head *head,
277 int width, struct hist_entry *he, int len,
278 bool current_entry)
279{
280 if (self->offset != -1) {
281 struct symbol *sym = he->ms.sym;
282 unsigned int hits = 0;
283 double percent = 0.0;
284 int color;
285 struct sym_priv *priv = symbol__priv(sym);
286 struct sym_ext *sym_ext = priv->ext;
287 struct sym_hist *h = priv->hist;
288 s64 offset = self->offset;
289 struct objdump_line *next = objdump__get_next_ip_line(head, self);
290
291 while (offset < (s64)len &&
292 (next == NULL || offset < next->offset)) {
293 if (sym_ext) {
294 percent += sym_ext[offset].percent;
295 } else
296 hits += h->ip[offset];
297
298 ++offset;
299 }
300
301 if (sym_ext == NULL && h->sum)
302 percent = 100.0 * hits / h->sum;
303
304 color = ui_browser__percent_color(percent, current_entry);
305 SLsmg_set_color(color);
306 slsmg_printf(" %7.2f ", percent);
307 if (!current_entry)
308 SLsmg_set_color(HE_COLORSET_CODE);
309 } else {
310 int color = ui_browser__percent_color(0, current_entry);
311 SLsmg_set_color(color);
312 slsmg_write_nstring(" ", 9);
313 }
314
315 SLsmg_write_char(':');
316 slsmg_write_nstring(" ", 8);
317 if (!*self->line)
318 slsmg_write_nstring(" ", width - 18);
319 else
320 slsmg_write_nstring(self->line, width - 18);
321
322 return 0;
323}
324
325static int ui_browser__refresh_entries(struct ui_browser *self)
326{
327 struct objdump_line *pos;
328 struct list_head *head = self->entries;
329 struct hist_entry *he = self->priv;
330 int row = 0;
331 int len = he->ms.sym->end - he->ms.sym->start;
332
333 if (self->first_visible_entry == NULL || self->first_visible_entry == self->entries)
334 self->first_visible_entry = head->next;
335
336 pos = list_entry(self->first_visible_entry, struct objdump_line, node);
337
338 list_for_each_entry_from(pos, head, node) {
339 bool current_entry = (self->first_visible_entry_idx + row) == self->index;
340 SLsmg_gotorc(self->top + row, self->left);
341 objdump_line__show(pos, head, self->width,
342 he, len, current_entry);
343 if (++row == self->height)
344 break;
345 }
346
347 SLsmg_set_color(HE_COLORSET_NORMAL);
348 SLsmg_fill_region(self->top + row, self->left,
349 self->height - row, self->width, ' ');
350
351 return 0;
352}
353
354static int ui_browser__run(struct ui_browser *self, const char *title,
355 struct newtExitStruct *es)
356{
357 if (self->form) {
358 newtFormDestroy(self->form);
359 newtPopWindow();
360 }
361
362 ui_browser__refresh_dimensions(self);
363 newtCenteredWindow(self->width + 2, self->height, title);
364 self->form = newt_form__new();
365 if (self->form == NULL)
366 return -1;
367
368 self->sb = newtVerticalScrollbar(self->width + 1, 0, self->height,
369 HE_COLORSET_NORMAL,
370 HE_COLORSET_SELECTED);
371 if (self->sb == NULL)
372 return -1;
373
374 newtFormAddHotKey(self->form, NEWT_KEY_UP);
375 newtFormAddHotKey(self->form, NEWT_KEY_DOWN);
376 newtFormAddHotKey(self->form, NEWT_KEY_PGUP);
377 newtFormAddHotKey(self->form, NEWT_KEY_PGDN);
378 newtFormAddHotKey(self->form, NEWT_KEY_HOME);
379 newtFormAddHotKey(self->form, NEWT_KEY_END);
380
381 if (ui_browser__refresh_entries(self) < 0)
382 return -1;
383 newtFormAddComponent(self->form, self->sb);
384
385 while (1) {
386 unsigned int offset;
387
388 newtFormRun(self->form, es);
389
390 if (es->reason != NEWT_EXIT_HOTKEY)
391 break;
392 switch (es->u.key) {
393 case NEWT_KEY_DOWN:
394 if (self->index == self->nr_entries - 1)
395 break;
396 ++self->index;
397 if (self->index == self->first_visible_entry_idx + self->height) {
398 struct list_head *pos = self->first_visible_entry;
399 ++self->first_visible_entry_idx;
400 self->first_visible_entry = pos->next;
401 }
402 break;
403 case NEWT_KEY_UP:
404 if (self->index == 0)
405 break;
406 --self->index;
407 if (self->index < self->first_visible_entry_idx) {
408 struct list_head *pos = self->first_visible_entry;
409 --self->first_visible_entry_idx;
410 self->first_visible_entry = pos->prev;
411 }
412 break;
413 case NEWT_KEY_PGDN:
414 if (self->first_visible_entry_idx + self->height > self->nr_entries - 1)
415 break;
416
417 offset = self->height;
418 if (self->index + offset > self->nr_entries - 1)
419 offset = self->nr_entries - 1 - self->index;
420 self->index += offset;
421 self->first_visible_entry_idx += offset;
422
423 while (offset--) {
424 struct list_head *pos = self->first_visible_entry;
425 self->first_visible_entry = pos->next;
426 }
427
428 break;
429 case NEWT_KEY_PGUP:
430 if (self->first_visible_entry_idx == 0)
431 break;
432
433 if (self->first_visible_entry_idx < self->height)
434 offset = self->first_visible_entry_idx;
435 else
436 offset = self->height;
437
438 self->index -= offset;
439 self->first_visible_entry_idx -= offset;
440
441 while (offset--) {
442 struct list_head *pos = self->first_visible_entry;
443 self->first_visible_entry = pos->prev;
444 }
445 break;
446 case NEWT_KEY_HOME:
447 ui_browser__reset_index(self);
448 break;
449 case NEWT_KEY_END: {
450 struct list_head *head = self->entries;
451 offset = self->height - 1;
452
453 if (offset > self->nr_entries)
454 offset = self->nr_entries;
455
456 self->index = self->first_visible_entry_idx = self->nr_entries - 1 - offset;
457 self->first_visible_entry = head->prev;
458 while (offset-- != 0) {
459 struct list_head *pos = self->first_visible_entry;
460 self->first_visible_entry = pos->prev;
461 }
462 }
463 break;
464 case NEWT_KEY_ESCAPE:
465 case NEWT_KEY_LEFT:
466 case CTRL('c'):
467 case 'Q':
468 case 'q':
469 return 0;
470 default:
471 continue;
472 }
473 if (ui_browser__refresh_entries(self) < 0)
474 return -1;
475 }
476 return 0;
477}
478
479/*
480 * When debugging newt problems it was useful to be able to "unroll"
481 * the calls to newtCheckBoxTreeAdd{Array,Item}, so that we can generate
482 * a source file with the sequence of calls to these methods, to then
483 * tweak the arrays to get the intended results, so I'm keeping this code
484 * here, may be useful again in the future.
485 */
486#undef NEWT_DEBUG
487
488static void newt_checkbox_tree__add(newtComponent tree, const char *str,
489 void *priv, int *indexes)
490{
491#ifdef NEWT_DEBUG
492 /* Print the newtCheckboxTreeAddArray to tinker with its index arrays */
493 int i = 0, len = 40 - strlen(str);
494
495 fprintf(stderr,
496 "\tnewtCheckboxTreeAddItem(tree, %*.*s\"%s\", (void *)%p, 0, ",
497 len, len, " ", str, priv);
498 while (indexes[i] != NEWT_ARG_LAST) {
499 if (indexes[i] != NEWT_ARG_APPEND)
500 fprintf(stderr, " %d,", indexes[i]);
501 else
502 fprintf(stderr, " %s,", "NEWT_ARG_APPEND");
503 ++i;
504 }
505 fprintf(stderr, " %s", " NEWT_ARG_LAST);\n");
506 fflush(stderr);
507#endif
508 newtCheckboxTreeAddArray(tree, str, priv, 0, indexes);
509}
510
511static char *callchain_list__sym_name(struct callchain_list *self,
512 char *bf, size_t bfsize)
513{
514 if (self->ms.sym)
515 return self->ms.sym->name;
516
517 snprintf(bf, bfsize, "%#Lx", self->ip);
518 return bf;
519}
520
521static void __callchain__append_graph_browser(struct callchain_node *self,
522 newtComponent tree, u64 total,
523 int *indexes, int depth)
524{
525 struct rb_node *node;
526 u64 new_total, remaining;
527 int idx = 0;
528
529 if (callchain_param.mode == CHAIN_GRAPH_REL)
530 new_total = self->children_hit;
531 else
532 new_total = total;
533
534 remaining = new_total;
535 node = rb_first(&self->rb_root);
536 while (node) {
537 struct callchain_node *child = rb_entry(node, struct callchain_node, rb_node);
538 struct rb_node *next = rb_next(node);
539 u64 cumul = cumul_hits(child);
540 struct callchain_list *chain;
541 int first = true, printed = 0;
542 int chain_idx = -1;
543 remaining -= cumul;
544
545 indexes[depth] = NEWT_ARG_APPEND;
546 indexes[depth + 1] = NEWT_ARG_LAST;
547
548 list_for_each_entry(chain, &child->val, list) {
549 char ipstr[BITS_PER_LONG / 4 + 1],
550 *alloc_str = NULL;
551 const char *str = callchain_list__sym_name(chain, ipstr, sizeof(ipstr));
552
553 if (first) {
554 double percent = cumul * 100.0 / new_total;
555
556 first = false;
557 if (asprintf(&alloc_str, "%2.2f%% %s", percent, str) < 0)
558 str = "Not enough memory!";
559 else
560 str = alloc_str;
561 } else {
562 indexes[depth] = idx;
563 indexes[depth + 1] = NEWT_ARG_APPEND;
564 indexes[depth + 2] = NEWT_ARG_LAST;
565 ++chain_idx;
566 }
567 newt_checkbox_tree__add(tree, str, &chain->ms, indexes);
568 free(alloc_str);
569 ++printed;
570 }
571
572 indexes[depth] = idx;
573 if (chain_idx != -1)
574 indexes[depth + 1] = chain_idx;
575 if (printed != 0)
576 ++idx;
577 __callchain__append_graph_browser(child, tree, new_total, indexes,
578 depth + (chain_idx != -1 ? 2 : 1));
579 node = next;
580 }
581}
582
583static void callchain__append_graph_browser(struct callchain_node *self,
584 newtComponent tree, u64 total,
585 int *indexes, int parent_idx)
586{
587 struct callchain_list *chain;
588 int i = 0;
589
590 indexes[1] = NEWT_ARG_APPEND;
591 indexes[2] = NEWT_ARG_LAST;
592
593 list_for_each_entry(chain, &self->val, list) {
594 char ipstr[BITS_PER_LONG / 4 + 1], *str;
595
596 if (chain->ip >= PERF_CONTEXT_MAX)
597 continue;
598
599 if (!i++ && sort__first_dimension == SORT_SYM)
600 continue;
601
602 str = callchain_list__sym_name(chain, ipstr, sizeof(ipstr));
603 newt_checkbox_tree__add(tree, str, &chain->ms, indexes);
604 }
605
606 indexes[1] = parent_idx;
607 indexes[2] = NEWT_ARG_APPEND;
608 indexes[3] = NEWT_ARG_LAST;
609 __callchain__append_graph_browser(self, tree, total, indexes, 2);
610}
611
612static void hist_entry__append_callchain_browser(struct hist_entry *self,
613 newtComponent tree, u64 total, int parent_idx)
614{
615 struct rb_node *rb_node;
616 int indexes[1024] = { [0] = parent_idx, };
617 int idx = 0;
618 struct callchain_node *chain;
619
620 rb_node = rb_first(&self->sorted_chain);
621 while (rb_node) {
622 chain = rb_entry(rb_node, struct callchain_node, rb_node);
623 switch (callchain_param.mode) {
624 case CHAIN_FLAT:
625 break;
626 case CHAIN_GRAPH_ABS: /* falldown */
627 case CHAIN_GRAPH_REL:
628 callchain__append_graph_browser(chain, tree, total, indexes, idx++);
629 break;
630 case CHAIN_NONE:
631 default:
632 break;
633 }
634 rb_node = rb_next(rb_node);
635 }
636}
637
638static size_t hist_entry__append_browser(struct hist_entry *self,
639 newtComponent tree, u64 total)
640{
641 char s[256];
642 size_t ret;
643
644 if (symbol_conf.exclude_other && !self->parent)
645 return 0;
646
647 ret = hist_entry__snprintf(self, s, sizeof(s), NULL,
648 false, 0, false, total);
649 if (symbol_conf.use_callchain) {
650 int indexes[2];
651
652 indexes[0] = NEWT_ARG_APPEND;
653 indexes[1] = NEWT_ARG_LAST;
654 newt_checkbox_tree__add(tree, s, &self->ms, indexes);
655 } else
656 newtListboxAppendEntry(tree, s, &self->ms);
657
658 return ret;
659}
660
661static void hist_entry__annotate_browser(struct hist_entry *self)
662{
663 struct ui_browser browser;
664 struct newtExitStruct es;
665 struct objdump_line *pos, *n;
666 LIST_HEAD(head);
667
668 if (self->ms.sym == NULL)
669 return;
670
671 if (hist_entry__annotate(self, &head) < 0)
672 return;
673
674 ui_helpline__push("Press <- or ESC to exit");
675
676 memset(&browser, 0, sizeof(browser));
677 browser.entries = &head;
678 browser.priv = self;
679 list_for_each_entry(pos, &head, node) {
680 size_t line_len = strlen(pos->line);
681 if (browser.width < line_len)
682 browser.width = line_len;
683 ++browser.nr_entries;
684 }
685
686 browser.width += 18; /* Percentage */
687 ui_browser__run(&browser, self->ms.sym->name, &es);
688 newtFormDestroy(browser.form);
689 newtPopWindow();
690 list_for_each_entry_safe(pos, n, &head, node) {
691 list_del(&pos->node);
692 objdump_line__free(pos);
693 }
694 ui_helpline__pop();
695}
696
697static const void *newt__symbol_tree_get_current(newtComponent self)
698{
699 if (symbol_conf.use_callchain)
700 return newtCheckboxTreeGetCurrent(self);
701 return newtListboxGetCurrent(self);
702}
703
704static void hist_browser__selection(newtComponent self, void *data)
705{
706 const struct map_symbol **symbol_ptr = data;
707 *symbol_ptr = newt__symbol_tree_get_current(self);
708}
709
710struct hist_browser {
711 newtComponent form, tree;
712 const struct map_symbol *selection;
713};
714
715static struct hist_browser *hist_browser__new(void)
716{
717 struct hist_browser *self = malloc(sizeof(*self));
718
719 if (self != NULL)
720 self->form = NULL;
721
722 return self;
723}
724
725static void hist_browser__delete(struct hist_browser *self)
726{
727 newtFormDestroy(self->form);
728 newtPopWindow();
729 free(self);
730}
731
732static int hist_browser__populate(struct hist_browser *self, struct hists *hists,
733 const char *title)
734{
735 int max_len = 0, idx, cols, rows;
736 struct ui_progress *progress;
737 struct rb_node *nd;
738 u64 curr_hist = 0;
739 char seq[] = ".", unit;
740 char str[256];
741 unsigned long nr_events = hists->stats.nr_events[PERF_RECORD_SAMPLE];
742
743 if (self->form) {
744 newtFormDestroy(self->form);
745 newtPopWindow();
746 }
747
748 nr_events = convert_unit(nr_events, &unit);
749 snprintf(str, sizeof(str), "Events: %lu%c ",
750 nr_events, unit);
751 newtDrawRootText(0, 0, str);
752
753 newtGetScreenSize(NULL, &rows);
754
755 if (symbol_conf.use_callchain)
756 self->tree = newtCheckboxTreeMulti(0, 0, rows - 5, seq,
757 NEWT_FLAG_SCROLL);
758 else
759 self->tree = newtListbox(0, 0, rows - 5,
760 (NEWT_FLAG_SCROLL |
761 NEWT_FLAG_RETURNEXIT));
762
763 newtComponentAddCallback(self->tree, hist_browser__selection,
764 &self->selection);
765
766 progress = ui_progress__new("Adding entries to the browser...",
767 hists->nr_entries);
768 if (progress == NULL)
769 return -1;
770
771 idx = 0;
772 for (nd = rb_first(&hists->entries); nd; nd = rb_next(nd)) {
773 struct hist_entry *h = rb_entry(nd, struct hist_entry, rb_node);
774 int len;
775
776 if (h->filtered)
777 continue;
778
779 len = hist_entry__append_browser(h, self->tree, hists->stats.total_period);
780 if (len > max_len)
781 max_len = len;
782 if (symbol_conf.use_callchain)
783 hist_entry__append_callchain_browser(h, self->tree,
784 hists->stats.total_period, idx++);
785 ++curr_hist;
786 if (curr_hist % 5)
787 ui_progress__update(progress, curr_hist);
788 }
789
790 ui_progress__delete(progress);
791
792 newtGetScreenSize(&cols, &rows);
793
794 if (max_len > cols)
795 max_len = cols - 3;
796
797 if (!symbol_conf.use_callchain)
798 newtListboxSetWidth(self->tree, max_len);
799
800 newtCenteredWindow(max_len + (symbol_conf.use_callchain ? 5 : 0),
801 rows - 5, title);
802 self->form = newt_form__new();
803 if (self->form == NULL)
804 return -1;
805
806 newtFormAddHotKey(self->form, 'A');
807 newtFormAddHotKey(self->form, 'a');
808 newtFormAddHotKey(self->form, 'D');
809 newtFormAddHotKey(self->form, 'd');
810 newtFormAddHotKey(self->form, 'T');
811 newtFormAddHotKey(self->form, 't');
812 newtFormAddHotKey(self->form, '?');
813 newtFormAddHotKey(self->form, 'H');
814 newtFormAddHotKey(self->form, 'h');
815 newtFormAddHotKey(self->form, NEWT_KEY_F1);
816 newtFormAddHotKey(self->form, NEWT_KEY_RIGHT);
817 newtFormAddComponents(self->form, self->tree, NULL);
818 self->selection = newt__symbol_tree_get_current(self->tree);
819
820 return 0;
821}
822
823static struct hist_entry *hist_browser__selected_entry(struct hist_browser *self)
824{
825 int *indexes;
826
827 if (!symbol_conf.use_callchain)
828 goto out;
829
830 indexes = newtCheckboxTreeFindItem(self->tree, (void *)self->selection);
831 if (indexes) {
832 bool is_hist_entry = indexes[1] == NEWT_ARG_LAST;
833 free(indexes);
834 if (is_hist_entry)
835 goto out;
836 }
837 return NULL;
838out:
839 return container_of(self->selection, struct hist_entry, ms);
840}
841
842static struct thread *hist_browser__selected_thread(struct hist_browser *self)
843{
844 struct hist_entry *he = hist_browser__selected_entry(self);
845 return he ? he->thread : NULL;
846}
847
848static int hist_browser__title(char *bf, size_t size, const char *input_name,
849 const struct dso *dso, const struct thread *thread)
850{
851 int printed = 0;
852
853 if (thread)
854 printed += snprintf(bf + printed, size - printed,
855 "Thread: %s(%d)",
856 (thread->comm_set ? thread->comm : ""),
857 thread->pid);
858 if (dso)
859 printed += snprintf(bf + printed, size - printed,
860 "%sDSO: %s", thread ? " " : "",
861 dso->short_name);
862 return printed ?: snprintf(bf, size, "Report: %s", input_name);
863}
864
865int hists__browse(struct hists *self, const char *helpline, const char *input_name)
866{
867 struct hist_browser *browser = hist_browser__new();
868 struct pstack *fstack = pstack__new(2);
869 const struct thread *thread_filter = NULL;
870 const struct dso *dso_filter = NULL;
871 struct newtExitStruct es;
872 char msg[160];
873 int err = -1;
874
875 if (browser == NULL)
876 return -1;
877
878 fstack = pstack__new(2);
879 if (fstack == NULL)
880 goto out;
881
882 ui_helpline__push(helpline);
883
884 hist_browser__title(msg, sizeof(msg), input_name,
885 dso_filter, thread_filter);
886 if (hist_browser__populate(browser, self, msg) < 0)
887 goto out_free_stack;
888
889 while (1) {
890 const struct thread *thread;
891 const struct dso *dso;
892 char *options[16];
893 int nr_options = 0, choice = 0, i,
894 annotate = -2, zoom_dso = -2, zoom_thread = -2;
895
896 newtFormRun(browser->form, &es);
897
898 thread = hist_browser__selected_thread(browser);
899 dso = browser->selection->map ? browser->selection->map->dso : NULL;
900
901 if (es.reason == NEWT_EXIT_HOTKEY) {
902 if (es.u.key == NEWT_KEY_F1)
903 goto do_help;
904
905 switch (toupper(es.u.key)) {
906 case 'A':
907 goto do_annotate;
908 case 'D':
909 goto zoom_dso;
910 case 'T':
911 goto zoom_thread;
912 case 'H':
913 case '?':
914do_help:
915 ui__help_window("-> Zoom into DSO/Threads & Annotate current symbol\n"
916 "<- Zoom out\n"
917 "a Annotate current symbol\n"
918 "h/?/F1 Show this window\n"
919 "d Zoom into current DSO\n"
920 "t Zoom into current Thread\n"
921 "q/CTRL+C Exit browser");
922 continue;
923 default:;
924 }
925 if (toupper(es.u.key) == 'Q' ||
926 es.u.key == CTRL('c'))
927 break;
928 if (es.u.key == NEWT_KEY_ESCAPE) {
929 if (dialog_yesno("Do you really want to exit?"))
930 break;
931 else
932 continue;
933 }
934
935 if (es.u.key == NEWT_KEY_LEFT) {
936 const void *top;
937
938 if (pstack__empty(fstack))
939 continue;
940 top = pstack__pop(fstack);
941 if (top == &dso_filter)
942 goto zoom_out_dso;
943 if (top == &thread_filter)
944 goto zoom_out_thread;
945 continue;
946 }
947 }
948
949 if (browser->selection->sym != NULL &&
950 asprintf(&options[nr_options], "Annotate %s",
951 browser->selection->sym->name) > 0)
952 annotate = nr_options++;
953
954 if (thread != NULL &&
955 asprintf(&options[nr_options], "Zoom %s %s(%d) thread",
956 (thread_filter ? "out of" : "into"),
957 (thread->comm_set ? thread->comm : ""),
958 thread->pid) > 0)
959 zoom_thread = nr_options++;
960
961 if (dso != NULL &&
962 asprintf(&options[nr_options], "Zoom %s %s DSO",
963 (dso_filter ? "out of" : "into"),
964 (dso->kernel ? "the Kernel" : dso->short_name)) > 0)
965 zoom_dso = nr_options++;
966
967 options[nr_options++] = (char *)"Exit";
968
969 choice = popup_menu(nr_options, options);
970
971 for (i = 0; i < nr_options - 1; ++i)
972 free(options[i]);
973
974 if (choice == nr_options - 1)
975 break;
976
977 if (choice == -1)
978 continue;
979
980 if (choice == annotate) {
981 struct hist_entry *he;
982do_annotate:
983 if (browser->selection->map->dso->origin == DSO__ORIG_KERNEL) {
984 ui_helpline__puts("No vmlinux file found, can't "
985 "annotate with just a "
986 "kallsyms file");
987 continue;
988 }
989
990 he = hist_browser__selected_entry(browser);
991 if (he == NULL)
992 continue;
993
994 hist_entry__annotate_browser(he);
995 } else if (choice == zoom_dso) {
996zoom_dso:
997 if (dso_filter) {
998 pstack__remove(fstack, &dso_filter);
999zoom_out_dso:
1000 ui_helpline__pop();
1001 dso_filter = NULL;
1002 } else {
1003 if (dso == NULL)
1004 continue;
1005 ui_helpline__fpush("To zoom out press <- or -> + \"Zoom out of %s DSO\"",
1006 dso->kernel ? "the Kernel" : dso->short_name);
1007 dso_filter = dso;
1008 pstack__push(fstack, &dso_filter);
1009 }
1010 hists__filter_by_dso(self, dso_filter);
1011 hist_browser__title(msg, sizeof(msg), input_name,
1012 dso_filter, thread_filter);
1013 if (hist_browser__populate(browser, self, msg) < 0)
1014 goto out;
1015 } else if (choice == zoom_thread) {
1016zoom_thread:
1017 if (thread_filter) {
1018 pstack__remove(fstack, &thread_filter);
1019zoom_out_thread:
1020 ui_helpline__pop();
1021 thread_filter = NULL;
1022 } else {
1023 ui_helpline__fpush("To zoom out press <- or -> + \"Zoom out of %s(%d) thread\"",
1024 thread->comm_set ? thread->comm : "",
1025 thread->pid);
1026 thread_filter = thread;
1027 pstack__push(fstack, &thread_filter);
1028 }
1029 hists__filter_by_thread(self, thread_filter);
1030 hist_browser__title(msg, sizeof(msg), input_name,
1031 dso_filter, thread_filter);
1032 if (hist_browser__populate(browser, self, msg) < 0)
1033 goto out;
1034 }
1035 }
1036 err = 0;
1037out_free_stack:
1038 pstack__delete(fstack);
1039out:
1040 hist_browser__delete(browser);
1041 return err;
1042}
1043
1044static struct newtPercentTreeColors {
1045 const char *topColorFg, *topColorBg;
1046 const char *mediumColorFg, *mediumColorBg;
1047 const char *normalColorFg, *normalColorBg;
1048 const char *selColorFg, *selColorBg;
1049 const char *codeColorFg, *codeColorBg;
1050} defaultPercentTreeColors = {
1051 "red", "lightgray",
1052 "green", "lightgray",
1053 "black", "lightgray",
1054 "lightgray", "magenta",
1055 "blue", "lightgray",
1056};
1057
1058void setup_browser(void)
1059{
1060 struct newtPercentTreeColors *c = &defaultPercentTreeColors;
1061 if (!isatty(1))
1062 return;
1063
1064 use_browser = true;
1065 newtInit();
1066 newtCls();
1067 ui_helpline__puts(" ");
1068 sltt_set_color(HE_COLORSET_TOP, NULL, c->topColorFg, c->topColorBg);
1069 sltt_set_color(HE_COLORSET_MEDIUM, NULL, c->mediumColorFg, c->mediumColorBg);
1070 sltt_set_color(HE_COLORSET_NORMAL, NULL, c->normalColorFg, c->normalColorBg);
1071 sltt_set_color(HE_COLORSET_SELECTED, NULL, c->selColorFg, c->selColorBg);
1072 sltt_set_color(HE_COLORSET_CODE, NULL, c->codeColorFg, c->codeColorBg);
1073}
1074
1075void exit_browser(bool wait_for_ok)
1076{
1077 if (use_browser) {
1078 if (wait_for_ok) {
1079 char title[] = "Fatal Error", ok[] = "Ok";
1080 newtWinMessage(title, ok, browser__last_msg);
1081 }
1082 newtFinished();
1083 }
1084}
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 05d0c5c2030c..9bf0f402ca73 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -5,6 +5,7 @@
5#include "parse-events.h" 5#include "parse-events.h"
6#include "exec_cmd.h" 6#include "exec_cmd.h"
7#include "string.h" 7#include "string.h"
8#include "symbol.h"
8#include "cache.h" 9#include "cache.h"
9#include "header.h" 10#include "header.h"
10#include "debugfs.h" 11#include "debugfs.h"
@@ -409,7 +410,6 @@ static enum event_result
409parse_single_tracepoint_event(char *sys_name, 410parse_single_tracepoint_event(char *sys_name,
410 const char *evt_name, 411 const char *evt_name,
411 unsigned int evt_length, 412 unsigned int evt_length,
412 char *flags,
413 struct perf_event_attr *attr, 413 struct perf_event_attr *attr,
414 const char **strp) 414 const char **strp)
415{ 415{
@@ -418,14 +418,6 @@ parse_single_tracepoint_event(char *sys_name,
418 u64 id; 418 u64 id;
419 int fd; 419 int fd;
420 420
421 if (flags) {
422 if (!strncmp(flags, "record", strlen(flags))) {
423 attr->sample_type |= PERF_SAMPLE_RAW;
424 attr->sample_type |= PERF_SAMPLE_TIME;
425 attr->sample_type |= PERF_SAMPLE_CPU;
426 }
427 }
428
429 snprintf(evt_path, MAXPATHLEN, "%s/%s/%s/id", debugfs_path, 421 snprintf(evt_path, MAXPATHLEN, "%s/%s/%s/id", debugfs_path,
430 sys_name, evt_name); 422 sys_name, evt_name);
431 423
@@ -444,6 +436,13 @@ parse_single_tracepoint_event(char *sys_name,
444 attr->type = PERF_TYPE_TRACEPOINT; 436 attr->type = PERF_TYPE_TRACEPOINT;
445 *strp = evt_name + evt_length; 437 *strp = evt_name + evt_length;
446 438
439 attr->sample_type |= PERF_SAMPLE_RAW;
440 attr->sample_type |= PERF_SAMPLE_TIME;
441 attr->sample_type |= PERF_SAMPLE_CPU;
442
443 attr->sample_period = 1;
444
445
447 return EVT_HANDLED; 446 return EVT_HANDLED;
448} 447}
449 448
@@ -532,8 +531,7 @@ static enum event_result parse_tracepoint_event(const char **strp,
532 flags); 531 flags);
533 } else 532 } else
534 return parse_single_tracepoint_event(sys_name, evt_name, 533 return parse_single_tracepoint_event(sys_name, evt_name,
535 evt_length, flags, 534 evt_length, attr, strp);
536 attr, strp);
537} 535}
538 536
539static enum event_result 537static enum event_result
@@ -690,19 +688,29 @@ static enum event_result
690parse_event_modifier(const char **strp, struct perf_event_attr *attr) 688parse_event_modifier(const char **strp, struct perf_event_attr *attr)
691{ 689{
692 const char *str = *strp; 690 const char *str = *strp;
693 int eu = 1, ek = 1, eh = 1; 691 int exclude = 0;
692 int eu = 0, ek = 0, eh = 0, precise = 0;
694 693
695 if (*str++ != ':') 694 if (*str++ != ':')
696 return 0; 695 return 0;
697 while (*str) { 696 while (*str) {
698 if (*str == 'u') 697 if (*str == 'u') {
698 if (!exclude)
699 exclude = eu = ek = eh = 1;
699 eu = 0; 700 eu = 0;
700 else if (*str == 'k') 701 } else if (*str == 'k') {
702 if (!exclude)
703 exclude = eu = ek = eh = 1;
701 ek = 0; 704 ek = 0;
702 else if (*str == 'h') 705 } else if (*str == 'h') {
706 if (!exclude)
707 exclude = eu = ek = eh = 1;
703 eh = 0; 708 eh = 0;
704 else 709 } else if (*str == 'p') {
710 precise++;
711 } else
705 break; 712 break;
713
706 ++str; 714 ++str;
707 } 715 }
708 if (str >= *strp + 2) { 716 if (str >= *strp + 2) {
@@ -710,6 +718,7 @@ parse_event_modifier(const char **strp, struct perf_event_attr *attr)
710 attr->exclude_user = eu; 718 attr->exclude_user = eu;
711 attr->exclude_kernel = ek; 719 attr->exclude_kernel = ek;
712 attr->exclude_hv = eh; 720 attr->exclude_hv = eh;
721 attr->precise_ip = precise;
713 return 1; 722 return 1;
714 } 723 }
715 return 0; 724 return 0;
@@ -934,7 +943,8 @@ void print_events(void)
934 943
935 printf("\n"); 944 printf("\n");
936 printf(" %-42s [%s]\n", 945 printf(" %-42s [%s]\n",
937 "rNNN", event_type_descriptors[PERF_TYPE_RAW]); 946 "rNNN (see 'perf list --help' on how to encode it)",
947 event_type_descriptors[PERF_TYPE_RAW]);
938 printf("\n"); 948 printf("\n");
939 949
940 printf(" %-42s [%s]\n", 950 printf(" %-42s [%s]\n",
diff --git a/tools/perf/util/parse-events.h b/tools/perf/util/parse-events.h
index b8c1f64bc935..fc4ab3fe877a 100644
--- a/tools/perf/util/parse-events.h
+++ b/tools/perf/util/parse-events.h
@@ -13,6 +13,7 @@ struct tracepoint_path {
13}; 13};
14 14
15extern struct tracepoint_path *tracepoint_id_to_path(u64 config); 15extern struct tracepoint_path *tracepoint_id_to_path(u64 config);
16extern bool have_tracepoints(struct perf_event_attr *pattrs, int nb_events);
16 17
17extern int nr_counters; 18extern int nr_counters;
18 19
diff --git a/tools/perf/util/parse-options.c b/tools/perf/util/parse-options.c
index efebd5b476b3..99d02aa57dbf 100644
--- a/tools/perf/util/parse-options.c
+++ b/tools/perf/util/parse-options.c
@@ -49,8 +49,9 @@ static int get_value(struct parse_opt_ctx_t *p,
49 break; 49 break;
50 /* FALLTHROUGH */ 50 /* FALLTHROUGH */
51 case OPTION_BOOLEAN: 51 case OPTION_BOOLEAN:
52 case OPTION_INCR:
52 case OPTION_BIT: 53 case OPTION_BIT:
53 case OPTION_SET_INT: 54 case OPTION_SET_UINT:
54 case OPTION_SET_PTR: 55 case OPTION_SET_PTR:
55 return opterror(opt, "takes no value", flags); 56 return opterror(opt, "takes no value", flags);
56 case OPTION_END: 57 case OPTION_END:
@@ -58,7 +59,9 @@ static int get_value(struct parse_opt_ctx_t *p,
58 case OPTION_GROUP: 59 case OPTION_GROUP:
59 case OPTION_STRING: 60 case OPTION_STRING:
60 case OPTION_INTEGER: 61 case OPTION_INTEGER:
62 case OPTION_UINTEGER:
61 case OPTION_LONG: 63 case OPTION_LONG:
64 case OPTION_U64:
62 default: 65 default:
63 break; 66 break;
64 } 67 }
@@ -73,11 +76,15 @@ static int get_value(struct parse_opt_ctx_t *p,
73 return 0; 76 return 0;
74 77
75 case OPTION_BOOLEAN: 78 case OPTION_BOOLEAN:
79 *(bool *)opt->value = unset ? false : true;
80 return 0;
81
82 case OPTION_INCR:
76 *(int *)opt->value = unset ? 0 : *(int *)opt->value + 1; 83 *(int *)opt->value = unset ? 0 : *(int *)opt->value + 1;
77 return 0; 84 return 0;
78 85
79 case OPTION_SET_INT: 86 case OPTION_SET_UINT:
80 *(int *)opt->value = unset ? 0 : opt->defval; 87 *(unsigned int *)opt->value = unset ? 0 : opt->defval;
81 return 0; 88 return 0;
82 89
83 case OPTION_SET_PTR: 90 case OPTION_SET_PTR:
@@ -120,6 +127,22 @@ static int get_value(struct parse_opt_ctx_t *p,
120 return opterror(opt, "expects a numerical value", flags); 127 return opterror(opt, "expects a numerical value", flags);
121 return 0; 128 return 0;
122 129
130 case OPTION_UINTEGER:
131 if (unset) {
132 *(unsigned int *)opt->value = 0;
133 return 0;
134 }
135 if (opt->flags & PARSE_OPT_OPTARG && !p->opt) {
136 *(unsigned int *)opt->value = opt->defval;
137 return 0;
138 }
139 if (get_arg(p, opt, flags, &arg))
140 return -1;
141 *(unsigned int *)opt->value = strtol(arg, (char **)&s, 10);
142 if (*s)
143 return opterror(opt, "expects a numerical value", flags);
144 return 0;
145
123 case OPTION_LONG: 146 case OPTION_LONG:
124 if (unset) { 147 if (unset) {
125 *(long *)opt->value = 0; 148 *(long *)opt->value = 0;
@@ -136,6 +159,22 @@ static int get_value(struct parse_opt_ctx_t *p,
136 return opterror(opt, "expects a numerical value", flags); 159 return opterror(opt, "expects a numerical value", flags);
137 return 0; 160 return 0;
138 161
162 case OPTION_U64:
163 if (unset) {
164 *(u64 *)opt->value = 0;
165 return 0;
166 }
167 if (opt->flags & PARSE_OPT_OPTARG && !p->opt) {
168 *(u64 *)opt->value = opt->defval;
169 return 0;
170 }
171 if (get_arg(p, opt, flags, &arg))
172 return -1;
173 *(u64 *)opt->value = strtoull(arg, (char **)&s, 10);
174 if (*s)
175 return opterror(opt, "expects a numerical value", flags);
176 return 0;
177
139 case OPTION_END: 178 case OPTION_END:
140 case OPTION_ARGUMENT: 179 case OPTION_ARGUMENT:
141 case OPTION_GROUP: 180 case OPTION_GROUP:
@@ -441,7 +480,10 @@ int usage_with_options_internal(const char * const *usagestr,
441 switch (opts->type) { 480 switch (opts->type) {
442 case OPTION_ARGUMENT: 481 case OPTION_ARGUMENT:
443 break; 482 break;
483 case OPTION_LONG:
484 case OPTION_U64:
444 case OPTION_INTEGER: 485 case OPTION_INTEGER:
486 case OPTION_UINTEGER:
445 if (opts->flags & PARSE_OPT_OPTARG) 487 if (opts->flags & PARSE_OPT_OPTARG)
446 if (opts->long_name) 488 if (opts->long_name)
447 pos += fprintf(stderr, "[=<n>]"); 489 pos += fprintf(stderr, "[=<n>]");
@@ -473,14 +515,14 @@ int usage_with_options_internal(const char * const *usagestr,
473 pos += fprintf(stderr, " ..."); 515 pos += fprintf(stderr, " ...");
474 } 516 }
475 break; 517 break;
476 default: /* OPTION_{BIT,BOOLEAN,SET_INT,SET_PTR} */ 518 default: /* OPTION_{BIT,BOOLEAN,SET_UINT,SET_PTR} */
477 case OPTION_END: 519 case OPTION_END:
478 case OPTION_GROUP: 520 case OPTION_GROUP:
479 case OPTION_BIT: 521 case OPTION_BIT:
480 case OPTION_BOOLEAN: 522 case OPTION_BOOLEAN:
481 case OPTION_SET_INT: 523 case OPTION_INCR:
524 case OPTION_SET_UINT:
482 case OPTION_SET_PTR: 525 case OPTION_SET_PTR:
483 case OPTION_LONG:
484 break; 526 break;
485 } 527 }
486 528
@@ -500,6 +542,7 @@ int usage_with_options_internal(const char * const *usagestr,
500void usage_with_options(const char * const *usagestr, 542void usage_with_options(const char * const *usagestr,
501 const struct option *opts) 543 const struct option *opts)
502{ 544{
545 exit_browser(false);
503 usage_with_options_internal(usagestr, opts, 0); 546 usage_with_options_internal(usagestr, opts, 0);
504 exit(129); 547 exit(129);
505} 548}
diff --git a/tools/perf/util/parse-options.h b/tools/perf/util/parse-options.h
index 948805af43c2..c7d72dce54b2 100644
--- a/tools/perf/util/parse-options.h
+++ b/tools/perf/util/parse-options.h
@@ -1,6 +1,9 @@
1#ifndef __PERF_PARSE_OPTIONS_H 1#ifndef __PERF_PARSE_OPTIONS_H
2#define __PERF_PARSE_OPTIONS_H 2#define __PERF_PARSE_OPTIONS_H
3 3
4#include <linux/kernel.h>
5#include <stdbool.h>
6
4enum parse_opt_type { 7enum parse_opt_type {
5 /* special types */ 8 /* special types */
6 OPTION_END, 9 OPTION_END,
@@ -8,14 +11,17 @@ enum parse_opt_type {
8 OPTION_GROUP, 11 OPTION_GROUP,
9 /* options with no arguments */ 12 /* options with no arguments */
10 OPTION_BIT, 13 OPTION_BIT,
11 OPTION_BOOLEAN, /* _INCR would have been a better name */ 14 OPTION_BOOLEAN,
12 OPTION_SET_INT, 15 OPTION_INCR,
16 OPTION_SET_UINT,
13 OPTION_SET_PTR, 17 OPTION_SET_PTR,
14 /* options with arguments (usually) */ 18 /* options with arguments (usually) */
15 OPTION_STRING, 19 OPTION_STRING,
16 OPTION_INTEGER, 20 OPTION_INTEGER,
17 OPTION_LONG, 21 OPTION_LONG,
18 OPTION_CALLBACK, 22 OPTION_CALLBACK,
23 OPTION_U64,
24 OPTION_UINTEGER,
19}; 25};
20 26
21enum parse_opt_flags { 27enum parse_opt_flags {
@@ -73,7 +79,7 @@ typedef int parse_opt_cb(const struct option *, const char *arg, int unset);
73 * 79 *
74 * `defval`:: 80 * `defval`::
75 * default value to fill (*->value) with for PARSE_OPT_OPTARG. 81 * default value to fill (*->value) with for PARSE_OPT_OPTARG.
76 * OPTION_{BIT,SET_INT,SET_PTR} store the {mask,integer,pointer} to put in 82 * OPTION_{BIT,SET_UINT,SET_PTR} store the {mask,integer,pointer} to put in
77 * the value when met. 83 * the value when met.
78 * CALLBACKS can use it like they want. 84 * CALLBACKS can use it like they want.
79 */ 85 */
@@ -90,16 +96,21 @@ struct option {
90 intptr_t defval; 96 intptr_t defval;
91}; 97};
92 98
99#define check_vtype(v, type) ( BUILD_BUG_ON_ZERO(!__builtin_types_compatible_p(typeof(v), type)) + v )
100
93#define OPT_END() { .type = OPTION_END } 101#define OPT_END() { .type = OPTION_END }
94#define OPT_ARGUMENT(l, h) { .type = OPTION_ARGUMENT, .long_name = (l), .help = (h) } 102#define OPT_ARGUMENT(l, h) { .type = OPTION_ARGUMENT, .long_name = (l), .help = (h) }
95#define OPT_GROUP(h) { .type = OPTION_GROUP, .help = (h) } 103#define OPT_GROUP(h) { .type = OPTION_GROUP, .help = (h) }
96#define OPT_BIT(s, l, v, h, b) { .type = OPTION_BIT, .short_name = (s), .long_name = (l), .value = (v), .help = (h), .defval = (b) } 104#define OPT_BIT(s, l, v, h, b) { .type = OPTION_BIT, .short_name = (s), .long_name = (l), .value = check_vtype(v, int *), .help = (h), .defval = (b) }
97#define OPT_BOOLEAN(s, l, v, h) { .type = OPTION_BOOLEAN, .short_name = (s), .long_name = (l), .value = (v), .help = (h) } 105#define OPT_BOOLEAN(s, l, v, h) { .type = OPTION_BOOLEAN, .short_name = (s), .long_name = (l), .value = check_vtype(v, bool *), .help = (h) }
98#define OPT_SET_INT(s, l, v, h, i) { .type = OPTION_SET_INT, .short_name = (s), .long_name = (l), .value = (v), .help = (h), .defval = (i) } 106#define OPT_INCR(s, l, v, h) { .type = OPTION_INCR, .short_name = (s), .long_name = (l), .value = check_vtype(v, int *), .help = (h) }
107#define OPT_SET_UINT(s, l, v, h, i) { .type = OPTION_SET_UINT, .short_name = (s), .long_name = (l), .value = check_vtype(v, unsigned int *), .help = (h), .defval = (i) }
99#define OPT_SET_PTR(s, l, v, h, p) { .type = OPTION_SET_PTR, .short_name = (s), .long_name = (l), .value = (v), .help = (h), .defval = (p) } 108#define OPT_SET_PTR(s, l, v, h, p) { .type = OPTION_SET_PTR, .short_name = (s), .long_name = (l), .value = (v), .help = (h), .defval = (p) }
100#define OPT_INTEGER(s, l, v, h) { .type = OPTION_INTEGER, .short_name = (s), .long_name = (l), .value = (v), .help = (h) } 109#define OPT_INTEGER(s, l, v, h) { .type = OPTION_INTEGER, .short_name = (s), .long_name = (l), .value = check_vtype(v, int *), .help = (h) }
101#define OPT_LONG(s, l, v, h) { .type = OPTION_LONG, .short_name = (s), .long_name = (l), .value = (v), .help = (h) } 110#define OPT_UINTEGER(s, l, v, h) { .type = OPTION_UINTEGER, .short_name = (s), .long_name = (l), .value = check_vtype(v, unsigned int *), .help = (h) }
102#define OPT_STRING(s, l, v, a, h) { .type = OPTION_STRING, .short_name = (s), .long_name = (l), .value = (v), (a), .help = (h) } 111#define OPT_LONG(s, l, v, h) { .type = OPTION_LONG, .short_name = (s), .long_name = (l), .value = check_vtype(v, long *), .help = (h) }
112#define OPT_U64(s, l, v, h) { .type = OPTION_U64, .short_name = (s), .long_name = (l), .value = check_vtype(v, u64 *), .help = (h) }
113#define OPT_STRING(s, l, v, a, h) { .type = OPTION_STRING, .short_name = (s), .long_name = (l), .value = check_vtype(v, const char **), (a), .help = (h) }
103#define OPT_DATE(s, l, v, h) \ 114#define OPT_DATE(s, l, v, h) \
104 { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = "time", .help = (h), .callback = parse_opt_approxidate_cb } 115 { .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = "time", .help = (h), .callback = parse_opt_approxidate_cb }
105#define OPT_CALLBACK(s, l, v, a, h, f) \ 116#define OPT_CALLBACK(s, l, v, a, h, f) \
diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
index 7c004b6ef24f..914c67095d96 100644
--- a/tools/perf/util/probe-event.c
+++ b/tools/perf/util/probe-event.c
@@ -33,20 +33,27 @@
33#include <limits.h> 33#include <limits.h>
34 34
35#undef _GNU_SOURCE 35#undef _GNU_SOURCE
36#include "util.h"
36#include "event.h" 37#include "event.h"
37#include "string.h" 38#include "string.h"
38#include "strlist.h" 39#include "strlist.h"
39#include "debug.h" 40#include "debug.h"
40#include "cache.h" 41#include "cache.h"
41#include "color.h" 42#include "color.h"
42#include "parse-events.h" /* For debugfs_path */ 43#include "symbol.h"
44#include "thread.h"
45#include "debugfs.h"
46#include "trace-event.h" /* For __unused */
43#include "probe-event.h" 47#include "probe-event.h"
48#include "probe-finder.h"
44 49
45#define MAX_CMDLEN 256 50#define MAX_CMDLEN 256
46#define MAX_PROBE_ARGS 128 51#define MAX_PROBE_ARGS 128
47#define PERFPROBE_GROUP "probe" 52#define PERFPROBE_GROUP "probe"
48 53
49#define semantic_error(msg ...) die("Semantic error :" msg) 54bool probe_event_dry_run; /* Dry run flag */
55
56#define semantic_error(msg ...) pr_err("Semantic error :" msg)
50 57
51/* If there is no space to write, returns -E2BIG. */ 58/* If there is no space to write, returns -E2BIG. */
52static int e_snprintf(char *str, size_t size, const char *format, ...) 59static int e_snprintf(char *str, size_t size, const char *format, ...)
@@ -64,7 +71,275 @@ static int e_snprintf(char *str, size_t size, const char *format, ...)
64 return ret; 71 return ret;
65} 72}
66 73
67void parse_line_range_desc(const char *arg, struct line_range *lr) 74static char *synthesize_perf_probe_point(struct perf_probe_point *pp);
75static struct machine machine;
76
77/* Initialize symbol maps and path of vmlinux */
78static int init_vmlinux(void)
79{
80 struct dso *kernel;
81 int ret;
82
83 symbol_conf.sort_by_name = true;
84 if (symbol_conf.vmlinux_name == NULL)
85 symbol_conf.try_vmlinux_path = true;
86 else
87 pr_debug("Use vmlinux: %s\n", symbol_conf.vmlinux_name);
88 ret = symbol__init();
89 if (ret < 0) {
90 pr_debug("Failed to init symbol map.\n");
91 goto out;
92 }
93
94 ret = machine__init(&machine, "/", 0);
95 if (ret < 0)
96 goto out;
97
98 kernel = dso__new_kernel(symbol_conf.vmlinux_name);
99 if (kernel == NULL)
100 die("Failed to create kernel dso.");
101
102 ret = __machine__create_kernel_maps(&machine, kernel);
103 if (ret < 0)
104 pr_debug("Failed to create kernel maps.\n");
105
106out:
107 if (ret < 0)
108 pr_warning("Failed to init vmlinux path.\n");
109 return ret;
110}
111
112#ifdef DWARF_SUPPORT
113static int open_vmlinux(void)
114{
115 if (map__load(machine.vmlinux_maps[MAP__FUNCTION], NULL) < 0) {
116 pr_debug("Failed to load kernel map.\n");
117 return -EINVAL;
118 }
119 pr_debug("Try to open %s\n", machine.vmlinux_maps[MAP__FUNCTION]->dso->long_name);
120 return open(machine.vmlinux_maps[MAP__FUNCTION]->dso->long_name, O_RDONLY);
121}
122
123/* Convert trace point to probe point with debuginfo */
124static int convert_to_perf_probe_point(struct kprobe_trace_point *tp,
125 struct perf_probe_point *pp)
126{
127 struct symbol *sym;
128 int fd, ret = -ENOENT;
129
130 sym = map__find_symbol_by_name(machine.vmlinux_maps[MAP__FUNCTION],
131 tp->symbol, NULL);
132 if (sym) {
133 fd = open_vmlinux();
134 if (fd >= 0) {
135 ret = find_perf_probe_point(fd,
136 sym->start + tp->offset, pp);
137 close(fd);
138 }
139 }
140 if (ret <= 0) {
141 pr_debug("Failed to find corresponding probes from "
142 "debuginfo. Use kprobe event information.\n");
143 pp->function = strdup(tp->symbol);
144 if (pp->function == NULL)
145 return -ENOMEM;
146 pp->offset = tp->offset;
147 }
148 pp->retprobe = tp->retprobe;
149
150 return 0;
151}
152
153/* Try to find perf_probe_event with debuginfo */
154static int try_to_find_kprobe_trace_events(struct perf_probe_event *pev,
155 struct kprobe_trace_event **tevs,
156 int max_tevs)
157{
158 bool need_dwarf = perf_probe_event_need_dwarf(pev);
159 int fd, ntevs;
160
161 fd = open_vmlinux();
162 if (fd < 0) {
163 if (need_dwarf) {
164 pr_warning("Failed to open debuginfo file.\n");
165 return fd;
166 }
167 pr_debug("Could not open vmlinux. Try to use symbols.\n");
168 return 0;
169 }
170
171 /* Searching trace events corresponding to probe event */
172 ntevs = find_kprobe_trace_events(fd, pev, tevs, max_tevs);
173 close(fd);
174
175 if (ntevs > 0) { /* Succeeded to find trace events */
176 pr_debug("find %d kprobe_trace_events.\n", ntevs);
177 return ntevs;
178 }
179
180 if (ntevs == 0) { /* No error but failed to find probe point. */
181 pr_warning("Probe point '%s' not found.\n",
182 synthesize_perf_probe_point(&pev->point));
183 return -ENOENT;
184 }
185 /* Error path : ntevs < 0 */
186 pr_debug("An error occurred in debuginfo analysis (%d).\n", ntevs);
187 if (ntevs == -EBADF) {
188 pr_warning("Warning: No dwarf info found in the vmlinux - "
189 "please rebuild kernel with CONFIG_DEBUG_INFO=y.\n");
190 if (!need_dwarf) {
191 pr_debug("Trying to use symbols.\nn");
192 return 0;
193 }
194 }
195 return ntevs;
196}
197
198#define LINEBUF_SIZE 256
199#define NR_ADDITIONAL_LINES 2
200
201static int show_one_line(FILE *fp, int l, bool skip, bool show_num)
202{
203 char buf[LINEBUF_SIZE];
204 const char *color = PERF_COLOR_BLUE;
205
206 if (fgets(buf, LINEBUF_SIZE, fp) == NULL)
207 goto error;
208 if (!skip) {
209 if (show_num)
210 fprintf(stdout, "%7d %s", l, buf);
211 else
212 color_fprintf(stdout, color, " %s", buf);
213 }
214
215 while (strlen(buf) == LINEBUF_SIZE - 1 &&
216 buf[LINEBUF_SIZE - 2] != '\n') {
217 if (fgets(buf, LINEBUF_SIZE, fp) == NULL)
218 goto error;
219 if (!skip) {
220 if (show_num)
221 fprintf(stdout, "%s", buf);
222 else
223 color_fprintf(stdout, color, "%s", buf);
224 }
225 }
226
227 return 0;
228error:
229 if (feof(fp))
230 pr_warning("Source file is shorter than expected.\n");
231 else
232 pr_warning("File read error: %s\n", strerror(errno));
233
234 return -1;
235}
236
237/*
238 * Show line-range always requires debuginfo to find source file and
239 * line number.
240 */
241int show_line_range(struct line_range *lr)
242{
243 int l = 1;
244 struct line_node *ln;
245 FILE *fp;
246 int fd, ret;
247
248 /* Search a line range */
249 ret = init_vmlinux();
250 if (ret < 0)
251 return ret;
252
253 fd = open_vmlinux();
254 if (fd < 0) {
255 pr_warning("Failed to open debuginfo file.\n");
256 return fd;
257 }
258
259 ret = find_line_range(fd, lr);
260 close(fd);
261 if (ret == 0) {
262 pr_warning("Specified source line is not found.\n");
263 return -ENOENT;
264 } else if (ret < 0) {
265 pr_warning("Debuginfo analysis failed. (%d)\n", ret);
266 return ret;
267 }
268
269 setup_pager();
270
271 if (lr->function)
272 fprintf(stdout, "<%s:%d>\n", lr->function,
273 lr->start - lr->offset);
274 else
275 fprintf(stdout, "<%s:%d>\n", lr->file, lr->start);
276
277 fp = fopen(lr->path, "r");
278 if (fp == NULL) {
279 pr_warning("Failed to open %s: %s\n", lr->path,
280 strerror(errno));
281 return -errno;
282 }
283 /* Skip to starting line number */
284 while (l < lr->start && ret >= 0)
285 ret = show_one_line(fp, l++, true, false);
286 if (ret < 0)
287 goto end;
288
289 list_for_each_entry(ln, &lr->line_list, list) {
290 while (ln->line > l && ret >= 0)
291 ret = show_one_line(fp, (l++) - lr->offset,
292 false, false);
293 if (ret >= 0)
294 ret = show_one_line(fp, (l++) - lr->offset,
295 false, true);
296 if (ret < 0)
297 goto end;
298 }
299
300 if (lr->end == INT_MAX)
301 lr->end = l + NR_ADDITIONAL_LINES;
302 while (l <= lr->end && !feof(fp) && ret >= 0)
303 ret = show_one_line(fp, (l++) - lr->offset, false, false);
304end:
305 fclose(fp);
306 return ret;
307}
308
309#else /* !DWARF_SUPPORT */
310
311static int convert_to_perf_probe_point(struct kprobe_trace_point *tp,
312 struct perf_probe_point *pp)
313{
314 pp->function = strdup(tp->symbol);
315 if (pp->function == NULL)
316 return -ENOMEM;
317 pp->offset = tp->offset;
318 pp->retprobe = tp->retprobe;
319
320 return 0;
321}
322
323static int try_to_find_kprobe_trace_events(struct perf_probe_event *pev,
324 struct kprobe_trace_event **tevs __unused,
325 int max_tevs __unused)
326{
327 if (perf_probe_event_need_dwarf(pev)) {
328 pr_warning("Debuginfo-analysis is not supported.\n");
329 return -ENOSYS;
330 }
331 return 0;
332}
333
334int show_line_range(struct line_range *lr __unused)
335{
336 pr_warning("Debuginfo-analysis is not supported.\n");
337 return -ENOSYS;
338}
339
340#endif
341
342int parse_line_range_desc(const char *arg, struct line_range *lr)
68{ 343{
69 const char *ptr; 344 const char *ptr;
70 char *tmp; 345 char *tmp;
@@ -75,29 +350,45 @@ void parse_line_range_desc(const char *arg, struct line_range *lr)
75 */ 350 */
76 ptr = strchr(arg, ':'); 351 ptr = strchr(arg, ':');
77 if (ptr) { 352 if (ptr) {
78 lr->start = (unsigned int)strtoul(ptr + 1, &tmp, 0); 353 lr->start = (int)strtoul(ptr + 1, &tmp, 0);
79 if (*tmp == '+') 354 if (*tmp == '+') {
80 lr->end = lr->start + (unsigned int)strtoul(tmp + 1, 355 lr->end = lr->start + (int)strtoul(tmp + 1, &tmp, 0);
81 &tmp, 0); 356 lr->end--; /*
82 else if (*tmp == '-') 357 * Adjust the number of lines here.
83 lr->end = (unsigned int)strtoul(tmp + 1, &tmp, 0); 358 * If the number of lines == 1, the
359 * the end of line should be equal to
360 * the start of line.
361 */
362 } else if (*tmp == '-')
363 lr->end = (int)strtoul(tmp + 1, &tmp, 0);
84 else 364 else
85 lr->end = 0; 365 lr->end = INT_MAX;
86 pr_debug("Line range is %u to %u\n", lr->start, lr->end); 366 pr_debug("Line range is %d to %d\n", lr->start, lr->end);
87 if (lr->end && lr->start > lr->end) 367 if (lr->start > lr->end) {
88 semantic_error("Start line must be smaller" 368 semantic_error("Start line must be smaller"
89 " than end line."); 369 " than end line.\n");
90 if (*tmp != '\0') 370 return -EINVAL;
91 semantic_error("Tailing with invalid character '%d'.", 371 }
372 if (*tmp != '\0') {
373 semantic_error("Tailing with invalid character '%d'.\n",
92 *tmp); 374 *tmp);
375 return -EINVAL;
376 }
93 tmp = strndup(arg, (ptr - arg)); 377 tmp = strndup(arg, (ptr - arg));
94 } else 378 } else {
95 tmp = strdup(arg); 379 tmp = strdup(arg);
380 lr->end = INT_MAX;
381 }
382
383 if (tmp == NULL)
384 return -ENOMEM;
96 385
97 if (strchr(tmp, '.')) 386 if (strchr(tmp, '.'))
98 lr->file = tmp; 387 lr->file = tmp;
99 else 388 else
100 lr->function = tmp; 389 lr->function = tmp;
390
391 return 0;
101} 392}
102 393
103/* Check the name is good for event/group */ 394/* Check the name is good for event/group */
@@ -113,8 +404,9 @@ static bool check_event_name(const char *name)
113} 404}
114 405
115/* Parse probepoint definition. */ 406/* Parse probepoint definition. */
116static void parse_perf_probe_probepoint(char *arg, struct probe_point *pp) 407static int parse_perf_probe_point(char *arg, struct perf_probe_event *pev)
117{ 408{
409 struct perf_probe_point *pp = &pev->point;
118 char *ptr, *tmp; 410 char *ptr, *tmp;
119 char c, nc = 0; 411 char c, nc = 0;
120 /* 412 /*
@@ -129,13 +421,19 @@ static void parse_perf_probe_probepoint(char *arg, struct probe_point *pp)
129 if (ptr && *ptr == '=') { /* Event name */ 421 if (ptr && *ptr == '=') { /* Event name */
130 *ptr = '\0'; 422 *ptr = '\0';
131 tmp = ptr + 1; 423 tmp = ptr + 1;
132 ptr = strchr(arg, ':'); 424 if (strchr(arg, ':')) {
133 if (ptr) /* Group name is not supported yet. */ 425 semantic_error("Group name is not supported yet.\n");
134 semantic_error("Group name is not supported yet."); 426 return -ENOTSUP;
135 if (!check_event_name(arg)) 427 }
428 if (!check_event_name(arg)) {
136 semantic_error("%s is bad for event name -it must " 429 semantic_error("%s is bad for event name -it must "
137 "follow C symbol-naming rule.", arg); 430 "follow C symbol-naming rule.\n", arg);
138 pp->event = strdup(arg); 431 return -EINVAL;
432 }
433 pev->event = strdup(arg);
434 if (pev->event == NULL)
435 return -ENOMEM;
436 pev->group = NULL;
139 arg = tmp; 437 arg = tmp;
140 } 438 }
141 439
@@ -145,12 +443,15 @@ static void parse_perf_probe_probepoint(char *arg, struct probe_point *pp)
145 *ptr++ = '\0'; 443 *ptr++ = '\0';
146 } 444 }
147 445
446 tmp = strdup(arg);
447 if (tmp == NULL)
448 return -ENOMEM;
449
148 /* Check arg is function or file and copy it */ 450 /* Check arg is function or file and copy it */
149 if (strchr(arg, '.')) /* File */ 451 if (strchr(tmp, '.')) /* File */
150 pp->file = strdup(arg); 452 pp->file = tmp;
151 else /* Function */ 453 else /* Function */
152 pp->function = strdup(arg); 454 pp->function = tmp;
153 DIE_IF(pp->file == NULL && pp->function == NULL);
154 455
155 /* Parse other options */ 456 /* Parse other options */
156 while (ptr) { 457 while (ptr) {
@@ -158,6 +459,8 @@ static void parse_perf_probe_probepoint(char *arg, struct probe_point *pp)
158 c = nc; 459 c = nc;
159 if (c == ';') { /* Lazy pattern must be the last part */ 460 if (c == ';') { /* Lazy pattern must be the last part */
160 pp->lazy_line = strdup(arg); 461 pp->lazy_line = strdup(arg);
462 if (pp->lazy_line == NULL)
463 return -ENOMEM;
161 break; 464 break;
162 } 465 }
163 ptr = strpbrk(arg, ";:+@%"); 466 ptr = strpbrk(arg, ";:+@%");
@@ -168,266 +471,658 @@ static void parse_perf_probe_probepoint(char *arg, struct probe_point *pp)
168 switch (c) { 471 switch (c) {
169 case ':': /* Line number */ 472 case ':': /* Line number */
170 pp->line = strtoul(arg, &tmp, 0); 473 pp->line = strtoul(arg, &tmp, 0);
171 if (*tmp != '\0') 474 if (*tmp != '\0') {
172 semantic_error("There is non-digit char" 475 semantic_error("There is non-digit char"
173 " in line number."); 476 " in line number.\n");
477 return -EINVAL;
478 }
174 break; 479 break;
175 case '+': /* Byte offset from a symbol */ 480 case '+': /* Byte offset from a symbol */
176 pp->offset = strtoul(arg, &tmp, 0); 481 pp->offset = strtoul(arg, &tmp, 0);
177 if (*tmp != '\0') 482 if (*tmp != '\0') {
178 semantic_error("There is non-digit character" 483 semantic_error("There is non-digit character"
179 " in offset."); 484 " in offset.\n");
485 return -EINVAL;
486 }
180 break; 487 break;
181 case '@': /* File name */ 488 case '@': /* File name */
182 if (pp->file) 489 if (pp->file) {
183 semantic_error("SRC@SRC is not allowed."); 490 semantic_error("SRC@SRC is not allowed.\n");
491 return -EINVAL;
492 }
184 pp->file = strdup(arg); 493 pp->file = strdup(arg);
185 DIE_IF(pp->file == NULL); 494 if (pp->file == NULL)
495 return -ENOMEM;
186 break; 496 break;
187 case '%': /* Probe places */ 497 case '%': /* Probe places */
188 if (strcmp(arg, "return") == 0) { 498 if (strcmp(arg, "return") == 0) {
189 pp->retprobe = 1; 499 pp->retprobe = 1;
190 } else /* Others not supported yet */ 500 } else { /* Others not supported yet */
191 semantic_error("%%%s is not supported.", arg); 501 semantic_error("%%%s is not supported.\n", arg);
502 return -ENOTSUP;
503 }
192 break; 504 break;
193 default: 505 default: /* Buggy case */
194 DIE_IF("Program has a bug."); 506 pr_err("This program has a bug at %s:%d.\n",
507 __FILE__, __LINE__);
508 return -ENOTSUP;
195 break; 509 break;
196 } 510 }
197 } 511 }
198 512
199 /* Exclusion check */ 513 /* Exclusion check */
200 if (pp->lazy_line && pp->line) 514 if (pp->lazy_line && pp->line) {
201 semantic_error("Lazy pattern can't be used with line number."); 515 semantic_error("Lazy pattern can't be used with line number.");
516 return -EINVAL;
517 }
202 518
203 if (pp->lazy_line && pp->offset) 519 if (pp->lazy_line && pp->offset) {
204 semantic_error("Lazy pattern can't be used with offset."); 520 semantic_error("Lazy pattern can't be used with offset.");
521 return -EINVAL;
522 }
205 523
206 if (pp->line && pp->offset) 524 if (pp->line && pp->offset) {
207 semantic_error("Offset can't be used with line number."); 525 semantic_error("Offset can't be used with line number.");
526 return -EINVAL;
527 }
208 528
209 if (!pp->line && !pp->lazy_line && pp->file && !pp->function) 529 if (!pp->line && !pp->lazy_line && pp->file && !pp->function) {
210 semantic_error("File always requires line number or " 530 semantic_error("File always requires line number or "
211 "lazy pattern."); 531 "lazy pattern.");
532 return -EINVAL;
533 }
212 534
213 if (pp->offset && !pp->function) 535 if (pp->offset && !pp->function) {
214 semantic_error("Offset requires an entry function."); 536 semantic_error("Offset requires an entry function.");
537 return -EINVAL;
538 }
215 539
216 if (pp->retprobe && !pp->function) 540 if (pp->retprobe && !pp->function) {
217 semantic_error("Return probe requires an entry function."); 541 semantic_error("Return probe requires an entry function.");
542 return -EINVAL;
543 }
218 544
219 if ((pp->offset || pp->line || pp->lazy_line) && pp->retprobe) 545 if ((pp->offset || pp->line || pp->lazy_line) && pp->retprobe) {
220 semantic_error("Offset/Line/Lazy pattern can't be used with " 546 semantic_error("Offset/Line/Lazy pattern can't be used with "
221 "return probe."); 547 "return probe.");
548 return -EINVAL;
549 }
222 550
223 pr_debug("symbol:%s file:%s line:%d offset:%d return:%d lazy:%s\n", 551 pr_debug("symbol:%s file:%s line:%d offset:%lu return:%d lazy:%s\n",
224 pp->function, pp->file, pp->line, pp->offset, pp->retprobe, 552 pp->function, pp->file, pp->line, pp->offset, pp->retprobe,
225 pp->lazy_line); 553 pp->lazy_line);
554 return 0;
226} 555}
227 556
228/* Parse perf-probe event definition */ 557/* Parse perf-probe event argument */
229void parse_perf_probe_event(const char *str, struct probe_point *pp, 558static int parse_perf_probe_arg(char *str, struct perf_probe_arg *arg)
230 bool *need_dwarf)
231{ 559{
232 char **argv; 560 char *tmp;
233 int argc, i; 561 struct perf_probe_arg_field **fieldp;
562
563 pr_debug("parsing arg: %s into ", str);
234 564
235 *need_dwarf = false; 565 tmp = strchr(str, '=');
566 if (tmp) {
567 arg->name = strndup(str, tmp - str);
568 if (arg->name == NULL)
569 return -ENOMEM;
570 pr_debug("name:%s ", arg->name);
571 str = tmp + 1;
572 }
236 573
237 argv = argv_split(str, &argc); 574 tmp = strchr(str, ':');
238 if (!argv) 575 if (tmp) { /* Type setting */
239 die("argv_split failed."); 576 *tmp = '\0';
240 if (argc > MAX_PROBE_ARGS + 1) 577 arg->type = strdup(tmp + 1);
241 semantic_error("Too many arguments"); 578 if (arg->type == NULL)
579 return -ENOMEM;
580 pr_debug("type:%s ", arg->type);
581 }
242 582
583 tmp = strpbrk(str, "-.");
584 if (!is_c_varname(str) || !tmp) {
585 /* A variable, register, symbol or special value */
586 arg->var = strdup(str);
587 if (arg->var == NULL)
588 return -ENOMEM;
589 pr_debug("%s\n", arg->var);
590 return 0;
591 }
592
593 /* Structure fields */
594 arg->var = strndup(str, tmp - str);
595 if (arg->var == NULL)
596 return -ENOMEM;
597 pr_debug("%s, ", arg->var);
598 fieldp = &arg->field;
599
600 do {
601 *fieldp = zalloc(sizeof(struct perf_probe_arg_field));
602 if (*fieldp == NULL)
603 return -ENOMEM;
604 if (*tmp == '.') {
605 str = tmp + 1;
606 (*fieldp)->ref = false;
607 } else if (tmp[1] == '>') {
608 str = tmp + 2;
609 (*fieldp)->ref = true;
610 } else {
611 semantic_error("Argument parse error: %s\n", str);
612 return -EINVAL;
613 }
614
615 tmp = strpbrk(str, "-.");
616 if (tmp) {
617 (*fieldp)->name = strndup(str, tmp - str);
618 if ((*fieldp)->name == NULL)
619 return -ENOMEM;
620 pr_debug("%s(%d), ", (*fieldp)->name, (*fieldp)->ref);
621 fieldp = &(*fieldp)->next;
622 }
623 } while (tmp);
624 (*fieldp)->name = strdup(str);
625 if ((*fieldp)->name == NULL)
626 return -ENOMEM;
627 pr_debug("%s(%d)\n", (*fieldp)->name, (*fieldp)->ref);
628
629 /* If no name is specified, set the last field name */
630 if (!arg->name) {
631 arg->name = strdup((*fieldp)->name);
632 if (arg->name == NULL)
633 return -ENOMEM;
634 }
635 return 0;
636}
637
638/* Parse perf-probe event command */
639int parse_perf_probe_command(const char *cmd, struct perf_probe_event *pev)
640{
641 char **argv;
642 int argc, i, ret = 0;
643
644 argv = argv_split(cmd, &argc);
645 if (!argv) {
646 pr_debug("Failed to split arguments.\n");
647 return -ENOMEM;
648 }
649 if (argc - 1 > MAX_PROBE_ARGS) {
650 semantic_error("Too many probe arguments (%d).\n", argc - 1);
651 ret = -ERANGE;
652 goto out;
653 }
243 /* Parse probe point */ 654 /* Parse probe point */
244 parse_perf_probe_probepoint(argv[0], pp); 655 ret = parse_perf_probe_point(argv[0], pev);
245 if (pp->file || pp->line || pp->lazy_line) 656 if (ret < 0)
246 *need_dwarf = true; 657 goto out;
247 658
248 /* Copy arguments and ensure return probe has no C argument */ 659 /* Copy arguments and ensure return probe has no C argument */
249 pp->nr_args = argc - 1; 660 pev->nargs = argc - 1;
250 pp->args = zalloc(sizeof(char *) * pp->nr_args); 661 pev->args = zalloc(sizeof(struct perf_probe_arg) * pev->nargs);
251 for (i = 0; i < pp->nr_args; i++) { 662 if (pev->args == NULL) {
252 pp->args[i] = strdup(argv[i + 1]); 663 ret = -ENOMEM;
253 if (!pp->args[i]) 664 goto out;
254 die("Failed to copy argument."); 665 }
255 if (is_c_varname(pp->args[i])) { 666 for (i = 0; i < pev->nargs && ret >= 0; i++) {
256 if (pp->retprobe) 667 ret = parse_perf_probe_arg(argv[i + 1], &pev->args[i]);
257 semantic_error("You can't specify local" 668 if (ret >= 0 &&
258 " variable for kretprobe"); 669 is_c_varname(pev->args[i].var) && pev->point.retprobe) {
259 *need_dwarf = true; 670 semantic_error("You can't specify local variable for"
671 " kretprobe.\n");
672 ret = -EINVAL;
260 } 673 }
261 } 674 }
262 675out:
263 argv_free(argv); 676 argv_free(argv);
677
678 return ret;
679}
680
681/* Return true if this perf_probe_event requires debuginfo */
682bool perf_probe_event_need_dwarf(struct perf_probe_event *pev)
683{
684 int i;
685
686 if (pev->point.file || pev->point.line || pev->point.lazy_line)
687 return true;
688
689 for (i = 0; i < pev->nargs; i++)
690 if (is_c_varname(pev->args[i].var))
691 return true;
692
693 return false;
264} 694}
265 695
266/* Parse kprobe_events event into struct probe_point */ 696/* Parse kprobe_events event into struct probe_point */
267void parse_trace_kprobe_event(const char *str, struct probe_point *pp) 697int parse_kprobe_trace_command(const char *cmd, struct kprobe_trace_event *tev)
268{ 698{
699 struct kprobe_trace_point *tp = &tev->point;
269 char pr; 700 char pr;
270 char *p; 701 char *p;
271 int ret, i, argc; 702 int ret, i, argc;
272 char **argv; 703 char **argv;
273 704
274 pr_debug("Parsing kprobe_events: %s\n", str); 705 pr_debug("Parsing kprobe_events: %s\n", cmd);
275 argv = argv_split(str, &argc); 706 argv = argv_split(cmd, &argc);
276 if (!argv) 707 if (!argv) {
277 die("argv_split failed."); 708 pr_debug("Failed to split arguments.\n");
278 if (argc < 2) 709 return -ENOMEM;
279 semantic_error("Too less arguments."); 710 }
711 if (argc < 2) {
712 semantic_error("Too few probe arguments.\n");
713 ret = -ERANGE;
714 goto out;
715 }
280 716
281 /* Scan event and group name. */ 717 /* Scan event and group name. */
282 ret = sscanf(argv[0], "%c:%a[^/ \t]/%a[^ \t]", 718 ret = sscanf(argv[0], "%c:%a[^/ \t]/%a[^ \t]",
283 &pr, (float *)(void *)&pp->group, 719 &pr, (float *)(void *)&tev->group,
284 (float *)(void *)&pp->event); 720 (float *)(void *)&tev->event);
285 if (ret != 3) 721 if (ret != 3) {
286 semantic_error("Failed to parse event name: %s", argv[0]); 722 semantic_error("Failed to parse event name: %s\n", argv[0]);
287 pr_debug("Group:%s Event:%s probe:%c\n", pp->group, pp->event, pr); 723 ret = -EINVAL;
724 goto out;
725 }
726 pr_debug("Group:%s Event:%s probe:%c\n", tev->group, tev->event, pr);
288 727
289 pp->retprobe = (pr == 'r'); 728 tp->retprobe = (pr == 'r');
290 729
291 /* Scan function name and offset */ 730 /* Scan function name and offset */
292 ret = sscanf(argv[1], "%a[^+]+%d", (float *)(void *)&pp->function, 731 ret = sscanf(argv[1], "%a[^+]+%lu", (float *)(void *)&tp->symbol,
293 &pp->offset); 732 &tp->offset);
294 if (ret == 1) 733 if (ret == 1)
295 pp->offset = 0; 734 tp->offset = 0;
296
297 /* kprobe_events doesn't have this information */
298 pp->line = 0;
299 pp->file = NULL;
300 735
301 pp->nr_args = argc - 2; 736 tev->nargs = argc - 2;
302 pp->args = zalloc(sizeof(char *) * pp->nr_args); 737 tev->args = zalloc(sizeof(struct kprobe_trace_arg) * tev->nargs);
303 for (i = 0; i < pp->nr_args; i++) { 738 if (tev->args == NULL) {
739 ret = -ENOMEM;
740 goto out;
741 }
742 for (i = 0; i < tev->nargs; i++) {
304 p = strchr(argv[i + 2], '='); 743 p = strchr(argv[i + 2], '=');
305 if (p) /* We don't need which register is assigned. */ 744 if (p) /* We don't need which register is assigned. */
306 *p = '\0'; 745 *p++ = '\0';
307 pp->args[i] = strdup(argv[i + 2]); 746 else
308 if (!pp->args[i]) 747 p = argv[i + 2];
309 die("Failed to copy argument."); 748 tev->args[i].name = strdup(argv[i + 2]);
749 /* TODO: parse regs and offset */
750 tev->args[i].value = strdup(p);
751 if (tev->args[i].name == NULL || tev->args[i].value == NULL) {
752 ret = -ENOMEM;
753 goto out;
754 }
310 } 755 }
311 756 ret = 0;
757out:
312 argv_free(argv); 758 argv_free(argv);
759 return ret;
313} 760}
314 761
315/* Synthesize only probe point (not argument) */ 762/* Compose only probe arg */
316int synthesize_perf_probe_point(struct probe_point *pp) 763int synthesize_perf_probe_arg(struct perf_probe_arg *pa, char *buf, size_t len)
317{ 764{
318 char *buf; 765 struct perf_probe_arg_field *field = pa->field;
319 char offs[64] = "", line[64] = "";
320 int ret; 766 int ret;
767 char *tmp = buf;
321 768
322 pp->probes[0] = buf = zalloc(MAX_CMDLEN); 769 if (pa->name && pa->var)
323 pp->found = 1; 770 ret = e_snprintf(tmp, len, "%s=%s", pa->name, pa->var);
324 if (!buf) 771 else
325 die("Failed to allocate memory by zalloc."); 772 ret = e_snprintf(tmp, len, "%s", pa->name ? pa->name : pa->var);
773 if (ret <= 0)
774 goto error;
775 tmp += ret;
776 len -= ret;
777
778 while (field) {
779 ret = e_snprintf(tmp, len, "%s%s", field->ref ? "->" : ".",
780 field->name);
781 if (ret <= 0)
782 goto error;
783 tmp += ret;
784 len -= ret;
785 field = field->next;
786 }
787
788 if (pa->type) {
789 ret = e_snprintf(tmp, len, ":%s", pa->type);
790 if (ret <= 0)
791 goto error;
792 tmp += ret;
793 len -= ret;
794 }
795
796 return tmp - buf;
797error:
798 pr_debug("Failed to synthesize perf probe argument: %s",
799 strerror(-ret));
800 return ret;
801}
802
803/* Compose only probe point (not argument) */
804static char *synthesize_perf_probe_point(struct perf_probe_point *pp)
805{
806 char *buf, *tmp;
807 char offs[32] = "", line[32] = "", file[32] = "";
808 int ret, len;
809
810 buf = zalloc(MAX_CMDLEN);
811 if (buf == NULL) {
812 ret = -ENOMEM;
813 goto error;
814 }
326 if (pp->offset) { 815 if (pp->offset) {
327 ret = e_snprintf(offs, 64, "+%d", pp->offset); 816 ret = e_snprintf(offs, 32, "+%lu", pp->offset);
328 if (ret <= 0) 817 if (ret <= 0)
329 goto error; 818 goto error;
330 } 819 }
331 if (pp->line) { 820 if (pp->line) {
332 ret = e_snprintf(line, 64, ":%d", pp->line); 821 ret = e_snprintf(line, 32, ":%d", pp->line);
822 if (ret <= 0)
823 goto error;
824 }
825 if (pp->file) {
826 len = strlen(pp->file) - 31;
827 if (len < 0)
828 len = 0;
829 tmp = strchr(pp->file + len, '/');
830 if (!tmp)
831 tmp = pp->file + len;
832 ret = e_snprintf(file, 32, "@%s", tmp + 1);
333 if (ret <= 0) 833 if (ret <= 0)
334 goto error; 834 goto error;
335 } 835 }
336 836
337 if (pp->function) 837 if (pp->function)
338 ret = e_snprintf(buf, MAX_CMDLEN, "%s%s%s%s", pp->function, 838 ret = e_snprintf(buf, MAX_CMDLEN, "%s%s%s%s%s", pp->function,
339 offs, pp->retprobe ? "%return" : "", line); 839 offs, pp->retprobe ? "%return" : "", line,
840 file);
340 else 841 else
341 ret = e_snprintf(buf, MAX_CMDLEN, "%s%s", pp->file, line); 842 ret = e_snprintf(buf, MAX_CMDLEN, "%s%s", file, line);
342 if (ret <= 0) { 843 if (ret <= 0)
844 goto error;
845
846 return buf;
343error: 847error:
344 free(pp->probes[0]); 848 pr_debug("Failed to synthesize perf probe point: %s",
345 pp->probes[0] = NULL; 849 strerror(-ret));
346 pp->found = 0; 850 if (buf)
347 } 851 free(buf);
348 return ret; 852 return NULL;
349} 853}
350 854
351int synthesize_perf_probe_event(struct probe_point *pp) 855#if 0
856char *synthesize_perf_probe_command(struct perf_probe_event *pev)
352{ 857{
353 char *buf; 858 char *buf;
354 int i, len, ret; 859 int i, len, ret;
355 860
356 len = synthesize_perf_probe_point(pp); 861 buf = synthesize_perf_probe_point(&pev->point);
357 if (len < 0) 862 if (!buf)
358 return 0; 863 return NULL;
359 864
360 buf = pp->probes[0]; 865 len = strlen(buf);
361 for (i = 0; i < pp->nr_args; i++) { 866 for (i = 0; i < pev->nargs; i++) {
362 ret = e_snprintf(&buf[len], MAX_CMDLEN - len, " %s", 867 ret = e_snprintf(&buf[len], MAX_CMDLEN - len, " %s",
363 pp->args[i]); 868 pev->args[i].name);
364 if (ret <= 0) 869 if (ret <= 0) {
365 goto error; 870 free(buf);
871 return NULL;
872 }
366 len += ret; 873 len += ret;
367 } 874 }
368 pp->found = 1;
369 875
370 return pp->found; 876 return buf;
371error: 877}
372 free(pp->probes[0]); 878#endif
373 pp->probes[0] = NULL; 879
880static int __synthesize_kprobe_trace_arg_ref(struct kprobe_trace_arg_ref *ref,
881 char **buf, size_t *buflen,
882 int depth)
883{
884 int ret;
885 if (ref->next) {
886 depth = __synthesize_kprobe_trace_arg_ref(ref->next, buf,
887 buflen, depth + 1);
888 if (depth < 0)
889 goto out;
890 }
891
892 ret = e_snprintf(*buf, *buflen, "%+ld(", ref->offset);
893 if (ret < 0)
894 depth = ret;
895 else {
896 *buf += ret;
897 *buflen -= ret;
898 }
899out:
900 return depth;
374 901
375 return ret;
376} 902}
377 903
378int synthesize_trace_kprobe_event(struct probe_point *pp) 904static int synthesize_kprobe_trace_arg(struct kprobe_trace_arg *arg,
905 char *buf, size_t buflen)
379{ 906{
907 int ret, depth = 0;
908 char *tmp = buf;
909
910 /* Argument name or separator */
911 if (arg->name)
912 ret = e_snprintf(buf, buflen, " %s=", arg->name);
913 else
914 ret = e_snprintf(buf, buflen, " ");
915 if (ret < 0)
916 return ret;
917 buf += ret;
918 buflen -= ret;
919
920 /* Dereferencing arguments */
921 if (arg->ref) {
922 depth = __synthesize_kprobe_trace_arg_ref(arg->ref, &buf,
923 &buflen, 1);
924 if (depth < 0)
925 return depth;
926 }
927
928 /* Print argument value */
929 ret = e_snprintf(buf, buflen, "%s", arg->value);
930 if (ret < 0)
931 return ret;
932 buf += ret;
933 buflen -= ret;
934
935 /* Closing */
936 while (depth--) {
937 ret = e_snprintf(buf, buflen, ")");
938 if (ret < 0)
939 return ret;
940 buf += ret;
941 buflen -= ret;
942 }
943 /* Print argument type */
944 if (arg->type) {
945 ret = e_snprintf(buf, buflen, ":%s", arg->type);
946 if (ret <= 0)
947 return ret;
948 buf += ret;
949 }
950
951 return buf - tmp;
952}
953
954char *synthesize_kprobe_trace_command(struct kprobe_trace_event *tev)
955{
956 struct kprobe_trace_point *tp = &tev->point;
380 char *buf; 957 char *buf;
381 int i, len, ret; 958 int i, len, ret;
382 959
383 pp->probes[0] = buf = zalloc(MAX_CMDLEN); 960 buf = zalloc(MAX_CMDLEN);
384 if (!buf) 961 if (buf == NULL)
385 die("Failed to allocate memory by zalloc."); 962 return NULL;
386 ret = e_snprintf(buf, MAX_CMDLEN, "%s+%d", pp->function, pp->offset); 963
387 if (ret <= 0) 964 len = e_snprintf(buf, MAX_CMDLEN, "%c:%s/%s %s+%lu",
965 tp->retprobe ? 'r' : 'p',
966 tev->group, tev->event,
967 tp->symbol, tp->offset);
968 if (len <= 0)
388 goto error; 969 goto error;
389 len = ret;
390 970
391 for (i = 0; i < pp->nr_args; i++) { 971 for (i = 0; i < tev->nargs; i++) {
392 ret = e_snprintf(&buf[len], MAX_CMDLEN - len, " %s", 972 ret = synthesize_kprobe_trace_arg(&tev->args[i], buf + len,
393 pp->args[i]); 973 MAX_CMDLEN - len);
394 if (ret <= 0) 974 if (ret <= 0)
395 goto error; 975 goto error;
396 len += ret; 976 len += ret;
397 } 977 }
398 pp->found = 1;
399 978
400 return pp->found; 979 return buf;
401error: 980error:
402 free(pp->probes[0]); 981 free(buf);
403 pp->probes[0] = NULL; 982 return NULL;
983}
984
985int convert_to_perf_probe_event(struct kprobe_trace_event *tev,
986 struct perf_probe_event *pev)
987{
988 char buf[64] = "";
989 int i, ret;
990
991 /* Convert event/group name */
992 pev->event = strdup(tev->event);
993 pev->group = strdup(tev->group);
994 if (pev->event == NULL || pev->group == NULL)
995 return -ENOMEM;
996
997 /* Convert trace_point to probe_point */
998 ret = convert_to_perf_probe_point(&tev->point, &pev->point);
999 if (ret < 0)
1000 return ret;
1001
1002 /* Convert trace_arg to probe_arg */
1003 pev->nargs = tev->nargs;
1004 pev->args = zalloc(sizeof(struct perf_probe_arg) * pev->nargs);
1005 if (pev->args == NULL)
1006 return -ENOMEM;
1007 for (i = 0; i < tev->nargs && ret >= 0; i++) {
1008 if (tev->args[i].name)
1009 pev->args[i].name = strdup(tev->args[i].name);
1010 else {
1011 ret = synthesize_kprobe_trace_arg(&tev->args[i],
1012 buf, 64);
1013 pev->args[i].name = strdup(buf);
1014 }
1015 if (pev->args[i].name == NULL && ret >= 0)
1016 ret = -ENOMEM;
1017 }
1018
1019 if (ret < 0)
1020 clear_perf_probe_event(pev);
404 1021
405 return ret; 1022 return ret;
406} 1023}
407 1024
408static int open_kprobe_events(int flags, int mode) 1025void clear_perf_probe_event(struct perf_probe_event *pev)
1026{
1027 struct perf_probe_point *pp = &pev->point;
1028 struct perf_probe_arg_field *field, *next;
1029 int i;
1030
1031 if (pev->event)
1032 free(pev->event);
1033 if (pev->group)
1034 free(pev->group);
1035 if (pp->file)
1036 free(pp->file);
1037 if (pp->function)
1038 free(pp->function);
1039 if (pp->lazy_line)
1040 free(pp->lazy_line);
1041 for (i = 0; i < pev->nargs; i++) {
1042 if (pev->args[i].name)
1043 free(pev->args[i].name);
1044 if (pev->args[i].var)
1045 free(pev->args[i].var);
1046 if (pev->args[i].type)
1047 free(pev->args[i].type);
1048 field = pev->args[i].field;
1049 while (field) {
1050 next = field->next;
1051 if (field->name)
1052 free(field->name);
1053 free(field);
1054 field = next;
1055 }
1056 }
1057 if (pev->args)
1058 free(pev->args);
1059 memset(pev, 0, sizeof(*pev));
1060}
1061
1062void clear_kprobe_trace_event(struct kprobe_trace_event *tev)
1063{
1064 struct kprobe_trace_arg_ref *ref, *next;
1065 int i;
1066
1067 if (tev->event)
1068 free(tev->event);
1069 if (tev->group)
1070 free(tev->group);
1071 if (tev->point.symbol)
1072 free(tev->point.symbol);
1073 for (i = 0; i < tev->nargs; i++) {
1074 if (tev->args[i].name)
1075 free(tev->args[i].name);
1076 if (tev->args[i].value)
1077 free(tev->args[i].value);
1078 if (tev->args[i].type)
1079 free(tev->args[i].type);
1080 ref = tev->args[i].ref;
1081 while (ref) {
1082 next = ref->next;
1083 free(ref);
1084 ref = next;
1085 }
1086 }
1087 if (tev->args)
1088 free(tev->args);
1089 memset(tev, 0, sizeof(*tev));
1090}
1091
1092static int open_kprobe_events(bool readwrite)
409{ 1093{
410 char buf[PATH_MAX]; 1094 char buf[PATH_MAX];
1095 const char *__debugfs;
411 int ret; 1096 int ret;
412 1097
413 ret = e_snprintf(buf, PATH_MAX, "%s/../kprobe_events", debugfs_path); 1098 __debugfs = debugfs_find_mountpoint();
414 if (ret < 0) 1099 if (__debugfs == NULL) {
415 die("Failed to make kprobe_events path."); 1100 pr_warning("Debugfs is not mounted.\n");
1101 return -ENOENT;
1102 }
1103
1104 ret = e_snprintf(buf, PATH_MAX, "%stracing/kprobe_events", __debugfs);
1105 if (ret >= 0) {
1106 pr_debug("Opening %s write=%d\n", buf, readwrite);
1107 if (readwrite && !probe_event_dry_run)
1108 ret = open(buf, O_RDWR, O_APPEND);
1109 else
1110 ret = open(buf, O_RDONLY, 0);
1111 }
416 1112
417 ret = open(buf, flags, mode);
418 if (ret < 0) { 1113 if (ret < 0) {
419 if (errno == ENOENT) 1114 if (errno == ENOENT)
420 die("kprobe_events file does not exist -" 1115 pr_warning("kprobe_events file does not exist - please"
421 " please rebuild with CONFIG_KPROBE_EVENT."); 1116 " rebuild kernel with CONFIG_KPROBE_EVENT.\n");
422 else 1117 else
423 die("Could not open kprobe_events file: %s", 1118 pr_warning("Failed to open kprobe_events file: %s\n",
424 strerror(errno)); 1119 strerror(errno));
425 } 1120 }
426 return ret; 1121 return ret;
427} 1122}
428 1123
429/* Get raw string list of current kprobe_events */ 1124/* Get raw string list of current kprobe_events */
430static struct strlist *get_trace_kprobe_event_rawlist(int fd) 1125static struct strlist *get_kprobe_trace_command_rawlist(int fd)
431{ 1126{
432 int ret, idx; 1127 int ret, idx;
433 FILE *fp; 1128 FILE *fp;
@@ -447,271 +1142,486 @@ static struct strlist *get_trace_kprobe_event_rawlist(int fd)
447 if (p[idx] == '\n') 1142 if (p[idx] == '\n')
448 p[idx] = '\0'; 1143 p[idx] = '\0';
449 ret = strlist__add(sl, buf); 1144 ret = strlist__add(sl, buf);
450 if (ret < 0) 1145 if (ret < 0) {
451 die("strlist__add failed: %s", strerror(-ret)); 1146 pr_debug("strlist__add failed: %s\n", strerror(-ret));
1147 strlist__delete(sl);
1148 return NULL;
1149 }
452 } 1150 }
453 fclose(fp); 1151 fclose(fp);
454 1152
455 return sl; 1153 return sl;
456} 1154}
457 1155
458/* Free and zero clear probe_point */
459static void clear_probe_point(struct probe_point *pp)
460{
461 int i;
462
463 if (pp->event)
464 free(pp->event);
465 if (pp->group)
466 free(pp->group);
467 if (pp->function)
468 free(pp->function);
469 if (pp->file)
470 free(pp->file);
471 if (pp->lazy_line)
472 free(pp->lazy_line);
473 for (i = 0; i < pp->nr_args; i++)
474 free(pp->args[i]);
475 if (pp->args)
476 free(pp->args);
477 for (i = 0; i < pp->found; i++)
478 free(pp->probes[i]);
479 memset(pp, 0, sizeof(*pp));
480}
481
482/* Show an event */ 1156/* Show an event */
483static void show_perf_probe_event(const char *event, const char *place, 1157static int show_perf_probe_event(struct perf_probe_event *pev)
484 struct probe_point *pp)
485{ 1158{
486 int i, ret; 1159 int i, ret;
487 char buf[128]; 1160 char buf[128];
1161 char *place;
1162
1163 /* Synthesize only event probe point */
1164 place = synthesize_perf_probe_point(&pev->point);
1165 if (!place)
1166 return -EINVAL;
488 1167
489 ret = e_snprintf(buf, 128, "%s:%s", pp->group, event); 1168 ret = e_snprintf(buf, 128, "%s:%s", pev->group, pev->event);
490 if (ret < 0) 1169 if (ret < 0)
491 die("Failed to copy event: %s", strerror(-ret)); 1170 return ret;
492 printf(" %-40s (on %s", buf, place); 1171
1172 printf(" %-20s (on %s", buf, place);
493 1173
494 if (pp->nr_args > 0) { 1174 if (pev->nargs > 0) {
495 printf(" with"); 1175 printf(" with");
496 for (i = 0; i < pp->nr_args; i++) 1176 for (i = 0; i < pev->nargs; i++) {
497 printf(" %s", pp->args[i]); 1177 ret = synthesize_perf_probe_arg(&pev->args[i],
1178 buf, 128);
1179 if (ret < 0)
1180 break;
1181 printf(" %s", buf);
1182 }
498 } 1183 }
499 printf(")\n"); 1184 printf(")\n");
1185 free(place);
1186 return ret;
500} 1187}
501 1188
502/* List up current perf-probe events */ 1189/* List up current perf-probe events */
503void show_perf_probe_events(void) 1190int show_perf_probe_events(void)
504{ 1191{
505 int fd; 1192 int fd, ret;
506 struct probe_point pp; 1193 struct kprobe_trace_event tev;
1194 struct perf_probe_event pev;
507 struct strlist *rawlist; 1195 struct strlist *rawlist;
508 struct str_node *ent; 1196 struct str_node *ent;
509 1197
510 setup_pager(); 1198 setup_pager();
511 memset(&pp, 0, sizeof(pp)); 1199 ret = init_vmlinux();
1200 if (ret < 0)
1201 return ret;
1202
1203 memset(&tev, 0, sizeof(tev));
1204 memset(&pev, 0, sizeof(pev));
512 1205
513 fd = open_kprobe_events(O_RDONLY, 0); 1206 fd = open_kprobe_events(false);
514 rawlist = get_trace_kprobe_event_rawlist(fd); 1207 if (fd < 0)
1208 return fd;
1209
1210 rawlist = get_kprobe_trace_command_rawlist(fd);
515 close(fd); 1211 close(fd);
1212 if (!rawlist)
1213 return -ENOENT;
516 1214
517 strlist__for_each(ent, rawlist) { 1215 strlist__for_each(ent, rawlist) {
518 parse_trace_kprobe_event(ent->s, &pp); 1216 ret = parse_kprobe_trace_command(ent->s, &tev);
519 /* Synthesize only event probe point */ 1217 if (ret >= 0) {
520 synthesize_perf_probe_point(&pp); 1218 ret = convert_to_perf_probe_event(&tev, &pev);
521 /* Show an event */ 1219 if (ret >= 0)
522 show_perf_probe_event(pp.event, pp.probes[0], &pp); 1220 ret = show_perf_probe_event(&pev);
523 clear_probe_point(&pp); 1221 }
1222 clear_perf_probe_event(&pev);
1223 clear_kprobe_trace_event(&tev);
1224 if (ret < 0)
1225 break;
524 } 1226 }
525
526 strlist__delete(rawlist); 1227 strlist__delete(rawlist);
1228
1229 return ret;
527} 1230}
528 1231
529/* Get current perf-probe event names */ 1232/* Get current perf-probe event names */
530static struct strlist *get_perf_event_names(int fd, bool include_group) 1233static struct strlist *get_kprobe_trace_event_names(int fd, bool include_group)
531{ 1234{
532 char buf[128]; 1235 char buf[128];
533 struct strlist *sl, *rawlist; 1236 struct strlist *sl, *rawlist;
534 struct str_node *ent; 1237 struct str_node *ent;
535 struct probe_point pp; 1238 struct kprobe_trace_event tev;
1239 int ret = 0;
536 1240
537 memset(&pp, 0, sizeof(pp)); 1241 memset(&tev, 0, sizeof(tev));
538 rawlist = get_trace_kprobe_event_rawlist(fd);
539 1242
1243 rawlist = get_kprobe_trace_command_rawlist(fd);
540 sl = strlist__new(true, NULL); 1244 sl = strlist__new(true, NULL);
541 strlist__for_each(ent, rawlist) { 1245 strlist__for_each(ent, rawlist) {
542 parse_trace_kprobe_event(ent->s, &pp); 1246 ret = parse_kprobe_trace_command(ent->s, &tev);
1247 if (ret < 0)
1248 break;
543 if (include_group) { 1249 if (include_group) {
544 if (e_snprintf(buf, 128, "%s:%s", pp.group, 1250 ret = e_snprintf(buf, 128, "%s:%s", tev.group,
545 pp.event) < 0) 1251 tev.event);
546 die("Failed to copy group:event name."); 1252 if (ret >= 0)
547 strlist__add(sl, buf); 1253 ret = strlist__add(sl, buf);
548 } else 1254 } else
549 strlist__add(sl, pp.event); 1255 ret = strlist__add(sl, tev.event);
550 clear_probe_point(&pp); 1256 clear_kprobe_trace_event(&tev);
1257 if (ret < 0)
1258 break;
551 } 1259 }
552
553 strlist__delete(rawlist); 1260 strlist__delete(rawlist);
554 1261
1262 if (ret < 0) {
1263 strlist__delete(sl);
1264 return NULL;
1265 }
555 return sl; 1266 return sl;
556} 1267}
557 1268
558static void write_trace_kprobe_event(int fd, const char *buf) 1269static int write_kprobe_trace_event(int fd, struct kprobe_trace_event *tev)
559{ 1270{
560 int ret; 1271 int ret = 0;
1272 char *buf = synthesize_kprobe_trace_command(tev);
1273
1274 if (!buf) {
1275 pr_debug("Failed to synthesize kprobe trace event.\n");
1276 return -EINVAL;
1277 }
561 1278
562 pr_debug("Writing event: %s\n", buf); 1279 pr_debug("Writing event: %s\n", buf);
563 ret = write(fd, buf, strlen(buf)); 1280 if (!probe_event_dry_run) {
564 if (ret <= 0) 1281 ret = write(fd, buf, strlen(buf));
565 die("Failed to write event: %s", strerror(errno)); 1282 if (ret <= 0)
1283 pr_warning("Failed to write event: %s\n",
1284 strerror(errno));
1285 }
1286 free(buf);
1287 return ret;
566} 1288}
567 1289
568static void get_new_event_name(char *buf, size_t len, const char *base, 1290static int get_new_event_name(char *buf, size_t len, const char *base,
569 struct strlist *namelist, bool allow_suffix) 1291 struct strlist *namelist, bool allow_suffix)
570{ 1292{
571 int i, ret; 1293 int i, ret;
572 1294
573 /* Try no suffix */ 1295 /* Try no suffix */
574 ret = e_snprintf(buf, len, "%s", base); 1296 ret = e_snprintf(buf, len, "%s", base);
575 if (ret < 0) 1297 if (ret < 0) {
576 die("snprintf() failed: %s", strerror(-ret)); 1298 pr_debug("snprintf() failed: %s\n", strerror(-ret));
1299 return ret;
1300 }
577 if (!strlist__has_entry(namelist, buf)) 1301 if (!strlist__has_entry(namelist, buf))
578 return; 1302 return 0;
579 1303
580 if (!allow_suffix) { 1304 if (!allow_suffix) {
581 pr_warning("Error: event \"%s\" already exists. " 1305 pr_warning("Error: event \"%s\" already exists. "
582 "(Use -f to force duplicates.)\n", base); 1306 "(Use -f to force duplicates.)\n", base);
583 die("Can't add new event."); 1307 return -EEXIST;
584 } 1308 }
585 1309
586 /* Try to add suffix */ 1310 /* Try to add suffix */
587 for (i = 1; i < MAX_EVENT_INDEX; i++) { 1311 for (i = 1; i < MAX_EVENT_INDEX; i++) {
588 ret = e_snprintf(buf, len, "%s_%d", base, i); 1312 ret = e_snprintf(buf, len, "%s_%d", base, i);
589 if (ret < 0) 1313 if (ret < 0) {
590 die("snprintf() failed: %s", strerror(-ret)); 1314 pr_debug("snprintf() failed: %s\n", strerror(-ret));
1315 return ret;
1316 }
591 if (!strlist__has_entry(namelist, buf)) 1317 if (!strlist__has_entry(namelist, buf))
592 break; 1318 break;
593 } 1319 }
594 if (i == MAX_EVENT_INDEX) 1320 if (i == MAX_EVENT_INDEX) {
595 die("Too many events are on the same function."); 1321 pr_warning("Too many events are on the same function.\n");
1322 ret = -ERANGE;
1323 }
1324
1325 return ret;
596} 1326}
597 1327
598void add_trace_kprobe_events(struct probe_point *probes, int nr_probes, 1328static int __add_kprobe_trace_events(struct perf_probe_event *pev,
599 bool force_add) 1329 struct kprobe_trace_event *tevs,
1330 int ntevs, bool allow_suffix)
600{ 1331{
601 int i, j, fd; 1332 int i, fd, ret;
602 struct probe_point *pp; 1333 struct kprobe_trace_event *tev = NULL;
603 char buf[MAX_CMDLEN]; 1334 char buf[64];
604 char event[64]; 1335 const char *event, *group;
605 struct strlist *namelist; 1336 struct strlist *namelist;
606 bool allow_suffix;
607 1337
608 fd = open_kprobe_events(O_RDWR, O_APPEND); 1338 fd = open_kprobe_events(true);
1339 if (fd < 0)
1340 return fd;
609 /* Get current event names */ 1341 /* Get current event names */
610 namelist = get_perf_event_names(fd, false); 1342 namelist = get_kprobe_trace_event_names(fd, false);
611 1343 if (!namelist) {
612 for (j = 0; j < nr_probes; j++) { 1344 pr_debug("Failed to get current event list.\n");
613 pp = probes + j; 1345 return -EIO;
614 if (!pp->event) 1346 }
615 pp->event = strdup(pp->function); 1347
616 if (!pp->group) 1348 ret = 0;
617 pp->group = strdup(PERFPROBE_GROUP); 1349 printf("Add new event%s\n", (ntevs > 1) ? "s:" : ":");
618 DIE_IF(!pp->event || !pp->group); 1350 for (i = 0; i < ntevs; i++) {
619 /* If force_add is true, suffix search is allowed */ 1351 tev = &tevs[i];
620 allow_suffix = force_add; 1352 if (pev->event)
621 for (i = 0; i < pp->found; i++) { 1353 event = pev->event;
622 /* Get an unused new event name */ 1354 else
623 get_new_event_name(event, 64, pp->event, namelist, 1355 if (pev->point.function)
624 allow_suffix); 1356 event = pev->point.function;
625 snprintf(buf, MAX_CMDLEN, "%c:%s/%s %s\n", 1357 else
626 pp->retprobe ? 'r' : 'p', 1358 event = tev->point.symbol;
627 pp->group, event, 1359 if (pev->group)
628 pp->probes[i]); 1360 group = pev->group;
629 write_trace_kprobe_event(fd, buf); 1361 else
630 printf("Added new event:\n"); 1362 group = PERFPROBE_GROUP;
631 /* Get the first parameter (probe-point) */ 1363
632 sscanf(pp->probes[i], "%s", buf); 1364 /* Get an unused new event name */
633 show_perf_probe_event(event, buf, pp); 1365 ret = get_new_event_name(buf, 64, event,
634 /* Add added event name to namelist */ 1366 namelist, allow_suffix);
635 strlist__add(namelist, event); 1367 if (ret < 0)
636 /* 1368 break;
637 * Probes after the first probe which comes from same 1369 event = buf;
638 * user input are always allowed to add suffix, because 1370
639 * there might be several addresses corresponding to 1371 tev->event = strdup(event);
640 * one code line. 1372 tev->group = strdup(group);
641 */ 1373 if (tev->event == NULL || tev->group == NULL) {
642 allow_suffix = true; 1374 ret = -ENOMEM;
1375 break;
643 } 1376 }
1377 ret = write_kprobe_trace_event(fd, tev);
1378 if (ret < 0)
1379 break;
1380 /* Add added event name to namelist */
1381 strlist__add(namelist, event);
1382
1383 /* Trick here - save current event/group */
1384 event = pev->event;
1385 group = pev->group;
1386 pev->event = tev->event;
1387 pev->group = tev->group;
1388 show_perf_probe_event(pev);
1389 /* Trick here - restore current event/group */
1390 pev->event = (char *)event;
1391 pev->group = (char *)group;
1392
1393 /*
1394 * Probes after the first probe which comes from same
1395 * user input are always allowed to add suffix, because
1396 * there might be several addresses corresponding to
1397 * one code line.
1398 */
1399 allow_suffix = true;
1400 }
1401
1402 if (ret >= 0) {
1403 /* Show how to use the event. */
1404 printf("\nYou can now use it on all perf tools, such as:\n\n");
1405 printf("\tperf record -e %s:%s -aR sleep 1\n\n", tev->group,
1406 tev->event);
644 } 1407 }
645 /* Show how to use the event. */
646 printf("\nYou can now use it on all perf tools, such as:\n\n");
647 printf("\tperf record -e %s:%s -a sleep 1\n\n", PERFPROBE_GROUP, event);
648 1408
649 strlist__delete(namelist); 1409 strlist__delete(namelist);
650 close(fd); 1410 close(fd);
1411 return ret;
1412}
1413
1414static int convert_to_kprobe_trace_events(struct perf_probe_event *pev,
1415 struct kprobe_trace_event **tevs,
1416 int max_tevs)
1417{
1418 struct symbol *sym;
1419 int ret = 0, i;
1420 struct kprobe_trace_event *tev;
1421
1422 /* Convert perf_probe_event with debuginfo */
1423 ret = try_to_find_kprobe_trace_events(pev, tevs, max_tevs);
1424 if (ret != 0)
1425 return ret;
1426
1427 /* Allocate trace event buffer */
1428 tev = *tevs = zalloc(sizeof(struct kprobe_trace_event));
1429 if (tev == NULL)
1430 return -ENOMEM;
1431
1432 /* Copy parameters */
1433 tev->point.symbol = strdup(pev->point.function);
1434 if (tev->point.symbol == NULL) {
1435 ret = -ENOMEM;
1436 goto error;
1437 }
1438 tev->point.offset = pev->point.offset;
1439 tev->nargs = pev->nargs;
1440 if (tev->nargs) {
1441 tev->args = zalloc(sizeof(struct kprobe_trace_arg)
1442 * tev->nargs);
1443 if (tev->args == NULL) {
1444 ret = -ENOMEM;
1445 goto error;
1446 }
1447 for (i = 0; i < tev->nargs; i++) {
1448 if (pev->args[i].name) {
1449 tev->args[i].name = strdup(pev->args[i].name);
1450 if (tev->args[i].name == NULL) {
1451 ret = -ENOMEM;
1452 goto error;
1453 }
1454 }
1455 tev->args[i].value = strdup(pev->args[i].var);
1456 if (tev->args[i].value == NULL) {
1457 ret = -ENOMEM;
1458 goto error;
1459 }
1460 if (pev->args[i].type) {
1461 tev->args[i].type = strdup(pev->args[i].type);
1462 if (tev->args[i].type == NULL) {
1463 ret = -ENOMEM;
1464 goto error;
1465 }
1466 }
1467 }
1468 }
1469
1470 /* Currently just checking function name from symbol map */
1471 sym = map__find_symbol_by_name(machine.vmlinux_maps[MAP__FUNCTION],
1472 tev->point.symbol, NULL);
1473 if (!sym) {
1474 pr_warning("Kernel symbol \'%s\' not found.\n",
1475 tev->point.symbol);
1476 ret = -ENOENT;
1477 goto error;
1478 }
1479
1480 return 1;
1481error:
1482 clear_kprobe_trace_event(tev);
1483 free(tev);
1484 *tevs = NULL;
1485 return ret;
1486}
1487
1488struct __event_package {
1489 struct perf_probe_event *pev;
1490 struct kprobe_trace_event *tevs;
1491 int ntevs;
1492};
1493
1494int add_perf_probe_events(struct perf_probe_event *pevs, int npevs,
1495 bool force_add, int max_tevs)
1496{
1497 int i, j, ret;
1498 struct __event_package *pkgs;
1499
1500 pkgs = zalloc(sizeof(struct __event_package) * npevs);
1501 if (pkgs == NULL)
1502 return -ENOMEM;
1503
1504 /* Init vmlinux path */
1505 ret = init_vmlinux();
1506 if (ret < 0)
1507 return ret;
1508
1509 /* Loop 1: convert all events */
1510 for (i = 0; i < npevs; i++) {
1511 pkgs[i].pev = &pevs[i];
1512 /* Convert with or without debuginfo */
1513 ret = convert_to_kprobe_trace_events(pkgs[i].pev,
1514 &pkgs[i].tevs, max_tevs);
1515 if (ret < 0)
1516 goto end;
1517 pkgs[i].ntevs = ret;
1518 }
1519
1520 /* Loop 2: add all events */
1521 for (i = 0; i < npevs && ret >= 0; i++)
1522 ret = __add_kprobe_trace_events(pkgs[i].pev, pkgs[i].tevs,
1523 pkgs[i].ntevs, force_add);
1524end:
1525 /* Loop 3: cleanup trace events */
1526 for (i = 0; i < npevs; i++)
1527 for (j = 0; j < pkgs[i].ntevs; j++)
1528 clear_kprobe_trace_event(&pkgs[i].tevs[j]);
1529
1530 return ret;
651} 1531}
652 1532
653static void __del_trace_kprobe_event(int fd, struct str_node *ent) 1533static int __del_trace_kprobe_event(int fd, struct str_node *ent)
654{ 1534{
655 char *p; 1535 char *p;
656 char buf[128]; 1536 char buf[128];
1537 int ret;
657 1538
658 /* Convert from perf-probe event to trace-kprobe event */ 1539 /* Convert from perf-probe event to trace-kprobe event */
659 if (e_snprintf(buf, 128, "-:%s", ent->s) < 0) 1540 ret = e_snprintf(buf, 128, "-:%s", ent->s);
660 die("Failed to copy event."); 1541 if (ret < 0)
1542 goto error;
1543
661 p = strchr(buf + 2, ':'); 1544 p = strchr(buf + 2, ':');
662 if (!p) 1545 if (!p) {
663 die("Internal error: %s should have ':' but not.", ent->s); 1546 pr_debug("Internal error: %s should have ':' but not.\n",
1547 ent->s);
1548 ret = -ENOTSUP;
1549 goto error;
1550 }
664 *p = '/'; 1551 *p = '/';
665 1552
666 write_trace_kprobe_event(fd, buf); 1553 pr_debug("Writing event: %s\n", buf);
1554 ret = write(fd, buf, strlen(buf));
1555 if (ret < 0)
1556 goto error;
1557
667 printf("Remove event: %s\n", ent->s); 1558 printf("Remove event: %s\n", ent->s);
1559 return 0;
1560error:
1561 pr_warning("Failed to delete event: %s\n", strerror(-ret));
1562 return ret;
668} 1563}
669 1564
670static void del_trace_kprobe_event(int fd, const char *group, 1565static int del_trace_kprobe_event(int fd, const char *group,
671 const char *event, struct strlist *namelist) 1566 const char *event, struct strlist *namelist)
672{ 1567{
673 char buf[128]; 1568 char buf[128];
674 struct str_node *ent, *n; 1569 struct str_node *ent, *n;
675 int found = 0; 1570 int found = 0, ret = 0;
676 1571
677 if (e_snprintf(buf, 128, "%s:%s", group, event) < 0) 1572 ret = e_snprintf(buf, 128, "%s:%s", group, event);
678 die("Failed to copy event."); 1573 if (ret < 0) {
1574 pr_err("Failed to copy event.");
1575 return ret;
1576 }
679 1577
680 if (strpbrk(buf, "*?")) { /* Glob-exp */ 1578 if (strpbrk(buf, "*?")) { /* Glob-exp */
681 strlist__for_each_safe(ent, n, namelist) 1579 strlist__for_each_safe(ent, n, namelist)
682 if (strglobmatch(ent->s, buf)) { 1580 if (strglobmatch(ent->s, buf)) {
683 found++; 1581 found++;
684 __del_trace_kprobe_event(fd, ent); 1582 ret = __del_trace_kprobe_event(fd, ent);
1583 if (ret < 0)
1584 break;
685 strlist__remove(namelist, ent); 1585 strlist__remove(namelist, ent);
686 } 1586 }
687 } else { 1587 } else {
688 ent = strlist__find(namelist, buf); 1588 ent = strlist__find(namelist, buf);
689 if (ent) { 1589 if (ent) {
690 found++; 1590 found++;
691 __del_trace_kprobe_event(fd, ent); 1591 ret = __del_trace_kprobe_event(fd, ent);
692 strlist__remove(namelist, ent); 1592 if (ret >= 0)
1593 strlist__remove(namelist, ent);
693 } 1594 }
694 } 1595 }
695 if (found == 0) 1596 if (found == 0 && ret >= 0)
696 pr_info("Info: event \"%s\" does not exist, could not remove it.\n", buf); 1597 pr_info("Info: Event \"%s\" does not exist.\n", buf);
1598
1599 return ret;
697} 1600}
698 1601
699void del_trace_kprobe_events(struct strlist *dellist) 1602int del_perf_probe_events(struct strlist *dellist)
700{ 1603{
701 int fd; 1604 int fd, ret = 0;
702 const char *group, *event; 1605 const char *group, *event;
703 char *p, *str; 1606 char *p, *str;
704 struct str_node *ent; 1607 struct str_node *ent;
705 struct strlist *namelist; 1608 struct strlist *namelist;
706 1609
707 fd = open_kprobe_events(O_RDWR, O_APPEND); 1610 fd = open_kprobe_events(true);
1611 if (fd < 0)
1612 return fd;
1613
708 /* Get current event names */ 1614 /* Get current event names */
709 namelist = get_perf_event_names(fd, true); 1615 namelist = get_kprobe_trace_event_names(fd, true);
1616 if (namelist == NULL)
1617 return -EINVAL;
710 1618
711 strlist__for_each(ent, dellist) { 1619 strlist__for_each(ent, dellist) {
712 str = strdup(ent->s); 1620 str = strdup(ent->s);
713 if (!str) 1621 if (str == NULL) {
714 die("Failed to copy event."); 1622 ret = -ENOMEM;
1623 break;
1624 }
715 pr_debug("Parsing: %s\n", str); 1625 pr_debug("Parsing: %s\n", str);
716 p = strchr(str, ':'); 1626 p = strchr(str, ':');
717 if (p) { 1627 if (p) {
@@ -723,80 +1633,14 @@ void del_trace_kprobe_events(struct strlist *dellist)
723 event = str; 1633 event = str;
724 } 1634 }
725 pr_debug("Group: %s, Event: %s\n", group, event); 1635 pr_debug("Group: %s, Event: %s\n", group, event);
726 del_trace_kprobe_event(fd, group, event, namelist); 1636 ret = del_trace_kprobe_event(fd, group, event, namelist);
727 free(str); 1637 free(str);
1638 if (ret < 0)
1639 break;
728 } 1640 }
729 strlist__delete(namelist); 1641 strlist__delete(namelist);
730 close(fd); 1642 close(fd);
731}
732 1643
733#define LINEBUF_SIZE 256 1644 return ret;
734#define NR_ADDITIONAL_LINES 2
735
736static void show_one_line(FILE *fp, unsigned int l, bool skip, bool show_num)
737{
738 char buf[LINEBUF_SIZE];
739 const char *color = PERF_COLOR_BLUE;
740
741 if (fgets(buf, LINEBUF_SIZE, fp) == NULL)
742 goto error;
743 if (!skip) {
744 if (show_num)
745 fprintf(stdout, "%7u %s", l, buf);
746 else
747 color_fprintf(stdout, color, " %s", buf);
748 }
749
750 while (strlen(buf) == LINEBUF_SIZE - 1 &&
751 buf[LINEBUF_SIZE - 2] != '\n') {
752 if (fgets(buf, LINEBUF_SIZE, fp) == NULL)
753 goto error;
754 if (!skip) {
755 if (show_num)
756 fprintf(stdout, "%s", buf);
757 else
758 color_fprintf(stdout, color, "%s", buf);
759 }
760 }
761 return;
762error:
763 if (feof(fp))
764 die("Source file is shorter than expected.");
765 else
766 die("File read error: %s", strerror(errno));
767} 1645}
768 1646
769void show_line_range(struct line_range *lr)
770{
771 unsigned int l = 1;
772 struct line_node *ln;
773 FILE *fp;
774
775 setup_pager();
776
777 if (lr->function)
778 fprintf(stdout, "<%s:%d>\n", lr->function,
779 lr->start - lr->offset);
780 else
781 fprintf(stdout, "<%s:%d>\n", lr->file, lr->start);
782
783 fp = fopen(lr->path, "r");
784 if (fp == NULL)
785 die("Failed to open %s: %s", lr->path, strerror(errno));
786 /* Skip to starting line number */
787 while (l < lr->start)
788 show_one_line(fp, l++, true, false);
789
790 list_for_each_entry(ln, &lr->line_list, list) {
791 while (ln->line > l)
792 show_one_line(fp, (l++) - lr->offset, false, false);
793 show_one_line(fp, (l++) - lr->offset, false, true);
794 }
795
796 if (lr->end == INT_MAX)
797 lr->end = l + NR_ADDITIONAL_LINES;
798 while (l < lr->end && !feof(fp))
799 show_one_line(fp, (l++) - lr->offset, false, false);
800
801 fclose(fp);
802}
diff --git a/tools/perf/util/probe-event.h b/tools/perf/util/probe-event.h
index 711287d4baea..e9db1a214ca4 100644
--- a/tools/perf/util/probe-event.h
+++ b/tools/perf/util/probe-event.h
@@ -2,21 +2,125 @@
2#define _PROBE_EVENT_H 2#define _PROBE_EVENT_H
3 3
4#include <stdbool.h> 4#include <stdbool.h>
5#include "probe-finder.h"
6#include "strlist.h" 5#include "strlist.h"
7 6
8extern void parse_line_range_desc(const char *arg, struct line_range *lr); 7extern bool probe_event_dry_run;
9extern void parse_perf_probe_event(const char *str, struct probe_point *pp, 8
10 bool *need_dwarf); 9/* kprobe-tracer tracing point */
11extern int synthesize_perf_probe_point(struct probe_point *pp); 10struct kprobe_trace_point {
12extern int synthesize_perf_probe_event(struct probe_point *pp); 11 char *symbol; /* Base symbol */
13extern void parse_trace_kprobe_event(const char *str, struct probe_point *pp); 12 unsigned long offset; /* Offset from symbol */
14extern int synthesize_trace_kprobe_event(struct probe_point *pp); 13 bool retprobe; /* Return probe flag */
15extern void add_trace_kprobe_events(struct probe_point *probes, int nr_probes, 14};
16 bool force_add); 15
17extern void del_trace_kprobe_events(struct strlist *dellist); 16/* kprobe-tracer tracing argument referencing offset */
18extern void show_perf_probe_events(void); 17struct kprobe_trace_arg_ref {
19extern void show_line_range(struct line_range *lr); 18 struct kprobe_trace_arg_ref *next; /* Next reference */
19 long offset; /* Offset value */
20};
21
22/* kprobe-tracer tracing argument */
23struct kprobe_trace_arg {
24 char *name; /* Argument name */
25 char *value; /* Base value */
26 char *type; /* Type name */
27 struct kprobe_trace_arg_ref *ref; /* Referencing offset */
28};
29
30/* kprobe-tracer tracing event (point + arg) */
31struct kprobe_trace_event {
32 char *event; /* Event name */
33 char *group; /* Group name */
34 struct kprobe_trace_point point; /* Trace point */
35 int nargs; /* Number of args */
36 struct kprobe_trace_arg *args; /* Arguments */
37};
38
39/* Perf probe probing point */
40struct perf_probe_point {
41 char *file; /* File path */
42 char *function; /* Function name */
43 int line; /* Line number */
44 bool retprobe; /* Return probe flag */
45 char *lazy_line; /* Lazy matching pattern */
46 unsigned long offset; /* Offset from function entry */
47};
48
49/* Perf probe probing argument field chain */
50struct perf_probe_arg_field {
51 struct perf_probe_arg_field *next; /* Next field */
52 char *name; /* Name of the field */
53 bool ref; /* Referencing flag */
54};
55
56/* Perf probe probing argument */
57struct perf_probe_arg {
58 char *name; /* Argument name */
59 char *var; /* Variable name */
60 char *type; /* Type name */
61 struct perf_probe_arg_field *field; /* Structure fields */
62};
63
64/* Perf probe probing event (point + arg) */
65struct perf_probe_event {
66 char *event; /* Event name */
67 char *group; /* Group name */
68 struct perf_probe_point point; /* Probe point */
69 int nargs; /* Number of arguments */
70 struct perf_probe_arg *args; /* Arguments */
71};
72
73
74/* Line number container */
75struct line_node {
76 struct list_head list;
77 int line;
78};
79
80/* Line range */
81struct line_range {
82 char *file; /* File name */
83 char *function; /* Function name */
84 int start; /* Start line number */
85 int end; /* End line number */
86 int offset; /* Start line offset */
87 char *path; /* Real path name */
88 struct list_head line_list; /* Visible lines */
89};
90
91/* Command string to events */
92extern int parse_perf_probe_command(const char *cmd,
93 struct perf_probe_event *pev);
94extern int parse_kprobe_trace_command(const char *cmd,
95 struct kprobe_trace_event *tev);
96
97/* Events to command string */
98extern char *synthesize_perf_probe_command(struct perf_probe_event *pev);
99extern char *synthesize_kprobe_trace_command(struct kprobe_trace_event *tev);
100extern int synthesize_perf_probe_arg(struct perf_probe_arg *pa, char *buf,
101 size_t len);
102
103/* Check the perf_probe_event needs debuginfo */
104extern bool perf_probe_event_need_dwarf(struct perf_probe_event *pev);
105
106/* Convert from kprobe_trace_event to perf_probe_event */
107extern int convert_to_perf_probe_event(struct kprobe_trace_event *tev,
108 struct perf_probe_event *pev);
109
110/* Release event contents */
111extern void clear_perf_probe_event(struct perf_probe_event *pev);
112extern void clear_kprobe_trace_event(struct kprobe_trace_event *tev);
113
114/* Command string to line-range */
115extern int parse_line_range_desc(const char *cmd, struct line_range *lr);
116
117
118extern int add_perf_probe_events(struct perf_probe_event *pevs, int npevs,
119 bool force_add, int max_probe_points);
120extern int del_perf_probe_events(struct strlist *dellist);
121extern int show_perf_probe_events(void);
122extern int show_line_range(struct line_range *lr);
123
20 124
21/* Maximum index number of event-name postfix */ 125/* Maximum index number of event-name postfix */
22#define MAX_EVENT_INDEX 1024 126#define MAX_EVENT_INDEX 1024
diff --git a/tools/perf/util/probe-finder.c b/tools/perf/util/probe-finder.c
index c171a243d05b..562b1443e785 100644
--- a/tools/perf/util/probe-finder.c
+++ b/tools/perf/util/probe-finder.c
@@ -31,6 +31,7 @@
31#include <string.h> 31#include <string.h>
32#include <stdarg.h> 32#include <stdarg.h>
33#include <ctype.h> 33#include <ctype.h>
34#include <dwarf-regs.h>
34 35
35#include "string.h" 36#include "string.h"
36#include "event.h" 37#include "event.h"
@@ -38,57 +39,8 @@
38#include "util.h" 39#include "util.h"
39#include "probe-finder.h" 40#include "probe-finder.h"
40 41
41 42/* Kprobe tracer basic type is up to u64 */
42/* 43#define MAX_BASIC_TYPE_BITS 64
43 * Generic dwarf analysis helpers
44 */
45
46#define X86_32_MAX_REGS 8
47const char *x86_32_regs_table[X86_32_MAX_REGS] = {
48 "%ax",
49 "%cx",
50 "%dx",
51 "%bx",
52 "$stack", /* Stack address instead of %sp */
53 "%bp",
54 "%si",
55 "%di",
56};
57
58#define X86_64_MAX_REGS 16
59const char *x86_64_regs_table[X86_64_MAX_REGS] = {
60 "%ax",
61 "%dx",
62 "%cx",
63 "%bx",
64 "%si",
65 "%di",
66 "%bp",
67 "%sp",
68 "%r8",
69 "%r9",
70 "%r10",
71 "%r11",
72 "%r12",
73 "%r13",
74 "%r14",
75 "%r15",
76};
77
78/* TODO: switching by dwarf address size */
79#ifdef __x86_64__
80#define ARCH_MAX_REGS X86_64_MAX_REGS
81#define arch_regs_table x86_64_regs_table
82#else
83#define ARCH_MAX_REGS X86_32_MAX_REGS
84#define arch_regs_table x86_32_regs_table
85#endif
86
87/* Return architecture dependent register string (for kprobe-tracer) */
88static const char *get_arch_regstr(unsigned int n)
89{
90 return (n <= ARCH_MAX_REGS) ? arch_regs_table[n] : NULL;
91}
92 44
93/* 45/*
94 * Compare the tail of two strings. 46 * Compare the tail of two strings.
@@ -108,7 +60,7 @@ static int strtailcmp(const char *s1, const char *s2)
108/* Line number list operations */ 60/* Line number list operations */
109 61
110/* Add a line to line number list */ 62/* Add a line to line number list */
111static void line_list__add_line(struct list_head *head, unsigned int line) 63static int line_list__add_line(struct list_head *head, int line)
112{ 64{
113 struct line_node *ln; 65 struct line_node *ln;
114 struct list_head *p; 66 struct list_head *p;
@@ -119,21 +71,23 @@ static void line_list__add_line(struct list_head *head, unsigned int line)
119 p = &ln->list; 71 p = &ln->list;
120 goto found; 72 goto found;
121 } else if (ln->line == line) /* Already exist */ 73 } else if (ln->line == line) /* Already exist */
122 return ; 74 return 1;
123 } 75 }
124 /* List is empty, or the smallest entry */ 76 /* List is empty, or the smallest entry */
125 p = head; 77 p = head;
126found: 78found:
127 pr_debug("line list: add a line %u\n", line); 79 pr_debug("line list: add a line %u\n", line);
128 ln = zalloc(sizeof(struct line_node)); 80 ln = zalloc(sizeof(struct line_node));
129 DIE_IF(ln == NULL); 81 if (ln == NULL)
82 return -ENOMEM;
130 ln->line = line; 83 ln->line = line;
131 INIT_LIST_HEAD(&ln->list); 84 INIT_LIST_HEAD(&ln->list);
132 list_add(&ln->list, p); 85 list_add(&ln->list, p);
86 return 0;
133} 87}
134 88
135/* Check if the line in line number list */ 89/* Check if the line in line number list */
136static int line_list__has_line(struct list_head *head, unsigned int line) 90static int line_list__has_line(struct list_head *head, int line)
137{ 91{
138 struct line_node *ln; 92 struct line_node *ln;
139 93
@@ -184,9 +138,129 @@ static const char *cu_find_realpath(Dwarf_Die *cu_die, const char *fname)
184 if (strtailcmp(src, fname) == 0) 138 if (strtailcmp(src, fname) == 0)
185 break; 139 break;
186 } 140 }
141 if (i == nfiles)
142 return NULL;
187 return src; 143 return src;
188} 144}
189 145
146/* Compare diename and tname */
147static bool die_compare_name(Dwarf_Die *dw_die, const char *tname)
148{
149 const char *name;
150 name = dwarf_diename(dw_die);
151 return name ? strcmp(tname, name) : -1;
152}
153
154/* Get type die, but skip qualifiers and typedef */
155static Dwarf_Die *die_get_real_type(Dwarf_Die *vr_die, Dwarf_Die *die_mem)
156{
157 Dwarf_Attribute attr;
158 int tag;
159
160 do {
161 if (dwarf_attr(vr_die, DW_AT_type, &attr) == NULL ||
162 dwarf_formref_die(&attr, die_mem) == NULL)
163 return NULL;
164
165 tag = dwarf_tag(die_mem);
166 vr_die = die_mem;
167 } while (tag == DW_TAG_const_type ||
168 tag == DW_TAG_restrict_type ||
169 tag == DW_TAG_volatile_type ||
170 tag == DW_TAG_shared_type ||
171 tag == DW_TAG_typedef);
172
173 return die_mem;
174}
175
176static bool die_is_signed_type(Dwarf_Die *tp_die)
177{
178 Dwarf_Attribute attr;
179 Dwarf_Word ret;
180
181 if (dwarf_attr(tp_die, DW_AT_encoding, &attr) == NULL ||
182 dwarf_formudata(&attr, &ret) != 0)
183 return false;
184
185 return (ret == DW_ATE_signed_char || ret == DW_ATE_signed ||
186 ret == DW_ATE_signed_fixed);
187}
188
189static int die_get_byte_size(Dwarf_Die *tp_die)
190{
191 Dwarf_Attribute attr;
192 Dwarf_Word ret;
193
194 if (dwarf_attr(tp_die, DW_AT_byte_size, &attr) == NULL ||
195 dwarf_formudata(&attr, &ret) != 0)
196 return 0;
197
198 return (int)ret;
199}
200
201/* Get data_member_location offset */
202static int die_get_data_member_location(Dwarf_Die *mb_die, Dwarf_Word *offs)
203{
204 Dwarf_Attribute attr;
205 Dwarf_Op *expr;
206 size_t nexpr;
207 int ret;
208
209 if (dwarf_attr(mb_die, DW_AT_data_member_location, &attr) == NULL)
210 return -ENOENT;
211
212 if (dwarf_formudata(&attr, offs) != 0) {
213 /* DW_AT_data_member_location should be DW_OP_plus_uconst */
214 ret = dwarf_getlocation(&attr, &expr, &nexpr);
215 if (ret < 0 || nexpr == 0)
216 return -ENOENT;
217
218 if (expr[0].atom != DW_OP_plus_uconst || nexpr != 1) {
219 pr_debug("Unable to get offset:Unexpected OP %x (%zd)\n",
220 expr[0].atom, nexpr);
221 return -ENOTSUP;
222 }
223 *offs = (Dwarf_Word)expr[0].number;
224 }
225 return 0;
226}
227
228/* Return values for die_find callbacks */
229enum {
230 DIE_FIND_CB_FOUND = 0, /* End of Search */
231 DIE_FIND_CB_CHILD = 1, /* Search only children */
232 DIE_FIND_CB_SIBLING = 2, /* Search only siblings */
233 DIE_FIND_CB_CONTINUE = 3, /* Search children and siblings */
234};
235
236/* Search a child die */
237static Dwarf_Die *die_find_child(Dwarf_Die *rt_die,
238 int (*callback)(Dwarf_Die *, void *),
239 void *data, Dwarf_Die *die_mem)
240{
241 Dwarf_Die child_die;
242 int ret;
243
244 ret = dwarf_child(rt_die, die_mem);
245 if (ret != 0)
246 return NULL;
247
248 do {
249 ret = callback(die_mem, data);
250 if (ret == DIE_FIND_CB_FOUND)
251 return die_mem;
252
253 if ((ret & DIE_FIND_CB_CHILD) &&
254 die_find_child(die_mem, callback, data, &child_die)) {
255 memcpy(die_mem, &child_die, sizeof(Dwarf_Die));
256 return die_mem;
257 }
258 } while ((ret & DIE_FIND_CB_SIBLING) &&
259 dwarf_siblingof(die_mem, die_mem) == 0);
260
261 return NULL;
262}
263
190struct __addr_die_search_param { 264struct __addr_die_search_param {
191 Dwarf_Addr addr; 265 Dwarf_Addr addr;
192 Dwarf_Die *die_mem; 266 Dwarf_Die *die_mem;
@@ -205,8 +279,8 @@ static int __die_search_func_cb(Dwarf_Die *fn_die, void *data)
205} 279}
206 280
207/* Search a real subprogram including this line, */ 281/* Search a real subprogram including this line, */
208static Dwarf_Die *die_get_real_subprogram(Dwarf_Die *cu_die, Dwarf_Addr addr, 282static Dwarf_Die *die_find_real_subprogram(Dwarf_Die *cu_die, Dwarf_Addr addr,
209 Dwarf_Die *die_mem) 283 Dwarf_Die *die_mem)
210{ 284{
211 struct __addr_die_search_param ad; 285 struct __addr_die_search_param ad;
212 ad.addr = addr; 286 ad.addr = addr;
@@ -218,77 +292,64 @@ static Dwarf_Die *die_get_real_subprogram(Dwarf_Die *cu_die, Dwarf_Addr addr,
218 return die_mem; 292 return die_mem;
219} 293}
220 294
221/* Similar to dwarf_getfuncs, but returns inlined_subroutine if exists. */ 295/* die_find callback for inline function search */
222static Dwarf_Die *die_get_inlinefunc(Dwarf_Die *sp_die, Dwarf_Addr addr, 296static int __die_find_inline_cb(Dwarf_Die *die_mem, void *data)
223 Dwarf_Die *die_mem)
224{ 297{
225 Dwarf_Die child_die; 298 Dwarf_Addr *addr = data;
226 int ret;
227 299
228 ret = dwarf_child(sp_die, die_mem); 300 if (dwarf_tag(die_mem) == DW_TAG_inlined_subroutine &&
229 if (ret != 0) 301 dwarf_haspc(die_mem, *addr))
230 return NULL; 302 return DIE_FIND_CB_FOUND;
231 303
232 do { 304 return DIE_FIND_CB_CONTINUE;
233 if (dwarf_tag(die_mem) == DW_TAG_inlined_subroutine &&
234 dwarf_haspc(die_mem, addr))
235 return die_mem;
236
237 if (die_get_inlinefunc(die_mem, addr, &child_die)) {
238 memcpy(die_mem, &child_die, sizeof(Dwarf_Die));
239 return die_mem;
240 }
241 } while (dwarf_siblingof(die_mem, die_mem) == 0);
242
243 return NULL;
244} 305}
245 306
246/* Compare diename and tname */ 307/* Similar to dwarf_getfuncs, but returns inlined_subroutine if exists. */
247static bool die_compare_name(Dwarf_Die *dw_die, const char *tname) 308static Dwarf_Die *die_find_inlinefunc(Dwarf_Die *sp_die, Dwarf_Addr addr,
309 Dwarf_Die *die_mem)
248{ 310{
249 const char *name; 311 return die_find_child(sp_die, __die_find_inline_cb, &addr, die_mem);
250 name = dwarf_diename(dw_die);
251 DIE_IF(name == NULL);
252 return strcmp(tname, name);
253} 312}
254 313
255/* Get entry pc(or low pc, 1st entry of ranges) of the die */ 314static int __die_find_variable_cb(Dwarf_Die *die_mem, void *data)
256static Dwarf_Addr die_get_entrypc(Dwarf_Die *dw_die)
257{ 315{
258 Dwarf_Addr epc; 316 const char *name = data;
259 int ret; 317 int tag;
260 318
261 ret = dwarf_entrypc(dw_die, &epc); 319 tag = dwarf_tag(die_mem);
262 DIE_IF(ret == -1); 320 if ((tag == DW_TAG_formal_parameter ||
263 return epc; 321 tag == DW_TAG_variable) &&
322 (die_compare_name(die_mem, name) == 0))
323 return DIE_FIND_CB_FOUND;
324
325 return DIE_FIND_CB_CONTINUE;
264} 326}
265 327
266/* Get a variable die */ 328/* Find a variable called 'name' */
267static Dwarf_Die *die_find_variable(Dwarf_Die *sp_die, const char *name, 329static Dwarf_Die *die_find_variable(Dwarf_Die *sp_die, const char *name,
268 Dwarf_Die *die_mem) 330 Dwarf_Die *die_mem)
269{ 331{
270 Dwarf_Die child_die; 332 return die_find_child(sp_die, __die_find_variable_cb, (void *)name,
271 int tag; 333 die_mem);
272 int ret; 334}
273 335
274 ret = dwarf_child(sp_die, die_mem); 336static int __die_find_member_cb(Dwarf_Die *die_mem, void *data)
275 if (ret != 0) 337{
276 return NULL; 338 const char *name = data;
277 339
278 do { 340 if ((dwarf_tag(die_mem) == DW_TAG_member) &&
279 tag = dwarf_tag(die_mem); 341 (die_compare_name(die_mem, name) == 0))
280 if ((tag == DW_TAG_formal_parameter || 342 return DIE_FIND_CB_FOUND;
281 tag == DW_TAG_variable) &&
282 (die_compare_name(die_mem, name) == 0))
283 return die_mem;
284 343
285 if (die_find_variable(die_mem, name, &child_die)) { 344 return DIE_FIND_CB_SIBLING;
286 memcpy(die_mem, &child_die, sizeof(Dwarf_Die)); 345}
287 return die_mem;
288 }
289 } while (dwarf_siblingof(die_mem, die_mem) == 0);
290 346
291 return NULL; 347/* Find a member called 'name' */
348static Dwarf_Die *die_find_member(Dwarf_Die *st_die, const char *name,
349 Dwarf_Die *die_mem)
350{
351 return die_find_child(st_die, __die_find_member_cb, (void *)name,
352 die_mem);
292} 353}
293 354
294/* 355/*
@@ -296,19 +357,22 @@ static Dwarf_Die *die_find_variable(Dwarf_Die *sp_die, const char *name,
296 */ 357 */
297 358
298/* Show a location */ 359/* Show a location */
299static void show_location(Dwarf_Op *op, struct probe_finder *pf) 360static int convert_location(Dwarf_Op *op, struct probe_finder *pf)
300{ 361{
301 unsigned int regn; 362 unsigned int regn;
302 Dwarf_Word offs = 0; 363 Dwarf_Word offs = 0;
303 int deref = 0, ret; 364 bool ref = false;
304 const char *regs; 365 const char *regs;
366 struct kprobe_trace_arg *tvar = pf->tvar;
305 367
306 /* TODO: support CFA */
307 /* If this is based on frame buffer, set the offset */ 368 /* If this is based on frame buffer, set the offset */
308 if (op->atom == DW_OP_fbreg) { 369 if (op->atom == DW_OP_fbreg) {
309 if (pf->fb_ops == NULL) 370 if (pf->fb_ops == NULL) {
310 die("The attribute of frame base is not supported.\n"); 371 pr_warning("The attribute of frame base is not "
311 deref = 1; 372 "supported.\n");
373 return -ENOTSUP;
374 }
375 ref = true;
312 offs = op->number; 376 offs = op->number;
313 op = &pf->fb_ops[0]; 377 op = &pf->fb_ops[0];
314 } 378 }
@@ -316,35 +380,164 @@ static void show_location(Dwarf_Op *op, struct probe_finder *pf)
316 if (op->atom >= DW_OP_breg0 && op->atom <= DW_OP_breg31) { 380 if (op->atom >= DW_OP_breg0 && op->atom <= DW_OP_breg31) {
317 regn = op->atom - DW_OP_breg0; 381 regn = op->atom - DW_OP_breg0;
318 offs += op->number; 382 offs += op->number;
319 deref = 1; 383 ref = true;
320 } else if (op->atom >= DW_OP_reg0 && op->atom <= DW_OP_reg31) { 384 } else if (op->atom >= DW_OP_reg0 && op->atom <= DW_OP_reg31) {
321 regn = op->atom - DW_OP_reg0; 385 regn = op->atom - DW_OP_reg0;
322 } else if (op->atom == DW_OP_bregx) { 386 } else if (op->atom == DW_OP_bregx) {
323 regn = op->number; 387 regn = op->number;
324 offs += op->number2; 388 offs += op->number2;
325 deref = 1; 389 ref = true;
326 } else if (op->atom == DW_OP_regx) { 390 } else if (op->atom == DW_OP_regx) {
327 regn = op->number; 391 regn = op->number;
328 } else 392 } else {
329 die("DW_OP %d is not supported.", op->atom); 393 pr_warning("DW_OP %x is not supported.\n", op->atom);
394 return -ENOTSUP;
395 }
330 396
331 regs = get_arch_regstr(regn); 397 regs = get_arch_regstr(regn);
332 if (!regs) 398 if (!regs) {
333 die("%u exceeds max register number.", regn); 399 pr_warning("Mapping for DWARF register number %u missing on this architecture.", regn);
400 return -ERANGE;
401 }
402
403 tvar->value = strdup(regs);
404 if (tvar->value == NULL)
405 return -ENOMEM;
406
407 if (ref) {
408 tvar->ref = zalloc(sizeof(struct kprobe_trace_arg_ref));
409 if (tvar->ref == NULL)
410 return -ENOMEM;
411 tvar->ref->offset = (long)offs;
412 }
413 return 0;
414}
415
416static int convert_variable_type(Dwarf_Die *vr_die,
417 struct kprobe_trace_arg *targ)
418{
419 Dwarf_Die type;
420 char buf[16];
421 int ret;
422
423 if (die_get_real_type(vr_die, &type) == NULL) {
424 pr_warning("Failed to get a type information of %s.\n",
425 dwarf_diename(vr_die));
426 return -ENOENT;
427 }
428
429 ret = die_get_byte_size(&type) * 8;
430 if (ret) {
431 /* Check the bitwidth */
432 if (ret > MAX_BASIC_TYPE_BITS) {
433 pr_info("%s exceeds max-bitwidth."
434 " Cut down to %d bits.\n",
435 dwarf_diename(&type), MAX_BASIC_TYPE_BITS);
436 ret = MAX_BASIC_TYPE_BITS;
437 }
438
439 ret = snprintf(buf, 16, "%c%d",
440 die_is_signed_type(&type) ? 's' : 'u', ret);
441 if (ret < 0 || ret >= 16) {
442 if (ret >= 16)
443 ret = -E2BIG;
444 pr_warning("Failed to convert variable type: %s\n",
445 strerror(-ret));
446 return ret;
447 }
448 targ->type = strdup(buf);
449 if (targ->type == NULL)
450 return -ENOMEM;
451 }
452 return 0;
453}
454
455static int convert_variable_fields(Dwarf_Die *vr_die, const char *varname,
456 struct perf_probe_arg_field *field,
457 struct kprobe_trace_arg_ref **ref_ptr,
458 Dwarf_Die *die_mem)
459{
460 struct kprobe_trace_arg_ref *ref = *ref_ptr;
461 Dwarf_Die type;
462 Dwarf_Word offs;
463 int ret;
464
465 pr_debug("converting %s in %s\n", field->name, varname);
466 if (die_get_real_type(vr_die, &type) == NULL) {
467 pr_warning("Failed to get the type of %s.\n", varname);
468 return -ENOENT;
469 }
470
471 /* Check the pointer and dereference */
472 if (dwarf_tag(&type) == DW_TAG_pointer_type) {
473 if (!field->ref) {
474 pr_err("Semantic error: %s must be referred by '->'\n",
475 field->name);
476 return -EINVAL;
477 }
478 /* Get the type pointed by this pointer */
479 if (die_get_real_type(&type, &type) == NULL) {
480 pr_warning("Failed to get the type of %s.\n", varname);
481 return -ENOENT;
482 }
483 /* Verify it is a data structure */
484 if (dwarf_tag(&type) != DW_TAG_structure_type) {
485 pr_warning("%s is not a data structure.\n", varname);
486 return -EINVAL;
487 }
488
489 ref = zalloc(sizeof(struct kprobe_trace_arg_ref));
490 if (ref == NULL)
491 return -ENOMEM;
492 if (*ref_ptr)
493 (*ref_ptr)->next = ref;
494 else
495 *ref_ptr = ref;
496 } else {
497 /* Verify it is a data structure */
498 if (dwarf_tag(&type) != DW_TAG_structure_type) {
499 pr_warning("%s is not a data structure.\n", varname);
500 return -EINVAL;
501 }
502 if (field->ref) {
503 pr_err("Semantic error: %s must be referred by '.'\n",
504 field->name);
505 return -EINVAL;
506 }
507 if (!ref) {
508 pr_warning("Structure on a register is not "
509 "supported yet.\n");
510 return -ENOTSUP;
511 }
512 }
513
514 if (die_find_member(&type, field->name, die_mem) == NULL) {
515 pr_warning("%s(tyep:%s) has no member %s.\n", varname,
516 dwarf_diename(&type), field->name);
517 return -EINVAL;
518 }
334 519
335 if (deref) 520 /* Get the offset of the field */
336 ret = snprintf(pf->buf, pf->len, " %s=%+jd(%s)", 521 ret = die_get_data_member_location(die_mem, &offs);
337 pf->var, (intmax_t)offs, regs); 522 if (ret < 0) {
523 pr_warning("Failed to get the offset of %s.\n", field->name);
524 return ret;
525 }
526 ref->offset += (long)offs;
527
528 /* Converting next field */
529 if (field->next)
530 return convert_variable_fields(die_mem, field->name,
531 field->next, &ref, die_mem);
338 else 532 else
339 ret = snprintf(pf->buf, pf->len, " %s=%s", pf->var, regs); 533 return 0;
340 DIE_IF(ret < 0);
341 DIE_IF(ret >= pf->len);
342} 534}
343 535
344/* Show a variables in kprobe event format */ 536/* Show a variables in kprobe event format */
345static void show_variable(Dwarf_Die *vr_die, struct probe_finder *pf) 537static int convert_variable(Dwarf_Die *vr_die, struct probe_finder *pf)
346{ 538{
347 Dwarf_Attribute attr; 539 Dwarf_Attribute attr;
540 Dwarf_Die die_mem;
348 Dwarf_Op *expr; 541 Dwarf_Op *expr;
349 size_t nexpr; 542 size_t nexpr;
350 int ret; 543 int ret;
@@ -356,142 +549,191 @@ static void show_variable(Dwarf_Die *vr_die, struct probe_finder *pf)
356 if (ret <= 0 || nexpr == 0) 549 if (ret <= 0 || nexpr == 0)
357 goto error; 550 goto error;
358 551
359 show_location(expr, pf); 552 ret = convert_location(expr, pf);
553 if (ret == 0 && pf->pvar->field) {
554 ret = convert_variable_fields(vr_die, pf->pvar->var,
555 pf->pvar->field, &pf->tvar->ref,
556 &die_mem);
557 vr_die = &die_mem;
558 }
559 if (ret == 0) {
560 if (pf->pvar->type) {
561 pf->tvar->type = strdup(pf->pvar->type);
562 if (pf->tvar->type == NULL)
563 ret = -ENOMEM;
564 } else
565 ret = convert_variable_type(vr_die, pf->tvar);
566 }
360 /* *expr will be cached in libdw. Don't free it. */ 567 /* *expr will be cached in libdw. Don't free it. */
361 return ; 568 return ret;
362error: 569error:
363 /* TODO: Support const_value */ 570 /* TODO: Support const_value */
364 die("Failed to find the location of %s at this address.\n" 571 pr_err("Failed to find the location of %s at this address.\n"
365 " Perhaps, it has been optimized out.", pf->var); 572 " Perhaps, it has been optimized out.\n", pf->pvar->var);
573 return -ENOENT;
366} 574}
367 575
368/* Find a variable in a subprogram die */ 576/* Find a variable in a subprogram die */
369static void find_variable(Dwarf_Die *sp_die, struct probe_finder *pf) 577static int find_variable(Dwarf_Die *sp_die, struct probe_finder *pf)
370{ 578{
371 int ret;
372 Dwarf_Die vr_die; 579 Dwarf_Die vr_die;
580 char buf[32], *ptr;
581 int ret;
373 582
374 /* TODO: Support struct members and arrays */ 583 /* TODO: Support arrays */
375 if (!is_c_varname(pf->var)) { 584 if (pf->pvar->name)
376 /* Output raw parameters */ 585 pf->tvar->name = strdup(pf->pvar->name);
377 ret = snprintf(pf->buf, pf->len, " %s", pf->var); 586 else {
378 DIE_IF(ret < 0); 587 ret = synthesize_perf_probe_arg(pf->pvar, buf, 32);
379 DIE_IF(ret >= pf->len); 588 if (ret < 0)
380 return ; 589 return ret;
590 ptr = strchr(buf, ':'); /* Change type separator to _ */
591 if (ptr)
592 *ptr = '_';
593 pf->tvar->name = strdup(buf);
594 }
595 if (pf->tvar->name == NULL)
596 return -ENOMEM;
597
598 if (!is_c_varname(pf->pvar->var)) {
599 /* Copy raw parameters */
600 pf->tvar->value = strdup(pf->pvar->var);
601 if (pf->tvar->value == NULL)
602 return -ENOMEM;
603 else
604 return 0;
381 } 605 }
382 606
383 pr_debug("Searching '%s' variable in context.\n", pf->var); 607 pr_debug("Searching '%s' variable in context.\n",
608 pf->pvar->var);
384 /* Search child die for local variables and parameters. */ 609 /* Search child die for local variables and parameters. */
385 if (!die_find_variable(sp_die, pf->var, &vr_die)) 610 if (!die_find_variable(sp_die, pf->pvar->var, &vr_die)) {
386 die("Failed to find '%s' in this function.", pf->var); 611 pr_warning("Failed to find '%s' in this function.\n",
387 612 pf->pvar->var);
388 show_variable(&vr_die, pf); 613 return -ENOENT;
614 }
615 return convert_variable(&vr_die, pf);
389} 616}
390 617
391/* Show a probe point to output buffer */ 618/* Show a probe point to output buffer */
392static void show_probe_point(Dwarf_Die *sp_die, struct probe_finder *pf) 619static int convert_probe_point(Dwarf_Die *sp_die, struct probe_finder *pf)
393{ 620{
394 struct probe_point *pp = pf->pp; 621 struct kprobe_trace_event *tev;
395 Dwarf_Addr eaddr; 622 Dwarf_Addr eaddr;
396 Dwarf_Die die_mem; 623 Dwarf_Die die_mem;
397 const char *name; 624 const char *name;
398 char tmp[MAX_PROBE_BUFFER]; 625 int ret, i;
399 int ret, i, len;
400 Dwarf_Attribute fb_attr; 626 Dwarf_Attribute fb_attr;
401 size_t nops; 627 size_t nops;
402 628
629 if (pf->ntevs == pf->max_tevs) {
630 pr_warning("Too many( > %d) probe point found.\n",
631 pf->max_tevs);
632 return -ERANGE;
633 }
634 tev = &pf->tevs[pf->ntevs++];
635
403 /* If no real subprogram, find a real one */ 636 /* If no real subprogram, find a real one */
404 if (!sp_die || dwarf_tag(sp_die) != DW_TAG_subprogram) { 637 if (!sp_die || dwarf_tag(sp_die) != DW_TAG_subprogram) {
405 sp_die = die_get_real_subprogram(&pf->cu_die, 638 sp_die = die_find_real_subprogram(&pf->cu_die,
406 pf->addr, &die_mem); 639 pf->addr, &die_mem);
407 if (!sp_die) 640 if (!sp_die) {
408 die("Probe point is not found in subprograms."); 641 pr_warning("Failed to find probe point in any "
642 "functions.\n");
643 return -ENOENT;
644 }
409 } 645 }
410 646
411 /* Output name of probe point */ 647 /* Copy the name of probe point */
412 name = dwarf_diename(sp_die); 648 name = dwarf_diename(sp_die);
413 if (name) { 649 if (name) {
414 dwarf_entrypc(sp_die, &eaddr); 650 if (dwarf_entrypc(sp_die, &eaddr) != 0) {
415 ret = snprintf(tmp, MAX_PROBE_BUFFER, "%s+%lu", name, 651 pr_warning("Failed to get entry pc of %s\n",
416 (unsigned long)(pf->addr - eaddr)); 652 dwarf_diename(sp_die));
417 /* Copy the function name if possible */ 653 return -ENOENT;
418 if (!pp->function) {
419 pp->function = strdup(name);
420 pp->offset = (size_t)(pf->addr - eaddr);
421 } 654 }
422 } else { 655 tev->point.symbol = strdup(name);
656 if (tev->point.symbol == NULL)
657 return -ENOMEM;
658 tev->point.offset = (unsigned long)(pf->addr - eaddr);
659 } else
423 /* This function has no name. */ 660 /* This function has no name. */
424 ret = snprintf(tmp, MAX_PROBE_BUFFER, "0x%jx", 661 tev->point.offset = (unsigned long)pf->addr;
425 (uintmax_t)pf->addr); 662
426 if (!pp->function) { 663 pr_debug("Probe point found: %s+%lu\n", tev->point.symbol,
427 /* TODO: Use _stext */ 664 tev->point.offset);
428 pp->function = strdup("");
429 pp->offset = (size_t)pf->addr;
430 }
431 }
432 DIE_IF(ret < 0);
433 DIE_IF(ret >= MAX_PROBE_BUFFER);
434 len = ret;
435 pr_debug("Probe point found: %s\n", tmp);
436 665
437 /* Get the frame base attribute/ops */ 666 /* Get the frame base attribute/ops */
438 dwarf_attr(sp_die, DW_AT_frame_base, &fb_attr); 667 dwarf_attr(sp_die, DW_AT_frame_base, &fb_attr);
439 ret = dwarf_getlocation_addr(&fb_attr, pf->addr, &pf->fb_ops, &nops, 1); 668 ret = dwarf_getlocation_addr(&fb_attr, pf->addr, &pf->fb_ops, &nops, 1);
440 if (ret <= 0 || nops == 0) 669 if (ret <= 0 || nops == 0) {
441 pf->fb_ops = NULL; 670 pf->fb_ops = NULL;
671 } else if (nops == 1 && pf->fb_ops[0].atom == DW_OP_call_frame_cfa &&
672 pf->cfi != NULL) {
673 Dwarf_Frame *frame;
674 if (dwarf_cfi_addrframe(pf->cfi, pf->addr, &frame) != 0 ||
675 dwarf_frame_cfa(frame, &pf->fb_ops, &nops) != 0) {
676 pr_warning("Failed to get CFA on 0x%jx\n",
677 (uintmax_t)pf->addr);
678 return -ENOENT;
679 }
680 }
442 681
443 /* Find each argument */ 682 /* Find each argument */
444 /* TODO: use dwarf_cfi_addrframe */ 683 tev->nargs = pf->pev->nargs;
445 for (i = 0; i < pp->nr_args; i++) { 684 tev->args = zalloc(sizeof(struct kprobe_trace_arg) * tev->nargs);
446 pf->var = pp->args[i]; 685 if (tev->args == NULL)
447 pf->buf = &tmp[len]; 686 return -ENOMEM;
448 pf->len = MAX_PROBE_BUFFER - len; 687 for (i = 0; i < pf->pev->nargs; i++) {
449 find_variable(sp_die, pf); 688 pf->pvar = &pf->pev->args[i];
450 len += strlen(pf->buf); 689 pf->tvar = &tev->args[i];
690 ret = find_variable(sp_die, pf);
691 if (ret != 0)
692 return ret;
451 } 693 }
452 694
453 /* *pf->fb_ops will be cached in libdw. Don't free it. */ 695 /* *pf->fb_ops will be cached in libdw. Don't free it. */
454 pf->fb_ops = NULL; 696 pf->fb_ops = NULL;
455 697 return 0;
456 if (pp->found == MAX_PROBES)
457 die("Too many( > %d) probe point found.\n", MAX_PROBES);
458
459 pp->probes[pp->found] = strdup(tmp);
460 pp->found++;
461} 698}
462 699
463/* Find probe point from its line number */ 700/* Find probe point from its line number */
464static void find_probe_point_by_line(struct probe_finder *pf) 701static int find_probe_point_by_line(struct probe_finder *pf)
465{ 702{
466 Dwarf_Lines *lines; 703 Dwarf_Lines *lines;
467 Dwarf_Line *line; 704 Dwarf_Line *line;
468 size_t nlines, i; 705 size_t nlines, i;
469 Dwarf_Addr addr; 706 Dwarf_Addr addr;
470 int lineno; 707 int lineno;
471 int ret; 708 int ret = 0;
472 709
473 ret = dwarf_getsrclines(&pf->cu_die, &lines, &nlines); 710 if (dwarf_getsrclines(&pf->cu_die, &lines, &nlines) != 0) {
474 DIE_IF(ret != 0); 711 pr_warning("No source lines found in this CU.\n");
712 return -ENOENT;
713 }
475 714
476 for (i = 0; i < nlines; i++) { 715 for (i = 0; i < nlines && ret == 0; i++) {
477 line = dwarf_onesrcline(lines, i); 716 line = dwarf_onesrcline(lines, i);
478 dwarf_lineno(line, &lineno); 717 if (dwarf_lineno(line, &lineno) != 0 ||
479 if (lineno != pf->lno) 718 lineno != pf->lno)
480 continue; 719 continue;
481 720
482 /* TODO: Get fileno from line, but how? */ 721 /* TODO: Get fileno from line, but how? */
483 if (strtailcmp(dwarf_linesrc(line, NULL, NULL), pf->fname) != 0) 722 if (strtailcmp(dwarf_linesrc(line, NULL, NULL), pf->fname) != 0)
484 continue; 723 continue;
485 724
486 ret = dwarf_lineaddr(line, &addr); 725 if (dwarf_lineaddr(line, &addr) != 0) {
487 DIE_IF(ret != 0); 726 pr_warning("Failed to get the address of the line.\n");
727 return -ENOENT;
728 }
488 pr_debug("Probe line found: line[%d]:%d addr:0x%jx\n", 729 pr_debug("Probe line found: line[%d]:%d addr:0x%jx\n",
489 (int)i, lineno, (uintmax_t)addr); 730 (int)i, lineno, (uintmax_t)addr);
490 pf->addr = addr; 731 pf->addr = addr;
491 732
492 show_probe_point(NULL, pf); 733 ret = convert_probe_point(NULL, pf);
493 /* Continuing, because target line might be inlined. */ 734 /* Continuing, because target line might be inlined. */
494 } 735 }
736 return ret;
495} 737}
496 738
497/* Find lines which match lazy pattern */ 739/* Find lines which match lazy pattern */
@@ -499,16 +741,27 @@ static int find_lazy_match_lines(struct list_head *head,
499 const char *fname, const char *pat) 741 const char *fname, const char *pat)
500{ 742{
501 char *fbuf, *p1, *p2; 743 char *fbuf, *p1, *p2;
502 int fd, line, nlines = 0; 744 int fd, ret, line, nlines = 0;
503 struct stat st; 745 struct stat st;
504 746
505 fd = open(fname, O_RDONLY); 747 fd = open(fname, O_RDONLY);
506 if (fd < 0) 748 if (fd < 0) {
507 die("failed to open %s", fname); 749 pr_warning("Failed to open %s: %s\n", fname, strerror(-fd));
508 DIE_IF(fstat(fd, &st) < 0); 750 return fd;
509 fbuf = malloc(st.st_size + 2); 751 }
510 DIE_IF(fbuf == NULL); 752
511 DIE_IF(read(fd, fbuf, st.st_size) < 0); 753 ret = fstat(fd, &st);
754 if (ret < 0) {
755 pr_warning("Failed to get the size of %s: %s\n",
756 fname, strerror(errno));
757 return ret;
758 }
759 fbuf = xmalloc(st.st_size + 2);
760 ret = read(fd, fbuf, st.st_size);
761 if (ret < 0) {
762 pr_warning("Failed to read %s: %s\n", fname, strerror(errno));
763 return ret;
764 }
512 close(fd); 765 close(fd);
513 fbuf[st.st_size] = '\n'; /* Dummy line */ 766 fbuf[st.st_size] = '\n'; /* Dummy line */
514 fbuf[st.st_size + 1] = '\0'; 767 fbuf[st.st_size + 1] = '\0';
@@ -528,7 +781,7 @@ static int find_lazy_match_lines(struct list_head *head,
528} 781}
529 782
530/* Find probe points from lazy pattern */ 783/* Find probe points from lazy pattern */
531static void find_probe_point_lazy(Dwarf_Die *sp_die, struct probe_finder *pf) 784static int find_probe_point_lazy(Dwarf_Die *sp_die, struct probe_finder *pf)
532{ 785{
533 Dwarf_Lines *lines; 786 Dwarf_Lines *lines;
534 Dwarf_Line *line; 787 Dwarf_Line *line;
@@ -536,37 +789,46 @@ static void find_probe_point_lazy(Dwarf_Die *sp_die, struct probe_finder *pf)
536 Dwarf_Addr addr; 789 Dwarf_Addr addr;
537 Dwarf_Die die_mem; 790 Dwarf_Die die_mem;
538 int lineno; 791 int lineno;
539 int ret; 792 int ret = 0;
540 793
541 if (list_empty(&pf->lcache)) { 794 if (list_empty(&pf->lcache)) {
542 /* Matching lazy line pattern */ 795 /* Matching lazy line pattern */
543 ret = find_lazy_match_lines(&pf->lcache, pf->fname, 796 ret = find_lazy_match_lines(&pf->lcache, pf->fname,
544 pf->pp->lazy_line); 797 pf->pev->point.lazy_line);
545 if (ret <= 0) 798 if (ret == 0) {
546 die("No matched lines found in %s.", pf->fname); 799 pr_debug("No matched lines found in %s.\n", pf->fname);
800 return 0;
801 } else if (ret < 0)
802 return ret;
547 } 803 }
548 804
549 ret = dwarf_getsrclines(&pf->cu_die, &lines, &nlines); 805 if (dwarf_getsrclines(&pf->cu_die, &lines, &nlines) != 0) {
550 DIE_IF(ret != 0); 806 pr_warning("No source lines found in this CU.\n");
551 for (i = 0; i < nlines; i++) { 807 return -ENOENT;
808 }
809
810 for (i = 0; i < nlines && ret >= 0; i++) {
552 line = dwarf_onesrcline(lines, i); 811 line = dwarf_onesrcline(lines, i);
553 812
554 dwarf_lineno(line, &lineno); 813 if (dwarf_lineno(line, &lineno) != 0 ||
555 if (!line_list__has_line(&pf->lcache, lineno)) 814 !line_list__has_line(&pf->lcache, lineno))
556 continue; 815 continue;
557 816
558 /* TODO: Get fileno from line, but how? */ 817 /* TODO: Get fileno from line, but how? */
559 if (strtailcmp(dwarf_linesrc(line, NULL, NULL), pf->fname) != 0) 818 if (strtailcmp(dwarf_linesrc(line, NULL, NULL), pf->fname) != 0)
560 continue; 819 continue;
561 820
562 ret = dwarf_lineaddr(line, &addr); 821 if (dwarf_lineaddr(line, &addr) != 0) {
563 DIE_IF(ret != 0); 822 pr_debug("Failed to get the address of line %d.\n",
823 lineno);
824 continue;
825 }
564 if (sp_die) { 826 if (sp_die) {
565 /* Address filtering 1: does sp_die include addr? */ 827 /* Address filtering 1: does sp_die include addr? */
566 if (!dwarf_haspc(sp_die, addr)) 828 if (!dwarf_haspc(sp_die, addr))
567 continue; 829 continue;
568 /* Address filtering 2: No child include addr? */ 830 /* Address filtering 2: No child include addr? */
569 if (die_get_inlinefunc(sp_die, addr, &die_mem)) 831 if (die_find_inlinefunc(sp_die, addr, &die_mem))
570 continue; 832 continue;
571 } 833 }
572 834
@@ -574,27 +836,44 @@ static void find_probe_point_lazy(Dwarf_Die *sp_die, struct probe_finder *pf)
574 (int)i, lineno, (unsigned long long)addr); 836 (int)i, lineno, (unsigned long long)addr);
575 pf->addr = addr; 837 pf->addr = addr;
576 838
577 show_probe_point(sp_die, pf); 839 ret = convert_probe_point(sp_die, pf);
578 /* Continuing, because target line might be inlined. */ 840 /* Continuing, because target line might be inlined. */
579 } 841 }
580 /* TODO: deallocate lines, but how? */ 842 /* TODO: deallocate lines, but how? */
843 return ret;
581} 844}
582 845
846/* Callback parameter with return value */
847struct dwarf_callback_param {
848 void *data;
849 int retval;
850};
851
583static int probe_point_inline_cb(Dwarf_Die *in_die, void *data) 852static int probe_point_inline_cb(Dwarf_Die *in_die, void *data)
584{ 853{
585 struct probe_finder *pf = (struct probe_finder *)data; 854 struct dwarf_callback_param *param = data;
586 struct probe_point *pp = pf->pp; 855 struct probe_finder *pf = param->data;
856 struct perf_probe_point *pp = &pf->pev->point;
857 Dwarf_Addr addr;
587 858
588 if (pp->lazy_line) 859 if (pp->lazy_line)
589 find_probe_point_lazy(in_die, pf); 860 param->retval = find_probe_point_lazy(in_die, pf);
590 else { 861 else {
591 /* Get probe address */ 862 /* Get probe address */
592 pf->addr = die_get_entrypc(in_die); 863 if (dwarf_entrypc(in_die, &addr) != 0) {
864 pr_warning("Failed to get entry pc of %s.\n",
865 dwarf_diename(in_die));
866 param->retval = -ENOENT;
867 return DWARF_CB_ABORT;
868 }
869 pf->addr = addr;
593 pf->addr += pp->offset; 870 pf->addr += pp->offset;
594 pr_debug("found inline addr: 0x%jx\n", 871 pr_debug("found inline addr: 0x%jx\n",
595 (uintmax_t)pf->addr); 872 (uintmax_t)pf->addr);
596 873
597 show_probe_point(in_die, pf); 874 param->retval = convert_probe_point(in_die, pf);
875 if (param->retval < 0)
876 return DWARF_CB_ABORT;
598 } 877 }
599 878
600 return DWARF_CB_OK; 879 return DWARF_CB_OK;
@@ -603,59 +882,88 @@ static int probe_point_inline_cb(Dwarf_Die *in_die, void *data)
603/* Search function from function name */ 882/* Search function from function name */
604static int probe_point_search_cb(Dwarf_Die *sp_die, void *data) 883static int probe_point_search_cb(Dwarf_Die *sp_die, void *data)
605{ 884{
606 struct probe_finder *pf = (struct probe_finder *)data; 885 struct dwarf_callback_param *param = data;
607 struct probe_point *pp = pf->pp; 886 struct probe_finder *pf = param->data;
887 struct perf_probe_point *pp = &pf->pev->point;
608 888
609 /* Check tag and diename */ 889 /* Check tag and diename */
610 if (dwarf_tag(sp_die) != DW_TAG_subprogram || 890 if (dwarf_tag(sp_die) != DW_TAG_subprogram ||
611 die_compare_name(sp_die, pp->function) != 0) 891 die_compare_name(sp_die, pp->function) != 0)
612 return 0; 892 return DWARF_CB_OK;
613 893
614 pf->fname = dwarf_decl_file(sp_die); 894 pf->fname = dwarf_decl_file(sp_die);
615 if (pp->line) { /* Function relative line */ 895 if (pp->line) { /* Function relative line */
616 dwarf_decl_line(sp_die, &pf->lno); 896 dwarf_decl_line(sp_die, &pf->lno);
617 pf->lno += pp->line; 897 pf->lno += pp->line;
618 find_probe_point_by_line(pf); 898 param->retval = find_probe_point_by_line(pf);
619 } else if (!dwarf_func_inline(sp_die)) { 899 } else if (!dwarf_func_inline(sp_die)) {
620 /* Real function */ 900 /* Real function */
621 if (pp->lazy_line) 901 if (pp->lazy_line)
622 find_probe_point_lazy(sp_die, pf); 902 param->retval = find_probe_point_lazy(sp_die, pf);
623 else { 903 else {
624 pf->addr = die_get_entrypc(sp_die); 904 if (dwarf_entrypc(sp_die, &pf->addr) != 0) {
905 pr_warning("Failed to get entry pc of %s.\n",
906 dwarf_diename(sp_die));
907 param->retval = -ENOENT;
908 return DWARF_CB_ABORT;
909 }
625 pf->addr += pp->offset; 910 pf->addr += pp->offset;
626 /* TODO: Check the address in this function */ 911 /* TODO: Check the address in this function */
627 show_probe_point(sp_die, pf); 912 param->retval = convert_probe_point(sp_die, pf);
628 } 913 }
629 } else 914 } else {
915 struct dwarf_callback_param _param = {.data = (void *)pf,
916 .retval = 0};
630 /* Inlined function: search instances */ 917 /* Inlined function: search instances */
631 dwarf_func_inline_instances(sp_die, probe_point_inline_cb, pf); 918 dwarf_func_inline_instances(sp_die, probe_point_inline_cb,
919 &_param);
920 param->retval = _param.retval;
921 }
632 922
633 return 1; /* Exit; no same symbol in this CU. */ 923 return DWARF_CB_ABORT; /* Exit; no same symbol in this CU. */
634} 924}
635 925
636static void find_probe_point_by_func(struct probe_finder *pf) 926static int find_probe_point_by_func(struct probe_finder *pf)
637{ 927{
638 dwarf_getfuncs(&pf->cu_die, probe_point_search_cb, pf, 0); 928 struct dwarf_callback_param _param = {.data = (void *)pf,
929 .retval = 0};
930 dwarf_getfuncs(&pf->cu_die, probe_point_search_cb, &_param, 0);
931 return _param.retval;
639} 932}
640 933
641/* Find a probe point */ 934/* Find kprobe_trace_events specified by perf_probe_event from debuginfo */
642int find_probe_point(int fd, struct probe_point *pp) 935int find_kprobe_trace_events(int fd, struct perf_probe_event *pev,
936 struct kprobe_trace_event **tevs, int max_tevs)
643{ 937{
644 struct probe_finder pf = {.pp = pp}; 938 struct probe_finder pf = {.pev = pev, .max_tevs = max_tevs};
939 struct perf_probe_point *pp = &pev->point;
645 Dwarf_Off off, noff; 940 Dwarf_Off off, noff;
646 size_t cuhl; 941 size_t cuhl;
647 Dwarf_Die *diep; 942 Dwarf_Die *diep;
648 Dwarf *dbg; 943 Dwarf *dbg;
944 int ret = 0;
945
946 pf.tevs = zalloc(sizeof(struct kprobe_trace_event) * max_tevs);
947 if (pf.tevs == NULL)
948 return -ENOMEM;
949 *tevs = pf.tevs;
950 pf.ntevs = 0;
649 951
650 dbg = dwarf_begin(fd, DWARF_C_READ); 952 dbg = dwarf_begin(fd, DWARF_C_READ);
651 if (!dbg) 953 if (!dbg) {
652 return -ENOENT; 954 pr_warning("No dwarf info found in the vmlinux - "
955 "please rebuild with CONFIG_DEBUG_INFO=y.\n");
956 return -EBADF;
957 }
958
959 /* Get the call frame information from this dwarf */
960 pf.cfi = dwarf_getcfi(dbg);
653 961
654 pp->found = 0;
655 off = 0; 962 off = 0;
656 line_list__init(&pf.lcache); 963 line_list__init(&pf.lcache);
657 /* Loop on CUs (Compilation Unit) */ 964 /* Loop on CUs (Compilation Unit) */
658 while (!dwarf_nextcu(dbg, off, &noff, &cuhl, NULL, NULL, NULL)) { 965 while (!dwarf_nextcu(dbg, off, &noff, &cuhl, NULL, NULL, NULL) &&
966 ret >= 0) {
659 /* Get the DIE(Debugging Information Entry) of this CU */ 967 /* Get the DIE(Debugging Information Entry) of this CU */
660 diep = dwarf_offdie(dbg, off + cuhl, &pf.cu_die); 968 diep = dwarf_offdie(dbg, off + cuhl, &pf.cu_die);
661 if (!diep) 969 if (!diep)
@@ -669,12 +977,12 @@ int find_probe_point(int fd, struct probe_point *pp)
669 977
670 if (!pp->file || pf.fname) { 978 if (!pp->file || pf.fname) {
671 if (pp->function) 979 if (pp->function)
672 find_probe_point_by_func(&pf); 980 ret = find_probe_point_by_func(&pf);
673 else if (pp->lazy_line) 981 else if (pp->lazy_line)
674 find_probe_point_lazy(NULL, &pf); 982 ret = find_probe_point_lazy(NULL, &pf);
675 else { 983 else {
676 pf.lno = pp->line; 984 pf.lno = pp->line;
677 find_probe_point_by_line(&pf); 985 ret = find_probe_point_by_line(&pf);
678 } 986 }
679 } 987 }
680 off = noff; 988 off = noff;
@@ -682,41 +990,169 @@ int find_probe_point(int fd, struct probe_point *pp)
682 line_list__free(&pf.lcache); 990 line_list__free(&pf.lcache);
683 dwarf_end(dbg); 991 dwarf_end(dbg);
684 992
685 return pp->found; 993 return (ret < 0) ? ret : pf.ntevs;
994}
995
996/* Reverse search */
997int find_perf_probe_point(int fd, unsigned long addr,
998 struct perf_probe_point *ppt)
999{
1000 Dwarf_Die cudie, spdie, indie;
1001 Dwarf *dbg;
1002 Dwarf_Line *line;
1003 Dwarf_Addr laddr, eaddr;
1004 const char *tmp;
1005 int lineno, ret = 0;
1006 bool found = false;
1007
1008 dbg = dwarf_begin(fd, DWARF_C_READ);
1009 if (!dbg)
1010 return -EBADF;
1011
1012 /* Find cu die */
1013 if (!dwarf_addrdie(dbg, (Dwarf_Addr)addr, &cudie)) {
1014 ret = -EINVAL;
1015 goto end;
1016 }
1017
1018 /* Find a corresponding line */
1019 line = dwarf_getsrc_die(&cudie, (Dwarf_Addr)addr);
1020 if (line) {
1021 if (dwarf_lineaddr(line, &laddr) == 0 &&
1022 (Dwarf_Addr)addr == laddr &&
1023 dwarf_lineno(line, &lineno) == 0) {
1024 tmp = dwarf_linesrc(line, NULL, NULL);
1025 if (tmp) {
1026 ppt->line = lineno;
1027 ppt->file = strdup(tmp);
1028 if (ppt->file == NULL) {
1029 ret = -ENOMEM;
1030 goto end;
1031 }
1032 found = true;
1033 }
1034 }
1035 }
1036
1037 /* Find a corresponding function */
1038 if (die_find_real_subprogram(&cudie, (Dwarf_Addr)addr, &spdie)) {
1039 tmp = dwarf_diename(&spdie);
1040 if (!tmp || dwarf_entrypc(&spdie, &eaddr) != 0)
1041 goto end;
1042
1043 if (ppt->line) {
1044 if (die_find_inlinefunc(&spdie, (Dwarf_Addr)addr,
1045 &indie)) {
1046 /* addr in an inline function */
1047 tmp = dwarf_diename(&indie);
1048 if (!tmp)
1049 goto end;
1050 ret = dwarf_decl_line(&indie, &lineno);
1051 } else {
1052 if (eaddr == addr) { /* Function entry */
1053 lineno = ppt->line;
1054 ret = 0;
1055 } else
1056 ret = dwarf_decl_line(&spdie, &lineno);
1057 }
1058 if (ret == 0) {
1059 /* Make a relative line number */
1060 ppt->line -= lineno;
1061 goto found;
1062 }
1063 }
1064 /* We don't have a line number, let's use offset */
1065 ppt->offset = addr - (unsigned long)eaddr;
1066found:
1067 ppt->function = strdup(tmp);
1068 if (ppt->function == NULL) {
1069 ret = -ENOMEM;
1070 goto end;
1071 }
1072 found = true;
1073 }
1074
1075end:
1076 dwarf_end(dbg);
1077 if (ret >= 0)
1078 ret = found ? 1 : 0;
1079 return ret;
1080}
1081
1082/* Add a line and store the src path */
1083static int line_range_add_line(const char *src, unsigned int lineno,
1084 struct line_range *lr)
1085{
1086 /* Copy real path */
1087 if (!lr->path) {
1088 lr->path = strdup(src);
1089 if (lr->path == NULL)
1090 return -ENOMEM;
1091 }
1092 return line_list__add_line(&lr->line_list, lineno);
1093}
1094
1095/* Search function declaration lines */
1096static int line_range_funcdecl_cb(Dwarf_Die *sp_die, void *data)
1097{
1098 struct dwarf_callback_param *param = data;
1099 struct line_finder *lf = param->data;
1100 const char *src;
1101 int lineno;
1102
1103 src = dwarf_decl_file(sp_die);
1104 if (src && strtailcmp(src, lf->fname) != 0)
1105 return DWARF_CB_OK;
1106
1107 if (dwarf_decl_line(sp_die, &lineno) != 0 ||
1108 (lf->lno_s > lineno || lf->lno_e < lineno))
1109 return DWARF_CB_OK;
1110
1111 param->retval = line_range_add_line(src, lineno, lf->lr);
1112 if (param->retval < 0)
1113 return DWARF_CB_ABORT;
1114 return DWARF_CB_OK;
1115}
1116
1117static int find_line_range_func_decl_lines(struct line_finder *lf)
1118{
1119 struct dwarf_callback_param param = {.data = (void *)lf, .retval = 0};
1120 dwarf_getfuncs(&lf->cu_die, line_range_funcdecl_cb, &param, 0);
1121 return param.retval;
686} 1122}
687 1123
688/* Find line range from its line number */ 1124/* Find line range from its line number */
689static void find_line_range_by_line(Dwarf_Die *sp_die, struct line_finder *lf) 1125static int find_line_range_by_line(Dwarf_Die *sp_die, struct line_finder *lf)
690{ 1126{
691 Dwarf_Lines *lines; 1127 Dwarf_Lines *lines;
692 Dwarf_Line *line; 1128 Dwarf_Line *line;
693 size_t nlines, i; 1129 size_t nlines, i;
694 Dwarf_Addr addr; 1130 Dwarf_Addr addr;
695 int lineno; 1131 int lineno, ret = 0;
696 int ret;
697 const char *src; 1132 const char *src;
698 Dwarf_Die die_mem; 1133 Dwarf_Die die_mem;
699 1134
700 line_list__init(&lf->lr->line_list); 1135 line_list__init(&lf->lr->line_list);
701 ret = dwarf_getsrclines(&lf->cu_die, &lines, &nlines); 1136 if (dwarf_getsrclines(&lf->cu_die, &lines, &nlines) != 0) {
702 DIE_IF(ret != 0); 1137 pr_warning("No source lines found in this CU.\n");
1138 return -ENOENT;
1139 }
703 1140
1141 /* Search probable lines on lines list */
704 for (i = 0; i < nlines; i++) { 1142 for (i = 0; i < nlines; i++) {
705 line = dwarf_onesrcline(lines, i); 1143 line = dwarf_onesrcline(lines, i);
706 ret = dwarf_lineno(line, &lineno); 1144 if (dwarf_lineno(line, &lineno) != 0 ||
707 DIE_IF(ret != 0); 1145 (lf->lno_s > lineno || lf->lno_e < lineno))
708 if (lf->lno_s > lineno || lf->lno_e < lineno)
709 continue; 1146 continue;
710 1147
711 if (sp_die) { 1148 if (sp_die) {
712 /* Address filtering 1: does sp_die include addr? */ 1149 /* Address filtering 1: does sp_die include addr? */
713 ret = dwarf_lineaddr(line, &addr); 1150 if (dwarf_lineaddr(line, &addr) != 0 ||
714 DIE_IF(ret != 0); 1151 !dwarf_haspc(sp_die, addr))
715 if (!dwarf_haspc(sp_die, addr))
716 continue; 1152 continue;
717 1153
718 /* Address filtering 2: No child include addr? */ 1154 /* Address filtering 2: No child include addr? */
719 if (die_get_inlinefunc(sp_die, addr, &die_mem)) 1155 if (die_find_inlinefunc(sp_die, addr, &die_mem))
720 continue; 1156 continue;
721 } 1157 }
722 1158
@@ -725,30 +1161,49 @@ static void find_line_range_by_line(Dwarf_Die *sp_die, struct line_finder *lf)
725 if (strtailcmp(src, lf->fname) != 0) 1161 if (strtailcmp(src, lf->fname) != 0)
726 continue; 1162 continue;
727 1163
728 /* Copy real path */ 1164 ret = line_range_add_line(src, lineno, lf->lr);
729 if (!lf->lr->path) 1165 if (ret < 0)
730 lf->lr->path = strdup(src); 1166 return ret;
731 line_list__add_line(&lf->lr->line_list, (unsigned int)lineno);
732 } 1167 }
1168
1169 /*
1170 * Dwarf lines doesn't include function declarations. We have to
1171 * check functions list or given function.
1172 */
1173 if (sp_die) {
1174 src = dwarf_decl_file(sp_die);
1175 if (src && dwarf_decl_line(sp_die, &lineno) == 0 &&
1176 (lf->lno_s <= lineno && lf->lno_e >= lineno))
1177 ret = line_range_add_line(src, lineno, lf->lr);
1178 } else
1179 ret = find_line_range_func_decl_lines(lf);
1180
733 /* Update status */ 1181 /* Update status */
734 if (!list_empty(&lf->lr->line_list)) 1182 if (ret >= 0)
735 lf->found = 1; 1183 if (!list_empty(&lf->lr->line_list))
1184 ret = lf->found = 1;
1185 else
1186 ret = 0; /* Lines are not found */
736 else { 1187 else {
737 free(lf->lr->path); 1188 free(lf->lr->path);
738 lf->lr->path = NULL; 1189 lf->lr->path = NULL;
739 } 1190 }
1191 return ret;
740} 1192}
741 1193
742static int line_range_inline_cb(Dwarf_Die *in_die, void *data) 1194static int line_range_inline_cb(Dwarf_Die *in_die, void *data)
743{ 1195{
744 find_line_range_by_line(in_die, (struct line_finder *)data); 1196 struct dwarf_callback_param *param = data;
1197
1198 param->retval = find_line_range_by_line(in_die, param->data);
745 return DWARF_CB_ABORT; /* No need to find other instances */ 1199 return DWARF_CB_ABORT; /* No need to find other instances */
746} 1200}
747 1201
748/* Search function from function name */ 1202/* Search function from function name */
749static int line_range_search_cb(Dwarf_Die *sp_die, void *data) 1203static int line_range_search_cb(Dwarf_Die *sp_die, void *data)
750{ 1204{
751 struct line_finder *lf = (struct line_finder *)data; 1205 struct dwarf_callback_param *param = data;
1206 struct line_finder *lf = param->data;
752 struct line_range *lr = lf->lr; 1207 struct line_range *lr = lf->lr;
753 1208
754 if (dwarf_tag(sp_die) == DW_TAG_subprogram && 1209 if (dwarf_tag(sp_die) == DW_TAG_subprogram &&
@@ -757,44 +1212,55 @@ static int line_range_search_cb(Dwarf_Die *sp_die, void *data)
757 dwarf_decl_line(sp_die, &lr->offset); 1212 dwarf_decl_line(sp_die, &lr->offset);
758 pr_debug("fname: %s, lineno:%d\n", lf->fname, lr->offset); 1213 pr_debug("fname: %s, lineno:%d\n", lf->fname, lr->offset);
759 lf->lno_s = lr->offset + lr->start; 1214 lf->lno_s = lr->offset + lr->start;
760 if (!lr->end) 1215 if (lf->lno_s < 0) /* Overflow */
1216 lf->lno_s = INT_MAX;
1217 lf->lno_e = lr->offset + lr->end;
1218 if (lf->lno_e < 0) /* Overflow */
761 lf->lno_e = INT_MAX; 1219 lf->lno_e = INT_MAX;
762 else 1220 pr_debug("New line range: %d to %d\n", lf->lno_s, lf->lno_e);
763 lf->lno_e = lr->offset + lr->end;
764 lr->start = lf->lno_s; 1221 lr->start = lf->lno_s;
765 lr->end = lf->lno_e; 1222 lr->end = lf->lno_e;
766 if (dwarf_func_inline(sp_die)) 1223 if (dwarf_func_inline(sp_die)) {
1224 struct dwarf_callback_param _param;
1225 _param.data = (void *)lf;
1226 _param.retval = 0;
767 dwarf_func_inline_instances(sp_die, 1227 dwarf_func_inline_instances(sp_die,
768 line_range_inline_cb, lf); 1228 line_range_inline_cb,
769 else 1229 &_param);
770 find_line_range_by_line(sp_die, lf); 1230 param->retval = _param.retval;
771 return 1; 1231 } else
1232 param->retval = find_line_range_by_line(sp_die, lf);
1233 return DWARF_CB_ABORT;
772 } 1234 }
773 return 0; 1235 return DWARF_CB_OK;
774} 1236}
775 1237
776static void find_line_range_by_func(struct line_finder *lf) 1238static int find_line_range_by_func(struct line_finder *lf)
777{ 1239{
778 dwarf_getfuncs(&lf->cu_die, line_range_search_cb, lf, 0); 1240 struct dwarf_callback_param param = {.data = (void *)lf, .retval = 0};
1241 dwarf_getfuncs(&lf->cu_die, line_range_search_cb, &param, 0);
1242 return param.retval;
779} 1243}
780 1244
781int find_line_range(int fd, struct line_range *lr) 1245int find_line_range(int fd, struct line_range *lr)
782{ 1246{
783 struct line_finder lf = {.lr = lr, .found = 0}; 1247 struct line_finder lf = {.lr = lr, .found = 0};
784 int ret; 1248 int ret = 0;
785 Dwarf_Off off = 0, noff; 1249 Dwarf_Off off = 0, noff;
786 size_t cuhl; 1250 size_t cuhl;
787 Dwarf_Die *diep; 1251 Dwarf_Die *diep;
788 Dwarf *dbg; 1252 Dwarf *dbg;
789 1253
790 dbg = dwarf_begin(fd, DWARF_C_READ); 1254 dbg = dwarf_begin(fd, DWARF_C_READ);
791 if (!dbg) 1255 if (!dbg) {
792 return -ENOENT; 1256 pr_warning("No dwarf info found in the vmlinux - "
1257 "please rebuild with CONFIG_DEBUG_INFO=y.\n");
1258 return -EBADF;
1259 }
793 1260
794 /* Loop on CUs (Compilation Unit) */ 1261 /* Loop on CUs (Compilation Unit) */
795 while (!lf.found) { 1262 while (!lf.found && ret >= 0) {
796 ret = dwarf_nextcu(dbg, off, &noff, &cuhl, NULL, NULL, NULL); 1263 if (dwarf_nextcu(dbg, off, &noff, &cuhl, NULL, NULL, NULL) != 0)
797 if (ret != 0)
798 break; 1264 break;
799 1265
800 /* Get the DIE(Debugging Information Entry) of this CU */ 1266 /* Get the DIE(Debugging Information Entry) of this CU */
@@ -810,20 +1276,18 @@ int find_line_range(int fd, struct line_range *lr)
810 1276
811 if (!lr->file || lf.fname) { 1277 if (!lr->file || lf.fname) {
812 if (lr->function) 1278 if (lr->function)
813 find_line_range_by_func(&lf); 1279 ret = find_line_range_by_func(&lf);
814 else { 1280 else {
815 lf.lno_s = lr->start; 1281 lf.lno_s = lr->start;
816 if (!lr->end) 1282 lf.lno_e = lr->end;
817 lf.lno_e = INT_MAX; 1283 ret = find_line_range_by_line(NULL, &lf);
818 else
819 lf.lno_e = lr->end;
820 find_line_range_by_line(NULL, &lf);
821 } 1284 }
822 } 1285 }
823 off = noff; 1286 off = noff;
824 } 1287 }
825 pr_debug("path: %lx\n", (unsigned long)lr->path); 1288 pr_debug("path: %lx\n", (unsigned long)lr->path);
826 dwarf_end(dbg); 1289 dwarf_end(dbg);
827 return lf.found; 1290
1291 return (ret < 0) ? ret : lf.found;
828} 1292}
829 1293
diff --git a/tools/perf/util/probe-finder.h b/tools/perf/util/probe-finder.h
index 21f7354397b4..66f1980e3855 100644
--- a/tools/perf/util/probe-finder.h
+++ b/tools/perf/util/probe-finder.h
@@ -3,6 +3,7 @@
3 3
4#include <stdbool.h> 4#include <stdbool.h>
5#include "util.h" 5#include "util.h"
6#include "probe-event.h"
6 7
7#define MAX_PATH_LEN 256 8#define MAX_PATH_LEN 256
8#define MAX_PROBE_BUFFER 1024 9#define MAX_PROBE_BUFFER 1024
@@ -14,67 +15,39 @@ static inline int is_c_varname(const char *name)
14 return isalpha(name[0]) || name[0] == '_'; 15 return isalpha(name[0]) || name[0] == '_';
15} 16}
16 17
17struct probe_point { 18#ifdef DWARF_SUPPORT
18 char *event; /* Event name */ 19/* Find kprobe_trace_events specified by perf_probe_event from debuginfo */
19 char *group; /* Event group */ 20extern int find_kprobe_trace_events(int fd, struct perf_probe_event *pev,
21 struct kprobe_trace_event **tevs,
22 int max_tevs);
20 23
21 /* Inputs */ 24/* Find a perf_probe_point from debuginfo */
22 char *file; /* File name */ 25extern int find_perf_probe_point(int fd, unsigned long addr,
23 int line; /* Line number */ 26 struct perf_probe_point *ppt);
24 char *lazy_line; /* Lazy line pattern */
25 27
26 char *function; /* Function name */
27 int offset; /* Offset bytes */
28
29 int nr_args; /* Number of arguments */
30 char **args; /* Arguments */
31
32 int retprobe; /* Return probe */
33
34 /* Output */
35 int found; /* Number of found probe points */
36 char *probes[MAX_PROBES]; /* Output buffers (will be allocated)*/
37};
38
39/* Line number container */
40struct line_node {
41 struct list_head list;
42 unsigned int line;
43};
44
45/* Line range */
46struct line_range {
47 char *file; /* File name */
48 char *function; /* Function name */
49 unsigned int start; /* Start line number */
50 unsigned int end; /* End line number */
51 int offset; /* Start line offset */
52 char *path; /* Real path name */
53 struct list_head line_list; /* Visible lines */
54};
55
56#ifndef NO_DWARF_SUPPORT
57extern int find_probe_point(int fd, struct probe_point *pp);
58extern int find_line_range(int fd, struct line_range *lr); 28extern int find_line_range(int fd, struct line_range *lr);
59 29
60#include <dwarf.h> 30#include <dwarf.h>
61#include <libdw.h> 31#include <libdw.h>
62 32
63struct probe_finder { 33struct probe_finder {
64 struct probe_point *pp; /* Target probe point */ 34 struct perf_probe_event *pev; /* Target probe event */
35 struct kprobe_trace_event *tevs; /* Result trace events */
36 int ntevs; /* Number of trace events */
37 int max_tevs; /* Max number of trace events */
65 38
66 /* For function searching */ 39 /* For function searching */
67 Dwarf_Addr addr; /* Address */
68 const char *fname; /* File name */
69 int lno; /* Line number */ 40 int lno; /* Line number */
41 Dwarf_Addr addr; /* Address */
42 const char *fname; /* Real file name */
70 Dwarf_Die cu_die; /* Current CU */ 43 Dwarf_Die cu_die; /* Current CU */
44 struct list_head lcache; /* Line cache for lazy match */
71 45
72 /* For variable searching */ 46 /* For variable searching */
47 Dwarf_CFI *cfi; /* Call Frame Information */
73 Dwarf_Op *fb_ops; /* Frame base attribute */ 48 Dwarf_Op *fb_ops; /* Frame base attribute */
74 const char *var; /* Current variable name */ 49 struct perf_probe_arg *pvar; /* Current target variable */
75 char *buf; /* Current output buffer */ 50 struct kprobe_trace_arg *tvar; /* Current result variable */
76 int len; /* Length of output buffer */
77 struct list_head lcache; /* Line cache for lazy match */
78}; 51};
79 52
80struct line_finder { 53struct line_finder {
@@ -87,6 +60,6 @@ struct line_finder {
87 int found; 60 int found;
88}; 61};
89 62
90#endif /* NO_DWARF_SUPPORT */ 63#endif /* DWARF_SUPPORT */
91 64
92#endif /*_PROBE_FINDER_H */ 65#endif /*_PROBE_FINDER_H */
diff --git a/tools/perf/util/pstack.c b/tools/perf/util/pstack.c
new file mode 100644
index 000000000000..13d36faf64eb
--- /dev/null
+++ b/tools/perf/util/pstack.c
@@ -0,0 +1,75 @@
1/*
2 * Simple pointer stack
3 *
4 * (c) 2010 Arnaldo Carvalho de Melo <acme@redhat.com>
5 */
6
7#include "util.h"
8#include "pstack.h"
9#include <linux/kernel.h>
10#include <stdlib.h>
11
12struct pstack {
13 unsigned short top;
14 unsigned short max_nr_entries;
15 void *entries[0];
16};
17
18struct pstack *pstack__new(unsigned short max_nr_entries)
19{
20 struct pstack *self = zalloc((sizeof(*self) +
21 max_nr_entries * sizeof(void *)));
22 if (self != NULL)
23 self->max_nr_entries = max_nr_entries;
24 return self;
25}
26
27void pstack__delete(struct pstack *self)
28{
29 free(self);
30}
31
32bool pstack__empty(const struct pstack *self)
33{
34 return self->top == 0;
35}
36
37void pstack__remove(struct pstack *self, void *key)
38{
39 unsigned short i = self->top, last_index = self->top - 1;
40
41 while (i-- != 0) {
42 if (self->entries[i] == key) {
43 if (i < last_index)
44 memmove(self->entries + i,
45 self->entries + i + 1,
46 (last_index - i) * sizeof(void *));
47 --self->top;
48 return;
49 }
50 }
51 pr_err("%s: %p not on the pstack!\n", __func__, key);
52}
53
54void pstack__push(struct pstack *self, void *key)
55{
56 if (self->top == self->max_nr_entries) {
57 pr_err("%s: top=%d, overflow!\n", __func__, self->top);
58 return;
59 }
60 self->entries[self->top++] = key;
61}
62
63void *pstack__pop(struct pstack *self)
64{
65 void *ret;
66
67 if (self->top == 0) {
68 pr_err("%s: underflow!\n", __func__);
69 return NULL;
70 }
71
72 ret = self->entries[--self->top];
73 self->entries[self->top] = NULL;
74 return ret;
75}
diff --git a/tools/perf/util/pstack.h b/tools/perf/util/pstack.h
new file mode 100644
index 000000000000..5ad07023504b
--- /dev/null
+++ b/tools/perf/util/pstack.h
@@ -0,0 +1,12 @@
1#ifndef _PERF_PSTACK_
2#define _PERF_PSTACK_
3
4struct pstack;
5struct pstack *pstack__new(unsigned short max_nr_entries);
6void pstack__delete(struct pstack *self);
7bool pstack__empty(const struct pstack *self);
8void pstack__remove(struct pstack *self, void *key);
9void pstack__push(struct pstack *self, void *key);
10void *pstack__pop(struct pstack *self);
11
12#endif /* _PERF_PSTACK_ */
diff --git a/tools/perf/util/scripting-engines/trace-event-perl.c b/tools/perf/util/scripting-engines/trace-event-perl.c
index 5376378e0cfc..b059dc50cc2d 100644
--- a/tools/perf/util/scripting-engines/trace-event-perl.c
+++ b/tools/perf/util/scripting-engines/trace-event-perl.c
@@ -371,7 +371,6 @@ static int perl_start_script(const char *script, int argc, const char **argv)
371 run_start_sub(); 371 run_start_sub();
372 372
373 free(command_line); 373 free(command_line);
374 fprintf(stderr, "perf trace started with Perl script %s\n\n", script);
375 return 0; 374 return 0;
376error: 375error:
377 perl_free(my_perl); 376 perl_free(my_perl);
@@ -394,8 +393,6 @@ static int perl_stop_script(void)
394 perl_destruct(my_perl); 393 perl_destruct(my_perl);
395 perl_free(my_perl); 394 perl_free(my_perl);
396 395
397 fprintf(stderr, "\nperf trace Perl script stopped\n");
398
399 return 0; 396 return 0;
400} 397}
401 398
diff --git a/tools/perf/util/scripting-engines/trace-event-python.c b/tools/perf/util/scripting-engines/trace-event-python.c
index 6a72f14c5986..81f39cab3aaa 100644
--- a/tools/perf/util/scripting-engines/trace-event-python.c
+++ b/tools/perf/util/scripting-engines/trace-event-python.c
@@ -374,8 +374,6 @@ static int python_start_script(const char *script, int argc, const char **argv)
374 } 374 }
375 375
376 free(command_line); 376 free(command_line);
377 fprintf(stderr, "perf trace started with Python script %s\n\n",
378 script);
379 377
380 return err; 378 return err;
381error: 379error:
@@ -407,8 +405,6 @@ out:
407 Py_XDECREF(main_module); 405 Py_XDECREF(main_module);
408 Py_Finalize(); 406 Py_Finalize();
409 407
410 fprintf(stderr, "\nperf trace Python script stopped\n");
411
412 return err; 408 return err;
413} 409}
414 410
diff --git a/tools/perf/util/session.c b/tools/perf/util/session.c
index eed1cb889008..25bfca4f10f0 100644
--- a/tools/perf/util/session.c
+++ b/tools/perf/util/session.c
@@ -14,6 +14,16 @@ static int perf_session__open(struct perf_session *self, bool force)
14{ 14{
15 struct stat input_stat; 15 struct stat input_stat;
16 16
17 if (!strcmp(self->filename, "-")) {
18 self->fd_pipe = true;
19 self->fd = STDIN_FILENO;
20
21 if (perf_header__read(self, self->fd) < 0)
22 pr_err("incompatible file format");
23
24 return 0;
25 }
26
17 self->fd = open(self->filename, O_RDONLY); 27 self->fd = open(self->filename, O_RDONLY);
18 if (self->fd < 0) { 28 if (self->fd < 0) {
19 pr_err("failed to open file: %s", self->filename); 29 pr_err("failed to open file: %s", self->filename);
@@ -38,7 +48,7 @@ static int perf_session__open(struct perf_session *self, bool force)
38 goto out_close; 48 goto out_close;
39 } 49 }
40 50
41 if (perf_header__read(&self->header, self->fd) < 0) { 51 if (perf_header__read(self, self->fd) < 0) {
42 pr_err("incompatible file format"); 52 pr_err("incompatible file format");
43 goto out_close; 53 goto out_close;
44 } 54 }
@@ -52,12 +62,21 @@ out_close:
52 return -1; 62 return -1;
53} 63}
54 64
55static inline int perf_session__create_kernel_maps(struct perf_session *self) 65void perf_session__update_sample_type(struct perf_session *self)
66{
67 self->sample_type = perf_header__sample_type(&self->header);
68}
69
70int perf_session__create_kernel_maps(struct perf_session *self)
56{ 71{
57 return map_groups__create_kernel_maps(&self->kmaps, self->vmlinux_maps); 72 int ret = machine__create_kernel_maps(&self->host_machine);
73
74 if (ret >= 0)
75 ret = machines__create_guest_kernel_maps(&self->machines);
76 return ret;
58} 77}
59 78
60struct perf_session *perf_session__new(const char *filename, int mode, bool force) 79struct perf_session *perf_session__new(const char *filename, int mode, bool force, bool repipe)
61{ 80{
62 size_t len = filename ? strlen(filename) + 1 : 0; 81 size_t len = filename ? strlen(filename) + 1 : 0;
63 struct perf_session *self = zalloc(sizeof(*self) + len); 82 struct perf_session *self = zalloc(sizeof(*self) + len);
@@ -70,13 +89,15 @@ struct perf_session *perf_session__new(const char *filename, int mode, bool forc
70 89
71 memcpy(self->filename, filename, len); 90 memcpy(self->filename, filename, len);
72 self->threads = RB_ROOT; 91 self->threads = RB_ROOT;
73 self->stats_by_id = RB_ROOT; 92 self->hists_tree = RB_ROOT;
74 self->last_match = NULL; 93 self->last_match = NULL;
75 self->mmap_window = 32; 94 self->mmap_window = 32;
76 self->cwd = NULL; 95 self->cwd = NULL;
77 self->cwdlen = 0; 96 self->cwdlen = 0;
78 self->unknown_events = 0; 97 self->machines = RB_ROOT;
79 map_groups__init(&self->kmaps); 98 self->repipe = repipe;
99 INIT_LIST_HEAD(&self->ordered_samples.samples_head);
100 machine__init(&self->host_machine, "", HOST_KERNEL_ID);
80 101
81 if (mode == O_RDONLY) { 102 if (mode == O_RDONLY) {
82 if (perf_session__open(self, force) < 0) 103 if (perf_session__open(self, force) < 0)
@@ -90,7 +111,7 @@ struct perf_session *perf_session__new(const char *filename, int mode, bool forc
90 goto out_delete; 111 goto out_delete;
91 } 112 }
92 113
93 self->sample_type = perf_header__sample_type(&self->header); 114 perf_session__update_sample_type(self);
94out: 115out:
95 return self; 116 return self;
96out_free: 117out_free:
@@ -117,22 +138,17 @@ static bool symbol__match_parent_regex(struct symbol *sym)
117 return 0; 138 return 0;
118} 139}
119 140
120struct symbol **perf_session__resolve_callchain(struct perf_session *self, 141struct map_symbol *perf_session__resolve_callchain(struct perf_session *self,
121 struct thread *thread, 142 struct thread *thread,
122 struct ip_callchain *chain, 143 struct ip_callchain *chain,
123 struct symbol **parent) 144 struct symbol **parent)
124{ 145{
125 u8 cpumode = PERF_RECORD_MISC_USER; 146 u8 cpumode = PERF_RECORD_MISC_USER;
126 struct symbol **syms = NULL;
127 unsigned int i; 147 unsigned int i;
148 struct map_symbol *syms = calloc(chain->nr, sizeof(*syms));
128 149
129 if (symbol_conf.use_callchain) { 150 if (!syms)
130 syms = calloc(chain->nr, sizeof(*syms)); 151 return NULL;
131 if (!syms) {
132 fprintf(stderr, "Can't allocate memory for symbols\n");
133 exit(-1);
134 }
135 }
136 152
137 for (i = 0; i < chain->nr; i++) { 153 for (i = 0; i < chain->nr; i++) {
138 u64 ip = chain->ips[i]; 154 u64 ip = chain->ips[i];
@@ -152,15 +168,17 @@ struct symbol **perf_session__resolve_callchain(struct perf_session *self,
152 continue; 168 continue;
153 } 169 }
154 170
171 al.filtered = false;
155 thread__find_addr_location(thread, self, cpumode, 172 thread__find_addr_location(thread, self, cpumode,
156 MAP__FUNCTION, ip, &al, NULL); 173 MAP__FUNCTION, thread->pid, ip, &al, NULL);
157 if (al.sym != NULL) { 174 if (al.sym != NULL) {
158 if (sort__has_parent && !*parent && 175 if (sort__has_parent && !*parent &&
159 symbol__match_parent_regex(al.sym)) 176 symbol__match_parent_regex(al.sym))
160 *parent = al.sym; 177 *parent = al.sym;
161 if (!symbol_conf.use_callchain) 178 if (!symbol_conf.use_callchain)
162 break; 179 break;
163 syms[i] = al.sym; 180 syms[i].map = al.map;
181 syms[i].sym = al.sym;
164 } 182 }
165 } 183 }
166 184
@@ -174,6 +192,18 @@ static int process_event_stub(event_t *event __used,
174 return 0; 192 return 0;
175} 193}
176 194
195static int process_finished_round_stub(event_t *event __used,
196 struct perf_session *session __used,
197 struct perf_event_ops *ops __used)
198{
199 dump_printf(": unhandled!\n");
200 return 0;
201}
202
203static int process_finished_round(event_t *event,
204 struct perf_session *session,
205 struct perf_event_ops *ops);
206
177static void perf_event_ops__fill_defaults(struct perf_event_ops *handler) 207static void perf_event_ops__fill_defaults(struct perf_event_ops *handler)
178{ 208{
179 if (handler->sample == NULL) 209 if (handler->sample == NULL)
@@ -194,29 +224,20 @@ static void perf_event_ops__fill_defaults(struct perf_event_ops *handler)
194 handler->throttle = process_event_stub; 224 handler->throttle = process_event_stub;
195 if (handler->unthrottle == NULL) 225 if (handler->unthrottle == NULL)
196 handler->unthrottle = process_event_stub; 226 handler->unthrottle = process_event_stub;
197} 227 if (handler->attr == NULL)
198 228 handler->attr = process_event_stub;
199static const char *event__name[] = { 229 if (handler->event_type == NULL)
200 [0] = "TOTAL", 230 handler->event_type = process_event_stub;
201 [PERF_RECORD_MMAP] = "MMAP", 231 if (handler->tracing_data == NULL)
202 [PERF_RECORD_LOST] = "LOST", 232 handler->tracing_data = process_event_stub;
203 [PERF_RECORD_COMM] = "COMM", 233 if (handler->build_id == NULL)
204 [PERF_RECORD_EXIT] = "EXIT", 234 handler->build_id = process_event_stub;
205 [PERF_RECORD_THROTTLE] = "THROTTLE", 235 if (handler->finished_round == NULL) {
206 [PERF_RECORD_UNTHROTTLE] = "UNTHROTTLE", 236 if (handler->ordered_samples)
207 [PERF_RECORD_FORK] = "FORK", 237 handler->finished_round = process_finished_round;
208 [PERF_RECORD_READ] = "READ", 238 else
209 [PERF_RECORD_SAMPLE] = "SAMPLE", 239 handler->finished_round = process_finished_round_stub;
210}; 240 }
211
212unsigned long event__total[PERF_RECORD_MAX];
213
214void event__print_totals(void)
215{
216 int i;
217 for (i = 0; i < PERF_RECORD_MAX; ++i)
218 pr_info("%10s events: %10ld\n",
219 event__name[i], event__total[i]);
220} 241}
221 242
222void mem_bswap_64(void *src, int byte_size) 243void mem_bswap_64(void *src, int byte_size)
@@ -270,6 +291,37 @@ static void event__read_swap(event_t *self)
270 self->read.id = bswap_64(self->read.id); 291 self->read.id = bswap_64(self->read.id);
271} 292}
272 293
294static void event__attr_swap(event_t *self)
295{
296 size_t size;
297
298 self->attr.attr.type = bswap_32(self->attr.attr.type);
299 self->attr.attr.size = bswap_32(self->attr.attr.size);
300 self->attr.attr.config = bswap_64(self->attr.attr.config);
301 self->attr.attr.sample_period = bswap_64(self->attr.attr.sample_period);
302 self->attr.attr.sample_type = bswap_64(self->attr.attr.sample_type);
303 self->attr.attr.read_format = bswap_64(self->attr.attr.read_format);
304 self->attr.attr.wakeup_events = bswap_32(self->attr.attr.wakeup_events);
305 self->attr.attr.bp_type = bswap_32(self->attr.attr.bp_type);
306 self->attr.attr.bp_addr = bswap_64(self->attr.attr.bp_addr);
307 self->attr.attr.bp_len = bswap_64(self->attr.attr.bp_len);
308
309 size = self->header.size;
310 size -= (void *)&self->attr.id - (void *)self;
311 mem_bswap_64(self->attr.id, size);
312}
313
314static void event__event_type_swap(event_t *self)
315{
316 self->event_type.event_type.event_id =
317 bswap_64(self->event_type.event_type.event_id);
318}
319
320static void event__tracing_data_swap(event_t *self)
321{
322 self->tracing_data.size = bswap_32(self->tracing_data.size);
323}
324
273typedef void (*event__swap_op)(event_t *self); 325typedef void (*event__swap_op)(event_t *self);
274 326
275static event__swap_op event__swap_ops[] = { 327static event__swap_op event__swap_ops[] = {
@@ -280,9 +332,212 @@ static event__swap_op event__swap_ops[] = {
280 [PERF_RECORD_LOST] = event__all64_swap, 332 [PERF_RECORD_LOST] = event__all64_swap,
281 [PERF_RECORD_READ] = event__read_swap, 333 [PERF_RECORD_READ] = event__read_swap,
282 [PERF_RECORD_SAMPLE] = event__all64_swap, 334 [PERF_RECORD_SAMPLE] = event__all64_swap,
283 [PERF_RECORD_MAX] = NULL, 335 [PERF_RECORD_HEADER_ATTR] = event__attr_swap,
336 [PERF_RECORD_HEADER_EVENT_TYPE] = event__event_type_swap,
337 [PERF_RECORD_HEADER_TRACING_DATA] = event__tracing_data_swap,
338 [PERF_RECORD_HEADER_BUILD_ID] = NULL,
339 [PERF_RECORD_HEADER_MAX] = NULL,
284}; 340};
285 341
342struct sample_queue {
343 u64 timestamp;
344 struct sample_event *event;
345 struct list_head list;
346};
347
348static void flush_sample_queue(struct perf_session *s,
349 struct perf_event_ops *ops)
350{
351 struct list_head *head = &s->ordered_samples.samples_head;
352 u64 limit = s->ordered_samples.next_flush;
353 struct sample_queue *tmp, *iter;
354
355 if (!ops->ordered_samples || !limit)
356 return;
357
358 list_for_each_entry_safe(iter, tmp, head, list) {
359 if (iter->timestamp > limit)
360 return;
361
362 if (iter == s->ordered_samples.last_inserted)
363 s->ordered_samples.last_inserted = NULL;
364
365 ops->sample((event_t *)iter->event, s);
366
367 s->ordered_samples.last_flush = iter->timestamp;
368 list_del(&iter->list);
369 free(iter->event);
370 free(iter);
371 }
372}
373
374/*
375 * When perf record finishes a pass on every buffers, it records this pseudo
376 * event.
377 * We record the max timestamp t found in the pass n.
378 * Assuming these timestamps are monotonic across cpus, we know that if
379 * a buffer still has events with timestamps below t, they will be all
380 * available and then read in the pass n + 1.
381 * Hence when we start to read the pass n + 2, we can safely flush every
382 * events with timestamps below t.
383 *
384 * ============ PASS n =================
385 * CPU 0 | CPU 1
386 * |
387 * cnt1 timestamps | cnt2 timestamps
388 * 1 | 2
389 * 2 | 3
390 * - | 4 <--- max recorded
391 *
392 * ============ PASS n + 1 ==============
393 * CPU 0 | CPU 1
394 * |
395 * cnt1 timestamps | cnt2 timestamps
396 * 3 | 5
397 * 4 | 6
398 * 5 | 7 <---- max recorded
399 *
400 * Flush every events below timestamp 4
401 *
402 * ============ PASS n + 2 ==============
403 * CPU 0 | CPU 1
404 * |
405 * cnt1 timestamps | cnt2 timestamps
406 * 6 | 8
407 * 7 | 9
408 * - | 10
409 *
410 * Flush every events below timestamp 7
411 * etc...
412 */
413static int process_finished_round(event_t *event __used,
414 struct perf_session *session,
415 struct perf_event_ops *ops)
416{
417 flush_sample_queue(session, ops);
418 session->ordered_samples.next_flush = session->ordered_samples.max_timestamp;
419
420 return 0;
421}
422
423static void __queue_sample_end(struct sample_queue *new, struct list_head *head)
424{
425 struct sample_queue *iter;
426
427 list_for_each_entry_reverse(iter, head, list) {
428 if (iter->timestamp < new->timestamp) {
429 list_add(&new->list, &iter->list);
430 return;
431 }
432 }
433
434 list_add(&new->list, head);
435}
436
437static void __queue_sample_before(struct sample_queue *new,
438 struct sample_queue *iter,
439 struct list_head *head)
440{
441 list_for_each_entry_continue_reverse(iter, head, list) {
442 if (iter->timestamp < new->timestamp) {
443 list_add(&new->list, &iter->list);
444 return;
445 }
446 }
447
448 list_add(&new->list, head);
449}
450
451static void __queue_sample_after(struct sample_queue *new,
452 struct sample_queue *iter,
453 struct list_head *head)
454{
455 list_for_each_entry_continue(iter, head, list) {
456 if (iter->timestamp > new->timestamp) {
457 list_add_tail(&new->list, &iter->list);
458 return;
459 }
460 }
461 list_add_tail(&new->list, head);
462}
463
464/* The queue is ordered by time */
465static void __queue_sample_event(struct sample_queue *new,
466 struct perf_session *s)
467{
468 struct sample_queue *last_inserted = s->ordered_samples.last_inserted;
469 struct list_head *head = &s->ordered_samples.samples_head;
470
471
472 if (!last_inserted) {
473 __queue_sample_end(new, head);
474 return;
475 }
476
477 /*
478 * Most of the time the current event has a timestamp
479 * very close to the last event inserted, unless we just switched
480 * to another event buffer. Having a sorting based on a list and
481 * on the last inserted event that is close to the current one is
482 * probably more efficient than an rbtree based sorting.
483 */
484 if (last_inserted->timestamp >= new->timestamp)
485 __queue_sample_before(new, last_inserted, head);
486 else
487 __queue_sample_after(new, last_inserted, head);
488}
489
490static int queue_sample_event(event_t *event, struct sample_data *data,
491 struct perf_session *s)
492{
493 u64 timestamp = data->time;
494 struct sample_queue *new;
495
496
497 if (timestamp < s->ordered_samples.last_flush) {
498 printf("Warning: Timestamp below last timeslice flush\n");
499 return -EINVAL;
500 }
501
502 new = malloc(sizeof(*new));
503 if (!new)
504 return -ENOMEM;
505
506 new->timestamp = timestamp;
507
508 new->event = malloc(event->header.size);
509 if (!new->event) {
510 free(new);
511 return -ENOMEM;
512 }
513
514 memcpy(new->event, event, event->header.size);
515
516 __queue_sample_event(new, s);
517 s->ordered_samples.last_inserted = new;
518
519 if (new->timestamp > s->ordered_samples.max_timestamp)
520 s->ordered_samples.max_timestamp = new->timestamp;
521
522 return 0;
523}
524
525static int perf_session__process_sample(event_t *event, struct perf_session *s,
526 struct perf_event_ops *ops)
527{
528 struct sample_data data;
529
530 if (!ops->ordered_samples)
531 return ops->sample(event, s);
532
533 bzero(&data, sizeof(struct sample_data));
534 event__parse_sample(event, s->sample_type, &data);
535
536 queue_sample_event(event, &data, s);
537
538 return 0;
539}
540
286static int perf_session__process_event(struct perf_session *self, 541static int perf_session__process_event(struct perf_session *self,
287 event_t *event, 542 event_t *event,
288 struct perf_event_ops *ops, 543 struct perf_event_ops *ops,
@@ -290,12 +545,11 @@ static int perf_session__process_event(struct perf_session *self,
290{ 545{
291 trace_event(event); 546 trace_event(event);
292 547
293 if (event->header.type < PERF_RECORD_MAX) { 548 if (event->header.type < PERF_RECORD_HEADER_MAX) {
294 dump_printf("%#Lx [%#x]: PERF_RECORD_%s", 549 dump_printf("%#Lx [%#x]: PERF_RECORD_%s",
295 offset + head, event->header.size, 550 offset + head, event->header.size,
296 event__name[event->header.type]); 551 event__name[event->header.type]);
297 ++event__total[0]; 552 hists__inc_nr_events(&self->hists, event->header.type);
298 ++event__total[event->header.type];
299 } 553 }
300 554
301 if (self->header.needs_swap && event__swap_ops[event->header.type]) 555 if (self->header.needs_swap && event__swap_ops[event->header.type])
@@ -303,7 +557,7 @@ static int perf_session__process_event(struct perf_session *self,
303 557
304 switch (event->header.type) { 558 switch (event->header.type) {
305 case PERF_RECORD_SAMPLE: 559 case PERF_RECORD_SAMPLE:
306 return ops->sample(event, self); 560 return perf_session__process_sample(event, self, ops);
307 case PERF_RECORD_MMAP: 561 case PERF_RECORD_MMAP:
308 return ops->mmap(event, self); 562 return ops->mmap(event, self);
309 case PERF_RECORD_COMM: 563 case PERF_RECORD_COMM:
@@ -320,8 +574,20 @@ static int perf_session__process_event(struct perf_session *self,
320 return ops->throttle(event, self); 574 return ops->throttle(event, self);
321 case PERF_RECORD_UNTHROTTLE: 575 case PERF_RECORD_UNTHROTTLE:
322 return ops->unthrottle(event, self); 576 return ops->unthrottle(event, self);
577 case PERF_RECORD_HEADER_ATTR:
578 return ops->attr(event, self);
579 case PERF_RECORD_HEADER_EVENT_TYPE:
580 return ops->event_type(event, self);
581 case PERF_RECORD_HEADER_TRACING_DATA:
582 /* setup for reading amidst mmap */
583 lseek(self->fd, offset + head, SEEK_SET);
584 return ops->tracing_data(event, self);
585 case PERF_RECORD_HEADER_BUILD_ID:
586 return ops->build_id(event, self);
587 case PERF_RECORD_FINISHED_ROUND:
588 return ops->finished_round(event, self, ops);
323 default: 589 default:
324 self->unknown_events++; 590 ++self->hists.stats.nr_unknown_events;
325 return -1; 591 return -1;
326 } 592 }
327} 593}
@@ -333,56 +599,114 @@ void perf_event_header__bswap(struct perf_event_header *self)
333 self->size = bswap_16(self->size); 599 self->size = bswap_16(self->size);
334} 600}
335 601
336int perf_header__read_build_ids(struct perf_header *self, 602static struct thread *perf_session__register_idle_thread(struct perf_session *self)
337 int input, u64 offset, u64 size)
338{ 603{
339 struct build_id_event bev; 604 struct thread *thread = perf_session__findnew(self, 0);
340 char filename[PATH_MAX];
341 u64 limit = offset + size;
342 int err = -1;
343
344 while (offset < limit) {
345 struct dso *dso;
346 ssize_t len;
347 struct list_head *head = &dsos__user;
348 605
349 if (read(input, &bev, sizeof(bev)) != sizeof(bev)) 606 if (thread == NULL || thread__set_comm(thread, "swapper")) {
350 goto out; 607 pr_err("problem inserting idle task.\n");
608 thread = NULL;
609 }
351 610
352 if (self->needs_swap) 611 return thread;
353 perf_event_header__bswap(&bev.header); 612}
354 613
355 len = bev.header.size - sizeof(bev); 614int do_read(int fd, void *buf, size_t size)
356 if (read(input, filename, len) != len) 615{
357 goto out; 616 void *buf_start = buf;
358 617
359 if (bev.header.misc & PERF_RECORD_MISC_KERNEL) 618 while (size) {
360 head = &dsos__kernel; 619 int ret = read(fd, buf, size);
361 620
362 dso = __dsos__findnew(head, filename); 621 if (ret <= 0)
363 if (dso != NULL) { 622 return ret;
364 dso__set_build_id(dso, &bev.build_id);
365 if (head == &dsos__kernel && filename[0] == '[')
366 dso->kernel = 1;
367 }
368 623
369 offset += bev.header.size; 624 size -= ret;
625 buf += ret;
370 } 626 }
371 err = 0; 627
372out: 628 return buf - buf_start;
373 return err;
374} 629}
375 630
376static struct thread *perf_session__register_idle_thread(struct perf_session *self) 631#define session_done() (*(volatile int *)(&session_done))
632volatile int session_done;
633
634static int __perf_session__process_pipe_events(struct perf_session *self,
635 struct perf_event_ops *ops)
377{ 636{
378 struct thread *thread = perf_session__findnew(self, 0); 637 event_t event;
638 uint32_t size;
639 int skip = 0;
640 u64 head;
641 int err;
642 void *p;
379 643
380 if (thread == NULL || thread__set_comm(thread, "swapper")) { 644 perf_event_ops__fill_defaults(ops);
381 pr_err("problem inserting idle task.\n"); 645
382 thread = NULL; 646 head = 0;
647more:
648 err = do_read(self->fd, &event, sizeof(struct perf_event_header));
649 if (err <= 0) {
650 if (err == 0)
651 goto done;
652
653 pr_err("failed to read event header\n");
654 goto out_err;
383 } 655 }
384 656
385 return thread; 657 if (self->header.needs_swap)
658 perf_event_header__bswap(&event.header);
659
660 size = event.header.size;
661 if (size == 0)
662 size = 8;
663
664 p = &event;
665 p += sizeof(struct perf_event_header);
666
667 if (size - sizeof(struct perf_event_header)) {
668 err = do_read(self->fd, p,
669 size - sizeof(struct perf_event_header));
670 if (err <= 0) {
671 if (err == 0) {
672 pr_err("unexpected end of event stream\n");
673 goto done;
674 }
675
676 pr_err("failed to read event data\n");
677 goto out_err;
678 }
679 }
680
681 if (size == 0 ||
682 (skip = perf_session__process_event(self, &event, ops,
683 0, head)) < 0) {
684 dump_printf("%#Lx [%#x]: skipping unknown header type: %d\n",
685 head, event.header.size, event.header.type);
686 /*
687 * assume we lost track of the stream, check alignment, and
688 * increment a single u64 in the hope to catch on again 'soon'.
689 */
690 if (unlikely(head & 7))
691 head &= ~7ULL;
692
693 size = 8;
694 }
695
696 head += size;
697
698 dump_printf("\n%#Lx [%#x]: event: %d\n",
699 head, event.header.size, event.header.type);
700
701 if (skip > 0)
702 head += skip;
703
704 if (!session_done())
705 goto more;
706done:
707 err = 0;
708out_err:
709 return err;
386} 710}
387 711
388int __perf_session__process_events(struct perf_session *self, 712int __perf_session__process_events(struct perf_session *self,
@@ -396,6 +720,10 @@ int __perf_session__process_events(struct perf_session *self,
396 event_t *event; 720 event_t *event;
397 uint32_t size; 721 uint32_t size;
398 char *buf; 722 char *buf;
723 struct ui_progress *progress = ui_progress__new("Processing events...",
724 self->size);
725 if (progress == NULL)
726 return -1;
399 727
400 perf_event_ops__fill_defaults(ops); 728 perf_event_ops__fill_defaults(ops);
401 729
@@ -424,6 +752,7 @@ remap:
424 752
425more: 753more:
426 event = (event_t *)(buf + head); 754 event = (event_t *)(buf + head);
755 ui_progress__update(progress, offset);
427 756
428 if (self->header.needs_swap) 757 if (self->header.needs_swap)
429 perf_event_header__bswap(&event->header); 758 perf_event_header__bswap(&event->header);
@@ -473,7 +802,11 @@ more:
473 goto more; 802 goto more;
474done: 803done:
475 err = 0; 804 err = 0;
805 /* do the final flush for ordered samples */
806 self->ordered_samples.next_flush = ULLONG_MAX;
807 flush_sample_queue(self, ops);
476out_err: 808out_err:
809 ui_progress__delete(progress);
477 return err; 810 return err;
478} 811}
479 812
@@ -502,9 +835,13 @@ out_getcwd_err:
502 self->cwdlen = strlen(self->cwd); 835 self->cwdlen = strlen(self->cwd);
503 } 836 }
504 837
505 err = __perf_session__process_events(self, self->header.data_offset, 838 if (!self->fd_pipe)
506 self->header.data_size, 839 err = __perf_session__process_events(self,
507 self->size, ops); 840 self->header.data_offset,
841 self->header.data_size,
842 self->size, ops);
843 else
844 err = __perf_session__process_pipe_events(self, ops);
508out_err: 845out_err:
509 return err; 846 return err;
510} 847}
@@ -519,56 +856,41 @@ bool perf_session__has_traces(struct perf_session *self, const char *msg)
519 return true; 856 return true;
520} 857}
521 858
522int perf_session__set_kallsyms_ref_reloc_sym(struct perf_session *self, 859int perf_session__set_kallsyms_ref_reloc_sym(struct map **maps,
523 const char *symbol_name, 860 const char *symbol_name,
524 u64 addr) 861 u64 addr)
525{ 862{
526 char *bracket; 863 char *bracket;
527 enum map_type i; 864 enum map_type i;
865 struct ref_reloc_sym *ref;
528 866
529 self->ref_reloc_sym.name = strdup(symbol_name); 867 ref = zalloc(sizeof(struct ref_reloc_sym));
530 if (self->ref_reloc_sym.name == NULL) 868 if (ref == NULL)
531 return -ENOMEM; 869 return -ENOMEM;
532 870
533 bracket = strchr(self->ref_reloc_sym.name, ']'); 871 ref->name = strdup(symbol_name);
872 if (ref->name == NULL) {
873 free(ref);
874 return -ENOMEM;
875 }
876
877 bracket = strchr(ref->name, ']');
534 if (bracket) 878 if (bracket)
535 *bracket = '\0'; 879 *bracket = '\0';
536 880
537 self->ref_reloc_sym.addr = addr; 881 ref->addr = addr;
538 882
539 for (i = 0; i < MAP__NR_TYPES; ++i) { 883 for (i = 0; i < MAP__NR_TYPES; ++i) {
540 struct kmap *kmap = map__kmap(self->vmlinux_maps[i]); 884 struct kmap *kmap = map__kmap(maps[i]);
541 kmap->ref_reloc_sym = &self->ref_reloc_sym; 885 kmap->ref_reloc_sym = ref;
542 } 886 }
543 887
544 return 0; 888 return 0;
545} 889}
546 890
547static u64 map__reloc_map_ip(struct map *map, u64 ip) 891size_t perf_session__fprintf_dsos(struct perf_session *self, FILE *fp)
548{
549 return ip + (s64)map->pgoff;
550}
551
552static u64 map__reloc_unmap_ip(struct map *map, u64 ip)
553{
554 return ip - (s64)map->pgoff;
555}
556
557void map__reloc_vmlinux(struct map *self)
558{ 892{
559 struct kmap *kmap = map__kmap(self); 893 return __dsos__fprintf(&self->host_machine.kernel_dsos, fp) +
560 s64 reloc; 894 __dsos__fprintf(&self->host_machine.user_dsos, fp) +
561 895 machines__fprintf_dsos(&self->machines, fp);
562 if (!kmap->ref_reloc_sym || !kmap->ref_reloc_sym->unrelocated_addr)
563 return;
564
565 reloc = (kmap->ref_reloc_sym->unrelocated_addr -
566 kmap->ref_reloc_sym->addr);
567
568 if (!reloc)
569 return;
570
571 self->map_ip = map__reloc_map_ip;
572 self->unmap_ip = map__reloc_unmap_ip;
573 self->pgoff = reloc;
574} 896}
diff --git a/tools/perf/util/session.h b/tools/perf/util/session.h
index 5c33417eebb3..e7fce486ebe2 100644
--- a/tools/perf/util/session.h
+++ b/tools/perf/util/session.h
@@ -1,6 +1,7 @@
1#ifndef __PERF_SESSION_H 1#ifndef __PERF_SESSION_H
2#define __PERF_SESSION_H 2#define __PERF_SESSION_H
3 3
4#include "hist.h"
4#include "event.h" 5#include "event.h"
5#include "header.h" 6#include "header.h"
6#include "symbol.h" 7#include "symbol.h"
@@ -8,45 +9,69 @@
8#include <linux/rbtree.h> 9#include <linux/rbtree.h>
9#include "../../../include/linux/perf_event.h" 10#include "../../../include/linux/perf_event.h"
10 11
12struct sample_queue;
11struct ip_callchain; 13struct ip_callchain;
12struct thread; 14struct thread;
13 15
16struct ordered_samples {
17 u64 last_flush;
18 u64 next_flush;
19 u64 max_timestamp;
20 struct list_head samples_head;
21 struct sample_queue *last_inserted;
22};
23
14struct perf_session { 24struct perf_session {
15 struct perf_header header; 25 struct perf_header header;
16 unsigned long size; 26 unsigned long size;
17 unsigned long mmap_window; 27 unsigned long mmap_window;
18 struct map_groups kmaps;
19 struct rb_root threads; 28 struct rb_root threads;
20 struct thread *last_match; 29 struct thread *last_match;
21 struct map *vmlinux_maps[MAP__NR_TYPES]; 30 struct machine host_machine;
22 struct events_stats events_stats; 31 struct rb_root machines;
23 struct rb_root stats_by_id; 32 struct rb_root hists_tree;
24 unsigned long event_total[PERF_RECORD_MAX]; 33 /*
25 unsigned long unknown_events; 34 * FIXME: should point to the first entry in hists_tree and
26 struct rb_root hists; 35 * be a hists instance. Right now its only 'report'
36 * that is using ->hists_tree while all the rest use
37 * ->hists.
38 */
39 struct hists hists;
27 u64 sample_type; 40 u64 sample_type;
28 struct ref_reloc_sym ref_reloc_sym;
29 int fd; 41 int fd;
42 bool fd_pipe;
43 bool repipe;
30 int cwdlen; 44 int cwdlen;
31 char *cwd; 45 char *cwd;
46 struct ordered_samples ordered_samples;
32 char filename[0]; 47 char filename[0];
33}; 48};
34 49
50struct perf_event_ops;
51
35typedef int (*event_op)(event_t *self, struct perf_session *session); 52typedef int (*event_op)(event_t *self, struct perf_session *session);
53typedef int (*event_op2)(event_t *self, struct perf_session *session,
54 struct perf_event_ops *ops);
36 55
37struct perf_event_ops { 56struct perf_event_ops {
38 event_op sample, 57 event_op sample,
39 mmap, 58 mmap,
40 comm, 59 comm,
41 fork, 60 fork,
42 exit, 61 exit,
43 lost, 62 lost,
44 read, 63 read,
45 throttle, 64 throttle,
46 unthrottle; 65 unthrottle,
66 attr,
67 event_type,
68 tracing_data,
69 build_id;
70 event_op2 finished_round;
71 bool ordered_samples;
47}; 72};
48 73
49struct perf_session *perf_session__new(const char *filename, int mode, bool force); 74struct perf_session *perf_session__new(const char *filename, int mode, bool force, bool repipe);
50void perf_session__delete(struct perf_session *self); 75void perf_session__delete(struct perf_session *self);
51 76
52void perf_event_header__bswap(struct perf_event_header *self); 77void perf_event_header__bswap(struct perf_event_header *self);
@@ -57,33 +82,66 @@ int __perf_session__process_events(struct perf_session *self,
57int perf_session__process_events(struct perf_session *self, 82int perf_session__process_events(struct perf_session *self,
58 struct perf_event_ops *event_ops); 83 struct perf_event_ops *event_ops);
59 84
60struct symbol **perf_session__resolve_callchain(struct perf_session *self, 85struct map_symbol *perf_session__resolve_callchain(struct perf_session *self,
61 struct thread *thread, 86 struct thread *thread,
62 struct ip_callchain *chain, 87 struct ip_callchain *chain,
63 struct symbol **parent); 88 struct symbol **parent);
64 89
65bool perf_session__has_traces(struct perf_session *self, const char *msg); 90bool perf_session__has_traces(struct perf_session *self, const char *msg);
66 91
67int perf_header__read_build_ids(struct perf_header *self, int input, 92int perf_session__set_kallsyms_ref_reloc_sym(struct map **maps,
68 u64 offset, u64 file_size);
69
70int perf_session__set_kallsyms_ref_reloc_sym(struct perf_session *self,
71 const char *symbol_name, 93 const char *symbol_name,
72 u64 addr); 94 u64 addr);
73 95
74void mem_bswap_64(void *src, int byte_size); 96void mem_bswap_64(void *src, int byte_size);
75 97
76static inline int __perf_session__create_kernel_maps(struct perf_session *self, 98int perf_session__create_kernel_maps(struct perf_session *self);
77 struct dso *kernel) 99
100int do_read(int fd, void *buf, size_t size);
101void perf_session__update_sample_type(struct perf_session *self);
102
103static inline
104struct machine *perf_session__find_host_machine(struct perf_session *self)
105{
106 return &self->host_machine;
107}
108
109static inline
110struct machine *perf_session__find_machine(struct perf_session *self, pid_t pid)
111{
112 if (pid == HOST_KERNEL_ID)
113 return &self->host_machine;
114 return machines__find(&self->machines, pid);
115}
116
117static inline
118struct machine *perf_session__findnew_machine(struct perf_session *self, pid_t pid)
119{
120 if (pid == HOST_KERNEL_ID)
121 return &self->host_machine;
122 return machines__findnew(&self->machines, pid);
123}
124
125static inline
126void perf_session__process_machines(struct perf_session *self,
127 machine__process_t process)
128{
129 process(&self->host_machine, self);
130 return machines__process(&self->machines, process, self);
131}
132
133size_t perf_session__fprintf_dsos(struct perf_session *self, FILE *fp);
134
135static inline
136size_t perf_session__fprintf_dsos_buildid(struct perf_session *self, FILE *fp,
137 bool with_hits)
78{ 138{
79 return __map_groups__create_kernel_maps(&self->kmaps, 139 return machines__fprintf_dsos_buildid(&self->machines, fp, with_hits);
80 self->vmlinux_maps, kernel);
81} 140}
82 141
83static inline struct map * 142static inline
84 perf_session__new_module_map(struct perf_session *self, 143size_t perf_session__fprintf_nr_events(struct perf_session *self, FILE *fp)
85 u64 start, const char *filename)
86{ 144{
87 return map_groups__new_module(&self->kmaps, start, filename); 145 return hists__fprintf_nr_events(&self->hists, fp);
88} 146}
89#endif /* __PERF_SESSION_H */ 147#endif /* __PERF_SESSION_H */
diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c
index cb0f327de9e8..2316cb5a4116 100644
--- a/tools/perf/util/sort.c
+++ b/tools/perf/util/sort.c
@@ -1,10 +1,10 @@
1#include "sort.h" 1#include "sort.h"
2 2
3regex_t parent_regex; 3regex_t parent_regex;
4char default_parent_pattern[] = "^sys_|^do_page_fault"; 4const char default_parent_pattern[] = "^sys_|^do_page_fault";
5char *parent_pattern = default_parent_pattern; 5const char *parent_pattern = default_parent_pattern;
6char default_sort_order[] = "comm,dso,symbol"; 6const char default_sort_order[] = "comm,dso,symbol";
7char *sort_order = default_sort_order; 7const char *sort_order = default_sort_order;
8int sort__need_collapse = 0; 8int sort__need_collapse = 0;
9int sort__has_parent = 0; 9int sort__has_parent = 0;
10 10
@@ -18,39 +18,50 @@ char * field_sep;
18 18
19LIST_HEAD(hist_entry__sort_list); 19LIST_HEAD(hist_entry__sort_list);
20 20
21static int hist_entry__thread_snprintf(struct hist_entry *self, char *bf,
22 size_t size, unsigned int width);
23static int hist_entry__comm_snprintf(struct hist_entry *self, char *bf,
24 size_t size, unsigned int width);
25static int hist_entry__dso_snprintf(struct hist_entry *self, char *bf,
26 size_t size, unsigned int width);
27static int hist_entry__sym_snprintf(struct hist_entry *self, char *bf,
28 size_t size, unsigned int width);
29static int hist_entry__parent_snprintf(struct hist_entry *self, char *bf,
30 size_t size, unsigned int width);
31
21struct sort_entry sort_thread = { 32struct sort_entry sort_thread = {
22 .header = "Command: Pid", 33 .se_header = "Command: Pid",
23 .cmp = sort__thread_cmp, 34 .se_cmp = sort__thread_cmp,
24 .print = sort__thread_print, 35 .se_snprintf = hist_entry__thread_snprintf,
25 .width = &threads__col_width, 36 .se_width = &threads__col_width,
26}; 37};
27 38
28struct sort_entry sort_comm = { 39struct sort_entry sort_comm = {
29 .header = "Command", 40 .se_header = "Command",
30 .cmp = sort__comm_cmp, 41 .se_cmp = sort__comm_cmp,
31 .collapse = sort__comm_collapse, 42 .se_collapse = sort__comm_collapse,
32 .print = sort__comm_print, 43 .se_snprintf = hist_entry__comm_snprintf,
33 .width = &comms__col_width, 44 .se_width = &comms__col_width,
34}; 45};
35 46
36struct sort_entry sort_dso = { 47struct sort_entry sort_dso = {
37 .header = "Shared Object", 48 .se_header = "Shared Object",
38 .cmp = sort__dso_cmp, 49 .se_cmp = sort__dso_cmp,
39 .print = sort__dso_print, 50 .se_snprintf = hist_entry__dso_snprintf,
40 .width = &dsos__col_width, 51 .se_width = &dsos__col_width,
41}; 52};
42 53
43struct sort_entry sort_sym = { 54struct sort_entry sort_sym = {
44 .header = "Symbol", 55 .se_header = "Symbol",
45 .cmp = sort__sym_cmp, 56 .se_cmp = sort__sym_cmp,
46 .print = sort__sym_print, 57 .se_snprintf = hist_entry__sym_snprintf,
47}; 58};
48 59
49struct sort_entry sort_parent = { 60struct sort_entry sort_parent = {
50 .header = "Parent symbol", 61 .se_header = "Parent symbol",
51 .cmp = sort__parent_cmp, 62 .se_cmp = sort__parent_cmp,
52 .print = sort__parent_print, 63 .se_snprintf = hist_entry__parent_snprintf,
53 .width = &parent_symbol__col_width, 64 .se_width = &parent_symbol__col_width,
54}; 65};
55 66
56struct sort_dimension { 67struct sort_dimension {
@@ -85,45 +96,38 @@ sort__thread_cmp(struct hist_entry *left, struct hist_entry *right)
85 return right->thread->pid - left->thread->pid; 96 return right->thread->pid - left->thread->pid;
86} 97}
87 98
88int repsep_fprintf(FILE *fp, const char *fmt, ...) 99static int repsep_snprintf(char *bf, size_t size, const char *fmt, ...)
89{ 100{
90 int n; 101 int n;
91 va_list ap; 102 va_list ap;
92 103
93 va_start(ap, fmt); 104 va_start(ap, fmt);
94 if (!field_sep) 105 n = vsnprintf(bf, size, fmt, ap);
95 n = vfprintf(fp, fmt, ap); 106 if (field_sep && n > 0) {
96 else { 107 char *sep = bf;
97 char *bf = NULL; 108
98 n = vasprintf(&bf, fmt, ap); 109 while (1) {
99 if (n > 0) { 110 sep = strchr(sep, *field_sep);
100 char *sep = bf; 111 if (sep == NULL)
101 112 break;
102 while (1) { 113 *sep = '.';
103 sep = strchr(sep, *field_sep);
104 if (sep == NULL)
105 break;
106 *sep = '.';
107 }
108 } 114 }
109 fputs(bf, fp);
110 free(bf);
111 } 115 }
112 va_end(ap); 116 va_end(ap);
113 return n; 117 return n;
114} 118}
115 119
116size_t 120static int hist_entry__thread_snprintf(struct hist_entry *self, char *bf,
117sort__thread_print(FILE *fp, struct hist_entry *self, unsigned int width) 121 size_t size, unsigned int width)
118{ 122{
119 return repsep_fprintf(fp, "%*s:%5d", width - 6, 123 return repsep_snprintf(bf, size, "%*s:%5d", width,
120 self->thread->comm ?: "", self->thread->pid); 124 self->thread->comm ?: "", self->thread->pid);
121} 125}
122 126
123size_t 127static int hist_entry__comm_snprintf(struct hist_entry *self, char *bf,
124sort__comm_print(FILE *fp, struct hist_entry *self, unsigned int width) 128 size_t size, unsigned int width)
125{ 129{
126 return repsep_fprintf(fp, "%*s", width, self->thread->comm); 130 return repsep_snprintf(bf, size, "%*s", width, self->thread->comm);
127} 131}
128 132
129/* --sort dso */ 133/* --sort dso */
@@ -131,8 +135,8 @@ sort__comm_print(FILE *fp, struct hist_entry *self, unsigned int width)
131int64_t 135int64_t
132sort__dso_cmp(struct hist_entry *left, struct hist_entry *right) 136sort__dso_cmp(struct hist_entry *left, struct hist_entry *right)
133{ 137{
134 struct dso *dso_l = left->map ? left->map->dso : NULL; 138 struct dso *dso_l = left->ms.map ? left->ms.map->dso : NULL;
135 struct dso *dso_r = right->map ? right->map->dso : NULL; 139 struct dso *dso_r = right->ms.map ? right->ms.map->dso : NULL;
136 const char *dso_name_l, *dso_name_r; 140 const char *dso_name_l, *dso_name_r;
137 141
138 if (!dso_l || !dso_r) 142 if (!dso_l || !dso_r)
@@ -149,16 +153,16 @@ sort__dso_cmp(struct hist_entry *left, struct hist_entry *right)
149 return strcmp(dso_name_l, dso_name_r); 153 return strcmp(dso_name_l, dso_name_r);
150} 154}
151 155
152size_t 156static int hist_entry__dso_snprintf(struct hist_entry *self, char *bf,
153sort__dso_print(FILE *fp, struct hist_entry *self, unsigned int width) 157 size_t size, unsigned int width)
154{ 158{
155 if (self->map && self->map->dso) { 159 if (self->ms.map && self->ms.map->dso) {
156 const char *dso_name = !verbose ? self->map->dso->short_name : 160 const char *dso_name = !verbose ? self->ms.map->dso->short_name :
157 self->map->dso->long_name; 161 self->ms.map->dso->long_name;
158 return repsep_fprintf(fp, "%-*s", width, dso_name); 162 return repsep_snprintf(bf, size, "%-*s", width, dso_name);
159 } 163 }
160 164
161 return repsep_fprintf(fp, "%*llx", width, (u64)self->ip); 165 return repsep_snprintf(bf, size, "%*Lx", width, self->ip);
162} 166}
163 167
164/* --sort symbol */ 168/* --sort symbol */
@@ -168,31 +172,31 @@ sort__sym_cmp(struct hist_entry *left, struct hist_entry *right)
168{ 172{
169 u64 ip_l, ip_r; 173 u64 ip_l, ip_r;
170 174
171 if (left->sym == right->sym) 175 if (left->ms.sym == right->ms.sym)
172 return 0; 176 return 0;
173 177
174 ip_l = left->sym ? left->sym->start : left->ip; 178 ip_l = left->ms.sym ? left->ms.sym->start : left->ip;
175 ip_r = right->sym ? right->sym->start : right->ip; 179 ip_r = right->ms.sym ? right->ms.sym->start : right->ip;
176 180
177 return (int64_t)(ip_r - ip_l); 181 return (int64_t)(ip_r - ip_l);
178} 182}
179 183
180 184static int hist_entry__sym_snprintf(struct hist_entry *self, char *bf,
181size_t 185 size_t size, unsigned int width __used)
182sort__sym_print(FILE *fp, struct hist_entry *self, unsigned int width __used)
183{ 186{
184 size_t ret = 0; 187 size_t ret = 0;
185 188
186 if (verbose) { 189 if (verbose) {
187 char o = self->map ? dso__symtab_origin(self->map->dso) : '!'; 190 char o = self->ms.map ? dso__symtab_origin(self->ms.map->dso) : '!';
188 ret += repsep_fprintf(fp, "%#018llx %c ", (u64)self->ip, o); 191 ret += repsep_snprintf(bf, size, "%#018llx %c ", self->ip, o);
189 } 192 }
190 193
191 ret += repsep_fprintf(fp, "[%c] ", self->level); 194 ret += repsep_snprintf(bf + ret, size - ret, "[%c] ", self->level);
192 if (self->sym) 195 if (self->ms.sym)
193 ret += repsep_fprintf(fp, "%s", self->sym->name); 196 ret += repsep_snprintf(bf + ret, size - ret, "%s",
197 self->ms.sym->name);
194 else 198 else
195 ret += repsep_fprintf(fp, "%#016llx", (u64)self->ip); 199 ret += repsep_snprintf(bf + ret, size - ret, "%#016llx", self->ip);
196 200
197 return ret; 201 return ret;
198} 202}
@@ -231,10 +235,10 @@ sort__parent_cmp(struct hist_entry *left, struct hist_entry *right)
231 return strcmp(sym_l->name, sym_r->name); 235 return strcmp(sym_l->name, sym_r->name);
232} 236}
233 237
234size_t 238static int hist_entry__parent_snprintf(struct hist_entry *self, char *bf,
235sort__parent_print(FILE *fp, struct hist_entry *self, unsigned int width) 239 size_t size, unsigned int width)
236{ 240{
237 return repsep_fprintf(fp, "%-*s", width, 241 return repsep_snprintf(bf, size, "%-*s", width,
238 self->parent ? self->parent->name : "[other]"); 242 self->parent ? self->parent->name : "[other]");
239} 243}
240 244
@@ -251,7 +255,7 @@ int sort_dimension__add(const char *tok)
251 if (strncasecmp(tok, sd->name, strlen(tok))) 255 if (strncasecmp(tok, sd->name, strlen(tok)))
252 continue; 256 continue;
253 257
254 if (sd->entry->collapse) 258 if (sd->entry->se_collapse)
255 sort__need_collapse = 1; 259 sort__need_collapse = 1;
256 260
257 if (sd->entry == &sort_parent) { 261 if (sd->entry == &sort_parent) {
@@ -260,9 +264,8 @@ int sort_dimension__add(const char *tok)
260 char err[BUFSIZ]; 264 char err[BUFSIZ];
261 265
262 regerror(ret, &parent_regex, err, sizeof(err)); 266 regerror(ret, &parent_regex, err, sizeof(err));
263 fprintf(stderr, "Invalid regex: %s\n%s", 267 pr_err("Invalid regex: %s\n%s", parent_pattern, err);
264 parent_pattern, err); 268 return -EINVAL;
265 exit(-1);
266 } 269 }
267 sort__has_parent = 1; 270 sort__has_parent = 1;
268 } 271 }
diff --git a/tools/perf/util/sort.h b/tools/perf/util/sort.h
index 753f9ea99fb0..0d61c4082f43 100644
--- a/tools/perf/util/sort.h
+++ b/tools/perf/util/sort.h
@@ -25,10 +25,10 @@
25#include "sort.h" 25#include "sort.h"
26 26
27extern regex_t parent_regex; 27extern regex_t parent_regex;
28extern char *sort_order; 28extern const char *sort_order;
29extern char default_parent_pattern[]; 29extern const char default_parent_pattern[];
30extern char *parent_pattern; 30extern const char *parent_pattern;
31extern char default_sort_order[]; 31extern const char default_sort_order[];
32extern int sort__need_collapse; 32extern int sort__need_collapse;
33extern int sort__has_parent; 33extern int sort__has_parent;
34extern char *field_sep; 34extern char *field_sep;
@@ -43,19 +43,24 @@ extern enum sort_type sort__first_dimension;
43 43
44struct hist_entry { 44struct hist_entry {
45 struct rb_node rb_node; 45 struct rb_node rb_node;
46 u64 count; 46 u64 period;
47 u64 period_sys;
48 u64 period_us;
49 u64 period_guest_sys;
50 u64 period_guest_us;
51 struct map_symbol ms;
47 struct thread *thread; 52 struct thread *thread;
48 struct map *map;
49 struct symbol *sym;
50 u64 ip; 53 u64 ip;
54 u32 nr_events;
51 char level; 55 char level;
52 struct symbol *parent; 56 u8 filtered;
53 struct callchain_node callchain; 57 struct symbol *parent;
54 union { 58 union {
55 unsigned long position; 59 unsigned long position;
56 struct hist_entry *pair; 60 struct hist_entry *pair;
57 struct rb_root sorted_chain; 61 struct rb_root sorted_chain;
58 }; 62 };
63 struct callchain_node callchain[0];
59}; 64};
60 65
61enum sort_type { 66enum sort_type {
@@ -73,12 +78,13 @@ enum sort_type {
73struct sort_entry { 78struct sort_entry {
74 struct list_head list; 79 struct list_head list;
75 80
76 const char *header; 81 const char *se_header;
77 82
78 int64_t (*cmp)(struct hist_entry *, struct hist_entry *); 83 int64_t (*se_cmp)(struct hist_entry *, struct hist_entry *);
79 int64_t (*collapse)(struct hist_entry *, struct hist_entry *); 84 int64_t (*se_collapse)(struct hist_entry *, struct hist_entry *);
80 size_t (*print)(FILE *fp, struct hist_entry *, unsigned int width); 85 int (*se_snprintf)(struct hist_entry *self, char *bf, size_t size,
81 unsigned int *width; 86 unsigned int width);
87 unsigned int *se_width;
82 bool elide; 88 bool elide;
83}; 89};
84 90
@@ -87,7 +93,6 @@ extern struct list_head hist_entry__sort_list;
87 93
88void setup_sorting(const char * const usagestr[], const struct option *opts); 94void setup_sorting(const char * const usagestr[], const struct option *opts);
89 95
90extern int repsep_fprintf(FILE *fp, const char *fmt, ...);
91extern size_t sort__thread_print(FILE *, struct hist_entry *, unsigned int); 96extern size_t sort__thread_print(FILE *, struct hist_entry *, unsigned int);
92extern size_t sort__comm_print(FILE *, struct hist_entry *, unsigned int); 97extern size_t sort__comm_print(FILE *, struct hist_entry *, unsigned int);
93extern size_t sort__dso_print(FILE *, struct hist_entry *, unsigned int); 98extern size_t sort__dso_print(FILE *, struct hist_entry *, unsigned int);
diff --git a/tools/perf/util/string.c b/tools/perf/util/string.c
index a175949ed216..0409fc7c0058 100644
--- a/tools/perf/util/string.c
+++ b/tools/perf/util/string.c
@@ -1,48 +1,5 @@
1#include "string.h"
2#include "util.h" 1#include "util.h"
3 2#include "string.h"
4static int hex(char ch)
5{
6 if ((ch >= '0') && (ch <= '9'))
7 return ch - '0';
8 if ((ch >= 'a') && (ch <= 'f'))
9 return ch - 'a' + 10;
10 if ((ch >= 'A') && (ch <= 'F'))
11 return ch - 'A' + 10;
12 return -1;
13}
14
15/*
16 * While we find nice hex chars, build a long_val.
17 * Return number of chars processed.
18 */
19int hex2u64(const char *ptr, u64 *long_val)
20{
21 const char *p = ptr;
22 *long_val = 0;
23
24 while (*p) {
25 const int hex_val = hex(*p);
26
27 if (hex_val < 0)
28 break;
29
30 *long_val = (*long_val << 4) | hex_val;
31 p++;
32 }
33
34 return p - ptr;
35}
36
37char *strxfrchar(char *s, char from, char to)
38{
39 char *p = s;
40
41 while ((p = strchr(p, from)) != NULL)
42 *p++ = to;
43
44 return s;
45}
46 3
47#define K 1024LL 4#define K 1024LL
48/* 5/*
diff --git a/tools/perf/util/string.h b/tools/perf/util/string.h
deleted file mode 100644
index 542e44de3719..000000000000
--- a/tools/perf/util/string.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef __PERF_STRING_H_
2#define __PERF_STRING_H_
3
4#include <stdbool.h>
5#include "types.h"
6
7int hex2u64(const char *ptr, u64 *val);
8char *strxfrchar(char *s, char from, char to);
9s64 perf_atoll(const char *str);
10char **argv_split(const char *str, int *argcp);
11void argv_free(char **argv);
12bool strglobmatch(const char *str, const char *pat);
13bool strlazymatch(const char *str, const char *pat);
14
15#define _STR(x) #x
16#define STR(x) _STR(x)
17
18#endif /* __PERF_STRING_H */
diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c
index c458c4a371d1..a06131f6259a 100644
--- a/tools/perf/util/symbol.c
+++ b/tools/perf/util/symbol.c
@@ -1,13 +1,19 @@
1#include "util.h" 1#define _GNU_SOURCE
2#include "../perf.h" 2#include <ctype.h>
3#include "sort.h" 3#include <dirent.h>
4#include "string.h" 4#include <errno.h>
5#include <libgen.h>
6#include <stdlib.h>
7#include <stdio.h>
8#include <string.h>
9#include <sys/types.h>
10#include <sys/stat.h>
11#include <sys/param.h>
12#include <fcntl.h>
13#include <unistd.h>
5#include "symbol.h" 14#include "symbol.h"
6#include "thread.h" 15#include "strlist.h"
7 16
8#include "debug.h"
9
10#include <asm/bug.h>
11#include <libelf.h> 17#include <libelf.h>
12#include <gelf.h> 18#include <gelf.h>
13#include <elf.h> 19#include <elf.h>
@@ -18,22 +24,12 @@
18#define NT_GNU_BUILD_ID 3 24#define NT_GNU_BUILD_ID 3
19#endif 25#endif
20 26
21enum dso_origin {
22 DSO__ORIG_KERNEL = 0,
23 DSO__ORIG_JAVA_JIT,
24 DSO__ORIG_BUILD_ID_CACHE,
25 DSO__ORIG_FEDORA,
26 DSO__ORIG_UBUNTU,
27 DSO__ORIG_BUILDID,
28 DSO__ORIG_DSO,
29 DSO__ORIG_KMODULE,
30 DSO__ORIG_NOT_FOUND,
31};
32
33static void dsos__add(struct list_head *head, struct dso *dso); 27static void dsos__add(struct list_head *head, struct dso *dso);
34static struct map *map__new2(u64 start, struct dso *dso, enum map_type type); 28static struct map *map__new2(u64 start, struct dso *dso, enum map_type type);
35static int dso__load_kernel_sym(struct dso *self, struct map *map, 29static int dso__load_kernel_sym(struct dso *self, struct map *map,
36 symbol_filter_t filter); 30 symbol_filter_t filter);
31static int dso__load_guest_kernel_sym(struct dso *self, struct map *map,
32 symbol_filter_t filter);
37static int vmlinux_path__nr_entries; 33static int vmlinux_path__nr_entries;
38static char **vmlinux_path; 34static char **vmlinux_path;
39 35
@@ -126,16 +122,17 @@ static void map_groups__fixup_end(struct map_groups *self)
126static struct symbol *symbol__new(u64 start, u64 len, const char *name) 122static struct symbol *symbol__new(u64 start, u64 len, const char *name)
127{ 123{
128 size_t namelen = strlen(name) + 1; 124 size_t namelen = strlen(name) + 1;
129 struct symbol *self = zalloc(symbol_conf.priv_size + 125 struct symbol *self = calloc(1, (symbol_conf.priv_size +
130 sizeof(*self) + namelen); 126 sizeof(*self) + namelen));
131 if (self == NULL) 127 if (self == NULL)
132 return NULL; 128 return NULL;
133 129
134 if (symbol_conf.priv_size) 130 if (symbol_conf.priv_size)
135 self = ((void *)self) + symbol_conf.priv_size; 131 self = ((void *)self) + symbol_conf.priv_size;
136 132
137 self->start = start; 133 self->start = start;
138 self->end = len ? start + len - 1 : start; 134 self->end = len ? start + len - 1 : start;
135 self->namelen = namelen - 1;
139 136
140 pr_debug4("%s: %s %#Lx-%#Lx\n", __func__, name, start, self->end); 137 pr_debug4("%s: %s %#Lx-%#Lx\n", __func__, name, start, self->end);
141 138
@@ -178,7 +175,7 @@ static void dso__set_basename(struct dso *self)
178 175
179struct dso *dso__new(const char *name) 176struct dso *dso__new(const char *name)
180{ 177{
181 struct dso *self = zalloc(sizeof(*self) + strlen(name) + 1); 178 struct dso *self = calloc(1, sizeof(*self) + strlen(name) + 1);
182 179
183 if (self != NULL) { 180 if (self != NULL) {
184 int i; 181 int i;
@@ -192,6 +189,8 @@ struct dso *dso__new(const char *name)
192 self->loaded = 0; 189 self->loaded = 0;
193 self->sorted_by_name = 0; 190 self->sorted_by_name = 0;
194 self->has_build_id = 0; 191 self->has_build_id = 0;
192 self->kernel = DSO_TYPE_USER;
193 INIT_LIST_HEAD(&self->node);
195 } 194 }
196 195
197 return self; 196 return self;
@@ -408,12 +407,9 @@ int kallsyms__parse(const char *filename, void *arg,
408 char *symbol_name; 407 char *symbol_name;
409 408
410 line_len = getline(&line, &n, file); 409 line_len = getline(&line, &n, file);
411 if (line_len < 0) 410 if (line_len < 0 || !line)
412 break; 411 break;
413 412
414 if (!line)
415 goto out_failure;
416
417 line[--line_len] = '\0'; /* \n */ 413 line[--line_len] = '\0'; /* \n */
418 414
419 len = hex2u64(line, &start); 415 len = hex2u64(line, &start);
@@ -465,6 +461,7 @@ static int map__process_kallsym_symbol(void *arg, const char *name,
465 * map__split_kallsyms, when we have split the maps per module 461 * map__split_kallsyms, when we have split the maps per module
466 */ 462 */
467 symbols__insert(root, sym); 463 symbols__insert(root, sym);
464
468 return 0; 465 return 0;
469} 466}
470 467
@@ -489,6 +486,7 @@ static int dso__split_kallsyms(struct dso *self, struct map *map,
489 symbol_filter_t filter) 486 symbol_filter_t filter)
490{ 487{
491 struct map_groups *kmaps = map__kmap(map)->kmaps; 488 struct map_groups *kmaps = map__kmap(map)->kmaps;
489 struct machine *machine = kmaps->machine;
492 struct map *curr_map = map; 490 struct map *curr_map = map;
493 struct symbol *pos; 491 struct symbol *pos;
494 int count = 0; 492 int count = 0;
@@ -510,15 +508,33 @@ static int dso__split_kallsyms(struct dso *self, struct map *map,
510 *module++ = '\0'; 508 *module++ = '\0';
511 509
512 if (strcmp(curr_map->dso->short_name, module)) { 510 if (strcmp(curr_map->dso->short_name, module)) {
513 curr_map = map_groups__find_by_name(kmaps, map->type, module); 511 if (curr_map != map &&
512 self->kernel == DSO_TYPE_GUEST_KERNEL &&
513 machine__is_default_guest(machine)) {
514 /*
515 * We assume all symbols of a module are
516 * continuous in * kallsyms, so curr_map
517 * points to a module and all its
518 * symbols are in its kmap. Mark it as
519 * loaded.
520 */
521 dso__set_loaded(curr_map->dso,
522 curr_map->type);
523 }
524
525 curr_map = map_groups__find_by_name(kmaps,
526 map->type, module);
514 if (curr_map == NULL) { 527 if (curr_map == NULL) {
515 pr_debug("/proc/{kallsyms,modules} " 528 pr_debug("%s/proc/{kallsyms,modules} "
516 "inconsistency while looking " 529 "inconsistency while looking "
517 "for \"%s\" module!\n", module); 530 "for \"%s\" module!\n",
518 return -1; 531 machine->root_dir, module);
532 curr_map = map;
533 goto discard_symbol;
519 } 534 }
520 535
521 if (curr_map->dso->loaded) 536 if (curr_map->dso->loaded &&
537 !machine__is_default_guest(machine))
522 goto discard_symbol; 538 goto discard_symbol;
523 } 539 }
524 /* 540 /*
@@ -531,13 +547,21 @@ static int dso__split_kallsyms(struct dso *self, struct map *map,
531 char dso_name[PATH_MAX]; 547 char dso_name[PATH_MAX];
532 struct dso *dso; 548 struct dso *dso;
533 549
534 snprintf(dso_name, sizeof(dso_name), "[kernel].%d", 550 if (self->kernel == DSO_TYPE_GUEST_KERNEL)
535 kernel_range++); 551 snprintf(dso_name, sizeof(dso_name),
552 "[guest.kernel].%d",
553 kernel_range++);
554 else
555 snprintf(dso_name, sizeof(dso_name),
556 "[kernel].%d",
557 kernel_range++);
536 558
537 dso = dso__new(dso_name); 559 dso = dso__new(dso_name);
538 if (dso == NULL) 560 if (dso == NULL)
539 return -1; 561 return -1;
540 562
563 dso->kernel = self->kernel;
564
541 curr_map = map__new2(pos->start, dso, map->type); 565 curr_map = map__new2(pos->start, dso, map->type);
542 if (curr_map == NULL) { 566 if (curr_map == NULL) {
543 dso__delete(dso); 567 dso__delete(dso);
@@ -561,6 +585,12 @@ discard_symbol: rb_erase(&pos->rb_node, root);
561 } 585 }
562 } 586 }
563 587
588 if (curr_map != map &&
589 self->kernel == DSO_TYPE_GUEST_KERNEL &&
590 machine__is_default_guest(kmaps->machine)) {
591 dso__set_loaded(curr_map->dso, curr_map->type);
592 }
593
564 return count; 594 return count;
565} 595}
566 596
@@ -571,7 +601,10 @@ int dso__load_kallsyms(struct dso *self, const char *filename,
571 return -1; 601 return -1;
572 602
573 symbols__fixup_end(&self->symbols[map->type]); 603 symbols__fixup_end(&self->symbols[map->type]);
574 self->origin = DSO__ORIG_KERNEL; 604 if (self->kernel == DSO_TYPE_GUEST_KERNEL)
605 self->origin = DSO__ORIG_GUEST_KERNEL;
606 else
607 self->origin = DSO__ORIG_KERNEL;
575 608
576 return dso__split_kallsyms(self, map, filter); 609 return dso__split_kallsyms(self, map, filter);
577} 610}
@@ -870,8 +903,8 @@ out_close:
870 if (err == 0) 903 if (err == 0)
871 return nr; 904 return nr;
872out: 905out:
873 pr_warning("%s: problems reading %s PLT info.\n", 906 pr_debug("%s: problems reading %s PLT info.\n",
874 __func__, self->long_name); 907 __func__, self->long_name);
875 return 0; 908 return 0;
876} 909}
877 910
@@ -958,7 +991,7 @@ static int dso__load_sym(struct dso *self, struct map *map, const char *name,
958 nr_syms = shdr.sh_size / shdr.sh_entsize; 991 nr_syms = shdr.sh_size / shdr.sh_entsize;
959 992
960 memset(&sym, 0, sizeof(sym)); 993 memset(&sym, 0, sizeof(sym));
961 if (!self->kernel) { 994 if (self->kernel == DSO_TYPE_USER) {
962 self->adjust_symbols = (ehdr.e_type == ET_EXEC || 995 self->adjust_symbols = (ehdr.e_type == ET_EXEC ||
963 elf_section_by_name(elf, &ehdr, &shdr, 996 elf_section_by_name(elf, &ehdr, &shdr,
964 ".gnu.prelink_undo", 997 ".gnu.prelink_undo",
@@ -990,7 +1023,7 @@ static int dso__load_sym(struct dso *self, struct map *map, const char *name,
990 1023
991 section_name = elf_sec__name(&shdr, secstrs); 1024 section_name = elf_sec__name(&shdr, secstrs);
992 1025
993 if (self->kernel || kmodule) { 1026 if (self->kernel != DSO_TYPE_USER || kmodule) {
994 char dso_name[PATH_MAX]; 1027 char dso_name[PATH_MAX];
995 1028
996 if (strcmp(section_name, 1029 if (strcmp(section_name,
@@ -1017,6 +1050,7 @@ static int dso__load_sym(struct dso *self, struct map *map, const char *name,
1017 curr_dso = dso__new(dso_name); 1050 curr_dso = dso__new(dso_name);
1018 if (curr_dso == NULL) 1051 if (curr_dso == NULL)
1019 goto out_elf_end; 1052 goto out_elf_end;
1053 curr_dso->kernel = self->kernel;
1020 curr_map = map__new2(start, curr_dso, 1054 curr_map = map__new2(start, curr_dso,
1021 map->type); 1055 map->type);
1022 if (curr_map == NULL) { 1056 if (curr_map == NULL) {
@@ -1025,9 +1059,9 @@ static int dso__load_sym(struct dso *self, struct map *map, const char *name,
1025 } 1059 }
1026 curr_map->map_ip = identity__map_ip; 1060 curr_map->map_ip = identity__map_ip;
1027 curr_map->unmap_ip = identity__map_ip; 1061 curr_map->unmap_ip = identity__map_ip;
1028 curr_dso->origin = DSO__ORIG_KERNEL; 1062 curr_dso->origin = self->origin;
1029 map_groups__insert(kmap->kmaps, curr_map); 1063 map_groups__insert(kmap->kmaps, curr_map);
1030 dsos__add(&dsos__kernel, curr_dso); 1064 dsos__add(&self->node, curr_dso);
1031 dso__set_loaded(curr_dso, map->type); 1065 dso__set_loaded(curr_dso, map->type);
1032 } else 1066 } else
1033 curr_dso = curr_map->dso; 1067 curr_dso = curr_map->dso;
@@ -1089,7 +1123,7 @@ static bool dso__build_id_equal(const struct dso *self, u8 *build_id)
1089 return memcmp(self->build_id, build_id, sizeof(self->build_id)) == 0; 1123 return memcmp(self->build_id, build_id, sizeof(self->build_id)) == 0;
1090} 1124}
1091 1125
1092static bool __dsos__read_build_ids(struct list_head *head, bool with_hits) 1126bool __dsos__read_build_ids(struct list_head *head, bool with_hits)
1093{ 1127{
1094 bool have_build_id = false; 1128 bool have_build_id = false;
1095 struct dso *pos; 1129 struct dso *pos;
@@ -1107,13 +1141,6 @@ static bool __dsos__read_build_ids(struct list_head *head, bool with_hits)
1107 return have_build_id; 1141 return have_build_id;
1108} 1142}
1109 1143
1110bool dsos__read_build_ids(bool with_hits)
1111{
1112 bool kbuildids = __dsos__read_build_ids(&dsos__kernel, with_hits),
1113 ubuildids = __dsos__read_build_ids(&dsos__user, with_hits);
1114 return kbuildids || ubuildids;
1115}
1116
1117/* 1144/*
1118 * Align offset to 4 bytes as needed for note name and descriptor data. 1145 * Align offset to 4 bytes as needed for note name and descriptor data.
1119 */ 1146 */
@@ -1248,6 +1275,8 @@ char dso__symtab_origin(const struct dso *self)
1248 [DSO__ORIG_BUILDID] = 'b', 1275 [DSO__ORIG_BUILDID] = 'b',
1249 [DSO__ORIG_DSO] = 'd', 1276 [DSO__ORIG_DSO] = 'd',
1250 [DSO__ORIG_KMODULE] = 'K', 1277 [DSO__ORIG_KMODULE] = 'K',
1278 [DSO__ORIG_GUEST_KERNEL] = 'g',
1279 [DSO__ORIG_GUEST_KMODULE] = 'G',
1251 }; 1280 };
1252 1281
1253 if (self == NULL || self->origin == DSO__ORIG_NOT_FOUND) 1282 if (self == NULL || self->origin == DSO__ORIG_NOT_FOUND)
@@ -1263,11 +1292,20 @@ int dso__load(struct dso *self, struct map *map, symbol_filter_t filter)
1263 char build_id_hex[BUILD_ID_SIZE * 2 + 1]; 1292 char build_id_hex[BUILD_ID_SIZE * 2 + 1];
1264 int ret = -1; 1293 int ret = -1;
1265 int fd; 1294 int fd;
1295 struct machine *machine;
1296 const char *root_dir;
1266 1297
1267 dso__set_loaded(self, map->type); 1298 dso__set_loaded(self, map->type);
1268 1299
1269 if (self->kernel) 1300 if (self->kernel == DSO_TYPE_KERNEL)
1270 return dso__load_kernel_sym(self, map, filter); 1301 return dso__load_kernel_sym(self, map, filter);
1302 else if (self->kernel == DSO_TYPE_GUEST_KERNEL)
1303 return dso__load_guest_kernel_sym(self, map, filter);
1304
1305 if (map->groups && map->groups->machine)
1306 machine = map->groups->machine;
1307 else
1308 machine = NULL;
1271 1309
1272 name = malloc(size); 1310 name = malloc(size);
1273 if (!name) 1311 if (!name)
@@ -1321,6 +1359,13 @@ more:
1321 case DSO__ORIG_DSO: 1359 case DSO__ORIG_DSO:
1322 snprintf(name, size, "%s", self->long_name); 1360 snprintf(name, size, "%s", self->long_name);
1323 break; 1361 break;
1362 case DSO__ORIG_GUEST_KMODULE:
1363 if (map->groups && map->groups->machine)
1364 root_dir = map->groups->machine->root_dir;
1365 else
1366 root_dir = "";
1367 snprintf(name, size, "%s%s", root_dir, self->long_name);
1368 break;
1324 1369
1325 default: 1370 default:
1326 goto out; 1371 goto out;
@@ -1374,7 +1419,8 @@ struct map *map_groups__find_by_name(struct map_groups *self,
1374 return NULL; 1419 return NULL;
1375} 1420}
1376 1421
1377static int dso__kernel_module_get_build_id(struct dso *self) 1422static int dso__kernel_module_get_build_id(struct dso *self,
1423 const char *root_dir)
1378{ 1424{
1379 char filename[PATH_MAX]; 1425 char filename[PATH_MAX];
1380 /* 1426 /*
@@ -1384,8 +1430,8 @@ static int dso__kernel_module_get_build_id(struct dso *self)
1384 const char *name = self->short_name + 1; 1430 const char *name = self->short_name + 1;
1385 1431
1386 snprintf(filename, sizeof(filename), 1432 snprintf(filename, sizeof(filename),
1387 "/sys/module/%.*s/notes/.note.gnu.build-id", 1433 "%s/sys/module/%.*s/notes/.note.gnu.build-id",
1388 (int)strlen(name - 1), name); 1434 root_dir, (int)strlen(name) - 1, name);
1389 1435
1390 if (sysfs__read_build_id(filename, self->build_id, 1436 if (sysfs__read_build_id(filename, self->build_id,
1391 sizeof(self->build_id)) == 0) 1437 sizeof(self->build_id)) == 0)
@@ -1394,26 +1440,33 @@ static int dso__kernel_module_get_build_id(struct dso *self)
1394 return 0; 1440 return 0;
1395} 1441}
1396 1442
1397static int map_groups__set_modules_path_dir(struct map_groups *self, char *dirname) 1443static int map_groups__set_modules_path_dir(struct map_groups *self,
1444 const char *dir_name)
1398{ 1445{
1399 struct dirent *dent; 1446 struct dirent *dent;
1400 DIR *dir = opendir(dirname); 1447 DIR *dir = opendir(dir_name);
1401 1448
1402 if (!dir) { 1449 if (!dir) {
1403 pr_debug("%s: cannot open %s dir\n", __func__, dirname); 1450 pr_debug("%s: cannot open %s dir\n", __func__, dir_name);
1404 return -1; 1451 return -1;
1405 } 1452 }
1406 1453
1407 while ((dent = readdir(dir)) != NULL) { 1454 while ((dent = readdir(dir)) != NULL) {
1408 char path[PATH_MAX]; 1455 char path[PATH_MAX];
1456 struct stat st;
1409 1457
1410 if (dent->d_type == DT_DIR) { 1458 /*sshfs might return bad dent->d_type, so we have to stat*/
1459 sprintf(path, "%s/%s", dir_name, dent->d_name);
1460 if (stat(path, &st))
1461 continue;
1462
1463 if (S_ISDIR(st.st_mode)) {
1411 if (!strcmp(dent->d_name, ".") || 1464 if (!strcmp(dent->d_name, ".") ||
1412 !strcmp(dent->d_name, "..")) 1465 !strcmp(dent->d_name, ".."))
1413 continue; 1466 continue;
1414 1467
1415 snprintf(path, sizeof(path), "%s/%s", 1468 snprintf(path, sizeof(path), "%s/%s",
1416 dirname, dent->d_name); 1469 dir_name, dent->d_name);
1417 if (map_groups__set_modules_path_dir(self, path) < 0) 1470 if (map_groups__set_modules_path_dir(self, path) < 0)
1418 goto failure; 1471 goto failure;
1419 } else { 1472 } else {
@@ -1433,13 +1486,13 @@ static int map_groups__set_modules_path_dir(struct map_groups *self, char *dirna
1433 continue; 1486 continue;
1434 1487
1435 snprintf(path, sizeof(path), "%s/%s", 1488 snprintf(path, sizeof(path), "%s/%s",
1436 dirname, dent->d_name); 1489 dir_name, dent->d_name);
1437 1490
1438 long_name = strdup(path); 1491 long_name = strdup(path);
1439 if (long_name == NULL) 1492 if (long_name == NULL)
1440 goto failure; 1493 goto failure;
1441 dso__set_long_name(map->dso, long_name); 1494 dso__set_long_name(map->dso, long_name);
1442 dso__kernel_module_get_build_id(map->dso); 1495 dso__kernel_module_get_build_id(map->dso, "");
1443 } 1496 }
1444 } 1497 }
1445 1498
@@ -1449,18 +1502,47 @@ failure:
1449 return -1; 1502 return -1;
1450} 1503}
1451 1504
1452static int map_groups__set_modules_path(struct map_groups *self) 1505static char *get_kernel_version(const char *root_dir)
1453{ 1506{
1454 struct utsname uts; 1507 char version[PATH_MAX];
1508 FILE *file;
1509 char *name, *tmp;
1510 const char *prefix = "Linux version ";
1511
1512 sprintf(version, "%s/proc/version", root_dir);
1513 file = fopen(version, "r");
1514 if (!file)
1515 return NULL;
1516
1517 version[0] = '\0';
1518 tmp = fgets(version, sizeof(version), file);
1519 fclose(file);
1520
1521 name = strstr(version, prefix);
1522 if (!name)
1523 return NULL;
1524 name += strlen(prefix);
1525 tmp = strchr(name, ' ');
1526 if (tmp)
1527 *tmp = '\0';
1528
1529 return strdup(name);
1530}
1531
1532static int machine__set_modules_path(struct machine *self)
1533{
1534 char *version;
1455 char modules_path[PATH_MAX]; 1535 char modules_path[PATH_MAX];
1456 1536
1457 if (uname(&uts) < 0) 1537 version = get_kernel_version(self->root_dir);
1538 if (!version)
1458 return -1; 1539 return -1;
1459 1540
1460 snprintf(modules_path, sizeof(modules_path), "/lib/modules/%s/kernel", 1541 snprintf(modules_path, sizeof(modules_path), "%s/lib/modules/%s/kernel",
1461 uts.release); 1542 self->root_dir, version);
1543 free(version);
1462 1544
1463 return map_groups__set_modules_path_dir(self, modules_path); 1545 return map_groups__set_modules_path_dir(&self->kmaps, modules_path);
1464} 1546}
1465 1547
1466/* 1548/*
@@ -1470,8 +1552,8 @@ static int map_groups__set_modules_path(struct map_groups *self)
1470 */ 1552 */
1471static struct map *map__new2(u64 start, struct dso *dso, enum map_type type) 1553static struct map *map__new2(u64 start, struct dso *dso, enum map_type type)
1472{ 1554{
1473 struct map *self = zalloc(sizeof(*self) + 1555 struct map *self = calloc(1, (sizeof(*self) +
1474 (dso->kernel ? sizeof(struct kmap) : 0)); 1556 (dso->kernel ? sizeof(struct kmap) : 0)));
1475 if (self != NULL) { 1557 if (self != NULL) {
1476 /* 1558 /*
1477 * ->end will be filled after we load all the symbols 1559 * ->end will be filled after we load all the symbols
@@ -1482,11 +1564,11 @@ static struct map *map__new2(u64 start, struct dso *dso, enum map_type type)
1482 return self; 1564 return self;
1483} 1565}
1484 1566
1485struct map *map_groups__new_module(struct map_groups *self, u64 start, 1567struct map *machine__new_module(struct machine *self, u64 start,
1486 const char *filename) 1568 const char *filename)
1487{ 1569{
1488 struct map *map; 1570 struct map *map;
1489 struct dso *dso = __dsos__findnew(&dsos__kernel, filename); 1571 struct dso *dso = __dsos__findnew(&self->kernel_dsos, filename);
1490 1572
1491 if (dso == NULL) 1573 if (dso == NULL)
1492 return NULL; 1574 return NULL;
@@ -1495,18 +1577,31 @@ struct map *map_groups__new_module(struct map_groups *self, u64 start,
1495 if (map == NULL) 1577 if (map == NULL)
1496 return NULL; 1578 return NULL;
1497 1579
1498 dso->origin = DSO__ORIG_KMODULE; 1580 if (machine__is_host(self))
1499 map_groups__insert(self, map); 1581 dso->origin = DSO__ORIG_KMODULE;
1582 else
1583 dso->origin = DSO__ORIG_GUEST_KMODULE;
1584 map_groups__insert(&self->kmaps, map);
1500 return map; 1585 return map;
1501} 1586}
1502 1587
1503static int map_groups__create_modules(struct map_groups *self) 1588static int machine__create_modules(struct machine *self)
1504{ 1589{
1505 char *line = NULL; 1590 char *line = NULL;
1506 size_t n; 1591 size_t n;
1507 FILE *file = fopen("/proc/modules", "r"); 1592 FILE *file;
1508 struct map *map; 1593 struct map *map;
1594 const char *modules;
1595 char path[PATH_MAX];
1596
1597 if (machine__is_default_guest(self))
1598 modules = symbol_conf.default_guest_modules;
1599 else {
1600 sprintf(path, "%s/proc/modules", self->root_dir);
1601 modules = path;
1602 }
1509 1603
1604 file = fopen(modules, "r");
1510 if (file == NULL) 1605 if (file == NULL)
1511 return -1; 1606 return -1;
1512 1607
@@ -1538,16 +1633,16 @@ static int map_groups__create_modules(struct map_groups *self)
1538 *sep = '\0'; 1633 *sep = '\0';
1539 1634
1540 snprintf(name, sizeof(name), "[%s]", line); 1635 snprintf(name, sizeof(name), "[%s]", line);
1541 map = map_groups__new_module(self, start, name); 1636 map = machine__new_module(self, start, name);
1542 if (map == NULL) 1637 if (map == NULL)
1543 goto out_delete_line; 1638 goto out_delete_line;
1544 dso__kernel_module_get_build_id(map->dso); 1639 dso__kernel_module_get_build_id(map->dso, self->root_dir);
1545 } 1640 }
1546 1641
1547 free(line); 1642 free(line);
1548 fclose(file); 1643 fclose(file);
1549 1644
1550 return map_groups__set_modules_path(self); 1645 return machine__set_modules_path(self);
1551 1646
1552out_delete_line: 1647out_delete_line:
1553 free(line); 1648 free(line);
@@ -1714,8 +1809,56 @@ out_fixup:
1714 return err; 1809 return err;
1715} 1810}
1716 1811
1717LIST_HEAD(dsos__user); 1812static int dso__load_guest_kernel_sym(struct dso *self, struct map *map,
1718LIST_HEAD(dsos__kernel); 1813 symbol_filter_t filter)
1814{
1815 int err;
1816 const char *kallsyms_filename = NULL;
1817 struct machine *machine;
1818 char path[PATH_MAX];
1819
1820 if (!map->groups) {
1821 pr_debug("Guest kernel map hasn't the point to groups\n");
1822 return -1;
1823 }
1824 machine = map->groups->machine;
1825
1826 if (machine__is_default_guest(machine)) {
1827 /*
1828 * if the user specified a vmlinux filename, use it and only
1829 * it, reporting errors to the user if it cannot be used.
1830 * Or use file guest_kallsyms inputted by user on commandline
1831 */
1832 if (symbol_conf.default_guest_vmlinux_name != NULL) {
1833 err = dso__load_vmlinux(self, map,
1834 symbol_conf.default_guest_vmlinux_name, filter);
1835 goto out_try_fixup;
1836 }
1837
1838 kallsyms_filename = symbol_conf.default_guest_kallsyms;
1839 if (!kallsyms_filename)
1840 return -1;
1841 } else {
1842 sprintf(path, "%s/proc/kallsyms", machine->root_dir);
1843 kallsyms_filename = path;
1844 }
1845
1846 err = dso__load_kallsyms(self, kallsyms_filename, map, filter);
1847 if (err > 0)
1848 pr_debug("Using %s for symbols\n", kallsyms_filename);
1849
1850out_try_fixup:
1851 if (err > 0) {
1852 if (kallsyms_filename != NULL) {
1853 machine__mmap_name(machine, path, sizeof(path));
1854 dso__set_long_name(self, strdup(path));
1855 }
1856 map__fixup_start(map);
1857 map__fixup_end(map);
1858 }
1859
1860 return err;
1861}
1719 1862
1720static void dsos__add(struct list_head *head, struct dso *dso) 1863static void dsos__add(struct list_head *head, struct dso *dso)
1721{ 1864{
@@ -1747,21 +1890,32 @@ struct dso *__dsos__findnew(struct list_head *head, const char *name)
1747 return dso; 1890 return dso;
1748} 1891}
1749 1892
1750static void __dsos__fprintf(struct list_head *head, FILE *fp) 1893size_t __dsos__fprintf(struct list_head *head, FILE *fp)
1751{ 1894{
1752 struct dso *pos; 1895 struct dso *pos;
1896 size_t ret = 0;
1753 1897
1754 list_for_each_entry(pos, head, node) { 1898 list_for_each_entry(pos, head, node) {
1755 int i; 1899 int i;
1756 for (i = 0; i < MAP__NR_TYPES; ++i) 1900 for (i = 0; i < MAP__NR_TYPES; ++i)
1757 dso__fprintf(pos, i, fp); 1901 ret += dso__fprintf(pos, i, fp);
1758 } 1902 }
1903
1904 return ret;
1759} 1905}
1760 1906
1761void dsos__fprintf(FILE *fp) 1907size_t machines__fprintf_dsos(struct rb_root *self, FILE *fp)
1762{ 1908{
1763 __dsos__fprintf(&dsos__kernel, fp); 1909 struct rb_node *nd;
1764 __dsos__fprintf(&dsos__user, fp); 1910 size_t ret = 0;
1911
1912 for (nd = rb_first(self); nd; nd = rb_next(nd)) {
1913 struct machine *pos = rb_entry(nd, struct machine, rb_node);
1914 ret += __dsos__fprintf(&pos->kernel_dsos, fp);
1915 ret += __dsos__fprintf(&pos->user_dsos, fp);
1916 }
1917
1918 return ret;
1765} 1919}
1766 1920
1767static size_t __dsos__fprintf_buildid(struct list_head *head, FILE *fp, 1921static size_t __dsos__fprintf_buildid(struct list_head *head, FILE *fp,
@@ -1779,10 +1933,17 @@ static size_t __dsos__fprintf_buildid(struct list_head *head, FILE *fp,
1779 return ret; 1933 return ret;
1780} 1934}
1781 1935
1782size_t dsos__fprintf_buildid(FILE *fp, bool with_hits) 1936size_t machines__fprintf_dsos_buildid(struct rb_root *self, FILE *fp, bool with_hits)
1783{ 1937{
1784 return (__dsos__fprintf_buildid(&dsos__kernel, fp, with_hits) + 1938 struct rb_node *nd;
1785 __dsos__fprintf_buildid(&dsos__user, fp, with_hits)); 1939 size_t ret = 0;
1940
1941 for (nd = rb_first(self); nd; nd = rb_next(nd)) {
1942 struct machine *pos = rb_entry(nd, struct machine, rb_node);
1943 ret += __dsos__fprintf_buildid(&pos->kernel_dsos, fp, with_hits);
1944 ret += __dsos__fprintf_buildid(&pos->user_dsos, fp, with_hits);
1945 }
1946 return ret;
1786} 1947}
1787 1948
1788struct dso *dso__new_kernel(const char *name) 1949struct dso *dso__new_kernel(const char *name)
@@ -1791,55 +1952,98 @@ struct dso *dso__new_kernel(const char *name)
1791 1952
1792 if (self != NULL) { 1953 if (self != NULL) {
1793 dso__set_short_name(self, "[kernel]"); 1954 dso__set_short_name(self, "[kernel]");
1794 self->kernel = 1; 1955 self->kernel = DSO_TYPE_KERNEL;
1795 } 1956 }
1796 1957
1797 return self; 1958 return self;
1798} 1959}
1799 1960
1800void dso__read_running_kernel_build_id(struct dso *self) 1961static struct dso *dso__new_guest_kernel(struct machine *machine,
1962 const char *name)
1801{ 1963{
1802 if (sysfs__read_build_id("/sys/kernel/notes", self->build_id, 1964 char bf[PATH_MAX];
1965 struct dso *self = dso__new(name ?: machine__mmap_name(machine, bf, sizeof(bf)));
1966
1967 if (self != NULL) {
1968 dso__set_short_name(self, "[guest.kernel]");
1969 self->kernel = DSO_TYPE_GUEST_KERNEL;
1970 }
1971
1972 return self;
1973}
1974
1975void dso__read_running_kernel_build_id(struct dso *self, struct machine *machine)
1976{
1977 char path[PATH_MAX];
1978
1979 if (machine__is_default_guest(machine))
1980 return;
1981 sprintf(path, "%s/sys/kernel/notes", machine->root_dir);
1982 if (sysfs__read_build_id(path, self->build_id,
1803 sizeof(self->build_id)) == 0) 1983 sizeof(self->build_id)) == 0)
1804 self->has_build_id = true; 1984 self->has_build_id = true;
1805} 1985}
1806 1986
1807static struct dso *dsos__create_kernel(const char *vmlinux) 1987static struct dso *machine__create_kernel(struct machine *self)
1808{ 1988{
1809 struct dso *kernel = dso__new_kernel(vmlinux); 1989 const char *vmlinux_name = NULL;
1990 struct dso *kernel;
1810 1991
1811 if (kernel != NULL) { 1992 if (machine__is_host(self)) {
1812 dso__read_running_kernel_build_id(kernel); 1993 vmlinux_name = symbol_conf.vmlinux_name;
1813 dsos__add(&dsos__kernel, kernel); 1994 kernel = dso__new_kernel(vmlinux_name);
1995 } else {
1996 if (machine__is_default_guest(self))
1997 vmlinux_name = symbol_conf.default_guest_vmlinux_name;
1998 kernel = dso__new_guest_kernel(self, vmlinux_name);
1814 } 1999 }
1815 2000
2001 if (kernel != NULL) {
2002 dso__read_running_kernel_build_id(kernel, self);
2003 dsos__add(&self->kernel_dsos, kernel);
2004 }
1816 return kernel; 2005 return kernel;
1817} 2006}
1818 2007
1819int __map_groups__create_kernel_maps(struct map_groups *self, 2008int __machine__create_kernel_maps(struct machine *self, struct dso *kernel)
1820 struct map *vmlinux_maps[MAP__NR_TYPES],
1821 struct dso *kernel)
1822{ 2009{
1823 enum map_type type; 2010 enum map_type type;
1824 2011
1825 for (type = 0; type < MAP__NR_TYPES; ++type) { 2012 for (type = 0; type < MAP__NR_TYPES; ++type) {
1826 struct kmap *kmap; 2013 struct kmap *kmap;
1827 2014
1828 vmlinux_maps[type] = map__new2(0, kernel, type); 2015 self->vmlinux_maps[type] = map__new2(0, kernel, type);
1829 if (vmlinux_maps[type] == NULL) 2016 if (self->vmlinux_maps[type] == NULL)
1830 return -1; 2017 return -1;
1831 2018
1832 vmlinux_maps[type]->map_ip = 2019 self->vmlinux_maps[type]->map_ip =
1833 vmlinux_maps[type]->unmap_ip = identity__map_ip; 2020 self->vmlinux_maps[type]->unmap_ip = identity__map_ip;
1834 2021
1835 kmap = map__kmap(vmlinux_maps[type]); 2022 kmap = map__kmap(self->vmlinux_maps[type]);
1836 kmap->kmaps = self; 2023 kmap->kmaps = &self->kmaps;
1837 map_groups__insert(self, vmlinux_maps[type]); 2024 map_groups__insert(&self->kmaps, self->vmlinux_maps[type]);
1838 } 2025 }
1839 2026
1840 return 0; 2027 return 0;
1841} 2028}
1842 2029
2030int machine__create_kernel_maps(struct machine *self)
2031{
2032 struct dso *kernel = machine__create_kernel(self);
2033
2034 if (kernel == NULL ||
2035 __machine__create_kernel_maps(self, kernel) < 0)
2036 return -1;
2037
2038 if (symbol_conf.use_modules && machine__create_modules(self) < 0)
2039 pr_debug("Problems creating module maps, continuing anyway...\n");
2040 /*
2041 * Now that we have all the maps created, just set the ->end of them:
2042 */
2043 map_groups__fixup_end(&self->kmaps);
2044 return 0;
2045}
2046
1843static void vmlinux_path__exit(void) 2047static void vmlinux_path__exit(void)
1844{ 2048{
1845 while (--vmlinux_path__nr_entries >= 0) { 2049 while (--vmlinux_path__nr_entries >= 0) {
@@ -1895,6 +2099,17 @@ out_fail:
1895 return -1; 2099 return -1;
1896} 2100}
1897 2101
2102size_t vmlinux_path__fprintf(FILE *fp)
2103{
2104 int i;
2105 size_t printed = 0;
2106
2107 for (i = 0; i < vmlinux_path__nr_entries; ++i)
2108 printed += fprintf(fp, "[%d] %s\n", i, vmlinux_path[i]);
2109
2110 return printed;
2111}
2112
1898static int setup_list(struct strlist **list, const char *list_str, 2113static int setup_list(struct strlist **list, const char *list_str,
1899 const char *list_name) 2114 const char *list_name)
1900{ 2115{
@@ -1945,22 +2160,129 @@ out_free_comm_list:
1945 return -1; 2160 return -1;
1946} 2161}
1947 2162
1948int map_groups__create_kernel_maps(struct map_groups *self, 2163int machines__create_kernel_maps(struct rb_root *self, pid_t pid)
1949 struct map *vmlinux_maps[MAP__NR_TYPES])
1950{ 2164{
1951 struct dso *kernel = dsos__create_kernel(symbol_conf.vmlinux_name); 2165 struct machine *machine = machines__findnew(self, pid);
1952 2166
1953 if (kernel == NULL) 2167 if (machine == NULL)
1954 return -1; 2168 return -1;
1955 2169
1956 if (__map_groups__create_kernel_maps(self, vmlinux_maps, kernel) < 0) 2170 return machine__create_kernel_maps(machine);
1957 return -1; 2171}
1958 2172
1959 if (symbol_conf.use_modules && map_groups__create_modules(self) < 0) 2173static int hex(char ch)
1960 pr_debug("Problems creating module maps, continuing anyway...\n"); 2174{
1961 /* 2175 if ((ch >= '0') && (ch <= '9'))
1962 * Now that we have all the maps created, just set the ->end of them: 2176 return ch - '0';
1963 */ 2177 if ((ch >= 'a') && (ch <= 'f'))
1964 map_groups__fixup_end(self); 2178 return ch - 'a' + 10;
1965 return 0; 2179 if ((ch >= 'A') && (ch <= 'F'))
2180 return ch - 'A' + 10;
2181 return -1;
2182}
2183
2184/*
2185 * While we find nice hex chars, build a long_val.
2186 * Return number of chars processed.
2187 */
2188int hex2u64(const char *ptr, u64 *long_val)
2189{
2190 const char *p = ptr;
2191 *long_val = 0;
2192
2193 while (*p) {
2194 const int hex_val = hex(*p);
2195
2196 if (hex_val < 0)
2197 break;
2198
2199 *long_val = (*long_val << 4) | hex_val;
2200 p++;
2201 }
2202
2203 return p - ptr;
2204}
2205
2206char *strxfrchar(char *s, char from, char to)
2207{
2208 char *p = s;
2209
2210 while ((p = strchr(p, from)) != NULL)
2211 *p++ = to;
2212
2213 return s;
2214}
2215
2216int machines__create_guest_kernel_maps(struct rb_root *self)
2217{
2218 int ret = 0;
2219 struct dirent **namelist = NULL;
2220 int i, items = 0;
2221 char path[PATH_MAX];
2222 pid_t pid;
2223
2224 if (symbol_conf.default_guest_vmlinux_name ||
2225 symbol_conf.default_guest_modules ||
2226 symbol_conf.default_guest_kallsyms) {
2227 machines__create_kernel_maps(self, DEFAULT_GUEST_KERNEL_ID);
2228 }
2229
2230 if (symbol_conf.guestmount) {
2231 items = scandir(symbol_conf.guestmount, &namelist, NULL, NULL);
2232 if (items <= 0)
2233 return -ENOENT;
2234 for (i = 0; i < items; i++) {
2235 if (!isdigit(namelist[i]->d_name[0])) {
2236 /* Filter out . and .. */
2237 continue;
2238 }
2239 pid = atoi(namelist[i]->d_name);
2240 sprintf(path, "%s/%s/proc/kallsyms",
2241 symbol_conf.guestmount,
2242 namelist[i]->d_name);
2243 ret = access(path, R_OK);
2244 if (ret) {
2245 pr_debug("Can't access file %s\n", path);
2246 goto failure;
2247 }
2248 machines__create_kernel_maps(self, pid);
2249 }
2250failure:
2251 free(namelist);
2252 }
2253
2254 return ret;
2255}
2256
2257int machine__load_kallsyms(struct machine *self, const char *filename,
2258 enum map_type type, symbol_filter_t filter)
2259{
2260 struct map *map = self->vmlinux_maps[type];
2261 int ret = dso__load_kallsyms(map->dso, filename, map, filter);
2262
2263 if (ret > 0) {
2264 dso__set_loaded(map->dso, type);
2265 /*
2266 * Since /proc/kallsyms will have multiple sessions for the
2267 * kernel, with modules between them, fixup the end of all
2268 * sections.
2269 */
2270 __map_groups__fixup_end(&self->kmaps, type);
2271 }
2272
2273 return ret;
2274}
2275
2276int machine__load_vmlinux_path(struct machine *self, enum map_type type,
2277 symbol_filter_t filter)
2278{
2279 struct map *map = self->vmlinux_maps[type];
2280 int ret = dso__load_vmlinux_path(map->dso, map, filter);
2281
2282 if (ret > 0) {
2283 dso__set_loaded(map->dso, type);
2284 map__reloc_vmlinux(map);
2285 }
2286
2287 return ret;
1966} 2288}
diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h
index f30a37428919..032469e41876 100644
--- a/tools/perf/util/symbol.h
+++ b/tools/perf/util/symbol.h
@@ -3,10 +3,11 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <stdbool.h> 5#include <stdbool.h>
6#include "types.h" 6#include <stdint.h>
7#include "map.h"
7#include <linux/list.h> 8#include <linux/list.h>
8#include <linux/rbtree.h> 9#include <linux/rbtree.h>
9#include "event.h" 10#include <stdio.h>
10 11
11#define DEBUG_CACHE_DIR ".debug" 12#define DEBUG_CACHE_DIR ".debug"
12 13
@@ -29,6 +30,9 @@ static inline char *bfd_demangle(void __used *v, const char __used *c,
29#endif 30#endif
30#endif 31#endif
31 32
33int hex2u64(const char *ptr, u64 *val);
34char *strxfrchar(char *s, char from, char to);
35
32/* 36/*
33 * libelf 0.8.x and earlier do not support ELF_C_READ_MMAP; 37 * libelf 0.8.x and earlier do not support ELF_C_READ_MMAP;
34 * for newer versions we can use mmap to reduce memory usage: 38 * for newer versions we can use mmap to reduce memory usage:
@@ -44,10 +48,13 @@ static inline char *bfd_demangle(void __used *v, const char __used *c,
44#define DMGL_ANSI (1 << 1) /* Include const, volatile, etc */ 48#define DMGL_ANSI (1 << 1) /* Include const, volatile, etc */
45#endif 49#endif
46 50
51#define BUILD_ID_SIZE 20
52
47struct symbol { 53struct symbol {
48 struct rb_node rb_node; 54 struct rb_node rb_node;
49 u64 start; 55 u64 start;
50 u64 end; 56 u64 end;
57 u16 namelen;
51 char name[0]; 58 char name[0];
52}; 59};
53 60
@@ -63,10 +70,15 @@ struct symbol_conf {
63 show_nr_samples, 70 show_nr_samples,
64 use_callchain, 71 use_callchain,
65 exclude_other, 72 exclude_other,
66 full_paths; 73 full_paths,
74 show_cpu_utilization;
67 const char *vmlinux_name, 75 const char *vmlinux_name,
68 *field_sep; 76 *field_sep;
69 char *dso_list_str, 77 const char *default_guest_vmlinux_name,
78 *default_guest_kallsyms,
79 *default_guest_modules;
80 const char *guestmount;
81 const char *dso_list_str,
70 *comm_list_str, 82 *comm_list_str,
71 *sym_list_str, 83 *sym_list_str,
72 *col_width_list_str; 84 *col_width_list_str;
@@ -88,6 +100,11 @@ struct ref_reloc_sym {
88 u64 unrelocated_addr; 100 u64 unrelocated_addr;
89}; 101};
90 102
103struct map_symbol {
104 struct map *map;
105 struct symbol *sym;
106};
107
91struct addr_location { 108struct addr_location {
92 struct thread *thread; 109 struct thread *thread;
93 struct map *map; 110 struct map *map;
@@ -95,6 +112,13 @@ struct addr_location {
95 u64 addr; 112 u64 addr;
96 char level; 113 char level;
97 bool filtered; 114 bool filtered;
115 unsigned int cpumode;
116};
117
118enum dso_kernel_type {
119 DSO_TYPE_USER = 0,
120 DSO_TYPE_KERNEL,
121 DSO_TYPE_GUEST_KERNEL
98}; 122};
99 123
100struct dso { 124struct dso {
@@ -104,8 +128,9 @@ struct dso {
104 u8 adjust_symbols:1; 128 u8 adjust_symbols:1;
105 u8 slen_calculated:1; 129 u8 slen_calculated:1;
106 u8 has_build_id:1; 130 u8 has_build_id:1;
107 u8 kernel:1; 131 enum dso_kernel_type kernel;
108 u8 hit:1; 132 u8 hit:1;
133 u8 annotate_warned:1;
109 unsigned char origin; 134 unsigned char origin;
110 u8 sorted_by_name; 135 u8 sorted_by_name;
111 u8 loaded; 136 u8 loaded;
@@ -131,42 +156,65 @@ static inline void dso__set_loaded(struct dso *self, enum map_type type)
131 156
132void dso__sort_by_name(struct dso *self, enum map_type type); 157void dso__sort_by_name(struct dso *self, enum map_type type);
133 158
134extern struct list_head dsos__user, dsos__kernel;
135
136struct dso *__dsos__findnew(struct list_head *head, const char *name); 159struct dso *__dsos__findnew(struct list_head *head, const char *name);
137 160
138static inline struct dso *dsos__findnew(const char *name)
139{
140 return __dsos__findnew(&dsos__user, name);
141}
142
143int dso__load(struct dso *self, struct map *map, symbol_filter_t filter); 161int dso__load(struct dso *self, struct map *map, symbol_filter_t filter);
144int dso__load_vmlinux_path(struct dso *self, struct map *map, 162int dso__load_vmlinux_path(struct dso *self, struct map *map,
145 symbol_filter_t filter); 163 symbol_filter_t filter);
146int dso__load_kallsyms(struct dso *self, const char *filename, struct map *map, 164int dso__load_kallsyms(struct dso *self, const char *filename, struct map *map,
147 symbol_filter_t filter); 165 symbol_filter_t filter);
148void dsos__fprintf(FILE *fp); 166int machine__load_kallsyms(struct machine *self, const char *filename,
149size_t dsos__fprintf_buildid(FILE *fp, bool with_hits); 167 enum map_type type, symbol_filter_t filter);
168int machine__load_vmlinux_path(struct machine *self, enum map_type type,
169 symbol_filter_t filter);
170
171size_t __dsos__fprintf(struct list_head *head, FILE *fp);
172
173size_t machines__fprintf_dsos(struct rb_root *self, FILE *fp);
174size_t machines__fprintf_dsos_buildid(struct rb_root *self, FILE *fp, bool with_hits);
150 175
151size_t dso__fprintf_buildid(struct dso *self, FILE *fp); 176size_t dso__fprintf_buildid(struct dso *self, FILE *fp);
152size_t dso__fprintf(struct dso *self, enum map_type type, FILE *fp); 177size_t dso__fprintf(struct dso *self, enum map_type type, FILE *fp);
178
179enum dso_origin {
180 DSO__ORIG_KERNEL = 0,
181 DSO__ORIG_GUEST_KERNEL,
182 DSO__ORIG_JAVA_JIT,
183 DSO__ORIG_BUILD_ID_CACHE,
184 DSO__ORIG_FEDORA,
185 DSO__ORIG_UBUNTU,
186 DSO__ORIG_BUILDID,
187 DSO__ORIG_DSO,
188 DSO__ORIG_GUEST_KMODULE,
189 DSO__ORIG_KMODULE,
190 DSO__ORIG_NOT_FOUND,
191};
192
153char dso__symtab_origin(const struct dso *self); 193char dso__symtab_origin(const struct dso *self);
154void dso__set_long_name(struct dso *self, char *name); 194void dso__set_long_name(struct dso *self, char *name);
155void dso__set_build_id(struct dso *self, void *build_id); 195void dso__set_build_id(struct dso *self, void *build_id);
156void dso__read_running_kernel_build_id(struct dso *self); 196void dso__read_running_kernel_build_id(struct dso *self, struct machine *machine);
157struct symbol *dso__find_symbol(struct dso *self, enum map_type type, u64 addr); 197struct symbol *dso__find_symbol(struct dso *self, enum map_type type, u64 addr);
158struct symbol *dso__find_symbol_by_name(struct dso *self, enum map_type type, 198struct symbol *dso__find_symbol_by_name(struct dso *self, enum map_type type,
159 const char *name); 199 const char *name);
160 200
161int filename__read_build_id(const char *filename, void *bf, size_t size); 201int filename__read_build_id(const char *filename, void *bf, size_t size);
162int sysfs__read_build_id(const char *filename, void *bf, size_t size); 202int sysfs__read_build_id(const char *filename, void *bf, size_t size);
163bool dsos__read_build_ids(bool with_hits); 203bool __dsos__read_build_ids(struct list_head *head, bool with_hits);
164int build_id__sprintf(const u8 *self, int len, char *bf); 204int build_id__sprintf(const u8 *self, int len, char *bf);
165int kallsyms__parse(const char *filename, void *arg, 205int kallsyms__parse(const char *filename, void *arg,
166 int (*process_symbol)(void *arg, const char *name, 206 int (*process_symbol)(void *arg, const char *name,
167 char type, u64 start)); 207 char type, u64 start));
168 208
209int __machine__create_kernel_maps(struct machine *self, struct dso *kernel);
210int machine__create_kernel_maps(struct machine *self);
211
212int machines__create_kernel_maps(struct rb_root *self, pid_t pid);
213int machines__create_guest_kernel_maps(struct rb_root *self);
214
169int symbol__init(void); 215int symbol__init(void);
170bool symbol_type__is_a(char symbol_type, enum map_type map_type); 216bool symbol_type__is_a(char symbol_type, enum map_type map_type);
171 217
218size_t vmlinux_path__fprintf(FILE *fp);
219
172#endif /* __PERF_SYMBOL */ 220#endif /* __PERF_SYMBOL */
diff --git a/tools/perf/util/thread.c b/tools/perf/util/thread.c
index fa968312ee7d..1f7ecd47f499 100644
--- a/tools/perf/util/thread.c
+++ b/tools/perf/util/thread.c
@@ -7,13 +7,35 @@
7#include "util.h" 7#include "util.h"
8#include "debug.h" 8#include "debug.h"
9 9
10void map_groups__init(struct map_groups *self) 10int find_all_tid(int pid, pid_t ** all_tid)
11{ 11{
12 char name[256];
13 int items;
14 struct dirent **namelist = NULL;
15 int ret = 0;
12 int i; 16 int i;
13 for (i = 0; i < MAP__NR_TYPES; ++i) { 17
14 self->maps[i] = RB_ROOT; 18 sprintf(name, "/proc/%d/task", pid);
15 INIT_LIST_HEAD(&self->removed_maps[i]); 19 items = scandir(name, &namelist, NULL, NULL);
20 if (items <= 0)
21 return -ENOENT;
22 *all_tid = malloc(sizeof(pid_t) * items);
23 if (!*all_tid) {
24 ret = -ENOMEM;
25 goto failure;
16 } 26 }
27
28 for (i = 0; i < items; i++)
29 (*all_tid)[i] = atoi(namelist[i]->d_name);
30
31 ret = items;
32
33failure:
34 for (i=0; i<items; i++)
35 free(namelist[i]);
36 free(namelist);
37
38 return ret;
17} 39}
18 40
19static struct thread *thread__new(pid_t pid) 41static struct thread *thread__new(pid_t pid)
@@ -31,28 +53,6 @@ static struct thread *thread__new(pid_t pid)
31 return self; 53 return self;
32} 54}
33 55
34static void map_groups__flush(struct map_groups *self)
35{
36 int type;
37
38 for (type = 0; type < MAP__NR_TYPES; type++) {
39 struct rb_root *root = &self->maps[type];
40 struct rb_node *next = rb_first(root);
41
42 while (next) {
43 struct map *pos = rb_entry(next, struct map, rb_node);
44 next = rb_next(&pos->rb_node);
45 rb_erase(&pos->rb_node, root);
46 /*
47 * We may have references to this map, for
48 * instance in some hist_entry instances, so
49 * just move them to a separate list.
50 */
51 list_add_tail(&pos->node, &self->removed_maps[pos->type]);
52 }
53 }
54}
55
56int thread__set_comm(struct thread *self, const char *comm) 56int thread__set_comm(struct thread *self, const char *comm)
57{ 57{
58 int err; 58 int err;
@@ -79,69 +79,10 @@ int thread__comm_len(struct thread *self)
79 return self->comm_len; 79 return self->comm_len;
80} 80}
81 81
82size_t __map_groups__fprintf_maps(struct map_groups *self,
83 enum map_type type, FILE *fp)
84{
85 size_t printed = fprintf(fp, "%s:\n", map_type__name[type]);
86 struct rb_node *nd;
87
88 for (nd = rb_first(&self->maps[type]); nd; nd = rb_next(nd)) {
89 struct map *pos = rb_entry(nd, struct map, rb_node);
90 printed += fprintf(fp, "Map:");
91 printed += map__fprintf(pos, fp);
92 if (verbose > 2) {
93 printed += dso__fprintf(pos->dso, type, fp);
94 printed += fprintf(fp, "--\n");
95 }
96 }
97
98 return printed;
99}
100
101size_t map_groups__fprintf_maps(struct map_groups *self, FILE *fp)
102{
103 size_t printed = 0, i;
104 for (i = 0; i < MAP__NR_TYPES; ++i)
105 printed += __map_groups__fprintf_maps(self, i, fp);
106 return printed;
107}
108
109static size_t __map_groups__fprintf_removed_maps(struct map_groups *self,
110 enum map_type type, FILE *fp)
111{
112 struct map *pos;
113 size_t printed = 0;
114
115 list_for_each_entry(pos, &self->removed_maps[type], node) {
116 printed += fprintf(fp, "Map:");
117 printed += map__fprintf(pos, fp);
118 if (verbose > 1) {
119 printed += dso__fprintf(pos->dso, type, fp);
120 printed += fprintf(fp, "--\n");
121 }
122 }
123 return printed;
124}
125
126static size_t map_groups__fprintf_removed_maps(struct map_groups *self, FILE *fp)
127{
128 size_t printed = 0, i;
129 for (i = 0; i < MAP__NR_TYPES; ++i)
130 printed += __map_groups__fprintf_removed_maps(self, i, fp);
131 return printed;
132}
133
134static size_t map_groups__fprintf(struct map_groups *self, FILE *fp)
135{
136 size_t printed = map_groups__fprintf_maps(self, fp);
137 printed += fprintf(fp, "Removed maps:\n");
138 return printed + map_groups__fprintf_removed_maps(self, fp);
139}
140
141static size_t thread__fprintf(struct thread *self, FILE *fp) 82static size_t thread__fprintf(struct thread *self, FILE *fp)
142{ 83{
143 return fprintf(fp, "Thread %d %s\n", self->pid, self->comm) + 84 return fprintf(fp, "Thread %d %s\n", self->pid, self->comm) +
144 map_groups__fprintf(&self->mg, fp); 85 map_groups__fprintf(&self->mg, verbose, fp);
145} 86}
146 87
147struct thread *perf_session__findnew(struct perf_session *self, pid_t pid) 88struct thread *perf_session__findnew(struct perf_session *self, pid_t pid)
@@ -183,127 +124,12 @@ struct thread *perf_session__findnew(struct perf_session *self, pid_t pid)
183 return th; 124 return th;
184} 125}
185 126
186static int map_groups__fixup_overlappings(struct map_groups *self,
187 struct map *map)
188{
189 struct rb_root *root = &self->maps[map->type];
190 struct rb_node *next = rb_first(root);
191
192 while (next) {
193 struct map *pos = rb_entry(next, struct map, rb_node);
194 next = rb_next(&pos->rb_node);
195
196 if (!map__overlap(pos, map))
197 continue;
198
199 if (verbose >= 2) {
200 fputs("overlapping maps:\n", stderr);
201 map__fprintf(map, stderr);
202 map__fprintf(pos, stderr);
203 }
204
205 rb_erase(&pos->rb_node, root);
206 /*
207 * We may have references to this map, for instance in some
208 * hist_entry instances, so just move them to a separate
209 * list.
210 */
211 list_add_tail(&pos->node, &self->removed_maps[map->type]);
212 /*
213 * Now check if we need to create new maps for areas not
214 * overlapped by the new map:
215 */
216 if (map->start > pos->start) {
217 struct map *before = map__clone(pos);
218
219 if (before == NULL)
220 return -ENOMEM;
221
222 before->end = map->start - 1;
223 map_groups__insert(self, before);
224 if (verbose >= 2)
225 map__fprintf(before, stderr);
226 }
227
228 if (map->end < pos->end) {
229 struct map *after = map__clone(pos);
230
231 if (after == NULL)
232 return -ENOMEM;
233
234 after->start = map->end + 1;
235 map_groups__insert(self, after);
236 if (verbose >= 2)
237 map__fprintf(after, stderr);
238 }
239 }
240
241 return 0;
242}
243
244void maps__insert(struct rb_root *maps, struct map *map)
245{
246 struct rb_node **p = &maps->rb_node;
247 struct rb_node *parent = NULL;
248 const u64 ip = map->start;
249 struct map *m;
250
251 while (*p != NULL) {
252 parent = *p;
253 m = rb_entry(parent, struct map, rb_node);
254 if (ip < m->start)
255 p = &(*p)->rb_left;
256 else
257 p = &(*p)->rb_right;
258 }
259
260 rb_link_node(&map->rb_node, parent, p);
261 rb_insert_color(&map->rb_node, maps);
262}
263
264struct map *maps__find(struct rb_root *maps, u64 ip)
265{
266 struct rb_node **p = &maps->rb_node;
267 struct rb_node *parent = NULL;
268 struct map *m;
269
270 while (*p != NULL) {
271 parent = *p;
272 m = rb_entry(parent, struct map, rb_node);
273 if (ip < m->start)
274 p = &(*p)->rb_left;
275 else if (ip > m->end)
276 p = &(*p)->rb_right;
277 else
278 return m;
279 }
280
281 return NULL;
282}
283
284void thread__insert_map(struct thread *self, struct map *map) 127void thread__insert_map(struct thread *self, struct map *map)
285{ 128{
286 map_groups__fixup_overlappings(&self->mg, map); 129 map_groups__fixup_overlappings(&self->mg, map, verbose, stderr);
287 map_groups__insert(&self->mg, map); 130 map_groups__insert(&self->mg, map);
288} 131}
289 132
290/*
291 * XXX This should not really _copy_ te maps, but refcount them.
292 */
293static int map_groups__clone(struct map_groups *self,
294 struct map_groups *parent, enum map_type type)
295{
296 struct rb_node *nd;
297 for (nd = rb_first(&parent->maps[type]); nd; nd = rb_next(nd)) {
298 struct map *map = rb_entry(nd, struct map, rb_node);
299 struct map *new = map__clone(map);
300 if (new == NULL)
301 return -ENOMEM;
302 map_groups__insert(self, new);
303 }
304 return 0;
305}
306
307int thread__fork(struct thread *self, struct thread *parent) 133int thread__fork(struct thread *self, struct thread *parent)
308{ 134{
309 int i; 135 int i;
@@ -336,15 +162,3 @@ size_t perf_session__fprintf(struct perf_session *self, FILE *fp)
336 162
337 return ret; 163 return ret;
338} 164}
339
340struct symbol *map_groups__find_symbol(struct map_groups *self,
341 enum map_type type, u64 addr,
342 symbol_filter_t filter)
343{
344 struct map *map = map_groups__find(self, type, addr);
345
346 if (map != NULL)
347 return map__find_symbol(map, map->map_ip(map, addr), filter);
348
349 return NULL;
350}
diff --git a/tools/perf/util/thread.h b/tools/perf/util/thread.h
index dcf70303e58e..1dfd9ff8bdcd 100644
--- a/tools/perf/util/thread.h
+++ b/tools/perf/util/thread.h
@@ -5,14 +5,6 @@
5#include <unistd.h> 5#include <unistd.h>
6#include "symbol.h" 6#include "symbol.h"
7 7
8struct map_groups {
9 struct rb_root maps[MAP__NR_TYPES];
10 struct list_head removed_maps[MAP__NR_TYPES];
11};
12
13size_t __map_groups__fprintf_maps(struct map_groups *self,
14 enum map_type type, FILE *fp);
15
16struct thread { 8struct thread {
17 struct rb_node rb_node; 9 struct rb_node rb_node;
18 struct map_groups mg; 10 struct map_groups mg;
@@ -23,29 +15,16 @@ struct thread {
23 int comm_len; 15 int comm_len;
24}; 16};
25 17
26void map_groups__init(struct map_groups *self); 18struct perf_session;
19
20int find_all_tid(int pid, pid_t ** all_tid);
27int thread__set_comm(struct thread *self, const char *comm); 21int thread__set_comm(struct thread *self, const char *comm);
28int thread__comm_len(struct thread *self); 22int thread__comm_len(struct thread *self);
29struct thread *perf_session__findnew(struct perf_session *self, pid_t pid); 23struct thread *perf_session__findnew(struct perf_session *self, pid_t pid);
30void thread__insert_map(struct thread *self, struct map *map); 24void thread__insert_map(struct thread *self, struct map *map);
31int thread__fork(struct thread *self, struct thread *parent); 25int thread__fork(struct thread *self, struct thread *parent);
32size_t map_groups__fprintf_maps(struct map_groups *self, FILE *fp);
33size_t perf_session__fprintf(struct perf_session *self, FILE *fp); 26size_t perf_session__fprintf(struct perf_session *self, FILE *fp);
34 27
35void maps__insert(struct rb_root *maps, struct map *map);
36struct map *maps__find(struct rb_root *maps, u64 addr);
37
38static inline void map_groups__insert(struct map_groups *self, struct map *map)
39{
40 maps__insert(&self->maps[map->type], map);
41}
42
43static inline struct map *map_groups__find(struct map_groups *self,
44 enum map_type type, u64 addr)
45{
46 return maps__find(&self->maps[type], addr);
47}
48
49static inline struct map *thread__find_map(struct thread *self, 28static inline struct map *thread__find_map(struct thread *self,
50 enum map_type type, u64 addr) 29 enum map_type type, u64 addr)
51{ 30{
@@ -54,34 +33,12 @@ static inline struct map *thread__find_map(struct thread *self,
54 33
55void thread__find_addr_map(struct thread *self, 34void thread__find_addr_map(struct thread *self,
56 struct perf_session *session, u8 cpumode, 35 struct perf_session *session, u8 cpumode,
57 enum map_type type, u64 addr, 36 enum map_type type, pid_t pid, u64 addr,
58 struct addr_location *al); 37 struct addr_location *al);
59 38
60void thread__find_addr_location(struct thread *self, 39void thread__find_addr_location(struct thread *self,
61 struct perf_session *session, u8 cpumode, 40 struct perf_session *session, u8 cpumode,
62 enum map_type type, u64 addr, 41 enum map_type type, pid_t pid, u64 addr,
63 struct addr_location *al, 42 struct addr_location *al,
64 symbol_filter_t filter); 43 symbol_filter_t filter);
65struct symbol *map_groups__find_symbol(struct map_groups *self,
66 enum map_type type, u64 addr,
67 symbol_filter_t filter);
68
69static inline struct symbol *map_groups__find_function(struct map_groups *self,
70 u64 addr,
71 symbol_filter_t filter)
72{
73 return map_groups__find_symbol(self, MAP__FUNCTION, addr, filter);
74}
75
76struct map *map_groups__find_by_name(struct map_groups *self,
77 enum map_type type, const char *name);
78
79int __map_groups__create_kernel_maps(struct map_groups *self,
80 struct map *vmlinux_maps[MAP__NR_TYPES],
81 struct dso *kernel);
82int map_groups__create_kernel_maps(struct map_groups *self,
83 struct map *vmlinux_maps[MAP__NR_TYPES]);
84
85struct map *map_groups__new_module(struct map_groups *self, u64 start,
86 const char *filename);
87#endif /* __PERF_THREAD_H */ 44#endif /* __PERF_THREAD_H */
diff --git a/tools/perf/util/trace-event-info.c b/tools/perf/util/trace-event-info.c
index 5ea8973ad331..b1572601286c 100644
--- a/tools/perf/util/trace-event-info.c
+++ b/tools/perf/util/trace-event-info.c
@@ -154,10 +154,17 @@ static void put_tracing_file(char *file)
154 free(file); 154 free(file);
155} 155}
156 156
157static ssize_t calc_data_size;
158
157static ssize_t write_or_die(const void *buf, size_t len) 159static ssize_t write_or_die(const void *buf, size_t len)
158{ 160{
159 int ret; 161 int ret;
160 162
163 if (calc_data_size) {
164 calc_data_size += len;
165 return len;
166 }
167
161 ret = write(output_fd, buf, len); 168 ret = write(output_fd, buf, len);
162 if (ret < 0) 169 if (ret < 0)
163 die("writing to '%s'", output_file); 170 die("writing to '%s'", output_file);
@@ -480,6 +487,17 @@ get_tracepoints_path(struct perf_event_attr *pattrs, int nb_events)
480 return nr_tracepoints > 0 ? path.next : NULL; 487 return nr_tracepoints > 0 ? path.next : NULL;
481} 488}
482 489
490bool have_tracepoints(struct perf_event_attr *pattrs, int nb_events)
491{
492 int i;
493
494 for (i = 0; i < nb_events; i++)
495 if (pattrs[i].type == PERF_TYPE_TRACEPOINT)
496 return true;
497
498 return false;
499}
500
483int read_tracing_data(int fd, struct perf_event_attr *pattrs, int nb_events) 501int read_tracing_data(int fd, struct perf_event_attr *pattrs, int nb_events)
484{ 502{
485 char buf[BUFSIZ]; 503 char buf[BUFSIZ];
@@ -526,3 +544,20 @@ int read_tracing_data(int fd, struct perf_event_attr *pattrs, int nb_events)
526 544
527 return 0; 545 return 0;
528} 546}
547
548ssize_t read_tracing_data_size(int fd, struct perf_event_attr *pattrs,
549 int nb_events)
550{
551 ssize_t size;
552 int err = 0;
553
554 calc_data_size = 1;
555 err = read_tracing_data(fd, pattrs, nb_events);
556 size = calc_data_size - 1;
557 calc_data_size = 0;
558
559 if (err < 0)
560 return err;
561
562 return size;
563}
diff --git a/tools/perf/util/trace-event-parse.c b/tools/perf/util/trace-event-parse.c
index 613c9cc90570..73a02223c629 100644
--- a/tools/perf/util/trace-event-parse.c
+++ b/tools/perf/util/trace-event-parse.c
@@ -37,10 +37,12 @@ int header_page_ts_offset;
37int header_page_ts_size; 37int header_page_ts_size;
38int header_page_size_offset; 38int header_page_size_offset;
39int header_page_size_size; 39int header_page_size_size;
40int header_page_overwrite_offset;
41int header_page_overwrite_size;
40int header_page_data_offset; 42int header_page_data_offset;
41int header_page_data_size; 43int header_page_data_size;
42 44
43int latency_format; 45bool latency_format;
44 46
45static char *input_buf; 47static char *input_buf;
46static unsigned long long input_buf_ptr; 48static unsigned long long input_buf_ptr;
@@ -628,23 +630,32 @@ static int test_type(enum event_type type, enum event_type expect)
628 return 0; 630 return 0;
629} 631}
630 632
631static int test_type_token(enum event_type type, char *token, 633static int __test_type_token(enum event_type type, char *token,
632 enum event_type expect, const char *expect_tok) 634 enum event_type expect, const char *expect_tok,
635 bool warn)
633{ 636{
634 if (type != expect) { 637 if (type != expect) {
635 warning("Error: expected type %d but read %d", 638 if (warn)
636 expect, type); 639 warning("Error: expected type %d but read %d",
640 expect, type);
637 return -1; 641 return -1;
638 } 642 }
639 643
640 if (strcmp(token, expect_tok) != 0) { 644 if (strcmp(token, expect_tok) != 0) {
641 warning("Error: expected '%s' but read '%s'", 645 if (warn)
642 expect_tok, token); 646 warning("Error: expected '%s' but read '%s'",
647 expect_tok, token);
643 return -1; 648 return -1;
644 } 649 }
645 return 0; 650 return 0;
646} 651}
647 652
653static int test_type_token(enum event_type type, char *token,
654 enum event_type expect, const char *expect_tok)
655{
656 return __test_type_token(type, token, expect, expect_tok, true);
657}
658
648static int __read_expect_type(enum event_type expect, char **tok, int newline_ok) 659static int __read_expect_type(enum event_type expect, char **tok, int newline_ok)
649{ 660{
650 enum event_type type; 661 enum event_type type;
@@ -661,7 +672,8 @@ static int read_expect_type(enum event_type expect, char **tok)
661 return __read_expect_type(expect, tok, 1); 672 return __read_expect_type(expect, tok, 1);
662} 673}
663 674
664static int __read_expected(enum event_type expect, const char *str, int newline_ok) 675static int __read_expected(enum event_type expect, const char *str,
676 int newline_ok, bool warn)
665{ 677{
666 enum event_type type; 678 enum event_type type;
667 char *token; 679 char *token;
@@ -672,7 +684,7 @@ static int __read_expected(enum event_type expect, const char *str, int newline_
672 else 684 else
673 type = read_token_item(&token); 685 type = read_token_item(&token);
674 686
675 ret = test_type_token(type, token, expect, str); 687 ret = __test_type_token(type, token, expect, str, warn);
676 688
677 free_token(token); 689 free_token(token);
678 690
@@ -681,12 +693,12 @@ static int __read_expected(enum event_type expect, const char *str, int newline_
681 693
682static int read_expected(enum event_type expect, const char *str) 694static int read_expected(enum event_type expect, const char *str)
683{ 695{
684 return __read_expected(expect, str, 1); 696 return __read_expected(expect, str, 1, true);
685} 697}
686 698
687static int read_expected_item(enum event_type expect, const char *str) 699static int read_expected_item(enum event_type expect, const char *str)
688{ 700{
689 return __read_expected(expect, str, 0); 701 return __read_expected(expect, str, 0, true);
690} 702}
691 703
692static char *event_read_name(void) 704static char *event_read_name(void)
@@ -744,7 +756,7 @@ static int field_is_string(struct format_field *field)
744 756
745static int field_is_dynamic(struct format_field *field) 757static int field_is_dynamic(struct format_field *field)
746{ 758{
747 if (!strcmp(field->type, "__data_loc")) 759 if (!strncmp(field->type, "__data_loc", 10))
748 return 1; 760 return 1;
749 761
750 return 0; 762 return 0;
@@ -3087,88 +3099,6 @@ static void print_args(struct print_arg *args)
3087 } 3099 }
3088} 3100}
3089 3101
3090static void parse_header_field(const char *field,
3091 int *offset, int *size)
3092{
3093 char *token;
3094 int type;
3095
3096 if (read_expected(EVENT_ITEM, "field") < 0)
3097 return;
3098 if (read_expected(EVENT_OP, ":") < 0)
3099 return;
3100
3101 /* type */
3102 if (read_expect_type(EVENT_ITEM, &token) < 0)
3103 goto fail;
3104 free_token(token);
3105
3106 if (read_expected(EVENT_ITEM, field) < 0)
3107 return;
3108 if (read_expected(EVENT_OP, ";") < 0)
3109 return;
3110 if (read_expected(EVENT_ITEM, "offset") < 0)
3111 return;
3112 if (read_expected(EVENT_OP, ":") < 0)
3113 return;
3114 if (read_expect_type(EVENT_ITEM, &token) < 0)
3115 goto fail;
3116 *offset = atoi(token);
3117 free_token(token);
3118 if (read_expected(EVENT_OP, ";") < 0)
3119 return;
3120 if (read_expected(EVENT_ITEM, "size") < 0)
3121 return;
3122 if (read_expected(EVENT_OP, ":") < 0)
3123 return;
3124 if (read_expect_type(EVENT_ITEM, &token) < 0)
3125 goto fail;
3126 *size = atoi(token);
3127 free_token(token);
3128 if (read_expected(EVENT_OP, ";") < 0)
3129 return;
3130 type = read_token(&token);
3131 if (type != EVENT_NEWLINE) {
3132 /* newer versions of the kernel have a "signed" type */
3133 if (type != EVENT_ITEM)
3134 goto fail;
3135
3136 if (strcmp(token, "signed") != 0)
3137 goto fail;
3138
3139 free_token(token);
3140
3141 if (read_expected(EVENT_OP, ":") < 0)
3142 return;
3143
3144 if (read_expect_type(EVENT_ITEM, &token))
3145 goto fail;
3146
3147 free_token(token);
3148 if (read_expected(EVENT_OP, ";") < 0)
3149 return;
3150
3151 if (read_expect_type(EVENT_NEWLINE, &token))
3152 goto fail;
3153 }
3154 fail:
3155 free_token(token);
3156}
3157
3158int parse_header_page(char *buf, unsigned long size)
3159{
3160 init_input_buf(buf, size);
3161
3162 parse_header_field("timestamp", &header_page_ts_offset,
3163 &header_page_ts_size);
3164 parse_header_field("commit", &header_page_size_offset,
3165 &header_page_size_size);
3166 parse_header_field("data", &header_page_data_offset,
3167 &header_page_data_size);
3168
3169 return 0;
3170}
3171
3172int parse_ftrace_file(char *buf, unsigned long size) 3102int parse_ftrace_file(char *buf, unsigned long size)
3173{ 3103{
3174 struct format_field *field; 3104 struct format_field *field;
diff --git a/tools/perf/util/trace-event-read.c b/tools/perf/util/trace-event-read.c
index 7cd1193918c7..cb54cd002f49 100644
--- a/tools/perf/util/trace-event-read.c
+++ b/tools/perf/util/trace-event-read.c
@@ -50,14 +50,51 @@ static int long_size;
50 50
51static unsigned long page_size; 51static unsigned long page_size;
52 52
53static ssize_t calc_data_size;
54static bool repipe;
55
56/* If it fails, the next read will report it */
57static void skip(int size)
58{
59 lseek(input_fd, size, SEEK_CUR);
60}
61
62static int do_read(int fd, void *buf, int size)
63{
64 int rsize = size;
65
66 while (size) {
67 int ret = read(fd, buf, size);
68
69 if (ret <= 0)
70 return -1;
71
72 if (repipe) {
73 int retw = write(STDOUT_FILENO, buf, ret);
74
75 if (retw <= 0 || retw != ret)
76 die("repiping input file");
77 }
78
79 size -= ret;
80 buf += ret;
81 }
82
83 return rsize;
84}
85
53static int read_or_die(void *data, int size) 86static int read_or_die(void *data, int size)
54{ 87{
55 int r; 88 int r;
56 89
57 r = read(input_fd, data, size); 90 r = do_read(input_fd, data, size);
58 if (r != size) 91 if (r <= 0)
59 die("reading input file (size expected=%d received=%d)", 92 die("reading input file (size expected=%d received=%d)",
60 size, r); 93 size, r);
94
95 if (calc_data_size)
96 calc_data_size += r;
97
61 return r; 98 return r;
62} 99}
63 100
@@ -82,57 +119,36 @@ static char *read_string(void)
82 char buf[BUFSIZ]; 119 char buf[BUFSIZ];
83 char *str = NULL; 120 char *str = NULL;
84 int size = 0; 121 int size = 0;
85 int i;
86 off_t r; 122 off_t r;
123 char c;
87 124
88 for (;;) { 125 for (;;) {
89 r = read(input_fd, buf, BUFSIZ); 126 r = read(input_fd, &c, 1);
90 if (r < 0) 127 if (r < 0)
91 die("reading input file"); 128 die("reading input file");
92 129
93 if (!r) 130 if (!r)
94 die("no data"); 131 die("no data");
95 132
96 for (i = 0; i < r; i++) { 133 if (repipe) {
97 if (!buf[i]) 134 int retw = write(STDOUT_FILENO, &c, 1);
98 break;
99 }
100 if (i < r)
101 break;
102 135
103 if (str) { 136 if (retw <= 0 || retw != r)
104 size += BUFSIZ; 137 die("repiping input file string");
105 str = realloc(str, size);
106 if (!str)
107 die("malloc of size %d", size);
108 memcpy(str + (size - BUFSIZ), buf, BUFSIZ);
109 } else {
110 size = BUFSIZ;
111 str = malloc_or_die(size);
112 memcpy(str, buf, size);
113 } 138 }
114 }
115 139
116 /* trailing \0: */ 140 buf[size++] = c;
117 i++; 141
118 142 if (!c)
119 /* move the file descriptor to the end of the string */ 143 break;
120 r = lseek(input_fd, -(r - i), SEEK_CUR);
121 if (r == (off_t)-1)
122 die("lseek");
123
124 if (str) {
125 size += i;
126 str = realloc(str, size);
127 if (!str)
128 die("malloc of size %d", size);
129 memcpy(str + (size - i), buf, i);
130 } else {
131 size = i;
132 str = malloc_or_die(i);
133 memcpy(str, buf, i);
134 } 144 }
135 145
146 if (calc_data_size)
147 calc_data_size += size;
148
149 str = malloc_or_die(size);
150 memcpy(str, buf, size);
151
136 return str; 152 return str;
137} 153}
138 154
@@ -174,7 +190,6 @@ static void read_ftrace_printk(void)
174static void read_header_files(void) 190static void read_header_files(void)
175{ 191{
176 unsigned long long size; 192 unsigned long long size;
177 char *header_page;
178 char *header_event; 193 char *header_event;
179 char buf[BUFSIZ]; 194 char buf[BUFSIZ];
180 195
@@ -184,10 +199,7 @@ static void read_header_files(void)
184 die("did not read header page"); 199 die("did not read header page");
185 200
186 size = read8(); 201 size = read8();
187 header_page = malloc_or_die(size); 202 skip(size);
188 read_or_die(header_page, size);
189 parse_header_page(header_page, size);
190 free(header_page);
191 203
192 /* 204 /*
193 * The size field in the page is of type long, 205 * The size field in the page is of type long,
@@ -459,7 +471,7 @@ struct record *trace_read_data(int cpu)
459 return data; 471 return data;
460} 472}
461 473
462void trace_report(int fd) 474ssize_t trace_report(int fd, bool __repipe)
463{ 475{
464 char buf[BUFSIZ]; 476 char buf[BUFSIZ];
465 char test[] = { 23, 8, 68 }; 477 char test[] = { 23, 8, 68 };
@@ -467,6 +479,10 @@ void trace_report(int fd)
467 int show_version = 0; 479 int show_version = 0;
468 int show_funcs = 0; 480 int show_funcs = 0;
469 int show_printk = 0; 481 int show_printk = 0;
482 ssize_t size;
483
484 calc_data_size = 1;
485 repipe = __repipe;
470 486
471 input_fd = fd; 487 input_fd = fd;
472 488
@@ -499,14 +515,18 @@ void trace_report(int fd)
499 read_proc_kallsyms(); 515 read_proc_kallsyms();
500 read_ftrace_printk(); 516 read_ftrace_printk();
501 517
518 size = calc_data_size - 1;
519 calc_data_size = 0;
520 repipe = false;
521
502 if (show_funcs) { 522 if (show_funcs) {
503 print_funcs(); 523 print_funcs();
504 return; 524 return size;
505 } 525 }
506 if (show_printk) { 526 if (show_printk) {
507 print_printk(); 527 print_printk();
508 return; 528 return size;
509 } 529 }
510 530
511 return; 531 return size;
512} 532}
diff --git a/tools/perf/util/trace-event.h b/tools/perf/util/trace-event.h
index c3269b937db4..406d452956db 100644
--- a/tools/perf/util/trace-event.h
+++ b/tools/perf/util/trace-event.h
@@ -1,6 +1,7 @@
1#ifndef __PERF_TRACE_EVENTS_H 1#ifndef __PERF_TRACE_EVENTS_H
2#define __PERF_TRACE_EVENTS_H 2#define __PERF_TRACE_EVENTS_H
3 3
4#include <stdbool.h>
4#include "parse-events.h" 5#include "parse-events.h"
5 6
6#define __unused __attribute__((unused)) 7#define __unused __attribute__((unused))
@@ -162,7 +163,7 @@ struct record *trace_read_data(int cpu);
162 163
163void parse_set_info(int nr_cpus, int long_sz); 164void parse_set_info(int nr_cpus, int long_sz);
164 165
165void trace_report(int fd); 166ssize_t trace_report(int fd, bool repipe);
166 167
167void *malloc_or_die(unsigned int size); 168void *malloc_or_die(unsigned int size);
168 169
@@ -241,9 +242,8 @@ extern int header_page_size_size;
241extern int header_page_data_offset; 242extern int header_page_data_offset;
242extern int header_page_data_size; 243extern int header_page_data_size;
243 244
244extern int latency_format; 245extern bool latency_format;
245 246
246int parse_header_page(char *buf, unsigned long size);
247int trace_parse_common_type(void *data); 247int trace_parse_common_type(void *data);
248int trace_parse_common_pid(void *data); 248int trace_parse_common_pid(void *data);
249int parse_common_pc(void *data); 249int parse_common_pc(void *data);
@@ -258,6 +258,8 @@ void *raw_field_ptr(struct event *event, const char *name, void *data);
258unsigned long long eval_flag(const char *flag); 258unsigned long long eval_flag(const char *flag);
259 259
260int read_tracing_data(int fd, struct perf_event_attr *pattrs, int nb_events); 260int read_tracing_data(int fd, struct perf_event_attr *pattrs, int nb_events);
261ssize_t read_tracing_data_size(int fd, struct perf_event_attr *pattrs,
262 int nb_events);
261 263
262/* taken from kernel/trace/trace.h */ 264/* taken from kernel/trace/trace.h */
263enum trace_flag_type { 265enum trace_flag_type {
diff --git a/tools/perf/util/util.c b/tools/perf/util/util.c
index f9b890fde681..214265674ddd 100644
--- a/tools/perf/util/util.c
+++ b/tools/perf/util/util.c
@@ -92,3 +92,25 @@ out_close_from:
92out: 92out:
93 return err; 93 return err;
94} 94}
95
96unsigned long convert_unit(unsigned long value, char *unit)
97{
98 *unit = ' ';
99
100 if (value > 1000) {
101 value /= 1000;
102 *unit = 'K';
103 }
104
105 if (value > 1000) {
106 value /= 1000;
107 *unit = 'M';
108 }
109
110 if (value > 1000) {
111 value /= 1000;
112 *unit = 'G';
113 }
114
115 return value;
116}
diff --git a/tools/perf/util/util.h b/tools/perf/util/util.h
index 0f5b2a6f1080..0795bf304b19 100644
--- a/tools/perf/util/util.h
+++ b/tools/perf/util/util.h
@@ -42,12 +42,14 @@
42#define _ALL_SOURCE 1 42#define _ALL_SOURCE 1
43#define _GNU_SOURCE 1 43#define _GNU_SOURCE 1
44#define _BSD_SOURCE 1 44#define _BSD_SOURCE 1
45#define HAS_BOOL
45 46
46#include <unistd.h> 47#include <unistd.h>
47#include <stdio.h> 48#include <stdio.h>
48#include <sys/stat.h> 49#include <sys/stat.h>
49#include <sys/statfs.h> 50#include <sys/statfs.h>
50#include <fcntl.h> 51#include <fcntl.h>
52#include <stdbool.h>
51#include <stddef.h> 53#include <stddef.h>
52#include <stdlib.h> 54#include <stdlib.h>
53#include <stdarg.h> 55#include <stdarg.h>
@@ -78,6 +80,7 @@
78#include <pwd.h> 80#include <pwd.h>
79#include <inttypes.h> 81#include <inttypes.h>
80#include "../../../include/linux/magic.h" 82#include "../../../include/linux/magic.h"
83#include "types.h"
81 84
82 85
83#ifndef NO_ICONV 86#ifndef NO_ICONV
@@ -295,6 +298,13 @@ extern void *xmemdupz(const void *data, size_t len);
295extern char *xstrndup(const char *str, size_t len); 298extern char *xstrndup(const char *str, size_t len);
296extern void *xrealloc(void *ptr, size_t size) __attribute__((weak)); 299extern void *xrealloc(void *ptr, size_t size) __attribute__((weak));
297 300
301static inline void *xzalloc(size_t size)
302{
303 void *buf = xmalloc(size);
304
305 return memset(buf, 0, size);
306}
307
298static inline void *zalloc(size_t size) 308static inline void *zalloc(size_t size)
299{ 309{
300 return calloc(1, size); 310 return calloc(1, size);
@@ -309,6 +319,7 @@ static inline int has_extension(const char *filename, const char *ext)
309{ 319{
310 size_t len = strlen(filename); 320 size_t len = strlen(filename);
311 size_t extlen = strlen(ext); 321 size_t extlen = strlen(ext);
322
312 return len > extlen && !memcmp(filename + len - extlen, ext, extlen); 323 return len > extlen && !memcmp(filename + len - extlen, ext, extlen);
313} 324}
314 325
@@ -322,6 +333,7 @@ static inline int has_extension(const char *filename, const char *ext)
322#undef isalnum 333#undef isalnum
323#undef tolower 334#undef tolower
324#undef toupper 335#undef toupper
336
325extern unsigned char sane_ctype[256]; 337extern unsigned char sane_ctype[256];
326#define GIT_SPACE 0x01 338#define GIT_SPACE 0x01
327#define GIT_DIGIT 0x02 339#define GIT_DIGIT 0x02
@@ -406,4 +418,14 @@ void git_qsort(void *base, size_t nmemb, size_t size,
406int mkdir_p(char *path, mode_t mode); 418int mkdir_p(char *path, mode_t mode);
407int copyfile(const char *from, const char *to); 419int copyfile(const char *from, const char *to);
408 420
421s64 perf_atoll(const char *str);
422char **argv_split(const char *str, int *argcp);
423void argv_free(char **argv);
424bool strglobmatch(const char *str, const char *pat);
425bool strlazymatch(const char *str, const char *pat);
426unsigned long convert_unit(unsigned long value, char *unit);
427
428#define _STR(x) #x
429#define STR(x) _STR(x)
430
409#endif 431#endif
diff --git a/virt/kvm/iommu.c b/virt/kvm/iommu.c
index 80fd3ad3b2de..11692b9e8830 100644
--- a/virt/kvm/iommu.c
+++ b/virt/kvm/iommu.c
@@ -32,12 +32,30 @@ static int kvm_iommu_unmap_memslots(struct kvm *kvm);
32static void kvm_iommu_put_pages(struct kvm *kvm, 32static void kvm_iommu_put_pages(struct kvm *kvm,
33 gfn_t base_gfn, unsigned long npages); 33 gfn_t base_gfn, unsigned long npages);
34 34
35static pfn_t kvm_pin_pages(struct kvm *kvm, struct kvm_memory_slot *slot,
36 gfn_t gfn, unsigned long size)
37{
38 gfn_t end_gfn;
39 pfn_t pfn;
40
41 pfn = gfn_to_pfn_memslot(kvm, slot, gfn);
42 end_gfn = gfn + (size >> PAGE_SHIFT);
43 gfn += 1;
44
45 if (is_error_pfn(pfn))
46 return pfn;
47
48 while (gfn < end_gfn)
49 gfn_to_pfn_memslot(kvm, slot, gfn++);
50
51 return pfn;
52}
53
35int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot) 54int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot)
36{ 55{
37 gfn_t gfn = slot->base_gfn; 56 gfn_t gfn, end_gfn;
38 unsigned long npages = slot->npages;
39 pfn_t pfn; 57 pfn_t pfn;
40 int i, r = 0; 58 int r = 0;
41 struct iommu_domain *domain = kvm->arch.iommu_domain; 59 struct iommu_domain *domain = kvm->arch.iommu_domain;
42 int flags; 60 int flags;
43 61
@@ -45,31 +63,62 @@ int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot)
45 if (!domain) 63 if (!domain)
46 return 0; 64 return 0;
47 65
66 gfn = slot->base_gfn;
67 end_gfn = gfn + slot->npages;
68
48 flags = IOMMU_READ | IOMMU_WRITE; 69 flags = IOMMU_READ | IOMMU_WRITE;
49 if (kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY) 70 if (kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY)
50 flags |= IOMMU_CACHE; 71 flags |= IOMMU_CACHE;
51 72
52 for (i = 0; i < npages; i++) { 73
53 /* check if already mapped */ 74 while (gfn < end_gfn) {
54 if (iommu_iova_to_phys(domain, gfn_to_gpa(gfn))) 75 unsigned long page_size;
76
77 /* Check if already mapped */
78 if (iommu_iova_to_phys(domain, gfn_to_gpa(gfn))) {
79 gfn += 1;
80 continue;
81 }
82
83 /* Get the page size we could use to map */
84 page_size = kvm_host_page_size(kvm, gfn);
85
86 /* Make sure the page_size does not exceed the memslot */
87 while ((gfn + (page_size >> PAGE_SHIFT)) > end_gfn)
88 page_size >>= 1;
89
90 /* Make sure gfn is aligned to the page size we want to map */
91 while ((gfn << PAGE_SHIFT) & (page_size - 1))
92 page_size >>= 1;
93
94 /*
95 * Pin all pages we are about to map in memory. This is
96 * important because we unmap and unpin in 4kb steps later.
97 */
98 pfn = kvm_pin_pages(kvm, slot, gfn, page_size);
99 if (is_error_pfn(pfn)) {
100 gfn += 1;
55 continue; 101 continue;
102 }
56 103
57 pfn = gfn_to_pfn_memslot(kvm, slot, gfn); 104 /* Map into IO address space */
58 r = iommu_map_range(domain, 105 r = iommu_map(domain, gfn_to_gpa(gfn), pfn_to_hpa(pfn),
59 gfn_to_gpa(gfn), 106 get_order(page_size), flags);
60 pfn_to_hpa(pfn),
61 PAGE_SIZE, flags);
62 if (r) { 107 if (r) {
63 printk(KERN_ERR "kvm_iommu_map_address:" 108 printk(KERN_ERR "kvm_iommu_map_address:"
64 "iommu failed to map pfn=%lx\n", pfn); 109 "iommu failed to map pfn=%lx\n", pfn);
65 goto unmap_pages; 110 goto unmap_pages;
66 } 111 }
67 gfn++; 112
113 gfn += page_size >> PAGE_SHIFT;
114
115
68 } 116 }
117
69 return 0; 118 return 0;
70 119
71unmap_pages: 120unmap_pages:
72 kvm_iommu_put_pages(kvm, slot->base_gfn, i); 121 kvm_iommu_put_pages(kvm, slot->base_gfn, gfn);
73 return r; 122 return r;
74} 123}
75 124
@@ -189,27 +238,47 @@ out_unmap:
189 return r; 238 return r;
190} 239}
191 240
241static void kvm_unpin_pages(struct kvm *kvm, pfn_t pfn, unsigned long npages)
242{
243 unsigned long i;
244
245 for (i = 0; i < npages; ++i)
246 kvm_release_pfn_clean(pfn + i);
247}
248
192static void kvm_iommu_put_pages(struct kvm *kvm, 249static void kvm_iommu_put_pages(struct kvm *kvm,
193 gfn_t base_gfn, unsigned long npages) 250 gfn_t base_gfn, unsigned long npages)
194{ 251{
195 gfn_t gfn = base_gfn; 252 struct iommu_domain *domain;
253 gfn_t end_gfn, gfn;
196 pfn_t pfn; 254 pfn_t pfn;
197 struct iommu_domain *domain = kvm->arch.iommu_domain;
198 unsigned long i;
199 u64 phys; 255 u64 phys;
200 256
257 domain = kvm->arch.iommu_domain;
258 end_gfn = base_gfn + npages;
259 gfn = base_gfn;
260
201 /* check if iommu exists and in use */ 261 /* check if iommu exists and in use */
202 if (!domain) 262 if (!domain)
203 return; 263 return;
204 264
205 for (i = 0; i < npages; i++) { 265 while (gfn < end_gfn) {
266 unsigned long unmap_pages;
267 int order;
268
269 /* Get physical address */
206 phys = iommu_iova_to_phys(domain, gfn_to_gpa(gfn)); 270 phys = iommu_iova_to_phys(domain, gfn_to_gpa(gfn));
207 pfn = phys >> PAGE_SHIFT; 271 pfn = phys >> PAGE_SHIFT;
208 kvm_release_pfn_clean(pfn); 272
209 gfn++; 273 /* Unmap address from IO address space */
210 } 274 order = iommu_unmap(domain, gfn_to_gpa(gfn), PAGE_SIZE);
275 unmap_pages = 1ULL << order;
211 276
212 iommu_unmap_range(domain, gfn_to_gpa(base_gfn), PAGE_SIZE * npages); 277 /* Unpin all pages we just unmapped to not leak any memory */
278 kvm_unpin_pages(kvm, pfn, unmap_pages);
279
280 gfn += unmap_pages;
281 }
213} 282}
214 283
215static int kvm_iommu_unmap_memslots(struct kvm *kvm) 284static int kvm_iommu_unmap_memslots(struct kvm *kvm)