diff options
26 files changed, 426 insertions, 216 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 69e31aab1308..ff968842ce56 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
| @@ -577,6 +577,11 @@ M: Mike Rapoport <mike@compulab.co.il> | |||
| 577 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 577 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 578 | S: Maintained | 578 | S: Maintained |
| 579 | 579 | ||
| 580 | ARM/CONTEC MICRO9 MACHINE SUPPORT | ||
| 581 | M: Hubert Feurstein <hubert.feurstein@contec.at> | ||
| 582 | S: Maintained | ||
| 583 | F: arch/arm/mach-ep93xx/micro9.c | ||
| 584 | |||
| 580 | ARM/CORGI MACHINE SUPPORT | 585 | ARM/CORGI MACHINE SUPPORT |
| 581 | M: Richard Purdie <rpurdie@rpsys.net> | 586 | M: Richard Purdie <rpurdie@rpsys.net> |
| 582 | S: Maintained | 587 | S: Maintained |
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 63a481fbbed4..338ff19ae447 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h | |||
| @@ -84,7 +84,7 @@ ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p) | |||
| 84 | *p = res | mask; | 84 | *p = res | mask; |
| 85 | raw_local_irq_restore(flags); | 85 | raw_local_irq_restore(flags); |
| 86 | 86 | ||
| 87 | return res & mask; | 87 | return (res & mask) != 0; |
| 88 | } | 88 | } |
| 89 | 89 | ||
| 90 | static inline int | 90 | static inline int |
| @@ -101,7 +101,7 @@ ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p) | |||
| 101 | *p = res & ~mask; | 101 | *p = res & ~mask; |
| 102 | raw_local_irq_restore(flags); | 102 | raw_local_irq_restore(flags); |
| 103 | 103 | ||
| 104 | return res & mask; | 104 | return (res & mask) != 0; |
| 105 | } | 105 | } |
| 106 | 106 | ||
| 107 | static inline int | 107 | static inline int |
| @@ -118,7 +118,7 @@ ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p) | |||
| 118 | *p = res ^ mask; | 118 | *p = res ^ mask; |
| 119 | raw_local_irq_restore(flags); | 119 | raw_local_irq_restore(flags); |
| 120 | 120 | ||
| 121 | return res & mask; | 121 | return (res & mask) != 0; |
| 122 | } | 122 | } |
| 123 | 123 | ||
| 124 | #include <asm-generic/bitops/non-atomic.h> | 124 | #include <asm-generic/bitops/non-atomic.h> |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 467b69ed1021..f838f36eb702 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
| @@ -45,21 +45,21 @@ static int __init user_debug_setup(char *str) | |||
| 45 | __setup("user_debug=", user_debug_setup); | 45 | __setup("user_debug=", user_debug_setup); |
| 46 | #endif | 46 | #endif |
| 47 | 47 | ||
| 48 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top); | 48 | static void dump_mem(const char *, const char *, unsigned long, unsigned long); |
| 49 | 49 | ||
| 50 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) | 50 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) |
| 51 | { | 51 | { |
| 52 | #ifdef CONFIG_KALLSYMS | 52 | #ifdef CONFIG_KALLSYMS |
| 53 | printk("[<%08lx>] ", where); | 53 | char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN]; |
| 54 | print_symbol("(%s) ", where); | 54 | sprint_symbol(sym1, where); |
| 55 | printk("from [<%08lx>] ", from); | 55 | sprint_symbol(sym2, from); |
| 56 | print_symbol("(%s)\n", from); | 56 | printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2); |
| 57 | #else | 57 | #else |
| 58 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); | 58 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); |
| 59 | #endif | 59 | #endif |
| 60 | 60 | ||
| 61 | if (in_exception_text(where)) | 61 | if (in_exception_text(where)) |
| 62 | dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); | 62 | dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); |
| 63 | } | 63 | } |
| 64 | 64 | ||
| 65 | #ifndef CONFIG_ARM_UNWIND | 65 | #ifndef CONFIG_ARM_UNWIND |
| @@ -81,9 +81,10 @@ static int verify_stack(unsigned long sp) | |||
| 81 | /* | 81 | /* |
| 82 | * Dump out the contents of some memory nicely... | 82 | * Dump out the contents of some memory nicely... |
| 83 | */ | 83 | */ |
| 84 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top) | 84 | static void dump_mem(const char *lvl, const char *str, unsigned long bottom, |
| 85 | unsigned long top) | ||
| 85 | { | 86 | { |
| 86 | unsigned long p = bottom & ~31; | 87 | unsigned long first; |
| 87 | mm_segment_t fs; | 88 | mm_segment_t fs; |
| 88 | int i; | 89 | int i; |
| 89 | 90 | ||
| @@ -95,33 +96,37 @@ static void dump_mem(const char *str, unsigned long bottom, unsigned long top) | |||
| 95 | fs = get_fs(); | 96 | fs = get_fs(); |
| 96 | set_fs(KERNEL_DS); | 97 | set_fs(KERNEL_DS); |
| 97 | 98 | ||
| 98 | printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top); | 99 | printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top); |
| 99 | 100 | ||
| 100 | for (p = bottom & ~31; p < top;) { | 101 | for (first = bottom & ~31; first < top; first += 32) { |
| 101 | printk("%04lx: ", p & 0xffff); | 102 | unsigned long p; |
| 103 | char str[sizeof(" 12345678") * 8 + 1]; | ||
| 102 | 104 | ||
| 103 | for (i = 0; i < 8; i++, p += 4) { | 105 | memset(str, ' ', sizeof(str)); |
| 104 | unsigned int val; | 106 | str[sizeof(str) - 1] = '\0'; |
| 105 | 107 | ||
| 106 | if (p < bottom || p >= top) | 108 | for (p = first, i = 0; i < 8 && p < top; i++, p += 4) { |
| 107 | printk(" "); | 109 | if (p >= bottom && p < top) { |
| 108 | else { | 110 | unsigned long val; |
| 109 | __get_user(val, (unsigned long *)p); | 111 | if (__get_user(val, (unsigned long *)p) == 0) |
| 110 | printk("%08x ", val); | 112 | sprintf(str + i * 9, " %08lx", val); |
| 113 | else | ||
| 114 | sprintf(str + i * 9, " ????????"); | ||
| 111 | } | 115 | } |
| 112 | } | 116 | } |
| 113 | printk ("\n"); | 117 | printk("%s%04lx:%s\n", lvl, first & 0xffff, str); |
| 114 | } | 118 | } |
| 115 | 119 | ||
| 116 | set_fs(fs); | 120 | set_fs(fs); |
| 117 | } | 121 | } |
| 118 | 122 | ||
| 119 | static void dump_instr(struct pt_regs *regs) | 123 | static void dump_instr(const char *lvl, struct pt_regs *regs) |
| 120 | { | 124 | { |
| 121 | unsigned long addr = instruction_pointer(regs); | 125 | unsigned long addr = instruction_pointer(regs); |
| 122 | const int thumb = thumb_mode(regs); | 126 | const int thumb = thumb_mode(regs); |
| 123 | const int width = thumb ? 4 : 8; | 127 | const int width = thumb ? 4 : 8; |
| 124 | mm_segment_t fs; | 128 | mm_segment_t fs; |
| 129 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; | ||
| 125 | int i; | 130 | int i; |
| 126 | 131 | ||
| 127 | /* | 132 | /* |
| @@ -132,7 +137,6 @@ static void dump_instr(struct pt_regs *regs) | |||
| 132 | fs = get_fs(); | 137 | fs = get_fs(); |
| 133 | set_fs(KERNEL_DS); | 138 | set_fs(KERNEL_DS); |
| 134 | 139 | ||
| 135 | printk("Code: "); | ||
| 136 | for (i = -4; i < 1; i++) { | 140 | for (i = -4; i < 1; i++) { |
| 137 | unsigned int val, bad; | 141 | unsigned int val, bad; |
| 138 | 142 | ||
| @@ -142,13 +146,14 @@ static void dump_instr(struct pt_regs *regs) | |||
| 142 | bad = __get_user(val, &((u32 *)addr)[i]); | 146 | bad = __get_user(val, &((u32 *)addr)[i]); |
| 143 | 147 | ||
| 144 | if (!bad) | 148 | if (!bad) |
| 145 | printk(i == 0 ? "(%0*x) " : "%0*x ", width, val); | 149 | p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ", |
| 150 | width, val); | ||
| 146 | else { | 151 | else { |
| 147 | printk("bad PC value."); | 152 | p += sprintf(p, "bad PC value"); |
| 148 | break; | 153 | break; |
| 149 | } | 154 | } |
| 150 | } | 155 | } |
| 151 | printk("\n"); | 156 | printk("%sCode: %s\n", lvl, str); |
| 152 | 157 | ||
| 153 | set_fs(fs); | 158 | set_fs(fs); |
| 154 | } | 159 | } |
| @@ -224,18 +229,19 @@ static void __die(const char *str, int err, struct thread_info *thread, struct p | |||
| 224 | struct task_struct *tsk = thread->task; | 229 | struct task_struct *tsk = thread->task; |
| 225 | static int die_counter; | 230 | static int die_counter; |
| 226 | 231 | ||
| 227 | printk("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", | 232 | printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", |
| 228 | str, err, ++die_counter); | 233 | str, err, ++die_counter); |
| 234 | sysfs_printk_last_file(); | ||
| 229 | print_modules(); | 235 | print_modules(); |
| 230 | __show_regs(regs); | 236 | __show_regs(regs); |
| 231 | printk("Process %s (pid: %d, stack limit = 0x%p)\n", | 237 | printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", |
| 232 | tsk->comm, task_pid_nr(tsk), thread + 1); | 238 | TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1); |
| 233 | 239 | ||
| 234 | if (!user_mode(regs) || in_interrupt()) { | 240 | if (!user_mode(regs) || in_interrupt()) { |
| 235 | dump_mem("Stack: ", regs->ARM_sp, | 241 | dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp, |
| 236 | THREAD_SIZE + (unsigned long)task_stack_page(tsk)); | 242 | THREAD_SIZE + (unsigned long)task_stack_page(tsk)); |
| 237 | dump_backtrace(regs, tsk); | 243 | dump_backtrace(regs, tsk); |
| 238 | dump_instr(regs); | 244 | dump_instr(KERN_EMERG, regs); |
| 239 | } | 245 | } |
| 240 | } | 246 | } |
| 241 | 247 | ||
| @@ -250,13 +256,14 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) | |||
| 250 | 256 | ||
| 251 | oops_enter(); | 257 | oops_enter(); |
| 252 | 258 | ||
| 253 | console_verbose(); | ||
| 254 | spin_lock_irq(&die_lock); | 259 | spin_lock_irq(&die_lock); |
| 260 | console_verbose(); | ||
| 255 | bust_spinlocks(1); | 261 | bust_spinlocks(1); |
| 256 | __die(str, err, thread, regs); | 262 | __die(str, err, thread, regs); |
| 257 | bust_spinlocks(0); | 263 | bust_spinlocks(0); |
| 258 | add_taint(TAINT_DIE); | 264 | add_taint(TAINT_DIE); |
| 259 | spin_unlock_irq(&die_lock); | 265 | spin_unlock_irq(&die_lock); |
| 266 | oops_exit(); | ||
| 260 | 267 | ||
| 261 | if (in_interrupt()) | 268 | if (in_interrupt()) |
| 262 | panic("Fatal exception in interrupt"); | 269 | panic("Fatal exception in interrupt"); |
| @@ -264,7 +271,6 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) | |||
| 264 | if (panic_on_oops) | 271 | if (panic_on_oops) |
| 265 | panic("Fatal exception"); | 272 | panic("Fatal exception"); |
| 266 | 273 | ||
| 267 | oops_exit(); | ||
| 268 | do_exit(SIGSEGV); | 274 | do_exit(SIGSEGV); |
| 269 | } | 275 | } |
| 270 | 276 | ||
| @@ -349,7 +355,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) | |||
| 349 | if (user_debug & UDBG_UNDEFINED) { | 355 | if (user_debug & UDBG_UNDEFINED) { |
| 350 | printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", | 356 | printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", |
| 351 | current->comm, task_pid_nr(current), pc); | 357 | current->comm, task_pid_nr(current), pc); |
| 352 | dump_instr(regs); | 358 | dump_instr(KERN_INFO, regs); |
| 353 | } | 359 | } |
| 354 | #endif | 360 | #endif |
| 355 | 361 | ||
| @@ -400,7 +406,7 @@ static int bad_syscall(int n, struct pt_regs *regs) | |||
| 400 | if (user_debug & UDBG_SYSCALL) { | 406 | if (user_debug & UDBG_SYSCALL) { |
| 401 | printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n", | 407 | printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n", |
| 402 | task_pid_nr(current), current->comm, n); | 408 | task_pid_nr(current), current->comm, n); |
| 403 | dump_instr(regs); | 409 | dump_instr(KERN_ERR, regs); |
| 404 | } | 410 | } |
| 405 | #endif | 411 | #endif |
| 406 | 412 | ||
| @@ -579,7 +585,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs) | |||
| 579 | if (user_debug & UDBG_SYSCALL) { | 585 | if (user_debug & UDBG_SYSCALL) { |
| 580 | printk("[%d] %s: arm syscall %d\n", | 586 | printk("[%d] %s: arm syscall %d\n", |
| 581 | task_pid_nr(current), current->comm, no); | 587 | task_pid_nr(current), current->comm, no); |
| 582 | dump_instr(regs); | 588 | dump_instr("", regs); |
| 583 | if (user_mode(regs)) { | 589 | if (user_mode(regs)) { |
| 584 | __show_regs(regs); | 590 | __show_regs(regs); |
| 585 | c_backtrace(regs->ARM_fp, processor_mode(regs)); | 591 | c_backtrace(regs->ARM_fp, processor_mode(regs)); |
| @@ -656,7 +662,7 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs) | |||
| 656 | if (user_debug & UDBG_BADABORT) { | 662 | if (user_debug & UDBG_BADABORT) { |
| 657 | printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n", | 663 | printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n", |
| 658 | task_pid_nr(current), current->comm, code, instr); | 664 | task_pid_nr(current), current->comm, code, instr); |
| 659 | dump_instr(regs); | 665 | dump_instr(KERN_ERR, regs); |
| 660 | show_pte(current->mm, addr); | 666 | show_pte(current->mm, addr); |
| 661 | } | 667 | } |
| 662 | #endif | 668 | #endif |
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c index 4b4f69251b31..e590bbe0a7b4 100644 --- a/arch/arm/mach-bcmring/core.c +++ b/arch/arm/mach-bcmring/core.c | |||
| @@ -271,12 +271,12 @@ static struct irqaction bcmring_timer_irq = { | |||
| 271 | .handler = bcmring_timer_interrupt, | 271 | .handler = bcmring_timer_interrupt, |
| 272 | }; | 272 | }; |
| 273 | 273 | ||
| 274 | static cycle_t bcmring_get_cycles_timer1(void) | 274 | static cycle_t bcmring_get_cycles_timer1(struct clocksource *cs) |
| 275 | { | 275 | { |
| 276 | return ~readl(TIMER1_VA_BASE + TIMER_VALUE); | 276 | return ~readl(TIMER1_VA_BASE + TIMER_VALUE); |
| 277 | } | 277 | } |
| 278 | 278 | ||
| 279 | static cycle_t bcmring_get_cycles_timer3(void) | 279 | static cycle_t bcmring_get_cycles_timer3(struct clocksource *cs) |
| 280 | { | 280 | { |
| 281 | return ~readl(TIMER3_VA_BASE + TIMER_VALUE); | 281 | return ~readl(TIMER3_VA_BASE + TIMER_VALUE); |
| 282 | } | 282 | } |
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h index cdbf93c694a6..38b37060d426 100644 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ b/arch/arm/mach-bcmring/include/mach/system.h | |||
| @@ -29,7 +29,7 @@ static inline void arch_idle(void) | |||
| 29 | cpu_do_idle(); | 29 | cpu_do_idle(); |
| 30 | } | 30 | } |
| 31 | 31 | ||
| 32 | static inline void arch_reset(char mode, char *cmd) | 32 | static inline void arch_reset(char mode, const char *cmd) |
| 33 | { | 33 | { |
| 34 | printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); | 34 | printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); |
| 35 | 35 | ||
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index d7291c682a64..9167c3d2a5ed 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig | |||
| @@ -17,13 +17,31 @@ config EP93XX_SDCE3_SYNC_PHYS_OFFSET | |||
| 17 | bool "0x00000000 - SDCE3/SyncBoot" | 17 | bool "0x00000000 - SDCE3/SyncBoot" |
| 18 | help | 18 | help |
| 19 | Select this option if you want support for EP93xx boards with the | 19 | Select this option if you want support for EP93xx boards with the |
| 20 | first SDRAM bank at 0x00000000 | 20 | first SDRAM bank at 0x00000000. |
| 21 | 21 | ||
| 22 | config EP93XX_SDCE0_PHYS_OFFSET | 22 | config EP93XX_SDCE0_PHYS_OFFSET |
| 23 | bool "0xc0000000 - SDCEO" | 23 | bool "0xc0000000 - SDCEO" |
| 24 | help | 24 | help |
| 25 | Select this option if you want support for EP93xx boards with the | 25 | Select this option if you want support for EP93xx boards with the |
| 26 | first SDRAM bank at 0xc0000000 | 26 | first SDRAM bank at 0xc0000000. |
| 27 | |||
| 28 | config EP93XX_SDCE1_PHYS_OFFSET | ||
| 29 | bool "0xd0000000 - SDCE1" | ||
| 30 | help | ||
| 31 | Select this option if you want support for EP93xx boards with the | ||
| 32 | first SDRAM bank at 0xd0000000. | ||
| 33 | |||
| 34 | config EP93XX_SDCE2_PHYS_OFFSET | ||
| 35 | bool "0xe0000000 - SDCE2" | ||
| 36 | help | ||
| 37 | Select this option if you want support for EP93xx boards with the | ||
| 38 | first SDRAM bank at 0xe0000000. | ||
| 39 | |||
| 40 | config EP93XX_SDCE3_ASYNC_PHYS_OFFSET | ||
| 41 | bool "0xf0000000 - SDCE3/AsyncBoot" | ||
| 42 | help | ||
| 43 | Select this option if you want support for EP93xx boards with the | ||
| 44 | first SDRAM bank at 0xf0000000. | ||
| 27 | 45 | ||
| 28 | endchoice | 46 | endchoice |
| 29 | 47 | ||
| @@ -112,28 +130,36 @@ config MACH_MICRO9 | |||
| 112 | bool | 130 | bool |
| 113 | 131 | ||
| 114 | config MACH_MICRO9H | 132 | config MACH_MICRO9H |
| 115 | bool "Support Contec Hypercontrol Micro9-H" | 133 | bool "Support Contec Micro9-High" |
| 116 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET | 134 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET |
| 117 | select MACH_MICRO9 | 135 | select MACH_MICRO9 |
| 118 | help | 136 | help |
| 119 | Say 'Y' here if you want your kernel to support the | 137 | Say 'Y' here if you want your kernel to support the |
| 120 | Contec Hypercontrol Micro9-H board. | 138 | Contec Micro9-High board. |
| 121 | 139 | ||
| 122 | config MACH_MICRO9M | 140 | config MACH_MICRO9M |
| 123 | bool "Support Contec Hypercontrol Micro9-M" | 141 | bool "Support Contec Micro9-Mid" |
| 124 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET | 142 | depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET |
| 125 | select MACH_MICRO9 | 143 | select MACH_MICRO9 |
| 126 | help | 144 | help |
| 127 | Say 'Y' here if you want your kernel to support the | 145 | Say 'Y' here if you want your kernel to support the |
| 128 | Contec Hypercontrol Micro9-M board. | 146 | Contec Micro9-Mid board. |
| 129 | 147 | ||
| 130 | config MACH_MICRO9L | 148 | config MACH_MICRO9L |
| 131 | bool "Support Contec Hypercontrol Micro9-L" | 149 | bool "Support Contec Micro9-Lite" |
| 132 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET | 150 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET |
| 133 | select MACH_MICRO9 | 151 | select MACH_MICRO9 |
| 134 | help | 152 | help |
| 135 | Say 'Y' here if you want your kernel to support the | 153 | Say 'Y' here if you want your kernel to support the |
| 136 | Contec Hypercontrol Micro9-L board. | 154 | Contec Micro9-Lite board. |
| 155 | |||
| 156 | config MACH_MICRO9S | ||
| 157 | bool "Support Contec Micro9-Slim" | ||
| 158 | depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET | ||
| 159 | select MACH_MICRO9 | ||
| 160 | help | ||
| 161 | Say 'Y' here if you want your kernel to support the | ||
| 162 | Contec Micro9-Slim board. | ||
| 137 | 163 | ||
| 138 | config MACH_TS72XX | 164 | config MACH_TS72XX |
| 139 | bool "Support Technologic Systems TS-72xx SBC" | 165 | bool "Support Technologic Systems TS-72xx SBC" |
diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot index 27a085a8f12a..0ad33f15c622 100644 --- a/arch/arm/mach-ep93xx/Makefile.boot +++ b/arch/arm/mach-ep93xx/Makefile.boot | |||
| @@ -3,3 +3,12 @@ params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) := 0x00000100 | |||
| 3 | 3 | ||
| 4 | zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000 | 4 | zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000 |
| 5 | params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100 | 5 | params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100 |
| 6 | |||
| 7 | zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0008000 | ||
| 8 | params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0000100 | ||
| 9 | |||
| 10 | zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0008000 | ||
| 11 | params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0000100 | ||
| 12 | |||
| 13 | zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0008000 | ||
| 14 | params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0000100 | ||
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index dda19cd76194..1d0f9d8aff2e 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c | |||
| @@ -16,13 +16,16 @@ | |||
| 16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
| 17 | #include <linux/string.h> | 17 | #include <linux/string.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <linux/spinlock.h> | ||
| 20 | |||
| 21 | #include <mach/hardware.h> | ||
| 19 | 22 | ||
| 20 | #include <asm/clkdev.h> | 23 | #include <asm/clkdev.h> |
| 21 | #include <asm/div64.h> | 24 | #include <asm/div64.h> |
| 22 | #include <mach/hardware.h> | ||
| 23 | 25 | ||
| 24 | 26 | ||
| 25 | struct clk { | 27 | struct clk { |
| 28 | struct clk *parent; | ||
| 26 | unsigned long rate; | 29 | unsigned long rate; |
| 27 | int users; | 30 | int users; |
| 28 | int sw_locked; | 31 | int sw_locked; |
| @@ -39,40 +42,60 @@ static unsigned long get_uart_rate(struct clk *clk); | |||
| 39 | static int set_keytchclk_rate(struct clk *clk, unsigned long rate); | 42 | static int set_keytchclk_rate(struct clk *clk, unsigned long rate); |
| 40 | static int set_div_rate(struct clk *clk, unsigned long rate); | 43 | static int set_div_rate(struct clk *clk, unsigned long rate); |
| 41 | 44 | ||
| 45 | |||
| 46 | static struct clk clk_xtali = { | ||
| 47 | .rate = EP93XX_EXT_CLK_RATE, | ||
| 48 | }; | ||
| 42 | static struct clk clk_uart1 = { | 49 | static struct clk clk_uart1 = { |
| 50 | .parent = &clk_xtali, | ||
| 43 | .sw_locked = 1, | 51 | .sw_locked = 1, |
| 44 | .enable_reg = EP93XX_SYSCON_DEVCFG, | 52 | .enable_reg = EP93XX_SYSCON_DEVCFG, |
| 45 | .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN, | 53 | .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN, |
| 46 | .get_rate = get_uart_rate, | 54 | .get_rate = get_uart_rate, |
| 47 | }; | 55 | }; |
| 48 | static struct clk clk_uart2 = { | 56 | static struct clk clk_uart2 = { |
| 57 | .parent = &clk_xtali, | ||
| 49 | .sw_locked = 1, | 58 | .sw_locked = 1, |
| 50 | .enable_reg = EP93XX_SYSCON_DEVCFG, | 59 | .enable_reg = EP93XX_SYSCON_DEVCFG, |
| 51 | .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN, | 60 | .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN, |
| 52 | .get_rate = get_uart_rate, | 61 | .get_rate = get_uart_rate, |
| 53 | }; | 62 | }; |
| 54 | static struct clk clk_uart3 = { | 63 | static struct clk clk_uart3 = { |
| 64 | .parent = &clk_xtali, | ||
| 55 | .sw_locked = 1, | 65 | .sw_locked = 1, |
| 56 | .enable_reg = EP93XX_SYSCON_DEVCFG, | 66 | .enable_reg = EP93XX_SYSCON_DEVCFG, |
| 57 | .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN, | 67 | .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN, |
| 58 | .get_rate = get_uart_rate, | 68 | .get_rate = get_uart_rate, |
| 59 | }; | 69 | }; |
| 60 | static struct clk clk_pll1; | 70 | static struct clk clk_pll1 = { |
| 61 | static struct clk clk_f; | 71 | .parent = &clk_xtali, |
| 62 | static struct clk clk_h; | 72 | }; |
| 63 | static struct clk clk_p; | 73 | static struct clk clk_f = { |
| 64 | static struct clk clk_pll2; | 74 | .parent = &clk_pll1, |
| 75 | }; | ||
| 76 | static struct clk clk_h = { | ||
| 77 | .parent = &clk_pll1, | ||
| 78 | }; | ||
| 79 | static struct clk clk_p = { | ||
| 80 | .parent = &clk_pll1, | ||
| 81 | }; | ||
| 82 | static struct clk clk_pll2 = { | ||
| 83 | .parent = &clk_xtali, | ||
| 84 | }; | ||
| 65 | static struct clk clk_usb_host = { | 85 | static struct clk clk_usb_host = { |
| 86 | .parent = &clk_pll2, | ||
| 66 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 87 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 67 | .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN, | 88 | .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN, |
| 68 | }; | 89 | }; |
| 69 | static struct clk clk_keypad = { | 90 | static struct clk clk_keypad = { |
| 91 | .parent = &clk_xtali, | ||
| 70 | .sw_locked = 1, | 92 | .sw_locked = 1, |
| 71 | .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV, | 93 | .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV, |
| 72 | .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN, | 94 | .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN, |
| 73 | .set_rate = set_keytchclk_rate, | 95 | .set_rate = set_keytchclk_rate, |
| 74 | }; | 96 | }; |
| 75 | static struct clk clk_pwm = { | 97 | static struct clk clk_pwm = { |
| 98 | .parent = &clk_xtali, | ||
| 76 | .rate = EP93XX_EXT_CLK_RATE, | 99 | .rate = EP93XX_EXT_CLK_RATE, |
| 77 | }; | 100 | }; |
| 78 | 101 | ||
| @@ -85,50 +108,62 @@ static struct clk clk_video = { | |||
| 85 | 108 | ||
| 86 | /* DMA Clocks */ | 109 | /* DMA Clocks */ |
| 87 | static struct clk clk_m2p0 = { | 110 | static struct clk clk_m2p0 = { |
| 111 | .parent = &clk_h, | ||
| 88 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 112 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 89 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0, | 113 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0, |
| 90 | }; | 114 | }; |
| 91 | static struct clk clk_m2p1 = { | 115 | static struct clk clk_m2p1 = { |
| 116 | .parent = &clk_h, | ||
| 92 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 117 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 93 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1, | 118 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1, |
| 94 | }; | 119 | }; |
| 95 | static struct clk clk_m2p2 = { | 120 | static struct clk clk_m2p2 = { |
| 121 | .parent = &clk_h, | ||
| 96 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 122 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 97 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2, | 123 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2, |
| 98 | }; | 124 | }; |
| 99 | static struct clk clk_m2p3 = { | 125 | static struct clk clk_m2p3 = { |
| 126 | .parent = &clk_h, | ||
| 100 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 127 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 101 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3, | 128 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3, |
| 102 | }; | 129 | }; |
| 103 | static struct clk clk_m2p4 = { | 130 | static struct clk clk_m2p4 = { |
| 131 | .parent = &clk_h, | ||
| 104 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 132 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 105 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4, | 133 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4, |
| 106 | }; | 134 | }; |
| 107 | static struct clk clk_m2p5 = { | 135 | static struct clk clk_m2p5 = { |
| 136 | .parent = &clk_h, | ||
| 108 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 137 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 109 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5, | 138 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5, |
| 110 | }; | 139 | }; |
| 111 | static struct clk clk_m2p6 = { | 140 | static struct clk clk_m2p6 = { |
| 141 | .parent = &clk_h, | ||
| 112 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 142 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 113 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6, | 143 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6, |
| 114 | }; | 144 | }; |
| 115 | static struct clk clk_m2p7 = { | 145 | static struct clk clk_m2p7 = { |
| 146 | .parent = &clk_h, | ||
| 116 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 147 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 117 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7, | 148 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7, |
| 118 | }; | 149 | }; |
| 119 | static struct clk clk_m2p8 = { | 150 | static struct clk clk_m2p8 = { |
| 151 | .parent = &clk_h, | ||
| 120 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 152 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 121 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8, | 153 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8, |
| 122 | }; | 154 | }; |
| 123 | static struct clk clk_m2p9 = { | 155 | static struct clk clk_m2p9 = { |
| 156 | .parent = &clk_h, | ||
| 124 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 157 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 125 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9, | 158 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9, |
| 126 | }; | 159 | }; |
| 127 | static struct clk clk_m2m0 = { | 160 | static struct clk clk_m2m0 = { |
| 161 | .parent = &clk_h, | ||
| 128 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 162 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 129 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0, | 163 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0, |
| 130 | }; | 164 | }; |
| 131 | static struct clk clk_m2m1 = { | 165 | static struct clk clk_m2m1 = { |
| 166 | .parent = &clk_h, | ||
| 132 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 167 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
| 133 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1, | 168 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1, |
| 134 | }; | 169 | }; |
| @@ -137,6 +172,7 @@ static struct clk clk_m2m1 = { | |||
| 137 | { .dev_id = dev, .con_id = con, .clk = ck } | 172 | { .dev_id = dev, .con_id = con, .clk = ck } |
| 138 | 173 | ||
| 139 | static struct clk_lookup clocks[] = { | 174 | static struct clk_lookup clocks[] = { |
| 175 | INIT_CK(NULL, "xtali", &clk_xtali), | ||
| 140 | INIT_CK("apb:uart1", NULL, &clk_uart1), | 176 | INIT_CK("apb:uart1", NULL, &clk_uart1), |
| 141 | INIT_CK("apb:uart2", NULL, &clk_uart2), | 177 | INIT_CK("apb:uart2", NULL, &clk_uart2), |
| 142 | INIT_CK("apb:uart3", NULL, &clk_uart3), | 178 | INIT_CK("apb:uart3", NULL, &clk_uart3), |
| @@ -163,48 +199,84 @@ static struct clk_lookup clocks[] = { | |||
| 163 | INIT_CK(NULL, "m2m1", &clk_m2m1), | 199 | INIT_CK(NULL, "m2m1", &clk_m2m1), |
| 164 | }; | 200 | }; |
| 165 | 201 | ||
| 202 | static DEFINE_SPINLOCK(clk_lock); | ||
| 203 | |||
| 204 | static void __clk_enable(struct clk *clk) | ||
| 205 | { | ||
| 206 | if (!clk->users++) { | ||
| 207 | if (clk->parent) | ||
| 208 | __clk_enable(clk->parent); | ||
| 209 | |||
| 210 | if (clk->enable_reg) { | ||
| 211 | u32 v; | ||
| 212 | |||
| 213 | v = __raw_readl(clk->enable_reg); | ||
| 214 | v |= clk->enable_mask; | ||
| 215 | if (clk->sw_locked) | ||
| 216 | ep93xx_syscon_swlocked_write(v, clk->enable_reg); | ||
| 217 | else | ||
| 218 | __raw_writel(v, clk->enable_reg); | ||
| 219 | } | ||
| 220 | } | ||
| 221 | } | ||
| 166 | 222 | ||
| 167 | int clk_enable(struct clk *clk) | 223 | int clk_enable(struct clk *clk) |
| 168 | { | 224 | { |
| 169 | if (!clk->users++ && clk->enable_reg) { | 225 | unsigned long flags; |
| 170 | u32 value; | ||
| 171 | 226 | ||
| 172 | value = __raw_readl(clk->enable_reg); | 227 | if (!clk) |
| 173 | value |= clk->enable_mask; | 228 | return -EINVAL; |
| 174 | if (clk->sw_locked) | 229 | |
| 175 | ep93xx_syscon_swlocked_write(value, clk->enable_reg); | 230 | spin_lock_irqsave(&clk_lock, flags); |
| 176 | else | 231 | __clk_enable(clk); |
| 177 | __raw_writel(value, clk->enable_reg); | 232 | spin_unlock_irqrestore(&clk_lock, flags); |
| 178 | } | ||
| 179 | 233 | ||
| 180 | return 0; | 234 | return 0; |
| 181 | } | 235 | } |
| 182 | EXPORT_SYMBOL(clk_enable); | 236 | EXPORT_SYMBOL(clk_enable); |
| 183 | 237 | ||
| 184 | void clk_disable(struct clk *clk) | 238 | static void __clk_disable(struct clk *clk) |
| 185 | { | 239 | { |
| 186 | if (!--clk->users && clk->enable_reg) { | 240 | if (!--clk->users) { |
| 187 | u32 value; | 241 | if (clk->enable_reg) { |
| 242 | u32 v; | ||
| 243 | |||
| 244 | v = __raw_readl(clk->enable_reg); | ||
| 245 | v &= ~clk->enable_mask; | ||
| 246 | if (clk->sw_locked) | ||
| 247 | ep93xx_syscon_swlocked_write(v, clk->enable_reg); | ||
| 248 | else | ||
| 249 | __raw_writel(v, clk->enable_reg); | ||
| 250 | } | ||
| 188 | 251 | ||
| 189 | value = __raw_readl(clk->enable_reg); | 252 | if (clk->parent) |
| 190 | value &= ~clk->enable_mask; | 253 | __clk_disable(clk->parent); |
| 191 | if (clk->sw_locked) | ||
| 192 | ep93xx_syscon_swlocked_write(value, clk->enable_reg); | ||
| 193 | else | ||
| 194 | __raw_writel(value, clk->enable_reg); | ||
| 195 | } | 254 | } |
| 196 | } | 255 | } |
| 256 | |||
| 257 | void clk_disable(struct clk *clk) | ||
| 258 | { | ||
| 259 | unsigned long flags; | ||
| 260 | |||
| 261 | if (!clk) | ||
| 262 | return; | ||
| 263 | |||
| 264 | spin_lock_irqsave(&clk_lock, flags); | ||
| 265 | __clk_disable(clk); | ||
| 266 | spin_unlock_irqrestore(&clk_lock, flags); | ||
| 267 | } | ||
| 197 | EXPORT_SYMBOL(clk_disable); | 268 | EXPORT_SYMBOL(clk_disable); |
| 198 | 269 | ||
| 199 | static unsigned long get_uart_rate(struct clk *clk) | 270 | static unsigned long get_uart_rate(struct clk *clk) |
| 200 | { | 271 | { |
| 272 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 201 | u32 value; | 273 | u32 value; |
| 202 | 274 | ||
| 203 | value = __raw_readl(EP93XX_SYSCON_PWRCNT); | 275 | value = __raw_readl(EP93XX_SYSCON_PWRCNT); |
| 204 | if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD) | 276 | if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD) |
| 205 | return EP93XX_EXT_CLK_RATE; | 277 | return rate; |
| 206 | else | 278 | else |
| 207 | return EP93XX_EXT_CLK_RATE / 2; | 279 | return rate / 2; |
| 208 | } | 280 | } |
| 209 | 281 | ||
| 210 | unsigned long clk_get_rate(struct clk *clk) | 282 | unsigned long clk_get_rate(struct clk *clk) |
| @@ -244,16 +316,16 @@ static int set_keytchclk_rate(struct clk *clk, unsigned long rate) | |||
| 244 | return 0; | 316 | return 0; |
| 245 | } | 317 | } |
| 246 | 318 | ||
| 247 | static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | 319 | static int calc_clk_div(struct clk *clk, unsigned long rate, |
| 248 | int *pdiv, int *div) | 320 | int *psel, int *esel, int *pdiv, int *div) |
| 249 | { | 321 | { |
| 250 | unsigned long max_rate, best_rate = 0, | 322 | struct clk *mclk; |
| 251 | actual_rate = 0, mclk_rate = 0, rate_err = -1; | 323 | unsigned long max_rate, actual_rate, mclk_rate, rate_err = -1; |
| 252 | int i, found = 0, __div = 0, __pdiv = 0; | 324 | int i, found = 0, __div = 0, __pdiv = 0; |
| 253 | 325 | ||
| 254 | /* Don't exceed the maximum rate */ | 326 | /* Don't exceed the maximum rate */ |
| 255 | max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), | 327 | max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), |
| 256 | (unsigned long)EP93XX_EXT_CLK_RATE / 4); | 328 | clk_xtali.rate / 4); |
| 257 | rate = min(rate, max_rate); | 329 | rate = min(rate, max_rate); |
| 258 | 330 | ||
| 259 | /* | 331 | /* |
| @@ -267,11 +339,12 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | |||
| 267 | */ | 339 | */ |
| 268 | for (i = 0; i < 3; i++) { | 340 | for (i = 0; i < 3; i++) { |
| 269 | if (i == 0) | 341 | if (i == 0) |
| 270 | mclk_rate = EP93XX_EXT_CLK_RATE * 2; | 342 | mclk = &clk_xtali; |
| 271 | else if (i == 1) | 343 | else if (i == 1) |
| 272 | mclk_rate = clk_pll1.rate * 2; | 344 | mclk = &clk_pll1; |
| 273 | else if (i == 2) | 345 | else |
| 274 | mclk_rate = clk_pll2.rate * 2; | 346 | mclk = &clk_pll2; |
| 347 | mclk_rate = mclk->rate * 2; | ||
| 275 | 348 | ||
| 276 | /* Try each predivider value */ | 349 | /* Try each predivider value */ |
| 277 | for (__pdiv = 4; __pdiv <= 6; __pdiv++) { | 350 | for (__pdiv = 4; __pdiv <= 6; __pdiv++) { |
| @@ -286,7 +359,8 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | |||
| 286 | *div = __div; | 359 | *div = __div; |
| 287 | *psel = (i == 2); | 360 | *psel = (i == 2); |
| 288 | *esel = (i != 0); | 361 | *esel = (i != 0); |
| 289 | best_rate = actual_rate; | 362 | clk->parent = mclk; |
| 363 | clk->rate = actual_rate; | ||
| 290 | rate_err = abs(actual_rate - rate); | 364 | rate_err = abs(actual_rate - rate); |
| 291 | found = 1; | 365 | found = 1; |
| 292 | } | 366 | } |
| @@ -294,21 +368,19 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | |||
| 294 | } | 368 | } |
| 295 | 369 | ||
| 296 | if (!found) | 370 | if (!found) |
| 297 | return 0; | 371 | return -EINVAL; |
| 298 | 372 | ||
| 299 | return best_rate; | 373 | return 0; |
| 300 | } | 374 | } |
| 301 | 375 | ||
| 302 | static int set_div_rate(struct clk *clk, unsigned long rate) | 376 | static int set_div_rate(struct clk *clk, unsigned long rate) |
| 303 | { | 377 | { |
| 304 | unsigned long actual_rate; | 378 | int err, psel = 0, esel = 0, pdiv = 0, div = 0; |
| 305 | int psel = 0, esel = 0, pdiv = 0, div = 0; | ||
| 306 | u32 val; | 379 | u32 val; |
| 307 | 380 | ||
| 308 | actual_rate = calc_clk_div(rate, &psel, &esel, &pdiv, &div); | 381 | err = calc_clk_div(clk, rate, &psel, &esel, &pdiv, &div); |
| 309 | if (actual_rate == 0) | 382 | if (err) |
| 310 | return -EINVAL; | 383 | return err; |
| 311 | clk->rate = actual_rate; | ||
| 312 | 384 | ||
| 313 | /* Clear the esel, psel, pdiv and div bits */ | 385 | /* Clear the esel, psel, pdiv and div bits */ |
| 314 | val = __raw_readl(clk->enable_reg); | 386 | val = __raw_readl(clk->enable_reg); |
| @@ -344,7 +416,7 @@ static unsigned long calc_pll_rate(u32 config_word) | |||
| 344 | unsigned long long rate; | 416 | unsigned long long rate; |
| 345 | int i; | 417 | int i; |
| 346 | 418 | ||
| 347 | rate = EP93XX_EXT_CLK_RATE; | 419 | rate = clk_xtali.rate; |
| 348 | rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ | 420 | rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ |
| 349 | rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ | 421 | rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ |
| 350 | do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ | 422 | do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ |
| @@ -377,7 +449,7 @@ static int __init ep93xx_clock_init(void) | |||
| 377 | 449 | ||
| 378 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); | 450 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); |
| 379 | if (!(value & 0x00800000)) { /* PLL1 bypassed? */ | 451 | if (!(value & 0x00800000)) { /* PLL1 bypassed? */ |
| 380 | clk_pll1.rate = EP93XX_EXT_CLK_RATE; | 452 | clk_pll1.rate = clk_xtali.rate; |
| 381 | } else { | 453 | } else { |
| 382 | clk_pll1.rate = calc_pll_rate(value); | 454 | clk_pll1.rate = calc_pll_rate(value); |
| 383 | } | 455 | } |
| @@ -388,7 +460,7 @@ static int __init ep93xx_clock_init(void) | |||
| 388 | 460 | ||
| 389 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); | 461 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); |
| 390 | if (!(value & 0x00080000)) { /* PLL2 bypassed? */ | 462 | if (!(value & 0x00080000)) { /* PLL2 bypassed? */ |
| 391 | clk_pll2.rate = EP93XX_EXT_CLK_RATE; | 463 | clk_pll2.rate = clk_xtali.rate; |
| 392 | } else if (value & 0x00040000) { /* PLL2 enabled? */ | 464 | } else if (value & 0x00040000) { /* PLL2 enabled? */ |
| 393 | clk_pll2.rate = calc_pll_rate(value); | 465 | clk_pll2.rate = calc_pll_rate(value); |
| 394 | } else { | 466 | } else { |
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index f7ebed942f66..f95dc160c34b 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
| @@ -550,13 +550,11 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) | |||
| 550 | platform_device_register(&ep93xx_eth_device); | 550 | platform_device_register(&ep93xx_eth_device); |
| 551 | } | 551 | } |
| 552 | 552 | ||
| 553 | static struct i2c_gpio_platform_data ep93xx_i2c_data = { | 553 | |
| 554 | .sda_pin = EP93XX_GPIO_LINE_EEDAT, | 554 | /************************************************************************* |
| 555 | .sda_is_open_drain = 0, | 555 | * EP93xx i2c peripheral handling |
| 556 | .scl_pin = EP93XX_GPIO_LINE_EECLK, | 556 | *************************************************************************/ |
| 557 | .scl_is_open_drain = 0, | 557 | static struct i2c_gpio_platform_data ep93xx_i2c_data; |
| 558 | .udelay = 2, | ||
| 559 | }; | ||
| 560 | 558 | ||
| 561 | static struct platform_device ep93xx_i2c_device = { | 559 | static struct platform_device ep93xx_i2c_device = { |
| 562 | .name = "i2c-gpio", | 560 | .name = "i2c-gpio", |
| @@ -564,8 +562,25 @@ static struct platform_device ep93xx_i2c_device = { | |||
| 564 | .dev.platform_data = &ep93xx_i2c_data, | 562 | .dev.platform_data = &ep93xx_i2c_data, |
| 565 | }; | 563 | }; |
| 566 | 564 | ||
| 567 | void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num) | 565 | void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data, |
| 566 | struct i2c_board_info *devices, int num) | ||
| 568 | { | 567 | { |
| 568 | /* | ||
| 569 | * Set the EEPROM interface pin drive type control. | ||
| 570 | * Defines the driver type for the EECLK and EEDAT pins as either | ||
| 571 | * open drain, which will require an external pull-up, or a normal | ||
| 572 | * CMOS driver. | ||
| 573 | */ | ||
| 574 | if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT) | ||
| 575 | pr_warning("ep93xx: sda != EEDAT, open drain has no effect\n"); | ||
| 576 | if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK) | ||
| 577 | pr_warning("ep93xx: scl != EECLK, open drain has no effect\n"); | ||
| 578 | |||
| 579 | __raw_writel((data->sda_is_open_drain << 1) | | ||
| 580 | (data->scl_is_open_drain << 0), | ||
| 581 | EP93XX_GPIO_EEDRIVE); | ||
| 582 | |||
| 583 | ep93xx_i2c_data = *data; | ||
| 569 | i2c_register_board_info(0, devices, num); | 584 | i2c_register_board_info(0, devices, num); |
| 570 | platform_device_register(&ep93xx_i2c_device); | 585 | platform_device_register(&ep93xx_i2c_device); |
| 571 | } | 586 | } |
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c index 73145ae5d3fa..ca71cf1a72a0 100644 --- a/arch/arm/mach-ep93xx/edb93xx.c +++ b/arch/arm/mach-ep93xx/edb93xx.c | |||
| @@ -27,8 +27,10 @@ | |||
| 27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
| 28 | #include <linux/init.h> | 28 | #include <linux/init.h> |
| 29 | #include <linux/platform_device.h> | 29 | #include <linux/platform_device.h> |
| 30 | #include <linux/i2c.h> | ||
| 31 | #include <linux/mtd/physmap.h> | 30 | #include <linux/mtd/physmap.h> |
| 31 | #include <linux/gpio.h> | ||
| 32 | #include <linux/i2c.h> | ||
| 33 | #include <linux/i2c-gpio.h> | ||
| 32 | 34 | ||
| 33 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
| 34 | 36 | ||
| @@ -76,13 +78,26 @@ static struct ep93xx_eth_data edb93xx_eth_data = { | |||
| 76 | .phy_id = 1, | 78 | .phy_id = 1, |
| 77 | }; | 79 | }; |
| 78 | 80 | ||
| 79 | static struct i2c_board_info __initdata edb93xxa_i2c_data[] = { | 81 | |
| 82 | /************************************************************************* | ||
| 83 | * EDB93xx i2c peripheral handling | ||
| 84 | *************************************************************************/ | ||
| 85 | static struct i2c_gpio_platform_data edb93xx_i2c_gpio_data = { | ||
| 86 | .sda_pin = EP93XX_GPIO_LINE_EEDAT, | ||
| 87 | .sda_is_open_drain = 0, | ||
| 88 | .scl_pin = EP93XX_GPIO_LINE_EECLK, | ||
| 89 | .scl_is_open_drain = 0, | ||
| 90 | .udelay = 0, /* default to 100 kHz */ | ||
| 91 | .timeout = 0, /* default to 100 ms */ | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct i2c_board_info __initdata edb93xxa_i2c_board_info[] = { | ||
| 80 | { | 95 | { |
| 81 | I2C_BOARD_INFO("isl1208", 0x6f), | 96 | I2C_BOARD_INFO("isl1208", 0x6f), |
| 82 | }, | 97 | }, |
| 83 | }; | 98 | }; |
| 84 | 99 | ||
| 85 | static struct i2c_board_info __initdata edb93xx_i2c_data[] = { | 100 | static struct i2c_board_info __initdata edb93xx_i2c_board_info[] = { |
| 86 | { | 101 | { |
| 87 | I2C_BOARD_INFO("ds1337", 0x68), | 102 | I2C_BOARD_INFO("ds1337", 0x68), |
| 88 | }, | 103 | }, |
| @@ -92,12 +107,14 @@ static void __init edb93xx_register_i2c(void) | |||
| 92 | { | 107 | { |
| 93 | if (machine_is_edb9302a() || machine_is_edb9307a() || | 108 | if (machine_is_edb9302a() || machine_is_edb9307a() || |
| 94 | machine_is_edb9315a()) { | 109 | machine_is_edb9315a()) { |
| 95 | ep93xx_register_i2c(edb93xxa_i2c_data, | 110 | ep93xx_register_i2c(&edb93xx_i2c_gpio_data, |
| 96 | ARRAY_SIZE(edb93xxa_i2c_data)); | 111 | edb93xxa_i2c_board_info, |
| 112 | ARRAY_SIZE(edb93xxa_i2c_board_info)); | ||
| 97 | } else if (machine_is_edb9307() || machine_is_edb9312() || | 113 | } else if (machine_is_edb9307() || machine_is_edb9312() || |
| 98 | machine_is_edb9315()) { | 114 | machine_is_edb9315()) { |
| 99 | ep93xx_register_i2c(edb93xx_i2c_data, | 115 | ep93xx_register_i2c(&edb93xx_i2c_gpio_data |
| 100 | ARRAY_SIZE(edb93xx_i2c_data)); | 116 | edb93xx_i2c_board_info, |
| 117 | ARRAY_SIZE(edb93xx_i2c_board_info)); | ||
| 101 | } | 118 | } |
| 102 | } | 119 | } |
| 103 | 120 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 0fbf87b16338..b1f937eda29c 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
| @@ -52,25 +52,27 @@ | |||
| 52 | #define EP93XX_AHB_VIRT_BASE 0xfef00000 | 52 | #define EP93XX_AHB_VIRT_BASE 0xfef00000 |
| 53 | #define EP93XX_AHB_SIZE 0x00100000 | 53 | #define EP93XX_AHB_SIZE 0x00100000 |
| 54 | 54 | ||
| 55 | #define EP93XX_AHB_PHYS(x) (EP93XX_AHB_PHYS_BASE + (x)) | ||
| 55 | #define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) | 56 | #define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) |
| 56 | 57 | ||
| 57 | #define EP93XX_APB_PHYS_BASE 0x80800000 | 58 | #define EP93XX_APB_PHYS_BASE 0x80800000 |
| 58 | #define EP93XX_APB_VIRT_BASE 0xfed00000 | 59 | #define EP93XX_APB_VIRT_BASE 0xfed00000 |
| 59 | #define EP93XX_APB_SIZE 0x00200000 | 60 | #define EP93XX_APB_SIZE 0x00200000 |
| 60 | 61 | ||
| 62 | #define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x)) | ||
| 61 | #define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) | 63 | #define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) |
| 62 | 64 | ||
| 63 | 65 | ||
| 64 | /* AHB peripherals */ | 66 | /* AHB peripherals */ |
| 65 | #define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) | 67 | #define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) |
| 66 | 68 | ||
| 67 | #define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) | 69 | #define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000) |
| 68 | #define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) | 70 | #define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) |
| 69 | 71 | ||
| 70 | #define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) | 72 | #define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000) |
| 71 | #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) | 73 | #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) |
| 72 | 74 | ||
| 73 | #define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) | 75 | #define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000) |
| 74 | #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) | 76 | #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) |
| 75 | 77 | ||
| 76 | #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) | 78 | #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) |
| @@ -112,21 +114,10 @@ | |||
| 112 | 114 | ||
| 113 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) | 115 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) |
| 114 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) | 116 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) |
| 115 | #define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c) | ||
| 116 | #define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50) | ||
| 117 | #define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54) | ||
| 118 | #define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58) | ||
| 119 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) | 117 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) |
| 120 | #define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90) | ||
| 121 | #define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94) | ||
| 122 | #define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98) | ||
| 123 | #define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c) | ||
| 124 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) | 118 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) |
| 125 | #define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac) | ||
| 126 | #define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0) | ||
| 127 | #define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4) | ||
| 128 | #define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8) | ||
| 129 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) | 119 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) |
| 120 | #define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8) | ||
| 130 | 121 | ||
| 131 | #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) | 122 | #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) |
| 132 | 123 | ||
| @@ -134,13 +125,13 @@ | |||
| 134 | 125 | ||
| 135 | #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) | 126 | #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) |
| 136 | 127 | ||
| 137 | #define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000) | 128 | #define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000) |
| 138 | #define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) | 129 | #define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) |
| 139 | 130 | ||
| 140 | #define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000) | 131 | #define EP93XX_UART2_PHYS_BASE EP93XX_APB_PHYS(0x000d0000) |
| 141 | #define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000) | 132 | #define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000) |
| 142 | 133 | ||
| 143 | #define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000) | 134 | #define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) |
| 144 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) | 135 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) |
| 145 | 136 | ||
| 146 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) | 137 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) |
| @@ -148,10 +139,10 @@ | |||
| 148 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) | 139 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) |
| 149 | #define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) | 140 | #define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) |
| 150 | 141 | ||
| 151 | #define EP93XX_PWM_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00110000) | 142 | #define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000) |
| 152 | #define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) | 143 | #define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) |
| 153 | 144 | ||
| 154 | #define EP93XX_RTC_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00120000) | 145 | #define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000) |
| 155 | #define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) | 146 | #define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) |
| 156 | 147 | ||
| 157 | #define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) | 148 | #define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) |
| @@ -218,6 +209,17 @@ | |||
| 218 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) | 209 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) |
| 219 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) | 210 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) |
| 220 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) | 211 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) |
| 212 | #define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c) | ||
| 213 | #define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000) | ||
| 214 | #define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28) | ||
| 215 | #define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8) | ||
| 216 | #define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7) | ||
| 217 | #define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6) | ||
| 218 | #define EP93XX_SYSCON_SYSCFG_LASDO (1<<5) | ||
| 219 | #define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4) | ||
| 220 | #define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3) | ||
| 221 | #define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1) | ||
| 222 | #define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0) | ||
| 221 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) | 223 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) |
| 222 | 224 | ||
| 223 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) | 225 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) |
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h index 0a1498ae899a..c991b149bdf2 100644 --- a/arch/arm/mach-ep93xx/include/mach/gpio.h +++ b/arch/arm/mach-ep93xx/include/mach/gpio.h | |||
| @@ -114,17 +114,9 @@ extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable); | |||
| 114 | * B0..B7 (7..15) to irq 72..79, and | 114 | * B0..B7 (7..15) to irq 72..79, and |
| 115 | * F0..F7 (16..24) to irq 80..87. | 115 | * F0..F7 (16..24) to irq 80..87. |
| 116 | */ | 116 | */ |
| 117 | static inline int gpio_to_irq(unsigned gpio) | 117 | #define gpio_to_irq(gpio) \ |
| 118 | { | 118 | (((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL) |
| 119 | if (gpio <= EP93XX_GPIO_LINE_MAX_IRQ) | 119 | |
| 120 | return 64 + gpio; | 120 | #define irq_to_gpio(irq) ((irq) - gpio_to_irq(0)) |
| 121 | |||
| 122 | return -EINVAL; | ||
| 123 | } | ||
| 124 | |||
| 125 | static inline int irq_to_gpio(unsigned irq) | ||
| 126 | { | ||
| 127 | return irq - gpio_to_irq(0); | ||
| 128 | } | ||
| 129 | 121 | ||
| 130 | #endif | 122 | #endif |
diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h index 925b12ea0990..554064e90307 100644 --- a/arch/arm/mach-ep93xx/include/mach/memory.h +++ b/arch/arm/mach-ep93xx/include/mach/memory.h | |||
| @@ -9,6 +9,12 @@ | |||
| 9 | #define PHYS_OFFSET UL(0x00000000) | 9 | #define PHYS_OFFSET UL(0x00000000) |
| 10 | #elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) | 10 | #elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) |
| 11 | #define PHYS_OFFSET UL(0xc0000000) | 11 | #define PHYS_OFFSET UL(0xc0000000) |
| 12 | #elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) | ||
| 13 | #define PHYS_OFFSET UL(0xd0000000) | ||
| 14 | #elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) | ||
| 15 | #define PHYS_OFFSET UL(0xe0000000) | ||
| 16 | #elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) | ||
| 17 | #define PHYS_OFFSET UL(0xf0000000) | ||
| 12 | #else | 18 | #else |
| 13 | #error "Kconfig bug: No EP93xx PHYS_OFFSET set" | 19 | #error "Kconfig bug: No EP93xx PHYS_OFFSET set" |
| 14 | #endif | 20 | #endif |
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index 01a0f0838e5b..a3ec33fd79d4 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | 4 | ||
| 5 | #ifndef __ASSEMBLY__ | 5 | #ifndef __ASSEMBLY__ |
| 6 | 6 | ||
| 7 | struct i2c_gpio_platform_data; | ||
| 7 | struct i2c_board_info; | 8 | struct i2c_board_info; |
| 8 | struct platform_device; | 9 | struct platform_device; |
| 9 | struct ep93xxfb_mach_info; | 10 | struct ep93xxfb_mach_info; |
| @@ -33,7 +34,8 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits) | |||
| 33 | } | 34 | } |
| 34 | 35 | ||
| 35 | void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); | 36 | void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); |
| 36 | void ep93xx_register_i2c(struct i2c_board_info *devices, int num); | 37 | void ep93xx_register_i2c(struct i2c_gpio_platform_data *data, |
| 38 | struct i2c_board_info *devices, int num); | ||
| 37 | void ep93xx_register_fb(struct ep93xxfb_mach_info *data); | 39 | void ep93xx_register_fb(struct ep93xxfb_mach_info *data); |
| 38 | void ep93xx_register_pwm(int pwm0, int pwm1); | 40 | void ep93xx_register_pwm(int pwm0, int pwm1); |
| 39 | int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); | 41 | int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); |
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index 0a313e82fb74..d83b80478b09 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c | |||
| @@ -2,7 +2,9 @@ | |||
| 2 | * linux/arch/arm/mach-ep93xx/micro9.c | 2 | * linux/arch/arm/mach-ep93xx/micro9.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH | 4 | * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH |
| 5 | * Manfred Gruber <manfred.gruber@contec.at> | 5 | * Manfred Gruber <m.gruber@tirol.com> |
| 6 | * Copyright (C) 2009 Contec Steuerungstechnik & Automation GmbH | ||
| 7 | * Hubert Feurstein <hubert.feurstein@contec.at> | ||
| 6 | * | 8 | * |
| 7 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
| @@ -20,104 +22,124 @@ | |||
| 20 | #include <asm/mach/arch.h> | 22 | #include <asm/mach/arch.h> |
| 21 | 23 | ||
| 22 | 24 | ||
| 23 | static struct ep93xx_eth_data micro9_eth_data = { | 25 | /************************************************************************* |
| 24 | .phy_id = 0x1f, | 26 | * Micro9 NOR Flash |
| 25 | }; | 27 | * |
| 26 | 28 | * Micro9-High has up to 64MB of 32-bit flash on CS1 | |
| 27 | static void __init micro9_init(void) | 29 | * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1 |
| 28 | { | 30 | * Micro9-Lite uses a seperate MTD map driver for flash support |
| 29 | ep93xx_register_eth(µ9_eth_data, 1); | 31 | * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1 |
| 30 | } | 32 | *************************************************************************/ |
| 31 | 33 | static struct physmap_flash_data micro9_flash_data; | |
| 32 | /* | 34 | |
| 33 | * Micro9-H | 35 | static struct resource micro9_flash_resource = { |
| 34 | */ | ||
| 35 | #ifdef CONFIG_MACH_MICRO9H | ||
| 36 | static struct physmap_flash_data micro9h_flash_data = { | ||
| 37 | .width = 4, | ||
| 38 | }; | ||
| 39 | |||
| 40 | static struct resource micro9h_flash_resource = { | ||
| 41 | .start = EP93XX_CS1_PHYS_BASE, | 36 | .start = EP93XX_CS1_PHYS_BASE, |
| 42 | .end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1, | 37 | .end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1, |
| 43 | .flags = IORESOURCE_MEM, | 38 | .flags = IORESOURCE_MEM, |
| 44 | }; | 39 | }; |
| 45 | 40 | ||
| 46 | static struct platform_device micro9h_flash = { | 41 | static struct platform_device micro9_flash = { |
| 47 | .name = "physmap-flash", | 42 | .name = "physmap-flash", |
| 48 | .id = 0, | 43 | .id = 0, |
| 49 | .dev = { | 44 | .dev = { |
| 50 | .platform_data = µ9h_flash_data, | 45 | .platform_data = µ9_flash_data, |
| 51 | }, | 46 | }, |
| 52 | .num_resources = 1, | 47 | .num_resources = 1, |
| 53 | .resource = µ9h_flash_resource, | 48 | .resource = µ9_flash_resource, |
| 54 | }; | 49 | }; |
| 55 | 50 | ||
| 56 | static void __init micro9h_init(void) | 51 | static void __init __micro9_register_flash(unsigned int width) |
| 52 | { | ||
| 53 | micro9_flash_data.width = width; | ||
| 54 | |||
| 55 | platform_device_register(µ9_flash); | ||
| 56 | } | ||
| 57 | |||
| 58 | static unsigned int __init micro9_detect_bootwidth(void) | ||
| 59 | { | ||
| 60 | u32 v; | ||
| 61 | |||
| 62 | /* Detect the bus width of the external flash memory */ | ||
| 63 | v = __raw_readl(EP93XX_SYSCON_SYSCFG); | ||
| 64 | if (v & EP93XX_SYSCON_SYSCFG_LCSN7) | ||
| 65 | return 4; /* 32-bit */ | ||
| 66 | else | ||
| 67 | return 2; /* 16-bit */ | ||
| 68 | } | ||
| 69 | |||
| 70 | static void __init micro9_register_flash(void) | ||
| 57 | { | 71 | { |
| 58 | platform_device_register(µ9h_flash); | 72 | if (machine_is_micro9()) |
| 73 | __micro9_register_flash(4); | ||
| 74 | else if (machine_is_micro9m() || machine_is_micro9s()) | ||
| 75 | __micro9_register_flash(micro9_detect_bootwidth()); | ||
| 59 | } | 76 | } |
| 60 | 77 | ||
| 61 | static void __init micro9h_init_machine(void) | 78 | |
| 79 | /************************************************************************* | ||
| 80 | * Micro9 Ethernet | ||
| 81 | *************************************************************************/ | ||
| 82 | static struct ep93xx_eth_data micro9_eth_data = { | ||
| 83 | .phy_id = 0x1f, | ||
| 84 | }; | ||
| 85 | |||
| 86 | |||
| 87 | static void __init micro9_init_machine(void) | ||
| 62 | { | 88 | { |
| 63 | ep93xx_init_devices(); | 89 | ep93xx_init_devices(); |
| 64 | micro9_init(); | 90 | ep93xx_register_eth(µ9_eth_data, 1); |
| 65 | micro9h_init(); | 91 | micro9_register_flash(); |
| 66 | } | 92 | } |
| 67 | 93 | ||
| 68 | MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H") | 94 | |
| 69 | /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ | 95 | #ifdef CONFIG_MACH_MICRO9H |
| 96 | MACHINE_START(MICRO9, "Contec Micro9-High") | ||
| 97 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ | ||
| 70 | .phys_io = EP93XX_APB_PHYS_BASE, | 98 | .phys_io = EP93XX_APB_PHYS_BASE, |
| 71 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | 99 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, |
| 72 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, | 100 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, |
| 73 | .map_io = ep93xx_map_io, | 101 | .map_io = ep93xx_map_io, |
| 74 | .init_irq = ep93xx_init_irq, | 102 | .init_irq = ep93xx_init_irq, |
| 75 | .timer = &ep93xx_timer, | 103 | .timer = &ep93xx_timer, |
| 76 | .init_machine = micro9h_init_machine, | 104 | .init_machine = micro9_init_machine, |
| 77 | MACHINE_END | 105 | MACHINE_END |
| 78 | #endif | 106 | #endif |
| 79 | 107 | ||
| 80 | /* | ||
| 81 | * Micro9-M | ||
| 82 | */ | ||
| 83 | #ifdef CONFIG_MACH_MICRO9M | 108 | #ifdef CONFIG_MACH_MICRO9M |
| 84 | static void __init micro9m_init_machine(void) | 109 | MACHINE_START(MICRO9M, "Contec Micro9-Mid") |
| 85 | { | 110 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ |
| 86 | ep93xx_init_devices(); | ||
| 87 | micro9_init(); | ||
| 88 | } | ||
| 89 | |||
| 90 | MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M") | ||
| 91 | /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ | ||
| 92 | .phys_io = EP93XX_APB_PHYS_BASE, | 111 | .phys_io = EP93XX_APB_PHYS_BASE, |
| 93 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | 112 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, |
| 94 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, | 113 | .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, |
| 95 | .map_io = ep93xx_map_io, | 114 | .map_io = ep93xx_map_io, |
| 96 | .init_irq = ep93xx_init_irq, | 115 | .init_irq = ep93xx_init_irq, |
| 97 | .timer = &ep93xx_timer, | 116 | .timer = &ep93xx_timer, |
| 98 | .init_machine = micro9m_init_machine, | 117 | .init_machine = micro9_init_machine, |
| 99 | MACHINE_END | 118 | MACHINE_END |
| 100 | #endif | 119 | #endif |
| 101 | 120 | ||
| 102 | /* | ||
| 103 | * Micro9-L | ||
| 104 | */ | ||
| 105 | #ifdef CONFIG_MACH_MICRO9L | 121 | #ifdef CONFIG_MACH_MICRO9L |
| 106 | static void __init micro9l_init_machine(void) | 122 | MACHINE_START(MICRO9L, "Contec Micro9-Lite") |
| 107 | { | 123 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ |
| 108 | ep93xx_init_devices(); | ||
| 109 | micro9_init(); | ||
| 110 | } | ||
| 111 | |||
| 112 | MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L") | ||
| 113 | /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ | ||
| 114 | .phys_io = EP93XX_APB_PHYS_BASE, | 124 | .phys_io = EP93XX_APB_PHYS_BASE, |
| 115 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | 125 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, |
| 116 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, | 126 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, |
| 117 | .map_io = ep93xx_map_io, | 127 | .map_io = ep93xx_map_io, |
| 118 | .init_irq = ep93xx_init_irq, | 128 | .init_irq = ep93xx_init_irq, |
| 119 | .timer = &ep93xx_timer, | 129 | .timer = &ep93xx_timer, |
| 120 | .init_machine = micro9l_init_machine, | 130 | .init_machine = micro9_init_machine, |
| 121 | MACHINE_END | 131 | MACHINE_END |
| 122 | #endif | 132 | #endif |
| 123 | 133 | ||
| 134 | #ifdef CONFIG_MACH_MICRO9S | ||
| 135 | MACHINE_START(MICRO9S, "Contec Micro9-Slim") | ||
| 136 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ | ||
| 137 | .phys_io = EP93XX_APB_PHYS_BASE, | ||
| 138 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | ||
| 139 | .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, | ||
| 140 | .map_io = ep93xx_map_io, | ||
| 141 | .init_irq = ep93xx_init_irq, | ||
| 142 | .timer = &ep93xx_timer, | ||
| 143 | .init_machine = micro9_init_machine, | ||
| 144 | MACHINE_END | ||
| 145 | #endif | ||
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 3a8ee2272add..983cc8c20081 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
| @@ -155,7 +155,7 @@ MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table | |||
| 155 | 155 | ||
| 156 | static pxa_freqs_t pxa27x_freqs[] = { | 156 | static pxa_freqs_t pxa27x_freqs[] = { |
| 157 | {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, | 157 | {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, |
| 158 | {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1), 1000000, 1705000 }, | 158 | {156000, 104000, PXA27x_CCCR(1, 8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 }, |
| 159 | {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, | 159 | {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, |
| 160 | {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, | 160 | {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, |
| 161 | {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, | 161 | {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, |
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 79141f862728..965480eb4fe6 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c | |||
| @@ -238,7 +238,7 @@ static struct resource csb726_lan_resources[] = { | |||
| 238 | }; | 238 | }; |
| 239 | 239 | ||
| 240 | struct smsc911x_platform_config csb726_lan_config = { | 240 | struct smsc911x_platform_config csb726_lan_config = { |
| 241 | .irq_type = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 241 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| 242 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | 242 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, |
| 243 | .flags = SMSC911X_USE_32BIT, | 243 | .flags = SMSC911X_USE_32BIT, |
| 244 | .phy_interface = PHY_INTERFACE_MODE_MII, | 244 | .phy_interface = PHY_INTERFACE_MODE_MII, |
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index 8a5546e6d547..bb7b8198d0c4 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile | |||
| @@ -25,6 +25,7 @@ led-$(CONFIG_SA1100_CERF) += leds-cerf.o | |||
| 25 | 25 | ||
| 26 | obj-$(CONFIG_SA1100_COLLIE) += collie.o | 26 | obj-$(CONFIG_SA1100_COLLIE) += collie.o |
| 27 | 27 | ||
| 28 | obj-$(CONFIG_SA1100_H3100) += h3600.o | ||
| 28 | obj-$(CONFIG_SA1100_H3600) += h3600.o | 29 | obj-$(CONFIG_SA1100_H3600) += h3600.o |
| 29 | 30 | ||
| 30 | obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o | 31 | obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o |
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 8f5c13f4c936..295e25dd6381 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #include <linux/linkage.h> | 12 | #include <linux/linkage.h> |
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <asm/assembler.h> | 14 | #include <asm/assembler.h> |
| 15 | #include <asm/unwind.h> | ||
| 15 | 16 | ||
| 16 | #include "proc-macros.S" | 17 | #include "proc-macros.S" |
| 17 | 18 | ||
| @@ -121,11 +122,13 @@ ENTRY(v6_coherent_kern_range) | |||
| 121 | * - the Icache does not read data from the write buffer | 122 | * - the Icache does not read data from the write buffer |
| 122 | */ | 123 | */ |
| 123 | ENTRY(v6_coherent_user_range) | 124 | ENTRY(v6_coherent_user_range) |
| 124 | 125 | UNWIND(.fnstart ) | |
| 125 | #ifdef HARVARD_CACHE | 126 | #ifdef HARVARD_CACHE |
| 126 | bic r0, r0, #CACHE_LINE_SIZE - 1 | 127 | bic r0, r0, #CACHE_LINE_SIZE - 1 |
| 127 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D line | 128 | 1: |
| 129 | USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line | ||
| 128 | add r0, r0, #CACHE_LINE_SIZE | 130 | add r0, r0, #CACHE_LINE_SIZE |
| 131 | 2: | ||
| 129 | cmp r0, r1 | 132 | cmp r0, r1 |
| 130 | blo 1b | 133 | blo 1b |
| 131 | #endif | 134 | #endif |
| @@ -143,6 +146,19 @@ ENTRY(v6_coherent_user_range) | |||
| 143 | mov pc, lr | 146 | mov pc, lr |
| 144 | 147 | ||
| 145 | /* | 148 | /* |
| 149 | * Fault handling for the cache operation above. If the virtual address in r0 | ||
| 150 | * isn't mapped, just try the next page. | ||
| 151 | */ | ||
| 152 | 9001: | ||
| 153 | mov r0, r0, lsr #12 | ||
| 154 | mov r0, r0, lsl #12 | ||
| 155 | add r0, r0, #4096 | ||
| 156 | b 2b | ||
| 157 | UNWIND(.fnend ) | ||
| 158 | ENDPROC(v6_coherent_user_range) | ||
| 159 | ENDPROC(v6_coherent_kern_range) | ||
| 160 | |||
| 161 | /* | ||
| 146 | * v6_flush_kern_dcache_page(kaddr) | 162 | * v6_flush_kern_dcache_page(kaddr) |
| 147 | * | 163 | * |
| 148 | * Ensure that the data held in the page kaddr is written back | 164 | * Ensure that the data held in the page kaddr is written back |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index bda0ec31a4e2..e1bd9759617f 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
| 14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
| 15 | #include <asm/assembler.h> | 15 | #include <asm/assembler.h> |
| 16 | #include <asm/unwind.h> | ||
| 16 | 17 | ||
| 17 | #include "proc-macros.S" | 18 | #include "proc-macros.S" |
| 18 | 19 | ||
| @@ -153,13 +154,16 @@ ENTRY(v7_coherent_kern_range) | |||
| 153 | * - the Icache does not read data from the write buffer | 154 | * - the Icache does not read data from the write buffer |
| 154 | */ | 155 | */ |
| 155 | ENTRY(v7_coherent_user_range) | 156 | ENTRY(v7_coherent_user_range) |
| 157 | UNWIND(.fnstart ) | ||
| 156 | dcache_line_size r2, r3 | 158 | dcache_line_size r2, r3 |
| 157 | sub r3, r2, #1 | 159 | sub r3, r2, #1 |
| 158 | bic r0, r0, r3 | 160 | bic r0, r0, r3 |
| 159 | 1: mcr p15, 0, r0, c7, c11, 1 @ clean D line to the point of unification | 161 | 1: |
| 162 | USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification | ||
| 160 | dsb | 163 | dsb |
| 161 | mcr p15, 0, r0, c7, c5, 1 @ invalidate I line | 164 | USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line |
| 162 | add r0, r0, r2 | 165 | add r0, r0, r2 |
| 166 | 2: | ||
| 163 | cmp r0, r1 | 167 | cmp r0, r1 |
| 164 | blo 1b | 168 | blo 1b |
| 165 | mov r0, #0 | 169 | mov r0, #0 |
| @@ -167,6 +171,17 @@ ENTRY(v7_coherent_user_range) | |||
| 167 | dsb | 171 | dsb |
| 168 | isb | 172 | isb |
| 169 | mov pc, lr | 173 | mov pc, lr |
| 174 | |||
| 175 | /* | ||
| 176 | * Fault handling for the cache operation above. If the virtual address in r0 | ||
| 177 | * isn't mapped, just try the next page. | ||
| 178 | */ | ||
| 179 | 9001: | ||
| 180 | mov r0, r0, lsr #12 | ||
| 181 | mov r0, r0, lsl #12 | ||
| 182 | add r0, r0, #4096 | ||
| 183 | b 2b | ||
| 184 | UNWIND(.fnend ) | ||
| 170 | ENDPROC(v7_coherent_kern_range) | 185 | ENDPROC(v7_coherent_kern_range) |
| 171 | ENDPROC(v7_coherent_user_range) | 186 | ENDPROC(v7_coherent_user_range) |
| 172 | 187 | ||
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index bc0099d5ae85..d0d17b6a3703 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c | |||
| @@ -153,14 +153,11 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte) | |||
| 153 | 153 | ||
| 154 | page = pfn_to_page(pfn); | 154 | page = pfn_to_page(pfn); |
| 155 | mapping = page_mapping(page); | 155 | mapping = page_mapping(page); |
| 156 | if (mapping) { | ||
| 157 | #ifndef CONFIG_SMP | 156 | #ifndef CONFIG_SMP |
| 158 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); | 157 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) |
| 159 | 158 | __flush_dcache_page(mapping, page); | |
| 160 | if (dirty) | ||
| 161 | __flush_dcache_page(mapping, page); | ||
| 162 | #endif | 159 | #endif |
| 163 | 160 | if (mapping) { | |
| 164 | if (cache_is_vivt()) | 161 | if (cache_is_vivt()) |
| 165 | make_coherent(mapping, vma, addr, pfn); | 162 | make_coherent(mapping, vma, addr, pfn); |
| 166 | else if (vma->vm_flags & VM_EXEC) | 163 | else if (vma->vm_flags & VM_EXEC) |
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index ae0e25f5a70e..10e06801afb3 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
| @@ -292,6 +292,11 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
| 292 | * down_read() | 292 | * down_read() |
| 293 | */ | 293 | */ |
| 294 | might_sleep(); | 294 | might_sleep(); |
| 295 | #ifdef CONFIG_DEBUG_VM | ||
| 296 | if (!user_mode(regs) && | ||
| 297 | !search_exception_tables(regs->ARM_pc)) | ||
| 298 | goto no_context; | ||
| 299 | #endif | ||
| 295 | } | 300 | } |
| 296 | 301 | ||
| 297 | fault = __do_page_fault(mm, addr, fsr, tsk); | 302 | fault = __do_page_fault(mm, addr, fsr, tsk); |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 73cae57fa707..30f82fb5918c 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
| @@ -46,6 +46,8 @@ void *kmap_atomic(struct page *page, enum km_type type) | |||
| 46 | if (!PageHighMem(page)) | 46 | if (!PageHighMem(page)) |
| 47 | return page_address(page); | 47 | return page_address(page); |
| 48 | 48 | ||
| 49 | debug_kmap_atomic(type); | ||
| 50 | |||
| 49 | kmap = kmap_high_get(page); | 51 | kmap = kmap_high_get(page); |
| 50 | if (kmap) | 52 | if (kmap) |
| 51 | return kmap; | 53 | return kmap; |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 877c492f8e10..40940d7ce4ff 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
| @@ -483,7 +483,7 @@ free_memmap(int node, unsigned long start_pfn, unsigned long end_pfn) | |||
| 483 | /* | 483 | /* |
| 484 | * Convert start_pfn/end_pfn to a struct page pointer. | 484 | * Convert start_pfn/end_pfn to a struct page pointer. |
| 485 | */ | 485 | */ |
| 486 | start_pg = pfn_to_page(start_pfn); | 486 | start_pg = pfn_to_page(start_pfn - 1) + 1; |
| 487 | end_pg = pfn_to_page(end_pfn); | 487 | end_pg = pfn_to_page(end_pfn); |
| 488 | 488 | ||
| 489 | /* | 489 | /* |
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 5e0b1529964d..b00d67319058 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c | |||
| @@ -693,7 +693,7 @@ static int pxamci_probe(struct platform_device *pdev) | |||
| 693 | if (gpio_is_valid(gpio_ro)) { | 693 | if (gpio_is_valid(gpio_ro)) { |
| 694 | ret = gpio_request(gpio_ro, "mmc card read only"); | 694 | ret = gpio_request(gpio_ro, "mmc card read only"); |
| 695 | if (ret) { | 695 | if (ret) { |
| 696 | dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_power); | 696 | dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro); |
| 697 | goto err_gpio_ro; | 697 | goto err_gpio_ro; |
| 698 | } | 698 | } |
| 699 | gpio_direction_input(gpio_ro); | 699 | gpio_direction_input(gpio_ro); |
| @@ -701,7 +701,7 @@ static int pxamci_probe(struct platform_device *pdev) | |||
| 701 | if (gpio_is_valid(gpio_cd)) { | 701 | if (gpio_is_valid(gpio_cd)) { |
| 702 | ret = gpio_request(gpio_cd, "mmc card detect"); | 702 | ret = gpio_request(gpio_cd, "mmc card detect"); |
| 703 | if (ret) { | 703 | if (ret) { |
| 704 | dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_power); | 704 | dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_cd); |
| 705 | goto err_gpio_cd; | 705 | goto err_gpio_cd; |
| 706 | } | 706 | } |
| 707 | gpio_direction_input(gpio_cd); | 707 | gpio_direction_input(gpio_cd); |
diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c index 958a3ffc8987..ff5bbb9c43c9 100644 --- a/drivers/spi/amba-pl022.c +++ b/drivers/spi/amba-pl022.c | |||
| @@ -1826,7 +1826,7 @@ static struct amba_id pl022_ids[] = { | |||
| 1826 | * ST Micro derivative, this has 32bit wide | 1826 | * ST Micro derivative, this has 32bit wide |
| 1827 | * and 32 locations deep TX/RX FIFO | 1827 | * and 32 locations deep TX/RX FIFO |
| 1828 | */ | 1828 | */ |
| 1829 | .id = 0x00108022, | 1829 | .id = 0x01080022, |
| 1830 | .mask = 0xffffffff, | 1830 | .mask = 0xffffffff, |
| 1831 | .data = &vendor_st, | 1831 | .data = &vendor_st, |
| 1832 | }, | 1832 | }, |
