diff options
| -rw-r--r-- | drivers/edac/amd64_edac.c | 45 |
1 files changed, 10 insertions, 35 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index bde3d027c2d3..f943ad89849f 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
| @@ -1255,7 +1255,9 @@ static int k8_dbam_map_to_pages(struct amd64_pvt *pvt, int dram_map) | |||
| 1255 | */ | 1255 | */ |
| 1256 | static int f10_early_channel_count(struct amd64_pvt *pvt) | 1256 | static int f10_early_channel_count(struct amd64_pvt *pvt) |
| 1257 | { | 1257 | { |
| 1258 | int dbams[] = { DBAM0, DBAM1 }; | ||
| 1258 | int err = 0, channels = 0; | 1259 | int err = 0, channels = 0; |
| 1260 | int i, j; | ||
| 1259 | u32 dbam; | 1261 | u32 dbam; |
| 1260 | 1262 | ||
| 1261 | err = pci_read_config_dword(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); | 1263 | err = pci_read_config_dword(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); |
| @@ -1288,46 +1290,19 @@ static int f10_early_channel_count(struct amd64_pvt *pvt) | |||
| 1288 | * is more than just one DIMM present in unganged mode. Need to check | 1290 | * is more than just one DIMM present in unganged mode. Need to check |
| 1289 | * both controllers since DIMMs can be placed in either one. | 1291 | * both controllers since DIMMs can be placed in either one. |
| 1290 | */ | 1292 | */ |
| 1291 | channels = 0; | 1293 | for (i = 0; i < ARRAY_SIZE(dbams); i++) { |
| 1292 | err = pci_read_config_dword(pvt->dram_f2_ctl, DBAM0, &dbam); | 1294 | err = pci_read_config_dword(pvt->dram_f2_ctl, dbams[i], &dbam); |
| 1293 | if (err) | ||
| 1294 | goto err_reg; | ||
| 1295 | |||
| 1296 | if (DBAM_DIMM(0, dbam) > 0) | ||
| 1297 | channels++; | ||
| 1298 | if (DBAM_DIMM(1, dbam) > 0) | ||
| 1299 | channels++; | ||
| 1300 | if (DBAM_DIMM(2, dbam) > 0) | ||
| 1301 | channels++; | ||
| 1302 | if (DBAM_DIMM(3, dbam) > 0) | ||
| 1303 | channels++; | ||
| 1304 | |||
| 1305 | /* If more than 2 DIMMs are present, then we have 2 channels */ | ||
| 1306 | if (channels > 2) | ||
| 1307 | channels = 2; | ||
| 1308 | else if (channels == 0) { | ||
| 1309 | /* No DIMMs on DCT0, so look at DCT1 */ | ||
| 1310 | err = pci_read_config_dword(pvt->dram_f2_ctl, DBAM1, &dbam); | ||
| 1311 | if (err) | 1295 | if (err) |
| 1312 | goto err_reg; | 1296 | goto err_reg; |
| 1313 | 1297 | ||
| 1314 | if (DBAM_DIMM(0, dbam) > 0) | 1298 | for (j = 0; j < 4; j++) { |
| 1315 | channels++; | 1299 | if (DBAM_DIMM(j, dbam) > 0) { |
| 1316 | if (DBAM_DIMM(1, dbam) > 0) | 1300 | channels++; |
| 1317 | channels++; | 1301 | break; |
| 1318 | if (DBAM_DIMM(2, dbam) > 0) | 1302 | } |
| 1319 | channels++; | 1303 | } |
| 1320 | if (DBAM_DIMM(3, dbam) > 0) | ||
| 1321 | channels++; | ||
| 1322 | |||
| 1323 | if (channels > 2) | ||
| 1324 | channels = 2; | ||
| 1325 | } | 1304 | } |
| 1326 | 1305 | ||
| 1327 | /* If we found ALL 0 values, then assume just ONE DIMM-ONE Channel */ | ||
| 1328 | if (channels == 0) | ||
| 1329 | channels = 1; | ||
| 1330 | |||
| 1331 | debugf0("MCT channel count: %d\n", channels); | 1306 | debugf0("MCT channel count: %d\n", channels); |
| 1332 | 1307 | ||
| 1333 | return channels; | 1308 | return channels; |
