diff options
| -rw-r--r-- | arch/m68knommu/platform/coldfire/Makefile | 2 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/dma_timer.c | 68 |
2 files changed, 69 insertions, 1 deletions
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile index 40cf20be1b90..4f416a91a829 100644 --- a/arch/m68knommu/platform/coldfire/Makefile +++ b/arch/m68knommu/platform/coldfire/Makefile | |||
| @@ -18,7 +18,7 @@ obj-$(CONFIG_COLDFIRE) += dma.o entry.o vectors.o | |||
| 18 | obj-$(CONFIG_M5206) += timers.o | 18 | obj-$(CONFIG_M5206) += timers.o |
| 19 | obj-$(CONFIG_M5206e) += timers.o | 19 | obj-$(CONFIG_M5206e) += timers.o |
| 20 | obj-$(CONFIG_M520x) += pit.o | 20 | obj-$(CONFIG_M520x) += pit.o |
| 21 | obj-$(CONFIG_M523x) += pit.o | 21 | obj-$(CONFIG_M523x) += pit.o dma_timer.o |
| 22 | obj-$(CONFIG_M5249) += timers.o | 22 | obj-$(CONFIG_M5249) += timers.o |
| 23 | obj-$(CONFIG_M527x) += pit.o | 23 | obj-$(CONFIG_M527x) += pit.o |
| 24 | obj-$(CONFIG_M5272) += timers.o | 24 | obj-$(CONFIG_M5272) += timers.o |
diff --git a/arch/m68knommu/platform/coldfire/dma_timer.c b/arch/m68knommu/platform/coldfire/dma_timer.c new file mode 100644 index 000000000000..b623c993219e --- /dev/null +++ b/arch/m68knommu/platform/coldfire/dma_timer.c | |||
| @@ -0,0 +1,68 @@ | |||
| 1 | /* | ||
| 2 | * dma_timer.c -- Freescale ColdFire DMA Timer. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007, Benedikt Spranger <b.spranger@linutronix.de> | ||
| 5 | * Copyright (C) 2008. Sebastian Siewior, Linutronix | ||
| 6 | * | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/clocksource.h> | ||
| 10 | #include <linux/io.h> | ||
| 11 | |||
| 12 | #include <asm/machdep.h> | ||
| 13 | #include <asm/coldfire.h> | ||
| 14 | #include <asm/mcfpit.h> | ||
| 15 | #include <asm/mcfsim.h> | ||
| 16 | |||
| 17 | #define DMA_TIMER_0 (0x00) | ||
| 18 | #define DMA_TIMER_1 (0x40) | ||
| 19 | #define DMA_TIMER_2 (0x80) | ||
| 20 | #define DMA_TIMER_3 (0xc0) | ||
| 21 | |||
| 22 | #define DTMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x400) | ||
| 23 | #define DTXMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x402) | ||
| 24 | #define DTER0 (MCF_IPSBAR + DMA_TIMER_0 + 0x403) | ||
| 25 | #define DTRR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x404) | ||
| 26 | #define DTCR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x408) | ||
| 27 | #define DTCN0 (MCF_IPSBAR + DMA_TIMER_0 + 0x40c) | ||
| 28 | |||
| 29 | #define DMA_FREQ ((MCF_CLK / 2) / 16) | ||
| 30 | |||
| 31 | /* DTMR */ | ||
| 32 | #define DMA_DTMR_RESTART (1 << 3) | ||
| 33 | #define DMA_DTMR_CLK_DIV_1 (1 << 1) | ||
| 34 | #define DMA_DTMR_CLK_DIV_16 (2 << 1) | ||
| 35 | #define DMA_DTMR_ENABLE (1 << 0) | ||
| 36 | |||
| 37 | static cycle_t cf_dt_get_cycles(void) | ||
| 38 | { | ||
| 39 | return __raw_readl(DTCN0); | ||
| 40 | } | ||
| 41 | |||
| 42 | static struct clocksource clocksource_cf_dt = { | ||
| 43 | .name = "coldfire_dma_timer", | ||
| 44 | .rating = 200, | ||
| 45 | .read = cf_dt_get_cycles, | ||
| 46 | .mask = CLOCKSOURCE_MASK(32), | ||
| 47 | .shift = 20, | ||
| 48 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 49 | }; | ||
| 50 | |||
| 51 | static int __init init_cf_dt_clocksource(void) | ||
| 52 | { | ||
| 53 | /* | ||
| 54 | * We setup DMA timer 0 in free run mode. This incrementing counter is | ||
| 55 | * used as a highly precious clock source. With MCF_CLOCK = 150 MHz we | ||
| 56 | * get a ~213 ns resolution and the 32bit register will overflow almost | ||
| 57 | * every 15 minutes. | ||
| 58 | */ | ||
| 59 | __raw_writeb(0x00, DTXMR0); | ||
| 60 | __raw_writeb(0x00, DTER0); | ||
| 61 | __raw_writel(0x00000000, DTRR0); | ||
| 62 | __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0); | ||
| 63 | clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ, | ||
| 64 | clocksource_cf_dt.shift); | ||
| 65 | return clocksource_register(&clocksource_cf_dt); | ||
| 66 | } | ||
| 67 | |||
| 68 | arch_initcall(init_cf_dt_clocksource); | ||
