diff options
-rw-r--r-- | drivers/i2c/busses/i2c-mpc.c | 34 |
1 files changed, 20 insertions, 14 deletions
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index 4af5c09f0e8f..dd778d7ae047 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c | |||
@@ -164,7 +164,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing) | |||
164 | return 0; | 164 | return 0; |
165 | } | 165 | } |
166 | 166 | ||
167 | #ifdef CONFIG_PPC_52xx | 167 | #ifdef CONFIG_PPC_MPC52xx |
168 | static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = { | 168 | static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = { |
169 | {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23}, | 169 | {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23}, |
170 | {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02}, | 170 | {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02}, |
@@ -188,7 +188,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = { | |||
188 | 188 | ||
189 | int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler) | 189 | int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler) |
190 | { | 190 | { |
191 | const struct mpc52xx_i2c_divider *div = NULL; | 191 | const struct mpc_i2c_divider *div = NULL; |
192 | unsigned int pvr = mfspr(SPRN_PVR); | 192 | unsigned int pvr = mfspr(SPRN_PVR); |
193 | u32 divider; | 193 | u32 divider; |
194 | int i; | 194 | int i; |
@@ -203,7 +203,7 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler) | |||
203 | * We want to choose an FDR/DFSR that generates an I2C bus speed that | 203 | * We want to choose an FDR/DFSR that generates an I2C bus speed that |
204 | * is equal to or lower than the requested speed. | 204 | * is equal to or lower than the requested speed. |
205 | */ | 205 | */ |
206 | for (i = 0; i < ARRAY_SIZE(mpc52xx_i2c_dividers); i++) { | 206 | for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_52xx); i++) { |
207 | div = &mpc_i2c_dividers_52xx[i]; | 207 | div = &mpc_i2c_dividers_52xx[i]; |
208 | /* Old MPC5200 rev A CPUs do not support the high bits */ | 208 | /* Old MPC5200 rev A CPUs do not support the high bits */ |
209 | if (div->fdr & 0xc0 && pvr == 0x80822011) | 209 | if (div->fdr & 0xc0 && pvr == 0x80822011) |
@@ -219,20 +219,23 @@ static void mpc_i2c_setclock_52xx(struct device_node *node, | |||
219 | struct mpc_i2c *i2c, | 219 | struct mpc_i2c *i2c, |
220 | u32 clock, u32 prescaler) | 220 | u32 clock, u32 prescaler) |
221 | { | 221 | { |
222 | int fdr = mpc52xx_i2c_get_fdr(node, clock, prescaler); | 222 | int ret, fdr; |
223 | |||
224 | ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler); | ||
225 | fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */ | ||
223 | 226 | ||
224 | if (fdr < 0) | ||
225 | fdr = 0x3f; /* backward compatibility */ | ||
226 | writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); | 227 | writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); |
227 | dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr); | 228 | |
229 | if (ret >= 0) | ||
230 | dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr); | ||
228 | } | 231 | } |
229 | #else /* !CONFIG_PPC_52xx */ | 232 | #else /* !CONFIG_PPC_MPC52xx */ |
230 | static void mpc_i2c_setclock_52xx(struct device_node *node, | 233 | static void mpc_i2c_setclock_52xx(struct device_node *node, |
231 | struct mpc_i2c *i2c, | 234 | struct mpc_i2c *i2c, |
232 | u32 clock, u32 prescaler) | 235 | u32 clock, u32 prescaler) |
233 | { | 236 | { |
234 | } | 237 | } |
235 | #endif /* CONFIG_PPC_52xx*/ | 238 | #endif /* CONFIG_PPC_MPC52xx*/ |
236 | 239 | ||
237 | #ifdef CONFIG_FSL_SOC | 240 | #ifdef CONFIG_FSL_SOC |
238 | static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = { | 241 | static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = { |
@@ -321,14 +324,17 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node, | |||
321 | struct mpc_i2c *i2c, | 324 | struct mpc_i2c *i2c, |
322 | u32 clock, u32 prescaler) | 325 | u32 clock, u32 prescaler) |
323 | { | 326 | { |
324 | int fdr = mpc_i2c_get_fdr_8xxx(node, clock, prescaler); | 327 | int ret, fdr; |
328 | |||
329 | ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler); | ||
330 | fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */ | ||
325 | 331 | ||
326 | if (fdr < 0) | ||
327 | fdr = 0x1031; /* backward compatibility */ | ||
328 | writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); | 332 | writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); |
329 | writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR); | 333 | writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR); |
330 | dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n", | 334 | |
331 | clock, fdr >> 8, fdr & 0xff); | 335 | if (ret >= 0) |
336 | dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n", | ||
337 | clock, fdr >> 8, fdr & 0xff); | ||
332 | } | 338 | } |
333 | 339 | ||
334 | #else /* !CONFIG_FSL_SOC */ | 340 | #else /* !CONFIG_FSL_SOC */ |