diff options
-rw-r--r-- | include/asm-x86/system.h | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h index 9cff02ffe6c2..428d9471497f 100644 --- a/include/asm-x86/system.h +++ b/include/asm-x86/system.h | |||
@@ -296,16 +296,7 @@ void default_idle(void); | |||
296 | */ | 296 | */ |
297 | #ifdef CONFIG_X86_32 | 297 | #ifdef CONFIG_X86_32 |
298 | /* | 298 | /* |
299 | * For now, "wmb()" doesn't actually do anything, as all | 299 | * Some non-Intel clones support out of order store. wmb() ceases to be a |
300 | * Intel CPU's follow what Intel calls a *Processor Order*, | ||
301 | * in which all writes are seen in the program order even | ||
302 | * outside the CPU. | ||
303 | * | ||
304 | * I expect future Intel CPU's to have a weaker ordering, | ||
305 | * but I'd also expect them to finally get their act together | ||
306 | * and add some real memory barriers if so. | ||
307 | * | ||
308 | * Some non intel clones support out of order store. wmb() ceases to be a | ||
309 | * nop for these. | 300 | * nop for these. |
310 | */ | 301 | */ |
311 | #define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) | 302 | #define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) |