3 files changed, 44 insertions, 0 deletions

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1ac8f6318c1b..b9a7b3bc36b2 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -26,6 +26,7 @@
 #include <mach/time.h>
 #include <mach/da8xx.h>
 #include <mach/cpufreq.h>
+#include <mach/pm.h>
 
 #include "clock.h"
 #include "mux.h"
@@ -536,6 +537,7 @@ static const struct mux_config da850_pins[] = {
         MUX_CFG(DA850, GPIO2_15,        5,      0,      15,     8,      false)
         MUX_CFG(DA850, GPIO4_0,         10,     28,     15,     8,      false)
         MUX_CFG(DA850, GPIO4_1,         10,     24,     15,     8,      false)
+        MUX_CFG(DA850, RTC_ALARM,       0,      28,     15,     2,      false)
 #endif
 };
 
@@ -1029,6 +1031,43 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
 }
 #endif
 
+int da850_register_pm(struct platform_device *pdev)
+{
+        int ret;
+        struct davinci_pm_config *pdata = pdev->dev.platform_data;
+
+        ret = davinci_cfg_reg(DA850_RTC_ALARM);
+        if (ret)
+                return ret;
+
+        pdata->ddr2_ctlr_base = da8xx_get_mem_ctlr();
+        pdata->deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
+        pdata->ddrpsc_num = DA8XX_LPSC1_EMIF3C;
+
+        pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
+        if (!pdata->cpupll_reg_base)
+                return -ENOMEM;
+
+        pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K);
+        if (!pdata->ddrpll_reg_base) {
+                ret = -ENOMEM;
+                goto no_ddrpll_mem;
+        }
+
+        pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
+        if (!pdata->ddrpsc_reg_base) {
+                ret = -ENOMEM;
+                goto no_ddrpsc_mem;
+        }
+
+        return platform_device_register(pdev);
+
+no_ddrpsc_mem:
+        iounmap(pdata->ddrpll_reg_base);
+no_ddrpll_mem:
+        iounmap(pdata->cpupll_reg_base);
+        return ret;
+}
 
 static struct davinci_soc_info davinci_soc_info_da850 = {
         .io_desc                = da850_io_desc,
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index d9a7f11894c4..cc9be7fee627 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -20,6 +20,7 @@
 #include <mach/asp.h>
 #include <mach/mmc.h>
 #include <mach/usb.h>
+#include <mach/pm.h>
 
 extern void __iomem *da8xx_syscfg0_base;
 extern void __iomem *da8xx_syscfg1_base;
@@ -44,6 +45,7 @@ extern void __iomem *da8xx_syscfg1_base;
 
 #define DA8XX_SYSCFG1_BASE      (IO_PHYS + 0x22C000)
 #define DA8XX_SYSCFG1_VIRT(x)   (da8xx_syscfg1_base + (x))
+#define DA8XX_DEEPSLEEP_REG     0x8
 
 #define DA8XX_PSC0_BASE         0x01c10000
 #define DA8XX_PLL0_BASE         0x01c11000
@@ -52,6 +54,7 @@ extern void __iomem *da8xx_syscfg1_base;
 #define DA8XX_GPIO_BASE         0x01e26000
 #define DA8XX_PSC1_BASE         0x01e27000
 #define DA8XX_LCD_CNTRL_BASE    0x01e13000
+#define DA8XX_PLL1_BASE         0x01e1a000
 #define DA8XX_MMCSD0_BASE       0x01c40000
 #define DA8XX_AEMIF_CS2_BASE    0x60000000
 #define DA8XX_AEMIF_CS3_BASE    0x62000000
@@ -96,6 +99,7 @@ int da8xx_register_rtc(void);
 int da850_register_cpufreq(void);
 int da8xx_register_cpuidle(void);
 void __iomem * __init da8xx_get_mem_ctlr(void);
+int da850_register_pm(struct platform_device *pdev);
 
 extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index b60c693985ff..137bfba51d1f 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -899,6 +899,7 @@ enum davinci_da850_index {
         DA850_GPIO2_15,
         DA850_GPIO4_0,
         DA850_GPIO4_1,
+        DA850_RTC_ALARM,
 };
 
 #ifdef CONFIG_DAVINCI_MUX