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-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c4
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c93
-rw-r--r--arch/arm/mach-omap2/usb-musb.c97
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h4
5 files changed, 103 insertions, 98 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 1c0c2b02d870..43d4e14d0ec9 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -218,7 +218,8 @@ obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o \
218 hsmmc.o \ 218 hsmmc.o \
219 omap_phy_internal.o 219 omap_phy_internal.o
220 220
221obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o 221obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \
222 omap_phy_internal.o \
222 223
223obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o 224obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
224 225
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 10d60b7743cf..3413bf993c7d 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -409,6 +409,10 @@ static struct omap_musb_board_data musb_board_data = {
409 .interface_type = MUSB_INTERFACE_ULPI, 409 .interface_type = MUSB_INTERFACE_ULPI,
410 .mode = MUSB_OTG, 410 .mode = MUSB_OTG,
411 .power = 500, 411 .power = 500,
412 .set_phy_power = am35x_musb_phy_power,
413 .clear_irq = am35x_musb_clear_irq,
414 .set_mode = am35x_musb_set_mode,
415 .reset = am35x_musb_reset,
412}; 416};
413 417
414static __init void am3517_evm_musb_init(void) 418static __init void am3517_evm_musb_init(void)
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 745252c60e32..f172ec06c06a 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -29,6 +29,7 @@
29#include <linux/usb.h> 29#include <linux/usb.h>
30 30
31#include <plat/usb.h> 31#include <plat/usb.h>
32#include "control.h"
32 33
33/* OMAP control module register for UTMI PHY */ 34/* OMAP control module register for UTMI PHY */
34#define CONTROL_DEV_CONF 0x300 35#define CONTROL_DEV_CONF 0x300
@@ -147,3 +148,95 @@ int omap4430_phy_exit(struct device *dev)
147 148
148 return 0; 149 return 0;
149} 150}
151
152void am35x_musb_reset(void)
153{
154 u32 regval;
155
156 /* Reset the musb interface */
157 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
158
159 regval |= AM35XX_USBOTGSS_SW_RST;
160 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
161
162 regval &= ~AM35XX_USBOTGSS_SW_RST;
163 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
164
165 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
166}
167
168void am35x_musb_phy_power(u8 on)
169{
170 unsigned long timeout = jiffies + msecs_to_jiffies(100);
171 u32 devconf2;
172
173 if (on) {
174 /*
175 * Start the on-chip PHY and its PLL.
176 */
177 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
178
179 devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
180 devconf2 |= CONF2_PHY_PLLON;
181
182 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
183
184 pr_info(KERN_INFO "Waiting for PHY clock good...\n");
185 while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
186 & CONF2_PHYCLKGD)) {
187 cpu_relax();
188
189 if (time_after(jiffies, timeout)) {
190 pr_err(KERN_ERR "musb PHY clock good timed out\n");
191 break;
192 }
193 }
194 } else {
195 /*
196 * Power down the on-chip PHY.
197 */
198 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
199
200 devconf2 &= ~CONF2_PHY_PLLON;
201 devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN;
202 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
203 }
204}
205
206void am35x_musb_clear_irq(void)
207{
208 u32 regval;
209
210 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
211 regval |= AM35XX_USBOTGSS_INT_CLR;
212 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
213 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
214}
215
216void am35x_musb_set_mode(u8 musb_mode)
217{
218 u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
219
220 devconf2 &= ~CONF2_OTGMODE;
221 switch (musb_mode) {
222#ifdef CONFIG_USB_MUSB_HDRC_HCD
223 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
224 devconf2 |= CONF2_FORCE_HOST;
225 break;
226#endif
227#ifdef CONFIG_USB_GADGET_MUSB_HDRC
228 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
229 devconf2 |= CONF2_FORCE_DEVICE;
230 break;
231#endif
232#ifdef CONFIG_USB_MUSB_OTG
233 case MUSB_OTG: /* Don't override the VBUS/ID comparators */
234 devconf2 |= CONF2_NO_OVERRIDE;
235 break;
236#endif
237 default:
238 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
239 }
240
241 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
242}
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 5298949d4b11..9107883287f6 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -30,102 +30,9 @@
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31#include <mach/am35xx.h> 31#include <mach/am35xx.h>
32#include <plat/usb.h> 32#include <plat/usb.h>
33#include "control.h"
34 33
35#if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X) 34#if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X)
36 35
37static void am35x_musb_reset(void)
38{
39 u32 regval;
40
41 /* Reset the musb interface */
42 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
43
44 regval |= AM35XX_USBOTGSS_SW_RST;
45 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
46
47 regval &= ~AM35XX_USBOTGSS_SW_RST;
48 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
49
50 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
51}
52
53static void am35x_musb_phy_power(u8 on)
54{
55 unsigned long timeout = jiffies + msecs_to_jiffies(100);
56 u32 devconf2;
57
58 if (on) {
59 /*
60 * Start the on-chip PHY and its PLL.
61 */
62 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
63
64 devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
65 devconf2 |= CONF2_PHY_PLLON;
66
67 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
68
69 pr_info(KERN_INFO "Waiting for PHY clock good...\n");
70 while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
71 & CONF2_PHYCLKGD)) {
72 cpu_relax();
73
74 if (time_after(jiffies, timeout)) {
75 pr_err(KERN_ERR "musb PHY clock good timed out\n");
76 break;
77 }
78 }
79 } else {
80 /*
81 * Power down the on-chip PHY.
82 */
83 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
84
85 devconf2 &= ~CONF2_PHY_PLLON;
86 devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN;
87 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
88 }
89}
90
91static void am35x_musb_clear_irq(void)
92{
93 u32 regval;
94
95 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
96 regval |= AM35XX_USBOTGSS_INT_CLR;
97 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
98 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
99}
100
101static void am35x_musb_set_mode(u8 musb_mode)
102{
103 u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
104
105 devconf2 &= ~CONF2_OTGMODE;
106 switch (musb_mode) {
107#ifdef CONFIG_USB_MUSB_HDRC_HCD
108 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
109 devconf2 |= CONF2_FORCE_HOST;
110 break;
111#endif
112#ifdef CONFIG_USB_GADGET_MUSB_HDRC
113 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
114 devconf2 |= CONF2_FORCE_DEVICE;
115 break;
116#endif
117#ifdef CONFIG_USB_MUSB_OTG
118 case MUSB_OTG: /* Don't override the VBUS/ID comparators */
119 devconf2 |= CONF2_NO_OVERRIDE;
120 break;
121#endif
122 default:
123 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
124 }
125
126 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
127}
128
129static struct resource musb_resources[] = { 36static struct resource musb_resources[] = {
130 [0] = { /* start and end set dynamically */ 37 [0] = { /* start and end set dynamically */
131 .flags = IORESOURCE_MEM, 38 .flags = IORESOURCE_MEM,
@@ -189,10 +96,6 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data)
189 musb_device.name = "musb-am35x"; 96 musb_device.name = "musb-am35x";
190 musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE; 97 musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;
191 musb_resources[1].start = INT_35XX_USBOTG_IRQ; 98 musb_resources[1].start = INT_35XX_USBOTG_IRQ;
192 board_data->set_phy_power = am35x_musb_phy_power;
193 board_data->clear_irq = am35x_musb_clear_irq;
194 board_data->set_mode = am35x_musb_set_mode;
195 board_data->reset = am35x_musb_reset;
196 } else if (cpu_is_omap34xx()) { 99 } else if (cpu_is_omap34xx()) {
197 musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE; 100 musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
198 } else if (cpu_is_omap44xx()) { 101 } else if (cpu_is_omap44xx()) {
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 450a332f1009..077192759afc 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -91,6 +91,10 @@ extern int omap4430_phy_exit(struct device *dev);
91 91
92#endif 92#endif
93 93
94extern void am35x_musb_reset(void);
95extern void am35x_musb_phy_power(u8 on);
96extern void am35x_musb_clear_irq(void);
97extern void am35x_musb_set_mode(u8 musb_mode);
94 98
95/* 99/*
96 * FIXME correct answer depends on hmc_mode, 100 * FIXME correct answer depends on hmc_mode,
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-07 02:19:13 -0500