3 files changed, 26 insertions, 3 deletions

diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 3bfcfdb57d05..689169c11f0f 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -329,6 +329,17 @@ static const struct serial8250_config uart_config[] = {
                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
         },
+/* tx_loadsz is set to 63-bytes instead of 64-bytes to implement
+workaround of errata A-008006 which states that tx_loadsz should  be
+configured less than Maximum supported fifo bytes */
+        [PORT_16550A_FSL64] = {
+                .name           = "16550A_FSL64",
+                .fifo_size      = 64,
+                .tx_loadsz      = 63,
+                .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
+                                  UART_FCR7_64BYTE,
+                .flags          = UART_CAP_FIFO,
+        },
 };
 
 /* Uart divisor latch read */
@@ -956,7 +967,17 @@ static void autoconfig_16550a(struct uart_8250_port *up)
                         up->port.type = PORT_16650;
                         up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
                 } else {
-                        DEBUG_AUTOCONF("Motorola 8xxx DUART ");
+                        serial_out(up, UART_LCR, 0);
+                        serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
+                                   UART_FCR7_64BYTE);
+                        status1 = serial_in(up, UART_IIR) >> 5;
+                        serial_out(up, UART_FCR, 0);
+                        serial_out(up, UART_LCR, 0);
+
+                        if (status1 == 7)
+                                up->port.type = PORT_16550A_FSL64;
+                        else
+                                DEBUG_AUTOCONF("Motorola 8xxx DUART ");
                 }
                 serial_out(up, UART_EFR, 0);
                 return;
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 9124e837c181..ee628c489e47 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -55,7 +55,8 @@
 #define PORT_ALTR_16550_F64 27  /* Altera 16550 UART with 64 FIFOs */
 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
 #define PORT_RT2880     29      /* Ralink RT2880 internal UART */
-#define PORT_MAX_8250   29      /* max port ID */
+#define PORT_16550A_FSL64 30    /* Freescale 16550 UART with 64 FIFOs */
+#define PORT_MAX_8250   30      /* max port ID */
 
 /*
  * ARM specific type numbers.  These are not currently guaranteed
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index 53af3b790129..00adb01fa5f3 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -86,7 +86,8 @@
 #define UART_FCR6_T_TRIGGER_8   0x10 /* Mask for transmit trigger set at 8 */
 #define UART_FCR6_T_TRIGGER_24  0x20 /* Mask for transmit trigger set at 24 */
 #define UART_FCR6_T_TRIGGER_30  0x30 /* Mask for transmit trigger set at 30 */
-#define UART_FCR7_64BYTE        0x20 /* Go into 64 byte mode (TI16C750) */
+#define UART_FCR7_64BYTE        0x20 /* Go into 64 byte mode (TI16C750 and
+                                        some Freescale UARTs) */
 
 #define UART_FCR_R_TRIG_SHIFT           6
 #define UART_FCR_R_TRIG_BITS(x)         \