diff options
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 29 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.h | 14 |
2 files changed, 28 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 604fa6cee289..fabbf0d895cf 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c | |||
@@ -157,7 +157,8 @@ static void intel_dsi_enable(struct intel_encoder *encoder) | |||
157 | msleep(100); | 157 | msleep(100); |
158 | 158 | ||
159 | /* assert ip_tg_enable signal */ | 159 | /* assert ip_tg_enable signal */ |
160 | temp = I915_READ(MIPI_PORT_CTRL(pipe)); | 160 | temp = I915_READ(MIPI_PORT_CTRL(pipe)) & ~LANE_CONFIGURATION_MASK; |
161 | temp = temp | intel_dsi->port_bits; | ||
161 | I915_WRITE(MIPI_PORT_CTRL(pipe), temp | DPI_ENABLE); | 162 | I915_WRITE(MIPI_PORT_CTRL(pipe), temp | DPI_ENABLE); |
162 | POSTING_READ(MIPI_PORT_CTRL(pipe)); | 163 | POSTING_READ(MIPI_PORT_CTRL(pipe)); |
163 | } | 164 | } |
@@ -391,11 +392,7 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder) | |||
391 | I915_WRITE(MIPI_INTR_STAT(pipe), 0xffffffff); | 392 | I915_WRITE(MIPI_INTR_STAT(pipe), 0xffffffff); |
392 | I915_WRITE(MIPI_INTR_EN(pipe), 0xffffffff); | 393 | I915_WRITE(MIPI_INTR_EN(pipe), 0xffffffff); |
393 | 394 | ||
394 | I915_WRITE(MIPI_DPHY_PARAM(pipe), | 395 | I915_WRITE(MIPI_DPHY_PARAM(pipe), intel_dsi->dphy_reg); |
395 | 0x3c << EXIT_ZERO_COUNT_SHIFT | | ||
396 | 0x1f << TRAIL_COUNT_SHIFT | | ||
397 | 0xc5 << CLK_ZERO_COUNT_SHIFT | | ||
398 | 0x1f << PREPARE_COUNT_SHIFT); | ||
399 | 396 | ||
400 | I915_WRITE(MIPI_DPI_RESOLUTION(pipe), | 397 | I915_WRITE(MIPI_DPI_RESOLUTION(pipe), |
401 | adjusted_mode->vdisplay << VERTICAL_ADDRESS_SHIFT | | 398 | adjusted_mode->vdisplay << VERTICAL_ADDRESS_SHIFT | |
@@ -443,9 +440,9 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder) | |||
443 | adjusted_mode->htotal, | 440 | adjusted_mode->htotal, |
444 | bpp, intel_dsi->lane_count) + 1); | 441 | bpp, intel_dsi->lane_count) + 1); |
445 | } | 442 | } |
446 | I915_WRITE(MIPI_LP_RX_TIMEOUT(pipe), 8309); /* max */ | 443 | I915_WRITE(MIPI_LP_RX_TIMEOUT(pipe), intel_dsi->lp_rx_timeout); |
447 | I915_WRITE(MIPI_TURN_AROUND_TIMEOUT(pipe), 0x14); /* max */ | 444 | I915_WRITE(MIPI_TURN_AROUND_TIMEOUT(pipe), intel_dsi->turn_arnd_val); |
448 | I915_WRITE(MIPI_DEVICE_RESET_TIMER(pipe), 0xffff); /* max */ | 445 | I915_WRITE(MIPI_DEVICE_RESET_TIMER(pipe), intel_dsi->rst_timer_val); |
449 | 446 | ||
450 | /* dphy stuff */ | 447 | /* dphy stuff */ |
451 | 448 | ||
@@ -460,29 +457,31 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder) | |||
460 | * | 457 | * |
461 | * XXX: write MIPI_STOP_STATE_STALL? | 458 | * XXX: write MIPI_STOP_STATE_STALL? |
462 | */ | 459 | */ |
463 | I915_WRITE(MIPI_HIGH_LOW_SWITCH_COUNT(pipe), 0x46); | 460 | I915_WRITE(MIPI_HIGH_LOW_SWITCH_COUNT(pipe), |
461 | intel_dsi->hs_to_lp_count); | ||
464 | 462 | ||
465 | /* XXX: low power clock equivalence in terms of byte clock. the number | 463 | /* XXX: low power clock equivalence in terms of byte clock. the number |
466 | * of byte clocks occupied in one low power clock. based on txbyteclkhs | 464 | * of byte clocks occupied in one low power clock. based on txbyteclkhs |
467 | * and txclkesc. txclkesc time / txbyteclk time * (105 + | 465 | * and txclkesc. txclkesc time / txbyteclk time * (105 + |
468 | * MIPI_STOP_STATE_STALL) / 105.??? | 466 | * MIPI_STOP_STATE_STALL) / 105.??? |
469 | */ | 467 | */ |
470 | I915_WRITE(MIPI_LP_BYTECLK(pipe), 4); | 468 | I915_WRITE(MIPI_LP_BYTECLK(pipe), intel_dsi->lp_byte_clk); |
471 | 469 | ||
472 | /* the bw essential for transmitting 16 long packets containing 252 | 470 | /* the bw essential for transmitting 16 long packets containing 252 |
473 | * bytes meant for dcs write memory command is programmed in this | 471 | * bytes meant for dcs write memory command is programmed in this |
474 | * register in terms of byte clocks. based on dsi transfer rate and the | 472 | * register in terms of byte clocks. based on dsi transfer rate and the |
475 | * number of lanes configured the time taken to transmit 16 long packets | 473 | * number of lanes configured the time taken to transmit 16 long packets |
476 | * in a dsi stream varies. */ | 474 | * in a dsi stream varies. */ |
477 | I915_WRITE(MIPI_DBI_BW_CTRL(pipe), 0x820); | 475 | I915_WRITE(MIPI_DBI_BW_CTRL(pipe), intel_dsi->bw_timer); |
478 | 476 | ||
479 | I915_WRITE(MIPI_CLK_LANE_SWITCH_TIME_CNT(pipe), | 477 | I915_WRITE(MIPI_CLK_LANE_SWITCH_TIME_CNT(pipe), |
480 | 0xa << LP_HS_SSW_CNT_SHIFT | | 478 | intel_dsi->clk_lp_to_hs_count << LP_HS_SSW_CNT_SHIFT | |
481 | 0x14 << HS_LP_PWR_SW_CNT_SHIFT); | 479 | intel_dsi->clk_hs_to_lp_count << HS_LP_PWR_SW_CNT_SHIFT); |
482 | 480 | ||
483 | if (is_vid_mode(intel_dsi)) | 481 | if (is_vid_mode(intel_dsi)) |
484 | I915_WRITE(MIPI_VIDEO_MODE_FORMAT(pipe), | 482 | I915_WRITE(MIPI_VIDEO_MODE_FORMAT(pipe), |
485 | intel_dsi->video_mode_format); | 483 | intel_dsi->video_frmt_cfg_bits | |
484 | intel_dsi->video_mode_format); | ||
486 | } | 485 | } |
487 | 486 | ||
488 | static enum drm_connector_status | 487 | static enum drm_connector_status |
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index 387dfe13cd9b..b4a27cec882f 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h | |||
@@ -96,6 +96,20 @@ struct intel_dsi { | |||
96 | 96 | ||
97 | /* eot for MIPI_EOT_DISABLE register */ | 97 | /* eot for MIPI_EOT_DISABLE register */ |
98 | u32 eot_disable; | 98 | u32 eot_disable; |
99 | |||
100 | u32 port_bits; | ||
101 | u32 bw_timer; | ||
102 | u32 dphy_reg; | ||
103 | u32 video_frmt_cfg_bits; | ||
104 | u16 lp_byte_clk; | ||
105 | |||
106 | /* timeouts in byte clocks */ | ||
107 | u16 lp_rx_timeout; | ||
108 | u16 turn_arnd_val; | ||
109 | u16 rst_timer_val; | ||
110 | u16 hs_to_lp_count; | ||
111 | u16 clk_lp_to_hs_count; | ||
112 | u16 clk_hs_to_lp_count; | ||
99 | }; | 113 | }; |
100 | 114 | ||
101 | static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) | 115 | static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) |