diff options
-rw-r--r-- | drivers/usb/dwc3/core.c | 3 | ||||
-rw-r--r-- | drivers/usb/dwc3/core.h | 2 | ||||
-rw-r--r-- | drivers/usb/dwc3/ep0.c | 217 | ||||
-rw-r--r-- | drivers/usb/dwc3/gadget.c | 103 |
4 files changed, 170 insertions, 155 deletions
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 79a24fab13d1..bed2c1615463 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c | |||
@@ -100,6 +100,7 @@ void dwc3_put_device_id(int id) | |||
100 | 100 | ||
101 | ret = test_bit(id, dwc3_devs); | 101 | ret = test_bit(id, dwc3_devs); |
102 | WARN(!ret, "dwc3: ID %d not in use\n", id); | 102 | WARN(!ret, "dwc3: ID %d not in use\n", id); |
103 | smp_mb__before_clear_bit(); | ||
103 | clear_bit(id, dwc3_devs); | 104 | clear_bit(id, dwc3_devs); |
104 | } | 105 | } |
105 | EXPORT_SYMBOL_GPL(dwc3_put_device_id); | 106 | EXPORT_SYMBOL_GPL(dwc3_put_device_id); |
@@ -462,7 +463,7 @@ static int __devinit dwc3_probe(struct platform_device *pdev) | |||
462 | return -ENOMEM; | 463 | return -ENOMEM; |
463 | } | 464 | } |
464 | 465 | ||
465 | regs = devm_ioremap(dev, res->start, resource_size(res)); | 466 | regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); |
466 | if (!regs) { | 467 | if (!regs) { |
467 | dev_err(dev, "ioremap failed\n"); | 468 | dev_err(dev, "ioremap failed\n"); |
468 | return -ENOMEM; | 469 | return -ENOMEM; |
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index dbc5713d84fb..243affc93431 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h | |||
@@ -457,7 +457,6 @@ enum dwc3_phy { | |||
457 | enum dwc3_ep0_next { | 457 | enum dwc3_ep0_next { |
458 | DWC3_EP0_UNKNOWN = 0, | 458 | DWC3_EP0_UNKNOWN = 0, |
459 | DWC3_EP0_COMPLETE, | 459 | DWC3_EP0_COMPLETE, |
460 | DWC3_EP0_NRDY_SETUP, | ||
461 | DWC3_EP0_NRDY_DATA, | 460 | DWC3_EP0_NRDY_DATA, |
462 | DWC3_EP0_NRDY_STATUS, | 461 | DWC3_EP0_NRDY_STATUS, |
463 | }; | 462 | }; |
@@ -784,7 +783,6 @@ struct dwc3_event_depevt { | |||
784 | #define DEPEVT_STREAMEVT_NOTFOUND 2 | 783 | #define DEPEVT_STREAMEVT_NOTFOUND 2 |
785 | 784 | ||
786 | /* Control-only Status */ | 785 | /* Control-only Status */ |
787 | #define DEPEVT_STATUS_CONTROL_SETUP 0 | ||
788 | #define DEPEVT_STATUS_CONTROL_DATA 1 | 786 | #define DEPEVT_STATUS_CONTROL_DATA 1 |
789 | #define DEPEVT_STATUS_CONTROL_STATUS 2 | 787 | #define DEPEVT_STATUS_CONTROL_STATUS 2 |
790 | 788 | ||
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index 9b94886b66e5..1bba97ba218d 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c | |||
@@ -125,7 +125,6 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, | |||
125 | struct dwc3_request *req) | 125 | struct dwc3_request *req) |
126 | { | 126 | { |
127 | struct dwc3 *dwc = dep->dwc; | 127 | struct dwc3 *dwc = dep->dwc; |
128 | int ret = 0; | ||
129 | 128 | ||
130 | req->request.actual = 0; | 129 | req->request.actual = 0; |
131 | req->request.status = -EINPROGRESS; | 130 | req->request.status = -EINPROGRESS; |
@@ -156,16 +155,72 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, | |||
156 | 155 | ||
157 | dep->flags &= ~(DWC3_EP_PENDING_REQUEST | | 156 | dep->flags &= ~(DWC3_EP_PENDING_REQUEST | |
158 | DWC3_EP0_DIR_IN); | 157 | DWC3_EP0_DIR_IN); |
159 | } else if (dwc->delayed_status) { | 158 | |
159 | return 0; | ||
160 | } | ||
161 | |||
162 | /* | ||
163 | * In case gadget driver asked us to delay the STATUS phase, | ||
164 | * handle it here. | ||
165 | */ | ||
166 | if (dwc->delayed_status) { | ||
167 | unsigned direction; | ||
168 | |||
169 | direction = !dwc->ep0_expect_in; | ||
160 | dwc->delayed_status = false; | 170 | dwc->delayed_status = false; |
161 | 171 | ||
162 | if (dwc->ep0state == EP0_STATUS_PHASE) | 172 | if (dwc->ep0state == EP0_STATUS_PHASE) |
163 | __dwc3_ep0_do_control_status(dwc, dwc->eps[1]); | 173 | __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]); |
164 | else | 174 | else |
165 | dev_dbg(dwc->dev, "too early for delayed status\n"); | 175 | dev_dbg(dwc->dev, "too early for delayed status\n"); |
176 | |||
177 | return 0; | ||
166 | } | 178 | } |
167 | 179 | ||
168 | return ret; | 180 | /* |
181 | * Unfortunately we have uncovered a limitation wrt the Data Phase. | ||
182 | * | ||
183 | * Section 9.4 says we can wait for the XferNotReady(DATA) event to | ||
184 | * come before issueing Start Transfer command, but if we do, we will | ||
185 | * miss situations where the host starts another SETUP phase instead of | ||
186 | * the DATA phase. Such cases happen at least on TD.7.6 of the Link | ||
187 | * Layer Compliance Suite. | ||
188 | * | ||
189 | * The problem surfaces due to the fact that in case of back-to-back | ||
190 | * SETUP packets there will be no XferNotReady(DATA) generated and we | ||
191 | * will be stuck waiting for XferNotReady(DATA) forever. | ||
192 | * | ||
193 | * By looking at tables 9-13 and 9-14 of the Databook, we can see that | ||
194 | * it tells us to start Data Phase right away. It also mentions that if | ||
195 | * we receive a SETUP phase instead of the DATA phase, core will issue | ||
196 | * XferComplete for the DATA phase, before actually initiating it in | ||
197 | * the wire, with the TRB's status set to "SETUP_PENDING". Such status | ||
198 | * can only be used to print some debugging logs, as the core expects | ||
199 | * us to go through to the STATUS phase and start a CONTROL_STATUS TRB, | ||
200 | * just so it completes right away, without transferring anything and, | ||
201 | * only then, we can go back to the SETUP phase. | ||
202 | * | ||
203 | * Because of this scenario, SNPS decided to change the programming | ||
204 | * model of control transfers and support on-demand transfers only for | ||
205 | * the STATUS phase. To fix the issue we have now, we will always wait | ||
206 | * for gadget driver to queue the DATA phase's struct usb_request, then | ||
207 | * start it right away. | ||
208 | * | ||
209 | * If we're actually in a 2-stage transfer, we will wait for | ||
210 | * XferNotReady(STATUS). | ||
211 | */ | ||
212 | if (dwc->three_stage_setup) { | ||
213 | unsigned direction; | ||
214 | |||
215 | direction = dwc->ep0_expect_in; | ||
216 | dwc->ep0state = EP0_DATA_PHASE; | ||
217 | |||
218 | __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req); | ||
219 | |||
220 | dep->flags &= ~DWC3_EP0_DIR_IN; | ||
221 | } | ||
222 | |||
223 | return 0; | ||
169 | } | 224 | } |
170 | 225 | ||
171 | int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, | 226 | int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, |
@@ -207,9 +262,14 @@ out: | |||
207 | 262 | ||
208 | static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc) | 263 | static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc) |
209 | { | 264 | { |
210 | struct dwc3_ep *dep = dwc->eps[0]; | 265 | struct dwc3_ep *dep; |
266 | |||
267 | /* reinitialize physical ep1 */ | ||
268 | dep = dwc->eps[1]; | ||
269 | dep->flags = DWC3_EP_ENABLED; | ||
211 | 270 | ||
212 | /* stall is always issued on EP0 */ | 271 | /* stall is always issued on EP0 */ |
272 | dep = dwc->eps[0]; | ||
213 | __dwc3_gadget_ep_set_halt(dep, 1); | 273 | __dwc3_gadget_ep_set_halt(dep, 1); |
214 | dep->flags = DWC3_EP_ENABLED; | 274 | dep->flags = DWC3_EP_ENABLED; |
215 | dwc->delayed_status = false; | 275 | dwc->delayed_status = false; |
@@ -698,6 +758,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, | |||
698 | struct dwc3_trb *trb; | 758 | struct dwc3_trb *trb; |
699 | struct dwc3_ep *ep0; | 759 | struct dwc3_ep *ep0; |
700 | u32 transferred; | 760 | u32 transferred; |
761 | u32 status; | ||
701 | u32 length; | 762 | u32 length; |
702 | u8 epnum; | 763 | u8 epnum; |
703 | 764 | ||
@@ -710,6 +771,17 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc, | |||
710 | ur = &r->request; | 771 | ur = &r->request; |
711 | 772 | ||
712 | trb = dwc->ep0_trb; | 773 | trb = dwc->ep0_trb; |
774 | |||
775 | status = DWC3_TRB_SIZE_TRBSTS(trb->size); | ||
776 | if (status == DWC3_TRBSTS_SETUP_PENDING) { | ||
777 | dev_dbg(dwc->dev, "Setup Pending received\n"); | ||
778 | |||
779 | if (r) | ||
780 | dwc3_gadget_giveback(ep0, r, -ECONNRESET); | ||
781 | |||
782 | return; | ||
783 | } | ||
784 | |||
713 | length = trb->size & DWC3_TRB_SIZE_MASK; | 785 | length = trb->size & DWC3_TRB_SIZE_MASK; |
714 | 786 | ||
715 | if (dwc->ep0_bounced) { | 787 | if (dwc->ep0_bounced) { |
@@ -746,8 +818,11 @@ static void dwc3_ep0_complete_status(struct dwc3 *dwc, | |||
746 | { | 818 | { |
747 | struct dwc3_request *r; | 819 | struct dwc3_request *r; |
748 | struct dwc3_ep *dep; | 820 | struct dwc3_ep *dep; |
821 | struct dwc3_trb *trb; | ||
822 | u32 status; | ||
749 | 823 | ||
750 | dep = dwc->eps[0]; | 824 | dep = dwc->eps[0]; |
825 | trb = dwc->ep0_trb; | ||
751 | 826 | ||
752 | if (!list_empty(&dep->request_list)) { | 827 | if (!list_empty(&dep->request_list)) { |
753 | r = next_request(&dep->request_list); | 828 | r = next_request(&dep->request_list); |
@@ -767,6 +842,10 @@ static void dwc3_ep0_complete_status(struct dwc3 *dwc, | |||
767 | } | 842 | } |
768 | } | 843 | } |
769 | 844 | ||
845 | status = DWC3_TRB_SIZE_TRBSTS(trb->size); | ||
846 | if (status == DWC3_TRBSTS_SETUP_PENDING) | ||
847 | dev_dbg(dwc->dev, "Setup Pending received\n"); | ||
848 | |||
770 | dwc->ep0state = EP0_SETUP_PHASE; | 849 | dwc->ep0state = EP0_SETUP_PHASE; |
771 | dwc3_ep0_out_start(dwc); | 850 | dwc3_ep0_out_start(dwc); |
772 | } | 851 | } |
@@ -800,12 +879,6 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc, | |||
800 | } | 879 | } |
801 | } | 880 | } |
802 | 881 | ||
803 | static void dwc3_ep0_do_control_setup(struct dwc3 *dwc, | ||
804 | const struct dwc3_event_depevt *event) | ||
805 | { | ||
806 | dwc3_ep0_out_start(dwc); | ||
807 | } | ||
808 | |||
809 | static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, | 882 | static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, |
810 | struct dwc3_ep *dep, struct dwc3_request *req) | 883 | struct dwc3_ep *dep, struct dwc3_request *req) |
811 | { | 884 | { |
@@ -858,29 +931,6 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, | |||
858 | WARN_ON(ret < 0); | 931 | WARN_ON(ret < 0); |
859 | } | 932 | } |
860 | 933 | ||
861 | static void dwc3_ep0_do_control_data(struct dwc3 *dwc, | ||
862 | const struct dwc3_event_depevt *event) | ||
863 | { | ||
864 | struct dwc3_ep *dep; | ||
865 | struct dwc3_request *req; | ||
866 | |||
867 | dep = dwc->eps[0]; | ||
868 | |||
869 | if (list_empty(&dep->request_list)) { | ||
870 | dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n"); | ||
871 | dep->flags |= DWC3_EP_PENDING_REQUEST; | ||
872 | |||
873 | if (event->endpoint_number) | ||
874 | dep->flags |= DWC3_EP0_DIR_IN; | ||
875 | return; | ||
876 | } | ||
877 | |||
878 | req = next_request(&dep->request_list); | ||
879 | dep = dwc->eps[event->endpoint_number]; | ||
880 | |||
881 | __dwc3_ep0_do_control_data(dwc, dep, req); | ||
882 | } | ||
883 | |||
884 | static int dwc3_ep0_start_control_status(struct dwc3_ep *dep) | 934 | static int dwc3_ep0_start_control_status(struct dwc3_ep *dep) |
885 | { | 935 | { |
886 | struct dwc3 *dwc = dep->dwc; | 936 | struct dwc3 *dwc = dep->dwc; |
@@ -912,100 +962,61 @@ static void dwc3_ep0_do_control_status(struct dwc3 *dwc, | |||
912 | __dwc3_ep0_do_control_status(dwc, dep); | 962 | __dwc3_ep0_do_control_status(dwc, dep); |
913 | } | 963 | } |
914 | 964 | ||
915 | static void dwc3_ep0_xfernotready(struct dwc3 *dwc, | 965 | static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep) |
916 | const struct dwc3_event_depevt *event) | ||
917 | { | 966 | { |
918 | dwc->setup_packet_pending = true; | 967 | struct dwc3_gadget_ep_cmd_params params; |
919 | 968 | u32 cmd; | |
920 | /* | 969 | int ret; |
921 | * This part is very tricky: If we have just handled | ||
922 | * XferNotReady(Setup) and we're now expecting a | ||
923 | * XferComplete but, instead, we receive another | ||
924 | * XferNotReady(Setup), we should STALL and restart | ||
925 | * the state machine. | ||
926 | * | ||
927 | * In all other cases, we just continue waiting | ||
928 | * for the XferComplete event. | ||
929 | * | ||
930 | * We are a little bit unsafe here because we're | ||
931 | * not trying to ensure that last event was, indeed, | ||
932 | * XferNotReady(Setup). | ||
933 | * | ||
934 | * Still, we don't expect any condition where that | ||
935 | * should happen and, even if it does, it would be | ||
936 | * another error condition. | ||
937 | */ | ||
938 | if (dwc->ep0_next_event == DWC3_EP0_COMPLETE) { | ||
939 | switch (event->status) { | ||
940 | case DEPEVT_STATUS_CONTROL_SETUP: | ||
941 | dev_vdbg(dwc->dev, "Unexpected XferNotReady(Setup)\n"); | ||
942 | dwc3_ep0_stall_and_restart(dwc); | ||
943 | break; | ||
944 | case DEPEVT_STATUS_CONTROL_DATA: | ||
945 | /* FALLTHROUGH */ | ||
946 | case DEPEVT_STATUS_CONTROL_STATUS: | ||
947 | /* FALLTHROUGH */ | ||
948 | default: | ||
949 | dev_vdbg(dwc->dev, "waiting for XferComplete\n"); | ||
950 | } | ||
951 | 970 | ||
971 | if (!dep->resource_index) | ||
952 | return; | 972 | return; |
953 | } | ||
954 | |||
955 | switch (event->status) { | ||
956 | case DEPEVT_STATUS_CONTROL_SETUP: | ||
957 | dev_vdbg(dwc->dev, "Control Setup\n"); | ||
958 | 973 | ||
959 | dwc->ep0state = EP0_SETUP_PHASE; | 974 | cmd = DWC3_DEPCMD_ENDTRANSFER; |
975 | cmd |= DWC3_DEPCMD_CMDIOC; | ||
976 | cmd |= DWC3_DEPCMD_PARAM(dep->resource_index); | ||
977 | memset(¶ms, 0, sizeof(params)); | ||
978 | ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms); | ||
979 | WARN_ON_ONCE(ret); | ||
980 | dep->resource_index = 0; | ||
981 | } | ||
960 | 982 | ||
961 | dwc3_ep0_do_control_setup(dwc, event); | 983 | static void dwc3_ep0_xfernotready(struct dwc3 *dwc, |
962 | break; | 984 | const struct dwc3_event_depevt *event) |
985 | { | ||
986 | dwc->setup_packet_pending = true; | ||
963 | 987 | ||
988 | switch (event->status) { | ||
964 | case DEPEVT_STATUS_CONTROL_DATA: | 989 | case DEPEVT_STATUS_CONTROL_DATA: |
965 | dev_vdbg(dwc->dev, "Control Data\n"); | 990 | dev_vdbg(dwc->dev, "Control Data\n"); |
966 | 991 | ||
967 | dwc->ep0state = EP0_DATA_PHASE; | ||
968 | |||
969 | if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) { | ||
970 | dev_vdbg(dwc->dev, "Expected %d got %d\n", | ||
971 | dwc->ep0_next_event, | ||
972 | DWC3_EP0_NRDY_DATA); | ||
973 | |||
974 | dwc3_ep0_stall_and_restart(dwc); | ||
975 | return; | ||
976 | } | ||
977 | |||
978 | /* | 992 | /* |
979 | * One of the possible error cases is when Host _does_ | 993 | * We already have a DATA transfer in the controller's cache, |
980 | * request for Data Phase, but it does so on the wrong | 994 | * if we receive a XferNotReady(DATA) we will ignore it, unless |
981 | * direction. | 995 | * it's for the wrong direction. |
982 | * | 996 | * |
983 | * Here, we already know ep0_next_event is DATA (see above), | 997 | * In that case, we must issue END_TRANSFER command to the Data |
984 | * so we only need to check for direction. | 998 | * Phase we already have started and issue SetStall on the |
999 | * control endpoint. | ||
985 | */ | 1000 | */ |
986 | if (dwc->ep0_expect_in != event->endpoint_number) { | 1001 | if (dwc->ep0_expect_in != event->endpoint_number) { |
1002 | struct dwc3_ep *dep = dwc->eps[dwc->ep0_expect_in]; | ||
1003 | |||
987 | dev_vdbg(dwc->dev, "Wrong direction for Data phase\n"); | 1004 | dev_vdbg(dwc->dev, "Wrong direction for Data phase\n"); |
1005 | dwc3_ep0_end_control_data(dwc, dep); | ||
988 | dwc3_ep0_stall_and_restart(dwc); | 1006 | dwc3_ep0_stall_and_restart(dwc); |
989 | return; | 1007 | return; |
990 | } | 1008 | } |
991 | 1009 | ||
992 | dwc3_ep0_do_control_data(dwc, event); | ||
993 | break; | 1010 | break; |
994 | 1011 | ||
995 | case DEPEVT_STATUS_CONTROL_STATUS: | 1012 | case DEPEVT_STATUS_CONTROL_STATUS: |
1013 | if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) | ||
1014 | return; | ||
1015 | |||
996 | dev_vdbg(dwc->dev, "Control Status\n"); | 1016 | dev_vdbg(dwc->dev, "Control Status\n"); |
997 | 1017 | ||
998 | dwc->ep0state = EP0_STATUS_PHASE; | 1018 | dwc->ep0state = EP0_STATUS_PHASE; |
999 | 1019 | ||
1000 | if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) { | ||
1001 | dev_vdbg(dwc->dev, "Expected %d got %d\n", | ||
1002 | dwc->ep0_next_event, | ||
1003 | DWC3_EP0_NRDY_STATUS); | ||
1004 | |||
1005 | dwc3_ep0_stall_and_restart(dwc); | ||
1006 | return; | ||
1007 | } | ||
1008 | |||
1009 | if (dwc->delayed_status) { | 1020 | if (dwc->delayed_status) { |
1010 | WARN_ON_ONCE(event->endpoint_number != 1); | 1021 | WARN_ON_ONCE(event->endpoint_number != 1); |
1011 | dev_vdbg(dwc->dev, "Mass Storage delayed status\n"); | 1022 | dev_vdbg(dwc->dev, "Mass Storage delayed status\n"); |
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 58fdfad96b4d..ba444e7f9c44 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c | |||
@@ -431,15 +431,25 @@ static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep) | |||
431 | 431 | ||
432 | static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, | 432 | static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, |
433 | const struct usb_endpoint_descriptor *desc, | 433 | const struct usb_endpoint_descriptor *desc, |
434 | const struct usb_ss_ep_comp_descriptor *comp_desc) | 434 | const struct usb_ss_ep_comp_descriptor *comp_desc, |
435 | bool ignore) | ||
435 | { | 436 | { |
436 | struct dwc3_gadget_ep_cmd_params params; | 437 | struct dwc3_gadget_ep_cmd_params params; |
437 | 438 | ||
438 | memset(¶ms, 0x00, sizeof(params)); | 439 | memset(¶ms, 0x00, sizeof(params)); |
439 | 440 | ||
440 | params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc)) | 441 | params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc)) |
441 | | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc)) | 442 | | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc)); |
442 | | DWC3_DEPCFG_BURST_SIZE(dep->endpoint.maxburst - 1); | 443 | |
444 | /* Burst size is only needed in SuperSpeed mode */ | ||
445 | if (dwc->gadget.speed == USB_SPEED_SUPER) { | ||
446 | u32 burst = dep->endpoint.maxburst - 1; | ||
447 | |||
448 | params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst); | ||
449 | } | ||
450 | |||
451 | if (ignore) | ||
452 | params.param0 |= DWC3_DEPCFG_IGN_SEQ_NUM; | ||
443 | 453 | ||
444 | params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN | 454 | params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN |
445 | | DWC3_DEPCFG_XFER_NOT_READY_EN; | 455 | | DWC3_DEPCFG_XFER_NOT_READY_EN; |
@@ -498,7 +508,8 @@ static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep) | |||
498 | */ | 508 | */ |
499 | static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, | 509 | static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, |
500 | const struct usb_endpoint_descriptor *desc, | 510 | const struct usb_endpoint_descriptor *desc, |
501 | const struct usb_ss_ep_comp_descriptor *comp_desc) | 511 | const struct usb_ss_ep_comp_descriptor *comp_desc, |
512 | bool ignore) | ||
502 | { | 513 | { |
503 | struct dwc3 *dwc = dep->dwc; | 514 | struct dwc3 *dwc = dep->dwc; |
504 | u32 reg; | 515 | u32 reg; |
@@ -510,7 +521,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, | |||
510 | return ret; | 521 | return ret; |
511 | } | 522 | } |
512 | 523 | ||
513 | ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc); | 524 | ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc, ignore); |
514 | if (ret) | 525 | if (ret) |
515 | return ret; | 526 | return ret; |
516 | 527 | ||
@@ -558,27 +569,7 @@ static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) | |||
558 | if (!list_empty(&dep->req_queued)) { | 569 | if (!list_empty(&dep->req_queued)) { |
559 | dwc3_stop_active_transfer(dwc, dep->number); | 570 | dwc3_stop_active_transfer(dwc, dep->number); |
560 | 571 | ||
561 | /* | 572 | /* - giveback all requests to gadget driver */ |
562 | * NOTICE: We are violating what the Databook says about the | ||
563 | * EndTransfer command. Ideally we would _always_ wait for the | ||
564 | * EndTransfer Command Completion IRQ, but that's causing too | ||
565 | * much trouble synchronizing between us and gadget driver. | ||
566 | * | ||
567 | * We have discussed this with the IP Provider and it was | ||
568 | * suggested to giveback all requests here, but give HW some | ||
569 | * extra time to synchronize with the interconnect. We're using | ||
570 | * an arbitraty 100us delay for that. | ||
571 | * | ||
572 | * Note also that a similar handling was tested by Synopsys | ||
573 | * (thanks a lot Paul) and nothing bad has come out of it. | ||
574 | * In short, what we're doing is: | ||
575 | * | ||
576 | * - Issue EndTransfer WITH CMDIOC bit set | ||
577 | * - Wait 100us | ||
578 | * - giveback all requests to gadget driver | ||
579 | */ | ||
580 | udelay(100); | ||
581 | |||
582 | while (!list_empty(&dep->req_queued)) { | 573 | while (!list_empty(&dep->req_queued)) { |
583 | req = next_request(&dep->req_queued); | 574 | req = next_request(&dep->req_queued); |
584 | 575 | ||
@@ -657,6 +648,12 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep, | |||
657 | dep = to_dwc3_ep(ep); | 648 | dep = to_dwc3_ep(ep); |
658 | dwc = dep->dwc; | 649 | dwc = dep->dwc; |
659 | 650 | ||
651 | if (dep->flags & DWC3_EP_ENABLED) { | ||
652 | dev_WARN_ONCE(dwc->dev, true, "%s is already enabled\n", | ||
653 | dep->name); | ||
654 | return 0; | ||
655 | } | ||
656 | |||
660 | switch (usb_endpoint_type(desc)) { | 657 | switch (usb_endpoint_type(desc)) { |
661 | case USB_ENDPOINT_XFER_CONTROL: | 658 | case USB_ENDPOINT_XFER_CONTROL: |
662 | strlcat(dep->name, "-control", sizeof(dep->name)); | 659 | strlcat(dep->name, "-control", sizeof(dep->name)); |
@@ -674,16 +671,10 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep, | |||
674 | dev_err(dwc->dev, "invalid endpoint transfer type\n"); | 671 | dev_err(dwc->dev, "invalid endpoint transfer type\n"); |
675 | } | 672 | } |
676 | 673 | ||
677 | if (dep->flags & DWC3_EP_ENABLED) { | ||
678 | dev_WARN_ONCE(dwc->dev, true, "%s is already enabled\n", | ||
679 | dep->name); | ||
680 | return 0; | ||
681 | } | ||
682 | |||
683 | dev_vdbg(dwc->dev, "Enabling %s\n", dep->name); | 674 | dev_vdbg(dwc->dev, "Enabling %s\n", dep->name); |
684 | 675 | ||
685 | spin_lock_irqsave(&dwc->lock, flags); | 676 | spin_lock_irqsave(&dwc->lock, flags); |
686 | ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc); | 677 | ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc, false); |
687 | spin_unlock_irqrestore(&dwc->lock, flags); | 678 | spin_unlock_irqrestore(&dwc->lock, flags); |
688 | 679 | ||
689 | return ret; | 680 | return ret; |
@@ -1087,15 +1078,10 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) | |||
1087 | * | 1078 | * |
1088 | */ | 1079 | */ |
1089 | if (dep->flags & DWC3_EP_PENDING_REQUEST) { | 1080 | if (dep->flags & DWC3_EP_PENDING_REQUEST) { |
1090 | int ret; | ||
1091 | |||
1092 | ret = __dwc3_gadget_kick_transfer(dep, 0, true); | 1081 | ret = __dwc3_gadget_kick_transfer(dep, 0, true); |
1093 | if (ret && ret != -EBUSY) { | 1082 | if (ret && ret != -EBUSY) |
1094 | struct dwc3 *dwc = dep->dwc; | ||
1095 | |||
1096 | dev_dbg(dwc->dev, "%s: failed to kick transfers\n", | 1083 | dev_dbg(dwc->dev, "%s: failed to kick transfers\n", |
1097 | dep->name); | 1084 | dep->name); |
1098 | } | ||
1099 | } | 1085 | } |
1100 | 1086 | ||
1101 | /* | 1087 | /* |
@@ -1104,16 +1090,14 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) | |||
1104 | * core may not see the modified TRB(s). | 1090 | * core may not see the modified TRB(s). |
1105 | */ | 1091 | */ |
1106 | if (usb_endpoint_xfer_isoc(dep->endpoint.desc) && | 1092 | if (usb_endpoint_xfer_isoc(dep->endpoint.desc) && |
1107 | (dep->flags & DWC3_EP_BUSY)) { | 1093 | (dep->flags & DWC3_EP_BUSY) && |
1094 | !(dep->flags & DWC3_EP_MISSED_ISOC)) { | ||
1108 | WARN_ON_ONCE(!dep->resource_index); | 1095 | WARN_ON_ONCE(!dep->resource_index); |
1109 | ret = __dwc3_gadget_kick_transfer(dep, dep->resource_index, | 1096 | ret = __dwc3_gadget_kick_transfer(dep, dep->resource_index, |
1110 | false); | 1097 | false); |
1111 | if (ret && ret != -EBUSY) { | 1098 | if (ret && ret != -EBUSY) |
1112 | struct dwc3 *dwc = dep->dwc; | ||
1113 | |||
1114 | dev_dbg(dwc->dev, "%s: failed to kick transfers\n", | 1099 | dev_dbg(dwc->dev, "%s: failed to kick transfers\n", |
1115 | dep->name); | 1100 | dep->name); |
1116 | } | ||
1117 | } | 1101 | } |
1118 | 1102 | ||
1119 | /* | 1103 | /* |
@@ -1518,14 +1502,14 @@ static int dwc3_gadget_start(struct usb_gadget *g, | |||
1518 | dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); | 1502 | dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); |
1519 | 1503 | ||
1520 | dep = dwc->eps[0]; | 1504 | dep = dwc->eps[0]; |
1521 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); | 1505 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false); |
1522 | if (ret) { | 1506 | if (ret) { |
1523 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 1507 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
1524 | goto err0; | 1508 | goto err0; |
1525 | } | 1509 | } |
1526 | 1510 | ||
1527 | dep = dwc->eps[1]; | 1511 | dep = dwc->eps[1]; |
1528 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); | 1512 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false); |
1529 | if (ret) { | 1513 | if (ret) { |
1530 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 1514 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
1531 | goto err1; | 1515 | goto err1; |
@@ -1750,7 +1734,7 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc, | |||
1750 | int i; | 1734 | int i; |
1751 | 1735 | ||
1752 | for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) { | 1736 | for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) { |
1753 | struct dwc3_ep *dep = dwc->eps[i]; | 1737 | dep = dwc->eps[i]; |
1754 | 1738 | ||
1755 | if (!(dep->flags & DWC3_EP_ENABLED)) | 1739 | if (!(dep->flags & DWC3_EP_ENABLED)) |
1756 | continue; | 1740 | continue; |
@@ -1877,6 +1861,25 @@ static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum) | |||
1877 | if (!dep->resource_index) | 1861 | if (!dep->resource_index) |
1878 | return; | 1862 | return; |
1879 | 1863 | ||
1864 | /* | ||
1865 | * NOTICE: We are violating what the Databook says about the | ||
1866 | * EndTransfer command. Ideally we would _always_ wait for the | ||
1867 | * EndTransfer Command Completion IRQ, but that's causing too | ||
1868 | * much trouble synchronizing between us and gadget driver. | ||
1869 | * | ||
1870 | * We have discussed this with the IP Provider and it was | ||
1871 | * suggested to giveback all requests here, but give HW some | ||
1872 | * extra time to synchronize with the interconnect. We're using | ||
1873 | * an arbitraty 100us delay for that. | ||
1874 | * | ||
1875 | * Note also that a similar handling was tested by Synopsys | ||
1876 | * (thanks a lot Paul) and nothing bad has come out of it. | ||
1877 | * In short, what we're doing is: | ||
1878 | * | ||
1879 | * - Issue EndTransfer WITH CMDIOC bit set | ||
1880 | * - Wait 100us | ||
1881 | */ | ||
1882 | |||
1880 | cmd = DWC3_DEPCMD_ENDTRANSFER; | 1883 | cmd = DWC3_DEPCMD_ENDTRANSFER; |
1881 | cmd |= DWC3_DEPCMD_HIPRI_FORCERM | DWC3_DEPCMD_CMDIOC; | 1884 | cmd |= DWC3_DEPCMD_HIPRI_FORCERM | DWC3_DEPCMD_CMDIOC; |
1882 | cmd |= DWC3_DEPCMD_PARAM(dep->resource_index); | 1885 | cmd |= DWC3_DEPCMD_PARAM(dep->resource_index); |
@@ -1884,6 +1887,8 @@ static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum) | |||
1884 | ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms); | 1887 | ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms); |
1885 | WARN_ON_ONCE(ret); | 1888 | WARN_ON_ONCE(ret); |
1886 | dep->resource_index = 0; | 1889 | dep->resource_index = 0; |
1890 | |||
1891 | udelay(100); | ||
1887 | } | 1892 | } |
1888 | 1893 | ||
1889 | static void dwc3_stop_active_transfers(struct dwc3 *dwc) | 1894 | static void dwc3_stop_active_transfers(struct dwc3 *dwc) |
@@ -2141,14 +2146,14 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) | |||
2141 | } | 2146 | } |
2142 | 2147 | ||
2143 | dep = dwc->eps[0]; | 2148 | dep = dwc->eps[0]; |
2144 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); | 2149 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true); |
2145 | if (ret) { | 2150 | if (ret) { |
2146 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 2151 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
2147 | return; | 2152 | return; |
2148 | } | 2153 | } |
2149 | 2154 | ||
2150 | dep = dwc->eps[1]; | 2155 | dep = dwc->eps[1]; |
2151 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); | 2156 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true); |
2152 | if (ret) { | 2157 | if (ret) { |
2153 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 2158 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
2154 | return; | 2159 | return; |